The currently existing ISO/AVC file format is modified by providing extensions to store and access video content currently being defined by the SVC standard. Specifically, extensions to the AVC file format are made to provide a new SVC file format that enables the storage and access of scalable video data. The scalable video data is stored as a single track within a media data section of the SVC file format. New extensions are defined for description entries and boxes within a metadata section of the SVC file format. These extensions provide means for extracting sub-streams or layers from the single track of scalable video data stored in the media data section.

A file format is a particular way to encode information for storage in a computer file. The conventional manner of storing the format of a file is to explicitly store information about the format in the file system. This approach keeps the metadata separate from both the main data and the file name.
The ISO Base Media File Format is designed to contain timed media information or media data streams, such as a movie. The stored media information can be transmitted locally or via a network or other stream delivery mechanism. The files have a logical structure, a time structure, and a physical structure. The logical structure of the file includes a set of time-parallel tracks. The time structure of the file provides the tracks with sequences of data samples in time, and those sequences are mapped into a timeline of the overall media data stream by optional edit lists. The physical structure of the file separates the data needed for logic, time, and structural de-composition, from the media data samples themselves. This structural information is concentrated in a metadata box, possibly extended in time by metadata fragment boxes. The metadata box documents the logical and timing relationships of the data samples, and also includes pointers to where the data samples are stored.
Each media data stream is included in a track specialized for that media type (audio, video etc.), and is further parameterized by a sample entry. The sample entry includes the 'name' of the exact media type, for example the type of the decoder needed to decode the media data stream, and other parameters needed for decoding. There are defined sample entry formats for a variety media types.
Support for metadata takes two forms. First, timed metadata is stored in an appropriate track and synchronized with the media data it is describing. Second, there is general support for non-timed metadata attached to the media data stream or to an individual track. These generalized metadata structures are also be used at the file level in the form of a metadata box. In this case, the metadata box is the primary access means to the stored media data streams.
In some cases, the data samples within a track have different characteristics or need to be specially identified. One such characteristic is the synchronization point, often a video I-frame. These points are identified by a special table in each track. More generally, the nature of dependencies between track samples is documented in this manner. There is also the concept of sample groups. Sample groups permit the documentation of arbitrary characteristics that are shared by some of the data samples in a track. In the Advanced Video Coding (AVC) file format, sample groups are used to support the concept of layering and sub-sequences.
The AVC file format defines a storage format for video streams encoded according to the AVC standard. The AVC file format extends the ISO Base Media File Format. The AVC file format enables AVC video streams to be used in conjunction with other media streams, such as audio, to be formatted for delivery by a streaming server, using hint tracks, and to inherit all the use cases and features of the ISO Base Media File Format.
FIG. 1 illustrates an exemplary configuration of an AVC file format 10 including a media data section 20 and a metadata section 30. Each data stream is stored in the media data section 20. Multiple data streams can be stored in one file format. As shown in FIG. 1, four data streams 22, 24, 26, and 28 are stored in the media data section 20. For each data stream stored in the media data section of the AVC file format there is a corresponding track stored in the metadata section. In FIG. 1, a track 32 corresponds to the data stream 22, a track 33 corresponds to the data stream 24, a track 36 corresponds to the data stream 26, and a track 38 corresponds to the data stream 28. In general, there are N tracks stored in the metadata section for N data streams stored in the data section.
The H.264, or MPEG-4 Part 10, specification is a high compression digital video codec standard written by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG) in a collective effort partnership often known as the Joint Video Team (JVT). The ITU-T H.264 standard and the ISO/IEC MPEG-4 Part 10 standard (formally, ISO/IEC 14496-10) are technically identical, and the technology is also known as AVC, for Advanced Video Coding. It should be noted that H.264 is a name related to the ITU-T line of H.26x video standards, while AVC relates to the ISO/IEC MPEG side of the partnership project that completed the work on the standard, after earlier development done in the ITU-T as a project called H.26L. It is usual to call the standard as H.264/AVC (or AVC/H.264 or H.264/MPEG-4 AVC or MPEG-4/H.264 AVC) to emphasize the common heritage. Occasionally, it has also been referred to as "the JVT codec", in reference to the JVT organization that developed it.
Currently JVT is working on a new codec known as the Scalable Video Codec (SVC), which would be an extension to the existing AVC codec. Work on the SVC started independently in the MPEG domain initially as a part of the MPEG-21 standard in 2003. But during its development in 2004, it was merged with the activities of the JVT group with a focus towards developing coding technology that would be backwards compatible with the existing AVC codec. As such it currently is jointly developed by the JVT group in MPEG and ITU-T. The goal of the Scalable Video Codec (SVC) activity is to address the need and provide for scalability in the Spatial, Temporal and Quality (SNR) levels.
The existing file formats (ISO/MP4 and AVC) do not provide an easy and clear mechanism to extract the different variations of the spatial, temporal and SNR (quality) layers from the stored media data in the file format. Therefore, this information must be extracted by parsing the coded media stream, which is very inefficient and slow. Thus, there is a need to enhance and define new extensions to support the storage of emerging video coding standards such as SVC and to address the existing limitations of current file format storage methods. These new extensions define a structuring and grouping mechanism for the dependencies that exist in a group of pictures and within each sample to obtain a flexible stream structure that provides for spatial, temporal, and quality flexibility. The SVC standard proposes to encode the entire scalable media data as one single scalable bitstream, from which variants of temporal, spatial and quality layers can be extracted.
In the AVC standard, each video stream is encoded, and subsequently decoded, as an independent stream according to a particular frame rate, resolution, and quality. According to the SVC standard, from the single encoded video stream, referred to as a SVC elementary stream, multiple different types of video can be extracted, for example a low resolution video stream, a standard resolution video stream, or a high resolution video stream. To support the storage and extraction of such scalable video streams in the file format, the file formats need to be modified.
The SVC standard is currently under development and as the SVC standard defines a new design for a video codec, an appropriately defined new file format standard is also required to enable the storage and extraction of the new SVC video streams. To support the new SVC video streams, a new SVC file format is under development which extends the AVC file format to support the storage of the SVC video streams. However, specific extensions that define access to the stored scalable video have yet to be developed.


The present disclosure provides a circuit for balancing voltages of battery packs to be connected in parallel, comprising: IN-side switches and OUT-side switches; a DC-DC converter with an IN terminal connected to the IN-side switches and an OUT terminal connected to the OUT-side switches; and a controller to operate an IN-side switch to connect a Vmax battery pack to the IN terminal, operate an OUT-side switch to connect a Vmin battery pack to the OUT terminal, and activate the DC-DC converter to transfer energy from the Vmin battery pack to the Vmin battery pack. The controller responds to an IN terminal voltage being sufficiently close to a voltage of a first battery pack by operating an IN-side switch to connect the first pack to the IN terminal, and responds to an OUT terminal voltage being sufficiently close to a voltage of a second battery pack by operating an OUT-side switch to connect the second battery pack to the OUT terminal.

Battery packs used in applications such as electric vehicles, hybrid electric vehicles and other devices and equipment powered at least partially by stored electricity can be connected in parallel to provide increased travel range, power redundancy and other desirable operational characteristics. One known challenge when using high-voltage parallel battery packs, however, is the need to balance the voltage of the packs, particularly when the battery packs are being brought on line such as after the vehicle or equipment was powered down. Any significant difference in the battery pack voltages results in large balancing currents when the packs are connected, which may reduce the useful life of the battery packs and/or contactors or other circuitry connected to the battery packs. Thus, an approach for addressing the potential damage caused by unbalanced parallel battery pack voltages is needed.
Conventional systems employ various approaches for avoiding the problem outlined above. For example, some systems identify the battery packs in the group of parallel packs that have small voltage differences and connect those battery packs to a common bus in a certain sequence. This approach relies on the internal resistances of the battery packs to limit the balancing current. Additionally, only the battery packs with small voltage differences can be balanced. Some battery packs will be kept off-line. In another approach, the battery pack voltages of the group of battery packs is balanced during charging using an external power source, or during discharging to an external load. This approach, however, requires the use of an external power source or an external load, which limits where and when a voltage balancing can be performed. Finally, in another approach all of the battery packs are connected in parallel when the energy storage system is off-line. This, however, results in an energy storage system with battery packs having live terminals during off-line periods. When high-voltage battery packs are used, this approach presents potential safety risks.
As such, there exists a need to provide an approach to actively balance voltages of battery packs to be connected in parallel in energy storage systems to prevent damage to the system without relying on an external source or load or presenting safety concerns.

DC-DC-converter-based active voltage-balancing system and method for parallel battery packs


A classification system is provided that separates unclassified pages into unclassified, separated documents and classifies the separated documents. The classification system applies a page-level recognition model to the unclassified pages to recognize the logical boundaries between documents and, based on the logical boundaries, separates the pages into unclassified, separated documents. The classification system further applies a document-level recognition model to classify the separated documents.

Many commercial and governmental transactions still rely heavily on underlying paper documents. Document capture solutions allow organizations to capture and store electronic copies of these paper documents. The electronic documents can be classified and indexed, thereby enhancing search and retrieval and allowing document-type dependent workflows to be implemented. Some document capture solutions classify documents using a combination of automatic and manual classification and indexing. In these solutions, documents that cannot be classified or indexed automatically with sufficient confidence are presented to an operator for manual classification or indexing.
The ease with which a system can classify a document depends, in part, on whether the document is a structured document, semi-structured document or unstructured document.
Structured documents are documents in which there are fixed locations for each piece of data so that data appears at the same place on the page with minimum variance. Examples of structured documents include, but are not limited to, forms in which each instance of the form has the same layout with fields positioned at the same places on the page with minimum variance. Structured documents are generally the easiest documents to classify and index.
Many business documents are semi-structured. Semi-structured documents follow general layout patterns, but there is not a defined geometric region for each piece of data. As such, the location of data, number of fields, etc. may vary between documents of the same document type. Using the example of a purchase order that has a line item row of fields, individual purchase orders may have a different number of line item rows. Thus, line item data may appear in different places in the two purchase orders. Semi-structured documents are generally more difficult to classify and index than structured documents.
Unstructured documents, at least from the perspective of the document capture system, have little structure or consistency. For example, business-to-consumer correspondence follows no regular structural pattern. Unstructured documents present the hardest challenge of the three categories.
Some document recognition functionality relies on identifying specific keywords or identification marks in defined regions of documents to identify document types. While such recognition functionality can have a high-level of accuracy with respect to identifying and classifying structured documents they do not work well for semi-structured and unstructured documents, particularly when the boundaries of the semi-structured or unstructured documents are unknown.

System and method for separation and classification of unstructured documents


A method (20) of orthogonal frequency-division multiplex (OFDM) communication via a plurality of subchannels (30) within a noncontiguous wideband channel (24) is provided. The method (20) determines an SNR for each of the subchannels (30). The method (20) then designates a subchannel (30) as clear (93) when its SNR is greater than a least-SNR threshold (70), as impeded (95) when its SNR is less than the least-SNR threshold and greater than an SNR-evaluation threshold, and as obstructed (111) when its SNR is less than both the least-SNR and the SNR-evaluation thresholds. The method (20) then transmits OFDM data (34) so that each of the clear subchannels receives the OFDM data (34) at a maximum subchannel signal level (40), each of the impeded subchannels receives the OFDM data (34) at an intermediate subchannel signal level (42), and each of the obstructed subchannels receives the OFDM data (34) at zero subchannel signal level (44).

In general, communication systems utilizing wideband communication techniques convey large amounts of data via a single communication link over a wideband channel. Single-carrier wideband communication techniques typically exhibit marked signal deterioration proximate the limits of the wideband channel relative to the center (carrier) frequency. This is due in a large part to the difficulty of producing a substantially flat response over the entirety of the wideband channel bandwidth.
Multiple-carrier (multi-carrier) wideband communication techniques divide the wideband channel into multiple subchannels. Each subchannel has a signal (i.e., a modulated carrier) having a relatively narrow bandwidth. This relatively narrow bandwidth allows each subchannel to have a substantially flat frequency response. Through normalization and other techniques, these substantially flat response subchannels are concatenated to produce a substantially flat frequency response over the wideband channel. This technique is also known as multiple-tone (multitone) communication.
Efficient implementations of multi-carrier communication systems (e.g., those sampled at the Nyquist rate) allow the sub-carrier frequency response to overlap. The overlapped sub-carrier frequencies are typically required to be orthogonal. Systems utilizing such orthogonal multi-carrier techniques are often referred to as orthogonal frequency-division multiplexing (OFDM) systems.
OFDM communication techniques provide improved performance over other wideband communication techniques. Utilizing an OFDM communication technique, a wideband communication system utilizes a wideband channel frequency-multiplexed into a plurality of narrowband subchannels. Since each subchannel is not in itself wideband, circuitry may readily be devised that produces a substantially flat response over each subchannel bandwidth.
An OFDM communication technique is a discrete multitone (DMT) modulation technique by which optimized algorithms may be utilized to appropriately allocate energy and bits to each of the plurality of subchannels. This allows reliable data transfers at high rates.
OFDM techniques desirably utilize a contiguous set of subchannels, thereby providing an easily implemented wideband channel. This is typical of wireline (i.e., hard-wired) communications systems. DMT modulation has been successfully implemented for asynchronous digital subscriber line (ADSL) communications providing improved high-speed data transfers over ordinary twisted-pair lines.
Problems arise when there are breaks in the spectrum of the wideband channel, i.e., when all usable subchannels are not contiguous, as is often the case with wireless communication systems. This may occur when some subchannels contain excessive noise or other interference, or are disallowed for any reason. Several techniques have been developed to compensate for such noncontiguous spectra. Conventionally, such techniques tend to involve the use of a static assignment or non-assignment of each subchannel. That is, the OFDM signal simply does not use a contested subchannel. Static subchannels presume a static wideband channel and therefore represents a considerable inefficiency.
In wireless OFDM communication, the RF spectrum of the wideband channel is often dynamic. For example, a dynamic spectrum may be found where an OFDM communication system shares a portion of the spectrum with one or more "foreign" systems (e.g., any RF system other than the OFDM system itself). In this case, subchannels need to be dynamically assigned on a non-interference basis. This may be done in the OFDM system, in the foreign system, or both.
Dynamic spectra are often encountered with mobile communication systems. The very movements of components of the system produce ever-changing transmission paths. Such dynamic transmission paths are therefore subject to variant shadowing, noise, and interference. Even when the communication system is a fixed point-to-point system, atmospheric conditions, external mobile entities (aircraft, motor vehicles, etc.), and local noise sources (construction equipment, factories, other communication systems, etc.) may result in a dynamic spectrum.
In an OFDM communication system utilizing a wideband channel having a dynamic spectrum (i.e., a dynamic wideband channel), all or a portion of the subchannels are dynamic. That is, individual subchannels may be subject to variations in noise, interference, and transmissibility over both time and frequency. Any such dynamic subchannel may be theoretically usable, partially usable, or unusable at any given time.
Several techniques have been developed to compensate for dynamic spectra. One such technique typically incorporates scanning the wideband channel and providing transmission over only those subchannels that are clear, i.e., are fully usable. That is, that technique uses a scheme to provide selective assignment or non-assignment of each subchannel, rejecting any subchannel having more than a minimum threshold of noise, interference, and/or transmissibility. This, too, represents a considerable inefficiency.
Such a selective-assignment technique may itself be dynamic. That is, data may be transmitted in packets, with the selective-assignment scheme scanning the wideband channel and selectively re-assigning subchannels for each packet. Such a dynamic-selective assignment technique provides a marked improvement over a static selective-assignment technique, but still exhibits a pronounced inefficiency.
An OFDM communication technique is therefore needed that provides sufficient quality of service (QoS) with a high data throughput over a dynamic wideband channel. Such a technique should optimize efficiency by utilizing each subchannel within the wideband channel to its fullest.

Method of multiple-carrier communication within a noncontiguous wideband spectrum and apparatus therefor


A DRAM array comprised of plural wordlines and plural bitlines, bit charge storage capacitors associated with the bitlines and wordlines, cell access field effect transistors (FETs) having their gates connected to the wordlines and their source-drain circuits connected between the bitlines and the charge storage cells, for enabling reading or writing data from or to the charge storage capacitors, and programmable addressing apparatus for causing the wordlines, once addressed, to selectively enable either one or more than one cell access FET, whereby data can be selectively read from or written to one or more than one charge storage capacitor.

DRAM arrays are memories comprised of memory cells, wordlines and bitlines, the latter lying orthogonal to the wordlines, the memory cells being located adjacent crossovers of the wordlines and bitlines. Each of the memory cells is typically comprised of an n channel capacitor in series with the source-drain circuit of an n channel access field effect transistor (FET), the gate of which is connected to and is enabled by an associated wordline. This form of cell is referred to as a 2T cell.
A bit of a particular logic level, sensed in a bit line sense amplifier, is stored in each cell. Prior to reading from or writing to a cell, both the bit line and word line are precharged. The bit line is typically precharged to a voltage Vdd/2, and the word line is precharged to Vss, to completely isolate the memory cell capacitor from the bitline.
Because many DRAM production processes are not optimized, cell leakage often occurs, and data retention may not be adequate for some applications. To achieve superior data retention, data can be stored differentially in two individual cells. Each bit is stored as a `0` in one cell and as a `1` in another cell. Leakage will degrade a `1` level in an n-channel cell array, but not a `0`. While common mode disturbances do not affect stored data in this case, thus improving data retention, this reduces the capacity of the DRAM by half.
Some DRAMs also suffer from poor logic "1" voltage levels using the unboosted wordline active voltage Vdd. In this case, a logic "1" voltage level stored would be limited to Vdd-Vtn, where Vtn is the conduction threshold voltage of the cell access FET. In order to achieve better data retention in the DRAM cell the gate of the cell access FET can be driven to Vpp=Vdd+Vtn.
However, there is a significant question of whether a submicron manufacturing process can produce DRAMS which can withstand continuous voltage stress of Vpp, especially under worst case operating conditions.


An EEPROM cell that combines a FET transistor and a capacitor. The transistor has a well that is shared by potentially all of the EEPROM cells in the array thereby reducing size. A gate terminal is formed over the well. Source and drain terminals are formed in the well. The well is isolated from the gate terminal using a dielectric layer. A first terminal of the capacitor is connected to the gate terminal using a dielectric layer. A first terminal of the capacitor is connected to the gate terminal, and may be oppositely doped from the gate terminal to improve retention. The second terminal is formed by a second well that is underneath the first terminal and isolated from the first terminal. The capacitance may be increased without area increase by forming a metal layer over the first terminal and separated from the first terminal by a thick dielectric layer, and connected to the second well via a conductive via.

1. The Field of the Invention
The present invention relates generally to non-volatile semiconductor memory devices and, more particularly, to an Electrically Erasable Programmable Read Only Memory (EEPROM).
2. Background and Relevant Art
Electronic circuitry has contributed enormously to the advancement of civilization. One of the fundamental building blocks of electronic circuitry is memory. Memory is generally characterized as being volatile or non-volatile. Volatile memory does not retain data between power cycles and requires constant power in order to retain data. Non-volatile memory retains data persistently even across numerous power cycles.
Electrically Erasable and Programmable Read-Only-Memory (EEPROM) is one type of non-volatile memory. An EEPROM is an array or a vector of EEPROM cells. The information is stored in the EEPROM cell as an electrical charge. The electrical charge modifies the electrical characteristics of the EEPROM cell so that the information can be later read back using the modified electrical characteristics. The electrical charge is typically blocked in a trapping layer that gives to the EEPROM cell its memory capability. The electrical charge remains blocked in the trapping layer regardless of power fluctuations or cycling thereby giving the EEPROM cell its non-volatile properties.
The trapping layer is often an isolated floating gate. More recent technologies use other trapping layers such as silicon-nitride or nanocrystals. The trapping layer is isolated from the external world by isolating dielectric layers. The dielectric function is primarily to prevent electrical charge loss from the trapping layer, thereby preventing data loss. One dielectric material in common use in EEPROMs is silicon-dioxide (SiO2) of CMOS technologies. Dedicated processes are often used to improve the performance of the SiO2. Others dielectrics, such as the ONO or High-k, have been recently introduced to improve the isolation.
Information storage requires that the electrical charge pass through one or more dielectric layers to or from the trapping layer. There are a number of different mechanisms used to conventionally pass charge through a dielectric layer for this purpose. Fowler-Nordheim Tunneling is one such mechanism that requires almost no power consumption and rather large voltages across the dielectric. Other mechanisms are based on hot-carrier effects and require large power consumptions and medium voltages across the dielectric.
The reliability of any given EEPROM cell is often critical since many applications can tolerate little, if any, data loss. One important reliability topic is the disturb issue. Disturbs are unwanted modifications of the data stored in untargeted EEPROM cells due to wanted actions on targeted EEPROM cells within the same EEPROM array or vector. Another reliability issue is data retention. Trapped charges in the trapping layer tend to leak away even with no action on the EEPROM cell, sometimes resulting in data loss. A low disturb and high retention EEPROM can thus be highly reliable, thereby significantly reducing the development cost, and thereby increasing the number of applications that the EEPROM may support.
EEPROMs generally have complex and expensive technologies and fabrication processes to fulfill the reliability requirements. Some EEPROMs can be processed with reduced complexity if low cost applications are targeted that require small embedded memory capability. One conventional concept for reducing processing complexity is to have the fabrication process as close as possible to the standard Complementary Metal-Oxide-Semiconductor (CMOS) with few or no added custom steps. One drawback of such low cost EEPROMs is that the resulting EEPROM cell may occupy relatively large layout area in the circuit. This is especially true of single-polysilicon EEPROM cells having only a CMOS gate to form the trapping layer.
Accordingly, what would be advantageous is an EEPROM having EEPROM cells that have high reliability, are not expensive to process, that are low power, and that occupy a reduced layout area.

High reliability electrically erasable and programmable read-only memory (EEPROM)


The present invention provides a system for identifying individual crowns of individual fruit trees using aerial images. A crown identification device 40 of the present invention includes an identification criterion determination unit 41 and a crown identification unit 42. The identification criterion determination unit 41 includes a first image acquisition section 411 that acquires a first aerial image including a plurality of individual fruit trees in a deciduous period in a fruit farm field, a skeleton extraction section 412 that processes the first aerial image to extract a whole crown skeleton including the plurality of individual fruit trees, a vertex extraction unit 413 that extracts vertexes of each crown skeleton corresponding to each individual fruit tree, and an identification criterion extraction section 414 that extracts a crown candidate region of a minimum polygonal shape including all the vertexes as an identification criterion for each individual fruit tree and extracts a centroid of the crown candidate region. The crown identification unit 42 includes a second image acquisition section 421 that acquires a second aerial image of the fruit tree farm field at the time of identifying a crown at the same scale as the first aerial image, a whole crown extraction section 422 that processes the second aerial image to extract a whole crown image including the plurality of individual fruit trees, and a crown identification section 423 that collates the crown candidate region and the centroid of the identification criterion with the whole crown image to identify a crown region of each individual fruit tree in the second aerial image.

In the breeding of fruit trees, pruning is very important. By carrying out pruning, space for growth of the branches is secured and workability of bud thinning and fruit thinning is improved. In general, fruit farmers walk in the field to check the state of the crown for each individual fruit tree and carry out pruning and cultivation management as necessary. However, the larger the field, the more labor and cost are required to walk the field and check the crown.
Therefore, in recent years, there has been proposed a method of obtaining an aerial image of the field using drone or the like to check the state of the crown of each fruit tree (Non Patent Literatures 1 to 6). If the state of the individual crowns of individual fruit trees can be analyzed on the basis of the aerial image, it becomes possible to prune and cultivate the fruit trees more easily by referring to the information. However, crowning of fruit trees is complicated to optimize production of unit area, and it is difficult to extract individual crowns by the reported calculation method because the crowns of individual fruit trees are overlapped in the aerial image in a state where leaves grow on fruit trees.

Crown identification device, identification method, program, and recording medium


A method for constructing a concrete building having a plurality of stories in which walls and floors of the concrete building are formed by means of modular form assemblies which can be used repeatedly without disassembling and reassembling includes (a') forming concrete surrounding wall structures of the stories one after the other by elevating a modular inner form assembly to a level of each story from a level of a lower story until the concrete surrounding wall structure of an uppermost story is formed; and (b') forming floors of the stories one after the other by lowering a floor form assembly from the level of the uppermost story.

1. Field of the Invention
This invention relates to a process for constructing a building, more particularly to a process for quickly constructing a concrete building which has a plurality of stories.
2. Description of the Related Art
When using a conventional constructing process to form concrete walls, form assembly is erected for concrete pouring and then is dismantled when the concrete walls have cured. When constructing concrete walls of a building, the form assembly is moved upwards for constructing concrete walls of an upper story after concrete walls of a lower story are constructed. Repeated erecting and dismantling of the form assembly for each story of the building is necessary, which costs much time and is not economical.

Process for constructing a concrete building

7F-3, No. 8, Lane 390, Sec. 1, Chien-Kang Rd.


A method of enhancing hair growth or treating alopecia in a subject uses topically administered estrogen receptor antagonists. Pharmaceutical formulations comprising estrogen receptor antagonists are described.

Alopecia (baldness) is a deficiency of hair, either normal or abnormal, and is primarily a cosmetic problem in humans, although the negative psychological impact of hair loss is well known. See C. H. Mortimer et al., Clin. Exp. Dermatol. 9, 342-350 (1984). Dermatologists recognize many different types of alopecia, with androgenic alopecia being the most common cause of hair loss in both men and women. As this type of hair loss is more common and more severe in males, it is typically referred to as "male pattern baldness." However, it is thought that androgenic alopecia affects more that one third of individuals of either sex who have a strong family history of hair loss. See W. F. Bergfield, Clin. Dermatol. 6, 102-107 (1988).
One traditional treatment for alopecia is the method of hair transplantation. Typically, this method involves transplanting plugs of natural hair from areas of the scalp where hair is growing to bald areas. This procedure is costly, time-consuming, painful, and meets with only limited success.
Another common treatment for hair loss is the application of a chemical or drug for the purpose of stimulating hair growth. For example, U.S. Pat. No. 5,177,061 to Pickart proposes the topical application of glycyl-L-histidyl-L-lycine:copper(II) (GHL-Cu) and its derivatives to promote hair growth in warm-blooded animals (applicant specifically intends the disclosure of this and all other patent references cited herein to be incorporated herein by reference in their entirety). U.S. Pat. No. 4,832,946 to Green proposes a composition for topical application to mammalian hair or skin, comprising an amount of the cell-free supernatant from a culture of dermal papilla fibroblasts, which is said to increase hair growth in the rat. U.S. Pat. No. 5,358,714 to Green proposes the use of diacylglycerol activators of protein kinase C in order to increase or maintain hair growth in mammals, while U.S. Pat. No. 5,068,315 to Buultjens et al. proposes the application of purified hair growth regulating peptides (HGRP) to stimulate hair growth. It has also been suggested that retinoids, substituted pyrimidines, and immunosuppressants be used as possible treatments for hair loss, although methods utilizing these compounds have not been entirely successful in producing a reliable and safe method of inducing hair growth. See G. Bazzano et al., J. Invest. Dermatol. 101 (1 Supplement), 138S-142S (1993); H. Jiang et al., J. Invest. Dermatol. 104(4) , 523-525 (1995).
In recent years, the topical application of minoxidil has been a widely-used method for treating androgenic alopecia. See A. R. Zapacosta, N. Eng. J. Med. 303, 1480-81 (1980). U.S. Pat. No. 4,139,619 to Chidsey, proposes a topical composition of minoxidil and related iminopyrimidines to stimulate the conversion of vellus hair to terminal hair and increase the rate of growth of terminal hair. However, despite its popularity, minoxidil has not performed in a completely satisfactory fashion in promoting hair growth in all target populations.


A method for fabricating a metal interconnection pattern for an integrated circuit module is provided comprising the steps of: aligning only one face of the module, forming a metal layer on at least one other face of the module, applying a coating of photoresist to the metal layer, exposing predetermined portions of the photoresist to reflected radiation, and shaping the metal layer in accordance with the exposed photoresist portions.

Integrated circuit modules of the type mentioned above, such as multichip modules (MCMS), are shown and described in U.S. Pat. No. 4,783,695, "Multichip Integrated Circuit Packaging Configuration and Method," issued Nov. 8, 1988, and in U.S. Pat. No. 4,918,811, "Multichip Integrated Circuit Packaging Method," issued Apr. 24, 1990, both assigned to the assignee of the present invention and herein incorporated by reference. Such so-called high density interconnect (HDI) structures, which may be built up in an integrated circuit module by means of multiple layer sequences stacked over the electrical or electronic circuit component or components and the substrate, provide the capability to interconnect the components, such as VLSI chips, to achieve improved integration. In such a module, each sequence includes at least a dielectric film, such as a polymer, and a metal layer that overlies the film and that makes the desired intrachip and interchip connections. Typically, the top face of the module is aligned with respect to the patterning system during the fabrication of the metallized interconnect, such as by positioning at least two reference points on the face of the module, to permit positioning of the desired interconnection pattern to be fabricated on the top or aligned face and thereby ensure that the desired electrical connections are achieved. One possible alignment technique is described in U.S. Pat. No. 4,835,704, "Adaptive Lithography System to Provide High Density Interconnect," issued May 30, 1989, assigned to the assignee of the present invention and herein incorporated by reference.
Various methods of fabrication have been devised to produce such modules, as disclosed in the aforementioned patents. Likewise, structures for interconnecting modules have been devised to achieve more interconnections and higher integration than previously available, such as disclosed in U.S. Pat. No. 5,019,946, "High Density Interconnect with High Volumetric Efficiency," issued May 28, 1991, assigned to the assignee of the present invention and herein incorporated by reference. As disclosed in the last recited patent, interconnected integrated circuits packaged at a high density are fabricated with a plurality of substrates where each substrate has metal edge contact sites and the substrates are joined together in a stack held together tightly, such as by bolts or by a thermoplastic adhesive. In such a stack, a metal interconnection pattern electrically connects or couples the integrated circuits on different substrates. Thus, in the fabrication of these modules it is desirable to shape a metal interconnection pattern on a face of the module other than the top or aligned face.

Method and apparatus for fabricating a metal interconnection pattern for an integrated circuit module


A method and device for generating address aliases corresponding to memory locations, for avoiding false load/store collisions during memory disambiguation. The alias generator takes advantage of the fact that the entire address range will most likely not be active in the registers at any one time. The subset of the address range that is active can be represented with a smaller number of bits and, hence, the computation of true dependencies is greatly reduced. The address alias generator includes an array for receiving the memory addresses, comparators having inputs connected to each array entry and having outputs connected to an alias encoder, and a control logic unit for writing the given memory address in one of the entries. The output of a given gate is turned on if a memory address is the same as the contents of one of the entry corresponding to that output, and the control means is activated if the output of all of the gates are turned off. In the preferred embodiment, the memory addresses are 32-bit values, the array has 64 entries, and the encoder generates 6-bit values for the address aliases. The processor includes a memory disambiguation buffer for identifying load/store collisions, that uses the 6-bit address aliases.

1. Field
The present disclosure generally relates to computer systems, and more particularly to superscalar computer processors in which "load" and "store" operations may be executed out of order. The present disclosure is directed to a method and device for providing address aliasing of memory locations that simplifies program operation by reducing the complexity of address comparisons that are required to check for load/store collisions.
2. Description of the Prior Art
A conventional computer has several different pieces of interconnected hardware which typically at least include (a) input/output devices such as keyboards and displays that provide a user interface, (b) a permanent memory (storage) device such as a magnetic or optical disk having program and data files, (c) a temporary (volatile) memory device such as random access memory (RAM) for holding portions of the program and data during program execution, and (d) the central processing unit (CPU), or processor, which accesses the storage device and RAM in carrying out the actual program instructions. When a computer program is written, it must be converted from human-readable source code to machine-readable object code that will run in the particular processor being used. When a program is so converted, or compiled, the resulting object code includes a multitude of "addresses" for various program instructions and data embedded in the code. These relative addresses are used by the processor to locate the instructions and data after the program has been loaded into RAM, i.e., to correlate the relative addresses to actual physical addresses in RAM.
Memory addressing can take on many forms. The simplest is absolute addressing (or direct addressing) where the address value corresponds exactly to the physical address. Another common technique is indexed addressing which requires addition of the relative address with an index, or offset, value. This technique allows a large number of program addresses to be mapped to a fixed number of physical memory locations, by dividing up the program into blocks or pages. In some memory addressing schemes, there is only one mapping function from the relative memory to physical memory, while other schemes use multiple address mappings.
Processors use various hardware registers to carry out an instruction set associated with a particular procedure, and to manipulate data. A register is "loaded" with a program instruction or data value by referring to the desired memory address of the instruction or value. Values in the registers can be "stored" at various memory locations either for temporary use during program execution or for ultimate copying to the permanent storage device. An actual memory address is binary, i.e., a series of 1's and 0's (bits). The number of bits in a memory address (its word size) depends upon the number of bits in the processor's registers, typically 8 bits, 16 bits or 32 bits.
The earliest computers allowed only sequential execution of load and store operations. In other words, a particular procedure would be executed one step at a time in accordance with the program flow set forth in the source code. Such processing ensures that there are no problems with memory dependencies. A memory dependency exists if a register is to be loaded from a particular memory location whose value (whether a program instruction or data) was set by a previous store operation.
Later computers (superscalar) were designed to optimize program performance by allowing load operations to occur out of order. Memory dependencies are handled by superscalar machines on the assumption that data be loaded is often independent of store operations. These processors maintain an address comparison buffer to determine if there is any potential memory dependency problem, or "collision." All of the store operation physical addresses are saved in this "store" buffer, and load operations are allowed to occur out of order. At completion time, the address for each load operation is checked against the contents of the store buffer for any older store operations with the same address (collisions). If there are no collisions, the instructions (both loads and stores) are allowed to complete. If there is a collision, the load instructions have received stale data and, hence, have to be redone. Since the corrupted load data may have been used by a dependent instruction, all instructions previous to the load instruction must be restarted, with a resulting degradation in performance.
Memory dependencies can be true or false if the mapping scheme creates ambiguities. A memory dependency is false if evaluation of the memory location for a load operation appears to be the same as that for the memory location of a prior store operation, but in actuality is not the same because the aliases point to different physical memory locations. Many processors, for example, ignore the upper 20 bits in a 32-bit address when checking for collisions, and sometimes further ignore the lowest one or more bits, in order to speed up processing. Since true memory dependencies are less frequent than true register dependencies, superscalar processors generally perform well, but they nevertheless suffer additional deterioration in performance due to false byte collisions. It would, therefore, be desirable to devise a method for simplifying the process of checking for collisions so as to enhance processor performance, and it would be further advantageous if such a method could also completely avoid false collisions.

Generation of unique address alias for memory disambiguation buffer to avoid false collisions

International Business Machines Corporation


The invention provides a piezoelectric oscillator that allows for fine adjustment of the frequency after resin molding, a manufacturing method therefor, and a mobile phone and an electronic apparatus using the piezoelectric oscillator. The piezoelectric oscillator can include a resonator package, in which a piezoelectric resonator element is housed, and a semiconductor device, in which an oscillation circuit that is electrically connected to the resonator package is incorporated. The resonator package and the semiconductor device can be fixed to corresponding different surfaces of an island portion of a lead frame, and resin molding is performed so that a transparent lid of the resonator package is exposed to the outside.

1. Field of Invention
The invention relates to a piezoelectric oscillator having a piezoelectric resonator package housing a piezoelectric resonator element and a semiconductor device including an oscillation circuit for oscillating the piezoelectric resonator element, a manufacturing method for the piezoelectric oscillator, and a mobile phone and an electronic apparatus using the piezoelectric oscillator.
2. Description of Related Art
Piezoelectric oscillators have been widely used in packages for HDDs (hard disk drives); mobile computers; or compact information apparatuses, such as IC cards; and mobile communication apparatuses, such as mobile phones, automobile phones, or paging systems. FIG. 22 shows an exemplary configuration of a conventional piezoelectric oscillator (see, for example, "Micro Film" in Japanese Unexamined Utility Model Registration Application Publication No. 1-82507). In the figure, the piezoelectric oscillator is configured as follows. A semiconductor device 1 is fixed to one surface of a lead frame 5 with an adhesive or the like and a piezoelectric resonator 4 housed in a cylindrical package is fixed to the other surface of the lead frame 5. The semiconductor device 1 and the external terminals of the lead frame 5 are connected via bonding wires 3. The entire structure is molded with a resin 6.
Such a structure can avoid various inconveniences when the piezoelectric resonator element and the oscillation circuit are housed in the same package. In other words, when the piezoelectric resonator element and the oscillation circuit are simultaneously housed in the resin package, a gas generated when the resin is cured may attach to the piezoelectric resonator element, thus leading a decline in performance. Accordingly, as described above, when the piezoelectric resonator element and the oscillation circuit are housed in the separate packages and are fixed to different surfaces of the lead frame, those inconveniences can be avoided and the configuration can be miniaturized.
Such a configuration is also disclosed in another patent document (see, for example, Japanese Unexamined Patent Application Publication No. 7-162236).

Piezoelectric oscillator, manufacturing method therefor, mobile phone apparatus using piezoelectric oscillator, and electronic apparatus using piezoelectric oscillator


An image sensor captures an image of a scene. This captured image has a pincushion distortion relative to an undistorted image of the scene. The distortion is corrected based on an approximation of the distortion D which satisfies the following equation for a given pixel in the captured image: D=(R−R′)/R=Da*(y2−x2+yoffset)+Db*R4, where R is the distance between a pixel, which corresponds in the undistorted image to the given pixel in the captured image, and the center of the undistorted image, R′ is the distance between the given pixel and the center of the captured image, Da and Db are respective distortion parameters of the image sensor, x and y are coordinates of the given pixel in the captured image, R satisfies the following equation: R2=x2+y2 and yoffset corresponds to a constant value.

1. Technical Field
This invention relates to the field of image sensors, more specifically the image sensors which introduce geometric distortions into captured images.
2. Description of the Related Art
Such image sensors have lenses for focusing the captured images of a scene. The presence of these lenses can be a source of distortions in the captured images relative to the scene itself.
Thus a wide-angle lens introduces pincushion distortions as illustrated in FIG. 1, while a lens with a small angle, or zoom lens, introduces barrel distortions as illustrated in FIG. 2.
In FIG. 1, an image 11 corresponds to an image of the scene to be captured and an image 12 corresponds to an image captured from the scene by an image sensor which introduces a pincushion distortion. In an XY image coordinate system, the image 12 has lines which bulge toward the center of the image on the X and Y axes.
No distortion affects the image 11 which corresponds to the image of the original scene, and a distance R separates the optical center 101 or center of the image from a given pixel 102.
However, in the captured image 12 of this scene affected by a distortion, a distance R′, which can vary relative to the distance R as a function of the pixels concerned, separates the center of the image or optical center 103 from a given pixel 104.
Similarly, in FIG. 2, an image 21 corresponds to an image of the scene to be captured and an image 22 corresponds to an image captured from the scene by an image sensor which introduces a barrel distortion. In an XY image coordinate system, the image 22 has lines which bulge toward the outside of the image on the X and Y axes.
No distortion affects the image 21 which corresponds to the image of the original scene. As was described with reference to FIG. 1, a distance R separates the optical center or center of the image from a given pixel in the undistorted image 21.
However, in the captured image 22 of this scene affected by a distortion, a distance R′, which can vary relative to the distance R as a function of the pixels concerned, separates the center of the image or optical center from a given pixel in the captured and therefore distorted image.
In these two types of distortions, note that the distortions introduced into the lines of pixels on the X and Y axes are greater at the edges than at the center of the captured image.
To correct these geometric distortions of the image, a distortion correction algorithm can be implemented in the sensors. Such a correction algorithm is conventionally based on an approximation of the distortion, for a given pixel in the captured image, which can be expressed in the form of the following equation:D=(R−R′)/R=Da*(y2−x2+yoffset)+Db*R4  (1)
where D represents the distortion as a percentage,                R is the distance between the center of the image, or optical center, and the current given pixel in the undistorted image,        R′ is the distance between the center of the image and the current given pixel in the distorted image,        Da and Db are distortion parameters,        x is a coordinate for the horizontal position of the current given pixel and y is a coordinate for the vertical position of the current given pixel, and        R satisfies the following equation:R2=X2+y2
The distortion thus modeled as a parabola equation has no effect on the image when the distortion parameters Da and Db are zero.
However, when these two distortion parameters both have negative values a barrel distortion affects the captured image, and when these two distortion parameters both have positive values the captured image is affected with a pincushion distortion.
When these two distortion parameters have values with different signs, the distortion profile varies between the two types of distortions.
These two distortion parameters are therefore parameters that characterize the lens used in the image sensor in question.
The distortion affecting the captured image is a geometric aberration which is due to the lenses. It is characterized by a curve in a source plane which increases with the distance from the optical center.
In this context, the correction of the distortion affecting the captured image aims to correct the distortions due to the lens by determining the distance between the center of the image and each pixel in the original undistorted image of the scene, in order to apply it to a distorted captured image. Thus one can reestablish distances between the pixels in the captured image which are substantially equal to the distances between these same pixels in the undistorted image of the scene.
During such a correction of barrel-type geometric distortions, the captured and distorted image is enlarged due to this correction. Certain pixels of this corrected image are then ignored in order to end with a corrected image that is the same size as the initial captured image. The captured image processed in this manner does not undergo a specific enlargement step, as it is the correction itself which results in the enlargement of the captured image.
Conversely, during a correction of pincushion-type geometric distortions, the captured image, corrected using a correction of the same type as described above, is reduced in size relative to the size of the initial captured image. As a result, it is necessary to add a step of enlarging the corrected captured image such that the final image is once again the size of the initially captured image.
FIG. 3 illustrates the application of the above steps to correct an image which has a pincushion distortion.
A captured image 31 has pincushion distortions. To correct these distortions, all pixels of the image are used. A corrected image 33 is thus obtained which is smaller in size than the captured image 31. Next this smaller corrected image 33 is enlarged so that it corresponds to the size of the captured image.
In such a correction, the captured image undergoes two processing steps, one the correction of the pincushion distortion which corresponds to obtaining the corrected captured image 33 from the captured image 31, and an enlargement of the image which corresponds to obtaining the final image 34 in which the distortions have been corrected from the captured corrected image 33, where the image 34 is of the same size as the captured image 31.
These two successive processing steps result in a degradation in the quality of the final image 34 obtained, because such an image 34 undergoes a loss of resolution in each of these two processing steps. The second step, the enlargement step, which is a supplemental step in addition to the correction applied to images which have a barrel-type geometric distortion, results in a loss of image resolution.


The present invention provides methods, systems and computer program products for altering video images including superimposing objects onto the images, particularly addressed to identifying fastener insertion locations onto displayed images of a work pieces. The invention is capable of importing an image of a work piece contained in a computer file, displaying the image, and altering the displayed image and/or superimposing objects onto the image to show the location(s), sequence(s) and/or type(s) of fasteners to be inserted onto the displayed work piece according to operator input and instructions. After each insertion is completed, the display is again altered to show the completion. During use, the system is capable of tracking the fastener installations and updating the video display to show the current status of insertions on the work piece.

The present invention relates to methods, systems and computer program products for altering video images including superimposing objects onto video images, and utilizing said objects and images for use in various manufacturing operations with a machine. The invention is particularly directed to methods, systems, and computer program products that are capable of receiving an image (e.g. digital picture file) of a given work piece (such as a metallic automobile door frame), displaying the image on a video screen, establishing object locations on the image of said work piece for different components to be attached, installed, cut, placed or adhered (e.g. manufacturing operations) to the work piece, and use of said objects and images to aid a machine operator in the manufacturing of the work piece. One novel feature of the present invention is that the software is capable of establishing manufacturing operation locations on an inputted image of a work piece, such as a digital photograph and/or computer-rendered representation of the work-piece. Thus, files containing pictures of things taken by ordinary digital cameras or scanners may be used as input, and these images are manipulated by the invention to display critical location information according to user input. The invention does not require a three-dimensional computer model or a computer aided drawing (CAD) as input. Secondly, this invention is novel is because the software alters the image and/or displays the objects over the image(s) in a sequenced order, so as to guide the operator through the manufacturing process at the machine in real-time.
In the field of manufacturing parts for use in industry, it is common to bend, cut and shape sheets made of metal or other rigid materials into particularly shaped parts which are then used in the construction of a final product (such as the panels making up the box of a desktop computer, the parts needed to assemble an automobile door, etc.). Many such parts also require that holes be cut in certain places, that flanges be established at other locations, and that fasteners be attached to the part. Such fasteners include such things as nuts, threaded studs, rivets, standoffs and the like.
Numerous fastener insertion machines are known in the art. These machines generally include presses or rams that are capable of imparting hundreds if not thousands of pounds of pressure. Uniquely designed tooling is provided to support a given fastener in such a machine, a work piece is set into place adjacent to the tooling, and a ram or anvil is used to insert the fastener into the work piece using the requisite amount of pressure. Folds, bends or holes may also be formed in the work piece using similar equipment. In some cases, the design of the work piece requires that these processes be intermixed in a particular sequence. However, in many cases, all of the folds, bends or cuts are made to the work piece before any fasteners are inserted. It is common for such work pieces to be fabricated at one location, and then taken to another location for insertion of fasteners.
In those cases where the work piece is complete except for the insertion of fasteners, it is often desirable to illustrate and display the type, location and sequence of the insertion of the various fasteners onto the work piece prior to performing and during performance of the actual fastener insertion work. Such illustrative work may be part of the design process so that proper machinery may be set up in a particular sequence for efficient and timely fastener insertions. Once the sequence is established, the illustrative work may be provided at the assembly location so that machine operators may learn and/or review the sequence of tasks during the production process. Hand drawn illustrations, paper-copy print-outs of computer-rendered illustrations, and/or exemplary completed parts are all often inadequate to clearly demonstrate where and on the work piece and in what sequence each fastener is to be inserted.
It is desirable to provide methods, computer systems and computer program products that provide video illustrations of the location, sequence and type of fasteners to be inserted onto a given work piece before and during a manufacturing process. In particular, it is desirable for an operator to be able to import an image of a given work piece into a computer system, and to then establish the location(s), sequence(s) and/or type(s) of fasteners to be inserted onto the work piece using the computer system and the imported image. It is also desirable for a user to be able to call up the images of a given work piece for which the location(s), sequence(s) and/or type(s) of fasteners to be inserted have already been established so that the user may use said images to correctly process and manufacture the work piece and learn, review or check to be sure that the fastener insertion machines are properly operated to accomplish the illustrated tasks.

Methods, systems and computer program products for altering video images to aid an operator of a fastener insertion machine


A battery module and an arrangement including a number of battery modules connected in series are disclosed. An energy store has a positive and a negative connection. A boost converter has a first and a second converter output. The energy store is connected at the positive connection of the energy store to a first connection and at the negative connection of the energy store to a second connection. The first converter output is connected to a first compensation connection and the second converter output is connected to a second compensation connection. The converter is designed to draw energy from the energy store and to provide the energy to the converter outputs of the converter in the form of current.

According to prior art there are known arrangements of battery modules wherein the battery modules each comprise an energy store. The battery modules are connected in series, and a predetermined current is applied to them by a charging device. In the course of the charging process the problem exists that the individual energy stores are charged differently due to the different ageing properties, and that an undesirable overcharging of individual energy stores can occur until the required charging voltage of the arrangement as a whole is reached.
To this end, in prior art there is proposed an arrangement with a number of energy stores, wherein the output voltage of each of the energy stores is carried to a control unit for controlling or driving a converter. When a predetermined maximum voltage, maximum charge, or maximum temperature for an energy store is exceeded, the control unit activates a converter the primary side of which is connected in parallel to the energy store. One of the two connections of the secondary side of the converter is connected with the system ground. The respective other connection of the secondary side of the converter is connected via a diode with the respective other connection of the charging device and the other pole of the energy store.
It is disadvantageous in prior art that for the energy discharge from the individual energy stores there are required two lines to a respective one of the two ends of the battery modules connected in series, respectively. There is required a large number of cables or wires as well as a large amount of work for their connection. In particular in the automotive sector, the routing of cable or wire harnesses is labor-intensive and cost-intensive. Moreover, the cables have a high mechanical stability and high-voltage strength. In mass production, the use of a plurality of cables is costly.
Proceeding from prior art, the objective task is to create a battery module which is easy to be cabled or wired and which manages with little external cabling or wiring and enables returning of the excess energy from the already charged battery modules.

Battery module with converter and decoupling switch


An identification badge comprises a base coated with an adhesive protected by release paper. This badge is assembled by removing the release paper, placing an identification card into contact with the adhesive, and then attaching a fastener through a slot in the base of the badge. Various fasteners may be used to attach this badge to wearer's apparel. The badge can be assembled without damaging the identification card or the identification indicia, contained therein. The identification card can also be mounted so that the identification indicia is placed against a transparent, adhesive and viewed through a transparent base. In this embodiment, the information placed on the identification card cannot be altered without damaging the identification card. Also in this embodiment, a timing indicator can be incorporated into the badge so as to show the expiration of the badge after a selected period of time. The identification badge can be easily assembled at the site of use, and it can be cut to fit whatever identification indicia that is to be applied to it, such as business cards, photo-identification cards or the like.

1. Field of the Invention
This invention relates to an identification badge. More particularly, the present invention relates to an identification badge which can be readily assembled and fastened to a user's clothing.
2. Description of the Prior Art
Many organizations have regular gatherings of large numbers of individuals such as at conventions or trade shows where products are sold or exhibited by member companies. Such conventions are important marketing tools for many firms. The attendance at these and other gatherings may total thousands of individuals and the sponsors of the convention as well as the participating firms are desirous of having detailed information regarding the attendees. Thus, identification badges may often be required to include the attendee's name, a company name and address, and other information which can be easily read visually and/or information that may be easily scanned or read by computer operated devices.
Heretofore, forms have been printed with this information and assembled into an identification badge which is worn by attendees. In addition, plastic cards have been produced which bear this information and which may be attached to a fastening means and either worn or carried by the attendee. The information on these identification badges varies with the type of gathering. In all cases, the importance of a visual identification of the attendees by convention officials, by the organizers, or by other attendees can be extremely important.
One of the most common badges used in the past is a card having a name or other identifying insignia placed on it. This card may be pre-printed, may be hand written or typed and is often enclosed in a transparent plastic cover or carried in a transparent holder or a holder with a transparent face. These holders typically have a pin attached or adapted to be attached to the identification holder and then to the clothing of the wearer.
At conventions, hundreds or even thousands of identification cards must be assembled quickly and accurately. The traditional method of preparing a printed card, manually inserting this card into a plastic envelope and then attaching a pin type holder or other type of fastening means is time consuming and costly. The frequent insertion and withdrawal of a pin as a fastening means may detrimentally affect the fabric of the user's clothing and its operation is troublesome and hazardous in terms of pricking of the user's finger each time he or she inserts or removes the identification badge.
Numerous attempts have been made by those skilled in the art to overcome the foregoing limitations. Typical prior art efforts to attain this end are as follows:
U.S. Pat. No. 2,070,002 to Cruver discloses an identification badge comprising a bowed sheet of metal formed with two parallel edges at the top and bottom of the front surface so as to accept a clear plastic layer. An identification card with appropriate information is inserted between this transparent layer and the metal badge holder so that the identification card can be seen through the clear plastic layer. A safety pin type fastener is soldered or attached to the back of this metal identification badge so that the badge can be attached to clothing.
U.S. Pat. No. 2,618,086 to Komorous discloses an identification badge comprising a single sheet of transparent plastic material which is folded so that the back wall faces the front wall and a portion of the front wall at the bottom of the badge is folded up and rearwardly to provide a receiving groove into which the lower edge of the back wall is inserted to form an envelope. Two rectangular slots are punched into the upper center portion of the back wall to receive a U-shaped fastening clip. An appropriately labeled name plate or name tag can be inserted either through the open sides of this assembly or inserted before the back wall is inserted into the bottom groove of the front section. The badge is fastened to an individual's clothing by slipping the U-shaped fastening clip over the free edge of some article of clothing. This badge requires assembly of a U-shaped fastening clip through small plastic slots, the insertion of an identification card and the assembly of the back wall of the badge into the groove of the front section in order to close the badge. This badge is susceptible to the identification card sliding and falling out of the badge holder as the wearer moves around.
U.S. Pat. No. 3,175,317 to Slavsky, discloses an identification badge formed of a single sheet of folded plastic material with a front flap and a rear flap. The rear flap is provided with a number of alternate fastening means for attaching the badge in different ways to a wearer's clothing. The identification badge is formed of a single sheet of flat, smooth stiff, plastic material. This sheet is folded around a horizontal fold line to form a front flap and a rear flap. Indicia, such as the name of the wearer, may be written directly upon the front of the badge using a crayon or ink marking pen. In an alternative embodiment, a channel may be adhesively secured to the front of the badge and a card or strip with printed identification information may be removably inserted into this channel.
U.S. Pat. No. 3,237,326 to Naffin, discloses a badge holder comprising a flat sheet to which identification information is attached and a clip which is pivotally mounted to the back of the badge and is adapted to be detachable attached to an article of clothing. The front of the badge may bear any desired indicia to identify the person or to provide other information regarding the person or the organization. The clip may be permanently attached to the badge or it may be detachable. This disclosure is directed mainly to a clip for attaching a badge holder to an article of clothing, this clip being either permanently or removably attached to the identification portion of the badge.
U.S. Pat. No. 4,097,971 to Morris, discloses a clip-on badge which is formed from a single piece of a light weight material such as aluminum. The display surface can be pre-printed or marked upon using an appropriate crayon or other marking pen. In addition, a retaining lip may be incorporated into this badge so that an identification card can be inserted and held in place by this retaining lip.
U.S. Pat. No. 4,155,183 to Abrahams, discloses a pin and clip fastener used to attach a transparent plastic identification holder to a wearer's clothing. The fastener is attached to the rear of the transparent plastic holder and an identification card is inserted between the front and rear walls so as to be visible through the front wall. The fastener incorporates both a pin and a pin arm. The pin can be pushed through a portion of a garment and then the pin arm engaged to a hook in the manner of a safety pin mechanism. If inserting a pin through an article of clothing is undesirable, then the identification badge can be slipped inwardly over an edge portion of a garment, which may be a pocket or other margin, and held therein by arms extending downward and parallel to the back of the identification badge.
U.S. Pat. No. 4,903,254 to Haas, discloses a timing indicator used as part of a security badge. The badge is made of two parts, a front part being the face of the badge and the back part having stripes printed with a special ink that migrates through to the front portion. When the badge is issued, the self adhesive front portion is placed over the back part and the timing process begins. The ink passes or migrates through the badge to the front portion in a predetermined time period whereupon the printed stripes become visible, so indicating that the badge is no longer valid.
U.S. Pat. No. 4,961,275 to Klein, discloses a hook and loop fabric badge containing identification indicia which can be worn by hospital personnel in a delivery room without posing a danger of scratching infants. The badge is comprised of a rectangular piece of the loop fabric which is attached via a rigid support member positioned over the loop fabric and with posts which extend through the loop fabric layer, through the fabric of the garment to be attached, and which are then terminated with fastening devices so as to hold the loop fabric layer to the garment. A hook fabric layer with identification indicia on the face is then brought into contact with the loop fabric layer so as to form the identification badge. When the surface containing the hooks is placed in face to face contact with the surface containing the loops, the hooks and loops engage and form a connection which is resistant to separation, except by peeling the hook fabric layer off.
U.S. Pat. No. 5,058,088 to Haas, discloses a timing indicator type badge, label or display wherein the relative amount of time that has elapsed from the initial activation of the timing indicator can be easily determined by the progression of a visually perceptible change in color along different areas of the timing indicator. This timing indicator comprises a clear self-adhesive film which is placed over a printed substrate in order to activate the timing indicator. The printed substrate includes a migrating or soluble ink which migrates through the adhesive layer until the indicia is visible at the surface of the clear film. The rate of dissolution of the migrating ink by the adhesive on the cover film determines whether the time interval is a few hours, a day, a week, etc. For each time interval, the relative darkening of indicator bands on the printed face of the badge or label shows the relative lapsed time since the badge was issued or activated.
German Patent No. 26 22 795 to Gunther, discloses a means of fastening an attaching clip to the back of an identification badge or identification card. The clip comprises an attaching means, a support plate, and an adhesive coating on one side of the support plate and the attaching clamp on the other side. A protective foil covers the adhesive layer. To attach the clip to the back of the identification card, this protective foil is removed and the adhesive layer is brought into contact with the back of the card thereby enabling the identification card to be attached to an individual's garment.
The present invention overcomes many of the drawbacks and deficiencies of the convention badges of the prior art and provides a unique, inexpensive, and easy to apply solution to preparing an identification badge.


A data structure stored in memory including: token instances representing stimuli that influence a user's affective state; the token instances are spread over a long period of time that spans different situations, and a plurality of the token instances have overlapping instantiation periods; data representing levels of user attention in some of the token instances used by an application program to improve the accuracy of a machine learning based affective response model for the user; annotations representing emotional states of the user; the annotations are spread over a long period of time that spans different situations; and linkage information between the token instances, the data representing levels of user attention, and the annotations.

The following co-pending US Patent Applications, filed on Jun. 6, 2011, may include related subject matter: Ser. No. 13/168,961, Ser. No. 13/168,964, Ser. No. 13/168,965, Ser. No. 13/168,967, Ser. No. 13/168,968, Ser. No. 13/168,971, Ser. No. 13/168,972, and Ser. No. 13/168,973.
The field of affective computing involves the study and development of systems and devices that can recognize, interpret, process, and even simulate human affects. This field has undergone dramatic developments in recent years. The continuing increase in computing power, coupled with the miniaturization and proliferation of sensors and mobile devices, has made the prospect of widespread adoption of affective computing systems in real world day-to-day scenarios an imminent reality.
Many existing affective computing systems are still only developed for research purposes. As such, the data collected and stored in databases for the systems' development is typically generated in a controlled environment. In these laboratory-like settings, a small number of short experiments (typically less than an hour long), is conducted in which a user's reactions are measured to a set of pre-selected stimuli such as pictures, video scenes, or music. While sufficient for laboratory-based affective computing systems, this data is insufficient for creating the strong and personalized affective computing-based applications that are to come in the next few years. One drawback of using laboratory-collected data is that the data is acquired over a short period of time, while the user is in a specific, controlled situation. In reality, a user's reaction to stimuli can vary dramatically depending on the situation the user is in. For example, a user's affective response while working in the office be quite different from the user's response when relaxing at home, even if exposed to the very similar stimuli in both situations. Furthermore, in short experiments, a user's response can only be measured to a small number of stimuli, which may prove to be inadequate for creating an affective computing system for real world applications that may have to model the effect of a wide range of stimuli from multiple sources (such as images, sounds, words, flavors, scents, and physical sensations).
Analyzing affective response data collected in real world scenarios poses new challenges, which do not arise with data that is collected in controlled laboratory-like situations. For example, in the laboratory the user's response is usually measured for a single stimulus at a time, which is not like the real world, where the user is simultaneously exposed to many stimuli of different natures and possibly originating from various sources. Moreover, in the laboratory the user is not distracted by various real world stimuli, such as other people in the user's vicinity, external noises, or even simply being pre-occupied or daydreaming. Therefore, there is a need for a new data structure that will reflect these real world complications, and enable the affective computing systems using the data to accurately determine the user's affective response to various stimuli.

Database of affective response and attention levels


The present invention is directed to a method for cleaning a section of an optical waveguide removed from its jacket, in which the optical waveguide section is inserted into a treatment cell, sprayed with a cleaning fluid, blasted with compressed air and removed from the treatment cell. The method allows cleaning in precisely defined conditions, which can be carried out in a simple fashion in a corresponding device. The blasting of the optical waveguide section with compressed air preferably first includes the use of heated compressed air and then the use of cold compressed air. The present invention is also directed to a cleaning device with a treatment cell to hold the optical waveguide section, the treatment cell having a first inlet for the supply of compressed air, a second inlet for the supply of cleaning fluid and an outlet for the removal of compressed air and cleaning fluid. The cleaning device is preferably configured as a system that is isolated from the environment, so that the escape of possibly toxic liquid or vaporous cleaning agents and therefore any danger to the health of an operator is reliably excluded.

The invention relates to a method and a device for cleaning a section of an optical waveguide removed from its jacket, in particular in preparation for a splicing procedure, in which two ends of cleaned optical waveguide sections are welded thermally together.
In order to be able to connect together light-directing fibers, frequently also referred to as optical waveguides or optical fibers, the ends of the optical waveguides have to be welded thermally together. This procedure is also referred to as splicing. Splicing generally takes place in special splicing devices, with the two optical waveguides to be connected together being positioned in relation to each other before the actual splicing procedure such that their end surfaces face each other without any lateral displacement. The actual splicing procedure then takes place by drawing an electric arc between two electrodes arranged on opposing sides adjacent to the two end surfaces.
To obtain a good splice connection between two optical waveguides, i.e. a connection with little optical attenuation and a high level of mechanical tensile strength, the end sections of the optical waveguide have to be thoroughly prepared before the actual splicing procedure. This includes both very precise separation, to produce as flat an optical waveguide end surface as possible by means of a perpendicular, sharp-edged cut, and the cleaning of the optical waveguide end section removed from its jacket. Cleaning is necessary, as when removing the jacket, during which process the coating is generally removed from the optical waveguide by means of a suitable tool, residues of the jacket frequently remain on the removed optical fibers. These residues can impede subsequent welding of the optical waveguides. Therefore a high quality spliced connection requires a cleaning procedure during which all the coating residues are removed.
For optimum preparation for splicing, in addition to the above-mentioned precise separation and complete cleaning, it is also necessary to straighten the optical waveguide end sections. Straightening is necessary for precise positioning of the optical waveguide end sections during the splicing procedure. As the optical waveguide jacket is generally made of plastic and therefore frequently produces internal stresses, which result in distortion of the optical waveguide, it is necessary to reduce these internal stresses by heating the optical waveguide. The section of an optical waveguide, which is not removed from its jacket, can then be straightened. Such alignment for example is achieved by heating the optical waveguide sections still with their jacket in a furnace, which for example has two heated plates at a distance from each other.
According to the prior art the optical waveguide end sections are generally cleaned manually by wiping the optical waveguide end section with the least fluffy cloth possible. The cloth is soaked with a cleaning agent, preferably alcohol. Alcohol has the advantage that it has a very good cleaning action and on evaporation leaves no residues on the cleaned optical waveguide. Manual cleaning with a cloth however has the disadvantage that the cleaning action depends on the skill of the person doing the cleaning. A further disadvantage is that the person doing the cleaning is exposed to toxic vapors when using many cleaning agents.
Another known method for cleaning optical waveguide end sections is cleaning in an ultrasound bath. However this has the disadvantage that alcohol cannot be used because of its combustibility and volatility and it therefore has to be replaced with another less suitable and more expensive cleaning agent.
A device is known from WO 02/44778 A1 for the automatic preparation of optical waveguides for a subsequent splicing procedure. The device has a unit for stripping an optical waveguide, a unit for cleaning the optical waveguide and a separating unit for breaking the optical waveguide, in order to produce an optical waveguide end that is removed from its jacket, cleaned and provided with a flat end surface in a simple fashion.

Method and device for cleaning an optical waveguide removed from its jacket


Provided is technique of object recognition that can accurately recognize an object. An object recognition apparatus (i) generates property data that highlights a specific property based on target data, (ii) extracts a discrimination-use feature amount used for discrimination of each piece of the property data, (iii) calculates discrimination information used for discrimination of the property data, (iv) extracts a reliability feature amount used for estimation of reliability of the discrimination information calculated for each piece of the property data, (v) estimates the reliability of the discrimination information, (vi) generates synthesized information acquired by synthesizing the discrimination information calculated for each piece of the property data and the reliability calculated for each piece of the property data, and (vii) performs processing related to the object recognition.

PTL 1 discloses that "one or more pieces of information having different properties are input in advance from the entire or one or more parts of many objects, integrated information acquired by integration of the one or more pieces of information is classified on a class basis, and a feature extraction matrix calculated from the integrated information classified on a class basis and a representative feature amount from the feature extraction matrix are calculated; information having different properties is input from the entire or one or more parts of an input object, the information having different properties is integrated, a feature amount is calculated using the integrated information and the feature extraction matrix, and one or more recognition results having a highest similarity between the representative feature amount and the feature amount of the input object are output."

Object recognition apparatus, object recognition system, and object recognition method


A hydraulic unit for a vehicle brake apparatus having a master cylinder and a wheel cylinder includes a housing formed with a pipe line connecting between the master cylinder and the wheel cylinder, a pump disposed in the housing for sucking and discharging a brake fluid to boost pressure of the brake fluid, and a reservoir piston disposed in a hole formed in the housing so as to be movable slidably back and forth, the reservoir piston partitioning a reservoir chamber within the hole for temporarily storing the brake fluid discharged from the wheel cylinder. The hydraulic unit further includes a cover disposed in the hole to close one end on an atmospheric side of the hole, the cover being formed with a fluid reservoir chamber for storing the brake fluid leaking from the pump.

1. Field of the Invention
The present invention relates to a hydraulic unit for a vehicle brake apparatus.
2. Description of Related Art
Japanese Patent Application Laid-open No. 2009-262924 describes a hydraulic unit for a vehicle brake apparatus. This hydraulic unit has a structure in which an ECU case formed with a recess portion is assembled to a housing such that the recess portion is in communication with a housing chamber which houses a pump so that the recess portion serves as a fluid reservoir for storing brake fluid leaking from the pump. Further, to prevent the brake fluid from leaking to the outside from the fluid reservoir, a seal member is disposed at the matching surface between the ECU case and the housing.
However, the above conventional hydraulic unit for a vehicle brake apparatus has a problem in that since the ECU case is formed with the recess portion as a fluid reservoir, there is a concern that, if the brake fluid leaks from the fluid reservoir due to degradation of the seal member, the brake fluid may adhere to an ECU housed in the ECU case causing an electrical defect.

Hydraulic unit for vehicle brake apparatus


This disclosure concerns cathode assemblies. In one example, a shielded cathode assembly for use in an x-ray tube includes an electron source and a cathode head within which the electron source is at least partially disposed. The cathode head is made from an x-ray shielding material.

1. The Field of the Invention
The present invention relates generally to x-ray tubes. More particularly, exemplary embodiments of the invention concern a shielded cathode assembly configured and arranged to control the unintended emission of x-rays from certain regions of an x-ray tube.
2. Related Technology
X-ray tubes are extremely valuable tools that are used in a wide variety of applications, both industrial and medical. An x-ray tube typically includes a cathode assembly and an anode assembly disposed within an evacuated enclosure. The cathode assembly includes an electron source and the anode assembly includes a target surface that is oriented to receive electrons emitted by the electron source. During operation of the x-ray tube, an electric current is applied to the electron source, which causes electrons to be produced by thermionic emission. The electrons are then accelerated toward the target surface of the anode assembly by applying a high voltage potential between the cathode assembly and the anode assembly. When the electrons strike the anode assembly target surface, the kinetic energy of the electrons causes the production of x-rays. The x-rays ultimately exit the x-ray tube through a window in the x-ray tube, and interact with a material sample, patient, or other object.
Stationary anode x-ray tubes employ a stationary anode assembly that maintains the anode target surface stationary with respect to the stream of electrons produced by the cathode assembly electron source. In contrast, rotary anode x-ray tubes employ a rotary anode assembly that rotates portions of the anode's target surface into and out of the stream of electrons produced by the cathode assembly electron source. The target surfaces of both stationary and rotary anode x-ray tubes are generally angled, or otherwise oriented, so as to maximize the amount of x-rays produced at the target surface that can exit the x-ray tube via a window assembly.
Notwithstanding the orientation of both stationary and rotary anode target surfaces, x-rays nonetheless emanate in various directions from the target surface. Thus, while some x-rays do exit through the x-ray tube windows and are utilized as intended, some x-rays do not exit through the x-ray tube windows. X-rays that do not pass through the x-ray tube windows often penetrate instead into other areas of the x-ray tube, where the x-rays may, undesirably, be transmitted through other x-ray tube surfaces if sufficient measures to prevent the escape of those x-rays are not taken.
The escape of unusable x-rays from an x-ray tube is undesired as such x-rays can represent a significant source of x-ray contamination to x-ray tube surroundings. For instance, such unused x-rays can result in transmission of a relatively high level of radiation to x-ray tube operators.
In addition, unused x-rays can interfere with the imaging x-ray stream that is transmitted through the window. Such interference may compromise the quality of the images obtained with the x-ray device. For example, unused x-rays can impinge upon areas of the x-ray subject and interfere with the image being sought. The resulting interference may be manifested as clouding in the image.
While the problem can be realized throughout the tube environment, certain areas of the x-ray tube are especially susceptible to the impingement of non-window transmitted x-rays. For example, the area of the x-ray tube immediately behind the cathode assembly can be especially problematic. Since the electron source of the cathode assembly faces the target surface of the anode assembly, errant x-rays can emanate from the target surface toward the cathode assembly. Cathode assembly components are typically made of metals that are not effective at shielding x-rays, such as nickel or copper. X-rays typically pass through the cathode assembly without being absorbed, thus necessitating shielding materials behind the cathode assembly, either inside the x-ray tube or external to the x-ray tube.
Efforts to reduce the effects of unused x-rays have centered around the use of external shielding on x-ray tube structures. For instance, in many stationary anode x-ray tubes, a lining of lead shielding is placed about the inner surface of an outer housing, containing the x-ray tube, in order to absorb unused x-rays that are produced at the target surface and penetrate the evacuated enclosure of the x-ray tube.
The use of this type of shielding can be problematic however. For example, while such shielding can be effective at absorbing x-rays, lead is relatively heavy and substantially adds to the weight of the x-ray tube. This factor becomes important in applications where a relatively low x-ray tube weight is desired or even required.
Another problem relates to the tendency of x-rays to spread out somewhat as the x-rays travel further away from the target surface. In particular, because the lead lining is often placed relatively far away from the target surface of the anode, such as when the lining is attached to the outer housing located beyond the outer surface of the evacuated enclosure, relatively large amounts of lead must be used to cover significant portions of the enclosure surface in order to account for the spreading of the x-rays. In some cases, nearly the entire surface area of the evacuated enclosure must be covered by a lead lining to prevent x-ray emission from the x-ray tube. The addition of lead linings represents a significant cost in time and labor during x-ray tube manufacture.
In sum, there is an unmet need in the field of x-ray tubes to provide an x-ray tube structure that reduces the emission of errant x-rays, and that does so in a manner that minimizes the use of excessive, heavy internal or external shielding that significantly adds to the weight of the x-ray tube. Moreover, techniques for minimizing x-ray emissions in the region of the cathode assembly would be especially attractive.