Transgenic animals containing a nucleic acid sequence encoding TCL1 operably linked to transcriptional control sequences directing expression to B cells are described. Such transgenic animals provide a useful animal model system for human B cell chronic lymphocytic leukemia.

B-cell chronic lymphocytic leukemia (B-CLL) is the most common leukemia in the Western world with as many as 10,000 new cases reported each year in the United States (Rai, K. & Patel, D. C. (1995) in Hematology: Basic Principles and Practice, eds. Hoffman et al. (Churchill Livingstone, New York), pp. 1308-1321; Landis, S. H., Murray, T., Bolden, S. & Wingo, P. A. (1998) CA cancer J. Clin. 48, 6-29). Characteristically B-CLL is a disease of elderly people resulting from the progressive accumulation of a leukemic clone that may be derived from a normal CD5+ B lymphocyte (Caligaris-Cappio, F., Gobbi, M., Bofill, M. & Janossy, G. (1982) J. Exp. Med. 155, 623-628). B-CLL has a consistent association with CD5 expression (Caligaris-Cappio, F., Gobbi, M., Bofill, M. & Janossy, G. (1982) J. Exp. Med. 155, 623-628) and while there is still a debate on the role and significance of CD5 expression on B cells, it remains reasonable to consider CD5+ B cells as the normal counterpart of B-CLL (Boumsell, L., Bernard, A.; Lepage, V., Degos, L., Lemerle, J. & Dausset, J., L. (1978) Eur. J. Immunol. 8, 900-904; Kantor, A. B. (1991) Immunol. Today 12, 389-391).
Human hematopoietic malignancies are often caused by chromosome translocations involving either T-cell receptor (TCR) or Immunoglobulin (Ig) loci (Croce, C. M. (1987) Cell 49, 155-156). These chromosome breakpoints juxtapose enhancer elements of TCR and Ig loci to proto-oncogenes, leading to tumor initiation through oncogene deregulation (Dalla-Favera, R., Bregni, M., Erikson, J., Patterson, D., Gallo, R. C. & Croce, C. M. (1982) Proc. Natl. Acad. Sci. USA 79, 7824-7827; ar-Rushdi, A., Nishikura, K., Erikson, R. W., Rovera, G. & Croce C. M. (1983) Science 222, 390-393).
The TCL1 gene, which has been identified at chromosome 14q32.1 (Virgilio, L., Narducci, M. G., Isobe, M., Billips, L. G., Cooper, M. D., Croce, C. M. & Russo, G. (1994) Proc. Natl. Acad. Sci. USA 91, 12530-12534), is commonly activated by inversions or translocations that juxtapose it to a T cell receptor locus at 14q11 or 7q35. The TCL1 gene is involved in chromosomal translocations and inversions in mature T-cell leukemias. These leukemias are classified either as T prolymphocytic leukemias, which occur very late in life, or as T chronic lymphocytic leukemias, which often arise in patients with ataxia telengiectasia (AT) at a young age. TCL1 has been found to be over expressed in sporadic and ataxia telangiectasia associated T-PLL (Narducci, M. G., Stoppacciaro A., Imada, K., Uchiyama, T., Virgilio, L., Lazzeri, C., Croce, C. M. & Russo G. (1997) Cancer Res. 57, 5452-5456; Thick, J., Metacalfe, J. A., Mak, Y-F., Beatty, D., Minegishi, Dyer, M. J. S., Lucas, G. & Taylor, A. M. R. (1996) Oncogene 12, 379-386). In transgenic animals the deregulated expression of TCL1 leads to mature T-cell leukemia, demonstrating the role of TCL1 in the initiation of malignant transformation in T-cell neoplasia. Evidence has been provided that TCL1 is a bona fide oncogene; a transgenic mouse model has been developed in which ectopic expression driven by the lck promoter in the T-cell compartment results in the development of mature T-cell leukemias after a long latency period, in a pattern closely resembling human mature T-cell leukemia (Virgilio, L., Lazzeri, C., Bichi, R., Nibu, K., Narducci, M. G., Russo G., Rothstein, J. L. & Croce C. M. (1998) Proc. Natl. Acad. Sci. USA 95, 3885-3889). In normal T-cells, TCL1 is only expressed at the very early CD4−/CD8− double negative stage, whereas more mature T-cells lack TCL1 expression (Virgilio, L., Narducci, M. G., Isobe, M., Billips, L. G., Cooper, M. D., Croce, C. M. & Russo, G. (1994) Proc. Natl. Acad. Sci. USA 91, 12530-12534). In the B-cell lineage, the product of the TCL1 gene, Tcl1, has been found in pre-B-cells, surface IgM expressing virgin B-cells, mantle cells and germinal center B-cells, whereas it is down-regulated at later stages of B-cell differentiation, i.e. plasma cells (Virgilio, L., Narducci, M. G., Isobe, M., Billips, L. G., Cooper, M. D., Croce, C. M. & Russo, G. (1994) Proc. Natl. Acad. Sci. USA 91, 12530-12534). Interestingly, high levels of Tcl1 have been found in a broad variety of human tumor-derived B-cell lines ranging from pre-B cell to mature B cell and in many cases of B-cell neoplasias (Takizawa, J., Suzuki, R., Kuroda, H., Utsunomiya, A., Kagami, Y., Joh, T., Aizawa, Y., Ueda, R. & Seto, M. (1998) Jpn. J. Cancer Res. 89, 712-718; Narducci, M. G., Pescarmona, E., Lazzeri, C., Signoretti, S., Lavinia, A. M., Remotti, D., Scala, E., Baroni, C. D., Stoppacciaro, A., Croce, C. M., et al. (2000) Cancer Res. 60, 2095-2100). To further elucidate the role of TCL1 in B cell development and in B cell neoplasia, the present inventor generated transgenic mice under the control of a promoter and enhancer whose activity specifically targets expression of the transgene to the B-cell compartment (Shaw, A. C., Swat, W., Ferrini, R., Davidson, L. & Alt, F. W. (1999) J. Exp. Med. 189, 123-129). It is demonstrated herein that Eμ-TCL1 transgenic mice develop a disease resembling human CLL. The mice develop at first a preleukemic state evident in blood, spleen, bone marrow, peritoneal cavity and peripheral lymphoid tissue, developing later a frank leukemia with all the characteristics of CLL. These findings strongly indicate that TCL1 and/or other gene(s) in the TCL1 pathway are responsible for the initiation of human CLL. The animal model described herein thus provides an in vivo model for human B-CLL.

Human chronic lymphocytic leukemia modeled in mouse by targeted TCL1 expression


A speaker of encoded speech data recorded in a semiconductor storage device in an IC recorder is to be retrieved easily. An information receiving unit 10 in a speaker retrieval apparatus 1 reads out the encoded speech data recorded in a semiconductor storage device 107 in an IC recorder 100. A speech decoding unit 12 decodes the encoded speech data. A speaker frequency detection unit 13 discriminates the speaker based on a feature of the speech waveform decoded to find the frequency of conversation (frequency of occurrence) of the speaker in a preset time interval. A speaker frequency graph displaying unit 14 displays the speaker frequency on a picture as a two-dimensional graph having time and the frequency as two axes. A speech reproducing unit 16 reads out the portion of the encoded speech data corresponding to a time position or a time range specified by a reproducing position input unit 15 based on this two-dimensional graph from the storage device 11 and decodes the read-out data to output the decoded data to a speech outputting unit 17.

1. Field of the Invention
The present invention relates to an information retrieving method and an information retrieving apparatus. More particularly, it relates to an information retrieving method and an information retrieving apparatus in which a speaker of the speech information is recognized and discriminated to detect and retrieve the speaking position of a desired speaker.
2. Description of Related Art
Recently, it is frequently practiced to digitize speech signals, compress and encode the information of the digital speech signals for reducing the information volume of the digital speech signals and to store the so encoded information in a storage device or a recording medium for use later on. In particular, there has been developed a digital speech recorder, or a so-called IC recorder, in which the speech, such as conversation in a conference or an interview, is encoded by a speech encoding technique for recording on a semiconductor storage device (memory) or a storage medium exploiting a semiconductor memory (memory card).
The configuration of a routine IC recorder is shown in FIG. 6, in which an IC recorder 100 is made up by a microphone 101, an A/D(analog to digital) converter 102, a speech encoder 103, a speech decoder 104, a D/A (digital to analog) converter 105, a loudspeaker 106, a semiconductor storage device (memory) 107, an information transmission unit 108, and an output terminal 109. A semiconductor storage medium (memory card) may also be used in place of the semiconductor storage device 107.
The speech signals, input via microphone 101, are converted in the A/D converter 102 and compression-coded by the speech encoder 103 so as to be then stored in the semiconductor storage device 107. The compression-coded speech data, thus stored in the semiconductor storage device 107, are read out and reproduced by the speech decoder 104 and converted by the D/A converter 105 into analog signals so as to be output at the loudspeaker 106, or are read out by the information transmission unit 108 so as to be transmitted to outside equipment via output terminal 109.
Meanwhile, there has also been developed a system in which, in recording speech data in the IC recorder, simple additional information or attribute information of speech data, such as data name, date or simple comments, can be recorded along with the speech data.
In many cases, the IC recorder has a random access function of pre-registering a position in the speech data as the index information for reproduction promptly from the registered position at the time of reproduction. In the IC recorder, simple comments pertinent to the registered position can be appended as the tag information.
The speech encoding system used in the IC recorder is hereinafter explained. The speech encoding system may roughly be classified into a waveform encoding, an analysis-by-synthesis encoding and a hybrid encoding which is a combination of the waveform encoding and the analysis-by-synthesis encoding.
The waveform encoding encodes the speech waveform so that the waveform may be reproduced as faithfully as possible. The analysis-by-synthesis encoding expresses the signals by parameters, based on the speech generating model, for encoding.
There exist a variety of techniques and apparatus for waveform encoding. Examples of the techniques and apparatus include sub-band coding in which audio signals on the time axis are split into plural frequency bands and encoded without blocking, and transform encoding in which the signals on the time axis are blocked every unit time and transformed into spectral components which are encoded. There is also proposed a technique of high efficiency encoding consisting in the combination of the aforementioned sub-band encoding system and the transform encoding system. With this technique, the time domain signals are split into plural frequency bands by means of the sub-band coding, and the signals of the respective bands are orthogonal-transformed into signals on the frequency axis, and the frequency domain signals, resulting from the orthogonal transform, are encoded from one frequency band to another.
As analysis-by-synthesis encoding, researches in the analysis-by-synthesis system, employing linear predictive coding (LPC) are now proceeding. This encoding may be exemplified by harmonic encoding, a multi-pass drive linear predictive coding (MPC) employing the analysis-by-synthesis method (A-b-S), and code excited linear prediction (CELP) coding.
In general, in the encoding system, employing the LPC analysis, the spectral envelope information is extracted by linear prediction coding (LPC) analysis, and the LPC information is transformed into PARCOR coefficients (PARtial auto-CORrelation coefficient) or LSP (linear spectrum pair) coefficients for quantization and encoding. There is also researched a hybrid system consisting in the combination of the analysis-by-synthesis encoding by LPC analysis and the waveform encoding of the LPC residual signals. This system is routinely used for an IC recorder for recording the conferencing.
FIG. 7 shows a schematic structure of a routine speech encoding system employing the LPC analysis. In FIG. 7, an LPC analysis unit 201 performs LPC analysis on speech signals D200 input via an input device 200 to find LPC coefficients D201. The LPC analysis unit 201 sends the LPC coefficients D201 to an LSP conversion unit 202.
The LSP conversion unit 202 converts the LPC coefficients D201 into LSP parameters D202 to route the LSP parameters D202 to an LSP quantizer 203, which LSP quantizer 203 quantizes the LSP parameters D202. Since the LSP parameters undergo deterioration on quantization to a lesser extent than the LPC coefficients, the routine practice is to perform conversion to the LSP parameters followed by quantization. Meanwhile, the technique for quantizing the LSP parameters is usually vector quantization.
An LPC inverse filtering unit 204 inverse quantizes the quantized LPC parameters 203 and further inverse transforms the parameters into LPC coefficients D204 which are then used for filtering the input signal D200 to extract LPC residual signals D205 from the input signals D200. The LPC inverse filtering unit 204 routes the extracted LPC residual signals D205 to a pitch analysis unit 205 and a pitch inverse filtering unit 207.
The pitch analysis unit 205 applies pitch analysis to the so found LPC residual signals D205 and sends the pitch information D206, such as pitch lag or pitch gain, resulting from the analysis, to a pitch quantizer 206, which then quantizes the pitch information D206.
The pitch inverse filtering unit 207 filters LPC residual signals D205, using the pitch information D208, obtained on inverse quantizing the quantized pitch information D207, to extract pitch components from the LPC residual signals D205. The pitch inverse filtering unit 207 sends flattened residual signals D209 to an orthogonal transform unit 208.
The orthogonal transform unit 208 transforms the residual signals D209 int spectral coefficients D210. A spectral quantizing unit 209 quantizes the spectral coefficients D210. In quantizing the spectral coefficients D210, a technique by vector quantization or a technique which is the combination of the quantization based on psychoacoustic model and the Huffman coding is used.
The quantized LPC parameters D203, quantized pitch information D207, quantized spectral data D211 and other subsidiary information are sent to a bit synthesis unit 210 where an encoded bitstream D212 is generated in accordance with a prescribed data format and supplied and output at an output unit 211.
FIG. 8 shows an illustrative recording format for encoded speech data generated by a speech encoding device employing the LPC analysis such as is shown in FIG. 7. Referring to FIG. 8, the encoded speech data is made up by the subsidiary data, such as data identification numbers, data names or data attributes, and block data of the speech information. On the other hand, the block data is made up by for example, the header, block-based subsidiary information, pitch information, LSP information and the spectral information.
FIG. 9 shows the schematic structure of a speech decoding device which is a counterpart device of the speech encoding device shown in FIG. 7. In FIG. 9, a bit decomposing unit 221 decomposes encoded data D220, input from an input unit 220 every predetermined block, into several partial elements. For example, the bit decomposing unit 221 decomposes the encoded data D220 into the quantized LSP information D221, quantized pitch information D222 and the quantized residual spectral information D223, on the block basis. The bit decomposing unit 221 sends the quantized LSP information D221, quantized pitch information D222 and the quantized residual spectral information D223 to an LSP inverse quantizing unit 222, a pitch inverse quantizing unit 223 and a spectral inverse quantizing unit 224, respectively.
The LSP inverse quantizing unit 222 inverse quantizes the quantized LSP information D221 to generate LSP parameters, which LSP parameters are then transformed into LPC coefficients D224. The LSP inverse quantizing unit 222 sends the LPC coefficients D224 to an LPC synthesis unit 227.
The pitch inverse quantizing unit 223 inverse quantizes the quantized pitch information D222 to generate the pitch information D225, such as pitch period or pitch gain. The pitch inverse quantizing unit 223 sends the pitch information D225 to a pitch synthesis unit 226.
The spectral inverse quantizing unit 224 inverse quantizes the quantized residual spectral information D223 to generate a residual spectral data D226 which is supplied to an inverse orthogonal transform unit 225.
The inverse orthogonal transform unit 225 applies inverse orthogonal transform to the residual spectral data D226 for conversion to a residual waveform D227. The inverse orthogonal transform unit 225 sends the residual waveform D227 to the pitch synthesis unit 226.
The pitch synthesis unit 226 filters the residual waveform D227, using the pitch information D225, supplied from the pitch inverse quantizing unit 223, to synthesize an LPC residual waveform D228. The pitch synthesis unit 226 sends this LPC residual waveform D228 to the LPC synthesis unit 227.
The LPC synthesis unit 227 filters the LPC residual waveform D228, using the LPC coefficients D224 supplied from the LSP inverse quantizing unit 222, to synthesize a speech waveform D229. The LPC synthesis unit 227 sends this speech waveform D229 to an output unit 228.
The technique for discriminating a speaker of a speech waveform, which is explained hereinafter, now is also researched briskly.
As a routine speech recognition technique, the following technique, for example, is used. First, characteristic values representative of a personality of speech signals by a speaker are extracted and pre-recorded as learning data. An input speech of a speaker is analyzed and characteristic values indicative of his or her personality are extracted and evaluated as to similarity with the learning data to discriminate and collate the speaker. As the characteristic values representative of a personality of speech, the cepstrum, for example, is used. Alternatively, LPC analysis is applied to speech signals to find LPC coefficients which are then transformed to produce LPC cepstrum coefficients usable as the characteristic values. The coefficients obtained on expansion to a time-domain polynominal of the cepstrum or LPC cepstrum coefficients, termed delta cepstrum, are used preferentially as characteristic values indicative of temporal changes of the speech spectrum. Additionally, the pitch or the delta pitch (coefficients obtained on expansion of a pitch polynominal) may also be used.
The learning data is prepared using the characteristic values, such as LPC (linear predictive coding) cepstrum, thus extracted, as standard patterns. As a method therefor, a method by vector quantization distortion or a method by HMM (Hidden Markov model) is preferentially used.
In the method by vector quantization distortion, the speaker-based characteristic values are grouped and the center of gravity values are stored as elements (code vectors) of a codebook. The characteristic values of the input speech are vector-quantized with the codebook of each speaker to find the average quantization distortion of each codebook with respect to the entire input speech. The speaker of the codebook with the smallest average quantization distortion is selected.
With the method by HMM, the speaker-based characteristic values, found as described above, are represented by the transition probability among the HMM states, and the probability of occurrence of the characteristic values in each state, and are determined for the entire input speech domain based on the average likelihood with a model.
Meanwhile, if, in the conventional IC recorder, employing the semiconductor storage device, the speaker's conversation in the recorded speech data is to be accessed and reproduced, the IC recorder has to own the function of registering the index information, while the index information has to be registered in advance in the IC recorder. For registering the index information, it is required for the human being to make audio-visual check of the entire domain of the speech data to search into the data portion of the speaker's conversation, by an extremely labor-consuming operation.
Moreover, even if the index information is registered, it is not that easy to comprehend in which data portion and with which frequency the desired speaker is speaking.
With an IC recorder not having the function of registering the index information or the tag information, the data portion including the speaker's conversation cannot be detected or retrieved, while it is not possible to reproduce the data from the conversation of the desired speaker or to partially reproduce only the conversation domain of the desired speaker.

This patent is subject to a terminal disclaimer.

Information retrieving method and apparatus


A locking device includes a shackle member that includes an elongated shank portion, a stop portion on a first end and a latch portion on a second end. A locking head includes a locking mechanism that has an entryway to receive the latch portion and is movable between a locked state to retain the latch portion and a unlock state to release the latch portion. A head cover includes a cover portion that engages the locking head and a flange portion that extends inwardly to define an opening to receive the latch portion therethrough. A seal structure is associated with the inner edge of the flange and sealably engages the outer surface margin of the latch portion. The seal structure may be a margin of the flange portion or a separate O-ring. The lock may be constructed as a lockable hitch pin.

Over the years, there have been numerous variations of locking devices from a multiple of applications. Typically, a locking device is used to secure two or more objects or members together, whether those items be independent items, a door for an enclosure, or otherwise. Moreover, a wide variety of locking mechanisms have been employed, including key actuated locks and combination locks, all of various constructions.
A widely used locking device is known as a padlock. The prior art padlock works adequately for a number of conventional applications wherein the span of objects to be secured is relatively short or where the span can be fitted with a hasp. However, numerous shortcomings of padlocks become apparent when a padlock is sought to be used in applications wherein two objects of thick cross-sections are to be secured. Examples of such conventional applications include those where telescopically joined round or square tubing members need to be secured together. Another example is where perpendicular or axially cross bolting of gates and doors require a substantially rod-like locking device.
As a result of the need for rod or elongated shackle locking devices, various devices have been developed to penetrate multiple surfaces having aligned through bores for the purpose of securing those objects together. Once such example is found in U.S. Pat. No. 2,677,261 issued May 1954 to Jacobi. The Jacobi patent, a complex locking device is taught in order to prevent actuation of a refrigerator door handle. Another example of a rod-locking device is found in U.S. Pat. No. 4,576,021 issued Mar. 18, 1986 to Holden. Holden discloses a locking rod device having a rectangular locking head that is somewhat bulky and non-symmetrical. In the Holden locking device, a radially extendable locking pin engages a circumferential opening in the latch portion of the shackle in order to retain the shackle and locking head together. The bulky nature of this lock head design, however, makes it disadvantageous in use where only limited space is available. In addition, where the locking pin is spring loaded, the locking structure of Holden is prone to false locking, that is, the engagement of the locking head and shackle without an actual locked state occurring. Thus, the locking head may fall off during use.
Several additional types of straight shackle locks have been developed wherein the latched portion of the shackle is threadably received in a screw-type lock. Examples of these locks are described in U.S. Pat. No. 4,619,122 issued Oct. 28, 1986 to Simpson as well as in U.S. Pat. No. 4,711,106 issued Dec. 8, 1987 to Johnson. These types of locks, however, tend to be inconvenient and cumbersome to use due to the threaded nature of their locked mechanisms. Specifically, the key actuable locking head described in these two patents require a large number of key rotations in order to thread and fully secure the locking head portion onto the straight shackle. The inconvenience and difficulty of threaded lock systems is compounded when the lock is located in tight or difficult to access areas. Further, the threaded screw locks are especially prone to corrosion and seizure due to the small dimensioning of the threads.
The majority of the locking structures described in the prior art fail to employ suitable seals or other structures, such as caps or protective devices to limit access of unwanted substances such as dirt and moisture into the keyway or into the locking region. In U.S. Pat. No. 5,664,445 issued Sep. 9, 1997 to Chang, a sealing ring is provided on the shackle latch portion. While the Chang patent does address the importance of limiting the access of dirt and moisture into the locked mechanism, the solution offered in the Chang patent has some drawbacks. Due to the location of the seal on the end portion of the shackle, the seal is completely exposed. Since it is of larger diameter than the shank of the shackle, the slidable engagement of the shackle through aligned bores of two objects exposes the oversized diameter of the seal to attack by the rough edges or other sharp corners of the bores due to its oversized diameter. Thus, the seal can become damaged due to the snagging or rubbing of the seal against the aligned holes.
An improvement to these structures is described in my U.S. Pat. No. 6,055,832 issued May 2, 2000. In this patent, a locking device includes a shackle member and a key operable locking head that may be fastened onto a latch portion of the shackle member. The locking head has a housing and a rotatable retainer and a lock core in the interior of the housing. The lock core is mechanically coupled to the retainer, and both the retainer and the lock core are axially oriented with respect to an axial opening in the housing. The latch portion is axially insertable through the axial opening when the lock core is in an unlocked state and has a latch head which becomes fastened by the locking head when the retainer is rotated by the lock core into a locked state. A seal is supported by the housing proximately to the axial opening and acts seal against a seal surface on the latch portion.
Despite the improvements described above in the various types of locking devices noted, there remains a need for an improved locking device having a simplified seal at an interface between the locking head and the shackle portion. There is a need for such a seal that can be conveniently manufactured with reduced costs of assembly. There is further a need for such locking devices that provide a seal in an aesthetically pleasing manner. There is a further need for such locking devices that provide a bumper-like construction so as to cushion members locked thereby. The present invention is directed to meeting such needs.


A processor is provided with a number of control registers logically organized in a hierarchical manner. At the highest level is a set of control registers for controlling the overall system. At the second highest level are multiple sets of control registers for controlling concurrent execution of processes in multiple contexts. At the third highest level are multiple sets of control registers for controlling concurrent execution of multiple process threads for each of the concurrently executing contexts. Besides modifications resulting from the normal course of instruction execution, the control registers are directly accessible and modifiable using instructions of the standard instruction set. Each context/thread is assigned a variable privilege level for accessing and modifying control registers at the various levels. The instruction fetch unit is enhanced to dispatch instructions with appended context and tag identifications. The execution units are enhanced to verify a context/thread's privilege by locating the assigned privilege level using the appended context and thread identification information, before executing any instructions that access/modify a control register. Additionally, the execution units are further enhanced to be dynamically configurable in response to configuration control information stored in a thread level control register set for a thread and/or configuration information integrated with an instruction.

1. Field of the Invention
The present invention relates to the field of computer systems. More specifically, the present invention relates to their processors, in particular, the control registers.
2. Background Information
All computer system processors include a number of control registers.sup.1 for controlling system operations. The number of control registers included and their specific usage vary from processor to processor. Some processors include only control registers for managing basic system operations, such as instruction fetching/execution (i.e. the program counter register), interrupt/exception handling and so forth. Other processors include additional control registers for controlling various hardware and/or operation mode selections, such as whether a processor is to operate in an "enhanced" mode or a backward compatible "emulation" mode, whether certain hardware checking is to be performed, whether certain interrupts are to be recognized, and so forth. Yet other processors further include control registers for assisting the operating system in managing system resources, such as memory management, process/context switching, procedure call and return, and so forth. FNT .sup.1 For the purpose of this application, the term "control registers" includes system registers, memory registers, and the like, used for controlling the operation of a computer system.
Typically, the control registers are included in an unorganized manner. In other words, there is no particular organizational relationship between one particular/group of control registers provided for one purpose with another particular/group of control registers provided for another purpose. As the number of control registers being provided continues to increase, it is desirable that the control registers be organized in some coherent manner.
Additionally, direct modifications of the control registers (as opposed to modifications made as a result of the normal course of instruction execution) are made through the use of special instructions (as opposed to using instructions from the standard instruction set). For security and system reliability reasons, these special instructions are usually available only to certain privileged processes. This conventional approach of employing special instructions has the disadvantage of burdening the instruction fetch and dispatch unit, due to the increased number of opcodes to be decoded. As processor speed continues to increase, an increasing number of instructions are required to keep the processors "fully" utilized. Thus, it is also desirable to be able to use instructions from the standard instruction set to directly modify the control registers, provided security and system reliability can be maintained.
As will be disclosed in more detail below, the present invention achieves these and other desirable results.

Processor having a hierarchical control register file and methods for operating the same


A test signal interface and method for allowing sharing of multiple test signal generators among multiple devices under test (DUTs). Digital baseband test signals generated by the multiple test signal generators are combined and converted to a baseband analog signal for conversion to a radio frequency (RF) signal for testing the multiple DUTs.

1. Field of the Invention
The present invention relates to a system and method for testing multiple radio frequency (RF) signal receivers, and in particular, to testing multiple RF signal receivers with a shared RF signal generator.
2. Related Art
Manufacturing test of receive-only RF signal systems, e.g., global position satellite (GPS) signal receivers, is often implemented by using a single RF signal source to be shared among multiple devices under test (DUTs). Generally, this is easily done, as the signal source typically need only provide a continuous signal, plus this has the advantage of reduced costs.
Referring to FIG. 1, such a test implementation uses a common RF signal source 12 which receives one or more control signals 11 in accordance with which an output signal 13 is provided. This signal 13 is provided to a 1:N, e.g., 1:4, power splitter 14 which divides this signal 13 (in signal power) among its multiple output signals 15a, 15b, 15c, 15d, each of which serves as the test signal for a respective DUT 16a, 16b, 16c, 16d. As will be readily appreciated by one of ordinary skill in the art, such power splitters 14 are well known in the art and can be implemented with virtually any number of output signal ports, or alternatively, by cascading multiple power splitters having fewer signal ports such that the output port of an upstream power splitter provides the signal for the input port of a downstream power splitter, in accordance with well-known techniques. Accordingly, virtually any number of DUTs 16 can be tested using a single RF signal source 12.
However, particularly as an increasing number of DUTs 16 is to be tested, this type of test implementation has a number of problems relating to mutual power differences among the different signals 15 feeding the DUTs 16. In other words, ensuring that each DUT 16 receive its signal with the same power as each other DUT is not trivial. For example, the power splitter 14 will not provide each of the signals 15 at the same power level due to differences among the power divisions being accomplished within the power splitter 14 to its output signal ports 14a, 14b, 14c, 14d. Additionally, manufacturing tolerances and different lengths of the cables providing the test signals 15 will introduce further power differences among the signals 15. Hence, in order to ensure equal signal levels at the DUTs 16, adjustable signal attenuators (not shown) would need to be used and controlled externally. This adds to system costs and complicates the testing due to the external control required, as well as the calibration of each signal path (e.g., cable plus attenuator). Further, if each attenuator is not perfectly matched, i.e., in terms of the characteristic signal impedance, signal reflections can cause further differences among the power levels of the signals 15.
In the case of testing GPS signal receivers, the signal source 12 would normally be a single channel GPS signal generator. Often, it is only desired to test the signal-to-noise ratio (SNR) of each DUT 16, thereby effectively testing the noise figure of the receiver. (If a multi-channel GPS signal generator is used, with multiple signal carriers provided, the carrier-to-noise ratio (CNR) would be tested.) If the noise figure is sufficiently low and the DUT 16 can see a satellite signal at a given SNR (or CNR), it is the digital signal processing that ensures signal locking with the satellites. Since the digital signal processing is tested by the supplier of the signal processing chip (and should, therefore, be assumed to be operating properly), this is often sufficient.
On the other hand, if it is desired to test GPS location lock, an antenna located on the roof of the testing facility can be used to receive and convey actual GPS signals to the DUTs 16. However, as the GPS signals received in this manner will vary, e.g., with weather conditions, this cannot be considered a reliable signal source for testing noise figure, since the input signal level for a given satellite signal is not well defined. Accordingly, this is generally useful only as a test of the ability to determine geographic location, i.e., obtain satellite lock.
Alternatively, multi-channel GPS signal generators (e.g., four channels or more) can be used provide an accurate signal to which the DUTs 16 can lock. Conventional multi-channel GPS signal generators, however, are more expensive than single-channel generators, thereby limiting their use to more expensive manufacturing requirements where repeatable locking to GPS signals must be tested.

Radio frequency (RF) signal generator and method for providing test signals for testing multiple RF signal receivers


A Virtual Reality (VR) system and method are provided that facilitates diagnosing and solving problems associated with a terminal. A VR session is established and a VA room rendered for participants. Files describing and program instructions for interactively manipulating the terminal are loaded into the VR room. At least one component piece of the SST is manipulated based on direction provided by a VR input device operated by a participant during the VR session.

Sending technicians to diagnose and solve problems in systems, such as computer-based systems, is costly. One such example, is sending a technician to diagnose problems with Self-Service Terminals (SSTs), such as Automated Teller Machines (ATMs) and kiosks.
Moreover, often times a technician may need another technician with more experience to help solve any SST problems, which means repair of the SST is delayed during which time the SST is unavailable for customer access.


A power converter includes a plurality of switches electrically coupled to each other for converting input power to output power. Each of the switches is sufficiently isolated to protect adjacent switches upon failure of one or more switches. The power converter also includes a controller for reconfiguring operation of the switches to provide at least a partial operating mode upon a switch failure.

The invention generally relates to power conversion systems and, more particularly, to power conversion systems being able to withstand certain switch failures.
With the rising cost and scarcity of conventional energy sources and concerns about the environment, there is a significant interest in alternative energy sources such as solar power and wind power. The alternative energy sources are used to generate power by employing different power conversion systems for different alternative sources of energy. A power conversion system generally includes at least one power converter for converting generated power from at least one power source to usable power for transmission to a power grid.
The power conversion system includes one or more stages of power conversion to provide the usable power. Each stage includes a plurality of switches that convert the input power from the power source. The switches are susceptible to damage due to various conditions such as current overloading. The failure of any one of the switches in a conventional power converter leads to temporary suspension of the operation of the whole power converter until the failed switch is replaced. The temporary suspension of the power converter results in power production losses and reduced operational time. Furthermore, the failure also negatively impacts the power converter's availability rating when it is still largely functional although not able to operate due to the failure of a single component.
The failure of a switch may also result in an explosion that creates undesired projectiles of debris from the exploded switch. The undesired projectiles may damage the adjacent switches.
Hence, there is a need for an improved system to address the aforementioned issues.


A test mode setting arrangement provided in a microcomputer includes an internal memory, a plurality of pins and a central processing unit, the central processing unit being allowed to access the internal memory or an external memory depending on a logic level of a mode signal applied to the microcomputer, the arrangement basically features: a first unit for resetting the central processing unit in response to a reset control signal applied thereto, the reset control signal and the mode signal exhibiting essentially the same maximum voltage; a second unit for changing the output thereof in response to the logic level change of the mode signal, the second unit issuing an output which is applied to the central processing unit as a test mode initiating signal; and a third unit coupled to receive the mode signal and the output of the second unit, the third unit producing two signals which selects the access of the central processing unit to one of the internal and external memories.

1. Field of the Invention
The present invention relates generally to a test mode setting arrangement provided within a microcomputer, and more specifically to such an arrangement which obviates the need for a pin or terminal to be dedicated to testing.
2. Description of the Prior Art
It is a common practice that a manufacturer of microcomputers provides each of the fabricated chips with a test mode setting arrangement or circuit for effectively ascertaining whether a chip has been manufactured correctly or not. Functional testing is usually performed using a LSI (Large Scale Integration) tester which applies a test pattern to a microcomputer input(s) and compares the output(s) therefrom with expected values.
Before turning to the present invention it is deemed preferable to briefly discuss two known test mode setting arrangements with reference to FIGS. 1 and 2.
FIG. 1 is a block diagram showing a microcomputer 10 which includes a known test mode setting arrangement 12, a CPU (Central Processing Unit) 14, an internal memory 16 and a test memory 18. The memories 16, 18 are coupled to the CPU 14 by way of an address bus 17 and an instruction fetch bus 19. For the sake of simplifying the description and drawings, the microcomputer 10 shown in FIG. 1 does not illustrate all of the circuits usually included therein. An external memory 20 is coupled to the CPU 14 through chip pins P4, P5 via address buses 17, 17' and instruction fetch buses 19, 19'.
Before describing the test modes of the FIG. 1 arrangement, two instruction fetch modes will be described.
It is assumed that a test signal 41 applied to a pin P3 assumes a logic 0. If a mode select signal 42 applied to a pin P1 assumes a logic 0, the AND gate 28 issues an instruction fetch mode (IFM) signal IFM 1 assuming a logic 1 while another instruction fetch mode signal IFM 2 from the AND gate 30 assumes a logic 0. In response to the signal IFM 1 assuming a logic 1, the CPU 14 fetches instructions from the external memory 20 and executes same. On the other hand, in the event that the mode select signal 42 assumes a logic 1 (e.g., a power source voltage 5 V), the output of AND gate 28 assumes a logic 0 while the output of the AND gate 30 assumes a logic 1. Thus, the CPU fetches instructions stored in the internal memory 16 and executes same. The instruction fetch modes are not directly concerned with the present invention, and hence further descriptions thereof are deemed redundant.
The test mode implemented by the FIG. 1 arrangement will be described in brief. User programs stored in the internal memories of microcomputers vary from user to user and, accordingly, if all of the user programs are to be verified in terms of operations thereof, it is necessary to obtain individual user's input information and prepare the corresponding different test patterns. However, it is practically impossible to obtain the different user's input data and prepare the corresponding test patterns and then execute microcomputer tests. In order to overcome this problem, the test memory 18, which is dedicated to the test mode, is provided within the microcomputer 10. The manufacturer stores a predetermined set of program instructions in the test memory 18. Following this, the instructions are fetched from the memory 18 and executed by the CPU 14 for diagnostic purposes using a single test pattern. Such a test mode using the test memory 18 will be referred to as TEST MODE 1.
The test mode setting arrangement 12 initiates the above-mentioned TEST MODE 1. In FIG. 1, before bringing this test mode into operation, a reset control signal 44 assuming a logic 0 is applied to the reset signal generator 26 via a pin P2 in order to reset the CPU 14. The reset signal generator 26 issues a reset signal 46 which assumes a power source voltage Vcc (viz., logic 1) in response to the reset control signal 44 assuming logic 0. Thus, the CPU 14 is initialized. In this instance, the test signal 41 continues to assume the power source voltage Vcc (viz., logic 1).
After resetting the CPU 14, when the reset control signal 44 is raised to Vcc, the reset signal 46 assumes a logic 0 by which the CPU is released from the reset condition. Thereafter, when the test signal 41 assumes the power source voltage Vcc (viz., logic 1), the CPU 14 initiates TEST MODE 1 in this particular case.
Recent advances in LSI technology have permitted notable reductions in chip size. However, the full benefit of this size reduction capability has not been realized in that the pins, which are inherently required to be provided along the side(s) of the chips, must have a finite size so as to exhibit the required rigidity and longevity. Thus, it is highly desirable to increase the number of pins available for users. Therefore, the prior art discussed with FIG. 1 has encountered the problem in that it is inherently provided with the pin P3 dedicated to the test mode.
FIG. 2 is a block diagram showing another known test mode setting arrangement 12' which does not require a pin exclusively for test mode use. The arrangement 12' of FIG. 2 differs from the counterpart 12 of FIG. 1 in that: (a) the arrangement 12' is not provided with a pin which is dedicated to the testing of a microcomputer and (b) the arrangement 12' includes a high voltage detector 24. The remaining portions of the FIG. 2 arrangement are identical to those of the FIG. 1 arrangement, and hence further descriptions thereof will be omitted for brevity.
The arrangement 12' of FIG. 2 is provided to initiate TEST MODE 1 in the same manner as the arrangement 12 of FIG. 1. In FIG. 2, before initiating TEST MODE 1, a reset signal 44 assuming a logic 0 is applied to the reset signal generator 26 via the pin P2 in order to reset the CPU 14. The reset signal generator 26 issues a reset signal 46 which assumes a power source voltage Vcc (viz., logic 1) in response to the reset signal 44 assuming logic 0 applied thereto. Thus, the CPU 14 is initialized. In this instance, although the high voltage detector 24 is also supplied with the signal 44 assuming 0, the detector 24 issues a signal 40 assuming a logic 0.
After resetting the CPU 14, when the reset signal 44 is raised to a predetermined high voltage (e.g., a voltage of 12 V or more), the high voltage detector 24 produces the test signal 40' assuming a logic 1 (viz., the power voltage Vcc). In this case, each of fetch mode signals IFM1 and IFM2 assumes a logic 0 irrespective of the value of the mode signal 42. Thus, the CPU initiates the TEST MODE 1 in this particular case.
The test mode setting circuit 12' shown in FIG. 2 is such that, while it does not requires a pin or terminal to be exclusively assigned to the test mode, allowing the number of pins available for users to increase, it requires the provision of the high voltage detector 24. This induces the drawbacks that, normal LSI testers must be modified in order to increase the normal output, which is about 8 V, up to the necessary 12 V level, or alternatively replaced with a much more expensive unit. In either event the second prior art increases the cost of microprocessor fabrication.

Test mode setting arrangement for use in microcomputer


An intervention system and method for control of seabed equipment, including a control umbilical connected to a support vessel or rig via a surface winch; a tether connected to underwater seabed equipment; and an umbilical management system unit coupled between the tether and the control umbilical to couple the support vessel or rig to the seabed equipment. The control umbilical and the tether via the umbilical management system unit provide a communications channel for communicating media, including data, electrical power, hydraulic power and/or chemical treatment fluid, from the support vessel or rig to the seabed equipment. The umbilical management system unit allows for easy deployment and management of the control umbilical and tether and can reel in or pay out the tether and/or the control umbilical under remote control or autonomously.

Field of the Invention
The present invention generally relates to methods and systems for subsea well intervention and work-over on seabed equipment, and more particularly to an Open Water Wireline (OWWL) or Spoolable Compliant Guide (SCG) well intervention system and method, including a control umbilical (CU), preferably a multipurpose control umbilical (MCU), deployed and managed using a dedicated remotely operated or autonomous umbilical management system unit (UMSU), wherein the CU or MCU is connected via the UMSU to one or more tethers that connect in turn to one or more subsea equipment.
Background
Well intervention and work-over on seabed equipment, such as subsea oil wells, can be performed using open water wireline (OWWL) or Spoolable Compliant Guide (SCG) systems. During these work-over operations, the main functions of the seabed equipment are typically, if not always, required to be remotely controlled and operated from a support ship or rig, which is in attendance. Such control includes the communication or transfer of one or more types of media, including data, electrical power, hydraulic power and a chemical treatment fluid or fluids. In order to provide such control, the media is communicated through one or more umbilicals which are launched from the support ship or rig for the purpose of connecting the support ship or rig to the seabed equipment.
However, there exist a number of problems that must be solved before such well intervention systems can become widely accepted in the industry. Existing intervention and work-over methods and systems suffer from various discovered problems, as further described herein. There are certain characteristics of the Open Water Wireline (OWWL) or Spoolable Compliant Guide (SCG) methods and systems that complicate the design of the control umbilicals and can in certain cases create problems that affect the smooth running of the subsea work-over operation. For example, due to the up and down heaving motion of the support vessel or rig caused by the ocean waves, a control umbilical is generally required to be somehow tensioned in order to prevent it from buckling or crumpling under the resulting compressive forces and displacements that can arise. The construction of a typical control umbilical is such that exposure to compressive forces and displacements is generally undesirable during operation.
Another problem of free hanging umbilicals arises when environmental conditions, such as a subsea current, and the like, cause the umbilical to deflect without control in the water column. One known area of concern of such behavior is the twisting or looping of the umbilical on itself. During recovery of the umbilical, this loop can close itself and as such permanently damage the umbilical. Another concern with the horizontal excursion is the potential contact between the umbilical system and other downlines, with the potential risk of damage to the umbilical. This problem can occur when additional lines are placed in the water column that could cause clashing or tangling of the lines. In this case, it is extremely important to actively manage one or more of such cables to keep them from clashing.
The above issues may be reduced somewhat with the use of a plurality and smaller umbilicals. For example, a smaller umbilical may be used incorporating only the electrical power and communication cables or fibers similar to those commonly used by Remotely Operated Vehicles (ROVs). U.S. Patent Application Publication No. 20060231264 assigned to SAIPEM describes an open light well intervention system that employs as a data communication and power supply umbilical the umbilical of the ROV. However, this solution is limited. One problem of the SAIPEM system is that it would require multiple umbilicals to supply the functions needed by the different subsea equipment identified, and which consist of both the intervention equipment and the ROV. Also, such an arrangement has practical limitations in that the deployment of both the intervention equipment and the ROV are dependent on each other.
One known method for keeping an umbilical under a constant tension employs a constant tension winch positioned on the vessel. Such systems have a disadvantage that, in tensioning the umbilical, they cause the umbilical to be repeatedly bent and straightened out again at a number of locations, e.g., on sheaves or in bends and that over time cause fatigue and/or internal friction damage, eventually leading to failure of internal cables or tubes contained in the umbilical.
Constant tension winch systems also have the disadvantage that they are generally expensive in terms of procurement of the specialized winch required. Also, constant tension winch techniques would be generally very difficult to implement in deepwater because the weight of the umbilical will by necessity increase to account for the increasing water depth. Thus, the lengthy heavy umbilical itself and the constant tension winch will need to become very large and hence there will be a correspondingly undesirable economic impact to the work-over activity.
In addition, existing tensioned umbilical methods generally require the vessel to be operated at or close to the vertical center of the seabed equipment it controls and, typically, require the umbilical to be connected to the seabed equipment on surface before being run with the seabed equipment, while the latter is deployed. U.S. Pat. No. 6,223,675 describes an underwater apparatus for performing subsurface operations. The apparatus includes a linelatch system that is made up of a tether management system (TMS) connected to a flying latch vehicle by a tether. The TMS controls the amount of free tether between itself and the flying latch vehicle using a reeling in and out system well known in the art. The TMS is lowered and positioned to the seafloor using an umbilical, which is then disconnected from the tether management system. The TMS is connected to the underwater subsea equipment via the flying latch vehicle.
However, none of the above systems provide a fully satisfactory umbilical solution for underwater intervention systems. Most existing systems cannot be deployed and connected to the intervention seabed package readily and are subject excessive bending and stressing of the umbilical that causes over time fatigue, damage and failure of internal cables and tubes contained in the umbilical.

Umbilical management system and method for subsea well intervention


A signal reception device is disclosed that is able to improve interference cancellation capabilities even when signals having different center frequencies exist on the same frequency band. The signal reception device includes an interference suppression unit to generate replicas of plural signals in the received signal and separate the signals by suppressing interference signals. The interference suppression unit includes a signal phase rotator to rotate phases of the signal candidates at preset respective rotational frequencies, the preset rotational frequencies being related to respective center frequencies of the signals in the received signal; a rotational frequency controller to set the preset rotational frequencies; and a replica generator to generate the replicas of the signals by using the phase-rotated signal candidates.

1. Field of the Invention
The present invention relates to a signal reception device, a signal transmission device, a radio communication system, and a signal reception method used in mobile wireless communications and fixed wireless communications.
2. Description of the Related Art
In a wireless communication system, in order to achieve efficient utilization of limited frequency resources, it is desirable that signals use the same frequency as much as possible. As achievement of research and development in response to this requirement, for example, an interference canceller is attracting attention as a technique able to increase capacity of a communication system.
FIG. 25 is a block diagram illustrating an example of a configuration of an interference canceller of the related art.
The interference canceller 200 as illustrated in FIG. 25, which is installed in a signal receiver of a wireless communication system, generates a received signal replica by combining the replicas of signals in a received signal, separates a desired signal from other signals (namely, interference signals), and extracts the desired signal. Such an interference canceller 200 is called "replica generation type interference canceller".
Below, operations of the replica generation type interference canceller 200 are described with reference to FIG. 25. For convenience of description, it is assumed that there are two received signals (signal SIG1 and signal SIG2).
In the replica generation type interference canceller 200, a channel estimator 218 estimates channel impulse responses of the signals in consideration of the time spread of transmission paths of the desired and the interference signals. Coefficient variable filters 214 and 215 generate the replica signals of the desired and interference signals for all possible symbol sequence candidates of the desired and the interference signals by taking convolution of the estimated channel impulse responses (estimated values of the channels) and the symbol sequence candidates. An adder 216 sums the signal replicas of the desired and the interference signals, and generates a received signal replica. A maximum likelihood sequence estimator 220 selects a symbol sequence candidate of the desired and the interference signals, whose received signal replica is the closest to the actually received signal, and outputs a symbol sequence candidate of the desired signal as the estimation result of the received signal, thus effectively canceling the interference signals.
By adaptively canceling the interference signals in the received signal in this way, it is possible for many signals to use the same frequency at the same time, and to improve frequency utilization efficiency.
Additionally, in Japanese Laid Open Patent Application No. 2000-252958, it is proposed to estimate characteristics of channels in each path corresponding to a user so as to compensate for phases of signals, and to cancel interference by using the compensated signals.
With this technique, by using a frequency offset estimated at a final stage, it is possible to precisely estimate characteristics of channels, and as a result, it is possible to improve quality of demodulated data.
However, although the above interference cancellers of the related art are capable of effectively suppressing interference signals by generating the desired and the interference signal replicas, when center frequencies of the desired and the interference signals are different, it is observed that signals at the receiver after detection rotate at high speeds.
FIG. 26 is a diagram illustrating a problem of the related art when signals having different center frequencies are superposed on the same frequency for transmission.
In FIG. 26, it is assumed that a transmission device T1 and a reception device R1 communicate with each other, and the transmission device T1 transmits a wide band signal SIG1 having a center frequency fc1 and a bandwidth BW1. In addition, it is assumed that a transmission device T2 and a reception device R2 communicate with each other, and the transmission device T2 transmits a narrow band signal SIG2 having a center frequency fc2 and a bandwidth BW2. Under these conditions, focusing on signals received by the reception device R1, as shown in FIG. 26, the reception device R1 receives not only the wide band signal SIG1 from the transmission device T1, but also the narrow band signal SIG2 from the transmission device T2. In other words, as illustrated in the upper part of a portion (a) of FIG. 26, signals having different center frequencies exist on the same frequency band. If these received signals are expanded in an IQ plane, as illustrated in the lower part of the portion (a) of FIG. 26, it is observed that the received signal rotates at high speeds corresponding to the difference of the center frequencies. As a result, when the interference cancellers of the related art are used in such an environment, the channel estimation algorithm cannot follow the high speed rotation, resulting in great degradation of performance in the interference cancellation.
Further, for wireless signals partially sharing or completely sharing the same frequency, if the bandwidths of the wireless signals are different from each other, the difference of the center frequencies of the desired and the interference signals is the major cause of the great degradation of performance in interference cancellation.

Signal reception device, signal transmission device, radio communication system, and signal reception method


A memory cell and a method for producing the memory cell have a plurality of structured layers disposed on a semiconducting base body and an exactly defined overlap region of a first doped region and a floating gate layer. A control gate layer is disposed approximately without any overlap over the first doped region. The memory cell can be programmed with the aid of the Fowler-Nordheim tunnel effect.

FIELD OF THE INVENTION
The invention relates to a memory cell having the following features:
a semiconducting base body with a first main surface, PA1 a first doped region of a first conduction type on the first main surface, the first doped region connected to a drain terminal, PA1 a second doped region of the first conduction type on the first main surface, the second doped region connected to a source terminal, PA1 a floating gate layer disposed on the first main surface, having an oxide layer underneath it, covering a region between the first and second doped regions and partially covering at least one of the two doped regions, and PA1 a control gate layer disposed on the floating gate layer, having a dielectric underneath it and connected to a control gate terminal. The invention also relates to a method for producing the memory cell.
Such a memory cell is disclosed, for example, in the book entitled "Lehrbuch der Hochfrequenztechnik" [Textbook of Radio-Frequency Technology] by Meinke and Gundlach, Springer, 5th Edition, 1992, page M 40 et seq. In memory cells of that type, the flow of current between the two doped regions, which are respectively connected to the gate terminal and the source terminal, is critically influenced by a charge situated in the floating gate layer.
The floating gate layer can be charged and/or discharged, utilizing the Fowler-Nordheim tunnel effect, for example, by the flow of a tunneling current between the floating gate layer and one of the two doped regions. Following conventions in the literature, it is assumed in the following text that the first doped region, which is connected to the drain terminal and is frequently also referred to as the drain region, is the doped region from which the tunneling current commences toward the floating gate, but that does not preclude the possibility of a tunneling current also flowing between the floating gate layer and the second doped region, which is connected to the source terminal, instead of the drain region.
The commencement of a tunneling current between the floating gate layer and the drain region necessitates not only the application of a sufficiently high voltage between the control gate terminal and the drain terminal but also overlapping of the floating gate layer over the drain region. In that case, the level of the voltage to be applied, which is also referred to as the programming voltage, and the required duration for charging the floating gate layer from a lower potential, to an upper potential, and discharging it from an upper potential to a lower potential, which is also referred to as the programming time, are sensitively dependent on the overlap region.
In the case of previous memory cells, a common structure edge of the control gate layer and the floating gate layer, which is also referred to as the gate edge, is usually provided over the drain region, that is to say the control gate layer and the floating gate layer cover the drain region to the same extent. For that reason, during the process of producing such memory cells, on the first main surface of the base body, the drain region can be doped into the first main surface only as far as the gate edge, with the result that an overlap region of the floating gate layer and drain region does not yet exist. The overlap region is produced from subsequent thermal diffusion of the drain region under the floating gate layer, with that overlap region being restricted, inter alia, by three circumstances:
1. For various reasons, the drain region may not be doped as far as the gate edge, which results in a smaller overlap region during the subsequent diffusion.
2. In the course of oxidations which follow during production, a thicker oxide layer, a so-called bird's beak, is formed on the gate edge, as a result of which the tunneling current density is exponentially reduced.
3. The dopant concentration greatly decreases in the lateral direction, with the result that efficient tunneling of the charge carriers can only take place at the gate edge.
Overall, then, small process fluctuations during the production of the memory cells described to date can lead to a large variation in the programming voltage and programming time, since that region of the overlap region of the drain region and the floating gate layer which is critical for tunneling is given by the difference between the length of the bird's beak and the length of the doped region which is diffused under the floating gate layer, and cannot be exactly defined.

Memory cell and method for producing the memory cell


A system and method for simplifying resource management is provided. Resources are represented by resource objects in a resource object model. Each resource object represents a single resource and contains one or more resource attributes to describe the resource. At least one of the resource attributes for each resource object is a string identifier formed within the constraints of a query grammar. The string identifier is a text-based identifier that is based upon a unique property of the represented resource. A characteristic of the resources is selected as the basis for the relationship between resource objects in the resource object model. In one embodiment, an application identifies resources by generating a search query using the same query grammar used to create the string identifier. In another embodiment, a user manually enters the search query into a command line interpreter.

Currently, there is no well defined, formalized and standardized process for naming the resources with which a system or application interacts. Instead, each application usually chooses its own method of naming resources. Moreover, naming resources and finding resources are considered still two different processes. Sometimes an application will use the name of a resource as a key to search for the resource against a pre-built resource index. This method works for that application only because other applications may not be aware of naming techniques used by other applications and there is no formal relationship between the key and the resource in question.
Another problem with resource naming is the difficulty for human operators to identify and locate resources. Some environments may assist an operator through a graphical user interface (GUI), which may hide the complexity of unique identification. However, this is not possible in environments that implement a command line interface (CLI), in which a user has to key in a resource name manually. Since applications often ensure uniqueness in resource naming by following algorithms based on statistics and random number generators, a resource key is often completely unrelated to the characteristics of the resource and impossible for a human operator to memorize or reconstruct based on resource characteristics.
Therefore, there is a need for a method of naming resources that makes resources easily identifiable across applications at runtime. In addition, there is a need for a method of naming resources which allows a human user and/or operator to identify and locate resources based on predictable characteristics.

System and method for identifying application resources


To provide a thermal processing apparatus where a projection area perpendicular to the axis of a sealing structure and attachment structure of heat radiation heater is decreased and a chamber volume is decreased. The apparatus has a chamber for accommodating a workpiece of a thermal processing object, the chamber having a partition wall for partitioning inside from outside of the chamber, a heat radiation heater disposed penetrating the partition wall, wherein the heater has a ring seal arranged on an outer peripheral surface of the extension section, and hermetically sealing the chamber, and a heat blocking plate arranged between the heat radiation unit and the ring seal in the axial direction of the glass tube, for blocking heat radiated from the heat radiation unit to the ring seal, the heat blocking plate having an inner peripheral surface fitting along the extension section.

In the related art, as illustrated in FIG. 6, a heating apparatus 300 is known which has a glass tube 301 penetrating a hermetically sealed chamber 310 surrounding a workpiece 200. In this apparatus, a sealing member 304 seals a portion between the chamber 310 and the glass tube 301, and an infrared reflection film 301a is formed on a surface of the glass tube 301 in a region corresponding to the sealing member 304. Additionally, cooling air 330 is forced to flow and a filament lamp 320 is arranged inside the glass tube 301 (refer to PTL 1, for example, refer to claim 1 and FIG. 2).


A method for evaluating vascular endothelium function in a human subject comprises monitoring changes in intensity of NADH fluorescence signal emitted from skin tissue cells of an upper limb of said subject as a function of time, wherein said changes result from reactive hyperaemia caused by blocking and releasing blood flow in the same upper limb of said subject. A system for evaluating vascular endothelium function in a human subject comprises a means for illuminating a skin on an upper limb of said subject with exciting light, a means for measuring intensity of fluorescence signal emitted from the skin and recording changes of said intensity of the fluorescence signal over time; and a restriction means for blocking and releasing blood flow in the upper limb of said subject.

Vascular endothelium is a cellular layer lining the inner part of blood vessels, including arteries and veins. Endothelium is presently looked upon as an important metabolically active autocrine/paracrine/endocrine organ that regulates cardiovascular function and maintains vascular homeostasis by: modulating vascular tone; regulating solute transport into cell components of the vessel wall, local cellular growth, and extracellular matrix deposition; protecting the vessel from the potentially injurious consequences of substances and cells circulating in blood; and regulating the hemostatic, inflammatory, and reparative responses to local injury. One of the main functions of endothelium is to produce or release substances, such as nitric oxide (NO), that control the behaviour of the blood vessels such as their dimensions, elasticity, permeability and reactivity, including the ability to constrict and dilate. Endothelium-derived mediators regulate not only blood flow and permeability vascular elasticity, reactivity and structure, but also local and systemic inflammatory response as well as thromboresistance of vessels. Vasoprotective endothelial mediators such as nitric oxide (NO), prostacyclin (PGI2) endothelium-derived hyperpolarising factor (EDHF), bradykinin (Bk) tissue plasminogen activator (t-PA), thrombomodulin (TM) or ADP-ase do exert antithrombotic, anti-inflammatory and vasoprotective action.
On the other hand, excessive production by endothelium of superoxide anions (O2-), isoprostanes, angiotensin II (ang II), endothelin 1 (ET-1), plasminogen activator inhibitor (PAI-1), tissue factor (TF), von Willebrandt factor (vWF), chemokines (e.g. monocyte chemotactive protein MCP-1), cytokines (e.g. IL-6), and increased expression of adhesion molecules (e.g. selectin P, ICAM-1) promote inflammation and thrombosis of vascular wall that may eventually lead to the development of atherosclerotic lesion. Accordingly, healthy endothelium is essential for undisturbed functioning of the cardiovascular system, while endothelial dysfunction leads to its various pathologies. In particular, endothelial dysfunction is pivotal to atherogenesis, it is present at the earliest stages (e.g. preceding angiographic or ultrasonic evidence of obstructive plaque) as well as later stages of arterial disease, contributing to clinical sequelae related to tissue damage (eg, ischemia, infarction, and organ failure).
Endothelial dysfunction in most general terms refers to an impairment of the ability of the endothelial cell layer to produce an appropriate vasodilatory response to stimuli. Many studies provided evidence that endothelial dysfunction (assessed on the basis of the impairment of NO-dependent vasodilatation) may be regarded as prognostic factor for the development of adverse cardiovascular events. Indeed, relative risk for adverse outcomes is elevated approximately 10-fold when there is evidence of coronary or peripheral endothelial dysfunction.
Various conditions, including hypercholesterolemia, systemic hypertension, smoking, diabetes, congestive heart failure, pulmonary hypertension, estrogen deficiency, hyperhomocysteinemia, and the aging process itself, have been associated with impaired function (dysfunction) of endothelium. As a result, the vessel wall in these conditions may promote inflammation, oxidation of lipoproteins, smooth muscle proliferation, extracellular matrix deposition or lysis, accumulation of lipid-rich material, platelet activation, and thrombus formation. All of these consequences of endothelial dysfunction may contribute to development and clinical expression of atherosclerosis. The potential consequences of endothelial dysfunction further include coronary constriction or inadequate dilation during physical or mental stress, producing myocardial ischemia; plaque rupture and thrombosis, causing unstable angina or myocardial infarction; and reperfusion injury after thrombolysis.
Several methods and apparatuses for non-invasive evaluation of the health of vascular endothelium in vivo have been developed.
In particular, methods are known that are based on monitoring the physiological conditions or characteristics of the arteries in the patient's limb after reactive hyperemia.
Reactive hyperemia is a physiological phenomenon that occurs in a patient after blocking (or occlusion) of a major artery. Such blocking or occlusion of artery in the limb, such as brachial artery, is typically done by inflating a blood pressure cuff slightly above systolic pressure for a period of about 5 minutes. Anoxia or severe hypoxia in the limb downstream from the occluded artery is usually a result of such blocking. Sudden release of the blocking causes endothelial cells to react by generating NO and dilating. The phenomenon of reactive hyperemia lasts up to 10 minutes before return to pre-test blood volume values. Blood flow is a characteristic of the artery, and under reactive hyperemia blood flow through an artery, vein or limb is significantly greater as compared with normal blood flow.
Currently the most popular method is flow mediated dilatation (FMD), a non-invasive technique based on monitoring of diameter of arteries after reactive hyperemia with a two-dimensional ultrasound and Doppler ultrasound. Its results correlate well with invasive coronary endothelial testing as well as with the presence and severity of coronary atherosclerosis. This technique is described for example in a review by S. Patel. And D. S. Celermajer, Pharmacological Reports 2006, 58, suppl. 3-7. However, this method is quite expensive, requires sophisticated equipment and highly specialized operators, is highly operator dependent and is poorly reproducible due to variability of measurements and poor resolution relative to arterial size. Hence, its use is limited and the method is not applicable on a more general basis.
For the purpose of assessment of vascular endothelial function changes of other physical parameters in response to reactive hyperemia have been also used, such as fingertip skin temperature (WO2005118516; N. Ahmadi et al. Int. J. Cardiovasc. Imaging (2009) 25:725-738), blood pressure in a finger (pulse wave amplitude) using plethysmography (EP1360929, EP1992282, WO00/57776, EP2110074), and peripheral arterial tone (WO2000/074551, WO2002/034105).
Non-invasive technique for detection of endothelial dysfunction based on monitoring blood flow related changes in the level of a substance present in a limb after reactive hyperemia is disclosed in WO03/051193. The method involves blocking blood flow in the limb to stimulate endothelial function and then releasing the blood flow block to observe, measure and record said changes as a function of time, said changes being indicative of endothelial dysfunction. Said substance can be a tracer substance injected in a vein, such as a radiation emitter or a contrast agent, and the ingress of said tracer into the limb is detected and measured, for example by means of gamma ray detection. Tracer measurement in a pair of two laterally opposed limbs should be performed and the tracer presence compared between both limbs. Alternatively, a physical characteristics of the limb, such as temperature or color, or a property of a metabolic or other biochemical product circulating in the limb following the release of the blood flow block, such as O2, CO2 or reduced hemoglobin, is measured by a suitable technique. As suitable techniques there were suggested gas emissions across the skin surface within a cell placed on the skin surface, optical techniques, such as spectral analyzers or optical transmission/diffusion detectors, such as the visible-reflectance hyperspectral analysis, and EPR/NMR techniques. Either the appearance rate of a depleted substance or the disappearance (depletion) of an accumulated product can be detected. A rate of change of the measured parameter shortly after release of the occlusion or blockage is suggested as a primary factor in determining endothelial dysfunction. In the case of the use of a tracer, the rate for both the blocked limb and the contra-lateral control limb is measured.
It has been established that endothelial dysfunction is an early event and major risk factor for atherosclerosis and an important indicator for a medical professional, allowing for early diagnosis of the risk of cardiovascular disease.
Testing endothelial function is therefore a highly desirable alternative for a diagnostic approach based on performing a set of various biochemical tests, especially in apparently healthy individuals, i.e. individuals not showing any signs of cardiovascular disease.
A testing method is needed that would allow to evaluate function and detect any dysfunctions at an early stage of impairment in order to identify patients for prophylactic or therapeutic intervention to improve the dysfunction and/or for further more detailed and complicated diagnostic tests.
The need exists to provide a non-invasive test for evaluating endothelial function which would be reliable, easy to carry out and inexpensive, and thus applicable for tests in large patient populations, for example for screening purposes.
There is also a need for a simple, quick and non-expensive test that would allow to monitor and control the response of a patient to a medical treatment of cardiovascular disease.

Method for evaluating vascular endothelium function and a system therefor


An SLR camera having a focus detecting apparatus and a photographing method thereof are disclosed. The SLR camera may include an AF sensor, the pixels of which may be disposed in various arrangements, for example, in different sizes, in different gaps between the pixels and/or in different numbers, depending on the location of pixels and a control unit which controls the focusing operation based on the sampling levels output by the pixels.

A wide variety of multimedia applications currently available on-line, e.g., from the Internet, allows users to upload and share photographs taken with a variety of multimedia apparatuses on-line, e.g., through Internet blogs. With such renewed interests in taking and sharing photographs, camera ownership has also seen a sharp rise in the recent years.
Cameras may broadly be classified as single-lens reflex (SLR) cameras, twin-lens reflex (TLR) cameras or rangefinder (RF) cameras according to the type of viewfinder used.
An SLR camera has only a single lens through which users may both view and capture the image of a subject. Light passing through the single lens is reflected by a mirror at approximately 90° angle so that users can view the subject with his or her eyes through the viewfinder. Accordingly, SLR cameras advantageously provides a user with an instant feedback through the viewfinder of whether the subject is in focus or of how clearly a scene can be viewed in the foreground in relation to the background.
A TLR cameras include separate lenses for taking photographs and for the viewfinder, and tend to be relatively expensive and medium-sized cameras.
An RF camera has an additional viewfinder for displaying an image that is similar to the image captured by the objective lens. However, since the viewfinder of the RF cameras is not optically coupled to the object lens, no change appears on the viewfinder screen even when the focus of the objective lens and/or the iris changes. RF cameras generally tend to be small cameras.
While the three camera types have each been in use to varying extents, SLR cameras have been the generally preferred choice for those prefer the viewing of the images as they would be captured by the camera. In the digital era, digital SLR (DSLR) cameras have similarly become widely popular.
A modern camera typically includes an automatic focusing (AF) detecting function, which enables automatic focus adjustment. An AF system generally measures the distance between two images formed on an AF sensor, calculates how far the object lens should be moved to make the subject in focus based on the measured distance, and moves the lens until the subject is in focus.
The focus area of a conventional SLR camera is limited to the central portion of the photographed image due to the optical asymmetry. However, a typical user desires a broader focus area as a preferred feature in a modern SLR camera.
Unfortunately, however, when the focus area is broadened, e.g., to encompass the entire image, the optical asymmetry also increases, and therefore the resulting focus of the image becomes off towards the edges of the image.
As an attempt to address this issue, a lens may be added to an SLR camera. However, there may be spatial limitations in a camera that may make addition of a lens difficult.
An SLR camera that offers a broad focus area while addressing the optical asymmetry without requiring an additional lens is thus desired.

Single lens reflex camera comprising a focus detecting apparatus and method of photographing


A filtration apparatus is provided which is easy to maintain, manage and which enables preservation of filtration characteristics due to the fact that filtration is carried out by use of a gelatinous filter apparatus. In the filtration apparatus, filtration characteristics can be maintained by providing a bubble supplying mechanism for removing a sedimentary layer comprising removables that is formed on a surface of a filtration film and a filtration characteristics restoring mechanism for restoring the filter film clogged by the removables by causing a back-flow of filtered water accumulated in a cistern. Filtration apparatus maintenance and management are facilitated by improving recovery efficiency of the precipitated removables by tapering a lower part inside a raw water tank and providing a recovery tank for recovering removables via a valve.

At present, companies are faced with very important and challenging ecological issues such as reducing industrial waste, sorting out industrial waste and recycling or avoiding discharge of industrial waste into the nature. One type of industrial waste comprises various fluids containing contaminants.
These fluids have different denominations, such as for instance sewage water, drainage, effluent, etc., but in the description to follow, fluids, like for example water, chemicals, etc. comprising materials which are contaminants are called wastewater. Such wastewater is filtered using very expensive filtration apparatuses to remove the contaminants therein. The resulted clean water is recycled, whereas the separated contaminants or the residues which could not be filtered are disposed of as industrial waste. In particular, water is filtered to a level of purity which meets the environmental standards and is then discharged into the nature, in rivers, seas, or the like, or is otherwise recycled.
However, the usage of these filtration apparatuses is extremely difficult and becomes an environmental issue in itself due to a high running cost and equipment cost, etc. of the filtration process, etc.
As can be understood from the above, technology and techniques for wastewater treatment raise an important issue in terms of environmental pollution and recycling and therefore a system with a low initial cost and low running cost is promptly required.
An example of wastewater treatment in the semiconductor field is described in the following. When a plate-like metal, semiconductor or ceramic, etc. is polished or ground, a liquid such as water, etc. is showered on the polishing (grinding) jig and the plate due to considerations such as prevention of temperature rise of the polishing (grinding) jig, etc. caused by friction, improvement of lubricating property, prevention of polishing waste or cutting waste adherence, etc. to the plate.
In more detail, pure water is caused to flow during the process of dicing or backgrinding a semiconductor wafer comprising a plate-like semiconductor material. In a dicing apparatus, a flow of pure water is provided on the semiconductor wafer or pure water is showered by means of a discharge nozzle such that the blade is exposed to the pure water in order to prevent a rise in the temperature of the dicing blade and prevent adherence of dicing waste to wafer. Pure water is also used due to similar considerations in a process of thinning the wafer by backgrinding.
The wastewater containing polishing waste or grinding waste discharged from the above dicing apparatus or backgrinding apparatus is filtered and the clean water obtained thereby is returned into nature or is recycled, whereas the concentrated wastewater is recovered.
At present, two methods are employed in the semiconductor manufacturing process for the treatment of wastewater containing contaminants (waste) comprising mainly Si: the flocculation method and a method combining filter filtration and a centrifugal separator.
In the flocculation method, PAC (polychlorinated aluminum) or Al2(SO4)3 (aluminum sulfate), or the like is mixed in the wastewater as flocculant to generate a reaction with the Si and filtration is carried out by removing the reaction.
In the method combining filter filtration and a centrifugal separator, after the wastewater is filtered, the concentrated wastewater is fed to the centrifugal separator and silicon waste is collected as sludge, whereas the clean water resulted from the filtration process is discharged into the nature or is recycled.
For instance, wastewater generated in the dicing process is collected in a raw water tank 201 and is fed to a filtration apparatus 203 via pump 202 as shown in FIG. 16. The filtration apparatus 203 is provided with a ceramic and an organic filter F and the water filtered thereby is fed to a recycled water tank 205 via a pipe 204, to be further recycled or discharged into the nature.
The filtration apparatus 203 is periodically washed due to clogging of the filter F. The filter F is back-washed with the water inside the recycled water tank 205 by closing valve B1 provided in the raw water tank 201 and opening valve B3 and valve B2 which feed washing water from the raw water tank 201. The wastewater thus generated and having a high concentration of Si waste mixed therein is returned to the raw water tank 201. The concentrated water in the concentrated water tank 206 is fed to the centrifugal separator 209 by means of a pump 208 and the centrifugal separator 209 separates the sludge and the separate liquid. The sludge comprising Si waste is collected in a sludge recovery tank 210, whereas the separate liquid is collected in a separate liquid tank 211. The wastewater in the separate liquid tank 211 containing the separate liquid is fed to the raw water tank 201 by means of a pump 212.
These methods are also employed when collecting waste generated during polishing and grinding of, for instance, solids mainly comprising metal materials such as Cu, Fe, Al, etc., or solids comprising inorganic materials such as plates, ceramic, etc., or plates, etc.
On the one hand, the CMP (Chemical-Mechanical Polishing) method has emerged as a novel semiconductor process technology. The CMP technology was brought about by the achievement of plane insulating film devices and by the implementation of embedded structures comprising a material different from the material of the substrate.
Plane insulating film devices are formed by forming a highly accurate micropattern using the lithography technology. Together with the Si wafer attachment technology, etc., this achievement provides the potential for the implementation of three-dimensional ICs.
With respect to the implementation of embedded structures, conventionally, a technology is used where tungsten (W) is embedded in the multilayer wiring of an IC. Here, W is embedded in the grooves of an interlayer film by the CVD method and a surface thereof is planarized by etch-back. However, recently, the CMP method is used in the planarization process. The embedding technology can be applied in the Damascene process and elements separation. The CMP technology and its applications are described in detail in "CMP Science" published by Science Forum.
Next, the mechanism of the CMP technology is described. As shown in FIG. 17, a semiconductor wafer 252 is placed on an abrasive cloth 251 provided on a rotating table 250 and the uneven surface of the wafer 252 is leveled by lapping, polishing and chemical etching while causing a polishing material (slurry) 253 to flow. Planarization is obtained by a mechanical polishing process between a chemical reaction of a solvent included in the polishing material 253 and a polishing abrasive coating included in the abrasive cloth and the polishing material. Foamed polyurethane, non-woven cloth, etc. can be used as the abrasive cloth 251, whereas the polishing material is a material comprising polishing abrasive coating such as silica, alumina, etc. mixed with water comprising a pH adjuster, and is generally known as slurry. Lapping is carried out by applying a constant pressure while rotating the wafer 252 in the abrasive coat and causing the slurry 253 to flow. A dresser 254 has the function of maintaining the polishing capabilities of the abrasive cloth 251 and always keeps a surface of the abrasive cloth 251 in a dressed state. Motors 202, 208 and 212 and belts 255, 256 and 257 are also provided.
The above-described mechanism is constructed as a system, as shown in FIG. 18. This system can be divided in a wafer cassette, loading/unloading station 260, a wafer reprint mechanical section 261, a polishing mechanical section 262 as described with reference to FIG. 17, a wafer washing mechanical section 263 and a control system controlling all these elements.
First, the cassette 264 comprising wafers is placed in the wafer cassette loading/unloading station 260 and a wafer inside the cassette 264 is removed. Next, the wafer reprint mechanical section 261 holds the wafer with, for instance, a manipulator 265 and places it on the rotating table 250 provided in the polishing mechanical section 262. Planarization of the wafer is carried out using the CMP technology. When the planarization process is finished, the wafer is fed to the washing mechanical section 263 by the manipulator 266 and is washed in order to wash away the slurry. The washed wafer is housed in a wafer cassette 266.
The amount of slurry used in one process is, for instance, around 500 cc to 1 liter/wafer. Also, pure water is caused to flow in the polishing mechanical section 262 and wafer washing mechanical section 263. Thus, the total amount of wastewater, at drainage, discharged in one planarization process is around 5 liters to 10 liters/wafer. For example, in case of a 3-layered metal, the planarization process is carried out about 7 times for metal planarization and interlayer dielectric film planarization, accordingly, the wastewater amount discharged until one wafer is completed is 5 to 10 liters multiplied by 7. Thus, it can be understood that by using the CMP apparatus, the amount of slurry diluted by pure water and discharged is quite large. The wastewater is then treated by the flocculation method.
However, with the flocculation method, chemicals are injected as flocculants. Nevertheless, it is extremely difficult to specify the amount of chemicals that fully react and a large amount of chemicals which do not react is left. By contrast, if the amount of chemicals is low, not all of the contaminants are coagulated and are left un-separated. In particular, if the amount of the chemicals is large, chemicals are left in the clear supernatant liquid and therefore, because chemicals remain in the filtered liquid, reuse thereof is impossible at when further chemical reactions need to be carried out.
Flocks which are reactions of the chemicals and contaminants are generated by the suspension of algae. The formation of flocks requires very strict pH conditions, an agitator, a pH measurement device, a flocculating agent implantation device, and a controlling device, for controlling all of these elements, etc. Also, in order to stabilize and cause precipitation of the flocks, a huge precipitation tank is required. For instance, for a wastewater processing capability of 3 m3/1 h, a tank having about 3 meters in diameter and about 4 meters in depth (around 15 tones) is needed, so that the entire system becomes a huge system requiring a compound of about 11 meters by 11 meters.
However, there are also flocks that keep floating without precipitating in the precipitation tank. It is therefore possible that they are discharged to the exterior and recovery thereof is very difficult. Due to size considerations, initial cost of this system is expensive, reuse of water is difficult and the running cost generated by the use of chemicals is very expensive.
In a method combining filter filtration (5 m3/1 h) and a centrifugal separator, as shown in FIG. 16, a filter F (it is called a UF module and comprises polysulfone fiber or ceramic filter) is used in the filtration apparatus 203 which enables reuse of water. Four filters F are attached in the filtration apparatus 203, one filter costing around 50000 yen and having a life span of no more than a year. Due to the fact that filter F is a pressurized filtration method, the filter clogs and the load to the motor of pump 202 increases thus requiring a high-capacity pump 202. Moreover, ⅔ of the wastewater passing through the filter F are returned into the raw water tank 201 and because the wastewater containing removables is supplied using pump 202, the inner walls of the pump 202 are chipped and the life span of the pump 202 is extremely short.
To summarize, running cost, including extremely high power consumption by the motor, high costs associated with replacement of the pump P and filter F, becomes extremely high.
Moreover, with the CMP method, in the dicing process, a very large amount of wastewater is discharged. Colloid slurry is distributed in the fluid, but due to a Brownian motion, they do not precipitate. Particles of the abrasive coating mixed in the slurry have a diameter of 10 thru 200 nm, in other words, they are very fine particles. Consequently, when the slurry comprising very fine abrasive coating is filtered through the filter, particles enter the holes provided in the filter causing clogging. The filter clogs very frequently so that it is impossible to filter a large amount of wastewater.
As can be understood from the above description, in order to remove as much as possible all materials that may cause damage to the environment and to recycle filtered fluid and removables separated in the filtration process, the wastewater filtration system becomes a huge system due to various additional apparatuses, thus triggering extremely high initial cost and running cost. Accordingly, wastewater treatment apparatuses until now, could not be easily installed and used for wastewater treatment.
When using a self-generated film (pre-coat filter) to filter the wastewater, control of the pump carrying out filtration is very difficult.
Furthermore, in order to recover the removables precipitated at the bottom of the tank, filtration process is temporarily halted in order to discharge the fluid inside the tank. This led to a reduction of filtration efficiency.
Also, when filtration is carried out in a filtration apparatus having a self-generated filter, there is no appropriate method of removing the self-generated film which clogged.