Disclosed is a phase calibration method for inserting a calibration signal (SC) into main signals (SM1 to SMn) of a plurality of branches in turn, estimating the phase characteristic of an analog circuit to which a respective one of the main signals is input and calibrating the phase of each main signal. The method includes steps of outputting a first combined signal obtained by combining output signals from the analog circuits (62a to 62n) in all branches, outputting a second combined signal obtained by combining the main signals in all branches, extracting the calibration signal by removing the second combined signal from the first combined signal in a calibration signal extracting unit (64), estimating the phase characteristics of the analog circuits, to which the main signals having the inserted calibration signal are input, based upon a change in phase of the calibration signal, and subjecting the main signals to phase adjustment having characteristics that are opposite the phase characteristics.

This invention relates to a phase calibration method and apparatus. More particularly, the invention relates to a phase calibration method and apparatus for inserting a calibration signal into a main signal, inputting the resultant signal to a prescribed circuit and calibrating the phase of the main signal based upon a change in the phase of the calibration signal contained in the output signal of the circuit.
In an adaptive array antenna system known in the art, a base station or a mobile station in a communication system is provided with a plurality of antennas and transmitters and the phases and amplitudes of the ratio waves produced by each of the antennas are controlled independently to form a transmit beam pattern in such a manner that the peak of the pattern will point in a prescribed direction.
FIG. 17 is a diagram illustrating the configuration of a base-station adaptive array antenna system. A direction estimating unit 1 receives a signal that has been transmitted from a mobile station and estimates the direction in which the mobile station lies. A transmit beam former 2 controls the phases and amplitudes of radio waves that are output from antenna elements A#1 to A#n of an array antenna 3, thereby forming a transmit beam pattern in such a manner that the peak of the pattern will point in the direction of the mobile station. The transmit beam former 2 includes a weight controller 2a for outputting amplitude and phase adjustment values ωi, φi of the antenna elements A#1 to A#n in such a manner that the peak will point in the direction of the mobile station, and amplitude and phase adjusting units 2b1 to 2bn for adjusting the transmit-signal amplitudes and phases, which are input to the antenna elements A#1 to A#n, by ωi, φi. DA converters 4a to 4n convert signals, which are output from the amplitude and phase adjusting units 2b1 to 2bn, to analog signals. Analog circuits 5a to 5n each have a mixer 6a, local oscillator 6b, filter 6c and high-frequency amplifier 6d. The mixers 6a of the analog circuits 5a to 5n multiply the transmit signals that are output from the DA converters 4a to 4n by the outputs of the local oscillators and up-convert the signal frequencies from baseband to high frequency. The filters 6c pass desired band components, and the frequency amplifiers 6d subject the filter outputs to high-frequency amplification and apply the amplified signals to the corresponding antenna elements A#1 to A#n. In accordance with the adaptive array antenna system of FIG. 17, the transmit beam pattern can be formed in such a manner that the peak points in the direction of the mobile station.
A problem which arises in the adaptive array antenna system of FIG. 17 is a deviation in each branch ascribable to variations in the amplitude and phase of the analog component parts. This is illustrated in FIG. 18. In a case where it is assumed that the weighting coefficients in weighting control have the same values for all branches, the phases after weighting control will all be identical in the digital section. However, when the signals reach the antennas through the analog circuits 5a to 5n after the digital-to-analog conversion, the phases in each of the branches will exhibit a deviation from one branch to the next. Fabricating the analog circuits 5a to 5n so as to eliminate such deviation is not impossible but is impractical. It is believed difficult to fabricate the analog circuits so as to eliminate fluctuations in manufacturing cost and temperature characteristics and fluctuations ascribable to aging. What is required, therefore, is a phase calibrator. FIG. 19 is a diagram illustrating the configuration of an adaptive array antenna system having a phase calibrator. Specifically, a phase calibrator 7 is provided on the output side of the transmit beam former 2 that performs weighting control. The phase calibrator 7 has phase adjusters 7a1 to 7an for adjusting transmit-signal phase input to the antenna elements, and a phase controller 7b for generating phase adjustment values. The phase calibrator 7 corrects for the phase changes in the analog circuits 5a to 5n. That is, the phase calibrator 7 exercises control so as to apply a phase correction having characteristics opposite the phase characteristics of the analog circuits 5a to 5n, as a result of which the phases will agree at the array antenna 3.
In order to perform the calibration shown in FIG. 19, it is necessary to observe the signals that have passed through the analog circuits 5a to 5n and measure the phase characteristics (phase lead/lag characteristics) of the analog circuits. Adaptive array antenna systems each having a structure for this purpose are illustrated in FIGS. 20 and 21.
In order to calibrate phase, it is necessary to insert a calibration signal into the transmit signals of each of the branches in turn, input the resultant signals to the analog circuits 5a to 5n and measure a change in the phase of the calibration signal contained in the output signal of each analog circuit. There are two methods of doing this. According to one method, as shown in FIG. 20, signals extracted from the outputs of the analog circuits 5a to 5n of respective ones of the branches are selected one at a time by a switch 8, subjected to an analog-to-digital conversion by an AD converter 9 and fed back to the phase calibrator 7. According to the other method, as shown in FIG. 21, the outputs of the analog circuits 5a to 5n are combined by a combiner 10, after which the combined signal is converted to a digital signal by the AD converter 9 and fed back to the phase calibrator 7.
In FIGS. 20 and 21, the phase calibrator 7 includes the phase adjusters 7a1, to 7an for adjusting the transmit-signal phases of each of the branches; the phase controller 7b for generating the phase adjustment values, which are for applying a phase correction having characteristics opposite the phase characteristics of the analog circuits 5a to 5n, and inputting the corrected signals to the phase adjusters 7a1 to 7an; a calibration signal generator 7c for generating a calibration signal; adders 7d1, to 7dn for inserting the calibration signal into the transmit signals of respective ones of the branches; a phase estimation unit 7e for estimating the phase characteristics of each of the analog circuits 5a to 5n using the calibration signal that has been fed back; and a calibration controller 7f for controlling the overall phase calibrator.
FIG. 22 is a diagram useful in describing the timing at which the calibration signal is inserted into the transmit signals on each of the branches. A calibration signal SC is not inserted into transmit signals SM1 to SMn of the respective branches simultaneously but at different times. That is, the phase of a branch into which the calibration signal SC has been inserted is estimated, a phase adjustment is performed based upon the result and then this is repeated for each branch. In FIG. 22, the branches undergo the phase adjustment one after another in regular order. However, no problems arise even with an arrangement in which the phase adjustment is carried out collectively after the phases of all branches have been estimated.
With the scheme of FIG. 20 that employs switching, only a transmit signal SMi of a branch into which the calibration signal SC has been inserted, as well as this calibration signal SC, is fed back to the phase estimation unit 7e. With the scheme of FIG. 21 that employs combining, however, the transmit signals (SM1+SM2+ . . . SMn) on all branches and the calibration signals SC are fed back to the phase estimation unit 7e, as illustrated in FIG. 23.
FIG. 24 shows the details of the combining scheme. Here the calibration signal SC is spread by a spreading code in a spreader 7g and the spread signal is inserted in turn into transmit signals SMi of branches selected by a selector 7h. Further, a demodulated signal is despread in a despreader 11, the calibration signal is extracted and is input to the phase estimation unit 7e. Each of the analog circuits 5a to 5c is composed of a modulator MD and high-frequency amplifier HFA. Portions of the outputs of the analog circuits are extracted using directional couplers 12a to 12c, the extracted signals are input to the combiner 10, which has a hybrid construction, the combined signal from the combiner 10 is demodulated to a baseband signal by a demodulator 13 and the demodulated signal is input to the spreader 11 after undergoing an analog-to-digital conversion.
An adaptive array antenna system that performs calibration without halting system operation is known in addition to the prior art described above (see the specification of JP 2003-143047A). The latter prior-art system transmits a reference signal Y, extracts a signal component that is correlated with the reference signal from a receive signal and corrects transmission weighting coefficients based upon this signal component.
In the arrangement shown in FIG. 20, the branch signal fed back is selected by the switch 8. Insofar as calibration is performed, phase can be estimated by inputting only the transmit signal of a certain selected branch and the calibration signal that was inserted into this transmit signal to the phase estimation unit 7e. However, there is the possibility that phase deviations between ports (P1Q, P2Q, P3Q, . . . ) of the switch 8 will lead to calibration error. In particular, phase calibration requires that phase deviation be adjusted to a precision of several degrees or less. With the switching arrangement of FIG. 20, however, there are instances where the phase deviation between ports becomes tens of degrees, which is not desirable. Further, an undesirable property of the switch is that its phase characteristic fluctuates owing to environmental conditions such as temperature.
With the arrangement of FIG. 21 in which use is made of a signal obtained by combining the signals of each of the branches in the combiner 10, the problem of phase deviation is eliminated and calibration error can be suppressed. Specifically, a phase deviation between ports can lead to calibration error even when the combiner 10 is used. However, since the combiner 10 employs a hybrid of a microstrip line, for example, there are no mechanical and semiconductor portions and phase deviation is small in comparison with an active element such as a switch. Further, since the combiner (hybrid) 10 is a passive element, it can be considered highly reliable with regard to malfunction.
With the arrangement based upon the combiner 10 in FIG. 21, however, all transmit signals on all branches are combined and fed back. Consequently, in the ratio of the inserted calibration signal SC to the other transmit signals (SM1+SM2+ . . . SMn), as shown in FIG. 23, the calibration signal is small, the calibration signal, which is at the crux of phase estimation, has a poor S/N ratio and hence there is the likelihood of a decline in phase adjustment accuracy. More specifically, the larger the value given by the following equation, the greater the improvement in calibration:(calibration signal)/(transmit signal)=SC/(SM1+SM2+ . . . SMn)With the arrangement of FIG. 21, however, this value is small and a decline in phase estimation accuracy results.
With the scheme shown in FIG. 24, a calibration signal can be extracted by despreading. However, the transmit signal still remains as noise. In order to implement highly precise calibration of within a few degrees, it is necessary to lengthen the time for integrating the results of despreading, thereby improving calibration-signal extraction precision and raising calibration precision, as shown in FIG. 25. However, the problem is that estimation requires a long period of time. Furthermore, in addition to the long period of time needed to integrate the results of despreading, there is an increase in the scale of the circuitry owing to an increase in the number of bits of the integrator. It should be noted that if the noise level is low, the desired calibration precision can be obtained in a short period of time, as indicated by the solid line in FIG. 25.
Further, with the prior art illustrated in the specification of JP 2003-143047A, the implementation for correcting the transmit weighting coefficients branch by branch is complicated. In this example of the prior art, problems similar to those encountered with the switching and combining schemes of FIGS. 20 and 21 arise in a case where shared use is made of weighting coefficient/correction units.


A micro-sized gas detecting device with two electrodes separated by a gap of width ranging from 1 to 500 microns, where the detection is based on emission spectroscopy of gases in an electric discharge across the gap (discharge region) as the gas flows through the region. The characteristic light emitted by molecules during the discharge can be detected directly with photodiodes or transferred through optical fiber and detected with remote optical sensing components. The device can have single or multiple discharge regions in an array so that light emitted can be monitored at different wavelengths simultaneously. The device can operate under gaseous pressure ranging from a few milli-Torr to a few atmospheres. The device consumes little power (50 mW-100 mW) and can be powered with an alternating current and has the potential to be battery powered.

Nitric oxide (NO), along with the other hazardous nitrogen oxides, is known to be involved in and important to many physiologically or clinically important processes. It is also an increasing concern for its environmental impact. Nitric oxide is commonly produced as a byproduct in the combustion processes. Therefore, there is a substantial need for a gas detector that can provide real-time monitoring of nitric oxide, particularly in exhaust gas mixtures, in a sensitive, accurate and economic manner.
Gas chromatography is a scientific method of gas analysis and identification, including trace gas identification such as chemical agent detection. The most sensitive and differentiating gas detectors used in gas chromatography are also the most expensive and bulky. Thus there is the need for less expensive, lighter, highly sensitive and selective gas detectors for gas chromatography.
Gas analysis involves identification and quantification (measuring the partial pressure of each gas) when multiple gases are present in a mixture of gases. The basis of gas identification and quantification for the current invention is emission spectroscopy, which is identification of gases from characteristic light emitted from molecules or atoms. I have developed a nanoliter-sized gas discharge device which causes gases to emit light when they enter a small, high-electric field region. The light from the discharge can be detected by several instruments, including spectrometers (grating or prism based), photodiodes, vacuum photodiodes, and photomultiplier tubes; even the human eye can be used to identify some gases, such as the light emitted from neon (which is the same color emitted by neon signs).
My invention is a micro-discharge device (or an array of devices) through which gas may flow. Gases in the micro-discharge region emit light, which is detected with a photosensor. If there is an array of microdischarge devices, then each micro-discharge device in the detector array has at least one photosensor, and each photosensor may have an optical filter, making it sensitive for a particular wavelength range of interest. Gas may be forced to flow through the device from a pressure differential created by the gas source or from a pump.
Additionally, an electric circuit may be used to monitor the gas discharge characteristics such as a circuit for measuring the voltage or current across the discharge. This measurement can also be used to aid in gas identification since different gases typically have different electronic characteristics.
Fiber optics may be used to direct light from the discharge devices to the optical sensing equipment. My micro-discharge devices have the ability to withstand high temperatures such that they can be used directly in hot gas flow where optical sensing elements often fail to operate. Fiber optics would allow the detector to be located in a chemically reactive and high temperature environment while delivering the light to optical sensing equipment located a few centimeters to a few meters away in a relatively cool ambient atmosphere. This offers another advantage to my detector, that advantage being that little or no gas conditioning needs to be performed before an analysis is made. This speeds the analysis and reduces filtering and pre-conditioning costs.


Sounds in different frequency range are generated from the rear, top and/or front face of the musical tone apparatus, sounds are generated and spread in all directions around the musical tone apparatus, and the tones sound very realistically acoustic. Vibration of the sound board does not resonate, tones generated from the sound board are not changed unintentionally, and tones of real acoustic musical instruments are realized. Vibration from the sound board is not directly transferred to the whole musical tone apparatus, by means of not allowing the sound board to touch the body of the musical tone apparatus and of pressing and fixing the soundboard to the attachment component with the thickness of the attachment component compressed.

1. Field of the Invention
The present invention relates to musical tone apparatus and more particularly to musical apparatus of musical instruments the sound board of which vibrates and generates tones.
2. Description of Prior Art
Heretofore the mechanism of such musical instruments that have a vibrating sound board (vibrating-board, diaphragm) is that an electromagnetic driver (transducer) is joined to the sound board of a piano for instance, tones signals are sent to the electromagnetic driver, the sound board, not the electromagnetic driver, is vibrated, and tones are generated from the sound board.
However, sounds generated; from such a sound board (diaphragm) are somewhat different from tones of real acoustic musical instruments.
3. Related Works
(1) Publication of utility model application No. 60-150894
(2) Publication of patent application No. 8-146949
(3) Publication of patent application No. 8-111896
(4) Publication of patent application No. 4-156799
(5) Publication of patent application No. 53-69624
(6) Publication of patent application No. 4-56996
(7) Publication of patent application No. 5-80748
(8) Publication of patent application No. 5-73039
(9) Unpublished patent application No. 2006-181135
(10) Unpublished patent application No. 2006-160054
(11) Unpublished patent application No. 2006-151287
(12) Unpublished patent application No. 2006-141954
(13) Unpublished patent application No. 2006-135899

Kawai Musical Instruments Mfg. Co., Ltd.


The invention provides a method for forming a deep well region of a power device, including: providing a substrate with a first sacrificial layer thereon; forming a first patterned mask layer on the first sacrificial layer exposing a first open region; performing a first doping process to the first open region to form a first sub-doped region; removing the first patterned mask layer and the first sacrificial layer; forming an epitaxial layer on the substrate; forming a second sacrificial layer on the epitaxial layer; forming a second patterned mask layer on the second sacrificial layer exposing a second open region; performing a second doping process to the second open region to form a second sub-doped region; removing the second patterned mask layer; performing an annealing process to make the first and the second sub-doped regions form a deep well region; and removing the second sacrificial layer.

1. Field of the Invention
The present invention relates to a method for forming a deep well, and in particular relates to a method for forming a deep well region of a high power device.
2. Description of the Related Art
Traditional high power devices are provided with vertical double diffused MOSFETs (VDMOSFETs) and lateral double diffused MOSFETs (LDMOSFETs), wherein a double diffused MOSFET is representative of a lateral structure and a trench power transistor is representative of a vertical structure.
For forming a high power tolerance laterally diffused metal oxide semiconductor, usually an n-type drift region with low concentration is used to form a high power tolerance structure, and techniques, such as reduce surface field (RESURF) and field-plate are used to perform an optimum adjustments. For forming a high power device (voltage tolerance 300-1000 V), an n-type deep well region with low concentration is usually used for forming a high power tolerance structure. The processes for forming a traditional n-type deep well region are as shown in FIGS. 1A-1D.
As FIG. 1A shows, a substrate 101 is provided and the substrate 101 has a sacrificial layer 103 thereon. Next, FIG. 1B shows a mask layer formed on the sacrificial layer 103, exposing an open region 107, wherein ion doping is performed to the open region 107 to form a doped region 111. FIG. 1C shows that after the patterned mask layer 105 is removed, an annealing process is performed to diffuse the doped region 111 to form a deep well region 113, thus, to complete the process for forming the deep well region.
However, the process mentioned above needs a long period of time for well diffusion to achieve a desired depth. Therefore, a novel process for forming an n-type deep well region of a high power device is needed to reduce time costs of well diffusion.

Method for forming deep well of power device

Vanguard International Semiconductor Corporation


A power transmission system for a people mover, including a transmission housing; a main shaft extending at least partially through the transmission housing for rotation with respect thereto; a plurality of gears located inside the transmission housing, the plurality of gears adapted to rotate the main shaft; and a flexible coupling adapted to secure the transmission housing to a structural support.

People movers, such as escalators and moving walkways, often include a truss that spans, for example, between different levels in a building. However, in certain applications, the truss may not be required. In either event, when present, the truss supports the weight of the steps, passengers, and other components of the people mover. Typically, the truss also bears the live load of the people mover, e.g., the momentive force that propels the steps and the passengers standing on the steps. For example, in certain embodiments, the main shaft is mounted on the truss at or near the upper end of the truss. The main drive/gearbox then transmits power to the main shaft directly or indirectly. Using the truss to support the main shaft can complicate the installation of the gearbox and/or can limit the possible locations for the gearbox.

Power transmission system for people mover


Provided is a successive approximation AD conversion apparatus that outputs digital output data corresponding to an analog input signal, including a bit selecting section that selects a conversion target bit sequentially from a highest bit of the output data; a data control section that outputs comparison data determining a value of the conversion target bit, each time a conversion target bit is selected; a DA conversing section that outputs an analog comparison signal corresponding to the comparison data; a comparing section that outputs a comparison result between the input signal and the comparison signal, upon the output of the comparison signal by the DA converting section, and that is reset after outputting the comparison result; a completion detecting section that, upon detecting that the comparing section has output the comparison result, outputs a completion signal causing the bit selecting section to select a next conversion target bit, prior to the comparing section being reset; and an output section that outputs output data in which a value of each bit is based on the comparison result by the comparing section.

1. Technical Field
The present invention relates to an AD conversion apparatus. In particular, the present invention relates to an asynchronous successive approximation AD conversion apparatus.
2. Related Art
An asynchronous successive approximation AD conversion apparatus is known as in, for example, Japanese Patent Application Publication No. 7-170185 (referred to hereinafter as "Patent Document 1") and Shuo-Wei Mike Chen, Robert W. Brodersen, "A 6b 600 MS/s 5.3 mW Asynchronous ADC in 0.13 μm CMOS", ISSCC 2006 DIGEST OF TECHNICAL PAPERS, Feb. 8, 2006, p. 574-575, p. 674 (referred to hereinafter as "Non-patent Document 1"). The asynchronous successive approximation AD conversion apparatus changes each bit without synchronizing the changing with a clock.
The asynchronous successive approximation AD conversion apparatus is provided with a completion detecting section that detects whether the comparison performed by the comparator is finished. The asynchronous successive approximation AD conversion apparatus moves on to the processing of the next bit cycle when the completion detecting section detects that the comparator has finished the comparison.
The asynchronous successive approximation AD conversion apparatus in Patent Document 1 is provided with an exclusive NOR gate and two inverter gates having different inverted potentials supplied by the potential difference between an input signal and a comparison signal, as described with reference to paragraph "0013" for example. The exclusive NOR gate outputs a comparison completion signal indicating that the comparison has been finished, when the output values of the two inverter gates are equal to each other.
The AD conversion apparatus disclosed in Non-patent Document 1 is provided with a comparator performing the differentiation operation, e.g. FIG. 31.5.3, and a NAND gate, e.g. the third paragraph of Non-patent Document 1. The NAND gate generates a ready signal indicating initiation of the subsequent bit cycle (paragraph 4) when the differential output signals Qn, Qp of the comparator shown in FIG. 31.5.3 are connected to the positive potential, in other words, when the reset is performed.
The AD conversion apparatus disclosed in Patent Document 1, however, must be provided with two specialized impedance gates serving as potential threshold values for the two different inverted potentials, such as a potential that is ¾ of the power supply potential and a potential that is ¼ of the power supply potential, and therefore the circuit size becomes undesirably large. Furthermore, since the AD conversion apparatus disclosed in Non-patent Document 1 must suspend processing from when the comparator outputs the conversion result to when the reset is preformed, the conversion time becomes undesirably long.
Cited documents:
Japanese Patent Application Publication No. 7-170185
Shuo-Wei Mike Chen, Robert W. Brodersen, "A 6b 600 MS/s 5.3 mW Asynchronous ADC in 0.13 μm CMOS", ISSCC 2006 DIGEST OF TECHNICAL PAPERS, Feb. 8, 2006, p. 574-575, p. 674


An ink cartridge for an ink-jet recording device that includes first and second ink bags adapted to hold ink therein, and an ink channel formed between the first and second ink bags for supplying the first ink bag with the ink from the second ink bag. The ink channel is capable of being opened and closed by a closing mechanism provided to the ink-jet recording device. For example, the ink channel is made of flexible material so that the closing mechanism can close the ink channel by pressing it with a pressing member provided to the closing mechanism. The ink cartridge further includes an ink flow enhancing mechanism that allows the ink to flow smoothly through the ink channel when the ink channel is not closed by the closing mechanism.

The present invention relates to an ink cartridge for an ink-jet recording device, and more particularly, to an ink cartridge having a plurality of ink bags therein.
Generally, an ink-jet recording device is arranged such that an appropriate negative pressure (a pressure lower than atmosphere pressure) is created within an ink-jet printhead in order to maintain an ink meniscus formed in the ink-jet printhead. For example, if ink is supplied to the printhead from an ink bag provided within an ink cartridge, the ink bag is placed lower than the printhead to create negative pressure within the printhead by means of hydraulic head difference. In such an arrangement, however, the liquid level within the ink bag comes lower as the ink is consumed, resulting in change of the hydraulic head difference. Therefore, the dimension of the ink bag in the vertical direction has been limited, not only from reasons arising from the design of the ink-jet recording device, but also to keep the change of the hydraulic head difference within a predetermine range.
Recently, long size printheads, which are provided with a plurality of ink ejecting orifices arranged in the width direction of the recording medium, are widely used in order to increase the recording rate. Long size printheads, however, require large capacity ink bags since they consume large quantities of ink.
Japanese Patent Application Provisional Publication HEI 11-105299 discloses an ink-jet printer that has a flexible sub-tank provided on an ink channel connecting a printhead and a large capacity ink cartridge. A negative pressure is imparted to the printhead by means of hydraulic head difference between the sub-tank and the printhead. The printer provided with the sub-tank can keep the change of the hydraulic head difference caused by the consumption of the ink within a predetermined range while being capable of supplying sufficient amount of ink to the long size printhead from the large capacity ink cartridge.
However, the introduction of the sub-tank into the ink-jet printer requires a complicated ink channel structure and also increases the number of channel joints. Such ink channels may hardly allow bubbles to be discharged therefrom and/or have low ability of sealing gas and water vapor. Further, the flexible sub-tank should be frequently exchanged due to the low durability thereof.
In order to resolve the above-mentioned problem, it is suggested to replace the ink cartridge and the sub-tank with upper and lower ink bags directly connected to each other so that the complex ink channel connecting the ink cartridge and the sub-tank can be eliminated.
In the above case, the upper ink bag and lower ink bag serve as the ink cartridge and the sub-tank, respectively, and the ink flows from the upper ink bag into the lower ink bag due to its own weight. Thus, the consumed ink can be supplied into the lower ink bag (sub-tank bag) from the upper ink bag (the ink cartridge bag) without significant delay as long as the ink cartridge bag contains a large amount of ink. However, time required for supplying ink into the sub-tank bag increases as the amount of ink remaining in the ink cartridge bag decreases. This is because the weight of the ink within the ink cartridge bag decreases and also since the pressure within the ink cartridge bag becomes negative (lower than the atmosphere pressure). Although the printhead has the ability of high speed printing, the increase of the time required for replenishing the sub-tank bag with ink results in increase of the total printing time since the ink-jet recording device have to stop printing during the ink replenishment of the sub-tank bag. In addition, because of the negative pressure in the ink cartridge bag, not all of the ink therein can be consumed, but a small amount will be left.
Therefore, there is a need for an ink cartridge for an ink-jet recording device that is capable of implying negative pressure to the printhead without requiring a sub-tank to be provided within the ink-jet recording device, while being also capable of smoothly supplying a large amount of ink to the printhead irrespective of the ink amount remaining in the ink cartridge.

Ink cartridge for ink-jet recording device


Data classification using stochastic key feature generation includes obtaining a set of training data having associated summaries. The set of training data and associated summaries are used to generate a key feature generation model. Another set of training data having associated categories is also obtained, and the key feature generation model is used to map this other set of training data to a set of vectors. A data classifier is then trained based on the set of vectors and the associated categories.

Classification of data into classes or categories is an often-performed function. One example of such data classification is text classification, which can be used to automatically assign natural language texts into a number of predefined thematic categories. An example of such text classification is email classification at a help desk—email messages are received and are automatically classified into predefined categories so that they can be better responded-to by the help desk staff.
However, the performance of current classification systems can be lacking, especially in situations where the data is noisy (e.g., where the data includes portion(s) that are not useful for classification). Thus, it would be beneficial to improve the performance of classification systems, and thus improve how well data is classified by such systems.


The present invention provides an automatic train protection method, a vehicle on-board controller and a train based on vehicle-vehicle communication. The method includes: after a present train runs onto a main track, determining an OC with which the present train needs to establish communication; communicating, by the present train, with the OC to obtain train identifiers of all trains within the jurisdiction of the OC; respectively communicating, by the present train, with the train corresponding to each train identifier to obtain current running information of the train corresponding to each train identifier; identifying a front communication neighbor train of the present train; determining that no hidden train exists between the present train and the front communication neighbor train; and calculating current movement authority MA of the present train according to the current position information of the present train and of the front communication neighbor train.

A communication based train control (CBTC) system realizes two-way communication between a train and ground equipment in a wireless communication mode, getting rid of the constraint of realizing train running control with a ground track circuit as the media, and has become a mainstream in design of a signal control system for urban rail transit at present.
The traditional CBTC system based on moving block train-ground communication technology is mainly composed of an automatic train supervision (ATS) system, a data communication system (DCS), i.e. wireless transmission backbone network, a vehicle on-board controller (VOBC) and ground equipment. The ground safety equipment includes a zone controller (ZC), computer interlocking (CI), a trackside signaler, a trackside axle counter, a trackside transponder, and so on. The system is mainly subjected to ground control, the train registers with the ZC, actively accepts the control of the ZC and actively reports to the ZC, the ZC performs train sequencing according to the positions of the trains, calculates the adjacent relationship of the trains on the track, calculates the train movement authority (MA) for the back train according to the tail of the front train, and realizes the interaction of train-ground information through continuous train-ground two-way wireless communication so as to realize train tracking running in a moving block system based on target-distance. As the system is mainly subjected to ground control, much equipment are involved, the system structure is complex, the maintenance and upgrade of the system are quite difficult, the data interaction is cumbersome, and the data instantaneity is not high, thus affecting the train running efficiency.
A moving block control system based on vehicle-vehicle communication is an improvement and upgrading of the traditional CBTC system. In system architecture, the ZC and the CI are merged into the VOBC, only an object controller (OC) for controlling the trackside equipment is arranged on the trackside, the train obtains the position, the running speed and other information of the front train by means of direct communication between the front train and the back train, and the train calculates the MA of the train by itself, and controls the running of the train. The system achieves more flexible control of the train and improves the running efficiency of the train while greatly reducing the construction and maintenance costs of the trackside equipment. In the moving block control system based on vehicle-vehicle communication, as the trains calculates the MA of the present train by itself, therefore in the train tracking running based on the vehicle-vehicle communication, how to ensure the accuracy of calculating the MA of the train is an inevitable important problem for guaranteeing the efficient and safe running of the train.

Automatic train protection method, vehicle on-board controller and train based on vehicle-vehicle communication


A modular hydrostatic bearing for use in precision machine tools and the like, where a load is supported by bolting it to modular bearing carriages or trucks which ride on parallel bearing rails, where the carriages or trucks are kept from making physical contact with the bearing rails by hydrostatic bearing pockets formed in the carriages, and where the bearing rail has two sides and two or more surfaces per side that form load carrying surfaces that the hydrostatic bearing pockets run against, and where the bearing rail load carrying surfaces have precision smooth continuous curves between them, such that the carriage can be formed with a mating surface containing the hydrostatic bearing pockets and also have smooth continuous surfaces between the hydrostatic bearing pockets, such that the carriage can be fitted over the rail with clearance suitable for hydrostatic bearing operation, but greatly reduced leakage flow because there is no direct leakage flow to the atmosphere from between sets of adjacent load carrying hydrostatic bearing pockets; and wherein the special curved profiles of the rails create surfaces with which carriages' hydrostatic bearing pockets react to support a load, and in which the rails also have special contours that create surface self compensating resistance paths directly between the pressure supply grooves and the load-bearing hydrostatic pockets, and in which the special compensation contours are oriented at an angle to the leakage paths from the hydrostatic pockets to the drains, thereby causing flow to the hydrostatic pockets inversely proportional in relation to the amount of bearing gap closure between the pockets and the rail.

Hydrostatic bearings are well known in the machine tool industry to provide the most accurate friction-free motion, and the longest life. With the need for ever greater accuracies to make higher quality parts, and the need for higher production rates which increase total accumulated travel on the machine bearings, an alternative is needed to the popular modular rolling element linear bearings that are commonly sold in the machine tool industry.
One feature of rolling element linear motion bearings is their relatively small profile. Another feature is their ease of use: A machine tool builder need only take the bearing out of the box and bolt it down. In today's world of modular order-what-you-want and it will be easily customized, it would be of great value to have a modular hydrostatic bearing that may be made bolt-for-bolt compatible with existing modular rolling element linear bearings.
There are a great many hydrostatic bearing designs currently available. All require a means to restrict the flow (compensation) as described, for ex ample, by A. H. Slocum in Precision Machine Design, Prentice Hall, Englewood Cliffs. N.J., 1992. Orifice compensated hydrostatic bearings, for example, are well-known in the art.
Unlike bearings that make mechanical contact, surface features cannot create error motions because the fluid layer always keeps components separated. Furthermore, unlike hydrodynamic bearings, the fluid film is kept at a nominal thickness by the external pressure source and the inlet restriction method that creates in effect a Wheatstone bridge fluid circuit. However, unlike a conventional bridge circuit, all the resistors are highly nonlinear, because they are in effect fluid resistors whose resistance is a function of flow between surfaces. Typically, the fluid resistance is a function of the bearing gap to the third power. However, the nominal bearing gaps are typically on the order of 20 microns, but manufacturing errors are on the order of 3 microns. Thus the nominal bearing resistance can vary from (20-3) 3=4913 to (20+3) 3=12167. This represents a threefold variance in initial conditions, whereas to obtain good performance, bridge resistors, which provide compensation to the circuit, should initially be within a few percent of each other. In the past, the inlet resistances have been made from orifices or capillaries, which are tuned to the bearing gaps on an individual basis. As a result, hydrostatic bearing machines are very expensive and have a reputation of being very fickle.
Applying hydrostatic bearing technology to the basic profile rail shape used for existing modular rolling element bearings, however, requires high pressures, in the range of 30 to 100 bar, in order to obtain reasonable load capacity and stiffness characteristics in view of the small surface areas available. The fact that the perimeter of each of the four hydrostatic bearing pockets required to support the bearing carriage is typically open to a drain to the atmosphere, furthermore, causes the flow rate to be very high. Reducing flow rate is highly desirable because it results in more efficient, lower cost filtration, and reduces drainage system cost. Furthermore, reducing flow rate reduces the pump power proportionally, which has major benefits including a lower cost and more compact pumping system, and less heat generation in the bearing fluid, reducing thermal errors.
To provide a durable means for preventing drainage from bearing pockets to the atmosphere, it is highly desirable to provide smooth contours, using large rounds between adjacent load bearing surfaces. In one prior art design with a profile rail, U.S. Pat. No. 4,978,233, all of the profile rails disclosed are formed with sharp edges. Sharp edges and/or very small rounds are, however, highly undesirable for sealing flow between adjacent bearing pockets because the fine edges are highly susceptible to damage and erosion, and also to manufacturing errors due to wear of fine edges on the forming tool. It should be noted, also, that in order to achieve hydrostatic stiffness, for each load bearing surface there must be at least one separate fluid pocket with its own individual pressure compensation means. In one embodiment of the prior art design of U.S. Pat. No. 4,978,233, separate load bearing pockets are not even provided, and hence individual compensation is impossible; and in the other embodiment presented, the compensation means presented using throttling holes is highly impractical because there is no means for tuning the resistances of the throttling holes once the disclosed bearing is assembled, and any such throttling holes shown are susceptible to deformation when the disclosed bearing insert is formed prior to assembly. The patentees, moreover, teach and show sharp-corner discontinuous design wherein a drain region is created between the pockets at the sharp rail corner, and they demonstrate no understanding whatsoever of the need, discovered by applicants herein, for smooth profile contours to prevent axial leakage between the pockets along the rail length, or of applicants discovery and teaching, later detailed, that a smooth blended profile contour between the load regions of the rail achieves a much greater degree of load capacity.
Improved operation is described in U.S. Pat. No. 5,104,237 by applicant Slocum wherein a method for using surface features on the bearings near the bearing pockets is employed to create the inlet fluid resistance. The pressure supply system fluid is therein flowed across a compensator land region to a collector groove which then connects to an opposing pocket by tubing or manifolding. Thus the compensator pocket is opposed to the bearing pocket, and a feedback circuit results.
In U.S. Pat. No. 5,466,071 by applicant Slocum and Wasson, there is disclosed the use of self compensation where the collected fluid is taken to the bearing pad by a thin channel that wraps around a shaft. Intuitively one would think that the fluid must be contained within a channel during its travel to the opposed bearing surface, but analysis showed this not to be true.
The problem with hydrostatic bearings, even those that are self-compensated as above, is that the bearings operate off of rectangular steel rails which are not compatible with existing popular profile bearing rails rolling element linear motion bearings. The pending invention in its revision, stemming from parent application Ser. No. 08/622,843 herein, provides an important solution through a design for a modular hydrostatic bearing that has a very high efficiency based on a special continuous smooth curve profile ground into the envelope of a profile rail bearing. This provides a durable means to cut the leakage flow in half, and enables easy manufacture of the bearing rail and mating carriage, such that orifice compensated, self-compensating, or other types of hydrostatic bearings can now easily be made modular and compatible with modular rolling element bearings admirably useful in linear motion bearing rail applications and the like.
The self-compensated form of the parent application presented herein requires that the fluid in the collector be manifolded to the opposed bearing pocket, while this is well deliverable, in the small spaces allotted to some modular hydrostatic bearings, this manifolding can be expensive. Also, it is difficult to avoid high leakage flows from the compensator supply groove where the small spaces are allotted.
In a similar philosophical approach to the surface compensation used by applicant Slocum and Wasson in said U.S. Pat. No. 5,416,071, the design of the present invention has been further modified in its special herein uses special shapes on the bearing surface to compensate the flow and deliver it directly to the bearing pocket without requiring any special tubing or manifold connections, thereby also enabling the invention to be more economically produced and operated even with small space bearing constructions.
Given these drawbacks, prior art hydrostatic modular linear motion bearings have not heretofore performed satisfactorily and thus have been deemed economically unfeasible.

Modular hydrostatic bearing with carriage form-fit to PR


A power supply circuit is provided with a supplemental power source which is intermittently brought into service each time a main power source is coupled to a high power drain circuit. That is, the supplemental power source is switched to a circuit, which is susceptible to power drop, in response to switching over of the main power source to the high power drain circuit.

1. Field of the Invention
The present invention relates generally to a power supply circuit having a supplemental power source which is intermittently used and which is brought into service each time a main power source is coupled to a high power drain circuit. More specifically, the present invention relates to a power supply circuit wherein the supplemental power source is switched to a circuit, which is susceptible to power drop, in response to switching over of a main power source to a high power drain circuit. The present invention has found extensive use in a power supply circuit of a TDMA (time division multiple access) mobile unit.
2. Description of the Related Art
While the present invention is described in connection with a TDMA mobile radio unit, it will be understood that the present invention may also be applied to a device wherein a high power drain circuit is cyclically energized and induces a relatively large power drop which tends to adversely affect the operation of other circuit(s).
TDMA techniques, in addition to the current extensive use thereof in a satellite communications system, have recently assumed an important role in a mobile digital communications system.
As is well known in the art, in a TDMA mobile communications system, a plurality of mobile units located within a given service area are respectively allowed to communicate with an associated land site using allocated time slots of each consecutive TDMA frame. The time slot used by a given mobile unit has therefore the same period as the TDMA frame. That is, the TDMA mobile unit periodically transmits information within the allocated time slots in short bursts instead of continuously.
Prior to turning to the present invention it is deemed preferable to discuss, with reference to FIG. 1, a known power supply circuit of a TDMA mobile unit to which the present invention is preferably applicable.
A TDMA mobile unit per se is well known in the art and therefore, the overall block diagram thereof is not discussed in detail merely for the purpose of simplifying the discussion. Further, since the present invention is directed to improvements of a power supply circuit, the present invention can readily be understood without reference to signals or data which are used in the TDMA mobile unit and thus, they are omitted from the accompanying drawings for the sake of simplicity.
As shown in FIG. 1, a power source (primary or secondary battery) 10 is coupled so as to supply electric power to an output power amplifier 12 and a frequency synthesizer 14 both of which are arranged in parallel with the battery 10. The battery 10 has its internal resistance depicted by Rin. The power amplifier 12 is to amplify an outgoing signal from the mobile unit and thus consumes a considerable amount of power. Although not shown in FIG. 1, the battery 10 is also coupled to other circuits of the TDMA mobile unit for the purpose of suitable power supply thereto.
A switch 16 is provided between a power line 18 and the output power amplifier 12 in order to implement battery power conservation. More specifically, as mentioned above, the TDMA mobile unit intermittently communicates with an land site using allocated time slots in each consecutive TDMA frame. Therefore, in view of high power drain at the final power amplifier 12, it is highly desirable to supply power thereto only when the power supply is required. To this end, the switch 16 is selectively turned on and off in response to a TDMA transmission timing control signal (depicted by CS) from a controller (not shown).
However, while the power amplifier 12 is energized via the switch 16 which has been closed, a power voltage drop at the line 18 exhibits a relatively large value. This voltage drop tends to undesirably change a reference frequency produced from the frequency synthesizer 14.
The frequency synthesizer 14 is usually configured so as to provide the reference frequency accurate to the required stability over power supply variations. However, it is highly desirable to effectively suppress the power voltage drop in view of its synergistic effects with ambient temperature changes (for example).
For a better understanding of the problem of the above mentioned known power supply circuit, a particular example is given below.
It is assumed that: (a) the voltage of the battery 10 is 4.8V, (b) the internal resistance Rin is 0.5.OMEGA. and (c) the current flowing through the power amplifier 12 is 2A. In this instance, when the power amplifier 12 is energized, the voltage appearing at the power line becomes 3.8V (=4.8-0.5.times.2). The power voltage is therefore lowered by one-volt, which when applied to the frequency synthesizer 14, is liable to undesirably change the reference frequency.
On the other hand, Japanese Laid-open Patent Application No. 62-250876 discloses a supplemental battery which is coupled in parallel with an electrolytic condenser and which is used to compensate for accidental voltage drop or instantaneous power failure on a commercial 3-phase ac (alternate current) power line. That is, the supplemental battery is to compensate for the accidental power drop which adversely affects sequential operations of a voltage invertor which is provided upstream of an ac load such as a 3-phase motor. This related art is not directed to a power supply circuit wherein a supplemental power source is intermittently switched to a circuit susceptible to power drop every time a main power battery supplies power to a high power drain circuit.
It is therefore desired to prevent the intermittently occurring instantaneous potential drop from being supplied to a circuit which is susceptible to such a reduction.

Power supply circuit having an auxiliary power source for compensating for main power drop


A micro-mirror array fabricated on one substrate is bonded to a second substrate that includes addressing electrodes and control circuitry. In one embodiment, the micro mirror array is fabricated from a substrate that is a single crystal material. There is enough area beneath the micro mirror array for electrodes and control circuitry, including memory buffers and a pulse width modulation array to be fabricated on the second substrate.

1. Field of the Invention
This invention relates to spatial light modulators (SLMs), and more particularly to a micro-mirror array with electronically addressable control circuitry for display applications.
2. Background of the Invention
Spatial light modulators (SLMs) have numerous applications in the areas of optical information processing, projection displays, video and graphics monitors, televisions, and electrophotographic printing. Reflective SLMs are devices that modulate incident light in a spatial pattern to reflect an image corresponding to an electrical or optical input. The incident light may be modulated in phase, intensity, polarization, or deflection direction. A reflective SLM is typically comprised of an area or two-dimensional array of addressable picture elements (pixels) capable of reflecting incident lights. Source pixel data is first processed by an associated control circuit, then loaded into the pixel array, one frame at a time.
Prior art SLMs have various drawbacks. These drawbacks include: a lower than optimal optically active area (measured as what fraction of the device's surface area that is reflective, also called the "fill ratio") that reduces optical efficiency, rough reflective surfaces that reduce the reflectivity of the mirrors, diffraction that lowers the contrast ratio of the display, use of materials that have long-term reliability problems, and complex manufacturing processes that increase the expense of the product.
Many prior art devices include substantial non-reflective areas on their surfaces. This provides low fill ratios, and provides lower than optimum reflective efficiency. For example, U.S. Pat. No. 4,229,732 discloses MOSFET devices that are formed on the surface of a device in addition to mirrors. These MOSFET devices take up surface area, reducing the fraction of the device area that is optically active and reducing reflective efficiency. The MOSFET devices on the surface of the device also diffract incident light, which lowers the contrast ratio of the display. Further, intense light striking exposed MOSFET devices interfere with the proper operation of the devices, both by charging the MOSFET devices and overheating the circuitry.
Some SLM designs have rough surfaces, which also reduce reflective efficiency. For example, in some SLM designs the reflective surface is an aluminum film deposited on an LPCVD silicon nitride layer. It is difficult to control the smoothness of these reflective mirror surfaces as they are deposited thin films. Thus, the final product has rough surfaces, which reduce the reflective efficiency.
Another problem that reduces reflective efficiency with some SLM designs, particularly in some top hanging mirror designs, is large exposed hinge surface areas. These large exposed hinge surface areas have to be blocked by a slab, typically made of tungsten, on top of the hinge to prevent the scattering of incident light. These slabs significantly reduce the optically active area and lower the reflective efficiency.
Many conventional SLMs, such as the SLM disclosed in U.S. Pat. No. 4,566,935, have hinges made of aluminum alloy. Aluminum, as well as other metals, is susceptible to fatigue and plastic deformation, which can lead to long-term reliability problems. Also, aluminum is susceptible to cell "memory", where the rest position begins to tilt towards its most frequently occupied position. Further, the mirrors disclosed in the U.S. Pat. No. 4,566,935 patent are released by undercutting the mirror surface. This technique often results in breakage of the delicate micro-mirror structures during release. It also requires large gaps between mirrors, which reduce the fraction of the device area that is optically active.
What is desired is an SLM with improved reflective efficiency, SLM device long-term reliability, and simplified manufacturing processes.

Architecture of a reflective spatial light modulator


Methods and apparatus for training a Neural Network to recover a codeword of a Forward Error Correction (FEC) code are provided. Trainable parameters of the Neural Network are optimised to minimise a loss function. The loss function is calculated by representing an estimated value of the message bit output from the Neural Network as a probability of the value of the bit in a predetermined real number domain and multiplying the representation of the estimated value of the message bit by a representation of a target value of the message bit. Training a neural network may be implemented via a loss function.

Generally, all terms used herein are to be interpreted according to their ordinary meaning in the relevant technical field, unless a different meaning is clearly given and/or is implied from the context in which it is used. All references to a/an/the element, apparatus, component, means, step, etc. are to be interpreted openly as referring to at least one instance of the element, apparatus, component, means, step, etc., unless explicitly stated otherwise. The steps of any methods disclosed herein do not have to be performed in the exact order disclosed, unless a step is explicitly described as following or preceding another step and/or where it is implicit that a step must follow or precede another step. Any feature of any of the embodiments disclosed herein may be applied to any other embodiment, wherever appropriate. Likewise, any advantage of any of the embodiments may apply to any other embodiments, and vice versa. Other objectives, features, and advantages of the enclosed embodiments will be apparent from the following description.
Channel coding is used in communication systems to correct errors that occur during transmission. Modern coding techniques such as turbo codes, used in 3G and 4G, and Low-Density Parity-Check (LDPC) and Polar codes, proposed for 5G, have powerful error-correcting capabilities. Linear block codes can be described by factor graphs, and such graphs are useful in devising iterative decoding algorithms.
Deep Neural networks may be used for the decoding of codes such as linear block codes. An example of existing approaches for decoding of linear block codes using deep neural networks is set out in Eliya Nachmani, Yair Be'ery, and David Burshtein, "Learning to Decode Linear Codes Using Deep Learning" (Reference 1). This approach implements Factor graph-based Sum Product Algorithm (SPA) as discussed in F. R. Kschischang, B. J. Frey, and H.-A. Loeliger. 2006, Factor graphs and the sum-product algorithm. IEEE Trans. Inf. Theor. 47, 2 (September 2006), 498-519 (Reference 3). For certain families of codes (such as BCH or Polar codes) of small to medium length (˜10 to ˜100 bits), the SPA performs poorly owing to the presence of many cycles and trapping sets in the code's factor graph. A Neural Network Decoder (NND) performs better than SPA for such codes. The NND learns to reduce the effect of artifacts, such as cycles or trapping sets in the graph structure, by applying complimentary weights to the messages passed over edges of the graph which form cycles. Weights are learned through a training process. Training parameters such as Input variables, Target variables, Loss function, Regularization, and Optimizer etc., affect the performance of the network during its online phase. In existing approaches, training is performed using "Cross entropy" loss function. Jehoshua Bruck and Mario Blaum, "Neural Networks, error-correcting codes, and polynomials over the binary n-cube", IEEE Transactions on Information Theory, 35(5):976-987, 1988 (Reference 2) introduces the idea of decoding linear block codes using an energy function.
There currently exist certain challenges in the training of NNDs, including, but not limited to, the following. The NND introduced in Reference 1 uses the cross-entropy loss function in its training process. The cross-entropy loss function performs Maximum Likelihood (ML) estimation of the model parameters, such that the estimated probability distribution of the model output reaches close to the empirical probability distribution of the training data (in terms of Kullback-Leibler distance, see also Ian Goodfellow, Yoshua Benigo, and Aaron Courville, "Deep Learning", Cambridge, Mass.: MIT, 2016). However, the training process in NND only allows the network to be trained on a sub-set of data. This leads to loss in performance over a set of data not yet seen by the network. Training also comprises a certain range of values of Signal to Noise Ratio (SNR). At very high SNR, the effect of Added White Gaussian Noise (AWGN) is negligible, leading to no or minor errors in received codeword. At very low SNR, noise will corrupt most of the codewords. When training NND it is important that the network only sees corrupted input codewords that are resolvable to correct codewords by using the redundancies implicit in the factor graph structure but could not be resolved by SPA alone due to its artefacts. Such inputs can only be obtained (with high probability) in a moderate SNR regime. The NND shows loss in performance at low SNR, when trained using cross-entropy loss function on data generated using high SNR. In addition, the cross-entropy loss function trains the weights of the NND in such a way that some weights might be "pinned" to an extreme value. This occurs as a consequence of the steep gradient of the cross entropy loss function (as discussed in greater detail below with reference to FIG. 4). This potential for pinning to extreme values is a disadvantage of the cross-entropy loss function. Existing approaches to training additionally propose training parameters that lead to reduction in Bit-Error-Rate (BER), but do not provide any explicit method for reducing Block-Error-Rate (BLER). In general, for successful decoding, complete an entire block needs to be correctly decoded.
Certain aspects of the present disclosure and their embodiments may provide solutions to these or other challenges. According to certain embodiments, a new loss function (also referred to as a loss metric) for training a neural network decoder is proposed. The loss metric is based on the idea of decoding linear block codes using an energy function, which was introduced by Reference 2. Maximizing the energy function leads to a ML decoding solution for a linear block code. In application to neural networks, some of the constraints on variables of this energy function are relaxed. The loss function is designed by approximating the estimated binary values of the bits of a recovered codeword with their probabilities in a real number domain.
Thus, according to certain embodiments, there is proposed a novel loss metric to train the neural network algorithm designed for decoding using SPA. As compared to standard loss metrics described in prior approaches such as those referenced above, examples of the metric proposed herein seek to improve performance for an entire range of SNR values, including SNR values not yet seen by the NN. Although cross-entropy loss function provides ML solution for model parameters, it does so for the training data provided. The loss metric proposed herein is more problem-specific, and provides a solution that is more generally-applicable to the problem at hand.
There are, proposed herein, various embodiments which address one or more of the issues disclosed herein. The solutions proposed herein may be embodied in any radio receiver, including, for instance, eNB, UE, or cloud implementation, in particular for short message communications.
According to a first aspect of the present disclosure, there is provided a method for training a Neural Network (NN) to recover a codeword of a Forward Error Correction (FEC) code from a received signal, wherein layers of the NN implement sequential iterations of the Sum Product Algorithm (SPA) and wherein the received signal comprises a transmitted codeword and channel impairments. The method comprises inputting to an input layer of the NN a representation of message bits of a transmitted codeword obtained from a received signal and propagating the representation through the NN. The method further comprises calculating a loss function, and optimising trainable parameters of the NN to minimise the loss function. Calculating a loss function according to this aspect of the present disclosure comprises, for bits in the transmitted codeword, representing an estimated value of the message bit output from the NN as a probability of the value of the bit in a predetermined real number domain, and multiplying the representation of the estimated value of the message bit by a representation of a target value of the message bit.
According to examples of the present disclosure, the channel impairments may comprise added noise, such as for example Added White Gaussian Noise (AWGN), fading and/or interference.
According to examples of the present disclosure a target value of the message bit may comprise the actual value (1 or 0 in the binary case) of the message bit of the transmitted codeword.
According to examples of the present disclosure, calculating a loss function may further comprise averaging, over all bits in the transmitted codeword, the values obtained from multiplying, for bits in the transmitted codeword, the representation of the estimated value of the message bit by a representation of a target value of the message bit.
According to examples of the present disclosure, representing an estimated value of the message bit output from the NN as a probability of the value of the bit in a real number domain may comprise obtaining a probability of the value of the bit from a layer of the NN, and transforming the obtained probability to a value within the predetermined real number domain.
According to examples of the present disclosure, the predetermined real number domain may be [−1, 1] and transforming the obtained probability to a value within the predetermined real number domain may comprise performing a linear transformation on the obtained probability.
According to examples of the present disclosure, the representation of the target value of the message bit may comprise a value of the message bit after modulation using a modulation technique applied to the transmitted codeword.
According to examples of the present disclosure, calculating a loss function may comprises calculating the loss function on the basis of an estimated value of the message bit output from an output layer of the NN.
According to examples of the present disclosure, the loss function may comprise:
            L      f      E                  (              p        ,        y            )        =                    -        1            N                          ∑                  n          =          1                N                          (                              (                          1              -                              2                                                  p                                                        (                    n                    )                                                                        )                                                        (                              -                1                            )                                      y                                            (                n                )                                                    )            wherein:
N is the number of bits in the transmitted codeword;
p(n) is the probability of the value of the nth bit of the transmitted codeword output by the NN being 1; and
y(n) is the target value of the nth bit of the transmitted codeword.
According to examples of the present disclosure, calculating a loss function may comprise calculating the loss function on the basis of estimated values of the message bit output from even layers of the NN.
According to examples of the present disclosure, the loss function may comprise:
          L    M    E      (       p    ,    y      )    =              -     1        MN                  ∑                  l       =       2            ,      4      ,      …                2            M                       (                  ∑               n        =        1              N                          (                        (                   1          -                     2                                  p                        (                         l             ,             n                        )                                       )                                           (                     -           1                    )                            y                    (          n          )                               )                )          wherein:
N is the number of bits in the transmitted codeword;
2M is the number of hidden layers in the NN;
p(n) is the probability of the value of the nth bit of the transmitted codeword output by the l-th layer of the NN being 1; and
y(n) is the target value of the nth bit of the transmitted codeword.
According to examples of the present disclosure, the training codeword may comprise a codeword of a binary linear block code.
According to examples of the present disclosure, the representation of message bits obtained from a received signal that is input to the input layer of the NN may comprise an array of Log-Likelihood Ratios (LLRs) of the individual message bits obtained from the received signal. According to examples of the present disclosure, the LLRs of the individual message bits obtained from the received signal may be calculated using the formula: log(p(b[n]=0) p(b[n]=1)).
According to examples of the present disclosure, the NN may comprise a Neural Network Decoder (NND).
According to another aspect of the present disclosure, there is provided a computer program comprising instructions which, when executed on at least one processor, cause the at least one processor to carry out a method according to any one of the preceding aspects or examples of the present disclosure.
According to another aspect of the present disclosure, there is provided a carrier containing a computer program according to the preceding aspect of the present disclosure, wherein the carrier comprises one of an electronic signal, optical signal, radio signal or computer readable storage medium.
According to another aspect of the present disclosure, there is provided a computer program product comprising non transitory computer readable media having stored thereon a computer program according to a preceding aspect of the present disclosure.
According to another aspect of the present disclosure, there is provided a controller for training a Neural Network (NN) to recover a codeword of a Forward Error Correction (FEC) code from a received signal, wherein layers of the NN implement sequential iterations of the Sum Product Algorithm (SPA), and wherein the received signal comprises a transmitted codeword and channel impairments. The controller comprises a processor and a memory. The memory contains instructions executable by the processor such that the controller is operable to input to an input layer of the NN a representation of message bits of a transmitted codeword obtained from a received signal and propagate the representation through the NN. The controller is further operable to calculate a loss function and optimise trainable parameters of the NN to minimise the loss function. Calculating a loss function according to this aspect of the present disclosure comprises, for bits in the transmitted codeword, representing an estimated value of the message bit output from the NN as a probability of the value of the bit in a predetermined real number domain and multiplying the representation of the estimated value of the message bit by a representation of a target value of the message bit.
According to examples of the present disclosure, the channel impairments may comprise added noise, such as for example Added White Gaussian Noise (AWGN), fading and/or interference.
According to examples of the present disclosure, the controller may be further operable to carry out a method according to any one of the preceding aspects or examples of the present disclosure.
According to another aspect of the present disclosure, there is provided a controller for training a Neural Network (NN) to recover a codeword of a Forward Error Correction (FEC) code from a received signal, wherein layers of the NN implement sequential iterations of the Sum Product Algorithm (SPA) and wherein the received signal comprises a transmitted codeword and channel impairments. The controller is adapted to input to an input layer of the NN a representation of message bits of a transmitted codeword obtained from a received signal and to propagate the representation through the NN. The controller is further adapted to calculate a loss function and optimise trainable parameters of the NN to minimise the loss function. Calculating a loss function according to this aspect of the present disclosure comprises, for bits in the transmitted codeword, representing an estimated value of the message bit output from the NN as a probability of the value of the bit in a predetermined real number domain, and multiplying the representation of the estimated value of the message bit by a representation of a target value of the message bit.
According to examples of the present disclosure, the channel impairments may comprise added noise, such as for example Added White Gaussian Noise (AWGN), fading and/or interference.
According to examples of the present disclosure, the controller may be further adapted to carry out a method according to any one of the preceding aspects or examples of the present disclosure.
According to examples of the present disclosure, the controller may comprise a virtualized network function.
According to another aspect of the present disclosure, there is provided a base station comprising a controller according to any one of the preceding aspects or examples of the present disclosure.
According to another aspect of the present disclosure, there is provided a wireless device comprising a controller according to any one of the preceding aspects or examples of the present disclosure.
Certain embodiments may provide one or more of the following technical advantages. Examples of the proposed loss metric may lead to improvement in performance of the NND in its online phase (i.e., when the NND is used for decoding transmitted information) across all SNR values. Examples of the proposed loss metric may also lead to faster training. Other technical advantages may also be provided, and certain embodiments may provide some, none, or all of the advantages listed above.

This patent is subject to a terminal disclaimer.


A method for reconstructing a ligament. In one form of the invention, there is disclosed a method for securing a graft ligament in a bone tunnel, the method comprising the steps of: (1) forming a first bone tunnel in a bone, and forming a second bone tunnel in the same bone, the second bone tunnel being transverse to, and intersecting, the first bone tunnel; (2) positioning a flexible member in the second transverse bone tunnel so that the flexible member extends across the first bone tunnel, and positioning the graft ligament in the first bone tunnel, independently of the flexible member, so that the graft ligament is looped over the flexible member; and (3) positioning a crosspin over the flexible member and in the second transverse bone tunnel so that the graft ligament is looped over, and may be supported by, the crosspin.

This invention relates to medical devices and procedures in general, and more particularly to medical devices and procedures for reconstructing a ligament.
A ligament is a piece of fibrous tissue which connects one bone to another.
Ligaments are frequently damaged (e.g., detached or torn or ruptured, etc.) as the result of injury and/or accident. A damaged ligament can impede proper motion of a joint and cause significant pain.
Various procedures have been developed to repair or replace a damaged ligament. The specific procedures used depend on the particular ligament which is to be restored and on the extent of the damage.
One ligament which is frequently damaged as the result of injury and/or accident is the anterior cruciate ligament (ACL). Looking now at FIG. 1, the ACL 5 extends between the top of the tibia 10 and the bottom of the femur 15. A damaged ACL can cause instability of the knee joint and cause substantial pain and arthritis.
Numerous procedures have been developed to restore the ACL through a graft ligament replacement. In general, and looking now at FIG. 2, these ACL replacement procedures involve drilling a bone tunnel 20 through tibia 10 and up into femur 15. Then a graft ligament 25, consisting of a harvested or artificial ligament or tendon(s), is passed through the tibial portion 30 of tunnel 20 (sometimes referred to as xe2x80x9cthe tibial tunnelxe2x80x9d), across the interior of the joint, and up into the femoral portion 35 of tunnel 20 (sometimes referred to as xe2x80x9cthe femoral tunnelxe2x80x9d). Then a distal portion of graft ligament 25 is secured in femoral tunnel 35, and a proximal portion of graft ligament 25 is secured in tibial tunnel 30.
There are numerous ways in which graft ligament 25 may be positioned in tunnel 20 and secured in position.
One such way is disclosed in U.S. Pat. No. 5,918,604, issued 07/06/99 to Whelan for METHOD OF LOADING TENDONS INTO THE KNEE. According to this patent, the ligament may be towed up tibial tunnel 30 and femoral tunnel 35 and then secured in femoral tunnel 35 with a crosspin.
More particularly, and looking now at FIG. 3, the bone tunnel 20 is formed by drilling through tibia 10 and up into femur 15, whereby to form tibial tunnel 30 and femoral tunnel 35. Then a transverse bone tunnel 40 is formed in femur 15 so that transverse bone tunnel 40 intersects femoral tunnel 35. Bone tunnel 20 bifurcates transverse bone tunnel 40 into two tunnel portions, a first transverse bone tunnel portion 45 and a second transverse bone tunnel portion 50.
After transverse bone tunnel 40 has been formed, a flexible member 55 is used to draw graft ligament 25 up into place.
More particularly, according to the aforementioned U.S. Pat. No. 5,918,604, this is done by threading flexible member 55 through transverse bone tunnel 40. Then a crochet-hook device (not shown in FIG. 3) is passed up tibial tunnel 30, across the interior of the knee joint, and up femoral tunnel 35. The crochet-hook device is used to hook flexible member 55 at the intersection of bone tunnel 20 and transverse bone tunnel 40. Then the crochet-hook device is used to pull flexible member 55 down femoral tunnel 35, across the interior of the knee joint, down tibial tunnel 30, and out the front side of tibia 10. Next, graft ligament 25 is looped over flexible member 55 (FIG. 3). One or both free ends of flexible member 55 is/are then pulled away from femur 15, whereby to pull flexible member 55, and hence the looped graft ligament 25, up tibial tunnel 30, across the interior of the knee joint, and then up into femoral tunnel 35 (FIG. 4).
Once flexible member 55 and graft ligament 25 have assumed the position shown in FIG. 4, the graft ligament may be retained in that position by passing a cannulated crosspin 60 over flexible member 55 into transverse bone tunnel 40 so that the crosspin extends under graft ligament 25 and supports the looped graft ligament within femoral tunnel 35. Then flexible member 55 is withdrawn from the surgical site.
Unfortunately, the method taught in U.S. Pat. No. 5,918,604 suffers from a number of drawbacks.
For one thing, use of this method can result in erosion of the patient""s bone. More particularly, and looking now at FIG. 5, flexible member 55 must first be drawn down femoral tunnel 35, across the interior of the knee joint, and then down tibial tunnel 30 in order to pick up graft ligament 25; and then later, flexible member 55 must be drawn back up tibial tunnel 30, across the interior of the knee joint, and then back up femoral tunnel 35 in order to carry graft ligament 25 into position. These actions cause flexible member 55 to engage the bone which is located at the intersection of femoral tunnel 35 and transverse bone tunnel 40, i.e., to engage the bone edges 65 (FIG. 5). This engagement between flexible member 55 and bone edges 65 can cause bone edges 65 to be eroded. This erosion can be particularly significant where substantial forces are required to draw flexible member 55 out of bone tunnel 20 (e.g., where a metallic flexible member 55 is used); or when substantial forces are required to draw flexible member 55 and graft ligament 25 up bone tunnel 25 (e.g., where graft ligament 25 makes a tight engagement with the walls of bone tunnel 20).
For another thing, the method taught in U.S. Pat. No. 5,918,604 can be tedious to practice. More particularly, when flexible member 55 and ligament graft 25 are in the position shown in FIG. 5, flexible member 55 will form the angle xcex8; however, when flexible member 55 and ligament graft 25 are in the position shown in FIG. 6, flexible member 55 will form a different angle xcex8. In this respect it will be appreciated that it will be considerably more difficult to pull graft ligament 25 upwards as the angle xcex8 increases from the position shown in FIG. 5 to the position shown in FIG. 6.
As a result, an object of the present invention is to provide an improved method for reconstructing a ligament.
And another object of the present invention is to provide an improved method for reconstructing a ligament which substantially avoids the problems associated with the prior art.
These and other objects of the present invention are addressed by a novel method for reconstructing a ligament.
In one preferred form of the invention, the invention comprises a method for securing a graft ligament in a bone tunnel, the method comprising the steps of: (1) forming a first bone tunnel in a bone, and forming a second bone tunnel in the same bone, the second bone tunnel being transverse to, and intersecting, the first bone tunnel; (2) positioning a flexible member in the second transverse bone tunnel so that the flexible member extends across the first bone tunnel, and positioning the graft ligament in the first bone tunnel, independently of the flexible member, so that the graft ligament is looped over the flexible member; and (3) positioning a crosspin over the flexible member and in the second transverse bone tunnel so that the graft ligament is looped over, and may be supported by, the crosspin.


The accuracy of a capacitive testing procedure is improved by adjusting the ideal values against which comparisons are made during the testing process, for all of the circuit elements (e.g., pin connections) being tested, responsive to cumulative deviations of the measured values from their anticipated ideal values. This can be accomplished by initially comparing all of the capacitance measurements taken for a given printed circuit to their ideal values, and calculating a deviation for each of the comparisons made. Following the testing of an entire printed circuit, the resulting series of calculated deviations are tabulated and averaged, and the resulting average deviation is then added to or subtracted from the tabulated readings for each of the circuit elements before any true defects are identified for the printed circuit being tested. In this way, all of the parts being tested are brought to the same baseline, eliminating overall reference differences (i.e., between different panels).

Following manufacture, it is common practice to subject a printed circuit to testing appropriate toward ensuring that the resulting article has been correctly manufactured and is effectively operating within its specified parameters. One such test involves the capacitive measurement of printed circuit products to determine whether or not elements of the printed circuit (e.g., the networks, or nets, of the printed circuit) are open or shorted.
In general, this process involves measuring the capacitance of a circuit element relative to either an external reference plane or an internal power plane, and comparing the measured value to a previously determined (i.e., learned) "ideal" value. If the difference between the two numbers is found to be within a certain limit, the circuit element is deemed acceptable, and steps are then taken to test other circuit elements of the printed circuit. If the measured value is found to be higher than the ideal value, the circuit element is deemed to be connected to another circuit element, and a short circuit is determined to be present. If the measured value is found to be lower than the ideal value, the circuit element is deemed to include an open circuit.
Such capacitance testing is primarily performed by measuring how much copper (surface area) is present for each circuit element being tested. All of tee circuit elements present on a particular printed circuit are tested sequentially. Each measured value is compared, in turn, to the corresponding ideal value for that circuit element (previously established) to determine it there are failures, and which of the circuit elements are defective.
Although such testing methods are generally satisfactory, it has been found that the results can be less than satisfactory in situations where circuit elements of the printed circuit being tested differ, even slightly, from the "ideal" printed circuit. These situations can include circuit elements which would be satisfactory in terms of their electrical characteristics, and which would operate acceptably in practice but which, due to over-etching or under-etching during manufacture of the printed circuit, produce a capacitance measurement (i.e., a capacitive signature) which is slightly higher for under-etched parts and slightly lower for over-etched parts. Moreover, the repeatability of line widths will vary from job-to-job, causing still other problems during the testing procedure. Such part-to-part differences can become even more troublesome as the line geometries (i.e., dimensions) shrink.
As an example, in testing circuit elements which would typically exhibit a capacitance of less than 3 pf, such as in chip carriers and the like, tolerances on the order of .+-.20% are used as the threshold for identifying defects present on the printed circuit. At these levels, differences in line width resulting from the initial manufacture of the printed circuit will be very significant. Such differences in line width can cause the test to fail an otherwise acceptable (good) part, and can also cause downtime of the testing apparatus until it can be determined whether the problem is the result of the manufacturing process or the testing apparatus.
Efforts have been made to address this problem. For example, it has been suggested ("Lead Frame Measurement Technique", IBM.RTM. Technical Disclosure Bulletin, Vol. 39, No. 09, September, 1996) to make capacitance measurements relative to each of a series of pin connections associated with a printed circuit, and to compare ratios of the measurements made at the several pins with pre-defined norms. U.S. Pat. No. 5,391,993 suggests averaging adjacent measurements to compensate for irregularities present on a particular part. Others have suggested various measures for adjusting the calculated "ideal" value against which subsequent comparisons are made, including adjustments made to the "tolerance window" which surrounds the ideal value. In practice, however, such efforts have not proven to be entirely satisfactory.
Therefore, the primary object of the present invention is to provide a more accurate way to measure capacitance values for purposes of testing the circuit elements of a printed circuit, or similar part. Another object of the present invention is to adjust for variations in the parts being tested, during the course of the capacitance-testing procedure, to compensate for process variations such as plating height, plating width, etch dissimilarities, dielectric variations, and relative humidity.

Process and apparatus for the capacitive testing of printed circuits

International Business Machines Corporation


Flexible ducting apparatus includes a packaging station and compression station, a support trough for supporting the ducting in the packaging station and compression station, and an actuating post which is arranged to engage a leading end of a length of flexible ducting to be packed and pull the length of ducting in a first direction through the packaging station into the compression station. The apparatus includes a control device to cause movement of a stop member into an operative position in the packaging station downstream of a trailing end of the length of ducting, the control device then being operative to cause the actuating post to execute a second stroke in the opposite direction to the first stroke so that the trailing end of the length of ducting is compressed against the stop member in the packaging station whereby packaging can be placed about the compressed length of ducting in the packaging station. The apparatus is preferably associated with a duct forming apparatus so that the first stroke of the control device causes insulation and a jacket to be applied about a core of the ducting.

This invention relates to apparatus for forming and packaging flexible ducting.
More particularly, the invention relates to forming flexible ducting which is of a type which includes a core which is surrounded by a layer of insulating material. Normally the insulating material is in turn surrounded by a jacket such as sheet plastic material or metallic foil.

Apparatus for forming and packaging flexible ducting