Invention relates to biotechnology, food industry and concerns to microbial consortia and microbial and yeast strains, as well as to methods for producing by integrated technological cycle with the use of consortia and microbial and yeast strains from the fermented base, which is a semi-product of bread kvass, fermented kvass, nonalcoholic kvass, as well as to methods for producing tea fungus culture fluid, tea-fungus concentrates, kombucha beverages, and vegetable extracts in a single technology process.

Generally, currently used methods of preparing beverages consist in preparation of sugar syrup and blending of various types of raw materials (juices, extracts, water, flavoring agents etc.). In manufacturing kvass, beer, and honey beverages, the fermentation of prepared beverage bases is used followed by filtration, and if necessary hereafter by ripening of the obtained beverage or beverage base [Digests of recipes for non-alcoholic beverages, kvass from the bread raw materials. Moscow, 1983].
A method for making a non-alcoholic beverage by mixing sugar, kombucha concentrate, water-soluble melanin, water-alcohol solution of melissa with water in the presence of carbon dioxide and beverage ripening at temperature 7-10° C. is known (Patent RU 2210952). "Tea fungus" (Kombucha; Japanese fungus) represents a symbiosis of yeast and acetic-acid bacterium, which forms a film at the surface of the sweet tea infusion. The yeast fermenting sugar promote to the formation of a small amount of alcohol and carbon dioxide, and the acetic-acid bacteria ferment sugar with the release of acetic acid, consequently the obtained fluid (tea kvass) acquires a sweet-and-sour taste and is slightly carbonated [Great Soviet Encyclopedia (.C..), 1978, Moscow, Sovetskaia Entsiklopediya].
Patent RU No. 2153816 describes a beverage and a method for manufacturing for this beverage and for the culture medium to manufacture the beverage based on growing the tea-fungus biomass (zooglea) in a tea infusion with a sugar-containing product. A culture fluid obtained as a result of incubation of tea fungus zooglea under aerobic conditions in a nutritional sugar-containing medium followed by incubation under anaerobic conditions at a temperature from 12 to 40° C. during from 2 to 150 days, is used for preparing a beverage base. The base consists of the culture fluid and of a tea extract with a sugar-containing product. The base is ripened under anaerobic conditions, that is accompanied with a decrease of a dry solids weight ratio. According to a method of the invention biological activity of beverages depends on the incubation time. One of the shortages of the known method is a long duration of obtaining a beverage having the highest biological activity.
There is a known method for making a fruit-bread kvass, said method comprising using a yeast culture and obtaining a beverage enriched with useful substances compared to a common kvass due to adding fruit juices (RU 2337592), as well as a method for making an alcohol-free beverage, which comprises using a tea fungus culture and obtaining a pear-tasted beverage due to using fruit wastes as substrates (SU 1477364).
Patent RU 2337592 describes a method for beverage preparing based on the use of tea fungus in fermentation of tea and other sugar-containing products by gradual fermenting comprising pre-fermenting these sugar-containing products with the use of a yeast culture, other than a tea fungus culture, and then fermenting with the use of a tea fungus culture. A method for making a beverage having a biological activity includes the fermentation of a sugar-containing fluid in the presence of a tea fungus culture, the said method including initial fermenting a sugar-containing fluid with the use of another yeast culture during a period from 1 hour to 14 days at a temperature from 20 to 40 degrees, and the fermentation in the presence of a tea fungus culture is carried out during a time period from 10 hours to 30 days. The beverage should be desirably clarified at a temperature of not more than 15° C. A sugar-containing fluid obtained by mixing water and sugar or jam or honey is used. Also, a sugar-containing fluid with addition of a fruit juice is used.
Initial fermentation of a sugar-containing fluid with the use of a yeast culture (baker's yeast, or wine yeast, or other yeast cultures), followed by the repeat fermentation in the presence of a tea fungus culture produces a beverage, which is free of yeast aftertaste and of 'dryness' native to the traditional kvass.
Patent RU228012 describes a beverage preparing method including the fermentation of a sugar-containing water solution with addition of a tea fungus under aerobic conditions and its filtration, before obtaining the sugar-containing water solution the preliminary filtered and disinfected water being processed with natural minerals (such as chalcedony, Cambay stone, or quartz) by adding minerals to water and maintaining them in the solution during the whole fermentation process. The fermentation is carried out in three stages during 28-24 days at stepdown decrease of temperature from 32-30° C. to 28-25°. The persistence of minerals in water promotes to a positive growth of tea fungus microbial culture and prevents the growth of foreign microorganisms that do not belong to the natural symbiotic composition of tea fungus.
Patent RU2280394 describes compositions based on a combination of fermentation products of tea fungus (symbiosis of yeast and acetic acid bacteria) and chaga mushroom, which are obtained by the fermentation of a blend of a sugar-containing substance, tea fungus culture fluid and chaga mushroom extract (RU2280394). The fermented blend is additionally ripened under anaerobic conditions and/or at a temperature of not more than 10° C. Compositions are also obtained, which include a sugar-containing component, tea fungus zooglea and chaga mushroom extract by mixing a preliminary fermented composition consisting of sugar, tea fungus culture and chaga mushroom extract by fermenting the obtained mixture, kvass being used as a preliminary fermented composition.
A method for preparing a tea fungus zooglea has been described, which includes mixing a tea fungus culture with sugar and fluid, other than tea, followed by and fermenting the obtained mixture, a fruit or berry juice being potentially used as a fluid. So tea fungus zooglea was obtained by adding a tea fungus culture into a solution of blackcurrant juice. A solid fraction of the obtained zooglea was used as an additive for imitation of dry fruits in bakery manufacturing (a microbial depressing effect was achieved simultaneously for bakery products). The end fermentation of kvass wort, fermented with the use of common yeast cultures (bakery yeast), based on the tea fungus culture, allowed to obtain a beverage, similar to kvass but having a less degree of foaminess and more acid flavor.
However, microorganisms forming a tea fungus consortium, which are used for obtaining beverages in described methods, have not been identified, and moreover, compositions of consortia in various geographic areas are different, consequently, products have also different compositions and its standardization is very problematic.
Patent RU 2165711 describes the use of tea fungus microflora Medusomyces gisevii in a method for preparing a starter culture for fermented milk products. Skim milk is pasteurized, cooled to the temperature of fermentation, then tea fungus microflora Medusomyces gisevii is added directly into milk in the ratio tea fungus:milk 1:30, fermented at 20-24° C. during 20-28 hours to the formation of a clot with acidity of 95-100° T. The obtained starter culture is used for manufacturing fermented milk products.
Patent RU2081911 describes a consortium of yeast and bacteria and a method for making a low-alcoholic beverage on its base. The consortium of yeast and bacteria includes Saccharomyces mandshuricus, Hausemaspora sp, Torulopsis globosa, Torulopsis sp, Saccharomyces Ludwigii, Saccharomyces lactis, Acetobacter xylinum, Acetobacter aceti, and Gluconobacter subaxydans and produces a complex of vitamins, organic acids, enzymes and cellulose. The method provides for making a low-alcoholic beverage with the use of a consortium of yeast and bacteria by means of fermentation of raw material blend, consisting of a carbohydrate-containing substrate and a nitrogen source at a temperature 24-32° C. during 4-5 days. A liquid fraction is separated by filtration or centrifugation. The liquid fraction is used as a low-alcoholic tonic drink.
Disadvantage of the known method is that the used consortium is a inseparable community of yeast and bacteria, that does not allow to use valuable properties of separate microorganisms for creating a greater variety of products and improving its taste and health-giving potential as well as optimizing its manufacturing methods and developing integrated technologies of preparing tea fungus cultures, kombucha concentrates, and various beverages based on tea fungus cultures and concentrates.
Moreover, the efficacy of the known methods of preparing beverages with the use of tea fungus remains fairly low due to simultaneous formation of zooglea. Thus, the development of industrial production methods that allow significant speeding up improving the production process of beverages having various tastes and health-giving properties, is a crucial task, a solution of which potentially provides a possibility to produce standardized beverages having fine and various tastes.

Consortia and strains of microorganisms, and methods of use thereof


A web based menu system that allows the users such as buyers and sellers to locate, purchase, and sell goods, items and services easily without any search queries. The knowledge base of the system increases with user interaction at variable levels. The database contains an orderly classification of goods and services throughout. Point-and-click technology can be used to navigate through a series of menus. The system can also respond to voice activation and recognition commands. At the web site, the user first selects a category followed by a selection of makes, items, or services called a Sub-Category that relate to the category. The system responds by displaying a uniform series of menus referred to as a “Fluidity of Taxonomy”. This process repeats until the user reaches the finite end of the menu series. Next, the system completes the interaction based upon if the user is a buyer or a seller. For buyers, the database is accessed resulting in a list of ads based upon the user's accumulated menu selections. The user can filter and sort the presentation of ads based on various criteria and place requests for instant notification of subsequent new ad placements. Banner ads that are applicable to the buyers' area of interest are also presented by the system. For sellers, an input form for ad placement is presented based upon the user's accumulated menu selections. Sellers can also grow the database based on their menu selections and form input. The system can be used for retreiving any orderly classification of information.

Advertisements for products and services has been used effectively in the print media over many years and with the advent of the worldwide web, businesses and individuals have a worldwide forum to advertise any of their products and services. However, using the web has added additional problems for buyer and seller users. For example, it is a common problem for users to waste valuable hours fumbling their way through various confusing web pages with distracting graphics while trying to locate specific advertised products and services. Often people have enlisted the use of complicated search engines that query other databases to aid in their searches. As sellers, the users endure classified advertising web sites that require excessive typing during the ad placements. As buyers, the users have great difficulty both accessing the site and finding the desired goods and services. The result is that clumsy forms and the lack of logical page progression stifle web users from reaching their end results.
Current web site designers are still receiving and presenting data as if they are publishing a standard classified magazine. When dealing with this data from a customers point of view, it involves a complicated non intuitive method of search for data retrieval and placement.
Various businesses are known to list advertisements for goods and services. For example, Traderonline.com, Yahoo!-Classifieds, Websbestclassified.com, #1 Classified-Boconline.com, Aircraft Shopper Online(ASO)—aso.solid.com. Trade-A-Plane-tradeaplane.com, Autoweb.com, AAAClassifieds.com, TheAdNet.com, ep.com and cars.com, are some of the more well known web businesses. However, as described below, these web sites have many problems.
Traderonline.com takes a long time to download because of their use of graphics. During a car search, when you click on makes, it gives you a list of makes, then models to choose from. After you've selected a make and model, it lists all makes of cars, not just the one you originally selected. When placing an ad, one must go through many pages of forms. Yahoo!-Classifieds mixes different types of vehicles together. Planes are mixed in with boats, and motorcycles are mixed with cars, and the site is complicated when used by sellers to submit an ad.
Websbestclassified.com is a messy and confusing site that is no better than those previously described. The site called #1 Classified-Boconline.com lists ads by state and doesn't have a column for prices. Products are mixed together. For example, boats are not broken down into various types and are mixed together. Aircraft Shopper Online(ASO)-aso.solid.com is a complicated and confusing site with crowded homepage, and uses a map of the United States and the rest of the world to locate positions and is not easy to navigate.
Trade-A-Plane-tradeaplane.com charges to view the adds and uses small hard to read print, and lists a large crowded selection list on their homepage, and requires multiple click throughs to access information. Autoweb.com requires the user to repeatedly enter information on various web pages, and uses hard to read small print. AAA Classifieds-AAAClassifieds.com requires searching by alphabetical identifiers and requires the user to read through wordy explanations.
TheAdNet.com requires users to fill out search forms to view ads, and requires input of pricing information. Ep.com does not break down categories to be specific enough and is hard to view the small print. Cars.com requires the user to enter multiple data items, requires several clicks on each web page, and is also hard to read because of the use of small print. This site does not subcategorize the main categories.
Various types of patents have been proposed over the years. See for example, U.S. Pat. No. 4,992,940 to Dworkin; U.S. Pat. No. 5,283,731 to Lalonde et al.; U.S. Pat. No. 5,706,434 to Kremen et al.; U.S. Pat. No. 5,724,521 to Dedrick; U.S. Pat. No. 5,745,882 to Bixler et al.; U.S. Pat. No. 5,774,873 to Berent et al.; U.S. Pat. No. 5,897,639 to Greef et al.; and U.S. Pat. No. 5,909,670 to Trader et al. However, none of these patents resolves the problems identified above.

Recursive method and system for accessing classification information


Holding arms of a frame member of a fan axially extend and project outward from both sides of a housing in a direction perpendicular to a rotational axis of the fan. Catch projections are provided on inner surface of the axial ends of the holding arms in a front-rear direction perpendicular to the axial direction and the aforementioned direction. The catch projections are arranged without being covered by or covering other portions in the frame member axially.

1. Field of the Invention
The present invention relates to a fan having holding arms to be attached to a heat sink, and a cooling apparatus in which a heat sink and the fan attached to the heat sink. More particularly, the present invention relates to a molding die assembly for molding a frame member as a portion of the fan, and a method of manufacturing the frame member by using the molding die assembly.
2. Description of the Related Art
A typical CPU or MPU installed in a computer generates much heat during operation. The CPU or MPU has to be cooled so that its temperature is kept in a predetermined range. A cooling apparatus in which a fan is attached to a heat sink is used for cooling the CPU or MPU. The fan of this cooling apparatus has holding arms for attaching the fan to a heat sink.
In an exemplary fan of a cooling apparatus, holding arms of a fan housing are provided so as to face each other in a predetermined direction perpendicular to an axial direction of the fan, and extend parallel to the axial direction of the fan. Each holding arm has a catch projection at its tip. The catch projection is provided on an inner surface of the holding arm in the above predetermined direction for securing the fan to a corresponding portion of the heat sink from outside.
In this case, however, the catch projection of the holding arm catches the heat sink with an inward force in the predetermined direction at a position axially outside the fan housing. Thus, stability of attachment of the fan to the heat sink is not always sufficient.
Moreover, formation of the fan housing having the holding arm with the aforementioned catch projection by molding using a molding die assembly requires not only a die piece movable in the axial direction of the resultant fan housing but also a die piece movable in a direction perpendicular to the axial direction, in order to open the molding die assembly and allow removal of the resultant fan housing from the molding die assembly. Thus, the configuration of the molding die assembly becomes complicated. This prevents reduction in the manufacturing cost of the fan including that fan housing and a cooling apparatus in which the fan is attached to a heat sink, and also prevents improvement of manufacturing efficiency such as manufacturing speed.
In order to form the catch projection by using axially movable die pieces only, it is necessary for the die pieces to include an elongated pin-shaped portion for forming the axially upper surface of the catch projection. In this case, a hole through which the pin-shaped portion passes is inevitably formed in a portion of the resultant fan housing or holding arm located axially above the catch projection. The die piece having the pin-shaped portion can be easily broken and therefore the die life is short. In addition, the resultant fan housing has a drawback that the strength of a base portion of the holding arm is low due to the hole.


A Thin Film Transistor comprises a gate electrode formed on a substrate; a gate insulation layer covering the gate electrode; an amorphous silicon (a-Si) region disposed on the gate insulation layer and above the gate electrode; a doped a-Si region formed on the a-Si region; the source and drain metal regions separately formed on the doped a-Si region and above the gate electrode, and isolated from the a-Si region; a passivation layer formed on the gate insulation layer and covering the source, drain and data-line (DL) metal regions; and a conductive layer formed on the passivation layer. The passivation layer has a first, second and third vias for respectively exposing the partial surfaces of the source, drain and DL metal regions. The first, second and third vias are filled with the conductive layer, so that the DL and source metal regions are connected via the conductive layer.

1. Field of the Invention
The invention relates in general to a thin film transistor (TFT) structure and method of manufacturing the same, and more particularly to the thin film transistor structure capable of reducing current leakage and method of manufacturing the same.
2. Description of the Related Art
Conventional computer systems have used cathode ray tube (CRT) technology for the computer display. However, in the past decade technological advances in thin film transistor (TFT) liquid crystal displays (LCDs) have made this an increasingly popular technology. The active matrix thin film transistor liquid crystal display (AM TFT-LCD) possesses several competitive advantages, including lighter weight and thinner profile. The consumers also demand the perfect images displayed on the AM TFT-LCD. The higher resolution of the display is achieved, the larger number of the scan lines is required. Also, each gate scan line has to be selected in a shorter time under the same frame time. The requirement of the on-and-off characteristic of the TFT is stricter for improving the performance of the display. For example, excess leakage current is not allowed when the TFT is in the off state.
In a TFT manufacturing process, the amorphous silicon (a-Si) layer is photosensitive and is likely to generate photocurrent and cause photocurrent leakage after being exposed to the light. For preventing the photocurrent leakage, an island-in structure of the TFT, which the pattern of amorphous silicon is restricted within the pattern of the gate electrode (i.e. a-Si fully blocked by the gate electrode), is provided.
FIG. 1 is a cross-sectional view partially showing a conventional thin film transistor (TFT) device having an island-in structure. The TFT 1 includes a substrate 10, a gate electrode 11 formed on the substrate 10 (by patterning the first metal layer), a gate insulation layer (such as a silicon nitride layer) 12, an amorphous silicon (a-Si) layer 13, a doped amorphous silicon (such as an n+ a-Si layer) 14, the source and drain regions 151, 152 (both formed by patterning the second metal layer). Also, the source region 151 and the drain region 152 are separated by a channel 16. The doped amorphous silicon layer 14 is formed for the purpose of increasing ohmic contact between the source region 151/the drain region 152 and the a-Si layer 13. Typically, the a-Si layer 13 and the doped a-Si layer 14 are so-called as the island structure. In FIG. 1, the bottom area of the a-Si layer 13 is smaller than that of the gate electrode 11, so that the TFT 1 presents an island-in structure.
According to the island-in structure of the TFT of FIG. 1, the a-Si layer 13 is shielded by the gate electrode 11, and no photocurrent leakage occurs when the TFT 1 is illuminated. However, the source region 151 and the drain region 152 (both made of the metal) direct contact the island structure (including the a-Si layer 13 and the doped a-Si layer 14), and this direct contact of a metal with a semiconductor is known as "Schottky contact". A leakage current path is thus formed. When a potential difference exists between the gate electrode 11 and the drain region 152, the current leakage is observed due to the "Schottky contact", and has the effect on the on-and-off characteristic of the TFT 1.

Thin film transistor with source and drain separately formed from amorphus silicon region


A non-halogen series floor material includes a first intermediate resin layer containing filler of 100 to 400 mass parts with respect to resin ingredient of 100 mass parts, the resin ingredient consisting essentially of resin having no chlorine atom in chemical structure, a surface resin layer integrally formed at an upper surface side of the first intermediate resin layer, the surface resin layer containing resin having no chloride atom in chemical structure and having a thickness of 100 to 1,000 μm, a second intermediate resin layer integrally formed at a lower surface side of the first intermediate resin layer, the second intermediate resin layer containing resin having no chloride atom in chemical structure and filler of 0 to 200 mass parts with respect to resin ingredient of 100 mass parts, and a backing layer integrally formed at a lower surface side of the second intermediate resin layer, the backing layer being formed of a fibrous fabric constituted by fibers containing resin having no chloride atom in chemical structure. A content ratio of the filler in the second intermediate resin layer with respect to the resin ingredient thereof is smaller than a content ratio of the filler in the first intermediate resin layer with respect to the resin ingredient thereof. A thickness of the second intermediate resin layer is 100 μm or more. A thickness of the second intermediate resin layer is 50% or less of a total thickness of three resin layers.

1. Field of the Invention
The present invention relates to a non-halogen series floor material. More specifically, the present invention relates to a non-halogen series floor material preferably used as a floor material for use in architectural structures such as buildings, condominiums and commercial facilities or a floor material for use in vehicles such as trains or buses.
2. Description of Related Art
The following description sets forth the inventor's knowledge of related art and problems therein and should not be construed as an admission of knowledge in the prior art.
Conventionally, as a floor material (a tile-like floor material or sheet-like floor material) for use in architectural structures such as buildings, condominiums or commercial facilities or a floor material for use in vehicles such as trains or buses, a floor material made of polyvinyl chloride (PVC) resin is widely used.
However, a PVC floor material generates a large amount of smoke and poisonous gases such as hydrogen chloride at the time of burning. Accordingly, this causes difficulties from the viewpoint of disaster prevention because evacuees may inhale such poisonous gases at the time of fire disaster and also causes environment pollution when incinerating such floor materials. Furthermore, since such a PVC floor material contains a large amount of plasticizer, there are problems that the floor material emits specific odor, the flexibility as a floor material gradually deteriorates as the plasticizer evaporates and the appearance gradually deteriorates since the plasticizer gradually causes dull deposits on the surface of the floor material.
Recently, there is a proposal that a material that generates less poisonous gases at the time of burning is used as a floor material in place of the aforementioned PVC material.
However, in the proposed floor material, in cases where filler is not added to the surface side of the floor material or the amount of filler is decreased at the surface side thereof for the purpose of increasing the abrasion resistance, the so-called valley warping phenomenon (a phenomenon in which edge side portions warp upward with respect to the central portion) of the floor material causes remarkably, which deteriorates the workability. As a result, the proposed floor material is inferior to the aforementioned PVC floor material.


A bonding pad structure formed on a semiconductor substrate comprises an insulating layer, a conducting pad, a passivation layer, and a buffer layer. The insulating layer is formed on the semiconductor substrate. The conducting pad is formed on the insulating layer, and the passivation layer is formed to cover peripherals of the conducting pad forming an overhang region therebetween. However, the buffer layer is patterned and etched to form a plurality of either islands or openings between the insulating layer and the conducting pad but withon the range of the overhang region. Accordingly, peeling resistance ability can be enhanced via a form of mechanical interlocking. In addition, a portion of the overhang region can be wider than the other portion thereof in order to further intensify the adhesion between the conducting pad and the passivation layer.

1. Field of the Invention
The present invention generally relates to semiconductor integrated circuit fabrication. In particular, the present invention relates to a bonding pad structure for an integrated circuit, which can enhance peeling resistance ability via mechanical interlocking.
2. Description of the Prior Art
Wedge bonding technologies play a critical role in the fabrication of chip-on-board (COB) circuitry, and have been widely applied to commercial electronic products. With the ongoing progress made by the semiconductor IC fabrication community in the miniaturization of the size of device feature, bonding pads provided for external connections, for example, have been gradually decreased from a layout area of greater than 100 .mu.m.times.100 .mu.m used previously.
Referring to FIG. 1, a conventional bonding pad for an integrated circuit after being bonded is schematically illustrated in a top view. Moreover, FIG. 2 is the cross sectional view of FIG. 1. The bonding pad shown in FIGS. 1 and 2 is formed on a semiconductor substrate 10, in which lots of electronic devices (not shown in the drawing) have been fabricated. For isolation between a subsequently-formed conducting pad 12 and the devices fabricated in the semiconductor substrate 10, an insulating layer 11 is formed to overlie the semiconductor substrate 10. The conducting pad 12 is thereafter deposited on the insulating layer 11. The insulating layer 11 is further in charge of planarization, the thickness of which should be sufficient and which is usually made of borophosphosilicate glass (BPSG). The conducting pad 12 is preferably a metal layer made of multi-layer material of TiN/Al--Si--Cu/TiN/Ti, and serves the function of transmitting an input signal or an output signal, or tying to a power level or a ground level, etc. Reference numeral 13 designates a passivation layer overlying the semiconductor substrate 10 to prevent scratches or cracking in the internal circuitry. The passivation layer 13 is partially etched away to expose a portion of the conducting pad 12 for wedge bonding. Accordingly, the overhang region between the conducting pad 12 and the passivation layer 13 is referred to numeral 14 in the drawing.
Usually, while the bonding procedure is being performed, one end of a conducting line 15 will first be bonded to the exposed portion of the conducting pad 12 by a wedge bonder. However, another end will be drawn in a direction 18 as shown in FIG. 1 and tied to one bond finger of a lead frame (not shown in the drawing) so as to electrically connect the bonding pad to the associated bond finger.
Nonetheless, although the semiconductor industry has made progress on miniaturization, the wedge bonder used for the chip-on-board fabrication is still restricted in its precision. Therefore, misalignment may occur during bonding and cause damage to the passivation layer 13. Even worse, the force used in drawing the conducting line 15 along in the direction 18 may give rise to peeling and worsens the yield loss.
However, another bonding pad structure has been proposed whereby the width of the overhang region 14 is increased so as to enhance the adhesion between the conducting pad 12 and the passivation layer 13, but the tradeoff and hence the drawback is that layout area is large.
For the foregoing reason, there is a need for a novel bonding pad structure that can withstand peeling while the bonding procedure is performed and also consume less layout area.

Bonding pad structure for integrated circuit (I)


An ink-jet recording apparatus, includes an ink-extracting member which has an ink-extract passage as an inner passage formed therein and which is to be removably connected to an ink cartridge. The ink-extracting member is to be connected to the ink cartridge. The ink cartridge includes an ink-outlet valve member which shuts off a flow of the ink from the ink cartridge, and which establishes a state in which the ink can be extracted from the ink cartridge by the ink-extracting member when the ink-outlet valve member is pressed by the ink-extracting member. The ink-extracting member further includes, at an end portion thereof, an end face which abuts on the ink-outlet valve member, and at least one ink-extract communication opening which is formed at the end portion and which is formed in a peripheral wall of the ink-extracting member, so as to communicate with the ink-extract passage.

1. Field of the Invention
The present invention relates in general to an ink-jet recording apparatus, and more particularly to an ink-jet recording apparatus equipped with a hollow ink-extracting member and a hollow air-introducing member which are connected to an ink cartridge for communication with an interior of the ink cartridge.
2. Discussion of Related Art
In installing an ink cartridge on an ink-jet recording apparatus, the ink cartridge is pressed onto a mounting portion of the ink-jet recording apparatus. The ink cartridge includes a rubber plug which seals the ink cartridge for inhibiting communication between an interior and an exterior of the ink cartridge. The ink-jet recording apparatus is equipped with a hollow needle whose end is pointed and which protrudes so as to pierce the rubber plug of the ink cartridge. Upon installing the ink cartridge onto the mounting portion of the ink-jet recording apparatus, the hollow needle pierces the rubber plug, so that the hollow needle and the interior of the ink cartridge are brought into communication with each other, making it possible to supply the ink from the ink cartridge to the ink-jet recording apparatus. Since the hollow needle is disposed such that its pointed end is directed toward a user, it is needed to assure the user of safety for preventing the user from contacting the pointed end of the hollow needle.
U.S. Pat. Nos. 5,506,611, 6,062,667, and 6,312,084 corresponding to JP-A-3-197052 disclose an ink-jet recording apparatus equipped with a protective device for protecting a hollow needle. The protective device includes a protective plate interposed between the hollow needle and the cartridge insertion port for preventing the hollow needle from being exposed to the cartridge insertion port. When the ink cartridge is installed, the protective plate placed in a shielding position for shielding the hollow needle is unlocked, so that the hollow needle is exposed. When the ink cartridge is further pushed toward the hollow needle, the hollow needle pierces the rubber plug of the ink cartridge. In the meantime, when the ink cartridge is removed from the ink-jet recording apparatus, the protective plate is returned back to the shielding position by a coil spring and is held at the position by locking members. Thus, the hollow needle is prevented from being contacted by the user.

Ink-jet recording apparatus having ink-extracting member


A method of detecting Streptococcus pneumoniae, which is characterized in that it comprises amplifying a lytA gene derived from S. pneumoniae using a LAMP primer set comprising at least one primer having a nucleotide sequence that is identical to or complementary to a partial sequence in the region ranging from bp 40 to 450 of the nucleotide sequence region of the above-described lytA gene, and then detecting the obtained amplified product.

Streptococcus pneumoniae (hereinafter abbreviated as "S. pneumoniae" at times) is a causative strain of pneumonia, endocarditis, bacteremia, septicemia, meningitis, and otitis media. It is important for clinical studies and diagnoses to detect infection with S. pneumoniae by distinguishing such S. pneumoniae from other alpha hemolytic streptococci, which generally coexist with the above strain in human bodies.
Selection via culture and biochemical test methods, which utilize colony form, optochin sensitivity, bile solubility, seroreaction, and the like, have conventionally been used to detect and diagnose such infection with S. pneumoniae.
However, when the aforementioned selection via culture is used in combination with the aforementioned biochemical test method, it takes 3 or more days until infection is determined. In addition, skilled techniques are necessary for precisely selecting its colony based on its form, a difference in color, and the like. Thus, without such skilled techniques, there has been a fear of interfering with clinical diagnosis and the subsequent treatments.
On the other hand, in recent years, a method of detecting S. pneumoniae using the PCR (polymerase chain reaction) method has also been proposed (Japanese Patent Application Laid-Open No. 9-327300). In the case of detection in which the PCR method is used, using primers specific to S. pneumoniae, nucleic acid is amplified with the collected DNA sample as a template, so as to detect the presence or absence of S. pneumoniae based on the presence or absence of such nucleic acid amplification. This method enables simple detection with certain reliability in a short time, when compared with the combined use of selection via culture and a biochemical test method.


A semiconductor memory device includes memory blocks, a main word decoder to set a main word line to a first potential for activation, a second potential, or a third potential, a circuit to generate a cyclic signal that indicates timing at intervals, a block selecting circuit to select a memory block to be accessed, a successive-selection circuit to select the memory blocks one after another, and a circuit configured to control the main word decoder such that unselected ones of the main word lines of a memory block selected by the block selecting circuit are set to the third potential, such that the main word lines of the selected memory block are maintained at the third potential after access, and such that the main word lines of a memory block selected by the successive-selection circuit are set to the second potential at the timing indicated by the cyclic signal.

1. Field of the Invention
The disclosures herein generally relate to semiconductor memory devices, and particularly relates to a semiconductor memory device in which word lines are organized into a hierarchical structure including main word lines and sub-word lines.
2. Description of the Related Art
In a DRAM (dynamic random access memory) that stores data as electric charge accumulated in memory cells comprised of capacitors, there is a need to supply a boost voltage VPP higher than a HIGH level to word lines in order to reliably store the HIGH level in the memory cells at high speed. Further, a negative voltage VNN lower than a ground potential VSS is generally applied to non-selected word lines for the purpose of avoiding leak currents in transistors.
In DRAMs having word lines organized in a hierarchical structure including main word lines and sub-word lines, a selected sub-word line is set to VPP, and unselected sub-word lines are set to VNN. A selected main word line is set to VNN, and unselected main word lines are set to VPP.
FIG. 1 is a drawing showing an example of the circuit configuration of a main word decoder and sub-word decoder. A main word decoder 10 includes PMOS transistors 11 through 13, an NMOS transistor 14, and an inverter 15. A single circuit portion comprised of the PMOS transistors 11 and 12 and the inverter 15 is provided in the main word decoder 10. A plurality (n: integer greater than one) of circuit portions each comprised of the PMOS transistor 13 and the NMOS transistor 14 are provided in the main word decoder 10, so that the main word decoder 10 can drive n main word lines MWL. A memory cell array and peripheral circuit are generally divided into a plurality of memory blocks demarcated according to row addresses. One main word decoder 10 is provided for one memory block.
A signal applied to the gates of the PMOS transistor 13 and NMOS transistor 14 in the main word decoder 10 is a decode signal for selecting a main word line MWL. This decode signal is generated by decoding a row address. At the time of memory access, a decode signal corresponding to a main word line MWL to be selectively activated is set to HIGH.
A sub-word decoder 20 includes a PMOS transistor 21, NMOS transistors 22 and 23, and an inverter 24. For the sake of clarity of illustration, only one sub-word decoder 20 connected to a main word line MWL is shown in FIG. 1. In an actual circuit configuration, however, a plurality (m: integer greater than one) of sub-word decoders 20 corresponding to m row addresses are connected to a single main word line MWL. Further, m sub-word decoders 20 constitute a single set, and a plurality of such sets are connected to a main word line MWL at respective positions in the direction of its extension.
In order to access a selected row address, the main word decoder 10 corresponding to a selected memory block belonging to the selected row address selects a main word line MWL corresponding to the selected row address, and sets the selected main word line MWL to VNN. Further, a sub-word decoder 20 corresponding to the selected row address is selected from the m sub-word decoders 20 connected to a corresponding main word line MWL, followed by setting a signal SO to VPP in this selected sub-word decoder 20. With these settings, the PMOS transistor 21 of the selected sub-word decoder 20 connected to the selected main word line MWL is made conductive to set the potential of a sub-word line SWL to VPP.
In the above-noted main word decoder 10 corresponding to the selected memory block, all the unselected main word lines MWL are set to VPP. With such setting, the PMOS transistor 21 is made nonconductive in the selected sub-word decoders 20 connected to an unselected main word line MWL where the signal SO is set to VPP. In these selected sub-word decoders 20, the NMOS transistor 22 becomes conductive to set the sub-word line SWL to VNN.
In unselected sub-word decoders 20, the signal SO is set to VSS. The output of the inverter 24 is thus set to HIGH to make the NMOS transistor 23 conductive to set the potential of the sub-word line SWL to VNN. In this case, the potential of the sub-word line SWL is VNN regardless of the potential of the main word line MWL (which is either VPP or VNN).
The above description concerns the operation of an activated memory block. In an inactive memory block (i.e., placed in a standby state), all the main word lines MWL are set to VII. The HIGH/LOW state of a signal GIDLCTL controls whether the potential of an inactive (unselected) main word line MWL is set to VII or VPP. The HIGH state of the signal GIDLCTL causes the PMOS transistor 11 to become conductive to select VII whereas the LOW state of the signal GIDLCTL causes the PMOS transistor 12 to become conductive to select VPP. Here, VII is a potential lower than the boost potential VPP, and is generally lower than the power supply voltage VDD applied to the semiconductor memory device.
In the following, for the sake of argument, it is assumed that all the main word lines MWL in an inactive (unselected) memory block are set to VPP. In such a case, the boost potential VPP continues to be applied to the gate of the PMOS transistor 21 in the sub-word decoders 20. When a difference in potential between the drain potential VNN and gate potential VPP of the PMOS transistor 21 is large, a leak current between the source/drain and the well increases, resulting in an increase in current consumption in this inactive (i.e., standby-state) memory block. In order to suppress this leak current, the gate potential of the PMOS transistor 21 is lowered from VPP to VII in inactive memory blocks.
Setting the main word lines MWL to VII in an inactive memory block necessitates an operation by which the potential of the main word lines MWL is increased from VII to VPP upon selecting and activating a memory block at the time of access. This operation serves as a factor to cause current consumption. There may be a case in which a memory block is selectively activated, and is then deactivated immediately after access operation to lower the potential of the main word lines MWL to VII. Another access may occur with respect to this memory block immediately thereafter, thereby consuming an electric current to increase the potential from VII to VPP. It is thus not desirable to create frequent current consumptions by dropping the potential from VPP to VII after each access operation in a memory block that is frequently accessed.
FIG. 2 is a drawing for explaining changes in the potential of a main word line MWL. In an initial state, the memory block of interest is inactive, so that the main word lines MWL are set to VII. Upon start of an operation to access a row address belonging to this memory block of interest, the signal GIDLCTL shown in FIG. 1 is set to HIGH, so that all the main word lines MWL of this memory block are set to VPP. After this, a main word line MWL corresponding to the row address to be accessed is selected and set to VNN. FIG. 2 shows the potential level of this selected main word line MWL.
After the selection of the main word line MWL, the signal SO is changed from VSS to VPP with respect to the sub-word decoders 20 corresponding to the accessed row address. This causes the potential of the sub-word line SWL to change from the unselected potential VNN to the selected active potential VPP. The VPP level of the sub-word line SWL serves to write data to memory cells. The signal So is thereafter changed from VPP to VSS in the sub-word decoders 20, resulting in the potential of the sub-word line SWL being changed from VPP to VNN. The potential of the selected main word line MWL then returns from VNN to VPP. In this state, all the main word lines MWL in the block of interest are set to VPP.
In the example shown in FIG. 2, the potential of all the main word lines MWL are dropped from VPP to VII after the completion of an access operation. This serves to reduce a leak current through the PMOS transistor 21. However, it is undesirable to drop the potential of the main word lines MWL from VPP to VII after each access operation because such drop creates current consumption at every access.
It is conceivable to maintain the potential of the main word lines MWL at VPP for some time period in an accessed memory block after the access operation in order to avoid the occurrence of current consumption at every access due to an increase of potential from VII to VPP. With this arrangement, there is no need to increase the potential of the main word lines MWL from VII to VPP each time this memory block is accessed, thereby reducing excessive current consumption. Keeping the potential of the main word lines MWL at VPP, however, creates another concern that current consumption caused by a leak current through the PMOS transistor 21 cannot be ignored. It is further conceivable to maintain the potential of the main word lines MWL at VPP in memory blocks and then to drop the potential of the main word lines MWL to VII with respect to each memory block for which a refresh operation is completed as refresh operations are successively performed with respect to the memory blocks in a standby state.
FIG. 3 is a drawing for explaining the dropping of the potential of the main word lines MWL with respect to each memory block upon the completion of a refresh operation. FIG. 3 illustrates an example in which 4 memory blocks BLK0 through BLK3 are provided. An active period for memory access appears first, followed by a standby period in which no memory access is performed. Each row in FIG. 3 shows whether the potential of the main word lines MWL are VPP or VII with respect to a corresponding one of the memory blocks BLK0 through BLK3.
In FIG. 3, a first access operation in the active period is a read operation (RD-BLK0) with respect to the memory block BLK0. As a result of this access operation, the potential of the main word lines MWL are set to VPP in the memory block BLK0, and are maintained at VPP even after this access operation. A second access operation in the active period is a read operation (RD-BLK2) with respect to the memory block BLK2. As a result of this access operation, the potential of the main word lines MWL are set to VPP in the memory block BLK2, and are maintained at VPP even after this access operation.
In the standby period, the memory blocks BLK0 through BLK3 are successively refreshed. This may be a refresh operation automatically performed within the DRAM. In a period designated as REFxWL-BLK0, all the sub-word lines SWL are successively selected and refreshed in the memory block BLK0. After the completion of these refresh operations for this memory block, the potential of all the main word lines MWL of the memory block BLK0 is dropped from VPP to VII. In a period designated as REFxWL-BLK1, thereafter, all the sub-word lines SWL are successively selected and refreshed in the memory block BLK1. The memory block BLK1 is activated for these refresh operations, and all the main word lines MWL are set to VPP. After the completion of these refresh operations for this memory block, the potential of all the main word lines MWL of the memory block BLK1 is dropped from VPP to VII.
In a period designated as REFxWL-BLK2, all the sub-word lines SWL are successively selected and refreshed in the memory block BLK2. After the completion of these refresh operations for this memory block, the potential of all the main word lines MWL of the memory block BLK2 is dropped from VPP to VII. In a period designated as REFxWL-BLK3, further, all the sub-word lines SWL are successively selected and refreshed in the memory block BLK3. The memory block BLK3 is activated for these refresh operations, and all the main word lines MWL are set to VPP. After the completion of these refresh operations for this memory block, the potential of all the main word lines MWL of the memory block BLK3 is dropped from VPP to VII.
Through the operations shown in FIG. 3 as described above, it is possible to eliminate the excessive current consumption operation that increases the potential of the main word lines MWL from VII to VPP each time a memory block is accessed. At the same time, the current consumption caused by leak currents in inactive memory blocks can be reduced to some exent. The above-described operations, however, may not be effective in terms of its advantageous effect of reducing leak currents in inactive memory blocks when the memory blocks are accessed in a particular manner.
FIG. 4 is a drawing for explaining a case in which the effect of reducing leak currents is not sufficient when dropping the potential of the main word lines MWL with respect to each memory block upon the completion of a refresh operation. In the example shown in FIG. 4, access operations are successively performed with respect to the memory blocks BLK0 through BLK3, resulting in the main word lines MWL being maintained at VPP in all the memory blocks BLK0 through BLK3.
In the standby period in which no memory access is performed, the memory blocks BLK0 through BLK3 are successively refreshed. This may be a refresh operation automatically performed within the DRAM as previously described. In the same manner as in FIG. 3, after the completion of refresh operations for a given memory block, the potential of all the main word lines MWL of this memory block is dropped from VPP to VII.
When operations are performed in the manner as shown in FIG. 4, the period in which the main word lines MWL are set to VPP in all the memory blocks continues for some time. During this period, the effect of reducing leak currents in inactive memory blocks is nonexistent. Even after the successive refresh operations for the memory blocks BLK0 through BLK3 are started, the main word lines MWL continue to be at VPP in at least one of the memory blocks until all the sub-word lines SWL of all the memory blocks are refreshed. The period required to refresh all the sub-word lines SWL of all the memory blocks is shown as tREF in FIG. 4. There may be a case in which a standby period continues for a duration substantially equal to tREF, immediately followed by an active period in which random memory accesses occur in such a manner as to access addresses evenly across the memory space, and further followed by a standby period lasting for a duration substantially equal to tREF. In such a case, the effect of leak current reduction will be extremely small.
Accordingly, there is a need for a semiconductor memory device that can eliminate the excessive current consumption operation that increases the potential of main word lines each time a memory block is accessed while sufficiently maintaining the effect of leak current reduction in inactive memory blocks.
[Patent Document 1] Japanese Patent Application Publication No. 2000-149564

Semiconductor memory device with reduced current consumption


A single rod measuring probe has a hollow probe portion which contains an electrolyte solution and an electrical connector plug. The hollow probe portion and electrical connector plug are joined by a refill unit which receives the probe portion and plug in opposite ends thereof. The refill unit includes a lateral opening for filling the probe portion with electrolyte solution and a slidable cover for closing the opening. The slidable cover includes an elastic seal which seals the lateral opening when the cover is over the lateral opening. Preferably, the refill unit is non-circular in cross-section to facilitate venting.

Single-rod measuring probes for electrochemical measurements are components of electrochemical measuring elements used in the field of sensor analysis. They are especially useful for determining pH and redox voltage. These measuring probes in most cases contain a reference electrode, which is installed in a cylindrical housing that is made of glass or plastic. In reference electrodes, an electrolyte solution, in most cases a KCL solution, has to be refilled intermittently with liquid electrolyte. When this is the case, the design of the refill opening causes problems.
Single-rod measuring probes are known which in the top of the electrodes have an axial hole with a circular cross-section for use as a refill channel, which channel can be sealed with a plug.
In the vast majority of the known single-rod measuring elements, the refill opening is made in the housing wall, i.e. in the electrolyte chamber wall, either directly as a hole or with an upstream radially-projecting nozzle or a laterally-projecting elevated refill olive, whereby both the opening and the nozzle or the olive have circular cross-sections and can be sealed with a plug or tube section.
The refill openings in the known single-rod measuring chains primarily have the drawback of awkward handling and/or inadequate tightness.
In several types, handling is made more difficult by accessories for filling the electrode housing; however, such accessories are not always available. In other types, sealing devices are provided that are difficult to handle or are inadequate.
A more general drawback of the known measuring elements with refill openings having circular cross-sections is that during refilling, electrolyte is spilled since the air in the electrolyte space cannot escape (bubble-free).

Single-rod measuring element for electrochemical measurements


A water dispensing apparatus includes: a filter; a hot water tank; a water discharge nozzle; a hot water pipe connecting the hot water tank to the water discharge nozzle; a hot water discharge valve; a drain pipe branched from the hot water pipe; a drain valve disposed at the drain pipe; a first temperature sensor disposed in the hot water tank and configured to detect a first temperature of the hot water tank or water in the hot water tank; a second temperature sensor disposed in the hot water discharge valve and configured to detect a second temperature of water that is in the hot water pipe or introduced into the hot water discharge valve; and a controller configured to control the hot water discharge valve and the drain valve based on temperature information including the first temperature and the second temperature.

A water dispensing apparatus may supply water to a user and dispense water according to the user's operation.
For example, a water dispensing apparatus, when the user operates a lever or a button, may dispense stored water through a nozzle. In some cases, the water dispensing apparatus may include a valve of the nozzle that is opened to dispense water while the user operates the lever or the button. The user may stop operation of the lever or the button while checking the amount of water filled in a cup or the container.
A water dispensing apparatus may be applied to various fields. For example, the water dispensing apparatus may be applied to a refrigerator and a water purifier. In some cases, the water dispensing apparatus, which is provided in the refrigerator and the water purifier, may automatically supply a set amount of water according to the user's operation. In some cases, a water dispensing apparatus may supply not only purified water but also cold water and hot water.
In some cases, where a flow rate of hot water supplied from the water dispensing apparatus is not constant, the temperature of hot water may vary in a large range. For example, when the supply flow rate is lowered, the water may be overheated by a heater that heats the water with fixed power, which may lead to damage to the heater or cause the water to boil and generate steam. In some cases, overheated water may cause breakage of a flow path or occurrence of safety problems.
In some cases, the water dispensing apparatus may include a hot water supply device that detects a flow rate of water supplied and prevents the heater from operating when a flow rate of incoming water is less than a flow rate in minimum operation.
In some cases, where the flow rate is unstable, the heater may be turned off, which may result in an unsatisfied temperature of water for dispensing.
In some cases, the water dispensing apparatus may allow hot water of a constant temperature to be dispensed by adjusting power of an induction heating-type hot water module according to a decrease in the supply flow rate or a temperature of discharged water.
In some examples, a water dispensing apparatus may store a previous water discharge amount, set a valve opening degree automatically, and perform flow control through the valve opening degree stored at the time of hot water dispensing.
In some cases, where water enters a hot water tank at a flow rate that is lower than a previous amount of water discharged, a boiling phenomenon may occur in the hot water tank, and consequently hot water may bounce off from the dispenser, which may lead to safety accidents.
In some cases, where a preheat operation is performed in the same manner regardless of an elapsed time after a previous hot water dispensing event with a relatively short time term, the hot water tank may be overheated and cause a boiling phenomenon in the hot water tank. In some cases, it may be difficult to provide hot water with a substantially constant temperature.
In some cases, where water is dispensed with a relatively long time term after the previous hot water dispensing event, the hot water in the hot water tank may have a temperature in an unsatisfied state, or the hot water may be dispensed while the temperature of the hot water flowing into a water discharge nozzle is lowered due to the influence of residual water in a pipe.
An adaptive control according to situations in the process of a preheat operation may enable generation of hot water having a constant temperature to avoid overheating in the hot water tank or an unsatisfied temperature of hot water.

Water dispensing apparatus and control method therefor


A guarantee processing method guarantees the data of an adjacent track in the case of a write fault when there is a possibility of an off track write. Even if a write fault is detected or an offset read retry is successful, a rewrite for guaranteeing an adjacent track is not executed immediately. The possibility of an off track write is judged by the movement of the head, and only the sector which is difficult to read due to the off track write is rewritten.

1. Field of the Invention
The present invention relates to an adjacent track data guarantee processing method for executing guarantee processing on data of an adjacent track which is influenced by data writing on a predetermined track on a disk, and a disk device using this method, and more particularly to a guarantee processing method for adjacent track data and a disk device, which allows to execute an offset read check for the adjacent data which may have been influenced by data erasing, then to rewrite the data only when a predetermined degree or higher off track writing is detected, so that adjacent data which cannot be completely read due to off track writing is prevented.
2. Description of the Related Art
Compact and large capacity storage devices are in wide use. Such a storage device is comprised of a storage medium where many recording tracks are created concentrically or in spirals, an optical or magnetic head, and an actuator which positions the head at a desired track. The head reads or writes the data of the positioned track.
In such a disk device, the head is positioned at a desired track, and the head follows up the track by a track servo control. In this case, track pitch and other factors are designed such that even if the head writes data at a certain location of the track while being shaken within the specification limit, the written data does not influence the data of an adjacent track, and the data written while the head is shaken can be read.
Also track pitch and other factors are designed with sufficient margins so that even if the head writes data while being shaken outside the specification limit, the data of an adjacent track is not influenced. Also a device where the head is always shaken exceeding the specification limit is not shipped as a defective product.
Therefore even if data is written at a head position outside specification during data writing, only a write retry is executed until the data is written within the specification limit. In the case of a magnetic disk device, the write operation outside the specified head position stays only in one frame, since the write operation is immediately paused when it is detected that the head has written the data outside the specified position (write fault), and the sampling speed of the head for detection is sufficiently fast with respect to the shaking of the head.
As mentioned above, the magnetic disk device is designed such that adjacent data is not influenced because of mechanical reasons and the detection sampling speed, even if data is written while the head is shaken outside the specification limit in a normal working environment.
Recently, however, the density of stored data on a disk is increasing, and the track width of a disk is becoming smaller and smaller. Applications of a magnetic disk device are expanding, and now a disk device is built into not only fixed terminals but portable terminals as well. Therefore the occasions to receive shocks outside the specification limit are increasing, and the guarantee of data in such cases is demanded.
Although it is designed that adjacent track data is not influenced, the data of an adjacent track is somewhat affected (deleted) if the track is written several ten thousand times due to the characteristics of the head.
Therefore many technologies for preventing the deletion of data, by rewriting the affected data of the adjacent cylinder at the point when an off track write (write fault) beyond a certain degree is detected, have been proposed.
FIG. 18 is a diagram depicting the sector format of a magnetic disk device, where one sector is comprised of a servo section and data sections 1, 2, 3, 4, and 5, and the head is positioned by the signal of the servo section. FIG. 19 shows the format during data write, wherein the track interval is designed such that an adjacent sector positioned at the adjacent track is not influenced even if the head is shaken exceeding the specification limit during normal use.
FIG. 20 is a diagram depicting conventional processing when an off track write occurs to a magnetic disk device. When an off track write (or write fault) is detected during data write by the position of the write head, the track data of the track itself is recovered by rewriting data returning to a specified sector from the detected sector. However, the data D5 of the adjacent sector becomes difficult to read due to the off track write. If data D5 remains in this status and is influenced by an off track write from the other side of the track n+2, data D5 cannot be read at all.
Therefore when an off track write is detected, the head returns to a specified sector from the detected sector, and rewrites the data to recover the data of the track itself first, then for the data of the adjacent sector, a read operation is attempted until the data is read, and the data which is difficult to read is recovered by rewriting the data at the point when the data can be read. In FIG. 20, there is one adjacent sector to be recovered, but the data of a plurality of sectors may be recovered returning to a specified sector of the adjacent track.
For reading data as well, when the data cannot be read on the track n but can be read with offset, as shown in FIG. 21, it is judged that this data 2 has the possibility of an off track write, and this data 2 is rewritten returning to a specified sector from the detected sector to recover the data of track n first, and for the data 2 in the adjacent sector as well, a read operation is attempted and data is rewritten at the point when the data can be read so that the data which is difficult to read can be recovered.
These adjacent data guarantee processing when an off track write is detected are proposed in Japanese Patent Laid-Open No. 6-52635, Japanese Patent Laid-Open No. 11-203614, Japanese Patent Laid-Open No. 2001-14606, and Japanese Patent Laid-Open No. 2001-118343, for example.
In such prior art, adjacent data guarantee processing is executed when a write fault is detected or when a predetermined amount of offset read retries is detected. The write fault is detected when it is recognized that the position of the head exceeded the write off track slice in a frame of the target sector during data write. The value of the write off track slice is defined by the deviation of the head position from the center position of the track, and a value derived from the characteristics of the head and medium, and by research.
The write off track slice value is also determined such that the read head can read the data at the center of the track (on track) without problems, even when the head writes data with offset within this write off track slice. In the same way, guarantee processing during a read is executed when the data can be read with a predetermined head offset amount during a read retry.
Conventionally when a write fault is detected or when the data can be read by an offset read retry, it is judged unconditionally that there is the possibility that an adjacent sector may not be read, and adjacent data guarantee processing is executed by reading the adjacent sector and rewriting the data.
However, as described above, if the disk device is used for portable equipment, it is possible that a write fault will occur frequently depending on the environment of the device, such as the case of installing in a vibrating location. And the device reports the write fault to the host only when the data cannot be written normally, even if a write retry is continuously executed for a plurality of times.
Therefore if adjacent sector guarantee processing is executed each time a write fault is detected, safety is high in terms of data guarantee, but processing to read an adjacent sector and to rewrite the data occurs many times, making the performance of the device inefficient, particularly when the read/write speed drops. Also as described above, the device is designed with sufficient margins so that the occurrence of a write fault does not have the influence of disabling the reading of an adjacent sector, so it is very rare a write fault due to a strong shock influencing an adjacent sector occurs. Since write faults which do not influence an adjacent sector exist in this way, conventional adjacent sector guarantee processing executes excessive guarantee processing, which drops the high-speed reading and writing performance of the device.

Adjacent track data guarantee processing method and disk device


In an example, there is disclosed herein a digital-to-analog converter (DAC) including a correction circuit for a clock, including a differential clock. Error correction may take place within the DAC core, by means of replica cells that are substantially similar to conversion cells. Rather than contributing their output to the converted signal, the replica cells may be configured to provide a feedback signal to a clock receiver with information for correcting the clock signal. The feedback signal may be operable to correct errors, for example, in duty cycle and crosspoint, as measured at the DAC core.

Signal processing circuits such as digital-to-analog converters may need to be clocked to ensure that data outputs are properly synchronized. In some cases, feedback circuits are used to correct errors in clock signal parameters, including for example duty cycle and crosspoint.
A current-steering DAC is configured to convert a n-bit digital input signal using an array of n binary weighted switches. The switching mechanism enables currents to be provided to a current combination network. For example, where n=4, the currents are
  I  ,      I    2    ,      I    4    ,                and                                I      8      (weighted to the binary digital input). The sum/aggregation of the currents provided by the switches forms the analog representation of the digital input signal in the form of a current output.

Clock signal error correction in a digital-to-analog converter


A method for performing ONU Management and Control Interface (OMCI) synchronization includes receiving an OMCI message containing a OLT-G entity identifying OLT's vendor identification (ID) and version. The method also includes determining if an OLT vendor identification (ID) matches with a current vendor ID and if an Optical Line Terminal (OLT) version is compatible with current OMCI handlers. When the OLT vendor ID fails to match with the current vendor ID, automatically performing a OMCI handler switching process. The OMCI handler switching process includes setting a current OLT vendor as a new OLT vendor ID, deleting a OMCI configuration previously stored in the flash memory after setting the new OLT vendor ID, and rebooting the ONT to allow the ONT to initialize a OMCI configuration using a new OMCI profile.

In telecommunication, an eye diagram is an oscilloscope display in which a digital signal from a receiver is repetitively sampled and applied to the vertical input, while the data rate is used to trigger the horizontal sweep. See, for example, FIG. 1, which is related art illustrating an eye diagram 100. An eye diagram 100 is a pattern looks like a series of eyes between a pair of rails, and is a tool for evaluating the combined effects of channel noise and inter-symbol interference on the performance of a baseband pulse-transmission system. Further, eye diagram 100 is a synchronized superposition of all possible realizations of the signal of interest viewed within a particular signaling interval.
In an eye diagram, the eye crossing percentage is a measure of an amplitude of crossing points relative to One level and Zero level. See Equation (1) below.
                              Crossing                                                              percentage                =                                                            Crossing                                                                                level                            -                              Zero                                                                                level                                                                    One                                                                                level                            -                              Zero                                                                                level                                              ×          1                    0                    0                    %                                    Equation                                                            (          1          )
Crossing point is an indirect measurement of the quality of the eye diagram, and indicates the timing occurrence of One level and Zero level. FIG. 2 is an image 200 illustrating a classic sample how the time of Signal One and Signal Zero impacts the crossing point. For example, image 200 indicates that the crossing point is changed by changing the timing of Signal One and/or that of Signal Zero. In fact, the crossing point is not a parameter that the transceiver can be calibrated directly. It always has to be indirectly impacted by other parameters such as the timing of signals.
In International Telecommunication Union (ITU-T) G.984.2 and its amendment, the crossing percentage of a gigabit-capable passive optical network (GPON) signal eye diagram is never defined as a changeable parameter. FIG. 3, for example, is a diagram 300 illustrating a mast of the eye diagram for the upstream transmission signal. The nominal value of the crossing percentage is marked as 0.5 (or 50%). This implies that the Signal One and Signal Zero shall take equal time. This is also the assumption for many other optical parameters such as the sensitivity, signal penalty, the BER, etc.
Let's take the ONT discussed in U.S. Pat. No. 10,560,190 B2 (the "'190 patent"). In the '190 patent, the crossing point must be calibrated to 40%. Further, the '190 patent suggests that the transceiver has to shorten the timing of Signal One and/or extend the timing of Signal Zero. To keep the transmission rate of the GPON signal, the '190 patent discussing making the wave of Signal One narrower.
This, however, makes the Signal One harder to be detected, or in some cases, may be mistakenly detected as Signal Zero. This change also results in the changes to the sensitivity and the bit error rate (BER) of the transceivers, which are difficult to compensate. Furthermore, the lower crossing percentage results in longer time at lower level of optical power and cause challenges to recover the signal frequency which, in some worst cases, causes the loss of synchronization and potential transmitted bit missing.
Thus, when calibrating ONT's, the following challenges are presented—(1) the crossing point cannot be calibrated directly and (2) the signal quality is reduced, causing additional transmission challenges. For example, this may result in higher BER, lower signal sensitivity, and reduced coverage range.
Thus, an alternative approach other than the use of crossing points may be more beneficial.
Some conventional methods, such as those discussed in the '190 patent, use delimiter bytes when configuring an ONT. However, knowing that delimiter bytes are 24-bit data and are contained in 3 bytes (e.g., Octet 7 to 9) and knowing that a central processing unit (CPU) processes the data of 8-bit, 16-bit, 32-bit, or 64-bit, the data within the delimiter bytes has to be converted to multiple parts of a certain length in order for the data to be processed.
Thus, an alternative approach that uses octet 10, which is 8-bit, may be more beneficial.

This patent is subject to a terminal disclaimer.

Configuring an optical network termination


Strategies are described for analyzing test data received from tests performed on a fire pump, and then automatically computing an overall grade (e.g., excellent, good, fair, or poor) which reflects how the analyzed test data compares with reference data. A standard curve or a manufacturer's curve can serve as the baseline reference data. The output grades can be conveyed in tabular form or graphical form. In the graphical form, the analyzed test data can be plotted for comparison with plural reference curves, where the reference curves demarcate ranges associated with the possible grades.

Facilities use fire pumps to provide water to sprinkler systems in the event of a fire. The fire pumps maintain a desired level of water pressure by either boosting the water pressure of a public supply of water, or by working in conjunction with a private supply of water maintained by a facility.
Pumps come in a variety of designs and sizes. Fire pumps are generally driven either by an electric power supply or a diesel power supply. Common respective pump sizes will generate 1000 gallons per minute (gpm), 1500 gpm, 2000 gpm, 2500 gpm, and greater. For example, the National Fire Protection Agency (NFPA) specification entitled, "NFPA 20: Standard for the Installation of Stationary Pumps for Fire Protection," (2003 Edition, 1 Batterymarch Park, Quincy Mass.), sets forth that fire pumps can have ratings between 25 gpm and 5000 gpm at set flow capacities (e.g., 25 gpm, 50 gpm, 100 gpm . . . 4000 gpm, 4500 gpm, 5000 gpm). The pressure of different pumps can likewise vary. For example, the minimum pump rating set forth in NFPA 20 is 40 pounds per square inch (psi), but there is no maximum pressure. A manufacturer will design the pump to perform at a "rated" flow, pressure and speed.
In addition, a manufacturer will ensure that the fire pump satisfies a so-called standard curve. The standard curve mandates that the pump at least: (a) perform at a certain percent of the rated pressure when there is zero flow being emitted from the pump (know as a "churn" state) (for example, as per NFPA 20, churn pressure can be any pressure between 100% and 140% of rated pressure); (b) perform at 100 percent of the rated flow at 100 percent of the rated pressure; and (c) perform at 150 percent of the rated flow at 65 percent of the rated pressure. The standard curve can therefore be characterized by these three data points. In addition, a manufacturer will furnish a detailed manufacturer's curve, which identifies the specific performance of the fire pump. That is, the actual pump supplied to a customer may exceed the baseline requirements of the standard curve in various respects, which are identified by the manufacturer's curve.
Because fire pumps often protect resources of considerable value, the fire pumps are periodically performance-tested to make sure that they are working properly. A thorough acceptance test is first performed on a fire pump when it is installed in a facility. The fire pump is thereafter performance-tested on an annual basis to make sure that it continues to operate properly. The annual tests will entail assessing the fire pump's performance at three points of operation defined by the standard curve. Namely, a first test will operate the fire pump at zero flow and at a certain percentage of the rated pressure; a second test will operate the fire pump at about 100 percent of the rated flow which should optimally achieve at least 100 percent of the rated pressure; and a third test will operate the pump at about 150 percent of the flow which should optimally achieve at least 65 percent of the rated pressure. Various measurements are taken at these three points of operation to collect test data. The performance of the pump is then assessed by relying on a human to manually compare the test data to the pump's expected performance. As mentioned above, the expected performance of the fire pump is reflected by the standard curve, or more preferably, by the manufacturer's curve (if it exists). Pumps may fail (or generally degrade in performance) for any number of reasons, such as friction-related wear of the bearings, wear of the impeller or casing used in the fire pump, obstructions in the pump casing, shaft misalignment, worn wear rings, and so forth.
However, the above-described manual technique of analyzing test data can lead to erroneous results. For instance, even a skilled evaluator may fail to recognize certain problems with the fire pump (as assessed against its expected performance). These errors can result when the evaluator misreads the test data. But a more pervasive problem is due to the general difficultly in consistently making accurate pass-fail type decisions, which characterize the often complex and multi-faceted behavior of the pump. These errors can result in assessing the pump's performance as satisfactory, when it really should be graded as unsatisfactory. Or the errors may result in assessing the pump's performance as unsatisfactory, when it really should be graded as satisfactory. The former case is obviously of substantial concern, as the poor performance of a fire pump in the event of an actual fire can lead to significant loss of resources in a facility.
There is accordingly a need in the art to provide more reliable and convenient tools for assessing the performance of fire pumps. While the following disclosure is directed to the concrete examples of fire pumps, the solutions presented herein can also be applied to other kinds of pumps. Moreover, while the following disclosure is framed in the specific contexts of standards applicable to pumps deployed in the United States, the solutions presented herein can also be applied to pumps manufactured and deployed in foreign countries, with appropriate modification of relevant parameters.

Strategies for analyzing pump test results


A manufacturing apparatus for a semiconductor includes a reaction chamber into which a wafer is introduced, gas supply unit for supplying a gas to the reaction chamber, gas exhaust unit for exhausting the gas from the reaction chamber, a holder for holding the wafer at an outer circumferential part of the wafer, a first heater for heating the wafer from below, a reflector provided above the holder, and a drive mechanism for driving the reflector.

1. Field of the Invention
The invention relates to a manufacturing apparatus for a semiconductor device and a manufacturing method for a semiconductor device that form a film, for example, on a semiconductor wafer by supplying a reactive gas while heating the semiconductor wafer from a back side.
2. Description of the Related Art
In recent years, with a semiconductor device having an increasingly finer structure, better uniformity in film thickness of a film formation process has been required. In a CVD (Chemical Vapor Deposition) apparatus such as an epitaxial growth apparatus, a backside heating method in which there is no heating source from above is used. Since a reactive gas can be supplied in a vertical direction from above when the backside heating method is used, a uniform film can be formed. To achieve still better uniformity in film thickness by the backside heating method, the in-plane temperature of a wafer must be controlled to be uniform. Various techniques so as to heat a wafer uniformly are described in Japanese Patent Application Laid-Open No. 2000-306850 or the like.
In recent years, there is a trend of using a larger-diameter wafer to reduce costs of devices and a requirement for an increase in an effective area of a wafer is growing. Also, with devices having an increasingly finer structure, a requirement for more accurate film thickness is rising. Thus, the film must be formed uniformly up to an edge near area of a wafer, which has hitherto been cut off. However, if the in-plane temperature of a wafer is controlled by output of the heater being controlled, the temperature of a holder holding the wafer will also vary. The temperature of an outermost circumference of a wafer depends on the temperature of a holder. Therefore, it is difficult to stabilize the temperature only by controlling output of the heater.
For example, when forming a film, the temperature rises only in edges of a wafer, causing a temperature difference between the center of a wafer and its edges of ±5-6° C. Due to this temperature difference, the thickness of a formed film (epitaxial film) varies by 1% or so. In addition, temperature variations cause slippage in the wafer. Particularly due to change of the process gas from a mono-silane gas to trichlorosilane gas, which is superior in productivity, the processing temperature has risen from 1050° C. to 1100° C. With a rising temperature of processes, the problem of slippage is becoming evident.

Manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device