A technique to stabilize the effective refraction index of a laser generating system's wave guide, as well as a technique to stabilize the phase of the wave guide. In at least one embodiment of the invention, a polymer is used within the wave guide to counteract the effects of temperature on the clad material of the wave guide in order to create an overall effective refraction index that is substantially independent of temperature variations. Furthermore, in at least one embodiment of the invention relative segment lengths of the wave guide are chosen to stabilize the phase of the wave guide.

Lasers are focused, intense light rays of a particular wavelength or wavelength range that may be used for various functions, including reading data from a medium, such as a compact disc, surgical incisions, and creating semiconductor device features. Lasers, however, can be sensitive to temperature variations among structures within the laser generating system. This is due, at least in part, to temperature sensitivity of light refraction indices in various materials used within the laser generating system.
FIG. 1 illustrates a prior art system for generating a laser. The raw light for the laser is generated and amplified by a semiconductor optical amplifier (SOA) chip. The light generated by the SOA enters a wave guide consisting of a clad material, a wave guide core, and series of grating lenses (grating) in order to direct and refine the laser down to a desired wavelength and phase. After light enters the wave guide, it is passed through the grating, which consists of a series of lenses that can pass the desired wavelength and reflect others.
As a result, the light, excluding the desired wavelength, continually reflects from the grating toward the SOA chip. The effect is a laser produced from the wave guide that is of a desired wavelength and phase. The desired wavelength is passed by the grating, whereas the desired phase is produced by placing the grating at a distance from the SOA chip such that the round trip distance of the reflected light is an integer division of the desired wavelength.
Unfortunately, the wave guide clad material and the wave guide core material can change temperature during the course of generating the laser, which can, in turn, change the refraction indices of the wave guide core and clad materials. The refraction index of a material is an indicator of the material's ability to pass or reflect certain frequencies of light. As the refraction index of the clad or core material changes with temperature, less of a particular wavelength of light may be reflected and therefore propagated through the wave guide, resulting in loss of laser intensity or a change in the laser's wavelength.
As a laser travels through the wave guide core, it can be effected by the overall effective refraction index of a substantially cylindrical area surrounding the wave guide core known as the optical mode. FIG. 2 illustrates a cross-sectional view of the wave guide, in which the cross-section of the optical mode is indicated by the red circle. The material within the boundary of the optical mode can effect the light traveling through the core if the temperature of the material changes, due to the resulting change in the refraction index of the material within the optical mode.
Adverse effects on a laser due to temperature sensitivity of refraction indices of materials has been addressed in prior art laser generating systems by using power-consuming devices, such as a thermal electric cooler (TEC). The TEC may be used to cool the wave guide within the optical mode as the wave guide temperature increases from the laser generating process. Through what can be an elaborate technique of detecting the optical mode temperature and adjusting the TEC accordingly, the temperature of the wave guide in the optical mode can remain stable enough to generate a laser that is of substantially the desired wavelength and phase for a particular application.
The TEC, however, can have adverse effects on system power consumption, system cost, and system reliability. Furthermore, the accuracy of the laser's wavelength and phase, using a TEC, is, at least in part, a function of how quickly the TEC can respond to temperature variations within the optical mode without over-compensating for them. As a result, the overall accuracy of the laser can be compromised.

Apparatus for stabilizing laser wavelength


An interference fit joining method includes providing a tolerance adjuster and a die casting boss formed in a magnesium-based die casting. The method also includes positioning the tolerance adjuster over a cavity of the die casting boss. The method also includes pressing the tolerance adjuster at least partially into the cavity to form a joint assembly.

The present application relates to joining methods for fastening tolerance adjusters (also called tolerance compensators) onto magnesium-based die castings. More specifically, the present application relates to joining methods for fastening tolerance adjusters onto magnesium-based die castings using interference fitting measurements in automotive applications.
Tolerance adjusters are typically designed to bridge distances (i.e. tolerances) between two axially-connected components using an automatic, self-adjusting mechanism. In automotive applications, tolerance adjusters are often used as vital components in the assembly of, for example, headlamps, rear lights, instrument panels, mudguards, door frames and roof ledges. A conventional tolerance adjuster is illustrated in FIG. 1 and comprises a compensation (i.e. adjuster) element, which translates axially and includes horizontal flat surface as the connecting means, a spring element for enabling axial mobility of the compensation element, a base element into which the compensation element is screwed to adjust tolerances, and a tang-style fastening element for attaching onto magnesium-based die casting bosses. The magnesium-based die casting bosses serve as a mounting point for the tolerance adjuster and must be designed to have sufficient structural integrity and strength for supporting the tolerance adjuster as well as mechanical stability for withstanding vibrations and shock during operation of the vehicle.
FIGS. 2 and 3 illustrate a conventional joining method for a tolerance adjuster having a tang-style fastening system whereby the fastening element is aligned over machined windows from a casting wall surrounding the magnesium-based die casting boss (FIG. 2) and then subsequently inserted into the windows to "snap lock" onto the mounting die cast boss (FIG. 3). However, numerous drawbacks may result from using this existing technology. For example, machining the window openings for the tangs in the die cast boss is difficult because design specifications often call for narrow placement of the window openings in regions where there is little to no buffer (i.e. open) areas surrounding the window opening. Thus, the resulting window openings are brittle and subject to breakage when receiving the fastening element of the tolerance adjuster. In addition, the mounting structures of the magnesium-based die casting have to be outside of the boss area, thus increasing the packaging footprint.
It would be advantageous to provide improved joining methods for fastening tolerance adjusters onto magnesium-based die castings that overcome the foregoing challenges. These and other advantageous features will be apparent to those reviewing the present disclosure.

Joining method for fastening tolerance adjusters to magnesium-based castings


A connector for use with a pleural catheter that connects securely a drainage tube to a valve of the plural catheter. A system including a fluid receptacle having a negative fluid pressure, a plural catheter having an end designed for implantation into a pleural space of a subject, and an opposite second end having a valve feature, a drainage tube having an end connected to the fluid receptacle and another end having a connector that securely connects the drainage tube to the valve feature of the catheter.

Pleural effusion refers to the effusion of fluid into the pleural space. The pleural space normally contains approximately 5 to 20 ml of fluid. A disruption in the balance between the movement of fluid into the pleural space and the movement of fluid out of the pleural space may produce excessive fluid accumulation in the pleural space. Such disruptions may include, for example, (1) increased capillary permeability resulting from inflammatory processes such as pneumonia, (2) increased hydrostatic pressure as in congestive heart failure, (3) increased negative intrapleural pressure as seen in atelectasis, (4) decreased oncotic pressure as occurs in the nephrotic syndrome with hypoalbuminemia, and (5) increased oncotic pressure of pleural fluid as occurs in the inflammation of pleural tumor growth or infection. Pleural effusion is particularly common in patients with disseminated breast cancer, lung cancer or lymphatic cancer and patients with congestive heart failure, but also occurs in patients with nearly all other forms of malignancy.
The clinical manifestations of pleural effusion include dyspnea, cough and chest pain which diminish the patient's quality of life. Although pleural effusion typically occurs toward the end of terminal malignancies such as breast cancer, it occurs earlier in other diseases. Therefore relieving the clinical manifestations of pleural effusion is of a real and extended advantage to the patient. For example, non-breast cancer patients with pleural effusion have been known to survive for years. See "Pleural Effusion in Cancer Patients", Izbicki, et al., Cancer October 1975, p. 1511.
There are a number of treatments for pleural effusion. If the patient is asymptomatic and the effusion is known to be malignant or paramalignant, treatment may not be required. Such patients may develop progressive pleural effusions that eventually do produce symptoms requiring treatment, but some will reach a stage where the effusions and reabsorption reach an equilibrium that is still asymptomatic and does not necessitate treatment.
One approach to removing fluid from the pleural space is to surgically implant a chest tube. Such tubes are commonly quite rigid and fairly large in diameter and are implanted by making a surgical incision and spreading apart adjacent ribs to fit the tube into place. Such procedures are painful to the patient, both initially when the chest tube is inserted and during the time it remains within the pleural space.
Thoracentesis is a common approach to removing pleural fluid, in which a needled catheter is introduced into the pleural space through an incision in the chest cavity and fluid is positively drawn out through the catheter using a syringe or a vacuum source. The procedure may also include aspiration utilizing a separate syringe. There are a number of difficulties in thoracentesis, including the risk of puncturing a lung with the catheter tip or with the needle used to introduce the catheter, the risk of collapsing a lung by relieving the negative pressure in the pleural space, the possibility of aggravating the pleural effusion by stimulating fluid production in the introduction of the catheter, and the risk of infection. One of the primary difficulties with ordinary thoracentesis procedures is that fluid reaccumulates in the pleural space relatively quickly after the procedure is performed, and so it is necessary to perform the procedure repeatedly—as often as every few days. In fact, some studies found that the fluid re-accumulates in one to three days in most cases and re-accumulates within a month in 97% of the cases studied. See "Diagnosis and Treatment of Malignant Pleural Effusion", F. J. Hausheer, J. W. Yarbro, Seminars in Oncology, March 1985, p. 54; "Malignant Effusion", Anderson, et al., Cancer, April 1974, p. 916. Of course, each time the procedure is repeated the risks identified above are heightened. Moreover, the comfort to the patient resulting from the procedure begins to be offset by the discomfort of the procedure itself.
Methods and devices for removing pleural effusion which do not require repeated invasion of the pleural have been developed, for example see U.S. Pat. No. 5,484,401. The device of U.S. Pat. No. 5,484,401 consists of a catheter connected to an end of a drainage tube which in turn is connected though the other end to a vacuum bottle. The catheter and the drainage tube are connected through a valve that is normally closed but can be opened by the insertion of the drainage tube. According to U.S. Pat. No. 5,484,401 the drainage tube needs to be slighter large in diameter than the hole in the hole in the valve so as to produce a seal. The problem with the device described in U.S. Pat. No. 5,484,401 is that this seal between the catheter and the drainage tube can be easily broken. As such, different locking mechanisms have been developed to prevent disengagement between the catheter and the drainage tube. For example see U.S. Pat. No. 8,337,475 which describes a connector to attach the drainage tube to a catheter. The connector of U.S. Pat. No. 8,337,475, however, requires an actual lock.


A display that includes at least one gray level being provided to a plurality of pixels that illuminates each of the pixels with the gray level. The display applies corrective data for the pixels so as to reduce the mura effects of said display for those characteristics generally visible by the human visual system and so as not to reduce the mura effects of the display for those characteristics generally not visible by the human visual system.

The present invention relates to a system for detecting defects in a displayed image. More specifically, the present invention relates to a system for detecting and correcting mura defects in a displayed image.
The number of liquid crystal displays, electroluminescent displays, organic light emitting devices, plasma displays, and other types of displays are increasing. The increasing demand for such displays has resulted in significant investments to create high quality production facilities to manufacture high quality displays.
Despite the significant investment, the display industry still primarily relies on the use of human operators to perform the final test and inspection of displays. The operator performs visual inspections of each display for defects, and accepts or rejects the display based upon the operator's perceptions. Such inspection includes, for example, pixel-based defects and area-based defects. The quality of the resulting inspection is dependent on the individual operator is inspection which are subjective and prone to error.
"Mura" defects are contrast-type defects, where one or more pixels is brighter or darker than surrounding pixels, when they should have uniform luminance. For example, when an intended flat region of color is displayed, various imperfections in the display components may result in undesirable modulations of the luminance. Mura defects may also be referred to as "Alluk" defects or generally non-uniformity distortions. Generically, such contrast-type defects may be identified as "blobs", "bands", "streaks", etc. There are many stages in the manufacturing process that may result in Mura defects on the display.
Mura defects may appear as low frequency, high-frequency, noise-like, and/or very structured patterns on the display. In general, most Mura defects tend to be static in time once a display is constructed. However, some Mura defects that are time dependent include pixel defects as well as various types of non-uniform aging, yellowing, and burn in. Display non-uniformity deviations that are due to the input signal (such as image capture noise) are not considered Mura defects.
Referring to FIG. 1, mura defects may occur as a result of various components of the display. The combination of the light sources (e.g., fluorescent tubes or light emitting diodes) and the diffuser results in very low frequency modulations as opposed to a uniform field in the resulting displayed image. The LCD panel itself may be a source of mura defects because of non-uniformity in the liquid crystal material deposited on the glass. This type of mura tends to be low frequency with strong asymmetry, that is, it may appear streaky which has some higher frequency components in a single direction. Another source of mura defects tends to be the driving circuitry (e.g., clocking noise) which causes grid like distortions on the display. Yet another source of mura defects is pixel noise, which is primarily due to variations in the localized driving circuitry (e.g., the thin film transistors) and is usually manifested as a fixed pattern noise.
What is needed is improved Mura reduction techniques.
The foregoing and other objectives, features, and advantages of the invention will be more readily understood upon consideration of the following detailed description of the invention, taken in conjunction with the accompanying drawings.


A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at least one testing member, and an insulating material. A first end of the redistribution trace is connected to one of the test chip terminals and a second end of said redistribution trace is extended out to a position offset from the chip terminals. The testing member is provided in an outer region of the semiconductor chip circuit forming region, and the second end of the redistribution trace is connected to the testing member.

1. Field of the Invention
The present invention generally relates to a wafer-level package, a method of manufacturing thereof, and a method of manufacturing semiconductor devices from such a wafer-level package. The present invention particularly relates to an improved wafer-level package to be tested by a preliminary test (PT) and a final test (FT), a method of manufacturing the wafer-level package, and a method of manufacturing semiconductor devices using such a wafer-level package.
Recently, there is a need for more efficient manufacturing and testing processes of semiconductor devices. In order to achieve this, a full test (including PT and FT) is implemented on an uncut semiconductor wafer before being cut into individual semiconductor devices and each of the semiconductor devices are tested individually.
The advantages include good handling efficiency, a possibility of sharing certain equipment and reduced space. If the wafer sizes are equal, handling equipment can be shared. Also, it is possible to save space otherwise taken up as a storage area and/or an installation area when accommodating individualized semiconductor devices (LSI chips) in containers such as a tray.
For higher density mounting, there is an increasing need for a KGD (Known-Good Die) and a real-chip-size package (a package having the same size as that of the semiconductor chip). However, with the package structure of the semiconductor device of the related art, which does not correspond to the KGD or the real-chip-size package, the area of the package is greater than that of the semiconductor chip. Therefore, the semiconductor wafer must be individualized at some point before packaging. Thus, with the package structure of the related art, the entire process, that is to say, from a manufacture process to a test process, cannot be implemented on the semiconductor wafer.
However, with the KGD or the real-chip-size package, since the final package configuration corresponds to the area of the semiconductor chip, the entire process can be implemented on the semiconductor wafer. Therefore, the above-described advantages can be obtained.
2. Description of the Related Art
Recently, there is an increasing interest in a wafer-level package which is a package structure with which the entire process from the manufacturing process to the testing process can be implemented on a semiconductor wafer. The wafer-level package includes a semiconductor wafer provided with a plurality of semiconductor chip circuits with chip terminals, external connection terminals, redistribution traces connecting the chip terminals and the external connection terminals, and an insulating material such as a sealing resin. The insulating material is provided for protecting the semiconductor chip circuits and the redistribution traces. A structure without the insulating material is also possible.
The wafer-level package may be used in two different configurations. One is in the form of a wafer (i.e., before being cut) and the other is in form of individual semiconductor devices (i.e., after cutting into individual semiconductor chip circuits.)
In the following, the wafer-level package of the above-described structure will be described with regard to a test process thereof. With the wafer-level package, like that of the semiconductor devices of other configurations, the manufacture process includes a test process. The test process generally includes a preliminary test (PT) and a final test (FT).
The PT is a test implemented before providing the insulating material. The PT is a general test such as a conduction test of the interconnections, and thus does not include the operation test of the semiconductor chip circuit itself. Since the PT is implemented before providing the insulating material, the PT can be implemented using the chip terminals provided on the semiconductor chip circuit.
The PT is particularly advantageous for the package structure of the semiconductor devices of the related art (hereinafter, referred to as a conventional package), which are not designed for the KGD or for the real-chip-size package. In a manufacture process of the conventional package, the PT is followed by a cutting process (i.e., dicing process) for individualizing the semiconductor wafer into the semiconductor devices. Then, only those semiconductor devices, which were determined good in the PT, are provided with the insulating material and undergo the FT. In other words, those semiconductor devices, which were determined bad in the PT, are not provided with the insulating material and also do not undergo the FT. Thus, the manufacture efficiency can be improved.
The FT is implemented after providing the insulating material. The FT is a total test including the operation test of the semiconductor chip circuit. Since the FT is implemented after the insulating material has been provided, the FT can only be implemented using the external connection terminals exposed from the insulating material. In other words, the terminals (such as the chip terminals) other than those generally used by the users are not exposed. Therefore, the chip terminals sealed in the insulating material cannot be used in the FT.
Therefore, in the related art, the wafer level package is tested by, first, implementing the PT before providing the insulating material using the chip terminals which are not yet covered with the insulating material. After the PT, the insulating material is provided, and then the FT is implemented using the external connection terminals exposed from the insulating material.
In the test process of the related art, the object of implementing the PT is to improve manufacture efficiency by avoiding the insulating material being provided on bad semiconductor devices and thus avoiding the FT being implemented thereon. On the contrary, with the wafer-level package, all semiconductor chip circuits, including circuits of the bad semiconductor devices, are provided with the insulating material and undergo the FT, so that it is not necessary to implement the PT before the FT.
Also, as has been described above, the wafer-level package is used for simplifying the manufacture process by using the semiconductor wafer from the manufacture process to the test process. For further simplifying the manufacture process, the PT and the FT, which in the related art were implemented as two separate tests, can be integrated into a single test process.
When the PT and the FT are integrated into a single test process, the integrated test process can be carried out either before providing the insulating material (i.e., when the PT is implemented in the related art) or after providing the insulating material (i.e., when the FT is implemented in the related art). When the integrated test process is implemented before providing the insulating material, it is not possible to detect any failure produced in the semiconductor chip circuit while providing the insulating material. Thus, the test process should be implemented in a later step in the manufacture process of the semiconductor device.
On the contrary, when the integrated test process is implemented after providing the insulating material, only the external connection terminals exposed from the insulating material may be connected to test equipment (e.g., a semiconductor tester). That is to say, the chip terminals include terminals which do not serve as the external connection terminals but can be used for testing the semiconductor chip circuit (hereinafter referred to as test chip terminals). There is a drawback that the test chip terminals will be covered with the insulating material, so that the test using the test chip terminals cannot be implemented after providing the insulating material.
In order to avoid such a drawback, test terminals may be provided in a region of the semiconductor chip circuit region, which terminals are exposed from the insulating material and are connected to the above-described test chip terminals. Thus, with such test terminals, all tests including the PT and the FT (full test) can be implemented after providing the insulating material.
However, the test terminals will not be used after the test process, and thus become unwanted terminals for the package. Such test terminals provided on the semiconductor chip circuit forming region results in an increase in the size of the semiconductor chip circuit forming region due to an area occupied by the test terminals. Accordingly, it is not possible meet the requirement for a miniaturization of the semiconductor device.
Also, when the test terminals are provided at a position adjacent to the external connection terminals used for operating the semiconductor chip, the test terminals may also be mistakenly mounted on a mounting board. In such a case, a false operation may occur. Therefore, the test terminals should not remain on the package after the insulating material has been provided.
Further, the PT can be omitted (that is to say, all tests can be implemented in the FT), but as has been described above, not all test chip terminals can be used in the FT. Therefore, tests, which used to be implemented in the PT only, cannot be implemented. For example, if the RAM and logic circuits are mounted in a mixed manner, a single test of the RAM cannot be carried out. At the same time, recently, since a high reliability is required for the semiconductor device, the PT cannot be omitted just for the sake of simplifying the manufacturing process.
From the above-described reasons, the PT and the FT have not been integrated in the related art. First, the PT is implemented, and then the insulating material is provided. Finally, the FT is implemented. Therefore, there is a problem that the manufacture process of the wafer-level package is complicated and thus the manufacture efficiency is decreased and the manufacture cost is increased.

Wafer-level package having test terminal


Embodiments perform migration-aware load balancing in virtual data centers. One or more load balancing modules in a host distribute data requests from clients to one or more servers implemented as virtual machines (VMs). The load balancing modules are notified of VM migration (e.g., live migration) prior to the VM migration and reduce the load on the VM to be migrated. After being notified of completion of VM migration, the load balancing modules increase the load on the migrated VM. Such migration notifications enable the load balancing modules to prevent or reduce performance degradation and migration duration, among other aspects.

Some existing systems deploy web servers as virtual machines (VMs) running on a single physical host. The host may have one, or a few, front-end virtual load balancers that operate to distribute traffic among the web servers so that no single server becomes a performance bottleneck. Operation of the load balancers is affected by surges in traffic loads and changing conditions of the web servers. For example, in a virtual data center, the VMs implementing the web servers are frequently migrated across physical hosts (e.g., due to address failures, congestion, or load rebalancing).
Live migration of VMs is a form of migration that allows high availability, transparent mobility, and consolidation. With live migration, running VMs are moved between hosts without disconnecting services executing inside the VMs. With existing systems, however, the load balancers are unaware of the underlying migration states of the VMs. For example, the load balancers treat the VMs undergoing migration no differently from the VMs that are not being migrated. As a result, the load balancers continuously dispatch new connections to the VMs being migrated introducing performance challenges into the migration. Exemplary performance challenges include, but are not limited to, an increase in memory to copy during a pre-copy phase of migration, memory-related bookkeeping, and additional downtime for saving and restoring non-memory states.
Some of the existing load balancing algorithms track web server status (e.g., server load, connection count, response time, etc.) by, for example, passively probing the web servers. This technique, however, only detects performance degradation after the performance degradation has occurred. As such, it is difficult for existing load balancers to respond (e.g., redirect traffic elsewhere) to short resource spike usage scenarios introduced by migration of VMs.

Performance of load balancing modules with migration awareness


Aspects of this invention include the use of G-2MePE to treat patients with brain injury characterized by non-convulsive seizures. G-2MePE is useful in treating brain injuries caused by traumatic brain injury, stroke, hypoxia/ischemia and toxic injury.

1. Field of the Invention
This invention relates to analogs of glycyl-L-prolyl-L-glutamic acid (GPE). In particular, this invention relates to neuroprotective GPE analogs, to methods of making them, to pharmaceutical compositions containing them, and to their use in treating neurological disorders resulting from brain injury and characterized by non-convulsive brain seizures.
2. Description of Related Art
Each year approximately 1.5 million people in the U.S.A. sustain a traumatic brain injury with an estimated 1.0 million hospitalised. Of these, 225,000 are moderate to very severe and 50,000 result in death. These injuries can be caused by concussions, penetrating injury, contusions and diffuse axonal injury resulting from tearing of brain tissue. Traumatic brain injury is a difficult and often frustrating condition to treat. Blunt head trauma can result in brain hemorrhage, swelling and increased intracranial pressure. Penetrating wounds caused by projectiles can be particularly difficult because of the rapid absorption by brain tissues of a large amount of kinetic energy and the high degree of damage that can result. As a direct result of such injuries, brain cells can be damaged or die. Additionally, secondary effects can further exacerbate the loss of functional neurons. For example, cellular damage can release cytokines and other chemoattractive molecules into the brain and can cause inflammation. Inflammation itself can cause additional damage to brain tissues and cells through the release of proteases and other inflammatory mediators, which may recruit yet additional cell types and exacerbate the problems further.
Many attempts are made to reduce the severity of brain injury. Surgery can be used to remove projectiles, bone fragments or other debris from the brain. Additionally, surgery can be successful in certain cases to relieve increased intracranial pressure, which can cause additional nerve damage, either through a direct effect on pressure, or an effect related to changes in blood flow to affected portions of the brain. For example, a focal traumatic injury that causes bleeding or increased vascular permeability can produce an area of increased hydrostatic pressure. If the pressure is sufficiently high, blood flow to nearby portions of uninjured neural tissue can be reduced, compromising oxygenation of the affected tissue. Further, decreased blood flow, if severe enough, can cause starvation of brain tissues due to decreased flow of nutrients to the affected areas. As a result of these changes, in most patients with traumatic brain injury, recovery is often slow and incomplete. With prolonged periods of injury, neurological functions can be severely compromised and neural deficits may persist for many years, or even for the remainder of the patient's lifetime.
In addition to traumatic brain injury, stroke or severe hypoxia/ischemia can also result in brain injury. In many cases, patients with stroke exhibit similar signs and symptoms as patients with traumatic brain injury, including penetrating ballistic brain injury (PBBI). Further, perinatal asphyxia and coronary artery bypass graft (CABG) surgery, brain seizures and neurotoxic agents can lead to brain injury.
In many types of brain injury, neural deficits and neurological signs may be easy to evaluate. In some cases, impairment of motor function or abnormalities in electroencephalographic (EEG) signals is observed. In many animals and humans with traumatic brain injury, stroke or severe hypoxia/ischemia, a type of delayed EEG abnormality or brain seizure may evolve that is associated with overt motor convulsions and is therefore clearly identifiable by observers of such patients and thereby treatable with established anti-epileptic drug (AED) therapy.
However, in most cases of brain injury acute/early monitoring of EEG brain function is impossible or impractical. Here seizures may occur that are not associated with overt motor abnormalities. Without continuous EEG monitoring these "non-convulsive seizures" ("NCS") or "silent brain seizures" ("SBS") are not observed as a clinical feature of the brain trauma and go untreated. Nonetheless, such non-convulsive seizures can reflect severe brain injury. In one study, a subgroup of patients with severe traumatic brain injury experienced electroencephalographic signs of seizures, but had no convulsions (Vespa et al., J. Neurosurg 91:750-760 (1999), expressly incorporated herein fully by reference.
Non-convlusive seizures are not only symptomatic, but also can contribute to poor patient outcome. Thus, it is desirable to identify useful treatments for NCS. Although gabapentin and ethosuximide have been reported to reduce experimental NCS, many conventional antiepileptic agents are ineffective (Williams et al., J. Pharmacol. Exp. Therap. 311:220-227 (2004), expressly incorporated herein fully by reference). Furthermore, efforts to treat NCS in human TBI with standard AED therapies have proven ineffective thereby identifying a critical care need in the art for improved methods of treating NCS.
It had been previously believed that mature nervous tissue is incapable of regeneration or recovery after severe injuries. Thus, few attempts have been made to treat brain damage to restore neural function. Fortunately, this misapprehension is being reversed, due in large part to recent studies on neural regeneration. For example, insulin-like growth factor 1 (IGF-1) has been shown to promote neural survival in animals with brain injuries. The N-terminal tripeptide of IGF-1, glycyl-prolyl-glutamate (Gly-Pro-Glu; GPE or Glypromate™) has similar neuroprotective effects. In fact, GPE has been used both in vitro and in vivo to treat neurodegeneration. However GPE is rapidly hydrolyzed by enzymes in plasma and in tissues thereby contributing to a relatively short half-life in vivo. Therefore, there is a great need for new types of therapies that can be used to treat neural damage associated with brain injuries resulting from stroke, various traumatic brain insults, coronary artery by-pass graft, hypoxic-ischemic episodes, etc.
EP 0 366 638 discloses GPE (a tri-peptide consisting of the amino acids Gly-Pro-Glu) and its di-peptide derivatives Gly-Pro and Pro-Glu. EP 0 366 638 discloses that GPE is effective as a neuromodulator and is able to affect the electrical properties of neurons.
WO95/172904 discloses that GPE has neuroprotective properties and that administration of GPE can reduce damage to the central nervous system (CNS) by the prevention or inhibition of neuronal and glial cell death.
WO 98/14202 discloses that administration of GPE can increase the effective amount of choline acetyltransferase (ChAT), glutamic acid decarboxylase (GAD), and nitric oxide synthase (NOS) in the central nervous system (CNS).
WO99/65509 discloses that increasing the effective amount of GPE in the CNS, such as by administration of GPE, can increase the effective amount of tyrosine hydroxylase (TH) in the CNS in order to increase TH-mediated dopamine production in the treatment of diseases such as Parkinson's disease.
WO02/16408 discloses GPE analogs capable of inducing a physiological effect equivalent to GPE within a patient. The applications of the GPE analogs include the treatment of acute brain injury and neurodegenerative diseases, including but not limited to, injury or disease in the CNS.
The disclosures of these and other documents referred to in this application (including in the Figures) are expressly incorporated herein by reference as if each one was individually incorporated by reference.

This patent is subject to a terminal disclaimer.

Treatment of non-convulsive seizures in brain injury using G-2-methyl-prolyl glutamate


A damper mechanism for a lockup device 7 is a device for mechanically transmitting a torque in a torque converter 1. A coil spring 58 is arranged in first and second windows 61 and 62 overlapping with each other, and is compressed in accordance with the relative rotation of drive and driven members 52 and 53. A maximum torsion angle θ m is defined when the coil springs 58 are compressed to a maximum extent by relative rotation between the drive and driven members 52 and 53. Each of the first and second windows 61 and 62 has an outer periphery longer than an inner periphery. Each ends 61a and 62a on the circumferential ends of the first and second windows 61 and 62 form an angle θ with respect to a center line extending through a center O of the damper mechanism and a circumferential center C1 or C2 of the first or second window 61 or 62, and this angle θ is in a range between 0.05 and 0.60 times as large as the maximum torsion angle θ m.

1. Field of the Invention
The present invention relates to a damper mechanism, and more particularly to a damper mechanism for a lockup device.
2. Background Information
A damper mechanism is used, for example, in a power transmission system for transmitting torque while absorbing and damping torsional vibrations. The damper mechanism includes a first rotary member, a second rotary member, and springs or elastic bodies, which will be generally referred to as "elastic members" hereinafter. These elastic members are arranged between the first and second rotary members, and are compressed when relative rotation occurs between these members. The springs may be formed of coil springs. The elastic bodies may be made of rubber or resin. The damper mechanism is employed in a clutch disk assembly, a flywheel assembly or a lockup device of a torque converter, as disclosed, for example, in Japanese Laid-Open Patent Publication No. H8-254246
The elastic members are arranged in windows formed in the first and second rotary members. When relative rotation occurs between the first and second rotary members, the radial ends of the window (i.e., the ends that extend nearly radially on the circumferential ends of the window) circumferentially compress the elastic members. Thereby, the damper mechanism transmits a torque from the first rotary member to the second rotary member, and also operates to absorb and damp torsional vibrations.
In general, each radial end on the circumferential ends of the window has a linear form, and is parallel to a straight line extending between the center of the damper and the circumferential center of the window. When relative rotation occurs between the first and second rotary members, the circumferential end portion of the window moves such that the radially outer portion thereof moves a longer distance than the radially inner portion thereof (see FIG. 4). In FIG. 4, O represents the rotational center of the rotary member, C represents the circumferential center of the window, and θ m represents the angle of relative rotation between the first and second rotary members in a state where the elastic members are compressed to a maximum extent. Thus, the elastic members are compressed by the radial ends of the windows such that the radially outer portion of the elastic members are compressed to a larger extent than the radially inner portion thereof. Accordingly, a larger stress occurs in the radially inner portion of the elastic members due to the larger deformation of the radially outer portions thereof. This reduces the lifetime of the elastic members.
In order to prevent the above situation, the radial ends of the windows are inclined relative to a straight line extending through the center of the damper and the circumferential center of the window so that the window has a substantially trapezoidal form. Thus, the circumferentially opposite ends of the radially outer periphery of the window are respectively located circumferentially outside (i.e., outside in the rotational direction of the damper) with respect to the circumferentially opposite ends of the radially inner periphery. This window shape can suppress an increase in the amount of deformation of the radially outer portion which occurs when the elastic members are compressed.
However, if the radial ends of the windows are inclined excessively, only the radially inner portion of the elastic members will come into contact with a window ends when relative rotation starts between the first and second rotary members, and thus a radially outward force (i.e., a force in a lateral direction of the elastic members) will be applied to the elastic members. If the elastic members have a low rigidity against the radially outward force, they will be deformed. This causes contact between the elastic members and the window ends, and thus increases hysteresis torque and wear on the elastic members.
More particularly, in a lockup device of a hydraulic torque transmission device such as a torque converter, the damper mechanism has been required to have elastic members which have a low rigidity and which allow a large torsional angle for absorbing vibrations. Therefore, elastic members such as coil springs having a larger circumferential length and a lower rigidity have been employed. Therefore, it is thought that that the foregoing problem will be more remarkable in a damper mechanism for a lockup device.
In view of the above, there exists a need for a damper mechanism for a lockup device which overcomes the above mentioned problems in the prior art and which can increase the lifetime of the elastic members used therein. This invention addresses this need in the prior art as well as other needs, which will become apparent to those skilled in the art from this disclosure.


A system for destabilizing improvised explosive devices includes a radio transmitter means for generating a radio signal having (i) a selected carrier frequency, (ii) a selected amplitude modulation frequency, (iii) a selected peak power output, and (iv) a selected transmit duration. A directional antenna means is coupled to and fed by the radio transmitter means, for directing the radio signal onto a suspected improvised explosive device. The radio signal, upon being directed onto the suspected improvised explosive device, causes detonation of the device.

In 1967, during the Vietnam War, the United States Naval aircraft carrier U.S.S. Forrestal experienced a catastrophic accident. Specifically, a "Zuni" rocket was accidentally fired from an aircraft about to be launched from the carrier, which resulted in ignition of a fuel fire that nearly destroyed the carrier. It was later discovered that the Zuni rocket's motor had, without command of pilot or crew, ignited. The ignition of the electrically triggered rocket motor was then determined to be a result of electromagnetic interference and consequential triggering effect from the carrier's radar.
Other instances of accidental triggering have been experienced in mining and civil engineering projects, where radio frequency interference has caused uncommanded detonation of blasting caps and other explosives used at such locations.
Since the Forrestal accident, all ordnance that employs electric triggering devices is designed and tested under rules which govern electronic packaging and shielding for minimizing electromagnetic effects thereon. In mining projects and the like, a protocol of prohibiting radio transmissions anywhere in proximity to the site has been strictly enforced.
Electrically triggered explosives are well known, and have unfortunately been successfully utilized by individual terrorists, terror organizations, and other criminals without warning for destruction of military and civilian targets alike.
These criminals have frequently utilized crudely made or so-called "improvised" explosive devices to carry out their despicable acts. These improvised explosive devices are commonly constructed from commercially available components and are assembled with little technical expertise. Such improvised devices are typically simple in their construction, comprising a package or housing containing explosives, an electronic detonator to ignite the explosives, a timer or manually operated switch to trigger the detonator, and a battery to power the electronic components. Improvised devices are, due to their simplicity, easily concealed and therefore there has been virtually no defense against them.
Therefore, it would be desirable to utilize what was tragically learned from accidents like that of the Forrestal, to combat the use of improvised explosive devices.

System and method for destabilizing improvised explosive devices


A ground terminal and a connector provided therewith where the ground terminal includes a terminal portion that is electrically connected to an outside device and elastic arms that extend in an identical direction from both ends of a central coupling portion, where a pair of latching pawls is provided in at least one of an inner circumferential edge of the central coupling portion and inner circumferential edges of the elastic arms.

1. Technical Field
The present invention relates to a ground terminal, particularly to a ground terminal assembled in a connector.
2. Related Art
Conventionally, in an annular ground terminal connected to a connector, a metallic outer shell of the connector is connected to a printed board by the annular ground terminal in order to prevent an adverse effect on a signal transmitted through the connector (see, for example, U.S. Pat. No. 7,247,052).
However, as illustrated in FIGS. 2 and 3 in the '052 patent, the annular ground terminal has a structure in which electric connection is established while the connector is fitted in the annular ground terminal previously mounted on the printed board. Therefore, unfortunately a wide installation area is required when the annular ground terminal is assembled in the printed board, integrated density is lowered, a cutting layout is degraded, the shape is complicated, and the production is not easily performed.

Ground terminal and connector provided therewith


A digital video signal recording/playback system and method is provided wherein, when recording/playing back on/from a recording medium, the amount of video data it is possible to record can be increased by making effective use of otherwise unused areas within the basic unit of data on which signal processing is performed.

"DVC" standards offer standards for digital VTRs (video tape recorders) for data compression and recording of video data (see, for example, pages 48-55 of the National Technical Report, Vol. 41, No. Apr. 2, 1995). One such DVC standard is the SD-DVC standard for the recording of video signals having normal broadcast-level resolution (SD signals).
According to this standard, in the so-called 525/60 format (a format equivalent to the NTSC signal format), the video signal is sampled at a 4:1:1 sampling ratio (One Cb sample and one Cr sample for every four Y samples). The luminance (Y) signal has 720 active picture elements ("pels" or "pixels") in the horizontal direction and 480 active lines per frame in the vertical direction. With this sampling ratio, the chrominance signals (Cb and Cr), have 180 active pels in the horizontal direction, but in the vertical direction, they have the same 480 active lines per frame as the luminance signal.
FIG. 3(a) illustrates the structure of a basic unit of data, for processing purposes, formatted according to the SD-DVC standard. As shown in this figure, a basic data unit is made up of four luminance signal blocks Y0-Y3 and two chrominance blocks Cb and Cr. Each of these basic blocks is made up of coded data developed by taking the coefficient data obtained by performing discrete cosine transformation (DCT) of the sampled data in 8.times.8-pel units, and performing optimum quantization by code volume control, and variable length coding (VLC) on this coefficient data.
Each of the blocks in FIG. 3(a) (Y0, Y1, Y3, Cr, and Cb) is made up of a "D" area and an "A" area. The "D" areas (D0-D5) contain data for the dc (direct current) component of each block after DCT-transformation, as well as ancillary data for encoding and decoding. The "A" areas (A0-A5) contain data for the ac (alternating current) components of each block. The A0-A5 areas, however, are not necessarily used separately. Area A0, for example, might be able to hold all of the ac component data for block Y0 and still have some empty space left over, while block Y2 may have more ac component data than will fit into area A2. In this situation, the block Y2 data overflow would be packed into the empty space in area A0.
Also, another standard, hereinafter referred to as "DIGITAL-S," has been proposed for recording and playback of video signals sampled at 50 Mbps (4:2:2), or twice the SD-DVC rate. This is accomplished by providing two SD-DVC-standard signal processing channels in parallel.
FIG. 3(b) shows the structure of a basic unit in the DIGITAL-S standard. This basic unit is made up of two units, each of which is equivalent to the basic unit of FIG. 3(a) without its block Y1 and Y3 data. The reason for this is that although two 4:1:1 signal processing circuits are used, thus constituting an 8:2:2 unit overall, the video signal being processed is a 4:2:2 signal. Therefore, the block Y0, Y1, Cr0, and Cb0 data is placed in areas D0-D3 and A0-A5, and the block Y2, Y3, Cr1, and Cb1 data is placed in areas D4-D7 and A6-A11. The shaded areas V1-V4 are unused areas.

Method and apparatus for recording and playing back digital video signal


Copper can be pattern etched at acceptable rates and with selectivity over adjacent materials using an etch process which utilizes a solely physical process which we have termed xe2x80x9cenhanced physical bombardmentxe2x80x9d. Enhanced physical bombardment requires an increase in ion density and/or an increase in ion energy of ionized species which strike the substrate surface. To assist in the removal of excited copper atoms from the surface being etched, the power to the ion generation source and/or the substrate offset bias source may be pulsed. In addition, when the bombarding ions are supplied from a remote source, the supply of these ions may be pulsed. Further, thermal phoresis may be used by maintaining a substrate temperature which is higher than the temperature of a surface in the etch chamber. It is also possible to use a chemically reactive species in combination with the physical ion bombardment without causing copper corrosion problems, so long as the concentration of the chemically reactive ion component is sufficiently low that the etching is carried out in a physical bombardment dominated etch regime.

1. Field of the Invention
The present invention pertains to a method of pattern etching a copper layer on the surface of a semiconductor device substrate.
2. Brief Description of the Background Art
In the multi level metallization architecture used in present day semiconductor devices, aluminum is generally used as the material of construction for interconnect lines and contacts. Although aluminum offers a number of advantages in ease of fabrication, as integrated circuit designers focus on transistor gate velocity and interconnect line transmission time, it becomes apparent that copper is the material of choice for the next generation of interconnect lines and contacts.
Copper has not been used in the past principally because of fabrication problems. In particular, copper is difficult to etch and therefore device patterning is particularly challenging. Known art in copper patterned etching has been encumbered by selectivity and etch rate issues. Etch rates obtained by purely physical bombardment have been typically about 300 xc3x85-500 xc3x85 per minute or less, as described by Schwartz and Schaible, J. Electrochem. Soc., Vol. 130, No. 8, p. 1777 (1983) and by H. Miyazaki et al., J. Vac. Sci. Technol. B 15(2) p.239 (1997), respectively. To improve etch rate, various chemical reactants have been used during the etch process. These chemical reactants react with the copper to create volatile species which can then be removed by application of vacuum to the process chamber. However, when such chemical reactants are used, corrosion is a major problem during the fabrication, as copper does not form any self passivating layer like aluminum does. In particular, oxidation of copper increases resistivity; further, in the case of copper interconnect lines, the whole wire line may corrode all the way through, resulting in device failure. Another problem with copper is diffusion into adjacent materials. Typically, a barrier layer is used between copper and adjacent materials, since diffusion of copper into such materials may degrade the material performance properties.
Offsetting the diffusion disadvantage, copper offers improved electromigration performance over aluminum. In fact, in tests to determine the lifetime of an interconnect wire, the electromigration lifetime of a copper wire is approximately 10 times longer than that of aluminum. In addition, as semiconductor device speeds and function are increased, interconnect speed has become critical, and the improved interconnect transmission rates which can be achieved with copper have encouraged circuit designers to look to copper as the solution.
There are two principal competing technologies under evaluation by material and process developers working to enable the use of copper. The first technology is known as damascene technology. In this technology, a typical process for producing a multilevel structure having feature sizes in the range of 0.5 micron (xcexcm) or less would include: blanket deposition of a dielectric material; patterning of the dielectric material to form openings; deposition of a diffusion barrier layer and, optionally, a wetting layer to line the openings; deposition of a copper layer onto the substrate in sufficient thickness to fill the openings; and removal of excessive conductive material from the substrate surface using chemical-mechanical polishing (CMP) techniques. The damascene process is described in detail by C. Steinbruchel in xe2x80x9cPatterning of copper for multilevel metallization: reactive ion etching and chemical-mechanical polishingxe2x80x9d, Applied Surface Science 91 (1995) 139-146.
The competing technology is one which involves the patterned etch of a copper layer. In this technology, a typical process would include deposition of a copper layer on a desired substrate (typically a dielectric material having a barrier layer on its surface); application of a patterned hard mask or photoresist over the copper layer; pattern etching of the copper layer using wet or dry etch techniques; and deposition of a dielectric material over the surface of the patterned copper layer, to provide isolation of conductive lines and contacts which comprise various integrated circuits. An advantage of the patterned etch process is that the copper layer can be applied using sputtering techniques well known in the art. The sputtering of copper provides a much higher deposition rate than the evaporation or CVD processes typically used in the damascene process, and provides a much cleaner, higher quality copper film than CVD. Further, it is easier to etch fine patterns into the copper surface and then deposit an insulating layer over these patterns than it is to get the barrier layer materials and the copper to flow into small feature openings in the top of a patterned insulating film.
Each of the above-described competing technologies has particular process problems which must be solved to arrive at a commercially feasible process for device fabrication. In the case of the damascene process, due to difficulties in the filling of device feature sizes of 0.25 xcexcm and smaller (and particularly those having an aspect ratio greater than one) on the surface of the dielectric layer, the method of choice for copper deposition is evaporation (which is particularly slow and expensive) or chemical vapor deposition, CVD (which produces a copper layer containing undesirable contaminants and is also a relatively slow deposition process). Further, the CMP techniques used to remove excess copper from the dielectric surface after deposition, also create problems. Copper is a soft material which tends to smear across the underlying surface during polishing. xe2x80x9cDishingxe2x80x9d of the copper surface may occur during polishing. As a result of dishing, there is variation in the critical dimensions of conductive features. Particles from the slurry used during the chemical mechanical polishing process may become embedded in the surface of the copper and other materials surrounding the location of the copper lines and contacts. The chemicals present in the slurry may corrode the copper, leading to increased resistivity and possibly even corrosion through an entire wire line thickness. Despite the number of problems to be solved in the damascene process, this process is presently viewed in the industry as more likely to succeed than a patterned copper etch process for the following reasons.
The patterned etch process particularly exposes the copper to corrosion. Although it is possible to provide a protective layer over the etched copper which will protect the copper form oxidation and other forms of corrosion after pattern formation, it is critical to protect the copper during the etch process itself to prevent the accumulation of involatile corrosive compounds on the surface of the etched copper features. These involatile corrosive compounds cause continuing corrosion of the copper even after the application of a protective layer over the etched features.
Wet etch processes have been attempted; however, there is difficulty in controlling the etch profile of the features; in particular, when the thickness of the film being etched is comparable to the minimum pattern dimension, undercutting due to isotropic etching becomes intolerable. In addition, there is extreme corrosion of the copper during the etch process itself.
Plasma etch techniques provide an alternative. A useful plasma etch process should have the following characteristics: It should be highly selective against etching the mask layer material; it should be highly selective against etching the material under the film being etched; it should provide the desired feature profile (e.g. the sidewalls of the etched feature should have the desired specific angle); and the etch rate should be rapid, to maximize the throughput rate through the equipment. Typically, a chlorine-comprising gas is used in the reactive ion etch processing of the copper. Although the chlorine provides acceptable etch rates, it causes the copper to corrode rapidly. The chlorine reacts very fast, but produces reaction byproducts which are not volatile. These byproducts remain on the copper surface, causing corrosion over the entire etched surface. The byproducts can be made volatile subsequent to the etch step by treatment with chemical species which create a volatile reaction product, but by this time the corrosion is already extensive.
An example of a treatment to remove chlorides and fluorides remaining after the etch of a conductive layer is provided in U.S. Pat. No. 4,668,335 to Mockler et al., issued May 26, 1987. In Mockler et al., the workpiece (wafer) is immersed in a strong acid solution, followed by a weak base solution after the etch of an aluminum-copper alloy, to remove residual chlorides and fluorides remaining on the surface after etching. Another example is provided in U.S. Pat. No. 5,200,031 to Latchford et al., issued Apr. 6, 1993. In Latchford et al, a process is described for removing a photoresist remaining after one or more metal etch steps which also removes or inactivates chlorine-containing residues, to inhibit corrosion of remaining metal for at least 24 hours. Specifically, NH3 gas is flowed through a microwave plasma generator into a stripping chamber containing the workpiece, followed by O2 gas (and optionally NH3 gas), while maintaining a plasma in the plasma generator.
Attempts have been made to reduce the corrosion by introducing additional gases during the etch process (which can react with the corrosion causing etch byproducts as they are formed). In addition, gaseous compounds which can react to form a protective film over the sidewalls of etched features as they are formed have been added during the etching process and after the etch process. However, residual corrosion continues to be a problem and the protective film, while protecting from future contact with corrosive species, may trap corrosive species already present on the feature surface.
An example of the formation of a passivating film on pattern sidewalls is presented by J. Torres in xe2x80x9cAdvanced copper interconnections for silicon CMOS technologiesxe2x80x9d, Applied Surface Science, 91 (1995) 112-123. Other examples are provided by Igarashi et al. in: xe2x80x9cHigh Reliability Copper Interconnects through Dry Etching Processxe2x80x9d, Extended Abstracts of the 1994 International Conference on Solid State Devices and Materials, Yokohama, 1994, pp.943-945; in xe2x80x9cThermal Stability of Interconnect of TiN/CuTiN Multilayered Structurexe2x80x9d, Jpn. J. Appl. Phys. Vol. 33 (1994) Pt. 1, No. 1B; and, in xe2x80x9cDry Etching Technique for Subquarter-Micron Copper Interconnectsxe2x80x9d, J. Electrochem. Soc., Vol. 142, No. 3, March 1995.
If the patterned etch technique is to be used for fabrication of semiconductor devices having copper interconnects, contacts, and conductive features in general, it is necessary to find an etch method which does not create corrosion or a source of future corrosion during the etch process itself.
In addition to controlling corrosion, it is necessary to control the profile of the etched pattern. An example of a technique used for obtaining a high etch rate and highly directional reactive etching of patterned copper films copper is described by Ohno et al in xe2x80x9cReactive Ion Etching of Copper Films in a SiCl4, N2, Cl2, and NH3 Mixturexe2x80x9d, J. Electrochem. Soc., Vol. 143, No. 12, December 1996. In particular, the etching rate of copper is increased by increasing the Cl2 flow rate at temperatures higher than 280xc2x0 C. However, the addition of Cl2 is said to cause undesirable side etching of the Cu patterns. NH3 is added to the gas mixture to form a SiN-like protective film that prevents side etching. The etch gas mixture which originally contained SiCl4 and N2 was modified to contain SiCl4, N2, Cl4, and NH3. Thus, protective films formed during etching are used by some practitioners skilled in the art to reducing corrosion (as described above) and by others for controlling the directional etching of the pattern surface.
In the above examples, it is presumed that reactive ion etching which includes the use of a chemical reactant for copper is the technique by which dry etching must be accomplished, and considerable effort is put into techniques for removing the reactive ion etch byproducts from the surface of the patterned copper after etch. Further, at the concentrations of the chemically reactive ions recommended for the etching process, there are problems in controlling the directional etching of the copper film.
We have discovered that copper can be pattern etched at acceptable rates and with selectivity over adjacent materials using an etch process which utilizes a solely physical basis such as ion bombardment, without the need for a chemically based etch component. We have named the process xe2x80x9cenhanced physical bombardmentxe2x80x9d. There are generally four techniques for generation of enhanced physical bombardment.
A first preferred enhanced physical bombardment technique requires an increase in ion density and/or an increase in ion energy of ionized species which strike the substrate surface. An increase in ion density is preferably achieved by placing a device inside the etch chamber above the substrate surface, which device enables an increase in the number of ionized particles striking the substrate surface. An example of such a device is an inductive coil which is used to increase the number of ionized species or to maintain the number of ionized species supplied by another source so than an increased number of ionized species are available to strike the substrate surface.
A second preferred method for increasing the number of ionized species is to feed into the process chamber a microwave-generated plasma produced outside of the chamber.
It is also possible to increase the number of ionized species by increasing the RF power to an external inductively coupled coil or to increase the DC power to a capacitively coupled source for ion species generation. However, these latter two techniques are less preferred methods for increasing ion density, since the copper (and alloy metal(s)) atoms generated during etching affect the performance of an external coil and since capacitively coupled species generation is not very efficient.
By ion energy, it is meant the energy of the ion at the time it strikes the substrate surface. A second preferred enhanced physical bombardment technique is increasing (to the limit that the substrate is detrimentally affected) the ion energy. Ion energy may be increased by increasing an offset bias on the substrate which attracts the ionized species toward the substrate. This is typically done by increasing the RF power to a platen on which the substrate sets. The effectiveness of an increase in the bias power is dependent upon the RF frequency and the ratio of the bias grounding area to the surface area of the substrate. Ion energy is further increased by operating the etch process chamber at a lower pressure.
A third enhanced physical bombardment technique is a pulsing of the ion density or the ion energy.
One preferred means of pulsing the ion energy is to pulse the power to the device which produces the ion species or which is used to increase or maintain the number of ionized species available to strike the substrate surface. Such pulsing is preferably applied to a device located internally within the process chamber. The pulsing may be of the feed rate of an externally-generated plasma into the process chamber. Less preferably, the pulsing may be applied to an external inductively coupled source for plasma generation or to a capacitively coupled source for plasma generation.
An even more preferred means of pulsing the ion energy is by pulsing the power to the offset bias source which is applied to the substrate.
Pulsing of the ion energy reduces the possibility that an excited copper ion leaving the copper surface during etching will reattach to the copper surface in an adjacent location.
The pressure in the process vessel may also be pulsed as a means of pulsing the ion energy.
The fourth enhanced physical bombardment technique is the use of thermal phoresis. Thermal phoresis occurs when the temperature of the substrate surface is higher than the temperature of the etch chamber surfaces (walls), whereby particles dislodged from the higher temperature substrate surface are attracted toward the colder chamber surfaces.
We have also discovered that it is possible to use a combination of physical ion bombardment with a chemically reactive ion component, so long as the concentration of the chemically reactive ion component is sufficiently low that the etching is carried out in a physical bombardment dominated etch regime. Preferably this combination technique is carried out at temperatures above about 150xc2x0 C. and at pressures below about 50 mT. Since the additional energy provided by the physical bombardment is added to the formation of volatile chemical-reaction-generated compounds, the copper removal rate is not limited solely to the rate of formation of the volatile compounds and the ability of a low process chamber pressure to facilitate removal of such volatile compounds. When physical ion bombardment dominates the etch process, the pressure in the process chamber can be adjusted, to permit increased ion bombardment. An overall synergistic effect occurs, enhancing copper atom removal rate.
The preferred chemically reactive ion species is a halogen-comprising species or compound having a low molecular weight, such as Cl2, HCl, BCl3, HBr, CHF3, CF4, SiCl4, and combinations thereof. When a chlorine-comprising species is used, the chlorine-comprising components present in the feed gases to the etch chamber should be no greater than 30 volume % of the gases fed into the etch chamber during the patterned copper etch. A passivating agent such as N2, NH3, and CH4 may be used in combination with the chemically reactive ion species.

Etched patterned copper features free from etch process residue