A method of preparing a surface for exposure to an electron beam includes forming a water soluble self-acid-doped conducting polyaniline material. The water soluble self-acid-doped conducting polyaniline material may be poly(aniline-co-N-propanesulfonic acid aniline). The polyaniline material may be mixed with polyvinyl alcohol and applied to a surface prior to subjecting the surface to an electron beam. The electron beam is then transmitted through the material and onto the surface, with the polyaniline material acting as a charge dissipation layer.

1. Field of the Invention
The present invention relates to electron beam lithography and to the use of a charge dissipation layer as part of a mask forming process.
2. Description of the Related Art
Electron beam lithography may be used for producing device structures having dimensions in the sub-micron range due to the small wavelength (often less than 1 angstrom) of the electrons used. Unlike optical lithography, resolution in electron beam lithography is not presently limited by diffraction but is instead limited by electron scattering in the target materials and aberrations in the electron beam steering and shaping optics. Typical electron beam applications include mask fabrication and device fabrication by direct writing of patterns onto a resist-covered substrate. In microelectronic applications, a pattern on a substrate can be formed by first depositing a resist material on the substrate and then selectively exposing the resist material to an electron beam in a manner which locally alters a chemical or physical property of the resist. The resist material in the exposed region might, for example, either be made soluble or insoluble upon exposure to the electron beam radiation so that the solubility of the exposed region is different from that of the unexposed region. Either the exposed or the unexposed region can be removed using a solvent, depending on the particular process chosen, and the remaining resist used to protect the underlying material during processing steps such as etching or ion implantation.
One problem associated with electron beam lithography is charging of the resist by the electron beam. The resist material is typically a hardened polymer material that is highly insulating. When an electron beam is directed at the insulating surface of the resist, charge from the electron beam accumulates on the surface of the resist, creating an electric field which subsequently distorts the electron beam adjacent to the surface. Electron beams used for lithography may have a cross-section of less than 1 micron, and it is possible for even a small amount of charge to distort the electron beam to a considerably larger size or can deflect the beam by distances at least on the order of the beam diameter. The distortion results in a loss of precision and leads to pattern registration errors and poor overlay accuracy. To avoid charging the resist, a thin conducting metal layer of gold or palladium might be deposited on the resist prior to electron beam exposure. However, such a thin metal layer typically is more difficult to remove than the resist layer and additional processing steps must be added to the fabrication process when such a metal layer is used. In addition, the heat generated during the metal deposition process may degrade the lithographic properties of the resist.
U.S. Pat. No. 5,198,153 to Angelopoulos, et al., relates to a polymer material for use as a negative resist for electron beam lithography. The polymer includes a dopant species that can be rendered conductive by selective application of an energy source to the polymer. The polymer acts as a matrix into which a reagent containing the dopant species is added to form a solid solution. The dopant species is capable of disassociating upon exposure to an energy source. The dopant precursor is selected from the group consisting of onium salts, iodonium salts, borate salts, tosylate salts, triflate salts and sulfonyloxyimides. A variety of polymers including polyparaphenylevinylenes, polyanilines, polyazines, polythiophenes, poly-p-phenylene sulfides, polyfuranes, polypyrroles, polyselenophene, and polyacetylenes may be doped with the above noted precursors and then rendered conductive upon exposure to an energy source.

Electron beam imaging method using conducting polyaniline material


A new cultivar of Pelargonium named ‘KLEPZ08224’ particularly characterized with shiny red inflorescences, an upright plant habit with a medium growth habit, and good flower quality, is disclosed.

The present invention comprises a new and distinct cultivar of Pelargonium, botanically known as Pelargonium zonale, and hereinafter referred to by the cultivar name 'KLEPZ08224'. 'KLEPZ08224' was discovered as a seedling resulting from a cross in June 2004 in Stuttgart, Germany between the proprietary female Pelargonium parent, 'KLEP03107' (U.S. Plant Pat. No. 18,025) and the proprietary male Pelargonium parent, 'S 010' (unpatented). A single plant selection was subsequently chosen for further evaluation and for asexual propagation.
The new cultivar was created in 2004 and first propagated in August 2005 in Stuttgart, Germany and has been asexually reproduced repeatedly by vegetative cuttings in Stuttgart, Germany over a four year period. 'KLEPZ08224' has been found to retain its distinctive characteristics through successive asexual propagations.
Plant Breeder's Rights for this cultivar were applied for in Switzerland on Jun. 19, 2008 and in Canada on Mar. 28, 2008. 'KLEPZ08224' has not been made publicly available more than one year prior to the filing date of this application.


A developer supply method of a wet electrographic printer is disclosed. The method having a reservoir for supplying a developer obtained by mixing a liquid carrier with an ink to a developing unit, a carrier cartridge for supplying the liquid carrier to the reservoir, an ink cartridge for supplying the ink to the reservoir, and a process tank for receiving the developer from the reservoir, includes the steps of supplying the liquid carrier and the ink to the reservoir to have an optimum concentration and a maximum level, determining whether the concentration of the developer in the reservoir is less than a minimum concentration, or the level of the developer is less than a minimum level, draining all of the developer in the reservoir to the process tank such that the level of the developer is the minimum level, if the concentration of the developer was less than the minimum concentration or the level was less than the minimum level in the determining step, supplying a predetermined amount of the developer in the process tank to the reservoir in order to measure the concentration of the developer in the process tank using a concentration sensor installed in the reservoir, and supplying the liquid carrier or the ink or the developer in the process tank to the reservoir such that the developer in the reservoir has the optimum concentration and the maximum level.

1. Field of the Invention
The present invention relates to a wet electrographic printer, and more particularly, to a developer supply method of a wet electrographic printer, capable of controlling the concentration and level of the developer.
2. Description of the Related Art
In general, a wet electrographic printer is an apparatus for developing an electrostatic latent image, formed on a photosensitive medium such as a photosensitive belt, with a developer of a predetermined color and transferring the developed image to print a desired image. The wet electrographic printer includes a developing unit for developing an image by supplying the developer to the photosensitive medium, and a developer supply apparatus for constantly supplying the developer of a predetermined concentration to the developing unit. The developer is a mixture of a condensed ink, containing a powdery toner, with a liquid carrier, in which the toner is diluted to a concentration of approximately 2.about.4 wt %. Hereinafter, the concentration of the developer is defined by the wt % of the toner.
Meanwhile, the developer supply apparatus includes an ink cartridge for storing the condensed ink, a carrier cartridge for storing the liquid carrier, and a reservoir for storing the developer obtained by mixing the condensed ink with the liquid carrier at a predetermined ratio. Also, agitators for preventing the toner from settling out of the solution may be installed in the ink cartridge and the reservoir.
In the above developer supply apparatus, the amount of developer stored in the reservoir is reduced by the amount used to develop the electrostatic latent image of the photosensitive medium, so that more condensed ink and liquid carrier must be supplied to the reservoir to maintain the developer at a constant concentration. Also, the level of developer stored in the developer reservoir must be maintained at a constant level.
The consumption of the toner and the liquid carrier may be different according to a printed image. That is, more liquid carrier than toner is required to print a simple image or a small image, and more toner than liquid carrier is required to print a complicated image. Thus, in order to maintain the concentration of the developer at a predetermined concentration, it is necessary to appropriately supply the toner and the developer to the reservoir in accordance with the respective consumption of the toner and the liquid carrier.
The developer supply method cannot control both the concentration of the developer stored in the reservoir and the level thereof. That is, if a lot of the liquid carrier is supplied to maintain the predetermined concentration of the developer in the reservoir, the level of the developer is changed and thus undesired operating conditions may develop. On the other hand, if the level of the developer is controlled, the concentration of the developer may not be maintained at the constant level.

Developer supply method of wet electrographic printer


A system includes an encoder and a decoder. The encoder selects a first matched template for un-encoded pixels of a video frame using an algorithm for measuring a similarity between image blocks of the video frame, the algorithm being based on a weighted scheme of reconstructed adjacent pixels, generates at least one residual for the un-encoded pixels of the video frame based on the matched template, and encodes residuals as compressed bits using an asymmetric discrete sine transform (ADST). The decoder decodes the compressed video bits as residuals using the ADST, selects a second matched template using an algorithm for measuring a similarity between image blocks of a video frame associated with the compressed video bits, the algorithm being based on a weighted scheme of reconstructed adjacent pixels, and generates reconstructed pixels of the video frame based on the matched template and the decoded compressed video bits.

Typically a conventional two dimensional discrete cosine transform (2D-DCT) is applied to prediction residuals associated with a template matched intra-coding scheme. However, use of the 2D-DCT is questionable because the discrete cosine transform (DCT) basis functions get to the maximal magnitude at both ends and are agnostic to the statistical characteristics of the residuals. As a result, there is a need for a template matched intra-coding scheme where the statistical characteristics of the residuals are taken into consideration.

Optimized template matching approach to intra-coding in video/image compression


The structural body of a ferroelectric capacitor C is located over a source region (23) between a gate electrode (22) and a local oxide film (26). The structural body has a ferroelectric film (29) and an upper electrode (30) and a lower electrode (31) for sandwiching the ferroelectric film (29), and is provided with a conductive oxide film (32) between the lower electrode (31) and the source region (23). The conductive oxide film (32) is ITO, ReO.sub.2, RuO.sub.2 or MoO.sub.3. If an oxygen anneal is conducted after forming the ferroelectric film (29) for the purpose of reforming crystallizability of the ferroelectric film (29), oxygen enters into the conductive oxide film (32) to some extent. As a result, the conductive oxide film (32) is further oxidized, and becomes a so-called oxide barrier or dummy layer. Therefore, formation of a silicon oxide film hardly occurs on the source interface, reduction of contact resistance and avoidance of series parasitic capacitance can be attained, the degree of freedom of the capacitor C forming region is increased, and a high density integration can be schemed.

A non-volatile memory with the use of a polarization reversible ferroelectric material by an opposite polarity of an applied voltage has equal information write-in time and information read-out time in principle. Moreover the standstill condition (backup time) can maintain polarization (residual polarization) even with no applied voltage, so that the non-volatile memory appears to be ideal.
Previously, semiconductor non-volatile memories having ferroelectric capacitors have been proposed wherein a ferroelectric capacitor is located on a silicon (Si) substrate (See U.S. Pat. No. 4,149,302), and having a ferroelectric film located on an MIS-type transistor gate electrode (See U.S. Pat. No. 3,832,700).
A typical non-volatile memory cell, as shown in FIG. 8, generally has a circuit construction with an N-type MOS transistor Tr having a gate electrode G connected to word line W. A drain electrode D is connected to a bit line B, and a source electrode S is connected to one electrode of a ferroelectric capacitor C. The other electrode of the ferroelectric capacitor C is connected to a plate line P. An example of a semiconductor structure for such a memory cell is shown in FIG. 9. The semiconductor structure shown in FIG. 9 has an N-type MOS transistor Tr. Transistor Tr comprises a polysilicon (polycrystalline silicon) gate electrode 3 formed over a gate oxide film 2 on a P-type silicon substrate 1, a high concentration N-type source region 4 and a drain region 5 diffused and formed in the silicon substrate 1 by self-alignment, and a ferroelectric capacitor C formed on an interlayer insulating film 7 such as phosphorus glass on an element separating local oxide film (LOCOS) 6. The ferroelectric capacitor C on the interlayer insulating film 7 is formed by successively laminating a lower electrode 8 such as platinum (Pt), a ferroelectric film 9 such as PZT and an upper electrode 10 such as aluminum (Al). The source region 4 and the upper electrode 10, as high concentration diffusion regions, are connected to a wiring 12 of Al via a contact hole 11. A second interlayer insulating film 13 such as phosphorus glass is located over transistor Tr.
In forming the ferroelectric capacitor C via the interlayer insulating film 7 on the local oxide film 6, the ferroelectric capacitor C is formed by effectively utilizing a space on the local oxide film 6. However, the length of the wiring 12 from the source region 4 to the upper electrode 10 is redundant and increases the size of the area occupied by the memory cell. While a memory cell of this structure results in an increase of the cell area, it can be said to be realistic structure for the reason mentioned below. FIG. 10 shows an example of a memory cell structure wherein a ferroelectric film 9 is located directly on a source region. A polysilicon upper electrode wiring 14 was formed on the ferroelectric film 9, and the source region 4 itself acts as a lower electrode. After forming the ferroelectric film 9, however, it was necessary to apply an oxygen anneal to improve the crystallizability of the film and to enhance the specific dielectric constant .epsilon..sub.r. Because of the strong reactivity of oxygen in the oxygen anneal step, a silicon oxide film (SiO.sub.2) 15 inevitably forms between the source region 4 and the ferroelectric film 9. When this film 15 is very thin, as shown in FIG. 11(A), the silicon oxide film 15 becomes a series contact resistance R.sub.O. The presence of this parasitic contact resistance R.sub.O occasions a delay in access time. Moreover, when the film 15 is relatively thick, the film 15 becomes a series parasitic capacitor C.sub.O as shown in FIG. 11(B). In such a case, memory capacity is the result of the synthetic capacity of the parasitic capacitor C.sub.O and the ferroelectric capacitor C in series. However, to this parasitic capacitor C.sub.O is applied a partial tension of the source voltage. In order to prevent the silicon oxide film 15 from dielectric breakdown due to the partial tension, it is necessary to either form a considerably thicker film or to suppress the partial tension itself. However, if the silicon oxide film 15 is made considerably thicker, its partial tension also becomes large, so that pressure resistivity is not effectively improved. Moreover, in order to directly suppress partial tension, it is necessary to either make the silicon oxide film 15 very thin or to make the ferroelectric film 9 considerably thicker. However, it is difficult to make the silicon oxide film 15 very thin owing to the above-described oxygen anneal treatment, while the considerably thicker ferroelectric film 9 means a lower capacitance for the ferroelectric capacitor C, and as a result, the ferroelectric capacitor cannot perform its function. For such reasons, the structure (circuitry) shown in FIG. 8 is useful as a non-volatile memory structure for sufficiently bringing out the function of a ferroelectric capacitor. However, as stated above, the structure has the problem of utilizing a large cell area.
Therefore, the present invention takes the problems of each of the above structures into consideration, and provides a semiconductor device having a ferroelectric device, without spoiling the function of a non-volatile memory using a ferroelectric material and without increasing the memory cell area for a ferroelectric capacitor. The present invention also discloses a method of manufacturing the same.

Semiconductor device with ferroelectric and method of manufacturing the same


The present invention relates to a method for producing a glass body with at least one inner tube which is closed off on one side and one outer tube which is closed off at least on one side, with the inner tube being connected not coaxially with the floor of the outer tube and the inner tube comprising an opening, with the inner tube being fixed in the outer tube in such a way that the outer tube comprises a projecting portion, a floor is formed by the projecting portion on the outer tube, an opening is formed by the removal of the glass on the inner tube, and the outer tube is evacuated at the end and molten off.

1. Field of the Invention
The present invention relates to a method for producing a glass body with at least one inner tube which is closed off on one side and one outer tube which is closed off at least on one side, with the inner tube being connected not coaxially with the floor of the outer tube and the inner tube comprising an opening on the floor. Reference is hereby made to DE 298 01 531 U1 which relates to a glass vacuum tube collector.
2. Description of Related Art
According to conventional methods for producing a glass body with an outer tube and an inner tube situated concentrically therein according to the Sydney principle, the inside and outer tubes are clamped with a mandrel and molten with each other into a floor. All work cycles for melting the tubes must be performed in the clamped state. Since it is necessary to set up many stations in the case of larger quantities, the adherence to the required quality is not ensured. It is difficult to maintain the same uniform quality in the glass bodies.


A process for producing an oxidized product in conjunction with a turbine for generating power. This process comprises contacting a compressed and heated oxygen-containing gas stream with at least one solid electrolyte oxygen selective ion transport membrane in a membrane reactor. A reactant is passed into the reactor to generate an oxidized product therefrom. Oxygen-depleted retentate stream from the reactor is added to a gas turbine combustor and expanded in a gas turbine to generate power.

In gas turbine systems for generating power, feed air is compressed and combusted with a reactant to raise its temperature, and subsequently expanded through a turbine to produce power. Oxygen producing equipment has been combined with some of these gas turbine systems to produce oxygen at an incremental cost. Gas turbine power systems have also been combined with steam power generating systems to generate additional power, where the expanded hot gas may also be used to generate steam.
One type of oxygen producing equipment utilizes solid electrolyte ion transport membrane. The ion transport system operates at a significantly higher temperature, in the range of from about 500.degree. C. to about 1200.degree. C., than the compressor discharge of a gas turbine system, whose operating temperature rarely reaches 375.degree. C.
There are now two types of solid electrolyte ion transport membranes under development. They include ionic conductors that conduct only ions through the membrane and mixed conductors that conduct both ions and electrons through the membrane. An ion transport membrane exhibiting mixed conduction characteristics can transport oxygen when subjected to a ratio of partial pressures of oxygen across the membrane without the need for an applied electric field or external electrodes which would be necessary with ionic only conductors. As used herein, the terms "solid electrolyte ion transport system", or simply "solid electrolyte" or "ion transport membrane" is used to designate either a system using an ionic-type (electrically-driven) system or a mixed conductor-type (pressure-driven) system unless otherwise specified.
Mixed conductors are materials which, at elevated temperatures, contain mobile oxygen-ion vacancies that provide conduction sites for selective transport of oxygen ions through the material. The transport is driven by the ratio of oxygen activities, i.e., oxygen partial pressures (P.sub.O2) across the membrane, as oxygen ions flow from the side with higher partial pressure of oxygen to that with lower partial pressure of oxygen. Ionization of oxygen molecules to oxygen ions takes place on the cathode-side (or the retentate zone) of the membrane. The oxygen ions recombine on the permeate zone of the membrane giving up electrons. For materials that exhibit only ionic conductivity, external electrodes are placed on the surfaces of the electrolyte and the electrons are returned to the cathode in an external circuit. In mixed conducting materials, electrons are transported to the cathode internally, thus completing the circuit and obviating the need for external electrodes. It is believed that the reaction of the permeated oxygen with fuel takes place on the surface or in the boundary layers rather than in the bulk phase on the anode-side (or the permeate zone).
Partial oxidation reactions (POx) involving carbonaceous feedstock are common methods for producing synthesis gas. Partial oxidation is also used to produce ethylene oxide, acrylonitrile and other chemicals. Synthesis gas, comprised of carbon monoxide and hydrogen, is a valuable industrial gases and important precursors for production of chemicals including ammonia, alcohols (including methanol and higher carbon alcohols), synthesis fuels, aldehydes, ethers, and others. Feedstocks including natural gas, coal, naphtha, and fuel oils are commonly used to produce synthesis gas by partial oxidation or steam reforming reactions. The partial oxidation reactions may be further represented as follows: EQU C.sub.m H.sub.n +m/2 O.sub.2 =m CO+n/2 H.sub.2,
where C.sub.m H.sub.n is a hydrocarbon feedstock.
To a minor degree, steam reformation may also take place, as is represented as follows: EQU C.sub.m H.sub.n +m H.sub.2 O=m CO+(m+n/2) H.sub.2,
where C.sub.m H.sub.n is a hydrocarbon feedstock.
Conventional POx processes frequently use oxygen molecules produced by traditional gas separation processes (for example, pressure swing adsorption, cryogenic distillation) that typically operate at temperature below 100.degree. C. Since POx itself typically requires a high temperature of operation of more than 800.degree. C., integration between partial oxidation reaction and traditional oxygen separation is not realized by the conventional process. As a result, conventional partial oxidation has often been characterized by low feedstock conversion, low hydrogen to carbon monoxide ratio, and low hydrogen and carbon monoxide selectivities. Additionally, the external oxygen supply typically required in a partial oxidation reaction adds significantly to capital and operating costs, which may amount to as much as 40% of the total synthesis gas production cost.
It should be noted that the use of a solid electrolyte membrane for POx in an electrochemical reactor has been disclosed in U.S. Pat. Nos. 5,160,713 and 5,306,411, both to Mazanec et al., but neither of these patents disclose processes to produce an oxidized product in conjunction with a synergistic use of a gas turbine system.
Two of the most attractive features of the ion transport membrane system are the membrane's infinite selectivity for oxygen transport and its ability to transport oxygen from a low pressure stream to a high pressure stream as long as a ratio of partial oxygen pressure of greater than 1 exists, as is the case when the permeated oxygen reacts with a fuel gas. For the purpose of this invention, ion transport membrane materials that transport oxygen ions are deemed useful for the separation of oxygen from oxygen-containing gas mixtures. The types of membrane materials proficient in transporting oxygen ions are discussed in commonly assigned U.S. patent application Ser. No. 08/490,362, entitled "Method for Producing Oxygen and Generating Power Using a Solid Electrolyte Membrane Integrated with a Gas Turbine", filed Jun. 14, 1995, and concurrently filed application Ser. No. 08/848,200, entitled "Method of Producing Hydrogen Using Solid Electrolyte Membrane", which are incorporated herein by reference.
U.S. patent application Ser. No. 08/490,362 discloses methods for utilizing high combustor temperatures reached by a power generation system to drive an oxygen production system at acceptable operating temperatures for both systems. That application also discloses a method which efficiently produces both oxygen and power as products. U.S. Pat. Nos. 5,516,359, 5,562,754, 5,565,017 and European Patent Publication No. 0 658 366 produce oxygen in processes that are integrated with a gas turbine.
The efficient use of ion transport systems to produce other chemical gas products in conjunction with gas turbine power generating capacities is not believed to have been previously realized. Although the concept of integrating an air separation unit with gas turbine systems are known, there has not believed to have been synergistic use of energy integration between the air separation unit wherein oxidized products are produced in conjunction with gas turbine systems with which an ion transporting oxygen separating membrane is integrated.

Method for producing oxidized product and generating power using a solid electrolyte membrane integrated with a gas turbine


A stack structure of circuit boards embedded with semiconductor chips is proposed. At least two circuit boards are provided. Each of the circuit boards includes circuit layers formed on surfaces thereof and at least one opening embedded with a semiconductor chip, wherein, the circuit layers have a plurality of conductive structures and electrically conductive pads, and the semiconductor chip has a plurality of electrode pads, and the conductive structures of the circuit layers are electrically conductive to the electrode pads of the semiconductor chip. At least one adhesive layer is formed between the two circuit boards and disposed with a conductive material corresponding in position to the electrically conductive pads of the circuit boards. Thus, a conductive path can be formed by the conductive material between the electrically conductive pads of the circuit boards, thereby establishing electrical connection between the two circuit boards.

1. Field of the Invention
The present invention relates generally to a stack structure of circuit boards embedded with semiconductor chips, and more particularly to a multi-layer circuit board structure which is formed by stacking a plurality of circuit boards having been embedded with semiconductor chips.
2. Description of Related Art
In order to meet increasing demands for lighter and smaller electronic products, semiconductor chips having different functionality are needed to be embedded in a circuit board in high density. Generally, two or more semiconductor chips are stack mounted to a chip carrier such as a substrate or a lead frame and electrically conductive to the chip carrier by solder wires.
FIG. 1 shows a multi-chip semiconductor package 1 of U.S. Pat. No. 5,323,060. A first semiconductor chip 12a is mounted on a circuit board 11 and electrically conductive to the circuit board 11 by first solder wires 13a. A second semiconductor chip 12b is stack mounted on the first semiconductor chip 12a through an adhesive layer 14. The adhesive layer 14 can be made of epoxy or tape. Thereafter, the second semiconductor chip 12b is electrically conductive to the circuit board 11 by second solder wires 13b. However, the wire bonding process of the first semiconductor chip 12a should be finished before stacking the second semiconductor chip 12b, that is, the die bonding process and wire bonding process should be separately performed for each stacked semiconductor chip, which accordingly complicates the fabrication process of the semiconductor package. Further, to efficiently prevent the second semiconductor chip 12b from contacting the first solder wires 13a, the thickness of the adhesive layer 14 should be bigger than the height of the wire arc of the first solder wires 13a. As a result, the thickness of the multi-chip semiconductor package 1 is increased, thereby limiting the fabrication of much lighter and smaller electronic products. Meanwhile, because it is difficult to evenly control the thickness of the adhesive layer 14, the second semiconductor chip 12b or the second solder wires 13b are easy to be contacted with the first solder wires 13a and accordingly the problems such as short circuits may be generated.
Also, with the integration trend of electronic products, to improve functionality of electronic products and decrease height of the electronic products, semiconductor chips are generally embedded in carrier boards. The embedded semiconductor chips can be active components or passive components. As shown in FIG. 2, a carrier board 20 having at least one opening 200 is provided, and a semiconductor chip 21 is mounted in the opening 200. The semiconductor chip 21 has an active surface 21a having a plurality of electrode pads 212. A dielectric layer 22 is formed on the carrier board 20 and the active surface 21a of the semiconductor chip 21. A circuit layer 23 is formed on the dielectric layer 22. The circuit layer 23 has a plurality of conductive structures 231 for electrically conductive to the electrode pads 212 of the semiconductor chip 21. Using a circuit build-up process, multi-layer circuit layers and dielectric layers can be formed so as to form a multi-layer circuit board.
To improve electrical performance of the carrier board 20, the number of the semiconductor chips 21 accordingly should be increased. Therefore, a plurality of openings 200 have to be formed in the carrier board 20. However, the limited size of the carrier board 20 limits the number of the openings and thus limits the improvement of the electrical performance of the carrier board 20.
Therefore, there is a need to provide a structure of circuit boards embedded with semiconductor chips that can overcome the above drawbacks.

Stack structure of circuit boards embedded with semiconductor chips

Phoenix Precision Technology Corporation


The present invention relates to a family of testis specific kinases (the tssk family), nucleic acid sequences encoding those kinases and antibodies against the kinases. The invention is further directed to the use of thise kinases as targets for isolating specific inhibitors or anagonists of tssk kinase activity. Such inhibitors are anticipated to have use as contraceptive agents.

Spermatogenesis, the process in which functional sperm cells are produced in the testis, involves specific interaction between the developing germ cells and their supporting Sertoli cells as well as hormonal regulation by the androgen-producing Leydig cells. The general organization of spermatogenesis is essentially the same in all mammals and can be divided into three distinct phases: 1) The initial phase is the proliferative or spermatogonial phase during which spermatogonia undergo mitotic division and generate a pool of spermatocytes; 2) the meiotic phase, that yields the haploid spermatids; and 3) spermiogenesis whereby each round spermatid differentiates into a spermatozoon. Although the molecular mechanisms regulating the first two phases have been relatively well characterized, the molecular basis of spermiogenesis is largely unknown.
Mammalian spermiogenesis, the postmeiotic phase of spermatogenesis, is characterized by dramatic morphological changes that occur in the haploid spermatid. Some of these changes include the formation of the acrosome and its contents, the condensation and reorganization of the chromatin, the elongation and species-specific reshaping of the cell, and the assembly of the flagellum. These events result from changes in both gene transcription and protein translation that occurs during this developmental period. Some of the proteins translated in the haploid spermatid will remain in the morphologically mature sperm after it leaves the testis. Taking this into consideration, proteins that are synthesized during spermatogenesis might be necessary for spermatid differentiation and/or for sperm function during fertilization.
The present invention relates to signaling events in mammalian sperm that regulate the functions of this highly differentiated cell. More particularly the invention relates to signal transduction that modulates the acquisition of sperm fertilizing capacity. After ejaculation, sperm are able to move actively but lack fertilizing competence. They acquire the ability to fertilize in the female genital tract in a time-dependent process called capacitation. Capacitation has been demonstrated to be accompanied by the protein phosphorylation of several proteins on both serine/threonine and tyrosine residues, and that protein tyrosine phosphorylation is regulated downstream by a cAMP/PKA pathway that involves the crosstalk between these two signaling pathways. With the exception of PKA, the other kinase(s) involved in the regulation of capacitation are still unknown.
Additional protein kinases have been shown to be involved in spermatogenesis, however, only a few of them are exclusively expressed in germ cells or in the testis (Jinno et al, 1993, Cell Biol 13, 4146–56; Nayak et al, 1998, Mech Dev 74, 171–4; Shalom & Don, 1999, Mol Reprod Dev 52, 392–405; Toshima et al, 1998, Biochem Biophys Res Commun 249, 107–12; Toshima et al, 1999, J Biol Chem 274, 12171–6; Tseng et al, 1998, DNA Cell Biol 17, 823–33; Walden & Cowan, 1993, Mol Cell Biol 13, 7625–35). Examples of testis-specific kinases are the recently described mouse genes, tssk 1, 2 and 3 (Bielke et al., 1994, Gene 139, 235–9; Kueng et al, 1997, J Cell Biol 139, 1851–9; Zuercher et al., 2000, Mech Dev 93, 175–7). The function of the tssk kinase family is unknown. However, since the members of this family are expressed postmeiotically during spermiogenesis, it is hypothesized that they have a role in germ cell differentiation, or later on in sperm function. Therefore, it is anticipated that compounds that interfere with the function of this kinase family could be utilized as contraceptive agents.
Despite the availability of a range of contraceptive methods, over 50% of pregnancies are unintended worldwide and in the United States. Thus, there is a critical need for contraception that better fits the diverse needs of women and men and takes into consideration different ethnic, cultural and religious values. Except for the use of condoms or vasectomy, the availability of contraceptive methods for men is very limited.
The importance of protein kinases in most physiological processes suggests that inhibition of tssk kinase family activity with a specific drug could inhibit fertilization. In accordance with one aspect of the present invention, the tssk kinase family is used as a target for the development of novel drugs. In particular, the sperm-specific tssk gene products will be used to screen for specific inhibitors of tssk kinase activity and these inhibitors will be used either alone or in conjunction with other contraceptive agents to prevent unintended pregnancies. Advantageously, the unique sequence of the members of the tssk kinase family supports the likelihood of finding specific inhibitors for their activity. Finally, if these kinases remain in the sperm after spermatogenesis and have a role in sperm physiology, design of specific tssk kinase inhibitors could be used both in male and female in order to prevent fertilization.

Human testis specific serine/threonine kinase 3

University of Virginia Patent Foundation

The Trustees of the University of Pennsylvania


A cargo hook for releasably carrying a load includes a support frame, a load support carried by the frame, and a latch. The load support has a closed condition for securing the load and an open condition for permitting release of the load. The latch is for releasably latching the load support in the closed condition and includes a toggle linkage having a first end pivotally connected to the load support, a second end pivotally connected to the frame, and an articulation joint between the ends. Further, the latch includes a mechanism for toggling the toggle linkage between first and second toggle positions, and a catch moveable between a latched position for holding the toggle linkage in the first toggle position and an unlatched position for permitting the toggle linkage to toggle between the first and second toggle positions. The load support may include a static load beam and a load release gate pivotally mounted for rotation between a closed position securing a load on the beam and an open position permitting release of the load from the beam. Alternately, the load support may include a load beam pivotally mounted to the frame for rotation between a closed position securing a load on the beam and an open position permitting release of the load from the beam.

As is noted in U.S. Pat. No. 4,998,763 granted on Mar. 12, 1991, to Henke, there is a need for cargo hooks which can not only secure and carry a load, but which can also quickly and reliably release a load if the need arises. This is particularly so in the case of helicopter logging or similar airborne operations where substantial loads may be lifted and carried beneath helicopters. Typically, a cargo hook will be secured at one end of a long cable (60 to 100 meters, for example), the other end of the cable being secured to the helicopter. In the case of logging operations where the cargo hook may be referred to as a logging hook, several logs collectively weighing several thousand kilograms (3000 to 5000 kg., for example) will in turn be secured to the hook, each by a relatively short length cable (6 to 9 meters, for example).
In the event of a flight emergency, the ability of a cargo hook to rapidly and reliably drop or release a load is obviously critical for the purpose of flight safety. In addition, however, there are certain types of operations where the ability to drop or release a load while the hook is under load may be a standard part of the operation. For example, and again in the case of helicopter logging operations, it is not unusual for a helicopter to be called upon to transport logs from logging site to a location above water where they are deliberately dropped for subsequent recovery and collection in log booms or on boats or scows.
As another example, it will be noted that a pair of cargo hooks may be used in some helicopter logging operations. In such cases, a rigger on the ground will load up the pair of hooks while the helicopter hovers above. The rigger will make an educated guess as to the total weight of the logs but, on occasion, the load may be too heavy for the helicopter to comfortably lift. Not to delay and slacken the load while the rigger removes some logs, the helicopter pilot may prefer to simply release the load carried by one of the hooks and carry off with the load which remains on the other hook. Typically, the pair of cargo hooks used in such operations will be two separately housed hooks mounted on a single frame.
Various cargo hooks have been used for helicopter logging operations. However, the mechanisms for load release are generally subject to very high loads with resulting wear and tear after repeated usage. In the case of the above noted patent to Henke, a design is described which limits the transmission of load forces to the release mechanism. However, particularly in the case of a heavy load such as that presented by a collection of heavy logs, the transmitted forces can remain quite significant in relation to the material strength of components used in the design. Even though the components used in the release mechanism of the Henke design are advantageously limited to components which are in abutment or rolling contact, the high forces which are at play can lead to the development of flat spots which can detract from the smoothness of release and ultimately limit the useful lifetime of the hook.
A primary object of the present invention is to provide a new and improved cargo hook for releasably carrying a load, and which may be structured so as to transmit a minimal amount of the loading force to the release mechanism.
A further object of the present invention is to provide a new and improved cargo hook which is particularly adaptable for carrying heavy loads as in helicopter logging operations.


Methods and apparatuses for assembling and implementing tamper indicating RFID devices are presented. An RFID device includes a substrate, an electrically conductive pattern formed on the substrate configured to operate as an antenna by separating a portion of a first device section from a second device section, and an electrical circuit mounted on the substrate that is electrically coupled to the antenna. The electrical circuit stores an identification code.

1. Field of the Invention
The present invention relates to tamper-indicating radio frequency identification (RFID) devices.
2. Background Art
Radio frequency identification (RFID) tags are electronic devices that may be affixed to items whose presence is to be detected and/or monitored.
The presence of an RFID tag, and therefore the presence of the item to which the tag is affixed, may be checked and monitored by devices known as "readers." Readers typically transmit radio frequency signals to which the tags respond. Each tag can store a unique identification number.
Container seals are often applied to tamper sensitive assets such as medical supplies, military equipment, etc to detect tampering. Typical container seals tear when the asset is tampered with. Thus, tampering can be detected visually as a tear in the seal. The number of assets, however, often becomes so large that visual detection of tampering becomes overly time consuming. Moreover, individual inspection often occurs at discrete times. In between these inspections, the tamper status of the each of the assets is typically unknown.
Thus, what is needed is an efficient and continuous way of tracking the status of a tamper seal.

RFID antenna design that can selectively enable and disable the antenna


This invention provides an improved address management scheme in a mobile router (MR) that connects a mobile network into the Internet via an access network. The MR performs neighbor advertisement on behalf of mobile network nodes (MNNs) within the mobile network so that packets directed towards the MNNs are routed correctly to the MR, and then to the corresponding MNN, while maintaining standard address management procedures, such as IPv6 address management procedures, in the access network and in the mobile network.

The following abbreviations will be referenced in the ensuing description.
APAccess PointARAccess RouterBUBinding UpdateCoACare-of AddressHAHome AgentHA_MRHome Agent Mobile RouterLLALink Layer AddressMACMedia Access ControlMNNMobile Network NodeMONETMObile NETworkMRMobile RouterPANPersonal Area NetworkPSBUPrefix Scope Binding Update
In general, network mobility support deals with managing the mobility of an entire network, viewed as a single unit, which is capable of changing its point of attachment to the Internet and thus its reachability in the Internet topology. This type of network can be referred to as a MONET, and includes at least one MR connected to the global Internet. Those nodes behind the MR, referred to as MNNs, may be fixed or mobile.
A MONET can take several different forms, examples of which include the following.
Networks attached to a PAN: A mobile phone having a cellular interface and a local interface, such as a Bluetooth™ interface, together with a Bluetooth-enabled PDA constitute a very simple instance of a mobile network. In this case the mobile phone functions as the MR that is attached to the Internet via cellular links, while the PDA functions as a MNN that is used for web browsing or running a personal web server.
Access networks deployed in public transportation: A public transportation vehicle provides Internet access to IP devices carried by passengers. The access points in the vehicle function as MRs, while the passenger's personal communication devices are MNNs.
FIG. 1 shows an example of a conventional MONET 1 and its connection to the Internet 2. The MR 3 of the MONET 1 connects to the Internet 2 via an access network 4. An AR 5 in the access network 4 is a first-hop router that connects the MR 3 to the Internet 2. At least one link technology-specific AP 6 may exist between the MR 3 and the AR 5 to provide link layer connectivity between the MR 3 and the AR 5. The MR 3 may move between APs 6 and/or ARs 5, and thus a handover mechanism is provided. A plurality of MNNs 7 (shown for convenience as three MNNs, two being mobile and one being fixed) connect to the access network 4 via the MR 3. The link technology used in the MONET 1 may or may not be the same as the link technology used between MR 3 and the AP 6. Each MNN 7 and the MR 3 may configure its own EUI-64 Link Layer Address (LLA) based on the link technology in use.
Two types of approaches can be employed to provide mobility control and address management to the MNNs 7.
A first type of approach is a NEMO technique. NEMO support requires that none of the nodes behind the MR 3 be aware of the MONET mobility. In another words, the change of attachment of the MONET 1 should be completely transparent to the MNNs 7 behind the MR 3. The NEMO technique is described in greater detail below with regard to FIG. 2.
The basic NEMO approach is illustrated in FIG. 2. The MR 3 is assumed to have an assigned home network with a home agent referred to as the HA_MR 8. Each MONET 1 where a MR 3 resides is assigned a MONET network prefix (MNP), which is the permanent network prefix assigned in the home link of the MR 3. The MNP is not changed when the MR 3 moves its network attachment from one AR 5 to another. The ingress interface of the MR 3 is configured with the MNP, and the CoAs of all the MNNs 7 in the MONET 1 are configured using the MNP. As long as the MNN 7 resides within the same MONET 1, its CoA need not be changed. The MNN 7 may update a binding cache 9 in its own HA10 and correspondent nodes 12 by sending a BU. With this configuration, all of the packets sent to the CoA of the MNN 7 are first routed to the home link of the MR 3, and intercepted by the HA_MR 8, which further routes the packet to the MR 3 as described below.
The MR 3 configures its CoA using the network prefix advertised by the serving AR 5 (AR-1) on its egress interface. When the MR 3 changes its attachment point, it reconfigures its CoA using the prefix of the new AR 5 (AR-2). In addition to sending a BU with the new CoA to the HA_MR 8 to update the binding cache 9A, the MR 3 also sends a Prefix Scope Binding Update (PS BU) message to the HA_MR 8. The PS BU is an enhanced BU that associates the CoA of the MR 3 to the MNP instead of to a single address. The HA_MR 8 uses this binding to tunnel (shown generally as tunnel 11) to the MR 3 any packet that shows the MNP in the destination field, although some other scheme (e.g., router optimization) may be used to avoid or reduce the overhead due to the tunneling between the HA_MR 8 and the MR 3. After decapsulating the tunneled packet from the HA_MR 8, the MR 3 forwards the original packet to the correspondent MNN 7 within the MONET 1.
With this approach, even when the MR 3 moves between ARs 5, and thus changes its CoA, the MNNs 7 within the MONET 1 are enabled to use the same CoA, and no new CoAs are needed for MNNs. This reduces the overhead due to IP mobility of each MNN 7. However, the overhead due to the bi-directional tunneling between the HA_MR 8 and the MR 3 is posted over the interface between the MR 3 and the AR 5, and is applied to all packets inbound to or outbound from the MNNs 7. Since the access interface between the MR 3 and the access network 4 is most likely a radio interface in the cases of particular interest to this invention, the overhead incurred by the use of the tunneling 11 significantly reduces the spectrum efficiency of the wireless link.
A second approach is a flat structure technique, where instead of providing grouped IP mobility as in the NEMO approach each MNN 7 is responsible for handling its own IP mobility. Each MNN 7 configures its associated CoA using the prefix of the serving AR 5. Whenever MR 3 attaches to a new AR 5, each MNN 7 reconfigures its CoA and sends a BU to its HA 10 and correspondent nodes. Packets flowing towards a MNN 7 are routed based on the CoA of the MNN 7 and, thus, no tunneling protocol is required between the HA_MR 8 and the MR 3 as in the NEMO approach.
Each of these two approaches may be used in different applications, and in some cases may coexist.
Although optimized for grouped mobility, the NEMO-based approach introduces a high overhead over the access interface, and a corresponding low routing efficiency, due to the tunneling 11 that occurs between the HA_MR 8 and the MR 3. The presence of the HA_MR 8 also requires infrastructure support from the service provider. The NEMO-based solution is thus more applicable to the task of providing access in a high mobility environment, such as a high speed mass transportation environment involving, for example, a train or a bus.
When compared to the NEMO approach, the flat structure approach has the advantage that it does not require the support of the HA_MR 8, and thus provides enhanced system simplicity for the service provider. It also eliminates the tunneling 11 between the MR 3 and the HA_MR 8, as well as the triangle routing introduced by the presence of HA_MR 8, and thus leads to an improved spectrum efficiency and reduced transport delay and overhead. The flat structure based solution is more applicable in a hot spot application such as is found in a small area such as an office, home, café or airport, with no or low mobility.
In the flat structure-based mobility management approach each MNN 7 sends its neighbor advertisement to the AR 5 via the MR 3. The neighbor advertisement contains the mapping between the CoA of the MNN 7 and its LLA, which is recorded in a neighbor cache of the AR 5. When the AR 5 receives a downlink packet directed toward the MNN 7, it uses the LLA recorded in the neighbor cache to transmit the layer 2 (L2) frame to the MNN 7. However, since the link technology used in the access network 4 and in the MONET 1 could be completely different, the access network 4 and the MONET 1 may have a completely different LLA management scheme. For example, the self-constructed EU-64-bit format of LLA used in Ethernet and other access technologies, may not be applicable to an access network 4 that employs cellular technology having a centralized control mechanism of LLA assignment. As a result, the LLA for each MNN 7 may not be recognized by the nodes in the access network 4, and the L2 frame sent from the AR 5 using the LLA of the MNN 7 may not reach the MONET 1.
It can thus be appreciated that in the flat structure approach to mobility control and address management discussed above, in order for the AR 5 to route the downlink packet to the MNN 7 through the corresponding MR 3, some special address management and mobility control schemes are required. However, prior to this invention a suitable-address management and mobility control scheme was not available.

Method and apparatus providing address management in a flat structure mobile network


An apparatus includes a frame having a substantially planar first portion and a substantially planar second portion. The first and second portions are spaced rigidly apart from each other in a substantially parallel orientation to define a passage that extends through the frame between the first portion and the second portion. The passage is dimensioned and configured to receive a hand. A central axis extends longitudinally through the passage. The apparatus further comprises a first pad and a second pad located on an exterior of the first portion of the frame and spaced apart from each other to provide a channel that extends longitudinally between the first pad and the second pad substantially orthogonal to the central axis. The channel may be configured to align with the spine where the first pad and the second pad are positioned to lie on opposing sides of the spine.

Various devices and aids have been developed to relieve back pain and the like. For example, many types of back braces, belts, etc., are presently or have been previously available. However, back pain and the like is often a result of misaligned vertebrae of the spine, which can result in pinched nerves and other related conditions. Such misalignment frequently requires treatment by a chiropractor. Due to the extent and variance in back problems requiring chiropractor manipulation, many times the chiropractor will have to perform dozens of manipulations in a given day and hundreds during a given week. Many of the manipulations are done with the chiropractor's hands alone. Consequently, the chiropractor's hand can be exposed to significant stress and strain from performing many types of manipulations. This can lead to cramping and/or arthritis in the chiropractor's hand and fingers. Thus, there is a need for a chiropractic device that both facilitates chiropractic manipulation and relieves unnecessary stress on the chiropractor's hands.


In some examples of monitoring pipeline integrity using fiber optics, a first set of values that represent an attenuation of a light signal transmitted through an optical fiber positioned adjacent a pipeline to carry fluids and a second set of values that represent a dispersion of the light signal transmitted through the optical fiber are received. An attenuation profile of the light signal and a dispersion profile of the light signal through the optical fiber are generated based on the first and second sets of values, respectively. Using the profiles, a light-based profile signature describing an environment surrounding the optical fiber is generated, and compared with a baseline light-based profile signature describing an environment surrounding the optical fiber under a normal operating condition. A notification describing an operation of the pipeline is provided in response to the comparing.

Pipelines, e.g., underground pipelines or other pipelines, are often used to transport fluids, e.g., oil, gas, water or other fluids, between locations. A pipeline failure, e.g., due to pipeline fracture or other reason, can result not only in loss of the fluids being flowed through the pipeline but also in damage to the environment in which the pipeline is positioned. Consequently, monitoring the integrity, e.g., structural integrity of pipelines is important.

Pipeline integrity monitoring using fiber optics


A packaging design system for an LSI circuit includes: a gate placement preparation unit for preparing basic placement data for gates used as an original data for producting the LSI circuit; a wiring data preparation unit operatively connected to the gate placement preparation unit for preparing wiring data based on wiring patterns each having the same length between gates; a delay calculation unit operatively connected to the wiring data preparation unit for calculating net delays between gates and path delays from a clock input until an output in the LSI circuit; a standard path delay determining unit operatively connected to the delay calculation unit for determining a standard path delay in accordance with distribution of path delays; and a macro determining unit operatively connected to the standard path delay determining unit for selecting the macros in accordance with predetermined conditions of path delays, and selected several macros being used for an actual placement of gates.

1. Field of the Invention
The present invention relates to a packaging design system for an LSI circuit, and provides advantages in designing LSI circuit that were not previously available.
2. Description of the Related Art
In general, an LSI (Large Scale Integrated) circuit includes a plurality of gates (AND gates, OR gates, flip-flop circuits, registers, etc.). When transferring data among a plurality of gates, the data are transferred in response to clock signals that are input into the gates. In this case, in order to synchronizes the data at one output terminal with other data at other output terminals, it is necessary that all propagation delays (below, path delays) of the clock signals are the same among all gates.
In a conventional packaging design of an LSI circuit, two representative design methods are proposed in order to realize the minimum path delay. In a first method, a plurality of gates are arranged at locations where the path delays are previously known. In a second method, all "net lengths" ("net" refers to wires connecting gates) between gates are determined taking the path delay into consideration.
However, it is very difficult to employ both the first and second methods because a recently LSI circuits are formed of very many gates (perhaps more than several thousand gates), with very high packaging density, and very fine wiring patterns. Accordingly, it is very difficult to realize an LSI circuit having the minimum path delay. Minimum path delay can be expressed by a minimum skew value, and in general, the minimum skew value means the difference between a standard path delay and an actual path delay.
Further, in a conventional placement process for gates (so-called "floor plan") used in a CAD system, when a circuit designer prepares the gate placement data which are used as original data in the design of the LSI circuit, the registration processes of blocks formed by a plurality of basic gates (a block is called a "macro" in the CAD system) are separated from the preparation processes of placement areas. Finally, these processes are automatically performed using the CAD system.
However, since the blocks to be registered are previously known for clock transfer routes, scanning routes and OSL (Only Scan Latch) routes (the OSL route is used for only a test of the circuit), and since the placement areas are considered for all areas of the LSI chip, it is not necessary to separate these processes taking propagation delay of data within the LSI circuit into consideration.

Packaging design system for an LSI circuit


An apparatus and a method for fast accelerating a vehicle which converts to a fast acceleration mode, wide-opens a throttle valve, increases the torque of a transmission, locks up a transmission after gearshifting a transmission to a high gear position if the torque of the transmission reaches a predetermined value, and converts from a fast acceleration mode to a normal acceleration mode if a brake pedal is depressed. In the fast acceleration mode, a fuel-air mixture is injected into the engine asynchronously and the throttle valve is wide-opened. A vehicle can be accelerated quickly by just a narrow depression of an accelerator pedal. The apparatus comprises a mode switch, an accelerator pedal sensor, a first control unit for controlling a vehicle under a normal acceleration mode, a motor for wide-opening the throttle valve, and a second control unit for controlling a vehicle under a fast acceleration mode.

1. Field of the Invention
The present invention relates to an accelerating method of a vehicle and a method for performing the same, and more particularly to a method for accelerating a vehicle quickly and easily, and an apparatus for accomplishing the method.
2. Description of the Prior Art
An accelerating apparatus is generally provided in all kinds of vehicles. An accelerating apparatus is used to accelerate a vehicle when a driver wants to drive faster or wants to pass another preceding vehicle ahead. FIG. 1 shows a conventional accelerating apparatus 10 of a vehicle. With reference to FIG. 1, accelerating apparatus 10 includes a throttle valve 20 which is provided in an engine intake-manifold 40 and regulates the amount of a fuel-air mixture that is introduced into an engine (not shown), and an accelerator pedal 30 which is mechanically connected to throttle body 20 by a cable 50 and is handled by a driver. Throttle valve 20 operates according to the depression of accelerator pedal 30 by a driver. The deeper accelerator pedal 30 is depressed, the wider throttle valve 20 is opened. As throttle valve 20 is opened wider, the amount of a fuel-air mixture that is introduced into the engine increases. Therefore, the revolution per minute (RPM) of the engine also increases, so the vehicle is accelerated. On the other hand, the less that accelerator pedal 30 is depressed, the narrower that throttle valve 20 opens. As throttle valve 20 opens less, the amount of fuel-air mixture that is introduced into the engine decreases. Accordingly, the RPM of the engine decreases so that the speed of the vehicle is reduced. However, the accelerating apparatus has poor accelerative response.
An accelerating device of a vehicle for improving accelerative response is disclosed U.S. Pat. No. 4,796,579 (issued to Brian C. Wolfe, et. al. on Jan. 10, 1989).
The accelerating device of Brian et al. is shown in FIGS. 2 and 3. A throttle body 100 of Brian's accelerating device includes a main annular air induction passage 110, a primary passage 112 branched from main annular air induction passage 110, a secondary passage 140 also branched from main annular air induction passage 110 and parallel to passage 112, a conical-like pintle 114 which is slidably mounted within primary passage 112 and which varies the cross-sectional air flow area, a pintle position sensor 120 for detecting the position of pintle 114, and an electrical actuator/motor 130 electrically connected to an upper end 116 of pintle 114 and also electrically connected to a microprocessor (not shown) so that electrical actuator/motor 130 varies the vertical position of pintle 114 according to the control of the microprocessor.
A butterfly type throttle valve 142 is rotatably mounted within secondary passage 140. Butterfly type throttle valve 142 is spring-biased to be placed at a closing position of throttle valve 142 and moves to a near vertical wide-open throttle position from the closing position. The movement of butterfly type throttle valve 142 is accomplished mechanically by a direct mechanical connection to accelerator pedal 150. Secondary passage 140 is normally closed, and is opened only when accelerator pedal 150 is deeply depressed, so that the throttle valve is nearly or fully in a wide-open position when additional air flow to the engine is needed.
Only primary passage 110 is operated during the normal acceleration, as secondary passage 140 is fully closed. Secondary passage 140 is used only when additional air flow is needed. Namely, secondary passage 140 is operated only when accelerator pedal 150 is depressed so that the throttle valve is nearly or fully in a wide-open position. At a nearly or fully wide-open position, secondary passage 140 as well as primary passage 110 is opened, so additional air flow can be supplied into the engine.
Secondary passage 140 can also be used to supply enough air flow to sustain engine operation if primary passage 10 becomes inoperative because of an the inoperativeness of a part of the vehicle's electrical system such as actuator 130 of the like. Secondary passage 140 is operated by the movement of butterfly type throttle valve 142 mechanically connected to accelerator pedal 150.
Nevertheless, in the above-mentioned throttle body, the secondary passage is opened only when the accelerator is deeply depressed so that the throttle valve is in a nearly or fully wide-open position. Therefore, the throttle body has poor accelerative responsibility, and the accelerator pedal must be deeply depressed continuously for fast acceleration.

Method for fast accelerating a vehicle and an apparatus for performing the same


A mixed signal device having an analog-to-digital converter (ADC) with offset and gain calibration using internal voltage references whereby the digital processor calibrates out offset and gain errors in the analog-to-digital converter by adjusting the analog input amplifier gain and offset or with software compensating the digital representations of the voltages measured. Two different known voltage values are used in determining the offset and gain adjustments needed to calibrate the ADC against the two know voltage values. The mixed signal device may further comprise a Bandgap voltage reference having an accurate known voltage value. Wherein the Bandgap voltage reference may be used for further offset and gain calibration of the ADC to produce substantially absolute voltage values.

Present technology analog-to-digital conversion circuits have multiple input channels by using analog multiplexing circuits that allow input selection from several different external analog sources for analog-to-digital conversions thereof. However, since the absolute values of the external analog sources may not be known and have to be verified by accurate measurements, and imperfections in the analog-to-digital conversion circuitry such as offset and gain errors result in inaccurate analog-to-digital conversion measurements of the external analog voltages being measured. The offset and gain errors may result from circuit non-linearity, resistive voltage drop, and/or manufacturing process variations. Also without accurate points of reference and/or an absolute voltage reference to compare to, only relative measurements with respect to power supply voltages, e.g., VDD, are possible.

Analog-to-digital converter offset and gain calibration using internal voltage references


The disclosure describes a user interface that may be used to control ablation therapy and monitor ablation therapy progress in systems that utilize wet electrode ablation techniques. The user interface presents a virtual electrode depth icon to a user that indicates the size of a lesion that may be created with the selected virtual electrode depth. The virtual electrode depth may be changed by the user according to the ablation therapy most appropriate for a patient, and the user may interact with the user interface to define the virtual electrode depth. In this manner, the user interface may be a touchscreen or other input device such as a mouse, pointing device, or keyboard. The user interface may also provide a thermometer icon that represents a patient temperature, a timer icon that represents a remaining time for therapy, and other representations of therapy progress.

Ablation therapy is a surgical technique used to destroy or remove tissue selectively to reduce or eliminate patient conditions. Many different technologies are directed to tissue ablation. Such technologies include electrical ablation, ultrasound ablation, cryoablation, conductive heating, radioactive heating, and combination ablation that includes more than one technology. Electrical ablation includes radio frequency (RF) ablation, microwave ablation, and other electrical ablation technologies that utilize electrical current to heat the target tissue. Another electrical ablation technique includes RF ablation and a fluid medium to heat and ablate the tissue. This technique utilizes devices commonly called "wet electrodes" which pass electrical current from the electrodes through an adjacent fluid. All of these techniques require user input to control the ablation therapy.
Ablation therapy systems commonly include user interfaces that allow a user to define the parameters of the ablation therapy, monitor the ablation therapy progress, or both. These user interfaces may include simple switches and dials, individual electrical inputs and outputs, complex user interfaces such as cathode ray tubes (CRT) or liquid crystal displays (LCD), or a combination of these types of controls. The user interacts with the user interface to correctly deliver ablation therapy to the patient and monitor progress to stop therapy before ablating healthy tissue or otherwise harming the patient. In some cases, user interfaces are directed to a particular patient anatomy or ablation therapy.
One example of an ablation therapy is treatment for benign prostatic hyperplasia (BPH). BPH is a condition caused by the second period of continued prostate gland growth. This growth begins after a man is approximately 25 years old and may begin to cause health problems after 40 years of age. The prostate growth eventually begins to constrict the urethra and may cause problems with urination and bladder functionality. Ablation therapy attempts to create a lesion in the prostate and decrease the prostate size, restoring appropriate bladder function.


An inclined PET device is provided in which the cut plane of a detector ring upon which a plurality of PET detectors are disposed is inclined so that it does not intersect perpendicularly with the long axis of a bed that carries a subject to be examined and in which an open space that passes through the bed in a direction perpendicular to the long axis thereof is formed, in order to enable access to the subject to be examined. The PET detectors are disposed and stacked in a direction parallel to the long axis of the bed. Thereby, the number of PET detectors is reduced and device cost is reduced, while the detector ring as well as the device can be miniaturized. At the same time, the open space that passes through the bed in a direction perpendicular to the long axis can be preserved.

Positron emission tomography (PET), which has been attracting attention as being effective for early diagnosis of cancer, is a test method of administering compounds labeled with a tiny amount of positron emitting radionuclides and detecting annihilation radiations emitted from inside the body, thereby imaging metabolic functions such as sugar metabolism to examine the presence or absence and the degree of diseases. PET devices for practicing such a method have been put to practical use.
The principle of PET is as follows: A positron emitted from a positron emitting radionuclide by positron decay annihilates with an adjacent electron to produce a pair of 511-keV annihilation radiations, which are measured by a pair of radiation detectors according to the principle of coincidence counting. As a result, the position where the nuclide exists can be located to fall on a line segment (line of response) connecting the pair of detectors. An axis extending from the head to the feet of a patient who is a subject to be examined will be defined as a body axis. The distribution of nuclides on a plane intersecting perpendicularly with the body axis is determined by two-dimensional image reconstruction from data on lines of response measured in various directions on the plane.
To increase the sensitivity of a PET device, as illustrated in FIG. 1, a detector ring 12 of cylindrical shape upon which a large number of PET detectors 10 are disposed in a circumferential direction and an axial direction needs to be disposed in a tunnel-like configuration to increase the measurement solid angle, and the distribution of nuclides in the tunnel needs to be determined by three-dimensional image reconstruction. The long tunnel-like patient port, however, increases the psychological stress of the patient 8 on the bed 6 under examination, and interferes with external access to the patient 8 (for example, the irradiation of an affected area of the patient 8 with a radiation beam for cancer treatment which is a main purpose of the present invention). Here, the detector ring 12 mostly has a perfect circular shape. The PET detectors 10 are stacked in a direction perpendicular to the sections of the detector ring 12.
Under the circumstances, the applicants have proposed an open PET device (also referred to as OpenPET) which includes, as illustrated in FIG. 2, a plurality (two, in FIG. 2) of split detector rings 12A and 12B spaced apart in the direction of the body axis and has a physically opened field of view (also referred to as an open field of view) (Patent Literature 1).
The open PET device enables PET diagnosis during treatment and whole-body simultaneous imaging which have not been possible by conventional PET devices. Applications to real-time PET/CT are also possible. Specifically, a treatment can be administered to the open field of view through a gap 12C between the detector rings 12A and 12B. Take a radiation cancer treatment for example. The open PET device can check the cancer position during irradiation with a radiation treatment beam, or visualize the irradiation field of the radiation treatment beam in real time. However, since the detector ring is divided into a plurality of rings and the detector rings need to cover both ends of the irradiation field, the number of detectors increases and the configuration becomes complicated. There is also a problem of limited access directions.
FIG. 3 shows an example of a heavy particle beam, proton beam, or other particle beam cancer treatment device as an example of a device that uses radiations for cancer treatment. This device includes two ports such as a horizontal irradiation port 20X and a vertical irradiation port 20Y. Some devices are single field irradiation devices which include only a horizontal irradiation port or a vertical irradiation port. The irradiation port(s) is/are not always fixed. Some devices include a rotating gantry which is configured to rotate about a patient 8. The rotating gantry type is predominant of proton beam cancer treatment devices in particular. As shown in the diagram, the axis along a horizontal irradiation treatment beam 22X will be defined as X-axis, the axis along a vertical irradiation treatment beam 22Y will be defined as Y-axis, and an axis orthogonal to the Y- and X-axes will be defined as Z-axis. The Z-axis usually coincides with an axis in the direction of the body axis of the patient 8.
In such a particle beam therapy irradiation device, PET measurement during irradiation is needed to check an irradiation field 24 in the body of the patient 8.
As a method for combining a heavy particle irradiation device with PET, Non-Patent Literature 1 describes that the detector ring 12 is inclined to preserve an open space having a width C as shown in FIG. 4. As shown to the upper left of FIG. 4, the detector ring 12 has a perfect circular shape. The PET detectors 10 are stacked in a direction perpendicular to the sections of the detector ring 12. The internal space of the detector ring thus has an elliptical shape when viewed in a direction perpendicular to the Z-axis (the left of the diagram).

Inclined pet device and pet combined device

NATIONAL INSTITUTES FOR QUANTUM AND RADIOLOGICAL SCIENCE AND TECHNOLOGY


A method for providing access to an Internet resource includes receiving a DNS query including a hostname to be resolved, receiving status data, invoking a code by a name indicated by the hostname, conveying the status data to the code, receiving from the code a selection of an infrastructure, and generating a DNS response directing a resolution to the infrastructure.

A web client obtains an Internet Protocol (IP) address for accessing an Internet resource (a "resource") by initiating a Domain Name System (DNS) query for a resolution of a Fully Qualified Domain Name (FQDN), or hostname, such as www.example.com. An IP address enables the web client to create an IP connection by which communications with the resource proceeds. Resolution, or translation, of an FQDN to an IP address is described in publication RFC 1035 of the Internet Engineering Task Force (IETF) entitled, "DOMAIN NAMES IMPLEMENTATION AND SPECIFICATION", by P. Mockapetris, as well as in additional IETF publications related to DNS including RFCs 1033, 1034, 1912, 2136, 2181, 2535, 2671, and 4033, the teachings of which are all incorporated herein by reference.
U.S. Pat. No. 7,155,723 to Swildens, et al., whose disclosure is incorporated herein by reference, describes a nameserver that performs resolution based on network information, service probes, latency probes, packet loss probes, bandwidth usage and static latency information.
U.S. Pat. No. 6,996,616 to Leighton, et al., whose disclosure is incorporated herein by reference, describes a map maker service that generates a nameserver map based on server performance.
U.S. Pat. No. 6,446,121 to Shah, et al., whose disclosure is incorporated herein by reference, describes a nameserver configured to receive a DNS query, to send a query to each of a plurality of mirror web sites, and to respond to the query by indicating the mirror web site with the best round-trip packet time.


In a wave gear device provided with a cup-shaped flexible external gear, the difference in the direction of the thrust force applied to the wave generator during speed reduction or speed increase is used to reduce the input-side holding torque. During speed reduction, thrust force F1 is applied to the wave generator in the direction toward the open side of the flexible external gear, and during speed increase, thrust force F2 is applied in the opposite direction. The plug of the wave generator is pressed against the friction plate mounted on the motor housing by the thrust force F2 applied during speed increase, and the friction force that is produced is used as part of the input-side holding torque for restraining the wave generator from rotating.

1. Field of the Invention
The present invention relates to a method for reducing an input-side holding torque of a wave gear device in which the input-side holding torque for holding the wave generator that is an input-side member of the wave gear device is reduced so that the wave generator is not rotated by the torque applied from the load side. The present invention also relates to a rotary actuator in which the method is adopted.
2. Description of the Related Art
Rotary actuators provided with wave gear devices having a high positioning accuracy and a high reduction ratio are used in joint function mechanisms and the like of industrial robot hands. JP-A 2004-181610 and JP-A 2004-122339 disclose a robot hand provided with rotary actuators that have a wave gear device coupled to a motor shaft.
A wave gear device has a configuration in which an annular flexible external gear is coaxially disposed inside an annular rigid internal gear, and a wave generator is fitted therein. The wave generator is commonly elliptically contoured, and a state is formed in which the flexible external gear is elliptically flexed by the wave generator and in which the two gears mesh at the two ends of the elliptical shape in the direction of the major axis. The flexible external gear commonly has two fewer teeth than does the rigid internal gear. Therefore, when the wave generator is rotated by a motor, the meshing position of the two gears moves in the circumferential direction and a relative rotation corresponding to the tooth number difference is generated in the two gears. The rigid internal gear is usually fixed in place so as to prevent the rotation, and reduced rotations are outputted from the flexible external gear.
A cup-shaped flexible external gear and a silk hat-shaped flexible external gear are known as flexible external gears for a wave gear device with such a configuration. A cup-shaped flexible external gear has a cylindrical trunk, an annular diaphragm that extends radially inward from one end of the cylindrical trunk, a discoid or annular boss formed continuously on the internal peripheral edge of the diaphragm, and external teeth formed on the external peripheral surface of the other end of the cylindrical trunk. A silk hat-shaped flexible external gear has a cylindrical trunk, an annular diaphragm that widens radially outward from one end of the cylindrical trunk, an annular boss formed continuously on the outer peripheral edge of the diaphragm, and external teeth formed on the external peripheral surface of the other end of the cylindrical trunk.
Also known are wave gear devices that are referred to as a flat-type or a pancake-type wave gear devices. In these types of the wave gear devices, a cylindrical flexible external gear is disposed inside of two coaxially disposed rigid internal gears, and an elliptically contoured wave generator is fitted inside of the flexible external gear. One of the rigid internal gears has 2n (where n is a positive integer) more teeth than does the flexible external gear, and the other rigid internal gear has the same number of teeth as the flexible external gear. When the wave generator is rotated, a relative rotation is generated in the two rigid internal gears. By fixing one of the rigid internal gears in place so as to prevent the rotation, the reduced rotational output can be obtained from the other rigid internal gear.
FIG. 2 shows the relationship between the torque of the rotational input-side of the wave gear device (hereinafter referred to as "input-side torque") and the torque of the reduced rotational output-side (hereinafter referred to as "output-side torque" or "loading torque"). Line A in the diagram indicates the relationship during the speed reduction in which the wave generator is rotated, and the reduced rotations are outputted from the flexible external gear. Line B indicates the relationship during the speed increase in which the flexible external gear is rotated, and the high-speed rotation is outputted from the wave generator. It is apparent from lines A and B that in comparison to the speed increase, the input-side torque is high with respect to the output-side torque during the speed reduction.
In the joint mechanism of a robot hand, the high torque is outputted while the motor rotations are reduced via the wave gear device. In an operating pattern in which the output torque is maintained, the input-side torque can be kept low even when the output-side torque is high. Thus, the input-side holding torque, which holds the motor shaft connected to the wave generator of the wave gear device so that the shaft is not rotated by the loading torque (output-side torque), is kept low. For this reason, the value of the electric current of the motor for holding the motor shaft in a prescribed rotational position is also kept low.
An object of the present invention is to provide a method for reducing the input-side holding torque of the wave gear device in which the input-side holding torque required for holding the wave generator, which is an input-side rotating member of the wave gear device, can be further reduced so that the generator is not rotated by the loading torque.

Method for reducing input-side holding torque of wave gear device, and rotary actuator


The light guide for an automobile lighting device having at least one coupler having at least two input faces arranged so that, when a light source is positioned at a predetermined point in relation to the coupler, for each of the input faces, all the rays from the source passing geometrically through the point and penetrating into the guide through the input face are refracted there in mutually parallel planes.

1. Field of the Invention
The invention relates to the lighting and/or signaling devices for automobiles.
2. Description of the Related Art
It is known practice to provide such devices with a light guide in the form of a ply and LEDs whose light rays are routed by the guide to the output of the device. A light beam is thus produced that has a rectilinear or curved linear profile.
Now, in particular when the profile is curved, the beam may appear non-uniform, even discontinuous, along the line.
What is needed, therefore, is a lighting and/or signaling device that facilitates overcoming these problems.

Light guide for an automobile lighting and/or signaling device


A Random Access Error Detection and Correction unit (RAEDAC) that incorporates a bit-wise error detection and correction unit (BEDAC) in a memory system. In one embodiment, a word-wise error detection and correction unit (WEDAC) operates in coordination with a BEDAC that performs a bit-wise parity calculation. In another embodiment, a WEDAC operates in coordination with a full bit-wise BEDAC that calculates bit-wise check bits. The RAEDAC may be applied to create a multi-dimensional EDAC where, for example, the memory is partitioned into a stack of planes, and a stack-wise error detection and correction unit (SEDAC) is implemented.

Typical dynamic memories store data as charges on storage capacitors. Over time the storage capacitors lose charge and eventually the memory loses data. Dynamic memory devices therefore require a refresh operation to maintain the charge on the storage capacitors and thus maintain data. The refresh operation typically involves sensing the charge on the storage capacitor and reinforcing the charge.
In a dynamic memory such as a Dynamic Random Access Memory (DRAM), the refresh operation does not avoid all losses of data. Loss of data may be due to irreparable hardware failures, referred to as hard errors. DRAMs also experience transient loss of data, referred to as soft errors. The number of soft errors experienced per size of memory and over time is referred to as the Soft Error Rate (SER) or Failure In Time (FIT) rate.
The system data integrity and reliability is often measured by the SER. The SER is responsive to a variety of design, manufacture, and application specific issues. The marginal design of hardware may effect the SER by not considering the most common causes of such failures. Similarly, operating conditions may tend to increase the SER. For example, poor regulation or intentional deregulation of power supplies compromises the ability to correctly sense the contents of the DRAM bit cells. Additionally, operation of the DRAM at high temperatures increases leakage of the storage cell affecting the ability of the cells to maintain the stored charge. Another consideration is packaging, where problems relating to radioactivity, as well as other manufacturing and packaging issues effect the SER. Packaging materials that emit alpha particles and/or cosmic radiation are classically studied sources of SER problems in DRAMs.
In general, DRAM design and manufacture balance SER requirements against cost, as reducing SER typically adds additional circuitry, reduces operating speed and increases power dissipation. As the DRAM industry moves to lower voltage operation, the stored charge of the storage cells is reduced, increasing SER. Additionally, advances in semiconductor process technology and economic pressure to reduce cost by increasing circuit density tend to result in reduction of the capacitance of DRAM storage capacitors. Reduced charge (Q=CV) stored in DRAM bit cells results in increased SER because of an inverse exponential relationship between stored charge and SER.
Various methods have been developed to detect and correct soft and hard errors. An Error Detection And Correction unit (EDAC) is used to detect errors in stored data, and if possible, correct errors in the data. EDACs greatly improve data integrity. The operation of one type of EDAC is based on a code word. Data to be stored in the memory is provided to the EDAC. The EDAC then generates check bits based on the data value. The check bits are then combined with the data to form a code word. The code word is then stored in the memory. To check the data, the EDAC reads the code word from the memory and recalculates the check bits based on the data portion of the code word. The recalculated check bits are then compared to the check bits in the code word. If there is a match, the data is correct. If there is a difference and the error is correctable, the EDAC provides the correct data and check bits as an output. If there is a difference and the error is detectable but uncorrectable, the EDAC reports the occurrence of a catastrophic failure.
A variety of EDAC techniques and circuits are available, as are a variety of methods for generating code words and performing bit checks. Some methods are discussed in U.S. Pat. No. 5,598,422, by Longwell, et al., entitled "Digital computer having an error correction code (ECC) system with comparator integrated into re-encoder," and in Error-Correction Codes, by W. W. Peterson, 2d edition, MIT Press (1972).
The codeword generated by an EDAC is dependent upon the size of the data component and the required level of detectability and correctability of errors. As the number of errors the EDAC is able to detect and the number of errors the EDAC is able to correct increase, the number of check bits, and thus the number of bits in the codeword increases. As the codeword increases so does the complexity of the EDAC. This complexity adds to the circuitry required and also reduces the speed of operation of the EDAC and therefore of the DRAM.
Therefore a need exists for an efficient method to detect and correct errors in a dynamic memory. A need exists for an EDAC apparatus that reduces the SER even as the size of the memory cell shrinks, and over a broad range of considerations, such as manufacturing, packaging, design, and application. Further, a need exists to develop an integrated method of error detection and correction for an embedded DRAM, where the DRAM includes an array of memory tiles. Still further a need exists to increase the capability of error detection and correction without increasing the complexity of the individual EDAC units.

Method and apparatus for error detection and correction


An active terminator is configured with switches to select between terminating two lines for transmitting one differential signal pair or two single ended signals terminated in a pseudo-differential receiver. The receiver circuitry is configured with three differential comparators. One differential comparator receives both signal lines and other two differential comparators each receive one signal line and a reference voltage. The signal lines are terminated in a resistive voltage divider with electronic switches coupling the positive and ground voltages. The top and bottom nodes of the resistor divider in both terminators are cross-coupled with pass gates. In the pseudo-differential mode the pass gates are OFF and the electronic switches are ON with known resistances. In the differential mode, the electronic switches are OFF and the pass gates are ON with known resistances. The pass gate and switch resistances are sized with the resistors to insure a desired termination impedance.

Digital computer systems have a history of continually increasing the speed of the processors used in the system. As computer systems have migrated towards multiprocessor systems, sharing information between processors and memory systems has also generated a requirement for increased speed for the off-chip communication networks. Designers usually have more control over on-chip communication paths than for off-chip communication paths. Off-chip communication paths are longer, have higher noise, impedance mismatches, and have more discontinuities than on-chip communication paths. Since off-chip communication paths are of lower impedance, they require more current and thus more power to drive.
When using inter-chip high-speed signaling, noise and coupling between signal lines (cross talk) affects signal quality. One way to alleviate the detrimental effects of noise and coupling is through the use of differential signaling. Differential signaling comprises sending a signal and its compliment to a differential receiver. In this manner, noise and coupling affect both the signal and the compliment equally. The differential receiver only senses the difference between the signal and its compliment as the noise and coupling represent common mode signals. Therefore, differential signaling is resistant to the effects that noise and cross talk have on signal quality. On the negative side, differential signaling increases pin count by a factor of two for each data line. The next best thing to differential signaling is pseudo-differential signaling. Pseudo-differential signaling comprises comparing a data signal to a reference voltage using a differential receiver or comparator.
When high speed data is transmitted between chips, the signal lines are characterized by their transmission line parameters. High speed signals are subject to reflections if the transmission lines are not terminated in an impedance that matches the transmission line characteristic impedance. Reflections may propagate back and forth between driver and receiver and reduce the margins when detecting signals at the receiver. Some form of termination is therefore usually required for all high-speed signals to control overshoot, undershoot, and increase signal quality. Typically, a Thevenin's resistance (equivalent resistance of the Thevenin's network equals characteristic impedance of transmission line) is used to terminate data lines allowing the use of higher valued resistors. Additionally, the Thevenin's network is used to establish a bias voltage between the power supply rails. In this configuration, the data signals will then swing around this Thevenin's equivalent bias voltage. When this method is used to terminate data signal lines, a reference voltage is necessary to bias a differential receiver that operates as a pseudo-differential receiver to detect data signals in the presence of noise and cross talk.
Sometimes pseudo-differential signaling is not adequate for a desired signal quality and true differential signaling is needed at the expense of reduced bandwidth. The signal lines for pseudo-differential signaling are individually terminated to eliminate reflections. Typically a voltage divider provides a bias voltage as well as generating the proper impedance level by the parallel combination of the resistors in the voltage divider. In a true differential receiver, the termination resistance is usually placed across the two signal lines. Configuring a communication network so that either differential or pseudo-differential signaling could be used with a termination network that was switchable would lead to excessive capacitive loading unless a novel approach was used. Therefore, there is a need for a switch selectable termination system that enables both true differential and pseudo-differential signaling while minimizing capacitive loading.

Switch selectable terminator for differential and pseudo-differential signaling

International Business Machines Corporation