A base of an optical pickup is provided with a bearing slidably supported by a guide shaft and an engagement portion guided by a guide rail. The bearing includes a pair of front and rear bearing elements. A concave portion and a pressing piece having a shape that enables forming die extraction in a direction orthogonal to the direction of the axis line are provided on at least one bearing element so as to be displaced.

1. Field of the Invention
The present invention relates to a disk apparatus having an optical pickup, and more particularly, to an apparatus having an optical pickup whose movement in the direction of the radius of the disk is required to be guided with high accuracy by a guide shaft that is circular in cross section.
2. Description of the Related Art
FIG. 8 is a schematic plan view showing the general structure of an optical pickup attached part of this type of disk apparatus. In the figure, reference numeral 1 denotes a chassis, and a turntable 2 fixed to the rotation shaft of a non-illustrated driving motor is disposed in a predetermined position of the chassis 1. The chassis 1 has an opening 3, and in an inner area of the opening 3, an optical pickup 10 is moved in a far and near direction with respect to the turntable 2, that is, in the direction of the radius of a disk D rotated by the turntable 2 (the direction of the arrow R). The motor serving as a movement driving source for moving the optical pickup 10 is not shown.
The optical pickup 10 is formed by mounting, on a base 20 formed of a synthetic resin molding, an optical system that has an objective lens 12 and a non-illustrated optical axis adjusting mechanism and scans a disk. The base 20 is provided with a bearing 30 including a pair of front and rear bearing elements 31 and 32 provided on one side and in the lateral direction and an engagement portion 40 provided on the other side end in the lateral direction, the bearing 30 is swingably supported by a guide shaft 50, and the engagement portion 40 is guided by a guide rail 60 disposed parallel to the guide shaft 50.
It is found that in such an optical pickup 10, the position of engagement between the guide rail 60 and the engagement portion 40 is not required of a high accuracy demanded for the engagement portion 40 to be guided by the guide rail 60 without any backlash although the bearing 30 is required to be guided by the guide shaft 50 with high accuracy without any backlash. For this reason, as shown in the schematic perspective view of FIG. 9, the engagement portion 40 has a pair of protruding pieces 41 and 42 slidably sandwiching, in the longitudinal direction, the guide rail 60 including a round bar that is circular in cross section, and play S in which the engagement portion 40 is displaceable in the lateral direction with respect to the guide rail 60 is frequently secured between the protruding pieces 41 and 42.
Under such conditions, an optical pickup of a conventional disk apparatus will be described with reference to FIG. 10 through FIG. 12. FIG. 10 is a schematic bottom view showing a relevant part of the optical pickup for which the part is viewed from the underside. FIG. 11 is a schematic cross-sectional view taken on the line XI—XI of FIG. 10. FIG. 12 is an enlarged view on the arrow XII of FIG. 10.
In this optical pickup, the pair of front and rear bearing elements 31 and 32 of the bearing 30 provided on one side end, in the lateral direction, of the base 20 formed of a synthetic resin molding have round holes 33 and 34, and cylindrical sliding surfaces 35 and 36 including the inner circumferential surfaces of the round holes 33 and 34 are slidably in contact with the guide shaft 50 that is circular in cross section (see FIG. 8) with high accuracy without any backlash. In FIG. 10 and FIG. 12, reference numeral 21 denotes a rack to which the output of a non-illustrated motor is transmitted. In the optical pickup shown in FIG. 10 through FIG. 12, an engagement portion provided on the other side end, in the lateral direction, of the base 20 has a structure similar to that of the engagement portion 40 described with reference to FIG. 8, and is slidably engaged with the guide rail 60 described with reference to FIG. 8 with a similar structure. The other structures are similar to those described with reference to FIG. 8.
In the conventional disk apparatus having such an optical pickup 10, when the base 20 integrally provided with the bearing 30 is molded of a synthetic resin, since the front and rear bearing elements 31 and 32 constituting the bearing 30 have the round holes 33 and 34, a metal mold slide pin 70 for molding shown by alternate long and short dashed lines in FIG. 10 is used. Since the metal mold slide pin 70 elongates from a non-illustrated metal mold main part and a single metal mold slide pin 70 is used for forming both the round holes 33 and 34 of the front and rear bearing elements 31 and 32, it is necessary that the metal mold slide pin 70 elongating from the metal mold main part be long enough to form both of the round holes 33 and 34 of the front and rear bearing elements 31 and 32, and further, the mold releasing stroke when the metal mold slide pin 70 is taken out in the direction of the arrow A of FIG. 10 at the time of mold releasing after molding is long.
On the contrary, in the conventional apparatus having the optical pickup 10, the engagement portion having a similar structure to the engagement portion 40 described with reference to FIG. 8 or 9 can be molded by use of a general-purpose split-cavity mold moved toward a side of the base 20 for mold releasing without the use of the above-mentioned metal mold slide pin 70, because it has the pair of upper and lower protruding pieces 41 and 42 and the space between the protruding pieces 41 and 42 is open toward the side of the optical pickup.
On the contrary, a prior art example describes a disk drive apparatus having an optical pickup where a bearing including two front and rear bearing elements is slidably supported by a main guide shaft (corresponding to the above-mentioned guide shaft) and an engagement portion guided by a round-bar-shaped sub guide shaft (corresponding to the above-mentioned guide rail) disposed parallel to the guide shaft is provided (for example, see JP-A-2001-222823). The structure of this disk drive apparatus is similar to that of the above-mentioned conventional example in that the main guide shaft is inserted in round holes of the front and rear bearing elements and the engagement portion has protruding pieces that sandwich the sub guide shaft in the longitudinal direction.
Another prior art example mentions an optical pickup bearing mechanism where a first bearing portion (corresponding to the above-mentioned bearing) is slidably supported by a first guide rod (corresponding to the above-mentioned guide shaft) and a second bearing portion (corresponding to the above-mentioned engagement portion) is guided by a second guide rod (corresponding to the above-mentioned guide rail) (for example, see JP-A-2003-77234). This example describes, as the structure of the second bearing not required of very high accuracy, that the second guide rod is slidably sandwiched, in the longitudinal direction by use of spring tension, between a first sliding portion on the side of the optical pickup base and a second sliding portion on the side of a holder attached to the optical pickup base.
Still another prior art example mentions a guide mechanism where two front and rear U-shaped holders are provided on one side end of a base on which a magnetic head is mounted, and a cylindrical bearing in which a guide rod is slidably inserted is held by these holders (for example, see JP-A-61-175712).
When a structure where the round holes 33 and 34 are provided in the front and rear bearing elements 31 and 32 of the bearing 30 and the guide shaft 50 is inserted in the round holes 33 and 34 is adopted in order to satisfy the demand for guiding the bearing 30 by the guide shaft 50 with high accuracy without any backlash like the optical pickup of the conventional disk apparatus described with reference to FIG. 10 through FIG. 12, it is required to use an elongate metal mold slide pin 70 as the forming die for the round holes 33 and 34 as described with reference to FIG. 10.
However, when such an elongate metal mold slide pin 70 is used, the overall size of the molding machine for molding the base 20 is increased in accordance with the length of the metal mold slide pin 70 and the number of necessary metal mold parts is increased, so that although the engagement portion 40 (see FIG. 9) can be molded by use of a general-purpose split-cavity mold, the cost of the metal mold is increased, so that the cost of molding the base 20 is increased. Moreover, the elongate metal mold slide pin 70 readily deforms or breaks because of being long and further, the cost required for replacing the metal mold slide pin 70 is high.
Moreover, the sliding surfaces 35 and 36 including the inner circumferential surfaces of the round holes 33 and 34 of the front and rear bearing elements 31 and 32 are straight in the direction of the axis line of the metal mold slide pin 70 because they are molded by the metal mold slide pin 70, so that the area of contact with the guide shaft is large and this can increase the load on the motor for driving the optical pickup.
The disk drive apparatus described in JP-A-2001-222823 has a similar problem as the conventional example because the optical pickup thereof has the structure where the bearing having round holes is slidably supported by the main guide shaft and the engagement portion having upper and lower protruding pieces is slidably engaged with the sub guide shaft. Moreover, the art described in JP-A-2003-77234 cannot be a solution to the above-mentioned problem because it merely provides a structure of the second bearing portion not required of very high accuracy. Further, the mechanism described in JP-A-61-175712 cannot be a solution to the above-mentioned problem, either, because it has the structure where the cylindrical bearing in which the guide rod is slidably inserted is held by the U-shaped holders.


The invention relates to a liquid crystal mixed-composition comprising one or more cellulose derivatives and one or more liquid crystal compounds (preferably low-molecular liquid crystal compound) which can be oriented in a specific direction differing from that of the cellulose derivative, wherein the ratio by weight of the both is preferably in a range from 1:9 to 9:1, a retardation film produced using the composition, a circularly or elliptically polarizing film using the retardation film and an image display device provided with a circularly or elliptically polarizing film. The liquid crystal mixed-composition can be easily oriented in a specific direction on a rubbed substrate. If this orientation is fixed, a retardation film can be easily obtained which has such wavelength dispersion characteristics that the same level of retardation can be imparted to each wavelength in a wide visible region.

Current retardation films are obtained by uniaxially stretching plastic films such as polycarbonate, polyarylate and polyether sulfone and are films having the function of changing the polarization axis of linearly polarized light (optical rotation) and the function of converting linearly polarized light into circularly polarized light or elliptically polarized light. This retardation film generally has so-called wavelength dispersion characteristics that a retardation differs depending on wavelength and the wavelength dispersion characteristics differ depending on the type of material to be used. Usually used retardation films each have the characteristics that the retardation value in the wavelength side longer than 550 nm is smaller than the retardation value at a wavelength of 550 nm and the retardation value in the wavelength side shorter than 550 nm is larger than the retardation value at a wavelength of 550 nm. This tendency is more significant in the shorter wavelength side.
This poses, for example, the problem that when a retardation film (so-called quarter wavelength plate) having a retardation which is to be ¼ of the wavelength is used to produce an anti-reflection filter, a sufficient anti-reflection effect is obtained only in the wavelength range where the retardation is almost ¼ the wavelength and circularly polarized light is converted into elliptically polarized light at other wavelengths with the result that only insufficient anti-reflection effect is obtained. Also, when a retardation film (so-called half-wave plate) having a retardation which is to be ½ of the wavelength is used to produce a rotatory polarizer which is used for a liquid crystal projector and the like, only in the wavelength range where the retardation is almost ½ of the wavelength can rotate a linearly polarized light as linearly polarized light, and linearly polarized light is converted into elliptically polarized light at other wavelengths with the result that only an insufficient rotatory polarizing effect is obtained.
To deal with this problem, a method is proposed in which plural retardation films are laminated with their optical axis being crossed with each other in the publication of Japanese Patent Application Laid-Open (JP-A) No. 5-100114. This method, however, has the problem that it causes an increase in thickness due to the use of plural retardation films, such complexity of the production process in which plural retardation films are laminated with their optical axis being crossed with each other and a reduction in yield (these retardation films must be cut to cross these films with each other). In the meantime, a retardation film is proposed which can impart the same level of a retardation to each wavelength in a wide visible range by using only one film in the publication of JP-A No. 2000-137116.
However, because the wavelength dispersion characteristics are determined by the material to be used in a retardation film, there is a limitation to such a material as described in the publication of JP-A No. 2000-137116 which can improve the wavelength dispersion characteristics by using only one film. Also, because such a material does not function as a retardation film unless it is made into a film and the film is further stretched uniaxially, such a complex step involving filming and stretching must be carried out. Further, in the case where it is necessary to laminate the retardation films such that the polarization axis of a polarization film crosses at a specific angle with the slow axis of a retardation film, it is necessary to cut the film to laminate the cut film on another film even if the retardation film is one film, with the result that this causes a reduction in yield. In order to solve such a problem, there is a method disclosed in the publication of JP-A No. 2000-98133 in which using a composition obtained by adding a mixture of specific nonionic fluoroalkyl-alkoxylate surfactants to a mixture of specific low-molecular liquid crystal compounds which can be oriented on a substrate which has been subjected to rubbing treatment, the liquid crystal compound is oriented in a specific direction to obtain a retardation film. It is however difficult to obtain a very satisfactory film having such wavelength dispersion characteristics that the same level of retardation can be given to each wavelength in a wide visible range. According to the publication of WO02/093213 (PCT/JP02/04523), a retardation film having such wavelength dispersion characteristics is obtained by rubbing or stretching a film obtained from a liquid crystal cellulose derivative and a non-liquid crystal reactive product. However, there is the problem that when the film obtained from the liquid crystal composition as specifically disclosed in the publication is oriented in a specific direction on a rubbed substrate, satisfactory orientation is not obtained.

Liquid crystal mixed composition and retardation film using same


A multi-level lead frame configuration (114) for an integrated circuit chip (116) comprises a main lead frame (115) having a plurality of lead frame bond fingers (122 and 124) that directly connect to a plurality of bond pads (126) on the integrated circuit chip (116). Associated with the main lead frame (115) is a bus bar lead frame (128 and 130) having a plurality of bus bar lead fingers (118 and 120) that directly connect to a second plurality of inner bond pads (126) on the integrated circuit chip (116). The bus bar bond fingers (118 and 120) associate with the main lead frame (115) and main lead frame bond fingers (122 and 124) to permit a lead-on-chip configuration of the main lead frame and the bus bar lead frame.

Lead-on-chip semiconductor packaging structures use a lead frame that extends over and is adhesively joined to the surface of the integrated circuit chip. The lead frame has numerous bond fingers to carry signals between the chip and external circuitry. The bond fingers electrically connect via numerous bonding wires to bond pads typically located in a center row of the chip's top surface. In most lead frame configurations, the bond fingers appear on two sides of the bond pads. In lead-on-chip packages, a double-sided adhesive tape is used to attach the bond fingers to the chip and provide insulation between the chip and bond fingers. An advantage of this type of configuration is that power buses for the circuitry of the integrated circuit chip may be located external to the chip. In other words, the power buses may be part of the lead frame design. One merit of this packaging concept is that the power buses of the circuitry can be located external to the chip as part of the lead frame design. This reduces the chip size and improves the plastic-to-silicon ratio in the lead-on-chip package. The buses run alongside the bond pads. Connections between the bond pads and the bond fingers are, therefore, made by routing the bonding wires around the buses.
More modern lead-on-chip configurations avoid the use of bonding wires and, instead, connect bond fingers from a lead frame directly to the bond pads on the chip. Techniques that use these configurations are called inner lead bonding or ILB techniques. Power buses that run alongside the bond pads and must be routed around limit the ability to employ ILB techniques. With the power bus obstructing access to the bonding pads of the integrated circuit, it is not possible to easily access the bond pads with ILB lead frames.
There is a need, therefore, for a method to employ inner lead bonding techniques on an integrated circuit chip that uses lead-on-chip packaging.
There is a need for an apparatus that functions as a power bus for an integrated circuit chip and that permits an inner leading bonding adaptation to a lead-on-chip lead frame configuration.

Lead-on-chip inner lead bonding lead frame method and apparatus


A magnetic head comprising a magnetic path and a vertically magnetizable film. The magnetic path contains a first gap facing a magnetic recording medium and a second gap. The vertically magnetizable film is formed across the second gap on the principal plane or outer circumference of the magnetic path. A linearly polarized light beam is irradiated onto the vertically magnetizable film and the resulting reversal of magnetization in the vertically magnetizable film is detected through the use of a polar Kerr effect. This scheme allows data to be reproduced with sufficient sensitivity from tracks of very small widths.

1. Field of the Invention
The present invention relates to a magnetic head and, more particularly, to a magnetic head which utilizes a magnetic optical effect to reproduce magnetic discs.
2. Description of the Prior Art
Conventionally used disc type recording media include magnetic discs (floppy discs and hard discs), optical discs (compact discs and laser discs) and magnetic optical discs. Of these discs, the magnetic disc has data recorded, reproduced and deleted thereto and therefrom through the use of a magnetic head. The recording reproducing and deleting of the data to and from the magnetic disc are most often performed using what is known as the magnetic induction method. One characteristic of the magnetic disc is its ability to have data overwritten on it. Because it relies on the magnetic induction method, the magnetic disc is required to have a track width as wide as tens of .mu.m. It is difficult to reduce the track width as long as the magnetic induction method is utilized. Today, studies are under way on the so-called MR (magnetic resistance) head that operates on a magnetic resistance effect. However, even if the MR head is practically implemented, the track width involved is still expected to measure as large as several .mu.m.
On the other hand, the optical disc and magnetic optical disc each measure 1.6 .mu.m in track width. The small track width intrinsically affords the optical or magnetic optical disc a high-density, high-capacity data storing capability. On the optical or magnetic optical disc, the diameter of a recording pit may be as small as 0.6 .mu.m when the laser beam used has a wavelength of 780 nm. If the wavelength of the laser beam is shortened, the spot diameter thereof may be made correspondingly smaller. This in turn will boost the recording density on the disc. Given the present state of the art, however, the shortwave laser beam ranging from the blue to outside the near velvet region is difficult to obtain; it is not yet practical to improve the recording density of the disc through the shortening of the laser beam wavelength. Unlike compact discs or laser discs, the magnetic optical disc has one distinct advantage: the latter disc allows data to be overwritten repeatedly on it. However, the speed at which to overwrite data or to gain access to the magnetic optical disc is yet to be improved for more practical use.
One notable property of the magnetic head is its ability to reduce the recording wavelength easily to 0.6 .mu.m or even less by shortening its gap length. If the biggest disadvantage of the magnetic disc, i.e., the large track width, is somehow resolved illustratively by an arrangement implied above, the recording density of the magnetic disc will be significantly improved.
With the magnetic head, the thickness of its magnetic layer facing a magnetic disc represents the track width. In this case, with the eddy current loss taken into account, a magnetic layer several .mu.m in thickness is expected to provide better I/O characteristics in the high frequency range (>10 MHz) than a magnetic layer tens of .mu.m thick. However, as described, the magnetic induction method based on a coil arrangement makes it very difficult to reproduce data from tracks whose width is several .mu.m or less. There is a possibility, as described, that the use of the MR head will allow data to be reproduced from tracks several .mu.m wide. But this is the limit; it is difficult to reproduce data from tracks of smaller widths using the prior art.
Of the methods for detecting the magnetized state of a magnetic substance, the method that works with the smallest magnetic substance thickness is that which utilizes magnetic optical effects such as the Kerr effect. This magnetic optical effect is a phenomenon in which a linearly polarized light beam incident on a magnetic substance has its plane of polarization rotated positively or negatively depending on the magnetized state of the substance. Although there have been reports on applying the magnetic optical effect to detecting the magnetized state of the magnetic head, all such applications are based on the longitudinal or traverse Kerr effect. Because the Kerr rotation angle derived from the longitudinal or traverse Kerr effect is intrinsically small, the reproduced signal output available thereby is low. This means that the use of the Kerr effect is not suitable in implementing a practical method of reproducing data from the magnetic disc.

High density dual gap magnetic head using polar Kerr effect


Systems, methods and apparatus are provided for an intelligent server platform using genetic algorithms to execute a server migration based on fitness. The platform may locate hardware and software artifacts and map functional relationships between artifacts. Artifacts may be clustered based on interdependency to ensure that functionally related artifacts are migrated as a unit. The platform may apply a fitness protocol to generate a fitness score for each cluster and select clusters based on fitness score. The platform may apply a crossover protocol to optimize selected clusters for compliance with enterprise standards. The platform may iterate through the crossover protocol and modify a convergence goal based on populations of successive generations. The platform may rank artifacts and generate a protocol for migration. The platform may execute the migration in accordance with the migration protocol.

Server migration is a complex process that requires understanding and consideration of usage levels, functional relationships, and business impact for a diverse set of server artifacts.
Conventionally, server migration involves a complete transfer of all artifacts from a source domain to a destination domain. However, complete migration might not result in an optimized server state due to obsolete or unutilized configurations of software or hardware in the source domain.
Evolutionary computing is a family of genetic algorithms for global optimization inspired by biological evolution. In evolutionary computing, an initial set of candidate solutions is generated and iteratively updated. Each new generation is produced by removing less desired solutions. In biological terminology, a population of solutions is subjected to selection and mutation. As a result, the population will gradually evolve to increase in fitness.
It would be desirable to apply genetic algorithms to the server migration process in order to eliminate obsolete and underperforming artifacts while preserving functional relationships and prioritizing business criticality.


To improve a surgical machine with an electric motor comprising a rotor and a plurality of motor windings, and with a motor controller for controlling and/or regulating the electric motor so that, in particular, the efficiency of the electric motor can be optimized essentially over the entire rotational speed range, it is proposed that the entire rotational speed range of the surgical machine be divided into at least one lower rotational speed range for low rotational speeds and at least one upper rotational speed range for higher rotational speeds than those in the at least one lower rotational speed range, that the motor controller be so designed that a first controlling and/or regulating method for controlling and/or regulating the electric motor is performable in the at least one lower rotational speed range, and that a second controlling and/or regulating method for controlling and/or regulating the electric motor is performable in the at least one upper rotational speed range.

The present invention relates to a surgical machine with an electric motor comprising a rotor and at least two motor windings, and with a motor controller for controlling and/or regulating the electric motor.
The present invention further relates to a method for operating a surgical machine with an electric motor comprising a rotor and at least two motor windings, and with a motor controller for controlling and/or regulating the electric motor.
Surgical machines of the kind described at the outset are known in a multitude of variants, especially as drilling and milling machines or saws. They are operated by control signals being generated by the motor controller for the electric motor in order to operate it at a certain rotational speed. Depending on the type of electric motor, rotational speeds of up to 70,000 revolutions per minute can be reached. Due to the construction, however, the efficiency of electric motors is not identical, and, in particular, not always optimal, at all rotational speeds.
The object of the present invention is, therefore, to so improve a surgical machine and a method for operating a surgical machine that, in particular, the efficiency of the electric motor can be optimized essentially over the entire rotational speed range.

Surgical machine and method for operating a surgical machine


A crystalline semiconductor having an even surface and a large crystal grain size is formed on an economical glass substrate using a laser crystallizing technology. A series of processes, including forming an insulation film on a glass substrate; forming a semiconductor film in the first layer; crystallizing the semiconductor film in the first layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light; forming a semiconductor film in a second layer having a film thickness thinner than that of the semiconductor film in the first layer; performing laser crystallization of the semiconductor thin film in the second layer by irradiating laser light stepwise from weak energy laser light to strong energy laser light, are continuously performed without exposing the workpiece to the atmosphere.

The present invention relates to a semiconductor thin film that is fabricated by a laser crystallizing method, as well as a thin film transistor and semiconductor devices, such as a liquid crystal display apparatus, an active matrix type liquid crystal apparatus, a solar cell and the like, which use the semiconductor thin film, and a method of fabricating the semiconductor thin film, the thin film transistor and the semiconductor devices.
The laser crystallizing technology is most widely viewed as a means to fabricate a crystalline semiconductor at a low cost, which crystalline semiconductor is of the type which is applied to a high performance thin film transistor, a high value-added liquid crystal display apparatus and a solar cell. Because the crystallization of a semiconductor thin film locally heats only the vicinity of the semiconductor surface by laser irradiation, a low-cost glass substrate and a low-cost organic resin substrate can be used for the supporting substrate, and, accordingly, the laser crystallizing technology contributes to a reduced cost. Since the laser-irradiated semiconductor is first liquefied and then solidified so as to be crystallized, a high-quality crystalline semiconductor having less defects can be obtained. One way to improve the film quality of the crystalline semiconductor is to increase the crystal grain size. By increasing the crystal grain size, the volumetric ratio of the crystal grain boundary, including defects, to the whole semiconductor film is decreased, and, consequently, the mobility of electrons and holes is improved. Further, a decrease itself in number of the defects improves the quality of the crystalline semiconductor. In regard to a way to increase the crystal grain size, (1) Dig. Of Tech. Papers, 1997, Int. Workshop Active Matrix Liquid Crystal Display (Business Center of Academic Societies, Tokyo 1997), p59, proposes a method in which, after crystallizing an amorphous silicon by laser irradiation, an amorphous silicon film is formed on the fabricated polycrystalline silicon, and then the amorphous silicon is crystallized by laser irradiation.
On the other hand, a problem of the crystalline semiconductor, for example, the polycrystalline silicon fabricated by a laser crystallizing method, concerns the formation of an uneven surface due to many projections which are produced when a high-quality polycrystalline silicon having large crystal grain size is fabricated. The height of the projections is nearly equal to the film thickness of the semiconductor before irradiating the laser light. A mechanism for producing such projection is considered in the Applied Physics Letters, Vol.68, No.15, 1996, p2138, which indicates that the projections are formed by volumetric expansion caused by the phase transition from the melted silicon to the solid silicon at a boundary where surfaces of crystal growth in a direction lateral to the substrate surface collide with each other. The crystal growth in the lateral direction generally occurs when a crystal having a crystal grain size larger than the thickness of the semiconductor thin film is formed. When a semiconductor thin film having large unevenness is used to form the active layer of a coplanar type thin film transistor, the concentration of an electric field occurs at the projections so as to cause dielectric breakdown in the gate insulation film serving as the upper layer, of the active layer or to cause reduction of the reliability of the gate insulation film such as by production of defects due to hot carriers. In order to protect against these problems, the thickness of the gate insulation film needs to be formed so as to be thicker than 100 nm, and, consequently, it becomes difficult to drive the thin film transistor with low power consumption. Further, since the crystallinity of the projection is very low and the projection is located in a channel area when the semiconductor having many projections is used for a coplanar type or a normal stagger type thin film transistor, the ON current is reduced. In regard to techniques for suppressing the occurrence of the projections when the semiconductor thin film is crystallized with laser light, the following techniques have been reported.    (2) A method of irradiating laser light in stages with a pitch of 10 mJ/cm2 is described in IEEE TRANSACTIONS ON ELECTRON DEVICES, Vol.42, No.2, 1995, p251.    (3) A method of irradiating laser light after poly-crystallizing amorphous silicon using a solid phase growth method is described in Dig. of Tech. Papers 1997, Int. Workshop Active Matrix Liquid Crystal Displays (Business Center of Academic Societies, Tokyo 1997), p167.    (4) A method of changing the shape of a laser beam so as to have a wide lower slopes is described in Shin-etsu Chemical Technical Report EID98-19 (1998-06), p67.
The above-described conventional technology (1) which proposes to increase the crystal grain size of the crystalline semiconductor has a problem in that the crystal grain size can be certainly increased, but projections having a height nearly equal to the film thickness of the semiconductor are produced, and, accordingly, a large unevenness is produced. Further, there is another problem in that, because the amorphous silicon before laser irradiation is exposed to the atmosphere in order to perform dehydrogenation and, thereby, a natural oxide film is formed on the surface, oxygen enters into the silicon film when it is crystallized by laser light to reduce the quality of the film.
On the other hand, the conventional technology (2) for suppressing production of the projections has a problem in that, since laser light is irradiated in stages with a small pitch of 10 mJ/cm2 and the fine crystalline silicon that is first formed is difficult to melt, what can be fabricated is only polycrystalline silicon having a crystal grain size of nearly 60 nm, and, accordingly, polycrystalline silicon having a large crystal grain size above 500 nm can not be fabricated. The conventional technology (3) for suppressing production of the projections has a problem in that, because the solid phase growth method is used and, consequently, the silicon is heated at 1000° C., an economical glass substrate can not be used, and, accordingly, the crystalline semiconductor can not be fabricated with a low cost. The conventional technology (4) for suppressing production of the projections has a problem in that, since the crystal grain size becomes small as the projection is made small, the small roughness and the large crystal grain size are not compatible with each other.

Method of fabricating a semiconductor thin film


Paper drive unit instability that includes a variable displacement hydraulic motor (34), a rotary output (48), and a displacement controlling wobbler (36, 40) in the case of an aiding load can be avoided through the use of a double acting hydraulic actuator (42, 44) connected to the wobbler (36, 40) along with a control valve (30) including a single spool (80) connected to the motor (34), and wobbler control pilot valve (62) and to the actuator (42, 44) for a) controlling the speed and direction of rotation of the motor output (48); and b) controlling the actuator (42, 44) to maintain minimum displacement of the motor 34 when an aiding load occurs. System optimization can be achieved by changing the differential pressure setting in response to the available system pressure.

Power consumption is always of concern in aircraft. Power that is consumed in generating hydraulic fluid under pressure, electrical energy, etc. reduces the power available for propulsion and/or limits aircraft endurance as a result of the consumption of fuel in the operation of various hydraulic systems that otherwise might be expended in propelling the aircraft. Not untypically, in aircraft of more than basic simplicity, hydraulic systems are used for control purposes to change the aerodynamic configuration of the aircraft. In the usual case, hydraulic motors are mechanically connected to a control surface for the aircraft and through appropriate servo mechanisms, caused to operate to vary the aerodynamic configuration to some commanded configuration.
While such systems work well, when being operated under less than peak load, the volumetric flow demand of the hydraulic system may be considerably in excess of that required to meet the aerodynamic load. Consequently, power is consumed in unnecessarily pressurizing an unnecessarily large quantity of hydraulic fluid.
In an effort to avoid this and associated problems, it has been proposed to use variable displacement hydraulic motors in such aircraft systems. See, for example, U.S. Pat. No. 4,907,408 issued Mar. 13, 1990 to Barker.
When variable displacement hydraulic motors are employed, their displacement may be reduced for relatively light loads, thus requiring a lesser volumetric flow rate of hydraulic fluid in order to make the required system adjustment. However, in many hydraulic systems intended for aircraft, there is the possibility of experiencing a so-called aiding load. In such a case, aerodynamic forces acting on the control surface to be adjusted are aiding the system as it moves the surface. This, in turn, requires that the hydraulic motor act as a pump in order to maintain control of the position and the speed of the aircraft control surface. With prior art control schemes, in which the system modulates towards a higher displacement of the hydraulic motor as higher aiding loads occur, system instability may result and difficulty in properly moving the aerodynamic control surface to the desired position can occur.
Another difficulty occurs where the hydraulic system utilizes a variable pressure source. In such a case, the prior art has typically optimized the system to one particular pressure, namely, the pressure at which the system would most likely be operated. As a consequence of this optimization, operation at other pressures then becomes inefficient and undesirably increases power consumption.
The present invention is directed to overcoming the above problems.

System pressure compensated variable displacement hydraulic motor


Methods and systems are described for controlling movement of a continuum robot that includes a plurality of independently controlled segments along the length of the continuum robot. The continuum robot is inserted into a cavity of unknown dimensions or shape. A plurality of forces acting upon the continuum robot by the surrounding cavity are estimated. A positioning command indicating a desired movement of the distal end of the continuum robot is received from a manipulator control. The desired movement is augmented based, at least in part, on the estimated plurality of forces acting on the continuum robot such that movement is restricted to within safe boundaries of the surrounding cavity. The positioning of the continuum robot is then adjusted based on the augmented desired movement.

Multi-segment continuum robots provide for snake-like movement and positioning by deformation of internal structures of the robotic mechanisms as opposed to the relative deformation of individual rigid links. As such, continuum robots can be used to extend deeper into cavities to perform functions including, for example, search and rescue in disaster relief, nuclear handling, and minimally invasive surgical procedures. However, adoption of continuum robots has been limited due to a lack of controls methods to prevent damage to the robotic structure and the environment when the device is inserted into a cavity of unknown dimensions. During insertion into a complex environment, such as a surgical or disaster site, continuum robots must interact safely while being subject to a multitude of unknown contact sites along the robot arm length.
Passive compliance techniques have been proposed to achieve safe interaction without the need for additional sensing and complex control. Passively compliant structures contain flexible members which comply with environment interaction forces without explicit compliant control. Though these systems have shown promise in providing a measure of safety, they suffer from a number of significant disadvantages for exploration and intervention in unstructured environments. By the very nature of their design, passive compliant systems are limited in their accuracy and the magnitude of forces that can be applied during environment interaction. Conversely, the measure of safety provided by passive compliance is limited by the flexibility of the system. Additionally, the compliance adds uncertainty and modeling difficulties that degrade trajectory tracking performance. Thus, a need exists for active compliant instrumentation that can safely interact with the surrounding environment while maintaining manipulation precision and delivering adequate forces for executing manipulation tasks.

Systems and methods for safe compliant insertion and hybrid force/motion telemanipulation of continuum robots


Electronic circuit prototype wiring board is fabricated with layers of electrically conductive material separated by layers of dielectric material. Contact pads of electrically conductive material are arrayed on a surface of the board. Columns of electrically conductive material extend upward from each of the conductive layers to selected contact pads, passing through perforations in any intermediate layers above, such that each of the pads is in electrical communication with only one of the conductive layers. All of the pads connected to a common conductive layer are of a similar geometric plan form which is associated with that layer and which is different and distinguishable from the plan form of pads in electrical communication with any other of the conductive layers. In an alternative embodiment, the wiring board is fabricated of an elastic dielectric material. Access points for each conductive layer of the board are identified by similar geometric shapes associated with that layer and which are different and distinguishable from shapes identifying access points for any other of the conductive layers. Pins fabricated of electrically conductive material are inserted into the elastic dielectric material to establish electrical contact with a desired conductive layer and be retained by the dielectric material to serve as a wiring post.

In the course of developing an electronic product, once an initial design for an electronic circuit is settled upon, a precise and detailed listing of each element of the circuit is completed and a proposed layout of a printed circuit board upon which to assemble the elements is developed. The printed circuit board is then fabricated and a first prototype of the proposed circuit is assembled and tested. Typically, the circuit design is then refined through an iterative process as more is learned about the circuit's behavior. During this iterative process, a succession of printed circuit board designs must be fabricated and circuits assembled as the design evolves. Assembly of each of the successive test circuits can be very time consuming; the assembly of a complex circuit may require weeks of technician time. Thus, there is a need for a quick and accurate way to test circuits without going through the process of repeatedly laying out and fabricating printed circuit boards.
Attempts have been made to develop circuit prototype wiring systems, and a number of prototype wiring systems have become available. Perhaps the simplest of these systems is a push-in board system which allows certain electronic components to be connected without soldering by pressing them into commonly connected retentive sockets. While this system allows quick and easy assembly of a prototype circuit, except in the case of very simple circuits, it may not provide a reliable representation of how a circuit will preform once laid out on a printed circuit board. The failure of this system to reliably predict performance in the case of more complex circuits results from the system's inability to properly model nodes as they will occur in a circuit under various frequency and current conditions once the circuit is assembled on a printed circuit board.
Another prototype wiring system of the prior art allows components to be soldered to a pre-built printed circuit board such that the components can then be connected with wires. While this system provides better circuit performance than the push-in type system, it is, none the less, awkward and does not provide a reliable prediction of the performance to be expected from a circuit when mounted on the printed circuit board in its final configuration.
As the frequency at which a circuit operates is increased, performance of the circuit becomes increasingly affected by electronic components in its environment, including components of the circuit itself, components connected to the circuit, and components completely independent of the circuit. This relational effect becomes very substantial in the case of circuits, such as those of microprocessor devices of the present art, which operate at high clock speeds. When designing printed circuit boards for such applications, the relational effect may be minimized by including a special conductive layer, generally referred to as a "ground plane layer" or "power plane layer", within the board. Such ground plane layers allow circuit designers to control the interaction of ground nodes in the circuit.
Current level also has an effect on ground nodes. In the design of circuits for relatively high power applications, such as those associated with power supplies and motor drives, it is absolutely necessary to provide a ground plane layer. Further, in many cases, it is necessary to provide multiple ground plane layers in the design of such circuits.
Thus, to allow proper modeling and reliable prediction of the performance of the final production version of printed circuit board mounted circuits for high power and high frequency applications, it is necessary that a prototype wiring system be capable of providing one or more ground plane layers for a prototype circuit. The push-in type prototype wiring system discussed above has no such provision for a ground plane and thus can not be used to model circuits other than very low frequency and low power circuits.

Electronic circuit prototype wiring board with visually distinctive contact pads


The present method describes the use of thio-phosphate as a feed source for micro-organisms and multi-cellular organisms. This compound enters into nucleotide pools and ultimately into polymers of both RNA and DNA forming stable phosphorothioate internucleotide linkages. The method enables the microbial synthesis of both plasmid and phage DNA substituted with phosphorothioate. Furthermore, methods are described for the preparation of phosphorothioate oligo mixtures from recombinant phage DNA grown in modified media for use in antisense studies.

1. Field of the Invention
The present invention relates to various methods for production of phosphorothioate containing nucleic acids which are generally more nuclease resistant than unsubstituted DNA, RNA, or oligonucleotides. Micro-organisms or cells are used to catalyze the in vivo synthesis of phosphorothioate nucleic acids by incubation in modified media containing thio-phosphate as a source of phosphorus. The method enables the bulk preparation of nuclease resistant double-stranded (ds) DNA, single-stranded (ss) DNA, RNA, or oligo mixtures substituted with phosphorothioate linkages.
Bacteria infected with recombinant phage DNA and grown in thio-phosphate containing media produce single-stranded phage DNA with phosphorothioate linkages. Recombinant phosphorothioate phage DNA can be further processed in vitro to generate oligo mixtures spanning the entire region of a cloned recombinant DNA insert. Such oligo mixtures are not only nuclease resistant but also have enhanced antisense activity by virtue of multiple target sites embodied in an entire recombinant cDNA or exon phage DNA insert. Phosphorothioate containing DNA plasmids or recombinant DNA vectors can also be prepared. The use of thiophosphate in generating phosphorothioate nucleic acids in vivo is not limited by cell type as both prokaryotic and eukaryotic cells incorporate the modified phosphate.
2. Description of Related Disclosures
Phosphorothioate containing analogues of oligonucleotides are widely used for gene ablation, otherwise known as antisense technology, to diminish gene expression in tissue culture cells or in the treatment of entire organ systems as novel pharmaceutical reagents (J. Murray Ed. (1992) "Antisense RNA & DNA," Wiley-Liss, New York; van der Krol, et al (1988) BioTechniques 6:958–975; Clercq, et al (1970) Virology 42:421–428). DNA and RNA oligonucleotides can be chemically synthesized in several hundred milligram to gram quantities (Froehler et al (1986) Nucleic Acids Res. 14:5399–5407; Sinha et al (1983) Tetrahedron Lett. 24:58435846; Letsinger et al (1965) J. American Chem. Soc. 87: 3526; Sinha and Fry (1984) In Sanghui and Cook (Eds) "Carbohydrate Modifications in Antisense Research," American Chemical Society, Washington, D.C.), although they are often used on a smaller scale for research purposes. Phosphorothioate oligos are typically prepared via solid phase synthesis and oxidative sulfurization with the Beaucage or Zon reagent. More recent advances in include the preparation of chirally enriched phosphorothioate oligos (Just et al (2000) U.S. Pat. No. 6,031,092; Stec et al (1999) U.S. Pat. No. 5,883,237) as well as large scale synthesis procedures involving solution phase techniques (Yau (1997) U.S. Pat. No. 5,644,048; Ravikumar et al (1999) U.S. Pat. No. 6,001,982).
Long phosphorothioate polymers (>100 bases) can be generated in vitro using RNA or DNA polymerases and the appropriate phosphorothioate analogues of the nucleoside triphosphates as substrates (Griffiths and Eperon (1987) Nucleic Acids Res. 15:4145–4162; Suh and Eperon (1987) Nucleic Acids Res. (1992) 20:6303–6309; Eckstein (1985) Annu. Rev. Biochem. 54:367–402). Enzymatic synthesis being more costly, is typically used when smaller quantities suffice or longer polymers are required. Enzymatic synthesis results in the stereospecific incorporation of Sp nucleotides with inversion of configuration to the Rp form in the internucleotidic linkage. In this regard, oligodeoxynucleotides of the Rp configuration form a more stable complex with mRNA and hence may be a better ablater of gene expression (Koziolkiewicz et al (1995) Nucleic Acids Res. 23: 5000–5005). Several novel in vitro approaches have been devised for the enzymatic preparation of oligonucleotides involving the formation of concatamers and various means of separating these (Lackey et al (1998) U.S. Pat. No. 5,739,311; Kacian et al (1999) U.S. Pat. No. 5,916,777; Dattagupta et al (1999) U.S. Pat. No. 5,932,450; Kool et al (2000) U.S. Pat. No. 6,096,880).
The utility of antisense oligos for the ablation of gene expression has gained considerable experimental evidence. Typically an antisense oligo hybridizes with its target RNA in a cell and thereby leads to the inactivation of the target transcript. DNA and RNA oligos taken up by cells in culture are rapidly degraded unless they are chemically modified. Phosphorothioate substituted DNA oligos are resistant to nucleases and upon uptake into the cell inhibit gene expression by stimulating an RNase H activity which degrades the RNA component of the mRNA/DNA hybrid formed.
Oligo mixtures have been shown to be more effective in antisense studies than individual oligos (Nieto et al (1994) Science 264:835–839; Morgan et al (1993) Nucleic Acids Res. 21:4615–4620; Dattagupta et al (1998) U.S. Pat. No. 5,739,309) but are not widely used as they are not as readily synthesized. Mixtures of oligos are effective at much lower concentrations and with reduced toxicity. The observations suggest that the rate limiting step for antisense inhibition is the interaction of the oligo with its target mRNA. Mixtures of antisense oligos by sensing a larger mRNA target may be more efficient and thus require lower inhibitory concentrations. An additional advantage of oligo mixtures is reduced toxicity through reduced concentrations and increased specificity. It has been suggested that non-specific effects may result from short stretches of homology between an oligo and another non-target mRNA molecule that may hybridize long enough to be destroyed by RNase H (Wolf (1992) PNAS 89:7305–7309). The use of mixtures of oligos corresponding to different parts of the mRNA to be inactivated should reduce these effects since no one oligo would accumulate to a significant extent leaving the target mRNA as the site of preferred hybridization.
The present invention provides a means for the facile production of phosphorothioate containing oligo mixtures, and DNA or RNA polymers. The method involves the use of bacteria as an economical means to generate milligram quantities of DNase resistant oligo mixtures. Large fermentors could presumably be used to synthesize gram quantities of dsDNA, ssDNA, or oligo mixtures. The nucleic acids generated are stereospecific, corresponding to the preferred more stable Rp configuration for antisense work. To produce antisense oligo mixtures no DNA sequence information is required, simply the orientation of the cloned insert with respect to transcription. For example, cDNA clones that have been inserted unidirectionally into a recombinant vector (Alting-Meese and Short (1989) Nucleic Acids Res. 17:9494–9501) can be manipulated to generate antisense oligos.

Microbial production of nuclease resistant DNA, RNA, and oligo mixtures


A device to precisely determine the angle of parallax formed by a target object of interest and first and second entrances (30, 30') for the purpose of rangefinding for example. The device having photodetectors (46) for sensing the separation of first and second channel target scene images (68, 68') and for sensing the separation of first and second channel reference marker images (66, 66') and having electronic circuitry (76) and processor (78), wherein by comparison of these separations, may calculate an accurate angle of parallax of the target object of interest and provide the resultant information to the user via a display (80). The device includes a spatial referencing system (14) and therein, the device may automatically account for small misalignments of optical elements which may occur during normal use and in certain embodiments of the device may allow the user to isolate the target object of interest from other objects which may appear in the field of view. In certain embodiments, the device also has an optical switchable beamsplitter (70) which permits the user to see single unobstructed images of the target object of interest in a non-beamsplitting observation mode, or dual or split images of the target object of interest in a beamsplitting ranging mode. This optical switchable beamsplitter (70) also permits simultaneous sampling of the separate first and second channel target scene images (68, 68') on separate photodetectors (46) while in a non-beamsplitting mode, and also allows a method for referencing the relative positions of the separate photodetectors (46) while in a beamsplitting mode.

Coincidence type optical and electro-optical rangefinders derive target range by precisely measuring the angle of parallax subtended by the target of interest and the left and right hand entrance windows whose spacing determines the baselength of the rangefinder. This angle of parallax is measured when the target images formed from the target radiation entering the left and right hand entrance windows are aligned in coincidence within the users' eye, or measured on a photodetecting array. The angle of parallax may also be measured on a photodetecting array where the target images from the left and right hand entrance windows are not aligned into coincidence, but where their separation on a photodetecting array is precisely determined. The range of the target of interest will then be a function of the angle of parallax.
Coincidence type rangefinders have several advantages over other rangefinding methods and devices. Coincidence type optical rangefinders do not require retro-reflective mirrors or prisms, nor do they require a rod person or rod positioned at the location of the target of interest. Coincidence type rangefinders do not emit any potentially eye damaging radiation, or require significant electrical power as do some laser rangefinders.
However, since coincidence type optical rangefinders measure very precise angles of parallax, they may easily lose correct calibration for range if subjected to vibration, shock, or thermal expansion or contraction of optical or mechanical components. Any displacement of optical elements within the rangefinder can adversely affect ranging accuracy unless precautions have been made in the rangefinder design itself to minimize or eliminate these sources of error.
In the very early optical rangefinders, pentaprisms were used as first reflecting surfaces which, when used in a collimated stream of light, are insensitive to rotations about the normal axis. Canadian Patent No. 549,248 to Malinowski (1957) provides one example of a rangefinder utilizing two pentaprisms. The use of pentaprisms will reduce the loss of range calibration caused by certain displacements of the pentaprisms, but are ineffectual at reducing or eliminating loss of range calibration caused by slight displacement of other optical or mechanical components of the system. As such, even where pentaprisms are utilized in optical rangefinders, the devices must be re-calibrated regularly for range to insure reliable measurements. One distinct disadvantage to the use of pentaprisms within optical rangefinders is that they are massive compared with single prism or mirror reflectors of similar aperture.
Many previous designs of optical rangefinders utilize a light compensator to align the target images formed from left and right hand entrance windows within the user's eye. The light compensator consists of a glass wedge or wedges, or a mirror or prism reflector which, when adjusted, will vary the lateral angle of light in the left or right hand channels of the rangefinder. The closer the target of interest to the observer, the more the light compensator will need to be adjusted to align the target images. The degree of adjustment required is then a function of the angle of parallax of the target and the target range is, in turn, a function of the angle of parallax. The degree of adjustment of the light compensator is often measured by mechanically coupling the light compensator to a scale from which range may be read, or to a position sensor which derives data for the calculation and display of target range. An example of the latter may be found in U.S. patent #3,499,711 to Argyle (1970).
This mechanical coupling of the light compensator to a scale or position sensor can be a significant source of ranging errors. Deformation of mechanical parts associated with this coupling can contribute to ranging inaccuracies. These deformations may be caused by mechanical shock, wear, or thermal expansion or contraction of the coupling mechanism. Frequent range recalibration may temporarily correct the resultant ranging inaccuracies caused by some of these deformations, however if wear of mechanical components introduces backlash or separations, it will not be possible to correct by recalibration. For many optical rangefinders, range recalibration is an exacting and time consuming procedure requiring optimal conditions of visibility which may not exist at the required time.
Further examples of optical rangefinders which are susceptible to errors of this nature are described in patents such as U.S. Pat. No. 3,459,478 entitled, "Stadiametric Rangefinder Including a Transversely Movable Lens" to Marasco et alis, (1969), and in U.S. Pat. No. 4,886,346 entitled "Range-Finding Binocular", to Monroe, (1989).
Most prior art coincidence optical rangefinders depend on the resolving abilities of the human eye to align images to coincidence. Target selection however is a coordinated effort by both the human eye and brain. Therefore, prior art coincidence type optical rangefinders which alternatively utilize photodetector arrays to assist in the alignment of target images are ineffective where objects of different ranges than the target object of interest form images on the photodetector arrays. In this case, the photodetecting system does not have the benefit of the human brain to ignore targets in the fore or background which are not the target of interest. As a result, where this situation occurs, coincidence optical rangefinders using only photodetectors for target image detection cannot isolate the target of interest and will either not be capable of providing range information or the information will be erroneous. U.S. Pat. No. 3,663,105 to Anderson (1972), describes an electro-optical rangefinder using photodetectors which would be susceptible to this problem.
Additionally, coincidence optical rangefinders using photodetectors for target image detection may encounter light conditions which are lower than the dynamic range of the photodetecting components employed. Rangefinders of this type will therefore be non-functional under these conditions unless provided with a fall-back-to-visual alignment mode, whereby the human eye, which has a wide dynamic range, is employed for image detection and alignment. Prior art rangefinders which are strictly electro-optical in design and offer no fall-back-to-visual image alignment mode are described in articles such as one entitled, "Passive Stereoscopic Rangefinder", British Aerospace, Dynamics Group Bristol (1983), or as applied to auto-focus ranging systems such as described in U.S. Pat. No. 4,835,561 entitled, "Focus Detecting Device for Camera", to Matsui (1989), and in U.S. Pat. No. 4,831,405 entitled, "Auto-focus Arithmetic Device", to Hata et alis, (1989).
Attempts have also been made to design optical rangefinders using illuminated reference markers for measuring and correcting for mechanical aberrations. U.S. Pat. No. 4,071,772 to Leitz et alis (1978) describes such a apparatus utilizing spatial frequency filters which comprise a measurement structure such as an optical grating on which are produced the target object images. Light fluxes obtained from the interaction of the images with the measurement structure when there is a relative motion between this structure and the images are converted by means of a photo-electric receiver system.
As the measurement structure is oscillated back and forth in either the reference marker images, or the target scene images, the light intensity registered by the photodetectors will vary in time with the motion of the measurement structure or optical grating.
In the device which is the subject of the present invention, a fundamentally different system is used to measure the separation of either the reference marker images, or the target scene images. In the present invention, the separation of either the reference marker images, or the target scene images is measured directly, independent of any measurement structure or optical grating. In the most simple form of the present invention, the human eye is used to align the target scene images, and a single photodetector is used to sense the separation of the reference marker images and thereby determine the target angle of parallax.
One method for directly measuring the separation of either the reference marker images, or the target scene images is to convert the images directly into electrical signals, and then by computational cross-correlation, determine the degree of image separation.
Another fundamental difference between the present invention, and the Leitz invention, is that the present invention uses a channel merging/splitting means to split each of the reference markers, and direct both reference marker beams onto a minimum of one photodetector. In contrast, the Leitz invention uses two reflecting faces which do not merge the reference marker beams into a single beam, and therefore requires separate pathways for each marker beam to a minimum of two photodetectors. More important in terms of utility, is that as a channel merging/splitting means is not fundamental to the Leitz invention, a means for providing dual images of the target to the user's eye is not inherent to the design. Therefore a visual fall back mode is absent, and no means is provided where should target scene conditions, or light levels fall below the requirements of the photodetectors, the human eye may be used to align the target scene images into coincidence. Additionally, as no dual images are provided to the user's eye, in situations where additional targets other than the target of interest are imaged onto the measurement structure of the Leitz invention, erroneous range measurements may result should the additional target be located at ranges different from that of the target of interest. Additionally, the present invention allows, in an embodiment with dual photodetector arrays, for the two photodetector arrays to be referenced one to another allowing for minor shifts in the position of the photodetectors to be accounted for. This is only possible because the reference marker beams are split. Leitz does not disclose any splitting of the reference markers and thus cannot reference the photodetectors one to the other.
The primary advantages therefore of the present invention over the Leitz invention are: utility; as a fall-back-to-visual mode is incorporated into embodiments of the present invention, reliability; as no oscillating mechanical structure is required which may be subject to friction and wear, dependability; as the user may isolate the target of interest from other targets by initially visually a aligning the target of interest, and finally flexibility; as the most basic embodiment may be adapted to rangefinders which use visual alignment of the target scene images, as well as to rangefinders which use other photodetectors for sensing the alignment of the target scene images.
Finally, conventional coincidence type optical rangefinders provide permanent dual or split images of the target scene to the eye of the user. These dual or split images may be annoying if it is desirable to use the device simply for observation. Such is the obvious case for binocular embodiments of coincidence type optical rangefinders.

Method and apparatus for self-correcting, direct sensing coincidence sensor for optical rangefinders


In some embodiments, an apparatus comprises: a stage moveable on first and second axes; a material removal tool moveable on a third axis; a linear slide and a guide parallel to the third axis; a mount for an imaging device coupled to the linear slide using carriages; an armature coupled to the material removal tool and the guide that moves the guide along the third axis with the tool; a locking device for fixing the mount along the guide; and a processor that: (a) move a sample to a material removal position; (b) cause the tool to remove a first thickness of the sample along the third axis; (c) move the sample to an imaging position located at a predetermined location with respect to the mounting block; and repeating (a) through (c) until a second thickness of the sample has been removed.

Scientists and others are often interested in determining features of a sample of material that are inaccessible by merely examining the surface of the sample. For example, a sample may contain: fossils, mineral deposits, fracturing, vesicles and/or other microscopic and macroscopic features that a scientist may be interested in observing in greater detail. For example, a scientist may be interested, in the three-dimensional structure or a three-dimensional spatial distribution of features of the sample. There are generally non-destructive and destructive techniques for examining otherwise inaccessible features of a sample. For example, non-destructive techniques can include X-ray imaging such as X-ray computed tomography (CT) and X-ray microscopy techniques that can be used to determine some interior features of samples. However, these techniques are generally limited in their ability to differentiate between objects of similar density and/or similar mineralogy, among other shortcomings.
Destructive techniques, on the other hand, are often time consuming and imprecise when performed manually, or limited to examining only a limited field of view of microstructure in a sample when performed automatically.
Accordingly, new apparatuses and methods for serial sectioning are desirable.

Apparatuses and methods for serial sectioning and imaging


A system and method of optically routing wavelength channels from within a plurality of optical inputs to any of a plurality of optical outputs. An optical wavelength-selective cross connect (WSXC) switch is described with a first stage of wavelength division multiplexing (WDM) routers which support an optical input and a plurality of optical outputs, which are interconnected to a second stage of WDM routers having a plurality of optical inputs and an optical output. The wavelength channel is routed in two stages from one of the input stage routers to an output stage router for output. It should be appreciated that the WSXC switch of the invention can be utilized for passing optical signals in either direction. In a preferred implementation integrated circuit router chips are stacked into cubes to form the routers stages which are cross coupled using a twisted butt joint to form a WSXC switch.

1. Field of the Invention
This invention pertains generally to optical switching systems, and more particularly to an optical wavelength channel cross-connect switch.
2. Description of Related Art
Wavelength-division multiplexing (WDM) is an important technology for providing high speed optical communications. Wavelength-division multiplexing (WDM) is an approach that exploits the huge bandwidth of optical transmission by multiplexing a number of discrete frequencies over the same optical link. The optical transmission spectrum under WDM is carved up into a number of discrete non-overlapping wavelength (or frequency) bands. Each wavelength supports a single communication channel, which may be further divided, such as by time multiplexing to support the transmission of a number of data streams on the channel.
The progress of optical WDM networks has been rapid and all-optical cross-connect switching systems have been implemented which allow any wavelength channel on a group of input fibers to be routed to any channel on a group of output fibers. For example, consider the case of eight optical fiber inputs and eight optical fiber outputs, with each fiber supporting one hundred wavelength channels. Using an optical wavelength-selective cross connect (WSXC) up to eight hundred channels are cross connected for output on the eight output fibers.
One form of all-optical wavelength-selective cross connect (WSXC) employs two-dimensional arrays of two-axis beam steering mirrors. These so-called 3D mirror arrays are typically fabricated utilizing micro-electromechanical systems (MEMS) techniques. The mirror arrays route a signal from a particular optical input to a desired optical output as selected on a two-dimensional grid. These cross-connect switches have a complicated structure requiring sophisticated control electronics, and they suffer from high power consumption.
Another approach to creating an all-optical cross-connect switch is based on demultiplexing the input, then using a cross-connect switch for each wavelength, after which the wavelengths are multiplexed back onto the output fibers. The approach is shown in FIG. 1, with wavelengths from a set of input fibers being separated into individual wavelength bands with a demultiplexer. A switching function is then performed on the individual wavelengths wherein an N×N switching matrix (8×8) is utilized to route signals to different multiplexers for combining the wavelengths into the set of output fibers. To support a configuration having eight input and output fibers, each supporting one hundred wavelengths, a total of 16 wavelength division multiplexers/demultiplexers are required, with 100 8×8 switches (one for each wavelength) along with 1600 fiber interconnections. It can be seen that wavelength selective cross-connects as currently embodied are complex and expensive to implement.
Therefore, a need exists for an all-optical cross-connect switch that allows cross connecting any of a plurality of wavelength channels from a group of optical fiber inputs to a group of optical fiber outputs. The present invention satisfies those needs, as well as others, and overcomes the deficiencies of previously developed wavelength selective optical cross-connect systems.

Compact wavelength-selective optical crossconnect

The Regents of the University of California


The present invention contemplates an improved multiplier circuit and method for reducing power consumption by reducing the number of transitions to the input of the multiplier. Each input to the multiplier is fixed for as long as possible by reordering the sequence of the multiplications to take advantage of duplicate input values. The intermediate results of each multiplication are stored in separate accumulators to obtain the final resultants. Power consumption is further reduced through a reduction in the number of transitions on the data bus linking the multiplier and the data register file containing the accumulators.

In recent years, the demand for mobile or portable electronic devices of all sorts has grown tremendously. Because of advances in microelectronic circuitry sizes and battery technology, portable applications have grown from conventional low performance products such as wrist watches and calculators to high performance products such as notebook computers, personal digital assistants, camcorders and cellular telephones. The versatile functionality of high performance portable devices typically requires high computation speeds, however with low power consumption.
Reducing power consumption in portable devices translates directly into longer operational time while decreasing the size and weight of the batteries. In addition, reducing power consumption also means reduced heat in the integrated circuitry. For both portable and non-portable devices, reduced heat allows for more transistors to be integrated into a single chip or on a multichip module. This allows increased functionability in a smaller package, which is particularly important in voice/video communications and multimedia applications. Moreover, reduced circuit heat allows for the use of less expensive packaging technology without suffering reliability. As can be appreciated, cost reduction is another important consideration in portable devices.
System designers of portable devices are increasingly using digital signal processors ("DSP"s) because of the DSP's ability to quickly process large amounts of "real world" numerical data. A DSP processes "real world" signals such as voice, image and video signals by converting these analog signals into their digital equivalents at discrete time intervals for processing in the digital domain. The result is an array of numerical values stored in memory, which can be repetitively processed at high speeds.
To reduce the power consumption of the DSP, many system designs have produced low-voltage versions and/or have added power management features to provide greater control over a processor's power consumption. Power management features available on some DSPs include:
Reduced voltage operation. Several DSPs are designed to operate on 3.3 volts. Some DSPs can operate at 3.0 volts as well.
"Sleep" or "idle" modes. Many DSPs provide power-down modes that turn off the clock to certain sections of the processor, reducing power consumption.
Programmable clock dividers. Some newer DSPs allow the processor's clock frequency to be varied under software control. System designers can use the minimum clock speed required for a particular task.
Peripheral control. Some DSPs allow the programmer to disable peripherals that are not in use.
Going a step further, system designers have attempted to reduce the number of process steps taken to complete certain functions within the DSP in order to save power. A lot of attention has been focused on the multiplier function of the DSP, because of the proportionately large amount of power consumed by the multiplier. For example, Booth encoding techniques are widely used to reduce the number of partial product addition steps in parallel and array multipliers. Adding delay circuits and flip-flops to reduce spurious transactions in the multiplier array have also been practiced.
However, the above stated methods assume that the switching activities at the multiplier inputs are given, and seek to minimize the internal switching activities based on this assumption. Accordingly, what is needed is method to reduce the power consumed by a DSP multiplier circuit that takes advantage of the power savings achieved through control of the operands provided to the multiplier inputs.
It is, therefore, an object of present invention to provide a multiplier circuit and method for reducing the power consumption of a DSP.
It is another object of the present invention to provide a multiplier circuit and method for reducing the heat dissipation of a DSP to increase its reliability and reduce integrated circuit packaging costs.
It is still another object of the present invention to accomplish to above-stated objects by utilizing a multiplier circuit and method which is simple in design and use, and economical to perform.
The foregoing objects and advantages of the invention are illustrative of those which can be achieved by the present invention and are not intended to be exhaustive or limiting of the possible advantages which can be realized. Thus, these and other objects and advantages of the invention will be apparent from the description herein or can be learned from practicing the invention, both as embodied herein or as modified in view of any variation which may be apparent to those skilled in the art. Accordingly, the present invention resides in the novel methods, arrangements, combinations and improvements herein shown and described.

Method and apparatus for reducing the power consumption in a programmable digital signal processor


A method of hosting a single page application incudes hosting, at an application programming interface (API) module of a server, the single page application as a first API operation by providing code to a client device to enable rendering of a page at the client device as a user interface presentation.

Application programming interfaces (APIs) can be used to enable server-side messaging for communication between a client device and a backend service. Experienced users and programmers can communicate with a backend service, such as a database, using API call instructions and other API-specific requests. However, an inexperienced user may struggle to successfully communicate using the API. As a result, the inexperienced user may become frustrated and may not be able to communicate with the backend service through the API. In some situations, specialized software may be developed to assist the inexperienced user. However, development of the specialized software can be inefficient due to the countless variations of API configurations.

Application programming interface for web page and visualization generation


To facilitate authentication over a wireless access network, it is proposed to provide a hub device having an authentication storage means (i.e. a (U)SIM) to which one or more machine devices are connected. Each machine devices connects to a wireless access network and in order to authenticate with that network requests authentication information from the hub device. The core network of the wireless access network, authenticates each machine device and provides the machine devices with parallel access to the access network in accordance with authentication information obtained from the hub device. The authentication information is unique to the respective machine device but also associated with information stored on the authentication storage means of the hub device.

As a consequence of the decreasing costs of wireless telecommunications apparatus, tighter safety and climate regulation and vigorous market competition, an ever increasing number of devices ("machines") are being provided with wireless telecommunications apparatus to facilitate additional information services. A particular driving factor in this trend has been the provision of wireless services to so-called machine to machine (M2M) solutions.
The term "M2M" has been used to describe applications in such diverse fields as: tracking and tracing; payment; remote maintenance; automotive and electronic toll; metering; and consumer devices. The augmentation of M2M to allow wireless communications between devices (often referred to as mobile M2M) makes new services possible in some cases (within the automotive industry, for instance) and in others extends existing M2M services (within the field of smart metering).
With mobile M2M, machines numbering in the order of millions and located anywhere within mobile network coverage, can be simultaneously monitored to provide real-time information that an individual or enterprise can analyze and act upon.
It is predicted that large numbers of "machines" will require access to wide-area mobile networks (such as the GSM, GPRS and/or 3G cellular networks). Each of these machines may only require authentication very occasionally but may have all the basic equipment to allow connection to at least one access network when that is required. However, just requiring that each device be allowed to authenticate itself to the network from time to time, may undermine the benefits of certain mobile M2M services (particularly those services that are predicated on a low cost machine/service).
Consider the implications of providing all such devices with a separate, provisioned SIM card. For each SIM card, the network operator must create a corresponding subscription and "provision" the SIM with a valid MSISDN corresponding to that subscription (i.e. a telephone number), both for the reservation of the MSISDN (regulators such as the ITU assign ranges of MSISDN numbers to operating companies) and overheads in registering the selected number for use with a given access network.
Where that SIM appears no longer (or never to have been) used for a predetermined period, the network operators typically note this fact and initiate a "quarantine" process for returning the telephone number to the set of available numbers. Of course, this quarantining process has an associated cost: so too does reassigning that MSISDN number as ultimately will happen when it is confirmed unused after the quarantine period expires.
As the reader will readily appreciate, the provisioning of SIMs that are infrequently or never used represents a distinct inconvenience to the network operator. While this inconvenience is significant when considering the conventional provision of mobile telephones and data card/modems with SIMs, SIM-enablement of "machines" present additional problems simply by virtue of the number of these devices and their typical (low and sporadic) frequency of use. M2M applications are expected to increase significantly the number of unused or infrequently used SIMs and to cause a consequently greater level of disruption to the network operator who wishes to enable such devices. All the additional costs in terms of provisioning, quarantining (or keeping minimally active) etc of such machines can be relatively expensive and when compared with the potential market for the mobile M2M service may be found incompatible with low cost services.
Alternatively devices could have a "soft SIM" (a SIM module in software or firmware) instead, but this has major security issues, and there is still significant cost to the network operator (requiring heavy usage of the core network components in particular the home location register (HLR) and the authentication centre (AuC)) and arranging provisioning/creating subscriptions.
In a further alternative, it would be possible for devices to have some other form of authentication technology. However such a solution would require major network re-design, and could potentially prevents connection onto existing 3G and GSM networks.
It is therefore an object of the invention to obviate or at least mitigate the aforementioned problems.
In accordance with one aspect of the present invention, there is provided a system for facilitating authentication over a wireless access network, the system comprising:
a hub device having an authentication storage means, which is operable to provide authentication information during an authentication process;
at least one machine device being operable to connect to the wireless access network and having a communication interface with the hub device, through which a request for authentication information is made; and
a core network, which is operable to authenticate each machine device and provide said machine devices with parallel access to one or more access networks in accordance with authentication information obtained from the hub device.
It is preferred that a plurality of machine devices are provided with parallel access and the authentication information obtained from the hub device for each machine device includes a corresponding temporary identifier (such as the TMSI for UTRAN or GUTI for LTE) and a distinct key association (e.g. in LTE, K_ASME), each corresponding temporary identifier being related to a permanent identifier (e.g. an IMSI) associated with the hub device.

Authentication in a wireless telecommunications network


The present invention relates to methods for the global and detail routing of integrated circuits with hierarchical interconnect routing architecture. The methods includes the steps of: mapping routing resources of said integrated circuit to the nodes and edges of a graph theoretic tree, mapping each target to a target node; mapping each driver to a driver node; and routing each driver and its targets as a function of the minimum spanning tree spanning each driver node and its target nodes by traversing from the target nodes of a driver backwards toward its driver node in said tree. The methods of this invention are straightforward to implement, of polynomial time complexity, and can optimize routing resource usage.

Integrated circuits for devices such as field programmable gate arrays comprise of logic and other functional cells that can be interconnected with each other and to the inputs (targets) and outputs (drivers) allowing for the transmission of signals within the integrated circuit. Interconnect resources or interconnects can be wires or other channels designed for carrying signals. They can also be multiplexers. A multiplexer is a switch that allows one to choose among a variety of detailed point to point signal routing paths, much like a tracked switch on a section of a railroad. Multiplexers are typically connected to the logic and functional cells and other multiplexers by other interconnects such as wires and vias.
Each driver in an integrated circuit can be designed to be connected to a set of one or more targets via logic or functional cells to form a signal net in order to implement a specific logic or function. Signal routing, or global routing, is the patterning or programming of interconnects of integrated circuits to connect each driver of an integrated circuit with its particular set of targets to form a signal net for each driver.
Traditionally, interconnect architectures for routing, also referred to herein as Interconnect Routing Architectures (IRAs), are the structures of the interconnect system for routing on an integrated circuit. They are often in the form of a mesh. "Flexibility of Interconnection Structures for Field Programmable Gate Arrays", J. Rose and S. Brown, IEEE Journal of Solid-State Circuits. vol. 26, no. 3, Mar. 1991. Hierarchical interconnect architectures for routing, also referred to herein as Hierarchical Interconnect Routing Architectures (HIRAs), are interconnect structures for routing where the interconnect resources for routing, i.e., routing resources, can be mapped into a graph theoretic tree, also referred to herein as a tree. United States patent application, Hierarchical Multiplexer-Based Integrated Circuit Interconnect Architecture for Scalability and Automatic Generation," having a U.S. Pat. No. 6,801,052 B2, is a HIRA where the routing resources and the core cells are placed hierarchically in a plurality of levels in the form of a tree. HIRAs provide predictable routing delay between adjacent levels of the hierarchy, have high scalability, and allow for high resource utilization.
Existing methods for the global routing of ERAs convert the routing resources to a graph consisting of a finite set of nodes together with a finite set of edges, each of which connects a pair of nodes. The classic expansion or "maze" routing methods are routing methods with algorithms that expand outwards from a driver to explore and locate all possible paths or routings to its set of targets, similar to the exploration of all possible paths in a maze. However, the complexity of these routing methods are non-polynomial (NP) hard, i.e., the work needed to find an optimal solutions increase exponentially with the number of nodes and edges in the graph. As a consequence, approximate solution methods have to be used. These methods tend to lead to suboptimal routing resource usage, either due to excess wire lengths required to route or the unnecessary branching of the routes.
Another method for routing in an IRA involves the solving of a Minimal Spanning Tree (MST) Problem for each net, i.e., for each driver and its targets. From the standpoint of resource usage, this method is attractive as it is often superior to the simple maze expansion methods as its run-time is merely polynomial. However, this method still leads to suboptimal resource usage. In IRAs that can only be mapped to a graph and not to a tree, the solving of a straight forward Minimal Spanning Tree problem does not account for that fact that most IRAs allow for branch nodes. Optimal routing for any signal net is only achieved by the optimal placement of these branch nodes. In the worse case scenario, this process is NP complete, i.e., it may require an exponential run-time. Moreover, where there are multiple nets competing for a common set of routing resources, routing congestion, i.e., the lack of sufficient routing resources that can be assigned, is often encountered, especially with routing methods where routing resource usage are suboptimal.
More advanced routing methods typically involve solving, either exactly or approximately, a Graph Steiner Minimal Tree problem. These problems are NP-hard. A provable optimal solution requires exponentially large computational time to find. Therefore, finding optimal solutions becomes intractable, except for all but very small IRAs. Approximate solutions that can be found in polynomial time are non-optimal.
As a result of routing resource constraints related to the size and power consumption of an integrated circuit, the general problem of signal routing is NP "hard" or NP complete, i.e., non-deterministic polynomial complete. The difficulty of finding a globally optimal solution can increase exponentially with the size of the routing problem, a function of the size of the IRA and the number of signal nets and the quantity of available routing resources. "New Performance-Driven FPGA Routing Algorithms", M. J. Alexander and G. Robins, http://www.cs.virginia.edu/˜robins/FPGA/DAC 95 Paier.html.
Due to the limitations of the prior art, it is therefore desirable to have novel methods for routing with run-time that is polynomial and not NP hard and where routing resource usage is optimal.

Reverse routing methods for integrated circuits having a hierarchical interconnect architecture


In an embodiment, a hybrid storage array one uses two or more storage device tiers provided by solid state drives (SSDs) and hard disk drives (HDDs). Random writes are collected and written to a write cache extension, such as a portion of the SSD storage tier. The write cache extension absorbs such accesses that would otherwise be written to HDD storage directly. Data structures are created in a cache memory local to an array controller representing the location on the write cache extension to which the writes were committed and a location in the storage system where they were originally intended to go. The write cache extension can be enabled all of the time, or only when the array controller write cache experiences certain operating conditions, such as when its utilization exceeds a predetermined amount. The approach improves the overall performance of the hybrid array.

1. Field of the Disclosure
This disclosure relates generally to information handling systems and devices, and more particularly to hybrid storage arrays.
2. Description of the Related Art
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option is an information handling system. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes. Because technology and information handling needs and requirements can vary between different applications, information handling systems can also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information can be processed, stored, or communicated. These variations allow information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems can include a variety of hardware and software components that can be configured to process, store, and communicate information and can include one or more computer systems, data storage systems, and networking systems.
One type of information handling system is a storage array. A storage array typically includes multiple disk drives or similar persistent, inexpensive storage units. A storage array can allow large amounts of data to be stored in an efficient manner while providing redundancy to promote reliability such as Redundant Array of Inexpensive Disks (RAID) functionality.
In addition to the disk drives or other persistent storage units, a storage array commonly also includes one or more array controllers (typically taking the physical form of one or more integrated circuits or circuit boards), and interface circuits to connect the storage array to an external host. The host may be a personal computer, a network server or some other information handling system. The controller includes one or more processors or similar hardwired logic that causes the storage array to read or write data to or from its persistent storage in response to requests received from the host. The controller also commonly includes memory that acts as a buffer or temporary storage for data being transferred to and from persistent storage.
Hybrid-based storage solutions combine multiple storage technologies, such as Solid State Drives (SSDs) and Hard Disk Drives (HDDs) in the same storage array. Hybrid storage arrays are a particularly attractive solution for large volume applications such as data centers and cloud computing where high performance and low cost are each of importance. These high performance hybrid arrays can combine intelligent caching software with low cost HDDs (such as Serial ATA (SATA) drives or faster Small Computer System Interface (SCSI) drives), and/or high-performance energy-efficient SSDs. The hybrid approach combines the scalability and relative affordability of HDD technology with the low-latency I/O performance and energy efficiency of SSDs.
Hybrid storage arrays are typically managed by a cache-pool-aware storage controller which uses various techniques to determine how to most efficiently provision the data between the HDD and SSD devices. For example, write data blocks may be addressed by an application software program to a primary rotating medium such as the HDDs. Intelligent SSD caching software analyzes patterns in these application I/O requests and builds access tables. The caching software uses these access tables to move the more frequently accessed data blocks from the HDD to the SSD tier so that faster retrieval is possible during future requests for the same data blocks. The intelligent caching software can also transparently execute writes directly to the low latency SSD media so that high frequency writes can be quickly acknowledged back to the application. Data written this way to the SDDs is then pushed as a background task to the HDDs when access to it becomes less frequent.
In addition, these hybrid storage arrays can also provide other services such as RAID, load balancing, encryption, and management functions while further isolating the application from the underlying hardware.

This patent is subject to a terminal disclaimer.

Write spike performance enhancement in hybrid storage systems