A low cost method for fabricating microneedles is provided. According to one embodiment, the fabrication method includes the steps of: providing a substrate; forming a metal-containing seed layer on the top surface of the substrate; forming a nonconductive pattern on a portion of the seed layer; plating a first metal on the seed layer and over the edge of the nonconductive pattern to create a micromold with an opening that exposes a portion of the nonconductive pattern, the opening having a tapered sidewall surface; plating a second metal onto the micromold to form a microneedle in the opening; separating the micromold with the microneedle formed therein from the seed layer and the nonconductive pattern; and selectively etching the micromold so as to release the microneedle.

In the medical field, hollow microneedles have been developed for delivering drugs or withdrawal of bodily fluids across biological barriers, such as skin. A microneedle is a miniature needle with a penetration depth of about 50–150 μm. The microneedle is designed to penetrate the skin but not hit the nerves. An array of microneedles may be combined with an analyte measurement system to provide a minimally invasive fluid retrieval and analyte sensing system. In other fields, solid mironeedles are desirable as probles to sense electrical signals or to apply stimulation electrical signals, and hollow microneedles are useful as means for dispensing small volume of materials.
Methods for fabricating microneedles from silicon have been proposed. However, silicon microneedles require expensive processing steps. Furthermore, silicon is highly brittle and susceptible to fracturing during penetration. Alternatively, microneedles may be made from stainless steel and other metals. However, metal microneedles are subject to several disadvantages, one of which is the manufacturing complexities involved in metal processing steps such as grinding, deburring and cleaning. Therefore, there exists a need for a method of fabricating metal microneedles that is relatively simple and inexpensive.

Hewlett-Packard Development Company, L.P.


A ground-based computing system receives data of performance parameters for like components disposed on like aircraft, and determines corresponding levels of degradation and rates of change of degradation for the respective like components. A fleet-level of degradation for groups of like components is generated based on analysis of the combined degradations of the like components in the respective group. At least one of a remaining useful lifetime (RUL) and a state-of-health (SOH) for each of the respective like components is determined based on a comparison of the levels of degradation for each of the like components and the fleet-level of degradation of the group of like components. A predicted time for maintenance for each like component is determined based on the corresponding at least one of the RUL and SOH of the like component, thereby enabling cost effective maintenance determinations for components based on a fleet-level information.

Maintenance of complex systems, such as vehicles, aircraft, spacecraft and other systems, represents a significant cost of operation. Maintenance of such systems is typically done on a predetermined schedule (periodic time based) for the various components of the system. The schedule may be solely time-based, e.g. every three months, or maybe based on a combination of time, usage, and reliability metrics, e.g. every three months or 1000 hours of operation determined by mean-time-between-failure (MTBF) component reliability calculations. The amount of time and usage are typically based on the performance history of the same or similar components as utilized in a similar operational environment. Scheduled maintenance based entirely on such reliability metrics has been shown to be less than optimal in numerous commercial and department of defense systems. The Office of the Secretary of Defense (OSD) issued a directive 4151.22 (mandate) that all systems will follow Condition Based Maintenance Plus (CBM+) processes by the year 2032. CBM+ processes provide for maintenance to be scheduled based on the condition of the component and no longer on predetermined time-based and usage-based maintenance. However, compliance with the CBM+ requirements has presented significant challenges.
Although such predetermined scheduled maintenance of components has been satisfactory in some environments, this type of maintenance has not performed as well for some equipment/vehicles in other environments. Predetermined scheduled maintenance has proved to be costly and the cause for delays in vehicle availability due to unnecessary maintenance that may result in inadvertent mishaps by taking parts out for testing and replacing them. For example, consider a jet aircraft. The same type of jet aircraft may be utilized in a variety of extremely different environmental conditions, e.g. a desert with widely varying temperatures and blowing sand versus a temperate latitude with only minor airborne dust. Additionally, if the same aircraft is in operation under the same external environmental conditions, different pilots, especially military pilots, may choose to fly the same aircraft in substantially different ways causing different load variations on aircraft structures. Also, different missions will pose differing levels of stress on the components of the aircraft. Hence, predetermined scheduled maintenance for components may result in not performing needed maintenance due to more than anticipated stress or may result in performing unneeded maintenance due to a significantly lower level of stress than anticipated. Reliable prognostics for the improved timing of maintenance for components of vehicles will provide a more cost-effective solution as well as increasing the operational availability of an aircraft/system avoiding unneeded maintenance, and better utilization of the maintenance workforce. Performing maintenance only when actually needed is even more critical where a fleet of like aircraft have to be maintained. Therefore, there exists a need for a more accurate prediction of maintenance of components in a fleet of like type aircraft so that metrics of component performance across multiple like aircraft for the same component can be utilized to improve on-board testing criteria for the component as well as making fleet-wide concurrent maintenance determinations for like components.

Fleet level prognostics for improved maintenance of vehicles


A reproduction-only optical disc has a lead-in area, a user data area, and a lead-out area. Disc related information recorded on at least one of the lead-in area and the lead-out area is recorded by high frequency groove wobbles, and data of the user data area is recorded by pits. Since the high-density reproduction-only optical disc uses the same channels for reproduction signals as a high-density recordable optical disc, the two types of discs are consistent with each other and are compatible with the same disc drives.

1. Field of the Invention
The present invention relates to a high-density reproduction-only optical disc in which reproduction-only data is formed by groove wobbles and user data is formed by pits and reproduced through a different channel than the reproduction-only data, and a method of recording and/or reproducing data on the disc.
2. Description of the Related Art
Generally, optical discs are information recording media used with optical pickup devices which record/reproduce information in a non-contact manner with respect to the optical discs. Optical discs are generally classified as compact discs (CDs) or digital versatile discs (DVDs) according to their storage capacity. Examples of types of optical discs capable of recording, erasing, and/or reproducing information include 650MB CD recordable (CD-R), CD-rewritable (CD-RW), 4.7 GB DVD+RW, DVD plus random access memory (DVD+RAM), and DVD-RW. 650MB CD and 4.7GB DVD-ROM are examples of reproduction-only discs. Furthermore, high-density optical discs (such as HD-DVDs) having a recording capacity of 20GB or more, have been developed.
Generally, disc related information (i.e., reproduction-only data) is recorded as pits in a lead-in area positioned at an inner portion of a conventional reproduction-only optical disc. However, in order to design a reproduction-only optical disc that is compatible with the same disc drives as will be used with the to-be-developed high-density recordable optical disc, the formats of both discs must be consistent. Thus, a physical data structure of the high density reproduction-only optical disc must conform to the same standards as the high-density recordable optical disc.

Reproduction-only optical disc and method of recording and/or reproducing data on and/or from the same


The density difference of particle beam irradiation with two optical statuses is produced utilizing a diffraction effect, within the same field of vision, such that a diffraction grating manufactured with a material which passes through a particle beam is provided on the upper side of a specimen and on the lower side of the irradiation optical system. Further, a region wider than the opening region of the diffraction grating is irradiated with the particle beam to produce the density difference of the particle beam emitted to the specimen, by superposing the particle beam, Bragg-diffracted with the opening region, and the particle beam, transmitted through the outer peripheral part of the opening region without being diffracted, with each other, and emitting the beam to the specimen.

A charged particle beam such as an electron beam or an ion beam, which is propagated in vacuum, has a short wavelength of several pm digits, and has a small deflection angle. Further, there is no effective beam splitter such as half-mirror used in the field of optics. Accordingly, it is difficult to form plural optical paths and configure respectively independent optical systems as in the case of Mach-Zehnder interferometer in an optical bench. Further, with a short-wavelength electromagnetic wave such as an ultraviolet ray or an X-ray, it is difficult to configure an effective optical element due to its good transparency. Further, in the case of a particle beam such as a neutron beam, a molecular beam, or a heavy particle beam, there is no optical element in the first place. Accordingly, a specimen is provided between a light source and a detector, and observation is performed only on a scattered or absorbed image in the specimen by path propagation, or on a diffraction pattern based on interference or diffraction effect. That is, in any of the above-described electromagnetic wave devices and particle beam devices, a one-path optical system is used. In the system, it is necessary to use the same lens and the same deflector or the like for the transmitted beam which has been transmitted through the specimen and the scattered or diffracted beam, and measurement methods to which the same optical conditions are applied are used.
Among the above-described devices, the development of an electron microscope using an electron beam is most advanced. Various optical elements such as an electron lens, a deflector, an electron beam biprism are realized. In principle, the electron beam is propagated in vacuum, therefore, the elements are merely configured such that a one-path optical system is formed in one vacuum-evacuated barrel. Even upon use of the electron beam biprism which is an only effective beam splitter in electron beam interference, it has a small deflection angle of 10−3 rad at most. The limitation that the same lens and the same deflector are used for two paths is not different from the other particle beam devices. Accordingly, it is difficult to produce density difference of electron beam irradiation within the same field of vision. It is difficult to observe specimen charging effect and specimen damage degree caused by electron beam irradiation, while simultaneously comparing and referring to two irradiation conditions, and especially, it is difficult to observe the progress of the change.
Although it is not a countermeasure against the above problem, as a Fourier transform holography, a non-patent literature 1 disclosing a technique of producing two irradiation conditions within one barrel, and a patent literature 1 disclosing a possibility of production of two X-ray irradiation conditions are known.
The non-patent literature 1 shows a technique of utilizing a back focal plane of an objective lens for an electron beam transmitted through a diffusing plate of an amorphous thin film as a specimen plane. The technique is utilizing a phenomenon that an electron beam transmitted without being scattered with the diffusing plate is formed in a spot on an optical axis, while an electron beam scattered at random with the amorphous film spreads in a plane on the back focal plane. The interference between the spot on the optical axis and the electron beam on the planate part is utilized. The patent literature 1 discloses utilizing a zone plate with a hole, in place of the diffusing plate in the non-patent literature 1. The focal point by the lens effect of the zone plate becomes a spot, and the X-ray transmitted through the hole becomes a plane wave. The both examples are not practical as a holography and not popular. Further, it is not possible to realize these techniques in a particle beam device without lens.
Further, the patent literatures 2 and 3 disclose providing an edge dislocation grating (fork grating) as a diffraction grating provided on the upper side of the specimen. According to the patent literature 2, only a diffracted electron beam, which has passed through the edge dislocation grating and has become a spiral wave in reciprocal space, is emitted to the specimen. An electron lens and a throttle hole are provided between the edge dislocation grating and the specimen, and the specimen is provided in the back focal position. It is impossible to realize this example in the case of a particle beam device without lens.

Particle beam device, observation method, and diffraction grating


The specification describes an integrated passive device (IPD) that is formed on a polysilicon substrate. A method for making the IPD is disclosed wherein the polysilicon substrate is produced starting with a single crystal handle wafer, depositing a thick substrate layer of polysilicon on one or both sides of the starting wafer, forming the IPD on one of the polysilicon substrate layers, and removing the handle wafer. In a preferred embodiment the single crystal silicon handle wafer is a silicon wafer rejected from a single crystal silicon wafer production line.

(Portions of the technical material contained in this section may not be prior art.)
State of the art radio frequency (RF) electrical circuits use large quantities of passive devices. Many of these circuits are used in hand held wireless products. Accordingly, miniaturization of passive devices and passive device circuits is an important goal in RF device technology.
Integration and miniaturization of passive devices on the scale of active silicon devices has not occurred for at least two reasons. One, typical passive devices to date employ different material technologies. But, more fundamentally, the size of many passive devices is a function of the frequency of the device, and thus is inherently relatively large. However, still, there is unrelenting pressure to produce more compact and area efficient IPDs.
Significant advances have been achieved. In may cases these involve surface mount technology (SMT). Small substrates containing large numbers of passive components are routinely produced using surface mount technology.
More recent advances in producing integrated passive device networks involve thin film technology where resistors capacitors and inductors are built as integrated thin film devices on a suitable substrate. See for example U.S. Pat. No. 6,388,290. This advance shows promise as the next generation of integration in passive device technology. However, just as the substrate material and character (pure single crystal silicon) have been key to the success in active device technology, it is becoming evident that the same is true as IPD integration develops. Because passive thin film devices are formed directly on the substrate, electrical interactions between the substrate and the passive devices are of major concern. And although suitable thin film technologies for producing the passive components are available, the ideal substrate for this technology has yet to be found.


Exemplary foam-at-a-distance systems, refill units and foam generators are disclosed herein. An exemplary foam generator includes a body having an inlet for receiving air and an inlet for receiving liquid. The foam generator includes a plurality of baffles located within the body. A plurality of elongated spaces are formed at least in part by the baffles. The elongated spaces have a length that is greater than a width.

Liquid dispenser systems, such as liquid soap and sanitizer dispensers, provide a user with an amount of liquid upon actuation of the dispenser. Counter mount systems often have an air pump and a liquid pump located under the counter and an outlet nozzle located above the counter. Many systems create foam below the counter and push the foam up though a dispense tube to the outlet nozzle located at the end of a spout. Pushing foam up the dispense tube requires a significant amount of energy which drains batteries. In addition, residual foam may break down in the dispense tube and thus, the next dose of soap may contain liquid or a poor quality foam. One solution is to push liquid and air up separate tubes and mix the liquid and air near the end of the spout. U.S. Pat. No. 7,819,289, which is incorporated herein in its entirety, discloses separate air and liquid pumps feeding separate tubes to a foam at a distance nozzle. U.S. Pat. Publication 2008/02372266, which is also incorporated herein in its entirety, discloses a refill unit having a combined air and liquid pump that uses separate liquid and air tubes to feed liquid and air to a foam-at-a-distance nozzle. Current foam-at-a-distance nozzles or foam generators utilize a mixing chamber to combine liquid and air and one or more screens for creating turbulence that causes the mixture to form a foam. Fluid tends to dry and build up on the openings in the screens, causing current foam-at-a distance nozzles to clog.

Foam-at-a-distance systems, foam generators and refill units


Coherent modulator architectures of wireless communication devices are used for the processing of modulated RF signals. The circuitry comprises a DC/DC converter (204) which serves as an amplitude modulator, different amplification stages (204, 206, 212, 214), a bypass path (215) to selectively bypass at least one (214) of a cascade of class C, D, E, or F power amplifiers (212, 214), and an automatic power control (APC) loop (220) that guarantees power stability over time and temperature variations. To increase the efficiency of the amplification procedures needed for an amplitude modulation, the slow (narrowband) high-level components (222) and the fast (wideband) low-level components (224) of the signal representing the magnitude (I xLp (t) 1) of an I/Q modulation state (xLp (t)) are amplified in separate stages (204, 206) and are then combined by supplying the low-level components (224) to a power amplifier (206) whose gain is controlled depending on the amplified high-level components (222). At least one (214) of said cascade of power amplifiers (212, 214) can selectively be bypassed by a bypass circuitry (215), which is used for the sake of efficiency optimization. In the bypass mode, the DC power supply (Vbat) of the bypassed power amplifier (214) can selectively be switched off by means of a switch (SZ). It is used when the needed RF signal power is low and the driver PA (212) is able to produce enough gain.

The underlying invention generally relates to the field of modulator architectures of digital communication devices which are used for the processing of modulated RF signals, especially to a power amplifier circuit of a transmitting block for controlling the output power of an RF signal to be transmitted.
The wireless communications area has experienced a remarkable growth, and, as a result, the demand for high-efficient power control circuitries applied to wireless communications devices has increased dramatically. Because in a portable wireless environment all circuits are drawing power from a small battery, one of the most important aspects of circuitdesign. is to optimize the power consumption. Additionally, as wireless communication devices must be realized as low-cost products, the cost of the applied circuits must be reduced as well.
The basic structure of a conventional wireless communication system consisting of a QAM transmitter and a QAM receiver, respectively, is depicted in FIGS. 1a+b. On the transmitter side 100a of the system, which is shown in FIG. 1a, the basic operations are as follows: The digital data is first encoded (ik, qk), and then, after being submitted to an digital-to-analog converter 102, the complex-valued orthogonal in-phase (I) and quadrature (Q) channels are combined by means of a quadrature modulator 104. The resulting signal combination is up-converted to the RF carrier frequency by means of an internal mixing stage. Then, after having passed a filtering stage, the RF signal drives a power amplifier 106, whose output signal x(t) is fed to a transmission (TX) antenna 108. The antenna radiates the signal into the air, and the transmission is complete. The receiver side 100b, which is depicted in FIG. 1b, is simply the inverse, although slightly different components have to be used. First, the received RF signal x(t) is filtered to select the RF band of interest. After that, it is fed to a low noise amplifier 112 (LNA). The signal is then usually filtered and either directly down-converted from the passband to the baseband (in case of a homodyne receiver) or mixed to one or more intermediate frequency (IF) stages (in case a heterodyne or super-heterodyne receiver is employed). Thereby, the final mixing stage separates the signal into its I and Q components. Once at baseband, the I and Q signals are submitted to an analog-to-digital (A/D) converter 120 before they are further processed.
The power amplifier (PA) is the component of the system that takes the signal to be transmitted and amplifies it to the necessary level needed to drive the antenna for a particular power output level. In most wireless communications systems, the PA is the largest power consumer, usually because the amount of power that needs to be sent to the antenna (the power output) is itself very large. This does not include the total power that is consumed within the PA, just the amount that is required to drive the antenna. The total power consumed by the PA is necessarily greater than the power output, as there will always be some power consumed in the active devices and the peripheral circuitry. Since the power output specification itself is often larger than the power consumption of the rest of the blocks in the RF system and the power consumption of such a PA will be higher than the specified power output, the PA is decidedly the major power consumer of the system.
The signal to be transmitted is often transmitted by applying the output of the PA to a load device, be it a real circuit element or an antenna or similar device. Because the levels of power required to reliably transmit the signal are often quite high, there is a lot of power consumed within the PA. In many wireless applications, the amount of power consumed by this amplifier is not critical; as long as the signal being transmitted is of adequate power, that is good enough. However, in a situation where there is only a limited amount of energy available, which is not sufficient for the transmission procedure, the power consumed by all devices must be minimized, so as to maximize the length of time for which that energy is available.
The number of different classes of power amplifiers which are used today is too numerous to be counted, and they range from entirely linear to entirely non-linear, as well as from quite simple to inordinately complex. In PA terminology, a "linear" power amplifier is one which has a linear relationship between its input and output. Although a PA may comprise transistors operating in a nonlinear fashion (e.g. in case a FET switches between cutoff and saturation), it can still be considered linear. While nonlinear PAs feature a comparatively high efficiency, their nonlinearity causes the output signal to spread (due to intermodulation products, especially if there is a lot of phase noise in the local oscillator which will cause spreading of the input to the PA).
A power amplifier can consist of several serial stages. Each stage is usually more powerful than the previous one. As most of the quiescent current is drawn by the high power stages, which are not required for the low output power levels needed for wireless communication, means for bypassing high power stages when they are not required can lead to a significant reduction of energy consumption.
Since wireless telephones operate on battery power, it is also desirable that their transmitters operate as efficiently as possible to conserve power and extend battery life. Ideally for W-CDMA systems, such as those governed by the UMTS standard, power amplifier stages should be capable of efficient, linear operation in their required dynamic range. However, the prior art has not yet come close to the ideal, and many wireless telephones are having poor power management now. During low power transmissions, power is wasted by cascaded amplifier stages that are not needed. Consequently, attempts have been made to bypass unused stages.
Under normal operating conditions, conventional wireless transceivers devices use an APC circuit to control the output power of their amplification stages. The APC circuit found in most RF transceivers has an external connection that is intended to be connected to a linear power amplifier. After having detected the power of the modulated RF signal at the output of the final power amplifier, said signal is converted to a DC voltage and fed back to a variable-gain intermediate frequency (IF) stage in order to keep the final output power constant over a long period of time. As the APC voltage generation is done very early, the gain drift, which is caused by thermal drift, operating voltage deviation, etc., is not compensated by the circuit. Another option is to derive the ALC voltage from the drive power of the final amplifier and feed it to the external APC input of the RF transceiver. The theory is that when the power amplifier becomes overdriven, it will produce a negative voltage that is fed back into the transceiver's APC circuitry. This voltage acts as a gain control in the transmit stages of the transceiver which, in turn, automatically lowers the drive power (the transceivers output power) and limits distortion from the overdriven amplifier.
FIG. 2a shows a schematic block diagram for a conventional automatic power control (APC) loop according to the state of the art, which is used for stabilizing the signal level at the output port of an analog circuitry realizing an RF signal generator. Thereby, said circuit can also be used for executing an amplitude modulation. It comprises an frequency synthesizing unit (FSU), a power divider (e.g. a directional coupler), which feeds the reflected wave of the modulated RF output signal to a wideband detector diode, and an amplification stage whose output signal is fed to an electronically controllable attenuator (e.g. an amplitude modulator stage realized by means of PIN diodes). In case said RF signal generator is used for sweep-frequency applications, an external detector is usually applied in order to keep the signal level at the input port of a tested RF unit constant. Thereby, it should be noted that the output impedance of the FSU is changed due to the APC loop.


Inner wire bond pads are formed within a peripheral region of a semiconductor chip and at least one bonding wire is attached to the inner wire bond pads. The semiconductor chip may be customized for a specific configuration of choice by wiring inner wire bond pads. Alternately, the bonding wires may be employed to reinforce a power network or a ground network. Further, the bonding wire may serve as a passive radio frequency (RF) component. In addition, the bonding wire may be used a heat conduction path to transfer heat from the semiconductor chip to the upper package housing.

Once fabrication of integrated circuit elements on a semiconductor substrate is completed, the semiconductor substrate is diced and packaged employing a wire bonding process. Typically, the semiconductor chip is manufactured with a passivation layer and package side bond pads, or simply "wire bond pads" on a top surface. The semiconductor chip is subsequently mounted on a chip package employing, for example, an adhesive such as an epoxy. Within the semiconductor chip, integrated circuit elements are electrically connected to the wire bond pads by interconnect structures in back-end-of line (BEOL) metallization levels. The wire bond pads are typically formed out of the last layer of metal among the back-end-of-line (BEOL) metallization levels. The wire bond pads are large enough to accommodate a ball. The wire bond pads provide structures for electrical connection between the fabricated integrated circuit elements and the chip package.
On the outside of the chip package, package pins that comprise a conductive material and arranged in a line or in a two-dimensional array are provided. Each of the package pins is electrically connected through the chip package to a package side bond pad located on the inside of the chip package. Wire bonding refers to the process of making interconnections between the wire bond pads and the package side bond pads so that the chip is electrically wired to the package pins as part of a semiconductor chip manufacturing sequence. Wire bonding is a cost-effective interconnect technology for chip packaging, and is widely practiced in the semiconductor industry.
Referring to FIG. 1, a top-down view of an exemplary prior art structure shows a semiconductor chip 10 after a wire bonding process. The exemplary prior art structure shows wire bond pads 20′ arranged in two rows along the periphery of the semiconductor chip 10. Typically, a bonding wire 30′ is connected to each of the wire bond pad 20′ via a ball bond 22′. The bonding wires 30′ typically comprise gold. The diameter of the bonding wires are from about 15 micron to several hundreds of microns. A wire bonding process employing a ball bond 22′ is called "ball bonding." The bonding wires 30′ are welded to the ball bond 22′ by a combination of heat, pressure, and/or ultrasonic energy.
Referring to FIG. 2, a vertical cross-sectional view of another exemplary prior art structure comprises a semiconductor chip 10 mounted on a lower package housing 80 by an adhesive layer 12, which may comprise an epoxy. Package side bond pads 70 are located on the inside of the lower package housing 80, and package pins 74 are located on the outside of the lower package housing 80. Each of the package pins 74 is connected to one of the package side bond pads 70 through the lower package housing 80. One end of each of the bonding wires 30′ is connected to one of the wire bond pads 20′ through one of the ball bonds 22′ as described above. The other end of each of the bonding wires 30′ is connected to one of the package side bond pads 70 through a wedge bond 72, which tends to be larger than a ball bond 22′. The wire bonding process employing a wedge bond 72 is called "wedge bonding." The bonding wires 30 are welded to the wedge bond 72 by a combination of heat, pressure, and/or ultrasonic energy as in ball bonding. An upper package housing 90 and the lower package housing 80 encapsulates the semiconductor chip 10 to provide protection from ambient environment and prevents oxidation or moisture ingress into the semiconductor chip 10. The chip package comprises the upper package housing 90, the lower package housing 80, the package side bond pads 70, and the package pins 74.
Many semiconductor chips have similar functionality that may be accommodated by substantially the same category of devices or circuits but require different wiring in the last interconnect level. In some other cases, a redundancy mechanism in the semiconductor chip or different portions of the semiconductor chip may be activated by altering a wiring in the last interconnect level.
In view of the above, there exists a need for capability to alter configurations of a semiconductor chip after normal manufacturing process.
While many versatile functions are provided by a semiconductor chip, the functions are limited by limitations imposed by manufacturing process. One example of such limitation is power supply network wiring in top metal wiring levels. The height of metal wires in any back-end-of-line is limited by the height of the metal line trench formed in a dielectric layer, which is typically less than 4 microns even for tallest metal lines. Further, the width of the metal wires is limited as well due to requirement for planarization. Patterning of an exposed layer of metal, while capable of providing a metal line hundreds of microns wide, tends to generate byproducts that cause contamination of the surface of the chip.
Consequently, there exists a need for a structure that may provide low resistance conduction paths for a power supply network at the top level of a semiconductor chip interconnect structures without contaminating a top surface of the semiconductor chip or with enhanced robustness in the power supply network.
Further, many radio frequency (RF) components require a large conductive structure. For example, an antenna or an inductor in a chip employing RF components may require a conductive wire on a millimeter scale. In the prior art, such structure are formed within BEOL interconnect levels, occupies a large volume, and hinders wiring of the chip as well as limited performance.
Therefore, there exists a need for alternate structures that may provide the functions of RF components without occupying much volume in BEOL interconnect levels. Furthermore, there exists a need to improve performance of RF components by lowering resistance of the RF components.
In addition, semiconductor chips generate a significant amount of heat, which tends to degrades performance of semiconductor devices, for example, by reduction of on-current, increase in resistance, etc.
Hence, there exists a need to enhance efficiency of heat transfer from a semiconductor chip to a chip package.

Wire bonding personalization and discrete component attachment on wirebond pads

International Business Machines Corporation


A bit line structure and associated fabrication method are provided for a semiconductor element or circuit arrangement. The bit line structure contains a surface bit line and a buried bit line. The buried bit line is formed in an upper section of a trench and is connected to an associated first doping region via a first connection layer. A first trench filling layer, which is insulated from the buried bit line by a second trench insulating layer, is situated in a lower section of the trench.

In the realization of memory circuits, a distinction is made in principle in terms of the memory architecture, the so-called NAND and NOR architectures being represented most commonly. In both architectures, semiconductor components such as one-transistor memory cells are arranged in matrix-type fashion and driven via word and bit lines.
While in NAND architectures a multiplicity of semiconductor components or memory elements are connected to one another serially and are driven via a common selection gate or a selection transistor, the respective semiconductor components in NOR architectures are organized in parallel or in matrix-type fashion, as a result of which each semiconductor component can be selected individually.
FIG. 1A shows a simplified illustration of a so-called SNOR architecture (Selective NOR), in which, in contrast to the NOR architecture with a "common source" construction, the individual memory elements SE1, SE2, . . . are selectively driven via a respective source line SL1, SL2, . . . and via a respective drain line DL1, DL2, . . . . This selective driving is carried out by respective bit line controllers BLC, which realize the common bit lines BL1, BL2. In this way, it is possible to carry out further shrinkage or more extensive integration of semiconductor circuit arrangements, since the SNOR architecture together with the "uniform channel programming" (UCP) does not rely on a predetermined minimum cell transistor length or channel length.
FIG. 1B shows a simplified illustration of a conventional layout of the SNOR architecture in accordance with FIG. 1A. In accordance with FIG. 1B, the switching elements or memory elements SE1, SE2, . . . are formed in active areas AA of a semiconductor substrate which have a substantially straight strip-type structure. The multiplicity of strip-type active areas AA arranged in columns have superposed on them, in rows, layer stacks or word line stacks WL1, WL2, . . . that are likewise formed in strip-type fashion. Each crossover point or overlap area between such a strip-type active area AA and a word line stack WL formed in strip-type fashion thus constitutes a multiplicity of switching elements or memory elements SE.
Contacts are used for making contact with respective drain regions D and source regions S. The contacts are usually formed in the active areas AA, but they may often also reach into an adjoining isolation region STI (Shallow Trench Isolation). In a further overlying layer, which represents a first metallization layer, there are then situated the source lines SL1, SL2, . . . and also the drain lines DL1, DL2, . . . for the respective bit lines BL. In this case, the drain lines are connected to the associated drain regions D of the active area AA via corresponding contacts KD, the source lines SL being connected to the associated source regions S via corresponding contacts KS in the same way.
Such a conventional bit line structure, on account of the additional source lines, uses metallization that is more than twice as dense compared with a "common source" architecture, which represents a limiting factor for more extensive integration.
In order to improve the integration density, it has been proposed in accordance with German Patent DE 100 62 245 A1 to form the source and drain lines sublithographically as spacers at an insulating fin and to enable contact to be made with the associated source and drain regions by an additional insulating layer with corresponding openings. However, the space requirement, on account of the source and drain lines that are formed at the substrate surface and lie parallel, is still relatively high and prevents more extensive integration.
FIGS. 2A and 2B show a simplified equivalent circuit diagram and also a simplified sectional view of a further conventional bit line structure, as is known for example from U.S. Pat. No. 6,438,030 B1.
In accordance with FIGS. 2A and 2B, the drain line DL1, DL2, . . . is again formed as a surface bit line at a surface of a substrate 100, in which are formed mutually insulated p-type wells 101, 102, . . . for the realization of a buried source line SL1, SL3, . . . in the semiconductor substrate.
For contact-connecting the respective source regions S or 1114, 1112 to the source line SL or the p-type wells 101, 102, . . . , a buried strap BS is formed as a p-type doping region 1113 in the source regions S or 1114 and 1112. The buried strap is connected to the p-type well 101 or the source line. Via a silicide layer 1116, each source region of the switching elements or memory elements SE is electrically connected to the buried strap BS or 1113 and thus to the p-type well 101 or the buried source line. On the other hand, the drain regions D or the doping regions 1111 and 1115 in accordance with FIG. 2B are electrically connected to the surface bit line DL1 via contacts 1118. Furthermore, each p-type well or buried source line 101 is electrically connected via a p-type diffusion region 1010 and an associated contact to a source line SL1 routed at the surface.
The integration density can be considerably improved in this way, since at least a large part of the source line is formed as a p-type well region in a manner "buried" in the semiconductor substrate and correspondingly relaxes the requirements made of the metallization above the substrate surface.
However, the silicide connection layers 1116, on account of the spacers (not-illustrated) at the word line stacks of the memory elements SE, have only a small overlap and consequently cause a high contact resistance with respect to the p-type well 101 or with respect to the source line. In the same way, the conductivity of the p-type well 101 or of the buried source line also represents a limiting factor since either a conductivity is correspondingly low given a low doping of the p-type well 101 or the breakdown voltages of the semiconductor component are correspondingly impaired given a high doping of the p-type well 101.
Furthermore, U.S. Pat. No. 6,008,522 discloses a buried bit line formed in a trench, respective source and drain regions being formed at its upper edges in a self-aligning manner by outdiffusion.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.

Bit line structure and method for the production thereof


An interrupt notification block stored in host memory is disclosed that contains an image of the interrupt condition contents that may be stored in a host attention register in a host interface port. The interrupt notification block is written by the host interface port and pre-fixed into the port pointer array of a host at the time the host interface port updates the pointers stored in a port pointer array in host memory. The host may then read the interrupt notification block to determine how to process a response or an interrupt rather than having to read the host attention register in the host interface port across the host bus.

1. Field of the Invention
The present invention relates, generally, to the processing of interrupts by a host, and in particular embodiments, to an interrupt notification block that is writeable by a host interface port and readable by the host to reduce the overhead that is involved when the host processes interrupts or has to read information across the host bus.
2. Description of Related Art
A generalized representation of an exemplary conventional computing system is illustrated in FIG. 1. A computer or server identified generally herein as a host 100 is connected to a host bus 102 (e.g. a PCI-X bus). The host 100 typically includes one or more host processors 114, cache 116, and main memory 132. Also attached to the host bus 102 is at least one port (e.g. a host bus adapter (HBA), an I/O controller, or the like), which is configured by its firmware as an interface to the host 100 and referred to generally herein as a host interface port 104. The host 100 and the host interface ports 104 may all reside within the same chassis. The host 100 and the host interface port 104 must frequently communicate over the host bus 102. For example, the host 100 may ask for service from the host interface port 104 via a command, or configure itself to receive asynchronous information, and be notified when the asynchronous information is available or when the commands have been completed. To facilitate these communications, the host 100 includes a command ring 108 and a response ring 110 in main memory 132, which may comprise a circular queue or other data structure that performs a similar function. In general, rings are used to pass information across the host bus 102 from the host 100 to the host interface port 104, or vice versa.
The command ring 108 stores command representations such as command I/O control blocks (IOCBS) 148 that are to be presented to the host interface port 104. A command IOCB 148 contains all of the information needed by the host interface port 104 to carry out a command. When the host 100 writes a command IOCB 148 into the command ring 108, it also increments a put pointer 144 to indicate that a new command IOCB 148 has been placed into the command ring 108. When the host interface port 104 reads a command IOCB 148 from the command ring 108, it increments a get pointer 146 to indicate that a command IOCB 148 has been read from the command ring 108. In general (excluding for the moment the fact that the command ring 108 is a circular ring that wraps around), if the put pointer 144 is equal to the get pointer 146, the command ring 108 is empty. If the put pointer 144 is ahead of the get pointer 146, there are commands 148 in the command ring 108 to be read by the host interface port 104. If the put pointer 144 is one less than the get pointer 146, the command ring 108 is full.
The response ring 110 stores response indicators such as response IOCBs 156 of asynchronous events written by the host interface port 104, including notifications of command completions and of unexpected events. Response IOCBs 156 contain all of the information needed by the host 100 to recognize the completed commands or to handle the unexpected events. For example, one such response IOCB 156 may require that the host 100 initiate a new command. When the host interface port 104 writes a response IOCB 156 into the response ring 110, it also increments a put pointer 150 to indicate that a new response IOCB 156 has been placed into the response ring 110. When the host 100 reads a response IOCB 156 from the response ring 110, it increments a get pointer 152 to indicate that a response IOCB 156 has been read from the response ring 110.
The host 100 also includes a collection of pointers such as a port pointer array 106 in main memory 132. The port pointer array 106 contains a list of pointers that can be updated by the host interface port 104. These pointers are entry indexes into the command ring 108, response ring 110, and other rings in the host 100. For example, the port pointer array 106 contains the get pointer 146 for the command ring 108 and the put pointer 150 for the response ring 110. When updated, these pointers indicate to the host 100 that a command IOCB 148 has been read from the command ring 108 by the host interface port 104, or that a response IOCB 156 has been written into the response ring 110 by the host interface port 104.
The host interface port 104 includes a host bus configuration area 126. The host bus configuration area 126 contains information that allows the host 100 to identify the type of host interface port 104 and what its characteristics are, and to assign base addresses to the host interface port 104 so that programs can talk to the host interface port 104.
The host interface port 104 also includes a collection of pointers such as a host pointer array 128. The host pointer array 128 contains a list of pointers that can be updated by the host 100. These pointers are entry indexes into the command ring 108, response ring 110, and other rings in the host 100. For example, the host pointer array 128 contains the put pointer 144 for the command ring 108 and the get pointer 152 for the response ring 110. When updated, these pointers indicate to the host interface port 104 that a command IOCB 148 has been written into the command ring 108 by the host 100, or that a response IOCB 156 has been read from the response ring 110 by the host 100. Note that it is relatively inexpensive, from a computational efficiency and overhead standpoint, for the host 100 to initiate writes over the host bus 102, because once the host 100 puts the data onto the host bus 102 (a "posted write"), no acknowledgement is sent, so the host 100 can proceed with the execution of further instructions without waiting for the write operation to complete.
The host interface port 104 also includes structures such as interface registers 118, which include a host attention register 120, a host control register 122, a host status register 124, and a mailbox register 154. The host control register 122 is configurable by the host 100 and contains interrupt enables that identify those attention conditions for which the host 100 would like to receive an interrupt. The host attention register 120 is a concise bitmap of attention conditions of interest to the host 100. For example, these attention conditions may indicate that there has been an update to the response ring put pointer 150 (which indicates that new responses are available), a link attention condition has occurred, a mailbox operation has completed, or an error condition has occurred.
When the host interface port 104 has completed the processing of a command from the host 100, the host interface port 104 first examines the get pointer 152 for the response ring 110 stored in the host pointer array 128 and compares it to the known put pointer 150 for the response ring 110 in order to determine if there is space available in the response ring 110 to write a response entry 156. If there is space available, the host interface port 104 becomes master of the host bus 102 and performs a direct memory access (DMA) operation to write a response IOCB 156 into the response ring 110, and performs another DMA operation to update the put pointer 150 in the port pointer array 106, indicating that there is a new response IOCB 156 to be processed in the response ring 110. The host interface port 104 then writes the appropriate attention conditions into the host attention register 120, and triggers the generation of an interrupt, if interrupts have been enabled by the host 100 in the host control register 122.
When an interrupt is received by the host 100 from the host interface port 104, the host 100 must execute an interrupt handler and a handler for the particular host interface port that initiated the interrupt. The host 100 then initiates a read of the host attention register 120 in the host interface port 104 to determine how to proceed with the interrupt. It is expensive, from a computational efficiency standpoint, for the host 100 to go out over the host bus 102 and read the host attention register 120 in the host interface port 104, because the host 100 must wait for the operation currently being executed in the host 100 to complete (which may take a long time), other host programs currently being executed must be placed on hold, information from the programs currently being executed must be saved off, the interrupting host interface port must be identified, registers for processing the interrupt must be set up, and the host attention register 120 must be read across the host bus 102 and any other intervening buses to determine the condition being reported so that the host 100 can respond accordingly. While the host attention register 120 is being read, no other processing is occurring in the host 100. In addition, the host 100 may have to arbitrate with other requesters. In multi-processor systems, a processor may also have to acquire a "lock" which enables that processor to handle the interrupt.
As described above, the contents of the host attention register 120 indicate to the host 100 what has been changed (e.g. a new response has been written into the response ring 110), and once notified, the host computer can process the change (e.g. read the response and react accordingly). Once the host 100 has called the appropriate routine to process the interrupt, it can write to the host interface port 104 and clear down those attention conditions in the host attention register 120 that the host 100 is currently handling.
One known method of reducing the number of interrupts that the host 100 must process is called interrupt coalescing. Interrupt coalescing is a request by the host 100 that it not be sent interrupts if it has already performed some processing of responses. If interrupt coalescing is enabled, when the host interface port 104 performs DMA operations to write a response IOCB 156 into the response ring 110 and update the put pointer 150 in the port pointer array 106, it does not automatically write the appropriate attention conditions into the host attention register 120. To do so would automatically trigger the generation of an interrupt, if interrupts are enabled in the host control register 122. Instead, the host 100 is given an opportunity to read the pointers in the port pointer array 106 and read and process the next response IOCB 156 in the response ring 110 when it has an opportunity to do so. After a predetermined amount of time has passed or a predetermined number of response IOCBs 156 have been written into the response ring 110 by the host interface port 104, the host interface port 104 reads the host pointer array 128, and if the pointers in the host pointer array 128 indicate that the host 100 is reading response IOCBs 156 from the response ring 110 and making progress in responding to the attention conditions that would ordinarily give rise to an interrupt, then the host interface port 104 may defer writing attention conditions to the host attention register 120 and initiating an interrupt. If, on the other hand, the predetermined amount of time has passed or the predetermined number of response IOCBs 156 have been written by the host interface port 104 into the response ring 110, but no progress by the host 100 is indicated by the host pointer array 128, the host 100 needs to be awakened. The host interface port 104 writes the appropriate attention condition information into the host attention register 120 and an interrupt is generated. When the host 100 receives the interrupt, it must incur the expense of reading the host attention register 120 of the host interface port 104 that sent the interrupt.
Despite the improvements in overhead that are possible with interrupt coalescing, there is still a need to further reduce the overhead that is involved when the host processes interrupts or has to read information across the host bus.

Emulex Design & Manufacturing Corporation


Embodiments of this application provide a resource obtaining method. A server side obtains a resource request that includes information about a resource requested by the server side. The server side sends the resource request to a client. After receiving the resource request, the client obtains, according to the information about the resource requested by the server side, information about a resource allocated to the server side. The client sends, to the server side, a resource response that includes the information about the resource allocated to the server side. In the method provided in the embodiments of this application, the server side actively sends, to the client, the resource request used to request the resource, and the resource that is allocated by the client to the server side according to the resource request of the server side can better meet an actual requirement of the server side.

A NETCONF protocol is a new network configuration protocol launched by a NETCONF working group of the Internet Engineering Task Force (IETF). A function of the NETCONF in network management is similar to a Simple Network Management Protocol (SNMP), and is used for interface interaction and data transmission between a network manager and a device. In a network environment, a resource manager is configured to manage a plurality of resources of a network device together, such as an Internet Protocol (IP) address pool and a forwarding entry. The NETCONF protocol is used between the resource manager and the network device, and the resource manager may allocate a resource to the network device based on the NETCONF protocol. In a current resource allocation manner, a resource waste problem exists.


A steer-by-wire steering system for steering a set of road wheels is disclosed. The system comprises a controller and at least one actuator assembly connected to the controller and to the at least one wheel of the set of road wheels. The at least one actuator assembly comprises an electro-mechanical actuator connected to the controller, a crank arm connected to the electro-mechanical actuator, a steering arm connected to the at least one wheel of the set of road wheels; and a tie rod having a first end thereof connected to the crank arm and a second end thereof connected to the steering arm. The electro-mechanical actuator, in response to a signal from the controller, is operative to rotate the crank arm producing thereby a force acting through the tie rod so as to rotate the steering arm and the at least one road wheel to a desired position. The steer-by-wire steering system includes a backup system capable of assuming operative command of the steer-by-wire steering system.

This invention relates to a steer-by-wire rotary actuator.
A steer-by-wire steering system for steering a set of road wheels is disclosed. The system comprises a controller and at least one actuator assembly connected to the controller and to the at least one wheel of the set of road wheels. The at least one actuator assembly comprises an electro-mechanical actuator connected to the controller, a crank arm connected to the electro-mechanical actuator, a steering arm connected to the at least one wheel of the set of road wheels; and a tie rod having a first end thereof connected to the crank arm and a second end thereof connected to the steering arm. The electro-mechanical actuator, in response to a signal from the controller, is operative to rotate the crank arm producing thereby a force acting through the tie rod so as to rotate the steering arm and the at least one road wheel to a desired position. The steer-by-wire steering system includes a backup system capable of assuming operative command of the steer-by-wire steering system.


A nozzle structure arranged for mounting to a garden hose and the like is provided, wherein an L-shaped nozzle structure having a trigger mounted within the nozzle is provided to impart selective fluid flow through an associated outlet conduit. The trigger member is arranged for sliding and reciprocation in a parallel orientation relative to the outlet conduit structure of the invention, and wherein a lock member is arranged to secure the trigger member in operative orientation, and wherein the trigger member is operative to effect manipulation of a rotary valve to direct fluid flow from a first conduit to a second conduit.

1. Field of the Invention
The field of invention relates to nozzle apparatus, and more particularly pertains to a new and improved hose nozzle wherein the same is arranged for ease of manual manipulation and operation in use.
2. Description of the Prior Art
Nozzle structure of various types are utilized throughout the prior art and exemplified by the U.S. Pat. Nos. 4,997,131; 4,776,517; 4,840,313; 4,508,272; and 3,497,141.
The instant invention attempts to overcome deficiencies of the prior art by providing for a nozzle structure arranged for ease of manipulation in use and convenience in orientation of fluid flow through the nozzle structure in a selective manner and in this respect, the present invention substantially fulfills this need.


An apparatus for cutting pipes made of plastic material in automatic cutter machines, including a tool for cutting pipes made of plastic material, a first rocker arm supporting the cutting tool, movable between a non-operating configuration at which the tool is disengaged from the pipe and an operating configuration wherein the tool is designed to exert its cutting action on the pipe, a second arm, for controlling the first arm, operatively connected to the first arm for moving it at least between its non-operating and operating configurations, the second arm comprising a first electric actuator and a supporting body slidably connected for modifying its reciprocal position between a close position and a spaced-apart position.

In the automatic cutting machines for pipes made of plastic material, which are normally positioned in line with the extruder which produces pipes in a continuous fashion, there is usually a cutting unit or apparatus equipped with one or more respective tools, which are typically able to also execute a rotary movement around the pipe.
According to preferred embodiments, during the cutting step the cutting apparatus moves longitudinally in a synchronised fashion with the feeding of the pipe, the cutting tool is also fed radially until making contact with the pipe to penetrated through its thickness, all whilst simultaneously rotating about the axis of the pipe for executing a circumferential cut.
Once a cut has been made, thus defining a respective piece of pipe, the cutting tool is moved away radially from the pipe whilst the cutting apparatus is, in sequence, moved longitudinally to a suitable starting position for making a new cut.
The tools commonly used for cutting pipes, also as a function of wall thicknesses and different plastic materials, have fixed blades, idle blades or also circular toothed blades rotating by means of suitable drive units.
Commonly, the movement devices of the cutting elements are actuated pneumatically or hydraulically.
Patent document U.S. Pat. No. 4,084,463A shows an automatic apparatus for cutting plastic pipes having transversal cross-sections which are non-circular and irregular, through the use of blades, operatively connected to mobile arms moved by hydraulic drive means.
In particular, the hydraulic drive requires a plant which is rather complex and costly, especially supported by a mobile and often rotary apparatus and normally comprising a control unit with on-off or proportional valves, one or more electric motors, a tank, an hydraulic pump which draws oil from the tank, pressurises it and, through specific valves, sends it to the actuators.
In operational terms, with the cutting machines currently in use, there is a problem connected with the adoption of the above-mentioned hydraulic drive of the cutting elements.
In effect, since for productive efficiency requirements the cutting elements, as mentioned, move longitudinally in a synchronised fashion with the pipe during cutting, penetrating inside the pipe, in the event of a power failure or an emergency stop of the cutting machine, the pipe pushed by the extruder would continue to feed longitudinally at least for a certain period of time whilst the cutting apparatus, since it no longer has the necessary energy would not be able to disengage radially from the pipe, so it would be drawn by it with the risk of seriously damaging both the tool and the cutting machine and in general creating possible faults to the entire extrusion system.
In construction terms, a solution has been provided to this problem by coupling to the hydraulic cylinder, which radially feeds the cutting means towards the pipe, elastic elements (typically compression springs) which are compressed by the same hydraulic cylinder when the cutting unit is pushed to penetrate the pipe being processed.
In the case of an electrical power failure, and therefore hydraulic, the cylinder is no longer able to compress the springs to which it is coupled and the latter are therefore free to release the relative accumulated elastic energy, withdrawing the cutting unit (and, therefore, the tool) disengaging it from the pipe.
A similar result may be achieved by further complicating the hydraulic system, by inserting in place of the springs a suitable hydraulic accumulation device which is loaded under normal operating conditions with the aim of introducing the accumulated and pressurised oil in the circuit and thereby inducing the moving away of the cutting tool from the pipe being processed even in the absence of electrical energy.
However, the above-mentioned solutions, even though they have been shown to be efficient, are not free of drawbacks, in particular with regard to their complexity which is in addition to that of a basic hydraulic system which is already very articulated.
In particular, for some materials and specific cutting processes it is convenient to be able to control the speed, force and trajectory of perforation of the tool; to do this, it is necessary to further complicate the hydraulic system by inserting specific hydraulic valves of the proportional type and process dedicated control algorithms. In addition to the intrinsic complexity of said systems, the performance cannot exceed certain levels of precision due to the inevitable response inertias which are typical of hydraulic systems and the variability of behaviour which said systems have as a function of the operating conditions, such as, for example, temperature.

Apparatus for cutting pipes made of plastic material


An input/output (I/O) module has a programmable memory having a first memory address for receiving a module number and a second memory address for receiving a signal direction indicator. The I/O module is for use with a programmable controller system having a master controller serially connected to a plurality of I/O modules. The I/O module has a signal line operatively coupled with the memory. The signal line has a pair of inputs. Both inputs are configured and adapted for receiving a module number signal across a line connected therewith. The other one of the inputs will then propagate the module number signal downstream. A logic circuit sets the second memory address with the signal direction indicator corresponding to the module number signal being received by a particular one of the inputs.

Field of the Invention
The present invention relates generally to programmable controllers of the type used in industrial automation. More particularly, the invention pertains to an input/output (I/O) module connectable with a programmable controller.
Description of the Prior Art
A programmable controller is a type of general purpose industrial computer which controls the operation of industrial or factory automation equipment or processes, such as an assembly line or a machine tool, in accordance with a stored program. The stored program includes a series of instructions or commands that direct the programmable controller to execute actions.
One conventional type of programmable controller includes a rack that contains functional modules. A rack backplane provides signal buses and connectors for electrically coupling the functional modules. One functional module is a control module that has a processor which sequentially executes the control program stored in memory of the control module. Other functional modules include I/O modules that are provided to interface various input and output devices to the processor. The I/O modules are placed or inserted into the rack. The location of the I/O module in the rack typically defines the address to reference each connected device. Other known programmable controller systems allow the user to select or set the addresses for each module by setting internal switches.
Therefore, it is desirable to improve the module number selection to be well suited for rackless programmable controller systems, as well as provide ease of interchangeability of I/O modules and operator identification where the I/O modules are not preset by user selected switches or dictated by rack locations. As will be described in greater detail hereinafter, the system and method of the present invention accomplishes these tasks and employs a number of novel features that render it highly advantageous over the prior art.
Accordingly, it is an object of this invention to provide an improved I/O module for use with a programmable controller system.
Another object of this invention is to provide a method and system for assigning module numbers to I/O modules.
Still another object of this invention is to provide an I/O module that determines the direction of bus flow therethrough and contains a programmable module number.
To achieve the foregoing and other objectives, and in accordance with the purposes of the present invention, an I/O module is provided for use with a programmable controller system having a master controller serially connected to a plurality of I/O modules. Each of the I/O modules includes a programmable memory having a first memory address for receiving a module number and a second memory address for receiving a signal direction indicator. A module number signal line is operatively coupled with the memory. The module number signal line has a pair of inputs, either of the inputs being configured and adapted for receiving a module number signal across a signal line connected therewith. The other one of the inputs is adapted for propagation of the module number signal downstream. A logic circuit sets the second memory address with the signal direction indicator corresponding to the module number signal being received by a particular one of the inputs.
Other objects, features and advantages of the invention will become more readily apparent upon reference to the following description when taken in conjunction with the accompanying drawings, which drawings illustrate several embodiments of the invention.

System having I/O module number assignment utilizing module number signal line having pair of inputs adapted for receiving module number signal and propagation of module number signal down stream


An RF coil apparatus suitable for a high magnetic field MRI apparatus includes a plurality of subcoils arranged substantially in a cylindrical form. Each subcoil includes a first conductor part and a second conductor part. The second conductor part is disposed on the inside of a cylinder, i.e., on the test subject side. This coil apparatus includes a conduction part for attaining conduction among the subcoils, and a conduction control part for controlling a conduction state between the first conductor part and the second conductor part, conducting connection to a transmission and reception part which conducts signal transmission and reception with a subcoil, and changing over electric capacitance of the subcoil according to whether to receive or transmit. Function changeover between the multi-channel mode and the one-channel mode is accomplished by conducting connection changeover and electric capacitance changeover.

The present invention relates to a coil apparatus for transmitting/receiving an electromagnetic wave, and a nuclear magnetic resonance imaging apparatus (hereafter referred to as "MRI apparatus") using the coil apparatus.
The MRI apparatus irradiates a subject disposed in a uniform static magnetic field generated by a magnet, with an electromagnetic field, excites nuclear spins in the subject, then receives a nuclear magnetic resonance signal which is an electromagnetic wave generated by nuclear spins, conducts imaging of the subject. The irradiation with the electromagnetic wave and reception of the nuclear magnetic resonance signal are conducted by an RF coil which transmits or receives an electromagnetic wave having a radio frequency (RE). Transmission coils, reception coils or coils serving as both transmission coils and reception coils having various shapes suitable for the MRI apparatus have been developed.
In recent years, the MRI apparatuses have had higher magnetic fields. As its merit, sensitivity improvement, consequent shortening of imaging time, and improvement of the imaging resolution are anticipated. On the other hand, a higher magnetic field in the MRI apparatus causes new problems such as uneven current distribution in the RF coil, a loss increase caused by higher resistance in the RF coil, uneven excitation region caused by RF absorption in the human body, and lowering in coil productivity caused by a limit of the self-resonant frequency in the RF coil.
In order to solve the problem of the productivity lowering of the RF coil among the above-described problems, new schemes of the RF coil such as the microstrip line type and the multiple patch resonator type have been proposed (see, for example, US 2004/001239A1, and U.S. Pat. No. 5,557,247). They are attracting attention as substitute techniques for the conventional schemes such as the ring coil array and the bird cage type coil in the high magnetic field MRI apparatus.
The problem of the RF absorption and reflection in the human body can be solved by sweeping the gradient magnetic field strength when irradiating with the excited RF and irradiating with an optimized RF. In this method, however, there is a problem that the irradiation time becomes longer. On the other hand, a technique of shortening the irradiation time by using a large number of RF coils has been developed. This technique is called parallel RF transmission. The parallel RF transmission is a method obtained by applying an imaging time shortening technique (called parallel imaging) using reception coils having different sensitivity regions to RF transmission. The parallel RF transmission has been proposed as a countermeasure to the problem of the uneven excitation region caused by RF absorption in the human body.
For conducting the parallel RF transmission, a plurality of transmission RF channels having different sensitivity regions are needed. In general, a coil of microstrip line type can have a configuration of multi-channel transmission/multi-channel reception. Therefore, the microstrip line coil is suitable for the parallel RF transmission scheme. For conducting the multi-channel reception, however, a multi-channel receiver is needed. It requires some cost to prepare the multi-channel receiver. On the other hand, the RF coil of the multiple patch resonator type mentioned above is a coil corresponding to one-channel transmission/one-channel reception or two-channel transmission/two-channel reception called quadrature. The coil of this type has a comparatively simple configuration, and the coil of this type can be easily mounted on an MRI apparatus having only one channel of transmission and reception system. However, the coil of this type cannot cope with the multi-channel transmission and the multi-channel reception.
As an RF coil suitable for the high magnetic field MRI apparatus, therefore, a coil that makes it possible to choose and switch the suitable number of channels at the time of each of transmission and reception according to the apparatus configuration is desired. If a microstrip line type coil is used and as many transmission reception changeover switches, phase shifters and branching filters as the number of channels are used, it is possible in principle to form a configuration of multi-channel transmission/one-channel reception or a configuration of one-channel transmission/multi-channel reception. When the number of channels increases, however, there is a demerit that the circuit adjustment and the work of balancing the compounding conducted among channels become complicated.
A coil apparatus that makes the one-channel transmission/multi-channel reception possible is disclosed in Proceedings of International Society of Magnetic Resonance in Medicine, vol. 13, p. 954, (2005). In this coil apparatus, a multiple patch resonator type coil is used as a one-channel coil at the time of transmission and used as a multi-channel loop coil array at the time of reception. Even if this technique is used, however, adaptation to the multi-channel transmission/one-channel reception is difficult. Furthermore, since the reception coil scheme is a loop coil array, coupling between adjacent coils increases, resulting in a demerit that the mounting becomes difficult and the configuration becomes complicated. Furthermore, in this method, nothing but a multi-channel configuration of N/2 channels can be implemented, where N is the number of conductors in a multiple patch resonator type coil called rung.

Coil apparatus and nuclear magnetic resonance apparatus using the same


A system comprises a structure editor, a structure library, an extractor and a user interface, which are stored in computer memory and create structures for recognizing patterns in computer text. The structure editor via the user interface enables a user to input a text string called a model pattern, and uses previously-created structures such as lexical category structures for parsing the model pattern into default definition items. Each default definition item includes attributes specifying the patterns recognizable by the definition item and relationships with other definition items. The structure editor enables and facilitates user modification of the default definition items by generating attribute choices for user selection and allowing a user to generate a new structure if none of the choices is adequate. The resulting definition items form a new definition of a new structure, which is stored in the structure library. The extractor locates a pattern in computer text by satisfying the conditions of a definition of a new structure.

1. Field of the Invention
This invention relates generally to structures used to locate patterns in computer text. More particularly, the invention relates to a system and method for creating computer structures from example strings of text.
2. Description of the Background Art
Much text that appears in a computer user's day-to-day activities contains computer recognizable patterns of text that have semantic significance including phone numbers, e-mail addresses, post-office addresses, zip codes and dates. In a typical day, for example, a user may receive extensive word-processing and e-mail text files which contain several of these patterns. A language analysis program referred to as an extractor can then be used to search any of the text document for recognizable patterns. The extractor accesses a data file referred to as a library, which contains computer data referred to as structures. These structures are what the extractor follows when searching computer text to recognize a pattern. A structure comprises one or more definitions, such that the extractor must prove true one of the definitions in order to identify a pattern in the computer text. The application of a structure to computer text by an extractor is termed "parsing".
A conventional notation for defining structures is the Backus Naur Form (BNF), which is both difficult to understand and difficult to write. A definition using BNF consists of the name of the structure (such as the name "Date"), followed by the symbols ":=", further followed by a sequence of definition items. Each definition item in a BNF definition specifies an element of the pattern of text that the structure recognizes. A definition item may be a specific string which causes the extractor to recognize only the specific string; or the definition item may refer to a structure with a plurality of alternative definitions, causing the extractor to recognize any one of a plurality of specific strings. For example, a definition item may specify a lexical category structure which enables the extractor to recognize a particular kind of string such as numbers, letters, punctuation, spaces, tabs, carriage returns or the like.
A BNF structure that recognizes, for example, a date pattern might have a definition written as: EQU <Date>:=<Month> Number "," Number.
In this example, the definition comprises four definition items. The definition item "<Month>" refers to another structure which may be defined as: EQU <Month>:="January".vertline."February". . . .vertline."December";
where the symbol ".vertline." separates alternative definitions. Thus, "Month" is the name of the structure and contains twelve definitions; each definition contains a single definition item consisting of the name of a month. It will be appreciated that both the "Date" and "Month" structures are reducible to a specific expression of lexical category structures and/or exact strings of text.
In a given extractor, a programmer explicitly stores within the structure library appropriate structures for recognizing patterns valuable to a user. Since it is impossible for a programmer to anticipate all possible valuable patterns, it is desirable to provide the user with a means for extending the structure library. Some previous parsing programs enable the user to access the structure library and to add new structures. The drawback of this approach is that many users find it difficult to understand and write these formal structure-defining notations such as BNF. Therefore, a system and method are needed to create pattern-recognizing structures using a simple user interface which does not require specialized programming skills or familiarity with formal structure notations.

System and method for creating pattern-recognizing computer structures from example text


The present invention is a compact specimen inspection station (10) that processes vertically oriented specimens. Specimen storage, transport, and inspection components (26,28, and 30) are all mounted to a vibration-damped support structure (14) and are designed to handle specimens (34) positioned with a generally vertical orientation. The station is designed to minimize undesirable specimen motion and contamination caused by an operator (42). The station is also equipped with a microscope (32) and a display monitor (36) that provide a real image and a video image, respectively, of a microscopic region of the specimen under inspection. The station is equipped with failsafe mechanisms (176 and 182) that prevent the dropping of a specimen during an electrical power failure or a vacuum pressure loss.

A conventional semiconductor wafer fabrication process entails detection and inspection of defects in the patterned surface of a specimen wafer. The in-process inspection for defects is typically accomplished with the use of an operator-controlled inspection station that includes a microscope and a television-type display monitor for viewing the minute detail of the patterned surface in a small region of the wafer.
The wafer is typically secured by vacuum pressure or other means to an X-Y translation stage that moves the wafer in a horizontal plane. The microscope optically communicates with a fixed region in space above the X-Y stage, the fixed region being defined by the field of view of the microscope objective. The X-Y stage moves the wafer to selectable positions in the horizontal plane to present different regions of the wafer within the field of view of the microscope objective. A video camera optically coupled to the microscope provides video signals representative of the region of the wafer presented to the microscope objective. The operator is, therefore, able to select a region of the wafer for inspection and view the region through the microscope eyepiece or a video image of the region displayed on the monitor.
There are several design considerations affecting the physical layout of and equipment used in a specimen inspection station. Such design considerations stem primarily from the presence of an operator and her or his movements during normal use of the inspection station.
First, the operator uses a keyboard to manually enter data delivered to a computer that generates commands to operate the X-Y stage and perform other functions necessary to locate, identify, and classify defects in the specimen wafer under inspection. Vibration isolation is, therefore, sometimes used to prevent normal operator movements from affecting the stability of the wafer region positioned within the field of view of the microscope objective.
Second, human contamination introduced by the operator is a significant contributor to in-process wafer defects. To combat this problem, special equipment providing a clean room environment is sometimes used.
Third, the ergonomics of coordinating the placement of operator equipment such as the keyboard, the microscope, and display monitor for operator convenience and ease of use dictates the layout and size of a work space needed for the specimen inspection station components. The size of the specimen that is to undergo inspection can also affect the size of the work space.
Finally, the horizontal disposition of a very large area specimen on the X-Y stage can cause the specimen to deflect under its own weight and thereby necessitate the use of a stage having a large surface area to reduce the amount of stress borne by the specimen during inspection.


The invention relates to color toner compositions prepared from an aqueous pigment concentrate dispersion which renders a toner exhibiting improved pigment dispersion, and consequently improved image density and color characteristics.

Present day toners are formulated from a range of potential components. Most toner compositions include at least a polymeric binder material and a colorant. Other commonly used components include black and colored magnetic oxides, charge control agents, internal additives to augment toner properties, such as aiding in deagglomeration and homogeneous distribution of the colorant in the toner composition, and external additives, to aid in the proper function of the toner. The components used in a particular toner formulation are dependent on the requirements of the machine in which the toner is ultimately intended to be used. For instance, the toner formulation must take into account such parameters as image quality, reliability, carrier life, toner shelf life, etc., all of which are intricately involved with the mechanical capability and design of the hardware of the machine. Often, there is more than one component of a toner formulation which performs to eradicate certain undesirable properties of the toner. These same components may however, also contribute to other problems, or the combination of two or more components which affect the same toner properties may result in over-correction of a problematic area in the toner performance. Therefore, the combination of components selected to comprise a given toner composition must be carefully balanced, taking into account the full range of toner performance parameters which may be affected by each component and the interaction of each component with every other component of the toner composition, and the machine and its various components and systems.
Given that each of the foregoing parameters will affect toner performance in some manner, it is unlikely that any one toner will achieve optimum performance in all areas. Therefore, toner producers determine which parameters are most critical to the performance of a toner for a given purpose and which may be compromised, and to what extent.
Toner performance is determined by the combination of components, and by the physical, electrical and chemical properties of each. The foregoing properties include particle size, particle size distribution, particle shape, bulk density, mechanical strength, flow properties, triboelectric charge, resistivity, softening point, blocking temperature, melt viscosity, and dispersion. Each of these parameters must be considered for each component in determining what components to combine and how to combine the components to achieve a balanced toner which produces an image having those properties determined to be most important for a specific toner.
One aspect of concern, and the one of most importance to this invention, is that of pigment dispersion. Each toner particle must be consistent with respect to composition and performance, and must exhibit a uniform distribution of colorant, charge control agent, additives, etc. The degree to which this uniform dispersion is achieved affects the resulting triboelectric charge, color, yield, and finally the printed image. The choice of components is further influenced by economic and environmental concerns.
The bulk polymeric material of the toner generally functions as the binder for the colorants included in the toner formulation, but also affects many of the other toner functions, such as charging, electrical resistivity, and mechanical integrity, to name a few. Therefore, often times a combination of resins is used to achieve the desired performance. Polymers used in toner may be linear, branched or cross linked, and are chosen for their various properties and the manner in which these properties are likely to affect toner performance. For example, certain binder polymer properties affect the thermal performance of the toner. These properties include such binder parameters as glass transition temperature, melt viscosity, blocking temperature, and thermal integrity. In the same manner, the mechanical properties of the binder polymer, including such parameters as impact strength, adhesive/cohesive strength, and surface energy will also affect toner performance. Electrical traits such as triboelectric charge function, resistivity, and dielectric constant, and other miscellaneous features, such as moisture resistivity, % volatility, molecular weight, colorlessness, and pigment compatibility, all have an affect on the ultimate performance level of the toner in which the binder is used.
Among the most popular resins from which the toner resin may be selected are: acrylic resins, epoxy resins, polyamide resins, polyester resins, polyethylene resins, polystyrene resins, styrene-acrylic copolymer resins, and styrene-butadiene resins. As with all toner components, choice of resin is generally determined by the machine parameters and toner performance qualities sought.
Dispersed in the binder resin are the colorants used in the toner formulation. In monocomponent toners, magnetic oxide pigments are used for the purpose of enhancing the magnetic attraction between the toner and the developer roll assembly. Carbon black has historically been the most popular colorant used in black toners, as it strongly influences the triboelectric charging capability of the toner. However, more recent toners employ charge control agents to achieve and control this toner feature, thus allowing the use of more easily dispersed black colorants. The black colorant may also affect the flow characteristics of the toner and, therefore, is sometimes added in incremental amounts to the toner surface.
The charge control agents are also critical in full color printing. The equipment of today allows the reproduction of beautiful, photographic-quality full color images. The printer/copier machines generally employ one or more cartridges which dispense color toner, as well as black toner. The basic color toners used are magenta, cyan and yellow, though any number of other color toners are available. Generally, however, variations in color and tone or shade are produced by the combined printed affect of a basic color set of toners.
Most toner formulations also include any one or more of a number of materials known commonly in the industry as additives. These are generally fine particles which are physically blended with the toner at up to about 3% of the composition. They may be attached to the toner by electrical means, mechanical means, or by mere physical mixing, though this is not generally the manner of choice. These additives may be added to influence flow control, charge control, cleaning, fixing, offset prevention, transfer, conductivity control, humidity sensitivity control, and carrier life stability. Common additive materials include silica, metal oxides, metal stearates, fluoropolymer powders, fine polymer powders, rare earth oxides, waxes, conductive particulates, magnetite, carbon, and titanates. Choice of additives is critical, however, given that many of the additives affect more than a single property.
Clearly, given the vast number of components available in the industry for use in toner compositions, and given the propensity for many of the components to enhance some properties and at the same time to deleteriously affect others, choice of components is clearly not a routine matter.
For example, it is known, as was set forth earlier, to produce toner compositions which include pigment colorants. Such compositions may use carbon black. Other color toners may use color pigments commercially available from a number of sources. One means of dispersing a pigment in a toner composition is to use the pigment in the wet cake form. U.S. Pat. Nos. 5,667,929 and 5,591,552 disclose such a process for toner preparation. In these disclosures, pigment in the wetcake form was added to a mixture of linear polyester and toluene to form a pre-dispersion. The water was flushed, or displaced, by a resin/toluene solution, and then the toluene removed to generate a crushed powder of resin and pigment. While this method does increase pigment dispersion to some degree, printed images using the toner nonetheless exhibit very average print quality.
Therefore, it has remained for the current inventor to determine a means by which color or black pigment may be uniformly dispersed in a toner composition. This is accomplished using the pre-dispersion technology set forth hereinafter, which produces a toner suitable for generating a printed image with enhanced brightness of colors, visual density and vividness of color, each of which is directly affected by the quality of the pigment dispersion incorporated into the toner.

International Communications Materials, Inc.


A processor determines an engagement state of a clutch based on a clutch signal, which is output from a clutch switch connected to a clutch pedal. In a declutching state, the processor lowers weighting gain characteristics that serve as acoustic correcting characteristics used in a sound pressure adjuster. Therefore, even when a change of an engine rotational frequency per unit of time increases during a shift-change operation, the gain of the control signal is prevented from increasing. Accordingly, a gap between real acceleration of the vehicle and a sound effect output from a speaker can be decreased, thereby reducing the possibility that the driver and/or a passenger in the vehicle may feel a sense of strangeness relative to the sound effect.

1. Field of the Invention
The present invention relates to an apparatus for producing a sound effect in a vehicle, depending on sound source information, including vehicle driving state information or engine operation information.
2. Description of the Related Art
Heretofore, there have been proposed in the art a sound effect producing apparatus for detecting accelerating or decelerating actions made by a driver, and producing and radiating a sound effect into the vehicle cabin, depending on the acceleration or deceleration of the vehicle, by means of a speaker installed in the vehicle cabin, as disclosed in Japanese Laid-Open Patent Publication No. 54-8027 and U.S. Pat. No. 5,371,802.
According to the disclosed sound effect producing apparatus, when the rotational speed (rotational frequency) of a motor vehicle engine increases in response to an accelerating action made by the driver, a sound effect having a high frequency and a large sound level is generated depending on the increase in the engine rotational speed, wherein the sound effect is radiated from the speaker into the vehicle cabin in order to create a staged sound atmosphere in the vehicle cabin.
However, according to the conventional apparatus, which produces a sound effect depending on the rotational speed of the engine, during declutching, there is no correlation between the increase or decrease of the engine rotational speed and actual acceleration or deceleration of the vehicle. For example, when the clutch is disengaged and the accelerator pedal is pressed during downshifting, the engine rotational speed increases and the sound effect becomes larger, even though the actual speed of the vehicle stays constant or decreases. Such a gap may seem strange to the driver or to a passenger riding in the vehicle.
On the other hand, in some situations, it would be better to produce a large sound effect even when the clutch is disengaged. For example, when the clutch is disengaged but the driver uses a driving technique known as "heel-and-toe", the driver or passenger would not sense any strangeness when the sound effect is made larger.
Generally, the "heel-and-toe" operation is one type of driving technique that is used during downshifting. As its name suggests, during heel-and-toe operations, a downshift operation is performed by both the right heel of the foot heel as well as the right toe. Such a heel-and-toe operation, for example, may be carried out as follows. In order to negotiate a curve, (a) the driver uses his or her right toe in order to apply the brake before reaching the curve so as to decrease the speed of the vehicle; (b) the driver uses his or her left foot in order to push in the clutch pedal and thereby disengage the clutch; (c) the driver uses his or her right heel in order to push the accelerator pedal so that the engine rotational speed stays substantially the same as the wheel rotational speed, while the driver then returns the clutch pedal in order to reengage the clutch to perform downshifting; and (d) the driver pushes the accelerator pedal in order to accelerate the vehicle. According to the above operations, the vehicle is decelerated before reaching the curve and downshifting is performed smoothly. Then, the vehicle is re-accelerated to pass through the curve smoothly and quickly.
During the above operation (c), the engine rotational speed increases while the clutch is disengaged. Therefore, there is no correlation between engine rotational speed and actual acceleration of the vehicle. However, when the heel-and-toe operation is performed, the above operations are performed only for a very short period of time, e.g., for 1 to 2 seconds. Accordingly, the driver or passenger does not experience a strange feeling as a result of the sound effect becoming larger when the engine rotational speed is increased.
Such a situation, where it is better to increase the sound effect during a heel-and-toe operation, can apply not only to cases of using the apparatus for producing a sound effect depending on engine rotational speed, but also to cases of using an apparatus for producing a sound effect depending, for example, on the velocity of the vehicle. In such an apparatus, the sound effect ordinarily will not be increased even when the accelerator pedal is pressed, since the vehicle is decelerated during downshifting using the heel-and-toe operation. However, in order to highlight the heel-and-toe operation, actually it would still be better to increase the sound effect.

Sound effect producing apparatus for vehicle