A series of spans of column shaft (1) with a frustoconical shape, each span integrating two or more parts (2) and (3) with a polygonal or circular section formed with pieces prestressed in a bed in the factory, with centered or slightly deviated prestressing (4) and non-prestressed reinforcement (5) in the perimeter of the section or fibers, attached by means of wet or dry longitudinal joints (6), rotated in plan view or not, and transverse joints (7) which can be at different levels and provide continuity or not to the general prestressing, for a joining by means of steel bars (12), and in the case of the attachment to the foundation with direct positioning of the starter bars at the time said foundation is built, or by means of jacket tubes which will subsequently receive the mentioned bars (16).

1. Field of the Invention
The present invention relates to a vertical support structure or tower for wind turbines generating electric energy or other uses, made of prestressed concrete, providing a frustoconical or cylindrical column shaft of prestressed concrete with variable height built by means of annular sectors, each of which comprises several wall pieces with a semicircular or polygonal section or semicircular or polygonal sectors, longitudinally attached to each other, and in the case of several superimposed in height, longitudinally attached with a system allowing the structural continuity of the tower. Either the wind turbine directly or another metal column shaft on which the turbine will finally be fixed will be located at its upper end.
This invention also has its application in the field of construction in general and especially in the industry for building and installing support structures for wind turbines generating electric energy.
A second aspect of the invention relates to a process for erecting the support structure or tower based on the successive incorporation of the mentioned wall pieces
Throughout the present specifically, wall piece will be understood as a piece forming the wall of the support structure or tower, being said wall thin, from 5 to 30 cm, made of prestressed concrete, with a centered prestressing and a non-prestressed reinforcement in the perimeter of the section or fiber-reinforced concrete, suitable for forming next to one or more pieces an annular sector of the support structure or tower.
2. Discussion of Related Art
In relation to the state of the art, it should be mentioned that the wind sector, which is widely expanding within the development of renewable energies, has gradually progressed in search of a greater cost-effectiveness, which has resulted in the design of increasingly more powerful wind turbines, of 3 or even 5 MW, to cover the demand created.
These new designs oblige rethinking the support structures or towers bearing the wind turbine, which must withstand stresses that are much greater than those today do and reach new heights of up to 120 m in order to be able to house machines with blades of more than 50 m in length.
An extrapolation of towers today (up to 70 m in height) built by means of curved and electrowelded plates, transversely attached by means of flanges, does not allow dealing with, in a cost-effective manner, the new features required of said elements, especially due to the enormous flexibility of this type of structures made of steel and to the incompatibility of this characteristic with the requirements extracted from the dynamic calculation of these new towers.
It is therefore necessary to use other materials and among them, concrete has the necessary characteristics for dealing with the aforementioned problems.
In this sense, there have been several initiatives that have already been undertaken: some solve the construction of these towers in reinforced concrete or performing a post-tensioning "in situ", i.e., in the wind farm itself and in its final position, of these elements as a result of a slipform or climbing form. In the case of the post-tensioning "in situ", cables are passed through and post-tensioned inside the thin concrete wall in jacket tubes left for that purpose either on the inside or outside of the tower. In addition to being expensive, these solutions have the problem of the long periods required for performing them, which works directly against the cost-effectiveness of the project.
In other cases, attempts have been made to solve the problem by means of small pieces made of prefabricated concrete such as circular voussoirs, or small plates (which are attached to each other forming the tower). These generally reinforced pieces require considerable thicknesses in order to assure the suitable dynamic operation of the tower once it is subjected to the service loads and accordingly with a cracked section. For this reason, these designs are occasionally reinforced by means of inner or outer post-tensioning operations performed in situ which compress all the sections along the tower to prevent cracking.
In this solution, the presence of a large number of attachments between pieces, of post-tensioning operations in situ, etc., greatly complicates and makes the assembly of these towers extremely expensive and compromises the actual operation of the assembly.
A number of background documents are known which describe various embodiments towers using reinforced concrete, among which the following should be mentioned: JP-A-9-235912, DE-A-29809541, DE-A-19832921, EP-A-960986, US2006/0254168, WO 02/01025, U.S. Pat. No. 7,114,295, JP-OR-3074144, EP-A-1474579 (MECAL APPLIED MECHANICS), EP-A-1645761 (INNEO21), EP-A-1876316 (MONTANER), WO2007/033991 (SIKA), WO2008/031912 8 (GAMESA).
The technical solutions explained in the mentioned patents can be classified into the following groups:
a. Tower built in situ.
b. Tower made of reinforced concrete with superimposed annular sectors, and post-tensioning in the field.
c. Towers made of concrete formed by the superimposition of annular structural sectors integrated in two or more assembled component parts which require post-tensioning in the field.
d. Lattice towers either made of concrete or steel.
e. Tower formed by concrete poured between steel sheets.
f. Towers in which pieces with different shapes which are suitable for either aiding in the production or improving the structural efficacy are provided;
g. Towers including pieces having incorporated therein specific reinforcement elements.
Patent FR 1145789 relates to a process for building a tower or stack without scaffolding with prefabricated elements. Despite the fact that the document indicates that said prefabricated elements can be made of prestressed concrete, when FIGS. 8 to 10 are described it is indicated that the vertical attachments will include prestressed ties which can be seen in said figures.
U.S. Pat. No. 5,809,711 describes an apparatus and a method for attaching two precompressed concrete elements that can form structures such as masts, towers or for example bridges. The patent describes prestressed concrete elements, in the form of wall pieces, connected with several prestressed strands which are prolonged extended out of the wall piece and inserted through ducts configured in a superimposed adjacent wall piece, which ducts run through virtually all of said adjacent piece, for the linking thereto by a subsequent tensioning of said extension strands, obtaining universal joints. This constructive solution has the drawback of being limited to developments of little height of the wall pieces, such as voussoir structures, since otherwise the on site assembly of the wall pieces, which must have the strands inserted therein for the post-tensioning of the entire wall piece and the attachment between superimposed wall pieces, would involve a very difficult and complicated operation.
The present invention proposes a vertical support structure or tower, of the type comprising several superimposed annular structural sections, each of which integrates two or more wall pieces attached at their longitudinal edges, and it is different from the previous proposals, which are generally based on the post-tensioning of cables at the actual point of installation of the tower or wind farm, to provide the tower and the attachment joints with strength, by the particularity of building the wall pieces by prestressing in the factory, calculated according to the relative position that the piece will occupy in the tower or structure, therefore the pieces forming the tower, by incorporating the prestressing, are already by themselves structurally resistant, requiring only performing the attachments between the adjacent and superimposed wall pieces to form the tower. Furthermore, costs are reduced by means of the proposal of this invention since prestressing in the factory is an industrial process and since it is not necessary to place post-tensioned cables in the field. On the other hand, the technology applied eliminates the need for auxiliary elements for transport, assures a state of compression in the pieces which maximizes the useful life of the tower, allows new designs and assembly alternatives which simplify obtaining the tower.
Another distinguishing aspect of the proposal on which the present invention is based lies in a connection system between prefabricated elements with pre-tensioned reinforcement, particularly applicable to the attachment of the annular sectors of the column shaft, which allows the continuity of the prestressing action without (complete or partial) need of additional elements such as bond bars or other post-tensioning systems, and compressing the diffusion end areas of each piece in the attachments, using its own prestressing cables which configure the prestressed reinforcement of the pre-tensioned wall pieces mentioned, but which unlike the solution explained in U.S. Pat. No. 5,809,711, only affects a short end sector of each piece in the areas of attachment of the superimposed pieces.
Other documents of the state of the art which can be cited are patents DE 20 2005 020398, EP 1876316, EP 758034, DE 102 23 429, and JP 2004 011210.
The singular aspects of the present invention are described below.

Support structure for a wind turbine and procedure to erect the support structure


An apparatus and method allows selection of either one of main power supplied from a battery and DC Output (DCO) power supplied from a DC/DC converter included in a power management integrated circuit (PMIC) as the input power of an LDO regulator and supply of the selected power to the LDO regulator. The voltage of the input power of the LDO regulator is as low as possible, thus to reduce power loss caused by the LDO regulator. Also, DCO power supplied from the DC/DC converter included in the PMIC is supplied to the LDO regulator as the input power, and if a load connected to the DC/DC converter is turned off, the DC/DC converter is variably controlled to reduce the voltage of the input power supplied to the LDO regulator to be as low as possible, to thus reduce power loss caused by the LDO regulator.

1. Field
This document relates to an apparatus and method of supplying power to an electronic device.
2. Related Art
Generally, power supplies for electronic devices such as mobile phones, personal digital assistants (PDAs), and laptop computers include a power management integrated circuit (PMIC) 10 as shown in FIG. 1.
The PMIC 10 includes a controller 100, a plurality of DC/DC converters 1101, 1102, and 1103, and a plurality of low-dropout (LDO) regulators 1201, 1202, and 1203.
The controller 100 enables the plurality of DC/DC converters and LDO regulators to have a predetermined initial (power) value when the electronic device is system-booted.
Accordingly, main power supplied to the PMIC 10 is converted to different output power components. For example, main power of 3.7V/1500 mA supplied from a battery is converted to DCO1 (DC output1) power of 2.5V/450 mA by the first DC/DC converter 1101.
The main power is also converted to DCO2 power of 3.3V/1000 mA by the second DC/DC converter 1102, and to DCO3 power of 1.3V/500 mA by the third DC/DC converter 1103.
The main power of 3.7V/1500 mA is converted to LDO1 power of 1.8V/100 mA by the first LDO regulator 1201, LDO2 power of 1.5V/200 mA by the second LDO regulator 1202, and LDO3 power of 1.2V/150 mA by the third LDO regulator 1203.
Each converted output power is supplied to each different load as operating power. The DC/DC converter is a voltage converting device for making an output voltage higher or lower than an input voltage. A converter for converting a low input voltage to a higher output voltage is called "step-up converter" and a converter for converting a high input voltage to a lower output voltage is called "step-down converter".
For example, a step-up converter employs a buck DC/DC converter and a step-down converter employs a boost converter. In general, DC/DC converters are classified into PWM (Pulse Width Modulation) type DC/DC converters and PFM (Pulse Frequency Modulation) type DC/DC converters based on switching scheme.
Meanwhile, LDO regulators have the advantage of being capable of supplying a stable voltage having reduced ripple components, as is widely known. In the case of a high input voltage, however, significant power loss may occur while the high input voltage is converted to a lower output voltage.

Apparatus and method for supplying power to electronic device


The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and channel or the region around the boundary interface between the channel and capping layer is doped in a manner such that the piezocharges occurring at the respective boundary interface are compensated.

The present invention relates to a heterostructure as is for example applied in field effect transistors in power electronics and high temperature electronics. With this, in particular heterostructures which have an In(Ga)N channel, an (Al)GaN capping layer and a GaN buffer layer are used. On account of the material properties of GaN and their compounds such as (Al)GaN and In(Ga)N, these heterostructures have been intensively researched in order to permit applications in power electronics and high temperature electronics.
With heterostructures having an In(Ga)N channel, an (Al)GaN capping layer and a GaN buffer layer or GaN substrate, the In(Ga)N (hereinafter InGaN) channel is stressed on account of the differing lattice constants. On account of the material, by way of this in the GaN/InGaN/GaN system there arise piezoelectric fields, which at the boundary interfaces produce polarized charges (piezocharges). A GaN/InGaN/GaN heterostructure at the same time has a positive boundary interface charge at the InGaN/GaN transition and a negative boundary interface charge at the InGaN/GaN transition (interface). With an indium content of 100%, the produced boundary interface charges may reach a charge carrier density of 1.3×1014 cm−2. The advantage of this structure lies in the fact that the charges produced by the piezoelectric fields are located in the channel. On account of the material properties of GaN there additionally form spontaneous polarization charges on the surface and on the buffer rear-face, which however only have a secondary influence on the transistor properties.
Piezoelectric fields in GaN/InGaN heterostructures play a very important part if these structures are applied as irradiation-emitting semiconductor chips (light diodes). In WO 00/21143, the active layer in such a heterostructure comprises a single- or multi-quantum wave structure. In order to eliminate the influence on the piezoelectric fields in the quantum films, which compromises the irradiation behavior of such semiconductor chips, these fields are eliminated as much as possible by way of doping.
FIG. 1 shows in its part picture 1A such a heterostructure with a buffer 1, with a channel 2, with a capping layer 3 and the boundary interfaces 5 and 6 between the layers 1/2 and the layers 2/3, respectively. Furthermore, the piezocharges are shown wherein one may recognize that the produced positive piezocharge, or piezoinduced positive charges, 10 is located on the boundary interface 5 and the produced negative piezocharge, or piezoinduced negative charges, 11 is located on the boundary interface 6. The piezocharges 10, 11 then move oppositely according to the arrows A and B under the influence of an applied external field E.
From literature there are known modulation-doped (MODFET), channel-doped and undoped (piezo-FET) AlGaN/GaN field effect transistors. In the AlGaN/GaN system, stresses also lead to piezoelectric fields that form polarized charges at the boundary interfaces. In contrast to a GaN/InGaN/GaN system, both boundary interface charges are not located in the channel, but the negative charge is located at the AlGaN/GaN interface as 2DEG (2-dimensional electron gas) and the positive charge is located on the AlGaN surface.
The disadvantage of such a structure is the fact that the bonded boundary interface charge at the AlGaN/GaN boundary interface is in interaction with the counter-pole surface charge by way of the polarized fields. The surface charges in DC operation of a GaN-based transistor have little influence on the output characteristics. In RF operation the charge on the surface must follow the channel charge on account of its interaction. Assuming the charges in the channel move at a higher speed than the surface charge, then with a characteristic frequency in RF operation the surface charge no longer follows the channel charge. This now counter-pole, quasi-stationary charge violates the neutrality condition and may now trap the free charges in the channel with the result that the output current reduces and the maximal RF power reduces with respect to the DC power.
In contrast to the AlGaN/GaN system, with the GaN/InGaN/GaN system no boundary interface charge produced by the piezoelectric polarization is located on the sample surface. An interaction between the piezoelectric polarization charge and the surface charge is avoided. By way of this, the effect of current compensation and the resulting power reduction with a high-frequency entry power observed with AlGaN/GaN transistors is reduced.
In a GaN/InGaN/GaN structure, the positive boundary interface charge on the rear-face InGaN/GaN interface and the induced negative boundary interface charge on the GaN/InGaN front-face interface contribute to the transport of current. In comparison to GaN or AlGaN, the electron movability in InGaN is considerably higher and according to theoretical computations may be 4500 cm2/Vsec. The movability of holes in the InGaN is however a multiple smaller than the electron movability. The resulting net current flow given by the positive boundary interface charge and negative boundary interface charge is determined by the condition of the charge neutrality, i.e., the slower hole current determines the resulting cut-off frequency of the component. Furthermore the channel may be blocked by a pn-transition.
It is then the object of the present invention to avoid the above mentioned disadvantages with heterostructures with a channel of a piezopolar.

This patent is subject to a terminal disclaimer.

Heterostructure with rear-face donor doping


A liquid crystal display device includes: transistors and pixel electrodes respectively provided in pixels; a common electrode facing the pixel electrodes; gate lines extending along the first direction and supplying gate signals to the transistors respectively; gate lead lines extending along the second direction and respectively connected to the gate lines at at least one of a plurality of intersections between the gate lead lines and the gate lines; and data lines extending along the second direction and supplying data signals to the transistors respectively. The pixels are made up of a plurality of types of pixels arranged periodically and repeatedly along the first direction, the data lines and the gate lead lines are formed in a same layer, and either of the data lines and the gate lead lines are alternatively provided for boundaries between two pixels adjacent in the first direction.

The present disclosure relates to a liquid crystal display device.
Since it is possible to display an image with low power consumption, a liquid crystal display device is used as an image display device of a television, a monitor, or the like. The liquid crystal display device includes transistors provided in each of a plurality of pixels arranged in a matrix, a plurality of gate lines extending along the row direction, and a plurality of data lines extending along the column direction. In a frame region of the liquid crystal display device, a gate driver that supplies gate signals to the plurality of gate lines and a source driver that supplies data signals to the plurality of source lines are mounted.
Generally, the gate driver and the source driver are provided on different sides of the frame region, but there is known a technique for providing the gate driver and the source driver on the same side of the frame region for the purpose of narrowing the frame (e.g., Japanese translation of PCT publication No. 2008-501138).

PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.


A latchless charging handle that allows for the charging of a rifle without the need to first release a charge handle latch is provided herein. The latchless charging handle contains a detent ball assembly that engages a latch pocket on the rifle's upper receiver and acts as the charging handle's latch mechanism. When a rifle operator charges the rifle, the operator exerts a pulling force on the latchless charging handle that causes the detent ball to depress thereby freeing the charging handle from the rifle's upper receiver. When the bolt returns to battery, the detent ball assembly re-engages the latch pocket on the rifle's upper receiver and secures the charging handle.

1. Field of the Invention
The present invention relates to charging handles for rifles, and more specifically, to an ambidextrous charging handle for use with an AR-15® type rifle that does not use a latch to secure the charging handle to the rifle.
2. Description of the Related Art
Modern repeating firearms utilize a bolt to engage and fire ammunition. The ignition of the ammunition not only fires the bullet, but also causes the bolt to cycle. Most firearms then utilize a system to return the bolt to a firing position, battery, which is usually a mechanical return spring. Sometimes, however, the weapon may experience a minor malfunction, either in the feeding of ammunition or in the return system or some other malfunction, which causes the bolt to jam in a position that does not allow firing. To this end, early charging handles, which were essentially a part of the bolt carrier group itself and cycled with the bolt, were used to return the bolt to firing position. These reciprocating charging handles worked in both directions to retract the bolt and to act as a forward assist, closing the bolt with additional pressure beyond that of the return spring. However, these externally reciprocating parts could cause malfunctions or user injury if accidentally contacted during firing. Hence, non-reciprocating designs, in which the charging handle is separate and will selectively engage the bolt carrier, have become more popular.
Common charging handles are configured as an elongated rod with a rearward handle disposed in a perpendicular orientation with respect to the rod (commonly described as a "T" shape); the handle is grasped and pulled backward, which moves the rod (and the bolt carrier to which it is engaged) in a rearward direction. It is also known within the existing art to provide charging handles with latching mechanisms, commonly called tactical latches, to prevent unintended rearward movement of the charging handle during operation or inspection of the weapon. The forward end of the latch engages the side of the receiver housing, thereby holding the charging handle in position.
Generally, the latch provides a pivoting mechanism held in tension by a spring. The receiver end of the pivoting mechanism features a ramped forward edge which enables the passage of the tensioned latch onto the notched portion of the receiver. Once within the receiver notch, a flattened rear edge of the pivot latch prevents the latch from sliding rearwards, effectively locking the charging handle into the receiver. Once the distal end of the pivoting latch is depressed, the charging handle may be released.
Automatic and semi-automatic rifles, called carbines, are gaining in popularity as a firearm of choice for law enforcement agencies, including police departments of larger metropolitan areas. Agencies have begun a shift from issuing shotguns with multiple projectile rounds to M-16® military and civilian variants able to deliver single projectile rounds with improved accuracy and extended distance. Training officers to properly operate a carbine takes many hours, and the officer has to practice the techniques for handling this new weapon through thousands of repetitions to render the handling techniques habitual and instinctive, which is crucial to enable the officer to respond correctly under stressful situations.
While carbines have certain recognized advantages in different situations, problems have been identified with commonly available charging handles. For example, most charging handles have been designed for right-handed operators; supporting the rifle with the left hand, the operator uses two fingers of the right hand (one on either side of the charging handle rod) to pull backwards on the charging handle in a straight line parallel to the bolt carrier of the rifle, disengaging the latch, and requiring the operator to remove the right hand from the weapon trigger.
Ambidextrous charging handles are known within the art. To ease torsion of the charging handle assembly, manufacturers have taken to adding material to both sides of the charging handle in order for both index and middle fingers to place even linear forces upon the charging bar.
In both single-sided and ambidextrous charging handles, the charging-handle latch must be acted upon in order to release the bolt. This can often be challenging if the firearm has optical devices overriding the charging handle, or limited access to the handle is presented. This task can be even more challenging if the user is wearing gloves, or is situationally compromised such as firing the rifle from a position that prevents access to both sides of the rifle, as when using a tree as a brace for the rifle.
It could be said there exists a need for a latchless ambidextrous charging handle which remains in the forward position unimpeded until use is required. The present invention meets this need by providing the user with a charging handle which sees the standard pivoting latch replaced by a detent ball system, thus allowing the user to release the charging handle easier and more efficiently while still allowing for full retention of the charging handle when not in use.


In a nitride semiconductor device having an active layer 12 between a first electrically conductive type of layer and a second electrically conductive type of layer, a quantum well structure is adopted in which an active layer 12 has at least a well layer 11 formed of a nitride semiconductor containing In and Al and a barrier layer 2 formed of a nitride semiconductor containing Al, whereby a laser device excellent in emitting efficacy at a short wavelength region is obtained. It is particularly preferable that said well layer 1 is formed of AlxInyGa1−x−yN (0<x≦1<0<y≦1, x+y<1) and said barrier layer 2 is formed of AluInvGa1−u−vN (0<u≦1, 0≦v≦1, u+v<1).

Currently, a semiconductor laser using a nitride semiconductor has an increased demand on utilization of an optical disk system which can record and reproduce information at a large capacity and a high density. For this reason, a semiconductor laser device using a nitride semiconductor has been intensively studied. In addition, it is thought that a semiconductor laser device and a light emitting device using a nitride semiconductor can be oscillated at a wide region from ultraviolet to red color. Therefore, it is applied not only to a light source for the aforementioned optical disk system but also to a light source for a laser printer and an optical network. The present applicant have already announced a laser which can continuously oscillate for longer than ten thousands hours under the conditions of 405 nm, room temperature and 5 mW.
In addition, a laser device, a light emitting device and a light receiving device using a nitride semiconductor have a structure in which an active layer may be formed by using a nitride semiconductor containing In and, therefore, formation of a more excellent active region in an active layer becomes important for improving the device properties.
In addition, in a nitride semiconductor device, particularly, in a laser device and a light emitting device, light emitting and oscillation at a wavelength of 380 nm or shorter are highly required. In the aforementioned optical disk system, a recording density is improved by a shorter wavelength and, in a light emitting device, a nitride semiconductor device becomes important as a light source for exciting a fluorescent body. Also in other applications, many uses can be realized by a light source of further shorter wavelength.
In order to obtain light emitting at a short wavelength in a nitride semiconductor laser device or light emitting device, an emitting wavelength can be varied by changing an In crystal mixing ratio in a nitride semiconductor containing In in an active layer or a light emitting layer and more specifically, an emitting wavelength can be shortened by decreasing an In crystal mixing ratio. In addition, when an active layer has a structure in which said active layer is sandwiched between an upper cladding layer and a lower cladding layer in an end emitting device or a laser device, by rendering a refractive index of both cladding layers small and rendering a refractive index of inside of a waveguide between an upper cladding layer and a lower cladding layer high, the light is effectively confined in a waveguide, which results in contribution to decrease in a threshold current density in a laser device.
However, as a wavelength grows shorter, it becomes difficult to use a quantum well structure of InGaN or InGaN/InGaN which have previously been used as a light emitting layer and, at a wavelength of not greater than 365 nm corresponding to a band gap for GaN, it becomes difficult to use InGaN as a light emitting layer. In addition, when a wavelength becomes shorter, the loss occurs due to light absorption in a guiding layer in a waveguide, resulting in an enhanced threshold current. Further, also in light confinement by an upper cladding layer and a lower cladding layer, since the use of GaN maintains a difference in a refractive index for loss due to light absorption and light confinement in a waveguide, it is necessary to use a nitride semiconductor having a great Al ratio and, thus, a problem of the crystallizing property becomes more important.
In addition, as an attempt to make a wavelength of such the nitride semiconductor device shorter, a quantum well structure of AlGaN/AlGaN is used and, however, there is a tendency that sufficient output can not be obtained as compared with the conventional InGaN system.
In addition, in the case where a nitride semiconductor containing Al such as AlGaN is used in an device, a difference in the thermal expansion coefficient and the elasticity are greatly different as compared with other nitride semiconductors containing no Al and, thus, when a nitride semiconductor containing Al is used, crack is easily produced, production of crack destroys an device unlike the other crystallizing properties and, therefore, if crack is not prevented from occurring, an device does not serve as a nitride semiconductor device. For this reason, in a light emitting device and a laser device using the aforementioned active layer having an emitting wavelength of 380 nm or shorter, since a nitride semiconductor containing Al can make the band gap energy greater in a nitride semiconductor, it is used in an active layer, as well as a carrier confining layer, a light guiding layer and a light confining layer having the greater band gap energy than that of the active layer. That is, in the aforementioned light emitting device of a shorter wavelength area, a nitride semiconductor containing Al has a multi-layered structure. On the other hand, the aforementioned problem of production of crack becomes serious and, therefore, there is a tendency that shorter wavelength and prevention of crack production has the contradictory relationship, and this becomes a serious barrier to more shorter wavelength in a light emitting device of a nitride semiconductor. Further, since GaN has an absorption end for light at 360 nm and has a high absorption coefficient even at a region of a longer wavelength than that of the end by around 10 nm, it becomes difficult to use GaN in a light emitting device and a laser device in the aforementioned shorter wavelength area of 380 nm or shorter.
In addition, since an active layer in a light emitting device or a laser device has the emitting efficacy and the internal quantum efficacy depending greatly upon the crystallizing property thereof as described above, the crystallizing property of an electrically conductive type of layer arranged below an active layer becomes an extremely important factor for improving the properties of an device. Usually, a nitride semiconductor light emitting device has a structure in which a n-type layer, an active layer and a p-type layer are laminated in this order and, in this case, it is necessary to make the crystallizing property of a n-type layer better. On the other hand, as described above, there is a tendency that the crystallizing property of a nitride semiconductor containing Al is greatly deteriorated as compared with other nitride semiconductors containing no Al and, previously, for the purpose of avoiding such the problem, a nitride semiconductor layer containing In is used as a substrate layer for a nitride semiconductor containing Al to alleviate occurrence of the internal stress due to a difference in the thermal expansion coefficient, a nitride semiconductor containing no Al such as Ga is provided adjacent to a nitride semiconductor layer containing Al to realize recovery of the crystallizing property and alleviation of the internal stress, whereby, it allows an device such as a laser device having a structure in which a nitride semiconductor layer containing Al is provided therein, to be practically exerted. However, in the aforementioned light emitting device and laser device having a shorter wavelength, a nitride semiconductor containing no Al becomes a light-absorbing layer and use of it in an device structure is not preferable and, for this reason, most of device structures use a nitride semiconductor layer containing Al. Thus, a light emitting device and a laser device having the practical threshold Vf and emitting efficacy can not be obtained due to the aforementioned crystallizing property and occurrence of crack and, in particular, in a laser device which uses much nitride semiconductors containing Al and having a greater Al crystal mixing ratio in a light-guiding layer or a cladding layer for light confinement, a laser device which can be continuously oscillated at room temperature can not be obtained.

Abstract: Such a light emitting device is realized to obtain excellent efficacy in emitting light of short wavelength in a region of 380 nm.


The present invention relates to a method of negotiating an active or a passive role assignment to a first and a second control means of a network element. The control means are redundant and operate dependent on their respective active or passive role. The invention furthermore relates to a control means therefor, a program module for a control means therefor and a network element therefor.

A network element in a communication network, e.g. a cross-connect equipment in a synchronous digital hierarchy (SDH) network or a switching center in a switched telecommunications network, has to be high reliable. Thus, some components, hardware and/or software components, of such network elements are redundant. For example central processing units (CPU), hardware controller or other control means of a cross-connect equipment are usually redundant. If for example a first and a second controller alternatively may control a predetermined hardware equipment, the first controller may play an active role whereas the second controller may play a passive role or vice versa. Only the active controller controls actively the hardware equipment, the passive controller is in a stand-by mode concerning the hardware to be controlled. The passive controller may however perform other functionalities in the passive/stand-by mode. The respective active role or passive role has to be assigned to the first and the second controller in order to avoid active-active or passive-passive conflicts between the first and the second controller. In an active-active conflict both controllers intend to control the hardware, in a passive-passive conflict none of both is responsible for the hardware.
It is known that a superordinated third controller coordinates the respective active role and the passive role of the first and the second controller. The third controller assigns the active role to the first and the passive role to the second controller or vice versa. It is however expensive to provide a superordinated controller. Furthermore, the superordinated controller is an additional source of error. In the case of, e.g., a malfunction of the superordinated controller or of a disturbed communication between the superordinated and the subordinated controllers, the active and passive roles cannot be properly assigned to the subordinated redundant controllers.

Method of negotiating an active or a passive role assignment to a control means of a network element, a control means, a program module and a network element therefor

Abstract: The method comprises the steps of:                determining an operability state parameter for each of said control means dependent on their respective ability to perform their respective functionality;        mutually transmitting said operability state parameters between said control means; and        determining an active role or a passive role by said control means dependent on said respective operability state parameters.


A robot including an arm, a tool attached to the arm, a measurement fixture to be attached to a tip portion of the tool detachably, and a controller that recognizes a reference coordinate system used to control the arm, and that controls the arm. The controller stores data indicating a positional relationship between a tip of the tool and the measurement fixture or data to be used to calculate the positional relationship, and the controller calculates positional coordinates of the tip of the tool in the reference coordinate system based on position data of the measurement fixture and the positional relationship, where the position data is detected by using acquired image data from a visual sensor whose position is associated with the reference coordinate system.

In the related art, there is a known technology in which a visual sensor having a line of sight in a vertical direction is employed to perform: a step of disposing a tip of a tool at the center of a viewing field of the visual sensor by means of a robot; a step of moving the center of the tool in a translating manner in the vertical direction by means of the robot; and a step of variously changing the orientation of the robot supporting the tool in that state, thus determining the position of the tip of the tool. For example, see Publication of Japanese Patent No. 4191080.
In addition, there is a known technology in which a reflector is attached to a tool of a robot, and the position of the reflector is detected by means of a laser tracker. For example, see Japanese Unexamined Patent Application, Publication No. 2006-181591.

Robot, measurement fixture, and tool-tip-position determining method


A football interactive simulation trainer for quarterbacks and kickers provides true perspective views of a simulated playing area during practice plays, as would be seen by a training player on a regulation size football field during an actual play. The trainer includes a sonic tracking system which has a plurality of ultrasonic transducers spaced apart around the perimeter of an actual playing area for detecting positions of the training player and motion of the football during a practice play. The transducers are selectively grouped and directed in selected directions to establish regions of overlap so that several of the transducers will simultaneously detect the positions of the training player and several of the transducers will simultaneously detect the motion of the football. A data processing system receives data signals from the transducers, and determines the positions of the training player and the trajectory of the football within the actual playing area. Reactions of the simulated players to the different positions of the training player are determined, and video images are projected onto the video display wall with changing values of magnification and lines of sight to provide the training player with the true perspective views of the simulated playing area. The data processing system also projects the trajectory of the football into the simulated playing area, and video images are projected on the video display wall of the flight of the football, subsequent reactions of the simulated players to the trajectory of the football and the result of the play.

1. Field of the Invention
The field of invention relates in general to simulation trainers and position detection systems, and in particular to a football training simulator having a multi-frequency, narrowband ultrasonic radar tracking system.
2. Description of the Prior Art
Sports simulation trainers have been provided for training athletes and contestants for particular types of sporting events. One example of such a sports simulation trainer is a golf simulator. These prior art simulators have infrared position detection systems which detect the position at which a spherical ball in flight passes through a plane around which infrared detectors are positioned. Infrared light emitters are positioned around the plane and transmit infrared light beams across the plane to detectors which are positioned opposite of the infrared light emitters. A second set of infrared emitters and detectors may also be provided around a second plane. As a golf ball travels through one of the planes, it breaks one of the beams of infrared light and prevents the beam from passing across the plane to a detector, indicating the position at which the ball is passing through the plane.
These types of infrared position detection systems provide a general determination of the path and speed of a round golf ball between two points, yet they are not accurate enough to detect critical rotational and aerodynamic factors required to accurately determine the trajectory of an oblong object, such as a football. Current infrared position detection systems will not detect the motion of an object with enough accuracy to determine both the velocity of the object and other critical aerodynamic factors, such as the objects orientation, rotation, wobble and spin. Detection of these types of critical aerodynamic factors are required to determine the trajectory of a football with enough accuracy to provide an effective football simulation trainer for use by professional athletes.


A method for gas metal arc welding a first component formed of nitrided steel to a second component with reduced porosity in the weld is provided. A welding wire including a core surrounded by a tube is used to weld the components. The material of the core is formed of mild steel including 0.7 to 3.0 wt. % aluminum and 0.7 to 1.5 wt. % titanium. The material of the tube is formed entirely of low carbon steel. During the weld process, the nitrogen from the nitrided steel combines with the aluminum and titanium of the welding wire to form aluminum nitride and titanium nitride, instead of nitrogen bubbles which lead to high porosity. The method can be used to weld components used in automotive applications, for example to weld a ring gear and can of a flexplate, but alternatively could be used for another automotive or non-automotive applications.

1. Field of the Invention
The invention relates generally to a method for welding of surface treated metal components, such as for example gas metal arc welding (GMAW) of nitrided steel components, and welded structures formed of surface treated metal components.
2. Related Art
Steel components used in automotive vehicle applications are oftentimes joined by a welding technique. Laser beam welding is one type of joining technique that offers a number of advantages, such as for instance low heat input, short cycle time and good cosmetic welds. The process is frequently used in high volume applications, such as for instance the welding together of powertrain components in the automotive industry. In this way, components that contain multiple grades or multiple types of material can be manufactured at relatively low production cost.
Gas metal arc welding is another method used to weld metal components, for example steel components used in automotive vehicle applications. This welding technique includes forming an arc between a consumable wire electrode and a joint between the two metal components to transfer material from the wire electrode to the joint. The heated wire material can be transferred by various different methods, for example globular, short-circuiting, spray, and pulsed spray. The material transferred from the wire electrode to the joint melts a portion of the two components along the joint and forms a weld. The weld includes a mixture of materials from the two components as well as the material from the consumable wire electrode. The GMAW technique is relatively fast and can be automated. Thus, it is oftentimes a preferred technique for welding components in the automotive industry.
It is also oftentimes desirable to weld components formed of nitrided steel. Nitriding is a type of heat treatment that diffuses nitrogen into the surface of the steel component. The nitriding of steel is becoming more common because it allows for the use of thinner components, which reduces weight. Nitriding is also desirable because it increases the tensile strength, yield strength, and hardness of the component. The nitriding process can include gas nitriding, salt bath nitriding, or plasma nitriding. However, when GMAW is used on a nitrided steel component, the resulting weld includes an undesirably high porosity caused by nitrogen bubbles coming from the nitrided steel. This high porosity can affect the quality and performance of the weld and thus should be avoided. One technique used to avoid the high porosity is to remove the nitrided layer from the surface of the steel component in the welding zone, and then mask the surrounding areas of the nitrided steel component, before the GMAW process. Thus, the weld is formed from a portion of the component which does not include the nitrided layer, and therefore the nitrogen bubbles leading to the undesirable porosity in the weld are avoided. The cost and time required to remove the nitrided layer and mask the surrounding areas, however, is not ideal.

Method for gas metal arc welding (GMAW) of nitrided steel components using cored welding wire


The present disclosure discloses an optical imaging system including sequentially, from an object side to an image side along an optical axis, a first lens, a second lens, and at least one subsequent lens. The first lens may have: a first transmission surface disposed on an outer circumference of an object-side surface of the first lens; a first reflection surface disposed on an outer circumference of an image-side surface of the first lens; a second reflection surface disposed at a paraxial region of the object-side surface of the first lens; and a second transmission surface disposed at a paraxial region of the image-side surface of the first lens. A distance TTL from a center of the object-side surface of the first lens to an image plane of the optical imaging system on the optical axis and an effective focal length f of the optical imaging system may satisfy: TTL/f≤0.6.

At present, photosensitive elements commonly used in optical systems include charge-coupled devices (CCD) and complementary metal-oxide semiconductor (CMOS) image sensors. With the improvement in performance and reduction in size of the elements, requirements for camera lens assemblies are also constantly increasing.
In order to match the photosensitive elements, the overall lengths of optical lens assemblies need to be further reduced to meet the requirements of miniaturization and lightweight. However, the current camera system equipped with a refractive optical system, a reflective optical system, and an imaging optical system cannot meet the requirement of miniaturization, and has difficulty in matching an imaging device that is becoming increasingly miniaturized.
Accordingly, the present disclosure is aimed to provide an optical imaging system with high performance, which meets the miniaturization requirement and can effectively improve aberrations.


A laser irradiation process includes: scanning a substrate with laser having a predetermined lasing frequency at different irradiation intensities to form a plurality of first irradiation areas corresponding to the irradiation intensities; illuminating the first irradiation areas to reflected light receive from the fist irradiation areas; determining microcrystallization intensity based on the received reflected light; and determining irradiation intensity based on the thus determined microcrystallization intensity. The laser irradiation process uses the irradiation intensity for irradiating a polycrystalline film in a product semiconductor device.

1. Field of the Invention
The present invention relates to a method and apparatus for irradiating laser and, more particularly, to the technique such as used in a laser annealing process performed for forming g a polycrystalline thin film by irradiating a semiconductor thin film with a laser.
2. Description of the Related Art
A polycrystalline silicon thin film (referred to as polycrystalline-Si film hereinafter) is adopted as a conductive film of a thin-film-transistor (TFT) device formed on a glass substrate because of the easiness for processing. Generally, an excimer laser annealing (ELA) technique is employed to form the polycrystalline-Si film. In the ELA process, an amorphous silicon in film (referred to as amorphous-Si film hereinafter) is formed on the substrate, and a pulse beam of excimer laser is irradiated on the thus formed amorphous-Si film. The amorphous-Si film is melted by the irradiation of the laser, and then recrystallized through a cooling down, consequently to form a polycrystalline-Si film. It is generally known that a larger grain size of the polycrystalline-Si film provides excellent properties for the TFT device, especially in the carrier mobility thereof. Therefore, it is desired to form the crystal grain as large as possible in the polycrystallization of the amorphous-Si film.
In the process of polycrystallizing the amorphous-Si film, along with an increase in the irradiation intensity of laser, a shift is caused from a crystallization (ordinary crystallization) wherein a relatively large crystal grain is obtained toward a microcrystallization wherein a finer crystal grain is obtained. The ordinary crystallization is caused when the amorphous-Si film is not completely melted, and thus nuclei are generated at random at the boundary surface between the solid phase and the liquid phase of silicon or the boundary surface between the amorphous-Si film and the substrate, during the recrystallization. In the ordinary crystallization, the diameter of the crystal grain increases as the irradiation intensity is increased.
On the other hand, the microcrystallization is caused when the is amorphous-Si film is completely melted, and thus nuclei are generated in a relatively uniform state in the entire film, during the recrystallization. The diameter of the crystal grain created in the microcrystallization is as small as 100 nm or below. In the microcrystallization, the diameter of the crystal grain scarcely depends on the irradiation intensity. The threshold intensity of the laser at which the shift from the ordinary crystallization toward the microcrystallization occurs is referred to as "microcrystallization intensity". The microcrystallization intensity is a parameter normalized by the thickness of the amorphous-Si film in general.
As described above, in the process of polycrystallizing the amorphous-Si film, the shift from the ordinary crystallization toward the microcrystallization, bounded by the microcrystallization intensity, is abruptly caused with an increase in the irradiation intensity of the laser. That is, when the irradiation intensity of the laser exceeds the microcrystallization intensity, the grain size of the resultant polycrystalline-Si film extremely reduces, whereby a suitable grain size is not achieved. Therefore, in the process of polycrystallizing the amorphous-Si film, it is important to accurately determine the microcrystallization intensity and set the irradiation intensity of the laser smaller than the microcrystallization intensity.
Patent Publications JP-2000-114174A and JP-2002-8976A describe a technique for determining the microcrystallization intensity. According to these patent publications, prior to actual irradiation for forming a polycrystalline-Si film in a TFT device, preliminary irradiation is performed in which the laser is irradiated on a pulse-by-pulse basis onto preliminary irradiation areas provided outside a target irradiation area, on which the TFT device is to be formed. The preliminary irradiation is performed while moving the irradiation position and changing the irradiation intensity within a range over and below the melting intensity of the amorphous-Si film. The relationship between the irradiation intensity and the presence/absence of microcrystallization is derived from the spectral measurement of a Raman light or scattered light for the preliminary irradiation areas, and the radiation intensity at which the microcrystallization starts is determined to be the microcrystallization intensity.
According to the technique of the above patent publications, the actual radiation is performed by irradiating the laser at the intensity lower than the microcrystallization intensity thus determined, which allows the microcrystallization of the amorphous-Si film to be prevented. In the technique of these documents, however, the spectral measurement of a Raman light or scattered light must be performed while the light source for measurement and the light-receiving position for the reflected light are moved to respective preliminary irradiation areas. This impedes improvement in throughput of forming the polycrystalline-Si film.

Method and apparatus for irradiating laser


The present solution relates to a method in a first network node (301) for handling handover of a user equipment (105) from a source cell (303) to a target cell (309) in a communication network (300). The first network node (301) selects (504) the target cell (309) from neighbor cells (309) based on information of cell size, which target cell (309) will be used for handover the user equipment (105) to.

In a typical cellular system, also referred to as a wireless communications network, wireless terminals, also known as Mobile Stations (MS) and/or User Equipment units (UEs) communicate via Radio Access Networks (RAN) to a core network. The wireless terminals may be mobile stations or user equipments such as mobile telephones also known as cellular telephones, and laptops with wireless capability, e.g., mobile termination, and thus may be, for example, portable, pocket, hand-held, computer-included, or car-mounted mobile devices which communicate voice and/or data with radio access network.
The radio access network covers a geographical area which is divided into cell areas, with each cell area being controlled by a base station, e.g. a Radio Base Station (RBS), which in some radio access networks is also called eNodeB (eNB), NodeB or B node. A cell is a geographical area where radio coverage is provided by the radio base station at a base station site. Each cell is identified by an identity within the local radio area, which is broadcast in the cell. The base stations communicate over the air interface operating on radio frequencies with the user equipments within range of the base stations.
In some versions of the radio access network, several base stations are typically connected, e.g. by landlines or microwave, to a Radio Network Controller (RNC), as in Third Generation (3G), i.e. Wideband Code Division Multiple Access (WCDMA). The radio network controller supervises and coordinates various activities of the plural base stations connected thereto. In Second Generation (2G), i.e. Global System for Mobile communication (GSM), the base stations are connected to a Base Station Controller (BSC). The network controllers are typically connected to one or more core networks.
In an Evolved Universal Terrestrial Radio Access Network (E-UTRAN) radio access network the creation of neighbor relations to neighbor nodes is to a large extent automated by the Automatic Neighbor Relation (ANR) feature. ANR is a feature aiming to relieve the operator from needing to manually configure neighbor cell lists and associations, i.e. neighbor relation lists. It is currently only standardized in E-UTRAN eNodeBs and user equipments, but may be used to retrieve information about E-UTRAN, WCDMA and GSM neighbor cells.
FIG. 1, from a Third Generation Partnership Project (3GPP) Technical Specification (TS), shows the main principle of ANR in the case a new neighboring Long Term Evolution (LTE)/System Architecture Evolution (SAE) cell is detected. An eNB 101 controlling a source cell A has an ANR function. As a part of the normal procedures, the eNB 101 instructs a user equipment 105 to perform measurements on neighbor cells, e.g. cell B. The frequency of the measurements on neighbor cells depends on the logic implemented in the eNB 101, and may for example be periodical. The source cell A has Physical Cell ID (Phy CID)=3, and the cell B has Phy CID=5. The function works as follows:
Step 1
The user equipment 105 sends a measurement report regarding cell B to the eNB 101. This report comprises Cell B's Physical Cell ID (PCI), but not it's E-UTRAN Cell Global Identifier (ECGI). The report may comprise for example Phy-CID=5 and information that the signal from the cell B is strong.
Step 2
The eNB 101 instructs the user equipment 105, using the newly discovered PCI as parameter, to read the ECGI, indicated as Global-CID in FIG. 1, the Tracking Area Code (TAC) and all available Public Land Mobile Network Identity PLMN ID(s) of the related neighbor cell. To do so, the eNB 101 may need to schedule appropriate idle periods to allow the use equipment 105 to read the ECGI and the other information from the broadcast channel of the detected neighbor cell.
Step 3
The user equipment 105 reads system control information at cell B on the downlink Broadcast Control Channel (BCCH).
Step 4
When the user equipment 105 has obtained the ECGI of cell B, the user equipment 105 reports the detected ECGI to the eNB 101 controlling the source cell A. The source cell may also be called serving cell. In addition the user equipment 105 reports the TAC and all PLMN IDs that have been detected to the eNB 101.
Step 5 (Not Shown)
The eNB 101 decides to add this neighbor cell B to the neighbor relation list, and may use PCI and ECGI to update the neighbor relation list. If needed, it may setup a new X2 interface between eNB 101 and the new eNB 103. An X2 interface is the interface between two eNBs which supports exchange of signaling information between the eNBs.
This automatic addition of neighbor cells means that potentially "bad" neighbor cells are added and used as handover candidates which may decrease the handover performance, and which leads to an increased number of handovers.
The size of the source cell is configured into an eNB, this attribute is specified in 3GPP as the parameter cellSize providing the size of the cell coverage area of the source eNB. In 3GPP the parameter cellSize is specified with the values verysmall, small, medium, large. The information about cell size is only used in conjunction with a feature called "UE history" with the intention to detect toggling between cells, i.e. a eNB comprises this information when handing over a UE/session to another eNB. The UE history comprises information about cells that a UE has been controlled by in active state prior to the target cell.

Method for handling handover in a communication network


A process is disclosed for working up combustion residues or slags from waste incineration plants or steel works slags in a converter by reacting the molten slag with a metal bath while injecting carbon and oxygen into the metal bath. The converter is subdivided into three adjacent openly communicating zones. An afterburning zone including at least one lance for afterburning directed onto the slag bath is arranged in the vicinity of the slag feed. The lance generates a circulating flow above the slag bath. Following the afterburning zone, a metal bath sump zone is formed for reacting the metal bath with the slag bath. Next, a settling zone is formed, from which the hot combustion gases and the slag melt are drawn off.

1. Field of the Invention
The invention relates to a process for working up combustion residues and slags, respectively, from waste incineration plants or steel works slags in a converter by reacting the molten slag with a metal bath while injecting carbon and oxygen into the metal bath.
2. Description of the Related Art
Processes for working up slags by reaction with a metal bath have already been proposed, the successful reduction of metallic portions from the slags having been feasible in that way. In the processes proposed so far, the reduction potential of the metal bath was controlled by suitable measures, the blowing in of carbon while simultaneously blowing in oxygen through submerged tuyeres having been suggested therefor in the first place.
Yet, a relatively high dust emission rate and hence relatively high iron losses were observed in respective tests. In conventionally operating the proposed processes, converter emissions ranging between 10 and 15% by weight of the total converter contents were determined, thus calling for considerable expenditures in the subsequent purification of offgases.
Apart from the relatively high iron losses, it has been found that the economy of the process may be substantially enhanced only if it is feasible to minimize the demand of carbon and oxygen and to increase its thermal efficiency.

Process for working up combustion residues


The nail polish remover kit is a kit that provides a clean, thorough, and efficient way of removing nail polish from both fingernails and toenails. The kit includes a jar filled with nail polish remover solution, a sponge-like filler inside the jar for absorbing a portion of the solution, and a removable lid with an attached wand having a dauber and a scraper. The solution-saturated filler has vertical slits that allow the user to remove polish from a fingernail, while the jar lid with integrated wand and attached dauber provides for removing polish from toenails and other harder to reach spots. The tip of the wand is provided with a sharpened edge for scraping off excess polish after the removal process has been completed.

1. Field of the Invention
The present invention relates to nail polish remover kits, and more specifically, to a nail polish remover kit that provides the user with a way to effectively remove nail polish from both fingers and toes.
2. Description of the Related Art
Women have applied nail polish to their fingernails and toenails for centuries. Modern nail polish formulations, however, can be difficult to remove when the polish becomes faded, or when it is desired to change the color of the polish or the decorations applied thereto, or simply to clean the nails. Most frequently, the process of removing nail polish from the fingernails and toenails requires the purchase of several items. Round jars containing a sponge imbued with nail polish remover are available for removing nail polish from the fingernails. The sponge has slits defined therein so that each fingernail may be separately inserted into the sponge to soak off the nail polish.
However, this jar and sponge combination cannot be used to remove nail polish from toenails, since it is not feasible to separately insert each toe into the slits defined in the sponge. Consequently, a bottle of nail polish remover and cotton balls are used to wipe nail polish from the toenails. The process is messy and impractical, and sometimes the open bottle of nail polish remover is accidentally knocked over so that the polish remover is spilled onto carpeting, or the wetted cotton balls become stuck to the user's fingernails as they attempt to apply the remover to their toenails, etc. Whether removing nail polish from fingernails or toenails, it is often necessary to have a nail file handy to scrape the last traces of nail polish from the edges of the nails and crevices between the nail and finger. The need to have all of these supplies for the simple task of removing nail polish can not only be costly, but can take up valuable counter and/or travel space.
It would therefore be desirable to provide a single product that includes everything required to remove nail polish from both fingernails and toenails. Thus, a nail polish remover kit solving the aforementioned problems is desired.


A picture quality improvement device has two-dimensional low-pass filter that takes as input a luminance signal YIN that is obtained from a video signal and that extracts low-pass components for a vertical direction and a horizontal direction of the input luminance signal YIN. The picture quality improvement device adds an edge signal, which is obtained by subtracting from luminance signal YIN the low-pass extraction signal (LPF) that has been extracted by two-dimensional low-pass filter, to luminance signal YIN. Two-dimensional low-pass filter is constituted such that the extraction gain of the vertical direction low-pass component and the extraction gain of the horizontal direction low-pass component are independently adjusted.

1. Field of the Invention
The present invention relates to a device and method of improving picture quality of a television set or video projector.
2. Description of the Related Art
The occurrence of flare is known as a cause for degradation of picture quality in an image display device such as a television set or video projector. Flare is a phenomenon in which light in bright areas infiltrates dark areas due to reflection or scattering of light on the lens or projection surface of a picture tube or projector, thereby causing fading at edges (for example, at the border between a white area and a dark area) in a displayed image in which the difference in luminance is great.
The prior art is described based on the description in the specification of Japanese Patent Application No. 2001-086516, which is in an invention that is related to the present invention.
FIG. 1 is a schematic figure showing an example of the original image of an image that is projected by a projector. This original image has a rectangular white area WT in the center that is surrounded by a black area BL, the edge portion ED at the boundary of these two areas having a large difference in luminance. The lower portion of FIG. 1 shows the horizontal video signal (luminance signal) in the vicinity of the center of the original image. When this original image is projected onto a screen by a projector, light of the white area WT infiltrates the black area BL and degrades the edge portion ED, thereby giving rise to flare and reducing the picture quality.
To eliminate the above-described flare, the video signal that is applied as input to the projector is typically subjected to digital signal processing to correct degradation of the edge portions. FIG. 2 is a schematic figure of flare correction, (a) showing waveform chart showing the video signal of the original image, (b) showing the luminance distribution of the screen image that is displayed by means of the video signal of (a), (c) showing a waveform chart of the signal after flare correction of the video signal of (a), and (d) showing the luminance distribution of the screen image that is displayed by means of the video signal after flare correction of (c). Here, the video signal of FIG. 2(a) corresponds to the video signal of the original image that is shown in the above-described FIG. 1.
The screen image that is obtained by using a projector to project the video signal of FIG. 2(a) is an image having edge portions as shown in FIG. 2(b) that have been blunted by the occurrence of flare. To correct this flare, correction (reverse correction) as shown in FIG. 2(c) that corresponds to the blunting of the edge portions shown in FIG. 2(b), i.e., correction that sharpens the edges, should be applied at the rises and falls in the video signal of FIG. 2(a). This correction allows a screen image to be obtained that has no blunting of the edge portions, such as shown in FIG. 2(d).
FIG. 3 shows an example of a picture quality improvement device that performs the above-described flare correction. Of a luminance signal and a color signal (broadband color signal and narrowband color signal) obtained from the primary color signals R-G-B, the picture quality improvement device generates a correction signal for correcting flare from the luminance signal and adds this flare correction signal to the original luminance signal to correct flare. This picture quality improvement device is made up by: vertical low-pass filter (VLPF) 71, horizontal low-pass filter (HLPF) 72, delay circuit 73, subtracter 74, gain adjustment circuit 75, and adder 76.
VLPF 71 takes as input luminance signal YIN that is obtained from primary color signals R-G-B, and has the two outputs "Main out," for outputting the received luminance signal YIN without modification, and "LPF out" for outputting the vertical low-pass component of the received luminance signal YIN that has been extracted. "Main out" is supplied to delay circuit 73, and "LPF out" is supplied to HLPF 72.
Delay circuit 73 applies a time delay that exactly corresponds to the time required for filtering the received signal in VLPF 71 and HLPF 72, and the output of delay circuit 73 is applied to each of the "+" input of subtracter 74, and one of the inputs of gain adjustment circuit 75 and adder 76.
HLPF 72 extracts the horizontal low-pass component from the signal of "LPF out" of VLPF 71, i.e., the signal in which the vertical low pass component of luminance signal YIN has been extracted. VLPF 71 and HLPF 72 together constitute a two-dimensional low-pass filter for flare correction. The output of HLPF 72 (low-pass extraction signal) is supplied to the "−" input of subtracter 74. VLPF 71 and HLPF 72 are both constituted by a FIR (Finite Impulse Response) filter or an IIR (Infinite Impulse Response) filter that is composed of a plurality of registers. For example, VLPF 71 or HLPF 72 may be constituted by the combination of a 12-Tap FIR filter and a 1-Tap IRR filter.
Subtracter 74 subtracts the low-pass extraction signal (the output of a two-dimensional low-pass filter) that is supplied to the "−" input from HLPF 72 from the luminance signal (this being the original luminance signal) that is supplied to the "+" input from delay circuit 73 and supplies the edge signal, which is the subtraction result, to gain adjustment circuit 75.
Gain adjustment circuit 75 prevents a decrease in the sensitivity of the flare correction filter (in this case, a two-dimensional low-pass filter composed of VLPF 71 and HLPF 72) in dark portions of an image in which the signal level is low when a nonlinear signal that is multiplied by gamma is taken as the input signal. Normally, a gamma-multiplied nonlinear signal is taken as the input signal in an image display device such as a television set or projector in consideration of the characteristics of the construction (for example, the characteristic of the cathode ray tube). When such a signal is subjected to filter processing to produce a correction signal (flare correction signal) and added, the linearity of the correction signal itself is lost, the sensitivity of the correction filter falls in dark areas of an image in which the signal level is low, and sufficient improvement in the picture quality is not obtained in dark areas. To prevent this state, the gain in correction signal that is produced by the flare correction filter is regulated by gain adjustment circuit 75. The output of this gain adjustment circuit 75, i.e., an edge signal that is corrected such that the gamma characteristic is linear, is supplied to the other input of adder 76.
Adder 76 adds the edge signal that has been subjected to gain regulation by gain adjustment circuit 75 to the luminance signal (original luminance signal) that is supplied from delay circuit 73 and outputs luminance signal Yout, which is the result of this addition.
In a picture quality improvement device that is constructed according to the foregoing explanation, luminance signal YIN is applied as input to VLPF 71 where the vertical low-pass component is extracted, then applied as input to HLPF 72, where the horizontal low-pass component extracted. At the same time, luminance signal YIN is supplied to delay circuit 73 by way of VLPF 71 and subjected to a prescribed delay by this delay circuit 73.
A low-pass extraction signal in which the low-pass components in each of the vertical and horizontal directions have been extracted by VLPF 71 and HLPF 72 is supplied to the "−" input of subtracter 74, and the original luminance signal that has undergone a prescribed delay by delay circuit 73 is simultaneously supplied to the "+" input of subtracter 74. In subtracter 74, the low-pass extraction signal that is supplied to the "−" input is subtracted from the original luminance signal that is supplied to the "+" input to obtain an edge signal.
FIG. 4(a) is a waveform chart of the edge signal, and FIG. 4(b) is a waveform chart of the original video signal. The edge signal that is shown in FIG. 4(a) is equivalent to edge portions ED relating to the horizontal direction of the original image that is shown in the previously described FIG. 1; the original video signal shown in FIG. 4(b) is equivalent to a video signal of the original image shown in FIG. 1; and adding this edge signal and original video signal can obtain a signal waveform following flare correction that was shown in the previously described FIG. 2(c). In the present form, subtracting the low-pass extraction signal in which the low-pass components in the vertical and horizontal directions have been extracted by means of VLPF 71 and HLPF 72 from the original luminance signal that has undergone a prescribed delay by means of delay circuit 73 obtains the edge signal that is shown in FIG. 4(a).
After undergoing correction by means of gain adjustment circuit 75 such that the gamma characteristic becomes linear, the edge signal that is outputted from subtracter 74 is added by means of adder 76 to the original luminance signal that has been supplied from delay circuit 73, whereby the signal waveform after flare correction that is shown in the previously described FIG. 2(c) is obtained. The output of this adder 76, which is luminance signal Yout, and a color signal (broadband color signal and narrowband color signal), which is obtained from the primary color signals R-G-B, are applied as input to a known matrix circuit (not shown in the figure) to reconvert to an R signal, a G signal, and a B signal, which are the primary color signals. An image is displayed based on the R signal, G signal, and B signal that have been reconverted in this way.
To apply the picture quality improvement device that is constituted as described hereinabove to wide-screen (the aspect ratio of the screen being 16:9), the following process is carried out. A number of display modes exist for applying an image in which the screen aspect ratio is 4:3 to a wide screen in which the aspect ratio is 16:9. FIG. 5 is a figure for illustrating display modes when dealing with a wide screen, (a) showing display on a wide-screen of an original image in which the screen has an aspect ratio of 4:3, (b) showing the display in normal display mode, (c) showing display in full display mode, (d) showing display in zoom display mode, and (e) showing display in nonlinear display mode.
As shown in FIG. 5, when an image in which a circle is drawn in the center for a screen having an aspect ratio of 4:3 is displayed on a wide screen in which the screen has an aspect ratio of 16:9, four display modes exist: normal display mode, full display mode, zoom display mode, and nonlinear display mode.
In normal display mode, the original image of FIG. 5(a) is displayed without alteration in the center of the screen as shown in FIG. 5(b) (this display area being the effective area) and both sides are black areas. In full display mode, an image is displayed in which the original image of FIG. 5(a) is enlarged horizontally at a prescribed magnification as shown in FIG. 5(c). In zoom display mode, an image is displayed in which the original image of FIG. 5(a) is enlarged both vertically and horizontally at the same magnification as shown in FIG. 5(d). In nonlinear display mode, an image is displayed in which the original image of FIG. 5(a) has been subjected to nonlinear image processing in which proportions are equal to the original image within a prescribed region in the center but in which magnification increases with greater distance from the center.
When dealing with a wide screen, display is normally set to any one of the above-described display modes, but a device having the above-described construction entails the following processing when setting to display modes.
(1) Normal Display Mode
When set to normal display mode, an image having black areas on both sides is processed as the original image (an original image having an aspect ratio of 4:3 originally has black areas (blanking areas) above and below and to the left and right of the image), for example, as shown in FIG. 5(b). The device shown in FIG. 3 is constituted for detecting edges, and the edges at the boundaries of the black areas and the effective area therefore rise when processing such an original image, these edges thereby constituting a cause of degradation of picture quality. To prevent this degradation, the following process is carried out.
FIG. 6 is a waveform chart showing horizontal video signal in the normal display mode, a1 being the black area (blanking area) to the left of the image, b being the effective area, and a2 being the black area (blanking area) to the right of the image. In HLPF 72 of the circuit that was previously described in FIG. 3, values Ps of the start of the image are set in all registers at the start timing of effective area b, the values of the registers are shifted to update the image during the interval of effective area b, and the end values Pe are set (held) in the registers without updating the image in black area a2.
Blanking areas normally exist in the upper and lower directions of the screen, and a process that is similar to the above-described processing in HLPF 72 is therefore also performed in VLPF 71.
(2) Full Display Mode
When set to full display mode, correcting flare by means of the circuit shown in FIG. 3 and then extending the original image horizontally at a prescribed magnification means that the correction values themselves are also extended, whereby a sufficient correction effect, which is the object, cannot be obtained. In such a case, the response characteristic of HLPF 72 must be altered (shortened) in accordance with the magnification at which the image is extended. Specifically, the impulse response of HLPF 72 (the filter coefficient) is set such that the edge width of the edge signal, which is the output of subtracter 74, is reduced to the degree that the image is extended.
(3) Zoom Display Mode
When set to zoom display mode, the effect upon correction of extension of an image when in the above-described full display mode also occurs in the vertical direction. In this case, the response characteristic of VLPF 71 and HLPF 72 must be changed (made shorter) according to the magnification of extension of the image. Specifically, the impulse responses (filter coefficients) of VLPF 71 and HLPF 72 are set such that the edge width of the edge signal, which is the output of subtracter 74, is reduced to the degree that the image is extended.
(4) Nonlinear Display Mode
When set to nonlinear display mode, correction is carried out by means of the circuit shown in FIG. 3, following which the original image is subjected to nonlinear extension, whereby the correction value itself undergoes extension and the object correction effect cannot be obtained. In this case, a process for applying nonlinear enlargement to the original image must be performed before the correction by the circuit shown in FIG. 3. In this case, the nonlinear processing circuit for realizing the nonlinear display mode may be provided on the input side of the circuit shown in FIG. 3.
When an image that is displayed by means of video signals is applied to a wide screen by enlarging at a prescribed magnification in the horizontal direction, the vertical direction, or both directions, the amount of amplitude (the size of "a" in FIG. 4) of the edge signal shown in FIG. 4(a) must be adjusted according to the enlargement magnification. In order to realize this adjustment of the amount of amplitude of the edge signal in the picture quality improvement device of the prior art, the vertical low-pass filter and horizontal low-pass filter are configured such that the response characteristics of each are shorter, to a degree that is equal to the above-described prescribed magnification, than the target response characteristic when there is no enlargement of the image. Specifically, the set values of the impulse response (filter coefficients) of the vertical low-pass filter and horizontal low-pass filter are modified. Normally, to realize a filter in which the filter coefficient can be modified, a multiplier is required in the coefficient unit that constitutes the filter, whereby the filter circuit configuration inevitably becomes large. Consequently, there is the problem that a picture quality improvement device of the prior art entails large circuit scale because it requires low-pass filters in which filter coefficients can be freely set.

Device and method for improving picture quality


An emergency vehicle notification system is disclosed. The emergency vehicle notification system includes a transmitter unit including a transmitter microprocessor. A transmitter is connected to the transmitter microprocessor and is adapted to emit radio waves. A transmission strength gauge connected to the transmitter is adapted to measure and indicate the strength of the radio waves. A receiver unit is adapted to receive the radio waves from the transmitter. The receiver unit includes a receiver microprocessor and at least one light connected to the receiver microprocessor.

Emergency vehicles are adapted to alert motorists to their approach typically using a siren and flashing lights. However, many motorists listen to a radio, compact disk or the like as they drive. Furthermore, many cars are virtually sound-proof. Therefore, the siren sound of approaching emergency vehicles may not be discernable to motorists.


A semiconductor device includes an ODT (on die termination) pin coupled to a tester that applies a tester termination control signal thereon. The semiconductor device also includes a measure path that transmits the tester termination control signal from the ODT pin to an ODT circuit during measurement of a parameter of the semiconductor device. The ODT pin and the measure path advantageously allow for control of the ODT circuit by the tester for more accurate parameter characterization.

This application claims priority to Korean Patent Application No. 2004-0033808, filed on May 13, 2004, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates generally to characterization of semiconductor devices, and more particularly, to having separate signal transmission paths for normal operation of the semiconductor device and for parameter measurement of the semiconductor device.
2. Description of the Related Art
A scattering (S) parameter, measured for a semiconductor device such as a memory device, is the ratio of an output signal to an input signal in a frequency domain. The S parameter is comprised of an input reflection coefficient such as S11 and a transmission coefficient such as S21, as known to one of ordinary skill in the art. The S parameter is widely used to determine characteristics (such as an RLC value) of a system operating at radio frequency. U.S. Pat. No. 6,300,775 discloses a network analyzer which is an example of an S parameter measurement instrument.
FIG. 1 schematically shows a conventional memory system 100. The conventional memory system 100 includes a memory controller 110, a bus channel 120, memory modules 130 and 140, and memory slots 150 and 160.
The memory controller 110 controls the memory system 100 so that data is input/output into/from the memory modules 130 and 140 via the bus channel 120. The memory controller 110 is also referred to as a chipset.
The bus channel 120 includes a data bus and a control bus. The control bus transmits a control signal such as a clock signal or an address signal used for controlling data transmission via the data bus.
The memory modules 130 and 140 are installed (or inserted) in (or into) the memory slots 150 and 160, respectively, and are connected to the memory controller 110 via the bus channel 120. Referring to FIG. 1, the memory modules 130 and 140 each are dual in-line memory modules (DiMM) having dual ranks [R0, R1] and [R2, R3], respectively. However, each of the memory modules 130 and 140 may be a DiMM having a single rank. Each rank of a memory module includes at least one semiconductor memory device (such as a DRAM (dynamic random access memory) device).
Each of the memory modules 130 and 140 includes on die termination (ODT) circuits. Each semiconductor device of the memory modules 130 and 140 includes a respective one of the ODT circuits [131, 132] and [141, 142]. Each ODT circuit is a termination matching circuit installed inside of a respective semiconductor memory device for preventing distortion of data caused by signal reflection during normal operation (such as a read/write operation) of the semiconductor memory devices. Each of the ODT circuits [131, 132] and [141, 142] is connected to a DQ pin or a DQ port of the respective semiconductor memory device.
The operation of the ODT circuits [131, 132] and [141, 142] is now described. Assume that the semiconductor memory devices [R0, R1] of the first memory module 130 perform a write operation or a read operation. In that case, the ODT circuits [141, 142] of the second memory module 140 are turned on (or activated) in response to a first termination control signal transmitted via the bus channel 120 for impedance matching with the bus channel 120. Additionally in that case, the ODT circuits [131, 132] of the first memory module 130 are turned off (or deactivated) in response to a second termination control signal transmitted via the bus channel 120. The first and second termination control signals are generated by the memory controller 110.
On the other hand, assume that the semiconductor memory devices [R2, R3] of the second memory module 140 perform a write operation or a read operation. In that case, the ODT circuits [131, 132] of the first memory module 130 are turned on (or activated) in response to the first termination control signal transmitted via the bus channel 120 for impedance matching with the bus channel 120. Additionally in that case, the ODT circuits [141, 142] of the second memory module 140 are turned off (or deactivated) in response to the second termination control signal transmitted via the bus channel 120.
FIG. 2 is a circuit diagram showing an example of an ODT circuit 131 of FIG. 1. The ODT circuit 131 of FIG. 2 is a center tap termination (CTT) type including switches SW1 and SW2 and termination resistors RT1 and RT2. The other ODT circuits 132, 141, and 142 of FIG. 1 are implemented similarly as the ODT circuit 131 of FIG. 2.
Each of the switches SW1 and SW2 may be implemented as a MOS transistor. Each of the switches SW1 and SW2 turns on the ODT circuit 131 in response to the activation of a first termination control signal ODT_C (i.e., when the ODT_C signal has a logical high state). That is, the switches SW1 and SW2 turn on within the ODT circuit 131 to couple a power supply voltage VDDQ to a first termination resistor RT1 and to couple a ground voltage VSSQ to a second termination resistor RT2.
When the switches SW1 and SW2 are closed for such coupling of the voltages VDDQ and VSSQ to the termination resistors RT1 and RT2, the ODT circuit 131 is deemed to be turned on. On the other hand, when the switches SW1 and SW2 are opened such that the voltages VDDQ and VSSQ are disconnected from the termination resistors RT1 and RT2, the ODT circuit 131 is deemed to be turned off.
The termination resistors RT1 and RT2 have the same resistance. The termination resistors RT1 and RT2 are connected together at a node A that is also connected to a DQ pin of the respective semiconductor memory device having the ODT circuit 131 therein.
A scattering parameter such as the S11 parameter is desired to be measured by a network analyzer (which is an example tester) from the DQ pin of the semiconductor memory device. Such a scattering parameter is used for designing the bus channel 120 to which the memory modules 130 and 140 and the memory controller 110 are coupled.
Conventionally, the S11 parameter is measured in a state where the ODT circuit of the semiconductor memory device is turned off (i.e., the switches SW1 and SW2 are turned off in FIG. 2) after power is supplied to the semiconductor memory device. However, the semiconductor memory devices in FIG. 1 perform normal operations with the ODT circuits being turned on or off. Thus, the S11 parameter measured in the conventional manner does not accurately characterize the bus channel 120 during normal operation of the semiconductor memory devices.
With such inaccurate characterization of the bus channel 120, integrity of the signals transmitted within the memory system 100 is compromised, especially at higher operating frequencies of the memory system 100.
Thus, a mechanism is desired for more accurately measuring a parameter from a DQ pin of the memory device with control of the ODT circuit coupled to the DQ pin.

Parameter measurement of semiconductor device from pin with on die termination circuit


A clock generator based on a phase-locked loop with one pole and an improved period jitter characteristic is disclosed. The clock generator comprises a phase detector for generating a phase detection signal and a phase error signal, a charge pump for generating a loop control voltage, a loop filter for generating an integrated voltage signal, a voltage-controlled oscillator for generating multi-phase output signals, and a phase error compensating circuit for compensating a phase error generated at a prior input clock. The clock generator has an improved period jitter characteristic by compensating a phase error generated at a prior input clock.

1. Field of the Invention
The present invention relates to a clock generator having a phase-locked-loop (PLL) and a method of generating a clock, and more particularly to a PLL-based clock generator with one pole that is able to improve a period jitter characteristic and a method of generating a clock using the same.
2. Related Art
A clock generator is a device that provides a clock signal to various digital systems. FIG. 1 is a schematic block diagram which illustrates a conventional PLL-based clock generator using a voltage-controlled oscillator (VCO) 40. Referring to FIG. 1, the output of the VCO 40 is sampled in a sampler 50 and changed to a signal FFEED having a low frequency in a divider 60. The signal FFEED is applied to a phase detector 10. The output signal PDET from the phase detector 10 is applied to a charge pump 20, which generates a signal LCV, which is applied to a loop filter 30. The output of the loop filter is applied to the VCO 40, and the output of the VCO PCLK is fed back through the sampler 50 and the divider 60 to an input terminal of the phase detector 10. The output signal FFEED of the divider 60 is inputted to one input terminal of the phase detector 10. The clock input signal FIN is inputted to another input terminal of the phase detector 10. The output of the phase detector 10 is changed to a loop control signal LCV, and is inputted to the loop filter 30. The loop filter 30 sets a bandwidth of the circuit, and the output of the loop filter 30 is inputted to an input terminal of the VCO 40.
The conventional clock generator shown in FIG. 1 has two poles. One of the two poles is generated by a capacitor (not shown) in the loop filter 30, and the other is generated at the output of the VCO 40.
The 2-pole system is unstable, and needs to be stabilized by adding a zero in the loop filter 30. However, stabilizing the system using this method may deteriorate the period jitter characteristic of the circuit.
There are two methods for preventing the deterioration of the period jitter characteristic. One is to design a clock generator based on a delay-locked loop (DLL), and the other is to design a clock generator based on PLL of which the cycling nature is compensated.
Referring to FIG. 1, the pole generated by the loop filter 30 is necessary to change the ac signal to dc signal and control the VCO 40. The pole at the output terminal of the VCO 40 is generated because the frequency of the output of the VCO 40 is compared in the phase detector 10 in the form of phase. The phase of the pole at the output terminal of the VCO 40 is represented as an integration form of frequencies.
A method to design a clock generator based on DLL uses a voltage-controlled delay line (VCDL) instead of VCO. In this method, the pole is only generated by the capacitor comprising the loop filter because the phase is compared and controlled. Thus, a one-pole system can be implemented in this method. However, there is a limit in applying this method to wide range of frequencies.

Clock generator with one pole and method for generating a clock