A method of recording test information to identify a location of errors in Integrated Circuits (ICs) includes scanning a plurality of ICs with an input signal, each IC having a plurality of data locations and comparing an output response at each data location with an expected value for the data location. The method also includes storing an address in a buffer for each data location where the response at the data location does not equal the expected value corresponding to the data location.

A semiconductor manufacturing test process commonly has a burn-in test processing step. A burn-in test stresses integrated circuits (ICs) at higher temperatures (e.g., 125° C.) for several hours in an effort to damage weak memory cells. A burn-in test is typically performed on ICs after the ICs have been packaged.
Some ICs have been manufactured to include redundant elements. A redundant element includes identical memory cells grouped in either a word line (WL) or a bit line (BL). In another words, one primary element on an IC could have one or more redundant elements that are identical to the primary element. If during a test process, the primary element fails, redundant elements that do not fail the test can be used in place of the primary element. Historically, implementing redundancy repairs could only occur prior to packaging, while the ICs were still on a wafer.
Recent developments in semiconductor manufacturing, like electronic fuses and wafer scale packages, make it possible to now perform repairs after the IC is packaged. Therefore, repairs after burn-in can be made to improve the yield of ICs.

Recording test information to identify memory cell errors


The invention provides a washing machine (10) having a front panel (11), a tube (14) for containing articles to be washed, a water inlet (16) for admitting water to the tub, a water outlet (26) for discharging water from the tub (14), a pump (50) for pumping water from the tub (14) to the water outlet (26) and a cointrap (60) located in the water outlet (26) between the tub (14) and the pump (50), characterized in that the cointrap (60) is positioned within the front panel (11) to allow the contents of the cointrap (60) to be viewed.

The invention relates to a domestic appliance. Specifically, the invention relates to a washing machine.
A conventional washing machine consists of a tub or drum in which articles to be washed are placed and means are provided for agitating the articles inside the tub or drum in the presence of water and detergent. Inlet means for providing water and detergent to the tub or drum form part of the washing machine. The tub or drum is also provided with a water outlet via which water or water and detergent can be drained from the tub or drum. A pump is provided in the water outlet for removing water from the tub or drum.
It sometimes happens that small objects are inadvertently placed in the tub or drum when the articles to be washed are placed therein. It is also possible for items such as buttons or other fastening or decorative items to become dislodged from the articles during the washing process. It is highly undesirable for these items to pass through the pump since this could cause damage to the pump itself. In order to reduce the risk of any foreign body passing through the pump, a cointrap is placed upstream of the pump in the water outlet. The cointrap is essentially a chamber having a cross sectional area which is significantly larger than that of the water outlet, which is normally formed by means of a pipe or conduit. The increased area of the chamber causes a reduction in the velocity of the out-going water and large items which were previously carried along with the flow of out-going water drop out of the flow and collect in the cointrap. It will be understood that all reasonably sized items will be caught by the cointrap, which is not specifically designed to trap only coins. Buttons, paper clips, zipper heads and other items which might otherwise damage the impellers of the pump will also reliably be extracted from the outflow of the water and retained within the cointrap.
It is a disadvantage of known washing machines that, in order to inspect the interior of the cointrap, perhaps to recover a specific item, a portion of the cointrap must be removed in order to gain access. This is particularly inconvenient if it is not known whether the item being sought is located within the cointrap. Furthermore, cointraps can collect significant numbers of items over a period of time and, if the number of items collected is too great, the contents of the cointrap can begin to restrict the outflow of water from the tub or drum. Apart from an inevitable decrease in the efficiency of the cointrap, this can also result in an increased risk that a foreign item or body may enter the pump and may cause damage thereto.
It is a further disadvantage of known washing machines that when a cointrap requires to be opened for access, perhaps to retrieve an item retained therein or to remove a blockage from the adjacent pump, the cointrap is usually filled with water. This can make the process of gaining access to the cointrap inconvenient and messy. In turn, this discourages the user from accessing the cointrap at regular intervals in order to empty it.
It is an object of the present invention to provide a washing machine having a cointrap in which access to the cointrap is gained only when access is known to be required. It is a further object of the invention to provide a washing machine having a cointrap which can be easily and conveniently accessed. A further object of the invention is to provide a washing machine having a cointrap which is simple and convenient to maintain.
A first aspect of the invention provides a washing machine having a front panel, a tub for containing articles to be washed, a water inlet for admitting water to the tub, a water outlet for discharging water from the tub, a pump for pumping water from the tub to the water outlet and a cointrap having a transparent window, the cointrap located in the water outlet between the tub and pump, characterised in that the cointrap is positioned within the front panel to allow the contents of the cointrap to be viewed.
The provision of a transparent window in the cointrap allows a user visual access to the contents of the cointrap. This enables the user to see whether a specifically sought item has been trapped in the cointrap. It also allows the user to become aware when the cointrap is becoming full. The user is then alerted to the fact that maintenance is required. If the window provides visual access to the pump as well as to the interior of the cointrap, then the user can inspect the operation of the pump in the event that a malfunction is suspected.
A second aspect of the invention provides a washing machine having a tub for containing articles to be washed, a water inlet for admitting water to the tub, a water outlet for discharging water from the tub, a pump for pumping water from the tub to the water outlet and a cointrap located in the water outlet between the tub and the pump, the cointrap having a housing, the housing having a panel moveable between a first position and a second position, characterised in that the moveable panel has a drainage outlet, in that, in the first position, the moveable panel is sealed to the housing and the drainage outlet is closed, and in that, in the second position, the moveable panel is sealed to the housing and the drainage outlet is open.
Preferably, the moveable panel remains sealed to the housing during movement between the first position and the second position. More preferably, a moulded rubber seal is located between the housing and the moveable panel.
The provision of a drainage outlet which can be opened merely by movement of a moveable panel of the cointrap allows any water retained in the cointrap to be drained before physical access to the cointrap is gained. Preferably, the moveable portion is circular and is moveable about an axis of the cointrap which, preferably, is located centrally of the moveable panel.
It is preferred if, in the case of front-loading washing machines, the window or moveable portion of the cointrap is located so that it forms part of the front panel of the washing machine. This will provide convenient and immediate access to the window or moveable panel for the user. Further and advantageous features of the invention are set out in the subsidiary claims.


A server for controlling an output of a sound from a sound output device provided in a room of a destination of a moving user, the server including: an information acquiring section configured to acquire position information indicating a position of the user, the destination, and route information indicating a route of the user to the destination; and a control section configured to, in a case in which the user reaches a position within a predetermined range from the destination, control the sound output device to start the output of a sound that simulates a situation in which a person is present in the room based on the position of the user indicated by the position information and the route of the user indicated by the route information.

Technical Field
The present disclosure relates to a server, a control method, and a non-transitory computer readable medium storing a control program.
Related Art
Japanese Patent Application Laid-Open (JP-A) No. 2016-18259, discloses a crime prevention system that output a warning message to an intruder who may be in a room of a user's house before a user comes home. In the technique disclosed in JP-A No. 2016-18259, it is determined whether an intruder is present or absent in a room on the basis of radio wave intensity between an indoor master unit and an entrance slave unit performing wireless communication with the indoor master unit. In a case in which the intruder is present in the room or in a case in which it is not determinable whether the intruder is present or absent in the room, a warning message for urging the intruder to leave the room is output to the room
However, in the technique described in JP-A No. 2016-18259, only the warning message is output to the intruder who has already intruded into the room, and it is impossible to originally inhibit the intruder from intruding into the room. For this reason, in the technique described in JP-A No. 2016-18259, for example, when the user comes home, it is not possible to inhibit a suspicious person from intruding into the room together with the user.

Server, control method, and non-transitory computer readable medium storing control program


A synthetic process of perfluoropolyether iodides, by reaction with LiI of monoacyl- or diacyl-halides of perfluoropolyethers, having number average molecular weight from 200 to 3,000, and having the following structure:

The present invention relates to a process for the iodination of perfluoropolyether acylhalides having the formula:
XCOxe2x80x94CF2O[(CF2O)n(CF2CF2O)m]pCF2xe2x80x94Qxe2x80x83xe2x80x83(II)
wherein X, Q and the indexes have the values defined hereunder to obtain perfluoropolyethers having iodinated xe2x80x94CF2I end groups with high yields.
The iodinated perfluoropolyethers are usable as oleohydro-repellent compounds, or as components for preparing fluororesins, fluoroelastomers; or used as precursor of fluorinated surfactants.
Methods to iodinate perfluoropolyether acylhalides are known in the prior art, but having repeating units different from those of formula (II).
The iodination is for example carried out by reacting an acylfluoride with iodine in the presence of a perhalogenated solvent and of an alkaline or alkaline-earth metal carbonate, as described for example in EP 348,948. As an example of perhalogenated solvent hexachloro-1-3-butadiene is mentioned. The drawback of this process is that hexachloro-1-3-butadiene is not a solvent usable from an industrial point of view since it is an irritating compound.
Another process for preparing iododerivatives of perfluoropolyethers having a structure different from that shown in (II) is reported in EP 520,821 which describes the reaction of an acylfluoride with a metal iodide, wherein the metal is for example Li, Na, Mg, Ca, Al, to form perfluoropolyethers having xe2x80x94COI end groups. According to this patent the reaction takes place at temperatures between 0xc2x0 C. and 100xc2x0 C., and in a subsequent step the irradiation of the obtained compound is carried out by UV rays at room temperature, obtaining the perfluoropolyether with iodinated end groups. The drawback of said process is to comprise two distinct steps and to use a UV ray source, which as well known requires rather complex plants to be industrially operated.
The need was felt to have available a process for preparing perfluoropolyethers having one or both the end groups with an iodine atom starting from linear perfluoropolyether monoacyl- or diacyl-halides, having structure (II), which allowed to obtain products having high yields, without substantially modifying the number average molecular weight Mn, of the starting product of structure (II), said average molecular weight being considered without the two xe2x80x94COX end groups.
An object of the present invention is a process for preparing perfluoropolyether iodides, by reaction with LiI of monoacyl- or diacyl-halides of perfluoropolyethers, having a number average molecular weight from 200 to 3,000, preferably from 500 to 3,000, still more preferably from 1,000 to 3,000, and having the following structure:
XCOxe2x80x94CF2O[(CF2O)n(CF2CF2O)m]pCF2xe2x80x94Qxe2x80x83xe2x80x83(II)
wherein:
m/n=0.5-10; p=0-20;
X=Cl, F;
Q=H, CF3, X as above defined or COXxe2x80x2, wherein Xxe2x80x2 is Cl, F with the proviso that Xxe2x80x2=X;
said process being characterized in that the iodination reaction is carried out in a reactor, at a temperature from 180xc2x0 C. to 260xc2x0 C., preferably from 185xc2x0 C. to 220xc2x0 C.
The process of the present invention can operate both in the presence and in absence of solvents.
As solvents, those which solubilize the perfluoropolyethers of formula (II) are used. Acetonitrile, perfluorooctane, etc. can for example be mentioned.
Preferably in the process of the invention in formula (II) X=Xxe2x80x2=F.
The ratio by moles between LiI and xe2x80x94OCF2COX end groups ranges from 1.1 to 2.
The reaction time is that necessary to reach the total conversion of the perfluoropolyether halide in the corresponding iodide at the selected reaction temperature. Generally the reaction is considered over when in the reactor a pressure value is reached which remains constant at the selected reaction temperature. Generally reaction times of 4-6 hours are sufficient to end the reaction.
In the sealed reactor used in the process according to the present invention, before starting the reaction, the gases are removed by reducing the internal pressure.
The iodinated perfluoropolyether compounds obtained with the process of the invention have the following formula:
Ixe2x80x94CF2O[(CF2O)n(CF2CF2O)m]pCF2xe2x80x94Txe2x80x83xe2x80x83(I)
wherein T=I, F, CF3, H, Cl; m/n=0.5-10, p=0-20 and having average number molecular weight from 200 to 3,000.
The results of the present invention are particularly surprising and unexpected since in the prior art the preparation of iodinated compounds of perfluoropolyethers having structure (I) has never been described. Indeed in the starting compounds of structure (II), xe2x80x94OCF2Oxe2x80x94units (Cl unit) in position xcex2 with respect to the xe2x80x94COX end group are present in the structure. When the structure of the fluorinated acylhalide compound comprises the aforesaid groups, contemporaneously with the iodination the secondary reaction of xcex2-scission takes place. This causes the decrease of Cl units in the perfluoropolyether structure, with formation of carbonyl fluoride COF2. Therefore the xcex2-scission reaction causes a mass loss of the final product. It has been found by the Applicant that the effect of this secondary reaction is particularly evident when an iodinating agent different from LiI is used.
By operating with the process of the invention it has been unexpectedly found that the xcex2-scission reaction can be remarkably reduced or substantially eliminated.
The following Examples illustrate the invention but they do not limit the scope thereof.

Abstract: wherein:

Abstract: m/n=0.5-10; p=0-20;

Abstract: X=Cl, F;

Abstract: said process being characterized in that the iodination reaction is carried out operating at a temperature from 180xc2x0 C. to 260xc2x0 C.


A device includes a pocket having an opening to receive media. A filament assembly is coupled such that filaments protrude from a gap between the opening of the pocket and a self-service terminal (SST) in which the pocket is mountable to inhibit media from entering the gap.

Pocket style deposit/dispense Self-Service Terminals (SSTs), also referred to as recyclers, allow customers to deposit media, such as cash and bank notes, without the assistance of a clerk. The media is placed by the customer into a pocket in the SST, where the media is retrieved, processed, and stored securely. In some SSTs, a gap may exist between the pocket and other components of the SST where media may be unintentionally or intentionally inserted. Such media may be lost and unaccounted for during transactions, or may actually cause a mechanical issue with the SST. Costly downtime and servicing of the SST may be needed.

Media escape prevention for self-service terminal


An amplification MOSFET in a source ground form receives at its gate an output signal of a source-follower circuit through a second capacitor. The source-follower circuit, on the otherhand, receives a voltage of a first capacitor which receives a signal charge. A predetermined bias voltage is supplied to the gate of the amplification MOSFET through a switch device while the signal charge of the first capacitor is reset. According to this structure, the second capacitor can transmit only the signal component and the voltage signal itself can be amplified by the source ground type amplification MOSFET. The amplification MOSFET can be biased to its optimum operation point by the switch device during the reset period of the first capacitor; hence, sensitivity can be substantially improved with a simple circuit structure.

1. Field of the Invention
This invention relates to an amplification circuit and to a technique which will be effective when utilized for an amplification output circuit for a CCD (Charge Coupled Device), for example.
2. Description of the Prior Art
A circuit such as shown in FIG. 6 of the accompanying drawings has been used as an amplification circuit for a CCD. A signal charge is transferred by the CCD to an output diffusion layer (which is expressed structurally equivalently in the form of a diode D), and is converted to the form of a signal voltage by a capacitor C1 consisting of its junction capacitance. This signal voltage is outputted through a source-follower circuit consisting of an amplification MOSFET Q2 and a load MOSFET Q3. Such an amplification circuit is referred to as an FDA (Floating Diffusion Amplifier). The MOSFET Q1 has the signal charge retained in the capacitor C1 reset by a reset pulse .phi.R at a reference voltage VR when the signal voltage corresponding to the signal charge is amplified and outputted or in other words, before a next signal charge is transferred.
Such an FDA is described, for example, in "CCD Camera Technique", page 64, published by Radio Kijutsusha, Nov. 3, 1986.
The sensitivity of the FDA described above is given by the product (As/Cl) of the capacitance value of the capacitor C1 inclusive of the parasitic capacitance in the reset MOSFET Q1 and in the amplification MOSFET Q2 and the gain (As<1) of the source-follower circuit. The improvement of the gain As is limited by the relation As<1. Therefore, the improvement of the sensitivity of the FDA depends on how much the capacitance value of the capacitor Cl can be reduced. In the conventional FDAS, therefore, great efforts have been made to miniaturize the diode D1 and the amplification MOSFET in order to reduce the capacitance value of the capacitor C1. If the size of the amplification MOSFET Q2 is reduced, however, the output current essentially becomes smaller, and there occurs the contradictory problem that the load driving capacity of a post stage circuit is lost. Therefore, it has been customary to cascade a plurality of source-follower circuits so as to make up for insufficiency of the driving capacity of the initial stage circuit.
In the FDAs available at present, the capacitance value of the capacitor Cl described above has come to below 10.sup.-14 F and the voltage sensitivity has exceeded 10 microvolt per electron. From the aspect of application, however, the number of electrons handled per signal is at most some dozens and a further increase of the output signal amplitude has been desired. The real sensitivity is determined by an S/N (signal-to-noise ratio) and in order to improve this S/N, reduction of thermal noise that occurs at random is particularly indispensable.
The thermal noise occurring in the CCD itself has been reduced remarkably and the thermal noise in a CCD imaging device is determined by the thermal noise generated in the FDA. The principal components of the noise in the FDA are the reset noise of the capacitor C1 and the 1/f noise of the amplification MOSFET Q2. The reset noise is proportional to the square of the capacitor Cl, and decreases with the reduction of its size, whereas the 1/f noise is substantially in inverse proportion to the reduction of the size, on the contrary.
Since such a random noise is contained in both of the dark output (reset voltage) and the bright output (signal charge output), it can be offset by obtaining the difference by a correlational double sampling (CDS) circuit and generating a signal. However, there is a limit to the noise reduction by the CDS circuit because the distortion of waveforms up to the CDS circuit and the disturbance of the waveforms due to various jump in pulses resulting from the extension of wirings, and so forth, exist.
It is therefore an object of the present invention to provide an amplification circuit which can accomplish a high sensitivity with a simple circuit structure.
It is another object of the present invention to provide a high sensitivity amplification circuit which will be suitable for a CCD.
These and other objects and novel features of the present invention will become more apparent from the following description of this specification when taken in conjunction with the accompanying drawings.

Output circuit for a CCD with a D.C. restoration circuit integrated together with the CCD in a monolithic semiconductor chip


A programmable logic controller includes a plurality of input interfaces and a plurality of output interfaces for connection to industrial equipment such as automatic assembly equipment, textile machinery, materials handling equipment, and chemical processes. The input and output circuits can be randomly addressed as to their state through an eight bit bus, which connects in parallel with up to 16 groups of eight input and/output circuits. The controller includes groups of timers which are each manually adjustable as to the timing operation and which are sequentially addressed each time a timing function is called for by the program. The timers are designed to be cascaded in groups to virtually any number of timers. The controller includes a scratch pad memory, half of which retains memory upon power failure and half of which does not. The control of the controller by the operator is made more nearly foolproof by interlocking the operations of control switches. Three programming instructions are available which are conditional upon the data in the accumulator of the controller.

1. Field of the Invention
The present invention relates to the art of controllers for mechanical systems requiring logic processing of input data.
The invention is particularly related to a programmable controller equipment associated with a transfer line or to control a machine tool or other mechanical system of the type generally, in the prior art, controlled by a relay logic system.
2. Description of the Prior Art
One example of the prior art is U.S. Pat. No. 3,827,030 to Seipp. The Seipp reference discloses a programmable logic controller which incorporates, in addition to the normal input and output interface circuits, a supplemental random access memory for storing data used in calculating. Logic signals to and from the input and output interface circuits travel on separate one bit data buses. The data processed by the controller and retained in the random access memory is not significantly affected by power interruptions since a separate battery is incorporated into this circuit to maintain a holding voltage on the random access memory during such times as when the equipment is turned off or power is otherwise interrupted to the controller. While there are desirable aspects to a permanent memory, there are other desirable features of a nonpermanent memory for the temporary storage of data. Oftentimes the need arises to readily erase the data in a permanent memory and this can be difficult to accomplish with conventional controllers such as is set forth in Seipp.
In column 15 of U.S. Pat. No. 3,944,984 to Morley et al. reference is made to latch circuits which allow designated outputs to have retentive memory in case of power failure. While this is a desirable feature, programming of the device is made difficult by the dedication of the specific inputs and outputs to the latching functions when it may actually be that the data which is desired to be latched to the event of power failure does not need to interface to any equipment without further processing. Moreover, the resetting of the otherwise permanent memory found in certain prior art controllers is generally either so easy to do that it can be accomplished by accident or so difficult to do that substantial time is devoted to what should otherwise be a simple straightforward procedure.
In general, prior art controllers do not have associated with them switches and displays which make it easy for an operator to follow the functioning of the programmable controller and to determine where errors may exist in programs. Typically, prior art controllers require complex programming devices to be associated with them for the purpose of programming the read only memory generally used to store the program for the controller. For the most part, programmable logic controllers of the prior art do not have a display for displaying the state of the accumulator or the state of an accessed data bit nor do the devices have manual controls which are simple to operate in a manual mode or in a mode in which the outputs are disabled.
U.S. Pat. No. 4,006,464 to Landell discloses an industrial process sequence controller which digitally displays the sequence step. This patent also discloses a switch for disconnecting load terminals from attached loads thereby disabling the outputs and another switch for causing the sequence steps to be sequenced manually. However, this disclosure sets forth no means of protection which would preclude the energization of the loads when the unit is placed in the manual or set-up mode. This would permit inadvertent operation of the equipment in a fashion which could severely damage the equipment to which the controller is attached. The sequence controller of Landell does not incorporate a large programmable read only memory which is scanned at a high rate of speed as in prior art programmable logic controllers, and therefor it does not present the same programming difficulties of prior art programmable logic controllers.
Typically, programmable logic controllers of the prior art, such as U.S. Pat. No. 3,827,030 to Seipp, transferred data to the interface devices on a single bit data bus. Some prior art equipment incorporated a single bit data bus for transmitting data to the interface devices and a second single bit data bus for transmitting data back from the interface devices.
U.S. Pat. No. 3,881,172 to Bartlett et al. discloses a single bit data bus which is bidirectional and is used for both inputs and outputs.
U.S. Pat. No. 3,997,879 to Markley et al incorporates a complex data transfer system. An eight conductor data bus is used for transmitting data in parallel form to the interface devices. A second eight bit data bus is used to transmit data from the interface devices back to the processing equipment. Very complex and expensive equipment is required in the disclosed circuitry to handle the two eight bit data buses.
U.S. Pat. No. 3,827,030 to Seipp discloses a conditional instruction referred to as a "store Seipp function". This is used to allow the skipping of program statements prior to the next store instruction conditioned upon the state of the accumulator output. While this is a useful feature, certain programming needs make the use of this feature rather awkward. Occassionally, it is useful to be able to return to the beginning of the series of program statements with a single instruction rather than to have to use a sequence of skipping instructions to skip groups of operations between sequential store operations.
On function typically required to be performed either by a programmable logic controller or equipment associated with it is a timing function. Some programmable logic controllers incorporate complex timing circuits which can be numerically controlled by data programmed into the controller. Where read only program memories are used, this makes a change of the timing intervals difficult. In any event, the incorporation of this feature substantially increases the requirement for data storage by the data controller. Various attemps to incorporate timers into programmable controllers have generally resulted in very expensive equipment operating in a complex fashion. As an alternative to incorporating timers within the unit, timers can be connected to individual input and output circuits. Not only does this use up various address locations which thereby reduces the number of address locations available for normal input and output functions, but additionally (unless the circuit is otherwise specially designed), this uses expensive input and output interface circuitry for accomplishing the timing function.
Prior art controllers, such as disclosed in Seipp, require substantial decoding circuitry to convert the programmed data to operating instructions and to thereafter operate upon addressed data. This circuitry adds to the cost of the equipment, increases its size and reduces reliability. Similarly, machine instruction decoding has been complicated in prior art controllers, with similar effects.

Output interface card suitable for use with a programmable logic controller


A logic synthesis method uses a two-dimensional sizing progression for selecting gates from a cell library in designing an integrated circuit. The drive load and desired performance for each logic gate in a functional configuration for the integrated circuit may be determined. The device configuration or gate to implement the logic gate may be selected from a cell library. The selected gate has a drive load range encompassing the determined drive load and achieves a desired performance target for the logic gate. A two-dimensional sizing progression may be used to help minimize layout area, power consumption, and performance loss in implementing BiNMOS gates.

1. Field of the Invention
The present invention relates generally to the field of integrated circuit design. More particularly, the present invention relates to the field of logic synthesis for integrated circuit design.
2. Description of the Related Art
Computer automated logic synthesis algorithms are typically used for the design of integrated circuits. For one logic synthesis algorithm, a software description for the logic of a desired integrated circuit is written and compiled to generate a representation of the functional configuration of logic gates for the integrated circuit. Specific device configurations are selected to implement logic gates in the representation. The desired integrated circuit may then be fabricated as the design for the integrated circuit is realized.

Logic synthesis having two-dimensional sizing progression for selecting gates from cell libraries


A method and apparatus for storing compressed bit map images in a laser printer. Bit map images representing a page of data are divided into bands and compressed into the printer memory. Then, when needed by the interpreter/rasterizer, they are decompressed into another portion of that memory, or when desired to print those bands they are directly transmitted to a decompression engine. The bands of bit map image are compressed using a Lempel-Ziv algorithm that contains improvements allowing compression towards the end of the band and improves the compression speed at the beginning of the band by initializing a hash table. Further, the interpreter/rasterizer switches between compression routines depending on the available memory and the desired speed of compression. The compression routine requests supplemental destination buffers when it needs additional memory in which to compress data. Finally, the compression continues to add margin white space during the compression of the uncompressed bit images so that margin what space need not be stored in the uncompressed bit image.

1. Field of the Invention
This invention pertains to computer data compression technology and computer printer technology. More specifically, this invention pertains to the addition of margin white space to and then compression of bit map images in a printer, and storing the compressed images in bands of memory for later use by the printer.
2. Description of the Related Art
Technology associated with printers and printing has ridden the tide of the rapid advances of computer technology in general. From the days of the daisy wheel and the nine pin dot matrix printers, we have now come to an era of affordable laser, ink jet, and even color high resolution printing. As the resolutions and corresponding print qualities have risen dramatically, so have the amounts of memory required to drive these printers. Multi-megabyte memory configurations are becoming more common as the resolutions rise.
For example, in monochrome laser printing an image is typically rendered at 300 dots per inch, requiring nearly one megabyte of random access memory for a letter size page. This same image rendered at 600 dots per inch results in a four-fold increase in the required memory, or approximately four megabytes. Higher resolution is not the only cause of increasing memory demands. Color or gray scale images typically require 2 to 32 bits of information for each pixel of the rendered bit image. A letter sized image rendered at 600 dots per inch using 32 bits of color information would require not four megabytes of memory but rather 128 megabytes of memory. The cost of more memory is passed to the consumer either in the initial price of the product or as the cost of an optional memory upgrade.
One development in the field of high resolution printing has involved the transmission of images from the host computer to the printer itself. The transmission of an entire page in a discrete bit image, or rasterized, format created two serious problems as resolutions rose. First, the printer and the host computer were often linked by a relatively slow serial data path, and the transmission of an entire page in rasterized, or bit image, form could lead to unacceptably slow transmission times because of this bottleneck. Second, as resolutions increased and more memory was required to hold an entire rasterized page, it became inefficient to generate that rasterized page in the memory of the host computer itself. Many host computers did not even contain one megabyte of memory, and as that is the amount of memory typically needed for a letter size page, such rasterization was not feasible.
Partially in response to these problems, page description languages were developed. Page description languages describe pages as a group of graphical and textural objects rather than as bit images. For example, a circle might be represented by a data structure giving a center location and a radius. This object oriented approach can lead to far more efficient representation of graphical and textual data. The memory needed to store a bit image is a function of the page size, pixel density, and number of bits of information per pixel. Memory requirements for a set of page description language commands describing a page, on the other hand, are typically proportional to the complexity of the page itself. A very simple page requires few commands and correspondingly little memory to store, while a more complex page requires more memory. For all but the most complex pages, the amount of memory required to store the associated page description language commands is typically less than the amount required to store the corresponding rasterized page image.
The lower memory requirements led to shorter transmission times to the printer. Page description languages also facilitated page generation "on the fly" rather than storing all of the page at one time. This in turn required less memory usage by the host computer. Once the command to generate a circle had been sent, for example, it need not be stored in the host computer memory but could instead be discarded.
An application program can easily create page description language output as all it need do is generate the required "commands" in that language. Then, that page description language text is transmitted to the printer, where an interpreter/rasterizer interprets the codes of the page description language text and rasterizes the page represented by those codes into a bit image. In other words, the interpreter/rasterizer translates the page description language codes into a bit image of the page. That bit image is then stored in the printer memory rather than the host computer memory.
Page description languages further allow for a single software interface to be used with a variety of hardware platforms. A printer's resolution may be lower or higher, the page size may be larger or smaller, but this can all be handled in the implementation of the interpreter/rasterizer that converts the page description language code to a bit image. Thus, the host computer need not know the specifics of the hardware that the interpreter/rasterizer drives.
These page description languages are very well known and include Postscript and Postscript Level 2 by Adobe Systems Incorporated and PCL 5. The interpreter/rasterizer is typically run on its own microprocessor; for example, the 68000 series by Motorola, Inc. or the Am29000 series by Advanced Micro Devices, Inc., can execute the programmed interpreter/rasterizer.
In practice, an application program or the system software of a host computer generates the page description language code for a page and then transmits that code to the printer. There, the software in the interpreter/rasterizer interprets the page description language code, converting the code into a bit image for printing by the print engine. The interpreter/rasterizer will have an associated random access memory of arbitrary size for use as storage for the rasterized bit image, for working memory, for storing subsequent pages, for storing font images, or for other typical memory uses of an interpreter/rasterizer. Typically, the rasterized image will be stored in bands, with multiple bands per page, which can be retrieved for transmission to the print engine and discarded when no longer needed.
Some page description languages do provide for compression of the page description language code itself. Before transmission, the code is compressed using one of a number of well known compression algorithms, and then when received by the printer that code is decompressed. This allows for shorter transmission times, as less data is being transmitted to convey the same amount of information.
Data compression techniques are very well known in the computing field. For example, a class of algorithms known as Lempel-Ziv 77, or LZ77, is widely used for adaptive lossless data compression. Another class known as LZ78 is now more commonly used, but the LZ77 class has unique features that make it particularly suitable to some applications. These algorithms are well known in the art, and a good overview is provided in Ross N. Williams, An Extremely Fast Ziv-Lempel Data Compression Algorithm, DCC '91 Data Compression Conference 362 (James A. Storer & John H. Reif eds., 1991).
In the past, Lempel-Ziv 77 algorithms have had drawbacks that led to inefficiency. For example, those algorithms typically stopped compressing towards the end of a source block. Further, those algorithms typically did not initialize the hash table they used that pointed to data that had been previously compressed. This caused a loss of speed and efficiency when first compressing the data.
The interpreter/rasterizer's use of its random access memory is one area of printer technology ripe for improvement. While page description languages have been invaluable in the generation and transmission of pages, the interpreter/rasterizer must still generate and store a rasterized image of a page in its own memory. As seen above, the memory requirements for a full rasterized page can be enormous.
Developers have used various techniques to reduce these memory requirements within the printer itself. For example, very high end laser printers use a start/stop technique in which they reduce their memory requirements by printing a small section of the page, stopping the print process while the next section of the page is rasterized into memory, and then restarting the print process, repeating these steps until done. These machines typically print at very high resolutions and are quite complex mechanically. In a technique used by PCL 5, the page description language codes are sequenced such that those commands pertaining to the top of the page are placed in the beginning of the source code file and those pertaining to the bottom of the page are placed at the end. The printer is then started and the printer processor that renders the bit map image a band at a time "races" the print engine, or the part of the printer that does the actual printing, by attempting to interpret the codes and render the image at least as fast as the print engine can print the rendered image. This technique, however, usually fails on complex pages, and the user must install more memory to print anything but very simple images.
One area in which current printers lose efficiency in their use of their internal memories is in the storage of margin white space. Printers typically store the white space representing the left and right margins on a page even when the logical margin is larger than the physical margin required by the print engine. This is in part because of how an interpreter/rasterizer transmits data to the print engine. The print engine typically expects the interpreter/rasterizer to transmit a full scan line of data to the print engine. A scan line is simply the memory representation of one row of the printed bit image. This scan line, however, is physically typically of a fixed number of bits, that number being set by the requirements of the print engine. Logically, however, an interpreter/rasterizer need only store the scan line data up to the beginning of the right margin white space. This follows from the manner in which print engines physically function; when the print engine receives nothing, it leaves the corresponding bit white. Thus, the interpreter/rasterizer can simply send nothing to the print engine at the end of the scan line, and therefor need not store anything.
Interpreters/rasterizers typically include any logical margin white space at the front of each scan line. This logical margin white space, when added to the physical margin necessitated by the print engine, forms the full margin. As each page will have a fixed logical margin, however, storage of this margin white space is very inefficient.
Thus, it would be desirable to improve the efficiency of the memory usage by the interpreter/rasterizer in the printer itself. More specifically, it would be desirable if less memory were required to store a bit image.


A method for terminal device-based communications between a third-party application and an electronic wallet includes: the third-party application setting up a connection to an Internet service; the third-party application receiving a request and setting up a communication channel between the third party application and the electronic wallet within the terminal device via the On-Device API; verifying, by the electronic wallet, an access right of the request of the third party application; the third-party application forwarding the request to the electronic wallet if the access right is approved; the electronic wallet generating a corresponding response; forwarding the response via the On-Device API to the third party application, wherein the third party application forwards the response to the Internet service.

An electronic wallet (hereinafter, simply referred to as a "wallet") refers to a hardware and software module within a terminal device, in most cases a mobile terminal device, such as a mobile phone or a smart phone, consisting of two parts:                a security element (e.g. in the form of a SIM card/UICC or Java card integrated in the chip set of the terminal device), with Java applets thereon, which can be addressed by applications on the terminal device on the one hand side as well as via wireless radio communications (e.g. NFC) from acceptance points (i.e., card readers) in card emulation mode.        software for visualization, management and enabling of user interaction for Java card applications located on the security element.
As a result, this architecture of the electronic wallet enables the mapping of real smart cards (for various application fields such as payment, loyalty card, coupons) to the terminal device, wherein the role of the chip of the actual card is taken over by the Java applets on the security element, for example, the UICC, and the role of the label (i.e. the inscription, design, logo and/or other designations) on the physical card is taken over by the wallet software on the terminal device, e.g. the mobile phone.
Here and in the following an "applet" is understood as an application configured for the execution on a security element. Instead of "applet" the synonymous term "cardlet" is also used in the following.
Furthermore, in the following an application configured to run under the operating system of the terminal device, is called an "app".
If the electronic wallet is located on a mobile terminal device such as a mobile phone, the electronic wallet is also to be referred to as a "mobile wallet".
The cards in the electronic wallet can then be used at appropriate points of acceptance like physical plastic cards; using wireless radio communication (e.g. short-range radio technique NFC) applets on the security element (such as UICC) can be addressed without any contact, for example at the supermarket checkout.
Thus, this technique enables the use of a security element (such as the UICC) as a multi-functional smart card, wherein the user benefits from the adequate level of safety for a smart card application: information cannot be read from the smart card, the smart card cannot be copied and its information are admitted for use only after entering a PIN where necessary.
For similar operations in the online world, however, other methods have been established. For example, payment transactions are performed by users reading their credit card information and entering it in web forms on web pages. The authentication of users at web pages is usually done by entering a user name and a password.
On mobile platforms (here and below, the term "platform" is to be understood as the operating system of a terminal device, "mobile platform" is to be understood as the operating system of a mobile terminal), again, it is common to connect one's payment card information once with an account of the mobile phone manufacturer, in order to pay for apps and other digital goods on the mobile terminal so that the acquisition of such goods may be invoiced in future, for example to a credit card. For the use of online services (such as the server-based storage of photos), it is common to provide an app that allows access to the centrally stored data from the mobile device. To this end the user name and password are stored to this app.
US 2009/0 234 751 A1 discloses an electronic wallet for a wireless mobile device, and a method of operating the electronic wallet. In an embodiment, the electronic wallet comprises wallet invocation means responsive to an external trigger originating externally from the wallet; user authentication means for authenticating the user of the electronic wallet upon invocation of the wallet by the external trigger; and means for returning card information stored in the wallet in dependence upon a form specified by the external trigger invoking the wallet. The external trigger may be a webpage accessed via an Internet web browser on the wireless mobile device, the webpage having a wallet trigger instruction embedded therein. The wallet trigger instruction may be an extension embedded into the header of the webpage accessed via the Internet web browser. The webpage may further include field ID tags mapping specific data fields in the wallet to form input fields provided in the webpage.
WO 2006/085 805 A1 is concerned with a method for performing electronic transactions in a network comprising a mobile subscriber terminal with a digital wallet and a browser, a server for the management of the transactions and a content provider. In the method, the subscriber selects a service and sends an order request to the content provider. As a reply, the content provider sends a transaction order form to the mobile subscriber. The subscriber then confirms the transaction and sends the transaction order form to the browser. The browser reads information needed for the transaction form from the digital wallet and fills in the order form with the read transaction data. The completed form is then sent to the server, which converts the completed form into a standardized transaction format. The content provider processes the completed order form and sends it to the content provider, who replies to the subscriber.
US 2012/0 123 868 A1 describes system for dynamically adjusting the wireless data emulation used by a portable communication device based on its geo-location. The system determines a geo-location of the portable communication device by transmitting the current geo-location data using a most appropriate channel to a server; receiving data regarding payment systems potentially co-located with the portable communication device; and configuring a payment system in the portable communication device with the data formats and other wireless point of sale data specific to payment system potentially co-located with the device.
US 2012/0 166 337 A1 shows a near field communication (NFC) terminal for performing secure payment that includes an NFC unit and a control unit. The NFC unit communicates with an external payment terminal and the payment unit transmits results obtained by processing transaction information and an electronic signature value of the transaction information to the payment terminal using the NFC unit. The payment terminal requests an external payment server to perform payment. An authentication certificate applet included in the payment unit generates the electronic signature of the transaction information. An electronic wallet applet included in the payment unit transmits the results obtained by processing the transaction information and the electronic signature value to the payment terminal.
US 2012/0 130 839 A1 describes techniques for managing modules or applications installed in the mobile device. To provide authentic and secure transactions with another device, each of the installed applications is provisioned with a server through data communication capability in a mobile device. A provisioned application is associated with the personalized security element of the mobile device and works with a set of keys that are generated in accordance with a key set from the personalized secure element. Further, management of controlling an installed application is described.
WO 2012/021 864 A2 shows a phone-based electronic wallet providing authenticated transactions across multiple channels of commerce. The electronic wallet may be used for point-of-sale payments, remote mobile payments and/or web-based payments, and may use authentication tools such as offline PINs, SecureCode PINs and/or online PINs.
Further state of the art is to be found in Erika Chin et al. "Analyzing inter-application communication in Android", MOBISYS, 11, ACM, US, 28 Jun. 2011, pages 239-252, XP058004575, DOI: 10.1145/1999995.2000018 ISBN: 978-1-4503-0643-0.

Method and system for terminal device-based communication between third-party applications and an electronic wallet


A magnetorheological fluid formulation comprising magnetizable particles dispersed in a multi-component liquid vehicle comprising an organoclay stabilization mixture. At least one organoclay is selected for each liquid vehicle component, each organoclay having a surface chemistry that renders it preferentially compatible with the surface functionality of one of the liquid components relative to its compatibility to the remaining components whereby it is effective to stabilize, or gel, that component. A method of making an MR fluid is also provided in which liquid vehicle components are blended together, the organoclay mixture is added to the blend, and magnetizable particles are suspended therein, resulting in a stable MR fluid of suitable viscosity and yield stress.

This invention relates to magnetorheological fluids.
Magnetorheological (MR) fluids are substances that exhibit an ability to change their flow characteristics by several orders of magnitude and in times on the order of milliseconds under the influence of an applied magnetic field. These induced rhleological changes are completely reversible. The utility of these materials is that suitably configured electromechanical actuators which use magnetorheological fluids can act as a rapidly responding active interface between computer-based sensing or controls and a desired mechanical output. With respect to automotive applications, such materials are seen as a useful working media in shock absorbers, brakes for controllable suspension systems, vibration dampers in controllable power train and engine mounts and in numerous electronically controlled force/torque transfer (clutch) devices.
MR fluids are noncolloidal suspensions of finely divided (typically one to 100 micron diameter) low coercivity, magnetizable solids such as iron, nickel, cobalt, and their magnetic alloys dispersed in a base carrier liquid such as a mineral oil, synthetic hydrocarbon, water, silicone oil, esterified fatty acid or other suitable organic liquid. MR fluids have an acceptably low viscosity in the absence of a magnetic field but display large increases in their dynamic yield stress when they are subjected to a magnetic field of, e.g., about one Tesla. At the present state of development, MR fluids appear to offer significant advantages over other types of controllable fluids, such as ER fluids, particularly for automotive applications, because the MR fluids are relatively insensitive to common contaminants found in such environments, and they display large differences in rheological properties in the presence of a modest applied field.
A typical MR fluid in the absence of a magnetic field has a readily measurable viscosity that is a function of its vehicle and particle composition, particle size, the particle loading, temperature and the like. However, in the presence of an applied magnetic field, the suspended particles appear to align or cluster and the fluid drastically thickens or gels. Its effective viscosity then is very high and a larger force, termed a yield stress, is required to promote flow in the fluid.
Because MR fluids contain noncolloidal solid particles which are at least five times more dense than the liquid phase in which they are suspended, suitable dispersions of the particles in the liquid phase must be prepared so that the particles do not settle appreciably upon standing nor do they irreversibly coagulate to form aggregates. Without some means of stabilizing or suspending the solid, sedimentation and/or flow induced separation of the solid phase from the liquid phase will occur. Such separation will have a drastic and detrimental effect on the ability of the MR fluid to provide optimal and repeatable performance.
The magnetizable particles are kept in suspension by dispersing a thixotropic agent in the liquid vehicle. There are basically two approaches to the stabilization of MR fluids: the use of polymeric thickeners, such as high molecular weight hydrocarbons, polyureas, etc., or the use of a finely divided solid, such as fumed silica or colloidal clay. Essentially, both approaches aim to prevent separation of the liquid and solid phases by forming a thixotropic network which xe2x80x9ctrapsxe2x80x9d or suspends the heavier solid in the lighter liquid. Of these two methods, the use of polymeric thickeners in MR fluids can be problematical, since it is difficult to achieve sufficient stability against settling without using an amount of thickener which will impart a grease-like consistency to the composition. Although sedimentation or settling is minimized, the MR fluid is no longer free flowing, and in fact, may exhibit an unacceptably high viscosity.
An alternative to polymeric thickeners is fumed silica. It has been demonstrated in the prior art that fumed silica can be used as a stabilizer in MR fluid compositions, provided attention is given to the selection of fumed silica grades that are compatible with the chemistry of the liquid phase. This selection is complicated by the fact that the liquid phase is often a combination of miscible, but chemically different materials. If adequate shear mixing is achieved in processing, a lightly gelled system can be formulated using fumed silica. Although characterized by a xe2x80x9cyield stressxe2x80x9d (defined as the applied force/area required to initiate flow) sufficient to prevent settling, it has been shown that such a system will still flow with a moderate to low viscosity. However, one perceived disadvantage in using fumed silica is that this material, even in amounts less than two or three percent/volume, can cause the MR fluid to be abrasive towards polymeric seals as well as metallic wear surfaces in the device. This is particularly detrimental in vehicle damper applications, where a considerable amount of expense and effort has been devoted to providing wear-resistant coatings, for example, to protect the damper from failure due to excessive wear. Also, there is growing evidence that fumed silica is a key factor contributing to xe2x80x9cin-use thickeningxe2x80x9d, or paste formation, of MR fluids in suspension dampers subjected to accelerated durability testing.
An alternative approach to polymeric thickeners and fumed silica, both of which have potential drawbacks in formulating MR fluids, is to use colloidal clay. Using a surface-treated, colloidal organoclay as a stabilizer for MR fluids was first demonstrated and patented in U.S. Pat. No. 6,203,717 by Lord Corporation, and forms part of the package for the MR fluid (B5.2F) which, for example, has been approved for vehicle shock absorber production. In contrast to polymeric thickeners, and similar to fumed silica, an MR fluid with the organoclay will form a light gel at low volume concentrations, with a yield stress sufficient to prevent or significantly retard settling, but with an ability to flow with low to moderate viscosity. Moreover, the clay is inherently less abrasive than fumed silica, suggesting the possibility to reduce expensive surface treatments used to retard or prevent abrasion.
Although organoclay stabilizer systems for other applications (lubricating greases, cosmetics, etc.) are known, and are even being utilized in vehicle applications, there are still significant performance issues impacted by the organoclay which need to be addressed. Essentially, as is the case in any technology which relies heavily on surface chemistry to achieve a desired effect, the particular surface treatment of the organoclay must be chosen carefully to insure compatibility with the liquid phase, as well as to achieve a balance between interactions which contribute to yield stress, and those which contribute to viscosity. It would be highly desirable to achieve a desired level of yield stress independently of viscosity. The method disclosed in the Lord patent (U.S. Pat. No. 6,203,717) of using a single organoclay to achieve stability against settling in a hydrocarbon liquid vehicle, with easy redispersibility of any sediment that does occur, involves trade-offs. To achieve a reasonable yield stress for stabilizing the system, a clay is chosen from among those commercially available products which are compatible with the liquid phase, which in the Lord patent is a non-polar synthetic hydrocarbon. However, for damper fluids with stringent seal swell and volatility requirements, the liquid phase is advantageously a mixture of a non-polar synthetic hydrocarbon and a polar diester. Due to the character of the liquid phase, and the fact that commercially available organoclays are designed to be compatible with a given class of liquids of a given polarity, rather than mixtures, a very short list of compatible materials results. A final material is then chosen on the basis of screening with respect to settling and viscosity. Not surprisingly, the resulting compromise often leaves the system marginalized with respect to a low yield stress, and a moderate viscosity. In addition, the yield stress and/or viscosity is often sensitive to the addition of other required components, such as anti-wear additives and antioxidants, requiring adjustment of the clay level to compensate.
There is thus a need for an organoclay stabilizing system that is compatible with the liquid mixture used in many MR fluids so as to decouple the yield stress and viscosity, allowing the optimizing of each property more or less independently.
The present invention provides a magnetorheological fluid formulation comprising magnetizable particles dispersed in a liquid vehicle mixture comprising at least two liquid components of different surface functionality and an organoclay stabilization mixture. In accordance with the present invention, at least one organoclay is selected for each liquid vehicle component, each organoclay having a surface chemistry that renders it preferentially compatible with the surface functionality of one of the liquid components relative to its compatibility to the remaining liquid components whereby it is effective to stabilize, or gel, that component. By using the organoclay stabilization mixture of the present invention, the yield stress and viscosity of the MR fluid may be independently controlled, and the magnetizable particles remain suspended in the liquid vehicle. There is further provided a method of making an MR fluid in which liquid vehicle components are blended together, the organoclay mixture is added to the blend, and magnetizable particles are suspended therein, resulting in a stable MR fluid of suitable viscosity and yield stress.

Stabilization of magnetorheological fluid suspensions using a mixture of organoclays


A clock and data recovery method comprising the following steps: an oversampling step wherein an oversampled stream of samples is generated from an input data stream at a data rate by using reference clock signal at a clock rate, the clock rate being higher than the data rate, and a tracking step of the input data stream realised by locating transitions between adjacent samples of the oversampled stream and by moving a no transition area within the oversampled stream wherein no transitions between adjacent samples are found a recovered data signal being obtained as a central portion of the no transition area and a recovered clock signal being obtained by dividing the reference clock signal. A clock and data recovery device is also described.

1. Technical Field
The present disclosure relates to a clock and data recovery method and corresponding device.
The description particularly, but not exclusively, relates to a clock and data recovery method for an ASIC chip designed for telecom/datacom applications and the following description is made with reference to this field of application for convenience of explanation only.
2. Description of the Related Art
An ASIC (acronym from Application-Specific Integrated Circuit) is a chip designed for a particular application. It typically consists of a core logic, where the specific application is implemented, and an in/out interface, that connects the specific application to the overall system.
An ASIC for telecom/datacom applications generally includes, as an input/output interface, a SERDES interface (serial-to-parallel/parallel-to-serial interface). Its goal is to adapt high speed serial data rate of a data line to a low speed parallel data rate of the chip core. Line data rate is linked to bandwidth requirements of communication systems and limited by technology. Core data rate is linked to the available technology (for instance, the CMOS technology presently used) in terms of both maximum operating frequencies and digital design tools.
Apart from the individual trends of line and core data rates (the former growing up faster than the latter), new applications typically require a certain degree of back-compatibility with respect to old applications.
Hence, an ASIC is generally able to treat a high data rate as well as a low data rate through the very same SERDES interface. It should be noted that the low data rate is usually an integer sub-rate of the high data rate.
More particularly, for telecom/datacom applications in data transmission through ASICs, the reliability and the quality of a data link or generally of a communication line depends on the timing control.
In addition, the transmission of a clock signal from one end to the other of a communication line in a telecom/datacom system is expensive, both because the clock signal is not a payload and because of technology limitations due to its bandwidth.
Nowadays, the latter issue is usually solved in the field by double data rate interfaces. According to this solution, both the rising and the falling edges of the clock signal are used as reference events (in contrast with normal data rate interfaces where only one type of edge, the rising or falling one, of the clock signal is used as a reference event). In this way data and clock signals have the very same physical bandwidth. However, the known solutions are still affected by the former problem.
Moreover, communication lines with a clock signal transmitted therethrough have strong timing budget requirements, which become harder and harder to meet when the data rate increases, since the bit period becomes smaller and smaller.
The most popular way to control timing is by embedding a clock signal into the transmitted data and recovering the timing information at the receiver side of the communication line by means of a clock and data recovery device (CDR in the following). In particular, the CDR recovers the timing information based on the transitions of input data, under the assumption that the nominal bit period is constant, thus producing a recovered data signal as well as a recovered clock signal.
Then, taking recovered data and clock signals from the CDR, a serial to parallel converter matches the line data rate and the core data rate.
Traditionally, analog phase-locked loops (PLL) have been used to implement CDR devices. Although, in general, an analog PLL can operate at high frequencies, it suffers from problems such as, for instance, the frequency drift during long sequences of identical bits (also indicated as CID, Consecutive Identical Digits) and the difficult lock acquisition process (at the power on or after a loss of synchronization).
Being a CDR using analog PLL a fully analog solution, high performances are expected, but they are paid in terms area and power consumption. Another drawback is a hardly portable design through technologies. CDRs of this kind are described in the following references:                U.S. Pat. No. 4,949,051 issued on Aug. 14, 1990 to J. P. Viola and concerning a "Phase lock clock recovery with aided frequency acquisition";        "A monolithic 622 Mb/s clock extraction data retiming circuit", Benny Lai, Richard C. Walker, ISSCC Dig. Tech. Papers, pp. 144-145, February 1991; and        "An analog PLL-based clock and data recovery circuit with high input jitter tolerance" Sam Y. Sun, IEEE JSSC vol. SC-24, pp. 325-330, April 1989.
Another approach to timing or clock recovery is the digital one. Here, the smallest possible analog front end is used to generate timing information that feeds a recovery algorithm. This algorithm is usually described and implemented using a high level language (VHDL).
In this way, a certain degree of portability through technologies is possible as well as some area and power saving. On the other hand, it is difficult to obtain high performance devices.
Digital timing recovery in a serial connection line is typically done by a CDR device in two ways that are by tracking and by oversampling.
In a tracking CDR, an optimum sampling phase is chosen among a discrete set, by an appropriate algorithm, and the output data is the input data which is sampled by the selected sampling phase. CDRs of this kind are described in the following references:                U.S. Pat. No. 5,812,619 issued on Sep. 22, 1998 to Runaldue and concerning a: "Digital phase lock loop and system for digital clock recovery";        "A tracking clock recovery receiver for 4-Gbps signaling", J. Poulton, W. I. Dally, S. Tell, IEEE Micro Vol. 18 Issue 1, pp. 25-27, January/February 1998; and        "A semi-digital delay-locked loop using an analog-based FSM", W. Rhee, B. Parker, D. Friedman, IEEE Trans. on Cir. and Sys. II: E. B. Vol. 51 Issue: 11, pp. 635-639, November 2004.
In an oversampling CDR, the input data are sampled by more than one phase at the same time and an algorithm takes the decision of which value has been sampled. CDRs of this kind are described in the following references:                U.S. Pat. No. 6,611,219 issued on Aug. 26, 2003 to Lee et al. and concerning an: "Oversampling data recovery apparatus and method";        "A 1.0 Gbps CMOS oversampling data recovery circuit with fine delay generation method" J.-Y. Park, J. K. Kang, IEICE Trans. Fund. Vol. E83 No. 6, June 2000; and        "A 0.5 um CMOS 4.0 Gb/s serial link transceiver with data recovery using oversampling", C.-K. K. Yang, R. Farjad-Rad, M. A, Horowitz, IEEE JSSC Vol. 33 No. 5, May 1998.
A strong difference between tracking and oversampling CDRs is that the former solution recovers the clock while the latter recovers the data. In other words, the output of a tracking CDR is a data-clock pair with a known phase relationship, while the output of an oversampling CDR is typically a data signal.
The main drawbacks of the above described solutions are as follows:                custom design is still rather dominant so technology portability is difficult;        efforts and tradeoffs are required to cover wide data rate ranges;        the scalability is more and more difficult with increasing data rate.
The technical problem underlying the present description is that of providing a clock and data recovery method and corresponding device having structural and functional characteristics which allow to improve the scalability with different technologies and frequencies, in this way overcoming the limits which still affect the conventional methods and devices.

Clock and data recovery method and corresponding device


A method is disclosed where acoustic pulses are used to calculate the velocity of the medium. The inventive aspect of the invention is that the acoustic velocity may be calculated without initially knowing the separation distance between the source and the distant receivers. The method utilizes established geometrical relationships which may be solved to produce the velocity. The velocity is often used to calculate the separation distances between the desired points.

1. Field of the Invention
This invention relates to ranging techniques and particularly to a method for continuously calibrating the velocity of an acoustic signal in a medium to better determine the range and position of an object relative to a first point.
2. Discussion of the Related Art
In order to determine the distance of an object in a medium using acoustic signals, it is important to know the propagation velocity of the acoustic signal in the medium. It is well known that the velocity of an acoustic signal is affected by the density and temperature of the medium. These factors are not easily determined in real time so another technique is often used which requires that the distance between two points be known. Given a known distance, velocity is readily calculated by measuring the travel time of the acoustic signal.
In aqueous environments the acoustic velocity may be roughly approximated by reference to a table. For example a table from a physics handbook notes that the velocity of sound in seawater of temperature 20 degree Celsius is approximately 1531 meters per second. This approximation is inappropriate in instances involving large distances because of density and temperature variations. In offshore environments acoustic velocities are traditionally determined between two ships. Both ships are usually equipped with radio navigation systems which provide the exact location of each ship and thus the distance therebetween. One ship may carry the acoustic source and the other ship (slave ship) may tow a detector such as a hydrophone. With the distance known and the travel time of the signal readily measurable, the velocity calculation is elementary.
The major disadvantage to this technique is the need for a slave vessel to determine the distance. This technique also requires that the slave ship contain expensive radio navigation equipment to determine its position relative to the other vessel. Such systems are disclosed in U.S. Pat. Nos. 4,669,067, 4,641,287, 4,532,617 and 4,513,401.
Another type of position determining system utilizes several submerged transponders secured to the ocean floor at surveyed locations. Each transponder generates a distinguishable acoustic pulse upon receipt of command signal from the vessel passing overhead. The acoustic signals from each transponder are received by hydrophones housed in the towed streamer cable and on the ship. The location of each hydrophone is triangulated from the signals sent from the transponders. These types of systems do not require the velocity of sound in the water since triangulation is used.
A major disadvantage in triangulation systems is the need to deploy the transponders at surveyed points on the ocean bottom. Typically the transponders are non-recoverable and costly. Such systems are disclosed in U.S. Pat. Nos. 4,635,236 and 4,555,779.
Another method of measuring distance is disclosed in U.S. Pat. No. 4,376,301. In this system, the velocity of sound in water is determined between the vessel and a first detector located in the end of the cable near the vessel. It is assumed that the distance between the source and the detector is a straight line and that the exact distance is known. That is the cable is paid out to the correct distance every time the cable is deployed. It is further assumed that the propagation velocity is constant along the length of the cable. Herein lies an assumption which may result in error. As the ship passes through the water, the propeller and the hull of the vessel introduce turbulence into the water which cause the water layers to swirl and mix, bringing cooler waters to the surface The cooler water may not mix effectively within the distance between the vessel and the near hydrophone, and in truth, the temperature of the water may vary considerably along the entire length of the cable. For every one degree change (Celsius) in water temperature, the velocity changes by approximately two meters per second. Depending upon the situation, the water temperature may vary to cause wide variations in the correct propagation velocity. Another disadvantage of such a system is that often, the source array used to generate the seismic signals is deployed directly behind the vessel and just ahead of the streamer cable. The acoustic source often consists of several air guns which when fired introduce large volumes of air into the water, forming bubbles of different sizes. The small bubbles are often still in the water when the streamer cable is towed past the firing point in the water. These small bubbles will cause variations is the acoustic velocity, thus the measurements from the ship to the cable may be distorted by the air.
It is an object of the present invention to provide a method for continuously calibrating the propagation velocity of an acoustic signal without the aid of a slave vessel.
It is another object of this invention to provide a method for calibrating the propagation velocity of an acoustic signal without knowing the distance between the transmitting and receiving points.
It is yet another object of the invention to provide a method for readily measuring or calculating the distance between a first and a second point without using fixed triangulation techniques.
It is still another object of this invention to provide a method for measuring distances between a first point and at least three other points located along a line laterally offset from the first point.


An electrophotographic photoconductor including a metal tube and a photoconductive layer on the metal tube, wherein the metal tube has an outer diameter of 40 mm to 300 mm, and has a total runout of 5 μm to 70 μm relative to a driving axis thereof.

1. Field of the Invention
The present invention relates to an electrophotographic photoconductor; and an image forming method, an image forming apparatus and a process cartridge each using the electrophotographic photoconductor.
2. Description of the Related Art
In recent years, image forming apparatuses such as copiers, laser printers and facsimiles have increasingly been required to achieve high image quality.
Electrophotographic photoconductors used for image formation are rotated and subjected to necessary or intended treatments such as charging, latent image formation, developing and transferring with various units arranged around them.
For achieving high image quality, it is necessary to perform each treatment uniformly on the entire electrophotographic photoconductor. The electrophotographic photoconductors are rotated during these treatments and thus, are required to have high runout accuracy.
In general, an electrophotographic photoconductor has a metal tube and a photoconductive layer, and flanges are provided at openings of both ends of the metal tube.
The metal tube is produced through extruding, drawing and surface treatment.
For example, Japanese Patent Application Laid-Open (JP-A) No. 2007-025270 discloses a metal tube having a total runout of 80 μm relative to a driving axis thereof.
However, use of such a metal tube having a large total runout cannot accurately superpose multicolor images on top of another (inaccurate superposition of multicolor images), not providing high-quality images. Further, the metal tube is a hollow tube and thus, the larger the outer diameter thereof, the more difficult attainment of high runout accuracy.
Extrusion for producing a metal tube has generally been performed with the porthole method. However, as disclosed in JP-A No. 2002-287395, the metal tube produced with the porthole method has a seam, so that it has a low inner-diameter roundness. Even when this metal tube is subjected to drawing and surface treatments, an electrophotographic photoconductor having a high runout accuracy cannot be obtained.
Also, conventionally, in an attempt to attain high total runout accuracy, the metal tube is cut with its deformation or strain being corrected by holding means (see JP-A Nos. 2008-292882 and 2006-255881). However, even in this case, when released from the holding means after completion of cutting, the metal tube is returned to the original shape; i.e., deformed or strained again, problematically causing a drop in total runout accuracy.
In the recent applications such as full color printing, inaccurate superposition of multicolor images becomes problematic. Especially in image forming apparatuses for the commercial printing market, the number of toners increases from four—black, yellow, magenta and cyan—to five or six—those four colors plus clear color and/or special color, in order to respond to a variety of printing applications. Thus, inaccurate superposition of multicolor images becomes problematic more and more.

Electrophotographic photoconductor, image forming method, image forming apparatus and process cartridge


A sensor measures a displacement of a sensor, and a control part of a wire saw calculates a sliding load in accordance with the measured displacement and an initial tension of the wire. Then, the control part compares the calculated cutting load with a preset reference value, and controls an ingot feed speed for a drive unit of a workpiece feed table in accordance with the results of the comparison.

1. Field of the Invention
The present invention relates generally to a wire saw control method and a wire saw for slicing a workpiece such as silicon, glass and ceramics, into a number of wafers.
2. Description of Related Art
A wire saw forms a wire row by winding a wire on a plurality of grooved rollers, and runs the wire at a high speed and presses a workpiece against the wire row to thereby slice the workpiece into wafers. When the wire saw slices a column-shaped workpiece, the slicing length varies according to the slicing positions such as a slicing start position, a slicing end position and a slicing intermediate position. This changes the cutting resistance to the wire and the wire deflection (a wire displacement in a workpiece feeding direction). The change in the wire deflection causes the wire to run unstably and deteriorates the workpiece slicing accuracy.
To address this problem, a conventional wire saw estimates the cutting resistance according to the workpiece slicing position, and controls a workpiece feed speed according to the estimated cutting resistance, thus preventing a change in the wire deflection.
The cutting resistance, however, varies according to a variety of conditions such as the shape of the workpiece and the workpiece feed speed, and thus, it is difficult to correctly estimate the cutting resistance. For this reason, the conventional wire saw cannot slice the workpiece accurately.

Super Silicon Crystal Research Institute Corp.


A cassette assembly line including, a tape reel leadering and placement station having a table rotatable between reel supply, leader supply/clip/cutting and tape reel placement substations. The reel supply substation places unleadered tape reels in equally spaced relation on the rotary table. The table rotates to present unleadered tape reels to the leader supply/clip/cutting substation. A first reel is fed a leader supply, which leader is secured by a leader clip. The rotary table is then rotated so that the leader supply extends across a second and third tape reel, and leader clips secure the leader supply to the second and third tape reels. The leader is then cut between the second and third tape reels to form an exact length leader for the first and second tape reels. The leadered pair is then transferred to a cassette shell by the reel placement substation. In effect, the cut end still attached to the leader supply becomes the leader for the next pair. Thus, specific rotation of the rotary table and equal radial spacing of the tape reels serve to measure the leader predictability and reliably every time so that there is no variation in leader lengths from one cassette to another, which greatly facilitates subsequent automatic tape loading. Various other work stations are employed, such as a dust door insertion station. The entire assembly line is driven by a single drive motor and all operations are cammed to a single drive shaft.

This invention relates to tape cassette assembly and, more particularly, to a method and apparatus for assembling tape cassettes.
Tape cassettes are usually assembled on an assembly line, wherein various components are installed in a cassette base or cover and the base and cover are mated.
As an example, a conventional VHS video cassette assembly line generally includes the following parts, the order of which may be varied, as known in the art: conveyor belts for moving cassette covers and cassette bases from station to station; a station for installing a multi-piece reel lock in the base; a station for installing a dust door and a dust door spring on the cover; a station for applying lubricant to posts on the base which receive plastic rollers; a station for installing the plastic rollers; a station for locating guidepost sleeves on other posts formed on the base; a station for removing a recording prevention tab from the base exterior; a station for correctly orienting the guidepost sleeves on the posts; a station for installing a dust door latch and spring into the base; a station for attaching a reel leaf spring on the cover; a station for installing a pair of leadered tape reels (without tape) into the cassette base, i.e., one end of a leader is applied to the hub of one tape reel and the other end of the leader is applied to the hub of the other tape reel; a station for installing a pressure flap in the base; and a station for mating and securing the cover and the base.
Once the cassettes are assembled, they are usually sold to another company which then automatically attaches blank tape to the leader and loads the cassette by winding the tape reels using a tape loading machine, such as described in U.S. Pat. Nos. 4,572,450 or 4,512,904. The cassette can then be sold as a blank cassette or recorded with, e.g., a movie and sold as a pre-recorded tape cassette.
Despite the fact that millions of video cassettes are produced on such an assembly line each year, this line is characterized by the following drawbacks.
Specific to the leader application station, the leader is measured, cut and applied to the hubs via leader clips which catch the leader ends between the clips and corresponding recesses formed in the hubs, and then the tape reels are wound. The measuring, cutting and applying steps can be manual or automatic. The leader specifications set by JVC, the licensor of the VHS video cassette, are very strict regarding leader length because the automatic tape loading machines must be able to efficiently and quickly grasp the leader, attach tape thereto and load the tape in the desired length by winding the tape reels. Further, in conventional practice, the adjacent reels of respective pairs are spaced apart. A double cut is made between these pairs, which leaves about a 11/2 inch scrap of leader for each pair. This scrap represents a significant costly waste since millions of cassettes are manufactured.
However, the conventional manual or automatic methods of measuring, cutting and applying the leader often result in irregular leader lengths, thereby frustrating automatic tape loading, increasing rejects, increasing costs, decreasing output, etc.
More generally, this conventional assembly line is relatively slow, requires significant maintenance and operator assistance, takes up a large amount of space, and is relatively costly. Most importantly, the conventional system usually uses and arm which catches and indexes a shell along the assembly line. The arm then moves back to its original position and catches another shell, etc. This back-and-forth motion is redundant and takes up valuable assembly time.
Thus, the prior art still does not provide the most cost-or time-efficient assembly line for producing video cassettes.


Aspects of the invention include methods of selectively reducing the deleterious activity of mutant extended trinucleotide repeat containing genes in a cell, as well as compositions used in such methods. The deleterious activity (e.g., toxicity and/or dis-functionality of products encoded thereby) of a mutant extended trinucleotide repeat containing gene may be selectively reduced in a variety of different ways, e.g., by selectively decreasing SPT4 mediated transcriptional activity, by enhancing functionality of proteins encoded thereby, etc. Aspects of the invention further include assays for identifying agents that find use in methods of the invention, e.g. as summarized above. Methods and compositions of the invention find use in a variety of different applications, including the prevention or treatment of disease conditions associated with the presence of genes containing mutant extended trinucleotide repeats, such as Huntington's Disease (HD).

Polyglutamine (PolyQ) diseases are a class of diseases consisting of nine genetically distinct disorders. They include Huntington's disease (HD), dentatorubral-pallidoluysian astrophy (DRPLA), SBMA and spino-cerebellar ataxia 1, 2, 3, 6, 7 and 17 (SCA1/2/3/6/7/17). Because these diseases are caused by the expansion of a translated CAG repeats that codes for the glutamines, they are also known as CAG repeat diseases.
One common physiological characteristic shared among these genetically distinct diseases is that patients who suffer from the diseases are all found to have proteinaceous deposits in their brains. Although in each of these diseases, the proteinaceous deposit is associated with a different protein, the proteins all contain an expanded stretch of glutamines. To date, this expanded stretch of polyQ sequence in the disease-related proteins is the only known genetic mutation implicated in all the polyQ diseases.
Additional tri-nucleotide repeat diseases exist in which expansion of the repeat is located within regions of the gene that do not encode a protein. Examples of such repeats include CAG or CTG tri-nucleotide repeats. RNA encoded by genes that contain such repeats may form foci that incorrectly localize or regulate RNA binding proteins, leading to detrimental effects.
Among polyQ diseases, HD is perhaps the most well-known among the general public because of its devastating effects on the patients. The disease is associated with selective neuronal cell death occurring primarily in the cortex and striatum. It is a fatal and cruel disease that progressively deprives patients of their movement, cognition, and personality, exacting significant economic and emotional tolls on the patients and their families. The frequency of HD is particularly prevalent among people of Western European descent (about 1 in 20,000). Unfortunately, there is presently no cure for this terrible disease.
Currently, available treatments for HD are mainly limited to managing the macroscopic symptoms. For example, one of the newest compounds approved by the FDA, tetrabenazine, is a drug for reducing hyperkinetic movements in HD patients. Tetrabenazine is a vesicular monoamine transporter (VMAT) inhibitor which promotes early degradation of neurotransmitters. Thus, the drug merely treats the symptom, not the root of the disease. Other drugs currently used for treating HD include neuroleptics and benzodiazepines. No presently known treatment is attempting to address the root cause of HD.
As mentioned above, the root cause of HD is an abnormal expansion of CAG repeats in a gene within the CNS cells, specifically the gene Htt which encodes the protein huntingtin (Htt). In a normal person, there are about 8-25 constitutive repeats of CAG nucleotide sequence in the Htt gene. In a HD patient, the number of CAG repeats are expanded to 36 or more. Because this type of mutation is dominant, a person only needs to inherit one copy of the mutated huntingtin gene to develop HD.
Recent cell and animal model studies have provided evidence that aggregates formed by mutant Htt play a critical role in the progression of HD. It has been observed that the mutant Htt proteins can leave behind shorter fragments from parts of the polyQ expansion when subjected to proteolytic cleavages. If too many copies of glutamine exist in the mutant Htt, the polar nature of glutamine will lead to undesirable interactions with other proteins. In particular, mutant Htt with too many copies of glutamines will form hydrogen bonds with one another and aggregate rather than fold into functional proteins. Over time, the accumulated protein aggregates will damage the neuronal cells, leading to cell death and neurological deficit in the patient. The damaging effects of the protein aggregates have been corroborated by experiments showing that chemical reagents capable of inhibiting the formation of protein aggregates can enhance survival of cells and ameliorate pathology of HD in a mouse model. However, notwithstanding such evidence, it has been argued by some scientists that visible aggregates represent a coping response that cells use to sequester toxic proteins containing extended polyQ regions.

This patent is subject to a terminal disclaimer.

Selective reduction of the deleterious activity of extended tri-nucleotide repeat containing genes

The Board of Trustees of the Leland Stanford Junior University


A lighting device may include a light radiation source board carrying at least one electrically powered light radiation source, e.g. a LED source, and a frame-like housing having a window, the board of the light radiation source being arranged in the housing with the light radiation source facing window.

In designing lighting devices, e.g. by employing solid-state light radiation sources such as LED radiation sources, the need may arise to protect the device against the outer environment (e.g. in terms of Ingress Protection or IP).
Various implementations may envisage, as a protection element, a protection screen of a plastic material. This solution, however, may not be able to meet the flammability requirements imposed by some international standards, or the need to ensure good optical properties (essentially the transparency to light radiation) during the lifetime of the product.
In order to meet such requirements one may resort to glass covers (e.g. screens); besides being advantageously inexpensive, such covers may offer good protection features against electrical shocks and as regards flammability.
The use of glass covers also offers other advantages, e.g. the possibility of an easy removal of the glass protection cover in order to permit maintenance or replacement with a different cover having different optical properties (e.g. as regards diffusion, transparency, colour, scattering of the light radiation and so on).
The need may moreover be felt to make the mounting process of the lighting device quick and easy, without degrading other properties such as:                the possibility of achieving a good protection (e.g. IP-grade) level in a stable and reliable mounting structure (also as regards thermal stresses),        device ventilation, so as to offer stable and reliable luminous flux properties, and/or        the possibility of combining several lighting devices in arrays.

Abstract: A glass cover covering the window is inserted in the housing by sliding along the housing or by tilting against the housing.