A magnetron sputtering electrode for use within a magnetron sputtering device having more uniform cooling of the target with the use of a water chamber including water diverters to establish a turbulent water flow within the water chamber. The electrode also includes a direct power coupling to the cathode body to avoid degradation of the power supplied to the electrode. The electrode further includes introduction of process gas in an interstitial space between the anode shield and the cathode shield. The electrode also includes the use of removable shaped magnets providing improved target utilization and run times and a choice of erosion pattern and balanced or unbalanced sputtering by simple magnet substitution. In one embodiment, the invention includes the use of a threaded anode shield and a threaded cathode shield which significantly reduces the overall electrode size for a given target diameter.

1. Field of the Invention
The present invention relates to the field of vacuum sputter coating apparatus and particularly relates to an improved sputtering process and apparatus, and more particularly, to the construction of an improved cathode/anode assembly which provides faster deposition rates, better uniformity in the material deposited and longer lasting targets which in turn permit longer run times between periods of downtime.
2. Description of the Prior Art
The present invention is directed to an improved magnetron sputtering apparatus. A typical magnetron sputtering device includes a vacuum chamber having an electrode contained therein, wherein the electrode includes a cathode portion, an anode portion and a target. A vacuum is drawn in the vacuum chamber followed by the introduction of a process gas into the chamber. Electrical power supplied to the electrode produces an electronic discharge which ionizes the process gas and produces charged gaseous ions from the atoms of the process gas. The ions are accelerated and retained within a magnetic field formed over the target, and are propelled toward the surface of the target which is composed of the material sought to be deposited on a substrate. Upon striking the target, the ions dislodge target atoms from the target which are then deposited upon the substrate. By varying the composition of the target, a wide variety of substances can be deposited on various substrates. The result is the formation of an ultra-pure thin film deposition of target material on the substrate.
What is termed the electrode above (which includes both a cathode portion and anode portion) is sometimes simply called a cathode by those skilled in the art. While the inventor recognizes that convention, the discussion below does not follow this convention because calling the electrode a cathode will only cause confusion in the following discussion which discusses separately the cathode and anode portions of the electrode.
Several problems exist with respect to known magnetron sputtering devices.
First, the sputtering process produces intense heat. In order to prolong the life of both the target and the sputtering device, the sputtering cathode, particularly the area behind the target, is typically cooled with water. In the known prior art sputtering devices, water simply enters a water chamber associated with the cathode and circulates around the circumference of the water chamber, and exits the water chamber. This method and apparatus for cooling the cathode is not particularly effective, and provides a significant limitation on the prior art magnetron sputtering devices because the power supplied, and in turn, deposition rates, must be held at a reduced level to avoid overheating the cathode assembly. Alternatively, if the power supplied exceeds this threshold, at substantially high operating temperatures due to inefficient cooling, cracks will form in highly stressed target materials, such as ceramics and brittle metals. Also, the heat buildup causes higher electrical resistance which impedes the flow of electrons which yields lower deposition rates than would otherwise have been possible if such heat were not present.
Typically in the prior art, an electrical power cable was attached to the water chamber base plate, and an electrical circuit to a cathode body traveled from the base plate through the water chamber sidewalls to the cathode body. The interface of the base plate and the sidewall, while sealed with an O-ring seal, still resulted in the formation of corrosion and poor electrical contact degrading the electrical circuit due in part to an oxidation buildup at the base plate/sidewall interface. This resulted also in unsteady process parameters and difficulty in obtaining RF matching.
Targets of the prior art are typically held within or adjacent to the electrode by one or more target clamps. In the prior art, such clamping mechanisms were quite bulky, resulting in a much larger diameter electrode than would have otherwise been necessary to accommodate the bulky clamping mechanism. Further, prior art clamping mechanisms are not able to adjust to a wide range of target thicknesses and many involved the use of small screws to hold the clamping mechanism in place, which screws were difficult to start, and easy to strip and/or lose.
Further, in electrodes of the prior art, an anode shield was employed which was also bulky in design, also resulting in a much larger overall size than the given target area. Typically, the prior art anode shield was fixed to a water chamber base plate, and a clamping mechanism was attached at the opposite end with screws or welds to provide an anode shield. Further, the anode-to-cathode spacing was fixed and not adjustable. A smaller overall size is desirable because for a given target size it permits closer proximity of the cathode to the substrate, which yields more uniform depositions on the substrate. The lack of welds is desirable, as welds can cause fluctuations in the magnetic fields which is undesirable. Eliminating the screws permits smaller overall dimensioning and eliminates the starting, stripping and/or misplacement of screws.
Prior art electrodes were maintained in a gas chamber, in which a process gas was injected which could then be ionized. Higher gas pressures and more volume of gas were required than were truly necessary because the ionizing gas was really necessary only over the target area, and not within the entire chamber. An additional limitation with the prior art electrodes included the fact that the use of higher volumes of gas also resulted in a higher ratio of gas inclusions and defects on the substrate during the coating operation resulting in films with less than desired uniformity.
Prior art magnets were comprised of a series of separate individual magnetic pieces. These individual magnetic pieces resulted in magnetic field fluctuations between the pieces, which resulted in less than uniform magnetic fields and an inefficient use of the target area because the magnetic field was not sufficiently uniform to use all or nearly all of the target area.
In addition, the use of individual magnetic pieces further required the use of an additional device known as a magnetic "shaping ring" that increased the size and cost of the electrode. This ring, placed between the magnets and the target area, functioned in the prior art to shape and unify the magnetic field. However, it also weakened the field in doing so and moved the magnets further away from the target.
Elimination of the shaping ring would permit a much closer target-to-magnet distance which would allow more magnetic field to "passivate" or flow through the target area and the stronger magnetic field would permit much higher deposition rates and greater plasma density. Plasma density here refers to the number of gaseous ions retained within the magnetic field. The higher the field strength, the fewer gaseous ions can escape the magnetic field, or conversely, the more ions are retained within the field. Increasing the number of ions within the magnetic field is referred to as increasing the plasma density. With increased plasma density, higher power can be supplied allowing higher deposition rates.
In addition to increasing the target-to-magnet distance, the magnetic shaping ring has the additional disadvantage of "soaking up" or dissipating the magnetic field which reduces the strength of the overall magnetic field. The weaker magnetic field permits the undesirable consequence of the escape of both gaseous ions and secondary electrons from the magnetic field. Secondary electrons are created during the ionizing process when the gaseous atom is ionized to form the gaseous ion and accompanying secondary electrons according to standard charge balancing theory.
Importantly, the presence of the magnetic shaping ring substantially limited the prior art's ability to sputter magnetic materials to only very thin magnetic materials, such as foils and the like, on the order of 3 to 7/1000ths in thickness. Certainly, targets having the standard target thickness of approximately 1/8 to 1/4 inch could not be composed of magnetic material in the prior art due to the presence of the magnetic shaping ring. Magnetic materials could not be sputtered for three reasons. First, the magnetic shaping ring forced a larger target-to-magnet distance as described above weakening the magnetic field over the target area. It should be noted that with each incremental increase in target-to-magnet distance, the magnetic field was reduced two times in strength and; therefore, minor differences in target-to-magnet distances resulted in significant field strength loss. Second, the magnetic shaping ring soaked up part of the magnetic field itself, as described above. Finally, the magnetic target material shunted whatever magnetic field strength was left over the target area. For most applications, at least 300 gauss field strength was needed over the target area with higher field strengths being desired as described above. With prior art electrodes utilizing non-magnetic target materials, this threshold could be reached. However, when magnetic target materials were substituted for the non-magnetic materials, this threshold could not be reached unless the magnetic target material was very thin, in the nature of a foil as described above.
In the prior art, simple rectangular magnets were used. These rectangular magnets resulted in magnetic flux lines which tended to "dig out" the target area in a rather steep valley-like formation exhibiting a steep erosion profile in the magnetic null point area. The target area would rapidly wear thin in the null point area, but much target material remained that was therefore not utilized outside of this area. This also resulted in much shorter process run times, as the target would wear more quickly and the process would have to stop while the target was being replaced.
A need exists in the art for a magnetron sputtering device and process for sputtering wherein the sputtering electrode is more efficiently and effectively cooled, and wherein electrical connections are not susceptible to degradation due to oxide formations. Further, a need exists in the art for a magnetron sputtering device and process for sputtering wherein the overall electrode size relative to target area is reduced and wherein both the anode and cathode shields are easily adjusted and wherein the target area is easily retained and replaced, and wherein the anode-to-cathode spacing may be adjusted. A need also exists in the art for a magnetron sputtering device and process for sputtering wherein a minimum of ionizing gas is used. Finally, the need exists in the art for a magnetron sputtering device and process for sputtering wherein the magnetic shaping ring can be eliminated and wherein targets of standard thicknesses, such as 1/8 to 1/4 inch in cross section composed of magnetic materials, can be sputtered.


A beam rotation angle detecting apparatus includes a light receiving portion for detecting the incidence positions of at least two beams moving on concentric circles while describing a circle or an arc, and an arithmetic system for calculating and outputting the angle between a straight line linking at least two incidence positions detected by the light receiving portion together and a predetermined reference line.

1. Field of the Invention
This invention relates to a beam rotation angle detecting apparatus used in a rotary encoder, a linear encoder or the like to optically effect position detection, and a rotation detecting apparatus and a beam rotation angle detecting method.
2. Related Background Art
Heretofore, to obtain the rotation angle of a beam rotating while forming a track as a circle, as disclosed in Japanese Patent Application Laid-Open No. 6-235622 and Japanese Patent Application Laid-Open No. 6-347289, the light receiving position thereof has been detected by a circular ring-shaped or circular light receiving sensor for receiving a beam.
Also, U.S. Pat. No. 4,760,436, discloses that two beams are received by independent arcuate light receiving sensors, and these sensors are used properly in conformity with the rotation angle to thereby detect a round of continuous angle.
In the above-described beam rotation angle detecting apparatus, however, there has been the problem that the rotation angle of a beam cannot be accurately detected under the influence of the deviation between the center of rotation of the beam and the center of the light receiving sensor.

Beam rotation angle detecting apparatus, rotation detecting apparatus and beam rotation angle detecting method


An improved system and method of automatic folding and storage of furniture is disclosed. In one embodiment, an improved combination foldable table and seats system provides a mechanism for automatically raising the combination foldable table and seats system to a ceiling before automatically folding the legs of the table to which foldable seats are attached. In this manner, the combination foldable table and seats system can be folded, stored and again lowered to the ground without the need for a user to lift or move furniture and without the need for extra storage space.

Pieces of furniture such as dining tables, game tables and their associated chairs tend to occupy a large portion of space in people's homes. This can be inconvenient, particularly for those living in small living areas such as apartments and small houses. To address this and other similar problems, foldable tables and chairs have been developed. The use of such foldable furniture in households, however, is limited because folding a table and a number of chairs after each meal is labor and time intensive. Moreover, storage of such items requires large empty storage spaces.
Furniture items such as dining tables and chairs also prevent venues such as hotels providing conference rooms and dining rooms from efficiently utilizing their spaces. For example, to adequately address the needs of a client organizing a large conference, venues generally need to provide two rooms, one for the conference with rows of chairs and one with tables for dining. That is because even if foldable chairs and tables are utilized, it is often time and labor intensive to fold, remove and/or set up a large number of tables and chairs. Moreover, a large storage space will be needed for storage of such items, when not in use.
Therefore, a need exists for providing an improved system and method for folding and storage of foldable furniture.


A carrier storage layer is located in a region of a predetermined depth from a surface of an N− substrate, a base region is located in a shallower region than the predetermined depth and an emitter region is located in a surface of the N− substrate. The carrier storage layer is formed by phosphorus injected to have a maximum impurity concentration at the predetermined depth, the base region is formed by boron injected to have the maximum impurity concentration at a shallower position than the predetermined depth and the emitter region is formed by arsenic injected to have the maximum impurity concentration at the surface of the N− substrate. An opening is formed to extend through the emitter region, base region and the carrier storage layer. On the inner wall of the opening, a gate electrode is formed with a gate insulating film therebetween.

1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. In particular, the invention relates to a semiconductor device having an insulated gate transistor and a method of manufacturing the semiconductor device.
2. Description of the Background Art
Recently, in the fields of household electrical appliances and industrial power units for example, inverter devices have become employed. For an inverter device, usually a commercial power supply (AC power supply) is used. Therefore, the inverter device is configured to include a converter unit making a forward conversion of once converting an AC voltage from the AC power supply into a DC voltage, a smoothing circuit and an inverter unit making a reverse conversion of converting the DC voltage into an AC voltage. As a main power element of the inverter unit, an insulated gate bipolar transistor (hereinafter referred to as IGBT) capable of performing relatively high-speed switching operation is chiefly employed.
Regarding an inverter device used for electric-power control, the electric current rating of one IGBT chip is approximately a few tens to a few hundreds of amperes (A) and the voltage rating thereof is approximately a few hundreds to a few thousands of volts (V). In a circuit using an IGBT as a resistance load and successively changing the gate voltage, electric power that is the product of the electric current and voltage is generated in the form of heat within the IGBT. Therefore, the inverter device requires a large heat radiator, resulting in deterioration in electric-power conversion efficiency. Further, depending on the combination of an operating voltage and an operating current, the temperature of the IGBT itself increases, resulting in thermal breakage of the IGBT. As such, in the inverter device, a resistance load circuit using an IGBT as a resistance load is rarely used.
In most of inverter devices, the load is an electric induction machine (inductive load motor). Therefore, in the inverter device, an IGBT is usually operated as a switch to repeat the OFF state and the ON state so as to control the electric power energy. Regarding switching of the inverter circuit of the inductive load, the ON state is established after a turn-on process while the OFF state is established after a turn-off process. The turn-on process refers to transition of the IGBT from the OFF state to the ON state and the turn-off process refers to transition of the IGBT from the ON state to the OFF state.
The inductive load is connected to a point of an intermediate potential between an upper arm element and a lower arm element, and an electric current is flown to the inductive load in both of the positive and negative directions. Therefore, in order to allow the electric current flowing through the inductive load to return from the load-connected portion toward a high-potential power supply or to flow from the load-connected portion toward the ground, a freewheel diode is necessary for circulating the current in a closed circuit of the inductive load and the arm element. For an inverter device having a relatively small capacity, a field-effect transistor (MOSFET: Metal Oxide Semiconductor Field-Effect Transistor) is used in some cases.
A voltage to be applied to the gate electrode for turning on the IGBT is called ON voltage (Vce (sat)). A configuration for providing a lower ON voltage is disclosed, for example, in Japanese Patent Laying-Open Nos. 8-316479 and 2002-353456 disclosing a carrier storage type IGBT which is an improved version of the trench gate type IGBT. In the carrier storage type IGBT, an n-type carrier storage layer is formed on one surface of an N− substrate, and a p-type base region is formed on the carrier storage layer.
In a predetermined region of a surface of the base region, an emitter region is formed. In a region except for the emitter region of the surface of the base region, a p+ contact region is formed. Further, an emitter electrode electrically connected to the emitter region is formed. Through the emitter region, base region and carrier storage layer, an opening is formed to reach an n-type region of the N− substrate, and a gate electrode is formed on the inner wall surface of the opening with a gate insulating film interposed therebetween.
On the other surface of the substrate, an n-type buffer layer is formed, and a p-type collector layer is formed on the buffer layer. On a surface of the collector layer, a collector electrode electrically connected to the collector layer is formed. The conventional carrier storage type IGBT is configured in this way.
In this carrier storage type IGBT, a voltage of at least the threshold voltage (Vth) is applied as a gate voltage to the gate electrode to form an n-channel region that is located near the gate electrode in the p-type base region. Accordingly, electrons are injected from the emitter region through the n-channel region into the N− substrate.
It is supposed that, in the state where a voltage of at least the threshold voltage is applied to the gate electrode, a voltage (collector voltage) is applied to the collector. Under this condition, the collector voltage is applied at least to the extent that causes the pn junction of the buffer layer and the collector layer to be forward biased. Then, from the collector electrode, holes are injected into the N− substrate. In the N− substrate, conductivity modulation occurs to cause the resistance value of the N− substrate to suddenly decrease, and accordingly the electric current flows and the electrically conductive ON state is established.
Thus, in the carrier storage type IGBT, the carrier storage layer located immediately under the p-type base region stores holes and electrons. Therefore, as compared with the trench gate type IGBT without the carrier storage layer, the carrier storage type IGBT has the advantage that the N− substrate has a higher carrier density and accordingly a lower resistivity, and thus a lower ON voltage is achieved.
In recent years, with the purpose of providing a compact and lightweight inverter device, an IGBT has been proposed that is called reverse conducting IGBT or reverse conducting carrier storage type IGBT having a free-wheeling diode formed in the configuration of the IGBT or carrier storage type IGBT and having electrical conduction capability to substantially the same degree in both directions.
The conventional carrier storage type IGBT, however, has the following problem. The n-type emitter region, the p-type base region and the n-type carrier storage layer of the carrier storage type IGBT are each formed by injecting impurity ions of a predetermined conductivity type and thermally diffusing the injected impurities. In the conventional carrier storage type IGBT, respective impurity concentration profiles are each the Gaussian distribution where the maximum impurity concentration is located near the surface of the N− substrate due to limitations of the manufacturing apparatus (ion injection apparatus).
The final impurity concentration profile of the n-type emitter region, the p-type base region and the n-type carrier storage layer is a triple diffusion profile comprised of the three Gaussian-distribution impurity concentration profiles overlapping each other. The triple diffusion profile has a p-type impurity concentration profile or an n-type impurity concentration profile depending on the relative relation or subtraction between respective numbers of impurity atoms. Thus, the threshold voltage (Vth) of the IGBT is likely to vary, as described below.
For a carrier storage type IGBT used for an inverter device, the threshold voltage (Vth) is set to approximately 5 V. Therefore, the maximum concentration of the p-type impurity in a region where the channel is formed along the gate insulating film in the p-type base region is approximately 1×1017 cm−3 to 1×1018 cm−3. In a region corresponding to the p-type base region, for example, the acceptor impurity concentration is at least approximately 1×1018 cm−3 and the donor impurity concentration is approximately 5×1017 cm−3.
The impurity concentration (density) of the portion which is located in the p-type base region and in which the n-type channel is formed is determined by subtracting the number (density) of donor atoms from the number (density) of acceptor atoms (the number of acceptor atoms—the number of donor atoms). The acceptor may be for example boron (B) or aluminum (Al) in silicon (Si), and the donor may be for example phosphorous (P) or arsenic (As) in silicon (Si).
In the case where the accepter impurity concentration and the donor impurity concentration are each on the above-described order, the impurity concentration of the finally formed p-type impurity region is approximately 1×1017 to 2×1017 cm−3. Therefore, the p-type base region has the number (density) of acceptor atoms and the number (density) of donor atoms that are each larger (higher) than the impurity concentration (density) of the p-type base region.
Therefore, in the process of injecting impurity ions acting as acceptors, if the amount of injected impurity ions varies, the impurity concentration of the finally formed p-type base region also varies. In the process of injecting impurity ions acting as donors, if the amount of injected impurity ions varies, the impurity concentration of the p-type base region also varies. In other words, the impurity concentration of the p-type base region is influenced by the variation of the amount of injected impurity ions acting as acceptors and the variation of the amount of injected impurity ions acting as donors.
The threshold voltage of the IGBT has a certain range with respect to the center of variation of the amount of injected impurities. Regarding the conventional IGBT, the standard deviation is large, resulting in variation of the threshold voltage. If the threshold voltage varies and the voltage value is lower than a predetermined voltage, the resultant problem is that the semiconductor device is broken in the load short-circuit operation mode.

Semiconductor device and manufacturing method thereof


The invention relates to a lighting-means carrier (5) for a strip-lighting luminaire, comprising: at least one lighting-means circuit board (30) having light-emitting diodes (33) that can be arranged thereon; and at least one heat sink (31) thermally connected to the lighting-means circuit board (30). In a central region, the lighting-means circuit board (30) is rigidly connected to the heat sink (31) in such a way that substantially no relative motion between the lighting-means circuit board (30) and the heat sink (31) is possible. In at least two further regions, the lighting-means circuit board (30) is connected to the heat sink (31) in a floating manner, the lighting-means circuit board (30) therefore being arranged on the heat sink (31) in such a way that the lighting-means circuit board can be moved in relation to the heat sink (31) outside of the central region. The invention further relates to a strip-lighting luminaire having at least one lighting-means carrier (5) according to the invention.

Numerous different strip-lighting lamp assemblies are known from the prior art. Large spaces (e.g. super markets, factories, offices, etc.) can be equipped with strip-lighting lamp assemblies or strip-lighting systems having long lighting strips adapted to these spaces. Typically, these strip-lighting lamp assemblies have u-shaped strip-lighting rails, in which the wiring, the (control) electronics, and the light sources are disposed.
In order to simplify the installation, it is furthermore known to construct the strip-lighting lamp assemblies with modular units as far as possible. By way of example, DE 20 2012 101 765 U1 discloses a first module in the form of a device mount and a second module in the form of a light source mount disposed in a u-shaped strip-lighting rail. In particular, the light source mount has a light source printed circuit board, having light emitting diodes disposed thereon, or that can be disposed thereon. A heat sink is normally disposed on the light source printed circuit board, and thermally connected to the light source printed circuit board. The thermal connection between the light source printed circuit board and the heat sink is normally provided by gluing the light source printed circuit board onto the heat sink by means of an adhesive having good thermal conductive properties. As an alternative to the use of thermally conductive adhesive, it is likewise known to screw the heat sink to the light source printed circuit board at various points to ensure reliable contact between the light source printed circuit board and the heat sink.
It has been shown in practice that the light source printed circuit board and the heat sink have different thermal expansion behaviors (in particular due to the use of different materials having different thermal expansion coefficients). For this reason, in practice, high tension can occur at the connection of the light source printed circuit board to the heat sink, which may lead to crack formation in the light source printed circuit board or even breakage of the light source printed circuit board.
Based on this prior art, the object of the present invention is to create a light source mount having a light source printed circuit board and a heat sink thermally connected to the light source printed circuit board, in which the risk of crack formation due to different thermal expansions of the light source printed circuit board and the heat sink is eliminated or significantly reduced.
This and other objectives still to be specified below or that can be discerned by a person skilled in the art, are achieved by the present invention.

Lighting-means carrier for a strip-lighting luminaire


It is described a relay node for providing wireless access for a user equipment to a telecommunication network. The relay node includes an antenna, which is adapted to operate with different spatial characteristic antenna patterns, and a transceiver unit, which is coupled to the antenna and which is adapted to activate at least one of the different spatial characteristic antenna patterns. It is further described a corresponding method for providing wireless access for a user equipment to a telecommunication network via a relay node.

A cost efficient solution for improving the performance and in particular the spatial coverage of Long Term Evolution (LTE) and LTE-Advanced (LTE-A) telecommunication networks is the utilization of relay nodes (RN), which allows installations without having terrestrial broadband access or the need to install micro wave links. In a relay enhanced telecommunication network there are basically three different types of radio connections:    A) A first type of radio connection is the connection between a base station (BS) and a user equipment (UE). This type of connection is called a direct link.    (B) A second type of radio connection is the connection between a BS and a RN. This type of connection is called a backhaul link or a relay link.    (C) A third type of radio connection is the connection between a RN and a UE. This type of connection is called an access link.
RNs are to become an intrinsic feature in particular for the LTE-Advanced technology and are currently undergoing a standardization process within 3GPP.
In a relay enhanced telecommunication network RNs have to serve two purposes: Firstly, they have to receive the radio transmissions from its serving BS, which is often also called donor BS. Secondly, they have to provide cellular coverage to UEs, which are located in those areas where the donor BS cannot provide sufficient service level. Those areas are for instance mobile service coverage holes such as indoor areas, which are due to building structures electromagnetically shielded from the donor BS. In order to achieve a high performance of a relay enhanced telecommunication network, the antenna characteristic, which is the spatial characteristic antenna pattern defining the radiation pattern of an antenna, has to be adapted to both above-described purposes. This means that one has to find a compromise between fulfilling these two purposes.
Typically, the first purpose, i.e. a good radio connection between the RN and the BS, is considered as to be much more important than the second purpose, i.e. good radio connection between the RN and US(s), because the backhaul/relay link has to carry data transmissions which are related to all UEs, which are currently connected to the RN. Further, the link between RN and BS will be used for backhaul traffic in the event of handover of a UE.
Specifically, an efficient improvement of indoor coverage requires that the radio link extending between the RN and its donor BS has a good or a very good quality, because this link will be used as backhaul for the RN, possibly to transfer huge amount of data both in the uplink (UL) and in the downlink (DL) direction.
If one considers cheap so called "all-in-one" box RNs, which have to be installed indoor, the need of providing a good quality for the radio link extending between the RN and its donor BS will cause that the RN has to be installed in the direct proximity of a window of the respective building. However, this may not be optimal from the indoor coverage point of view.
Generally speaking, known RNs do not ensure that the links to UEs can also have a high quality and this impacts the overall performance of the telecommunication network. A low quality link between a UE and a RN can lead to increase the retransmission of data or to a possible request for handover, both of which will consume radio resources and increase the amount of signaling. As a consequence, the performance of the telecommunication network decreases.
There may be a need for improving the performance of a relay enhanced telecommunication network.

Relay node operable with different spatial characteristic antenna patterns


A rotary optical link joint having a small change in transmission loss during rotational use is provided. In order to realize this, the rotary optical link joint according to the present invention is an optical link joint that relatively rotatably holds, centering around an axis line (19, 29), a first optical fiber (11) and a second optical fiber (21), wherein a part or all of the first optical fiber (11) and the second optical fiber (21) are configured by a multi-core optical fiber having a plurality of cores, and wherein the plurality of cores is arranged in a circular or annular area that is sectioned by a concentric circle centered around the axis line (19, 29) of the multi-core optical fiber.

In recent years, monitor cameras with rotationally movable mechanisms have been widely used for the purposes of security or monitoring of production lines.
In the case of surveillance monitors, for example, high definition surveillance monitors such as Hi-Vision (HV) cameras are often used as surveillance monitors. In such monitor cameras, a two-way digital transmission function would be essential for capture-tracking control information of a subject to be photographed, photographing information of a camera, etc.
Furthermore, policies for obliging safety when driving a car by transferring the change in air pressure and temperature of a car tire to the main body of the car have been implemented in the United States and other countries. In such a case, a two-way transmission function is needed. In addition, the realization of means for rapidly transmitting information obtained at the head part to the body part of a robot and a high-speed digital link between objects that rotate with respect to each other is requested.
As described above, in recent years, the need for a digital link between rotating objects has been rapidly increasing.
However, since a line transmission method such as an electric wire may cause a cut or a remarkable reduction in reliability when it is applied to a rotationally movable mechanism, there is a need for the development of rotationally movable mechanisms to which a radio transmission method is applied.
An example of a rotationally movable mechanism of a radio transmission method may include a rotary optical link joint disclosed in, for example, patent document 1. The rotary optical link joint disclosed in patent document 1 is characterized in that a bundle fiber that is bundled from a plurality of single-core optical fibers is relatively rotatably maintained centered around an axis line.


Provided are an apparatus and method for transmitting uplink control information (UCI) in a multiple carrier system. The method comprises the steps of: generating uplink control information for measuring a downlink component carrier (DL CC) set in a terminal; selecting a physical uplink shared channel (PUSCH) of one uplink component carrier from among PUSCHs of at least two uplink component carriers set in the terminal, according to a priority order; and transmitting the uplink control information through the PUSCH of the selected uplink component carrier.

In the case of a wide band wireless communication system, effective transmission/reception schemes and utilization schemes have been proposed in order to maximize the efficiency of limited radio resources. One of systems that are being taken into account in the next-generation wireless communication systems is a multi-carrier system. A multi-carrier system means a system for configuring a wide band by aggregating one or more carriers, each having a smaller bandwidth than a wide band, that is, a target, when a wireless communication system supports a wide band.
A conventional wireless communication system, such as 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE), uses carriers having various bandwidths, but the system is a single carrier system using one carrier. In contrast, the next-generation wireless communication system, such as LTE-Advanced (LTE-A), can be a multi-carrier system using an aggregation of multiple carriers, that is, a Carrier Aggregation (CA).
In a single carrier system, for example, LTE, in uplink in which a mobile station transmits a signal to a base station, a single carrier characteristic is used to efficiently utilize the power amplifier of the mobile station. A mobile station uses a control region in which control information is transmitted and a data region in which data is transmitted separately and does not send signals in the control region and the data region at the same time in order to maintain the single carrier characteristic.
In contrast, in a multi-carrier system, for example, LTE-A, simultaneous transmission in the control region and the data region may be permitted or not permitted depending on a configuration. In a multi-carrier system, a mobile station may need to send both control information and data at a specific point of time even when simultaneous transmission in the control region and the data region is not permitted. In this case, the mobile station may send the control information and the data in the data region at the same time. This is said that the control information is piggybacked (or multiplexed) and transmitted.
In a multi-carrier system, if transmission in the data region using a plurality of carriers is scheduled at a point of time at which a mobile station must send control information, there is a problem in that whether the control information must be piggybacked on the data region of what carrier and transmitted is not clear.

Apparatus and method for transmitting uplink control information in a multiple carrier system


An imaging lens includes a lens barrel, an imaging unit and a light shielding unit. The lens barrel includes a base wall formed with a light incident hole at an optical axis of the imaging lens and a surrounding wall that extends from and cooperates with the base wall to define a receiving space. The imaging unit includes a plurality of imaging components each having an annular front contact surface and an annular back contact surface. The light shielding unit includes an annular retaining portion clamped between an adjacent pair of the imaging components, an object-side protruding portion with a first edge, and an image-side protruding portion with a second edge.

1. Field of the Invention
The present invention relates to an imaging lens capable of blocking stray light.
2. Description of the Related Art
Referring to FIG. 1, a conventional imaging lens includes a lens barrel 11, lens components 121-124 disposed in the lens barrel 11 along an optical axis 10, two light shielding components 125, 126 disposed between the lens components 121, 122, and between the lens components 123, 124, respectively, and a washer 127 clamped between the light shielding component 126 and the lens component 124. The light shielding components 125, 126 are disposed to block stray light for preventing degradation of image quality. The washer 127 serves to reduce the thickness of a mounting portion of the lens component 124 that is to be assembled with the lens component 123, effectively aiding the manufacturing of the lens component 124.
However, the conventional light shielding components 125, 126 do not effectively block stray light at large incident angles. As shown in FIG. 1, stray light 110 can still arrive at an imaging plane 128 after reflection and refraction among the lens components 121˜124 in the lens barrel 11, resulting in adverse effect on image quality. Therefore, it is required to provide an imaging lens that may effectively block most of stray light for promoting image quality.
Furthermore, if the contacting surfaces between the lens components 121˜124 and the conventional light shielding components 125, 126 are uneven due to manufacturing tolerances, spaces will form between adjacent contacting surfaces. This causes the conventional light shielding components 125, 126 which are extremely thin to deform easily and to be difficult to be attached evenly to the lens components 121˜124. Such drawbacks affect the precision in the assembly of the conventional imaging lens, adversely affecting the light shielding effect and the image quality. Therefore, such conventional imaging lens has components that are difficult to manufacture, a large number of components that affects precision in assembly, and the image quality problems due to the adverse effect on precision in assembly.

Imaging lens capable of blocking stray light


A first convolutional coder (building-block trellis coder) is used to establish a minimum squared Euclidian distance (MSED) between signal points within a coded constellation building block. A second convolutional encoder (tiling encoder) is designed to ensure that the building block's MSED is maintained between building blocks once they are tiled onto an integer lattice. When this approach is applied to the trellis code of the WiMAX standard, a 3 dB coding is realized. Recall that Wei's 16-state 4D code suffered from a 1.36 dB due to constellation expansion, resulting in a net 4.66 dB coding gain. Our building block approach recovers 1.33 dB of this loss with only a minor increase in coding complexity. We then use the building block approach to derive simpler and more powerful higher dimensional codes that provide further gains still over the Wei family of multidimensional codes.

1. Field of the Invention
This invention relates generally to trellis coded modulation techniques for use in digital communication systems. More particularly, the invention relates to methods and apparatus for the encoding and decoding of two-dimensional and higher-dimensional trellis-encoded signal constellations using an efficient and practical multilevel form of trellis coded modulation.
2. Description of the Related Art
A family of WiMAX trellis codes is discussed in IEEE Std. 802.16a 2004 "WiMAX standard", which is incorporated herein by reference; see especially sections 8.2-8.4. Many relevant details of the WiMAX trellis codes are described herein. For example, see FIGS. 1a-1e herein which reproduce FIGS. 161, 163, 165, 167, 174, 175 and 171 from the IEEE 802.16a-2004 standard. In the disclosure herein, the term "trellis code" should be understood to refer generally to a single-level or multilevel trellis coded modulation scheme, i.e. a "trellis code" as used herein includes convolutionally encoded bits, optional uncoded bits, and a bit mapper that maps these bits to a trellis coded signal constellation.
FIG. 1a also shows a 64-state, rate-½ convolutional coder 161 that gives rise to a code with a free Hamming distance of dfree=10. This large free Hamming distance is desirable because it can be used to multiplicatively extend the minimum squared Euclidian distance (MSED) between adjacent signal constellation points. For example, if the uncoded MSED between neighboring constellation points in a small and compact signal constellation with no uncoded bits is D2, the trellis encoder 161 can increase this to a coded MSED of dfree×<D2=10×D2. In larger constellations that also include uncoded bits, the actual MSED improvement is typically much less. A good source of reference to understand many theoretical aspects of the present invention is "Error control coding, 2nd Ed.," by Shu Lin and Daniel J. Costello, Jr., Prentice Hall, 2004, ("the Lin and Costello reference"). Table 12.1 (pages 539-540) of the Lin and Costello reference tells how many states are needed for a convolutional code to achieve a given Hamming distance at a given coding rate, e.g., rate-½, rate-⅔, or rate-¾. These tables are very useful when designing trellis codes as discussed below.
FIG. 1a shows a prior art rate-¾ trellis encoder 163 constructed by mapping two coded bits produced by the rate-½ encoder 161 onto an I-component (in-phase) and a Q-component (quadrature-phase) to produce a trellis coded 16-QAM constellation 174a as shown in FIG. 1c. To better understand the operation of encoder 163 we start by defining what we call a 4-QAM (or, QPSK) "coded constellation building block," 20 which is illustrated in FIG. 2. This constellation building block can be thought of as a direct I/Q mapping of the X and Y outputs of the rate-½ convolutional encoder 161. That is, a 2D building block encoder 215 can be implemented using a rate-½ coder such as the coder 161 to generate the 2D 4-QAM building-block constellation 20. The X and Y outputs of the rate-½ convolutional encoder 161 respectively correspond to coded bits c1 and c0. The encoder 163 maps the encoder 161's coded bits along with two uncoded bits onto a 16-QAM constellation 174a as shown in FIG. 1c. The present invention is based in part of the observation that this 16-QAM constellation can be viewed as a tiling of four copies of the 4-QAM building block of FIG. 2 into the four quadrants of the I/Q plane, centered at the four points, (±2, ±2), which we call tiling points. More generally, in trellis coded modulated systems, a constellation building block typically corresponds to the lower order bits which are trellis coded, i.e., with no uncoded bits. As discussed in further detail below, the uncoded bits then have the effect of replicating this building block and tiling onto larger trellis coded signal constellations.
The minimum squared Euclidian distance (MSED) between uncoded constellation points within the 4-QAM coded building block 20 can be readily seen to be D2=4. Any change of a single coded bit in FIG. 2 contributes to the Euclidian distance by an amount 4. Therefore, if the convolutional encoder 161 (dfree=10) is used to encode the input bits to the building block 20, that the MSED between coded trellis sequences on the 4-QAM building block 20 increases to D2=4×10=40. The encoder 163 maps the coded bits of the building block 20 along with two uncoded bits. As mentioned above, the addition of the uncoded bits has the effect of placing (or "tiling") one of the 4-QAM coded building blocks 20 in each quadrant of the constellation 174a, centered at the tiling points (±2, ±2). While the minimum distance between trellis sequences inside each of these 4-QAM building blocks 20 is D2=40, the MSED between trellis sequences encoded onto the 16-QAM constellation 174a using encoder 163 is only D2=16. It would be desirable to have an efficient and low cost way of improving upon this MSED, for example, to bring the MSED of the 16-QAM constellation 174a up to D2=40 or higher.
FIG. 3 shows a block diagram of a prior art rate-¾ punctured encoder 30 used in the WiMAX standard. The encoder 30 generates a punctures the code 161 to generate the puncture-coded version of 16-QAM constellation 171 of FIG. 1e. That is, it uses a different rate-¾ encoding rule than the one used by encoder 163 and also maps this on to a Gray code enumerated signal constellation 171. FIG. 3 is not provided in the 802.16a-2004 standard but can be derived by studying FIGS. 161 and 165 and using Table 174 of the 802.16a-2004 standard (Table 174 not reproduced herein). Table 174 of the 802.16a-2004 standard identifies a specific puncturing pattern used by the punctured rate-¾ encoder 30 portion of an encoder 165 shown in FIG. 165 of FIG. 1b.
Because the encoder 30 does not map any uncoded bits, FIG. 3 can be viewed as directly generating a 16-QAM constellation building block which uses the Gray-coded 16-QAM constellation 171. The combination of the punctured coding 30 and the Gray code constellation enumeration allow the coded constellation 171 to achieve an MSED of D2=20 instead of the 16-QAM constellation 173's MSED of D2=16. The encoder 165 additionally takes in two uncoded bits which cause the bit mapper portion of the encoder 165 to tile four copies of the 16-QAM building block 171, one in each quadrant, to form the rate-⅚ trellis coded 64-QAM constellation 174b. This time the building blocks are bigger (16-QAM vs. 4-QAM), so they are centered at tiling points (±4, ±4). Because the tile centers are at (±4, ±4), the distance between 16-QAM tile centers is D=8 or D2=64. This larger distance between tile centers does not affect the overall MSED, so that the 16-QAM building block 171 dominates and the MSED of the 64-QAM constellation 165 is D2=20.
Also shown in FIG. 1b is a coder 167. The coder 167 also uses the same punctured rate-¾ encoder 30, but maps this along with four uncoded bits to provide an overall rate-⅞ trellis coded 256-QAM constellation 175 of FIG. 1d. The encoder 167 can be thought of as tiling sixteen copies of the 16-QAM building block 171 by mapping their centers to points (±4, ±4) and (±4, ±12), (±12, ±4) and (±12, ±12) of the constellation 175. Note that the distance between tile centers in both the 64-QAM and the 256-QAM constellations is D=8, or D2=64. The 16-QAM building blocks 171 (or, "tiles") generated by the encoder 30 have an intra-block MSED of D2=20 and an inter-block (or "inter-tile") MSED between tile centers of D2=64. The MSED of the coded 256-QAM constellation 175 thus also achieves an overall MSED of D2=20. This distance is lower because the encoder 30 is a rate-¾ coder and its effective free Hamming distance is five. However, since D2=20<64, the MSED of this larger 16-QAM building block 171 is not diminished once it is tiled. That it, the 16-QAM building block 171's MSED is preserved after tiling in both the constellations 174b and 175 because the larger tile 171's centers are spaced far enough apart, i.e., D2=64. It would be desirable to have an efficient and low cost way of improving upon this MSED by being able to efficiently tile smaller building blocks with higher MSED without loosing the benefit due to closer-space tiling points.
Another example of a trellis coded modulation scheme is the LSB (least significant bit) coding technique used in the ITU-J.83 digital television transmission standard. J.83 transmission is also used in the down link of DOCSIS cable modems. As illustrated in FIG. 4, in LSB-coded signal constellations, each of the I and Q dimensions of the QAM constellation are indexed independently in such a way that the LSB of each dimension alternates along the I and Q axes. In FIG. 4, note that the right-most bit of each signal point alternates between successive signal points along the Q-dimension and the next-right-most bit alternates between successive signal points along the I-dimension. LSB codes create an overall checker-board pattern where the different subsets correspond to the red and black squares of a checkerboard. The LSB codes treat the I and Q axes of the QAM constellation like separate real-valued PAM constellations. Constellation points in each of these component PAM constellations alternate between LSB=0 and LSB=1 subsets. For example in FIG. 4 going along the Q-direction, constellation points in any column can be grouped into an LSB=0 set if the LSB of the constellation point's corresponding right-most bit is 0, or into an LSB=1 set if the LSB of the constellation point's corresponding right-most bit is 1. Similarly, going along the I-direction, any row of constellation points can be grouped into the LSB=0 set if the next-rightmost LSB of the constellation point's corresponding bit sequence is 0, or into the LSB=1 set if the next-rightmost LSB of the constellation point's corresponding bit sequence is 1. When bits have been generally mapped in this way, we say that the LSB-coding bit mapping rule 40 has been employed. The MSED between the LSB=0 and LSB=1 subsets in each dimension can be increased applying the next-rightmost and right-most LSBs to respective I and Q convolutional coders. As discussed below, in this disclosure we use LSB coding for tiling operations, so we have labeled the axes of FIG. 4 to spread points twice as far apart as the J.83 standard. Using this labeling, the distance between adjacent constellation points is D=4 or D2=16 (this relabeling will not change performance or normalized minimum distance but is useful herein). If the free Hamming distance of the convolutional code used in the LSB encoder is dfree, then MSED between the LSB=0 and LSB=1 subsets is increased by a factor dfree. In J.83, a pair of 16-state LSB encoders with a Hamming distances of three is used. This increases the MSED between the adjacent sequences corresponding to the same LSB subset to D2=3×16=48. If an LSB coder with Hamming distance dfree=4 is chosen, then the distance between adjacent points in the same LSB subset increases to D2=4×16=64. If a convolutional code with dfree>4 is selected for use with the LSB code, no further MSED will be obtained because bit errors in the next-least-significant (uncoded) bit correspond to a distance of D2=64. Therefore if a tiling code with D2>64 is desired, more than just the LSBs would need to be protected.
FIG. 5 shows a J.83 constellation encoder 12 that can generate the LSB-coded QAM constellation of FIG. 4 when Nuc=2 uncoded bits are used. When the J.83 trellis encoder 61a of FIG. 6 is used in the constellation encoder of FIG. 5, the MSED between adjacent constellation points is increased by a factor of three over an uncoded QAM constellation. As discussed in the 1998 Gather and Ali article (see accompanying IDS), other trellis encoders such as the 32-state encoder 61b or the 64-state encoder 61c can also be used with the constellation encoder of FIG. 5. The encoders 61b and 61c have a free Hamming distance of dfree=4 and thus multiply the MSED between adjacent sequences by a factor of four over an uncoded QAM constellation, giving D2=4×16=64. Going to higher-state codes with dfree>4 cannot increase this distance further in the prior art LSB approach. This is because the squared distance between points in the LSB=0 and LSB=1 subsets is capped by D2=64. While LSB codes are highly efficient and simple to implement, it would be desirable to have an improved trellis coded modulation system that can provide further gains over prior art LSB encoded systems such as the trellis codes used in the J.83 standard. It would also be desirable to use the above LSB codes to improve tiling performance of larger constellations created by tiling building blocks onto an integer lattice.
As used herein, "integer lattice" is generally ZN or a subset of ZN, where ZN denotes the integer points of an N-dimensional vector space. In some cases the integer points may include complex integers (i.e., a+jb where a and b are integers). The vector space CN of complex numbers is generally taken to be an N-dimensional "signal space." Received signals in a receiver are processed and most often converted to points in the signal space. A decoder portion of the receiver attempts to map sequences of the received signal points in CN back onto complex integers of the integer lattice, e.g. ZN. The integer lattice is also a subset of CN. An integer lattice generally extends to infinity and a given trellis encoder maps bits to a signal constellation which is finite and is thus a subset of the integer lattice.
Yet another example of a trellis coded modulation scheme is the Wei family of multidimensional trellis codes. Such codes are described in detail in U.S. Pat. No. 4,713,817, which is incorporated herein by reference. FIG. 7a shows a constituent 2D signal constellation 70 used in the 4D Wei codes. FIG. 7b shows Wei's 4D coder 75 used to generate his 4D 16-state code. FIG. 8a shows a constituent 2D signal constellation 80 used in the 8D Wei codes. FIG. 8b shows Wei's 8D coder 85 used to generate his 8D 64-state code. While these codes are highly advantageous, their coding gain is limited by an inherent constellation expansion that comes about as an artifact of code construction. Note that Wei's 4D encoder 75 takes in fourteen bits each 4D mapping frame, i.e., m=7 bits per 2D signaling interval. To send seven bits using an uncoded constellation requires 128 constellation points, normally transmitted using a 128 CR (cross) constellation. Wei's 192-point constituent 2D constellation 70 has sixty-four more points than the uncoded 128 CR (cross) constellation that would be needed to send the same seven bits per interval if no coding were employed. The 128 CR constellation is made up of the 128 points inside the crosses drawn in FIGS. 7a and 8a. Cross constellations come about when an odd number of bits, m, are sent each 2D signaling interval. If an even number of bits is sent each 2D interval, the constellation typically has a square shape. If a fractional number of bits are sent each interval, the constellation takes on some other shape. For example, the signal constellation 70 has 27+27×0.5=128+64=192 points, and can thus carry 7.5 bits per interval, while the constellation 80 has 27+27×0.25=128+32=160 points and can thus carry 7.25 bits per interval.
On page 492 of Wei's IEEE Transactions on Information Theory article, Vol. IT-33, July 1987 ("Wei'87") (incorporated by reference herein), Wei explains that his 16-state 4D trellis code looses 1.36 dB due to constellation expansion. Col 2 of p. 492 of Wei '87 states: "[4.66 dB] is also the largest possible coding gain that can be achieved with the partitioning of the 4D rectangular constellation of Table I." Col. 2 of p. 496 states: "Given the partitioning of the 4D or 8D rectangular constellation of section IV-A or -B, it is impossible to increase the coding gain further or reduce the error coefficient of the 16-state or 64-state code of those two subsections." It would be desirable to recapture the bulk of this coding loss due to constellation expansion with increase in coding/decoding complexity on the order of some small amount like 25%-45%.
Another related area of art in need of improvement relates to multilevel codes. For example, see the articles provided in the accompanying IDS entitled "Multilevel Codes: Theoretical Concepts and Practical Design Rules," by Wachsmann et al, IEEE Transactions on Information Theory, vol. 45 no. 5, July 1999, and "Coded Modulation by Multilevel-Codes: Overview and State of the art, by J. Huber et al; and "Multilevel Codes: Distance profiles and Channel Capacity," 1994, by J. Huber. These articles discuss a family of multilevel coders and decoders. The coders described in these articles generally maintain specified coding rates on each of a plurality of bit lines, use long interleavers, have larger delays, are relatively complex to implement, and use a subset partitioning technique that creates subsets of points that are spread out at a lower level partitioning but are clustered at upper levels. It would be advantageous to have a multilevel coding scheme that could be characterized generally as a multilevel code, but that was much simpler to implement. It would be desirable to have a multilevel coding scheme assigns groups of points in lowest level partition to tight clusters around tile points in an upper level coding partition. It would be advantageous to provide efficient multilevel coding structures and methods that whose implementation complexity is on the same order as current trellis coded modulation schemes already used in various telecommunication standards. A simple and efficient family of multilevel coding and decoding schemes would be useful in improving existing trellises coded modulation schemes such as the ones found in various telecommunication standards.


In a semiconductor memory device, when positive high voltages are respectively applied to a control gate(20) and a drain region(14) and a source region(13) is grounded, hot electrons are produced in the boundary between the drain region(14) and a channel region. The hot electrons are injected into a floating gate(18) through a tunnel oxide film(17). Consequently, information is written. At the time of reading out information, the drain region(14) is grounded, a positive read voltage is applied to the source region(13), and a predetermined sense voltage is applied to the control gate(20). At this time, the area between the source and the drain is kept in a non-conduction state if electrons are stored in the floating gate(18), while conduction occurs between the source and the drain if no electrons are stored therein. Since no hot electrons are produced in the boundary between the drain region(14) and the channel region at the time of reading, it is possible to effectively prevent so-called soft writing.

1. Field of the Invention
The present invention relates to a semiconductor memory device suitably implemented by an EPROM (Erasable Programmable Read-Only Memory), an EEPROM (Electrically Erasable and Programmable Read-Only Memory) or the like and using as a memory cell a transistor having a floating gate, and a method of writing and reading out information for the semiconductor memory device.
2. Description of the Prior Art
A transistor, which has a structure shown in FIG. 10, having a floating gate has been conventionally applied to a memory cell of an electrically programable ROM (Read-Only Memory) such as an EPROM or an EEPROM. More specifically, an n.sup.+ -type impurity region having a high concentration is provided on a p-type semiconductor substrate 1 to form a source region 2 and a drain region 3, a floating gate 5 electrically insulated from the semiconductor substrate 1 is formed on the surface of the semiconductor substrate 1 between the source region 2 and the drain region 3 with an insulation film 4 being interposed therebetween, and a control gate 7 is further formed on the floating gate 5 with an insulation film 6 being interposed therebetween.
When positive high voltages are respectively applied to the control gate 7 and the drain region 3 and the source region 2 is grounded to cause a current to flow between the source and the drain, hot electrons are produced in an end 3A of the drain region 3. The hot electrons pass through the insulation film 4 to be injected into the floating gate 5. Information is thus written.
The profile of the impurity concentration of a diffusion layer constituting the drain region 3 is rapidly changed in the boundary between the drain region 3 and a channel region 8. Consequently, a strong electric field is formed in the boundary between the channel region 8 and the drain region 3, so that hot electrons are easily generated.
When information is read out, the source region 2 is grounded and a predetermined positive voltage (for example, 2 volts) is applied to the drain region 3. In this state, a predetermined sense voltage is applied to the control gate 7. A threshold voltage Vth for allowing conduction between the source and the drain differs depending on the state of the floating gate 5. That is, the threshold voltage Vth is increased in a state where electrons are injected into the floating gate 5, while being decreased in a state where no electrons are injected. Therefore, the above-mentioned sense voltage is set to a voltage between the high threshold voltage and the low threshold voltage. The sense voltage is applied to the control gate 7, to watch whether or not conduction occurs between the source and the drain. If conduction occurs between the source and the drain, no electrons are injected into the floating gate 5, so that information stored in the memory cell is "0", for example. On the other hand, if no conduction occurs between the source and the drain, electrons are injected into the floating gate 5, so that information stored in the memory cell is "1". Information stored in the memory cell can be thus read out.
Stored information can be erased by irradiating ultraviolet rays to disperse the electrons in the floating gate 5 as well as by grounding the control gate 7 and applying a positive high voltage to the source region 2 to cause F-N tunneling of the electrons in the floating gate 5 into the source region 2.
Meanwhile, in the conventional memory cell, the impurity concentration of the drain region 3 is rapidly changed in the boundary between the drain region 3 and the channel region 8 so as to increase the production efficiency of hot electrons. The conventional memory cell has a structure in which hot electrons are very easily generated. Accordingly, trace amounts of hot electrons are generated even by a low voltage applied to the drain region 3 at the time of reading. Consequently, every time information is read out from the memory cell, trace amounts of hot electrons produced in the end 3A of the drain region 3 are injected into the floating gate 5. As a result, the threshold voltage Vth of the transistor is gradually changed. Such a phenomenon is generally referred to as soft writing.
FIG. 11 is a graph showing soft writing characteristics, which shows the results of measurement made taking as lifetime a time period during which the change of the threshold voltage Vth is kept at not more than 10 percent in a state where a read voltage V.sub.D is continuously applied to the drain region 3. Curves L1, L2, and L3 respectively correspond to cases where the gate length is set to 0.9 .mu.m, 0.8 .mu.m, and 0.7 .mu.m. It is understood from FIG. 11 that the higher the read voltage V.sub.D is, the shorter the lifetime is. For example, assuming that it is required as resistance to soft writing that the shift of the threshold voltage Vth is not more than 10 percent in a continuously reading state over ten years, the read voltage V.sub.D must be suppressed to not more than 1.2 volts in the case of a cell having a gate length of 0.8 .mu.m.
Since the voltage V.sub.D applied to the drain region 3 cannot be thus significantly increased at the time of reading, there is a limit on a read current of the memory cell. Therefore, the reading speed is prevented from being increased.

Semiconductor memory device and method of writing and reading out information for the same


A failure diagnosis apparatus for a vehicle enables communications between a gateway, which automatically and effectively collects information on a condition of a vehicle having a plurality of network buses, and an information center outside the vehicle in an automatic and efficient manner. A failure diagnosis section is mounted on the gateway installed on the vehicle. The vehicle-installed gateway has a connecting section for connection to information communications terminals such as portable telephones through wireless communications. In addition, the vehicle-installed gateway has a protection processing section for performing security processing on possession information possessed by the gateway.

This application is based on Application No. 2001-047264, filed in Japan on Feb. 22, 2001, the contents of which are hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a failure diagnosis apparatus for a vehicle which performs a failure diagnosis on the vehicle having a variety of electronic controllers based on information about two or more of the electronic controllers.
2. Description of the Related Art
In the past, such a failure diagnosis apparatus was proposed, for example, in Japanese Patent Application Laid-Open No. 62-161037. In this failure diagnosis apparatus, a plurality of electronic controllers are connected with one another through a common network bus in a typical vehicle in the form of a motor car. Operating conditions in the respective electronic controllers are collected by a failure diagnosis apparatus through the network bus, so that the failure diagnosis apparatus carries out a failure diagnosis based on the mutual relations between the electronic controllers.
On the other hand, it is conceived that failure diagnosis information is transmitted to an external information center (i.e., an information center outside a vehicle) for failure diagnosis service by using a radio communications device installed on a vehicle, as described in Japanese Patent Application Laid-Open No. 62-94442. However, this system involves a problem in that it is necessary to install the radio communications device on the vehicle, thus increasing the cost of the vehicle. To cope with this problem, there has been proposed a method of providing failure diagnosis service by connecting an information communications terminal such as a portable telephone with electronic controllers installed on a vehicle, as described in Japanese Patent Application Laid-Open No. 2000-182188.
As referred to above, in the case of a vehicle equipped with a failure diagnosis apparatus, however, it is the current state of the art that a plurality of network buses corresponding to respective electronic controllers mounted on a vehicle are required to be installed on the vehicle owing to restrictions such as performance, cost, etc., of the electronic controllers. Therefore, there is a problem that it is difficult to connect all the electronic controllers with a common network bus.
Besides, in the method of providing failure diagnosis service by connecting an information communications terminal such as a portable telephone with electronic controllers installed on a vehicle in order to enable communications between the vehicle and an external information center, wiring arrangements, connecting operations and the like are required for the purpose of making portable telephones available to this end. Thus, there are the following problems; the assembly cost increases, and the user feels troublesomeness, etc.
In addition, in respect of connection with information communications terminals, there is a difference between the life cycle of the information communications terminals, such as portable phones, and the life cycle of vehicles, such as motor cars. Consequently, there arises the problem that when the service user has changed his or her portable telephone, the user might become unable to use the current service.
Further, in cases where an information communications terminal is connected with a navigation unit, etc., there is also a problem that it is impossible to diagnose a device for controlling a door lock under the condition of the navigation unit being unable to operate, such as when the engine is being started, when an ignition key is in an xe2x80x9cOFFxe2x80x9d state, etc.
Furthermore, in the conventional failure diagnosis service using communications with an external information center, the diagnosis service using external communications (i.e., communications between a vehicle and the external information center) is not provided except when there takes place a failure in the vehicle or when the external information center makes a request to the target vehicle to be serviced. Therefore, as long as failure does not occur in the vehicle, the driver cannot utilize the diagnosis service to any satisfactory extent. Moreover, when the information center makes a request to vehicles, it is necessary for the information center to keep track of the operating situations of all the vehicles to be serviced. For these reasons, it is difficult to increase profits on the side of service providers.
On the other hand, the vehicle information such as operating condition information, failure diagnosis information and the like includes position information on the driver""s own vehicle, time and speed informtion at passing locations, etc. Therefore, when the vehicle information is leaked outside the vehicle, there might be the occurrence of damage to privacy, money and the like. However, since information protection processing means for preventing this are scattered in respective electronic controllers, there are problems such as high cost, a long period of development or the like in achieving the effective protection of such information.
Moreover, there is a further problem in that in case of diagnosing a failure by means of a diagnosis device installed in the place of a dealer, it takes a long time for the dealer specify the cause for the failure if the details of the failure are accurately communicated to the dealer. Or, there is a problem in that when diagnosing a failure, it is necessary for a dealer to sufficiently understand a diagnosis manual and perform a failure diagnosis in accordance with a suitable diagnosis procedure, thus resulting in an inefficient operation.
The present invention is made in view of the above situations, and has for its object to provide a failure diagnosis apparatus for a vehicle which is capable of collecting the information on the condition of a vehicle having a plurality of network buses in an automatic and effective manner thereby to carry out a failure diagnosis on the vehicle,
Another object of the present invention is to provide a failure diagnosis apparatus for a vehicle which is capable of communicating automatically and efficiently with an information center outside the vehicle.
Bearing the above objects in mind, according to the present invention, there is provided a failure diagnosis apparatus for a vehicle in which a plurality of electronic controllers mounted on the vehicle are connected with one another by means of a plurality of network buses for transmitting data between the electronic controllers through the network buses, the apparatus including a gateway with a protocol conversion section for enabling the plurality of electronic controllers to mutually communicate with one another through the plurality of network buses. The gateway comprises: an information acquisition section for acquiring control information or diagnosis information about diagnoses respectively performed by the plurality of electronic controllers; and a failure diagnosis section for diagnosing failure of the vehicle by using the control information or diagnosis information acquired by the information acquisition section.
In a preferred form of the present invention, the failure diagnosis apparatus for a vehicle further comprises an information communications terminal connecting section adapted to be connected to an information communications terminal through wireless communications to enable communications with a device outside the vehicle.
In another preferred form of the present invention, the information communications terminal connecting section is replaceable with another one according to a change of the information communications terminal.
In a further preferred form of the present invention, the gateway further comprises an intrinsic information storage section which acquires intrinsic information possessed by the information communications terminal and stores the acquired intrinsic information of the information communications terminal.
In a yet further preferred form of the present invention, the gateway starts a diagnosis when detected information on a condition of the vehicle satisfies a prescribed condition.
In a still further preferred form of the present invention, the gateway further comprises an information protection processing section for performing protection processing of possession data, the information obtained from the plurality of electronic controllers connected with the plurality of network buses being protected by using the information protection processing section.
In a further preferred form of the present invention, the gateway further comprises a power supply control section which is connected with a power supply for supplying power to a CPU when an ignition key is in an xe2x80x9cOFFxe2x80x9d state, thereby enabling the gateway to perform a prescribed operation in the state of the ignition key being turned off.
In a further preferred form of the present invention, the gateway cancels a diagnosis service under use based on a diagnosis service cancellation signal.
In a further preferred form of the present invention, the failure diagnosis apparatus for a vehicle further comprises: a data base having information about failure phenomena and diagnosis procedures necessary to diagnose the failure phenomena; a retrieval section for retrieving the data base for the diagnosis procedures based on the failure phenomena; and a trouble diagnosis section for acquiring a diagnosis procedure for diagnosing a failure phenomenon generated in the vehicle by retrieving the data base by use of the retrieval section, the trouble diagnosing section being operable to diagnose the plurality of controllers according to the diagnosis procedure acquired.
The above and other objects, features and advantages of the present invention will become more readily apparent to those skilled in the art from the following detailed description of preferred embodiments of the present invention taken in conjunction with the accompanying drawings.


Provided is an information processing apparatus including: a non-volatile memory; a volatile memory being configured to store first, second and third programs; and a processor configured to: in a first activation processing mode, transfer the first program from the non-volatile memory to the volatile memory; transfer the second program from the non-volatile memory to the volatile memory based on the stored first program; and parallelly perform, first processing based on the stored second program and transfer of the third program from the non-volatile memory to the volatile memory, and in a second activation processing mode, transfer the first program from the non-volatile memory to the volatile memory; transfer the third program from the non-volatile memory to the volatile memory based on the stored first program; and parallelly perform second processing based on the stored third program and transfer of the second program from the non-volatile memory to the volatile memory.

Field of the Invention
The present invention relates to activation control for an image reading apparatus.
Description of the Related Art
Image processing apparatus, such as copying machines and facsimile machines, include an image reading apparatus, for example, a scanner, which is configured to obtain image data by optically reading an image of an original. In recent years, it has been desired that the first copy output time (FCOT), namely, the time taken from the issuance of an instruction to start copying until one sheet is output, be shortened, and that the processing speed in operation of the apparatus be increased. It is also desired that the time taken from the power of the image reading apparatus being turned on until the image reading apparatus is usable, namely, the time taken from the power supply being turned on until activation processing for the image reading apparatus finishes (hereinafter referred to as "activation time"), be shortened.
As a way to increase the processing speed, the read speed of control programs may be increased. Image reading apparatus include a read-only memory (ROM) and a random-access memory (RAM). The control programs are stored in the ROM, but the RAM reads data stored in its memory faster than the ROM reads data stored in its memory. Therefore, during activation of the image reading apparatus, the control programs stored in the ROM are transferred to the RAM, and after the transfer is complete, the control programs are read from the RAM for execution. As a result, compared with when the control programs are directly read from the ROM for execution, the time required to read and execute the control programs can be shortened, namely, the processing speed can be increased.
The RAM is a volatile memory, and thus, when the power supply to the RAM is stopped, the data stored in the RAM is lost. As a result, it is necessary to transfer the control programs from the ROM to the RAM each time the image reading apparatus is activated. However, when all of the control programs are transferred and then the control programs are read from the RAM for execution, compared with when the control programs are not transferred and are read from the ROM for execution, the activation time is elongated by the amount of time taken to transfer the control programs.
In Japanese Patent Application Laid-Open No. 2013-97715, there is proposed a technology for shortening the activation time by reading the control programs from the ROM for execution in parallel with transferring the control programs from the ROM to the RAM. After the transfer of the control programs is complete, the processing speed can be increased by switching the control program read destination from the ROM to the RAM.
In Japanese Patent No. 4111649, there is proposed a technology for reading and executing, in a digital camera in which a mode is specified during activation, a portion of the control programs that is shared by each mode, then determining the specified mode, and reading and executing a required portion of the control programs in accordance with the mode. More specifically, in Japanese Patent No. 4111649, when a photography mode is specified during activation, the portion of the control programs required for the photography mode is read and executed. When a playback mode is specified during activation, the portion of the control programs required for the playback mode is read and executed. With this technology, compared with reading all of the control programs, the activation time can be shortened by the time saved by not reading the portion of control programs that is unnecessary for the specified mode.
The image reading apparatus may be activated as a result of "power supply ON", in which the power supply to the whole apparatus is turned on, or as a result of "return from sleep (i.e., a non-operating state for saving power by stopping the power supply to a portion of the apparatus during a period in which the apparatus is temporarily not in use; a power-saving state)". In order to allow the user to use the apparatus more conveniently, it is necessary to increase the processing speed and shorten the activation time at the same time for both of those cases. Problems involved with increasing the processing speed while also shortening the activation time are now described below.
In the technology described in Japanese Patent Application Laid-Open No. 2013-97715, the processing speed can be increased compared with when the control programs are directly read from the ROM for execution after transfer of the control programs is complete and the control program read destination is switched from the ROM to the RAM. However, during the transfer of the control programs, namely, before the control program read destination is switched from the ROM to the RAM, the processing speed has a possibility of becoming slower conversely. The reason for this is that in the technology described in Japanese Patent Application Laid-Open No. 2013-97715, during transfer of the control programs, the transfer of the control programs from the ROM to the RAM and the reading of the control programs directly from the ROM for execution are performed in parallel. As a result, when there is a conflict between access to the ROM for transferring a control program and access to the ROM for reading and executing a control program, one of the processes has to wait.
In the technology described in Japanese Patent No. 4111649, after the power supply is turned on, first, a portion of the control programs that is shared by each mode is read. However, when the shared portion is large, the reading takes time, and the activation time is only shortened by a small amount. During activation, image reading apparatus have a "power supply ON" mode and a "return from sleep" mode. The processing that needs to be performed during activation is the same for the "power supply ON" mode and the "return from sleep" mode. As a result, the required control programs are also the same, and hence the technology described in Japanese Patent No. 4111649 cannot be applied to image reading apparatus.

Information processing apparatus and image reading apparatus


The present invention discloses high chromium ferritic heat-resistant steel which has remarkable properties that the base metal and welded joints of the steel both exhibit excellent long term creep strength at elevated temperatures over 600.degree. C. excellent resistance to steam oxidation, and excellent toughness at room temperatures. The chemical composition of main elements of the steel of the invention is as follows:. ______________________________________ Cr: 8.0 to 13.0%, W: 1.5 to 4.0%, Co: 2.5 to 8.0%, Ta: 0.01 to 0.50%, Nd: 0.001 to 0.24%, ______________________________________. wherein % means % by weight.. The steel of the present invention further encompasses steels which contain, in addition to the above essential chemical composition, at least one element selected from the group consisting of Sc, Y, La, and Ce, or at least one element selected from the group consisting of Hf, Ti, and Zr, or at least one element from each of the two groups at the same time. When creep property and toughness are required for welded joints, the amounts of W, Mo, Ta, Nb, and B are selected properly.

1. Field of the Invention
The present invention relates to a high chromium ferritic heat-resistant steel. The heat resistant steel of the present invention has excellent long-term creep strength at elevated temperature, high resistance to steam oxidation, and prominent toughness at room temperature. Moreover, the welded joints including heat affected zone (HAZ) have also excellent long-term creep strength and prominent toughness. Therefore, the heat resistant steel of the present invention is suitable for use as a material of equipments operated under conditions of high temperature and high pressure, such as boilers, nuclear power plants, and chemical engineering facilities. More particularly, the heat resistant steel of the invention is advantageously used for making steel tubes for heat exchangers, steel plates for pressure vessels, and turbine parts.
2. Description of the Related Art
Equipments such as boilers, nuclear power plants, and chemical engineering facilities are used under conditions of high temperature and high pressure for long periods. Therefore, heat-resistant steels used for these equipments must have sufficient strength, anti-corrosion properties, and resistance to oxidation at elevated temperature, as well as toughness at room temperature. Moreover, in view of the fact that these steels are also used as structural steels fabricated by welding, the welded joints of the steels must have sufficient long-term creep strength at elevated temperatures and toughness.
For these uses, austenitic stainless steels (such as JIS-SUS321H and JIS-SUS347H steels), low-alloy steels (such as JIS-STBA24 (2 1/4 Cr-1Mo)), and high chromium ferritic steels of a 9-12 Cr series (such as JIS-STBA26 (9Cr-1 Mo)) have heretofore been used. Among them, high chromium ferritic steels are superior to low-alloy steels in terms of strength and anti-corrosion properties in a temperature range from 500.degree. to 650.degree. C. Moreover, high chromium ferritic steels have advantages that they are less expensive than austenitic stainless steels, that they have excellent resistance to thermal fatigue and scale exfoliation due to their high heat conductivities and small heat expansion coefficients. Another notable advantage is that they do not cause stress corrosion cracks. Due to the above-mentioned excellent properties, high chromium ferritic heat-resistant steels have wide applications.
In recent thermal power plants, steam conditions in boilers are becoming higher temperatures and higher pressures in order to achieve high thermal efficiency. In fact, there is a plan to operate thermal power plants under ultra-super critical conditions of 650.degree. C. and 350 atm in the future rather than current super critical conditions of 538.degree. C. and 246 atm. As steam conditions become severe, greater performance is required for steel tubes for boilers. Thus, there is a situation where previous high chromium ferritic steels can no longer satisfactorily meet the above-described requirements due to the shortage of long-term creep strength at elevated temperatures and resistance to oxidation, and particularly resistance to steam oxidation. In this connection, steam oxidation is a phenomenon which occurs on the inside surface of steel tubes of boilers that are exposed to steam of high temperature and high pressure. When scales are generated as a result of oxidation, they tend to come off as the boiler temperature changes. Since exfoliated scales cause severe problems such as plugging of steel tubes, prevention of steam oxidation is an important technical subject.
Austenitic stainless steels have properties that meet the above-described severe requirements. However, their high price limits their use in commercial facilities. Thus, efforts are directed to improve properties of high chromium ferritic steels that are less expensive than austenitic stainless steels and to expand the range of their applications.
As an improvement of the properties of high chromium ferritic steels, a heat-resistant steel containing tungsten into conventional high chromium ferritic steels was developed. For example. Japanese Patent Application Laid-open (kokai) No. 3-97832 discloses a high chromium ferritic steel which has an increased W content compared with conventional ones, and also contains Cu so as to improve resistance to oxidation at high temperatures. Japanese Patent Application Laid-open (kokai) Nos. 4-371551 and 4-371552 disclose high chromium ferritic steels whose strength at elevated temperatures and toughness are enhanced by containing W and Mo with a properly selected ratio between them, and by also containing Co and B.
These high chromium ferritic steels contain a great amount of W, and therefore, they have excellent long term creep strength at elevated temperatures. W, however, is also a ferrite-forming element as are Mo and Cr, a large content thereof inevitably produces .delta.-ferrite in steel. Consequently, a drawback is caused in which the toughness of the high chromium ferritic steel decreases.
In order to effectively prevent a decrease in toughness, high chromium ferritic steels are processed to have a single phase of martensite. Japanese Patent Application Laid-open (kokai) No. 5-263196, following this approach, discloses a heat-resistant steel having a single phase of martensite obtained by reducing the Cr content. Moreover, high chromium ferritic steels with enhanced toughness have been obtained by an addition of austenite-forming elements, e.g., Ni, Cu, Co, etc., into high chromium ferritic steels (Japanese Patent Application Laid-open (kokai) Nos. 5-311342, 5-311343, 5-311344, 5-311345, and 5-311346).
The high chromium ferritic steels disclosed in Japanese Patent Application Laid-open (kokai) No. 5-263196 have the drawback that they have poor resistance to steam oxidation since Mo, Ni, etc. distract a dense and stable scale layer of the corundum type Cr.sub.2 O.sub.3 formed on steel surface. Moreover, the high chromium ferritic steels disclosed, for example, in Japanese Patent Application Laid-open (kokai) No. 5-311342 contain Ni, Cu, etc. abundantly, and therefore, they have low A.sub.c1 and A.sub.c3 transformation points. This means a small resistance to temper softening, which reduces long term creep strength. In addition, when these elements are present, the structure of oxides primarily composed of Cr.sub.2 O.sub.3 is changed. This also brings about another disadvantage that resistance to steam oxidation decreases. In addition, the high chromium ferritic steels disclosed in the latter publication are poor in strength at welded joints, particularly long term creep strength because of softening at heat affected zones (HAZ).
Japanese Patent Application Laid-open (kokai) No. 2-294452 discloses high chromium ferritic steel in which the amounts of Mn, Ni, Cu, etc. are limited at a low level to prevent .delta.-ferrite formed in heat affected zones in an attempt to enhance toughness in welded joints. Japanese Patent Application Laid-open (kokai) No. 6-65689 discloses heat-resistant steel in which softening of heat affected zones is prevented by dispersion hardening of an oxide such as Ta205. However, the steels disclosed in these publications do not have sufficient long term creep strength at elevated temperatures and toughness that would satisfactorily meet the aforementioned severe requirements.
Thus, development is still desired of high chromium ferritic heat-resistant steels which satisfy the requirements of long term creep strength, toughness, and resistance to steam oxidation under ultra-super critical conditions of high temperature and high pressure, and which, when welded, also satisfy severe requirements called for welded joints including long term creep strength at elevated temperatures and toughness.
The present invention was made in view of the foregoing circumstances, and an object of the invention is to provide a high chromium ferritic heat-resistant steel which has excellent long-term creep strength and high resistance to steam oxidation at high temperatures over 600.degree. C. and prominent toughness at room temperatures. Moreover, the present invention provides a high chromium ferritic heat-resistant steel which, when welded, exhibits excellent long term creep strength at elevated temperatures and toughness at room temperatures in welded joints.

High chromium ferritic heat-resistant steel


A system includes a processor and memory to execute an application. The application receives feedback from a target regarding ability of a plurality of resources of the target to service requests from one or more clients. The feedback includes a metric indicative of a load of each of the resources. The application calculates weights for the resources based on the feedback. A weight for a resource is based on a product of a first term that determines a maximum difference in probabilities of selection between two resources and a second term including an exponent that is a difference between a current load of the resource and a current minimum load across the resources determined based on the feedback. The application selects, for servicing a request from one of the clients, one of the resources in round robin manner based on the weights to evenly utilize the plurality of resources.

The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
In computing systems (e.g., data processing systems, communication systems, and so on), the response time depends on the number and availability of resources (e.g., connections between a source and a target). For example, in a network environment, multiple clients may utilize a service provided by a server via multiple connections to the server. In some situations, a single client may utilize a service provided by a server via multiple connections to the server. In other examples, two services (e.g., applications) may communicate with each other by utilizing multiple connections between them. In these examples, the connections are examples of the resources utilized by the clients and services. The number and availability of these resources affect the response times experienced by the clients and services.

Rich resource management incorporating usage statistics for fairness