Cache-coherence computer systems represent cache-lines associated with their processors by linked and shared lists, which can be read-only or read-write. In read-only lists all cache-line copies are the same and may be read by multiple processors at the same time, while read-write lists allow only the head of the list to write to its cache and to invalidate stale cache entries after writing. Main memory of the system always points to the head of the list and includes indications of memory-line states for fresh, stale or no cache line exists. A memory line becomes stale when its associated cache line is modified. A read-write processor seeking to update a cache line requires updating the list from read-only to read-write. A copy of the tail entry is created and made the head of the list, resulting in one entry being in two places on the list. The cache is then updated and invalidation starts concurrently in both directions from head-to-tail and from tail-to-head. Having concurrent fast forward and backward invalidations improves the overall invalidation time about four times over a slow forward invalidation alone.

1. Field of the Invention
This invention relates generally to cache coherence in computer systems having multiple processors with caches, and more particularly to a system and method for updating a cache entry from read-only to read-write.
2. Description of the Background Art
Multiple-processor computer systems involve various processors which at the same time may each work on a separate portion of a problem or work on a different problem. FIG. 1 shows a multi-processor system, including a plurality of Central Processing Units (CPUs) or processors 102A, 102B . . . 102N, communicating with memory 104 via interconnect 106, which could be, for example, a bus or a collection of point-to-point links. Processors 102 access data from memory 104 for a read or a write. In a read operation, processor 102 receives data from memory 104 without modifying the data, while in a write operation processor 102 modifies the data transmitted to memory 104.
Each processor 102 generally has a respective cache unit 108A, 108B, . . . 108N, which is a relatively small group of high speed memory cells dedicated to that processor. A processor 102""s cache 108 is usually on the processor chip itself or may be on separate chips, but is local to processor 102. Cache 108 for each processor 102 is used to hold data that was accessed recently by that processor. Since a processor 102 does not have to go through the interconnecting bus 106 and wait for the bus 106 traffic, the processor 102 can generally access data in its cache 108 faster than it can access data in the main memory 104. In a normal operation, a processor 102N first reads data from memory 104 and copies that data to the processor""s own cache 108N. During subsequent accesses for the same data the processor 102N fetches the data from its own cache 108N. In effect, after the first read, data in cache 108N is the same copy of data in memory 104 except that the data is now in a high-speed local storage. Typically, cache 108N can be accessed in one or two cycles of CPU time while it takes a processor 102 15 to 50 cycles to access memory 104. A typical processor 102 runs at about 333 Mhz or 3 ns (nanoseconds) per cycle, but it takes at least 60 ns or 20 cycles to access memory 104.
A measure of data, typically 32, 64, 128, or 2n bytes, brought from memory 104 to cache 108 is usually called a xe2x80x9ccache line.xe2x80x9d The data of which a copy was brought to cache 108 and which remains in memory 104 is called a xe2x80x9cmemory line.xe2x80x9d The size of a cache line or a memory line is determined by a balance of the overhead per read/write operation versus the usual amount of data transferred from memory and cache. An efficient size for a cache line results in transfers spending about 25% of their time on overhead and 75% of their time on actual data transfer.
A particular problem with using caches is that data becomes xe2x80x9cstale.xe2x80x9d A first processor 102A may access data in the main memory 104 and copy the data into its cache 108A. If the first processor 102A then modifies the cache line of data in its cache 108A, then at that instant the corresponding memory line becomes stale. If a second processor, 102B for example, subsequently accesses the original data in the main memory 104, the second processor 102B will not find the most current version of the data because the most current version is in the cache 108A. For each cache-line address, cache coherence guarantees that only one copy of data in cache 108 can be modified. Identical copies of a cache line may be present in multiple caches 108, and thus be read by multiple processors 102 at the same time, but only one processor 102 is allowed to write, i.e., modify, the data. After a processor 102 writes to its cache 108 that processor 102 must xe2x80x9cinvalidatexe2x80x9d any copies of that data in other caches to notify other processors 102 that their cache lines are no longer current.
FIG. 2A shows valid cache lines D0 for caches 108A to 108N whereas FIG. 2B shows cache 108B with an updated cache line D1 and other caches 108A, 108C, and 108N with invalidated cache lines D0. The processors 102A, 102C, and 102N with invalidated cache data D0 in their respective caches 108 must fetch the updated version of cache line D1 if they want to access that data line again.
Normally and for illustrative purposes in the following discussion, cache coherence protocols are executed by processors 102 associated with their related caches. However, in other embodiments these protocols may be executed by one or more specialized and dedicated cache controllers.
There are different cache coherence management methods for permitting a processor 102 to modify its cache line in cache 108 and invalidate other cache lines. One method (related to the present invention) utilizes, for each cache line, a respective xe2x80x9cshared listxe2x80x9d representing cache-line correspondences by xe2x80x9cdouble-linksxe2x80x9d where each cache has a forward pointer pointing to the next cache entry in the list and a backward pointer pointing to the previous cache entry in the list. Memory 104 has a pointer which always points to the head of the list.
FIG. 3 shows a linked list 300 of caches 108A . . . 108N with the associated memory 104. Memory 104 has a pointer which always points to the head (cache 108A) of the list while the forward pointers Af, Bf, and Cf of caches 108A, 108B, and 108C respectively point forward to the succeeding caches 108B, 108C, and 108D (not shown). Similarly, backward pointers Nb, Cb, and Bb of caches 108N, 108C, and 108B respectively point backward to the preceding caches. Because each cache unit 108 is associated with a respective processor 102, a linked list representation of cache 108 is also understood as a linked list representation of processors 102.
There are typically two types of cache sharing list. The first type list is the read-only (sometimes called xe2x80x9cfreshxe2x80x9d) list of caches for which none of the processors 102 has permission to modify the data. The second type list is a read-write (sometimes called xe2x80x9cownedxe2x80x9d) list of caches for which the head-of-list processor 102 may have permission to write to its cache 108. A list is considered xe2x80x9cstablexe2x80x9d after an entry has been completely entered into or completely deleted from the list. Each of the stable list states is defined by the state of the memory and the states of the entries in the shared list. Relevant states of memory include HOME, FRESH, and STALE. HOME indicates no shared list exists, FRESH indicates a read-only shared list, and STALE indicates the shared list is a read-write list and data in the list can be modified. A processor 102 must get authorization to write to or read from memory. A list entry always enters the list as the list head, and the action of entering is referred to as xe2x80x9cprependingxe2x80x9d to the list. If a list is FRESH (the data is the same as in memory), the entry that becomes the newly created head receives data from memory; otherwise it receives data from the previous list head. In a read-write list, only the head is allowed to modify (or write to) its own cache line and, after the head has written the data, the head must invalidate the other stale copies of the shared list. In one embodiment, invalidation is done by purging the pending invalidated entries of the shared list.
FIGS. 4A-4F illustrate how the two types of list are created and grown. Each of the FIG. 4 includes a before and an after list with states of the list and memory 104. In FIG. 4A, initially memory 104 is in the HOME state, indicating there is no cache shared list. Processor 102A requests permission to read a cache line. Since this is a read request, memory 104 changes from the HOME state to the FRESH state, and the resulting after list 402AR is a read-only list with one entry 108A. Cache 108A receives data from memory 104 because cache 108A accesses data that was previously uncached. This starts the read-only list 402AR.
In FIG. 4B processor 102B requests a read permission to enter the read-only list 402B, which is the same list as 402AR of FIG. 4A. Cache 108B then becomes the head of the list 402BR receiving data line from head 108A. The list 402BR is still a read-only list since both entries of the list have asked for read-only permission, and therefore the memory state remains FRESH.
In FIG. 4C, memory 104 is initially in the HOME state and processor 102A requests a read-write permission. Cache 108A then becomes the head of the list 402CR. Because a read-write permission was requested, list 402CR is a read-write list. As soon as memory 104 grants a read-write permission, memory 104 changes from the HOME state to the STALE state.
In FIG. 4D processor 102B requests a read permission to enter a read-write list 402D. Cache 108B becomes the head of the list 402DR. Since memory 104 is initially in the STALE state, the resulting list 402DR is a read-write list and memory 104 remains in the STALE state.
In FIG. 4E, the initial list 402E is read-only with memory 104 in the FRESH state, and processor 102B requests a write permission. Cache 108B then becomes the head of the list 402ER. Since processor 102B asked for a write permission, memory 104 changes state from FRESH to STALE, and list 402ER is a read-write list.
In FIG. 4F the list 402F is a read-write list and processor 102B requests a write permission. Since list 402F is read-write, list 402FR is also read-write, and memory 104 remains in the STALE state. In a read-write list, only the head is allowed to modify (or write to) its own cache line, and, after the head has written the data, the head must invalidate stale copies of the shared list.
In one prior art embodiment, invalidation is done by purging the stale entries of the shared list. Consequently, this invalidation-by-deletion results in a stable read-write list having only one read-write entry.
FIG. 4G shows the original list 402G and the resulting list 402GR in which only the head 108N remains while other list entries have been deleted after an invalidation-by-deletion.
FIG. 4H illustrates an invalidation-by-deletion. In FIG. 4H list 402H is, for example, a read-write list having one cache entry 108A. Cache 108B enters list 402H as a read-write entry, and after writing, cache 108A is deleted, resulting in list 402HR1 with only one cache 108B. And in another example, cache 108C enters list 402HR1 with a read-write request. After cache 108C is modified, cache 108B is deleted, resulting in the read-write list 402HR2 with only one entry 108C. Thus, a read-write entry entering a one-entry read-write list always results in a one-entry read-write list.
FIG. 4I illustrates how a list having a read-write entry at the tail, and that tail may be the only entry in the list. In FIG. 4I cache 108B enters read-write list 402I as a read-only entry, and the resulting list 402IR1 has two cache entries 108A and 108B with cache 108A being at the tail in the read-write state and cache 108B at the head in the read-only state. As long as a read-only cache 108 enters the list, the list keeps growing as list 402IR2 and the read-write cache 108A remains at the tail in the read-write state. In list 402IR2, caches 102N, 102C, and 102B are in the read-only state. However, when a cache 108 enters the list as a read-write, the resulting list becomes a one entry list, like list 402IR3 because processor 102M has invalidated stale cache entries (108A-108N) by deleting them.
The deleting scheme illustrated in FIGS. 4G-4I is inherently inefficient because sequentially deleting every entry from the head to the tail to result in list 402IR3 takes a long time. Long lists with entries being deleted can seriously degrade system performance. Another inefficiency also arises, for example, in list 402IR2 when processor 102A seeks to write to its cache 108A. In one prior art embodiment, cache 108A leaves list 402IR2 and re-enters the list as a new entry. Leaving the list poses inefficiency as the list needs to keep track of members entering and leaving. Entering the list as a new entry also suffers the inefficiency of sequential deletion because the processor 102A has to invalidate or delete other stale entries of the list.
In light of the deficiencies of the prior art, there is a need for a system that can minimize the time to invalidate stale cache copies.
The present invention, advantageous over prior art solutions, improves invalidation times by a factor of nearly two or four as compared to the SCI Standard""s sequential invalidation.
The present invention provides a system and a method for updating a cache-sharing list from read-only to read-write in accordance with standard cache coherence protocols. In one embodiment, an updating request is associated with a tail cache entry, and the processor associated with the cache requests the main memory to update the processor""s cache line. In response to the request, a copy of the cache line is created and made the head of the list. Thus, there are two cache entry copies in two places in the list. The processor then updates its cache and allows concurrent invalidation of stale cache entries in both directions from head-to-tail (forward) and from tail-to-head (backward).
Two preferred forward-invalidation methods are implemented. In the first (slow) method the list head informs the next-list entry that the next-list entry is to be invalidated. In response the next-list entry informs the head of the identity of the next-list entry""s successor, which in turn needs to be invalidated. The next-list entry is then invalidated and the next-list entry""s successor becomes the next-list entry (with respect to the list head) and is subjected to the same invalidation process as the previous next-list entry. The process continues until all entries in the list have been invalidated.
In the second (fast) method of forward invalidation, the head first informs the next-list entry that every stale entry in the list is to be invalidated. In response the next-list entry informs the head that a validate completion signal will be returned to the head. The next-list entry is then invalidated and the invalidation signal is forwarded towards the tail where the last invalidated entry sends to the head a confirmation signal that all invalidations have been completed.
In backward invalidation the tail informs the preceding entry that the preceding entry is about to become a tail, and that upon becoming the tail the preceding entry itself needs to be invalidated. The tail is then invalidated and the preceding entry becomes the tail and is subjected to the invalidation process, and so on until all invalidations have been completed.
Because the fast forward invalidation poses a potential deadlock, this invalidation method is used only when deadlock is free; otherwise when potential deadlock is detected the slow method is used even though the slow method takes about twice as long to complete. By having fast forward invalidation and concurrent backward invalidation the overall invalidation time is improved by about four times as compared to slow forward invalidation alone.

System and method for updating from a read-only to a read-write entry and concurrently invalidating stale cache copies from head-to-tail and tail-to-head directions


An extrusion die for manufacturing a tube with a plurality of small hollow portions arranged in a width direction of the tube, includes a female die for defining an outer periphery of the tube and a mandrel combined with the female die. The mandrel includes a body portion and a comb-shaped portion protruded from the body portion, the combe-shaped portion including a plurality of columnar portions desposed in a width direction of the comb-shaped portion at certain intervals. An outer periphery of a tip end portion of each of the plurality of columnar portion constitutes a bearing portion for defining an inner periphery of each of the plurality of small hollow portions of the tube. Each of the plurality of columnar portions has outside surfaces opposed in a thickness direction of the comb-shaped portion, and at least one of the outside surfaces has an inwardly dented portion behind the bearing portion, the inwardly dented portion constituting an extrusion material filling space. The at least one of the outside surfaces extending from a basal end portion of each of the plurality of columnar portions to the inwardly dented portion is formed into an inclined or curved surface for leading extrusion material to the inwardly dented portion. The at least one of the outside surfaces extending from the dented portion to the bearing portion is formed into an inwardly curved surface.

In heat exchangers such as aluminum condensers for automobiles, as generally shown in FIG. 8, a flat heat exchanging tube 200, which is called as a harmonica tube having a number of small hollow portions 202 arranged in a width direction thereof via partitioning walls 201, is used.
In manufacturing such a multi-hollowed tube by extrusion forming, an extrusion die having a female die for defining an outer periphery of the tube and a mandrel 300, as shown in FIG. 11, to be combined with the female die, is used.
The mandrel 300 has a body 301 and a comb-shaped portion protruded from the body 301 having a plurality of columnar portions 302 and arranged in the width direction of the comb-shaped portion at certain intervals. The outer periphery of the tip end portion of each columnar portion 302 constitutes a bearing portion 303 for defining an inner periphery of each of plural hollow portions arranged in the width direction of the tube.
This mandrel 300 is combined with the female die such that the bearing portions 303 of the comb-shaped portion are disposed in the opening of the female die to constitute an extrusion die. In manufacturing the extruded tube, extrusion material such as an aluminum billet loaded in a container is pressurized by a stem and the like from the rear side of the mandrel 300 to forcibly introduce the extrusion material into a gap between the female die and the columnar portions 302 and a gap between adjacent columnar portions 302, to thereby extrude the material continuously into the extrusion tube.
Now, as a heat exchanger is required to be small in size and high in performance, a multi-hollowed extrusion tube 200 for use in heat exchangers is also required to reduce the thickness of the partitioning wall 201 and the width of each hollow portion 202. In order to attain the requirements, the mandrel 300 of the die is also required to further reduce the gap 304 between the bearing portions 303 of the adjacent columnar portions 302 and/or the width of the bearing portion of each columnar portion 302.
In the mandrel 300, however, if the gap 304 between the bearing portions 303 of the adjacent columnar portions 302 is decreased, the extrusion material cannot be introduced into the gap 304 fully, causing defects of the partitioning wall 201 of the tube 200.
In order to avoid the aforementioned problem, as shown in FIG. 11, in some extrusion dies, a gap 305 between basal end portions of the adjacent columnar portions 302 is enlarged so that the gap becomes larger than the gap between the adjacent bearing portions 303 so that the extrusion material can be introduced into the enlarged gap 305 and therefore sufficient extrusion material can be supplied to the gap 304 between the adjacent bearing portion 303 to thereby prevent generation of defects due to insufficient extrusion material.
In cases where the number of small hollow portions of the tube exceeds a certain number, if the width of the bearing portion 303 of the columnar portion 302 is decreased in order to decrease the width of each hollow portion 202 of the tube 200, the thickness of the columnar portion 302 forming the enlarged gap 305 becomes thinner than the gap 304 of the bearing portion 303, causing decreased strength of the columnar portion 302, which results in an easy-to-break columnar portion. Thus, there is a limit to decrease the width of each hollow portion 202 of the tube 200.

Extrusion die for manufacturing tube with small hollow portions, mandrel used for said extrusion die, and multi-hollowed tube manu-factured by using said extrusion die


A hybrid annotation and publication system can access content in a scalable manner from databases, allowing for its editing and publication via wiki-style programs, while at the same time allowing for peer-review of such content via peer-review programs. This system balances the wiki-style programs, the peer-review programs, and any database store accesses in a manner appropriate to the need at hand according to various heuristics. For instance, the system can be accessed via a web browser, and data provided from various databases can be edited. Such data can be stored in the system in a hierarchical manner. Once the content is annotated, it can be reviewed (at various levels, ranging from expert to novice). Upon review, such content can be published using the wiki programs, so that the content is ready for public and/or private consumption.

Wiki-style programs allow users to edit and publish content, but alone are limited to the content accessible by their users (whether users provide this content personally or from some other source). Database systems, however, have lots of content, but this content is not always curated in meaningful and useful ways. Thus, what is needed is a hybrid system that can access content in a scalable manner, allow for its editing and publication, while at the same time allowing for peer-review of such content.


A rotary impact tool can be used in a work especially precision or finishing of fastening is important. The rotary impact tool comprises a rotary driving mechanism including a driving source for rotating a driving shaft, a hammer fixed on the driving shaft, an output shaft to which a driving force is applied by impact blow of the hammer, a torque setting unit used for setting a fastening torque, a processor for calculating fastening torque from impact blow of the hammer, a rotation speed setting unit used for setting rotation speed of the driving shaft, and a controller for rotating the driving shaft of the rotary driving mechanism in a rotation speed set in the rotation speed setting unit and for stopping rotation of the driving shaft of the rotary driving mechanism when the fastening torque calculated in the processor becomes equal to or larger than a reference value of fastening torque previously set in the torque setting unit.

1. Field of the Invention
The present invention relates to a rotary impact tool such as an impact wrench or an impact driver used for fastening or loosening of fastening member such as a screw, a bolt or a nut.
2. Description of the Related Art
In a rotary impact tool used for fastening a member to be fastened such as a bolt or a nut, it is desirable that a driving source is stopped for completing a fastening operation when a fastening torque reaches a predetermined set value. Although measurement of actual fastening torque is most desirable at a point of precision of fastening, it is necessary to provide a torque sensor in an output shaft of the rotary impact tool. It causes not only increase of cost and upsizing of the rotary impact tool but also decrease of usability. Thus, the fastening torque is estimated with various methods and the fastening torque is limited with the estimated value in the conventional rotary impact tool. In the conventional rotary impact tool, the motor serving as a driving source is normally rotated at the highest rotation speed, and the setting of the fastening torque depends on such an assumption. Therefore, the conventional rotary impact tool is suitable for fastening an object with heavy load. However, when the conventional rotary impact tool is used for fastening an object with a light load, the object, for example, a fastening member such as a bolt will be damaged by several impacts or over fastening may occur, even though the fastening torque is set to be the smallest value. Thus, the conventional rotary impact tool is rarely used for a work such as an interior finish work in which the finish precision is emphasized.
For limiting the fastening torque by estimation of the fastening torque, it is possible to simplify the stop control of the driving source by stopping the driving source when a counted number of impacts reaches a value previously set or a value calculated with a torque gradient after stopping normal rotation of a bit of the rotary impact tool. The actual fastening torque, however, is largely different from the desired fastening torque, so that damage to the object to be fastened due to over fastening or loose fastening members due to under fastening occurs.
In addition, it is proposed that a rotation angle of a fastening member as the fastening member is measured and the driving source is stopped when a rotation angle of the fastening member in each impact becomes equal to or smaller than a predetermined angle. Since the rotation angle of the fastening member is in inverse proportion to the fastening torque, such a rotary impact tool is controlled with fastening torque in theory. The rotary impact tool with a driving source moved by a battery, however, has a problem that the fastening torque largely varies due to voltage drop of the battery. In addition, it is largely affected by properties such as hardness or softness of the object to be fastened by the fastening member.
In another conventional rotary impact tool shown in Japanese Laid-Open Patent Publication No. 2000-354976, impact energy and rotation angle of a fastening member in each impact are sensed, and a fastening torque is calculated with using the impact energy and the rotation angle of the fastening member. When the calculated fastening torque becomes equal to or larger than a predetermined set value, the driving source is stopped. It is further shown that the impact energy is calculated with using a rotation speed of an output shaft at instant of impact of the output shaft and rotation speed of the output shaft just after the impact. Since the impact energy is calculated with the rotation speed of the output shaft at instant of impact, it needs a high resolution sensor and high speed processor which cause to increase of cost.


An electrical connector and a method for fastening the connector to a circuit board has a connecting chamber in which a conductor rail is arranged. The conductor rail is electrically connected at a connecting side of the electrical connector to an electrical connecting part make electrical contact at a contact side with a circuit board. The conductor rail includes a connecting arm for connection with the electrical connecting part and a contact arm for connection with the circuit board. The connecting arm and the contact arm are joined together by a connection arm. The connecting part is displaced in a connecting direction extending parallel to the conductor rail for connection with the conductor rail. The contact arm is designed as a spring in order to press against the circuit board when they are connected. The conductor rail can be positioned in two mutually rotated positions and the electrical connector may have at least two adjacent connecting chambers.

For the connection of electrical conductors or multi-core cables to electrical circuit boards, connection plugs are used. The plugs have either a contact pin for each conductor for inserting into a through opening of the circuit board or a contact surface for placing against a solder surface of the circuit board to which the conductor tracks of the circuit board can be soldered.
Connection plugs are also known which have plug contacts which can be inserted into through openings of the circuit board, the plug contacts being designed for clamping in the through openings. Such connection plugs can be connected and retrofitted quickly and easily to the circuit board. However, the plug contacts are costly to manufacture.
Basically, in the case of such connection plugs the danger exists that the connection plugs will be positioned at a slant to the circuit board which is detrimental. This is particularly likely under tensile loading on the electrical conductor or cable, especially in a direction at an angle to the circuit board.
Therefore, the problem which the present invention seeks to solve is to improve an electrical connector for connecting an electrical conductor to an electrical circuit board such that it is quicker and easier to connect or retrofit it to the circuit board, and it is easy and economical to produce. The electrical connector provides favorably dimensioned venting and creepage between the individual contacts of the connector and secure contact of the connector with the circuit board, even under tensile loading.

Electrical connector for connecting electrical conductors to a printed circuit board


Closure arrangements for use with flexible packages include a zipper-type closure, which, after initial sealing, if access is gained to a package interior, the arrangements provide evidence of that access. In certain embodiments, a closure with mating male and female profiles is used which, after initial sealing of the package, if access is desired to the package interior, one of the male or female profiles breaks, to prevent a resealing of the package. In other embodiments, after initial mating of the male and female closure profiles in order to seal the package, if access is desired to the package interior, the package walls are torn in order to gain access. In other embodiments, after initial sealing of the package by mating of the male and female profiles, if access is desired to the package interior, the male and female profiles are deformed, such that they no longer mate to provide a secure closure. Methods for using the arrangements herein are also provided.

Many packaging applications use containers with zipper-type closure arrangements to store various types of articles and materials. These packages may be used to store and ship non-food consumer goods, food products, medical supplies, waste materials, and many other articles.
Concerns are sometimes raised with respect to recloseable zipper-type closure arrangements. These concerns relate to the fact that in many zipper-type closure arrangements, it is not evident that the package has been opened. This may lead to product-tampering and other problems. In addition, in certain instances, it may be desirable to be able to quickly and manually seal a package and still be able to detect whether the package has been unsealed after the initial sealing.

Tamper-evident closure arrangements and methods


A device for measuring thermal conductivity of gas components of a gas mixture in order to determine fractions of the gas components includes a plurality of thermal conductivity sensors, each thermal conductivity sensor being a component of a resistance bridge circuit and being connected to an evaluation unit associated with the device. Each thermal conductivity sensor has a heating element and an integrated temperature measuring element, which elements generate two measuring voltages (UM3, UM2) when the temperature of the thermal conductivity sensor changes as a result of heat dissipation by the gas mixture. Voltages are compared in the evaluation unit in order to detect measuring errors.

There are various methods in gas analysis technology for determining the gas concentrations of the components of gas mixtures.
For example, the method of gas chromatography is widespread. Here, the gas mixture to be tested is injected into a separation column that the carrier gas flows through. The substances of the gas mixture are transported by the carrier gas in the separation column, a rapid and extensive separation of the gas mixture being brought about by means of a constant temperature within the separation column or by means of a controlled temperature increase. At the outlet of the separation column, a detector identifies when one of the substances of the gas mixture leaves the separation column. The electronic signal identified by the detector can be registered as a peak and the composition of the gas mixture can be identified from this signal by means of appropriate evaluation software. The measuring set-up and execution of the procedure in gas chromatography are time consuming and structurally complex.
In addition to gas chromatography, it is generally known to use the differences in the thermal conductivity of the gases concerned in order to determine concentrations of individual gases of a gas mixture.
In principle, a resistance heating element acting as a heat source is brought up to a temperature that is higher than that of its surroundings by means of current flow. Heat from the gas to be tested is conducted via a heat conduction path defined by geometric parameters from the resistance heating element acting as a heat source to a heatsink that is kept at a constant temperature. As a result of the heat transfer from the resistance heating element to the heatsink, energy is drawn from the heat source, said energy representing a measure for the heat conductivity of the gas which can be measured using appropriate methods.
The method for identifying gas concentrations of gas mixtures by means of the heat conductivity of these gases is carried out for the various gas components using different temperatures of the resistance heating element.
In order to measure the gas concentration, on the one hand a plurality of heat conductivity sensors corresponding to the number of gas components can be used. Alternatively, the use of one heat conductivity sensor is conceivable in which the resistance heating element is heated up to different temperatures at certain intervals depending on time.

Device for measuring the thermal conductivity of gas components of a gas mixture


A rescue transceiver apparatus for transmitting a signal to and receiving a signal from another rescue transceiver apparatus is provided. The apparatus comprises a housing and a radio signal transmitter for the transmission of a radio signal in a transmitting mode with a first predetermined frequency with the radio signal transmitter being mounted within the housing. A receiver is provided for selectively receiving the first predetermined frequency from the radio signal transmitter in a receiving mode. The receiver comprises a first antenna mounted completely within the housing, a second antenna mounted completely within the housing with the second antenna being disposed substantially perpendicular to the first antenna, and a virtual third antenna mounted completely within the housing with the virtual third antenna being derived from phase information generated by the first antenna and the second antenna. The first antenna, the second antenna, and the third virtual third antenna provide three-dimensional vector analysis by the receiver of the predetermined frequency received from the radio transmitter. The apparatus further comprises a microcontroller for controlling the radio signal transmitter and the receiver.

1. Field of the Invention
This invention relates generally to an avalanche victim locating transceiving apparatus for locating buried victims by a searching survivor and, more particularly, it relates to an avalanche victim locating transceiving apparatus for locating buried victims by a searching survivor which provides both directional and distance readouts to the searching survivor.
2. Description of the Prior Art
Avalanches pose an extremely grave danger for skiers, climbers, military personnel, and others in mountain regions during winter and spring. Death or serious injury can result when a person is buried in snow unless rescue is quickly effected. Rescue is difficult because a person buried in an avalanche cannot be seen, may be moved by the avalanche away from the last visible position, and cannot easily be located. Suffocation, hypothermia, and cardiac arrest, coupled with shock, become more likely the longer the victim is buried. The amount of time spent in locating a victim is an important factor in the probability that the victim will not survive or will be severely injured.
In an attempt to address these problems, electronic locating systems are increasingly being used, for example, by the ski industry, snowmobilers, and the military. With one type of system presently in use, each member of a group exposed to avalanche danger is supplied with a continuously energized, battery powered radio transceiver unit operating continuously in a transmitting mode. With these known systems, continuous transmission is relied upon to assure that transmission occurs when a victim is buried. If part of the group is buried in an avalanche, the remaining members switch their units to a receiving mode and attempt to locate buried individuals by variations in received signal strength.
This type of system has serious drawbacks. Since the older units had to be easily portable and battery weight was limited, the use of high power alarm signals was impractical. These conventional units merely provided a non-directional signal. In order to find a buried victim, it is necessary to move about, preferably in a grid pattern, while attempting to detect increases and decreases in signal strength. This can be difficult and time consuming, particularly in the unfavorable terrain common to avalanche sites. The difficulty is compounded by the fact that survivors are often confused or in shock. In addition, if multiple victims are buried, the region of maximum signal strength may not coincide with the location of a victim. In the prior art, power consumption and the necessity for continuous transmission prevent the use of an audible alarm that would be useful when a survivor is in relatively close proximity to a victim.
In an effort to overcome the shortcomings of the prior art, the Allsop et al, U.S. Pat. No. 4,850,031, describes an avalanche victim locating system having a trigger provided by light sensitive elements on the user, or by a signal transmitted from a survivor. A microprocessor control synchronizes VHF information signal transmission and burst microwave transmission from a victim as well as received signal processing by a survivor. A directional multiple antenna array is switched to provide directional signals displayed to the survivor and is extended when the apparatus is opened.
While the avalanche victim locating device of the Allsop et al patent overcomes many of the problems associated with the prior art, the device of the Allsop et al patent creates additional difficulties which must be addressed. First, with the Allsop et al patent""s device, it is not possible to determine exactly the distance between the buried victim and the searching survivor. Second, the device of the Allsop et al patent relies on sensors to activate the unit to a transmitting mode. If the sensors are defective or become faulty, there is a chance that the transmitting mode will never be activated. Third, even if the Allsop et al patent""s device can be remotely activated by a rescuer, the rescuer must have the same device in order to activate the transmitting mode. If rescuers are using a different type of avalanche rescue device, they will not be able to activate the transmitting mode and the buried victim will not be able to be located. Finally, the device of the Allsop et al patent relies on microwave technology which requires the size of the rescue equipment to be quite large.
Accordingly, there exists a need for an avalanche victim locating transceiving apparatus for locating buried victims by a searching survivor which provides both directional and distance readouts to the searching survivor. Additionally, a need exists for an avalanche victim locating transceiving apparatus for locating buried victims by a searching survivor which provides improved rescue times and decreases the amount of time the buried victim remains buried. Furthermore, there exists a need for an avalanche victim locating transceiving apparatus for locating buried victims by a searching survivor which provides dual visual/audible functions for directional and versatility and backup redundancy for user confidence in all weather conditions. Further yet a need exists for avalanche victim locating transceiving apparatus for locating buried victims by a searching survivor which provides an efficient, tuned transmitter which automatically switches from a search mode to a transmit mode in case of rescuers being caught in a secondary avalanche while trying to locate the buried victims.
The present invention is a rescue transceiver apparatus for transmitting a signal to and receiving a signal from another rescue transceiver apparatus. The apparatus of the present invention comprises a portable housing and a radio signal transmitter mounted within the housing for the transmission of a radio signal in a transmitting mode with a first predetermined frequency. A receiver is provided for selectively receiving the first predetermined frequency from the radio signal transmitter in a receiving mode. The receiver comprises a first antenna mounted completely within the housing, a second antenna mounted completely-within the housing with the second antenna being disposed substantially perpendicular to the first antenna, and a virtual third antenna mounted completely within the housing with the third antenna being derived from phase information generated by the first antenna and the second antenna. The first antenna, the second antenna, and the third virtual antenna provide three-dimensional vector analysis by the receiver of the predetermined frequency received from the radio transmitter.
In an embodiment of the present invention, the apparatus further comprises a microcontroller for controlling the radio signal transmitter and the receiver.
In another embodiment of the present invention, the first antenna and the second antenna are selectively shielded and isolated. Preferably, the apparatus further comprises a tuned amplifier connected to the third antenna. Furthermore, preferably, the tuned amplifier has a predetermined frequency equal to the first predetermined frequency.
In still another embodiment of the present invention, the apparatus comprises a superheterodyne receiver with the receiver receiving the first predetermined frequency, mixing the first predetermined frequency with a local oscillator frequency, and generating an Intermediate Frequency for amplification, filtering, and generation of a logarithmic signal strength.
In yet another embodiment of the present invention, the apparatus comprises an activatable transmit/receive mechanism mounted to the housing for selectively converting between the transmit mode and the receiving mode. Preferably, upon activation of the transmit/receive mechanism from the transmit mode to the receiving mode, the apparatus automatically converts from the receiving mode to the transmit mode after a predetermined time period.
In still yet another embodiment of the present invention, the apparatus comprises indication means on the housing for displaying information. Preferably, the indication means includes a dual digit, distance light emitting diode display. Furthermore, preferably, the indication means includes a distance display displaying the distance between an apparatus in the transmit mode and an apparatus in the receiving mode. Additionally, preferably, the indication means includes a battery power display displaying the remaining battery power percentage of the apparatus.
In a further another embodiment of the present invention, the apparatus comprises a plurality of indicators for determining direction between an apparatus in the transmit mode and an apparatus in the receiving mode. Preferably, the indicators are light emitting diodes arranged in an arc across the housing.
In another embodiment of the present invention, the apparatus comprises means for muting sounds emitting from the apparatus. Additionally, the apparatus comprises strapping means for releasably securing the housing to a person.
The present invention further includes a device for transmitting a signal to and receiving a signal from another device. The device comprises a housing and a radio signal transmitter for the transmission of a radio signal in a transmitting mode with a first predetermined frequency, the radio signal transmitter being mounted within the housing. A receiver is provided for selectively receiving the first predetermined frequency from the radio signal transmitter in a receiving mode and means for selectively masking multiple radio signal transmissions are provided thereby allowing the receiver to selectively received one radio signal transmission.
The present invention also further includes a rescue transceiver apparatus for transmitting a signal to and receiving a signal from another rescue transceiver apparatus. The apparatus comprises a housing and a radio signal transmitter for the transmission of a radio signal in a transmitting mode with a first predetermined frequency with the radio signal transmitter being mounted within the housing. A receiver is provided for selectively receiving the first predetermined frequency from the radio signal transmitter in a receiving mode and means are provided for changing from the receiving mode to the transmitting mode after a predetermined time period.

Avalanche victim locating transceiving apparatus


Various embodiments concern a lead comprising a cable conductor and a coil electrode having one or more filars, the one or more filars wound in a helical pattern. The lead can further include an inner fitting axially aligned with the coil electrode. The inner fitting can comprise external threading and a slot extending along the inner fitting. The slot can receive a portion of the cable conductor. The lead can include an outer tubular fitting having a lumen with internal threading. Each of the coil electrode and the inner fitting can be partially received within the lumen, both of the external threading and the one or more filars threadedly engaged with the internal threading. The cable conductor can be pinched in the slot to mechanically connect the cable conductor to the inner fitting. The pinching can be supported by the outer tubular fitting.

When functioning properly, the human heart maintains its own intrinsic rhythm and is capable of pumping adequate blood throughout the body's circulatory system. However, some individuals have irregular cardiac rhythms, referred to as fibrillation or arrhythmias, which can result in improper cardiac rhythms. One manner of treating improper cardiac rhythms include the use of a pulse generator (PG) such as a pacemaker, an implantable cardioverter defibrillator (ICD), or a cardiac resynchronization (CRT) device. Such devices are typically coupled to one or more implantable leads having one or more elements that can be used to deliver electrical energy to the heart. Implantable leads can additionally or alternatively be used to stimulate other tissues of the body, such as nervous and/or musculature systems.


The present application discloses a current-driven display device capable of providing satisfactory display without flickering even when pause drive is performed. In a pixel circuit 15, a first initialization transistor T4 initializes a gate voltage Vg, and thereafter a voltage on a data signal line Di is written to a holding capacitor Cst via a write control transistor T2 and a drive transistor T1. Thereafter, emission control transistors T5 and T6 are turned on, so that a drive current I1 from the drive transistor T1 causes an organic EL element OL to emit light. During this emission period, even if the gate voltage Vg is decreased due to a leakage current through the first initialization transistor T4 in an OFF state, the decrease is compensated for by increasing a threshold control voltage being provided to a threshold control terminal TG of the drive transistor T1. Thus, even if the pause drive results in a long refresh cycle, it is possible to inhibit an increase in luminance due to the decrease in the gate voltage Vg and thereby prevent the occurrence of flickering.

In recent years, organic EL display devices provided with pixel circuits which include organic EL elements (also referred to as organic light-emitting diodes (OLEDs)) have been put into practical use. In addition to the organic EL elements, the pixel circuits in the organic EL display devices include drive transistors, write control transistors, holding capacitors, etc. As the drive transistors and the write control transistors, thin-film transistors are used, and the drive transistors are connected at gate terminals, which serve as control terminals, to the holding capacitors, to which drive circuits supply data voltages via data signal lines; the data voltages are voltages corresponding to video signals that represent images to be displayed (more specifically, voltages that specify gradation values for pixels to be formed by the pixel circuits). The organic EL elements are self-luminous display elements which emit light with intensities corresponding to currents flowing therethrough. The drive transistors are provided in series with the organic EL elements and configured to control the currents flowing through the organic EL elements in accordance with voltages being held by the holding capacitors.
On the other hand, there are known low-power display devices in which pause drive (also called intermittent drive or low-frequency drive) is performed. Pause drive is a drive method using a drive period (refresh period) and a pause period (non-refresh period) when the same image is continuously displayed, and the drive period and the pause period are set such that a drive circuit operates during the drive period but stops operating during the pause period. Pause drive can be applied when transistors in pixel circuits offer good off-state leakage characteristics (i.e., off-state leakage current is low). Such a display device which performs pause drive is described in, for example, Patent Document 1.

Display device and drive method therefor


A circuit for receiving data in an integrated circuit is described. The circuit comprises a receiver configured to receive an input signal and to generate output data based upon the input signal, the receiver having a level detection circuit coupled to receive the input signal; and a calibration circuit coupled to the receiver, the calibration circuit having an input for receiving the input signal; an error detection circuit coupled to the input, the error detection circuit coupled to receive the input signal, a first reference voltage and a second reference voltage; and a control circuit coupled to an output of the error detection circuit, wherein the control circuit selectively generates either an offset control signal or an amplitude control signal based upon comparisons of the input signal to the first reference voltage and the second reference voltage. A method of receiving data is also disclosed.

Data communication is an important function of many integrated circuits. For alternating current (AC) signals coupled to wireline communication systems, low frequency signals from a transmitter are filtered out by the AC capacitor, resulting in a dynamic common mode variation at a receiver. This variation is called baseline wander, and its magnitude depends on the bit pattern history, channel loss, and the time constant associated with the AC capacitor. If the input signal is not adjusted to compensate for the baseline wander, the received eye margin is reduced and bit error rate (BER) is increased.
Various baseline wander correction techniques have been implemented in the past. One adaptive technique involves passing the received history bits through an analog low pass filter or a digital infinite impulse response (IIR) filter, and subtracting the output from the received signal before detection. However, the bandwidth and the gain of these filters are difficult to determine, and adaptation of the bandwidth and gain parameters is challenging. Manual sweeping can be costly and time consuming, as the accurate values of the bandwidth and the gain depend on the transmitter and receiver settings, channel property and the process, voltage, temperature (PVT) variations of the channel, transmitter and receiver. Another adaptive technique uses the data crossing information for baseline wander correction. However, it requires a sampling rate of twice the speed of the data rate, and therefore consumes more power than baud rate sampling.
Accordingly, improved circuits and methods of receiving data in an integrated circuit are beneficial.

Circuits for and methods of receiving data in an integrated circuit


Addressing apparatus that electronically address data sites of a digital array include electrodes (36, 38) manufactured with consistent electrical contact quality on the surfaces of projections (30) from a substrate (14). This is accomplished by providing such electrodes with portions that are offset to follow regions of more equal slope on the projections. The offset electrodes are of more consistent structural and electrical contact quality and thereby facilitate an increase in the yield of the manufacturing process.

Digitally encoded information is often stored or processed using an addressing scheme that electronically accesses individual data storage sites arranged in a solid-state digital array. Japanese Laid Open Patent Application No. 217396/89 and its counterpart U.S. Pat. Nos. 4,896,149 and 5,077,553, which are assigned to the assignee of the present application, disclose an addressing apparatus of this type in which row addressing is achieved by means of an ionizable gas. FIG. 3 depicts a prior art flat panel video display that incorporates such an apparatus.
The flat panel display apparatus 10 includes electrically non-conductive, optically transparent first and second substrates 12 and 14 positioned face-to-face to each other. Multiple conductors extending in parallel to one another in a first direction on the inner surface of the first substrate 12 form column electrodes 16 for receiving data drive signals from a data drive circuit (not shown). Multiple channels 18 are formed in the inner surface of the second substrate 14 so that they extend parallel to one another in a second direction transverse to the first direction. A reference potential row electrode 20 and a strobe row electrode 22 electrically isolated from each other extend along the length of the interior of each channel. The reference potential row electrodes 20 are commonly grounded on one side of the channels, and each of the strobe row electrodes 22 receives a data strobe signal from a data strobe circuit on the other side of the channels. Each of the channels 18 is filled with an ionizable gas, such as helium.
A layer 24 of electro-optic material, such as a liquid crystal material, and a layer 26 of a dielectric material are positioned between the first and second substrates 12 and 14. The layer 26 of dielectric material covering the channels 18 forms a barrier between the liquid crystal material layer 24 and the ionizable gas. The size of display elements 28 defined by the overlapping areas of the column electrodes 16 and the channels 18. The ionizable gas functions as an electrical switch that changes between a conducting or plasma state and a nonconducting or nonionized state in response to the voltage of the data strobe signal.
Whenever the gas is in a conducting state, the voltage of the data drive signal is developed across the liquid crystal material in a region spatially aligned with the region of ionized gas. When display apparatus 10 receives light propagating from an external source, the data drive signal on a column electrode 16 determines the luminance of a display image. Whenever the gas changes to the non-conducting state, the voltage of the data drive signal developed across the liquid crystal material is held for a predetermined time. Such addressing apparatus of the flat panel display 10 is referred to as a plasma addressing apparatus. The plasma addressing apparatus provides an improved yield for a flat panel display having a layer display element density because it does not rely on two- or three-terminal semiconductor devices.
FIG. 4 shows a part of the second substrate 14 in detail. The channel 18 is formed by a flat surface of the second substrate 14 and opposite side walls 32 of adjacent projections 30. When the data strobe signal having a predetermined voltage is applied to the strobe row electrode 22, the gas between the reference row electrode 20 and the strobe row electrode 22 changes to the conducting state. Then, the portion of liquid crystal material located in an area defined by the space between the row electrodes 20 and 22 and the width of the row electrode 16 acts as a display element. It is desirable that the space between the row electrodes 20 and 22 be close to the width of the channel 18 to provide narrow gap between the display elements. Thus, the row electrodes are deposited on the side wall 32 of the projection 30. The row electrodes 20 and 22 pass along the steep end wall 34 at both ends of the projection 30 and extend out of the channel 18 to receive the reference potential and the data strobe signal, respectively.
Proper operation of display apparatus 10 depends in part on the structural quality of the electrodes that energize the ionizable gas contained in the channels. The row electrodes 20 and 22 are formed using a conventional photolithographic technique. In the manufacturing process, a metal film of conductive material, such as nickel, is deposited over the inner surface of the second substrate 14 having the channels 18. Then, a photoresist layer is formed over the metal layer and exposed to incident light passing through a pattern having openings corresponding to the row electrodes 20 and 22 to be formed. By developing the photoresist, the photoresist material in the area where the row electrodes 20 and 22 are not formed is removed. The row electrodes 20 and 22 are formed by etching the exposed metal film.
There is, however, a problem stemming from the fact that the end wall 34 is much steeper than the remaining area. The thickness of the photoresist on the end wall 34 is, therefore, much thinner than that of the photoresist in the remaining area. When the developing process is stopped at the time the light-unexposed photoresist on the end wall 34 is removed, the light-unexposed photoresist in the remaining area is left because it is not developed sufficiently. The metal film under the left light-unexposed photoresist is not exposed to the etching agent so that it is left as an undesirable metal film after etching. Thus, there is a possibility that the undesirable metal film short-circuits between the row electrodes 20 and 22. On the other hand, when the developing process is stopped at the time the light-unexposed photoresist in the remaining area is removed, the photoresist on the end wall 34 is developed to excess so that the exposed photoresist is partly removed. Thus, there is a possibility that the row electrodes 20 and 22 have open portions. The short-circuit and the open portions of the row electrodes 20 and 22 prevent the gas in the channel 18 from being placed in the conducting state.
An object of the present invention is, therefore, to provide electrode contacts of more consistent structural quality such that addressing apparatus incorporating these electrodes may manufactured at higher yield.


A data-processing method by which one or more prepaid satellite spending cards are configured and linked to a cardholder's host credit card or card account such that a predetermined available spending capacity of each satellite card is selectively determined by the cardholder of the host credit card, is deducted from the available balance of the host card or card account and limits the total spending capacity of the satellite card. The main cardholder may also remotely selectively increase the available spending capacity of the one or more satellite cards by deducting the desired additional spending capacity of each satellite card from the available balance of the host credit card as a purchase against the host card account.

Credit cards--i.e. devices, most commonly represented by a plastic card-like member through the use of which an authorized cardholder pays for, by way of example, purchases of services and/or merchandise and the like--have become so universally well known and ubiquitous as to have fundamentally changed the very manner in which financial transactions and dealings are viewed and conducted in society today. Such credit cards are generally issued by a bank and provide a mechanism by which a cardholder purchases goods without an immediate, direct exchange of cash and thereby incurs debt which the cardholder may thereafter (i.e. upon receipt of a monthly or otherwise periodic statement) either fully pay the outstanding balance or, as a matter of necessity or choice, defer at least a portion of the balance for later payment with accompanying interest or finance charges for the period during which payment of the outstanding debt is deferred.
The spending power (i.e. the total amount of funds available to the cardholder at any particular time for making purchases and the like) of a credit card is typically limited to a particular amount (the "credit limit") predetermined by the issuer of the card. The size of the issuer-imposed credit limit is generally based on a number of nonexclusive factors, the most important of which are often the cardholder's earning capacity and the cardholder's credit history. When purchases are made or debts incurred with the credit card, the available portion of the credit limit is reduced by the purchase or debt amounts. In addition, interest and/or finance charges are also subtracted from the available portion of the credit limit on a periodic basis. The total debits on a credit card are referred to as the "outstanding balance", while the remaining or available balance of the credit limit is typically called the "available balance" and reflects the dynamically adjusted current spending power of the credit card. The cardholder may increase the available balance, up to the credit limit, by paying to the issuer (or its representative) the entire outstanding balance or a fractional portion thereof.
The cardholder may also optimally obtain from the issuer one or more secondary credit cards, as for example for family members, that are linked to the main credit card. The secondary credit cards are functionally identical to the main credit card in all respects and, indeed, typically bear the same account number and differ from the primary card only in the name of the person who is authorized to use the secondary card. Any purchases made using the secondary credit cards are debited against the credit limit of the main credit card or, put another way, against the single account in which the primary and secondary cards are issued. Thus, the main or primary cardholder has no control over the spending power or abilities of the secondary credit cards linked to his card, beyond the fact that the total of all debts incurred by all cards on the account cannot exceed the issuer-imposed credit limit. This arrangement is problematic because the secondary cardholders can quickly and undetectedly accumulate a significant outstanding balance on the main credit card account, thus reducing the main cardholder's spending power. Most importantly, the main cardholder does not know and is not automatically made aware of the purchases made by the secondary cardholder(s), and thus may be inconvenienced or embarrassed when seeking to use the main credit card to make a purchase. The main cardholder is notified of the purchases made by the secondary cardholders only when the periodic statement is received from the issuer. For example, if the main credit card's credit limit is $2,000 and the outstanding balance is $1,200, the main cardholder's remaining or current spending capacity is $800. If a secondary cardholder makes a $700 purchase, then the main credit card's spending capacity is suddenly reduced to $100 without the main cardholder's knowledge. This could present a particular problem where the main cardholder is intending to make a large or important purchase with the main credit card.
In recent years, several alternatives to credit cards have appeared--debit cards and stored value cards. A debit card is linked to the checking account of a cardholder; when the cardholder makes a purchase, the amount of that purchase is automatically deducted from the cardholder's checking account. This approach is problematic for several reasons. First, while credit card terminals are prevalent in most establishments, many debit cards require an additional, specially-configured terminal or a modification to an existing terminal, often at considerable expense to the merchant. Second, unlike a conventional credit card with which the cardholder has an option of paying for purchases over an extended period of time, debit card purchases are immediately deducted in full from the checking account and the cardholder's spending ability is limited to his currently available checking balance. This restricts the cardholder's ability to make large purchases. Third, debit cards are not profitable for issuers because there are no interest or finance charges, which serve as a primary source of an issuer's profit from credit cards. Most importantly, debit cards do not enjoy the functionality of credit cards in many business transactions. For example, renting a hotel room or a car typically requires a conventional credit card for security deposit purposes even if the ultimate balance is settled in cash. And unlike debit cards, credit cards may be used to make purchases by telephone, through the mail, or over the Internet.
A stored value card, on the other hand, is purchased from an issuer in a fixed amount. That amount is "stored" in a chip or magnetic stripe on the plastic card or substrate. When a cardholder makes a purchase, a card reader subtracts the amount of that purchase from the fixed amount currently on the card and writes the new balance to the card. This approach has a number of disadvantages. First, stored value cards require special readers that will not work with debit or credit cards. Because there is no common industry standard for stored value cards, a merchant might be required to acquire several terminals to process the stored value cards from different issuers. Second, stored value cards lack conventional credit cards' protection against theft or loss; losing a stored value card is the same as losing cash. Finally, as is the case with debit cards, stored value cards do not enjoy other advantages of credit cards, and thus cannot be used for security deposit purposes, or for ordering merchandise or services by telephone, mail, or over Internet.
It would thus be desirable to provide one or more prepaid satellite cards that are linked to a cardholder's host credit card such that a predetermined available spending capacity of each satellite card can be selectively determined by the cardholder of the host credit card and deducted from the available balance of the host card. It would further be desirable to provide a method for enabling the cardholder of the host credit card to remotely increase the available spending capacity of the one or more associated satellite cards by deducting the desired spending capacity of each satellite card from the available balance of the host credit card as a purchase.
Other objects and features of the present invention will become apparent from the following detailed description considered in conjunction with the accompanying drawing. It is to be understood, however, that the drawing is designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims.

Data processing method of configuring and monitoring a satellite spending card linked to a host credit card


An ophthalmologic processing apparatus according to embodiments acquires data of a fundus of a subject's eye optically. The ophthalmologic apparatus includes a fixation system, an image acquisition unit, a specifying unit, and a determination unit. The fixation system is configured to project fixation light onto an eye of a subject. The image acquisition unit is configured to acquire an image of the fundus of the subject's eye in a state where the fixation light is projected by the fixation system. The specifying unit is configured to analyze the image acquired by the image acquisition unit to specify an image region corresponding to a predetermined site of the fundus. The determination unit is configured to determine whether or not the image region specified by the specifying unit is included within a predetermined range in the image acquired by the image acquisition unit.

Types of ophthalmologic apparatuses include ophthalmologic imaging apparatuses for obtaining images of a subject's eye, ophthalmologic measuring apparatuses for measuring characteristics of a subject's eye, and ophthalmologic therapy apparatuses for treating a subject's eye.
Examples of the ophthalmologic imaging apparatuses include an optical coherence tomography (OCT) apparatus for capturing tomographic images using OCT, a fundus camera for photographing the fundus, a scanning laser ophthalmoscope (SLO) for capturing images of the fundus by laser scanning with the use of a confocal optical system, slit lamp microscopes, operating microscopes, and the like.
Examples of the ophthalmologic measuring apparatuses include eye refraction examination apparatuses (refractometer, keratometer) for measuring the refractive properties of the subject's eye, tonometers, specular microscopes for obtaining the properties of the cornea (corneal thickness, cell distribution, etc.), wave-front analyzers for obtaining the aberration information of the subject's eye using a Hartmann-Shack sensor, perimeters for measuring states of visual field, mircoperimeters, and the like.
Examples of the ophthalmologic therapy apparatuses include laser therapy apparatuses for projecting laser light onto the site to be treated such as diseased are, surgical apparatuses for specific purpose (cataract surgery, keratorefractive surgery etc.), surgical microscopes, and the like.
Many ophthalmologic apparatuses are provided with a configuration for presenting a fixation target to a subject's eye (or its fellow eye). The fixation target has a function of guiding the line of sight to acquire data of a desired site of the subject's eye, a function of fixing the subject's eye during data acquisition, and the like.
Further, ophthalmologic apparatuses having a function called an auto shoot, which detects that alignment or the like is in a suitable state and automatically starts acquisition of data of the subject's eye. In the auto shoot, the acquisition of data of the subject's eye is triggered by detecting that the indicator indicating a state of the alignment (bright spot image, characteristic site, etc.) enters within a predetermined range. In such an ophthalmologic apparatus, data of a desired site of the subject's eye can be automatically acquired by controlling a presentation position of the fixation target.

Ophthalmologic apparatus and method of controlling the same