Provided are a thin film transistor substrate having a transparent electroconductive film in which residues and so on resulting etching are hardly generated; a process for producing the same; and a liquid crystal display using this thin film transistor substrate.                A thin film transistor substrate, comprising a transparent substrate,        a source electrode formed over the transparent substrate, a drain electrode formed over the transparent substrate, and a transparent pixel electrode formed over the transparent substrate, wherein the transparent pixel electrode is a transparent electroconductive film which is made mainly of indium oxide, and further comprises one or two or more oxides selected from tungsten oxide, molybdenum oxide, nickel oxide and niobium oxide, and the transparent pixel electrode is electrically connected to the source electrode or the drain electrode; a process for producing the same; and a liquid crystal display using this thin film transistor substrate.

First Group: Background
Hitherto, liquid crystal displays have eagerly been researched and developed. In particular, after an entrance of liquid crystal displays for large-sized televisions on the stage, the researches and developments have been more actively made.
As the material of pixel electrodes of the liquid crystal displays, ITO (indium tin oxide) is generally used. This is because ITO is excellent in electroconductivity and transparency, and can easily be etched with a strong acid (aqua regia or a hydrochloric acid-based etchant).
However, ITO formed into a film on a large-sized substrate by sputtering is a crystalline film. Thus, the state of the crystal is variously changed depending on the temperature of the substrate, the state of the atmosphere gas or plasma density, or the like so that a crystalline film and an amorphous film may be present to be mixed on the same substrate. This mixture frequently causes problems that etching failures (electric conduction to an adjacent electrode, the narrowing of the pixel electrode by overetching, pixel inferiority based on etching residues, and so on) are generated.
In order to solve the problems caused when ITO is etched, for example, Patent Document 1 discloses a method of making an ITO pixel electrode film amorphous, thereby making large the etching rate of ITO/Al by action of an etching solution of an HCl—HNO3—H2O-based so as to overcome elution of Al at the time of the etching.
About a target of ITO, black nodules are generated on the surface of the target when a film is continuously formed over a long time, so that over discharge is caused or foreign substances are generated to cause pixel inferiority. These also become problems with frequency.
Thus, the following method has been investigated: a method of adding water or hydrogen to sputtering gas when ITO is formed into a film form so as to form a film of ITO in an amorphous state, etching this film of ITO, and then heating the film to crystallize the film. However, the addition of water or hydrogen at the time of the film-formation frequently causes a decline in the adhesiveness to the underlying substrate, or causes the surface of ITO to be reduced, thereby generating a large amount of nodules.
In order to solve these problems, instead of ITO, IZO ((registered trade name) manufactured by Idemitsu Kosan Co., Ltd.: indium zinc oxide) is used. The IZO is rich in usefulness as follows: the IZO can be made into the form of a substantially completely amorphous film. The IZO can be etched with an etchant based on an oxalic acid, which is a weak acid, and can also be etched with a mixed acid of phosphoric acid, acetic acid and nitric acid, an aqueous solution of cerium (IV) ammonium nitrate, or the like. The IZO can be etched with a weaker acid than ITO. A target made of the IZO makes the generation of nodules less when the target is sputtered, and makes it possible to restrain the generation of foreign substances. Thus, it can be mentioned that the IZO is a useful target.
As a target containing the IZO, for example, Patent Document 2, which will be listed up later, discloses a target made of a sintered body of an oxide containing a hexagonal lamellar compound represented by the general formula In2O3(ZnO) wherein m=2 to 20. According to this target, a transparent electroconductive film excellent in moisture resistance (endurance) can be formed.
Furthermore, in connection with a target containing the IZO, for example, Patent Document 3, which will be listed up later, discloses a process of: painting, onto a substrate, a coating solution prepared by dissolving an indium compound and a zinc compound in the presence of an alkanolamine; firing the resultant; and then subjecting the fired product to reducing treatment, thereby producing a transparent electroconductive film. According to this transparent electroconductive film producing process, a transparent electroconductive film excellent in moisture resistance (endurance) can be obtained.
For example, Patent Document 4, which will be listed up later, discloses, as a method for etching a transparent electroconductive film containing the IZO, a method for producing a liquid crystal display, wherein a transparent electroconductive film comprising In2O3—ZnO is etched with a solution of oxalic acid in water, thereby forming a pixel electrode. According to this liquid crystal display producing process, a pixel electrode pattern can easily be formed since the oxalic acid solution is used to perform the etching. Therefore, the yield can be improved.
Second Group: Background
Liquid crystal displays have characteristics that the power consumption thereof is low and the displays can easily attain full-color display, and other characteristics. Thus, out of flat displays, the liquid crystal displays are promising; in recent years, developments for making the size of their display screens large have been actively made. In particular, about an active matrix-based liquid crystal flat display wherein α-SiTFTs (thin film transistors) or p-SiTFTs are arranged, as switching elements for respective pixels, into a matrix form, and the pixels are each driven, the contrast ratio thereof does not deteriorate even if the display is made highly definited so as to have 800×600 pixels or more. Thus, attention has been paid to the liquid crystal flat display as a flat display for high performance color display. In such an active matrix-based liquid crystal flat display, a transparent electrode such as ITO (indium tin oxide) is used as its pixel electrode, and an Al-based alloy thin film is used as its source electrode in many cases. This is because ITO has a low sheet resistance and a high permeability and Al can easily be patterned and further Al has a low resistance and a high adhesiveness.
FIG. 1 is a view illustrating a sectional view of a vicinity of an amorphous-SiTFT at a stage when the formation of a pattern of a pixel electrode is finished in the process of producing a liquid crystal flat display according to the present invention. However, any display in the prior art has the same basic structure except the material of its pixel electrode; thus, the display will be described with reference to this.
In FIG. 1, a pattern of a gate electrode 2 is formed on a light-transmissible glass substrate 1, and next plasma CVD (chemical vapor deposition) is used to form a SiN gate insulation film 3, an amorphous Si:H (i) film 4, a channel protection film 5, and an amorphous Si:H(n) film 6 continuously into desired form and patterns.
Furthermore, a metal film made mainly of Al is deposited by vacuum deposition or sputtering, and then a pattern of a source electrode 7 and a pattern 8 of a drain electrode 8 are each formed by photolithographic technique. In this way, an α-SiTFT element section is completed.
An ITO film is deposited onto this section by sputtering, and photolithographic technique is used to form a pattern of a pixel electrode 9 electrically connected to the source electrode 7. The reason why the ITO film is deposited after the Al film is deposited is that a deterioration in electrical contact property between the amorphous-Si:H 4 (and 6) and the source and drain electrodes 7 and 8 is not caused. Al is inexpensive and is low in specific resistance, and is an essential material for preventing a decline in the display performance of the liquid crystal display, the decline resulting from an increase in the resistance of the wiring of the gate electrode 2 and the wiring of the source/drain electrodes 7 and 8.
In the above-mentioned production process, when the patterns of the source electrode 7 and the drain electrode 8 made mainly of Al are formed and then the ITO pixel electrode 9 is worked into the pattern with an HCl—HNO3—H2O-based etching solution, a situation that the Al patterns elute out at the time of the end of the working may be frequently caused.
This results from the fact that Al also has a nature that Al is dissolved in the HCl—HNO3—H2O-based etching solution, which is an ITO etching solution. HNO3 in the etching solution forms a thin Al oxide film on the surface of Al, and thus HNO3 is added thereto in order to prevent elution of Al. However, it appears that if the time for etching the ITO film is long or defects portions, such as impurities or foreign substances incorporated during the deposition of Al, are present in the Al film, the above-mentioned Al-oxidizing effect does not act sufficiently by local cell reaction.
In order to prevent such Al elution, it is known that an ITO film is made amorphous, thereby increasing the ITO/Al etching rate to any HCl—HNO3—H2O-based etching solution. This matter is described in Patent Document 1, which will be listed up later. The etching rate ratio is a ratio between etching speeds.
However, even if the ITO film is made amorphous, elution of Al is not completely prevented since an HCl—HNO3—H2O-based etching solution is used. Thus, a highly definited liquid crystal display is not easily realized. As an invention made in light of such a problem, Patent Document 2, which will be listed up later, is known. This Patent Document 5 suggests that patterning of a transparent electrode and a pixel electrode 9, on a pattern of each of an Al gate electrode, and source/drain electrodes, is made easy by use of an oxalic acid-based etching solution, and a transparent electrode having a composition made of indium oxide-zinc oxide is used in order to provide a process for producing a highly definited liquid crystal display.
According to such a structure, it is known that contact resistance is generated between the line of the Al gate and the transparent electrode, and between the Al source/drain electrodes and the pixel electrode. In general, the Al lines are usually covered with a barrier metal such as Ti, Cr or Mo. Such a barrier metal is described in Patent Documents 6, 7, 8 and 9, which will be listed up later.
Third Group: Background
The matrix-based liquid crystal display is usually composed of a TFT array substrate, a counter substrate, and a display material, such as liquid crystal, sandwiched between the TFT array substrate and the counter substrate. In the matrix-based liquid crystal display, a voltage is applied to this display material in selected individual pixels, thereby displaying a given image.
On the TFT array substrate are formed a semiconductor thin film (hereinafter, referred to merely as a semiconductor film) and so on while on the counter substrate are formed, a counter electrode, a color filter, a black matrix, and so on. Such a liquid crystal display (hereinafter, simply referred to as a LCD), wherein the TFT array substrate and so on are used, will be called a TFT-LCD hereinafter.
In the above-mentioned TFT array substrate, for each element, a TFT composed of a gate electrode, a source electrode, a drain electrode and a semiconductor film, and at least a pixel electrode are formed into an array form on an insulating substrate made of glass or the like. Besides, an alignment film, a storage capacitor, and so on are formed if necessary. Between the pixels are disposed signal lines such as gate wirings and source wirings. The gate wirings and the source wirings, the numbers of which are each several, are disposed on the insulating substrate so as to cross at right angles. In this way, a display area is formed. Furthermore, an input terminal, a driving circuit for driving each of the TFTS, and so on are formed, correspondingly to each of the signal lines, outside this display area.
In order to produce such a liquid crystal display wherein a TFT array is used, gates and sources/drains included in TFTs and other common wirings are produced into an array form so as to form a display area. Input terminals, prewirings, driving circuits, and others are arranged in the vicinity of this display area.
For reference, in the present patent, a gate electrode and a gate wiring are together denoted as a gate, and a source electrode and a source wiring are together denoted as a source. A drain electrode may be denoted simply as a drain in some cases. A source and a drain are together denoted as a source/drain. In the patent, a first conductor is specifically the gate, source and drain, and a second conductor is the above-mentioned pixel electrode.
It is also preferred to arrange, on the insulating substrate of the TFT array substrate, an electroconductive thin film (hereinafter, referred to merely as an electroconductive film) or an insulating thin film (hereinafter, referred to merely as an insulation film), if necessary, in order to exhibit a given function. On the other hand, on the counter substrate are formed the counter electrode, the color filter and the black matrix, as described above.
After the TFT array substrate and the counter electrode are produced as described above, a given gap is made between the two substrates in order to inject a liquid crystal material therebetween. In this state, the two substrates are stuck to each other at their peripheries, and then a liquid crystal material is injected into the gap between these substrates to produce a TFT-LCD.
Known thin film techniques are used to form various semiconductor elements and others onto the TFT array substrate or the counter substrate used in the TFT-LCD. In order to produce, for example, semiconductor elements of a TFT array substrate, the following are formed on an insulating substrate, as described above: a gate, a source and a drain (these being referred to as the first conductor hereinafter), a semiconductor film, an insulation film, a pixel electrode (hereinafter, referred to as the second conductor), and so on. In general, at this time, the second conductor and the first conductor do not contact each other directly since the second conductor is formed on the insulation film formed on the first conductor. For this reason, a contact hole is made in the insulation film in order to attain electrical connection between the first and second conductors. In other words, the first and second conductors are electrically connected to each other through the contact hole.
It has been considered that the material of the first conductor, in particular, the material of the gate wiring and the source wiring therein is desirably pure Al or Al alloy from the viewpoint of its properties and the process in order to prevent delay of signal transmission as TFT-LCDs have been made large-sized and highly definited. This is because the pure Al or Al alloy has a low electric resistance.
However, it has not been considered that in the case of using, as the material of a transparent pixel electrode (second conductor), ITO (indium tin oxide), IZO ((registered trade name), Idemitsu Kosan Co., Ltd.: indium zinc oxide) or the like, it is not necessarily preferred to use, as the material of the first conductor, the pure Al or Al alloy for the following reason: if connection, which may be referred to as contact hereinafter, between the first and second conductors is attained, the contact resistance thereof becomes a very high value of 1×E10 to 1×E12Ω so that a favorable contact property cannot be obtained.
It has been therefore considered that it is difficult to obtain a favorable contact resistance in any TFT array substrate having a structure wherein a first conductor made of pure Al or Al alloy directly contacts a second conductor made of a transparent electroconductive film of ITO, IZO or the like through a contact hole made in an insulation film.
As the method for solving this problem, various methods have been hitherto investigated in order to obtain a favorable contact between the first and second conductors. For example, Patent Document 10, which will be listed up later, discloses a thin film transistor array substrate having a bi-layered structure composed of an Al layer comprising Al and an electroconductive metal layer which is not easily oxidized, wherein a pixel electrode is connected to a metal layer of a source electrode through a contact hole made in a passivation film. In the case that the pixel electrode is connected to the metal layer in this way, electrical contact between the source electrode and the pixel electrode becomes favorable.
Patent Document 11, which will be listed up later, discloses a process for producing an active matrix substrate, wherein a metal layer is formed into a desired thickness inside a contact hole over a drain electrode so as to reduce effectively a difference in level based on the contact hole, whereby the process for the production is made simple and a pixel electrode is not easily cut.
Patent Document 12, which will be listed up later, a thin film transistor array having a bi-layered structure drain electrode composed of a lower layer made of a metal capable of forming silicide and an upper layer made of copper, wherein a pixel electrode is connected to the upper layer of the drain electrode through a contact hole made in a protective layer. In the case that the pixel electrode is connected to the upper layer, which is made of copper, in this way, the resistance of the drain electrode is low in the thin film transistor array so that favorable electrical contact can be maintained; simultaneously, a voltage can be applied to a liquid crystal with a high efficiency.
Patent Document 13, which will be listed up later, discloses a thin film transistor having a first electrode of a bi-layered structure composed of a lower layer made of pure Al or Al alloy, and an upper layer made of pure Al or Al alloy to which at least one element selected from N, O, Si and C is added, wherein a second electrode is electrically connected to the upper layer of the first electrode.
In the source electrode or the gate electrode in the substrate in each of Patent Documents 10 to 13, which will be listed up later, a portion connected to the pixel electrode has a bi-layered structure (for example, the source electrode in Patent Document 10 has a bi-layered structure wherein Cr, Ti, Mo, Cu, Ni or the like is formed into a film on a pure Al or Al alloy.).
Fourth Group: Background
Liquid crystal displays have characteristics that the power consumption thereof is low and the displays can easily attain full-color display, and other characteristics. Thus, out of flat displays, the liquid crystal displays are promising; in recent years, liquid crystal displays of large sized screen are developed actively. In particular, about an active matrix-based liquid crystal flat display wherein α-SiTFTs or p-SiTFTs are arranged, as switching elements for respective pixels, into a matrix form, and the pixels are each driven, the contrast ratio thereof is not deteriorated even if the display is made highly definited so as to have 800×600 pixels or more. Thus, attention has been paid to the liquid crystal flat display as a flat display for high performance color display. In such an active matrix-based liquid crystal flat display, a transparent electrode such as ITO (indium tin oxide) is used as its pixel electrode, and an Al-based alloy thin film is used as its source electrode in many cases. This is because ITO has a high sheet resistance and Al can easily be patterned and further Al has a low resistance and a high adhesiveness.
FIG. 10 is a view illustrating a sectional view of a vicinity of an α-SiTFT at a stage when the formation of a pattern of a pixel electrode is finished in the process of producing a liquid crystal flat display according to the present invention. FIG. 11 is a view illustrating a sectional view of a vicinity of an α-SiTFT at a stage when the formation of a pattern of a pixel electrode is finished in the process of producing a liquid crystal flat display in the prior art.
In FIG. 11, a pattern of a gate electrode 3002 is formed on a light-transmissible glass substrate 3001, and next plasma CVD is used to form a gate insulation film 3003 made of SiN, an α-Si:H(i) film 3004, and a channel protection film 3005 made of SiN consequtively. Next, the channel protection film 3005 is made into a desired form and pattern by etching. Furthermore, an α-Si:H(n) film 3006 and a metal film made mainly of Al are deposited by CVD, vacuum deposition or sputtering, and then (a pattern of) a source electrode 3007 and (a pattern) of a drain electrode 3008 are formed by photolithographic technique, and further the α-Si:H(n) film 3006 and the α-Si:H(i) film 3004 are finished. In this way, an α-SiTFT element section is completed. If necessary, a transparent resin resist 3010 is deposited and a contact hole 3012 is made.
An ITO film is deposited onto this section by sputtering, and then photolithographic technique is used to form a pattern of a pixel electrode 3009 electrically connected to the source electrode 3007. At this time, the gate electrode 3002 is made into a laminated film of Al/Cr (or Al/Mo or Al/Ti) and the source electrode 3007 and the drain electrode 3008 are each made into a three-layer-laminated film of Cr/Al/Cr (or Mo/Al/Mo or Ti/Al/Ti). A purpose of this is to cause electrical contact property between the ITO film and the gate, source and drain electrodes 3002, 3007 and 3008 not to deteriorate. Al is inexpensive and is low in specific resistance, and is an essential material for preventing a decline in the display performance of the liquid crystal display, the decline resulting from an increase in the wiring resistances of the gate, source electrode and drain electrodes 3002, 3007 and 3008.
The reason why the ITO film is deposited after the Al film is deposited is not to deteriorate electrical contact property between α-Si:H(i) and α-Si:H(n) films 3004 and 3006 and the source and drain electrodes 3007 and 3008. This Al is inexpensive and low in specific resistance, as described above.
In the case of working, in the above-mentioned production process, the pixel electrode pattern 3009, which is made of ITO, with an HCl—HNO3—H2O-based etching solution after the formation of the patterns of the source electrode 3007 and the drain electrode 3008, which are made mainly of Al, an accident that the Al patterns elute out at the time of the end of the manufacturing process may be frequently caused.
This results from the fact that Al originally has a nature that Al is dissolved in the HCl—HNO3—H2-based etching solution, which is an etching solution for etching ITO. HNO3 in the etching solution forms a thin Al oxide film on the surface of Al, and thus HNO3 is added thereto in order to prevent elution of Al. However, it is considered that if the time for etching the ITO film is long or defects portions, such as impurities or foreign substances incorporated during the deposition of Al, are present in the Al film, the above-mentioned Al-oxidizing effect does not act sufficiently by local cell reaction.
In order to prevent such Al elution, it is known that an ITO film is made amorphous, thereby increasing the ITO/Al etching rate by action of any HCl—HNO3—H2O-based etching solution. This matter is described in Patent Document 1, which will be listed up later.
However, even if the ITO film is made amorphous, elution of Al is not completely prevented since an HCl—HNO3—H2O-based etching solution is used. Thus, a highly definited liquid crystal display is not easily realized.
An invention made in light of the above-mentioned problem is described in Patent Document 4, which will be listed up. This Patent Document 4 describes that patterning of a transparent electrode and a pixel electrode on patterns of an Al gate and source/drain electrodes is made easy by use of an oxalic acid-based etching solution. Furthermore, Patent Document 4 suggests that a transparent electrode having a composition composed of indium oxide-zinc oxide is used in order to provide a process for producing a highly definited liquid crystal display.
When such a structure is adopted, it is generally known that contact resistance is generated between the line of the Al gate and the transparent electrode, and between the Al source/drain electrodes and the pixel electrode. The Al lines are usually covered with a barrier metal such as Ti, Cr or Mo. Such a structure is described in Patent Documents 6, 7, 8 and 9, which will be listed up later.
In the case of using Al wirings in this way, it is unavoidable to use a barrier metal; it is therefore necessary to form the barrier metal into a film and etch the film. As a result, it is feared that the production process is made complicated.
The use of alloy wherein various metals are added to Al is reported. However, it is presumed that it is very difficult to make the above-mentioned contact resistance small. This is because an oxide film is formed on the surface of Al itself. This oxide film is an insulator, and it appears that this insulator makes the contact resistance large. Such a description is included in Patent Documents 14, 15 and 16, which will be listed up.
In order to decrease the contact resistance based on this oxide film, suggested is a method of forming a metal thin film made of In, Zn or the like on an Al thin film. According to this method, the contact resistance becomes small but it becomes necessary that this thin film is formed. Moreover, there arise a problem that the transmittance of the pixel electrode declines, and other problems. Such a description is included in Patent Document 17, which will be listed up later.
Patent Document 1: Japanese Patent Application Laid Open (JP-A) No. 63-184726
Patent Document 2: JP-A No. 6-234565
Patent Document 3: JP-A No. 6-187832
Patent Document 4: JP-A No. 11-264995
Patent Document 5: JP-A No. 11-264996
Patent Document 6: JP-A No. 10-65174
Patent Document 7: JP-A No. 11-184195
Patent Document 8: JP-A No. 11-258625
Patent Document 9: JP-A No. 11-253976
Patent Document 10: JP-A No. 4-253342
Patent Document 11: JP-A No. 4-305627
Patent Document 12: JP-A No. 8-18058
Patent Document 13: JP-A No. 11-284195
Patent Document 14: JP-A No. 7-45555
Patent Document 15: JP-A No. 7-301705
Patent Document 16: JP-A No. 1-289140
Patent Document 17: JP-A No. 2003-017706 (Japanese Patent Application No. 2001-200710)

Thin film transistor, thin film transistor substrate, processes for producing the same, liquid crystal display using the same, and related devices and processes; and sputtering target, transparent electroconductive film formed by use of this, transparent electrode, and related devices and processes


A directional coupler for a modem has a high common mode noise rejection characteristic with low transmit signal leakage, and reduced distortion of components mixed with a received signal. A primary filter network is connected to a communications circuit. The primary filter network has an output connected to an input of an amplifier. A feedback network is connected between the input and output of the amplifier. The primary filter network, the amplifier and the feedback network are arranged to provide a virtual ground at the input of the amplifier, and a filter characteristic which attenuates frequencies in the transmit signal band. The advantage is reduced component count while providing excellent transmit signal rejection and reducing received signal distortion.

Most users of data communications services access data communications networks (e.g. the Internet) using dial-up connections established through the Public Switched Telephone Network (PSTN). The PSTN is still substantially an analog communications network designed, before the advent of digital communications, to transmit sounds in the audible range of the human voice.
Digital data is transported across the PSTN by converting the data into an analog signal that is transmitted by varying, or modulating, the frequency, phase, amplitude or other characteristic of a carrier signal. The modulation is performed by a modem attached to a standard telephone line referred to as a "local loop". When analog signals are received from other modems in the PSTN, the receiving modem performs an opposite function by demodulating the received analog signal to convert it back into digital data.
Analog signals are simultaneously transmitted and received by the modem through the local loop. Thus the local loop carries a mixed signal that includes a combination of both transmit (Tx) signals being sent by the modem, and receive (Rx) signals being received by the modem. The modem must therefore separate the Tx and Rx signals so that a substantially uncorrupted Rx signal can be supplied to the demodulation portion of the modem. The separation of the Tx and Rx signals is commonly performed using a circuit known as a hybrid circuit, which is located between the modem's modulation/demodulation circuits and the local loop.
As is well known in the art, a classical hybrid circuit includes a line driver that energizes a line transformer through an impedance (typically a resistor) chosen to provide an appropriate termination impedance for the local loop (which is usually a complex value). In order to separate the Rx signals from the mixed signal on the local loop, the signal line is tapped at a first tap point (proximal the line transformer) and supplied to a summing circuit (typically a differential amplifier). The Tx signal is also supplied to the summing circuit by tapping at a second tap point in a compensation network. The purpose of the compensation network is to provide a branch line from the line driver (source of Tx signals) in which the strength of the Tx signal is directly proportional (preferably equal) to the Tx signal strength at the first tap point, while the Rx signal strength is strongly attenuated. The summing circuit can then isolate the Rx signal from the mixed signal by finding a difference between the signals obtained at the first and second tap points.
In practice, the effectiveness of this classical hybrid circuit depends on the match between the impedance of the line (ZLINE) and that of the compensation network (ZBAL). In particular, if ZBAL=k*ZLINE (where k is a constant) at all frequencies, then the summing circuit will completely remove the Tx signal from the mixed signal, and none of the Tx signal will "leak" past the summing circuit.
However, the impedance of the local loop cannot be matched by a generic compensation network, because it depends on several factors (e.g. loop length, physical properties, loop topology, and the presence of bridged taps, etc.) that are termination-specific. Consequently, in practice, ZBAL<>k*ZLINE and at least some of the Tx signal will leak past the summing circuit. This Tx signal leakage appears as noise in the Rx signal supplied to the demodulator of the modem. This noise (Tx leakage) may include distortion components generated by the line driver, and may also cause distortions in the demodulator that fall in the Rx signal frequency band and cannot be separated from the useful Rx signal.
Additionally, at a minimum usable Rx signal strength, common-mode noise originating from multiple sources (e.g., Vcc, ground, capacitive coupling, etc.) may rival the Rx signal strength. If this occurs, the Rx signal integrity will be severely compromised, resulting in an unacceptably low signal-to-noise ratio.
It is known that Tx signal leakage can be reduced by inserting filters between the tap points and the summing circuit. The filters can be tuned to attenuate signals in the Tx frequency band, without attenuating the Rx signals. While such filters reduce Tx signal leakage, the filter circuits may induce the same distortion problems discussed above, resulting in distortion components (within the Rx frequency band) that are applied to the inputs of the summing circuit. As is well known, those distortion components cannot be separated from the useful Rx signal. In addition, the filter circuits do not address problems associated with common-mode noise.
As taught in U.S. Pat. No. 5,822,426 (Rasmus et al.), which issued Oct. 13, 1998, the problem of common-mode noise can be addressed by using a balanced pair of line drivers, respectively generating complementary Tx+ and Tx− signals (or by inverting the mixed signal derived at the second (Tx) signal tap). This effectively eliminates common-mode noise supplied to the input of the summing amplifier that extracts the Rx signal. However, Rasmus et al. do not address the problems of Tx signal leakage or distortion.
Accordingly, there remains a need for an improved circuit for coupling a modem receiver (demodulator) to a signal line that carries transmit and receive signals simultaneously.

Directional receiver coupling arrangement with frequency selectivity and gain control for DSL


A system and method for thinning an integrated circuit (IC) wafer. The system includes a support structure to hold the IC wafer and a mechanism to operate on the IC wafer. The support structure includes one or more inductive coils configured to transmit a power signal to the IC wafer and receive a feedback signal from the IC wafer. The system further includes a process controller to control the operation based at least in part on the feedback signal received from the IC wafer.

The manufacture of integrated circuit (IC) devices involves a wafer fabrication process in which circuit components (e.g., resistors, diodes, transistors, etc.) and their interconnections are formed on a single wafer of semiconductor substrate). The size and number of circuit components that can be fabricated on a single wafer of silicon may be determined by the process node used during the fabrication process. For example, a smaller process node may produce smaller circuit components that are faster and more power-efficient than similar circuit components produced by a larger process node. Thus, the process node used to manufacture the wafer may be optimized for the type of device. For example, larger process nodes may be used to manufacture devices having larger circuit components and/or greater power consumption whereas smaller process nodes may be used to manufacture devices having smaller circuit components and/or less power consumption.
Wafer thinning is a process for removing material (e.g., layers of substrate and/or impurities) from the surface of a semiconductor wafer. Example wafer thinning techniques include backgrinding and chemical mechanical planarization (CMP). Wafer thinning may be used to smooth or polish the surface of an IC wafer prior to adding an additional layer of substrate and/or circuitry to the surface of the wafer. Wafer thinning may also be used to reduce the thickness of an IC wafer to a desired level of thickness. However, thinning an IC wafer may alter the electrical characteristics of the wafer. More specifically, over-thinning the IC wafer may cause one or more circuit components to fail. Thus, it may be desirable to monitor the wafer thinning process to prevent over-thinning.


The disclosure relates to broad spectrum influenza virus ribonucleic acid (RNA) vaccines, as well as methods of using the vaccines and compositions comprising the vaccine. In a preferred embodiment, the vaccine is formulated as a lipid nanoparticle comprising at least one cationic lipid.

Influenza viruses are members of the orthomyxoviridae family, and are classified into three distinct types (A, B, and C), based on antigenic differences between their nucleoprotein (NP) and matrix (M) protein. The orthomyxoviruses are enveloped animal viruses of approximately 100 nm in diameter. The influenza virions consist of an internal ribonucleoprotein core (a helical nucleocapsid) containing a single-stranded RNA genome, and an outer lipoprotein envelope lined inside by a matrix protein (M1). The segmented genome of influenza A virus consists of eight molecules (seven for influenza C virus) of linear, negative polarity, single-stranded RNAs, which encode several polypeptides including: the RNA-directed RNA polymerase proteins (PB2, PB1 and PA) and nucleoprotein (NP), which form the nucleocapsid; the matrix proteins (M1, M2, which is also a surface-exposed protein embedded in the virus membrane); two surface glycoproteins, which project from the lipoprotein envelope: hemagglutinin (HA) and neuraminidase (NA); and nonstructural proteins (NS1 and NS2). Transcription and replication of the genome takes place in the nucleus and assembly takes place at the plasma membrane.
Hemagglutinin is the major envelope glycoprotein of influenza A and B viruses, and hemagglutinin-esterase (HE) of influenza C viruses is a protein homologous to HA. The rapid evolution of the HA protein of the influenza virus results in the constant emergence of new strains, rendering the adaptive immune response of the host only partially protective to new infections. The biggest challenge for therapy and prophylaxis against influenza and other infections using traditional vaccines is the limitation of vaccines in breadth, providing protection only against closely related subtypes. In addition, the length of time required to complete current standard influenza virus vaccine production processes inhibits the rapid development and production of an adapted vaccine in a pandemic situation.
Deoxyribonucleic acid (DNA) vaccination is one technique used to stimulate humoral and cellular immune responses to foreign antigens, such as influenza antigens. The direct injection of genetically engineered DNA (e.g., naked plasmid DNA) into a living host results in a small number of its cells directly producing an antigen, resulting in a protective immunological response. With this technique, however, come potential problems, including the possibility of insertional mutagenesis, which could lead to the activation of oncogenes or the inhibition of tumor suppressor genes.

This patent is subject to a terminal disclaimer.


A feedback system for use in controlling control moment gyroscopes that are used in positioning a spacecraft where the relative rate of rotation is determined from the difference between the rotation rate of the gimbals of the CMGs and the rotation rate of the frame about the gimbal axis. The inertial reference units on the spacecraft are utilized as the source of measured rates of rotation of the three spacecraft axes with respect to a predetermined axis and these are converted to the rates of rotation of the frame about the individual CMG gimbal axes.

1. Field of the Invention
This invention relates to the production of feedback signals indicative of the rate of rotation of a system, such as a space craft for use in controlling a torque applied to the space craft with drive devices such as control moment gyros (CMGs).
2. Description of the Prior Art:
CMGs are well known in the art for use in controlling the torque applied to a space craft to control its orientation or rate of rotation with respect to reference axis or to another body such as earth. For example, a satellite in space may have its rate of rotation controlled about one or more axes (usually three) by fixing the gimbal frames of one or more CMGs (usually four to provide redundancy) to the frame of the spacecraft and applying a command rate to the gimbals of the CMGs which then create torques which are transferred to the frame of the spacecraft to obtain the desired rotation rate. In such systems it is desirable to provide closed loop feedback for better control by assuring that the actual rates are the same as the commanded rates. Such systems have employed tachometers to supply a signal indicative of the relative rate of rotation between the gimbal frame and the inner gimbal assembly. However, tachometers have greater size and weight than is desired, have low rate threshold (the signals can't be discerned from the noise), have variable rate ripple (voltage that varies without change in gimbal rate) and must be mounted colinearly with the gimbal. A better system has been described in the above referenced Foshage application where a pair of fiber optic gyros are employed, one to measure the absolute rate of rotation of the inner gimbal assembly and one to measure the absolute rate of rotation of the frame attached to the spacecraft. While this system provides excellent rate control, it requires the use of two separate absolute rate sensors (e.g. fiber optic gyros).

Non colocated rate sensing for control moment gyroscopes


A light emitting display having an emissive element which emits light in response to a supplied current, comprises a drive current generating element for generating a drive current for allowing light to be emitted from the emissive element, a data line onto which a voltage signal and a current signal corresponding to data regarding an amount of light emission from the emissive element are sequentially supplied, and a voltage storage element connected to the data line and for sequentially storing a charge voltage based on the voltage signal and the current signal corresponding to data regarding the amount of light emission. The drive current generated by the drive current generating element based on a charge voltage corresponding to the current signal stored in the voltage storage element is supplied to the emissive element so that generation of precise drive current corresponding to data regarding the amount of light emission is enabled and the time required for writing data into the voltage storage element is shortened.

1. Field of the Invention
The present invention relates to an electroluminescence (hereinafter simply referred to as "EL") display circuit for controlling light emission from an EL element based on both a data voltage and data current generated based on data for driving the EL element.
2. Description of the Prior Art
Because EL display devices in which a self-emitting EL element is used as an emissive element in each pixel have advantages such as that the device is thin, self-emitting, and consumes less power, EL display devices have attracted much attention as alternatives to display devices such as liquid crystal display (LCD) and cathode ray tube (CRT) display devices.
In particular, a high resolution display can be achieved by an active matrix EL display device in which a switching element such as a thin film transistor (hereinafter simply referred to as "TFT") for individually controlling an EL element is provided in each pixel and the EL element in each pixel is controlled.
In an active matrix EL display device, a plurality of gate lines extend along a row direction over a substrate, a plurality of data lines and power supply lines extend along a column direction over the substrate, and each pixel has an organic EL element, a selection TFT, a driver TFT, and a storage capacitor. In this structure, a gate line is selected so that the selection TFT is switched on, a data voltage on a data line is charged into the storage capacitor, and the driver TFT is switched on by this data voltage to allow electric power to flow from a power supply line through the organic EL element.
Japanese Patent Laid-Open Publication No. 2001-147659 (hereinafter simply referred to as "the '659 Publication") discloses a circuit in which two p-channel TFTs are added in each pixel as controller transistors and a data current corresponding to display data is applied to a data line.
FIG. 1 shows a pixel circuit disclosed in the '659 Publicatio. As shown, one terminal of an n-channel TFT3 (selection TFT) having its gate connected to a scan line scanA is connected to a data line DL onto which a current Iw is to be applied. The other terminal of the selection TFT3 is connected to one terminal of a p-channel TFT1 and one terminal of a p-channel TFT4 (driver TFT). The other terminal of the TFT1 is connected to a power supply line Vdd and a gate of the TFT1 is connected to a gate of a p-channel TFT2 for driving an organic EL element ("OLED"). The other terminal of the TFT4 is connected to the gates of the TFT1 and TFT2 and a gate of the TFT4 is connected to a scan line scanB.
In this structure, the scan line scanA is set to an H level to switch the TFT3 on, and the scan line scanB is set to an L level to switch on the TFT4. A current Iw corresponding to data is applied to the data line DL, which causes the gate and source of the TFT1 to be connected (short-circuited) due to the switching on of the TFT4, the current Iw is converted to a voltage, and this voltage is set to voltages of the gates of the TFT1 and TFT2. After the TFT3 and TFT4 are switched off, the gate voltage of the TFT2 is maintained by a storage capacitor C, thus allowing a current corresponding to the current Iw to flow through the TFT2 and through the OLED so that light is emitted from the OLED based on the amount of supplied current. Then, when the scanB is set to an L level, the TFT1 is switched on, the gate voltage of the TFT1 is increased, the storage capacitor C is discharged, data is erased, and the TFT1 and TFT2 are switched off.
In this circuit, when a current flows through the TFT1, the current is converted to a voltage and the gate voltage of the TFT1 and TFT2 is determined. According to the determined gate voltage, the amount of current flowing through the TFT2 is determined. Thus, the amount of current flowing through the TFT2 can be set corresponding to a data current Iw.
However, in the circuit of the '659 Publicatio, the data current Iw is allowed to flow through the TFT1 to set the gate voltage of the TFT2. Therefore, it cannot be assured that the current flowing through the TFT2 corresponds to the data current. Thus, this system is commonly called an "indirect specification system".
Another reference, R. Hattori et al., IECE TRANS. ELECTRON., Vol. E83-C, No. 5, pp. 779-782, May (2000) (hereinafter simply referred to as the "Hattori reference") discloses a circuit having a structure in which a data current is set to a storage capacitor while the data current is supplied onto the data line and flows through a driver TFT. Because a gate voltage of the driver TFT is directly determined by the data current, this system is commonly referred to as "direct specification system".
FIG. 2 shows a structure of a circuit disclosed in the Hattori reference. A source of a p-channel driver TFT5 is connected to a power supply Vdd, an anode of an organic EL element OLED is connected to a drain of the driver TFT5 through a p-channel TFT6, and a cathode of the OLED is connected to a ground.
A gate of the driver TFT5 is connected to a data line DL through a p-channel TFT7 and is connected to a power supply line Vdd through a storage capacitor C. In addition, a connection point between the driver TFT5 and the TFT6 is connected to the data line DL through a TFT8.
A read line Read which extends along the row direction is connected to a gate of the TFT6 and a write line Write which also extends along the row direction is connected to gates of the TFT7 and TFT8.
In this circuit, while a data current corresponding to display data is supplied onto the data line DL, the write line Write is set to an L level to switch on the TFT7 and TFT8 and the read line Read is set to an H level to switch off the TFT6. With this configuration, a data current Idata flowing on the data line DL flows from the power supply Vdd through the driver TFT5 and TFT8. Because TFT7 is switched on, the gate voltage of the TFT5 is set to a voltage of the TFT5 when Idata flows through the TFT5 and this voltage is stored in the storage capacitor C.
Then, the write line Write is set to an H level and the read line Read is set to an L level to switch off the TFT7 and TFT8 and switch on the TFT6. Because the gate voltage of the TFT5 is maintained at the voltage stored in the storage capacitor C, a current identical to the current Idata continues to flow through the TFT5.
In this manner, a current Ioled corresponding to the data current Idata can flow through the organic EL element OLED and light can be emitted. In particular, in this circuit, a data voltage is written into the storage capacitor C by actually supplying the data current Idata corresponding to the display data through the driver TFT5. With this structure, it is possible to precisely set the drive current Ioled of the organic EL element OLED.
As described, with the direct specification system, it is possible to more precisely control a drive current of an organic EL element.
In such a circuit, however, a current value corresponding to minimum video data (minimum current value) is directly written into the storage capacitor. When the number of gradations is small, it is possible to set the minimum current value to a relatively large value. However, when it is desired that the number of gradations be large in order to realize a high resolution display, the minimum current value is significantly small. In order to reliably set a charge voltage of the storage capacitor corresponding to a data current having a small current value, the time required for writing data for each pixel becomes significantly large. Therefore, in a direct specification system, there had been a problem in that a display with a large number of pixels and a large number of gradations was difficult.
In the indirect specification system, on the other hand, it is possible to set the write current corresponding to the minimum video data to a relatively large value by changing the sizes (size ratio) of the TFT1 and TFT2, which allows for a short writing time. However, as described above, the indirect specification system is inferior to the direct specification system in the precision of written data.


Methods, systems, and apparatus, including computer programs encoded on computer storage media, for providing consistent processing in a machine learning system are disclosed. A real-time processing request may be received and processed by both a preferred machine learning model and a fallback machine learning model. Processing for the preferred machine learning model may include obtaining additional information. A determination may be made regarding whether the processing of the real-time request by the preferred machine learning model has completed as of an expiration of an acceptable latency period. If the preferred model has not completed as of the expiration of an acceptable latency period, the response to the real-time request may be generated from the fallback model output. If the preferred model has completed prior to or by the expiration of the acceptable latency period, the response to the request may be generated from the preferred model output.

Machine learning models receive input and generate output based on the received input and on values of model parameters. While batch processing and non-real time streaming processing can tolerate latency fluctuations due to transient hardware and/or software events, a real-time system has hard latency constraints that make latency fluctuations intolerable.

Processing real-time processing requests using machine learning models


Improved methods and apparatus are provided for protecting public key schemes based on modular exponentiation (including RSA and Diffie-Hellman) from indirect cryptanalytic techniques such as timing and fault attacks. Known methods for making the implementation of number-theoretic schemes resistant to such attacks typically double their running time, whereas the novel methods and apparatus described in this patent add only negligible overhead. This improvement is particularly significant in smart card and software-based implementations, in which the modular exponentiation operation is quite slow, and doubling its time may be an unacceptable solution.

1. Introduction
The simplest attack on a given cryptosystem is to exhaustively search for the key. There are many variants of this attack (known ciphertext, known cleartext, chosen cleartext, etc.), but they are all based on a procedure which tries the keys one by one until the correct key is encountered. If the key consists of n random bits, the expected running time of this procedure is 2 (n-1). This attack can be easily foiled by using a large enough n (e.g., n>100).
To attack cryptosystems with large keys, cryptanalysts try to find mathematical or statistical weaknesses which reduce the size of the search space (preferably to 1). Although many techniques and results are classified for national security reasons, it is safe to assume that it is increasingly difficult to find such weaknesses in modern schemes designed by experienced cryptographers and implemented on high speed microprocessors.
To successfully attack strong cryptosystems, the cryptanalyst must use indirect techniques. This is best done when the cryptanalyst is either in close physical proximity to the cryptographic device, or has it under his complete control. The cryptographic device is assumed to be a black box which contains a known algorithm and an unknown key. The cryptanalyst cannot open this box and read its key, but he can observe its behavior under various circumstances.
One of the best known examples of such an indirect attack is TEMPEST, which tries to deduce the key by analyzing electromagnetic radiation emanating from the black box during the computation of the ciphertext. Techniques for applying and preventing such attacks have been extensively studied for more than 50 years, and by now this is a well understood problem.
Two powerful indirect attacks were discovered and published recently: In December 1995, P. Kocher, "Cryptanalysis of Diffie-Hellman, RSA, DSS, and Other Systems Using Timing Attacks," technical report, 12/7/95, described a timing attack, and in September 1996, D. Boneh, R. A. Demillo and R. J. Lipton, "On the Importance of Checking Computations," technical report, 9/25/96 (an extended version appears in the Proceedings of Eurocrypt 97, May 1997) described a fault attack. Both attacks were originally designed for and are most successful against public key schemes based on number theoretic principles, such as RSA, but they were later extended to classical cryptosystems as well (e.g., by E. Biham and A. Shamir, "A New Cryptanalytic Attack on DES," technical report, 10/18/96. An extended version appears in the Proceedings of Crypto 97, August 1997).
Such attacks are particularly useful when the scheme is implemented on a smart card, which is distributed by a bank, computer network, cellular phone operator, or pay-TV broadcaster to its customers. Hackers do not usually have the financial and technical resources required to read the contents of the key registers inside the smart card, but they have complete control on the input/output, clock, reset, and power connections of the smart card. They can carefully measure the duration of the various operations, how much power they consume, what happens when the computation is interrupted or carried out under abnormal operating conditions, etc. Since the tests are carried out in the privacy of the customer's home, the card manufacturer cannot prevent them or even learn about their existence.
2. Timing Attacks
Timing attacks are based on the assumption that some of the basic operations carried out during the cryptographic calculation require a non-constant amount of time which depends on the actual values being operated upon. This implies that some information about these unknown intermediate values leaks out by measuring the length of the cryptographic computation. If these intermediate values are computed from known cleartext bits and unknown key bits by a known cryptographic algorithm, the attacker can try to use the leaked intermediate values to deduce the key.
The main difficulty in carrying out this attack is that the attacker knows only the total amount of time required to carry out the cryptographic computation, but not the timing of individual computational steps. Kocher's main contribution is in developing an efficient technique for handling this difficulty in many cases of practical interest.
For the sake of concreteness, we describe Kocher's attack on the RSA cryptosystem. The black box is assumed to contain a publicly known modulus n and a secret exponent d. Given an input number x, the box performs the modular exponentiation x d (mod n) by using the standard square-and-multiply technique. In this description, the symbol " " is exponentiation and the symbol ".sub.-- " is a subscript. The result (which can be the decryption of the ciphertext x, the signature of the message x, or the response to a random identification challenge x, depending on the application) is sent out as soon as it is produced, and thus the attacker can measure the total number of clock cycles taken by all the modular multiplications.
Standard implementations of modular multiplication require a non-constant amount of time, since they skip multiplication steps involving leading zeroes, and reduction steps when the result is smaller than the modulus. The attacker chooses a large number of random inputs x, and measures the actual timing distribution T.sub.-- 0 of the modular exponentiation operation carried out by the black box. He then measures for each x (by computer simulation, using his knowledge of how the scheme is implemented) the precise timing of an initial square-only operation, and separately, the precise timing of an initial square-and-multiply operation. The result is a pair of timing distributions T.sub.-- 1 and T.sub.-- 2, which are not identical. All the cryptographic computations carried out in the black box use the same exponent d, and its first bit determines which one of the two computed distributions T.sub.-- 1 and T.sub.-- 2 is the initial part of the experimentally computed T.sub.-- 0. The timing of the remaining steps of the computations can be assumed to be a random variable R, which is normally distributed and uncorrelated with either T.sub.-- 1 or T.sub.-- 2. Since T.sub.-- 0 is either T.sub.-- 1+R or T.sub.-- 2+R, the attacker can decide which case is more likely by finding which one of the two distributions T.sub.-- 0-T.sub.-- 1 and T.sub.-- 0-T.sub.-- 2 has a lower variance.
After finding the first bit of the secret exponent d, the attacker knows the actual inputs to the second computational step, and thus he can apply the same technique (with properly modified experimental and simulated timing distributions T'.sub.-- 0, T'.sub.-- 1, and T'.sub.-- 2) to find the second bit of d. By repeating this procedure about 1000 times, he can compute all the bits of d, and thus break the RSA scheme.
A similar timing attack can be applied to any cryptographic scheme in which the black box raises all its inputs x.sub.-- 1,x.sub.-- 2, . . . to the same secret power d modulo the same known n (which can be either a prime or a composite number). For example, in one of the variants of the Diffie-Hellman key distribution scheme, all the users agree on a prime modulus n and on a generator g of the multiplicative group Z *.sub.-- n.
Each user chooses a random secret exponent d, and computes y=g d (mod n) as his public key. To establish a common secret key with another user, the first user sends out his public key y=g d (mod n), and receives a similarly computed public key x=g e (mod n) from the other user. Their common cryptographic key is z=g (d*e) (mod n) which the first user computes by evaluating x d (mod n). When the first user communicates with several parties, he raises several known values x.sub.-- 1,x.sub.-- 2, . . . to the same secret power d modulo the same known modulus n. By measuring the timing of sufficiently many such computations, the attacker can determine d and thus find all the cryptographic keys z.sub.-- 1,z.sub.-- 2, . . . employed by that user.
The timing attack has to be modified if the computation of x d (mod n) for a composite modulus n=p*q is carried out by computing x d (mod p), x d (mod q), and combining the results by the Chinese Remainder Theorem (CRT). This is a common way of making the computation about 4 times faster when the factorization of n is known. The problem for the attacker is that he does not know the secret factors p and q of the public modulus n, and thus cannot simulate the timing distributions T.sub.-- 1 and T.sub.-- 2. Kocher's solution is to concentrate on the first step of the CRT computation, in which the input x is reduced modulo p. If x is smaller than p, no modular reduction is required, and thus the computation is considerably faster than when x is larger than or equal to p. The attacker thus presents to the black box a large number of inputs x which are very close to each other, and uses the average time of such computations to decide whether these x's are above or below p. A decision procedure for this question can be repeatedly used to find the precise value of p by binary search.
Shortly after the discovery of this attack, researchers tried to develop implementations which are immune to it. The simplest idea is to make sure that all the cryptographic operations take exactly the same amount of time, regardless of the values of the cleartexts and keys. However, achieving this is surprisingly difficult for the following reasons:
(a) In many cases, the implementor wants to run the same algorithm in software on different (and perhaps unknown) machines. An implementation which is constant time on one microprocessor may be variable time on another microprocessor or even on an enhanced version of the same microprocessor. PA0 (b) On a multitasking machine the running time may depend on the amount of free memory, the cache hit rate, the number of external interrupts, etc. This can change a constant time implementation under one set of circumstances into a variable time implementation under another set of circumstances. PA0 (c) If the implementor tries to use a real time clock to force all the computations to take the same amount of time, he must slow all of them down to their worst cases. Since he cannot use any input-dependent optimization technique, the implementation is likely to be unacceptably slow.
The best protective technique proposed so far against Kocher's timing attack on modular exponentiation is to replace each input x by a modified version y=x*r (mod n) where r is a secret random number between 1 and n-1. To compute x d (mod n), the program computes y d (mod n) and r d (mod n), and then uses the multiplicative property of modular exponentiation to compute x d (mod n) as y d/r d (mod n). Since both y and r are unknown, the attacker cannot simulate these computations in order to find the successive bits of d in the non-CRT computation, and cannot perform binary search in the CRT version of the computation. Unfortunately, this randomization technique doubles the expected running time of the computation.
3. Fault Attacks
Fault attacks try to introduce errors into the cryptographic computation, and to identify the key by analyzing the mathematical and statistical properties of the erroneously computed results. Among the many techniques suggested so far for introducing such errors are the use of ionizing radiation, unusual operating temperatures, power and clock glitches, and laser-based chip microsurgery. Some of the attacks are differential (i.e., they carry out both a correct and an erroneous computation with the same input and analyze their differences), while other attacks just use the erroneous results.
The original fault attack on public key cryptosystems was described in Boneh, Demillo and Lipton, and required several cryptographic computations. We now describe an improved version of this attack, due to Aijen Lenstra, which requires a single faulty computation. We assume that the black box uses the RSA scheme to sign a given message x. The computation of x d (mod n) is carried out with the CRT method by first reducing x modulo p and q to get x.sub.-- 1 and x.sub.-- 2, then computing y.sub.-- 1=x.sub.-- 1 d (mod p) and y.sub.-- 2=x.sub.-- 2 d (mod q), and finally combining y.sub.-- 1 and y.sub.-- 2 to get the signature y (mod n) with the CRT method. We assume that a single error is introduced at a random time during this computation by applying mild physical stress to the black box. Without loss of generality, we can assume that the error was introduced during the computation of x.sub.-- 1 d (mod p), and thus instead of getting the correct y.sub.-- 1, the box computed an erroneous y'.sub.-- 1. When y'.sub.-- 1 and y.sub.-- 2 are combined by the CRT method, the box computes an incorrect signature y' which is provided to the attacker.
The main observation is that the attacker knows the signature verification exponent e, for which y e=x (mod n). Due to the error, y' e-x is non-zero mod p, but zero mod q, and thus it is a multiple of q which is not a multiple of n. The attacker can thus factor n by computing the greatest common divisor of y' e-x (mod n) and n, which is an easy computation.
To protect cryptographic schemes against fault attacks, Boneh, Demillo and Lipton recommend that each computation should be carried out twice (preferably by different algorithms). If any discrepancy is found between the two results, the box should not output anything. This provides strong protection from random faults (which are unlikely to affect the two computations in an identical way), but it slows down the computation by a factor of 2. Such a slowdown is particularly noticeable in smart card implementations of public key schemes, which are quite slow to begin with.

Method and apparatus for protecting public key schemes from timing and fault attacks

Yeda Research and Development Co. Ltd. at the Weizmann Institute of Science


An electromagnetic transducer for sound and ultrasound reproduction includes a substantially flat coil coupled to a diaphragm that is near to and facing the North or South side of a magnet. A very thin membrane made from a non-magnetic but electrically conductive material is independently mounted from the diaphragm and faces it. An AC signal in the coil results in diaphragm movement and “modulates” the permanent magnetic field. The modulating field generates a current in the membrane, which, upon further interactions, causes the membrane to move. The two independently moving surfaces each generate sound and result in an unusually flat SPL/frequency response, with unusually low narrow-band intensity variation and very low distortion. The transducer is also unique among electromagnetic transducers in that the force acting on the membrane is uniformly distributed over much of it, as in an electrostatic sound transducer.

Sound waves exist as variations of pressure in a medium, such as air. The pressure variation results from the vibration of an object, which causes the surrounding medium to vibrate. The vibrating medium (i.e., air) then causes the human eardrum to vibrate, which the brain interprets as sound.
A loudspeaker (or "speaker") is an electroacoustic transducer that generates pressure variations in air in response to an electrical audio signal that it receives. The term "loudspeaker" may refer to individual transducers, known as audio "drivers," or to complete speaker systems consisting of an enclosure, speaker binding posts, a cross-over, and one or more audio drivers.
The most common type of audio driver is a dynamic driver. It uses a lightweight conically configured diaphragm (i.e., a cone), which is connected to a rigid supporting basket via a flexible suspension called a spider. The spider constrains a coil of fine wire, known as a voice coil.
When a "music" signal, typically from an audio amplifier and in the form of an alternating current ("AC"), is applied to the voice coil, a magnetic field is generated due to the flow of electric current. The field fluctuates as a function of the applied AC music signal. This fluctuating electromagnetic field interacts with the magnetic field of a fixed permanent magnet. This interaction results in a mechanical force (i.e., the Lorentz force). The force causes the coil and, hence, the attached cone, to move back and forth. The air pressure in front of the cone increases and decreases as a consequence of this movement. Pressure waves, which the human ear/brain interprets as "sound," are thereby generated in the air.
Drivers other than dynamic drivers are known and used for audio reproduction. Of particular relevance to this disclosure are planar drivers. Planar drivers are characterized by flat planar diaphragms (for moving air). One type of planar driver is the electrostatic transducer, the salient elements of which are depicted in FIG. 1. Electrostatic driver 100 includes three basic components: stators 102, diaphragm 106, and spacers (not shown).
Stators or grids 102 are electrically conductive metal sheets that are coated with an insulator. Stators 102 are perforated with holes 104. Diaphragm 106 is a very light weight plastic film, such as PET (commonly known as "Mylar") having a thickness 2-20 μm. The film is treated with an electrically conductive material, such as graphite. Diaphragm 106 is stretched taut and is disposed in a gap between stators 102. To help stiffen the stators and to prevent the diaphragm from contacting a stator, electrically-insulating strips of material (not depicted) are placed widthwise at intervals along each stator's length.
In operation, diaphragm 106 is charged to a fixed positive voltage by a high-voltage power supply. This generates a strong electrostatic field around the diaphragm. Stators 102 are driven by the electrical audio signal, which is delivered thereto from an audio amplifier via a step-up transformer. Stators 102 are anti-phase (i.e., one is positively charged and the other is negatively charged). The "sign" and amount of charge is a function of the electrical "music" signal. As a result, a uniform electrostatic field proportional to the audio signal is produced between both stators. This causes a force to be exerted on electrically charged diaphragm 106, causing it to move towards one or the other of the stators, depending on the charge of either. The moving diaphragm generates pressure variations in the air on either side of the diaphragm. Holes 104 are required so that these air pressure variations are projected outward beyond the stators. Diaphragm 106 is driven by two stators, one on either side of it, because the force exerted on the diaphragm by a single stator would be unacceptably non-linear, resulting in distortion.
A second type of planar driver is the magnetic driver. This driver works similarly to an electrostatic driver, except that the diaphragm is urged to movement due to a magnetic interaction rather than an electrostatic interaction. There are two types of magnetic drivers: ribbons and planar-magnetics.
FIG. 2 depicts ribbon driver 200. The ribbon driver includes two spaced-apart magnets 208A and 208B and "ribbon" 206.
The north pole of magnet 208A opposes the south pole of magnet 208B. Disposed between the two magnets in a side-by-side configuration is a flexible sheet of electrically conductive material known as a ribbon. Ribbon 206 is typically aluminum. The ribbon is very thin—essentially a foil—and it is pleated. Ribbon 206 is clamped at each end 210. There is slack in the ribbon such that it is under very little tension. The pleating serves at least two functions. It provides freedom of motion for the metal foil; that is, it serves as a suspension. It also provides a force-distribution function. More particularly, the Lorentz force (which arises as a consequence of magnetic interactions) acts on the edges of the ribbon as a function of frequency. The pleating helps to distribute the force so that it acts more evenly across the ribbon.
In operation, ribbon 206 receives the electrical (music) signal from an audio amplifier at contacts/terminals 212. Since the ribbon is conducting an electrical current, it generates a magnetic field. The magnetic field generated by ribbon 206, which varies as a function of the music signal, interacts with the non-varying magnetic field of permanent magnets 208A/B. Ribbon 206 is moved in either the plus or minus direction, perpendicular to the magnetic field between 208A/B, depending on which direction the alternating current of the amplifier's output is flowing.
The main advantage of a ribbon driver is that the ribbon has very little mass. Therefore, the ribbon can accelerate very quickly, providing excellent high-frequency response. But because it is so thin and light, the ribbon driver is exceedingly fragile and is very sensitive to outside pressure changes in the air.
Furthermore, ribbon drivers are generally limited to use as high frequency drivers since it is difficult to build a true ribbon driver large enough to handle lower frequencies. In particular, the pleated shape is easily damaged by its own weight if it's too large. Also, it can be damaged by excessive excursion, which can stretch and flatten the pleats. When this happens, the ribbon sags in the gap between the magnets and performs poorly. As a consequence, these drivers tend to be small and limited to high frequencies, wherein excursions are minimal and the ribbon can readily support its own weight.
Also, a true ribbon speaker presents a problematically low impedance to the power amplifier that drives it. The small ribbon presents little resistance to current flow, which, if not addressed, would behave like a short circuit to the amplifier. Even if the amplifier itself is not damaged, or doesn't shut down for protection, few amplifiers perform well when presented with such a low impedance load (about 0.1Ω). Most ribbons drivers incorporate a step-down transformer to mitigate this problem. Unfortunately, as with electrostatic speakers, the transformer itself can limit the ultimate performance of the ribbon driver and adds to its cost.
Unlike the ribbon driver in which the diaphragm is in a side-by-side arrangement with respect to the magnets, in a planar magnetic driver, the magnets are located in front of and, in some cases, also in back of the diaphragm. A thin flexible plastic, such as Mylar, typically serves as the diaphragm.
In some planar magnetics, a thin, flat, conductive foil is glued onto the diaphragm. In some other planar magnetic drivers, metal wire, rather than conductive foil, is glued to diaphragm. The electrically conductive element (i.e., foil or wire) conducts the amplifier's output (music) signal and creates an electromagnetic field that varies with the music signal. The varying electromagnetic field interacts with nearby permanent magnets giving rise to the Lorentz force that causes the diaphragm to move towards or away from the magnets. The planar magnetic driver can operate satisfactorily at much lower frequencies than a ribbon driver.
A cutaway view of planar magnetic driver 300 with wire is depicted in FIG. 3A. Driver 300 includes stators 302, diaphragm 306, permanent magnets 308A/B, and electrically conductive trace(s) or wire(s) 314.
As depicted in FIG. 3A, plural magnets 308A are disposed on one stator 302 and plural magnets 308B are disposed on the opposing stator. The magnets are arranged so that, along a stator, the north and south poles of adjacent magnets alternate. Magnetic field lines exit north poles and enter south poles. Stators 302, which are steel, close the magnetic circuits and secure magnets 308A/B in a proper orientation. The component of the vector of the magnetic field B that is useful (for generating movement) lies in the plane of diaphragm 306.
As in an electrostatic driver, diaphragm 306 is disposed between the two stators 302. More precisely, in driver 300, diaphragm 306 is disposed in a gap between opposing magnets 308A/B on the stators. The diaphragm is typically formed from Mylar or a material having characteristics similar thereto. Bonded to diaphragm 306 is one or more lengths of wire 314 arranged as one or more elongated coils. As depicted in FIG. 3B, the "coil" is stretched out along the diaphragm such the wire or electrically-conductive trace (hereinafter simply "wire") 314 runs lengthwise, in parallel to bar magnets 308A/B.
In operation, an amplified electrical (music) signal is brought to the speaker's binding posts 312, which are electrically coupled to wire(s) 314. The current (I) flowing through the wire(s) generates a magnetic field (B) that varies as a function of the applied electrical signal. This fluctuating magnetic field interacts with the magnetic fields of the permanent magnets. A (Lorentz) force (F) results from the interaction; the force varies in magnitude as a function of the amplitude of the music signal and varies in direction as a consequence of the direction in which the current flows through wire(s) 314. The directional relationship between current (I), magnetic field (B), and force (F), as given by Flemings "left hand rule," is depicted in FIG. 3A.
The resulting (Lorentz) force F is perpendicular to diaphragm 306, in one direction or the other. This force causes the wire(s) 314 and diaphragm 306 to move toward one set of magnets or the other. When the current changes direction, the direction of force changes 180 degrees. Wires 314 are arranged on the surface of diaphragm 306 so that the resulting force moves all of the wires (and hence diaphragm 306) in the same direction.
Because wires 314 are strongly bonded to diaphragm 306, and because wires 314 cover a major portion (about 80 percent or more) of the diaphragm's surface, the diaphragm moves back and forth like a piston. This movement, which is ultimately a consequence of the changing electrical (music) signal, vibrates the surrounding air, thereby creating a pressure (sound) wave. The pressure wave passes through openings 304 in both stators 302.
Planar magnetic drivers are relatively inefficient, with a low force-per-square-inch acting on the diaphragm. The active magnetic force is a line force, which can result in irregular movement of the diaphragm. Efficiency can be improved through the use of stronger magnets, but this exacerbates any tendency toward irregular diaphragm movement due to the nature of the line force, among other things. The driver performs with reasonable levels of distortion, but the frequency spectrum can have some sharp peaks in sound pressure level ("SPL").
There is, as such, room for improvement in audio-driver technology. In particular, it would be advantageous to have a planar driver that has a broader frequency range of operation than existing planar drivers and that is more accurate with very low distortion over the full operating frequency range.

Audio driver and method for transforming an electrical signal into air movement


The present invention relates to carbocephem β-lactam antibiotics having the chemical structure:

The following is provided as background information only and is not to be construed as prior art to the present invention.
Over the past three decades a variety of antibiotics have become available for clinical use. One class of antibiotics that has seen remarkable growth is the β-lactams, over 70 of which have entered clinical use since 1965. Unfortunately, the widespread use of these antibiotics has resulted in an alarming increase in the number of resistant strains, especially among clinically important bacteria such as the genera Salmonella, Enterobacteriaceæ, Pseudomonas and Staphylococcus.
Bacterial resistance to cephalosporins occurs primarily through three mechanisms: (a) destruction of the antibiotic by β-lactamases; (b) decreased penetration due to changes in bacterial outer membrane composition; and (c) alteration of penicillin-binding proteins (PBPs) resulting in interference with β-lactam binding. The latter pathway is especially important, as the binding of β-lactams to PBPs is essential for inhibiting peptidoglycan biosynthesis (peptidoglycan is a required bacterial cell-wall component). Certain gram-positive bacteria such as methicillin-resistant Staphylococcus aureus ("MRSA") and various genus Enterococcus bacteria are highly resistant to beta-lactam antibiotics. The resistance of MRSA is due to the presence of a PBP called PBP2a, which binds very poorly to β-lactam antibiotics. The options for treating infection caused by MRSA are limited and there is a need for new antibiotics with activity against these strains.
In recent years, a novel family of β-lactam antibiotics, the carbacephems (1), has been sporadically touted as having promise against MRSAs and other resistant species. In compound (1), R1 and R2 are variously described as a wide range of aromatic and heteroaromatic entities. R3 has generally been reported as an optionally substituted alkyl group. For example,
in Ternansky, et al., J. Med. Chem., 1993, 1971, compounds of general structure (1), in which R1 is 2-amino-4-thiazolyl, R3 is 2-fluoroethyl and R2 is alternately 1,3,4-thiadiazol-2-yl(2), 6-nitrobenzothiazol-2-yl (3) or pyridino[3,4-d]thiazol-2-yl(4), are disclosed.

The problem with the above compounds and, presumably, the carbacephems in general, is that researchers investigating the family have been unable to achieve an acceptable balance between MRSA potency and serum protein binding. That is, MRSA activity was demonstrated relatively early on to correlate with lipophilicity; the more lipophilic the carbacephem, the greater its potency. Unfortunately, the greater the lipophilicity of the compound, the greater is its tendency toward high protein binding. Such binding is undesirable because it reduces the compound's bioavailability. In compounds (2), (3) and (4), for example, the peripheral fluoroethyl group was likely used in an attempt to circumvent the problem by affording some lipophilicity to the compound as a whole while maintaining a lower level of lipophilicity in the core molecule. The effort appears to have been unsuccessful since compound (2) exhibited a good MIC (2 μg/mL) but poor serum binding (>99.2%), compound (3) exhibited a fair MIC (4 μg/mL) but also showed poor serum binding (99.6%) and compound (4) exhibited excellent low, 36%, serum binding but an extremely poor MIC (64 μg/mL).
Despite the above, the carbacephems remain an intriguing approach to dealing with MRSA and other resistant bacterial species. What is needed, however, is a class of carbacephems that achieves the requisite balance of MRSA potency and protein binding. The present invention provides such a class of compounds.

Abstract: wherein the compounds are useful for the treatment of bacterial infections, in particular those caused by methicillin-resistant Staphylococcus spp.


A drag reduction arrangement for the body of an athlete moving through a fluid medium, comprises a device attachable to the athlete's body for delaying the onset of boundary layer separation at a trailing surface thereof The device preferably comprises an array of vortex generators. As a result, form drag is reduced by an amount which is substantially greater than any increase in skin friction due to the presence of the vortices.

This invention relates to a drag reduction arrangement for the body of an athlete moving through a fluid medium.
Many athletic sports inherently involve the athlete moving his body through a fluid medium, usually air or water. Typically, such sports are swimming, cycling, skiing, and speed skating.
The drag on these athletes can be broken down into three main sub types, namely wave drag, skin friction drag, and form drag.
Wave drag results when a body moves on the surface of a fluid producing a wake (only the swimmer when on the surface of the water encounters this type of drag).
Skin friction drag results from the viscosity of the fluid and is applicable to all of the sports listed above. Fluid in contact with the surface of a body in motion decelerates to zero velocity with respect to the body. The difference in velocity this creates between the free stream flow and the skin of the body results in a finite shear region called a boundary layer. This boundary layer grows in thickness as it progresses from the front of the body to the back. In addition, the boundary layer may progress through two different states depending on flow conditions. In the laminar state, the flow is smooth and the skin friction drag is low. In the turbulent state, a laminar boundary layer may `transition` to a turbulent one under the right conditions. This results in higher skin friction.
Form drag occurs if boundary layer flow encounters an adverse pressure gradient, i.e., a region where the flow decelerates. The flow separates from the body resulting in the formation of large Eddies creating a low pressure region aft of the body. This can result in a dramatic increase in drag over a flow which remains attached. Unfortunately, laminar boundary layers, which have the lowest drag are also the most susceptible to separation.
With respect to the sports listed above, drag reduction efforts to date have largely concentrated on reducing skin friction drag. For example, it has been proposed to delay the development or reduce the intensity of a turbulent boundary layer by smoothing the body surface and employing streamwise riblets. Such a measure, however, has the effect of hastening boundary layer separation. A typical example of such a method is described in U.S. Pat. No. 5,033,116.
An alternative method involves covering the surface with a lubricant which is shed in the flow thereby reducing the net shear stress at the body surface.
However, since humans are not streamlined, surprisingly reducing the skin friction drag may actually increase the overall drag because delaying transition to a turbulent boundary layer or decreasing the intensity of the turbulent layer may induce earlier separation when the flow encounters an adverse pressure gradient, such as occurs in the vicinity of a curved surface. This effect may dramatically increase form drag, more than offsetting any gains from reduced skin friction.
In fact, a major source of drag in many racing sports results from flow separation at curved surfaces on the athlete's body, such as at the athlete's posterior, arms or back of the head. This is known as form drag. Specifically the sports which are most affected by this type of drag include any sport in which the athlete's torso is aligned with the direction of motion.
Classically, form drag is reduced by altering the shape of the object in the flow to more closely approximate a streamline shape. This is often not practical in the case of a human being. When practical, such methods are generally outlawed by the applicable sports governing body. For example, fairings are generally illegal in almost all sanctioned cycling races. Consequently, any method which reduces drag must also be subtle in order to avoid prohibition.
An object of the invention is to reduce the overall drag on an athlete moving through a fluid medium.

Wearable article for athlete with vortex generators to reduce form drag


An analog-to-digital converter error detector suitable for single-chip control loop applications employs a single comparator determining the difference between an initial input voltage and a reference voltage in one or more conversion iterations, with the difference reduced in nonlinear steps during each conversion iteration based on the ratio between sampling and discharge capacitances. The number of conversion iterations required to reduce the initial input voltage to below the reference voltage is counted as representing the difference, with output codes representing the conversion iteration count having a step size increasing with the count value and selected to reduce downstream processing.

In control systems such as switching power supplies, servo loops, and robotic controllers, error detection is always the first step before the control loop can execute any other function. Error detection determines the magnitude of necessary error correction, if any, and typically may be taken either from the output of a simple voltage comparator or an analog-to-digital converter (ADC). In the case of the analog-to-digital converter, the output is generally filtered by a downstream digital signal processor (DSP) before applying error correction.
In single-chip controller applications where cost and power are major design concerns, the analog-to-digital converter and the digital signal processor must have a simple architecture and an efficient coding scheme so that the downstream digital signal processor may be optimized for size and power. However, conventional analog-to-digital converter and digital signal processor architectures generally do not offer such a solution.
There is, therefore, a need in the art for a simple architecture analog-to-digital converter with output coding simplifying downstream digital filter design.

Analog-to-digital converters for control loop applications