A system for maintaining routing tables at each router in a computer network. The system is based on (a) a feasibility condition that provides multiple loop-free paths through a computer network and that minimizes the amount of synchronization among routers necessary for the correct operation of a routing algorithm, and (b) a method that manages the set of successors during the time it synchronizes its routing-table update activity with other routers, in order to efficiently compute multiple loop-free paths, including the shortest path, through a computer network.

In a computer network or internetwork, there is a problem of physically routing message traffic (data packets) between nodes and providing the shortest path between any two nodes. A computer network is formed of three or more nodes connected by links. Each node may be a general-purpose computer or a specialized device, such as a router or switch. A link is a communication path that connects two or more nodes with one another. An internetwork is formed of multiple computer networks interconnected by nodes, each node may be a general-purpose computer or a specialized device, such as a router. Each link has a length (or cost) associated with it. A bidirectional link has a length in each of its two directions. A broadcast link has a single cost. A network path also has a single length or cost associated with it. Once a shortest path is provided, the number of nodes or the length of a link in the network may change so that a new shortest path must be found. Because providing a shortest path uses computer resources, and because routing traffic inefficiently wastes network resources, it is important to quickly and accurately find each shortest path.
Data packets may, for example, be routed from an end station in one network to an end station in another network. The devices that route the data packets (routers) map the address of a destination network or end station into either a path or the next router (or successor) along the path to the destination. To accomplish their function, routers need to implement a routing protocol, which supports two main functions: route computation and data packet forwarding.
Three types of approaches exist in the prior art for providing a shortest path. The first type is the link-state approach (also called a topology-broadcast approach), wherein a node must know the entire network topology. Each router uses this information to compute the shortest path and successor router (or next hop) in the path to each destination. The node broadcasts update messages to every node in the network or internetwork. Each node originates update messages containing the cost of the links adjacent to that node and forwards updates received from other nodes, taking care to ensure that the same update is not forwarded more than once. Well known examples of the link-state approach are the new ARPANET routing protocol and the OSPF (Open Shortest Path First) protocol. A primary disadvantage of the link-state approach is that the maintenance of an up-to-date version of the entire network topology at every node may constitute excessive storage and communication overhead in a large network. Another disadvantage is that the path computations required by the link-state approach are computationally expensive. A third disadvantage is that the shortest perceived path may contain loops, which lengthen a path and cause data packers to visit the same node multiple times. The existence of loops, even temporarily, is a detriment to overall performance of a computer network.
The distance-vector approach requires that a router knows only the distances to its own destinations and to those destinations reported by other nodes, together with some additional information that varies depending on the particular protocol. The router maintains the length of the shortest path from each of its adjacent nodes to every destination node and the next node in that shortest path. The node sends update message, containing (as a minimum) distance to other nodes, to only its adjacent nodes. Well known examples of the distance vector approaches are RIP (Routing Information Protocol), RIPv2 (RIP version 2), BGP (Border Gateway Routing Protocol), and Cisco's proprietary EIGRP (Enhanced Interior Gateway Routing Protocol).
RIP and RIPv2 use variants of the distributed Bellman-Ford (DBF) algorithm for shortest-path computation. The main disadvantages of protocols based on DBF are the creation of routing loops and the possibility of counting to infinity. A node counts to infinity when it increments its distance to a destination node, until a predefined maximum value is reached. A number of attempts have been made to solve the counting to infinity and looping problems by increasing the amount of information exchanged among nodes or by making nodes disregard link changes for a predefined period of time before updating their routing tables. None of these approaches, however, has been successful.
BGP includes the complete path to a destination in a routing-table update. Because nodes can determine if they are part of a path reported by a neighbor node to a destination, they avoid long-term loops and counting to infinity.
A patent illustrative of the distance vector approach is U.S. Pat. No. 4,466,060 to Riddle. The Riddle patent disclosed an adaptive distributed message routing algorithm where each node transmits different information to its adjacent nodes. The transmitted routing information arranges the nodes of the network in a hierarchical fashion that takes on the graphical form of a tree structure with the transmitting node at the root of the tree and the remaining nodes stemming from the root. A similar approach to the Riddle patent is used by Garcia-Luna-Aceves and Murthy in "path finding algorithms" (J. J. Garcia-Luna-Aceves and S. Murthy, "A Path-Finding Algorithm for Loop-Free Routing," IEEE/ACM Transactions on Networking, February 1997) as well as others (e.g., P. Humblet, "Another Adaptive Shortest-Path Algorithm", IEEE Transactions on Communications, Vol.39, No.6, June 1991, pp. 995-1003; B. Rajagopalan and M. Faiman, "A Responsive Distributed Shortest-Path Routing Algorithm within Autonomous Systems," Internetworking: Research and Experience, Vol.2, No.1, March 1991, pp. 51-69). In this type of distance-vector algorithms, a node communicates to its neighbors its shortest path routing tree by incrementally sending the distance and second-to-last hop node identifier to each destination. These algorithms eliminate counting to infinity, and the loop-free path finding algorithm by Garcia-Luna-Aceves and Murthy eliminates routing loops as well.
EIGRP eliminates counting to infinity and looping using the Diffusing Update Algorithm (DUAL) (J. J. Garcia-Luna-Aceves, "Loop-Free Routing Using Diffusing Computations," IEEE/ACM Transactions on Networking, Vol. 1, No. 1, February 1993). DUAL selects routes to be inserted into a routing table based on feasible successors. A successor is a neighboring router used for packet forwarding that has a least-cost path to a destination that is guaranteed not to be part of a routing loop. From router i's standpoint, a feasible successor toward destination j is a neighbor router k that satisfies a feasibility condition that is based on values such as the router's own distance and its neighbor's distance to the destination.
The three feasibility conditions in the prior art are the DIC (Distance Increase Condition) and the CSC (Current Successor Condition) and the SNC (Source Node Condition). The DIC can be summarized as follows: If a node i detects a decrease in either
1. the length of a link to one of its adjacent neighbors or PA1 2. the distance from an adjacent node to a destination node PA1 1. the length of a link to one of its adjacent neighbors or PA1 2. the distance from an adjacent node to a destination node PA1 1. the length of a link to one of its adjacent neighbors or PA1 2. the distance from an adjacent node to a destination node
then node i can choose any adjacent neighbor as the new successor node en route to the destination node, provided that the sum of the length from node i to the adjacent neighbor and the length from the adjacent neighbor to the destination node is less than or equal to the smallest assigned length from node i to the destination node.
The CSC can be summarized as: If a node i detects a change in either
then node i can choose any adjacent neighbor as the new successor node en route to the destination node, provided that the length from the new adjacent neighbor to the destination node is less than or equal to the smallest assigned length from the original adjacent neighbor to the destination node.
The SNC can be summarized as: If a node i detects a change in either
then node i can chose any new adjacent neighbor as long as the length from the adjacent neighbor to the destination node is less than the feasible distance from node i to the destination. The feasible distance is the minimum of all of the distances to the destination that node i has reported since the last time node i either initialized itself or began its participation in a diffusing computation.
When the feasibility condition is met, node i can carry out a local computation to determine a new path independently of other nodes, thus saving computational resources. It is important to realize, however, that the feasibility conditions DIC, CSC, and SNC are not always met. When a feasibility condition is not met at a node i, node i must perform a diffusing computation, wherein node i must coordinate with other nodes to find a new shortest path. The SNC can be met easier than the DIC or CSC, for example, and thus the SNC allows for fewer diffusing computations than these other feasibility conditions. Therefore, because it is important to meet a feasibility condition as often as possible to save computational resources, there has been a need to develop feasibility conditions that can be more easily satisfied in order to avoid diffusing computations as much as possible.
As mentioned above, diffusing computations require larger amounts of computer resources than local computations. One prior art system supports multiple diffusing computations concurrently by maintaining bit vectors at each node. The bit vectors specify, for each adjacent node and for each destination node, the number of correspondences which were originated by and the number of correspondences which must be answered by the node maintaining the bit vector. The problem with this system is that the bit vectors can become exceedingly large in a large network, thus consuming large amounts of computational resources. Another prior art system eliminates these bit vectors by requiring a node to `freeze` a designated successor as long as the node is part of the diffusing computation (i.e., while a diffusing computation proceeds for a particular destination, each node participating in the diffusing computation for that destination must keep the same next hop for that destination). In addition, a node is only allowed to participate in one diffusing computation at a time for each destination. A state machine is used to process messages that arrive at a node while the node participates in a diffusing computation, and determines if a new diffusing computation is necessary after the previous one terminates. This prior art system classifies routing messages as updates, queries, and replies. Queries and replies are used for coordinating diffusing computations. In all of the prior art systems based on diffusing computations and feasibility conditions, the feasibility conditions are based on the current value of link costs and of distances reported by neighbors, and a node raises its feasible distance only when it starts or joins a diffusing computation.
Thus, even though diffusing computations of the prior art may provide correct results, they are inefficient. Because of this inefficiency, there has been a need in the prior art to develop new approaches to diffusing computations which are able to conserve computational and communication resources. In addition, while prior art systems based on feasibility conditions can provide multipath routing in the absence of diffusing computations, these systems can provide only a single successor during the course of a diffusing computation, and must wait until the diffusing computation terminates before providing a better path. The result of this constraint is that even if a better path to the destination is becomes available, that path cannot be used until the diffusing computation terminates.
The third approach to routing in computer networks and internetworks is the approach based on link vector algorithms (J. J. Garcia-Luna-Aceves and J. Behrens, "Distributed, Scalable Routing based on Vectors of Link States," IEEE Journal on Selected Areas in Communications, Vol 13, No. 8, October 1995). The basic idea of LVA consists of asking each node to report to its neighbors the characteristics of each of the links it uses to reach a destination through one or more preferred paths, and to report to its neighbors which links it has erased from its preferred paths. Using this information, each router constructs a source graph consisting of all the links it uses in the preferred paths to each destination. LVA ensures that the link-state information maintained at each router corresponds to the link constituency of the preferred paths used by routers in the network or internet. Each router runs a local algorithm or multiple algorithms on its topology table to compute its source graph with the preferred paths to each destination. Such algorithms can be any type of algorithm (e.g., shortest path, maximum-capacity path, policy path) and the only requirements for correct operation are for all routers to use the same algorithm to compute the same type of preferred paths, and that routers report all the links used in all preferred paths obtained. The disadvantage of LVA is that it may allow temporary routing loops to occur in the network or internetwork.

System for maintaining multiple loop free paths between source node and destination node in computer network


The present invention provides a sheet processing apparatus, such as a finisher or sorter, for implementing predetermined processing such as alignment and stapling on an inserted sheet material (i.e. any sheet-form recording medium such as recording paper, transfer paper, or an OHP sheet), and an image forming apparatus comprising the sheet processing apparatus. The sheet processing apparatus comprises a rear end fence horizontal portion that contacts the end portion of the sheet member on the upstream side of a sheet member conveyance direction during alignment of the sheet member, a rear end fence vertical portion for supporting the other parts of the sheet member, and a staple unit for stapling the sheet member. The stapling direction in which a staple is punched by a stapler of the staple unit is set to be parallel to the rear end fence horizontal portion that contacts the rear end portion of the sheet member.

1. Field of the Invention
The present invention relates to a sheet processing apparatus, such as a finisher or sorter, for implementing predetermined processing such as alignment and stapling on an inserted sheet material (i.e. any sheet-form recording medium such as recording paper, transfer paper, or an OHP sheet), and an image forming apparatus comprising the sheet processing apparatus.
2. Description of the Background Art
To perform a stapling operation or folding operation on a sheet member such as sheets of paper conveyed from an image forming apparatus, the sheets of paper must be aligned, and even when a user collates the sheet members, the sheet members are preferably aligned. Hence, a sheet aligning apparatus for aligning the sheet members is typically provided in a sheet processing apparatus positioned on the downstream side of the image forming apparatus. In Japanese Patent Publication No. 2,783,326 (Prior Art 1), Japanese Patent Publication No. 2,783,327 (Prior Art 2), Japanese Patent Publication No. 3,617,926 (Prior Art 3), and Japanese Patent Publication No. 3,655,407 (Prior Art 4), for example, a sheet aligning apparatus, or more particularly a rear end fence for performing an alignment operation in a sheet conveyance direction, is annexed to a staple tray for stapling the sheets, and after being aligned, the sheets are stapled and transmitted to a discharge tray. Hence, the sheet processing apparatus is provided with two trays, i.e. the staple tray and the discharge tray.
Japanese Examined Patent Application Publication H8-9451 (Prior Art 5) discloses a sheet post-processing apparatus comprising discharging means for discharging a sheet, a first tray for supporting a part of the sheet discharged by the discharging means on the upstream side of a sheet discharge direction, a second tray capable of movement in a vertical direction, for supporting a downstream side part of the sheet that is supported by the first tray at the upstream side part thereof, stapling means for stapling the sheet that is supported by the first tray at the upstream side part thereof, and moving means for moving the stapled sheet to the second tray. The first and second trays are inclined such that an upstream side part thereof is low, and thus the sheet that is discharged by the discharging means is aligned while moving along the incline in the direction of the stapling means. It is also disclosed in Prior Art 5 that the discharging means discharge the sheet such that the sheet straddles the first tray and second tray in both a stapling mode and a non-stapling mode.
Japanese Patent Publication No. 3,284,782 (Prior Art 6) discloses a paper post-processing apparatus for implementing post-processing such as stapling or hole-punching on sheets of paper discharged from an image forming unit, comprising a single compiling tray having at least a paper collecting paddle and a paper aligning plate for aligning the sheets of paper discharged from the image forming unit, a paper post-processing machine disposed at a rear end portion of the compiling tray, a loading tray on which the sheets of paper discharged from the compiling tray are loaded, and a set discharge roller for discharging the sheets of paper (a set) that have been aligned on the compiling tray to the loading tray. One end of the sheets of paper on the compiling tray contact the loading tray, and the sheets of paper discharged from the image forming unit are discharged to the loading tray as a set via the compiling tray regardless of whether or not post-processing has been performed by the paper post-processing machine.
In the background art described in Prior Art 1 to Prior Art 4, a staple tray unit is provided as a dedicated structural member for performing a stapling operation, and therefore a structure provided for the purpose of stapling must be used even when the sheets are simply to be aligned. Moreover, there is no specific description of the shape or angle of incline of the staple tray unit for aligning the sheet member, and judging by the attached drawings, the staple tray unit is constituted by a non-vertical planar member having an appropriate incline. The staple tray is not used at all in modes where sheet alignment is not performed, and at these times becomes a useless structure.
Furthermore, when the sheet member is laid substantially horizontally and an alignment operation is performed thereon, the sheet member does not move under its own weight, and therefore a sheet member moving member such as a return roller must be provided. As a result, the number of structural members for ensuring that the sheet member moves increases. In turn, this leads to increases in the number of components, the structural complexity, the weight of the machine, operating noise, and cost.
Moreover, the sheet member may be disturbed by machine vibration or the like after being aligned initially by the sheet member moving member. To prevent the aligned sheet member from being disturbed again by machine vibration or the like, a member for holding the sheet member may be added, but this also leads to corresponding increases in the number of components, the structural complexity, the weight of the machine, and the cost of the machine. In addition, since a large sheet member is laid substantially horizontally in a similar manner, the size of the machine also increases.
Further, when performing stapling processing using the stapling means, if the staple is not punched in a substantially perpendicular direction to the aligned sheet member, the staple may buckle, leading to a decrease in stapling quality or a stapling defect. When the stapling means are rotated in a substantially vertical plane for the purpose of oblique stapling, the diagonally rotated stapling means attempt, under their own weight, to return to a parallel stapling condition, making it impossible to maintain a stable attitude. Hence, during oblique stapling, the staple cannot be held at a fixed angle of incline, leading to a decrease in stapling quality.
In the background art of Prior Art 5, the sheet member straddles the first tray and second tray and is loaded at an incline such that the conveyance upstream side thereof is low. However, the sheets are discharged so as to straddle the first tray and second tray in both the stapling mode and the non-stapling mode, which is disadvantageous in terms of space conservation.
According to the background art of Prior Art 6, one end of the paper on the compiling tray contacts the loading tray. However, there is no description of the positional relationship, for example the angle and so on, between the trays, and although the machine is small in size, space must be provided for the trays on the conveyance upstream side, which is disadvantageous in terms of space conservation.
Japanese Unexamined Patent Application Publication 2004-42326 (Prior Art 7) discloses a paper processing apparatus in which a stitcher portion having a staple housing portion and an extrusion portion and a clincher portion for bending the tip ends of the staple are constituted separately, for stapling a plurality of sheets of paper existing between the two stapler members using staples. The paper processing apparatus comprises first and second moving pedestals for moving the stitcher portion and clincher portion in parallel synchronously in a direction intersecting a paper conveyance direction, first driving means for driving the first and second moving pedestals, first and second rotating pedestals supported on the same axis as, and so as to be capable of rotating relative to, the first and second moving pedestals, respectively, second driving means for rotating the first and second rotating pedestals synchronously, and control means for executing parallel stapling or oblique stapling in a desired position on the basis of a difference in the amount or speed at which the moving pedestals and rotating pedestals are moved by the first driving means and second driving means. When moving to a subsequent stapling operation after executing parallel stapling or oblique stapling, the control means execute the stapling operation by moving the stitcher portion and clincher portion to a position which is closer to a stapling position than a home position thereof, this position being preset to ensure that paper conveyance is not impeded, and by moving the stitcher portion and clincher portion from this position in a single direction relative to the stapling position at all times.
Japanese Unexamined Patent Application Publication H11-180628 (Prior Art 8) discloses a sheet post-processing apparatus in which an image-formed sheet discharged from an image forming apparatus is discharged to a discharge tray by discharging means after being stapled. In this sheet post-processing apparatus, a pair of staplers for stapling image-formed sheets of various sizes can be driven by a single drive source and thereby moved in parallel and rotated. Stapling processing is performed on sheets of various small sizes by moving the staplers in parallel in a width direction orthogonal to a sheet conveyance direction, while stapling processing is performed on sheets of various large sizes by parallel-moving and rotating the staplers.
As described above, Prior Art 7 discloses an invention in which movement and rotation in the paper width direction are performed using separate drive sources. When a sheet member stapling mode includes two stapling modes, i.e. a so-called parallel stapling mode in which the staple is punched parallel to an end portion of the sheet member and an oblique stapling mode in which the staple is punched diagonally, the stapling mode is executed by driving a driving apparatus for parallel-moving a stapler provided for parallel stapling and a driving apparatus for diagonally rotating a stapler provided for oblique stapling individually. When two dedicated driving apparatuses (drive sources) are provided in this manner, the number of components increases, leading to increases in the cost and weight of the machine.
In the invention described in Prior Art 8, a single drive source is provided, but the two staplers move along a rail and are rotated using a cam mechanism. Since only one drive source is provided, a reduction in cost can be achieved in comparison with the invention described in Prior Art 7i, but the movement range thereof is restricted, and hence the stapling position is limited. Moreover, the central portion of the paper cannot be stapled, and hence in certain cases, it may be impossible to respond to the needs of the user.
Technologies relating to the present invention are also disclosed in, e.g. Japanese Unexamined Patent Application Publication H09-136760, Japanese Unexamined Patent Application Publication H09-208116, Japanese Unexamined Patent Application Publication H10-152259, Japanese Unexamined Patent Application Publication H10-194575, Japanese Unexamined Patent Application Publication H10-120284, Japanese Unexamined Patent Application Publication H11-240665, Japanese Unexamined Patent Application Publication 2000-185868, Japanese Unexamined Patent Application Publication 2000-136067, Japanese Unexamined Patent Application Publication 2001-031323, Japanese Unexamined Patent Application Publication 2002-234665, Japanese Patent Publication No. 3,273,351, and Japanese Patent Publication No. 3,247,826.

Sheet processing apparatus and image forming apparatus comprising same


A mixer has a controllable load, a signal mixing module, and a controller. The controllable load is controlled by a control signal to change an equivalent load value thereof. The signal mixing module has an output port coupled to the controllable load and an input port coupled to an input signal, and is used for mixing the input signal with a local oscillation signal. The controller is coupled to the controllable load, and is used for generating the control signal to reduce the equivalent load value of the controllable load during switching transients of the local oscillation signal.

The present invention relates to mixing an input signal with a local oscillating signal, and more particularly, to a mixer having a controllable load with reduced equivalent load value during switching transients of a local oscillating signal.
Wireless communication devices are widely used in a variety of fields. In general, each wireless communication has a transmitter for converting user data into RF signals for data transmission and a receiver for converting received RF signals into user data for data reception. In either of the transmitter and the receiver, a mixer plays an important role in transmitting/receiving the RF signal. Regarding the transmitter, the mixer mixes the input signal, either a baseband signal or an intermediate frequency signal, with a local oscillating (LO) signal to produce the RF signal to be transmitted. Regarding the receiver, the mixer mixes the RF signal received by an antenna with the local oscillating signal to produce either a baseband signal or an intermediate frequency signal.
More specifically, a CMOS-based mixer design is often employed to implement mixers inside the transmitter and the receiver of a wireless communication device. One problem known for CMOS-based mixers is the undesired low-frequency flicker noise originated from the noisy transistors and presented at the mixer output as interference, which degrades the mixer performance greatly. Some conventional solutions have been developed and applied to CMOS-based mixers, especially active mixers, to alleviate or eliminate the interference caused by flicker noise mixed with the local oscillating signal during switching transients of the local oscillating signal, i.e., at or around the zero-crossing of the local oscillating signal. For example, dynamic current injecting, dynamic current quenching, or dynamic current switching is applied to typical active mixers to block DC current from passing through transistors switched by local oscillating signal during the switching transients. However, additional circuit components added to the typical active mixer will induce static or dynamic DC offset current flowing to the transistors switched by local oscillating signal, resulting in LO leakage at the transmitter and second-order intercept point (IP2) at the receiver. Removing these unpredictable DC offsets is difficult, even though a predetermined calibration mechanism is employed. Furthermore, aforementioned dynamic current injecting/quenching/switching technique is applicable to active mixers only. In other words, regarding the passive mixers having no DC current, the conventional dynamic current injecting/quenching/switching technique fails.

Mixer having controllable load with reduced equivalent load value during switching transients of local oscillating signal


An image sensor and a method of manufacturing the same are provided. A metal wiring layer is formed on a semiconductor substrate including a circuit region, and first conductive layers are formed on the metal layer separated by a pixel isolation layer. An intrinsic layer is formed on the first conductive layers, and a second conductive layer is formed on the intrinsic layer.

In general, an image sensor is a semiconductor device for converting optical images into electrical signals, and is mainly classified as a charge coupled device (CCD) or a Complementary Metal Oxide Semiconductor (CMOS) image sensor.
CCD image sensors utilize a complicated driving scheme, consume large amounts of power, and require a multi-step photo process. This leads to the disadvantage of a complicated manufacturing process. CMOS image sensors have been looked to recently for overcoming the disadvantages of a CCD.
A CMOS image sensor sequentially detects electrical signals of pixels in a switching scheme by forming photodiodes and MOS transistors in unit pixels.
A CMOS image sensor utilizes a simpler driving scheme than the CCD image sensor. It is also capable of implementing a variety of scanning schemes and integrates signal processing in a single chip so that miniaturizing a product is possible. A CMOS image sensor uses CMOS technology so that manufacturing cost and power consumption are low.
A CMOS image sensor according to the related art has a substrate divided into a photodiode region for receiving a light signal and converting the light signal into an electrical signal, and a transistor region for processing the electrical signal.
A typical CMOS image sensor has a structure such that the photodiode and the transistor are horizontally arranged on the semiconductor substrate.
While the horizontal-type CMOS image sensor improves upon some of the disadvantages of the CCD image sensor, problems still exist in the horizontal-type image sensor.
According to the horizontal-type image sensor, the photodiode and the transistor are formed to be horizontally adjacent to each other on a substrate. Thus, the photodiode cannot encompass the entire area of a pixel region of the image sensor, leading to a reduced fill factor or limited resolution.
In addition, with a horizontal-type image sensor of the related art, it is very difficult to achieve optimization for a process simultaneously manufacturing the photodiode and the transistor. In particular, a shallow junction is required for a low sheet resistance in a rapid transistor process, but the shallow junction may not be appropriate for the photodiode.
Furthermore, according to the horizontal-type CMOS image sensor of the related art, additional on-chip functions are added to the image sensor so that the sizes of unit pixels are increased or reduced in order to maintain the sensitivity of the image sensor. When the size of the unit pixel is increased, the resolution of the horizontal-type CMOS image sensor decreases. In addition, when the area of the photodiode is decreased, the sensitivity of the horizontal-type CMOS image sensor decreases. Thus, there exists a need in the art for a CMOS image sensor and fabricating method with an improved fill factor.

Image sensor and method for manufacturing the same


The present disclosure relates to a display substrate, a method for preparing the same, and a display device. The display substrate of the present disclosure includes a base substrate, a pixel definition layer located on the base substrate, and a first pixel and a second pixel that are adjacent to each other and defined by the pixel definition layer, in which a spacer function layer for blocking hole transport between adjacent pixels is arranged at at least a part of a contact interface between the second hole transport layer in the second pixel and the light function layer in the first pixel. By providing the spacer function layer, the present disclosure effectively prevents the migration of holes between the hole transport layers of adjacent pixels or between the hole transport layer and the light emitting layer, thereby avoiding accompanying light emission between adjacent pixels.

An active matrix organic electroluminescent device (AM-OLED) is a new generation of display devices with a promising application prospect. OLED is a self-luminous device, in which an array of pixels is composed of three primary colors RGB. An active matrix organic electroluminescent device usually includes a substrate, an anode, an hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, and a cathode that are arranged in sequence. The light emitting principle of AM-OLED devices is shown as follows. When being driven by voltage, electrons are injected from a cathode into an electron transport layer, and then migrate to the light emitting layer through the electron transport layer; holes are injected from the anode to the transport layer, and then also migrate to the light emitting layer through the electron transport layer; and electrons and holes meet in the light emitting layer and form excitons, which excite light emitting molecules to emit visible light.

Display substrate and method for preparing the same, and display device

CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.


Disclosed herein is a fluid conductivity sensor that can be used to obtain in-vivo measurements of conductivity of biological fluid samples, for example, to determine osmolarity. The conductivity sensor can be disposed on a substrate that is at least partially embedded within a polymeric material of a body-mountable device. The conductivity sensor can include a frame having a trench formed therein that defines a fluid sample cell. First and second electrodes can be formed on sidewalls of the trench, such that the first and second electrodes are on opposite sides of the fluid sample cell. A controller in the body-mountable device can operate the sensor by applying a voltage to the electrodes and measuring a current through a fluid occupying the fluid sample cell. The body-mountable device may indicate the current measurements wirelessly using an antenna.

Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
The eye is coated by a layer of tear film secreted by the lacrimal gland and distributed over the eye by motion of the eyelids. The tear film layer serves a number of biological functions including to lubricate and protect the corneal surface (epithelium). Dry eye disease, or ocular surface dryness is characterized by irritation of the epithelium and associated discomfort. The condition can be due in part to low aqueous tear flow and/or excess tear fluid evaporation, which results in tear fluid with a relatively elevated solute concentration (i.e., hyperosmolarity). Hyperosmolarity may also be due in part to irregularities in various physiological osmo-regulation and compensatory mechanisms responsible for tear fluid homeostasis. In any event, the increased concentration of solutes in the tear fluid causes irritation of the epithelium, which then leads to compensatory reactions in the eye (e.g., immunological inflammation) due to the epithelial damage.


An apparatus includes a first seedlayer including a hexagonal close-packed alloy with a sigma phase addition, and an active layer including a plurality of quantum dots on the first seedlayer. The apparatus can further include a substrate, an adhesion layer on the substrate, and a wetting layer on the adhesion layer, wherein the first seedlayer is on the wetting layer.

This invention relates to devices including quantum dot structures, and methods for fabricating such devices.
Quantum dot semiconductors are presently difficult and costly to fabricate using conventional thin film processing techniques. Known solution chemistry methods of synthesizing quantum dots are poor in terms of controlling crystal orientation and are not well-suited for creating dense multi-component films. Typical vacuum deposition techniques involve careful preparation of strained-layer interfaces between a substrate and film to induce island growth of epilayers and generally require uneconomical methodologies such as molecular beam epitaxy (MBE).

Thin film template for fabrication of two-dimensional quantum dot structures


A system and method for controlling blisters. The method begins by mixing the ingredients to form a dough with a moisture content between about 35% and 60%. The dough is sheeted and cut. Thereafter, the dough is pre-heated to reduce the moisture content to between about 10% and about 45%. The preforms are then docked and dehydrated. The docking system, in one embodiment, has a backing plate and a docking device with at least two docking pins of varying lengths. The docking device is adjustable relative to the backing plate. The system also has a removing plate which removes preforms from the docking pins.

Technical Field
The present invention relates to a system and method for controlling blistering.
Description of Related Art
Upon frying or baking of fabricated snack products, the moisture within the dough is converted to steam causing the pieces to expand. The steam accumulates between the outer surfaces of the dough pieces during frying or baking. The outer surfaces of the snack piece lose moisture faster than the center of the piece, due to more rapid heat transfer at the surface when frying or baking. When the surface dries sufficiently, it forms a skin which prevents the steam from escaping. The trapped steam causes the sides of the dough piece to separate, or delaminate, forming a hollow void. This phenomenon is referred to as "pillowing" or "blistering." Often such blisters detract from the appearance of the snack and can break, causing holes in the product. Consequently, it desirable to achieve a method and system for controlling blistering.

System and apparatus for controlling blistering


A frequency detection circuit according to the present invention has a status holding register for storing rise information and fall information about a check target clock and outputting an error detection signal showing frequency abnormality when information showing the next edge (a fall or a rise) from a rise or a fall of the check target clock is not stored, a rise/fall detection circuit for respectively detecting a rise and a fall of the check target clock and outputting a rise detection signal in response to the rise and a fall detection signal in response to the fall, a sampling clock generation circuit for generating sampling clock for storing the information about the check target clock, and an edge detection signal generation circuit for outputting an edge detection signal which is an edge detection result of the check target clock based on the rise detection signal and the fall detection signal.

1. Field of the Invention
The present invention relates to a frequency detection circuit which detects whether or not the frequency of a clock signal is lower than a predetermined frequency. This circuit outputs an error detection signal when the clock signal frequency is lower than the predetermined frequency. The present invention further relates to a data processing apparatus provided with such frequency detection circuit.
2. Description of the Prior Art
A data processing apparatus such as a microcomputer operates in synchronism with a clock signal, and this may malfunction when the frequency of the clock greatly deviates. Thus, such a frequency detection circuit as detecting whether or not the frequency of the clock is lower than a predetermined value is provided. The detection output is used to reset the operation of a CPU. The circuit having such function is disclosed in, for example, a Japanese laid-open Patent Publication 2002-55130.
The frequency detection circuit described in the publication, includes a capacitor C and a resistor R. The capacitor C is subjected to charging and discharging every time when the level of a clock changes. An error detection signal is outputted when the charge or discharge is not completed within one cycle of the clock.
However, the conventional frequency detection circuit uses the capacitor C and the resistor R, so that there is a problem that detection characteristics vary in accordance to a power supply voltage, an ambient temperature, variations in manufacture, etc. It is thus difficult to accurately determine whether or not a clock frequency is lower than a predetermined value.
Also, characteristics of analog elements constructing the data processing apparatus described above vary in accordance with use conditions such as an ambient temperature after shipment, so that there was a problem that detection characteristics of the frequency detection circuit vary.
Particularly, in the conventional data processing apparatus described above, there was a problem that when a frequency of a clock is lower than a predetermined frequency (that is, the predetermined frequency in which the data processing apparatus does not malfunction), its frequency abnormality cannot be detected.

Frequency detection circuit and data processing apparatus


A spindle motor includes a stator structure and a rotor structure coupled to the stator structure. The stator structure has a stator base, a magnetic conductive structure surrounding the stator base, and a first buffer structure provided in the gap defined by the stator base and the magnetic conductive structure and in contact with both the stator base and the magnetic conductive structure. Furthermore, a second buffer structure and a third buffer structure are respectively provided between the stator base and the casing and between the stator base and the base plate.

1. Field of the Invention
The present invention relates to a spindle motor and stator structure thereof and, more particularly, to a spindle motor and stator structure thereof having reduced vibrations and noises during operation.
2. Description of the Related Art
Referring to FIG. 1, a conventional spindle motor 100 includes a rotor 102 and a stator 104 riveted on a base 110. The stator 104 consists of silicon steel sheets 106 and a stator base 108, which are riveted together.
However, when the spindle motor 100 runs, the silicon steel sheets 106 is liable to vibrate due to the attraction of the rotor 102. In that case, since no damping mechanism is incorporated in the stator structure 104 of the conventional spindle motor 100, such vibrations are transmitted to the base 110 through the stator base 108. Further, because the silicon steel sheets 106, the stator base 108, and the base 110 are riveted together, there must be gaps existing among them. Under the circumstance, the gaps can further enhance the vibrations of the silicon steel sheets 106, the stator base 108, and the base 110, and thus the noises made by the spindle motor 100 are considerably increased as a result.

Spindle motor and stator structure thereof


Groups of network devices may be identified automatically based on interface tags associated with network device interfaces such that network devices within a group are automatically identified, periodically or otherwise, based on an association of one or more common interface tags between the group and the network device interface.

LAN administrators and network engineers sometimes need to obtain metrics for devices in their network, particularly with respect to network traffic input and output by one or more network devices. If obtainable, these performance metrics serve several purposes. For example, they may be useful in evaluating internal network performance and distribution of network traffic, enabling reconfiguration and optimization of network resources. They also may be useful in monitoring traffic communicated between the network devices and external devices or services, enabling evaluation of (1) internal network resource utilization and (2) external resource and service utilization by network devices.
In various applications, such as those described above, it often is desirable to obtain performance metrics for a collection or group of network devices, which may or may not be physically proximate or otherwise grouped. For instance, to determine external device/service utilization by internal network devices, it may be necessary to obtain aggregate metrics for the logical grouping of network devices interfacing with and utilizing an external device/service. Similarly, to determine network resource utilization by an external device/service, it may be necessary to obtain aggregate metrics for network devices used to make available the network resource.
Independent lists may be manually established and maintained to enable grouping of devices or interfaces from which data is sought. However, because these lists are manually maintained, they often become incomplete or outdated.

This patent is subject to a terminal disclaimer.

Generating metrics for networked devices


The nonaqueous electrolyte energy storage device according to an aspect of the present invention includes a negative electrode including graphite and graphitizable carbon, in which a ratio of a mass of the graphitizable carbon to a total mass of the graphite and the graphitizable carbon is less than 26% by mass, and a median diameter of the graphitizable carbon is smaller than a median diameter of the graphite.

Nonaqueous electrolyte secondary batteries typified by lithium ion secondary batteries have been widely used in electronic devices such as personal computers and communication terminals, automobiles and the like in terms of high energy density. The nonaqueous electrolyte secondary battery generally has a pair of electrodes electrically isolated by a separator and a nonaqueous electrolyte interposed between the electrodes, and is charged and discharged by transferring ions between both of the electrodes. In addition, capacitors such as lithium ion capacitors and electric double layer capacitors are widely used as nonaqueous electrolyte energy storage devices other than nonaqueous electrolyte secondary batteries.
A positive electrode and a negative electrode of such a nonaqueous electrolyte energy storage device contain an active material that occludes and releases lithium ions and the like. As the negative active material, carbon materials such as graphite are widely used. For example, a lithium secondary battery including the negative electrode in which graphite and amorphous carbon are used in combination with the negative active material has been proposed (refer to Patent Document 1).

Nonaqueous electrolyte energy storage device


A damage amount determination device, which is used for an image forming device that forms an image on paper, includes an information acquisition unit that acquires information related to whiteness of the paper used for printing and a damage amount determination unit that determines an amount of damage, which is caused by the paper to a predetermined component of the image forming device when the paper passes through the predetermined component, based on the information related to the whiteness.

Field of the Invention
The present invention relates to a damage amount determination device, an image forming device, a computer-readable recording medium storing a damage amount determination program, and a damage amount determination method, more specifically, to a damage amount determination device, an image forming device, a computer-readable recording medium storing a damage amount determination program, and a damage amount determination method, which determine an amount of damage caused by paper to a predetermined component of an image forming device.
Description of the Related Art
In general, high-quality paper is used as a print medium of an image forming device. Bleached pulp is used for the high-quality paper. Therefore, in the high-quality paper, the addition amount of white filler that increases the whiteness is small.
By the way, the use of recycled paper as a print medium increases year by year due to the heightened awareness of the environmental problems in recent years. To enhance environmental protection and use of waste paper, moves such as raising the blending ratio of the waste paper in the recycled paper and reviewing the whiteness of paper are becoming active.
In the standard for goods qualified by Green Purchasing Law and the accreditation criteria of Eco Mark, the whiteness of paper is prescribed as an item of criteria. For example, for the recycled paper, ISO whiteness is set to about 70% which is lower than a normal ISO whiteness of 80%. According to the recycled paper having an ISO whiteness of about 70% (hereinafter simply referred to as recycled paper), it is possible to reduce burden on both the environment and the quality. Specifically, according to the recycled paper, it is possible to maintain the quality by pursuing the ISO whiteness to the extent not to cause any problem in use. Further, it is possible to reduce the environmental burden due to a bleaching process because of reduction of the white filler and it is also possible to reduce the environmental burden by using the waste paper.
On the other hand, in recent years, chances to use paper imported from abroad (hereinafter referred to imported paper) are increasing. To obtain whiteness and opacity, more white filler is added to such imported paper than that added to the high-quality paper and the recycled paper.
The three types of paper as described above cause different amounts of damage to consumables such an intermediate transfer belt and a fixing roller when the paper passes through the consumables in an image forming device. More specifically, for example, calcium carbonate is used as the white filler. The particle size of the calcium carbonate is large, and the particle is hard and has sharp points. Therefore, when the paper passes through the consumables of the image forming device, if the paper is pressed against the consumables, the white filler causes damage to the consumables. Therefore, the imported paper containing a relatively large amount of white filler causes an amount of damage to the consumables, which is greater than the amount of damage caused by the high-quality paper and the recycled paper.
However, a conventional image forming device manages the lifetimes of consumables by the number of printed sheets of paper and does not manage the lifetimes of consumables by considering the types of printed sheets of paper. Therefore, the lifetimes of the consumables are set based on paper that causes a relatively large amount of damage. Thus, when many sheets of paper that causes a relatively small amount of damage, such as the high-quality paper and the recycled paper, are printed, there is a risk that the image forming device determines that a lifetime of a consumable is ended and prompts to replace the consumable even though the lifetime of the consumable is not actually ended. Therefore, it is desired that the image forming device identifies the type of paper, determines the amount of damage according to the type of paper, and accurately manages the lifetimes of consumables.
As a method of identifying the type of paper, for example, there is a method of checking the amount of paper powder generated when conveying the paper. More specifically, a relatively small amount of paper powder is generated when conveying the high quality paper and the recycled paper. On the other hand, a relatively large amount of paper powder is generated when conveying the imported paper. Therefore, it can be considered to identify the type of paper by checking the amount of paper powder generated from the paper when conveying the paper. As an invention for checking the amount of paper powder generated from paper when conveying the paper, for example, an electrophotographic printing device described in JP 2009-20370 A is known.

Damage amount determination device, image forming device, computer-readable recording medium storing damage amount determination program, and damage amount determination method


An apparatus includes a delay producing system that receives a parent electromagnetic pulse and outputs two spatially-overlapped children electromagnetic pulses having a relative and adjustable time delay between each other; a fluorescence producing device placed in a path of the children electromagnetic pulses; a guidance system that is in the path of the children pulses and is positioned between the delay producing system and the fluorescence producing device to guide the children pulses to the fluorescence producing device; a detector that receives fluorescence produced at the fluorescence producing device, where the fluorescence travels at least partly through the guidance system before reaching the detector; and a data system that receives the value of the time delay and the output of the detector and determines the electromagnetic pulse duration based on the value of the time delay and the output of the detector.

The durations (that is, the widths) of pulses produced from mode-locked lasers can be as short as a few femtoseconds. The response times of the fastest electronic circuits are thousands of times longer than the duration of these pulses and therefore electronic techniques are not used to directly measure pulse durations. One of the shortest events available for measurement purposes is the pulse itself and this can therefore be the basis of optical autocorrelation techniques used for ultrashort pulse measurement.
In the most common autocorrelator arrangement, an input pulse (that is, a parent pulse), passes into a Michelson interferometer, which first splits the parent pulse into two child pulses, which are substantially identical in shape, amplitude, and phase, that is, are coherent. The two child pulses then travel along separate paths in the interferometer, one path being of variable length by use of a reflecting arm with a variable position. The two child pulses exit the interferometer overlapped spatially but with a relative temporal delay equivalent to the difference in path lengths travelled by each respective identical child pulse.
A two-wave mixing process, such as second-harmonic generation, is used to obtain a mixing signal between the two child pulses. By studying how the mixing signal varies in response to changes in path length, a correlation signal, containing information about the amplitude and phase of the parent pulse can be obtained from which its duration can be determined.


An illumination system for use in a unit magnification optical projection system (such as a Half-Field Dyson system) is provided. In a Half-Field Dyson system, a reticle and a wafer are parallel to each other with a window being provided on the reticle to allow for projection of the reticle pattern onto the wafer. The present invention provides uniform bright illumination over the reticle pattern with little or no spill over through the reticle window.

The present invention relates to a projection system for printing circuit patterns on photoresist coated wafers in semiconductor microlithography. It relates in particular to a class of projection system wherein a photoresist coated silicon wafer is covered with circuit patterns by sequentially exposing different areas of the wafer. Such a system is generally referred to as a step-and-repeat exposure system or simply a stepper.
The present invention relates more particularly to an illumination system for a unit magnification optical projection system for use in microlithography such as described in U.S. Pat. No. 4,964,705 which is assigned to the same assignee as the present invention, and the details of which are hereby incorporated by reference.
That unit magnification projection system is a unit magnification, achromatic, anastigmatic, optical projection system that uses both reflective and refractive elements in a complementary fashion, i.e., a catadioptric optical system, to achieve large field sizes and high numerical apertures. In that system the reticle and wafer are parallel with a window being provided on the reticle adjacent to the patterned area to allow for the projection of the reticle (mask) pattern through the reticle window onto the wafer. The unit magnification system is referred to as a Half-Field Dyson system for reasons which will be explained in detail in the present specification.
To use such a system in a stepper for semiconductor fabrication an accompanying illumination system is required. The above referenced unit magnification system employs a reflective reticle as opposed to transmissive reticles of prior art projection systems. As such, light may not be introduced into the projection system through the reticle. The light is preferably introduced into the system through an optical element of the projection system such that a well defined, uniformly illuminated area may be imaged on to the reflective reticle.
Desirably, the illumination system provides a uniform patch of illumination over the reticle pattern area with no spill over through the adjacent reticle window onto the wafer.
In view of the foregoing, there is a need for an improved illumination system for use with a unit magnification optical projection system.

Illumination system for Half-Field Dyson stepper


A portable communications device, e.g., a cell phone with a simplified user interface and easy to use keys is described. The user interface supports book type and circular type applications. Book interface type applications are applications in which a user is stopped from moving beyond the last page when a next page operation is selected. In circular applications a user is allowed to move from the last page of an application to the first page of the application by selecting a next page option. Regardless of the application type, in response to a displayed page a user, in some embodiments, is presented with at most 4 options. This allows navigation between applications, pages and selection of actions corresponding to pages to be supported using relatively few keys, e.g., 4 keys, thereby allowing the number of keys on the phone to be kept small and the key size large.

The usefulness of a device, and whether or not a device gets used at all, often depends on the complexity of the device's user interface and the ability of a user to easily determine how to control the device.
Individuals who intend to use an electronic device frequently and require advanced functionality may be willing to spend the time reading detailed instructions and learning how to take advantage of the power provided by a relatively complex user interface with a large number of input keys. However, for less demanding users, a lower complexity relatively intuitive interface would be desirable.
One group of users who tend to resist complex user interfaces are senior citizens. Such individuals may have difficulty operating small keys due to physical constraints including poor eyesight and/or physical dexterity. In addition, in the case of devices they do not intend to use frequently, they may be reluctant to spend significant amounts of time studying instruction manuals to learn how to use such devices.
For personal safety, security and other reasons, many family members are now encouraging senior citizens to keep a cellular telephone with them so that they can call for help in the event of an emergency. Unfortunately, existing feature laden cell phones are generally optimized for young individuals who are heavy cell phone/instant messaging users. Such users are generally willing to take the time to learn to navigate a relatively complex user interface to obtain the benefit of the specific features they seek. In the case of high use users, it is often wasteful and distracting to prompt the user as part of the process of offering them various features which they can execute. Such frequent users tend to become familiar with menu options and excessive prompting with yes/no type questions can become more of an annoyance than a help.
In addition to their tendency to use cell phones much more frequently then elderly individuals, young individuals rarely suffer the dexterity and eyesight problems of older users.
In view of the above discussion, it should be apparent that relatively low complexity user interfaces which are intuitive by nature can be highly desirable in particular applications, e.g., electronic device applications intended for senior citizens. In the case of senior citizens, it would be desirable if the number of keys required on a portable device could be limited so that they could be kept relatively large in size thereby making them easier to identify and operate than smaller keys placed on a keypad which includes a large number of keys. For applications intended for senior citizens, it can be desirable that a user interface simulate a process or flow similar to that found in many non-electronic applications with which a senior citizen may be familiar, e.g., a paper book or directory.
Conventional cell phones with their relatively small input keys, large number of input keys, and relatively complicated menus leave much to be desired from the perspective of many senior citizens.
Accordingly, in addition to improvements in simplified user interfaces generally, it would be highly desirable if some user interface improvements, e.g., in terms of reducing the overall complexity and number of input keys used, could be applied to cell phones to make them easier for senior citizens to use, e.g., in the case of emergencies or to obtain basic cell phone device functions/features.

Simplified intuitive cell phone user interface


A method of communicating bit-oriented data over an Aircraft Communications Addressing and Reporting System (ACARS) character-oriented data link comprises splitting the bit-oriented data into a plurality of segments; calculating a plurality of intermediate values corresponding to each segment; mapping each intermediate value to an ACARS character; and transmitting the ACARS characters over the ACARS data link.

Character-oriented protocols (also known as byte-oriented protocols) group information or control codes into full bytes (8 bits). One exemplary character-oriented protocol is the American Standard Code for Information Interchange (ASCII) character encoding. An ASCII character set defines characters in terms of byte information. For example, the byte "0100 0001" represents the character "A". Various communication systems use character-oriented protocols. One exemplary system which uses a character-oriented protocol is the Aircraft Communications Addressing and Reporting System (ACARS) used in aircraft air-to-ground communications. In ACARS, a set of ASCII characters can be transmitted over the system as defined in the Aeronautical Radio, Incorporated (ARINC) 618-6 Air/Ground Character-Oriented Protocol Specification.
In contrast to character-oriented protocols, bit-oriented protocols use a stream of individual bits to transfer information or control codes without grouping the bits into bytes. Bit-oriented protocols are typically less overhead-intensive than character-oriented protocols. Due to the lower overhead and/or other factors, many systems use bit-oriented protocols. For example, many line replaceable units (LRUs) used in an aircraft system communicate with one another using a bit-oriented protocol. In order for binary data from a bit-oriented protocol to be transferred over a character-oriented protocol, such as ACARS, a protocol conversion is needed. Conventional techniques for converting from a bit-oriented to a character-oriented protocol double the size of transmission data. In particular, the techniques described in the ARINC 622-4 ATS Data Link Applications over ACARS Air-Ground Network specification convert every 4 bits of the bit-oriented data to an 8 bit (1 byte) character. Although enabling the transmission of bit-oriented data over a character-oriented protocol, the increase in file size also increases the transmission time and the cost associated with ACARS transmissions since airlines typically pay for transmission of data over ACARS according to the number of bits sent.

System and method for transferring bit-oriented data over an ACARS character-oriented data link


A perpendicular magnetic recording head comprises a write pole having a pole tip adjacent to an air bearing surface, a return pole, a pedestal for magnetically coupling the write pole to the return pole, a coil for inducing magnetic flux in the write pole, and a shield for coupling magnetic flux from the coil to the return pole. Disc drives that include such recording heads are also provided.

The expectation in the hard disc drive industry is that areal density will increase at compound annual growth rate (CAGR) of >60% and an annual increase in data rate of greater than 40% for the foreseeable future. To reduce media noise and provide a sharper transition for longitudinal recording systems, a higher coercivity and lower magnetic thickness (Mrt) media is preferred. The magnetic thickness is the product of media's remnant magnetic moment (Mr) and its physical thickness (t). As a result of reducing the Mrt of the media, which reduces the media grain volume, the media may switch its magnetization due to thermal excitation (the super-paramagnetic effect). Further, demagnetization fields are higher at higher linear density. This higher demagnetization field makes the onset of the super-paramagnetic effect even faster by decreasing the energy barrier between the two states of magnetization for the grains.
Perpendicular recording offers an advantage because the transition width is defined by the gradient of the head field, which should be intrinsically larger than the gradient for a corresponding longitudinal head. Because of near perfect orientation of the perpendicular media, and the fact that the demagnetization field stabilizes transitions when they are brought closer together, perpendicular media can provide lower media noise. Further, perpendicular media is relatively thick compared to longitudinal media, which should improve the thermal stability. In principle, perpendicular recording can offer a gain factor of 4 to 5 over longitudinal recording for the same criteria of thermal stability and signal-to-noise ratio (SNR).
Perpendicular recording heads include a write pole and a return pole which are coupled by a yoke or pedestal. Electric current in a coil positioned around the yoke or pedestal creates a magnetic field in the poles that is used to affect the magnetization of an associated magnetic storage medium. In conventional perpendicular heads there is a significant magnetic field under the return pole. The field under the return pole has to be minimized so that it is significantly below the nucleation field (Hn) of the media to avoid corrupting data on neighboring tracks. The field under the return pole will effectively lower the energy barrier between the two magnetic states, requiring a higher thermal stability factor to avoid possible corruption of data.
By increasing the thickness of the return pole, the field under the return pole can be reduced. However, there is still a large field at the trailing end of the return pole. In addition, a thicker return pole will deteriorate the high frequency performance for the writer. Eddy currents generated in thicker films will limit the high frequency performance of the writer.
Thus there is a need for a perpendicular magnetic recording head that has a reduced field under the return pole and minimal eddy current losses.

Perpendicular magnetic recording head having a reduced field under the return pole and minimal eddy current losses


Method and apparatus for providing clean air to an environment. Incoming air, which may be contaminated with chemical, nuclear or biological contamination is initially cooled and water is removed from the cooled air by a first cooler, a first water separator, a second cooler and a second water separator. The cooled air is passed through a regenerative pressure swing absorption system which removes the contaminants. The resulting, cleaned, air is expanded by an expander. The expanded, cleaned air is provided to the environment, after being used in the second cooler to clean the incoming air.

Military platforms and installations must be able to operate effectively when under attack or threat of attack by NBC weapons. To ensure that operating efficiency is maintained, collective protection is normally provided by creating a clean positive pressure environment within the enclosed occupied space with filtered air. Under such conditions personnel can continue to operate without the encumbrance of protective gloves and respirators which greatly reduce operating effectiveness.
Traditionally, environmental life support systems have been based upon activated charcoal filters for gas filtration, cooling being by vapour cycle refrigeration. Although providing a high level of protection, activated charcoal filters are not regenerative and must be discarded and replaced following a chemical attack. The effective life of the filters is dependent on the concentration and nature of the challenge but may only be a few hours with some chemicals.
This severely limits the effective operation of a platform when chemical weapons are deployed against them and creates high operational costs due to the logistics chain required to provide a regular supply of new filters and also the concomitant removal and disposal of contaminated filters.
More recently systems have been developed based upon regenerative filtration in place of the non-reusable activated carbon elements.
A number of proposals have been made to provide systems utilising pressure swing adsorption (PSA) systems developed by PALL Corporation.
Pressure swing adsorption systems use beds filled with a sorbent material which adsorbs gases under pressure and desorbs gases once the pressure is removed. The system has two beds, one on-line and fed with contaminated air under pressure from which contaminants are removed. At the same time, the other depressurised off-line bed is regenerating by purging with clean air. On completion of the cycle, the role of each bed is reversed, the operation being controlled by an automatic sequence timer to provide continuous uninterrupted service. Industrial PSA systems have been shown to operate for many years without degradation of performance or air quality. PSA systems developed by PALL Corporation have been shown to be efficient in removing a very wide range of chemical agents.
A number of proposals for environmental life support systems using PSA have appeared, as a consequence, in the patent literature.
U.S. Pat. No. 4,732,579, Veltman et al assigned to FMC Corporation, the disclosures of which are incorporated herein, proposes a system and method for providing a continuous supply of clean air at a desired temperature to the crew members of a combat vehicle. The contaminated air is said to be initially compressed by energy received from the exhaust gases from a combustion power unit of the vehicle, the initially compressed air being cooled to increase its density and then compressed and cooled a second time before being passed through a pressure swing adsorbent system. Air from the PSA system is expanded and changed in temperature to provide clean air to personnel within the vehicle. Energy released from the air during expansion is used to compress the air in the secondary compressor. The off line PSA bed is purged with clean air from the on line bed which is expanded through an orifice to lower its pressure.
U.S. Pat. No. 4,769,051, Defranceso assigned to United Technologies Corporation, the disclosures of which are incorporated herein, discloses an air conditioning system powered by a supply of compressed air. The compressed air passes to an air cycle machine having a compressor, a turbine and a load heat exchanger. Air from the compressor is communicated to the turbine which expands and cools the air before passing it to the load heat exchanger. A PSA system cleans air as it passes from the compressor to the turbine before expansion. Purge air for the PSA system is derived from the clean air exiting the load heat exchanger after first passing it through a regenerative heat exchanger which takes heat from the air as it passes from the compressor to the PSA system before passing on to the turbine.
U.S. Pat. No. 5,213,593, White et al assigned to PALL Corporation, the disclosures of which are incorporated herein, proposes a PSA system which has first and second sorbing chambers, each of which includes first and second openings defining a gas flow path between them and a sorbent bed disposed in the gas flow path and having a sorption inlet region near the first opening, and a heater positioned near the sorption inlet region. The heaters are operated from an external energy source. A valve arrangement interconnects an intake, an exhaust and the first openings of the first and second sorbing chambers and interconnects an outlet with the second openings of the first and second sorbing chambers. Gas is directed through one sorbing chamber to the outlet. At the same time a portion of the outlet gas is directed through the other sorbing chamber to the exhaust. Energy from the external energy source is coupled to the heater of the other sorbing chamber to heat the sorption inlet region of the other sorbing chamber as the outlet gas flows through the sorption inlet region. The controller is adapted to cycle between the first and second sorbing chambers according to a NEMA cycle length of less than about five minutes. One sorbent bed adsorbs at least a portion of contaminant from the gas and is heated by the heat of adsorption and the other sorbent bed is regenerated using both the energy supplied by the heater and the heat of adsorption.
A problem with previously proposed PSA systems is the high energy requirement for the compression of the contaminated air required to achieve the pressures required for the PSA beds. This energy requirement has been a constraint on the commercialisation of PSA systems. Commonly owned earlier U.S. Pat. No. 6,099,617, Bennett, the disclosures of which are incorporated herein, discloses a method of providing clean air at a desired temperature to an environment which is more energy efficient than prior systems by using heat derived from the step of compressing the incoming air elsewhere in the system. The method comprises compressing incoming air possibly contaminated with nuclear, biological and chemical contaminants, cooling the compressed air in a first heat exchanger, compressing the cooled air from the first heat exchanger in a secondary compressor, cooling the compressed air from the secondary compressor in a secondary heat exchanger, and directing the cooled air from the secondary heat exchanger through a regenerative pressure swing adsorption system for providing clean output air with the contaminants removed therefrom. The cleaned air is then expanded in a turbine coupled to the secondary compressor, thereby recovering energy from the cleaned air to drive the secondary compressor. The expanded cleaned air from the turbine is used to condition air in the environment and to purge the regenerative pressure swing adsorption system. The purging air is warmed before being passed to the regenerative pressure swing adsorption system by heat derived from the step of compressing incoming air, for example by heat exchange with cleaned air exiting the regenerative pressure swing adsorption system, to pass purging air to the regenerative pressure swing adsorption system at the optimum temperature for efficient operation thereof.
Whilst the system described in our earlier US Patent makes use of waste energy within the system, and therefore improves the efficiency of the system, the overall life support system is still considered energy inefficient.

Air environment control system and technique


A void or space filling assembly designed to be used in combination with a chair structure of the type having a reclining backrest and normally found in airplane or ground travel vehicles as well as other permanent locations where such chair structures are desirable. The assembly includes a resilient, flexible material bladder which is expandable, upon being at least partially filled with fluid. The bladder is located on the chair structure adjacent the junction between the backrest and seat portion thereof and is specifically disposed and dimensioned to extend in filling and/or covering relation to any spacing or void normally existing at the junction of the backrest and seat portion when the backrest is disposed into its reclined position. The disposition of the bladder in this space filling position will allow for the seat portion, bladder and backrest to collectively define a substantially continuous support surface on which persons can comfortably recline and thereby avoid the discomfort of any significant voids or spaces in the reclining surface.

1. Field of the Invention
The present invention relates to a filling assembly designed for use in combination with a seat or chair structure having a seat cushion and a backrest, wherein the backrest is adjustably movable between an upright position and any one of a plurality of reclined positions. More specifically, the assembly of the present invention is structured to fill the void that is created when the backrest of the seat or chair structure is oriented in a completely reclined or substantially horizontal position on a level approximately equal to that of the seat cushion.
2. Description of the Related Art
The existence of chair or seat structures which recline is well recognized, particularly in the travel industry. Typically, such chair structures include upholstered, cushioned seat portion, on which an individual sits, and an attached backrest portion, which supports the back region or area of the individual seated within the chair. The backrest portion is specifically structured to be selectively positionable between a completely upright or normal position and an at least partially reclined or angularly oriented position relative to the cushioned seat portion. In addition, reclining chair structures exist wherein the backrest portion is capable of being oriented in a completely reclined position, relative to the seat portion, such that it is substantially horizontally positioned on approximately the same level as the cushioned seat portion. Chair structures of this type are provided so that a person who is using the reclining chair structure may assume a completely reclined position, i.e., a substantially horizontal position, when desired, for sleeping, resting, etc.
Reclining seat structures of the type described above have been used for many years in both commercial aircraft and private aircraft, as well as on vehicles designed for land travel, such as buses, trains and certain modern day automobiles, vans and trucks. In recent years, however, there has been a tendency to upgrade the comfort and luxury of passengers who travel in such vehicles, especially in what is known as the first class section of airplanes, trains and the like. Chair structures capable of being completely reclined are obviously more desirable for extended trips such as when commercial aircraft or other multi-passenger aircraft travel long distances. While the chair structures which are completely reclined into a substantially horizontal support surface have been well accepted, there is at least one recognized area which detracts from the comfort of a person attempting to sleep or assume the completely reclined, horizontal position for relatively long periods of time. In particular, such chair structures provide a user with some discomfort in that there is typically, a space or void of significant dimension which exists or which is created between the cushion seat portion and the backrest portion at the junction where such ends are normally disposed in immediately adjacent relation to one another. When the backrest portion is disposed in a slight angular orientation or moderately reclined position, relative to the cushioned seat portion, the existence or presence of any type of void or spacing at the junction of the seat portion or backrest is not as pronounced and does not present a problem in terms of a passenger's comfort. However, in order to properly orient the backrest and seat portions in the fully reclined position, the dimension of the aforementioned spacing or void at the junction of the seat portion and backrest is significant and often results in some discomfort to the passenger, particularly if he or she remains fully reclined for a period of time.
Therefore, there is a recognized need in the construction and utilization of reclining seat structures, regardless of whether they are intended for vehicular use or for use in aircraft or indeed, in permanent building structures where completely reclining seat structures are desirable. In particular, there is a need in the art for a device which is directed to filling the void or space that exists at the junction between the cushioned seat portion and the backrest portion of a chair or seat structure that is disposed in a fully reclined position, and which would thereby significantly increase the comfort of the occupant.

Assembly for filling void between cushions of reclining seats


A method of fabricating a semiconductor structure, comprising the steps of: providing a monocrystalline semiconductor device region of a first conductivity type; forming a layer of intrinsic monocrystalline semiconductor material over the device region; forming a layer of insulating material over the layer of intrinsic monocrystalline semiconductor material; forming a conductive contact over a portion of the layer of insulating material; forming an aperture extending through the conductive contact, and the layers of insulating material and intrinsic monocrystalline semiconductor material to define an aperture exposing a selected portion of the layer of intrinsic monocrystalline semiconductor material; and forming a layer of semiconductor material of a second conductivity type including a monocrystalline portion disposed epitaxially over the device region portion and a polycrystalline portion extending onto the wall of the conductive contact within the aperture.

In the fabrication of vertical, high performance bipolar transistors, it is generally desirable to provide very shallow intrinsic base regions. Such shallow intrinsic base regions, preferably in the sub-micron dimension range, permit the fabrication of high-frequency transistors: i.e. having speeds in the gigahertz range.
The formation of the intrinsic base region in the transistors described above is typically accomplished by diffusion from a gaseous or solid diffusion source, or by ion implantation (I/I). Diffusion tends to be difficult to control, and may result in undesirably thick base regions. Ion implantation, while more controllable than diffusion, also has inherent limitations, for example implant damage and channeling effects. Particularly with respect to ion implantation of boron atoms, the thickness of the implanted region is limited by secondary channeling effects. Further, both diffusion and ion implantation are particularly difficult to utilize with transistors having shallow, heterojunction base regions: i.e. silicon-germanium (SiGe) base regions.
In U.S. Pat. No. 4,504,332 to Shinada, a layer of silicon is epitaxially deposited over a partially insulated substrate, so as to be single crystal in structure where it contacts the substrate, and polycrystalline in structure where it contacts the insulator. The base region is deposited into the single crystal region of the layer by ion implantation, while the emitter region is deposited into the base region by outdiffusion from a solid doping source. There is thus completed a bipolar transistor. Shinada, however, shows a relatively thick deposited layer, with relatively thick and uncontrolled base and emitter regions. The teachings of Shinada could not readily be used to provide narrow base, high-performance bipolar transistors of the type typically in use today.
A process of low temperature, ultra-high vacuum, chemical vapor deposition is known in the art for forming thin, discretely doped layers of epitaxial silicon (or heterojunction material such as SiGe). See Meyerson, B., "Low Temperature Silicon Epitaxy by Ultra-high Vacuum/Chemical Vapor Deposition," Appl. Phys. Lett. 48(12), 24 March 1986, pgs. 797-799. This process, also known as low temperature epitaxy (LTE), has been used to form various device regions, including, in certain limited configurations, the base regions of transistors. The process is advantageous for these purposes in that it provides relatively defect-free, thin layers. This same thinness of the layers, however, makes it difficult to provide high-yield, defect-free devices and structures. Such thin layers are prone to the propogation of dislocation defects, this propogation caused by high temperature processes, such as annealing. Heterogeneous layers of SiGe are especially prone to such defects, particularly if the Ge concentration is greater than 10%.
"Buried emitter," also known as "collector-up," bipolar transistor structures are known in the art wherein an emitter region is formed in or buried in a semiconductor substrate, while a collector region is formed at or over the top of the substrate. Among other recognized advantages, such devices tend to be highly immune to alpha particle and cosmic-ray induced disturbances.
U.S. Pat. No. 4,956,689 to Yuan et al. shows a collector-up, gallium arsenide, bipolar transistor wherein the emitter-base junction is defined within a bottom of a trench etched in a layered gallium arsenide structure. The base region is formed by implanting dopant into undoped portions of the layered gallium arsenide structure within the trench. The collector region is formed by growth of an epitaxial layer over the base region.
The structure of Yuan et al. is prone to the disadvantages of high collector-base capacitance, high extrinsic base resistance, and ion implantation defects within the base region.
A class of buried emitter devices well known in the art is that referred to as integrated injection logic (I2L). In I2L, a vertical NPN transistor is integrated with a lateral PNP transistor, such that the two transistors share common semiconductor regions. The vertical NPN is typically configured with a buried emitter. See, for example, U.S. Pat. No. 4,210,925 to Morcom et al.
With the art of semiconductor devices tending towards increased miniaturization and device density, it is highly desirable to provide compact, state-of-the-art transistor structures, and particularly those utilizing narrow base regions realizable by a repeatable, reliable process. It is further desirable if such structures and processes can accommodate buried emitter transistors, and the known advantages inherent therein.

Transistor structure utilizing a deposited epitaxial base region

International Business Machines Corporation


In a phase locked loop, a voltage controlled oscillator VCO is formed in a way known as such from a current controlled oscillator CCO (21), the actual control current (ICNTRL) of which is formed by a voltage-to-current amplifier (22). The input voltage of this amplifier is the loop filter's output voltage and it converts the output voltage into the oscillator's control current. When setting the oscillator at a desired medium frequency, the procedure according to the invention is such that a separate setting circuit is used for generating a basic current (IDA), which is led as control current to the oscillator (21) input. The magnitude of the basic current may be controlled in steps. When the desired oscillator frequency has been formed, the current supplied by the setting circuit is frozen at this value and the loop filter voltage is connected to affect the voltage-to-current amplifier, whereby the phase-locked loop will close.

In the field of communications there is a constant need for phase-locked loops (PLL) having different medium frequencies and bandwidths. In transmission networks, for example, the last data transmission functions are performed on network terminating units. The twin cable, which is several kilometers long and through which the network terminating unit transmits data to and receives data from the network, impairs the received signal. Since the network terminating unit takes its timing from the incoming signal, that is, it is synchronized and locked to the phase of the incoming data flow, a distorted incoming signal makes great demands on the clock signal regeneration block in the data receiver of the network terminating unit. The clock signal is more usually generated in a phase lock circuit, which generates a clock signal locked to a reference signal. On this principle, the data flow from the network functions as a reference signal. The phase lock circuit must be as immune as possible to any phase noise from the network, and any phase noise produced by itself must be as low as possible.
In its basic configuration the phase lock contains basic blocks according to FIG. 1: a voltage controlled oscillator VCO, a phase comparator and a low pass filter. A signal at reference frequency is brought to the first input of the phase comparator while the feedback oscillator output signal, which is also the output signal of the circuit, is brought to the second input. In several applications, such as frequency synthesizers, the feedback branch contains a loop divider with a division number which can be changed in a programmed fashion. Hereby the output signal frequency is divided before taking it to the phase comparator, whereby it is possible to form frequencies that are higher than the reference frequency but which are locked to this. The phase comparator detects the phase difference between the input signals and gives an output signal which is proportional to the phase difference and which is led to a low pass filter working as a loop filter. Its output voltage again is the control voltage of the voltage controlled oscillator. When the loop is balanced, the phase of the output-frequency signal is locked to the phase of the reference-frequency signal.
The phase lock must be such that, firstly, it preserves its balanced state and the output signal is not modulated despite any rapid variation, such as phase noise, contained in either input signal, and such that, secondly, the setting time is as short as possible when the output frequency is changed. Thus, great demands are made on the loop filter, even conflicting ones. When the loop is locked, the filter must have a low cut-off frequency, so that the output signal noise is seen as modulation in the output, while during setting, when the output frequency changes, the loop must have a high cut-off frequency for the setting time to be short. If the cut-off frequency of the loop filter can be changed by controlling, then the lock detector shown in FIG. 1 can be used for forming this control.
Several different connections may be used as oscillators proper. They may be directly voltage controlled or a current controlled connection with a voltage-to-current transducer in front very often forms the core. Suitable current controlled oscillators for use in a phase lock are, for example, ring oscillators, which are formed by connecting an odd number of either single-pole or differential inverters in a sequence, and a current controlled balanced relaxation oscillator. The latter in particular has a low gain and a narrow stable state band. These oscillators are current controlled and therefore a voltage-to-current transducer is required in front of them to convert the voltage from the loop filter into a control current.
Great demands are made on the voltage controlled oscillator in the PLL circuit of the network terminating unit. It must be
a) phase stable and have a low noise, PA1 b) the adjustment range must be wide and the gain high in a state of change, PA1 c) the gain should be low in a stable state, and PA1 d) the output frequency should be linearly dependent on the control voltage.
The costs of manufacture and assembly must also be low, and this is indeed a factor which limits the oscillator's complexity from an industrial aspect. These demands are partly conflicting: if the oscillator connection has a high gain, a wide adjustment range is achieved, but at the expense of noise, and correspondingly a low gain will produce a narrow adjustment range only. In a state of change a high gain is required for the locking to take place quickly, but in a balanced state a high gain will cause disturbing phase noise. A low gain improves phase stability and reduces any noise caused by a reference-frequency signal which has passed through the filter. So far no such oscillator has been presented which would meet all these requirements.
It is true that numerous phase lock circuits are available commercially, but most of these are dimensioned for a special application, such as radio and telecommunication etc., and thus for a certain band width. There is no such general purpose phase lock available which would be able to operate on a very wide band but which would still meet strict phase noise and band width requirements which are necessary in various fixed network applications.
Patent application EP-0495573, applicant National Semiconductor Corporation, USA, presents a ring oscillator connection made in a Complementary-Metal-Oxide-Semiconductor (CMOS) process. Since process variations in the microcircuit production bring about variations in the characteristics of P- and N-channels of transistors, the application suggests the use of a special compensating connection, which makes a voltage-to-current transducer give a very small compensating increase or reduction to the current before it is taken to work as control current for the oscillator. An increase or reduction produced by the compensating connection implemented with FET transistors maintains a frequency control range which is standard despite process variations, such as transistor threshold voltages, transconductance and source/drain capacitance. It also compensates for external variations, such as variations in temperature and in operating voltage.
Although this known connection does affect the output current of the voltage-to-current transducer before it is taken to work as the oscillator control current, it can not be used for implementing a general purpose voltage controlled oscillator with a frequency that may be chosen from a wide range, for example, from a range of 50 MHz . . . 150 MHz. To produce such a range the transducer output current ought to vary in a range of several milliamperes, while a loop filter output voltage varies within a typical range of 1.5 . . . 3.5 V. This would demand an enormous current gain from the transducer, which would result in an intolerable noise at the oscillator output.
The invention aims at a method of controlling a voltage controlled oscillator VCO intended for a phase lock circuit and at a control connection allowing the selection from a wide frequency range of a desired frequency as the oscillator's medium frequency while the frequency band in a stable state is still narrow and allowing in all conditions a low noise in the oscillator output signal despite the wide frequency range.

Circuits for producing control currents for a current controlled oscillator