The present invention is directed to a much safer and less expensive way of providing portable oxygen from a gas concentrator for patients who do not want to be tied to a stationary machine or restricted by present oxygen technology. In one preferred embodiment, the present invention splits off some of the excess capacity gas flow from a gas concentrator which is then stored via liquefaction. The stored gas can then be used as a portable supply. A portion of the oxygen gas flow generated by the oxygen concentrator is channeled to a condenser which receives and liquefies the oxygen gas using cryocooler. A storage dewar is used for storing the oxygen liquefied by the condenser. Liquid is then selectively transferred to a smaller portable dewar. A controller can be used for monitoring the parameters of liquefaction, including oxygen concentration, the amount of liquid oxygen in the dewar, and for controlling the parameters of liquid oxygen generation and transfer. In one embodiment, the flow rate into the condenser is chosen to exceed the capacity of the condenser to minimize the liquefaction of argon, nitrogen and trace gases, and to purge the system.

The field of this invention relates to using an oxygen concentrator to create a portable supply of supplementary oxygen for ambulatory respiratory patients so that they can lead normal and productive lives--as the typical primary oxygen sources are too bulky to carry or require excessive power to operate.
There is a burgeoning need for home and ambulatory oxygen. Supplemental oxygen is necessary for patients suffering from lung disorders; for example, pulmonary fibrosis, sarcoidosis, or occupational lung disease. For such patients, oxygen therapy is an increasingly beneficial, life-giving development. While not a cure for lung disease, supplemental oxygen increases blood oxygenation, which reverses hypoxemia. This therapy prevents long-term effects of oxygen deficiency on organ systems--in particular, the heart, brain and kidneys. Oxygen treatment is also prescribed for Chronic Obstructive Pulmonary Disease (COPD), which afflicts about 25 million people in the U.S., and for other ailments that weaken the respiratory system, such as heart disease and AIDS. Supplemental oxygen therapy is also prescribed for asthma and emphysema.
The normal prescription for COPD patients requires supplemental oxygen flow via nasal cannula or mask twenty four hours per day. The average patient prescription is two liters per minute of high concentration oxygen to increase the oxygen level of the total air inspired by the patient from the normal 21% to about 40%. While the average oxygen flow requirement is two liters per minute, the average oxygen concentrator has a capacity of four to six liters of oxygen per minute. This extra capacity is occasionally necessary for certain patients who have developed more severe problems but they are not generally able to leave the home (as ambulatory patients) and do not require a portable oxygen supply.
There are currently three modalities for supplemental medical oxygen: high pressure gas cylinders, cryogenic liquid in vacuum insulated containers or thermos bottles commonly called "dewars," and oxygen concentrators. Some patients require in-home oxygen only while others require in-home as well as ambulatory oxygen depending on their prescription. All three modalities are used for in-home use, although oxygen concentrators are preferred because they do not require dewar refilling or exchange of empty cylinders with full ones.
Only small high pressure gas bottles and small liquid dewars are portable enough to be used for ambulatory needs (outside the home). Either modality may be used for both in-home and ambulatory use or may be combined with an oxygen concentrator which would provide in-home use.
As we describe below, the above-described current methods and apparatus have proven cumbersome and unwieldy and there has been a long-felt need for improved means to supply the demand for portable/ambulatory oxygen.
For people who need to have oxygen but who need to operate away from an oxygen-generating or oxygen-storage source such as a stationary oxygen system (or even a portable system which cannot be easily carried), the two most prescribed options generally available to patients are: (a) to carry with them small cylinders typically in a wheeled stroller; and (b) to carry portable containers typically on a shoulder sling. Both these gaseous oxygen and liquid oxygen options have substantial drawbacks. But from a medical view, both have the ability to increase the productive life of a patient.
The major drawback of the gaseous oxygen option is that the small cylinders of gaseous oxygen can only provide gas for a short duration. Oxygen conserving devices that limit the flow of oxygen to the time of inhalation may be used. However, the conserving devices add to the cost of the service and providers have been reluctant to add it because there often is no health insurance reimbursement. Indeed, the insurance reimbursement for medical oxygen treatment appears to be shrinking.
Another drawback of the gaseous oxygen option is the source of or refill requirement for oxygen once the oxygen has been depleted from the cylinder. These small gas cylinders must be picked up and refilled by the home care provider at a specialized facility. This requires regular visits to a patient's home by a provider and a substantial investment in small cylinders for the provider because so many are left at the patient's home and refilling facility. Although it is technically possible to refill these cylinders in the patient's home using a commercial oxygen concentrator that extracts oxygen from the air, this task would typically require an on-site oxygen compressor to boost the output pressure of the concentrator to a high level in order to fill the cylinders. Additionally, attempting to compress the oxygen in pressurized canisters in the home is dangerous, especially for untrained people. This approach of course presents several safety concerns for in-home use. For example, in order to put enough of this gas in a portable container, it must typically be compressed to high pressure (.about.2000 psi). Compressing oxygen from 5 psi (the typical output of an oxygen concentrator) to 2000 psi will produce a large amount of heat. (Enough to raise the temperature 165.degree. C. per stage based on three adiabatic compression stages with intercooling.) This heat, combined with the oxygen which becomes more reactive at higher pressures, sets up a potential combustion hazard in the compressor in the patient's home. Thus, utilizing and storing a high pressure gas system in the patient's home is dangerous and not a practical solution.
The convenience and safety issues are not the only drawbacks of this compressed oxygen approach. Another drawback is that the compressors or pressure boosters needed are costly because they require special care and materials needed for high pressure oxygen compatibility. For example, a Rix Industries, Benicia, Calif., 1/3 hp unit costs about $10,000 while a Haskel International, Burbank, Calif., air-powered booster costs about $2200 in addition to requiring a compressed air supply to drive it. Litton Industries and others also make oxygen pressure boosters.
Turning now to the liquid oxygen storage option, its main drawback is that it requires a base reservoir--a stationary reservoir base unit about the size of a standard beer keg--which has to be refilled about once a week. The liquid oxygen can then be obtained from a base unit and transferred to portable dewars which can be used by ambulatory patients. Also, with the liquid oxygen option, there is substantial waste, as a certain amount of oxygen is lost during the transfer to the portable containers and from evaporation. It is estimated that 20% of the entire contents of the base cylinder will be lost in the course of two weeks because of losses in transfer and normal evaporation. These units will typically boil dry over a period of 30 to 60 days even if no oxygen is withdrawn.
There are other complications. Typically, supplemental oxygen is supplied to the patient by a home care provider, in exchange for which it receives a fixed monetary payment from insurance companies or Medicare regardless of the modality. Oxygen concentrators for use in the home are preferred and are the least expensive option for the home care provider. For outside the home use however, only small high pressure gas bottles and small liquid dewars are portable enough to be used for ambulatory needs. One of these two modalities may be used for both in-home and ambulatory use or may be combined with an oxygen concentrator which would provide in-home use. In either case, the home care provider must make costly weekly or biweekly trips to the patient's home to replenish the oxygen. One of the objects of this invention is to eliminate these costly "milk runs."
Portable oxygen concentrators are commercially available for providing patients with gaseous oxygen. These devices are "portable" solely in the sense that they can be carried to another point of use such as in an automobile or in an airplane. At present, there are no home oxygen concentrators commercially available that can provide liquid oxygen. One type of medical oxygen concentrator takes in air and passes it through a molecular sieve bed, operating on a pressure swing adsorption cycle, which strips most of the nitrogen out, producing a stream of .about.90% oxygen, for example, as shown in U.S. Pat. Nos. 4,826,510 and 4,971,609 (which are incorporated herein by reference). While, as set out in the Information Disclosure Statement, complex oxygen liquefaction systems have been disclosed for use by the military in jet aircraft, and while large-scale commercial plants have been disclosed, this technology has not yet found its way into the home to help individual patients and to benefit the general public. A truly portable oxygen concentrator has not yet been perfected and this event is unlikely, at least in the near future, because the power requirements are too large to be provided by a lightweight battery pack.
Since liquid oxygen requires periodic delivery and home oxygen concentrators are not commercially available that would create liquid oxygen, there has existed a long-felt need for a device or method having the capability to concentrate oxygen from the air, liquefy it, and transfer it into portable dewars in a home environment, and for a home oxygen concentrator unit which allows excess flow capacity from the concentrator to be stored by either compression or liquefaction for later use.

Methods and apparatus to generate liquid ambulatory oxygen from an oxygen concentrator


The invention provides a configuration capable of judging whether an ink jet head is exchanged or whether it is replaced, and changing an amount of recovery operation when the ink jet head is exchanged or replaced. Thus a recording apparatus capable of avoiding a defective ink supply in case the ink jet head is exchanged or replaced, and not wasting the ink by unnecessarily excessive recovery operation, can be provided.

1. Field of the Invention
The present invention relates to an ink jet recording apparatus capable of a high-quality recording, and more particularly to a recording apparatus having an exchangeable ink jet head and a recovery control method (maintenance method) therefor.
2. Related Background Art
An ink jet recording apparatus is widely employed in a printer, a copying apparatus and the like for reasons of e.g. a low noise, a low running cost and an easy compact formation of the apparatus. In such ink jet recording apparatus, foreign substances such as unnecessary ink droplets and paper dusts may be deposited in the vicinity of discharge ports by fine ink droplets generated in addition to a main ink droplet when ink is discharged or by rebound of the ink droplet landing on a recording medium. Such deposition of the foreign substances may result in a deviation of an ink discharging direction or a landing position, an ink discharge failure or a deterioration of the image quality.
As the ink jet recording apparatus is a system for converting input image data into an output image by way of a liquid constituting the ink, a maintenance technology for achieving satisfactory ink droplet discharge is a very important factor. In the following, there will be briefly described principal phenomena requiring the maintenance (recovery operation).                (a) In the course of recording of input image data, among plural discharge ports provided in an ink jet head, ink evaporates in a non-discharging discharge port, whereby the ink in the discharge port becomes viscous and cannot be discharged stably with an ordinary discharge energy, thereby resulting in a discharge failure;        (b) In the recording, the ink droplet discharged from a nozzle includes a main ink droplet and fine droplets (called mist), which are deposited around the ink discharge port of the ink jet head, thereby hindering straightness of the ink discharge; and        (c) In case a bubble is present in an ink reservoir in the ink jet head, a gas penetrating through a material constituting the ink jet head is taken into such bubble to cause a growth of the bubble, which is inflated at a temperature elevation in the printing operation, thereby hindering an ink supply from an ink tank and eventually resulting in a defective printing.
For solving such phenomena, following maintenance technologies are known.                (a) According to a time or an environment in which the ink discharge is not executed, a discharge of a predetermined amount is executed separately from the printing operation for forming an image on a recording medium, thereby discharging the viscosified ink (hereinafter this operation being called a preliminary discharge).        (b) A number of discharges of the ink droplet from the discharge port is counted, and, when the count exceeds a predetermined number, a surface of the ink jet head on which the discharge ports are formed (hereinafter such surface being called a face) is wiped with a rubber blade or the like to remove the deposited ink (hereinafter such operation being called a wiping).        (c) A recovery operation is executed by sucking the ink from the discharge port by a pump, thereby discharging the ink in the discharge port (hereinafter such operation being called suction recovery).
Also in an ink jet recording apparatus in which the ink jet head and the ink tank are mutually separable and the ink tank is exchangeable, the suction recovery is executed also after the exchanging of the ink tank.
Now, the wiping operation and the suction recovery operation will be explained briefly with reference to the accompanying drawings.
FIG. 1 explains the wiping operation. There are shown a rubber blade 1101 for wiping, a face 1102 to be wiped, an ink discharge port 1103, a deposited ink 1104 to hinder the discharge, and a wiping direction 1105. In the wiping, the rubber blade 1101 pressed to the ink jet head as illustrated is moved in a direction 1105 thereby bringing the deposited ink 1104 in contact with the blade and wiping it off from the face.
FIG. 2 is a view explaining the suction recovery. There are shown an ink jet head 1201, an ink discharge nozzle 1202, a face 1203, a suction cap 1204, an ink discharge tube 1205, and a suction pump 1206 for generating a negative pressure for sucking the ink. The suction recovery operation is executed by contacting or sealingly pressing a generally rubber suction cap 1204 to the face 1203 and rotating the suction pump 1206 in a direction indicated by an arrow 1207 to generate a negative pressure thereby sucking the ink in the ink jet head 1201 from the ink discharge port 1202 into the suction cap 1204 and discharging it through the ink discharge tube 5.
In the recent ink jet recording apparatus for which a higher image quality and a higher speed are required, kinds of loaded inks and number of the ink discharging ports are drastically increased in comparison with those in several years ago, and such maintenance technologies are becoming a large issue.
Also for a lower cost and a higher recording quality of the recording apparatus, there is proposed an ink jet head cartridge in which an ink jet head portion and an ink tank portion are constructed integrally and which is rendered exchangeable on the recording apparatus. In the ink jet head of such type, in case the user makes a selection among the plural ink jet head cartridges different in the types or colors of the inks for mounting on the recording apparatus, there is conceived a case where the main body of the recording apparatus and cartridge (type of ink in the ink jet head cartridge) cannot be matched and a maintenance suitable for the ink jet head cartridge (type of ink in the ink jet head cartridge) cannot be executed. It is therefore proposed to provide the ink jet head cartridge with a semiconductor memory storing characteristics of the ink jet head cartridge such as the type of the ink and the number of the discharge ports.
Also in the aforementioned exchangeable ink jet head, being integral with the ink tank, may show a deterioration in the characteristics of the ink jet head by a shock in transportation or an environmental change. Therefore, at an exchange to a new ink jet head, the recording apparatus has to execute a recovery operation for filling the ink jet head with the ink thereby refreshing the ink jet head.
Thus, in order to improve the operability at the exchange of the ink jet head and to achieve an optimum recording after the exchange of the ink jet head, Japanese Patent No. 3176343 (patent reference 1) describes a technology of executing a recovery operation of a larger amount for an ink jet head that has been judged as exchanged, than that for an ink jet that has been judged as not exchanged.
A method for detecting the ink jet head exchange described in the patent reference 1 reads a serial number attached to the ink jet head and judges that the ink jet head has not been exchanged in case the read serial number is same as a serial number read previously, and that ink jet head has been exchanged in case the read serial number is different from a serial number read previously (cf. FIG. 3). Also the recovery operation is so controlled that a recovery amount becomes larger in a case where the ink jet head is exchanged than in a case where the ink jet head is not exchanged (cf. FIG. 4).
On the other hand, in a recording apparatus of a configuration in which the ink tank and the ink jet head are separable and the ink tank has to be detached from the recording apparatus in case of detaching the ink jet head from the recording apparatus, since the ink tank also is detached at the detaching of the ink jet head, whereby a joint portion between the ink tank and the ink jet head is exposed to the air to cause an evaporation of the ink from such joint portion, and there is concerned a defective ink supply at the joint portion between the ink tank and the ink jet head in a mounted state. Also in case the detached ink jet head is handled improperly or roughly, there may be caused an ink leakage from the joint portion or from the nozzles, thereby leading to a defective ink supply in the joint portion or in the ink jet head.
Thus, in case the ink jet head is detached and mounted without the exchange of the ink jet head, a suction recovery is necessary in order not to cause a defective ink supply. However, in case the ink jet head is not exchanged but merely detached and re-placed, a recovery operation of a level at the exchange of the ink jet head is not required since the ink has been supplied in the head prior to the detachment of the ink jet head.
However, the technology described in the patent reference can detect the exchange of the ink jet head but cannot detect the detaching and mounting thereof, so that, in case the ink jet head is judged as not exchanged, the recovery operation is not executed until an uncapped period or a time elapsing from the previous suction operation exceeds a threshold value, whereby a defective ink supply may occur in case the ink jet head is detached and mounted.
In case a recovery operation is always executed even in case the ink jet head is judged as not exchanged in order to the reduce the defective ink supply caused by the detaching and mounting of the ink jet head, the recovery operation is conducted even in case the detachment and mounting of the ink jet head is not executed and thus the recovery operation is not necessary, so that the ink amount consumed in the recovery operation is elevated thereby leading to drawbacks of an elevated running cost, and a large used ink absorbent member is required for absorbing the used ink, thereby leading to an increased dimension of the recording apparatus.

Ink jet recording apparatus and maintenance method thereof


A portable apparatus for measuring the thoracic lung volume of a patient without enclosing the patient in a sealed chamber, comprising first and second impedance belts, a flow meter, shutter and a microprocessor-based controller. The flow meter includes pressure transducers for measuring the change in volume and pressure as the patient respires therethrough. The change in thoracic cage volume of the patient's lungs is directly correlated with the change of impedance in the belts. The thoracic lung volume is then determined from a measured barometric pressure, the measured change in pressure and the measured volume change in the thoracic cage volume utilizing a correction factor to determine the thoracic cage volume.

I. Field of the Invention
This invention relates generally to a device used in pulmonary function testing and more particularly to a device for determining the lung volume of a patient. The device is portable and determines the thoracic gas volume of a patient without enclosing the patient in a sealed chamber. The device further includes a dynamic calibration of the device which is incorporated into the determination of the thoracic gas volume of the patient.
II. Discussion of the Related Art
The lung volume of a patient determines the anatomic and physiologic limits of the patient. These limits may be significant in the prognosis and prescribed treatment of the patient. Over the years, various methods have been used to determine the lung volume and related lung capacity of a patient. These methods have included gas dilution techniques, body plethysmography and radiographic techniques.
The gas dilution techniques include closed-circuit helium dilution, and open-circuit nitrogen washout, either by single or multiple breath techniques. A primary disadvantage of the gas dilution techniques is the inability to measure the lung volume in poorly ventilated airspaces without prolonged rebreathing. Also, gas dilution techniques require maintenance of a leak free connection to the patient, particularly during mechanical ventilatory support. Other disadvantages include difficulty in differentiating leaks in the equipment from mal-distribution, and difficulties related to adequate cleaning of the system.
Past efforts to measure a patient's lung volume using body plethysmography have required that the patient's entire body be enclosed within a sealed chamber. The cabinet interior temperature must be approximately equal to the patient's body temperature before accurate testing may commence. Often times the patient experiences discomfort, anxiety, and a feeling of being trapped within the cabinet. There are other times where a patient is not ambulatory and cannot sit within the sealed cabinet, making the use thereof difficult, if not impossible. Recognizing the need to reduce patient discomfort when using body plethysmography techniques, Andrew C. Jackson, in U.S. Pat. No.5,513,648, discloses a partial body plethysmograph, wherein the patient's head and feet extend out from a sealed enclosure. Even in this system, the patient may experience discomfort, anxiety, and a feeling of being trapped. Thus, there still remains a need for a system and apparatus wherein the lung volume of a patient may be measured without enclosing any portion of the patient in a sealed chamber.
The radiographic techniques mentioned above also have their own shortcomings. Radiographic techniques require radiographs of the patient's lungs to be taken and analyzed, thereby exposing the patient to radiation (either x-ray or nuclear) that may be objectionable to the patient. This technique requires that the patient inspire fully and then hold the inspired breath during exposure. Additionally, oftentimes radiographic instruments are not transportable or immediately available and further, the time required to calculate the lung volume from the radiographs may preclude such use.
Therefore, a need exists for a nonintrusive device that: measures a patient's lung volume, is not affected by the surrounding airspace, does not require an ambulatory patient, and does not require a long time for measurements and calculations.

Boxless measurement of thoracic gas volume


An electromagnetic interference (“EMI”) shield that can help control the emission of electromagnetic radiation from an optoelectronic module in which the EMI shield is positioned. In one example embodiment, an EMI shield includes a base and plurality of flanges extending from a perimeter of the base. The base defines an optical subassembly (“OSA”) opening and a plurality of complementary structures. The OSA opening is configured to receive an OSA. Each complementary structure is configured to engage a complementary structure of an OSA connector block.

Optoelectronic modules, such as optoelectronic transceiver or transponder modules, are increasingly used in optoelectronic communication. An optoelectronic module, such as an optoelectronic transponder module, includes various components that are necessary to enable optical data transmission and reception. The components are housed within a housing of the optoelectronic module. Examples of such internal components include a printed circuit board ("PCB"), a transmitter optical subassembly ("TOSA") and a receiver optical subassembly ("ROSA"). The optoelectronic module itself is configured to be received within a host device that serves as one component of a communications network.
In order to enable optical communication with other optoelectronic modules and devices in a communications network, an optoelectronic module is configured to connect with one or more optical fibers. To enable such connection, the optoelectronic module includes both a transmit receptacle and receive receptacle that are each configured to receive an optical fiber connector. Typically, these receptacles are defined in the housing of the optoelectronic module. Though functional, this design brings with it some challenges including alignment issues between nose pieces of the TOSA/ROSA and the respective optical fiber connectors, hard plug issues, and wiggle performance concerns.
As discussed above, an optoelectronic module also often includes one or more PCBs with electronic circuitry. The electronic circuitry of a PCB can create electromagnetic interference. Electromagnetic interference ("EMI") is caused by electromagnetic radiation that can be emitted by electrical circuits carrying rapidly changing signals. Electromagnetic radiation is produced as a by-product of the normal operation of the electrical circuitry of a PCB in an optoelectronic module. The emission of electromagnetic radiation from an optoelectronic module can cause unwanted EMI to be induced in surrounding electronic devices. The emission of EMI-causing electromagnetic radiation from an optoelectronic module can thus interrupt, obstruct, or otherwise degrade or limit the effective performance of surrounding electronic devices.

Electromagnetic inferference shield for an optoelectronic module


A reservoir is suspended from a support frame with two parallel arms which pivot on the transverse sides of the upright of the support frame. Two springs bent between different locations of the support frame impart to the latter different positions according to the weight of the reservoir and, therefore, according to the amount of liquid in the reservoir. The positions vary such that the level of liquid in the reservoir remains constantly at a predetermined height corresponding to a point slightly higher than the tip of the applicator needle when the applicator is placed on a bracket. The device is suitable for cyano-acrylate type adhesives and for dispensing volatile or aggressive liquids.

There already exist various fluid dispensing devices designed to achieve operations such as gluing in series parts intended to be fixed permanently to each other. The Swiss patent CH-558 521, for example, describes an important element of a device of this type. Calibrated doses of fluid can thus be pumped into one or more nozzles or syringes via ducts emanating from a housing constituted by a reservoir, with no interposed gate or valve.
In a subsequent development of an apparatus of this type, a connection formed by a flexible tube was designed between the reservoir containing the fluid reserve and the applicator, thus facilitating manual operations.

Fluid dispenser, in particular for gluing parts


A tire pressure detector without the risk of causing a leaky tire includes a base having a forward projected and externally threaded annular wall and an annular limit wall to define an annular groove therebetween; a mating cover having an internally threaded annular wall for screwing to the externally threaded annular wall of the base with a free end of the annular wall received in the annular groove to press against an airtight seal ring set in the annular groove, such that an airtight space is defined in and between the assembled cover and base; a tire pressure detecting assembly being receiving in the airtight space; and a valve control assembly being mounted on the base to locate between the base and the mating cover. The annular limit wall prevents the cover from moving and deforming at the screwed portion to ensure good air-tightness between the cover and the base.

A tire pressure detector is designed for connecting to a tire valve on a tire of a car for detecting tire pressure, so that a user can timely obtain information about the tire pressure to drive the car safely.
FIG. 1 is an assembled sectional view of a conventional tire pressure detector, which includes a base 91 having a first end screwed to an outer side of a tire valve, and a mating cover 92 screwed to an outer side of an opposite second end of the base 91 through engagement of external threads 93 on the second end of the base 91 with internal threads 94 of the cover 92. An airtight seal ring 95 is disposed between the base 91 and the mating cover 92 at the screwed portion, so that the base 91 and the cover 92 screwed to each other together define an airtight space 96 in and between them. All the necessary components of the tire pressure detector, such as a pressure detecting unit for detecting tire pressure, a signal transmitting unit for sending out a signal indicating the detected tire pressure, and a battery for supplying electric power to the pressure detecting unit, are received in the airtight space 96. Moreover, a valve control assembly 97 is fitted in the first end of the base 91 to locate between the base 91 and the tire valve. The valve control assembly 97 is in contact with the tire valve to thereby normally open the tire valve, allowing air in the tire to flow through the tire valve and the valve control assembly 97 into the airtight space 96, so that the pressure detecting unit in the airtight space 96 can detect the tire pressure from the air flowed into the airtight space 96.
In the above-structured conventional tire pressure detector, the cover 92 is connected to the base 91 through engagement of the internal threads 93 of the cover 92 with the external threads 94 of the base 91. There is not any limiting element provided outside the cover 92. When the cover 92 deforms due to an external force applied thereto or changes in ambient temperature, a peripheral wall of the cover 92 tends to expand and deform because it is not limited by any means. The deformed cover 92 could not air-tightly connect to the base 91 and gaps will exist between the cover 92 and the base 91. Air flowed from the tire into the airtight space 96 tends to continuously leak out via these gaps, which forms a threat to the safety in driving the car.
Moreover, the whole tire pressure detector and the tire valve are located outside the tire to expose to external environment. When the tire is impacted by an external force while the car is driving or is parked, the cover 92 of the tire pressure detector is apt to loosen and finally separate from the base 91. In the conventional tire pressure detector, the valve control assembly 97 is mounted on the base 91 to locate between the base 91 and the tire valve. In the case the base 91 of the tire pressure detector is still screwed to the tire valve while the cover 92 has separated from the base 91, the valve control assembly 97 mounted on the base 91 will keep contacting with the tire valve to push the latter open. Under this situation, air in the tire will continuously flow through the tire valve and the valve control assembly 97 into an open space to cause a leaky tire, which is highly dangerous to a car in moving.
Therefore, the conventional tire pressure detector has low applicability and requires improvement.

Tire pressure detector without the risk of causing a leaky tire


Provided are a method and system for implementing alarms for a medical device through a mobile device. The method includes: storing details of examination of a specimen (hereinafter, referred to as examination details) in the medical device, wherein the storing is performed by the medical device; accessing the medical device and establishing a connection with the medical device, wherein the accessing and the establishing of the connection is performed by the mobile device; reading the examination details stored in the medical device, wherein the reading is performed by the mobile device; analyzing the read examination details, wherein the analyzing is performed by the mobile device; and implementing an alarm if the result of analysis satisfies a predetermined criterion, wherein the implementing is performed by the mobile device.

1. Field
One or more exemplary embodiments relate to a method and system for implementing alarms for a medical device through a mobile device.
2. Description of the Related Art
Ubiquitous healthcare (U-Health) integrates information technology (IT) with health and medical care to provide healthcare services such as prevention, diagnosis, treatment, and follow-up management of diseases. With dissemination of the U-Health concept, an increasing number of medical devices that are used inside or outside a hospital tend to be connected to one another via a network. However, a user of a medical device for providing examination and diagnosis functions is inconvenienced in having to stay near the medical device during the length of examination. Thus, an alarm function of a medical device has been implemented using a warning light or an acoustic sound so that a user may recognize completion of examination or occurrence of errors in the medical device even when being located away from the medical device. In addition, when necessary, alarm information of a medical device may be transmitted to a user's PC. However, an alarm using a warning light or acoustic sound has a limitation in a distance to which a user can perceive the alarm. Furthermore, in order to transmit alarm information to a PC, a connection for transmitting the alarm information has to be continuously maintained. This may not only cause the waste of medical device's communication resources but also hamper concentration of resources on an examination function that is a basic function of the medical device.
FIGS. 1A and 1B are schematic diagrams of conventional configurations in which a medical device 101 or 107 implements an alarm.
Referring to FIG. 1A, when a cause for an alarm occurs in the medical device 101, the medical device 101 notifies a user side 105 of occurrence of the cause for alarm through a warning light or speaker 103. According to this conventional method, a user is inconvenienced in having to stay within a range in which the user is able to see the warning light or perceive an alarm sound output from the speaker.
Referring to FIG. 1B, when a cause for an alarm occurs in the medical device 107, the medical device 107 transmits an alarm notification to an in-house server 109 that will then deliver the alarm notification to a user's PC 111 so that the user's PC 111 implement an alarm. However, in this case, since a connection for transmitting alarm information to the user's PC 111 has to be maintained continuously, communication resources of the medical device may be wasted, and resources cannot be concentrated in a main function, i.e., an examination function of the medical device 107.

Method and system for implementing alarms for medical device through mobile device


A method includes receiving a user query and performing, using at least one processor, multiple rounds of an answer generation process. Each round of the answer generation process includes selecting one of multiple functions to be performed based on an input state. The input state for each round includes an embedding of the user query in a feature space. The input state for at least one round also includes an embedding of information to be used to identify an answer to the user query in the feature space. Each round of the answer generation process also includes performing the selected function. The multiple functions include (i) an answer generation function that produces the answer to the user query and (ii) at least one additional function that updates the input state for a current round for use during a subsequent round. In addition, the method includes providing the answer to the user.

Machine comprehension-based question answering (QA) systems have drawn lots of interest in recent years. For example, question answering functionality has become an important feature for digital personal assistants on mobile electronic devices and other devices. Question answering systems are generally designed to receive questions from users, identify answers to those questions, and provide the identified answers to the users. Question answering systems often involve the use of various technologies, such as natural language understanding and information retrieval.
Currently, many state-of-the-art models for question answering systems are based on recurrent neural networks, which can process sequential inputs. A (co-)attention structure may also be used to deal with long-term interactions between the questions and documents in which the answers are located. However, one disadvantage of these types of models is that their training and inference speeds are relatively slow due to their recurrent nature. Another disadvantage of these types of models is that they are not particularly good at dealing with very long documents, which typically force the models to use truncated documents as their inputs.

Deep reinforcement learning-based multi-step question answering systems


An exemplary method for surgically stapling tissue may include providing a surgical stapler that includes at least one staple, a pusher configured to hold at least one staple, a splay arm movable relative to the pusher, where that splay arm includes two spaced-apart splay tips, and a driver movable relative to the pusher; splaying at least one staple by plastically deforming the distalmost staple against the splay tips; and after splaying, closing at least one staple by plastically deforming the distalmost staple against the splay tips. Another exemplary method for surgically stapling tissue may include providing a surgical stapler comprising a plurality of staples, a pusher configured to hold the staples, a splay arm movable relative to the pusher, a driver movable relative to the pusher, wherein the pusher, splay arm and driver are initially in a first configuration relative to one another; splaying at least one staple to a splayed state; after splaying, closing at least one splayed staple, after which the pusher, splay arm and driver are in a second configuration relative to one another; and resetting the stapler to the first configuration of the pusher, splay arm and driver; where the splaying and closing each plastically deform at least one staple.

Traditionally, suture has been utilized to close wounds and incisions, to attach separate tissue structures to one another, and to perform other medical and surgical functions. However, suturing requires skill to perform, particularly suturing procedures that are complex, time-consuming and/or difficult. Further, suturing may be impractical or unfeasible in certain situations. For example, in a minimally-invasive surgical procedure through a small opening (often referred to as an access port) in the patient's body, that port may not be large enough to allow suturing to be performed through it. If the port were enlarged to allow suturing, the benefits of minimally-invasive surgery through a small access port would be reduced or eliminated altogether. Indeed, as surgical technology progresses, the size of the access ports required in the body to perform minimally-invasive surgery decreases. For example, micro-laparoscopy utilizes instruments having a diameter of only 2-3 millimeters to perform procedures such as laparoscopic cholecystectomy and inguinal hernia repair. When instruments of such small diameter are used, the ports in the body through which they are inserted need be only 2-3 millimeters in diameter as well, resulting in minimal or no scarring of the patient after the procedure is completed. However, it is difficult or impossible to perform suturing within the patient's body through ports of such small size.
The use of the same reference symbols in different figures indicates similar or identical items.


In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.

The present invention relates to a process for manufacturing a semiconductor integrated circuit device having a ferroelectric (high relative dielectric constant substance) capacitor and, more particularly, to a technique which is effective when applied to a process for manufacturing a ferroelectric (high relative dielectric constant substance) capacitor by using a conductive material for producing reaction products of low vapor pressure at a dry-etching time.
In order to compensate the reduction in the amount of stored charge with the miniaturization of the memory cell of a large capacity DRAM (Dynamic Random Access Memory) exceeding 256 Mbits or 1 Gbits, it is demanded that the capacitor insulating film of a data storing capacitive element (or capacitor) is made of a high relative dielectric material having a specific relative dielectric constant of 20 or more such as Ta2O5 or BST ((Ba,Sr)TiO3), or a ferroelectric material having a relative dielectric constant over 100 such as PZT (PbZrxTi1xe2x88x92xO3), PLT (PbLaxTi1xe2x88x92xO3), PLZT, PbTiO3, SrTiO3 or BaTiO3.
In the field of a nonvolatile memory, there has been developed a ferroelectric memory which utilizes the polarization inversion of the ferroelectric material for data storage.
When the capacitor insulating film of the capacitor is made of an aforementioned ferroelectric substance (high relative dielectric constant substance), it is necessary to make the conductive films for electrodes sandwiching the capacitor insulating film, of such a refractory metallic material, e.g., Pt having a high affinity with those materials.
When the capacitor is made of Pt or PZT, there arises the following problem. When the thin film of Pt or PZT deposited on the substrate is dry-etched, it is known that a lot of reaction products having a low vapor pressure are deposited on the side face of a pattern to cause the short-circuiting between the capacitors.
In order to prevent reaction products from being deposited on the side face of the pattern when the Pt film is to be dry-etched, there is known in the prior art either a method of tapering the side face of a photoresist used as the etching mask or a method of using a hard mask of a silicon oxide film or a metal film in place of the photoresist.
It has been reported in 27p-N-9, Preprint No. 2 of the 43rd Joint Congress of Applied Physics of Japan 1996, that a clean capacitor without any side wall deposited film can be formed by using a resist mask having a side face tapered at about 75 degrees when a three-layered film of Pt/PZT/Pt deposited on a substrate is dry-etched. This can be thought in the following manner. If the side face of the resist mask is tapered, the side face of the pattern is also irradiated with etching ions so that the etch-off rate is enabled to exceed the deposition rate of the side wall deposited film by increasing the taper angle over a predetermined value (e.g., about 75 degrees).
It has been reported in 26a-ZT-4, Preprint No. 2 of 56th Joint Congress of Applied Physics of Japan 1995, that the Pt film can be tapered to effect the etching without any side wall deposited film, when the Pt film is dry-etched, by using as the mask a silicon oxide film etched to a predetermined pattern and by using an etching gas containing Ar and additional oxygen.
Japanese Patent Laid-Open No. 89662/1993 has disclosed a method of forming an excellent Pt pattern having no side wall deposited film by using as the mask a Ti film etched to a predetermined pattern thereby to etch the Pt film.
The RIE etching technique using a tapered resist mask has been disclosed on pp. 244 to 253, xe2x80x9cGlow Discharge Processes SPUTTERING AND PLASMA ETCHINGxe2x80x9d, by Brian Chapman.
According to our investigations, however, the prior art method of patterning the Pt film by using the resist mask having the tapered side face has problems of not only a complicated step of tapering the side face of the resist mask but also a difficulty in forming a fine Pt pattern in a high sizing accuracy.
On the other hand, the method of using the hard mask of the silicon oxide film or the metallic film forms a hard mask pattern by dry-etching such a film deposited on the Pt film, and has a problem of an increase in the steps, compared to the case of using the resist mask. During the etching, moreover, the hard mask has to be heated to as high as 300xc2x0 C. to raise other problems that when the Pt film over the ferroelectric (high relative dielectric constant substance) film is etched, the underlying ferroelectric (high relative dielectric constant substance) film is deteriorated, and that the hard mask is difficult to ash off after the end of the etching.
An object of the present invention is to provide a technique which can form a fine pattern, when a thin film of Pt or the like deposited on a substrate is patterned by a dry-etching method using a resist mask, without leaving reaction products of low vapor pressure on the side face of the pattern and in a high dimensional accuracy.
The aforementioned and other objects and novel features of the present invention will become apparent from the following description to be made with reference to the accompanying drawings.
The summaries of the invention will be briefly described in the following.
(1) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising the step of patterning by a dry-etching method a thin film, which has one or a plurality of films including a film formed directly or indirectly over a first major surface of a wafer and liable to be deposited on a side wall, by using as the mask a photoresist film of a predetermined pattern, which has a generally vertical side face of at least its lower half and which is either normally tapered or rounded at the outer periphery of its head, so that the side face of the thin film pattern may be normally tapered so as to reach the lower end thereof.
(2) The thin film pattern is overetched, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(3) The thin film includes a platinum thin film.
(4) The thin film includes a high relative dielectric constant thin film or a ferroelectric thin film.
(5) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a thin film, which has one or a plurality of films including a film liable to be deposited on a side wall, directly or indirectly over a first major surface of a wafer;
(b) the step of forming a photoresist of a predetermined pattern, which has a generally vertical side face of at least its lower half and which is either normally tapered or rounded at the outer periphery of its head, directly or indirectly over the thin film; and
(c) the step of patterning by a dry-etching method the thin film by using as the mask the photoresist film of the predetermined pattern so that the side face of the thin film pattern may be normally tapered so as to reach the lower end thereof.
(6) The thin film pattern is overetched, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(7) The thin film includes a platinum thin film.
(8) The thin film includes a high relative dielectric constant thin film or a ferroelectric thin film.
(9) According to the present invention, there is provided a semiconductor integrated circuit device manufacturing process, comprising:
(a) the step of forming a thin film, which has one or a plurality of films including a film liable to be deposited on a side wall, directly or indirectly over a first major surface of a wafer;
(b) the step of forming a positive type benzophenone novolak resist film by spin-coating over the thin film;
(c) the step of forming a predetermined resist film pattern by exposing and developing the positive type benzophenone novolak resist film;
(d) the step of setting the resist film pattern by heating at least the resist film pattern and by irradiating the surface of the same with ultraviolet radiation;
(e) the step of patterning by a dry-etching method the thin film by using as the mask the set photoresist film pattern so that the side face of the thin film pattern may be normally tapered so as to reach the lower end thereof; and
(f) overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern,
wherein at the end of the step (d), the surface insolubilization of the unexposed portion is weakened at the developing time of the positive type benzophenone novolak resist film so that the outer periphery of the head of the resist film pattern may be rounded.
(10) The thin film includes a platinum thin film.
(11) The thin film includes a high-dielectric thin film or a ferroelectric thin film.
(12) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device by repeating a photolithography processing by a reduction projection exposure using a positive or negative type photoresist and an exposure light of substantially the same wavelengths, to pattern a plurality of thin films, wherein a first photoresist of the positive or negative type is used at a portion of the step for the photolithography processing whereas a second photoresist having the same positive or negative type as that of the first photoresist but a different pattern shape and characteristic is used at the other portion of the step or at all the other steps.
(13) The first photoresist is a positive type benzophenone novolak resist whereas the second photoresist is a positive type non-benzophenone novolak resist.
(14) The semiconductor integrated circuit device manufacturing process of the present invention comprises the step of patterning the thin film having one or a plurality of films including a film liable to be deposited on the side wall, by using as the mask a resist pattern made of the first photoresist.
(15) The semiconductor integrated circuit device manufacturing process of the present invention comprises the step of overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(16) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a first thin film having one or a plurality of films directly or indirectly over a first major surface of a wafer;
(b) the step of forming a first photoresist film made of a positive type benzophenone novolak resist directly or indirectly over the first thin film;
(c) the step of forming a first resist film pattern over the first thin film by exposing the first photoresist film by a reduction projection exposure processing and subsequently by developing the exposed first photoresist film;
(d) the step of forming a gate electrode of a MISFET over the first major surface of the wafer by patterning the first thin film by a dry-etching method using as the mask the first resist film;
(e) the step of forming a second thin film having one or a plurality of films including a film, which is liable to be deposited on the side wall at the dry-etching time, directly or indirectly over the first major surface of the wafer formed with the gate electrode;
(f) the step of forming a second photoresist film made of a positive type benzophenone novolak resist by spin-coating over the second thin film;
(g) the step of forming a second resist film pattern over the second thin film by exposing the second photoresist film by a reduction projection exposure processing and subsequently by developing the exposed second photoresist film;
(h) the step of patterning the second thin film by a dry-etching method using as the mask the second resist film so that the side face of the thin film pattern may be normally tapered as to reach the lower end thereof; and
(i) overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(17) The second thin film is a thin film forming a capacitor of the memory cell of a DRAM.
(18) The second thin film is a thin film forming a capacitor of the memory cell of a ferroelectric RAM.
(19) The second thin film includes a thin film made of one or more metals or conductive metal oxides selected from the group consisting of Pt, Ir, IrO2, Rh, RhO2, Os, OsO2, Ru, RuO2 Re, ReO3, Pd and Au.
(20) The second thin film includes a thin film made of one or more ferroelectric substances selected from the group consisting of PZT, PLT, PLZT, SBT, PbTiO3, SrTiO3 and BaTiO3.
(21) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a first thin film having one or a plurality of films directly or indirectly over a first major surface of a wafer;
(b) the step of forming a positive type first photoresist film having a square sectional shape at the upper end or upper half of the pattern side face directly or indirectly over the first thin film;
(c) the step of forming a first resist film pattern over the first thin film by exposing the first photoresist film by a reduction projection exposure processing and subsequently by developing the exposed first photoresist film;
(d) the step of forming a gate electrode of a MISFET over the first major surface of the wafer by patterning the first thin film by a dry-etching method using as the mask the first resist film;
(e) the step of forming a second thin film having one or a plurality of films directly or indirectly over the first major surface of the wafer formed with the gate electrode;
(f) the step of forming a positive type second photoresist film having a less square sectional shape than that of the first photoresist film at the upper end or upper half of the pattern side face directly or indirectly by spin-coating over the second thin film;
(g) the step of forming a second resist film pattern over the second thin film by exposing the second photoresist film by a reduction projection exposure processing and subsequently by developing the exposed second photoresist film;
(h) the step of patterning the second thin film by a dry-etching method using as the mask the second resist film so that the side face of the thin film pattern may be normally tapered so as to reach the lower end thereof; and
(i) the step of overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(22) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a first thin film having one or a plurality of films directly or indirectly over a first major surface of a wafer;
(b) the step of forming a first photoresist film having a square sectional shape at the upper end or upper half of the pattern side face directly or indirectly over the first thin film;
(c) the step of forming a first resist film pattern over the first thin film by exposing the first photoresist film by a reduction projection exposure processing and subsequently by developing the exposed first photoresist film;
(d) the step of forming a gate electrode of a MISFET over the first major surface of the wafer by patterning the first thin film by a dry-etching method using as the mask the first resist film;
(e) the step of forming a second thin film including a conductive film having one or a plurality of films directly or indirectly over the first major surface of the wafer formed with the gate electrode;
(f) the step of forming a second photoresist film having a less square sectional shape than that of the first photoresist film at the upper end or upper half of the pattern side face directly or indirectly over the second thin film;
(g) the step of forming a second resist film pattern over the second thin film by exposing the second photoresist film by a reduction projection exposure processing and subsequently by developing the exposed second photoresist film;
(h) the step of patterning the second thin film by a dry-etching method using as the mask the second resist pattern so that the side face of the thin film pattern may be tapered to macroscopically protrude upward and to reach the lower end thereof; and
(i) the step of overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(23) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a thin film having one or a plurality of films including a film liable to be deposited on the side wall, directly or indirectly over a first major surface of a wafer;
(b) the step of forming a positive resist film pattern, which has a generally vertical side face of at least its lower half and which is rounded at the outer periphery of its head, directly or indirectly over the thin film;
(c) the step of patterning by a dry-etching method the thin film by using as the mask by the resist film pattern so that the side face of the thin film pattern may be tapered to macroscopically protrude upward and to reach the lower end thereof and so that the side face of the side wall deposited film deposited on the individual side faces of the resist film pattern and the thin film pattern may be tapered to macroscopically protrude upward and to reach the lower ends thereof; and
(d) the step of overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(24) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a thin film having one or a plurality of films including a film liable to be deposited on the side wall, directly or indirectly over a first major surface of a wafer;
(b) the step of forming a positive resist film pattern having a generally vertical side face directly or indirectly over the thin film;
(c) the step of normally tapering the outer periphery of the head of the resist film pattern by baking the resist film pattern;
(d) the step of patterning by a dry-etching method the thin film by using as the mask the resist film pattern so that the side face of the thin film pattern may be normally tapered so as to reach the lower end thereof and so that the side face of the side wall deposited film deposited on the individual side faces of the resist film pattern and the thin film pattern may be normally tapered so as to reach the lower ends thereof; and
(e) the step of overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.
(25) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a thin film having one or a plurality of films including a film liable to be deposited on the side wall, directly or indirectly over a first major surface of a wafer;
(b) the step of forming a photoresist film directly or indirectly by spin-coating over the thin film;
(c) the step of forming a predetermined resist film pattern by exposing and developing the photoresist film;
(d) the step of patterning by a dry-etching method the thin film by using as the mask t he resist film pattern so that the side face of the thin film pattern may be normally tapered so as to reach the lower end thereof; and
(e) the step of overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern,
wherein the outer periphery of the head of the resist film pattern is either normally tapered or rounded by controlling the focusing condition of the exposing beam at the time of exposing the photoresist film.
(26) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a first thin film having one or a plurality of films directly or indirectly over a first major surface of a wafer;
(b) the step of forming a first photoresist film made of a positive type chemically amplified photoresist directly or indirectly over the first thin film;
(c) the step of forming a first resist film pattern over the first thin film by exposing and developing the first photoresist film;
(d) the step of forming a gate electrode of a MISFET over the first major surface of the wafer by patterning the first thin film by a dry-etching method using as the mask by the first resist film;
(e) the step of forming a second thin film having one or a plurality of films including a film liable to be deposited on the side wall at a dry-etching time directly or indirectly over the first major surface of the wafer formed with the gate electrode;
(f) the step of forming a second photoresist film made of a negative type chemically amplified photoresist directly or indirectly over the second thin film;
(g) the step of forming a second resist film pattern having a rounded outer periphery at its head over the second thin film by exposing and developing the second photoresist film; and
(h) the step of patterning the second thin film by a dry-etching method using as the mask the second resist film.
(27) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a first thin film having one or a plurality of films directly or indirectly over a first major surface of a wafer;
(b) the step of forming a first photoresist film made of a positive type chemically amplified photoresist directly or indirectly over the first thin film;
(c) the step of forming a first resist film pattern over the first thin film by exposing and developing the first photoresist film;
(d) the step of forming a gate electrode of a MISFET over the first major surface of the wafer by patterning the first thin film by a dry-etching method using as the mask the first resist film;
(e) the step of forming a second thin film having one or a plurality of films including a film liable to be deposited on the side wall at a dry-etching time directly or indirectly over the first major surface of the wafer formed with the gate electrode;
(f) the step of forming a second photoresist film made of a positive type chemically amplified photoresist directly or indirectly over the second thin film;
(g) the step of forming a second resist film pattern over the second thin film by exposing and developing the second photoresist film;
(h) the step of melting only the surface of the second resist film pattern by irradiating the second resist film pattern with ultraviolet radiation;
(i) the step of forming a second resist film pattern having a rounded outer periphery at its head by applying an acidic polymer by spin-coating over the surface of the second resist film pattern melted only at its surface and subsequently by baking the second resist film pattern; and
(j) the step of patterning the second thin film by a dry-etching method using as the mask the second resist film.
(28) According to the present invention, there is provided a process for manufacturing a semiconductor integrated circuit device, comprising:
(a) the step of forming a first thin film having one or a plurality of films directly or indirectly over a first major surface of a wafer;
(b) the step of forming a first photoresist film made of a positive type methacrylate photoresist directly or indirectly over the first thin film;
(c) the step of forming a first resist film pattern over the first thin film by exposing and developing the first photoresist film;
(d) the step of forming a gate electrode of a MISFET over the first major surface of the wafer by patterning the first thin film by a dry-etching method using as the mask the first resist film;
(e) the step of forming a second thin film having one or a plurality of films including a film liable to be deposited on the side wall at a dry-etching time directly or indirectly over the first major surface of the wafer formed with the gate electrode;
(f) the step of forming a second photoresist film made of a negative type methacrylate photoresist directly or indirectly by spin-coating over the second thin film;
(g) the step of forming a second resist film pattern having a rounded outer periphery at its head over the second thin film by exposing and developing the second photoresist film; and
(h) the step of patterning the second thin film by a dry-etching method using as the mask the second resist film.
(29) According to the present invention, there is provided a semiconductor integrated circuit device manufacturing process, comprising:
(a) the step of forming a thin film, which has one or a plurality of films including a film liable to be deposited on a side wall, directly or indirectly over a first major surface of a wafer;
(b) the step of forming a positive type photoresist film directly or indirectly by spin-coating over the thin film;
(c) the step of forming a predetermined resist film pattern by exposing and developing the photoresist film;
(d) the step of normally tapering the outer periphery of the head of the resist film pattern, by performing a dry-etching for a short time period under the conditions that only the resist film pattern is substantially etched and the etch-off progresses obliquely from the ridge of the head of the resist film pattern;
(e) the step of patterning the thin film by a dry-etching method using as the mask the resist film pattern; and
(f) the step of overetching the thin film pattern, after having been formed, to remove the side wall deposited film which is left on the side face of the thin film pattern.

Process for manufacturing semiconductor integrated circuit device


A synchronous non-volatile memory device has address input connections and data input/output connections. A test operation can be initiated that use signals provided on the address input connections and not the data input/output connections. The test mode can be entered using either commands or a combination of commands and an electronic key.

Memory devices are typically provided as internal storage areas in the computer. The term memory identifies data storage that comes in the form of integrated circuit chips. There are several different types of memory. One type is RAM (random-access memory). This is typically used as main memory in a computer environment. RAM refers to read and write memory; that is, you can both write data into RAM and read data from RAM. This is in contrast to ROM, which permits you only to read data. Most RAM is volatile, which means that it requires a steady flow of electricity to maintain its contents. As soon as the power is turned off, whatever data was in RAM is lost.
Computers almost always contain a small amount of read-only memory (ROM) that holds instructions for starting up the computer. Unlike RAM, ROM cannot be written to. An EEPROM (electrically erasable programmable read-only memory) is a special type non-volatile ROM that can be erased by exposing it to an electrical charge. Like other types of ROM, EEPROM is traditionally not as fast as RAM. EEPROM comprise a large number of memory cells having electrically isolated gates (floating gates). Data is stored in the memory cells in the form of charge on the floating gates. Charge is transported to or removed from the floating gates by programming and erase operations, respectively.
Yet another type of non-volatile memory is a Flash memory. A Flash memory is a type of EEPROM that can be erased and reprogrammed in blocks instead of one byte at a time. Many modern PCS have their BIOS stored on a flash memory chip so that it can easily be updated if necessary. Such a BIOS is sometimes called a flash BIOS. Flash memory is also popular in modems because it enables the modem manufacturer to support new protocols as they become standardized.
A typical Flash memory comprises a memory array that includes a large number of memory cells arranged in row and column fashion. Each of the memory cells includes a floating gate field-effect transistor capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation. The data in a cell is determined by the presence or absence of the charge in the floating gate.
A synchronous DRAM (SDRAM) is a type of DRAM that can run at much higher clock speeds than conventional DRAM memory. SDRAM synchronizes itself with a CPU's bus and is capable of running at 100 MHZ, about three times faster than conventional FPM (Fast Page Mode) RAM, and about twice as fast EDO (Extended Data Output) DRAM and BEDO (Burst Extended Data Output) DRAM. SDRAM's can be accessed quickly, but are volatile. Many computer systems are designed to operate using SDRAM, but would benefit from non-volatile memory.
Further, as the geometries and cost of integrated circuit memories continues to be reduced, the costs associated with testing the memories is becoming a more significant component of the total manufacturing cost. Specifically, before delivery to end users, each memory chip must be tested to ensure that it is functioning properly. Typically, the entire memory array must be tested.
For example, a common testing procedure for a memory connected to a memory tester is to first have the tester send a command to the memory to erase all of its bits to "1". The tester then reads the memory cells to verify that they are all "1". Next, zeros are written to all of the bits of the memory and the cells are read in order to verify that they are all "0". Then, all of the bits of the memory are erased, a checkerboard pattern is written to the memory and the cells are read in order to verify that the checkerboard pattern is present. Finally, all of the bits of the memory are erased, an inverted checkerboard pattern is written to the memory, and the cells are read in order to verify that the inverted checkerboard pattern is present. This testing procedure is a good way to find out if any of the bits of the memory are shorted to an adjacent bit, to a high level, or to a low state, or if there are any other problems.
Because the cost of testing has becoming a significant component of the total manufacturing cost of memory chips, testing using compressed data lines can be implemented. See U.S. Pat. No. 5,787,097 entitled "Output Data Compression Scheme for Use in Testing IC Memories," issued Jul. 28, 1998. This patent describes a system for compressing data during a test operation so that multiple memory devices can be simultaneously tested using a common tester. That is, each memory device uses a subset of its data output connections.
To conduct test operations on a memory device, the memory device is placed in a test mode. Because the test mode should not be entered accidentally, an electronic key is often used to restrict access to test modes. For example, a high voltage may be required on a specific input connection to enter a test mode. Further, a test mode code can be provided on data input connections to instruct the memory device which test is to be selected. If the memory is operated in a compressed mode, complicated circuitry is needed to detect the test mode codes on the data connections.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a non-volatile memory device that can operate in a compressed data mode and easily select between different test modes.

This patent is subject to a terminal disclaimer.

Synchronous flash memory with test code input


A multi-bit data block testing circuit and method thereof are described. The semiconductor memory device includes a multi-bit data block testing circuit for testing adjacent cell blocks using any one pattern selected from the same data pattern and a different data pattern during a multi-bit test mode. The multi-bit data block testing circuit further comprises a comparator operatively coupled to receive a data signal from each of the adjacent cell blocks. A multi-bit data block input source is interconnected with the multi-bit data block testing circuit via an input port and provides the data patterns during the multi-test mode. A multi-bit data block output receiver is interconnected with the multi-bit data block testing circuit via an output port and receives a test result indication from the comparator of the multi-bit data block testing circuit.

The present invention relates to a semiconductor memory device, and more particularly, to a multi-bit data block testing circuit and method for selecting a bit pattern of test data from adjacent cell blocks by receiving the test data from a test data input port.
In prior art semiconductor memory devices, input/output operations are typically performed using multi-bit data blocks, that is, data which is accessed in four-bit, eight-bit, sixteen-bit, thirty two-bit and similar blocks. Also, prior art methods of simultaneously testing these multi-bit data blocks have been used to reduce the time and cost of testing multi-bit semiconductor memory devices.
A prior art multi-bit data block testing circuit and a prior art determining circuit used therein are shown in FIGS. 1 and 2, respectively, and are described further hereinbelow in the Detailed Description. Briefly, cell blocks in the semiconductor memory device under test are tested by the prior art testing circuit using integrated input/output bits. This approach leads to several problems. First, since only identical test data patterns are written into and read from the cell blocks, a failure caused by a faulty connection between bits cannot be detected. Second, the prior art determining circuit cannot detect simultaneous failures between one of two comparing pairs of data signals. For example, suppose that a failure exists in each of a first and a third cell block. When the multi-bit test data is written as "high" data values, the data signals output therefrom are asserted "low." However, the output signal from the determining circuit 30 will also be asserted "low" and the failures will go undetected.

Multi-bit test circuit and method thereof


A new and distinct variety of miniature rose characterized by magenta buds and blooms of good form and a medium sized, upright plant with dark green semi-glossy foliage.

The present introduction of a new and distinct variety of rose plant of the miniature rose class, which was created by my crossing as seed parent the floribunda rose named "Jazz Fest" (U.S. Plant Pat. No. 3,323) and as pollen parent the miniature rose named "Party Girl" (U.S. Plant Pat. No. 4,598), has the varietal denomination of "Micdeb".
Among the distinguishing characteristics possessed by this new variety which separate it from its parents and all other varieties of which I am aware are abundant magenta colored buds and blooms with long lasting flowers usually borne singly and a vigorous medium plant size with glossy greenish-purple new foliage.
The present variety of miniature rose was originated by me in Laurens County, S.C. Asexual reproduction by cuttings of the new variety as performed by me in Laurens County, S.C., has shown conclusively that the foregoing and other distinguishing characteristics come true to form and are established and faithfully transmitted through succeeding propogations .


A method and apparatus for the detection and investigation of fraudulent debit and charge card activation transactions. Cardholder information on file is matched with information provided at activation time. Where matching does not occur, fraud is a possibility. All activation activity is captured and summarized. Absolute failures are highlighted. Subsequent fraudulent use of fraudulently activated cards can be investigated resulting in possible identification of the alleged fraudulent card user.

The invention relates generally to the activation of debit and charge cards. More specifically, the invention relates to a method and apparatus to monitor payment card activation activity and to detect and investigate fraudulent debit and charge card activations.
When debit and credit cards (generically referred to as xe2x80x9ccardsxe2x80x9d or xe2x80x9cpayment cardsxe2x80x9d herein) are newly issued or reissued, they are mailed to cardholders. In most instances, the cards are mailed in an inactive state in order to prevent unauthorized use of the card by someone other than the cardholder. Typically, cards include a sticker or other label with information instructing the card recipient to contact a call center via the telephone, Internet, or other method. The person in possession of the card contacts the call center to activate the card. With existing activation systems, the cardholder must usually validate identity information to a customer representative or, in some cases an automated voice response unit. If the identity information provided by the caller matches the information at the call center, the card is authorized. In general, little information concerning the activation process is recorded and maintained. Further, no systematic or engineered devices or techniques are used to detect and prevent fraudulent activations of cards.
Accordingly, there is a need to provide a method and device to detect and investigate fraudulent activation transactions.
The invention provides an automated card activation system (xe2x80x9cACASxe2x80x9d) that includes a response unit. Upon receiving a request or telephone call from a purported cardholder, the response unit generates a message, such as a voice message, instructing the purported cardholder (xe2x80x9cPCxe2x80x9d) to interact with the system to activate the recently received card. The PC is queried for his or her card number and a predetermined amount of personal information (generally xe2x80x9crequested criteriaxe2x80x9d). The ACAS matches the requested criteria it receives in response to the queries with information obtained earlier from the true cardholder""s original card application.
The ACAS is programmed to allow the PC a pre-determined number of match attempts on the requested criteria. The ACAS maintains an attempt counter, which is initialized to zero at the beginning of a session. The ACAS may be configured to test for matches of multiple criteria. For each match attempt, the ACAS logs the information the cardholder supplied and the results of the match attempt, which can be either a success or failure. The attempt counter is incremented each time a failure occurs. When all of the criteria have been met, an activation flag is set in the cardholder""s record, an activation record is logged, and the cardholder is informed that his or her card has been activated.
Of course, a session with the ACAS may end in failure. If so, the card remains inactive. A pre-determined number of sessions with the ACAS are allowed. To track the number of sessions that a PC uses in an attempt to activate a card, the ACAS maintains a session counter. The session counter is initialized to zero upon the creation of the cardholder record, which typically occurs during the processing of the cardholder""s application. The values of the session and attempt counter are stored in a log or other record.
If either of the counter limits are exceeded, or the PC cannot correctly provide account number information to the ACAS, the ACAS 1) transfers the PC to a human operator or customer service representative (xe2x80x9cCSRxe2x80x9d) for assistance in activating the card, or 2) directs the PC to contact the card issuer directly. The fact that a transfer has occurred is logged. If the PC is transferred to a CSR, the representative determines whether to activate the card based on a set of criteria. This set of criteria is the same or similar to that used by the ACAS. The CSR may also use additional criteria and exercise human judgment in making an activation decision. The CSR""s activation decision is also logged.
Logged records are processed on a periodic basis, for example, daily, to produce a card activation report. The records may also be processed on a second periodic basis, based on criteria such as an invoice cycle, to produce an accumulated or summary card activation report. Daily and cycle-duration reports are provided to card issuers as part of an optional, subscription card activation reporting service.
The information logged by the ACAS may be sorted in a variety of ways to produce activity reports. In one embodiment of the invention, logged records are sorted first by card issuer, then card number, then cardholder to session number, then activation agent, and finally sequence number. The activation agent is either the ACAS or the CSR. The sorted records are separated into groups, where a group is all those records associated with the same card issuer, card number, session number, and activation agent. Each group is sorted in chronological order by a sequence number.
A card activation report is built using the last record in each sorted group. In nearly all situations, the ACAS generates a group of records (as opposed to just one record) for each session because records are logged for each validation match attempt and also for final activation. The last record chronologically associated with a session has the highest sequence number. The card activation report shows detailed information extracted from the last log record. This information includes the cardholder""s name, the card number, the session number, the activation agent, the personal information that was entered on the last match effort, an indication of whether the call was transferred, and an indication of whether activation was successful. The report includes a flag or other eye-catcher (such as an asterisk). The presence of a failure flag indicates an absolute failure. That is, for the subject cardholder number, on the subject day, no card was activated and there was at least one failed activation attempt. The report also summarizes the number of successful and unsuccessful sessions by the criterion (or activation method) last employed. A card activation report can be developed for each card issuer that subscribes to the ACAS.
In the case of successful activations, the report includes the last triggering action (or match). In the case of a failure during a session, facts about the last match effort are shown in the report. These facts include information that was provided to the ACAS by the PC. The ACAS include a log-viewing or user/administrative interface module that provides access to all logged information stored in the ACAS.

Method and apparatus for detecting and investigating fraudulent transactions in debit and charge card activations


A high speed Random Access Memory (RAM) array device includes several logical banks, each of which can be uniquely addressed. Each of these logical banks contains a unique memory array segment and associated page register, the latter serving as a temporary storage location during high-speed page hit operations. To reduce latency during an initial page hit, further array optimization is realized by segmenting each logical bank into two segments with one, smaller segment, comprising a faster random access memory (FRAM) for storing initial data in a data stream. A high speed page register connects the FRAM directly to a multiplexer/demultiplexer connected to the device I/O ports bypassing an internal bus protocol such that the initial data can be transferred between the FRAM and the I/O ports faster thereby improving page-hit latency. Hence, segmenting the logical banks to include only a small high speed segment results in a performance gain approaching what could be achieved by implementing the entire memory device with a high speed FRAM, but at much lower cost.

1. Field of the Invention
The present invention generally relates to high bandwidth/performance Dynamic Random Access Memories (DRAMs) and, more particularly, to high bandwidth/performance DRAMs with improved, lower page-hit latency.
2. Description of the Related Art
Dynamic random access memory (DRAM) performance is a well known limitation to computer system performance. Processor speeds are rapidly outpacing main memory performance, with both processor designers and system manufacturers developing higher performance memory subsystems in an effort to minimize performance limitations due to the slower DRAM devices. Ideally, the memory performance would match or exceed processor performance, i.e., a memory cycle time would be less than one processor clock cycle. This is almost never the case and, so, the memory is a system bottleneck. For example, a state of the art high speed microprocessor may be based on a 200 MegaHertz (MHZ) clock with a 5 nanosecond (ns) clock period. A high performance DRAM may have a 60 ns access time, which falls far short of processor performance.
This system bottleneck is exacerbated by the rise in popularity of multimedia applications. Multimedia applications demand several times more bandwidth for main memory or frame-buffer memory than computational intensive tasks such as spread sheet analysis programs or, other input/output (I/O) intensive applications such as word processing or printing.
Extended Data Out (EDO) and Synchronous DRAMs (SDRAMs) were developed to improve bandwidth. However, SDRAMs and EDO RAMs still do not match processor performance and, therefore, still limit system performance. Consequently, as faster microprocessors are developed for multimedia processing and high performance systems, faster memory architecture is being developed to bridge the memory/processor performance gap, e.g., wide I/O DRAMs.
Recent developments predict a major turning point for memory devices and related subsystems with a shift to high speed/narrow I/O devices. Although these new devices offer a significant increase in burst speeds, they do not offer improvements in latency for initial accesses. That is, for an initial access or page hit, it typically takes a number of clock cycles before the data read out from the DRAM appears at the DRAM chip pins.
Thus, there is a need for high bandwidth DRAM chips that have a decreased page-hit latency.

Narrow data width DRAM with low latency page-hit operations

International Business Machines Corporation