A PSRAM features a mode register set (MRS) for setting a mode register at a combined synchronous and asynchronous mode. The PSRAM having a combined synchronous and asynchronous mode register set includes a MRS, a mode register control unit, a plurality of control signal buffers, an address buffer, a clock buffer, and a synchronous and asynchronous detecting unit. Here, the plurality of control signal buffers, the address buffer and the clock buffers are controlled by a chip selecting signal at an asynchronous mode, and are operated synchronously with respect to an internal clock outputted from the clock buffer regardless of the chip selecting signal at a synchronous mode.

1. Field of the Invention
The present invention generally relates to a pseudo static random access memory (hereinafter, referred to as "PSRAM"), and more specifically, to a PSRAM having a mode register set (hereinafter, referred to as "MRS") for setting mode registers at a combined synchronous and asynchronous mode.
2. Description of the Prior Art
Generally, a Dynamic Random Access Memory (hereinafter, referred to as "DRAM") memorizes information with charges in a cell capacitor, transmits accumulative charges to a corresponding bit line through an access transistor, and reads data amplified by a sense amplifier.
Since a memory cell of the DRAM that comprises one access transistor and one cell capacitor occupies a small area, a memory of high capacity can be embodied with the small area.
Meanwhile, a memory device becomes smaller for high-speed operation, reduction of consumed current and miniaturization of the processing system. As the memory device becomes smaller, a memory cell capacitor also becomes smaller so that storage capacitance of the memory cell capacitor is reduced. As a result, the amount of retention charges becomes smaller although data having the same voltage level are inputted to the capacitor.
In order to compensate the reduction in the amount of retention charges, a refresh operation is periodically performed. In the refresh operation, data stored in the cell capacitor are transmitted to a bit line, amplified in a sense amplifier, and then re-written in the cell capacitor.
As result, when data retention characteristics are degraded in the miniaturized device, a refresh cycle is required to be set short in order to compensate the degradation of the data retention characteristics. However, when the refresh cycle is set short, an external processing unit cannot access the DRAM during the refresh operation, thereby degrading the performance of the processing system. Additionally, the amount of consumed current for performing the refresh operation increases when the refresh cycle becomes short. The short refresh cycle does not satisfies the low standby current condition required in a data retention mode of battery driving portable devices, and is not applied to the battery driving portable devices which require low power consumption.
In order to solve the problem of the refresh operation in the DRAM, a PSRAM has been used to operate the DRAM as a SRAM. In the PSRAM, a cycle for reading and writing data and a refresh cycle for performing a refresh operation are successively performed in one of memory access cycles. In other words, since the refresh operation is performed in one access cycle, the refresh can be hidden to the external access so that the DRAM may be operated as the SRAM seemingly.
FIG. 1 is a block diagram of a conventional PSRAM.
The conventional PSRAM comprises a MRS 2, a mode register control unit 4, a CRE buffer 6, a /CS1 buffer 8, a /WE buffer 10 and an address buffer 12.
The mode register control unit 4 outputs an address buffer control signal REGADDIN, a MRS write signal REGWR and a MRS update signal REGUP in response to an output signal CREIN from the CRE buffer 6, a chip selecting signal CSB outputted from the /CS1 buffer 8 and a write active signal WEB outputted from the /WE buffer 10.
The address buffer 12 directly outputs an address inputted in response to an address buffer control signal REGADDIN without address strobe latch.
FIG. 2 is a circuit diagram of the MRS 2 of FIG. 1.
The MRS 2 comprises a plurality of MRS. Each MRS comprises serially connected registers 14 and 16, inverters IV1 and IV2, and transmission gates TG1 and TG2. The transmission gate TG1 selectively transmits an address ADDREG<0> outputted from the address buffer 12 to a first register 14 in response to the MRS write signal REGWR and a signal inverted by the inverter IV1. The transmission gate TG2 selectively transmits an address outputted from the first register 14 to a second register 16 in response to a MRS update signal REGUP and a signal inverted by the inverter IV2. Here, the register 14 having an inversion latch type includes inverters IV3 and IV4, and the register 16 having an inversion latch type includes inverters IV5 and IV6.
FIG. 3 is a circuit diagram of the mode register control unit 4 of FIG. 1.
The mode register control unit 4 comprises inverters IV7, IV8 and IV9, a NAND gate ND1, a NOR gate NR1 and high pulse generators 18 and 20.
The inverter IV7 inverts the signal CREIN, the inverter IV8 inverts the write active signal WEB and the inverter IV9 inverts the chip selecting signal CSB.
The NAND gate ND1 performs a NAND operation on output signals from the inverters IV8 and IV9.
The NOR gate NR1 performs a NOR operation on output signals from the inverter IV7 and the NAND gate ND1, and outputs an address buffer control signal REGADDIN.
The first high pulse generator 18 generates a MRS update signal REGUP having a high pulse in response to the signal CREIN. The second high pulse generator 20 generates a MRS write signal REGWR having a high pulse in response to the address buffer control signal REGADDIN.
Here, the address buffer control signal REGADDIN is activated to a high level if the signal CREIN is activated to a high level when the chip selecting signal CSB is activated to a low level and the write active signal WEB is activated to a low level. That is, the NAND gate ND1 outputs a low level signal when the chip selecting signal CSB and the write active signal WEB are all at a low level. The NOR gate NR1 outputs a high level signal in response to a low level signal outputted from the NAND gate ND1 when the signal CREIN is at the high level.
The MRS write signal REGWR is generated from the high pulse generator 20 in response to the address buffer control signal REGADDIN. That is, the address buffer control signal REGADDIN is activated to a high level, delayed for a delay time of the first high pulse generator 18, and then the MRS write signal REGWR having a high pulse is generated so that an address REGADD<0:x> outputted from the address buffer 12 is written in the first register 14 of the MRS 2.
The MRS update signal REGUP is generated from the high pulse generator 18 in response to the signal CREIN. When the signal CREIN is inactivated to a low level, the first high pulse generator 18 generates the MRS update signal REGUP having a high pulse so that the address stored in the first register 14 is updated to the second register 16.
Currently, various modes such as a synchronous mode, a asynchronous mode or a combined mode can be simultaneously supported to satisfy various specifications required in product market. However, since the conventional PSRAM is operated at the asynchronous mode, it cannot be used at the combined mode.

Pseudo SRAM having combined synchronous and asynchronous mode register set


A UV-emitting phosphor is described wherein the phosphor is excitable by vacuum ultraviolet radiation (VUV). The phosphor is a gadolinium-activated strontium magnesium aluminate which preferably has an excitation maximum at about 172 nm. The phosphor exhibits a narrow-band UV emission at about 310 nm which makes it useful for medical phototherapy applications.

The use of ultraviolet (UV) radiation for medical phototherapy is well established. In fact, UV therapy is now involved in the treatment of more than 40 types of skin diseases and disorders such as psoriasis, vitiligo and eczema. Phototherapy studies of UVB wavelengths between 260 nm and 320 nm have found that a narrow-band UVB emission centered at approximately 312 nm is most effective for phototherapy while at the same time limiting undesirable erythemal effects. Since the skin's erythemal (or sunburning sensitivity) is at its maximum at about 297 nm, a narrow-band emission at about 312 nm allows a patient to have longer treatment times before an erythemal response appears.
The Gd3+6P7/2-->8S transitions are ideal for 312 nm narrow-band emissions. However, f-f transitions of rare earths, being parity forbidden, are very weak and the use of a sensitizer is necessary to obtain a useful emission intensity. One of the first narrow-band UVB phosphors to be developed was sensitized with bismuth, e.g., (Gd0.5,La0.487)B3O6:Bi0.013. On excitation by 254 nm radiation, this borate phosphor emits the characteristic radiation with a very narrow band centered on 312 nm. However, because of the toxicity of the bismuth sensitizer, other narrow-band UVB phosphors were developed, in particular YMgB5O10:Gd,Ce (U.S. Pat. Nos. 4,319,161 and 6,007,741), and YMgB5O10:Gd,Ce,Pr (U.S. patent application Ser. No. 10/907,349, filed Mar. 30, 2005).
For the most part, UV-emitting phosphors have been optimized for excitation by the 254 nm emission of the low-pressure mercury discharge used in conventional fluorescent lighting. However, because of environmental concerns, there is a growing need for mercury-free lighting technologies. One such technology is the xenon discharge lamp which produces radiation at about 172 nm in the vacuum ultraviolet (VUV) region of the electromagnetic spectrum. It would be advantageous to develop phosphors which are optimized for excitation in the VUV region and could be used in a Xe-discharge lamp for medical phototherapy.

UV-emitting phosphor and lamp containing same


Methods include holding a sample with a movement stage configured to rotate the sample about a rotation axis, directing an imaging beam to a first sample location with the sample at a first rotational position about the rotation axis and detecting a first transmitted imaging beam image, rotating the sample using the movement stage about the rotation axis to a second rotational position, and directing the imaging beam to a second sample location by deflecting the imaging beam in relation to an optical axis of the imaging beam and detecting a second transmitted imaging beam image, wherein the second sample location is spaced apart from the first sample location at least at least in relation to the optical axis. Related systems and apparatus are also disclosed.

Tomography is a set of imaging techniques that involves taking numerous images of an object with energy that penetrates the object's interior and then using the images of the object to produce a three-dimensional reconstruction of the object with one or more reconstruction algorithms, such as filtered back projection or iterative reconstruction. Tomography examples include magnetic resonance imaging, CT scanning, and ultrasound tomography, but many other techniques and radiative energy sources exist. Electron-based tomography, such as electron tomography or cryogenic electron tomography are also tomographic approaches and are generally applicable to tomographic imaging of small samples, e.g., from microns to the atomic scale, given the shorter wavelength of the imaging particles. However, problems remain in electron-based tomography, including poor image-to-image alignment, missing wedges where tilt-series image sets are used, and an overall inadequate imaging quality with low dose exposure and noisy images. In particular, imaging quality can be impacted by drifting of the sample being imaged and contamination of the sample that can occur during the image acquisition process. Thus, a need remains for improvements to electron-based tomographic approaches.

Beam trajectory via combination of image shift and hardware alpha tilt


To reduce collision noise created by the operation of an electromagnetic suction valve provided on a high pressure fuel supply pump. In the present invention, in order to achieve the above object, the mass of a member which collides by magnetic attractive force is reduced to reduce the noise to be generated. The thus configured present invention provides the following advantageous effects. The noise generated when a core and an anchor collide with each other by magnetic attractive force depends on the magnitude of the kinetic energy of a moving element. The kinetic energy to be consumed in the collision is only the kinetic energy of the anchor. The kinetic energy of a rod, being absorbed by a spring, does not contribute to the noise; thus, the energy when the anchor and the core collide with each other can be reduced, whereby the noise to be created can be reduced.

In a high pressure fuel supply pump equipped with a conventional electromagnetic suction valve described in JP 2002-48033 A, the electromagnetic suction valve is in a valve-opened state where the suction valve is opened by a biasing force of a spring when an electromagnetic coil is not supplied with current. When the electromagnetic coil is supplied with current, the suction valve is closed by magnetic attractive force generated in the electromagnetic suction valve. Accordingly, the opening-closing motion of the suction valve can be controlled by existence and non-existence of the current in the electromagnetic coil; consequently, the supply amount of high pressure fuel can be controlled.

High pressure fuel supply pump with electromagnetic suction valve


A battery pack has increased attachment strength of a protective circuit module molded from a resin on top of a rechargeable battery including an electrode assembly, a can, and a cap assembly. The reinforcement groove that is formed on the lead plate retains the molded portion, which has the protective circuit module therein, and increases the strength of the molded portion to the battery.

1. Field of the Invention
The present invention relates to a battery pack. In particular, the present invention relates to a battery pack that has increased attachment strength of a protective circuit module that is molded by a resin and is positioned on top of a battery that comprises an electrode assembly, a can, and a cap assembly.
2. Description of the Prior Art
Recently, rechargeable batteries have been widely researched and developed because they can be manufactured in a compact size and can provide significant amounts of voltage. Typical examples of rechargeable batteries that have recently been developed include nickel-hydrogen (Ni-MH) batteries, lithium (Li) batteries, and lithium ion batteries.
Generally, the battery (rechargeable or nonrechargeable) of a battery pack is formed by placing an electrode assembly comprising positive and negative electrode plates and a separator into a can that is made of aluminum or an aluminum alloy. The can is topped with a cap assembly, an electrolyte is injected into the can, and the can is sealed. When the can is made of aluminum or an aluminum alloy, the battery is lighter due to the low weight of aluminum and does not corrode even when it is used for a long period of time under a high voltage.
The battery normally has an electrode terminal that is positioned on top of the battery while being insulated from the periphery. The electrode terminal is connected to an electrode inside the battery and acts as either a positive electrode or a negative electrode. The can itself has the opposite polarity of the electrode terminal.
Under certain circumstances, a battery may discharge a large amount of energy at one time. In particular, a charged battery pack stores energy that has been supplied from another energy source during a charging process. When a malfunction such as an internal short circuit occurs, the energy that has accumulated in the battery is discharged quickly and may result in a fire or explosion.
In the widely-used lithium-based rechargeable batteries, the lithium itself has a high reactivity and is very likely to catch on fire or to explode when the battery malfunctions. In lithium ion batteries, lithium exists not in a metal state but in a much safer ionic state. However, the materials that are used as the negative electrode and the non-aqueous electrolyte are flammable and are very likely to catch fire or to explode when the battery malfunctions.
For these reasons, a battery pack is provided with various safety devices to prevent it from catching fire or exploding when it has been charged or while it is being charged. Such safety devices interrupt current flow when the temperature or voltage of the battery rises due to overcharging or over-discharging. The safety devices include a protective circuit module that is connected to the battery and is adapted to sense abnormal current or voltage and interrupt the flow of current, a positive temperature coefficient (PTC) thermistor that is actuated by overheating due to abnormal current, and a bimetal.
It is generally difficult to couple the electrode of a battery to the electrical terminal of a protective circuit module by direct welding because of the shape and composition of the battery. Therefore, a conductive structure referred to as a "lead plate" is used to couple the positive electrode and negative electrode of the battery to the electrical terminal of the safety device. The lead plate is usually made of nickel, nickel alloy, or nickel-plated stainless steel.
FIG. 1 is an exploded perspective view of a conventional lithium ion battery pack before it is coupled by a molded resin. FIG. 2 is a perspective view of a battery pack that has a protective circuit module that is molded from a molded resin and is attached to a battery.
Referring to FIG. 1 and FIG. 2, a can-type battery pack includes a battery 10 and a protective circuit module 20. The battery 10 includes a can 12 which contains an electrode assembly and is sealed on top by a cap plate 13.
The cap plate 13 has a size and a shape corresponding to the open top of the can 12. The cap plate 13 has a negative electrode terminal 14 that is formed at its center, as well as a negative electrode connection lead 16 and a lead plate 18 that are coupled to both sides of the top surface of the cap plate 13. An end of the negative electrode connection lead 16 is coupled to the negative electrode terminal 14 and a surface of the other end protrudes to the top surface of the cap plate 13. A surface of the lead plate 18 protrudes to the top surface of the cap plate 13.
Reference numeral 15 in FIG. 1 refers to an insulation plate that is positioned in between the negative electrode connection lead 16 and the cap plate 13.
The protective circuit module 20 includes a top surface that has external input and output terminals 22 and 23, respectively that are formed thereon. The bottom surface of the protective circuit module 20 has a circuit portion (not labeled) and connection terminals 26 and 28 that are formed thereon. The negative electrode connection terminal 26 and a positive electrode connection terminal 28 and are L-shaped so that they can be coupled to the negative electrode connection lead 16 and the lead plate 18 of the cap plate 13, respectively. The negative electrode connection lead 16 and the lead plate 18 of the cap plate 13 are generally coupled to the connection plates 26 and 28 by resistance spot welding.
The protective circuit module 20, as shown in FIG. 2, is molded by a molded portion 30 and is attached to the top of the battery. The external input and output terminals 22 and 23 are exposed to the top surface of the molded portion 30.
The protective circuit module 20 is fixed to the top of the battery 10 by forming a molded portion 30 from a resin. However, the cap plate 13 and the lead plate 18 that contacts the molded portion 30 are made of metal and the contact area is typically small. Consequently, the attachment strength of the protective circuit module 20 to the battery 10 is weak.
When the molded portion is subjected to a force in the lateral direction or when the bending external force that acts on the contact surface of the molded portion becomes larger, the molded portion may be easily twisted from the battery.

Battery pack including lead plate having reinforcement groove


One method of treating incinerated waste comprises: size separating at least some of the incinerated waste into a first undersize fraction comprising particles smaller than the first separation size and into a first oversize fraction comprising particles larger than the first separation size; size reducing at least some of the first oversize fraction; size separating at least some of the size-reduced first oversize fraction into a second undersize fraction comprising particles smaller than the second separation size and into a second oversize fraction comprising particles larger than the second separation size; combining at least some of the first undersize fraction and at least some of the second undersize fraction into a fine fraction; and extracting metal from at least some of the fine fraction. Another method of treating incinerated waste comprises extracting metal by froth flotation from at least some of the incinerated waste. Systems are also disclosed.

1, Field
The invention relates generally to waste treatment, and more particularly to methods of and systems for treating incinerated waste.
2, Related Art
Incineration of waste, such as municipal solid waste for example, may alleviate demands for landfills and for other ways of disposing of such waste. Incineration of waste in an incinerator generally produces: (1) flue gases such as carbon dioxide and water vapor for example; (2) fly ash, which escapes up a chimney of the incinerator; and (3) bottom ash, which collects on an incineration grate of the incinerator. Some or all of the bottom ash may be disposed of in a landfill, but doing so increases demands for landfills, which may be restricted in some areas, and metal from bottom ash disposed of in a landfill may pollute nearby water sources for example. Also, some or all of the bottom ash may be treated for use in various applications such as manufacture of concrete products for example. However, metal from bottom ash in concrete products may oxidize over time, causing gaseous hydrogen to be produced in the concrete products and potentially damaging the concrete products.

Methods of and systems for treating incinerated waste


A movable target for shooting practice, comprising a multiplicity of railtrack sections, which can be joined together, and a carriage which can be displaced along the assembled rail-track sections by means of a carriage drive and receives a target arrangement, whose target-retaining means, which receives at least one target such that it can be exchanged, can be moved between a neutral position and a target position by means of a target drive. The rail-track sections exhibit feet, which can be stacked one inside the other, and complementary connecting parts at the ends, and provision is made for end-side buffer stops with corresponding connecting parts, the carriage exhibiting, at one end, transporting wheels which are connected releasably to said carriage and of which the diameter is greater than that of the carriage wheels, and, at the opposite end, a handle.

The invention relates to a movable target for shooting practice.
Movable targets for shooting practice, in the case of which provision is made for a multiplicity of rail-track sections, which can be joined together, and a carriage which can be displaced along the assembled railtrack sections by means of a carriage drive and receives a target arrangement, whose target-retainer, which receives a target such that it can be exchanged, can be moved between a neutral position and a target position by means of a target drive, are known. Movable targets of this type are heavy and thus result in corresponding problems, as regards transportation, assembly and dismantling, on outdoor terrain.


A decomposition chamber for an aftertreatment system includes: a body comprising: an inlet configured to receive exhaust gas, an outlet configured to expel the exhaust gas, a thermal management chamber in fluid communication with the inlet, the thermal management chamber configured to receive an exhaust gas first portion from the inlet, an exhaust assist chamber in fluid communication with the inlet, the exhaust assist chamber configured to receive an exhaust gas second portion from the inlet, and a main flow chamber in fluid communication with the inlet, the main flow chamber configured to receive an exhaust gas third portion from the inlet, receive the exhaust gas first portion from the thermal management chamber, and receive the exhaust gas second portion from the exhaust assist chamber.

Exhaust aftertreatment systems are used to receive and treat exhaust gas generated by IC engines. Generally exhaust gas aftertreatment systems comprise any of several different components to reduce the levels of harmful exhaust emissions present in exhaust gas. For example, certain exhaust gas aftertreatment systems for diesel-powered IC engines comprise a selective catalytic reduction (SCR) system, including a catalyst formulated to convert NOx (NO and NO2 in some fraction) into harmless nitrogen gas (N2) and water vapor (H2O) in the presence of ammonia (NH3).
Generally in such aftertreatment systems, an exhaust reductant (e.g., a diesel exhaust fluid such as urea) is injected into the SCR system to provide a source of ammonia and mixed with the exhaust gas to partially reduce the NOx gases. The reduction byproducts of the exhaust gas are then fluidly communicated to the catalyst included in the SCR system to decompose substantially all of the NOx gases into relatively harmless byproducts that are expelled out of the aftertreatment system.
Aftertreatment systems often include a decomposition chamber or tube upstream of the SCR system. The reductant is inserted in the decomposition chamber which serves to provide a passage to allow decomposing, mixing and distribution of the reductant with the exhaust gas before the exhaust gas flows into the SCR system. Conventional decomposition chambers have substantial axial lengths, which requires more packaging space and may also exert a higher pressure drop on the exhaust gas. Furthermore, conventional decomposition chambers experience heat loss due to inefficient thermal management which leads to formation of reductant deposits.

This patent is subject to a terminal disclaimer.

Decomposition chamber for aftertreatment systems


A laminate for honeycomb structures comprised of two outside layers having good surface adhesion and a tough core layer, said core constituting from 50 to 70% by weight of the laminate and containing from about 60 to 80% by weight of poly(m-phenylene isophthalamide) fibrids and each outside layer constituting from 15 to 25% by weight of the laminate and containing about 60 to 70% by weight of floc.

Structures comprising a honeycomb core impregnated with a matrix resin wherein the core is a nonwoven paper of poly(m-phenylene isophthalamide) (MPD-I) fibrids and poly(p-phenylene terephthalamide) (PPD-T) fibers is taught in Lin U.S. Pat. No. 5,137,768.
As described in the Lin patent, the honeycomb structure is prepared by cutting individual sheets from a roll of paper, applying stripes or node lines of adhesive to the sheets and laying the sheets together. The adhesive is activated to bond the layers along the stripes. The expanded honeycomb structure is formed by pulling the sheets apart to the point where the adhesive prevents further separation. It is then dipped in epoxy or phenolic resin to impregnate the paper. Lin points out that saturation of the paper by matrix resin is important to the honeycomb properties and for this reason, paper containing no more than 50 wt. percent of fibrid is employed. An excess of fibrids seals off the paper so that the striping adhesive does not adhere adequately. It also prevents the matrix resin from penetrating sufficiently to develop the desired honeycomb properties. On the other hand, too little fibrid in the sheet results in a lack of adequate toughness.

Tough layered papers with improved surface adhesion


An apparatus and method for treating a semiconductor process gas comprises a gas inlet allowing a treatment target gas (or gas to be treated) to flow therethrough; a catalytic reaction portion including a catalyst and configured to allow the treatment target gas to be brought into contact with the catalyst; a space velocity controller between the gas inlet and the catalytic reaction portion, the space velocity controller extending from the gas inlet in a diagonal direction in relation to the gas inlet; a differential pressure buffer portion between the space velocity controller and the catalytic reaction portion and including a filter; and a gas outlet configured to externally discharge a product formed as the treatment target gas comes into contact with the catalyst.

The present inventive concepts relate to an apparatus for treating a semiconductor process gas and a method of treating a semiconductor process gas, and more particularly, to an apparatus for treating a semiconductor process gas and a method of treating a semiconductor process gas capable of inhibiting formation of byproducts by a catalytic reaction of a process gas or an exhaust gas remaining after a semiconductor process.
In line with increasing demand for high performance, high speed, and/or multi-functionality in semiconductor devices, the degree of integration of semiconductor devices has increased. With the trend for high integration of semiconductor devices, the amount of a semiconductor process gas used to uniformly grow a film has gradually increased. An unreacted process gas discharged without forming a film of a semiconductor wafer may participate in an unintended chemical reaction to form powdery byproducts.

Apparatus for treating semiconductor process gas and method of treating semiconductor process gas


Systems and methods for determining a touch input are provided. The systems and methods generally include measuring the peak voltage at an electrode over a measurement period and determining a touch input based on the peak voltage. The systems and methods can conserve computing resources by deferring digital signal processing until after a peak electrode capacitance has been sampled. The systems and methods are suitable for capacitive sensors using self-capacitance and capacitive sensors using mutual capacitance. The systems and methods are also suitable for capacitive buttons, track pads, and touch screens, among other implementations.

The present invention relates to systems and methods for detecting a touch input.
Touch inputs are widely used as an input methodology. For example, touch inputs are used in conjunction with appliances, tablets, and smartphones. Touch inputs can be determined based on a capacitive output of an electrode. According to one known method, the value of the capacitive output is used to determine the presence of a touch input on a substrate or the location of a touch input on a two-dimensional panel.
FIG. 1 illustrates a known circuit for detecting a touch input using self-capacitance. The circuit includes a measurement circuit and a signal processing circuit. The measurement circuit includes a voltage source (Vdd), electrodes for eight capacitive buttons (Ce1, Ce2 . . . Ce8), and a sampling capacitor (Cs). Each electrode is independently sampled. The output of each electrode is forwarded to the signal processing circuit. The signal processing circuit includes an amplifier, an analog-to-digital converter, and a time domain differential signature processing circuit. The signal processing circuit includes an output response, for example a digital signal indicative of the time of a touch input at one of the eight capacitive buttons.
FIG. 2 illustrates another known circuit for detecting a touch input using mutual-capacitance. The circuit of FIG. 2 includes the signal processing circuit of FIG. 1, however the measurement circuit is modified to include an electrode pairing for each of the eight capacitive buttons. The voltage source (Vdd) provides a stimulus voltage to sequential ones of the electrode pairings. The output of each electrode pairing is forwarded to the signal processing circuit. The signal processing circuit amplifies each output before converting each output into a digital signal for time domain differential processing. The output response includes a digital signal indicative of the time of a touch input at one of the eight capacitive buttons.
The circuits of FIGS. 1-2 digitally process each electrode output sampled by the measurement circuit. This scheme is potentially burdensome, particularly if rapid measurements are required for the time domain differential processing circuit. Accordingly, there remains a continued need for circuits and methods that rapidly measure electrode capacitance while minimizing computing resources, optionally for use in conjunction with time domain differential processing methods.

Simultaneous time domain differential sensing and electric field sensing


A maintenance system for maintaining a scalable printhead array comprises: a pair of tracks disposed in parallel and on opposite sides of a printhead array; a shaft extending between the tracks and configured to engage with each track to move along the tracks; a plurality of maintenance modules mounted in series along the shaft between the tracks and configured to move along the tracks with the shaft to perform maintenance operations on a plurality of printheads of the printhead array, the tracks being configured to guide the shaft and the plurality of maintenance modules along a path from a resting position to an operating position the printhead array and from which at least one of the plurality of maintenance modules performs a maintenance operation on at least one printhead of the printhead array; and an actuator configured to move the shaft along the tracks.

Inkjet printing is a process of producing an image on a substrate, such as a sheet of paper. Inkjet printing is an additive process in which one or more printheads eject drops of ink onto the substrate to form the image on the substrate. The printheads are operated with reference to digital image data that represents the image to be printed. Printing a multicolored image generally requires at least one printhead for each color. Additionally, printing high resolution images often requires multiple printheads of the same color that are interlaced to provide the increased resolution. Accordingly, many inkjet printing systems comprise arrays of several printheads arranged in rows and columns.
FIG. 20 shows a prior art architecture for a scalable printhead array 100. The printhead array 100 includes a plurality of printhead assemblies 104. The printhead array 100 is configured to include a variable number of printhead assemblies 104 arranged into rows and columns in a variety of possible arrangements. As shown, the printhead array 100 is scalable up to 50″ in width and includes fourteen printhead assemblies 104. Each printhead assembly 104 is configured to receive a printhead 108 and to mount to frame 112 of the printhead array 100. FIG. 21 shows a more detailed view of one of the printhead assemblies 104 with a printhead 108.
To ensure optimal performance of an inkjet printhead, the printheads must be well-maintained. Typically maintenance operations include purging, capping, and wiping. Prior art mechanisms for printhead maintenance are not easily adapted for scalable printhead arrays. Being able to configure a printhead maintenance system so it is easily scalable for use with a scalable printhead array would be beneficial.


An active device array substrate includes pixel units, scan lines, data lines, electrostatic discharge (ESD) protection elements, a short ring and an ESD biased generator. Each pixel unit is electrically connected to the corresponding scan line and data line. Each ESD protection element has a first connection terminal, a second connection terminal and a third connection terminal, wherein the first connection terminal is electrically connected to one of the corresponding scan line and data line, the second connection terminal is electrically connected to the short ring, and the third connection terminal is electrically connected to the ESD biased generator. As an ESD stress occurs, the ESD biased generator provides a voltage to the ESD protection elements to turn on them. It causes that the accumulated electrostatic charges are conducted into the lowest potential of the substrate through the short rings, so as to prevent the pixel units from ESD damaging.

1. Field of Invention
The present invention relates to an active device array substrate, and particularly to an active device array substrate with an electrostatic discharge (ESD) protection circuit.
2. Description of the Related Art
Along with the modern video technology progress, liquid crystal display (LCD) apparatuses have been largely used as display screens in various electronic products, such as mobile phones, notebook computers, PCs and personal digital assistants (PDAs). In general, an LCD includes a thin film transistor (TFT) array substrate, a color filter substrate and a liquid crystal layer, wherein the TFT array substrate and the color filter substrate are assembled together, and the liquid crystal layer is located between the TFT array substrate and the color filter substrate. By means of all the TFTs in the TFT array substrate to modulate the orientations of the liquid crystal molecules in the liquid crystal layer, the light beam intensity is controlled for displaying images.
During a process for fabricating an LCD apparatus, however, the manufacturing equipment, the operators and the TFT array substrate itself are likely accumulated with a lot of electrostatic discharges, i.e. ESD stressed. Thus, once the TFT array substrate is contacted with the manufacturing equipment, the operators or other charged objects during the production process, an ESD phenomenon is triggered. Due to the fine conductive traces and elements of a TFT array substrate, a minor ESD event often causes a serious result where the affected LCD apparatus is entirely discarded. In order to solve the problem that an ESD event damages an LCD apparatus, a TFT array substrate usually includes an ESD protection circuit.
FIG. 1 is a diagram of a conventional TFT array substrate. Referring to FIG. 1, a conventional TFT array substrate 100 includes pixel units 110, scan lines 120, data lines 130, bonding pads 140, back-to-back diodes 150 and a short ring 160. Each pixel unit 110 includes a TFT 112 and a pixel electrode 114, and the pixel units 110 arranged in an array are electrically connected to the corresponding scan lines 120 and data lines 130, respectively. An end of each scan line 120 and an end of each data line 130 are electrically connected to the corresponding bonding pads 140, while the bonding pads 140 are electrically connected to the short ring 160 via the corresponding back-to-back diodes 150.
The back-to-back diode 150 has a turned on voltage which is adding up a forward-biased voltage of a diode and a reveries-biased voltage of a diode. When an ESD stress occurs on the TFT array substrate 100, the voltage of the built-up electrostatic charges is usually larger than the turn-on voltage of the back-to-back diode 150 so as to turn on the back-to-back diode 150. Consequently, the electrostatic charges would be conducted to the short ring 160 through the back-to-back diode 150, so as to avoid the electrostatic charges from flowing into the pixel units 110 to damage the TFTs 112. On the other hand, during testing the TFT array substrate 100, the testing operation voltage is normally not larger than the turn-on voltage of the back-to-back diode 150, thus an open circuit status is presented between the bonding pad 140 and the short ring 160. That is, there is no interactive voltage influence between the scan line 120 and the data line 130 to affect the normal operations of the pixel units 110.
In order to avoid large current leakage occurs in the back-to-back diode 150 to affect the operation signals between the scan line 120 and the data line 130, it is better that the turned on voltage of the back-to-back diode 150 is larger so as to reduce the effect to the TFT array substrate 100. However, if the turned on voltage of the back-to-back diode 150 is increased, the pixel units 110 are damaged by the ESD charges when the TFT array substrate 100 is subjected to the ESD stress occurred inside or outside the TFT array substrate 100. Therefore, how to design the turned on voltage of the back-to-back diode 150 is important.
After the TFT array substrate 100 is completely fabricated, the wiring circuits between all the bonding pads 140 and the short ring 160 are electrically cut off, following by the subsequent processes. During the successive assembly process however, the TFT array substrate 100 likely accumulates electrostatic charges, and at the point, the TFT array substrate 100 has disabled the ESD protection function already, which puts the TFT array substrate 100 in jeopardy to be damaged by an ESD event.
FIG. 2 is a diagram of another conventional TFT array substrate. Referring to FIG. 2, the conventional TFT array substrate 200 includes pixel units 210, scan lines 220, data lines 230, bonding pads 240, bi-forward diodes 250 and a first short ring 260, a second short ring 270 and a power control circuit 280. The pixel units 210 are electrically connected to the corresponding scan lines 220 and data lines 230, respectively. An end of each scan line 220 and an end of each data line 230 are electrically connected to the corresponding bonding pads 240. Each of the bi-forward diodes 250 includes two diodes 250a and 250b, while the bonding pads 240 are electrically connected to the first short ring 260 via the corresponding diodes 250a and then electrically connected to the second short ring 270 via the corresponding diodes 250b. In addition, the power control circuit 280 is electrically connected to the first short ring 260 and the second short ring 270.
As an ESD event occurs, all of the three voltage levels of the power supply 290 are 0V. When the accumulated electrostatic charges are conducted to the first short ring 260 via the diode 250a or 250b and then conducted to the second short ring 270 through the power control circuit 280, the ESD charges are rapidly transferred to the lowest voltage level on the TFT array substrate 200. Thereby, the accumulated electrostatic charges are neutralized so as to avoid the accumulated electrostatic charges from flowing into the pixel units 210 on the TFT array substrate 200 to cause fatal failure. On the other hand, prior to operating the TFT array substrate 200, a power supply 290 is electrically connected to the ESD protection circuit 280 to provide the ESD protection circuit 280 with a high voltage Vdd, a low voltage Vss and a medium voltage Vm. Hence, the ESD protection circuit 280 is able to keep the first short ring 260 in the high voltage Vdd and keep the second short ring 270 in the low voltage Vss. Note that the operation voltage for the TFT array substrate 200 is between the high voltage Vdd and the low voltage Vss, thus each diode 250a and each diode 250b are reversely biased, which establishes open circuit statuses between the bonding pads 240 and the first short ring 260, and between the bonding pads 240 and the second short ring 270. That is, there is no interactive voltage influence between the scan lines 220 and the data lines 230 to affect the normal operations of the pixel units 210.
In the conventional method, the first and second short ring 260, 270 are electrically cut off, following by the subsequent processes. During the successive assembly process however, the TFT array substrate 200 likely accumulates electrostatic charges, and at the point, the TFT array substrate 200 has disabled the ESD protection function already, which puts the TFT array substrate 100 in jeopardy to be damaged by an ESD event.

Active device array substrate having electrostatic discharge protection capability


A latch for a sliding door of a truck or the like comprises a housing, a latch bar mounted to the housing for pivotal movement and spring means biasing the latch bar towards a latched position. An outboard cam is rotatably mounted to the housing for camming engagement with the latch bar. An outside handle is mounted to the outboard cam. An inboard cam is rotatably mounted to the housing for camming engagement with the latch bar and an inside handle is mounted to the inboard cam. A lock slide is mounted for manual movement into and out of locking engagement with the outboard cam. A mechanism is also included for moving the lock slide when positioned in the locking position out of the locking position in response to pivotal movement of the latch bar.

Package delivery trucks, which have also been referred to as panel trucks and vans, typically have one or more sliding doors. By gripping a door handle on the inside or outside, the door may be manually moved between positions closing and opening a doorway in the truck body. These doors typically have a latch coupled with the two handles which holds the door in a fully opened or fully closed position by engagement with strikes mounted adjacent each end of the door run above its track. The door in its closed position may thus be unlatched and slide open from either side of the door by rotation and pulling the inside or outside handle. For security these latches have also been provided with manually operable inside locks which prevent the door from being opened from the outside while a worker is inside. This has commonly been in the form of a lock bar that may be moved into and out of locking engagement with an internal cam that is operated by the outside handle that cams the latch out of latching engagement with a strike. Exemplifying such sliding door latches are those latches of the model 4000 series that have been sold for the past 30 years by Kason Industries, Inc. of Shenandoah, Georgia.
A persistent problem associated with these sliding door latches has been their propensity to lock out authorized users by accident. Too often a worker who has locked the latch while working inside the vehicle will forget to unlock it upon his departure. Once outside the vehicle the worker can slide the door shut, even using the outside handle, whereupon he or she is now unintentionally locked out.
Heretofore efforts to incorporate a lock self-cancelling feature into sliding door latches have been made but without practical, commercial success. These efforts have involved more costly designs with retrofit inability. Thus there has long existed a need for a sliding door latch with an inside lock that has means for automatically canceling or unlocking the latch lock upon the latch being operated over the strike after having locked. It is to the provision of such that the present invention is primarily directed.

Sliding door latch with lock-out protection


A content addressable memory (CAM) device (400) can sequentially apply command and key data to different sections (404-1 to 404-4). Within each section, CAM cores (402-11 to 402-44) can be sequentially activated. Current surges when transitioning from an idle state to an active state, or vice versa, can be significantly reduced with additional latency but no loss in throughput.

Content addressable memory (CAM) devices, sometimes also referred to as "associative memories", can provide rapid matching functions between an applied data value (e.g., a comparand, compare data, or search key) and stored data values (e.g., entries). Such rapid matching functions are often utilized in routers, network switches, and the like, to process network packets.
A typical CAM device can store a number of data values in a CAM cell array. In a compare (i.e., search) operation, entries can be compared to a compare data value (i.e., key). An entry that matches the key can result in the generation of a match indication.
In a conventional CAM device, search operations can be conducted in response to a system clock, with searches being undertaken every clock cycle. As a result, CAM devices can draw considerable current as match lines in the CAM cell array are continuously charged and discharged each clock cycle.
Current draw in CAM device can be particularly problematic in the case of a "cold start" operation. A cold start operation can occur when a CAM device switches from an idle state, in which the various CAM array sections of the device are not operational, to an active state, in which CAM array sections perform various functions, such as a search operation.
Existing conventional approaches can transition from an idle state to a full active state (e.g., search) in a single cycle. This can potentially happen on every other cycle as the CAM executes requests within a system. When CAM device portions (i.e., cores or blocks) go from an idle to an active state, there can be a very large change in the current requirement for the device. In current generation parts, such a current surge can be too large for the on-chip capacitance to support and can happen too quickly for capacitors to respond on circuit boards associated with the CAM device.
Still further, parasitic inductance of a package containing a CAM device, as well as inductance inherent in a CAM device mounting arrangement can prevent a fast ramp up of the current, preventing an adequate current supply when needed by the CAM device.
The above deficiencies can result in a power supply voltage "sag" (i.e., level dip) within the CAM device. In addition, the rapid change in current (dl/dt) through parasitic inductive elements can give rise to ground "bounce" (transient jump in a low supply voltage level), which can further disturb CAM operations. These undesirable variations in supply voltages can lead to failures. Such failures are often referred to as "cold start" failures or problems.
To better understand various feature and advantages of the disclosed embodiments of the present invention, examples of other CAM device cold start operations will now be described with reference to FIGS. 6, 7A and 7B.
FIG. 6 is a block diagram of one approach for reducing overall transient current in a CAM device. In the arrangement of FIG. 6, a CAM device 600 can be divided into two halves 602-0 and 6021, with each half performing a search on opposite edges of a clock signal. In particular, on one type of clock transitions (e.g., low-to-high), one side 602-1 (SIDE B) can precharge match lines, while other side 602-0 (SIDE A) evaluates (i.e., compares a search key to data in CAM entries). On the other clock transition (e.g., high-to-low), the two sides operate in the opposite fashion
Such an arrangement can help to spread out current demand within a cycle, however, as CAM devices increase in capacity and operating speed, such an approach may not be sufficient to eliminate cold start and related problems.
A more detailed example of CAM device having alternate activation of sides according to a clock signal is shown in FIG. 7A, and designated by the general reference character 700. CAM device 700 can include a number of CAM blocks 702-1 to 702-8. The CAM blocks are arranged into one side 704-0, that includes CAM blocks (702-1 to 702-4), and into another side 704-1, that includes CAM blocks (702-5 to 702-8).
The CAM blocks of side 704-0 receive command and search key data from an input bus 706, and are commonly activated according to a first clock signal CLK. In the case of a search command, search results are latched on CLKB and output to an output latch 708.
The CAM blocks of side 704-1 can also receive command and search key data from an input bus 706. However, the CAM blocks of this side are commonly activated according to a second clock signal CLKB, which can be the inverse of the first clock signal. Results from this side 704-1 can be output to priority logic 710. In addition, same search results from the other side 704-0 can be output from output latch 708 to priority logic 710.
The operation of the arrangement of FIG. 7A is shown in FIG. 7B. FIG. 7B is a timing diagram that includes waveforms for the first and second clock signals CLK and CLKB. In addition, the state of each CAM block is shown (CAM1 to CAM8), along with a device current supply ISUPP, and change in device current ΔI.
FIG. 7B shows a CAM device going from an idle state to an active state at time t0. That is, the CAM device undergoes a "cold start" at time t0.
As shown by the ISUPP and ΔI waveforms, on a first type transition of the clock signal (CLK low-to-high), a current surge can occur as the CAM blocks of one side of the CAM device are activated. Similarly, in the next clock transition at time t1 (CLK high- to-low), a second current surge can occur. A theoretical current rate limit is shown as "Δlcollapse". This limit represents a current surge value at which errors can occur and/or device reliability can be compromised.
The above noted current surges can cause supply dips, which in turn, can cause device failures.
One very a particular type of device failure is shown in FIGS. 8A and 8B. FIG. 8A is a block schematic diagram of a CAM entry and corresponding match detect circuitry. It is understood that such a structure is repeated numerous times within each CAM block.
FIG. 8A shows a CAM entry 800 that can include a number CAM cells commonly connected to a match line ML. A CAM entry 800 can compare a stored data value with compare data (key) CD. A match line ML can provide one input to a match sense amplifier MSA. An MSA can determine a match/no-match according to a comparison between an input voltage SAIN (which corresponds to a match line voltage) and a threshold voltage Vthresh for the MSA.
FIG. 8B shows one example of how a cold-start error can occur. FIG. 8B is a timing diagram showing a clock signal CLK, power supply levels VDD and VSS, and various sense waveforms.
The sense waveforms show a match line voltage ML, a sense input potential SAIN, as well as two sense voltage waveforms, one corresponding to an ideal case VSENSE(IDEAL), such as that when a CAM device has executed a series of sequential search operations and thus has fully "ramped-up" power supply levels. The other waveform VSENSE(COLD) corresponds to a cold start case, such as when a CAM device transitions from idle to a search operation.
Referring still to FIG. 8B, on the rising edge of clock signal CLK, one half (SIDEA) of a CAM device can precharge a match line in preparation for the search and the other half (SIDEB) of the device can execute the search. In particular, on a falling edge of the clock signal CLK, a SIDEB half precharges a match line in preparation for the next search while the SIDEA half executes the search. As shown in the figure, a current surge on each edge of clock CLK can cause a low supply VSS (e.g., ground) to rise and high supply VDD to sag. This can effectively lower a level of the 'match' trip point (Vthresh). This is represented by the difference in the VSENSE(IDEAL) and VSENSE(COLD) levels.
A typical CAM arrangement will have some predetermined setup time, for the latch to correctly latch the data after which match data can no longer be compared. That is, a match result value would need to be sensed and latched prior to the setup time period. FIG. 8B shows two time periods, a setup time for the ideal case Tsetup(IDEAL), which begins at time t2, and another for a cold start case Tsetup(COLD), which begins at time t3.
A comparison between the ideal and cold-start cases demonstrates how cold-start errors can occur. In the ideal case, prior to time t2, a sense node potential SAIN falls below a sense voltage VSENSE(IDEAL). This can indicate a MISS result. In contrast, in the cold start case, a sense voltage VSENSE(COLD) can remain above the level needed to indicate a miss for a longer duration. The result can be a setup time, Tsetup(COLD), that can be "pushed" out beyond the necessary setup time Tsetup for a latch. Consequently, search result logic can indicate a hit when the search actually results in a miss.
It is believed that the above-described errors are most likely to occur in the case of a single bit miss, where a single exclusive-OR (XOR) stack within one CAM cell of an entry has to discharge an entire match line. If more than one bit misses, then two or more XOR stacks can pull the match line low, and the match line can discharge much more quickly, and so is more likely to fall below a sense voltage potential prior to a setup time Tsetup.
Increases in supply current surges, like those noted above, can result in other drawbacks. When the current demand stops at the end of a long sequence of searches, the inductance of the packaging can keep current flowing, resulting in a boost in supply voltage levels. Such rises in the supply voltages can stress the gate oxide of metal-oxide-semiconductor (MOS) type transistors, increasing the possibility of oxide breakdown in such devices. In addition, such increases in supply level can lead to electromigration in conductive lines, which can lead to higher resistance signal lines, or in a worst case, opens.
Examples of approaches to clocking different portions of CAM device are disclosed in U.S. Pat. No. 6,240,000, titled CONTENT ADDRESSABLE MEMORY WITH REDUCED TRANSIENT CURRENT, issued to Sywyk et al. on May 29, 2001. Another arrangement is disclosed in commonly-owned co-pending U.S. patent application Ser. No. 10/746,899, titled STAGGERED COMPARE ARCHITECTURE FOR CONTENT ADDRESSABLE MEMORY by Om et al., filed on Dec. 24, 2003. The contents of this application are incorporated by reference herein.
In light of the above, it would be desirable to arrive at some way of reducing the peak current drawn by a CAM device when transitioning from a low activity state (e.g., idle) to a high activity state (e.g., search).
It would be desirable if such an arrangement does not decrease overall throughput of the CAM device.

Reduced turn-on current content addressable memory (CAM) device and method


An endoscope apparatus including an endoscope, a supply portion for supplying a required signal or energy to a peripheral unit relating to the endoscope; and a control portion for controlling the supply portion, wherein the control portion is constituted to have at least one field programmable gate array and a function required by at least either of the endoscope or the peripheral unit relating to the endoscope is realized by receiving circuit information for constituting a control circuit for controlling the supply portion to selectively write the circuit information on the field programmable gate array so that the control circuit is constituted.

1. Field of the Invention
The present invention relates to an endoscope apparatus comprising a control portion constructed using programmable integrated circuits, the circuit function of each which can be changed.
2. Description of the Related Art
Recently, endoscopes have been widely used in the medical and industrial fields. The endoscope is used in a case where a biopsy or a curing treatment is performed by using a treatment tool as well as to observe or inspect the inside portion of an organism.
Therefore, the endoscope is combined with peripheral units for use in performing observation and treatment, such as a light source unit for supplying irradiation light for observing a subject which is substantially a necessary peripheral unit, an external camera unit for picking up an image, and an electric knife for performing excision.
The foregoing peripheral unit usually consists of the body of the peripheral unit and a control unit to which the body of the peripheral unit is connected, which drives and controls the body of the peripheral unit and which processes signals.
The products of the foregoing peripheral units to be used while being combined with the endoscope are usually in a state where their bodies have different structures and different functions. Therefore, they are usually designed by different designers, and usually different elements are employed. Furthermore, the control units for use together with the bodies of the peripheral units are usually designed by different designers or comprise different elements.
Therefore, if the control units control similar operations, the fact that the control units are designed individually (independently) increases the number of processes for designing the control unit. Thus, there arises a problem in that the cost of the product cannot be reduced. Furthermore, the necessity of disposing similar control circuits for respective peripheral units raises a problem that the size of the apparatus cannot be reduced. When a plurality of peripheral units are used in a combined manner, circuits having functions that are not always required are sometimes undesirably disposed.
Many types of endoscopes and peripheral units, such as light source units and video processors, may form the endoscope apparatus. A consideration will be made about a combination of, for example, an endoscope, a video processor and a light source unit. Endoscopes are arranged to have different outer diameters to be adaptable to the portion for use, such as the upper digestive tube or the lower digestive tube. Also the available video processors have different characteristics. In a case where the different types of endoscopes are used, the characteristics, such as the response speed of the automatic light adjustment function realized when the endoscope and the peripheral units are combined, are changed. Therefore, there is a need for preparing a multiplicity of light source units having different characteristics to be adaptable to the several types of endoscopes and video processors in order to obtain adequate operational characteristics. In this case, a problem of cost reduction arises. In a case where a common light source unit is used when several types of endoscopes and video processors are used, desired characteristics for the endoscope apparatus sometimes cannot be obtained. For example, a desired response speed cannot be realized because the response speed of the automatic light adjustment means is lowered depending upon the combination.
The peripheral unit to be used in combination with the endoscope is designed and adjusted before it is supplied as a product in such a manner that the characteristics of the unit, for example, the characteristics of a light quantity adjustment means of a light source unit, are set to realize the optimum conditions in a state of normal use.
As an example, in an automatic light adjustment means of an endoscope apparatus the light quantity adjustment for observation is performed by a light adjustment means for adjusting the aperture ratio of a diaphragm disposed in an optical path of the light source unit in accordance with the brightness of a subject image obtained through an image pickup means. The loop gain, the response speed and the adjustable range of the automatic light adjustment means are set to be adaptable to a state of normal use. Although portion for controlling each function of the light source unit is formed by using a digital circuit, the circuit function, and the operational characteristics of the control portion have been determined by a fixed circuit structure corresponding to the set value of the operation of each function.
Since the operational characteristics of the unit cannot easily always be set to the optimum state, the optimum setting for a user is not always realized. In this case, the user must adjust the unit to be adaptable to the state of use or to satisfy the desire of the user.
Since the conventional apparatus has been arranged such that the operational characteristics of the apparatus are fixedly set to be adaptable to the state of normal use and they cannot freely be set to be adaptable to other states of use, a problem sometimes arises in that the characteristics, the functions, values of the operational state, the operational characteristics, the adjustable range of each function, and the adjustment steps that are not suitable for the user are set. In addition, there arises a need to perform adjustment or resetting to be adaptable to the state of use or to satisfy the desire of a user. That is, the operational characteristics of the apparatus cannot freely be set to satisfy the desire of a user, to be adaptable to the state of use and the combination of units. Thus, a problem rises in that the apparatus cannot always be used in an optimum state.

Endoscope apparatus using programmable integrated circuit to constitute internal structure thereof


A personal electronics case that is operable to inhibit the transmission of radiation in the direction of a user. The personal electronics case includes four walls and a first bottom layer contiguously formed to define an interior volume. A cavity is adjacent and underneath the first bottom layer and is of similar size. Secured within the cavity is a radiation shield that is operable to inhibit the transmission of radiation. A second bottom layer is adjacent to the cavity opposite the first bottom layer. A keeper is mounted within a void in the body to facilitate the releasable securing of the radiation shield within the cavity.

The proliferation of personal electronic devices in our society over the last decade has been significant. In the United States alone there are approximately two hundred and fifty million cellular phone devices that are active with various network providers. Additionally, devices such as laptop computers and tablet PC's also number in the hundreds of millions. These devices are now an integral part of most people's lives. The days of reading a newspaper or consuming information through other traditional media outlets such as television are gone. Most consumers engage a personal electronic device such as but not limited to a cellular phone or tablet PC at least two hours per day.
One problem with personal electronic devices is the radiation emitted therefrom. While cellular phones and their cellular transmission are well known, most consumers are unaware that personal electronics such as but not limited to tablet PC's and laptop computers also emit radiation when in use. Users of these devices often place the devices on their laps or sometimes the devices can be proximate the head of the user. This exposes the user to albeit small but an unknown quantity of radiation.
Personal electronic devices are often stored and carried in protective cases. These cases are designed to protect the personal electronic device from damage during use and in case of an accidental drop. Additionally, some of these cases are operable to protect against water and other environmental hazards. Conventional cases for electronic devices are manufactured from materials such as but not limited to plastic or rubber. One problem with this material is that the material does not prevent the transmission of radiation from the device or more specifically block the transmission so as to inhibit the transmission in the direction of the user.
Accordingly, there is a need for a personal electronics device that includes a radiation inhibiting layer integrated into the case so as to prevent the transmission of the radiation from the personal electronic to emit in the direction of the user.

Radiation inhibiting personal electronics case


A microfluidic resistance network (20) is disclosed that comprises a first microfluidic channel (112) in fluidic communication with a first fluid inlet (22); and a second microfluidic channel (114) in fluidic communication with a second fluid inlet (24); wherein the microfluidic resistance network (20) further comprises a cross-shaped dilution stage (100) having the first microfluidic channel (112) as a first dilution stage inlet and the second microfluidic channel (114) as a second dilution stage inlet, the dilution stage further comprising a first microfluidic outlet channel (122) for combining a portion of a first fluid from the first microfluidic channel with a second fluid from the second microfluidic channel (114) and a second microfluidic outlet channel (124) for receiving the remainder of first fluid. A microfluidic device (200) comprising such a microfluidic resistance network (20) is also disclosed.

In healthcare, there is a trend towards the development of so-called Point of Care (POC) devices, which are small devices, often with disposable components such as cartridges, that can be used in diagnosis and treatment of patients as an alternative to large and expensive analysis equipment.
A widely used diagnostic test is a Full blood count (FBC) test, which is a diagnostic test that is used to measure cellular composition of blood. It may give information about the status of an immune system of a patient, about the ability of the blood to disseminate oxygen and/or about the ability of the blood to effectively clot. As such, it is a fundamental test that is often used as an initial "general purpose" diagnostic tool or as a more targeted monitoring solution. Examples of care cycles that include a full blood count as a monitoring tool include oncology, arthritis and Crohn's disease. As many as 300 million FBC tests are performed each year in the developed world. FBC tests may further be used in chemotherapy monitoring, veterinary blood analysis applications and so on.
Currently, large scale commercial laboratory instruments known as hematology analyzers are used to automatically perform all measurements that comprise the FBC. The high cost and complexity of these devices, coupled to the need for venous blood, means that they are mostly large scale, centralized facilities. There is a clear clinical need for performing FBC in a near patient setting, particularly for applications that require a full blood count to monitor the progression and/or treatment of a disease.
Previously, microfluidic point of care devices have been developed which are capable of measuring individual components of the FBC. In that area, Hb measuring devices, WBC counters capable of performing a white blood cell differential and platelet count devices, devices which optically count and determine size of red blood cells are available. For cell counting, current hematology analyzers typically employ electrical coulter counting and/or optical scattering methods to count and differentiate white cells and to count and determine size of the red blood cells and platelets.
At the moment only few examples of micro fluidic coulter counter technologies exist. One example combines a coulter counter with a Hb measurement. Another example of counting cells is by flow-through impedance spectroscopy. This is a flow cytometry analysis which is especially suited for a micro fluidic format. This technique is capable of differentiating between lymphocytes, monocytes and neutrophils in lysed blood, and of counting and sizing red blood cells and platelets.
The current "gold-standard" for Hb measurement is the photometric cyanmethaemoglobin (HbCN) method disclosed in Standardization of hemoglobinometry II, The hemiglobincyanide method, Clin Chim Acta, 1961, 6, p. 38-44. This method involves chemical lysis of the red blood cells and subsequent labelling of all the Hb that these cells release with a cyanide ion. The labels produce a defined absorption profile with a maximum at 540 nm. By measuring the optical absorption at 540 nm, the concentration of Hb can be determined. Furthermore, the high stability of HbCN means that it is easy to supply a calibration standard.
The most common red blood cell lysis/cyanide conversion reagent is known as Drabkin's reagent. Drabkin's reagent contains Potassium Cyanide, which is extremely toxic. This reagent only works for very large dilutions in whole blood (1:251), since red blood cell lysis relies on the low ionic strength of the reagent to induce osmotic shock. This large dilution causes an inherent imprecision in the method. Furthermore, to measure the optical absorption at 540 nm, very long optical path lengths of ˜1 cm are required. Finally, in some pathological samples, turbidity can lead to erroneously high absorption readings, which in turn will give rise to an incorrect Hb concentration.
To avoid the problems associated with toxicity and turbidity, many other optical means of measuring Hb have been developed. A known point of care device uses sodium azide to convert the Hb to an azide-coordinated Hb derivative (azidemethemoglobin, HbN3). This method itself lends to short path length (0.1 mm) absorption spectroscopy, since dry reagents remove the need for dilution of the whole blood. Two absorbance readings are taken to determine the HbN3 concentration, i.e. one at the absorption maximum (565 nm) and one at 800 nm to correct for turbidity.
For the point of care WBC/Hb counter, a RBC lysis solution has been developed that preserves the WBCs while at the same time labeling the Hb molecule with imidazole. In a similar way as described above, the optical absorption of the imidazole labeled Hb species is measured at two wavelengths, i.e. one at the absorption peak and one to correct for turbidity and scattering effects for the white blood cells. The same solution may also be passed through a coulter counter to perform the cell count.
Another known lysis/Hb conversion reagent is based on sodium lauryl sulphate/sodium dodecyl sulphate (SLS/SDS). The SDS lyses all the blood cells and labels the Hb to get an SDS-coordinated derivative. Since SDS is a surfactant molecule, turbidity correction is not necessary and so a single absorption reading at 535 nm is taken to determine the Hb concentration. This method is designed for high dilutions of Hb, so the inherent imprecision present in the HbCN measurement is still present in the HbSDS one.
All the above described devices and techniques are capable of performing specific measurements from a finger-prick of blood. However, none of the above described devices and techniques are capable of measuring all parameters that are required for an FBC in a single POC measurement. Recently, a microfluidic device capable of performing a FBC in a single POC measurement has been disclosed in WO 2010/086786. This microfluidic device comprises a two sample preparation stages, one for diluting a portion of a blood sample with a lysis agent for a white blood cell count and a quench solution and providing the diluted portion to an impedance measurement means and a second dilution stage for diluting a further portion of the blood sample with a diluent for hemoglobin measurement and providing the diluted further portion to a measurement means for determining properties of red blood cells, such as RBC count, HB count and platelet count. The diluent is fed to the blood sample several times (i.e. at different points in the microfluidic network) to obtain a high dilution ratio. Consequently, only a fraction of the RBC count sample is used for the actual RBC count, with well over 90% of the various dilution stages being fed to waste.
In resistive microfluidic networks such as present in the microfluidic device disclosed in WO 2010/086786, dilution of the sample is achieved by providing a branch between a microfluidic channel transporting the sample and a microfluidic channel transporting a diluent, such as a lysing agent or a quenching solution. Consequently, a Y-shaped dilution stage is obtained having a main channel (the diluent channel) and a secondary channel branching into the main channel (the branch off the sample channel). Such Y-shaped branches are also used to branch off a small fraction of a diluted sample for further dilution, whilst the bulk of the diluted sample is fed to waste.
In order to achieve the required dilution ratio, it is possible in theory that the dimensions of the respective microfluidic channels are tuned to reduce the volume passing through the channel during a given time period. However, for most manufacturing processes, it is not practically feasible to reduce the dimensions of such a channel to below certain limits dictated by the manufacturing process. In such situations, to achieve the branching off of the correct amount of fluid, the flow rate through the branch has to be reduced, e.g. by tuning the fluidic resistance of the branch.
However, a problem associated with such low flow rates is that upon start-up of a fluidic flow through the resistive microfluidic network, bubbles can get trapped in those parts of the network that exhibit the low flow rate such as the aforementioned branch. This can significantly extend the duration of the initialization of the microfluidic device as such bubbles must be cleared from the device before the device is ready for use.

Microfluidic resistance network and microfluidic device


A corrosion detector for use with a sealless centrifugal pump. The corrosion detector having a corrosion coupon at one end of the detector. The corrosion coupon being formed of the same material as the pump containment shell and having a thickness approximately two thirds the thickness of the containment shell. The corrosion detector is preferably installed in a bore in the pump discharge flange such that the corrosion coupon is exposed to the velocity of the pumped fluid. A detector is mounted within the corrosion detector to detect any leakage of the pumped fluid through the corrosion coupon. The corrosion coupon is designed so that this leakage will occur before the containment shell has failed or begun leaking due to corrosion.

This invention relates generally to sealless pumps and more particularly to a means of detecting corrosion of the sealless pump containment shell.
A sealless pump is a type of centrifugal pump that has its impeller and bearing system isolated from the impeller driving mechanism by an isolating wall or shell that seals the pumping mechanism from the surrounding environment and eliminates the necessity to use rotary seals to seal the pumped fluid against leaking along the shaft. This type of pump is particularly desirable when pumping environmentally sensitive fluids such as hydrocarbons. In one type of sealless pump, the driving mechanism is coupled to the pump impeller by an arrangement of magnets located on the opposite sides of the isolating wall which magnetically connects the torque of the driving mechanism to the impeller. In another type of sealless pump, a canned pump, an electric motor is enclosed within the isolating wall or shell.
The containment shell of a sealless pump has a relatively thin wall, 0.015 to 0.060 inches, depending upon the design. This is typical of both canned and magnetically coupled sealless pumps. Due to the construction of either type of design, it is difficult to determine the rate of corrosion that may be occurring in this shell. Most detection systems currently used, detect leakage through the shell after corrosion has penetrated the shell. Because of the fluids typically pumped with sealless pumps, it is important to have advance warning of shell failure or leakage due to corrosion.
The foregoing illustrates limitations known to exist in present sealless pumps. Thus, it is apparent that it would be advantageous to provide an alternative directed to overcoming one or more of the limitations set forth above. Accordingly, a suitable alternative is provided including features more fully disclosed hereinafter.


A phase and base potential converter according to the invention is constructed as follows. Two MOS transistors having the same size and characteristic are connected in series between a first power supply and a second power supply, a gate of one MOS transistor is served as an input terminal of a voltage based on the first power supply, and a source of the other MOS transistor is served as an output terminal of a voltage based on the second power supply. One of the first power supply or the second power supply is a lower potential power supply, and the other is a higher potential power supply. The phase and base potential converter being thus constructed makes it possible to convert, for example, a signal based on the Vss into a signal based on the Vdd and thereby synthesize signals having different base potentials.

1. Field of the Invention
The present invention relates to a phase and base potential converter that converts a voltage of a first power supply base into a voltage of a second power supply base and a temperature-compensated crystal oscillator containing the converter as a phase and base potential converter of a frequency control signal, specifically to a construction of a temperature-compensated crystal oscillator having a frequency adjusting function by an external frequency control signal, incorporated in a communication device such as a portable telephone.
2. Description of the Related Art
Various electronic equipment now being used include the Vss base system in which the lower potential power supply (ground or VSS) is served as the base of the analog signal, and the Vdd base system in which the higher potential power supply (Vcc or Vdd) is served as the base of the analog signal. However, most electronic equipment adopts the Vss base system, and only some, such as a crystal watch, adopt the Vdd base system.
The reason why a crystal watch adopts the Vdd base system is as follows.
The crystal watch is an electronic device having a crystal oscillator integrated therein, and its power consumption has to be low. Accordingly, the crystal oscillator is constructed with complementary field effect transistor (CMOS).
Where the crystal oscillator comprises with CMOS transistor, in view of the oscillation starting characteristic and the power consumption, it is preferable to construct the oscillator so as to balance as much as possible the drive capability and gate capacitance, etc., between the p-channel MOS transistor and the n-channel MOS transistor constituting the oscillation inverter.
However, due to the difference between the mobility of electrons and that of holes, to obtain the equivalent drive capability necessarily requires the channel width of the p-channel MOS transistor be designed to be wider than that of the n-channel MOS transistor.
Accordingly, to balance the drive capability of the p-channel MOS transistor against that of the n-channel MOS transistor in the foregoing manner will lead to an imbalance of the gate capacity.
In order to control the imbalance to a low level as much as possible, it is necessary to reduce the difference between the mobility of electrons and that of holes as much as possible.
And, in the MOS transistor, as the impurity concentration in the channel region is high, the mobilities of electrons and holes become low.
Accordingly, it is preferable that the concentration of the p-type semiconductor substrate where the n-channel MOS transistor is formed be set higher than the concentration of the n-type semiconductor substrate where the p-channel MOS transistor is formed.
To achieve the foregoing, one of the simplest methods is to form the n-type semiconductor substrate as a starting material and on the surface thereof to selectively form a p-type diffusion region called the p-well as the region where the n-channel MOS transistor is formed.
In the case of a CMOS, all the pn junctions have to be reversely biased, and the semiconductor substrate is served as the base for the analog signal. Therefore, an electronic device constructed with a CMOS in which the n-type semiconductor substrate is formed as the starting material necessarily makes use of the Vdd base system in which the higher potential power supply is served as the base.
This is the reason that the crystal watch takes on the Vdd base system. In addition, not only the crystal watch, but crystal oscillators constructed with a CMOS, employ the Vdd base system in general.
Incidentally, in the temperature-compensated crystal oscillator incorporated in a communication device such as a portable telephone, an AT-cut crystal unit to cover the 10 MHz band is used as the source of vibration, a frequency adjusting circuit is applied to the source of vibration to make up a temperature compensation circuit, and the temperature characteristic of a tertiary curve of the AT-cut crystal unit is canceled. Thereby, the oscillation frequency of the temperature-compensated crystal oscillator is stabilized.
This type of temperature-compensated crystal oscillator has been comprised in most cases with an amplifier using bipolar transistors and a temperature compensation circuit composed of the series-parallel connection of a thermistor and capacitors; however recently, the temperature-compensated crystal oscillator constructed with a CMOS integrated circuit has become widely used.
The reason why the temperature-compensated crystal oscillator is constructed with a CMOS integrated circuit lies in that the improvement of performance and cost reduction can be achieved by freely using a technique such as analog signal synthesis.
In the case where the temperature-compensated crystal oscillator is constructed with a CMOS integrated circuit, from the consideration of the oscillation starting characteristic, for example, it is advantageous that the temperature-compensated crystal oscillator uses the Vdd base system, in which the n-type semiconductor substrate is formed as the starting material as mentioned above.
Incidentally, depending on the specification of the portable telephone, it is a usual exercise to apply an external frequency control signal to the temperature-compensated crystal oscillator and to thereby compensate for aging, etc.
In the temperature-compensated crystal oscillator incorporated in the portable telephone of such a specification, the temperature compensation and the external frequency control interfere each other, which can cause harmful effects such as lowering the frequency accuracy, etc.
One method for eliminating the mutual interference between the temperature compensation and the external frequency control is to synthesize the temperature compensation signal and the external frequency control signal and control a variable capacitance circuit, for example, by the composite signal thus synthesized, and thereby adjust the oscillation frequency of the crystal oscillating circuit.
However, the main body of a portable telephone uses the Vss base system, and the frequency control signal applied to the temperature-compensated crystal oscillator for compensating the aging, etc., is an analog voltage signal of the Vss (ground potential) base.
Therefore, in order to eliminate the mutual interference between the temperature compensation and the external frequency control by synthesizing the frequency control signal and the temperature compensation signal, the temperature-compensated crystal oscillator must be constructed with a CMOS integrated circuit of the Vss base.
However, to construct the temperature-compensated crystal oscillator with a CMOS integrated circuit of the Vss base will lead to increasing the imbalance between the gate capacitance of the p-channel MOS transistor and that of the n-channel MOS transistor constituting the oscillation inverter, as mentioned above, which invites disadvantages in terms of the oscillation characteristic such as the oscillation starting characteristic and power consumption, etc.
Therefore, if priority is given to the oscillation characteristic, the signal composition of the external frequency control signal and the temperature compensation signal was degraded.
That is, if the temperature-compensated crystal oscillator used in the environment of the Vss base system is constructed with a CMOS integrated circuit, there has been a problem in that either the oscillation characteristic or the signal composition for preventing the mutual interference had to be sacrificed.

Phase and base potential converter and temperature-compensated crystal oscillator having the same


A frame jamb marker includes a sliding panel for sliding on the side surface of the frame and a guiding panel perpendicularly extended from the sliding panel for sliding on the marking surface of the frame, wherein the guiding panel has a top stepping edge and a bottom stepping edge to define a top marking point and a bottom marking point at stepping corners at the top and bottom stepping edges respectively. The user is able to point a marker tool on the marking surface at one of the top and bottom marking points. When the sliding panel is slid on the side surface to drive the guiding panel sliding on the marking surface, the marker tool is guided to slidably mark on the marking surface to make a straight marking line thereon so as to precisely form the marking line parallel to the common edge of the frame.

1. Field of Invention
The present invention relates to a frame jamb marker, more particularly to a frame jamb marker, which comprises sliding panel as a reference for sliding on a side surface of a frame and a guiding panel having a marking point, wherein a user is able to point a marker tool on the marking surface of the frame at the marking point, such that when the sliding panel is slid on the side surface of the frame to drive the guiding panel to slid on the marking surface, the marker tool is guided to slidably mark on the marking surface to make a straight marking line thereon so as to precisely form the marking line parallel to said common edge of said frame.
2. Description of Related Arts
A ruler or rule is a common tool used in our daily life to measure the distance and straight lines. Generally there are two types of rulers: straight rule and retractable flexible rule. However, no matter which type of the ruler is, the ruler still has its drawbacks.
The straight rule is a device which draws the straight line by means of its side boundary. Because the structure is simple and the weight is light, it is very common for people to use in their office. However, the straight line people need to draw is usually long. In other words, when the straight rule is not long enough, the user must move down the straight rule to continue on its drawing on the straight line. It is no doubt increasing the chance to draw a sloping line. So there are still several sizes of straight rule to meet the user need in responsive to the different length of the straight line. Moreover, even though the user finds a long straight rule to draw or to measure a straight line, the straight rule is hard to carry, no mention to find a place to storage it.
On the other hand, the retractable flexible rule is another device mainly to the measuring usage. As compared to a straight rule, the retractable flexible rule is able to measuring the longest item, and is also flexible in its size when finish using. However, owing to the material of the retractable flexible is usually full of elastic but not solid; people often use it for measuring the distance between points, not drawing the straight lines.
Nowadays, people put more emphasis on their standard of the living; they usually remodel their housing to make their quality of life improve dramatically. Among them, remodeling the door frame and changing the picture frame are good methods. To sum up how to precisely draw the marking line parallel to the common edge of the frame and meet the different needs of common edge are the most important issue to deal with the frame change.


A support assembly is provided for mounting an electrical appliance on a printed circuit board. The assembly includes a supporting structure for mounting on top of the printed circuit board and a securing structure for mounting on the bottom of the printed circuit board. The structure extends through the board so that the structures sandwich the board therebetween. The securing structure is a one-piece plastic component including a body portion juxtaposed at the bottom of the board and a pair of spaced apart externally threaded stud portion projecting through appropriate holes in the board. The supporting structure includes a bracket for mounting the electrical appliance and a socket rotatably capturing a nut for threadably receiving the threaded stud portion of the securing structure. The socket has resiliently expandable side walls for snappingly receiving and capturing the nut therein.

A wide variety of hardware, framework, support structures and the like are used to mount electrical connectors, electronic components and other electrical appliances on printed circuit boards. For instance, various structures are used to mount rather large microprocessor modules or cartridges on the top surface of a printed circuit board (motherboard) of computers such as personal computers.
An inherent problem in mounting microprocessor modules on printed circuit boards in computers or the like is that the modules are relatively large and heavy in comparison to other smaller electronic components, connectors and the like which are mounted on the board. Consequently, the support assembly for mounting the module on the board is large, unduly expensive and comprises multiple components.
For instance, a known support assembly includes a supporting structure disposed on top of the printed circuit board and a securing structure on the bottom of the board, with the structures being interconnected through the board. The bottom securing structure is a multi-component subassembly which includes at least a body portion usually fabricated of plastic material and a plurality of separate metal, externally threaded studs which project through holes in the board from the bottom to the top surface thereof. The supporting structure for the microprocessor module on top of the board also is a multi-component subassembly which includes an elongated support bracket with separate nuts for threadingly engaging the threaded studs extending through the board from the bottom securing structure. Still further components, such as separate metal clips, are used to hold the nuts on the bracket of the top supporting structure. All of these separate components of the supporting and securing structures of the support assembly add significantly to the manufacturing and assembly costs of the overall support arrangement. The present invention is directed to solving these problems by providing a much simpler and less expensive support assembly of the character described, particularly involving considerably fewer components than the prior art described above.

Support assembly for board-mounted electrical appliance