A method for peening the tops of cooled blades which include cooling air passage orifices. Peening is performed by mobilization of a plurality of beads in a sealed chamber containing at least one blade tip. The plurality of beads is mobilized by the active surface of a sonotrode which delimits part of said chamber. The beads have a diameter greater than that of the cooling air passage orifices.

1. Field of the Invention
The invention relates to a method for the surface treatment and compressive prestressing by peening of the tops and aerodynamic surfaces of cooled blade tips, which include a cavity in their tops, said blades being hollow and having an internal cooling circuit communicating with the outside via cooling air passage orifices formed, in particular, in said tops and said aerodynamic surfaces.
2. Technical Background
A cooled blade, for example a jet engine turbine blade, is hollow and comprises a root portion for securing the blade to a rotor, and an airfoil portion. The root has a sizeable opening through which a flow of cooling air tapped from a compressor stage is injected. The blade airfoil includes, on a leading edge, on a trailing edge, on flanks and on the top, small orifices which allow the cooling air, which is heated-up as it flows inside the blade, to be removed so as to be replaced with fresh cooling air, and which allow the conveying of this heated-up cooling air onto an exterior surface of the blade to isolate it from combustion gases of the jet engine. These orifices, which may be cylindrical or may be in the form of slots, have relatively small transverse dimensions, at most equal to 1 mm. Furthermore, the aerodynamic surfaces comprising the leading edge, the trailing edge, and the flanks are generally extended at the top of the blade by an exterior wall forming, at the top of the blade, a cavity which is open toward the top.
Turbine blades in operation are subjected to considerable centrifugal forces and to high thermal stresses. Hence, it is necessary to compressively prestress the external surfaces of the aerofoils so as to delay the onset of cracks detrimental to the integrity and life of these blades, and particularly the surfaces at the top of the blades which are subjected to the greatest centrifugal forces.
This compression is also needed in the case of blades whose tops have been repaired. Repairing the top of a blade includes the steps of building up the uneven regions using weld metal, in practice by TIG electric arc welding. This build-up is followed by machining to reconstruct the shape of the blade, and then by peening, by blasting beads or shot, so as to compress the surface of the built-up regions and prevent the appearance of cracks at the welds during the subsequent heat treatments and when the blade is in use.
When the top of the blade has a cavity open toward the top, the inside of a wall delimiting this cavity has also to be peened.
At the present time, the surfaces of the blade tips are compressively prestressed by peening using beads ejected by air jet peening nozzles. These nozzles are able to project only beads the diameter of which is smaller than 1 mm, and typically between 0.1 and 0.5 mm. It is therefore necessary to plug the blade cooling orifices, prior to peening, to prevent the beads from entering them. The top of the blade is then offered up to one or more air jet peening nozzles and the nozzles are moved in order to make the peening uniform. After the peening operation, the cooling orifices have to be unplugged.
It is also possible for peening to take place without plugging the orifices during the operation. In such a case, it is then necessary, for example by dissolving them in acid, to remove any beads which may remain in the cooling orifices or may have entered the interior cavity of the blade.
Peening with nozzles takes a great deal of time since the beads are of small diameter they have low kinetic energy. Furthermore, the small diameter of the beads. leads to damage to the surface finish of the blade.
During peening, the nozzle has to be moved in various orientations, so as to reach the entire peripheral wall of the top of the blade and also the interior wall of the upwardly open cavity when there is one. When peening is performed by hand, it is, by nature, not very repeatable. When peening is automated, it entails control over numerous parameters, and is therefore difficult to control and to repeat.
It is also known practice for peening to be carried out using flappers equipped with beads. This method, known as xe2x80x9cflapper peeningxe2x80x9d, includes the step of using a small spindle comprising, at its end, strips of plastic, to the end of which beads are bonded. Peening is performed by rotating the spindle. As the beads are held on the strips, they do not enter the cooling orifices. The disadvantage with this method is that the tool soon degrades as beads are torn off and the strips become frayed, and that, above all, it is not possible effectively to peen the interior of the open cavity at the top of the blade.
It is an object of the invention to propose a method for peening blade tips which makes it possible to repeatedly create identical prestresses in a relatively short peening time.
It is another object of the invention to propose a method for peening blade tips which eliminates the operations of plugging and unplugging the cooling air passage orifices before and after the peening operation respectively.
According to the invention, there is provided a method for the surface treatment and compressive prestressing by peening of the tops and aerodynamic surfaces of cooled blade tips which include a cavity in their tops, said blades being hollow and having an internal cooling circuit communicating with the outside via cooling air passage orifices formed in said tops and said aerodynamic surfaces, said method comprising the steps of providing a sonotrode having a vibratory surface and ultrasonic means for vibrating said vibratory surface, placing a plurality of beads on said vibratory surface of said sonotrode, said beads having a diameter greater that that of said cooling air passage orifices, providing means for supporting at least one blade, said supporting means and said vibratory surface of said sonotrode together at least partly defining a sealed chamber containing at least one blade tip, and operating said ultrasonic means to vibrate said vibratory surface of said sonotrode whereby said beads are mobilized in said chamber to conduct ultrasonic peening of said at least one blade tip.
According to a preferred embodiment, said beads have a diameter of between 0.8 and 5 mm.
Since the beads have a diameter greater than that of the cooling air passage orifices, it is not necessary to carry out the operations of plugging and unplugging these orifices, and the increased kinetic energy of the beads relative to the beads of the prior art allows the peening time to be reduced.
Furthermore, the mobilized plurality of beads moving in random directions strike the surfaces of the blade tip at varying angles, and this improves the surface finish by comparison with beads projected by a nozzle in a predominant direction, this being especially the case since the beads used in the method according to the invention have a diameter greater than the diameter of the beads that can be projected by a nozzle.
Finally, all the external surfaces of the blade tip exposed in the chamber are subjected at the same time to the impacts of the beads, and this considerably reduces the risk of blade tip deformation.
The invention also provides an apparatus for carrying out the method according to the invention, said apparatus comprising a blade support plate having at least one through-orifice, the cross section of which matches the cross section of the end of a blade aerofoil, a frame, on one face of which said support plate can be fixed, and a sonotrode, a vibratory surface of which is capped by said support plate fixed to said frame, said vibratory surface of said sonotrode being arranged facing said support plate.
According to the invention, there is also provided a method for repairing blades, said method comprising the steps of building up uneven regions of said blade with weld metal, machining said blade to reconstitute the shape of the blade, and peening said blade according to the method of claim 3 so as to prevent the appearance of cracks at said welds during subsequent heat treatments and when said blade is in use.

Method and apparatus for peening tops of cooled blades


Carbon dioxide is recovered from a feed stream whose pressure is up to 30 psia by preferentially absorbing carbon dioxide from said feed stream into a liquid absorbent fluid, pressurizing and heating the resulting stream to a pressure sufficient to enable the stream to reach the top of the stripper at a pressure of 35 psia or greater, and stripping carbon dioxide from said stream in a stripper operating at a pressure of 35 psia or greater and recovering from said stripper a gaseous carbon dioxide product stream having a pressure of 35 psia or greater.

The present invention relates to the recovery of carbon dioxide from gaseous streams containing it.
Conventionally, merchant liquid CO2 is produced from feed streams with high CO2 content ( greater than 95%) using distillation technology. Examples of such sources include ammonia and hydrogen plant off-gases, fermentation sources and naturally-occurring gases in CO2-rich wells. Typically, liquid CO2 is produced at a central plant and then transported to users that could be hundreds of miles away; thereby incurring high transportation costs. The lack of high quality sources and their distance from customers provides motivation to recover CO2 from low concentration sources, which are generally available closer to customer sites. Predominant examples of such sources are flue gases, which typically contain 3-30% CO2 depending upon the fuel and excess air used for combustion.
To produce merchant liquid CO2 from such sources, the CO2 concentration in the feed gas needs to be first upgraded significantly and then sent to a distillation unit. A variety of technologies, including membranes, adsorptive separation (e.g. pressure swing adsorption (xe2x80x9cPSAxe2x80x9d), vacuum pressure swing adsorption (xe2x80x9cVPSAxe2x80x9d) and temperature swing adsorption (xe2x80x9cTSAxe2x80x9d)), physical absorption and chemical absorption, can be used for upgrading the CO2 purity. The economics (capital and operating costs) of the overall scheme depends upon the purity of the feed, the product purity specifications and recovery obtained. For membranes, adsorptive separations and physical absorption, the cost to obtain a given high product purity is a strong function of the feed purity. On the other hand, chemical absorption provides a convenient means of directly obtaining high purity ( greater than 95%) CO2 vapor in a single step because the costs of this technology are relatively insensitive to the feed CO2 content. This vapor can be used as is for applications at the site of CO2 separation or further compressed for downstream recovery, as merchant liquid CO2, or for disposal/sequestration.
Chemical absorption can be performed through the use of alkanolamines as well as carbonate salts such as hot potassium carbonate. However, when using carbonate salts, it is necessary for the partial pressure of CO2 to be at least 15 psia to have any significant recovery. Since flue gases are typically available at atmospheric pressure, use of chemical absorption with carbonate salts would require compression of the feed gas. This is highly wasteful because of the significant energy expended in compressing the nitrogen. On the other hand, there exist alkanolamines that can provide adequate recovery levels of CO2 from lean sources at atmospheric pressure. Thus for recovery of high purity ( greater than 95%) CO2 vapor from sources such as flue gases, chemical absorption with alkanolamines would be the preferred choice. The pressure of CO2-rich vapor recovered from such an absorption process is generally around 15-30 psia. Compression of the gas will typically be needed for further use, processing or disposal.
Historically, alkanolamines have found widespread use for CO2 absorption in processes such as natural gas purification and hydrogen production. As the literature indicates (Kohl and Nielsen, xe2x80x9cGas Purificationxe2x80x9d, 5th Edition (1997), pp. 115-117, 123-125, 144-149), the feed gas is typically in excess of 200 psia and CO2-rich vapor is typically obtained at pressures of 15-30 psia. U.S. Pat. No. 5,853,680 discloses a process for the removal of carbon dioxide from high pressure ( greater than 425 psia) natural gas. There is no pumping of the CO2-rich alkanolamine liquid. By carrying out the regeneration step without significant depressurization, the disclosed process facilitates recovery of a CO2-rich vapor stream at pressures of 140 psia or higher.
However, there still exists a need for a more efficient process that can directly recover high pressure carbon dioxide from low pressure source streams.
One aspect of the present invention is a process for recovering carbon dioxide, comprising (A) providing a gaseous feed stream comprising carbon dioxide, wherein the pressure of said feed stream is up to 30 psia; (B) preferentially absorbing carbon dioxide from said feed stream into a liquid absorbent fluid comprising an organic amine absorbent to form a carbon dioxide enriched liquid absorbent stream; (C) in any sequence or simultaneously, pressurizing said carbon dioxide enriched liquid absorbent stream to a pressure sufficient to enable the stream to reach the top of the stripper in step (D) at a pressure of 35 psia or greater, and heating the carbon dioxide enriched liquid absorbent stream to obtain a heated carbon dioxide enriched liquid absorbent stream; and (D) stripping carbon dioxide from said carbon dioxide enriched liquid absorbent stream in a stripper operating at a pressure of 35 psia or greater and recovering from said stripper a gaseous carbon dioxide product stream having a pressure of 35 psia or greater. In some preferred embodiments, the pressure in the stripper, and the pressure of the gaseous carbon dioxide product stream, are up to 70 psia.
In other aspects of this process, the stripped liquid absorbent fluid from the stripper is recycled to step (B).

Carbon dioxide recovery at high pressure


Addresses of all of dirty blocks of a cache memory are, by an update address registering section, stored in one of plural regions of an update address memory. When a certain cache block is brought to a dirty state and then suspended from the dirty state, the update address removing section removes the address from the region. When cache flush is performed, a flush executing section sequentially fetches the addresses of the dirty blocks from each region to issue, to the system bus, a command for writing-back data indicated by the address into the main memory so that the contents of all of the a dirty block are written-back into the main memory. Therefore, the cache flush apparatus according to the present invention is able to shorten time required to perform the cache flush procedure and to improve the performance of a computer system having the cache flush apparatus.

This application is based on Japanese Patent Application No. 8-238,157, filed Sep. 9, 1996, the content of which is incorporated herein by reference.
The present invention relates to a cache flush apparatus for a cache memory having a snoop mechanism for maintaining data coherency and a fault tolerant computer system having the cache flush apparatus.
In general, a modern high-speed processor has a cache memory for temporarily holding data required by the processor in order to reduce the effective memory access latency. A cache memory holds data and the memory address at which the data is read out in a fixed size data storage unit called a cache block.
In a computer (more specifically a multi-processor computer) having a plurality of processors each of which has its own cache memory, a snoop mechanism is usually used to maintain data coherency among the cache memories. A snoop mechanism monitors the system bus to detect bus commands and if a bus command which requires some action of the cache memory is detected, the snoop mechanism does the required action such as replying to the bus command with data held in one of its cache blocks, discarding data in one of its cache blocks and the like.
The cache memory is classified into copy-back type and write-through type. While a write-through type cache memory writes back data into the main memory immediately when it is updated within the cache memory, a copy-back type cache memory postpones the write-back of data until it becomes necessary. Therefore, for a copy-back type cache memory, a cache block may hold updated data which has not been written back into the main memory yet. Such a cache block is called a dirty block and the state of such a cache block is called dirty.
A copy-back type cache memory requires a cache flush operation which writes back all the data updated solely within the cache memory into the main memory.
For example, data transfer between an input/output device without a memory coherency mechanism and the main memory requires a cache flush before the data transfer in order to assure that the main memory holds valid data. From now on, a xe2x80x9ccache memoryxe2x80x9d means a copy-back type cache memory.
A cache flush is also necessary for a main memory based checkpoint/rollback type fault tolerant computer. Such a fault tolerant computer periodically creates a checkpoint within its main memory. When the computer detects some faults during the normal data processing, the computer rolls back its internal state to the most recent checkpoint and then restarts the normal data processing.
Since a checkpoint image created within the main memory should contain sufficient information to restart the normal data processing, it is necessary to perform a cache flush as a part of checkpoint creation.
A cache flush is usually performed by using machine instructions provided by the processor.
Intel Pentium(trademark) processor and its successors, for example, provide a xe2x80x9cwbinvdxe2x80x9d (writeback and invalidate) instruction. The instruction writes back data of all the dirty blocks into the main memory and sets the state of every cache block invalid. Therefore, when a cache flush has been performed by executing the xe2x80x9cwbinvdxe2x80x9d instruction as a part of checkpoint creation, cache misses occur very frequently during the normal data processing which follows the checkpoint creation.
MIPS R4000(trademark) processor, for example, provides a xe2x80x9csecondary cache hit writebackxe2x80x9d instruction. The operand of the instruction, different from the case of the xe2x80x9cwbinvdxe2x80x9d instruction, is a single cache block. The following is a sample program of a cache flush operation.
fcflush
With the foregoing program, xe2x80x9ccache 0x1b, 0($4)xe2x80x9d is the xe2x80x9csecondary cache hit writebackxe2x80x9d instruction. The instruction checks the state of the cache block of a secondary cache memory designated by the contents of the fourth register ($4). If the state is dirty, the data of the cache block is written-back into the main memory and the state of the cache block turns xe2x80x9cclean-exclusivexe2x80x9d or xe2x80x9csharedxe2x80x9d. The loop should be repeated as many as the number of the cache blocks of the secondary cache memory even if the number of dirty blocks is small. It should be mentioned that the execution time of a cache instruction is usually much longer than that of an ordinary instruction such as an arithmetic instruction.
SPARC V9(trademark) processor does not provide any instruction for a cache flush. If a cache flush is necessary, a load instruction should be used so that the data within a dirty block is replaced by the data newly loaded into the cache block. Therefore, the inefficiency of a cache flush is apparently more critical than the case of Intel Pentium processor.
To accelerate a cache flush operation has been a concern for designers of a main memory based checkpointrol/back type fault-tolerant computer. Japanese patent disclosure (KOKAI) No. 5-6308, xe2x80x9cCache controller, fault tolerant computer and data transfer methodxe2x80x9d, Mitsubishi Denki Co. Ltd., proposed a cache controller with additional memory for storing the memory address at which a piece of data is updated. In a cache flush operation, while a conventional cache controller checks the state of every cache block and, if it is dirty, writes back the data held in the cache block, the proposed cache controller can use the addresses stored in the additional memory effectively. However, this method has a critical disadvantage that it requires a major modification of the present cache controller design, which is too costly.
In view of the foregoing, the primary object of the present invention is to provide a cache flush apparatus applicable to a variety of commercial high speed microprocessors having cache memories. The cache flush apparatus, attached to the system bus, maintains the memory addresses held in dirty blocks within its own storage during the normal data processing. When a cache flush is required, the cache flush apparatus reads the memory addresses from the storage efficiently and issues bus commands each of which requires to write back data held in one of the dirty blocks. As a result, a dirty block becomes xe2x80x9csharedxe2x80x9d and it still holds the same data. For a non-dirty cache block, it remains unchanged.
According to a first aspect of the present invention, there is provided a cache flush apparatus for use in a computer having at least one processor provided with a copy-back type cache memory having a bus snoop mechanism, a main memory and a system bus for connecting the at least one processor and the main memory, the cache flush apparatus comprising:
update address registering means for monitoring the system bus to detect an update of data within the cache memory, selecting a region of the update address storage means according to a memory address MU at which the data has been updated and an identifier of a processor which has updated the data and storing the memory address MU as an update address in one of the entries of the selected region;
update address removing means for monitoring the system bus to detect a write-back of data from a dirty block, selecting a region of the update address storage means according to a memory address MW at which the data has been written back and an identifier of a processor from which the data has been written back, and removing the update address which is equal to the memory address MW and is stored in an entry of the selected region; and
flush executing means, in response to a request from the at least one processor, for issuing bus commands to the system bus each of which has one of the update addresses UA stored in the update address storage means and causes a write-back of data from the dirty block designated by the update address UA.
According to the first aspect of the present invention, the address of data held in a dirty block is stored in an entry of the selected region of the update address storage means. When a processor updates some data and as a result the state of a cache block turns dirty, the memory address MU is captured and stored in an empty entry of the selected region of the update address storage means. When a write-back of data from a dirty block occurs (which means the state of the cache block turns xe2x80x9csharedxe2x80x9d), the update address is removed from the update address storage means. The reason why the update address storage means is divided into regions and the update address registering means and the update address removing means select a region is that the removal operation can be accelerated by reducing the number of entries which must be examined.
The flush executing means, reading out all the update addresses from the update address storage means, issues bus commands to the system bus each of which has one of the update addresses UA and requires write-back of data from the dirty block designated by the update address UA.
As a result, the cache flush apparatus causes write-back of all the data from the dirty blocks and changes the state of the dirty blocks to some state other than invalid (typically xe2x80x9csharedxe2x80x9d) and does not affect the other cache blocks.
According to a second aspect of the present invention, there is provided a cache flush apparatus for use in a computer having at least one processor provided with a copy-back type and direct map cache memory having a bus snoop mechanism, a main memory and a system bus for connecting the at least one processor and the main memory, the cache flush apparatus comprising:
update address storage means having a plurality of regions each of which corresponds to a cache block and has one entry for storing the memory address of data held in the corresponding cache block if the cache block""s state is dirty;
update address registering means for monitoring the system bus to detect an update of data within the cache memory, selecting a region of the update address storage means according to a memory address MU at which the data has been updated and an identifier of a processor which has updated the data and storing the memory address MU as an update address in the entry of the selected region;
update address removing means for monitoring the system bus to detect a write-back of data from a dirty block, selecting a region of the update address storage means according to a memory address MW at which the data has been written back and an Washin identifier of a processor from which the data has been written back, comparing the update address stored in the entry of the selected region with the memory address MW, and if they are the same, removing the update address from the entry; and
flush executing means, in response to a request from the at least one processor, for issuing bus commands to the system bus each of which has the update address UA stored in the entry of a region and causes a write-back of data from the dirty block designated by the update address UA.
According to the second aspect of the present invention, the cache flush apparatus can, in an efficient way, cope with a case where each processor has a write buffer. A write buffer is a hardware module equipped between a processor (including cache memory) and a system bus and holds several bus commands for write requests when the system bus is busy.
In this case, it appears to the cache flush apparatus as if a cache block could hold more than one dirty pieces of data.
To cope with this case, each region, assigned to one of the cache blocks, consists of an entry for storing the memory address of the latest data update relating to the cache block. When a write-back of data is detected by the update address removing means, the update address stored in the entry of the selected region and the memory address of the write-back are compared. If they are the same, the update address is removed from the entry.
According to a third aspect of the present invention, there is provided a cache flush apparatus for use in a computer having at least one processor provided with a copy-back type and direct map cache memory having a bus snoop mechanism, a main memory and a system bus for connecting the at least one processor and the main memory, the cache flush apparatus comprising
update address storage means having a plurality of regions each of which corresponds to a cache block and has one counter and one entry for storing the memory address of data held in the corresponding cache block if the cache block""s state is dirty;
update address registering means for monitoring the system bus to detect an update of data within the cache memory, selecting a region of the update address storage means according to a memory address MU at which the data has been updated and an identifier of a processor which has updated the data, storing the memory address MU as an update address in the entry of the selected region, and incrementing the counter of the selected region;
update address removing means for monitoring the system bus to detect a write-back of data from a dirty block, selecting a region of the update address storage means according to a memory address MW at which the data has been written back and an identifier of a processor from which the data has been written back, and decrementing the counter of the selected region; and
flush executing means, in response to a request from the at least one processor, for issuing bus commands to the system bus each of which has the update address UA stored in the entry of a region with a non-initial counter value and causes a write-back of data from the dirty block designated by the update address UA.
According to the third aspect of the present invention, the cache flush apparatus can, like the second aspect, cope with a case where a processor has a write buffer.
To cope with this case, each region, corresponding to one of the cache blocks, consists of one counter and one entry. The update address registering means increments the counter when an update address is stored in the entry of the corresponding region. The update address removing means decrements the counter when a write-back of data from the corresponding cache block is detected. Therefore a counter holds the number of updated pieces of data which exist within the write buffer and the cache memory and correspond to the cache block. The flush execution means determines that an entry has a valid update address if the associated counter has a non-initial value.
For most computer systems, xe2x80x9cread-linexe2x80x9d is a bus command which causes a write-back of data from a dirty block. However, there are computer systems where no bus command is provided which requests a write-back of data into the main memory.
In this case, it is effective to provide a data path which enables the processor to read out the update addresses from the update address storage means. Then the processor, reading out each update address, executes a cache block write-back instruction for a dirty block or a load instruction which requests a data replacement from a dirty block.
According to a fourth aspect of the present invention, there is provided a cache flush apparatus for use in a computer having at least one processor provided with a copy-back type cache memory having a bus snoop mechanism, a main memory and a system bus for connecting the at least one processor and the main memory, the cache flush apparatus comprising:
update address storage means having a plurality of regions each of which has one or more entries for storing the addresses of data held in dirty blocks;
update address registering means for monitoring the system bus to detect an update of data within the cache memory, selecting a region of the update address storage means according to a memory address MU at which the data has been updated and an identifier of a processor which has updated the data, selecting an entry of the selected region, if the selected entry has an update address UA, issuing a bus command which cause a write back of data from the cache block designated by the update address UA, and storing the memory address MU as an update address in the selected entry; and
flush executing means, in response to a request from the at least one processor, for issuing bus commands to the system bus each of which has one of the update addresses UA stored in the update address storage means and causes a write-back of data from the dirty block designated by the update address UA.
According to the fourth aspect of the present invention, the cache flush apparatus, with reasonable amount of hardware, can cope with a case where a processor has a non-direct-map cache memory as well.
Comparing the fourth aspect with the first aspect, the update address registering means of the fourth aspect is more complicated but the update address removing means is omitted.
Before explaining the fourth aspect, suppose a case where a cache flush apparatus of the first aspect is applied to a processor having a four-way set associative cache memory.
Since a region is selected according to the memory address and the processor identifier and a piece of updated data exists in one of the four cache blocks from the same way, a region must consists of at least four entries.
When a write-back of data is detected, the update address removing means has to examine the four entries to find out the entry having the specified update address. If the processor has a write buffer, the cache flush apparatus would be much more complicated. Thus the cache flush apparatus of the first aspect would be as complicated as the cache controller in case of a non-direct-map cache memory.
According to the fourth aspect, by augmenting the function of the update address registering means, the update address removing means of the first aspect can be omitted.
Since a cache flush apparatus of the fourth aspect does not have an update address removing means, when a dirty block writes back its data, the update address is not removed from the update address storage means.
When an update of data is detected by the update address registering means, it selects a region according to the memory address MU and the processor identifier. And then it selects an entry of the region. If the selected entry holds an update address UA, the update address registering means issues a bus command which causes a write-back of data stored in the dirty block designated by the update address UA. If the designated dirty block exists, the dirty block writes back its data. Otherwise the bus command is ignored. Then, the update address registering means stores the memory address MU as an update address in the entry.
Thus, the update address registering means of the fourth aspect, different from that of the first aspect, changes the state of a cache block by issuing a bus command in order to assure that when an update address is removed from the update address storage means, the corresponding dirty block (if any) writes back its data at the same time.
In addition to the advantage of easier adaptation to a non-direct-map cache memory, there are other advantages about mapping the regions of the update address storage means to the cache memory configuration.
It is possible to organize the update address storage means as a single region which would omit the region selection mechanism of the update address registering means.
It is also possible to reduce the number of entries of a region. For example, it is reasonable that each region of the update address storage means applied to a four-way set associative cache memory has only two entries. This is because it does not happen frequently that over one half of the cache blocks belonging to the same way hold dirty data at the same time.
It should be noted, however, an oversimplified hardware implementation of the update address storage means would bring a critical performance degradation because of increasing the number of bus commands issued by the update address storage means.
It is also possible that a region of the update address storage means is selected only according to the memory address MU at which the data has been updated (the processor identifier is not used).
According to a fifth aspect of the present invention, there is provided a cache flush apparatus for use in a computer having at least one processor provided with a copy-back type cache memory having a bus snoop mechanism, a main memory and a system bus for connecting the at least one processor and the main memory, the cache flush apparatus comprising:
update address storage means having a plurality of regions each of which has one or more entries for storing the addresses of data held in dirty blocks;
update address registering means for monitoring the system bus to detect an update of data within the cache memory, selecting a region of the update address storage means according to a memory address, MU at which the data has been updated and an identifier of a processor which has updated the data, selecting an entry of the selected region, if the selected entry has an update address UA, issuing a bus command which cause a write back of data from the cache block designated by the update address UA, and storing the memory address MU as an update address in the selected entry;
update address removing means for monitoring the system bus to detect a write-back of data from a dirty block, selecting a region of the update address storage means according to a memory address MW at which the data has been written back and an identifier of a processor from which the data has been written back, trying to remove the update address which is equal to the memory address MW from an entry of the selected region for a predetermined time; and
flush executing means, in response to a request from the at least one processor, for issuing bus commands to the system bus each of which has one of the update addresses stored in the update address storage means and causes a write-back of data from the dirty block designated by the update address.
According to the fifth aspect of the present invention, the update address removing means selects a region and tries to find out an entry of the region having the update address which is equal to the memory address MW for a predetermined period. If it is successful, the cache flush apparatus behaves like that of the first aspect. Otherwise, the update address would remain in the update address storage means and the update address registering means will work well like that of the fourth aspect.
To compare the fifth aspect and the fourth aspect, the fifth aspect has an advantage that the number of bus commands issued by the update address registering means is reduced on behalf of the update address removing means.
It is preferable that the update address removing means continues searching of the selected region until a next bus command to be processed is detected, not until a predetermined time period passes.
Other than data write-back bus commands, there is another kind of bus commands which show there is no dirty block having a certain memory address. For example, suppose a cache memory issues a xe2x80x9cread-linexe2x80x9d bus command and there is no response from the other cache memories. The request/response pair indicates that there is no dirty block having the memory address included in the xe2x80x9cread-linexe2x80x9d bus command. Thus, the update address removing means of the fourth and the fifth aspect, detecting such request/response pair, can do the same operation as in the case of a data write-back bus command.
According to a sixth aspect of the present invention, there is provided a cache flush apparatus according to the fourth aspect, in which
each region of the update address storage means has a dirty block counter for counting the number of dirty blocks corresponding to the region; and
the update address registering means has means for incrementing the dirty block counter of the selected region when an update of data within a cache memory is detected, and characterized by further comprising:
decrement means for monitoring the system bus to detect a write-back of data from a dirty block, selecting a region of the update address storage means according to the memory address MW at which the data has been written back and the processor identifier from which the date has been written back, and decrementing the dirty block counter of the selected region; and
entry reclaiming means, when the value of a dirty block counter is decremented to the initial value, for making all the entries of the selected region empty.
According to the sixth aspect of the present invention, the dirty block counter of each region is properly maintained so that it indicates the exact number of dirty blocks corresponding to the region. Thus, when the dirty block counter of a region is decremented to the initial value, there is no dirty block corresponding to the region and so the update addresses can be removed from all the entries of the region (if any).
For the sake of the dirty block counter and entry reclaiming means, the number of bus commands issued by the update address registering means is reduced.
According to a seventh aspect of the present invention, there is provided a cache flush apparatus according to the fifth aspect, in which
each region of the update address storage means includes a dirty block counter for counting the number of dirty blocks corresponding to the region;
the update address registering means has means for incrementing the dirty block counter of the selected regions;
the update address removing means has means for decrementing the dirty block counter of the selected region, and characterized by further comprising:
entry reclaiming means, when the value of a dirty block counter is decremented to the initial value, for making all the entries of the selected region empty.
According to the seventh aspect of the present invention, the dirty block counter of each region is properly maintained as in the sixth aspect case.
According to an eighth aspect of the present invention, there is provided a fault-tolerant computer system having processors provided with a copy-back type cache memory having a bus snoop mechanism, a main memory and a system bus for connecting the processors and the main memory and arranged to periodically create a checkpoint within the main memory, comprising:
a cache flush apparatus according to either of the first to the seventh aspects;
normal data processing step where a processor performs normal data processing with the update address registering means of the cache flush apparatus running;
checkpoint creating step where the processor creates a checkpoint in the main memory by writing the context of the processor and activating the flush executing means; and.
rollback and recovery means where, when a fault occurs and the computer can not continue normal data processing step or checkpoint creating step any more, the processor rolls back the main memory to the state of the most recent checkpoint and restarts the normal data processing step.
A main memory based checkpoint/rollback type fault tolerant computer periodically creates a checkpoint in its main memory. The flush executing means of the cache flush apparatus accelerates a cache flush and advantageously the state of the cache blocks remains valid. Therefore a main memory based checkpoint/rollback type fault tolerant computer with the cache flush apparatus thereof increases the system performance considerably.
In addition to the above computer system for periodically acquiring checkpoints, the cache flush apparatus according to the present invention can be applied to a duplex computer system in which the primary computer alternately continues normal data processing and sends its checkpoint image to the secondary computer and when a fault occurs within the primary computer, the secondary computers takes over the normal data processing. The cache flush means of the cache flush apparatus accelerates the checkpoint creation of the primary computer.
Additional objects and advantages of the present invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the present invention.
The objects and advantages of the present invention may be realized and identified by means of the instrumentalities and combinations particularly pointed out in the appended claims.

Cache flush apparatus and computer system having the same


Provided is a bi-directional optical module package having an optical module unit comprising a substrate member, an optical filter installed on the substrate member to be inclined with respect to an optical fiber, a first holder supported by the substrate member on one side of the optical filter and having a laser diode and a lens for transmitting an optical signal to the optical fiber through one side of the optical filter, and a second holder supported by the substrate member on the other side of the optical filter and having a photodiode and a lens for receiving the optical signal received through the optical fiber through the optical filter.

An optical communication network for exchanging information at low cost, like a Fiber to the Home (FTTH) or a computer network using light, has a single optical fiber distribution network which connects between a center office or a host and, an individual subscriber or terminal through a single-strand optical fiber, which is one way of reducing an installation cost of optical fibers. Wavelength division multiplexing (WDM) in which a wavelength of signal light is divided prior to use is employed to simultaneously transceive information through the single optical fiber distribution network.
An optical module has been manufactured such that a laser diode (to be abbreviated as LC hereinafter) module and a photodiode (to be abbreviated as PD hereinafter) module are separately fabricated and incorporated into the optical module. In recent years, however, the FTTH or the computer optical network having an advantageous feature of cost effectiveness has gained popularity. Accordingly, there has been rapidly increasing demand for a bi-directional optical module capable of simultaneously transceiving an optical signal through a single-strand optical fiber. Such a conventional bi-directional optical module, as shown in FIG. 1, has been assembled such that a top open (TO) type LD module 1 and a TO type PD module 2 are simply combined with each other around an optical filter 3.
In the above-described bi-directional optical module, that is, a simply assembled package of TO type LD and PD modules, the TO type LD module and the TO type PD module are separately used, so that the module package becomes bulky, making it difficult to achieve miniaturization. Thus, it is quite difficult for the bi-directional optical module to satisfy the Small Form Factor Pluggable Transceiver Multi-Source Agreement (SMF MSA) which has been recently internationally standard. In addition, a distance between the LD and PD modules increases, e.g., 10 mm or more, optical axes of the LD and PD modules may often be misaligned due to cumulative errors, including a precision error metal blocks supporting the LD and PD modules, errors in positions in a lens, an optical filter, and the like, much time is required for optical alignment, and inferiority in the reception sensitivity may become relatively severe.
Meanwhile, since the bi-directional optical module is configured such that the LD and PD modules, the lens, the optical filter, and other elements are fixed on a metal member, thermal expansion of the metal member depending on a change in the temperature may considerably affect the operation of the bi-directional optical module, for example, a great change in the optical path. A bi-directional optical module having a thermal expansion problem is quite difficult to meet an optical output requirement that a change in the optical output be within ±1 dB operating temperature range, generally −40 to 85° C.
Korean Patent Registration No. 10-0289040 discloses a bi-directional optical communication module using a single optical fiber. In the disclosed bi-directional optical communication module, a bi-directional optical device including a semiconductor laser having a waveguide and a light receiving element is integrated on a single chip and the bi-directional optical device is optically coupled to a single optical fiber. When the optical fiber is optically coupled to the semiconductor laser and the light receiving element, transmission light emitted from the semiconductor laser is optically coupled to a core of the optical fiber and a cross section of the optical fiber is ground to form an acute angle with respect to the optical fiber to allow reception light emitted from the core of the optical fiber to concentrate on a light receiving area of the bi-directional optical device for optical coupling.
One way to prevent an assembling failure of the existing bi-directional optical communication module is to integrate a semiconductor laser and a light receiving element on a single chip, which, however, results in a deterioration of a light focusing power, making it difficult to achieve transceiving of the light.
Korean Patent Publication No. 2003-0032774 discloses a bi-directional optical module having an optical transmitting function through a single optical fiber. The disclosed bi-directional optical module is configured such that a light receiving block, an LD block and a double-sided m-PD block are fixedly installed on equipment in which of a light source, an optical filter and a lens are assembled. The use of the assembling equipment reduces the number of optical components of the bi-directional optical module and the number of processes for performing laser welding. However, it is quite difficult to achieve miniaturization of the bi-directional optical module.


Provided is a dynamic shopping cart with collapsible walls. The shopping cart can either be used with the collapsible wall in place or in collapsed position.

People use personal shopping carts to carry their groceries and other items to their home. These personal shopping carts typically have a basket, a handle, and wheels. The personal shopping carts that are currently on the market have several drawbacks. First, they are very flimsy and hard to turn, making it difficult to push the cart. Second, the objects put in the shipping cart are limited by the size of the basket. Third, these shopping carts provide no means for carrying personal objects like a cell phone, or other items, such as clothing. There is a need in the art for a personal shopping cart that meets the needs of the ordinary person.


Certain aspects and features are directed to an electric subsurface safety valve including an integrated communications system that can be disposed in a wellbore. The electric subsurface safety valve can include a body adapted to be coupled to a cable, a communications system disposed in the body, and a closure mechanism. The body can be disposed within the wellbore. The communications system can include one or more transceiving devices and a processing device. The transceiving devices can communicate signals via the cable to a rig at the surface and can wirelessly communicate signals to target tool in the well system. The processing device can process signals received by the one or more transceiving devices for communication via the cable. The closure mechanism can be positioned in a passageway defined by the wellbore and can control a flow of fluid to through the passageway.

An intelligent tool operating in a well system, such as an oil or gas well for extracting fluids that can include petroleum oil hydrocarbons from a subterranean formation, can include a communications system for communicating with the control system. The range of the communications system can be less than the depth at which the intelligent tool is used. An intelligent tool may operate at a depth that is greater than the range of the intelligent tool's communications system. The intelligent tool may communicate with a control system at the surface via signal repeaters coupled to the casing string. Signal repeaters that may be powered by a battery or other local power source can have an operational lifespan of several months.
Systems and methods are desirable that are usable to communicate with intelligent tools in a well system.

Eletric subsurface safety valve with integrated communications system


An amplifier in a telephone call station which is capable of indicating to a telephone call distribution system whether a microphone headset is in electrical communication with the telephone call station. The amplifier simulates being physically disconnected from the telephone call distribution system when the microphone is disconnected from the amplifier thus informing the telephone call distribution system to redirect telephone calls originally destined for that telephone call station.

Telephone call distribution systems, such as those which queue and distribute telephone calls to a number of operators or service personnel, typically distribute the next call in the queue to the next available operator by simply detecting which communication line to an operator is not in use. To distinguish the case where a line to a telephone call station is not being used because the operator is available to answer the call, from the case where a line is not being used because there is no operator present at the telephone call station to answer a call, the telephone call distribution system typically makes use of the headset amplifier which is present at each station.
Generally, each telephone call station in the telephone call distribution system includes a removable amplifier which is used to amplify signals to and from a telephone headset. An operator who is leaving his or her call station unplugs the headset amplifier from the telephone call station console. The removal of the amplifier is detected by the telephone call station which serves to notify the telephone call distribution system that no operator is present at the telephone call station console. This method of detecting whether an operator is present at a telephone call distribution station not only requires that each operator have his or her own headset, but also requires that each operator has his or her own headset amplifier. This arrangement results in significant equipment costs, particularly in view of the relatively short life of headsets.
The present invention relates to a means for indicating that an operator has left his or her station without removing the headset amplifier associated with a telephone call station.

Telephone headset amplifier and method of operation


In an optical transmission system, a multiplexer frequency-division-multiplexes a plurality of signals, and outputs the resultant signal to an FM modularor. The FM modulator converts the frequency-division-multiplexed signal into an FM modulated signal through frequency modulation using the frequency-division-multiplexed signal as an original signal. A frequency-divider converts the FM modulated signal into a frequency-divided FM modulated signal whose frequency is xc2xdn (n is an integer of not less than 1) the frequency of the FM modulated signal. An optical modulator has a predetermined input-voltage vs. output-optical-power characteristic, and is biased at the minimum point (voltage) about the output optical power. The optical modulator modulates an unmodulated light fed from a light source with the applied frequency-divided FM modulated signal to produce an optical signal whose optical carrier component is suppressed, and sends the optical signal to an optical transmission line. An optical receiver receives the optical signal, and square-law detects the signal to convert into an FM modulated signal. A FM demodulator demodulates the FM modulated signal to reproduce the original frequency-division-multiplexed signal. This configuration makes it possible to narrow the bandwidth of an FM modulated signal while increasing the frequency deviation thereof, and realize high-quality signal transmission as a result.

1. Field of the Invention
The present invention relates to optical transmission systems, and more particularly to a system that optically transmits a frequency-division-multiplexed signal obtained by frequency-division-multiplexing a plurality of signals.
2. Description of the Background Art
FIG. 11 is a block diagram exemplarily showing the configuration of a conventional optical transmission system for transmitting a frequency-division-multiplexed signal. As will be known from FIG. 11, this optical transmission system comprises a multiplexer 1100, an FM modulator 1101, an optical transmitter 1104, an optical receiver 1106, and an FM demodulator 1107. In the optical transmission system, an electrical transmission line 1102 connects the FM modulator 1101 and the optical transmitter 1104 to each other, and an optical transmission line 1105 connects the optical transmitter 1104 and the optical receiver 1106 to each other.
The operation of the conventional optical transmission system in the above configuration will be described below. The multiplexer 1100 frequency-division-multiplexes a plurality of signals, and outputs the resultant signal to the FM modulator 1101. The FM modulator 1101 converts the frequency-division-multiplexed signal into a frequency-modulated signal (hereinafter, referred to as xe2x80x9cFM modulated signalxe2x80x9d) having a predetermined frequency deviation through frequency modulation. After that, the FM modulator 1101 outputs the FM modulated signal to the electrical transmission line 1102. The optical transmitter 1104 receives the FM modulated signal through the electrical transmission line 1102, then converts the signal into an optical signal, and sends the optical signal to the optical transmission line 1105. The optical receiver 1106 receives the optical signal through the optical transmission line 1105, then converts the signal into an FM modulated signal which is an electrical signal, and outputs the FM modulated signal to the FM demodulator 1107. The FM demodulator 1107 demodulates the FM modulated signal to reproduce the original frequency-division-multiplexed signal.
The optical transmission system in the above configuration is described in detail in xe2x80x9cOptical Super Wide-Band FM Modulation Scheme and Its Application to Multi-Channel AM Video Transmission Systemsxe2x80x9d by K. Kikushima et al. (IOOC""95 Technical Digest, Vol. 5 PD2-7, pp.33-34), and other documents. The optical transmission system converts a frequency-division-multiplexed signal into an FM modulated signal, and then optically transmits and demodulates the FM modulated signal to reproduce the original frequency-division-multiplexed signal. The optical transmission system utilizes an FM gain in the FM transmission to improve the signal-to-noise power ratio (SNR) of the demodulated signal (i.e., the frequency-division-multiplexed signal), thereby enabling high-quality signal transmission.
Thus, the above-described optical transmission system can realize high-quality multi-channel signal transmission with an optical fiber.
However, the above-described system for optically transmitting an FM modulated signal has the following specific problems due to the properties of the FM modulated signal and the nonlinearity of an optical fiber.
An FM modulation scheme increases a frequency deviation to acquire a greater FM gain, thereby enabling signal transmission of higher quality than other modulation schemes such as amplitude modulation. On the other hand, the increased frequency deviation requires a wider signal band. In addition, in the FM modulation scheme, linear distortion tends to occur under the influence of the group delay characteristic of a transmission line and the like (the characteristic that a propagation delay varies depending on a frequency). Therefore, the transmission line must be designed with particular attention. However, as a signal band becomes wider, the group delay variations in the band become more difficult to sufficiently suppress.
In a general optical modulation scheme, the optical frequency spectrum, of an optical signal is composed of a steep-shaped optical carrier component, which has narrow spectral line-width, and upper and lower sidebands, as shown in FIG. 12B. The upper and lower sidebands are geometrically similar to the frequency spectrum of a modulating signal. Therefore, if a wide-band signal like an FM modulated signal is used as a modulating signal in optical modulation, the optical frequency spectrum of the optical signal also becomes wider. The optical signal having such wide optical frequency spectrum becomes susceptible to the chromatic-dispersion of an optical fiber (the characteristic that a propagation delay varies depending on a wavelength). The affected optical signal component interacts with the optical carrier component to induce harmonic distortion in the FM modulated signal, resulting in waveform deterioration of the transmitted signal.
As is known from the above, the conventional optical transmission system has the specific problem that the quality of the transmitted signal is degraded due to the wide-band property of an FM modulated signal.
Therefore, an object of the present invention is to provide an optical transmission system capable of narrowing the bandwidth of an FM modulated signal while increasing the frequency deviation thereof to realize high-quality signal transmission. The present invention has the following features to attain the object above.
A first aspect of the present invention is directed to a transmission system for optically transmitting a frequency-division-multiplexed signal, which is obtained by frequency-division multiplexing a plurality of signals, from a transmitting end to a receiving end. The transmission system comprises at the transmitting end, a multiplexer for frequency-division multiplexing the plurality of signals to produce the frequency-division-multiplexed signal, an FM modulator for converting the frequency-division-multiplexed signal into a frequency-modulated signal through frequency modulation using the frequency-division-multiplexed signal as an original signal to output the frequency-modulated signal as an FM modulated signal, and an optical transmitter for converting the FM modulated signal into an optical-intensity-modulated signal whose optical carrier component is suppressed in the optical frequency spectrum through optical modulation using the FM modulated signal as an original signal to send the optical-intensity-modulated signal to the receiving end. The transmission system also comprises at the receiving end, an optical receiver for receiving the optical-intensity-modulated signal from the optical transmitter, and converting the optical-intensity-modulated signal into an electrical signal corresponding to the FM modulated signal through photodetection based on a square-law detection characteristic to output the electrical signal as a received FM modulated signal, and an FM demodulator for demodulating the received FM modulated signal to reproduce the frequency-division-multiplexed signal.
As described above, in the first aspect, the FM modulated signal is obtained through frequency modulation using a frequency-division-multiplexed signal as an original signal. The FM modulated signal is converted into an optical-intensity-modulated signal at the transmitting end. The optical-intensity-modulated signal has an optical frequency spectrum in which upper and lower sidebands distribute geometrically similarly to the frequency spectrum of the original signal for the optical modulation and in which an optical carrier component is suppressed. Then, the optical-intensity-modulated signal is photodetected based on a square-law detection characteristic at the receiving end. At the receiving end, the optical transmission system thus obtains an FM modulated signal, having a frequency deviation twice as large as the one of the original FM modulated signal produced at the transmitting end, as a received FM modulated signal. In this manner, the optical transmission system can narrow (reduce in half) the bandwidth of the FM modulated signal at the transmitting end while securing the frequency deviation thereof large enough to acquire a sufficient FM gain in FM demodulation. As a result, it is possible to prevent the waveform of the transmitted signal from being deteriorated due to the group delay characteristic of the electrical transmission line and the chromatic-dispersion of the optical transmission line, and to realize signal transmission of good quality.
According to a second aspect, in the first aspect, the optical transmitter includes a light source for outputting an unmodulated light, and an optical modulator for modulating the unmodulated light with the FM modulated signal to produce the optical-intensity-modulated signal. The optical modulator has the Mach-Zehnder interferometer structure with a predetermined input-voltage vs. output-optical-power characteristic, and is biased in the input-voltage vs. output-optical-power characteristic such that the output optical power is at the minimum.
As stated above, in the second aspect, the optical modulator used herein is an external optical modulator having the Mach-Zehnder interferometer structure. A modulating signal (an FM modulated signal) is applied to the optical modulator with respect to the xe2x80x9cvalleyxe2x80x9d where the output optical power is at the minimum in the input-voltage vs. output-optical-power characteristic (which is periodic like a sine wave) of the optical modulator. The optical modulator thus produces an optical-intensity-modulated signal whose optical carrier component is suppressed. The suppression of the optical carrier component prevents the waveform from being deteriorated by the chromatic-dispersion of the optical transmission line. In addition, the optical-intensity-modulated signal has an optical frequency spectrum in which upper and lower sidebands distribute geometrically similarly to the frequency spectrum of the original signal for the optical modulation. Therefore, after the optical-intensity-modulated signal is square-law detected at the receiving end, the frequency deviation of the FM modulated signal is doubled, thereby making it possible to realize high-quality signal transmission.
According to a third aspect, in the second aspect, the transmission system further comprises a frequency-divider provided between the FM modulator and the optical transmitter for converting the FM modulated signal outputted from the FM modulator into a frequency-divided FM modulated signal whose frequency is xc2xdn the frequency of the FM modulated signal, the n being an integer of not less than 1, wherein the optical modulator modulates the unmodulated light with the frequency-divided FM modulated signal to produce the optical-intensity-modulated signal.
As described above, in the third aspect, the optical transmission system previously produces in the FM modulator an FM modulated signal having a frequency deviation larger enough to acquire a desired FM gain. The optical transmission system then converts the FM modulated signal into a frequency-divided FM modulated signal, and next converts the frequency-divided FM modulated signal into an optical-intensity-modulated signal for transmission. This reduces the phase noise in the FM modulated signal to be optically transmitted and FM demodulated. As a result, high-quality signal transmission can be realized.
According to a fourth aspect, in the first aspect, the optical transmitter includes a light source for outputting an unmodulated light, an optical branching circuit for branching the unmodulated light fed from the light source into first and second unmodulated lights, an optical modulator for modulating the first unmodulated light with the FM modulated signal to produce the optical-intensity-modulated signal, the optical modulator having the Mach-Zehnder interferometer structure with a predetermined input-voltage vs. output-optical-power characteristic, and being biased in the input-voltage vs. output-optical-power characteristic such that the output optical power is at the maximum, and an optical combining circuit for combining the optical-intensity-modulated signal produced by the optical modulator and the second unmodulated light to cancel the optical carrier component of the optical-intensity-modulated signal with the second unmodulated light and output the optical-intensity-modulated signal whose optical carrier component is suppressed.
As described above, in the fifth aspect, the optical-intensity-modulated signal produced by the optical modulator is combined with the second unmodulated light set in an opposite phase to the optical carrier component of the optical-intensity-modulated signal. The optical carrier component of the optical-intensity-modulated signal is thus canceled by the second unmodulated light. As a result, it is possible to produce an optical-intensity-modulated signal whose optical carrier component is suppressed.
According to a sixth aspect, in the fourth aspect, the transmission system further comprises a frequency-divider provided between the FM modulator and the optical transmitter for converting the FM modulated signal outputted from the FM modulator into a frequency-divided FM modulated signal whose frequency is xc2xdn the frequency of the FM modulated signal, the n being an integer of not less than 1, wherein the optical modulator modulates the first unmodulated light with the frequency-divided FM modulated signal to produce the optical-intensity-modulated signal.
As stated above, in the sixth aspect, as in the third aspect, the optical transmission system previously produces in the FM modulator an FM modulated signal having a frequency deviation larger enough to acquire a desired FM gain, then converts the FM modulated signal into a frequency-divided FM modulated signal, and converts the signal into an optical-intensity-modulated signal for transmission. It is therefore possible to reduce the phase noise in the FM modulated signal to be optically transmitted and FM demodulated.
According to a seventh aspect, in the first aspect, the transmission system further comprises a frequency-divider provided between the FM modulator and the optical transmitter for converting the FM modulated signal outputted from the FM modulator into a frequency-divided FM modulated signal whose frequency is 1xc2xdn the frequency of the FM modulated signal, the n being an integer of not less than 1, wherein the optical transmitter includes an optical modulator for producing the optical-intensity-modulated signal through the optical modulation using the frequency-divided FM modulated signal as an original signal.
As described above, in the seventh aspect, the optical transmission system previously produces in the FM modulator an FM modulated signal having a frequency deviation larger enough to acquire a desired FM gain, then converts the FM modulated signal into a frequency-divided FM modulated signal, and next converts the signal into an optical-intensity-modulated signal for transmission. It is therefore possible to reduce the phase noise in the FM modulated signal to be optically transmitted and FM demodulated.
An eighth aspect of the present invention is directed to an transmitter for use in a transmission system for optically transmitting a frequency-division-multiplexed signal, which is obtained by frequency-division-multiplexing a plurality of signals, from a transmitting end to a receiving end. The transmitter comprises a multiplexer for frequency-division multiplexing the plurality of signals to produce the frequency-division-multiplexed signal, an FM modulator for converting the frequency-division-multiplexed signal into a frequency-modulated signal through frequency modulation using the frequency-division-multiplexed signal as an original signal to output the frequency-modulated signal as an FM modulated signal, and an optical transmitter for converting the FM modulated signal into an optical-intensity-modulated signal whose optical carrier component is suppressed in the optical frequency spectrum through optical modulation using the FM modulated signal as an original signal to send the optical-intensity-modulated signal to the receiving end.
According to a ninth aspect, in the eighth aspect, the optical transmitter includes a light source for outputting an unmodulated light, and an optical modulator for modulating the unmodulated light with the FM modulated signal to produce the optical-intensity-modulated signal, the optical modulator having the Mach-Zehnder interferometer structure with a predetermined input-voltage vs. output-optical-power characteristic, and being biased in the input-voltage vs. output-optical-power characteristic such that the output optical power is at the minimum.
According to a tenth aspect, in the ninth aspect, the transmitter further comprises a frequency-divider provided between the FM modulator and the optical transmitter for converting the FM modulated signal outputted from the FM modulator into a frequency-divided FM modulated signal whose frequency is xc2xdn the frequency of the FM modulated signal, the n being an integer of not less than 1, wherein the optical modulator modulates the unmodulated light with the frequency-divided FM modulated signal to produce the optical-intensity-modulated signal.
According to an eleventh aspect, in the eighth aspect, the optical transmitter includes a light source for outputting an unmodulated light, an optical branching circuit for branching the unmodulated light fed from the light source into first and second unmodulated lights, an optical modulator for modulating the first unmodulated light with the FM modulated signal to produce the optical intensity-modulated signal, the optical modulator having the Mach-Zehnder interferometer structure with a predetermined input-voltage vs. output-optical-power characteristic, and being biased in the input-voltage vs. output-optical-power characteristic such that the output optical power is at the maximum, and an optical combining circuit for combining the optical-intensity-modulated signal produced by the optical modulator and the second unmodulated light to cancel the optical carrier component of the optical-intensity-modulated signal with the second unmodulated light, and output the optical-intensity-modulated signal whose optical carrier component is suppressed.
According to a thirteenth aspect, in the eleventh aspect, the transmitter further comprises a frequency-divider provided between the FM modulator and the optical transmitter for converting the FM modulated signal outputted from the FM modulator into a frequency-divided FM modulated signal whose frequency is xc2xdn the frequency of the FM modulated signal, the n being an integer of not less than 1, wherein the optical modulator modulates the first unmodulated light with the frequency-divided FM modulated signal to produce the optical-intensity-modulated signal.
According to a fourteenth aspect, in the eighth aspect, the transmitter further comprises a frequency-divider provided between the FM modulator and the optical transmitter for converting the FM modulated signal outputted from the FM modulator into a frequency-divided FM modulated signal whose frequency is xc2xdn the frequency of the FM modulated signal, the n being an integer of not less than 1, wherein the optical transmitter includes an optical modulator for producing the optical-intensity-modulated signal through optical modulation using the frequency-divided FM modulated signal as an original signal.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.

System for optically transmitting frequency-division-multiplexed signal and transmitter therefor

Matsushita Electric Industrial Co., Ltd.


A head restraint for a vehicle seat is provided. The head restraint includes a head restraint subsection and a driving device. The head restraint subsection is movable from a use position to a safety position, while the driving device is configured to move the head restraint subsection from the use position to the safety position. The driving device includes at least two components which are movable with respect to each other under the action of a first force. At least one component has an oblique surface which acts on the other component and is inclined in relation to a direction of the first force. Movement of the at least one component under the action of the first force transmits a second force on the other component in a direction different than the first force.

The present invention relates to a head restraint for a vehicle seat. More specifically, the present invention relates to a head restraint wherein at least a portion of the head restraint moves from a use position toward the head of the seat occupant into a safety position in the event of an accident (i.e. an active head restraint).
German Publication No. DE 199 23 909 A1 discloses a head restraint according to the generic type. The disclosed head restraint comprises a basic body which is connected rigidly and/or height-adjustably to the backrest of the vehicle seat via retaining bars. The basic body is arranged in a padded segment of a trough-like design. In the event of an accident, the padded segment is moved in a translatory manner toward the head of the seat occupant to reduce the likelihood of a whiplash trauma. The force required for moving the basic body is produced by a spring, which is prestressed in the direction of displacement, within a telescopic guide device.
German Publication No. DE 39 00 495 A1 describes a further head restraint according to the generic type, in which a padded segment is configured to pivot forward in relation to the basic body about a fixed axis of rotation in the event of an accident. A spring-loaded piston/cylinder arrangement in conjunction with a supporting lever, in which arrangement the piston rod is coupled to the basic body in the region of the axis of rotation and the cylinder is coupled to the padded segment, serves as driving device.
Furthermore, German Publication No. DE 199 41 712 C1 discloses a head restraint, in which a shiftable padded element is connected to the basic body via a scissors-type mechanism, by means of which the padded element can be moved forward from a rest position into a use position.
There is a need for an active head restraint with an effective driving device of simple and compact construction.


Aspects of the disclosure relate to computing platforms that utilize machine learning to reduce false positive/negative collision output generation. A computing platform may apply machine learning algorithms on received data to generate a collision output. In response to generating the collision output indicating a collision, the computing platform may identify a data collection location. If the data collection location is within a predetermined radius of a false positive collection location, the computing platform may modify the collision output to indicate a non-collision. If the data collection location is not within the predetermined radius, the computing platform may compute a score using telematics data and compare the score to a predetermined threshold. If the score does not exceed the predetermined threshold, the computing platform may modify the collision output to indicate a non-collision. If the score exceeds the predetermined threshold, the computing platform may affirm the collision output indicating a collision.

Aspects of the disclosure relate to enhanced processing systems for executing machine learning algorithms and automatically determining whether or not a collision occurred. Many organizations and individuals use sensor data to determine whether or not a collision occurred. In many instances, however, these determinations may result in false positive and/or false negative results. In addition to the inaccuracies caused by such results, unnecessary resources may be expended or deployed in response to a false positive determination. Similarly, resources may be wrongfully conserved or withheld in response to a false negative determination.

Collision analysis platform using machine learning to reduce generation of false collision outputs


Apparatus and methods for harnessing external light to illuminate a display screen of an electronic device are provided. The display screen may be illuminated using a light harness, a reflector, a translucent surface, or any combination thereof. The light harness may be cylindrical or hexahedral. The light harness may be coupled to an external light input or a collector. The reflector may be repositioned toward or away from the display screen to reflect external light toward the display screen. The translucent surface may allow external light to pass through it to illuminate the display screen. The translucent surface may protect the rear face of the display screen, or the rear face of the display screen may itself be translucent.

Currently, there are a wide variety of electronic devices, such as laptop computers and cellular telephones, that include a display screen for presenting visual information to a user (e.g., a liquid crystal display ("LCD") screen). These electronic devices often devote significant portions of the physical space within the device to high-powered components for illuminating the display screen. However, these electronic devices may not be used effectively in certain physical settings, such as, for example, where the external or ambient light is brighter than the illumination of the display screen. As a result, a user may not be able to view the information on the display screen sufficiently. For example, a user may have difficulty viewing the information presented on a display screen of a laptop computer while outdoors on a sunny day.
Therefore, it would be beneficial to provide apparatus and methods for collecting external light to help illuminate a display screen of an electronic device.

External light illumination of display screens


An apparatus for forming a fiber lap from fiber tufts includes a fiber opener having an input formed of a fiber feeding mechanism and a series of sawtooth rolls through which the fiber material introduced by the fiber feeding mechanism consecutively passes in a direction of advance; a pneumatic fiber stripping device including a blowing device for directing an airstream toward the last sawtooth roll of the series as viewed in the direction of fiber advance; a hood having an inner face defining a chamber situated above and downstream of the last sawtooth roll for receiving fiber material carried from the last sawtooth roll by the air stream of the fiber stripping device; an air-pervious, continuously moving receiving member disposed in the chamber downstream of the last sawtooth roll; and a suction device facing the underside of the receiving member for generating an air stream passing through the receiving member for drawing fiber material in the chamber onto the upper face of the receiving member for forming a fiber lap thereon.

1. Field of the Invention
This invention relates to an apparatus for making a fiber lap from chemical fibers, cotton or the like. The fiber lap is utilized, as a more or less coherent mass, as the input material for further fiber processing such as carding, cleaning and the like. The lap forming apparatus is of the type which includes a fiber opening device having a fiber feeding device at its input and a series of rotating sawtooth rolls and a depositing channel in which the fiber material thrown by the last sawtooth roll is deposited on a continuously moving, fiber-supporting surface which is air-pervious and is exposed to suction for causing the fiber tufts to temporarily adhere thereon.
2. Background Information
In a known apparatus of the above-outlined type such as disclosed, for example, in German Patent No. 3,522,208, an endless circulating screening belt is, as a fiber receiving surface, positioned underneath a plurality of sawtooth rolls (carding cylinders). The sawtooth rolls throw the fiber material tangentially downwardly onto the upper surface of the travelling screen belt. The air needed for the conveying air stream between adjoining sawtooth rolls is drawn in between the sawtooth rolls from supply air channels arranged above the bight of the rolls. In this manner, with each sawtooth roll there is associated a downwardly oriented suction stream.
It is a disadvantage of the known prior art construction in that it is technologically complex, and that the individual sawtooth rolls discharge the fiber material onto the screen belt at different flow rates.


A semiconductor manufacturing includes: an ion source and a beam line for introducing an ion beam into a target film which is formed over a wafer with an insulating film interposed therebetween; a flood gun for supplying the target film with electrons for neutralizing charges contained in the ion beam; a rotating disk for subjecting the target film to mechanical scanning of the ion beam in two directions composed of r-θ directions; a rear Faraday cage for measuring the current density produced by the ion beam; a disk-rotational-speed controller and a disk-scanning-speed controller for changing the scanning speed of the target film; and a beam current/current density measuring instrument for controlling, according to the current density, the scanning speed of the target film.

(a) Fields of the Invention
The present invention relates to semiconductor manufacturing apparatus for injecting impurities into semiconductor devices with insulating films.
(b) Description of Related Art
In recent years, thickness reduction of a gate insulating film as well as miniaturization of a semiconductor element has been advancing. Thus, the possibility is growing that the gate insulating film is damaged during device fabrication processes to cause dielectric breakdown.
For example, in an ion implantation process, an ion beam with a positively charged energy is directly implanted into a semiconductor element surface and a wafer (semiconductor substrate) surface, so that the surface of the formed semiconductor device is easily charged positively. If the charge quantity implanted by the ion beam exceeds a fixed value, that is, the breakdown charge quantity Qbd specific to a gate insulating film, breakdown of the insulating film occurs (see, for example, Hiroko KUBO et al., "Quantitative Charge Build-Up Evaluation Technique by Using MOS Capacitors with Charge Collecting Electrode in Wafer Processing", IEICE Transactions on Electronics Vol. E79-C No. 2, pp. 198-205, February 1996). Since this device generally has a so-called antenna structure in which the area of a gate electrode portion is greater than the area of the gate insulating film, dielectric breakdown is likely to occur. Furthermore, this breakdown occurs more easily as the antenna ratio which is the ratio between the area of the gate electrode and the area of the gate insulating film is higher.
It is known that the breakdown by an ion beam occurs more easily as the beam current density during ion implantation is higher and that the breakdown occurs more significantly as the acceleration energy is higher. To deal with such characteristics, a proposal is made that the acceleration energy and the beam current as the ion implantation condition are set at values equal to or less than the breakdown charge quantity Qbd of the gate insulating film, thereby avoiding dielectric breakdown caused by charge build-up (see, for example, Japanese Unexamined Patent Publication No. H7-221306 (referred hereinafter to as Patent Document 1)).
On the other hand, a flood gun system is known which prevents positive charge build-up in the manner in which in order to prevent positive charge build-up induced by an ion beam, electrons together with the ion beam are supplied during ion implantation to neutralize positive charges. However, it is also known that since this flood gun system also supplies negative charges (electrons) directly to the surface of the semiconductor device, the resulting semiconductor surface is negatively charged to cause breakdown by negative charge build-up. To deal with such disadvantages, an approach is reported that energies of electrons supplied from the flood gun system are suppressed to a lower value, thereby reducing negative charge build-up of the surface of the semiconductor element to a fixed value equal to or less than the breakdown voltage (see, for example, Japanese Patent No. 3202002 (referred hereinafter to as Patent Document 2)).
Although the approach disclosed by Patent Document 2 reduces breakdown of the gate insulating film caused by negative charge build-up resulting from the flood gun system, breakdown of the gate insulating film caused by positive charge build-up resulting from the ion beam is still not completely prevented. The reason for this is as follows: even though electrons are supplied from the flood gun system during ion implantation, the potential at the moment when the ion beam is radiated onto the wafer is not completely neutralized and the potential distribution determined by the ion beam and the electrons is still present thereon. Therefore, as described above, charge build-up occurs depending on not only the beam current and the acceleration energy of the ion beam but also the scanning speed of the ion beam onto the wafer. Among others, the inventors found that the charge build-up condition by the ion beam greatly differs depending on the beam scanning speed.
Beam scanning methods include: the method in which with a wafer fixed, an ion beam is electrostatically or electromagnetically scanned two-dimensionally in X-Y directions; the method in which with an ion beam electrostatically or electromagnetically scanned one-dimensionally in one direction, a wafer is subjected to mechanical scanning in the perpendicular direction to the ion beam scanning direction and one-dimensionally in one direction; and the r-θ scanning method in which while an ion beam is fixed and a rotating disk with a wafer held thereon is being rotated, one-dimensional scanning is carried out in the radial direction of the disk. Other than these methods, various types of methods, such as the method in which with an ion beam fixed, a wafer is subjected to mechanical scanning two-dimensionally in X-Y directions, are used. Therefore, the relative linear speed between the ion beam and the wafer greatly differs depending on a beam scanning method used. As shown above, since various types of scanning speeds ranging from an extremely low-speed scanning to an extremely high-speed scanning are present, a method for reducing positive charge build-up regardless of these scanning speeds and methods is demanded.


A method of constructing fences, and fences constructed using the method. Posts are set into the ground. Flat pieces called “floating deadmen” are set on the ground. Braces are sawed off at forty-five degree angles on each end, so that they have flat ends at right angles. A spot on the side of the post is flattened, so a flat end of a brace can fit flush against it. The brace is then placed so that the other one of its flattened ends lies on the floating deadmen. A length of wire is cut, and its ends are joined by a stainer. The loop of wire is then placed around the post and brace, and is tightened using the strainer. The tops of terminal and corner posts are joined to adjacent posts by rails. Fencing wire holders are fastened to the posts, and fencing wire is placed in the holders.

1. Field of the Invention
The present invention relates to methods and apparatus for a fence post brancing system.
2. Description of the Prior Art
As they age, the corners of fences for livestock tend to cave in towards the direction of the tension in the fence. This is a gradual process, rather than the result of sudden movement. The present invention addresses this problem, in a way that is not shown in the prior art.
U.S. Pat. No. 3,785,107, issued on Jan. 15, 1974, to George W. Garretson, discloses a repair assembly for fences posts including bracing rods. The instant invention is distinguishable, in that it is a system for the original construction of a fence, rather than its repair.
U.S. Pat. No. 4,349,181, issued on Sep. 14, 1982, to Lynn E. Asher and Antony J. Conway, discloses an end or corner fence post construction, including a brace resting on a deadman plate below ground level. The instant invention is distinguishable, in that it has a floating deadman and wire straps for reinforcement.
U.S. Pat. No. 4,763,879, issued on Aug. 16, 1988, to Michael D. Wasicek and Larry D. Wasicek, discloses a metal fence post connector, including braces. The instant invention is distinguishable, in that it is for wooden fences.
U.S. Pat. No. 4,893,787, issued to Jan. 16, 1990, to Terry D. Watson, discloses a fence corner post with a brace and strut, all made of steel. The instant invention is distinguishable, in that it is for wooden fences.
U.S. Pat. No. 5,042,780, issued on Aug. 27, 1991, to M. Dean Yearwood, discloses a metal brace for supporting a metal fence post. The instant invention is distinguishable, in that it is for wooden fences.
U.S. Pat. No. 5,061,109, issued on Oct. 29, 1991, to Donald Miller, discloses fence post bracing and a method of installation in a section of fence, without the use of a floating deadman as in the instant invention.
U.S. Pat. NO. 5,139,235, issued on Aug. 18, 1992, to Willis G. Kilmen, discloses a corner fence post system, with braces having auger flights underground, rather than floating deadmen, as in the instant invention.
U.S. Pat. No. 5,577,716, issued on Nov. 26, 1996, to Jack Navarez, discloses a post support with offset slanted stake, without the use of a floating deadman or wire straps as in the instant invention.
U.S. Pat. No. 5,738,342, issued on Apr. 14, 1998, to Lonnie Van Winkle, discloses a fence corner arrangement with interlocking posts and braces, without diagonal braces resting on floating deadmen, as in the instant invention.
U.S. Pat. No. 5,911,411, issued on Jun. 15, 1999, to Trevor Krause and Anthony John Baillieu, discloses a combination strainer and stay and thrust member. Unlike the brace of the instant invention, the prop member is not cut at a forty five degree angle at its edges, but fits into a hole in the post and a groove in the thrust member.
U.S. Pat. No. 6,340,151, issued on Jan. 22, 2002, to Jimmy D. Snow, discloses fence cornerpost assembly brackets, but does not disclose a brace resting on a floating deadman, as in the instant invention.
U.S. Pat. No. 6,527,255, issued on Mar. 4, 2003, to O'Berry et al., discloses a flat fence post protector that lies on the surface of the ground and supports a vertical post, but does not disclose a diagonal brace resting on a floating deadman, as in the instant invention.
U.S. Pat. No. 6,622,436, issued on Sep. 23, 2003, to Kevin Robert Kretsch, discloses a goose barrier, with a spool for tightening a line between posts. There are no braces, as in the instant invention.
U.S. Pat. No. 6,866,252, issued on Mar. 15, 2005, to Bryan J. Pulliam, discloses a portable fencing system, with a winch for tightening wires and ground anchor stakes, rather than braces resting on floating deadmen, as in the instant invention.
British Patent No. 2 295 628, published on Jun. 5, 1996, inventor Malcolm Peter Carl Tandy, discloses a brace for a fencing system, with post supports that are driven into the ground, rather than floating deadmen that rest on the ground, as in the instant invention.
None of the above inventions and patents, taken either singly or in combination, is seen to describe the instant invention as claimed.