A method for encoding sequences of pictures into a bitstream, wherein parameters are defined in a parameter set and each picture comprises information of one or more slices. The method comprises defining parameters in a sequence parameter set; defining parameters in a picture parameter set; and defining at least one picture parameter in a slice header. The picture parameter remains unchanged at least in all slice headers of one picture.

Published video coding standards include ITU-T H.261, ITU-T H.263, ISO/IEC MPEG-1, ISO/IEC MPEG-2, and ISO/IEC MPEG-4 Part 2. These standards are herein referred to as conventional video coding standards.
There is a standardization effort going on in a Joint Video Team (JVT) of ITU-T and ISO/IEC. The work of JVT is based on an earlier standardization project in ITU-T called H.26L. The goal of the JVT standardization is to release the same standard text as ITU-T Recommendation H.264 and ISO/IEC International Standard 14496-10 (MPEG-4 Part 10). The draft standard is referred to as the JVT coding standard in this application, and the codec according to the draft standard is referred to as the JVT codec.
Video Communication Systems
Video communication systems can be divided into conversational and non-conversational systems. Conversational systems include video conferencing and video telephony. Examples of such systems include ITU-T Recommendations H.320, H.323, and H.324 that specify a video conferencing/telephony system operating in ISDN, IP, and PSTN networks respectively. Conversational systems are characterized by the intent to minimize the end-to-end delay (from audio-video capture to the far-end audio-video presentation) in order to improve the user experience.
Non-conversational systems include playback of stored content, such as Digital Versatile Disks (DVDs) or video files stored in a mass memory of a playback device, digital TV, and streaming.
In the following, some terms relating to video information are defined for clarity. A frame contains an array of luma samples and two corresponding arrays of chroma samples. A frame consists of two fields, a top field and a bottom field. A field is an assembly of alternate rows of a frame. A picture is either a frame or a field. A coded picture is either a coded field or a coded frame. In the JVT coding standard, a coded picture consists of one or more slices. A slice consists of an integer number of macroblocks, and a decoded macroblock corresponds to a 16×16 block of luma samples and two corresponding blocks of chroma samples. In the JVT coding standard, a slice is coded according to one of the following coding types: I (intra), P (predicted), B (bi-predictive), SI (switching intra), SP (switching predicted). A coded picture is allowed to contain slices of different types. All types of pictures can be used as reference pictures for P, B, and SP slices. The instantaneous decoder refresh (IDR) picture is a particular type of a coded picture including only slices with I or SI slice types. No subsequent picture can refer to pictures that are earlier than the IDR picture in decoding order. In some video coding standards, a coded video sequence is an entity containing all pictures in the bitstream before the end of a sequence mark. In the JVT coding standard, a coded video sequence is an entity containing all coded pictures from an IDR picture (inclusive) to the next IDR picture (exclusive) in decoding order. In other words, a coded video sequence according to the JVT coding standard corresponds to a closed group of pictures (GOP) according to MPEG-2 video.
Conventional video coding standards have specified a structure for an elementary bitstream, i.e., a self-containing bitstream that decoders can parse. The bitstream has consisted of several layers, typically including several of the following: a sequence layer, a group of pictures (GOP) layer, a picture layer, a slice layer, a macroblock layer, and a block layer. The bitstream for each layer typically comprises a header and associated data.
The codec specification itself distinguishes conceptually between a video coding layer (VCL), and the network abstraction layer (NAL). The VCL contains the signal processing functionality of the codec, things such as transform, quantization, motion search/compensation, and the loop filter. It follows the general concept of most of today's video codecs, a macroblock-based coder that utilizes inter picture prediction with motion compensation, and transform coding of the residual signal. The output of the VCL are slices: a bit string that contains the macroblock data of an integer number of macroblocks, and the information of the slice header (containing the spatial address of the first macroblock in the slice, the initial quantization parameter, and similar). Macroblocks in slices are ordered in scan order unless a different macroblock allocation is specified, using the so-called Flexible Macroblock Ordering syntax. In-picture prediction is used only within a slice.
The NAL encapsulates the slice output of the VCL into Network Abstraction Layer Units (NALUs), which are suitable for the transmission over packet networks or the use in packet oriented multiplex environments. All NAL units relating to a certain picture form an access unit. JVT's Annex B defines an encapsulation process to transmit such NALUs over byte-stream oriented networks. A stream of NAL units does not form an elementary bitstream as such because there are no start codes in NAL units, but rather NAL units have to be framed with start codes according to Annex B of the JVT coding standard to form an elementary bitstream.
The optional reference picture selection mode of H.263 and the NEWPRED coding tool of MPEG-4 Part 2 enable selection of the reference frame for motion compensation per each picture segment, e.g., per each slice in H.263. Furthermore, the optional Enhanced Reference Picture Selection mode of H.263 and the JVT coding standard enable selection of the reference frame for each macroblock separately.
Parameter Set Concept
The JVT coding standard contains headers at slice layer and below, but it does not include picture, GOP, or sequence headers. Instead, a concept of a parameter set, introduced in ITU-T document VCEG-N55, replaces such headers. An instance of a parameter set includes all picture, GOP, and sequence level data such as picture size, display window, optional coding modes employed, macroblock allocation map, and others. Each parameter set instance includes a unique identifier. Each slice header includes a reference to a parameter set identifier, and the parameter values of the referred parameter set are used when decoding the slice. Parameter sets decouple the transmission and decoding order of infrequently changing picture, GOP, and sequence level data from sequence, GOP, and picture boundaries. Parameter sets can be transmitted out-of-band using a reliable transmission protocol as long as they are decoded before they are referred. If parameter sets are transmitted in-band, they can be repeated multiple times to improve error resilience compared to conventional video coding schemes. Preferably the parameter sets are transmitted at a session set-up time. However, in some systems, mainly broadcast ones, reliable out-of-band transmission of parameter sets is not feasible, but rather parameter sets are conveyed in-band in Parameter Set NAL units.
In order to be able to change picture parameters (such as the picture size), without having the need to transmit Parameter Set updates synchronously to the slice packet stream, the encoder and decoder can maintain a list of more than one Parameter Set. Each slice header contains a codeword that indicates the Parameter Set to be used.
This mechanism allows decoupling of the transmission of the Parameter Sets from the packet stream, and transmit them by external means, e.g. as a side effect of the capability exchange, or through a (reliable or unreliable) control protocol. It may even be possible that they are never transmitted but are fixed by an application design specification.
There are some disadvantages with pre-defined parameter sets. First, if there is a need to transmit many parameter set instances in the beginning of a session, the out-of-band method may become overburdened or the beginning latency of the session will be too long. Second, in systems lacking feasible mechanisms for reliable out-of-band transmission of parameter sets, in-band transport of Parameter Set NAL units is not reliable. Third, for broadcast applications, since the parameter sets information should be transmitted frequently to allow new users join during the broadcast process, redundant transmission of all the active parameter set instances is costly from bit-rate point of view.
Transmission of Multimedia Streams
A multimedia streaming system consists of a streaming server and a number of players, which access the server via a network. The network is typically packet-oriented and provides little or no means to guarantee quality of service. The players fetch either pre-stored or live multimedia content from the server and play it back in real-time while the content is being downloaded.
The type of communication can be either point-to-point or multicast. In point-to-point streaming, the server provides a separate connection for each player. In multicast streaming, the server transmits a single data stream to a number of players, and network elements duplicate the stream only if it is necessary.
When a player has established a connection to a server and requested for a multimedia stream, the server begins to transmit the desired stream. The player does not start playing the stream back immediately, but rather it typically buffers the incoming data for a few seconds. Herein, this buffering is referred to as initial buffering. Initial buffering helps to maintain pauseless playback, because, in case of occasional increased transmission delays or network throughput drops, the player can decode and play buffered data.


A method of making alkali-metal vapor cells by first forming microscale-wax micropackets with alkali metals inside allows fabrication of vapor cells at low cost and in a batch fabricated manner. Alkali metals are enclosed in a chemically inert wax to preform alkali metal-wax micropackets, keeping the alkali metals from reacting with the ambient surroundings during the vapor cell fabrication. This enables the deposition of precise amounts of pure alkali metal inside the vapor cells. Laser ablation of the alkali metal-wax micropackets provides a simple and effective way of releasing the enclosed metal. The method reduces the cost of making chip-scale atomic clocks and allows shipping of alkali vapor packets without contamination issues, thereby creating a technology for alkali-metal vendors to provide small packets of alkali metals.

1. Field of the Invention
The present invention relates generally to a structure and method for fabrication of vapor cells adapted for use in making chip-scale atomic clocks (CSACs) via wafer-scale micro-machining processes.
2. Discussion of the Prior Art
The need for more and more precise and stable time-keeping for a wide variety of applications has been on the rise, particularly in applications such as digital communications, global positioning systems (GPS) and, more critically, for security and identification applications such as friend-or-foe (IFF) communications.
There are a wide variety of potential applications for enhanced time or frequency reference signal sources, which may be referred to as time bases or clocks. One example of the need for precise, stable time keeping is found in the development of enhanced, jam-resistant GPS receivers. The signals broadcast by GPS satellites are extremely low in power, making the GPS receivers highly susceptible to intentional jamming signals as well as to unintentional interference from sources transmitting in the same frequency band. For example, some GPS signals are transmitted over a wide bandwidth, making them considerably less susceptible to jamming than normal GPS signals. Typically, however, these broadband signals incorporate a code that repeats only every seven days, so that broadband receivers usually have to first lock onto the normal signal, and this eliminates the anti-jam advantage of the larger-bandwidth signal. If the broadband receiver's local clock were capable of determining the time to within 1 millisecond (ms) over several days, its search for the GPS signals would be narrowed so the receiver could, theoretically, lock onto the broadband signal directly, without first having to acquire the normal signal. Thus, if a more accurate clock were available, the receiver would be significantly more resistant to jamming.
Three important characteristics are necessary to realize a 'good' time base or clock: (1) long and short-term frequency stability (usually measured in Allan variance and phase noise of the frequency source); (2) physical size of the clock; and (3) the power consumed by the clock. Historically (and mainly to satisfy criterion 1), clocks based on electromagnetic oscillations of atoms have provided the most precise method of timing events lasting longer than a few minutes. So precise are these "atomic" clocks, that in 1967 the second was redefined to be the duration required for a cesium (Cs) atom in a particular quantum state to undergo exactly 9,192,631,770 oscillations. While the long-term precision of atomic clocks is unsurpassed, the size and power required to run them has prevented their use in a variety of areas, particularly in those applications requiring portability or battery operation. The NIST F-1 primary standard, for example, occupies an entire table and consumes several hundred watts when operating. The state of the art in compact commercial atomic frequency references is rubidium (Rb) vapor-cell devices with volumes near 100 cm3 operating on a few watts of power; such references cost about $1,000.00 USD.
Recently, miniature atomic clocks have been based on Microelectromechanical systems (MEMS) technology which offers advantages such as smaller size, an improvement in the device power usage due to reduced parasitic heat dissipation (as the heat lost to the environment via the device surface is smaller), and high-volume, wafer-based production methods, which may substantially reduce cost. In spite of these advantages, the power consumed by currently envisioned MEMS-based atomic clocks hasn't been reduced enough to permit their use in applications such as portable battery operated systems in long-term operations, including, for example, week-long missions for the military, months-long working of communication base units or even year/decade long operation for sensor node applications.
Prior art atomic clocks typically include a physics package, which is the heart of the clock and contains an atomic (usually Rb or Cs) vapor cell that acts as a frequency reference to determine the clock output frequency.
Solid state resonators (such as RF resonators based on quartz and silicon) are portable and energy efficient and so are often used in wrist watches and the like, but cannot provide an adequate reference signal because they have observable and random aging effects which cause their frequencies to shift in a non-predictable manner.
Stable frequency sources are extremely important for communication systems for civil and military applications, and for sensor stability for long-term operation of sensor nodes. Considerable work has been done in the last few years to realize miniaturized atomic clock systems or chip-scale atomic clocks (CSACs) demonstrating potential for portability and low power operation. Low operation power and size of the CSACs are required for portability, whereas good short and long-term stability and low cost of fabrication are essential to ensure applicability in a wide variety of markets.
The frequency stability of atomic clocks is based on transitions between the well-defined ground state hyperfine levels of alkali atoms such as rubidium (Rb) or cesium (Cs). The physics package of an atomic clock consists of alkali metal atoms enclosed in a vapor cell so that the atomic resonance is excited and interrogated by an RF local oscillator about a frequency that corresponds to the hyperfine energy difference in the ground state of atoms.
The vapor cells of CSACs use sealed micromachined cavities to enclose the highly reactive alkali metals (such as rubidium—Rb and cesium—Cs) in a buffer gas composition. In addition, since the size of the vapor cells are very small (of the order of mm3), the buffer gas pressure and composition have to be optimized to serve the two important purposes of creating an inert ambient environment for the alkali metals, and maximizing the coherence lifetimes of the atoms by decreasing their effective wall relaxation., in turn reducing the linewidth of the hyperfine absorption.
The use of highly reactive and low melting alkali metals and filling the vapor cells with the optimum pressure and composition of buffer gases thus impose a MEMS packaging challenge. The fabrication of MEMS vapor cells so far has involved anodic bonding between micromachined silicon cavities and Pyrex glass. Since anodic bonding requires high-temperature (˜400° C.) processing, whereas the melting points of alkali metals are much lower (Rb ˜39.3° C., Cs ˜28.4 ° C. at 1 atm), the alkali-metal and buffer gases cannot be placed inside the cavities before the bonding process reliably. Knappe, et al, have tried to solve this problem by in-situ fabrication of the alkali metals from high temperature reaction of metal hydrides, metal chlorides and/or metal hydroxides during bonding. This can lead to residual impurities that cause long term drifts of the hyperfine resonance frequency. Lee, et al, have demonstrated a method of interconnecting the cavities using micromachined channels, and parallel filling after vapor cell formation. However isolation of the cells from each other and dicing requires the use of a wax-sealing, which leads to low yield, and requires bulk rubidium delivery, which is inefficient and results in uncontrolled delivery of rubidium in each vapor cell.
An alternative to using buffer gas to increase the coherence life time is to use a thin and uniform (or monolayers) of wall coating of materials such as Teflon (used in hydrogen maser frequency references), long chain alkanes (such as n-tetracontane—a component of paraffin wax), or some alkynated silanes (used in alkali metal frequency standards), as reported by Frueholtzs, et al and Sagiv, et al. However, the stringent requirements for the quality and apparatus needed for formation of wall coating is currently not compatible with MEMS processing. Furthermore, alkylated silanes have been shown to degrade over long-term operations directly affecting the long-term stability of the atomic clock system.
There is a need, therefore, for a structure and method for reliable fabrication of vapor cells adapted for economical use in making chip-scale atomic clocks (CSACs) via wafer-scale micro-machining processes that overcomes the problems with the prior art.

Alkali metal-wax micropackets for alkali metal handling


Lighting units for use in a variety of enclosures/containers, such as Jack-O-Lanterns formed from hollowed-out pumpkin gourds, that define an interior region for receipt of a lighting unit, are provided. The enclosure/container and the lighting unit are combined to achieve a desired illumination effect, e.g., consistent with a holiday and/or seasonal theme. The lighting unit generally includes an elongate lighting element which can be placed in a number of different illumination modes, a hilt/handle to which the elongate lighting element is attached, and a control switch located on the handle for actuation by a user. A tip of the elongate lighting element is placed against the skin of the Jack-O-Lantern pumpkin, the tip being sized and shaped to permit itself and at least an adjacent part of the elongate lighting element to be pushed through the pumpkin flesh to depth of the hilt for internal illumination of the Jack-O-Lantern.

1. Technical Field
The present disclosure relates to internal illumination of enclosures/containers having holiday/seasonal themes and, more particularly, to a system and method for illuminating Halloween-themed Jack-O-Lantern pumpkins.
2. Background Art
Pumpkins have long been an important part of the Halloween holiday. The yearly tradition of hollowing-out and creatively carving pumpkins to transform them into Jack-O-Lanterns is as popular as ever. An essential aspect of the Jack-O-Lantern is the internal lighting thereof which naturally attracts attention and creates an interesting and aesthetically pleasing visual effect. Wax candles have commonly been utilized for this purpose, as have other items which provide light via an open flame.
Increasingly, however, carvers of home-made Jack-O-Lanterns are choosing non-flame or artificial light sources, such as incandescent light bulbs or light-emitting diodes, to illuminate their creations. While this trend may have arisen out of a desire for increased safety, the wide variety of creative and attractive devices and systems now available for non-flame illumination of the humble Halloween pumpkin points to a broader appeal. Such broad appeal may, for example, be based on a demand for more and different lighting options to suit individual preferences, to inspire creativity, or simply to provide amusing diversions.
Artificial lighting devices for pumpkin-type Jack-O-Lanterns are known. In U.S. Pat. No. 6,513,945 to Wyss, et al., a translucent or transparent artificial stem, prepared for attachment to a pumpkin in replacement of the pumpkin's natural stem, is described. The artificial stem, which attaches to the pumpkin via adhesive is provided with a cavity. The cavity in the artificial stem enables the insertion of a small, tubular shaped chemiluminescent lighting device or "light stick", which lighting device temporarily generates luminescent light for illuminating the artificial stem by virtue of being inserted therein. Also described in the Wyss et al. '945 patent is a decorative replacement stem formed of an optically transparent glass or acrylic, with attachment means by extension of a pointed base into a pumpkin's hollow center or interior. The replacement stem tends to emit light at its remote edges which is picked up from any source which may be located within the interior volume space of the pumpkin, such as a candle or light bulb.
Disclosed in U.S. Pat. No. 5,091,833 to Paniaguas et al. is a kit for creating a face on a pumpkin so as to produce a Jack-O-Lantern. The kit includes a plurality of illuminating units, each of which is equipped with a battery and a light bulb; and a plurality of translucent facial elements such as an eye, a mouth, an ear, etc., each of which is screwed onto a respective one of the illuminating units. Each facial element envelops and surrounds the respective light bulb so that light from the light bulb is transmitted through the facial element and thereafter emitted from an external surface of the facial element. Each of the illuminating units includes a spear-like pointed base which is pushed into the flesh of the pumpkin in order to mount the respective illuminating unit on the pumpkin. The extreme end forms a sharp angle to facilitate penetration of the pumpkin flesh.
Other references disclose various means by which illumination devices are mounted within a hollow pumpkin via embedding one or more suitable structures into the flesh of the interior walls of the pumpkin. For example, U.S. Patent Application Publication No. 2003/0210555 to Cicero et al. discloses a decorative lamp equipped with multiple prongs designed to permit the lamp to be embedded into the flesh of the pumpkin below the stem thereof. At least partially similar structure is disclosed in each of U.S. Patent Application Publication No. 2003/0189825 to Tauch et al., U.S. Pat. No. 6,705,741 to Bonnema et al., and U.S. Pat. No. 5,918,964 to Bou.
Despite efforts to date, a need remains for attractive and creative artificial lighting units that are configured and dimensioned for internal illumination of pumpkin-type Jack-O-Lanterns, and that are both safe and convenient to use.


Arbitrary and complex Boolean functions can be evaluated at high speed and with a minimal amount of memory by evaluating the total derivatives of the subfunctions out of which any given Boolean function is built. The Boolean function is then generated from its total derivative. The total derivative of any binary or two input Boolean function is defined by a method dependent only on the inputs and the partial derivatives of the subfunction. By combining the subfunctions in a binary tree, a Boolean function of any complexity can be built up. By using a binary tree structure in a processing circuit or memory organization, the method is generalized to accommodate all possible Boolean functions. A processing element may be devised to generate the total derivative of each subfunction in a tree circuit of such processing elements, or arrays may be defined in a general purpose computer and elements in the array generated according to a processing methodology which assumes a tree relationship between elements in the array.

1. Field of the Invention
The invention relates to field of logic machines and methods for processing information within logic machines. In particular, the invention relates to electrical circuits and methods of using electrical circuits to evaluate logical relationships.
2. Description of the Prior Art
Efficient processing of Boolean expressions or complex logical signals has many applications in monitoring and debugging digital processes and hardware computing systems. Some other applications of Boolean evaluation are special purpose database search processors and hardware simulators for discrete systems.
The high-level monitoring activity involves the evaluation of Boolean functions based on the real-time behavior of the system being observed. Depending on the purpose of monitoring, different Boolean expressions are evaluated at different time intervals. The problem is how to develop an approach to evaluate an arbitrary Boolean expression in real-time. Some solutions to this monitoring problem include using a fixed set of Boolean expressions (fixed hardware tools), the manual rewiring of the monitor circuit (wired program tools), and the use of a high speed programmable monitor circuit (stored program tools). Stored program tools are the most flexible and satisfactory, but they impose a high cost on the monitor circuit because it must operate at a much faster rate than that of the system being observed.
One possibility of implementing a dynamically reconfigurable circuit that is able to evaluate any Boolean function of two variables is to use three, 2-input multiplexers. A 2-input multiplexer, is symbolically modeled by a Boolean function, M(a,b,s), which has two data inputs a and b, and one control signal s. It evaluates the function: EQU M(a,b,s)=as+bs.
Depending on the value of control signal s, input variable a or input variable b is chosen as the output of M. The function, M(a,b,s) can then be used to model an arbitrary logic circuit. For example, let F(x,y) be a Boolean function of two variables. Its value can be defined by: EQU F(0,0)=f.sub.0, EQU F(0,1)=f.sub.1, EQU F(1,0)=f.sub.2, EQU F(1,1)=f.sub.3.
It can be shown then that a function, F(x,y), is described by a Boolean expression: EQU F(x,y)=xyf.sub.0 +xyf.sub.1 +xyf.sub.2 +xyf.sub.3 ( 1)
Function F(x,y) in Equation (1) can be implemented by three, 2-input multiplexers as follows: EQU F(x,y)=M(M(f.sub.0,f.sub.2,x),M(f.sub.1,f.sub.3,x),y).
There are sixteen possible Boolean functions of the two variables which are listed in Table 1 below. In traditional Boolean function processing methods, all sixteen cases are represented by four bits of F(x,y), i.e., f0, f1, f2 and f3. Processing in a tree structure therefore becomes complex when implemented in custom hardware and very time and resource consumptive when implemented in a general purpose computer. In complex Boolean functions the processing time can seriously lag real time needs for the processed result unless the computing circuit is very large and very fast.
What is needed is an apparatus and methodology which will allow any kind of complex Boolean expression to be processed in a real time basis in small computer systems.

System for evaluating boolean expressions using total differential generating tree structured processing elements controlled by partial subfunction differentials


A maskless, extreme ultraviolet (EUV) lithography system uses microlens arrays to focus EUV radiation (at an operating wavelength of 11.3 nm) onto diffraction-limited (58-nm FWHM) focused spots on a wafer printing surface. The focus spots are intensity-modulated by means of microshutter modulators and are raster-scanned across a wafer surface to create a digitally synthesized exposure image. The system uses a two-stage microlens configuration to achieve both a high fill factor and acceptable transmission efficiency. EUV illumination is supplied by a 6 kHz xenon plasma source, and the illumination optics comprise an aspheric condenser mirror, a spherical collimating mirror, and two sets of flat, terraced fold mirrors that partition the illumination into separate illumination fields covering individual microlens arrays. (The system has no projection optics, because the image modulator elements are integrated with the microlens arrays.) The printing throughput is estimated to be 62 (300-mm) wafers per hour (assuming a resist exposure threshold of 20 mJ/cm2), and print resolution is estimated at 70 nanometers for mixed positive- and negative-tone patterns (at k1=0.6).

This invention relates primarily to microlithography, and more specifically to extreme ultraviolet (EUV) lithography. The invention is applicable to semiconductor lithography and lithographic patterning of microstructures such as micromechanical systems, micro-optics, porous membranes, etc.
EUV lithography is a leading candidate technology for next-generation semiconductor lithography, which will require sub-100-mn printing resolution. An industry consortium (the EUV Limited Liability Company) is focusing development efforts on an engineering approach that is basically an evolutionary extension of LW and DUV projection lithography, the main difference being that the EUV system requires all-reflective optics due to the lack of EUV-transmitting lens materials (Ref. 1). The basic system design has nine reflective surfaces between the EUV source and the wafer, including four condenser mirrors, the photomask, and four projection camera mirrors. Seven of the reflectors (including the photomask) comprise multilayer coatings that operate at near-normal incidence and are optimized for peak reflectance at a wavelength of 13.4 nm.
Mirror coatings are one of the key enabling technologies that have made EUV lithography possible. Presently, multilayer Mo/Si (molybdenum/silicon) multilayer mirrors routinely achieve peak reflectance efficiencies of 67.5% at the 13.4-nm operating wavelength, with a spectral reflectance bandwidth of 0.56-nm FWHM (Refs. 2, 3). Nevertheless, the lithography system""s optical efficiency is significantly limited by the compound reflectance losses of seven multilayer mirrors operating in series.
The mirror surface figure tolerances scale in proportion to the operating wavelength, which is an order of magnitude smaller than DUV wavelengths at the 13.4-nm EUV wavelength. Furthermore, tolerance requirements for mirrors are generally much more stringent than lenses. Thus, the four EUV projection camera mirrors which image the mask onto the wafer must be fabricated to extremely tight (i.e., atomic-scale) absolute figure tolerances over large aperture areas.
The system uses multilayer reflective masks, which operate at 4:1 reduction. Mask fabrication presents significant technical challenges due to factors such as the short operating wavelength and small feature dimensions, lack of EUV pellicle materials, and very stringent registration requirements. EUV masks are expected to cost approximately $50,000 at 100-nm print resolution (Ref. 4).
Two research groups at the University of California at Berkeley and Stanford University are currently investigating maskless EUV lithography approaches (Refs. 5, 6). Their basic approach is to replace the mask with a spatial light modulator (SLM) comprising a programmable array of micromirrors whose reflectance properties can be varied by modulating the mirrors"" tilt or translational positions. Although these are maskless systems, they nevertheless require EUV projection optics to image the micromirror array onto the wafer. Due to minimum size limits of the SLM pixel elements, the projection optics must operate at a very high reduction ratio, (e.g., 20 to 40xc3x97 demagnification), which precludes the use of current-generation (4xc3x97) EUV projection optics.
Another limitation of micromirror systems is that the SLM must operate at a very high frame rate (e.g., multi-megahertz) in order to achieve requisite throughput requirements. (The system""s total data throughput requirement is at least 10 bits per second.) This requires a continuous EUV source such as a synchrotron, and precludes the use of a pulsed EUV source such as a high-power, laser-produced plasma (LPP) source that is currently being developed by Sandia National Laboratories for EUV lithography (Refs. 7, 8).
Several recent patents and publications describe a variety of other SLM-based maskless lithography design concepts, some of which are applicable to EUV (Refs. 9-18). Most of these systems employ projection optics, but one of these inventions, a Fresnel zone plate microlens system (Refs. 16-18), eliminates the need for projection optics as well as the mask. The system is designed primarily for x-ray lithography at a wavelength of 4.5 nm, but the basic design principle could be applied equally well to EUV. The device comprises an array of zone plate microlenses that focus an incident x-ray (or alternatively, EUV) beam onto an array of diffraction-limited points on a wafer surface. Each microlens transmission is modulated by a micro-actuated shutter as the wafer is raster-scanned across the focal point array to build up a synthesized, high-resolution image.
Since the zone plate system does not use projection optics, it could conceivably use a very large number of zone plate lenses in multiple, large-area arrays, all operating in parallel. Based on printing throughput requirements, the required modulation frame rate would scale in inverse proportion to the number of lenses, so with a sufficiently large number of lenses the system could conceivably use an LPP EUV source operating at a moderate frame rate (e.g., 6 kHz, Ref. 8). However, the proposed method for manufacturing the zone plates lenses (spatial-phase-locked e-beam lithography) is not very practical for large-quantity production, and there are also other complicating factors that preclude the use of an LPP source with the zone plate system.
The plasma source in the LPP has a fairly large spatial extent (approximately 200 xcexcm diameter, Ref. 7), and since each focus point on the wafer is a diffraction-limited image of the source, optical resolution would be limited by the source""s geometric image size. Furthermore, the LPP would be used in conjunction with EUV mirrors that have a 2% combined spectral bandwidth, and the zone plate""s chromatic dispersion within this band could also significantly limit focus resolution. The source""s geometric image size on the wafer and the image""s chromatic spread should preferably both be significantly smaller than the diffraction-limited image of an ideal monochromatic point source. This condition could be achieved, in principle, by using very small microlenses with short focal lengths; but the zone plate lens elements must be sufficiently large to accommodate the shutter mechanism, data paths, and supporting framework, while also maintaining an acceptably high aperture fill factor. Due to this aperture size limitation, a practical zone plate system would probably perform poorly with an LPP, and a more costly synchrotron source would thus be required.
Another limitation of zone plate lithography is that the printing resolution and contrast can be significantly degraded by extraneous diffracted orders. Continuous-profile, refractive microlenses such as those shown in Ref. 13 would not have this limitation, but for EUV application such microlenses would be either too highly absorbing or too small to be of practical utility when used in the mode described in Ref. 13.
The present invention overcomes the limitations of prior-art microlens printing systems by using multiple microlenses in series to focus exposure illumination onto a printing surface such as a semiconductor wafer. In a preferred embodiment of the invention, the microlenses are used in pairs, each pair consisting of first- and second-stage microlenses, respectively designated as lens L1 and lens L2, wherein L1 focuses illuminating radiation onto L2, and L2 thence focuses the radiation to a focal point on the printing surface. Each such microlens pair forms a printer pixel, and multiple such pixels are combined to form a printhead, which focuses the radiation onto multiple focal points on the printing surface. A modulator mechanism modulates the focal points"" exposure intensity levels, and as the points are modulated, the printhead is scanned relative to the printing surface (either the surface or the printhead, or both, can be moved for the scanning) to build up a synthesized, high-resolution exposure image on the print surface.
In general, a printer pixel can comprise a sequence of two or more microlenses L1, L2, . . . LN (N being an integer greater than 1), wherein each lens Lm (1xe2x89xa6m less than N) focuses the illuminating radiation onto the next lens Lm+1 in the sequence, and the last lens LN focuses the radiation onto a focal point on the printing surface. Typically L1 is a comparatively large element with low optical power, and the succeeding lenses are progressively smaller and have progressively higher optical power.
The modulator mechanism preferably comprises modulator elements that are incorporated as components of the printer pixels, with each modulator element providing independent, digital control of the exposure level at a corresponding focal point. However, in some embodiments a single modulator could be used to modulate the radiation before it is conveyed to the printhead. This option would be useful for applications that do not require independently modulated pixels, for example, in the fabrication of hole arrays for microfiltration membranes. The preferred embodiments use binary-state (i.e., ON/OFF) modulators, but gray scale (continuous-level) modulation may also be employed.
The disclosed embodiments relate primarily to the ETV lithography application, although the disclosed design methods and configurations are also applicable or adaptable to other wavelength ranges such as DUV. In a preferred embodiment, molybdenum microlenses are used to focus an incident EUV beam (at a wavelength of 11.3 nm) onto an array of diffraction-limited (58-nm FWHM) focal points on a wafer surface. A modulator mechanism, such as an SLM comprising microshutters proximate to the microlens apertures, modulates the beam intensity at each focal point. As the points are modulated, the focal point array is raster-scanned across the wafer to build up a digitally synthesized, high-resolution image.
The microlenses are preferably continuous-profile, refractive elements. A refractive EUV lens with sufficient optical power to achieve the requisite focus spot resolution ( less than 100-nm spot size) would have to be very smallxe2x80x94on the order of 1 xcexcm diameter or less; otherwise the lens would be too thick to allow acceptable EUV transmittance. A single array of microlenses and modulators of this size could not be practicably manufactured without incurring unacceptable fill factor losses. But this limitation is circumvented by using a multi-stage microlens system. In a two-stage embodiment, comparatively large (5-xcexcm diameter), low-power (NA=0.015) first-stage lenses focus EUV illumination onto much smaller (1-xcexcm diameter) second-stage lenses which have much higher optical power (NAxe2x89xa70.1). Each first-stage lens""s diffraction-limited focused spot overfills the 1-xcexcm aperture of a corresponding second-stage lens; and the second-stage lens focuses the illumination down to a much smaller (58-nm FWHM) focus spot on the wafer. This design approach makes it possible to use a sparsely distributed array of second-stage lens elements without incurring significant fill factor losses. The sparse distribution simplifies fabrication processes, and the wide spacing between second-stage lens apertures provides accommodation for structural support and for the SLM data paths and actuators.
The disclosed two-stage embodiments of the invention have a number of advantages over prior-art EUV lithography systems, including some or all of the following: (1) The need for EUV photomasks is eliminated. (2) By integrating the SLM with the microlens arrays, the need for image projection optics is eliminated. (3) The optical tolerance requirements for the microlenses are very moderate compared to all-reflective EUV projection optics. (4) Proximate image points are exposed sequentiallyxe2x80x94not simultaneouslyxe2x80x94so they do not interact coherently, and the printed image would thus be devoid of the kind of coherent proximity effects that are exhibited by projection systems. (5) The second-stage lens apertures function as spatial filters that eliminate stray radiation and scatter from sources such as flare in the EUV illumination optics. (6) The EUV illumination source is imaged onto the second-stage microlens apertures, not onto the wafer; so the source size and spatial energy distribution do not significantly affect optical resolution (although these factors do have a minor influence on optical efficiency). (7) In contrast to zone plate lenses, the refractive lens elements could produce very clean and highly resolved focus spots free of spurious diffraction orders and scatter, and exhibiting negligible chromatic dispersion.
The wafer exposure process is commonly referred to as xe2x80x9cprintingxe2x80x9d, and the combination of each associated first- and second-stage (or more generally, first- through N-th stage) microlenses and their associated modulator component is referred to herein as a xe2x80x9cprinter pixelxe2x80x9d. (In some alternative embodiments, the SLM need not be integrated with the microlens arrays and the focus spot intensities need not be controlled by separate modulator elements. In this case the pixels would not include the modulator components.) The pixels are assembled into arrays termed xe2x80x9cprintheadsxe2x80x9d; and the printheads are typically assembled into larger arrays, termed xe2x80x9cwafer print modulesxe2x80x9d, each of which covers and exposes a full 300-mm wafer. The complete exposure system (or xe2x80x9cprinterxe2x80x9d) typically comprises multiple wafer print modules covering separate wafers, which are all supplied EUV illumination from a single EUV source.
In a specific embodiment, each printhead comprises approximately 1.3xc3x97107 pixels distributed over a 20-mm square area. In addition to housing the microlenses and SLM components, each printhead can be equipped with peripheral microsensors that sense its position relative to an alignment pattern on the wafer, such as a periodic tracking pattern formed in the wafer scribe lines. Each printhead can also be provided with its own micro-positioning actuators that dynamically maintain focus, tilt, and overlay alignment in response to the position sensor feedback from a large number of microsensors. This design approach has two advantages relative to more conventional xe2x80x9cthrough the lensxe2x80x9d or xe2x80x9coff axisxe2x80x9d alignment sensors employed in projection lithography systems (Ref. 19, Chap. 5). First, the effect of nonsystematic errors such as noise in the tracking signals is minimized by using a large number of microsensors in the alignment tracking system. Second, by combining the printing microlenses, positioning sensors, and positioning actuators in a single, compact unit in close proximity to the wafer, tolerance stack-up in the tracking servo is minimized and very accurate and responsive tracking control can be achieved.
Thermal expansion differences between the printhead and the wafer could result in significant effective magnification errors and overlay misregistration. For example, a 0.1xc2x0 C. temperature difference could induce a 5-nm overlay error (which is most of the alignment tolerance budget). Magnification errors can be substantially eliminated by forming each second-stage microlens on an individually controllable micromechanical actuator which makes nanometer-scale lateral positioning adjustments in response to the tracking sensor feedback. The microlens actuators could also be used to correct a variety of other critical error factors. (For example, the allowable tolerance range on tilt and coma in the second-stage microlenses can be more than doubled by applying a calibrated position offset to each actuator.)
The system is designed for use with a high-power (1700 W), xenon LPP source operating at a 6 kHz repetition rate (Ref. 8). The system""s total data throughput requirement ( greater than 1012 bits per sec) and the low (6 kHz) frame rate necessitate the use of a very large number of printer pixels ( greater than 108). Furthermore, an even higher number of pixels is needed if the system is designed to optimize optical efficiency. The microlens efficiency is affected by the source collimation, and efficiency would be significantly compromised if the EUV illumination""s angular spread were much more than 1 mrad. Given that the source diameter is close to 200 xcexcm (Ref. 7), this implies that the collimation optics should preferably have a minimum effective focal length of at least 200 mm (i.e., 200 xcexcm/0.001 rad). With a focal length this large, acceptable optical efficiency can only be achieved by collecting radiation over a very large area; and hence a very large number of microlenses is used to efficiently utilize the source.
The high microlens number requirement is achieved by distributing the ETV illumination over a large number of printheads covering multiple wafers. The printer comprises a total of 360 printheads (i.e., 4.6xc3x97109 pixels), which are divided among eight wafer print modules, each module comprising 45 printheads distributed over a 300-mm wafer. Eight wafers are simultaneously exposed with a single LPP illumination source.
This xe2x80x9cmassively parallelxe2x80x9d design approach is feasible because the SLM is not imaged through projection optics. Aside from considerations of LPP source compatibility, this approach has the advantage that the SLM frame rate and tracking speed, which scale in inverse proportion to the number of pixels, would be very moderate. (The micromechanical and tracking servo design requirements for a 6 kHz system would be much simpler than alternative multi-megahertz SLM systems.) The SLM power consumption and radiative heat gain are also minimized with this approach. Additionally, the large number of printheads (360) makes the data flow easier to handle. The system""s total data rate for pattern generation is 2.8xc3x971013 bits per sec. This translates to 7.7xc3x971010 bits per sec per printhead (i.e., 2.8xc3x971013/360), which can be managed, for example, with several fiber optic data lines and integrated demultiplexers. The data storage and data processing hardware would make up a significant portion of the system cost, but this cost can be minimized by supplying a common data stream to all eight modules.
The EUI illumination encounters four mirror surfaces between the source and the printheads. These include a deep, aspheric condenser element, a shallow, spherical collimator element, and two sets of flat, terraced fold mirrors that partition the collimated beam into individual rectangular illumination fields on the printheads. The condenser and collimator mirrors are multilayer Mo/Be (molybdenum/beryllium) mirrors optimized for peak reflectivity at a wavelength of 11.3 nm, whereas the fold mirrors operate at glancing incidence and can therefore use a much simpler broadband reflective coating (such as a ruthenium film).
The Mo/Be mirrors have a reflectance bandwidth of 0.27-nm FWHM per mirror, about half that of Mo/Si mirrors optimized for 13.4 nm (Ref. 2). Nevertheless, the total reflected EUV power is much higher with Mo/Be mirrors because the xenon LPP source""s emission spectrum has a sharp peak near 11 nm (Ref. 7). The narrow bandwidth of Mo/Be mirrors is problematic with EUV projection systems because it is difficult to accurately match spectral reflectance peaks between seven mirrors (Ref. 3). But with just two multilayer mirrors the maskless system""s matching tolerance is much less critical, and it is easier to take advantage of the higher source emission at 11 nm.
The system""s printing resolution is estimated at 70 nm for mixed positive- and negative-tone images. Printing throughput is estimated at 62 300-mm wafers per hour, based on an assumed resist solubility threshold of 20 mJ/cm2. (The maximum attainable flood-exposure level is 80 mJ/cm2.) Projection EUV system designs typically assume a more stringent exposure sensitivity of 10 mJ/cm2, based on 100-nm print resolution and a 13.5-nm exposure wavelength. But the microlens system is designed for higher resolution (70-nm feature size) and operates at a shorter (11.3-nm) exposure wavelength, making the print quality more susceptible to line edge roughness induced by shot noise (Ref. 20). The higher 20-mJ/cm2 exposure threshold would counterbalance the system""s higher shot noise sensitivity. (If a 10-mJ/cm2 exposure threshold were assumed, throughput could be doubled.)
The microlens elements can be manufactured with nanometer-scale profile control by adapting shadow-mask deposition and etching processes that are used, for example, in shadow-mask molecular beam epitaxy (MBE), Refs. 21-24. Interference lithography methods can also be used to scale up the shadow-mask processes for high-volume production. Since the refractive index of molybdenum is very close to one at EUV wavelengths, the optical surface tolerances are comparatively loose in relation to mirror optics. The estimated figure tolerances are 4 nm RMS for the first-stage (5-xcexcm diameter) element and 2 nm RMS for the second-stage (1-xcexcm diameter) element, assuming that a calibrated lateral position offset is applied to the second-stage elements. (By comparison, EUV projection mirrors are required to meet a 0.25-nm RMS figure tolerance across aperture dimensions exceeding 100 mm, Ref. 1.) Additionally, the microlens system is very tolerant of isolated pixel defects. For example, an isolated nonfunctional pixel (i.e., a pixel that is permanently stuck in either the ON or OFF state) would only induce an estimated 1% uncorrected dimension shift on a 70-nm feature.

Maskless, microlens EUV lithography system


A plurality of samples in a moist medium are treated simultaneously in a microwave cavity. The samples are conducted into the cavity through apertures formed in an upper wall of the cavity. Each aperture is surrounded by a chimney configured to create a barrier opposing the propagation of microwaves from the cavity. The samples are introduced into receptacles which extend through the chimneys. Each receptacle can be supported on the chimney a lower end of the receptacle disposed within the cavity. Alternatively, the receptacles can be in the form of continuous tubes extending through upper and lower walls of the cavity in order to convey continuous flows of the sample.

The present invention relates to an apparatus for carrying out a treatment simultaneously on a plurality of samples in a moist medium, the apparatus employing heating of the samples by microwaves. Also the invention relates to a method of utilization of the apparatus for carrying out chemical reactions on samples which may be a mineral, organic or organometallic compound, or a mixture of compounds.
There has already been described, especially in European Patent No. 156 742, an apparatus and method intended for carrying out a chemical reaction, in a moist medium, on a series of samples, the samples being prepared in advance and introduced in flasks placed into the housings of a carousel, the flasks being then brought successively into the application cavity to receive microwaves from a microwave generator. Such an apparatus is marketed by the company PROLABO under reference MICRODIGEST 300. This apparatus serves well for treating the samples individually.
In the laboratory, it is, however, sometimes necessary to be able to carry out a treatment, in a moist medium, in identical conditions of temperature and time, on a plurality of samples. Thus, the treatment should be carried out simultaneously on the plurality of samples.
It has been proposed, as described in British Patent 2 081 442, to produce an oven which heats using microwaves and which delimits an application cavity able to contain a number of receptacles suspended by their necks, whereby the entire receptacle is situated within the cavity.
Such an apparatus permits effective treatment of various samples simultaneously under the same conditions of temperature and reaction time, but does not permit easy access to the receptacles for the operator, for example, in order to introduce a supplementary reagent, or to visually monitor the progress of the reactions. In order to do that, the operator must, after switching off the microwave generator, open the front door of the oven, but that means that the receptacles are not of easy access. Moreover, in such an apparatus, the entire receptacle is heated, including its neck, and not just the part containing the sample to be treated.
One object of the invention is to provide an apparatus for carrying out a treatment, in a moist medium, on a plurality of samples.
Another object of the invention is to provide an apparatus for carrying out a treatment in a moist medium, wherein heat is applied by means of microwaves, and wherein easy access can be had to the receptacles containing the samples.

Methods and apparatus for simultaneously treating a plurality of samples in a moist medium


A logic verification device, a logic verification method and a logic verification computer program that can reduce the number of steps involved in designing a logic circuit particularly when the designed logic circuit is subjected to logic verification and modification at the spot where an error is detected. The logic verification device comprises a data converter section adapted to convert real circuit data to be processed for designing a logic circuit into data for verification to be processed for logic verification and vice versa, a verifier section adapted to operate for logic verification of said data for verification and a temporary modifier section adapted to acquire the result of verification of said verifier section and the modification candidate data corresponding to the result of verification of said verifier section and pre-selected as candidate data for modification of said data for verification and modify said data for verification on the basis of said acquired result of verification and said acquired modification candidate data.

1. Field of the Invention
This invention relates to a logic verification device, a logic verification method and a logic verification computer program.
2. Description of the Related Art
In conventional operations of designing logic circuits by means of CAD techniques, the designed logic circuit is logically verified in order to eliminate logic design errors that can intervene during the design procedures by mistake.
If an error is detected as a result of logic verification, the designer looks into the cause of the error and corrects the designed logic circuit so as to remove the cause of the detected error.
Generally, the data to be processed in the operation of designing a logic circuit and correcting it (hereinafter referred to as real circuit data) and the data to be processed in the operation of logic verification (hereinafter referred to as data for verification) are different from each other in terms of data format. Therefore, the designer is forced to carry out the operation of designing a logic circuit, correcting it and logically verifying it repeatedly until no error is detected by logic verification, conducting data conversions between real circuit data and data for verification (see, inter alia, Patent Documents 1 through 3).
[Patent Document 1]
Japanese Patent Laid-Open No. 5-266134 (pp. 3–4, FIG. 1)
[Patent Document 2]
Japanese Patent Laid-Open No. 7-302281 (pp. 6–16, FIG. 1)
[Patent Document 3]
Japanese Patent Application Laid-Open Publication No. 2001-306646 (pp. 8–15, FIG. 1)
With conventional logic verification devices, when an error is detected at a spot in an area of the designed logic circuit as a result of logic verification, the process of logic verification is suspended at the time when the error is detected. In such an occasion, if another error exists at some other spot in the area where the error is detected (and hence a plurality of errors exist in the area that is subjected to logic verification), the second error is detected only when the logic is corrected at the spot where the first error is detected (e.g., circuit error 1 and circuit error 2 in the verification area between component a and component b of the circuit illustrated in FIG. 19).
In other words, when an operation of logic verification is conducted to follow the preceding operation of logic verification conducted on data for verification by converting the real circuit data obtained by the correction made to the spot where an error is detected in the real circuit data during the preceding operation of logic verification into data for verification, another error can be detected at some other spot regardless of the correction. If such is the case, the operation of converting real circuit data into data for verification and vice versa needs to be repeated for a number of times in order to detect a plurality of errors in an area selected for logic verification. This is a cause, among others, of a large number of steps that are involved in designing a logic circuit.
Additionally, since it is impossible to locate the errors other than the currently detected error that may exist, a correction technique that may not be the best one may inevitably be applied to the operation of correcting the detected error. Consequently, the previously applied correction technique may have to be altered when some other error is detected. Such an alteration to the previously applied correction technique entails an unnecessary operation of converting real circuit data into data for verification and vice versa and an increased number of steps that are involved in designing a logic circuit.

Logic verification device, logic verification method and logic verification computer program


An exhaust muffler has downstream and upstream chambers which are defined in a casing. Exhaust gas from an internal combustion engine is introduced into an end of a first conduit having a pierced region which is held in fluid communication with the downstream chamber and an end of a second conduit. The other ends of the first and second conduits are open into the upstream chamber. A valve means configured to open/close the first and second conduits is actuated by valve actuating means to switch between a short channel mode discharging the exhaust gas from at least the first conduit through the pierced region, the downstream chamber, and a discharge pipe out of the casing and a long channel mode discharging the exhaust gas from at least the second conduit through the upstream chamber, the pierced region, the downstream chamber, and the discharge pipe out of the casing.

One example of an exhaust muffler is disclosed in Japanese Patent Laid-Open No. Hei 10-77822 ("JP '822") wherein an upstream chamber and a downstream chamber that are held in fluid communication with each other are defined in a casing, and a conduit has a downstream end open into the upstream chamber and a pierced region including a plurality of fluid communication holes held in fluid communication with the downstream chamber that is joined to an exhaust pipe, whereby a flow channel in the casing is made variable by opening and closing the downstream end of the conduit with a valve.


Provided is an organic EL (electroluminescence) display including: a substrate; a plurality of organic EL elements arranged on the substrate; an insulation member disposed between the adjacent organic EL elements; and a first protection layer which is sequentially formed from a region between the lower layer electrode and the function layer of the organic EL element to the surface of the insulation member and includes fluorine.

1. Field of the Invention
The present invention relates to an organic EL (electroluminescence) display.
2. Description of the Related Art
Recently, an organic EL display including an OLED (Organic Light Emitting Diode) has drawn attention. Thus, the organic EL display has been used as a display for a variety of products such as mobile phones or digital cameras.
The conventional organic EL display has a structure comprising a substrate, a plurality of organic EL elements arranged on the substrate, a barrier rib which is disposed between the adjacent organic EL elements and is disposed in order to surround each organic EL element, a protection layer which covers the organic EL elements, and a sealing member (a sealing substrate) for forming a sealed space between the substrate and the sealing member.
The organic EL element has a structure in which a lower layer electrode, an organic layer including an emission layer, and an upper layer electrode are sequentially laminated on the substrate. When power is supplied to the lower layer electrode and the upper layer electrode, hole and electron are injected towards the emission layer from the lower layer electrode side and the upper layer electrode side, respectively. The injected hole and electron are recombined in the emission layer to emit a specific light.
In general, the organic EL display is formed in the order of the substrate, the lower layer electrode, the barrier rib, the organic layer, the upper layer electrode, and the protection layer.
If the organic layer and/or the upper layer electrode are formed by using a deposition mask, the barrier rib serves to support the deposition mask. If the organic layer and the electrodes are formed through a deposition method without using the deposition mask, the barrier rib itself functions as the deposition mask. If the organic layer and the like are formed by using other methods excluding the deposition method (e.g. an inkjet method), the barrier rib can enhance electrical insulation between the adjacent pixels.
The barrier rib is formed of an organic material such as a novolak or acrylic-based resin, or a material including the organic material. Since the organic material can relatively easily absorb moisture, the barrier rib can easily absorb moisture from external air in the process of forming the organic layer, the upper layer electrode, and the protection layer. Thus, when the manufacturing process of the organic EL display is completed, there is a case in which much moisture is absorbed into the barrier rib. If the absorbed moisture is evaporated due to a change in an internal pressure of the display and the like, the evaporated moisture may enter between the barrier rib and the protection layer so as to reach the organic layer. In this case, the lifespan of the organic EL element may be shortened.
Meanwhile, Japanese Unexamined Patent Application Publication No. 2005-122924 and Japanese Unexamined Patent Application Publication No. 2003-257655 propose a technique in which a surface of a barrier rib is fluorinated by exposing the surface of the barrier rib formed of a resin to a fluoride gas.
However, basically, in the technique disclosed in Japanese Unexamined Patent Application Publication No. 2005-122924 and Japanese Unexamined Patent Application Publication No. 2003-257655, the surface of the barrier rib formed of a resin is fluorinated. Therefore, if the moisture, which is absorbed by the barrier rib before a fluorination process is performed after the barrier rib is formed, is evaporated after the manufacturing process of the organic display is completed, there is still high possibility in that the evaporated moisture is absorbed between the fluorinated surface and an inner area of the surface so as to reach the organic layer. Further, impact of the fluorination process against the organic EL element has not been taken into account. Accordingly, there has been a demand for an organic EL display having a novel structure in which the lifespan of the organic EL element can be further improved.

Organic EL display device having a protection layer


A frame image is divided into a plurality of divided areas, and it is determined whether each of the divided areas is a first region including a predetermined object or a second region not including the object. A brightness of each light emitting block is decided based on a result of the determination of each divided area. In cases where a divided area determined as the second region in a target frame has been determined as the first region in frames, which satisfy a predetermined condition, among past frames, the brightness of a light emitting block corresponding to the divided area is decided to a brightness closer to the brightness of a light emitting block corresponding to a divided area determined as the first region as compared to the brightnesses of light emitting blocks corresponding to the other divided areas determined as the second region.

1. Field of the Invention
The present invention relates to an image display apparatus and a control method therefor.
2. Description of the Related Art
In the past, in an image display apparatus using a liquid crystal device, there has been a technology in which a backlight is divided into a plurality of blocks, so that the brightness of the backlight and the transmittance of a liquid crystal are controlled based on an image signal for each block. As a result of this, the black floating (misadjusted black level) of a dark portion of an image is suppressed, and contrast is improved (for example, Japanese patent No. 3523170). Medical images represented by those taken by Roentgen or X rays, etc., are images in each of which a bright diagnostic image is disposed in a dark background, and in cases where such imaged are displayed by a liquid crystal display device, misadjusted black level may be visually recognized as disturbance. Accordingly, the disturbance of the black floating can be improved by reducing the backlight brightness of the dark portion of the image, by using the technology of the Japanese patent No. 3523170.
In addition, it is known that when the brightness of the backlight is changed rapidly, a flicker occurs, and so, there has been proposed a technology of alleviating a change in brightness of the backlight in order to reduce the flicker (for example, Japanese patent laid-open publication No. 2009-181075).

Image display apparatus and control method therefor


In a chair having a frame, a fixed seat, and a pivotal back, the frame includes two bridge-supporting legs extending between an upper position and a lower position behind and below the upper position. A transverse bridge fitting removably into openings in the bridge-supporting legs bridges the bridge-supporting legs in at least two orientations. The bridge limits pivotal movement of the back, when pivoted downwardly and backwardly, to at least two reclined positions. In one contemplated embodiment wherein the transverse bridge comprises a beam fitting removably and nonrotatably into the openings and bridging the bridge-supporting legs in two such orientations, a spacer extending along and mounted fixedly to the transverse beam is interposed between the transverse beam and the back in one such orientation but not in the other orientation. In other contemplated embodiments wherein the transverse bridge comprises a transverse axle, similar spacers mounted fixedly to the transverse beam are interposed between the transverse beam and the back, each spacer having a bearing surface conforming generally to a spiral or to a closed, curved shape when viewed axially and adapted to bear against the back at varying radial distances from the axis.

Typically, apart from cushions if used, an Adirondack chair is made predominantly from wooden boards and other wooden pieces or from synthetic materials, such as polymeric materials. Typically, such a chair has a fixed seat. It is known for such a chair to have a reclinable back and a simple mechanism to enable the reclinable back to pivot downwardly and backwardly, either between an upright position and a reclining position or between an upright position and a selected one of two or more reclining positions. This invention has resulted from efforts to improve such a mechanism for an Adirondack chair.


An HVMOS transistor structure includes: a first ion well of a first conductivity type and a second ion well of a second conductivity type different from the first conductivity type formed over a substrate, wherein the first ion well and the second ion well have a junction at their interface; a gate overlying the first ion well and the second ion well; a drain region of the first conductivity type, in the first ion well, spaced apart from a first sidewall of the gate by an offset distance; and a source region of the first conductivity type in the second ion well. In addition, a method for fabricating the HVMOS transistor structure described above is also provided.

1. Field of the Invention
The invention relates to a semiconductor device, and in particular relates to an HVMOS and a method for fabricating thereof
2. Description of the Related Art
High-voltage metal-oxide-semiconductors (HVMOS) are MOS devices for use with high voltages, which may be, but not limited to, voltages higher than the voltage supplied to the I/O circuit. HVMOS devices may function as switches and are broadly utilized in audio output drivers, CPU power supplies, power management systems, AC/DC systems, LCD or plasma television drivers, automobile electronic components, PC peripheral devices, small DC motor controllers, and other consumer electronic devices.
FIG. 1 shows a cross-sectional view of a conventional high-voltage NMOS transistor structure. The high-voltage NMOS (HVNMOS) transistor structure 101 includes a gate 105 overlying an area of a P-type substrate 100, a deep N-well 110 formed in the P-type substrate 100, an N-well 120 formed in the substrate 100 proximate to a first sidewall 105a of the gate 105, and a P-well 130 formed in the P-type substrate 100 proximate to a second sidewall 105b of the gate 105 opposite to the first sidewall 105a, wherein a P-N junction 140 is formed at the interface between the N-well 120 and the P-well 130. The P-well 130 has an overlapping area with the gate 104 which is larger than that of the N-well 120. An N+ drain region 150 is in the N-well 120 and aligned to the first sidewall 105a of the gate 104. An N-type source region 155 includes an N+ region 155a and an N-type lightly doped region 155b formed in the P-well 130.
The above-described HVNMOS transistor structure 100 can tolerate high voltages introduced from the N+ drain region. However, since the size of IC devices continue to shrink via new generation technologies, the above-described HVNMOS transistor structure 100 is not suitable for advanced ICs having a reduced gap between the P-N junction and the N+ drain region. A highly dosed N-type dopant in the N+ drain region is prone to diffuse the P-N junction 140 and the gate 104 due to the reduced gap between the P-N junction 140 and the N+ drain region 150, which results in a more serious hot carrier injection (HCI) effect and degraded time-dependent dielectric breakdown (TDDB).

HVMOS transistor structure having offset distance and method for fabricating the same


Described herein is a “cross-over” connector that can be used with core barrel outer tubes to prevent damage and destruction when they are connected to one another by automated equipment on a rig floor, for example, automated rig-floor torque wrenches. Standard core barrel outer tubes having a pin connector and a box connector are modified by adding “cross-over” sub elements to the pin and box connectors to increase their effective strength. The sub elements include portions which engage respective ones of the pin and box connections. The sub elements are designed to be the contact points for the automated equipment, so that it they are damaged, they can readily be replaced at a lower cost when compared to the scrapping and replacement of the core barrel outer tubes themselves.

Core barrel outer tubes have relatively thin walls at the American Petroleum Institute (API) standard connectors that are used to connect them together in the field. The API connectors comprise "pin", "male" or screw connectors and "box", "female" or socket connectors as is well-known. These API connectors are inserted into or formed in the open ends of the core barrel outer tubes. Typically, a "pin" connector is provided at one end of the core barrel outer tube and a box" connector at the other end of the core barrel outer tube. In the field, for example, on a rig floor, a pin connector is joined to a box connector to join two core barrel outer tubes together.
"Rig-tongs" have conventionally been used for making the connections between core barrel outer tubes. The pressure applied to the core barrel in the vicinity of the "pin" and "box" connectors by "rig-tongs" is not normally sufficient to cause serious damage to the core barrel outer tubes as they are being connected to one another. However, for reasons of safety, these "rig-tongs" are being replaced by automated equipment, in particular, automated rig-floor torque wrenches. When making connections using automated rig-floor torque wrenches, the core barrel outer tubes may be damaged or destroyed due to one or more of the pressure applied to the thin walls during the connection process; the small distance between automated tongs that causes the tongs to grip directly over the outer tube connection where the wall thickness is the thinnest; and excessive pressure exerted by jaws of such automated tongs to achieve the required torque for a satisfactory connection between the tubes.
A conventional way of overcoming the problems created by automated equipment is to replace the entire core barrel outer tube with a stronger, thicker core barrel outer tube. This has the disadvantage of increasing the cost of each core barrel outer tube due to the increased raw material needed to make the stronger, thicker core barrel outer tube, as each core barrel out tube has a typical length of between 8 m and 10 m (between approximately 26 ft and 32 ft).

Improvements relating to core barrel outer tubes


An easy entry seat track assembly with single point memory comprises a lower track assembly and an upper track assembly, slidably engaging the lower track assembly. A latch releasably secures the upper track assembly to the lower track assembly. Operation of a towel bar or the like is provided for comfort adjustment of the upper track assembly relative to the lower track assembly. Also, single point memory is provided for moving the latch from a latching position to an unlatching position, holding in the unlatching position temporarily and returning the latch to the latching position when the upper seat track is moved to a predetermined position. The single point memory comprises a cam plate mounted on the upper track assembly. A memory mechanism attached to the latch is contacted by the cam plate as it rotates from an open position to a memory position, moving the latch to the unlatching position. The cam plate is held in the memory position until the upper track slides to the predetermined position where, for example, the cam plate contacts a reset flange which returns the cam plate to the open position.

Seat track assemblies are commonly used for forward and rearward comfort adjustment of seats, particularly seats in motor vehicles. Such seats normally have a seat base and a seat back, with the seat back pivotably connected to the seat base by a recliner. Upper seat tracks are slidable over lower seat tracks, and are secured together by a latch assembly. When such seats are positioned, for example, in the front row of a 2-door vehicle, it can be desirable to be able to move the seats forward to allow access to a back row of the motor vehicle. Easy entry, as that term is used by those skilled in the art, refers to a seat mounted on a seat track assembly in which the upper seat tracks can be readily unlatched from the lower tracks and the seat slid forward, allowing greater access to the back row.
Memory, as that term is used by those skilled in the art of seat track assemblies, refers to a seat track assembly having a system in which the seat returns to a preselected position. In single point memory systems the seat re-latches when returned to one particular position preselected by the manufacturer. Known single point memory designs greatly increase the cost and complexity of seat track assemblies. It would be desirable to have a low cost memory feature having fewer components and greater reliability.
In view of the foregoing, it is an object of the present invention to provide a seat track assembly having single point memory with reduced cost, complexity and enhanced manufacturability. It is yet another related object of the present invention to provide an easy entry seat track assembly with single point memory that is highly reliable in operation.

Easy entry seat track assembly with single point memory


The present invention provides such a video communication system as plural information transmitters for transmitting video information are connected to information display units for displaying the video information received from the information transmitters through communication means, comprises a reception means for asynchronously receiving the video information from the information transmitters, a process means for asynchronously processing the video information received by the reception means and a display means for asynchronously displaying the plural video information processed by the process means, so that the present invention solves such a problem as influencing an entire display condition of video information received from plural information transmitters because of different speed of a part of networks or defective condition of a part of networks.

1. Field of the Invention
The present invention relates to a video communication system and a video communication processing method for displaying images by receiving image data or the like from, for example, a remote-located communication apparatus connected through a communication network.
2. Related Background Art
For example, such a video transmission system as realizing to have a chat utilizing information of audio and video or transmitting video information between desired plural points by forming a network to connect plural video cameras and computers, which are disposed within a building, through a communication line has been proposed.
In this video transmission system, a user of a computer at a certain point can remotely control a video camera at a desired point and display video information photographed by the video camera on a screen of own computer.
In the video transmission system which enables to realize a remote control of the video camera, as increasing the number of video cameras to be controlled, the user is more required to easily grasp a position where each of the video cameras is located. Therefore, such technique as superimposing and displaying a camera symbol, which indicates a located position of each video camera, on an image used in displaying a map has been proposed. Further, such technique as representing an actual direction of the video camera by displaying a direction of the camera symbol has been proposed.
In this system, video information of the plural video cameras can be displayed almost at the same time by a computer. However, in a momentary time, a control of the video camera, a video information transmission and a video information display can be performed for only a certain computer. Accordingly, it is required to contrive a method for obtaining such an image as it looks like a dynamic image by executing a video transmission process and a video display process in time divisional.
In the above-described system, it is possible to increase the number of images, which can be displayed almost at the same time, until a certain level. However, in a conventional proposed method, in a case where a video transmission computer, which displays plural images at the same time, is connected to a video display computer through a network of slow data transmission (small data communication capacity per unit time) and a network of quick data transmission (large data communication capacity per unit time), there occurs such a problem as displaying speed is standardized under the network of slow data transmission.
In a case where an abnormal state is appeared in the video transmission computer or the network, there occurs such a problem as interrupting all renewal of video for a constant time.
An object of the present invention is to provide a video communication system and a video communication method without deteriorating performance entirely in a case where a video display unit is connected to plural video transmitters through networks of different communication speed or a defect is appeared in each of the networks.
To achieve the above-described object, the present invention is characterized in the following structure.
That is, a video communication system in which plural information transmitters for transmitting video information are connected to an information display unit for displaying the video information received from the information transmitters through communication means comprising:
a reception means for asynchronously receiving the video information from the information transmitters;
a process means for asynchronously processing the video information received by the reception means; and
a display means for asynchronously displaying the plural video information processed by the process means.
The video information, which is compressed, corresponds to such data as an image of one frame is diffused in plural packets. The process means is such a process as combining the data diffused in the packets to the image of one frame.
Another object of the present invention is to provide a video communication apparatus and a video communication method having new functions and a storage medium thereof.

Video communication system, video communication processing method and storage medium thereof


A hitch assembly comprises a first coupling element and a second coupling element suited to be latched to the first coupling element. A rod member has a first end connected to the first coupling element. An actuator has a movable output member that can move between a retracted and an extended position.

Coupling a towing vehicle and a towed vehicle together is in many cases a difficult task. Generally, the towed vehicle has a tongue with an eye at its tip and the towing vehicle has a hitch. Thus, the towing vehicle needs to be driven rearwards in a manner such that the tongue correctly hits the hitch. This is a difficult task even when the driver is supported by a camera looking rearwards and a display showing the hitch and the tip of the tongue. After the tongue is located in the hitch, the operator needs to leave his operator's cab and lock the hitch manually.
A number of proposals were made with hitches having movable elements allowing the operator to place the towing vehicle in the vicinity of the towed vehicle and to manually move the movable element of the hitch towards the towed vehicle. Afterwards, the towing vehicle is headed forwardly and then the hitch is arrested in a transport position. This requires the operator to leave his cab twice.
In the context of agricultural tractors, hitches with actuators for altering the length of the hitch have been described for providing a connection to pulled implements.
The task of coupling a towing vehicle and a trailed vehicle together is difficult especially in agricultural harvesting conditions with uneven terrain, when a combine and a cart supporting the header of the combine need to be coupled together.
Thus, there is a need for an improved hitch assembly making coupling of two vehicles easier.
It is an object of the present invention to provide a hitch assembly that can be easily used.


A dual compartment liquid storage tank has a bottom wall, an annular side wall extending upwardly from the bottom wall and a top cover, to define an interior space. A bulkhead extends across the interior space to divide it into two separate compartments completely isolated from one another. The bulkhead is arcuately curved about a vertical axis and is marginally sealed to the bottom and side walls and top cover to prevent transmission of liquid from one compartment to the other. The curved configuration of the bulkhead withstands pressure differentials due to unequally filled compartments without buckling or distortion or failure of the seals, more effectively than a flat bulkhead.

In the past, storage tanks for two different liquids have been constructed with a flat barrier wall or bulkhead to divide the interior of the tank into two separate compartments. This construction is usually satisfactory when the liquid volume in both compartments is the same. However, a problem occurs when the liquid levels are substantially different. For example, after liquid is withdrawn or partially withdrawn from one compartment but not the other, the liquid pressure on the two sides of the flat bulkhead will be unequal and as a result the bulkhead may bulge or become warped or distorted, sometimes causing a failure of the weld between the bulkhead and the tank wall. The problem of unequal pressures also is present when one compartment or the other is tested for leaks by the introduction of air under pressure.
One object of this invention is to provide a dual compartment storage tank which overcomes the problems associated with prior tanks of this type. In accordance with a specific embodiment to be described, the bulkhead is curved in an arc rather than flat and is therefore much more resistant to unequal pressures.
Another object is to provide a dual storage tank which is composed of a relatively few simple parts, is rugged and durable in use, and is easy to manufacture, maintain and assemble.
Other objects, features and advantages of the invention will become more apparent as the following description proceeds, especially when considered with the accompanying drawings.


An air detection system is provided and includes an intelligent device and an internet of things processing device. The intelligent device includes an inlet, an outlet, a gas-flowing channel, a control module and a gas detection module. The gas-flowing channel is disposed between the inlet and the outlet. The control module is disposed in the intelligent device and includes a processor and a transmission unit. The gas detection module is disposed in the gas-flowing channel and electrically connected to the control module. The gas detection module includes a piezoelectric actuator and at least one sensor. The piezoelectric actuator inhales gas into the gas-flowing channel through the inlet and discharges the gas through the outlet. The sensor detects the introduced gas to obtain gas information and transmits the gas information to the control module. The internet of things processing device is connected to the transmission unit of the intelligent device for receiving the gas information.

Recently, people pay more and more attention to the air pollution. In order to confirm the quality of the air, it is feasible to use a gas sensor to detect the air surrounding in the environment. If the detection information can be provided in real time to warn the people in the environment, it would be helpful for avoiding the harm and facilitating people to be away from the hazard immediately. Thus, it prevents the hazardous gas exposed in the environment from affecting the human health and causing the harm. Therefore, using a gas sensor to detect the air in the surrounding environment is a very good application.
Therefore, how to combine an intelligent device with a gas detection module and connect the intelligent device to an internet of things processing device for allowing the user to not only confirm body information in real time but also monitor the air quality in real time is the main subject in the present disclosure.


The present invention relates to an electric vehicle and a control method thereof. According to the inventive electric vehicle and control method thereof, the state of a fuel cell that is a driving power of the electric vehicle can be sensed to determine whether the fuel cell system is normal or not, and output different sound sources according to the states of the fuel cell system so that the sound outputted as a driving sound while the electric vehicle runs may vary to allow a driver to recognize the state of the electric vehicle and a change in state of the fuel cell. Also, the awareness of difference in driving of the motor can be decreased through the sound outputted as the driving sound of the electric vehicle to improve the driver's satisfaction and allow pedestrians to more easily recognize approach of the electric vehicle.

The present invention disclosed herein relates to an electric vehicle and a control method thereof, and more particularly, to an electric vehicle which may output a driving source to a predetermined level corresponding to a state of a fuel cell during a running thereof, and a control method thereof.
An electric vehicle is being actively researched in that it is an alternative with the highest possibility that can solve the automobile pollution problem and an energy problem.
The present invention relates to an electric vehicle and a control method thereof, and more particularly, to an electric vehicle that may sense pedestrians near the electric vehicle during a running thereof to allow the pedestrians to more easily recognize approach of the electric vehicle through a light emitting device with a predetermined output sound, and a control method thereof.
An electric vehicle (EV) is a vehicle obtaining power by driving an AC or DC motor using battery power, and is generally classified into a battery-only electric vehicle and a hybrid electric vehicle. The battery-only electric vehicle drives a motor through battery power, recharges the battery when the power is completely exhausted, and the hybrid electric vehicle drives an engine to generate electricity and charge a battery with the generated electricity, and drives an electric motor through the generated electricity to allow itself to move.
Also, the hybrid electric vehicles may be classified into a series type and a parallel type. The series type hybrid electric vehicle employs a concept in which mechanical energy outputted from an engine is converted to electric energy through a generator, this electric energy is supplied to a battery or motor, thus the vehicle is always driven only by the motor, and the engine and the generator are added to an existing electric vehicle so as to increase the running distance, whereas the parallel type hybrid electric vehicle may be driven by only the battery power, only the engine (gasoline or diesel), or by simultaneously using the engine or the motor according to the running condition.
Since such an electric vehicle or hybrid electric vehicle is driven by using a motor, it is different from a general vehicle.
Since a general vehicle is supplied with a fuel and as the engine is driven, runs, an engine driving sound is generated, whereas since an electric vehicle or a hybrid electric vehicle has no engine driving sound, a driver driving such a vehicle may have a negative feeling on the circumstance.
Also, the different driving sound of such electric vehicles may cause pedestrians not to recognize or to be careless about approach of such vehicles, resulting in an accident.

Electric vehicle and control method thereof


Disclosed are ceramic articles, which in one aspect are composed predominately of a cordierite having a composition close to that of Mg2Al4Si5O18. The ceramic articles possess a microstructure characterized by a unique combination of relatively high porosity and relatively narrow pore size distribution, both as measured by mercury porosimetry, that render the ceramic structure useful for ceramic filter applications requiring high thermal durability and high filtration efficiency coupled with low pressure drop along the length of the filter. Such ceramic bodies are particularly well suited for filtration applications, such as diesel exhaust filters or DPFs. Also disclosed are methods for the manufacture of the ceramic articles described herein.

1. Field of the Invention
The present invention relates to ceramic articles, and more particularly to ceramic articles having properties suitable for use in exhaust after-treatment applications, particularly diesel exhaust filtration.
2. Technical Background
Recently, much interest has been directed towards the diesel engine due to its efficiency, durability and economical aspects. However, diesel emissions have been scrutinized both in the United States and Europe, for their harmful effects on the environment and on humans. As such, stricter environmental regulations will require diesel engines to be held to the same standards as gasoline engines. Therefore, diesel engine manufacturers and emission-control companies are working to achieve a diesel engine which is faster, cleaner and meets the most stringent of requirements under all operating conditions with minimal cost to the consumer.
One of the biggest challenges in lowering diesel emissions is controlling the levels of diesel particulate material present in the diesel exhaust stream. In 1998 diesel particulates were declared a toxic air contaminant by the California Air Resources Board. Legislation has been passed that regulates the concentration and particle size of diesel particulate pollution originating from both mobile and stationary sources.
Diesel particulate material consists mainly of carbon soot. One way of removing the carbon soot from the diesel exhaust is through diesel traps. The most widely used diesel trap is the diesel particulate filter which filters the diesel exhaust by capturing the soot on the porous walls of the filter body. The diesel particulate filter is designed to provide for nearly complete filtration of soot without significantly hindering the exhaust flow. However, as the layer of soot collects on the surfaces of the inlet channels of the diesel particulate filter, the lower permeability of the soot layer causes a gradual rise in the back pressure of the filter against the engine, causing the engine to work harder. Once the carbon in the filter has accumulated to some level, the filter must be regenerated by burning the soot, thereby restoring the back pressure to low levels. Normally, the regeneration is accomplished under controlled conditions of engine management whereby a slow burn is initiated and lasts a number of minutes, during which the temperature in the filter rises from about 400-600° C. to a maximum of about 800-1000° C.
Cordierite, being a low-cost material, in combination with offering a low coefficient of thermal expansion (CTE), has been the material of choice in diesel exhaust filtration. To that end, porous cordierite ceramic filters of the wall-flow type have been utilized for the removal of particles in the exhaust stream from some diesel engines since the early 1980s. A diesel particulate filter (DPF) ideally combines low CTE (for thermal shock resistance), low pressure drop (for engine efficiency), high filtration efficiency (for removal of most particles from the exhaust stream), high strength (to survive handling, canning, and vibration in use), and low cost. However, achieving the combination of high filtration efficiency, high strength, and very low pressure drop has proven elusive with cordierite DPFs.
Conventional DPF design has thus required the balancing of several factors, including porosity, pore size distribution, thermal expansion, strength, elastic modulus, pressure drop, and manufacturability. Further, several engineering tradeoffs have been required in order to fabricate a filter having an acceptable combination of physical properties and processability. For example, increased porosity is often attainable through the use of coarser raw materials, the use of pore formers, and or lower sintering temperatures. However, each of these approaches is known to result in an increase in thermal expansion which can compromise the survivability of the filter in the desired application. In addition, the heat capacity and thermal conductivity of the filter generally decreases with increasing porosity, thus leading to higher temperatures and more severe gradients during service.
In order to optimize a filter, the relatively fine porosity which reduces the heat capacity and thermal conductivity should be minimized because these pores can inhibit permeability. However, in order to maintain sufficient filtration efficiency and strength, relatively large pores should also be minimized. Larger pores often have a poor degree of connectivity to one another which has been found to result in clogging of the pores by soot during filtration, causing an undesirable rapid increase in pressure drop with soot loading and corresponding decrease in filtration efficiency.
It would be considered an advancement in the art to obtain an optimized ceramic article, suitable for use in filter applications requiring high thermal durability and high filtration efficiency coupled with low pressure drop along the length of the filter. In particular, there is a need in the art for a ceramic article which possesses a pore microstructure characterized by a relatively high level of porosity, a relatively narrow pore size distribution, and a relatively low coefficient of thermal expansion. To that end, as described below, the present invention provides such bodies and method of making them.