A scaffold for reshaping the cartilaginous portion of an ear. The scaffold is formed of shape memory material and in the form of a horseshoe shape, or is formed from a thermoplastic pliable material.

Prominent ear deformity is common amongst the human population. An ear which projects more than 17 mm from the side of the head is usually perceived as prominent. By this estimate, up to 10% of the population may be affected (1-2). It is desirable to correct the prominence very early in life when the cartilage is soft and pliable, however often the prominence is ignored and not treated. Consequently, many children suffer the psychological consequences associated with prominent ears which can persist into adulthood. Therefore there is a need to develop a safe and effective method for correction which can be used in both adults and children.
The ear cartilage is cup-shaped and is formed of the conchal fossa and the antihelical fold which allows the ear to lie flat against the side of the head. Prominence may result in the abnormal formation of the antihelical fold, or folded over rim (FIGS. 1b and 2a) during embryonic development. Alternatively, it may be the result of a deep conchal fossa (FIG. 2b). One or both of these abnormalities may need to be addressed when correcting prominence of the ear. However, even for ears with a deep conchal bowl, accentuation of the antihelical fold will make a difference to the perception of prominence(1). In most cases the prominence is apparent at birth but can develop soon afterwards and in some cases up to the age of five.
There are a number of known methods for addressing the problem of prominent ears such as otoplasty surgery and non-invasive methods involving the application of devices or splints to the exterior of the ear.
Surgical techniques, for example otoplasty or pinnaplasty, are available to change the shape of the ear and correct the deformity. These vary from very invasive procedures to reshape the cartilage to minimally invasive procedures, for example percutaneous scoring of the cartilage(3). The principle involved in all of these procedures is reshaping of the cartilage which gives the ear its prominence. However, otoplasty is a lengthy procedure taking approximately 45 minutes for each ear. In addition a number of problems and complications are associated with this type of surgery and with percutaneous scoring of the cartilage(3-6) such as infection, bleeding, skin necrosis, death from general anaesthesia, recurrence of the prominence, keloid or hypertrophic scarring, asymmetry, palpable sharp edges (where the cartilage has been cut), pain, numbness and cold intolerance/sensitivity.
The use of minimally invasive techniques using needles or similar instruments overcome some of the above-identified problems, have fewer complications and take less time, for example 15 minutes per ear. However, such techniques have the disadvantage in that they are less successful in achieving the desired prominence correction and have a higher rate of asymmetry and the formation of palpable sharp edges compared with standard otoplasty surgery.
Furthermore such surgical techniques, both invasive and minimally invasive, require substantial training and experience. In general the results of the first 10-20 cases are likely to be unpredictable (6). To overcome the problems associated with surgical otoplasty and minimally invasive methods several known devices are in use to correct the deformity and avoid surgery altogether. These are essentially external splints which deform the cartilage by the continuous application of external force.
One such device, known as Earbuddies™ is formed from a piece of soft wire coated in silicone (for comfort) which is moulded and placed onto the outside of the ear and taped into position. The cartilage moulds its shape to that of the ear buddy and any prominence is corrected. At birth and for a variable time afterwards (up to six months), the cartilage of the human ear remains soft and deformable. Therefore, external forces applied to the cartilage can result in permanent changes to its shape(7-8). Hence, Earbuddies™ have most success in children up to the age of six months, after this age the cartilage becomes firmer and more resistant to deformation. Also the increasing dexterity of the child who will try (and usually succeed) in removing the splint reduces its effectiveness.
Another device, Aurimethod™ which includes the use of the Auri®Clip and Auri®Strip devices applies gentle, continuous, external pressure to the cartilage of the ear in the region of the antihelical fold. This deforms the cartilage in this area over a prolonged period of time to make the ears lie flatter against the head. The Auri®Strip is a very thin (0.2 mm thick), transparent and double-sided medical adhesive material that is invisible when worn and can also be used to reshape the antihelical fold. It is claimed that 3 to 6 months treatment is enough to have a permanent effect.
The disadvantage of this method is skin irritation and compliance which reduced the overall success rate (9).
WO2007/023296 discloses surgical scaffolds formed of shape memory material for use in reshaping the cartilage of the nose or the ear. One, two (or three) of the implants (FIG. 3) are inserted subcutaneously into the ear as shown in FIG. 3c. On insertion, the implant is embedded in the cartilage and released. Upon release, the implant changes from one shape to a second pre-programmed shape which results in an instant change in the shape of the underlying cartilage.
These scaffolds have a reduced risk of complications and time taken to recover from the treatment and have therefore overcome a number of the problems associated with standard otoplasty and minimally invasive otoplasty surgery. However, such devices often do not produce the desired change in shape of the anti-helical fold and although the anti-helix does fold, it is not always in a predictable manner to produce the optimal curvature. In addition these scaffolds often have a poor conformance to the cartilage and sit 'proud' which can compromise the correction of prominence. Therefore there is a need to further improve the attachment and fit of the scaffold to the cartilage to achieve reliable results.
Furthermore these scaffolds are designed to fit the average dimensions of the human ear, and as such are not suitable for all ears which are infinitely variable. Furthermore, there is a need to improve design and materials such that insertion and removal are minimally invasive.
Due to the size of the introducer on which the scaffold is held, it is necessary to make a corresponding incision that will accommodate the introducer such that the scaffold can be correctly positioned in place. This has the disadvantage that recovery time is longer due to post-surgical effects such as pain and bleeding. In addition, further surgical intervention is necessary to remove the scaffold once correction has been effected due to the visibility of the scaffold under the skin. Also, these scaffolds are not suitable for long term or permanent use.
Whilst the suitability of Nitinol scaffolds has been established for use in correcting ear deformities there remains a need to further improve the design of the scaffolds such that insertion and removal are minimally invasive and the method of insertion is simpler requiring less time and surgical skill. In addition, a design with lower visibility has the advantage that removal is not necessary in cases where deformity is not permanently corrected after treatment, or if the scaffold is to be removed, this will be required less often.
Thermoplastics are polymers capable of undergoing a reversible transition from a relatively hard brittle state to a molten or rubber-like state. The temperature at which this occurs is known as the glass transition temperature (Tg). Thermoplastics can undergo repeated melting/cooling cycles and can be re-shaped on heating. Known thermoplastics include polyethylene, polypropylene, polystyrene, polyester, polyvinyl chloride, acrylics, nylons, spandex-type polyurethanes and cellulosics.
The thermoplastic polymers manufactured by Inion Oy, Finland, have been used successfully in bone regeneration(10) and are biodegradable. The polymers degrade in vivo by hydrolysis within 12 months to form carbon dioxide and water(11). The polymers are commercially available in the form of pre-cut strips or as plates from which the desired shape and size can be easily cut.
It is an object of the present invention to provide an improved ear scaffold which overcomes the above-mentioned problems and demonstrates improved predictability and efficacy.


A data retransmission method, apparatus, and system can improve a success ratio of data packet retransmission. A data retransmission method includes: after a source node continuously transmits at least two data packets to a destination node according to a go-back-N automatic repeat request, monitoring and decoding, by a relay node, the at least two data packets; storing a copy of a successfully decoded data packet; monitoring a response message to each data packet, where the response message is returned by the destination node to the source node; and sending a copy of a data packet that corresponds to a reception negative acknowledgment message to the destination node, when the monitored response message is the reception negative acknowledgment message.

A data packet of a wireless communication system often cannot be received correctly. To improve reliability of data transmission, An ARQ (Automatic Repeat Request, automatic repeat request) technology is provided in the prior art.
In the ARQ technology, an SW-ARQ (Stop and Wait ARQ, stop and wait automatic repeat request) technology and a GBN-ARQ (Go-Back-N ARQ, go-back-N automatic repeat request) technology are often used. In the SW-ARQ technology, when a receiving end returns a reception acknowledgment message (ACK) for a previous data packet, a transmitting end transmits a next data packet; and when the receiving end returns a reception negative acknowledgment message (NACK) for the previous data packet, the transmitting end retransmits the previous data packet. Therefore, by using this technology, a system resource is wasted in a process of waiting for ACK/NACK. In the GBN-ARQ technology, the transmitting end continuously transmits data packets in sequence; and when receiving NACK returned by the receiving end, the transmitting end stops transmitting a new data packet, retransmits a data packet that corresponds to the NACK, and retransmits, in sequence, data packets subsequent to the data packet that corresponds to the NACK. Compared with the SW-ARQ technology, by using the GBN-ARQ technology, a utilization ratio of a channel is improved.
During implementation of data retransmission by using GBN-ARQ, the inventor finds that the prior art has at least the following problems. A relay cooperation communications technology is more and more used in an existing communication system to improve a success ratio of data transmission; however, for GBN-ARQ, a solution of the relay cooperation communications technology is not used, and therefore, when data retransmission is performed by using the GBN-ARQ technology, a success ratio of data packet retransmission is relatively low.

Data retransmission method, apparatus, and system


According to a method of data processing, a data set including at least one entry specifying a signal group by a predetermined signal group name is received by a data processing system. In response to receipt of the data set, the entry in the data set is processed to identify the signal group name. Signal group information associated with an event trace file containing simulation results is accessed to determine signal names of multiple signals that are members of the signal group. Simulation results from the event trace file that are associated with instances of the multiple signals are then included within a presentation of simulation results.

1. Technical Field
The present invention relates in general to simulating digital devices, modules and systems, and in particular, to computer simulation of digital devices, modules and systems.
2. Description of the Related Art
Verifying the logical correctness of a digital design and debugging the design, if necessary, are very important steps in most digital design processes. Logic networks are tested either by actually building networks or by simulating networks on a computer. As logic networks become highly complex, it becomes necessary to simulate a design before the design is actually built. This is especially true when the design is implemented as an integrated circuit, since the fabrication of integrated circuits requires considerable time and correction of mistakes is quite costly. The goal of digital design simulation is the verification of the logical correctness of the design.
In a typical automated design process that is supported by a conventional electronic computer-aided design (ECAD) system, a designer enters a high-level description utilizing a hardware description language (HDL), such as VHDL, producing a representation of the various circuit blocks and their interconnections. The ECAD system compiles the design description into a format that is best suited for simulation. A simulator is then utilized to verify the logical correctness of the design prior to developing a circuit layout.
A simulator is typically a software tool that operates on a digital representation, or simulation model of a circuit, and a list of input stimuli (i.e., testcase) representing inputs of the digital system. A simulator generates a numerical representation of the response of the circuit, which may then either be viewed on the display screen as a list of values or further interpreted, often by a separate software program, and presented on the display screen in graphical form. The simulator may be run either on a general-purpose computer or on another piece of electronic apparatus, typically attached to a general purpose computer, specially designed for simulation. Simulators that run entirely in software on a general-purpose computer will hereinafter be referred to as "software simulators". Simulators that are run with the assistance of specially designed electronic apparatus will hereinafter be referred to as "hardware simulators".
Usually, software simulators perform a very large number of calculations and operate slowly from the user's point of view. In order to optimize performance, the format of the simulation model is designed for very efficient use by the simulator. Hardware simulators, by nature, require that the simulation model comprising the circuit description be communicated in a specially designed format. In either case, a translation from an HDL description to a simulation format, hereinafter referred to as a simulation executable model, is required.
The result of the application of the testcase to the simulation executable model by the simulator is referred to herein as an "all events trace" (AET). The AET contains the logic values of signals and/or storage elements within the simulation executable model. An AET viewer can be utilized to present by the contents of the AET to the user for review and analysis.
As will be appreciated, for large simulation executable models, a vast amount of data will be present in the AET, not all of which will be relevant to the user. Accordingly, conventional AET viewers permit a user to input an Input/Output (I/O) list specifying signals in the simulation executable model that the user desires to view. In response, a conventional AET viewer presents to the user only those signals within the simulation executable model that are identified within the I/O list.

International Business Machines Corporation


A sliding roof structure of a vehicle includes rails 5a, 5b installed on the right and left roof side portions of the vehicle and a cover member 2 that can be slid and folded along the rails 5a, 5b, wherein the cover member 2 is comprised of a detachable inner cover member 30 and an outer cover member 40, which is slid along the rails 5a, 5b and to which the inner cover member 30 is mounted in detachable state, or the cover member 2 is comprised of a base cover member 7, which is made by attaching a bottom cover sheet 9 to the bottom frame member 10, and a top cover member 8, which is made by attaching a top cover sheet 8a to the top frame member 14, either the top frame member 14 or the bottom frame member 10 is equipped with an engaging portion 14a and the other with a groove 12 for supporting the engaging portion 14a, and the engaging portion 14a is inserted into the groove 12 and the top cover member 8 attached to the base cover member 7 in detachable state.

A sliding roof structure of a vehicle is well known as a means for taking more light into vehicle interior and facilitating intake of outside air (JP1994-183263A, for example).
An open section of a sliding roof structure, which is configured, enclosed with the right and left roof side portions, the roof front portion, and the roof rear portion, is provided with a cover made of cover sheet reinforced by a skeletal structure, with both ends of the skeletal member inserted into the rails on the right and left roof side portions in slidable state. By sliding the both ends of skeletal member along the rails on the right and left side portions, the cover sheet can be extended to close the open section, or folded to form an open section. The cover sheet can be extended or folded either manually or electrically. A vehicle in sliding roof structure allows the driver and passengers to feel refreshed, and its design attracts attention, thus ensuring increased added value, compared with vehicles without an open section.

Sliding roof structure and vehicle having the same


An apparatus for dispersing a substance in a liquid beverage contained in a container includes a receptacle containing the substance formed in the interior of the container and an opening tab attached to the top of the container for bursting the receptacle to disperse the substance and for opening a pour panel in the top of the container so that the liquid beverage can be drunk from the container. The receptacle is formed of a flat sheet of an elastic material that is joined at opposite edges thereof to form a burstable seam. One end of the receptacle is a beak that causes the seam to burst upon engagement with the opening tab.

Various devices for dispersing a substance into a beverage container have been proposed. Some of these devices include a removable top containing the substance that is to be dispersed. The top snaps onto the top of a beverage container, such as a cup. Some mechanism, such as a lever, or an operation, such as bending up the top, is used to release the substance into the container, then the top is removed in order to drink the beverage. For example, see U.S. Pat. Nos. 3,326,363 (Bennett), 3,779,372 (de Lloret), 4,634,003 (Ueda), and 5,052,553 (DeSanctis). Other devices include a separate chamber formed at the top of the beverage container to hold the substance to be dispersed, but do not include an integral mechanism for rupturing the chamber and for opening the container. See, for example, U.S. Pat. No. 3,305,368 (Bourelle).
Still other closures include a top which may be snapped onto the beverage container. Depressing a portion of the top releases the substance contained in the top into the container, then the lid is removed to pour the beverage. The beverage is not consumed directly from the container. Moreover, this apparatus requires a specially-manufactured top that seems incompatible with existing canning techniques and may not provide prompt, thorough mixing as required to meet the practical requirements of the beverage industry. See, for example, U.S. Pat. No. 4,785,931 (Weir).

Apparatus for dispersing a substance in a liquid beverage


A method for fabricating a capacitor includes forming an isolation layer over a cell region and a peripheral region of a substrate. The isolation layer forms a plurality of open regions in the cell region. Storage nodes are formed on surfaces of the open regions. An upper portion of the isolation layer is etched to expose upper outer walls of the storage nodes. A sacrificial pattern is formed over the isolation layer to enclose the upper outer walls of the storage nodes. The isolation layer in the peripheral region is etched to expose side portions of the resulting structure obtained after forming the sacrificial pattern in the cell region. With the sacrificial pattern supporting the storage nodes, the isolation layer in the cell region is removed. The sacrificial pattern is then removed.

The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a cylinder type capacitor.
A memory cell size has continuously decreased as the design rule of dynamic random access memories (DRAM) also decreases. Accordingly, the height of a capacitor has continuously increased and the thickness has become smaller in order to maintain a desired charge capacitance. The height has increased and the thickness has decreased because the charge capacitance is proportionate to the surface area of an electrode and the dielectric constant of a dielectric layer, and is inversely proportionate to the distance between the electrodes, i.e., the thickness of the dielectric layer.
FIGS. 1A and 1B illustrate cross-sectional views of a conventional method for fabricating a capacitor. A line A-A′ represents a cross-sectional view of a substrate structure having a zigzag arrangement with a small spacing distance. A line B-B′ represents a cross-sectional view of the substrate structure having a zigzag arrangement with a large spacing distance.
Referring to FIG. 1A, an insulation layer 12 is formed over a semi-finished substrate 11. Stack structures, including storage node contact plugs 13 and barrier metals 14, are formed in the insulation layer 12. An etch stop layer and a sacrificial layer are formed over the insulation layer 12 including the stack structures. The sacrificial layer and the etch stop layer are etched to form a patterned sacrificial layer 16 and a patterned etch stop layer 15 thereby defining open regions. Cylinder type storage nodes 17 are then formed on the surface of the open regions. The open regions have a certain aspect ratio. The aspect ratio is a ratio of a bottom critical dimension 'W' to a height 'H' of the open regions.
Referring to FIG. 1B, a wet dip out process is performed to remove the patterned sacrificial layer 16. Thus, inner walls and outer walls of the cylinder type storage nodes 17 are exposed. However, as the design rule continuously decreases, a distance between cylinder type storage nodes has also decreased in the cylinder type capacitor formation process. Thus, generation of bridges between neighboring storage nodes is increased despite the optimization of the wet dip out process.
FIG. 1C illustrates a graph showing the probability of bridge generation according to different aspect ratios of storage nodes. For instance, when a ratio between the bottom critical dimension 'W' to the height 'H' of the storage nodes in FIG. 1A is larger than 12, the storage nodes may lean and cause neighboring storage nodes to stick together, thereby generating bridges.
FIG. 1D illustrates a micrographic view of storage nodes without bridge generation. FIG. 1E illustrates a micrographic view of storage nodes with bridge generation. In FIG. 1D, an aspect ratio is 12, and the storage nodes are arranged with a uniform spacing distance. In FIG. 1E, an aspect ratio is 17, and the storage nodes lean and stick together.
The value of the aspect ratio causing the leaning may be variable according to the property or thickness of the electrode and according to dry conditions of the sacrificial layer after performing a wet etching for forming the cylinders. The undesirable results shown in FIG. 1E generally occur when the aspect ratio is larger than 14 for a titanium nitride (TiN) electrode.
The leaning may be caused by the surface tension of water existing between the storage nodes during a dry process which is performed after the wet dip output process. As the DRAM becomes smaller, the height of the capacitor may need to be increased accordingly to maintain the surface area of the capacitor. However, the height of the capacitor generally needs to be decreased in order to keep the aspect ratio below a certain level and reduce the bottom critical dimension increase. Thus, it may be difficult to maintain a sufficient surface area. Accordingly, an effective thickness of the dielectric layer may need to be reduced in order to maintain a satisfactory capacitance because of an insufficient capacitor surface area.

Method for fabricating capacitor utilizes a sacrificial pattern enclosing the upper outer walls of the storage nodes


A negative-acting photoimageable composition comprises. A) between about 30 and about 90 wt % of a binder polymer which is soluble in an appropriate developer, PA1 B) between about 5 and about 30 wt % of an epoxy resin, PA1 C) between about 0 and about 30 wt % of a polyol cross-linking agent for the epoxy resin B), and PA1 D) between about 5 and about 15 wt % of a photosensitive composition of the formula: ##STR1## where the Zs are the samne or different and are selected from CX.sub.3, X, and H; the X's are the same or different halogens, and R is any chemical moiety consistant with the photoimageable composition as a whole.

Multilayer printed circuit boards have traditionally comprised a stack of individual printed circuit boards or innerlayers separated by dielectrical material. The circuitry of the several innerlayers is electrically connected by bored and plated through-holes. Multilayer printed circuit boards provide circuitry in a three-dimensional array and are therefor advantageously space-saving, relative to individual printed circuit boards, which provide at most two layers of circuitry on a two-sided board.
These printed circuit boards are commonly provided with internal ground and power planes. These internal planes are frequently solid sheets of copper interrupted only by clearance holes (the perforations required for electrically isolating the through-hole pattern of the printed circuit board). Ground and power planes provide power voltage and current and ground connections for the components of the multilayer printed circuit. A second function of the ground and power planes is to provide electromagnetic shielding for the multilayer printed circuit board and reduce the electromagnetic and radio frequency interference. Multiple ground and power planes and additional ground planes on the surface layers with the conductive pattern are common.
Multilayer circuits enable formation of multiple circuits in minimal volume. They typically comprise a stack of layers with layers of signal lines (conductors) separated from each other by dielectric layers having plated through-holes known as vias providing electrical interconnections between the layers.
Current processes for fabricating multilayer boards are extensions of methods used for fabricating double-sided boards. The method comprises fabricating of separate innerlayers having circuit patterns disposed over their surface. A photosensitive material is coated over the copper surfaces of a copper clad innerlayer material, imaged, developed, and etched to form a conductor pattern in the copper cladding protected by the photosensitive coating. After etching, the photosensitive coating is stripped from the copper, leaving the circuit pattern on the surface of the base material. Following formation of the innerlayers, a multilayer stack is formed by preparing a lay up of innerlayers, ground plane layers, power plane layers, etc., typically separated from each other by a dielectric prepeg (a layer consisting of glass cloth impregnated with partially cured material, typically a B-stage epoxy resin). The outer layers of the stack comprise copper-clad, glass-filled epoxy board material with the copper cladding comprising exterior surfaces of the stack. The stack is laminated to form a monolithic structure using heat and pressure to fully cure the B-stage resin.
Interconnections or through-holes, buried vias, and blind hole interconnections are used to connect circuit layers within a multilayer board. The buried vias are plated through-holes connecting two sides of an innerlayer. Blind vias typically pass through one surface of the stack and pass into and stop within the stack. Regardless of the form of interconnections, holes are generally drilled at appropriate locations through the stack, catalyzed by contact with a plating catalyst and metallized, typically with electroless copper that is overplated with electrolytic copper, to provide electrical contact between circuit innerlayers.
The uses, advantages and fabricating techniques for the manufacture of multilayer boards are described by Coombs, Printed Circuits Handbook, McGraw Hill Book Company, New York, 2nd edition, pp. 20-3 to 23-19, 1979, incorporated herein by reference.
Multilayer boards have become increasingly complex. For example, boards for main frame computers may have as many as 36 layers of circuitry, with the complete stack having a thickness of about 1/4 inch. These boards are typically designed with 4 mil wide signal lines and 12 mil diameter vias for interconnections between signal line layers. For increased densification, it is desired to reduce signal lines to a width of 2 mils or less and vias to a diameter of 2 to 5 mils or less.
The photoimageable dielectric coatings for printed circuit boards on the leading edge of the technology must be capable of being processed in a minimum number of steps. Their dielectric and photolithographic properties, flexibility, and intercoat adhesion also must be excellent. A low photospeed, high moisture resistance, and good adhesion to a plated metal are also important properties of such coatings.
This invention is directed to negative-acting photosensitive dielectric compositions. The processing of negative-acting photoresists generally follows the sequence of applying a solution of the resist to a copper foil laminated to an epoxy resin base, drying and baking the resist to expel the solvent, exposing the resist to actinic radiation through a patterned photomask to define an image, dissolving the non-exposed portions of the resist in a developer, such as an alkaline aqueous developer to delineate the irnage, rinsing, and in some instances post-baking the imaged resist. The areas void of resist are then either etched, plated with metal, or filled with a conducting polymer. As discussed above, the use of copper foil is eliminated by the method of this invention.
This invention's currently preferred embodiments are closely akin to the invention described in U.S. Ser. No. 08/801,682 filed 18 Feb. 1997. The invention described therein is directed to a positive-acting photoimageable composition which has a similar function to the photoimageable composition of the present invention. The positive-imaging composition in that application contains a hydroxy-functional novalac resin, a cross-linkable resin, such as an epoxy resin, a naphthoquinone diazide, and at least one thermally labile halogen-containing cure catalyst. The novalac resin is normally soluble in alkaline aqueous solution, such as a sodium hydroxide solution. However, the naphthoquinone diazide acts to inhibit the novalac resin from being dissolved until the naphthoquinone diazide is exposed to actinic radiation; whereupon, the naphthoquinone diazide undergoes a rearrangement such that it facilitates the dissolving of the novalac resin in alkaline aqueous solution. The cross-linkable resin, particularly as catalyzed by the cure catalyst, undergoes a post development cure that renders the layer hard and permanent.
While the above-identified application details advantage of positive-acting photoresists, there are also advantages to negative-acting resists. Negative-acting resists tend to have faster photospeeds. Also, in formulations of the type discussed in the above-identified application and in the instant application, there tends to be out-gassing in positive-acting resists, whereas negative-acting resists of the type described herein do not exhibit outgassing.
It is an object of this invention to provide a novel method for manufacturing multilayer printed circuit boards by the selective plating of the dielectric layers, eliminating the need for the standard copper foil inner layers.
It is another related object of this invention to provide a negative-acting, photoimageable dielectric composition whose post-develop image is highly stable, both chemically and thermally.
It is still another object of this invention to provide a multilayer printed circuit board having permanent innerlayers made of a negative-acting photoimaged dielectric composition.
It is yet another object of this invention to provide a method for making a multilayered printed circuit board by which the vias are photodefined.
These and other objects of the invention which will become apparent from the following description of the invention.


Vertical Hall device with highly conductive node for electrically connecting first and second Hall effect regions. A vertical Hall device comprises a first Hall effect region and a different second Hall effect region, both in a common semiconductor body. The first and second Hall effect regions have a main face and an opposite face, respectively. A highly conductive opposite face node is in ohmic contact to the opposite face of the first Hall effect region and the opposite face of the second Hall effect region in the semiconductor body. The vertical Hall device also comprises a first pair of contacts in or at the main face of the first Hall effect region and a second pair of contacts in or at the main face of the second Hall effect region. A convex circumscribing contour of the second pair of contacts is disjoint from a convex circumscribing contour of the first pair of contacts. Alternative embodiments comprise a pair of contacts and an opposite face node contact.

Hall devices are sensors that respond to a magnetic field. They typically suffer from offset error: the offset error is a non-vanishing output signal at zero applied magnetic field. Vertical Hall devices (VHall) mainly respond to a magnetic field parallel to the surface of the substrate.
A number of different designs of vertical Hall devices are known, yet many of them are not apt for the so-called spinning current method (or achieve only poor offset-cancelling performance) and suffer from low magnetic sensitivity and large electric fields. Typically, several contacts are placed on the surface of the substrate in such a way that current can flow in semicircles between two supply contacts while a sense contact is placed between these supply contacts and taps the Hall voltage that is generated by the current diving underneath the sense contact.
Depending on the electronic devices to be manufactured and/or the semiconductor manufacturing technology, a highly conductive, buried layer may be present within the semiconductor substrate. A buried layer is a heavily doped region of the opposite conductivity type as the substrate. The buried layer is placed beneath the active device regions by ion implantation. Both the doping and damage characteristics of the buried layer influence device performance. Buried layer substrates may be formed by, for example, high-energy implantation and rapid thermal annealing. When a buried layer is present within the semiconductor substrate, this typically limits the available depth of a Hall effect region of a vertical Hall device.

Vertical hall device with highly conductive opposite face node for electrically connecting first and second hall effect regions


Log likelihood ratios for data bits transmitted in a multi-dimensional signal are estimated using multiple Markov chain Monte Carlo simulations (MCMC). The MCMC simulations can include constraining symbols based on a most-likely symbol to improve the likelihood of finding distances for non-most-likely symbols. The log likelihood ratios can be calculated based on distances of the most-likely symbol and the non-most-likely symbols.

Wireless communications have become ubiquitous. Improving the performance and capacity of wireless communications systems is highly desirable.
Code division multiple access (CDMA) and multiple-input multiple-output (MIMO) communications techniques share a number of common aspects. In a CDMA system, a number of users transmit simultaneously, with each user being identified by a different spreading code. The spreading codes can be mutually orthogonal, although this is often not the case. For example, in an "overloaded" system, more users are supported than orthogonal codes are available, and thus some cross-correlation exists between users. In a MIMO system, on the other hand, a number of different sub-streams (e.g. a data stream that has been demultiplexed into parallel sub-streams) are transmitted through separate antennas. At the receiver, different sub-streams are differentiated through their signatures (e.g., differing channel gains between each transmit antenna and a set of received antennas). Generally, the different substreams are received with a high degree of cross-correlation at individual receive antennas. In either a CDMA system or a MIMO system, the different users/sub-streams are transmitted in the same frequency band. Hence, in general, system capacity can increase with increasing number of users/sub-streams. In practice, however, interference between users/sub-streams can occur, and as the number of users/sub-streams increases, the complexity of a receiver tends to grow exponentially. While theoretically-optimal solutions are known in some situations, practical implementation considerations have motivated a search for sub-optimal, yet efficient, detectors.

Estimation of log-likelihood using constrained markov-chain monte carlo simulation


Disclosed herein are synthetic microparticles substantially free of monovalent and divalent metal elements and a method of forming such synthetic microparticles. The synthetic microparticle may be suitable for use as a density modifying filler. The synthetic microsphere can be made from an agglomerate precursor that includes an aluminosilicate material, such as fly ash, a blowing agent such as sugar, carbon black, and silicon carbide, and a binding agent. The synthetic microsphere is produced when the precursor is fired at a pre-determined temperature profile so as to form either solid or hollow synthetic microspheres depending on the processing conditions and/or components used. The synthetic microparticle is capable of being formed into a large range of predetermined shapes.

Field
The present disclosure relates to synthetic microparticles and in particular to synthetic microparticles in the form of synthetic hollow microspheres.
Description of the Related Art
Any discussion of the prior art throughout the specification should in no way be considered as an admission that such prior art is widely known or forms part of the common general knowledge in the field.
Microparticles in the form of ash particles from the burning of coal in power station furnaces are known. The composition of the ash changes depending on the type of coal being burnt and the combustion efficiency within the furnaces. It is not uncommon for the ash to be contaminated with various levels of soot or unburnt carbonaceous material in periods of high power demand. In this instance a supplier is unable to exercise any direct control over the composition of the product produced.
When considering density modifying particles produced by burning coal in power station furnaces, for example, cenospheres, the yield is low and secondary processing is required to separate these particles from the predominant form of ash. Separation is usually done by flotation on lakes and skimming to harvest the desired form of ash. In many regions where this separation can be performed, harvesting of cenospheres is reduced to being a seasonal operation because the lakes freeze in winter. Furthermore harvested microparticle products contaminated by other undesirable combustion by-products may be unfit for use.
Thus, there is a need for microparticles with improved properties and a method to produce such microparticles.


This invention pertains to a method for collision avoidance in local Ethernet networks, such as a home automation network, having a personal computer and a plurality of control devices attached. In such a network, when a management message is broadcast from the host personal computer to all connected control devices, each one of such devices must reply with a response to the host computer. There is, however, a probability that responses might collide, leading to data loss. The present invention discloses a method to generate delayed responses to the sender from each control device, where an individual device's delay is computed in accordance to a unique value contained in its MAC address. The method will guarantee different delay times for all attached control devices, and hence a collision-free operation.

1. Field of Invention
This invention relates to collision avoidance in a communication layer two protocol, and more specifically, to a collision avoidance mechanism suitable to networking, low processing power devices, connected through an Ethernet hub.
2. Discussion of Prior Art
In modern systems it is very common to find a set of individual devices, each one with its own functions, capable of sharing information with each other through some kind of communication media. A clear example of such systems comes from a computer network. A local computer network is defined as a group of personal computers geographically located in a house or building. It is called Local Area Network (LAN) and comprises a group of personal computers sharing information, such as files, services, etc. The most cost-effective solution to such shared network is the utilization of only one physical media for all nodes present on the network. In this scheme, every device has the same right to use the unique channel to communicate with other device(s). A mechanism included in every device must be responsible for sharing the communication channel in an efficient manner.
The most popular type of computer network uses the Carrier Sense Multiple Access with Collision Detection (CSMA/CD) algorithm. A group of standards called 802, published by the IEEE, use this algorithm on different types of physical media.
The CSMA/CD algorithm senses first the communication media to determine if any other device is using it to transmit its information. If the channel is free, transmission starts but the channel is still sensed. If corrupt data is detected (sent information is different from actual channel content), transmission is aborted and each device involved in such collision backs off for a random time before sending the information again. Even when useful channel time is wasted on a collision, this mechanism has proved to satisfy the needs of a network that must be scalable to a great number of devices, in the order of hundreds of personal computers.
One of the most used CSMA/CD network is the 10BaseT Ethernet standard, which is very similar to the IEEE 802.3 standard. The Ethernet standard defines the type of physical media along with its electrical and timing characteristics. It works at 10 Mbps with Manchester bit encoding. It also defines the Media Access Control (MAC) with the CSMA/CD algorithm. When a device wants to transmit information to another device, the MAC layer of each device handles the recognition of the destination address in order to accept or refuse such packet. Such address is called MAC address, because it identifies the device accessing the communication channel. The MAC address is a 6-bytes unique identification number present on each device compatible with the Ethernet standard.
All devices connected to a 10BaseT Ethernet network use a twisted pair cable called UTP (Unshielded Twisted Pair) cable. A segment of UTP cable comes from each personal computer and is attached to a central device, which is responsible to connect all computers with each other. Initially, such device was called Ethernet hub. As said earlier, the hub takes any information coming from one of its connections and sends it to all other computers attached to it. It works as a repeater. Another device, called Ethernet switch, takes a step further and each connected computer is treated as an independent port, so information sent from one port to another doesn't have to be repeated to every other computer. It is directly sent from origin to destination port. Switches increase the performance, allowing a greater number of connected devices, but the cost is higher compared to a hub.
Due to its extended use, Ethernet LANs have not been limited to personal computers. Several devices used in industrial control and automation use this standard as the basis of communication network. It is also used in building and home automation, facilitating the merging of data computer networks and control networks. Having control devices attached to Ethernet networks makes it possible to perform remote configuration from a personal computer, reducing operational costs. It also allows the use of the personal computer as the monitoring station for the automation control network.
In order to make such control device interoperable with a personal computer, the communication protocol used by the computer must be present into the control device also. The most common protocol used by personal computers is the TCP/IP (Transfer Control Protocol/Internet Protocol). The IP protocol works at a lower level and is responsible for defining the logic address of each computer. That address is called the IP address, and each computer present on the same LAN must have different IP addresses. TCP protocol handles the integrity of the information and establishment of connections to transfer information between two devices present on the network in a reliable context. It is capable of fragmenting the information to make it more suitable for transmission over Ethernet networks. It also handles reordering of all pieces of incoming data and guarantees the correct arrival of all sent information. The TCP protocol is connection-oriented. A connection-oriented protocol has to ask for a connection to be opened. After the destination device accepts the connection petition, data transfer takes place, and finally the connection is closed by either of the two devices.
Another common protocol is the UDP/IP (User Datagram Protocol/Internet Protocol). Contrary to TCP, UDP protocol doesn't provide any reliability and it doesn't use any connection mechanism. It is called a message-oriented protocol, since each data packet goes from source to destination without any open-accept-transfer-close process.
As was stated before, the merging of a data network with a control network can be made only if both the personal computer and the control device handle the same communication protocol. In home automation specifically, low cost is one of the primary requirements for control devices. Such devices must be simple enough to keep cost down. That simplicity is achieved by using low processing power microcomputers, or most often, low processing power microcontrollers. This invention considers a low processing power microcontroller working at 8-bits, with 512 bytes (or less) of RAM registers and 8 k bytes (or less) of effective program memory. From this point and on the term microcontroller alone will be used as a reference to low processing power microcontrollers.
The TCP protocol is a very memory-demanding protocol, making difficult its implementation in a microcontroller. The UDP protocol instead requires much less memory resources, so its implementation in a microcontroller is easier.
Since home automation devices share the same Ethernet network with personal computers, they should behave as another connected computer in order to be recognized by them. The Dynamic Host Configuration Protocol (DHCP), defined on the public document RFC2131 and published by the Network Working Group, was created for a personal computer attached to a network to obtain automatically its IP address. Even when this protocol works with the UDP protocol, it requires sending and receiving UDP packets more than 100 bytes long. Some microcontrollers don't contain enough RAM registers to cover this requirement.
With such limitations, control devices can't be considered as personal computers also, even when they are attached to the same LAN.
Thus, there is the need for a specialized and simple mechanism with low memory and protocol requirements (UDP protocol, with data packets from 16 up to 64 bytes long), capable of handling network management functions, as IP address assignment, presence detection or any other function involving all connected control devices.
In accordance to these characteristics, a control network manager installed on a computer could use UDP broadcasting messaging to communicate with every control device. If a given broadcast message generates a response from each control device, a problem arises since all of them would try to respond at the same time. As was stated before, the Ethernet standard considers a back-off algorithm to handle network collisions, but in case of having 32 (which could be real numbers for a home automation systems) control devices, collisions would still occur on every retry, and the back-off algorithm would fail.
This multiple collision condition only occurs when Ethernet hubs are used, because they work as repeaters. Ethernet switches can handle such situation avoiding multiple collisions.
However, home automation is very likely to see hubs instead of switches, since their cost is considerably lower and the number of devices attached would rarely be more than 32 or 64. This invention to provides a simple mechanism to avoid multiple collisions occurring in an Ethernet network using hubs, in accordance to home automation control devices with limited processing power.

Collision avoidance method for home automation devices using an ethernet hub


A plasma display panel includes first and second substrates having a predetermined gap therebetween. Barriers are disposed between the first and second substrates to partition discharge cells and fluorescent layers are formed in the discharge cells. Address electrodes corresponding to the discharge cells extend in a first direction, and pairs of first and second electrodes extend in a second direction to cross the first direction. The address electrodes are on one of the substrates to correspond to the discharge cells. A dielectric layer covers the first and second electrodes, wherein the dielectric layer is colored with a first color, the barriers are colored with a second color having a subtractive mixture relation with the first color, and wherein the fluorescent layers include first fluorescent layers on the barriers and the discharge cells, and second fluorescent layers on the first fluorescent layers in the second color.

1. Field of the Invention
The present invention relates to a plasma display panel and, more particularly, to a plasma display panel capable of minimizing luminance deterioration even when employing a colored fluorescent layer and improving a bright room contrast ratio.
2. Description of the Related Art
In general, a plasma display panel is a display device that may use vacuum ultra-violet (VUV) rays emitted from plasma obtained through gas discharge so as to excite a fluorescent material. The excited fluorescent material may generate visible light of red (R), green (G), and blue (B), so that an image may be displayed.
For example, an alternating current (AC) type plasma display panel may have a structure in which address electrodes may be formed on a rear substrate and covered with a dielectric layer. Barriers may be disposed between the address electrodes on the dielectric layer in a stripe pattern. Fluorescent layers of red (R), green (G), and blue (B) may be formed at the barriers. On a front substrate facing a rear substrate, display electrodes, e.g., pairs of sustain electrodes and scan electrodes, may be formed along a direction that crosses the address electrodes. The display electrodes may be covered with a dielectric layer and an MgO protective layer. A discharge cell may be formed at a position where the address electrode on the rear substrate crosses the pair of the display electrodes on the front substrate. Millions or more unit discharge cells may be arrayed in a matrix pattern inside the plasma display panel.
In order to operate the discharge cells of the plasma display panel, memory characteristics may be used. More specifically, in order to generate discharge between the pairs of sustain and scan electrodes which may be included in the display electrode, a potential difference greater than a predetermined voltage may be required. The boundary of the voltage may be called a firing voltage Vf. When a scan voltage and an address voltage Va are applied to the scan electrode and the address electrode, respectively, discharge may occur, and plasma may be formed in the discharge cell. Electrons and ions of the plasma move toward electrodes having opposite polarities from each other.
Each electrode of the plasma display panel may be coated with a dielectric layer, so that most of the moved space charge may be accumulated on the dielectric layer having an opposite polarity. Accordingly, net space charge between the scan and the address electrodes may become lower than an address voltage Va that is applied in advance, so that discharge may be decreased, and address discharge may be terminated. In this case, a relatively small amount of electrons may be accumulated on the sustain electrode, and a relatively large amount of ions may be accumulated on the scan electrode. Charge accumulated on the dielectric layer covering the sustain and scan electrodes may be called a wall charge Qw, and space charge formed between the sustain and scan electrodes by the wall charge Qw may be called a wall voltage Vw.
In a case where a discharge sustain voltage Vs may be applied to the sustain and scan electrodes, when a value Vs+Vw of adding the discharge sustain voltage Vs and the wall voltage Vw is larger than the firing voltage Vf, sustain discharge may occur in the discharge cell. VUV generated at this time may excite a corresponding fluorescent material so as to emit visible light through the transparent front substrate.
However, when an address discharge between the scan and address electrodes does not exist, e.g., when the address voltage Va is not applied, the wall charge may not be accumulated between the sustain and scan electrodes, and as a result, the wall voltage between the sustain and scan electrodes may not exist. In this case, only the discharge sustain voltage Vs applied to the sustain and scan electrodes may be formed in the discharge cell. In addition, since the discharge sustain voltage Vs may be lower than the firing voltage Vf, gas space between the sustain and scan electrodes may not be discharged.
There have been various attempts to improve the bright room contrast ratio by increasing a black area ratio that may be a ratio of a black color in the plasma display panel operated as described above, i.e., a method of using a complementary color relation has been developed.
In the plasma display panel using the complementary color relation, the dielectric layer of the front substrate may be colored with a shade of blue, and the barriers of the rear substrate may be colored with a shade of red in order to improve the bright room contrast ratio.
In addition, in the plasma display panel using the complementary color relation, the fluorescent layers on the rear substrate may be colored with a shade of red similar to the barriers in order to further improve the bright room contrast ratio.
However, although the plasma panel display improves the bright room contrast ratio by coloring the fluorescent layers with the shade of red, a large amount of visible light generated in the discharge cell may be absorbed by the fluorescent layers colored with the shade of red, so that luminance may be decreased.


An electronic device includes: a housing; a sensor provided on an inner surface of the housing and configured to detect deformation of the housing; and a control unit configured to control an operation of the electronic device on the basis of a detection result of the sensor. The sensor has a first sensing unit configured to detect a prescribed user operation and a second sensing unit configured to compensate for a malfunction.

In recent years, electronic devices that can detect pressing on a surface of a housing have been proposed. For example, as one of such electronic devices, Patent Document 1 proposes one including a sheet-shaped pressure-sensitive sensor on an inner surface of a housing. As the pressure-sensitive sensor, there is used one provided with a conductive layer, a sensor layer including a plurality of sensor units, and a space layer provided between the conductive layer and the sensor layer.


A device for preventing damage to a pivot bearing assembly during manufacture of a hard disk drive includes a first bottom voice coil motor (VCM) plate hold-down clamp configured to clamp down on a first exposed surface of a bottom VCM plate of the hard disk drive and a second bottom VCM plate hold-down clamp configured to clamp down on a second exposed surface of the bottom VCM plate. The first and second bottom VCM plate hold-down clamps are configured to prevent damage to the pivot bearing assembly during installation of the top VCM plate over the bottom VCM plate by clamping down on the bottom VCM plate with a force that is at least sufficient to prevent the bottom VCM plate from moving when the top VCM plate is installed over the bottom VCM plate.

The Head-Disk Assembly (HDA) of a disk drive is typically assembled in a clean room environment. To ensure that the head-disk interface remain unencumbered and damage free, it is necessary to reduce the vibrations and drive noise generated by the pivot bearing cartridge of the Head Stack Assembly (HSA). Even low-level friction and noise generated by the pivot bearing may cause damage to the surface of a disk and/or to the read/write head(s), and result in the catastrophic failure of the disk drive. One of the primary causes of pivot bearing friction/noise is pivot bearing damage resulting from unwanted interference with other drive components during the drive assembly process. One source of such interference can be traced to the assembly process, particularly during assembly of the constituent components of the Voice Coil Motor (VCM).
In a modern hard disk drive, and with reference to FIGS. 2, 3 and 4, the HSA 40 is pivotally secured to the base of the drive via a pivot-bearing cartridge 42 so that the read/write transducer(s) 44 at the distal end of the suspension assembly(ies) may be moved over the recording surface(s) of the disk(s) 46. The pivot-bearing cartridge 42 enables the HSA 40 to pivot, and includes a bearing cartridge and a pivot shaft that defines an axis 48 about which the actuator rotates when power is applied to the VCM. The "rotary" or "swing-type" actuator assembly rotates on the pivot bearing cartridge 42 between limited positions, and the coil assembly 52 that extends from one side of the body portion 50 of the actuator body of the HSA 40 is disposed between and interacts with a first permanent magnet 54 mounted to a bottom VCM plate 56 and a second permanent magnet 58 mounted to a top VCM plate 60 to form the VCM formed by the bottom VCM plate 56, the first permanent magnet 54, the coil assembly 52, the second permanent magnet 58 and the top VCM plate 60. In operation, when a driving voltage is applied to the VCM, torque is developed that causes the HSA 40 to pivot about the actuator pivot axis 48 and causes the read/write transducer(s) 44 to sweep radially over the disk(s) 46. Most modern drives use a feedback mechanism so that small changes in applied voltage are operative to position the read/write transducer(s) 44 precisely over the disk(s) 46.
During installation of the VCM, the bottom VCM plate 56 is disposed within the base of the HDA. The HSA is then pivotally fitted onto the base, such that the coil assembly 52 thereof is disposed at least partially over the bottom VCM plate 56. Thereafter, the top VCM plate 60 is lowered over the bottom VCM plate 56, thereby sandwiching the coil assembly 52 between the bottom and top VCM plates 56, 60. During that process, because of the strong permanent magnets 54, 58, a strong magnetic field is established between the first and second permanent magnets, the bottom VCM plate 56 (and its attached magnet 54) has tendency to be attracted towards the top VCM plate 60 as the top VCM plate 60 is lowered down towards the HDA to complete the VCM. As the bottom VCM plate 56 tilts upwards towards the top VCM plate 60, the bottom VCM plate 56's upper surface makes contact with the lower surface of the coil assembly 52 which, in turn, pushes and applies a moment to the actuator body 50, tilting the coil assembly 52 up and the read/write transducers(s) 44 down. This applied moment creates stress on the pivot bearing cartridge (i.e., between the pivot bearings and the pivot shaft), leading to damage of the pivot bearings. The extent of bearing damage is determined by measuring the pivot friction torque. This damage, as alluded to above, may cause unwanted vibration and noise and may even lead to drive failure.
The needs for ever-increasing performance improvement and data storage capacity have been met through increasing the track density and the number of disks in the disk pack and reducing the disk thickness and the spacing between the disks. The increasing number of disks in the disk pack, in particular, has engendered a corresponding increase in the number of actuator arms (four such actuator arms being shown in FIG. 4) on the head stack assembly 40. Moving a more massive HSA 40 while achieving short access times, in turn, requires a stronger magnetic force within the VCM to move the head stack across the disk(s) and to move the heads to and from the ramp load/unload positions within the disk drive assembly. Therefore, there is a need for tools and methods of ever increasing sophistication to overcome the pivot friction damage induced during installation of the top VCM plate 60. Indeed, there is a need to reduce pivot bearing damage caused during installation of the top VCM plate 60 while allowing high performance and high capacity product designs with strong magnetic attraction between the bottom VCM plate 56 and the top VCM plate 60.
FIG. 1 shows a conventional hard disk drive assembly nest 10, used during the manufacture of hard disk drives. Conventionally, the top VCM plate 60 is installed using a conventional top VCM plate gripper assembly 12 mounted on a pneumatic gantry that picks and places the top VCM plate 60 plate into the head disk assembly. Conventionally, the mechanism for holding down the bottom VCM plate 56 is integrated into this top VCM plate gripper assembly 12, as shown in FIG. 5. With reference now to FIGS. 5, 6 and 7, this conventional hold-down mechanism integrated into the top VCM gripper assembly 12 includes hold-down plunger pins 14. The hold-down plunger pins 14 are conventionally spring-loaded by springs within spring cylinders 15. Strong spring forces on the plunger pins 14 are necessary to hold down the bottom VCM plate 56 that has high magnetic attraction towards the top VCM plate 60 during the installation process. The force exerted on the bottom VCM plate 56 by the magnet attached to the top VCM plate 60 is so strong that the long and weak plunger pins 14 frequently break under the strain. In addition, a spring fatigue phenomenon (loss of resiliency of the springs within the spring cylinders 15) renders this conventional spring-loaded plunger pin design inconsistent and ineffective in effectively and consistently holding down the bottom VCM plate 56. In turn, as alluded to above, when the force exerted on the bottom VCM plate 56 exceeds the force applied thereto by the plunger pins 14 of the top VCM plate gripper assembly 12 and causes it to lift from the base, the bottom VCM plate 56 contacts and transfers a moment to the coil assembly 52, thereby tilting the pivot bearing cartridge 42 away from its axis 48 and causing irremediable damage to the constituent bearings thereof and thus to the drive itself. Because of this damage, drive performance and assembly yield suffer. Therefore, the conventional design is not sustainable and has proven to be ineffective in high volume production.
What are needed, therefore, are devices and methods for manufacturing disk drives that do not suffer from the above-described disadvantages.

BVCM hold down apparatus to prevent pivot bearing damage at TVCM installation in disk drive assembly


A voltage converter for supporting a suspension-to-RAM (STR) mode of power management. The voltage converter has a flip-flop, a resume and initialization logic circuit for producing a resume signal, a STR logic circuit for producing a STR signal, a first voltage-conversion unit and a second voltage-conversion unit. An output terminal of the resume and initialization logic circuit is connected to a first input terminal of the flip-flop. An output terminal of the STR logic circuit is connected to a second input terminal of the flip-flop. An output terminal of the flip-flop is connected to the first voltage-conversion unit, and a complementary output terminal of the flip-flop is connected to the second voltage-conversion unit. A suspension voltage or a power voltage is applied to the voltage pin of a system memory depending on the mode of power management.

This application claims the priority benefit of Taiwan application serial no. 88109771, filed Jun. 11, 1999.
1. Field of Invention
The present invention relates to a voltage converter. More particularly, the present invention relates to a voltage converter for a suspension-to-RAM (STR) mode of power management in a computer system.
2. Description of Related Art
Ever since the ATX specification for a personal computer was introduced by Intel Corporation of America, power supply has no longer been a passively switched power provider for a computer system. Thereafter, Intel, Microsoft and Toshiba together introduced the advanced configuration and power interface (ACPI) specification that provides four idle states representing the level of tasks for a computer system. Depending on the amount of tasks for a computer system, energy can be saved by suspending power from some of the devices. In the ACPI specification, according to the amount of tasks from small to large, the suspension idle modes provide 4 states: S1/S2 states, power-on suspend; S3 state, suspending to RAM (STR); S4 state, suspending to disk; and, S5 state , mechanical off. When it is suspended to RAM, all other clock pulses except the real-time clock on the main circuit board are stopped temporarily. Under such circumstances, the CPU and other electric circuit will stop working due to the absence of electrical power.
An apparatus for efficiently providing appropriate level of voltage to the system memory of a computer when the computer enters/recoveries to/from STR mode is currently being actively research.
Accordingly, the object of the present invention is to provide a voltage converter for a suspension-to-RAM (STR) mode of power management in a computer system. The voltage converter is capable of supplying a correct voltage to a system memory according to the mode of power management.
A second object of the invention is to provide a voltage converter for the STR mode of power management. The voltage converter is capable of changing the voltage applied to the system memory according to whether the computer system is in the STR mode or the normal mode.
A third object of the invention is to provide a voltage converter for the STR mode of power management. The voltage converter is integrated within a single chip such that the converter is able to transmit data to or from a control chipset via a bus.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a voltage converter. The voltage converter comprises a flip-flop, a resume and initialization logic circuit for producing a resume signal, a STR logic circuit for producing a STR signal, a first voltage-conversion unit and a second voltage-conversion unit. An output terminal of the resume and initialization logic circuit is connected to a first input terminal of the flip-flop. An output terminal of the STR logic circuit is connected to a second input terminal of the flip-flop. An output terminal of the flip-flop is connected to the first voltage-conversion unit. When the resume signal is at a low level and the STR signal is at a high level, the system memory voltage VDIMM is changed to a suspension voltage VSUS. A complementary output terminal of the flip-flop is connected to the second voltage-conversion unit. When the resume signal is at a high level and the STR signal is at a low level, the system memory voltage VDIMM reverts to a power voltage VCC.
The invention also provides a voltage converter control chip capable of implementing a STR mode of power management in a computer system. The voltage converter control chip comprises a bus interface, a controller, a logic control circuit, a first voltage-conversion unit and a second voltage-conversion unit. The bus interface is connected to the control chipset through a bus. The controller has a first and a second output terminal. The controller is connected to the bus interface. The logic control circuit has a first and a second output terminal. The logic control circuit is used as a logic circuit for switching into or out of a STR mode of power management. The first voltage-conversion unit is connected to the logic control circuit and a first output terminal of the controller via a first logic gate. An input terminal of the first voltage-conversion unit is connected to a suspension voltage VSUS. An output terminal of the first voltage-conversion unit is connected to a voltage pin VDIMM of the system memory. Similarly, the second voltage-conversion unit is connected to the logic control circuit and a second output terminal of the controller via a second logic gate. An input terminal of the second voltage-conversion unit is connected to a power voltage VCC. An output terminal of the second voltage-conversion unit is connected to the voltage pin VDIMM of the system memory. To switch the computer system into the STR mode of power management, the first voltage-conversion unit is turned on while the second voltage-conversion unit is turn off according to the output control signals of the logic control circuit. Hence, the suspension voltage VSUS is output to the system memory pin VDIMM, and the STR mode of power management is activated. To switch the computer system back from the STR mode of power management, the first voltage-conversion unit is turned off while the second voltage-conversion unit is turned on according to the output control signals of the logic control circuit. Hence, the source voltage VCC is output to the system memory pin VDIMM, and the computer is resumed to power-on state.
The first voltage-conversion unit can be implemented using a P-channel metal-oxide-semiconductor field effect transistor (PMOSFET). The source of the PMOSFET is connected to a suspension voltage VSUS and the drain is connected to the voltage pin VDIMM of the system memory. The second voltage-conversion unit can be implemented using an N-channel metal-oxide-semiconductor field effect transistor (NMOSFET). The source of the NMOSFET is connected to a source voltage VCC and the drain is connected to the voltage pin VDIMM of the system memory.
In short, the voltage converter or the voltage converter control chip that supports the STR mode of power management in a computer comprises simple logic circuits and MOSFET transistors. It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

Voltage converter for applying suspension voltage to a RAM when resume signal is low while suspension-to-RAM signal is high, and applying source voltage in a reverse condition


A double temperature sensor with a receiving element for measuring a near-surface temperature of the ambient air and the skin surface. The double temperature sensor with a receiving element includes an insulating block, two temperature sensors and a receiving element. At least the receiving element (8) and/or the insulating block (4) are designed in terms of the material structure such that the horizontal heat conduction is low compared to the vertical heat conduction.

Double temperature sensors are used to detect a first skin surface temperature of a living being and a second temperature of an environment. Two temperature measuring sensors in a closed sensor housing are located at spaced locations from one another in a heat-insulated manner in DE 10038247 C2. Using heat balance equations, the temperature near the body of a living being is determined from the two temperature values of the two temperature sensors. The double temperature sensors of this type are used, for example, in the control of a thermotherapy device for newborns and in the detection and monitoring of the body temperature in respirator products. The double temperature sensor is arranged on the skin of a living being, for example, on the head of a fireman or on the abdomen of a newborn by means of adhesive strips adhering on one side, the double temperature sensor being placed centrally under the adhesive strip and the adhesive surfaces being connected to be skin adhesively all around the double temperature sensor. In addition to the adhesive layer, an air-permeable textile layer is arranged in the adhesive strip in many cases.
The drawback of such an adhesive connection is that central placement of the double temperature sensor is not ensured with certainty in all cases, on the one hand, and heat is additionally removed laterally by the adhesive strip, on the other hand. The lateral removal of heat affects the boundary conditions for the use of the heat balance equations. A process for compensating the lateral heat fluxes by calculation is known from U.S. Pat. No. 7,299,090.
However, the use of compensation by calculation presupposes limited and known boundary conditions, for example, knowledge of the ambient temperature range, which is not given in all cases of application.

Double temperature sensor with a receiving element


Methods of forming a contact structure, contact structures and apparatuses applied thereto are disclosed. The method of forming a contact structure forms a dielectric layer on a substrate. A metal contact with metal oxide thereon is formed in the dielectric layer. The solubility of the metal oxide is enhanced by using H2O with a temperature higher than about 10° C. or a chemical with a temperature higher than about 15° C.

1. Field of the Invention
The present invention relates to the fabrication of integrated circuit devices on semiconductor substrates and, more particularly relates to methods of forming a contact structure, contact structures and apparatuses for forming the contact structures.
2. Description of the Related Art
The Complementary Metal Oxide Semiconductor (CMOS) technology has been recognized as the leading technology for use in digital electronics in general and for use in many computer products in particular. The miniaturization of CMOS technology according to a scaling rule is used in a semiconductor device to achieve large-scale integration and high-speed operation. For the miniaturization of CMOS devices, metal contacts have been widely applied in this industry.
FIG. 1 is a schematic cross sectional drawing showing a contact structure. The contact structure comprises a substrate 100, a dielectric layer 110, a metal contact 120 and a metal oxide 120a. The dielectric layer 110 is on the substrate 100. The metal contact 120 is formed in the dielectric layer 110. The metal oxide 120a is on the metal contact 120.
The method for forming the contact structure comprises providing a contact hole (not shown) in the dielectric layer 110. A metal layer (not shown) is filled in the contact hole and over the substrate 100. A chemical-mechanical polishing (CMP) process is then applied to the remove the metal layer which is above the surface of the dielectric layer 110 so as to form the metal contact 120. After the CMP process is performed, chemicals of the slurry used therein react with the metal contact 120. As a result, the metal oxide 120a is formed on the metal contact 120. Due to the high resistance of the metal oxide 120a, the resistance of the contact structure increases and may cause the failure of the circuit. Cleaning methods with chemical such as water or ammonia have been applied to the post-CMP contact structure in order to remove the metal oxide 120a.
U.S. Patent Application Publication No. 2002/0052115 A1 discloses a method of eliminating agglomerate particles in a polishing slurry. The method comprises conveying the waste slurry to the drain, wherein the waste slurry may form an agglomerate having an agglomerate particle size. The method further comprises subjecting the waste slurry to energy emanating from an energy source. The energy source thereby transfers energy to the waste slurry to substantially reduce the agglomerate particle size. By substantially reduced, it is meant that the agglomerate is size is reduced such that the waste slurry is free to flow through the drain.
U.S. Pat. No. 5,906,949 discloses a CMP process. The process is performed using a slurry containing abrasive particles mainly made of sialon or boehmite. This process is advantageous in improvement of a polishing rate without degradation in planarity of the processed surface and in level of metal impurities.
None of these applications address the problem described above.

Methods and forming structures, structures and apparatuses for forming structures

Taiwan Semiconductor Manufacturing Co. Ltd.


Conventional etalon based spectrometers have either a limited range of evaluation wavelengths or require continuous scanning of the etalon. Conventional etalon based spectrometers also have limited contrast between the peak transmission of a frequency on resonance and the minimum transmission of a frequency off resonance. An improved optical spectrometer includes a cylindrical lens configured to converge the input beam of light in only one direction, whereby the input beam of light is focused along a focal line. Accordingly, a first etalon receives the input beam of light, and transmits a series of sub-beams, each sub-beam transmitted at a different angle from the normal, and each sub-beam including multiple frequencies based on the FSR, whereby a secondary dispersive element receives each sub-beam, and disperses each sub-beam into individual frequencies. Ideally, a second etalon receives and transmits the sub-beams with increased contrast, and a second thickness of the second etalon is substantially identical to the first thickness of the first etalon.

Conventional Fabry-Perot etalons (etalon) are utilized as optical filters, which receive an incident light beam including constituent frequencies, and transmit evenly spaced light frequencies as a function of the thickness of the etalon, i.e. distance between parallel reflective surfaces, and the angle of incidence. However, if the incident light beam is incident over a range of angles, e.g. if the incoming light is converging or diverging, then the full spectrum of the incident light beam may be transmitted with each frequency at a different output angle, i.e. from the etalon's normal, since each angle corresponds to a different distance across the etalon and a different thickness. Moreover, each angle will potentially represent multiple constituent wavelengths separated by the corresponding free spectral range (FSR) of the etalon at that angle.
Unfortunately, most etalon based spectrometers have either a limited range of evaluation wavelengths, or require continuous scanning of the etalon, either by varying the separation between reflective surfaces or by varying the tilt of the etalon relative to the incident light beam. Another common limitation of etalon based spectrometers is limited contrast between the peak transmission of a frequency on resonance and the minimum transmission of a frequency off resonance.
One approach to increasing the etalon contrast is to pass the incident light beam through a series of etalons with substantially different thicknesses. Fine tuning of the transmission of each etalon can be achieved by various tuning means, e.g. temperature, angle of incidence or pressure tuning in the case of an air spaced etalon. Unfortunately, this approach can only yield very high contrast for a series of discrete frequencies of light. To view a continuous spectrum with multiple etalons, the etalons must all be tuned simultaneously, so that the each wavelength of interest is transmitted through all of the etalons as the etalons are tuned. Tuning can be through some combination of pressure tuning, piezo scanning angle tuning or temperature tuning. Additionally, the light incident on a series of etalons in this configuration must be substantially collimated.
Another version of an etalon based spectrometer is too illuminate an etalon with nominally collimated light. Multiple frequencies of light are transmitted at each incident angle, spaced according to the free spectral range of the etalon and the incident angle. In order to separate the multiple wavelengths at each angle, the etalon filtered light must be transmitted through a slit, after which the different orders from the etalon may be split into bands by a secondary dispersive element. FIG. 1 illustrates a plot of transmission vs angle for two substantially different etalon thickness, e.g. 2.0 mm thick and 2.1 mm thick, illustrating an overlap, i.e. resultant transmission, of only a single frequency.
An object of the present invention is to overcome the shortcomings of the prior art by providing a spectrometer with high resolution, broad wavelength coverage, no scanning required and high speed acquisition of complete spectra.


A plasma display panel has heights of barrier ribs prevented from abnormally increasing at positions where a phosphor dispensing process starts and ends, improving discharge performance and uniformity of a panel. A front substrate and a rear substrate face each other. Address electrodes and display electrodes extend separately from each other in a first direction and a second direction, respectively, in a space between the front substrate and the rear substrate, the first direction crossing the second direction. Barrier ribs partition a display area including a plurality of discharge cells in the space between the front substrate and the rear substrate. A non-display area is formed along a periphery of the display area. A phosphor layer is formed in each discharge cell. The non-display area includes a buffer area formed of at least a single region outside the display area.

1. Field of the Invention
The present invention relates to a plasma display panel (PDP), and more particularly, to a PDP that prevents heights of barrier ribs from abnormally increasing at positions where a phosphor dispensing process starts and ends so as to improve discharge performance and uniformity of a panel.
2. Description of the Related Art
In general, a PDP forms images by using visible ray emitted from phosphors excited due to plasma discharge. In the PDP, a predetermined voltage is applied to electrodes provided in a discharge space, so that plasma discharge occurs between the electrodes. Phosphor layers having predetermined patterns are excited due to vacuum ultraviolet (VUV) rays generated during the plasma discharge. The PDP forms images by using the visible ray generated when the phosphor layers are stabilized.
The PDP includes a rear substrate, a plurality of address electrodes formed on the rear substrate, a dielectric layer covering the address electrodes, a plurality of barrier ribs that are formed on the dielectric layer so as to keep a discharging gap and prevent cross talk generated between discharge cells, and a phosphor layer formed on the surfaces of the barrier ribs.
Further, the PDP includes a front substrate, discharging electrodes formed on the front substrate, a dielectric layer covering the discharging electrodes, and a protective layer covering the dielectric layer. The discharging electrodes are separated from the address electrodes with a predetermined gap and have a direction which is substantially perpendicular to the direction of the address electrodes.
The front substrate and the rear substrate are sealed to each other, and inert gas such as neon (Ne) and xenon (Xe) is filled in the discharge cell. The inert gas generates the VUV rays during the plasma discharge.
The barrier ribs are formed on the rear substrate and the phosphor layer is then formed using, for example, a method of discharging a phosphor paste through a plurality of nozzles provided in a dispenser.
In the dispensing process, the phosphor paste injected from the nozzles is discharged onto dummy barrier ribs in a dummy area at positions where the dispensing process starts and ends. For this reason, the heights of the dummy barrier ribs become abnormally increased.
As the heights of the dummy barrier ribs abnormally increase at both edges, uniformity of a panel is lessened over the entire PDP in which the rear substrate and the front substrate are sealed to each other.
In addition, since the gap between the rear substrate and the front substrate is increased, cross talk occurs in the discharge cells of the display area that is adjacent to the positions where the dispensing process starts and ends and discharge performance deteriorates.

Plasma display panel having buffer areas along the periphery of display area


A laminate packaging flat cell comprises a laminate film formed by combining polymer and metal with each other; a power generating element formed of a plurality of electrode plates and separators, and hermetically sealed by the laminate film; and an electrode terminal lead coupled to the electrode plate. In the laminate packaging flat cell of the present invention, the power generating element is hermetically sealed by forming a thermally welded portion on an outer periphery of the laminate film, and the electrode terminal lead protrudes from the thermally welded portion, and a through-hole is provided in a position thereof contacting the thermally welded portion.

1. Field of the Invention
The present invention relates to a laminate packaging flat cell enhancing the stability of a thermally welded portion. More specifically, the present invention relates to a laminate packaging flat cell ensuring the stability of an electrode terminal lead and a laminate film in the thermally welded portion by providing a through-hole in the electrode terminal lead of the thermally welded portion, and further relates to a battery module and an assembled battery which are formed of the cells.
2. Description of the Related Art
Recently, air pollution caused by exhaust gas from vehicles has become a global problem. In such a context, electric vehicles, which use electric power as a motive power source, and hybrid cars, which are run by a combination of an engine and a motor, have been attracting attention. Correspondingly, the development of a cell having a high energy density and a high output density to be mounted on these hybrid cars has an important place industrially. As a configuration of a cell for such use, there is a configuration in which a wound electric power generating element is housed within a cylindrical case. In another configuration, a wound electric power generating element or an electric power generating element, which stacks planar electrodes and a separator, is housed within a flat case.
Since these cylindrical or flat cases are required to have enhanced strength, it is necessary to form these cases as metal cans. Therefore, there is a problem in that the reduction of weight is difficult. Thus, as a means of reducing the weight of the cell as well as obtaining a higher energy density and a higher output density, the prior art as described in Japanese Patent Application Laid-Open No. 11-224652 (1999) is cited. In this conventional technology, a structure of the cell using a laminate film as an outer case, a periphery of which is sealed by thermal welding to close the outer case hermetically, has been proposed.
In the cell as described above, which uses the laminate film as the outer case, the sealing capability thereof is sometimes damaged due to a deformation caused by an external force and an increase of an internal pressure caused by a temperature rise of the cell. Particularly, when the cell is mounted on the electric vehicle or the hybrid car, the cell temperature sometimes rises to approximately 60° C. In this case, a large current flows through an electric terminal lead during charge/discharge, and therefore, the temperature of the electrode terminal lead sometimes becomes higher than the cell temperature by approximately 30° C. Hence, the temperature of the electrode terminal lead sometimes reaches a softening point (approximately 90° C.) of resin in the laminate film. In such a situation, the sealing capability of a region where the resin in the laminate film and the electrode terminal lead contact each other is damaged in some cases due to the increase of the cell's internal pressure caused by the rise of the internal temperature thereof. Therefore, in the cell as described above, which uses the laminate film as the outer case, ensuring a sealing capability equivalent to a metal case or more has become an important subject. Accordingly, as a technology of coping with such a request, an attempt has been made, which is to enhance the sealing capability by providing a coating layer formed of olefin resin containing a titanate coupling agent in a position corresponding to the thermally welded portion of the electrode terminal lead. In this case, the olefin resin is also used for an adhesive layer and the innermost layer of the laminate film (refer to Japanese Patent Application Laid-Open No. 2000-133218).


Disclosed is a method and corresponding apparatus to make use of hybrid-ARQ repetition factors as a way to differentiate service quality to various mobile terminals. Depending on a mobile terminal's subscription service class, such as the mobile terminal's PLMN, the mobile terminal may be made to use a particular hybrid-ARQ repetition factor. For instance, a mobile terminal of a high service class may be made to use a low hybrid-ARQ repetition factor, which may help the mobile terminal experience less downlink transmission delay and thus a higher downlink data rate. Whereas, a mobile terminal of a low service class may be made to use a high hybrid-ARQ repetition factor, which may cause the mobile terminal to experience more downlink transmission delay and thus a lower downlink data rate, and may further free up downlink transmission resources to facilitate better service for other mobile terminals.

Unless otherwise indicated herein, the description in this section is not prior art to the claims and is not admitted to be prior art by inclusion in this section.
In a typical cellular wireless communication system, the air interface between a base station and served mobile terminals may define a downlink (or "forward link") for carrying communications from the base station to the mobile terminals and an uplink (or "reverse link") for carrying communications from the mobile terminals to the base station. In various implementations, these links may be defined on or more carrier frequencies or blocks of frequencies. Furthermore, on each link, various channels may be defined through techniques such as time division multiplexing, code division multiplexing, and/or frequency division multiplexing.
In one implementation, the downlink may be divided over time into a continuum of timeslots (i.e., "transmission time intervals" (TTIs)), and the base station or associated equipment may be arranged to transmit data, such as bearer traffic (e.g., user data) and control signaling (e.g., paging and other overhead messages), to mobile terminals in those timeslots. In such an implementation, the base station or associated equipment may dynamically schedule transmission of data in particular timeslots and may then transmit the data according to that schedule.
To help overcome errors that may arise in wireless data transmission, the base station and served mobile terminals may also be arranged to apply a hybrid automatic repeat request (hybrid-ARQ or HARQ) process. In such a process, when the base station is going to transmit a data packet to a mobile terminal, the base station may repeatedly attempt transmission of the packet to the mobile terminal in sequential (e.g., interlaced) timeslots, until the mobile terminal confirms that it successfully received the packet or until the base station completes a maximum number of attempts without receiving such confirmation.
In practice, for instance, the base station may add more error correction with each subsequent attempt and/or may transmit various portions of the packet with various error correction coding in each subsequent attempt, in an effort to have the mobile terminal ultimately receive enough data to constitute or facilitate uncovering the packet as a whole. For example, if the packet payload comprises the elements ABCD, the base station may transmit in a first timeslot the full payload ABCD plus some error correction coding. If that transmission is insufficient to allow the mobile terminal to uncover the payload (e.g., due to errors in the transmission process), the base station may then transmit in a next timeslot a portion of the payload, such as ABC, plus some additional error correction coding. And if that transmission is still insufficient, the base station may then transmit in a next timeslot another portion of the payload, such as BDC, plus more substantial error correction coding. This process may continue until the packet transmission is deemed successful or until a predefined threshold number of timeslots is exhausted (in which case the transmission would have failed).
During this packet transmission process, the mobile terminal may transmit a hybrid-ARQ message to the base station in response to each transmission attempt from the base station. In particular, for each transmission attempt that does not result in the mobile terminal having successfully received or uncovered the complete packet payload, the mobile terminal may transmit to the base station on the uplink a negative acknowledgement (NAK), to prompt the base station to engage in a next transmission attempt. On the other hand, if and when the mobile terminal received and uncovered the complete packet (e.g., the packet transmission and any associated decoding by the mobile terminal was successful), the mobile terminal may then transmit to the base station a positive acknowledgement (ACK), to inform the base station that transmission of the packet was successful, thereby completing transmission of that packet.

Dynamic provision of hybrid-ARQ repetition factor based on subscription service class


A method for calibrating a camera network includes generating a projection matrix by each of cameras in respect of a calibration pattern that is disposed at a plurality of different positions in a photography zone. A portion of the projection matrix is produced as a sub-projection matrix. Sub-projection matrixes are arranged widthwise and lengthwise to generate one sub-measurement matrix. A singular value decomposition (SVD) is performed on the sub-measurement matrix to change the sub-measurement matrix into a matrix having a rank of 3 and a SVD is performed on the changed sub-measurement matrix. A rotation value of the calibration pattern, and an internal parameter and a rotation value of each camera are extracted to thereby calibrate the camera network.

A camera calibration operation, which calculates an internal variable and external variable of a camera, is an operation that is required to be performed prior to all operations of calculating Three-Dimensionally (3D) information with a camera.
Although various camera calibration methods have been proposed to date, a camera calibration method with calibration patterns can guarantee the most stable and precise result. However, when a target object to be three-dimensionally reconstructed has a large size, a calibration pattern increases in proportion to the target object. Such a large calibration pattern has limitations in maintenance and management thereof, and moreover, cost expended in manufacturing the large calibration pattern is inversely proportional to the degree of precision, whereby there is a limitation in establishing a camera calibration system.
To overcome such limitations, a method has been proposed that moves a light point with a user's hand to simultaneously capture the light point with a plurality of cameras, and then calibrates the captured images of the light point in a self-calibration scheme. Such a method, however, has a limitation in that time synchronization for capturing the light point among the cameras needs to be achieved.
To overcome limitations that occur in manufacturing a 3D-structure calibration pattern, a method using a calibration pattern of a Two-Dimensional (2D) structure has been proposed. However, the method using the 2D-structure calibration pattern also has a limitation in that the size of the calibration pattern increases in proportion to that of a target to be captured, and has a reduced degree of precision that is required in measuring the relative position of at least one camera disposed around the target.
Therefore, in three-dimensionally reconstructing a large target object using a camera network, there is a need to avoid the increase in a size of a calibration pattern for reconstruction in proportion to a size of the large target object.

Method and apparatus for camera network calibration with small calibration pattern

ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE