A method and system for reducing the number of mathematical operations required in the JPEG decoding process without substantially impacting the quality of the image displayed is disclosed. Embodiments provide an efficient JPEG decoding process for the purposes of displaying an image on a display smaller than the source image, for example, the screen of a handheld device. According to one aspect of the invention, this is accomplished by reducing the amount of processing required for dequantization and inverse DCT (IDCT) by effectively reducing the size of the image in the quantized, DCT domain prior to dequantization and IDCT. This can be done, for example, by discarding unnecessary DCT index rows and columns prior to dequantization and IDCT. In one embodiment, columns from the right, and rows from the bottom are discarded such that only the top left portion of the block of quantized, and DCT coefficients are processed.

Digital imaging has, in recent years, become the leading standard by which photographs, designs and other visual elements are captured, created, stored and displayed. Images, like all computer-readable media, contain a significant amount of binary data which employs a significant amount of computing resources, particularly in terms of storage requirements. As a result, compression algorithms and decoders are used to make image information fit into a smaller data file.
Compression algorithms vary widely depending on the nature of the data in question and are well known in the art. In terms of digital imaging, one such algorithm is the JPEG, or Joint Photographic Experts Group compression, as defined in Terminal Equipment and Protocols for Telematic Services: Information Technology—Digital Compression and Coding of Continuous-Tone Still Images—Requirements and Guidelines, CCITT Rec. T.81 (1992 E), which is herein incorporated by reference in its entirety. According to this method, an image file, which is made up of a large matrix of spatial coefficients corresponding to pixel information, is first transformed from the pixel domain to a compressed domain using a mathematical transform. The transform typically employed, as will be appreciated by one skilled in the art, is the Discrete Cosine Transform or DCT. This transform is particularly effective for image compression since it stores the majority of the original signal data in low-frequency components in the transformed, DCT domain. The resultant coefficients in the frequency domain are then quantized, or reduced in size, by factors that depend on the coefficients' relative importance to the overall integrity of the image. This quantization process is a "lossy" compression as some of the image data will be lost as a trade-off for saving space and computing resources. The frequency components of the image that will be most noticeable to the human eye will naturally be quantized to a lower degree, as losses in the information in this frequency range will be more damaging to the overall integrity of the image.
Following quantization, the image file is a matrix of quantized DCT coefficients, also known as quantized DCT indices, and is substantially smaller than the uncompressed binary data that made up the raw image. As a final step, this matrix goes through a process known as entropy encoding to further reduce it in size. Many entropy encoding procedures are known in the art. One such example is Huffman encoding. For the purposes of the following discussion, a person skilled in the art will appreciate that any reference to Huffman decoding can equally refer to any other method of entropy decoding. Once the Huffman encoding process is complete, the resultant file is a JPEG encoded image which can be stored within any kind of computer-readable storage means. JPEG compression is well known in the art, and those of ordinary skill in the field will appreciate that varying techniques in carrying out the process may be used.
In order for the compressed image to be viewed or edited, the compressed image file must go through the reverse of the encoding process. In general, the stored JPEG image first goes through Huffman decoding followed by dequantization, or up-scaling each of the frequency components of the image by the same factor as they were downscaled during compression, and finally, the inverse of the DCT operation. In this manner, the stored JPEG image can then be displayed.
Like the compression process, the decompression requires significant computing power, as many calculations are necessary in order to apply each step of the algorithm. In cases where limited computing power is available, this process can be detrimental to overall system performance and can result in long lag times. This is especially true for mobile handheld devices such as cellphones, PDAs and the like which, by virtue of their size, have reduced computing resources.
There is an additional problem that renders JPEG decompression difficult for handheld devices. Since they almost invariably possess screens which are smaller in size (and/or with lower resolution) than the image which they seek to display, an un-downsampled or spatially un-downscaled image will typically not fit within the confines of the screen. As such, the image must be spatially downscaled, for example, by taking the average of adjacent pixel data or truncating a portion of the pixel coefficients from the image file. Regardless of which method is employed, however, additional calculations must be performed, in order to carry out the spatial downscaling. This can result in increased delay times in loading an image for viewing on a mobile, handheld device. In some cases, important image data is discarded as a sacrifice for faster image processing. This can result in distortion of the image.
It is, therefore, desirable to provide a method to quickly decompress and view JPEG-encoded images using fewer computing resources, while ensuring that the image displayed is as faithful as possible to the source image.

Method and system for decoding encoded images and reducing the size of said images


A shock absorber includes an external valve which controls the damping characteristics of the shock absorber. The external valve controls the flow of fluid between the lower working chamber of the shock absorber and the reservoir chamber and between the upper working chamber of the shock absorber. The damping characteristics are dependent on the amount of current being applied to a solenoid valve which controls the movement of a plunger.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
A conventional hydraulic damper or shock absorber comprises a cylinder which is adapted at one end for attachment to the sprung or unsprung mass of a vehicle. A piston is slidably disposed within the cylinder with the piston separating the interior of the cylinder into two fluid chambers. A piston rod is connected to the piston and extends out of one end of the cylinder where it is adapted for attachment to the other of the sprung or unsprung mass of the vehicle. A first valving system is optionally incorporated within the piston as a safety hydraulic relief valve which functions during the shock absorber's extension stroke of the piston with respect to the cylinder and a second valving system is incorporated within the piston for allowing fluid replenishment above the piston during the shock absorber's compression stroke of the piston with respect to the cylinder.
Various types of adjustment mechanisms have been developed to generate damping forces in relation to the speed and/or amplitude of the displacement of the sprung or unsprung mass. Often, the damping characteristics are controlled by an externally mounted control valve. An externally mounted control valve is advantageous in that it may be easily removed for service or replacement.

Shock absorber having a continuously variable semi-active valve

Tenneco Automotive Operating Company Inc.


A medicament for use in treating fatty liver, hepatitis and cirrhosis, the medicament includes a marine algal glycoprotein.

Infection rate of hepatitis B virus in China is approximate 60%-70%. Hepatitis B surface antigen carrying rate takes account of 7.18% of total population, based on which it is estimated that about 93 million people carry hepatitis B virus, among of which 30 million are hepatitis B patients. Currently, patients who have jaundice hepatitis A, hepatitis disease, virus and HBE are found everywhere. There are many reason for cause or induction of jaundice hepatitis A, hepatitis B viral, such as excessive drinking, low body immunity, irregular eating. For patients with liver disease, they are discriminated to varying degrees in terms of family affection, marital love, school attendance, employment, going abroad and social intercourses. Their lives are inevitably covered with sad colors. Currently, there is no method to cure hepatitis virus, but only relieve it. Patients has to take medicines for long time which is not only troublesome, but also expensive. Furthermore, it is easy to recur.
At present, there is no specific medicine to treat chronic hepatitis B, hepatitis C and liver cirrhosis. The interferon commonly-used in present has certain effect on chronic hepatitis B, hepatitis C and liver cirrhosis. For instance, its response rate is only at 15%-20% for treatment of hepatitis C (Effect Research of Interferon on Hepatitis C: Chinese Journal of Integrated Traditional and Western Medicine on Liver Disease, volume 2002-12, 1st issue, page 56); however, big side effect, high recurrence rate and expensive price make the interferon not conforming with Chinese medical consumption level.

This patent is subject to a terminal disclaimer.

Medicament for use in treating fatty liver, hepatitis and cirrhosis

SHANDONG ZHONGHAI PHARMACEUTICAL CO. LTD


An instruction set is executed from Read Only Memory (ROM). When a current instruction in the instruction set corresponds to a reserved patch memory block of ROM, a Random Access Memory (RAM) index and a ROM return address are loaded into a memory map, and a program counter is set to a first reserved ROM address. After jumping the program counter to the first reserved ROM address, the program counter is jumped to RAM based on the RAM index to execute a patch code, which includes at least one instruction to set the program counter to a second reserved ROM address. When the program counter equals the second reserved ROM address, the ROM return address is retrieved. Then the instruction set is executed from ROM based on the ROM return address.

1. Technical Field of the Invention
This invention relates generally to Read Only Memory (ROM) and more particularly to a method, apparatus and system for patching ROM code in a digital data processing system.
2. Description of Related Art
As is known, digital data processing systems such as computers, personal media players (e.g., mp3 players), cell phones, and other electronic devices typically use digital data processors, read only memory (ROM), and random access memory (RAM) in their operation. On startup and in operation of a microprocessor, operating code in a ROM is accessed to run operating code. For example, on startup of a personal computer, ROM code is accessed to load initial program instructions, such as boot and initialization instructions.
The way a ROM chip works necessitates the programming of perfect and complete data when the chip is created. By the nature of the ROM structure, it is impossible to reprogram or rewrite a standard ROM chip. For example, if the operating code is incorrect, or the data needs to be updated, the ROM chip must be discarded and replaced with a new chip having replacement code. Creating the original template for a ROM chip is often a laborious process full of trial and error, so replacing or changing merely a single line of ROM code once a template is produced can be a massive undertaking.
There are several reasons for wanting to be able to make changes to ROM code after the ROM is produced. In some cases, electronic products are often developed in short time frames and released without exhaustive testing, therefore 'bugs' or defects in the ROM code may be discovered after products have been released on the market. Other circumstances such as a change in operating parameters or conflicting hardware or software may necessitate later alteration of the operating code residing in the ROM. As previously mentioned, it is impractical, laborious and expensive to recall products to manually change the ROM.
With reference to FIG. 1, a known prior art technique of implementing ROM code correction is performed by replacing a piece of ROM-based code with a patch program stored in RAM. FIG. 1 shows a schematic block diagram of a prior-art patch code correcting apparatus. The ROM patch code logic includes eight patch address registers 14 and eight patch address comparators 16. Each patch address register 14 points to a starting location in the ROM code where the program flow is to be changed. The Program Counter (PC) register in a Program Control Unit is compared to each patch address register. When a comparator determines that the address of a fetched instruction is identical to an address stored in one of the patch address registers, the data bus 10 is forced to the corresponding JMP instruction by JMP Target Address Generator 20.
The patch address register 14 contents are compared with the address bus 12 used to initiate the program fetch. When the address in the patch address registers 14 is equal to the contents of one of the patch address registers, a PATCH DETECTED signal 24 is generated that injects a JMP instruction into the data bus 10, replacing the instruction that otherwise would have been fetched from the ROM. The JMP target address is determined according to the identity of the comparator that generated the PATCH DETECTED signal 24. The JMP target can be any one of the predetermined locations in the program memory space stored by RAM 22. The specific target address is mask-programmable. A user may download a piece of patch code to one of the predetermined target locations in RAM 22.
As may be seen from FIG. 1, the prior art ROM patch code scheme requires a comparator for each block of patch code that is provisioned. For each block of patch code, an input on the OR gate and on the JMP target address generator is required. This scheme is inefficient because it provides for a fixed and limited number of patch code opportunities. A further inefficiency of the prior art scheme is that if the chip designers provide more patch code blocks, an increasingly large area of the silicon is required, therefore using valuable chip area that may be used for other circuitry. Also, as more comparators are operating on the chip, more power is required to drive them, which for battery-operated devices, is not desirable. Thus, in the past, there has been a trade off between providing a limited number of ROM code patch memory blocks with power conservation considerations, and silicon space considerations.
Therefore, a need exists for a method and apparatus of patching ROM code without the above-referenced limitations.


The gate electrode of a crystalline TFT is constructed as a clad structure which consists of a first gate electrode, a second gate electrode and a third gate electrode, thereby to enhance the thermal resistance of the gate electrode. Besides, an n-channel TFT is provided with a low-concentration impurity region which adjoins a channel forming region, and which includes a subregion overlapped by the gate electrode and a subregion not overlapped by the gate electrode, thereby to mitigate a high electric field near the drain of the TFT and to simultaneously prevent the OFF current of the TFT from increasing.

1. Field of the Invention
The present invention relates to a semiconductor device in which a circuit including a thin film transistor (hereinbelow, abbreviated to xe2x80x9cTFTxe2x80x9d) is formed on a substrate having an electrically insulating surface, and a method of fabricating the semiconductor device. By way of example, it relates to the constructions of an electrooptic device which is typified by a liquid crystal display device, and an electronic equipment in which the electrooptic device is installed. Incidentally, here in this specification, the expression semiconductor device is intended to signify general devices which function by utilizing semiconductor properties, and it shall cover within its category such electrooptic device and the electronic equipment as exemplified above.
2. Description of the Related Art
There have been positively fostered the developments of techniques for fabricating an active matrix type liquid crystal display device by providing TFTs on a glass substrate or a quartz substrate. Among the TFTs, a TFT whose active layer is a semiconductor film having a crystalline structure (hereinbelow, termed crystalline TFT) attains a high mobility. It is therefore said that the crystalline TFTs can integrate functional circuits on an identical substrate, thereby to realize image display of high definition.
Here in this specification, the semiconductor film having a crystalline structure shall cover a single-crystal semiconductor, a polycrystalline semiconductor and a microcrystalline semiconductor. Further, it shall cover semiconductors disclosed in the official gazette of a Japanese Patent Application Laid-open No. 7-130652 (1995) which corresponds to a U.S. Pat. No. 5,642,826, a Laid-open No. 8-78329 (1996), a Laid-open No. 10-135468 (1998) which corresponds to a U.S. patent application Ser. No. 08/951,193, a Laid-open No. 10-135469 (1998) which corresponds to a Ser. No. 08/951,819, or a Laid-open No. 10-247735 (1998) which corresponds to a Ser. No. 09/034,041.
In order to construct the active matrix type liquid crystal display device, the n-channel TFTs (hereinbelow, termed pixel TFTs ) of a pixel matrix circuit are necessary in as large a number as 1,000,000 through 2,000,000. Further, when the TFTs of functional circuits provided around the pixel matrix circuit are added, a still larger number of crystalline TFTs are necessary. Specifications required of the liquid crystal display device are severe. For the purpose of stably presenting image display, eventually, it is the primary requisite to ensure the reliability of each individual crystalline TFT.
The characteristics of a field effect transistor such as the TFT can be considered as being divided into a linear region where a drain current and a drain voltage increase in proportion, a saturation region where the drain current becomes saturated even when the drain voltage is increased, and a cutoff region where ideally no current flows even when the drain voltage is applied. In this specification, the linear region and the saturation region shall be called an ON region of the TFT, and the cutoff region an OFF region. Besides, for the sake of convenience, the drain current in the ON region shall be called an ON current , and a current in the OFF region an OFF current.
Concerning the pixel TFT, a gate voltage having an amplitude of about 15 to 20 V is applied as a drive condition. Accordingly, the pixel TFT needs to satisfy the characteristics of both the ON region and the OFF region. On the other hand, each peripheral circuit for driving the pixel matrix circuit is constructed on the basis of a CMOS circuit, in which importance is chiefly attached to the characteristics of the ON region.
In this regard, it is said that the crystalline TFT is still inferior in point of reliability to a MOS transistor (a transistor fabricated on a single-crystal semiconductor substrate) which is used for an LSI, etc. By way of example, when the crystalline TFT is continuously driven, such deteriorating phenomena as lowering in the field effect mobility, decrease in the ON current and increase in the OFF current are sometimes observed. A cause for the deteriorating phenomena is the injection of hot carriers, that is, the hot carriers created by a high electric field near the drain of the TFT incur the deteriorating phenomena.
In the technical field of the LSIs, an LDD (Lightly Doped Drain) structure has been known as an expedient for decreasing the OFF current of the MOS transistor and for mitigating a high electric field near the drain of the MOS transistor. The structure is such that impurity regions of low concentration are provided outside a channel forming region. The low-concentration impurity regions are called LDD regions.
Even in the crystalline TFT, the formation of an LDD structure has, of course, been known. The official gazette of Japanese Patent Application Laid-open No. 7-202210 (1995), for example, discloses a technique wherein a gate electrode is formed into a structure of two layers which have widths different from each other, and concretely, in which the upper layer is narrower than the lower layer, and ions are subsequently implanted using the gate electrode as a mask, whereby LDD regions are formed by one time of ion implantation by utilizing the different penetration depths of the ions based on the fact that the thickness of the gate electrode is not uniform. Herein, the gate electrode overlaps the LDD regions directly.
Such a structure has been known as a GOLD (Gate-drain Overlapped LDD) structure, a LATID (Large-tilt-angle implanted drain) structure, or an ITLDD (Inverse T LDD) structure. It can mitigate the high electric field near the drain, thereby to prevent the phenomenon of the hot carrier injection and to enhance the reliability. In, for example, Mutsuko Hatano, Hajime Akimoto and Takeshi Sakai: IEDM97 TECHNICAL DIGEST, pp. 523-526, 1997, a TFT which has a GOLD structure based on side walls formed of silicon has been verified to attain a reliability which is far superior to those of TFTs of other structures.
However, the structure laid open in the above paper has the problem that the OFF current of the TFT increases more than with the conventional LDD structure, and it necessitates a measure for eliminating the problem. Especially in the pixel TFT constituting the pixel matrix circuit, the increase of the OFF current results in augmenting power dissipation or/and causing abnormality to appear in the image display. Therefore, the GOLD structure cannot be applied to the crystalline TFT as it is.
The present invention consists in techniques for solving the problems as stated above, and has for its object to incarnate a crystalline TFT which achieves a reliability equivalent or superior to that of a MOS transistor and which also attains good characteristics in both the ON region and the OFF region thereof.
Another object of the present invention is to incarnate a semiconductor device of high reliability which includes a semiconductor circuit formed of such crystalline TFTs.
FIGS. 18(A-1) and 18(B-1) through FIGS. 18(A-4) and 18(B-4) schematically illustrate the structures of TFTs and Vg-Id (gate voltage-drain current) characteristics attained with the structures, on the basis of knowledge hitherto obtained. FIG. 18(A-1) is a schematic sectional view showing the simplest structure of the TFT in which a semiconductor layer below a gate electrode consists of a channel forming region, a source region and a drain region (n+ regions). FIG. 18(B-1) is a graph showing the Vg-Id characteristics in which a +Vg side is the ON region of the TFT, while a xe2x88x92Vg side is the OFF region thereof. Herein, a solid line indicates initial characteristics, and a broken line indicates characteristics deteriorated by the phenomenon of hot carrier injection. With the structure, both the ON current and OFF current of the TFT are high, and the deteriorations are of large magnitudes. Therefore, the TFT left intact cannot be used for, for example, the pixel TFT of a pixel matrix circuit.
FIG. 18(A-2) is a schematic sectional view showing the LDD structure of the TFT in which low-concentration impurity regions (nxe2x88x92 region) serving as LDD regions are added to the structure depicted in FIG. 18(A-1), and in which the LDD regions and a gate electrode do not overlap each other. FIG. 18(B-2) is a graph showing the Vg-Id characteristics of the TFT. With the structure, the deterioration in the OFF current of the TFT can be suppressed to some extent, but the deterioration in the ON current of the TFT cannot be prevented. Besides, FIG. 18(A-3) is a schematic sectional view showing the structure (called the GOLD structure) of the TFT in which entire LDD regions and a gate electrode overlap each other. FIG. 18(B-3) is a graph of the Vg-Id characteristics corresponding to FIG. 18(A-3). The structure can suppress the deteriorations to the extent of posing no problem, but it increases the OFF current of the TFT on the xe2x88x92Vg side more than the structure depicted in FIG. 18(A-2).
Accordingly, any of the structures shown in FIGS. 18(A-1), 18(A-2) and 18(A-3) cannot satisfy those characteristics of the ON region and the OFF region which are necessary for the pixel matrix circuit, simultaneously with the reliability of the TFT. In contrast to the above structures, a structure shown in FIG. 18(A-4) is such that each of LDD regions which a gate electrode overlaps consists of a part which lies under the gate electrode, and a part which does not lie under the gate electrode. With the structure, it is possible as seen from FIG. 18(B-4) to satisfactorily suppress the deterioration in the ON current of the TFT and to decrease the OFF current thereof.
The structure shown in FIG. 18(A-4) has been derived from the following consideration: With the structure as shown in FIG. 18(A-3), when a negative voltage is applied to the gate electrode of the n-channel TFT, that is, when the TFT is operated in the OFF region, holes are induced at the interfaces between the LDD regions, which the gate electrode overlaps, and a gate insulating film, with increase in the negative voltage, and a current path based on the minority carriers as joins the drain region, LDD regions and channel region of the TFT is formed. On this occasion, if the drain region is under the application of a positive voltage, the holes will flow to the side of the source region of the TFT. This will be a cause for the increase of the OFF current.
It can be considered that LDD regions in which the minority carriers are not accumulated in spite of the application of the gate voltage may be provided in order to cut off the above current path midway. The present invention pertains to a TFT having such a structure, and a circuit employing the TFTs.
Accordingly, in one aspect of performance of the present invention, a semiconductor device wherein a TFT is formed on a substrate, the TFT having a semiconductor layer, a gate insulating film formed on the semiconductor layer, and a gate electrode formed on the gate insulating film; is characterized in that said gate electrode includes a first layer which is formed in contact with said gate insulating film, a second layer which is formed on and inside said first layer, and a third layer which is formed in contact with said first layer and said second layer; that said semiconductor layer includes a channel forming region, a first impurity region of one conductivity type, and a second impurity region of said one conductivity type which is formed between said channel forming region and said first impurity region; and that a part of said second impurity region of said one conductivity type lies under said first layer of said gate electrode.
In another aspect of performance of the present invention, a method of fabricating a semiconductor device is characterized by comprising the first step of forming a semiconductor layer on a substrate which has an insulating surface; the second step of forming a gate insulating film in contact with said semiconductor layer; the third step of successively forming a conductive layer (A) and a conductive layer (B) on said gate insulating film; the fourth step of etching said conductive layer (B) into a predetermined pattern, thereby to form a second layer of a gate electrode; the fifth step of doping a selected region of said semiconductor layer with an impurity element of one conductivity type; the sixth step of forming a conductive layer (C) in contact with said conductive layer (A) and said second layer of said gate electrode; the seventh step of etching said conductive layer (C) and said conductive layer (A) into predetermined patterns, thereby to form a third layer of said gate electrode and a first layer thereof; and the eighth step of doping a selected region of said semiconductor layer with an impurity element of said one conductivity type.
In still another aspect of performance of the present invention, a method of fabricating a semiconductor device is characterized by comprising the first step of forming a semiconductor layer on a substrate which has an insulating surface; the second step of forming a gate insulating film in contact with said semiconductor layer; the third step of successively forming a conductive layer (A) and a conductive layer (B) on said gate insulating film; the fourth step of etching said conductive layer (B) into a predetermined pattern, thereby to form a second layer of a gate electrode; the fifth step of doping a selected region of said semiconductor layer with an impurity element of one conductivity type; the sixth step of forming a conductive layer (C) in contact with said conductive layer (A) and said second layer of said gate electrode; the seventh step of etching said conductive layer (C) and said conductive layer (A) into predetermined patterns, thereby to form a third layer of said gate electrode and a first layer thereof; the eighth step of doping a selected region of said semiconductor layer with an impurity element of said one conductivity type; and the ninth step of removing parts of said first layer of said gate electrode and said third layer thereof.
In yet another aspect of performance of the present invention, a method of fabricating a semiconductor device is characterized by comprising the first step of forming a first semiconductor layer and a second semiconductor layer on a substrate which has an insulating surface; the second step of forming a gate insulating film on said first semiconductor layer and said second semiconductor layer; the third step of successively forming a conductive layer (A) and a conductive layer (B) on said gate insulating film; the fourth step of etching said conductive layer (B) into a predetermined pattern, thereby to form a second layer of a gate electrode; the fifth step of doping a selected region of said first semiconductor layer with an impurity element of one conductivity type; the sixth step of forming a conductive layer (C) in contact with said conductive layer (A) and said second layer of said gate electrode; the seventh step of etching said conductive layer (C) and said conductive layer (A) into predetermined patterns, thereby to form a third layer of said gate electrode and a first layer thereof; the eighth step of doping selected regions of said first semiconductor layer and said second semiconductor layer with an impurity element of said one conductivity type; and the ninth step of doping a selected region of said second semiconductor layer with an impurity of a conductivity type opposite to said one conductivity type.
Such a TFT is well suited for application to the n-channel TFT of a CMOS circuit or the pixel TFT of a pixel matrix circuit. In the structure of the TFT according to the present invention, said first impurity region formed in said semiconductor layer functions as a source region or a drain region, and said second impurity region functions as an LDD region. Accordingly, a concentration of an impurity element of said one conductivity type is lower in said second impurity region than in said first impurity region.
The semiconductor device according to the present invention can be so constructed that a retention capacitance is formed of an impurity region of said one conductivity type which is provided at one end of said semiconductor layer, said gate insulating film, and a wiring line which is constituted by said first layer of said gate electrode, said second layer thereof and said third layer thereof, and that said retention capacitance is connected to a source or a drain of said TFT.
Further, the semiconductor device according to the present invention is characterized in that said first layer of said gate electrode and said third layer thereof are formed containing at least one member selected from the group consisting of elements of silicon (Si), titanium (Ti), tantalum (Ta), tungsten (W) and molybdenum (Mo), and a compound which contains any of said elements as its component, and that said second layer of said gate electrode is formed containing at least one member selected from the group consisting of elements of aluminum (Al) and copper (Cu), and a compound which contains any of said elements as its principal component.

Semiconductor Energy Laboratory Co, Ltd.


The invention provides a novel compounds derived from CD154, but without the intracellular domain. Notably, the invention provides TMZ-CD154 and a method to treat diseases in which the novel molecule TMZ-CD154 is used. In particular, TMZ-CD154 is used to modify the immune responses in patients with immune related diseases such as cancer and infectious disease. The invention also relates to a method to activate cells with the TMZ-CD154 in vitro either prior to using the activated cells for therapy or for diagnostic purposes.

During the last decades gene transfer technology has been under extensive investigation in treatment of e.g. cancer. In 2012, Glybera became the first gene therapy treatment approved for clinical use. Glybera compensates for lipoprotein lipase deficiency by delivering an intact copy of the human lipoprotein lipase (LPL) gene incorporated into the adeno-associated virus serotype 1 (AAV1) viral vector.
The aim of gene therapy is to introduce a functional/therapeutic gene into a target cell such as a tumor cell.
WO 2012/038607 describes a method of producing CD40L in a cell and increasing tumor specific immune response and apoptosis in a subject. CD40L (also denoted CD40 ligand, CD154 or gp39) is a type II transmembrane protein belonging to the tumor necrosis factor family.
WO 02/36769 describes a CD40L-CD40 chimera. In contrast to the nucleotide sequence of the present invention the chimera contains an intracellular signaling region of another protein while the present invention lacks intracellular signaling capacity.
Blaser et al (Clin. Immunology 2005, 117, 231-237) and Hsu et al. (Journal of Biological Chemistry, 1997, 272, 911-915) describe naturally occurring CD40L that in the case of Blaser et al. demonstrates that a mutation leads to a dysfunctional protein. Hsu et al. describes that naturally CD40L can be cleaved to release the extracellular domain. However, released CD40L is not stable as a trimer.
WO 94/10308 and WO 2007/120368 refer to soluble multimeric CD40L molecules that are not retained in the plasma membrane, but released from the cell or used as recombinant produced molecules for systemic use in patient. A comparison of these soluble molecules with TMZ-CD154 of the present invention shows that TMZ-CD154 gives a stronger activation signal, likely because it is retained in the plasma membrane.
CD154 is a transmembrane molecule that may trimerize upon binding to the CD40 receptor. Binding leads to reciprocal stimulation of the CD154 positive and the CD40 positive cells. CD154 may also be cleaved and secreted but is then acting as a soluble CD154 (sCD154) monomer. Membrane-bound or sCD154 activates dendritic cells (DCs) to become efficient antigen-presenting cells and activate so called Th1 type of immune responses with effector cells such as T cells and natural killer (NK) cells. The Th1 type immune response plays a crucial role in tumor immunity and is, hence, the essence of active tumor immunotherapy. CD154 can induce apoptosis in CD40 positive tumor cells by means not fully established. However, some reports claim that it is due to the TRAF3-JNK pathway dependent caspase-9 activation while others studies implicate an auto- or paracrine production of death ligands that may induce caspase-8 activation (Loskog and Eliopoulos, Semin Immunol 2009). CD40 has no death domains in its tail leaving room for multiple explanations. The apoptosis induction has shown more potent if CD154 is membrane-bound which may be because of the trimerization of this receptor/ligand system upon binding. CD154 has been used as a soluble molecule in clinical trials enrolling patients with cancer, but systemic exposure may result in increased liver enzymes which has not been noted when CD154 has been delivered locally in a tumor metastases for example via using adenoviral serotype 5 gene transfer (Vonderheide JCO, 2001; Malmström et al CCR 2010). The full length CD154 has been used in oncolytic viruses as well (Fernandes et al CCR 2009; Gomes et al CCR 2009; Terada et al GT 2006; Diaconu et al CR 2012) and tested for safety in patients (Pesonen et al CR 2012). The CD154 molecule expressed in T cells by genetic engineering can result in lymphoproliferative disease (Brown et al Nat Med 1998). Hence, vectors transferring the full-length CD154 gene and that have the capacity to infect cells that may react in such manner may cause unexpected adverse toxicity.
Hence, there is a need for developing a CD154 derivative, which maintains the beneficial properties with respect to apoptosis and tumor suppression, but which is without undesired adverse toxicity.


An aromatic polycarbodiimide containing a siloxane bond in the polymer main chain thereof.. The polycarbodiimide can adhere at a low temperature in a short time and has a high heat resistance. The polycarbodiimide has a good adhesive property to an adherend such as semiconductor elements, has a low hygroscopic property and is excellent in the storage stability. Therefore, the polycarbodiimide can be stored for a long period of time at normal temperature.

Hitherto, paste-like adhesives and adhesive materials obtained by coating an adhesive on heat-resistant substrates are known as adhesives for the fixing treatment of electric and electronic parts, such as semiconductor chips, substrates, lead frames, etc. The adhesives used are thermosetting resin adhesives such as epoxy resin adhesives, acrylic resin adhesives, or rubber-phenol adhesives. However, these adhesives have various problems that because high temperature and long time are required for heat curing, the adhesion workability is poor; a large amount of volatile components are generated in heat curing the adhesive and the volatile components thus generated soil leading wires; and because the adhesives have a high hygroscopic property, an encapsulating resin package of a semiconductor chip is cracked in reflowing a solder. Thus, it is hard to say that the conventional adhesives have a high reliability necessary for the adhesives for the fixing treatment of electric and electronic parts, and sufficiently satisfactory adhesives have not yet been obtained.
Also, a hot melt-type film adhesive using a polyimide resin can be heat-press adhered to an adherend in a short period of time, and where using the adhesive, a heat-curing step after adhering is unnecessary. However, the adhesive has a high glass transition point and a very high temperature is required for working. Therefore, there is a large possibility of giving heat damages to the adherend.
On the other hand, when an adhesive having a low glass transition point is used for giving a low-temperature workability, the heat resistance is poor and the reliability is decreased.
Furthermore, it is known that polycarbodiimide which has hitherto been widely used has a high heat resistance, and workability thereof is relatively good as compared with the polyimide resin adhesive. However, although the polycarbodiimide shows a low hygroscopic property under room temperature atmosphere, when the polycarbodiimide is allowed to stand under a humidified condition at high temperature and high pressure, such as a pressure cooker test (PCT), the polycarbodiimide is easily hydrolyzed to decrease the molecular weight and also the mechanical strength, thereby the polycarbodiimide cannot endure the practical use for electronic materials used for semiconductor elements, etc.

Aromatic ploycarbodiimine and sheet using it


An approach for detecting sudden changes in acceleration in a semiconductor device or semiconductor package containing the semiconductor device is disclosed. In one embodiment, a piezoelectric sensor is embedded in a semiconductor die. The piezoelectric sensor is configured to sense a mechanical force applied to the semiconductor die. An excessive force indicator is coupled to the piezoelectric sensor. The excessive force indicator is configured to generate an excessive force indication in response to the piezoelectric sensor sensing that the mechanical force applied to the semiconductor die has exceeded a predetermined threshold indicative of an excessive mechanical force.

Embodiments of the present invention relate generally to semiconductor device fabrication, and more specifically, to detecting an excessive force experienced by an integrated circuit or semiconductor die, or a semiconductor package containing the die that is due to sudden changes in acceleration.
Physical damage caused by dropping electronic products is generally a concern for electronic products manufacturers. For example, portable electronic devices, which can perform a variety of functions including telephonic, electronic messaging and managing personal information, can be accidentally dropped and consequently damaged. Users of these damaged electronic devices can submit warranty claims to the manufacturers of the devices. It is difficult for the manufacturers to ascertain whether the damaged devices that are received are the result of damage caused by the users or are due to certain components in the devices such as semiconductor dies or their semiconductor packages failing. In particular, it is a challenge for electronic product manufacturers to differentiate whether an electronic device received under a warranty claim was built weaker than the normal population, or whether the device experienced more extreme conditions than it was designed to withstand (e.g., dropped from an excessive height). Since the process of ascertaining whether a damaged electronic device received under a warranty claim is due to a manufacturing issue or improper handling can be difficult or impossible, some electronic manufacturers will needlessly cover repair or replacement of the device under its warranty.

Detecting sudden changes in acceleration in semiconductor device or semiconductor packaging containing semiconductor device


A high-throughput fluorescence imaging system with sample heating capability includes an image sensor wafer with a plurality of image sensors for fluorescence imaging a plurality of samples disposed in a respective plurality of fluidic channels on the image sensor wafer. The high-throughput fluorescence imaging system further includes a heating module, thermally coupled with the image sensor wafer, for heating the samples. A method for high-throughput assay processing includes modulating temperature of a plurality of samples disposed in a respective plurality of fluidic channels on an image sensor wafer by heating the image sensor wafer, using a heating module thermally coupled with the image sensor wafer, to control reaction dynamics in the samples; and capturing a plurality of fluorescence images of the samples, using a respective plurality of image sensors of the image sensor wafer, to detect one or more components of the plurality of samples.

Fluorescence imaging is a commonly used technique for detecting components of a biological sample, such as a blood, urine, or saliva sample from a human or animal subject, to characterize an aspect of the sample. Sample components of interest are labeled with fluorescent tags that emit fluorescence upon excitation with light of an appropriate wavelength. Fluorescence imaging is used to determine the results of biological assays in a variety of applications including medical diagnostics, food safety, and forensic science. In some cases, it is necessary to perform several different assays on a single sample in a short period of time, wherein some of the different assays are mutually incompatible and therefore require separate processing. In other cases, many samples must be processed in a short period of time.
Deoxyribonucleic acid (DNA) sequencing is a prominent example of an application that benefits from parallel processing of many samples to sequence the DNA in a timely manner. Some of the more popular, commercially available DNA sequencing systems sequentially determine the order of nucleotide bases in a strand of DNA. Each base is determined through a biological assay followed by fluorescence imaging to determine the base type, i.e., adenine (A), guanine (G), cytosine (C), or thymine (T). The process to determine each base is time consuming and the overall sequencing process may have an occasional assay error leading to faulty sequencing. Therefore, the DNA strand is usually cut into a large number of shorter fragments that are processed in parallel.
DNA sequencing and many other DNA or ribonucleid acid (RNA) assays suffer from the amount of DNA or RNA material under investigation available being too low to produce a measurable result. In such situations, the DNA/RNA material may be amplified through polymerase chain reaction (PCR). PCR is a thermally mediated assay that produces many copies of a DNA or RNA molecule. The vast majority of PCR methods use thermal cycling of a sample, wherein each cycle duplicates the DNA or RNA material, eventually resulting in significant amplification of the original material. Isothermal amplification is an alternative to PCR, wherein the amplification takes place in an environment at a constant, elevated temperature.

High-throughput fluorescence imaging system and device with sample heating capability, and associated methods


A flight control system can achieve a relatively steep descent (using drag devices such as flight spoilers) at relatively low speeds while retaining good airplane handling qualities from the pilot's point of view. The system and method optimize the drag device's positioning used to perform steep approach to improve performance.

If you have ever looked out of the window of a large airplane as it approaches a runway for landing, you will have seen something called a "spoiler" in operation. Spoilers are plates on the top surface of a wing that can be extended upward into the airflow to "spoil" it. See FIG. 1-1. The spoiler creates a carefully controlled stall over the portion of the wing around it, greatly reducing the lift of that wing section. As the wing's lift decreases, the aircraft will assume a trajectory angle characteristic of the approach phase up to landing.
Depending on the landing conditions and other factors, it may be necessary or desirable to provide a steeper approach angle or trajectory. FIG. 1A contrasts example non-limiting conventional and steep approach procedures for an aircraft 10. Typical conventional approaches use a trajectory angle of around −3.3 degrees. In the FIG. 1A example, the trajectory angle for a steep approach is much larger—for example, on the order of −5.5 degrees (mathematically, 0°>Θappr>Θsteep appr.).
It is well known in aeronautical engineering that drag devices such as flight spoilers are capable of increasing the maximum descent ratio by increasing the trajectory angle (considering the absolute value of the trajectory angle). However, using the spoilers in this way can sometimes have drawbacks due to undesired side effects or risks.
In particular, for a given angle of attack, it is possible that as drag devices such as spoilers reduce the lift produced by the aircraft, they can also reduce significantly the margins to stall. Consequently, there is a concern regarding the speed margins that are required for safe flight operation. It is likely that speed increase will be necessary in order to regain the same stall margins as before, thus jeopardizing the performance of airplane on approaches and landings. This may result in deterioration of flying qualities during steep approaches and landings, including flare maneuvers. It could also result in exposure to high touch down sink rate and tail strike in steep approaches and landings.
Consider a steep approach operation with two possible glide slopes: a normal steep approach and an "abusive" steep approach (i.e., steeper than the normal steep approach). It is well known that aircraft have a maximum descent capability that is possible in a constant airspeed state flight. The maximum descent capability will, generally speaking, depend on the airplane's weight and on the lift, drag and engine's thrust produced by the airplane in a given flight condition.
Some operations require capability to perform a steady flight in a steeper descent path. Depending on the conditions mentioned above, a given airplane may lack this capability, especially in low airspeed conditions (e.g., those airspeed values commonly used to approach and landing). In these cases, the most commonly used solution is to introduce devices, mechanisms and methods to produce even more drag on the airplane utilizing the flight spoilers and/or other drag devices such as airbrakes, dive brakes and others, in order to allow a steeper descent trajectory.
Since there is a tradeoff between lift and drag, some attempts have been made in the past to automatically control the spoilers or other drag control surfaces, to reduce some of the above-mentioned effects. In some such prior approaches, the spoiler is biased to a predetermined position and a control feedback circuit is used to command the spoiler around the predetermined bias position. This predetermined bias position permits the aircraft to perform a steep approach landing in a predetermined flight envelope which includes different weight configurations. This bias position is typically dimensioned to cover the range of aircraft weight inside the steep approach flight envelope. In addition, spoiler bias position normally requires an increase in the approach airspeed in order to preserve or maintain sufficient margin above stall.
Heavier aircraft configurations require less drag to perform steep approach and landing than lighter configurations. If the bias position is the same for both, in the heavy weight configuration increasing the airspeed will lead to a long landing distance, frequently creating a limitation in maximum landing weight. In addition, this bias position is commonly designed to provide capability to increase the glide slope approach (beyond the Steep Approach target), allowing correction during the approach to landing. This means a higher biased spoiler position, which will also likely end up in a landing weight limitation.
To overcome these problems and provide improvements to aircraft safety, the example non-limiting technology herein adds a function that sets the biased position of the drag device(s) (spoilers, for example) depending on factors such as:
(1) the airplane estimated weight (for higher weight, the biased position will be small) so that the maximum landing weight limitation is decreased; and
(2) the measured flight path angle so that during most of the approach the drag device biased position will be small but, if flight path corrections (i.e., flight path increase) is needed, the drag device will be automatically offset to a higher biased position, ensuring satisfactory descent capability without introducing a maximum landing weight limitation.
Alternatively or additionally, the example non-limiting technology herein is capable of modulating the control position of drag devices as a function of pilot longitudinal commands in order to enhance glide slope control during approach, flare and landing. Also alternatively or additionally, the example non-limiting technology herein is capable of modulating the control position of drag devices as a function of only one of the three factors mentioned above (the airplane estimated weight, measured flight path angle or pilot longitudinal command) or as a function of any combination among these three factors (which may be a combination between two or among three of them). In other words, alternatively or additionally, the example non-limiting technology herein is capable of defining a function of drag device deployment as a function of only one of the three factors among the aircraft mass, trajectory angle and pilot inceptor position and/or movement or as a function of any combination among these three factors which may be a combination between two or among three of them.
The example non-limiting technology herein also provides for automatically retracting of the drag devices, if the angle of attack reaches a predefined threshold, in order to keep unchanged stall speeds and maneuvering capability.
The example non-limiting technology herein enables a steep approach and landing with a higher airplane weight. One benefit allows operation with a higher payload (e.g., more passengers). This means that fewer airplanes are needed to carry a given payload, which in a final analysis, can reduce air traffic and consequently fuel emissions.
In addition, performing an approach and landing with a steeper approach glide slope (i.e., the kind of approach which may be achieved by an airplane equipped with the example non-limiting technology herein) results in a reduction in the noise perceived in the areas surrounding the airport. Thus, the example non-limiting technology herein contributes positively to the environment in this additional way.
In more detail, an example non-limiting system and method may optimize the drag device positioning used to perform the Steep Approach to improve its performance. One example non-limiting embodiment provides means (e.g., probes) of measuring air data, means (e.g., AHRS) of measuring aircraft inertial information, means (e.g., inceptor) of sensing pilot input, means (e.g., Fly-By-Wire or avionics system) to process data and computing outputs to command the drag devices, means (e.g., hydraulic or electromechanical actuators) of actuating the drag devices and finally the drag devices itself (e.g., spoilers).
In one example non-limiting implementation, information obtained from the air data and the inertial system is fed back to estimate the current aircraft mass. This estimation is properly filtered to avoid high frequency content not pertinent to the aircraft's mass dynamics. The Steep Approach Logic receives the estimated aircraft mass together with the current aircraft trajectory angle and the desired trajectory angle (supplied by the pilot) to compute the optimum drag device position (drag device command) which is carried out by the drag device actuators.
As the aircraft mass is reduced, the drag devices are gradually repositioned to a position which provides suitable drag to perform steep approach.
Additionally to the modulation as a function of mass, the drag devices are also repositioned based on current trajectory angle and the trajectory angle desired by the pilot. For example, when the pilot intends to perform a steeper glide slope, after keeping the aircraft in the desired trajectory angle for a certain amount (period) of time, the drag devices are automatically repositioned to a position which provides suitable drag to perform steep approach with the desired trajectory angle. The opposite works in the same way: when performing a steep approach, if the pilot intends to perform a conventional approach (e.g., glide slope around 3 degrees), the drag devices will be automatically repositioned to provide suitable drag after a certain amount of time to reduce the drag.
The repositioning of the drag devices due to variations in the estimated mass, the current trajectory angle and the desired angle is, in one example non-limiting implementation, completely transparent to the pilot. The non-limiting system may adjust itself without any additional commands by the crew.
Using all the aforementioned mentioned techniques, the example non-limiting technology herein eliminates the need for an increased approach airspeed and consequently improves the aircraft maximum landing weight.

Steep approach performance improvements and optimization


An audio mixing console that comprises at least one input connector for receiving a video signal for broadcast; at least one input connector for receiving an audio signal; a control panel that includes a plurality of user operable audio channel controls; a signal processing unit for generating an audio output signal; and at least one display monitor integral to the audio console for displaying a video signal for broadcast.

The present invention relates to audio consoles such as professional audio consoles used by audio, television, and film production crews during live and pre-recorded television broadcasts and video/film recording.
The use of audio consoles is common in television broadcast stations. Audio consoles may also be used with respect to remote trucks, networks, and local television facilities.
These audio consoles generally fall into two categories: (1) those used to create audio for future delivery, and (2) those used for live, on-air productions. In both instances, the audio operators actions are separate from those of the video switcher (i.e., the director). The audio operator typically follows instructions from the director, switching audio "in-time" with certain video switching. Besides relying on the directors instructions, the audio operator additionally takes visual cues from an array of video monitors. These video monitors are collectively referred to as "the monitor wall" and require significant physical space and energy.
In a typical arrangement, the audio control booth is a sound proof, glassed-in room located behind the director's position. The glass window allows the audio operator to see the common monitor wall located in front of the director. The distance between the audio operator and the monitor wall can range from fifteen to twenty-five feet or more.
The monitor wall displays the video sources necessary for the current production. These video sources can include, but are not limited to, a video tape output with accompanying audio, or a video without audio, or direct video feeds from various cameras. Besides displaying video sources, most monitor walls also contain the main program out monitor (i.e., the broadcast signal) and a program preview monitor used to "proof" the next selection. As production progresses, the audio operator must constantly be aware of what the next shot will be and what audio will be required. During a fast-moving production, such as a sporting event, the audio source can change for each camera angle. For example, a road race might have cameras and microphones at each turn and straight away. As a director quickly switches to follow cars around the track, so must the audio switch for each new view. Switching can be seconds apart with little or no opportunity to instruct the audio operator.
Usually, with respect to the production of live television, the live television signal comprises a video signal of an event that is captured by a video camera and accompanying audio signal that is captured, for example, by a microphone. Both signals are transmitted via one or more video and audio media while the event is still occurring (i.e., in real time). The most prevalent technology used for broadcasting a live sporting even on television is a "TV remote truck."
The equipment in the TV truck typically includes a monitor wall with separate monitors displaying the output of each camera. A preview monitor displays the next possible live camera or video source that may be selected for broadcast.

Audio console with integral video monitor


The present invention relates to process for crosslinking an arylene oxide polymer comprising a 3-pyridyl and/or a 4-pyridyl group, wherein the polymer is reacted with a compound according to Formula (1) or a compound according to Formula (2), wherein R1, R2, R3 and R4 are independently selected from the group consisting of hydrogen, halogen, hydroxy and cyano. The crosslinked arylene oxide polymer can be used as a membrane, in particular a proton conducting membrane.

Polymers comprising pyridyl groups have many applications, based on their basicity. When used in ion exchanging membranes or ion conducting membranes, these polymers must have a relatively rigid structure.
For example, it is known in the art to prepare crosslinked polymers comprising pyridyl groups by copolymerising polyvinylpyridine in the presence of divinyl monomers such as divinyl benzene. If more intricate shapes of the crosslinked polymers are desired, e.g. in films, shaping of the polymer must precede crosslinking. Very often linear poly(4-pyridine)s are then employed which are first formed into a film by e.g. casting and then crosslinked. In such a process, it is highly desirable that the crosslinking agent can mixed homogeneously into the polymer mass (melt or solution) to ensure a high homogeneity in the final product.
U.S. Pat. No. 3,770,666, incorporated by reference, discloses crosslinking of a copolymer of vinyl alcohol and 4-vinylpyridine via hydroxy groups by using chlorinated polyethylene oxide.
U.S. Pat. No. 4,474,869, incorporated by reference, discloses crosslinking of polyvinylpyridines by electron beam, ion beam or x-ray irradiation.
Hallensleben, Eur. Pol. J., 7, 1197-1203, 1971, incorporated by reference, discloses that the reaction of poly(4-vinylpyridine) with 2,3,5,6-tetrachlorocyclohexa-2,5-diene-1,4-dione (chloranil) or 2,3-dichloro-5,6-dicyano-cyclohexadiene-2,5-diene-1,4-dione (DDQ) produces black, insoluble products, whereas the reaction of poly(4-vinylpyridine) with tetracyanoethene produces an electron-donor-acceptor complex that is soluble in polar, aprotic solvents such as DMF and DMSO. It is suggested that tetracyanoethene is capable of reversibly crosslinking poly(4-vinylpyridine).
L. E. Bromberg and M. G. Goldfield, J. Phys. Chem. B, 101, 966-970, 1997, incorporated by reference, disclose electron transfer reactions between poly(4-vinylpyridine)/divinyl benzene gels and various quinone derivatives which result into the formation of additional crosslinks within the gels. The quinone derivatives investigated were 2,3,5,6-tetrachlorocyclohexa-2,5-diene-1,4-dione (chloranil), 2,3-dichloro-5,6-dicyano-cyclo-hexadiene-2,5-diene-1,4-dione (DDQ) and 7,7,8,8-tetracyanoquinodimethane.
WO 2009/096786, incorporated by reference, discloses novel phenol compounds and (co)polymers comprising these novel phenol compounds.
Accordingly, there is a need in the art for a process for crosslinking polymer comprising 3-pyridyl and/or 4-pyridyl groups.

Process for crosslinking a polymer comprising pyridyl groups


A powder actuated fastening tool including a charge advance apparatus for advancing a powder charge strip relative to a barrel of the tool, wherein the charge advance apparatus includes a rotatable ratchet having teeth for engaging receptacles formed in the powder charge strip, and a charge advance member coupled to a trigger of the tool, wherein the charge advance member acts on the rotatable ratchet to rotate the ratchet in response to actuation and/or release of the trigger, such that the rotation of the ratchet causes advance of the powder charge strip relative to the barrel.

It is has been previously proposed to provide a powder actuated fastening tool which operates on a strip of explosive powder charges to drive fasteners into a workpiece. It is necessary for the powder charge strip to be driven progressively through the tool such that the strip is moved through the tool so that successive charges are used for firing successive fasteners through a barrel of the tool. In this way, it is desirable that each of the powder charges in the strip is progressively depleted to drive the fasteners from the fastening tool.
However, the applicant has identified that there is a problem with existing powder actuated fastening tools in that the powder charge strip may not be accurately or adequately moved through the tool such that a charge may be out of alignment with the barrel, raising the problem of potentially having charges damaged by the tool or even activated outside of the barrel of the tool, which may be potentially dangerous or at least destructive to the tool.
Examples of the present disclosure seek to provide an improved tool with charge advance mechanism which may avoid or at least ameliorate disadvantages of existing powder actuated tools.


An example system can comprise a memory to store machine readable instructions. The system can also comprise a processing unit to execute the machine readable instructions. The machine readable instructions can comprise a service layer to generate an office machine security policy for a heterogeneous fleet of office machines. The heterogeneous fleet of office machines can comprise two different office machines. The service layer can also generate a security configuration for each office machine of the office machine fleet. The security configuration for a given office machine of the heterogeneous fleet of office machines can comprise a security setting for the given office machine. The machine readable instructions can comprise can also comprise a device layer to translate the security configuration of the given office machine into security instructions that are executable by the given office machine.

An MFP (Multi Function Product/Printer/Peripheral), multifunctional, all-in-one (AIO), or Multifunction Device (MFD), can be an office machine which incorporates the functionality of multiple devices in one, so as to have a smaller footprint and/or to provide centralized document management, distribution and/or production in an office setting. An MFP can act as a combination of some or all of a printer, a scanner, a photocopier, a fax machine and an e-mail client.
In computing, a security policy can be a set of rules that are enforced by organizational policies and/or security mechanisms. A technical implementation of a security policy defines whether a system is secure or unsecure.

HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.


A kit and devices for operating a spigot of a portable liquid container with a foot pedal, including a foot control member; a spigot having a valve body, a shaft, and a button member; and a spigot control device coupled to the foot control member with a flexible cable.

1. Field of Invention Background
The invention relates to spigots of a portable liquid container.
2. Prior Art
References Cited
U.S. Patent Documents4,052,035 November 1977 Kenny-Armstrong3,536,294 October 1970 Rodriquez6,126,046 October 2000 Baculy5,297,774September 1979 Medlock5,029,806July 1991 Chuang
This invention relates to spigots of portable liquid containers, specifically providing a means to allow users to operate the spigot hands free by using a remotely controlled foot device. Portable liquid containers are made with a spigot located near the bottom of the container for dispensing the contents of the container. These spigots are constructed either with a button on top, with a shaft and valve moving vertically with respect to the body of the spigot, or they have a button on the side with a shaft and valve that move horizontally with respect to the spigot body. These spigots require at least one hand to press the spigot button to open the valve. Most of the time, both hands are needed to operate these spigots. One hand is needed to press the spigot button, the other hand is needed to hold a cup, receiving container, or other object below the spigot while it is being filled or washed.
These portable containers are often placed in public places and used by many people. Frequently dirty hands touch the spigot leaving the spigot dirty. In addition, these dirty hands on the spigot could create an enormous and dangerous risk for contamination and spreading infectious diseases. When the containers are used beverages, the dirty spigot will be very unappealing. No one wants to touch the spigot or get a drink if a previous user coughed or sneezed into his hand and then used that hand to open the spigot.
Another problem is that these spigots on portable liquid containers can be hard to operate. These spigots are placed near the bottom of the container which makes them hard to see and locate. These spigots also have very stiff springs so the buttons on them are hard to press. They are especially difficult to operate by children and people with weak hands.
The most common way to use the spigot is to hold a cup or other receiving container under the spigot with one hand. The other hand is needed to operate the spigot. Both hands are needed to perform this simple task. With both hands occupied, frequent spills occur.
Portable containers are frequently used where other sources of clean water are not available to wash hands, food and other objects. The spigots on the containers are difficult to use for washing hands or other objects because one hand is needed to operate the spigot so only one hand is available for washing.
The embodiments of the invention in this application have solved all these problems, by providing a means for operating a spigot and dispensing liquid from a portable container using a foot controlling device. With an embodiment of this invention attached to the spigot, users are able to activate the spigot valve by using only their foot. Since the spigot is activated with the foot, both hands are left completely free to hold a receiving container or other items. Using the foot, a person is able to apply greater force than with fingers so children and those with weak hands can easily open and close the spigot. Since hands are free to securely hold other things, there are fewer spills and messes to clean up. Since the foot is used to control the spigot, there is no need for a user to touch the spigot, therefore the spigot is kept clean and free from germs. There is less chance for spreading disease. The container will be more inviting, because users will not be concerned about whether a previous user had touched the spigot and left dirt or disease causing germs. The remote operation of the spigot with the foot also allows the user to put both hands under the spigot while the liquid flows over both hands for a thorough cleaning Foot control of the spigot also allows for thorough cleaning and rinsing of utensils, food or other objects. This can be very important in a remote area where clean running water is not available.
Methods of dispensing liquids using a foot-activated device exist, as shown in prior art such as U.S. Pat. No. 4,052,035 issued Oct. 4, 1997 but these devices are not portable. They are not used to activate the spigot of portable container. They are not easily attached or removed from the spigot of the portable container. Instead, they are meant to be used with a facet that is not portable and is part of permanent fixture. These facet adapters are usually permanently attached to a floor or wall, and become a permanent fixture of a building. Embodiments of this invention are used with a portable container and utilize the spigot already installed on portable containers. The container is moved to the desired location like a table or counter top. Once in place the embodiments are easily and quickly attached to the spigot of the container. The foot control is placed on the floor or ground below the container. Since the embodiments are quickly and easily attached and removed from the spigot of the container, the container can be easily moved, refilled, cleaned or put away.
Other inventors have recognized the difficulty of using the spigot of a portable container with stiff springs. They have sought to improve the spigot by mounting a large handle to the spigot such as in invention U.S. Pat. No. 6,126,046 issued Oct. 3, 2000. While this device may make the spigot easier to open and close, the foot is able to apply much greater force. Using the foot to open the spigot with stiff springs is an enormous improvement over the handle method that was used in prior inventions. Also with these inventions, hands are still required to operate the spigot. The lever on these inventions can be moved to a position where liquid runs from the container continuously, but hands are still required to begin and end the flow of liquid. Those inventions do not operate totally hands free nor do they operate remotely with the use of a foot controlling device. Since hands are still needed to start and end the flow of liquid, all the potential risk for spilling and contaminating the spigot still exist. With hands touching the spigot area there is still a risk of accumulating germs and spreading disease. By using ones foot to operate the spigot, both hands can be used to hold other things while using the spigot. With remote foot operation, spigots and the container contents are kept clean and sanitary because they do not come into contact with dirty hands.

Spigot attachment operated with foot control device


A device and method for monitoring a light beam (e.g., laser beam) without intruding upon the light beam is disclosed. The device comprises a focusing lens which receives scattered light from a reflective or transmitting optical element and directs the scattered light to a photo detector. The photo detector generates one or more electrical signals which are proportional to an intensity distribution of the light beam for analysis by a processor. The analyzed electrical signals are then used to adjust a light beam source accordingly. The device may further comprise a display and printer for visually depicting the light beam characteristics.

Devices that monitor or measure energy, power or the spatial intensity profile of a light beam, such as a laser beam, have in the past been intrusive such that they intrude upon, and interrupt, the beam path in some fashion thereby extracting a portion of the energy power from the beam. In many cases the entire beam must be directed into a beam energy power meter or spatial energy intensity profile camera.
In high volume production manufacturing facilities using high power laser beams for materials processing applications, including laser welding, laser cutting, laser heat treating and laser free forming, laser power is routinely and continuously monitored. However, by intrusively dissecting a main primary laser beam and directing the dissected portion into a power meter, the routine and continuous monitoring results in a portion of the usable laser power being sacrificed. In these facilities the beam spatial intensity profile is only monitored or checked infrequently, and not on a continuous basis, because this procedure requires a costly interruption or stoppage of production of the company's products.
Because the quality of laser processed products is highly dependent on laser beam power and precise beam profile control it is desirable to non-intrusively and continuously monitor laser beam parameters while maintaining an ability to immediately make changes or compensations when the parameters unacceptably fluctuate or change over time. The embodiments of the present invention solve the aforementioned problems by non-intrusively monitoring only the unused small portion of scattered light or laser light that is conventionally lost off the surface of an optical lens or mirror that is typically required to reside in the beam path to accomplish the intended laser process application.
As described below, the patent literature includes numerous examples of light monitoring devices.
U.S. Pat. No. 4,842,404 discloses a system for monitoring the energy power in a light beam resulting in the least amount of intrusion into the light beam as possible. However, even with the system disclosed, a "beam splitter" optic is placed into the primary beam path to reflect a substantial portion of the beam into an orthogonal axis for directing it into an energy power meter while a majority of the primary beam is allowed to pass through.
U.S. Pat. No. 5,523,837 describes an "essentially non-intrusive laser power meter." However, the invention utilizes a "beam splitter" that is intrusively placed into the beam path splitting off 1% to 5% of the beam which is then directed into a silicon photodiode power meter.
U.S. Pat. No. 4,792,690 discloses a laser beam monitoring device utilizing a transmitting crystal optic intrusively placed into the beam path that produces a color pattern that corresponds to the laser beam intensity distribution profile. U.S. Pat. No. 6,396,062 discloses a laser beam monitor that requires placement of a fluorescent screen into the primary laser beam path such that the screen is monitored by a camera wherein the images captured by the camera may then be displayed on a computer screen.
U.S. Pat. No. 4,745,280 discloses a laser beam profiling apparatus that requires intrusive attenuation of the beam accompanied by a device that scans the attenuated beam across a photo sensor which produces an electric signal proportional to the beam intensity so as to permit adjustment of the oscillation mode of the laser beam to achieve an efficient beam. U.S. Pat. No. 4,764,655 discloses a device to monitor the size of the focused laser beam and to perform a closed loop adjustment through a robot when necessary.
Each of the above-described devices is intended to monitor or measure the power level or beam mode quality of the light beam but each device is intrusive. A possible exception is an expensive custom made diffraction grating mirror, but such mirrors typically extract noticeably usable and excessive quantities of power from the primary beam. The embodiments of the present invention comprise non-intrusive devices which do not extract more energy power from the primary beam than would typically be lost to scatter.


A method including forming a first dielectric layer above a conductive pad and above a metallic structure, the conductive pad and the metallic structure are each located within an interconnect level above a substrate, forming a first opening and a second opening in the first dielectric layer, the first opening is aligned with and exposes the conductive pad and the second opening is aligned with and exposes the metallic structure, and forming a metallic liner on the conductive pad, on the metallic structure, and above the first dielectric layer. The method may further include forming a second dielectric layer above the metallic liner, and forming a third dielectric layer above the second dielectric layer, the third dielectric layer is thicker than either the first dielectric layer or the second dielectric layer.

The present invention relates to a semiconductor structure, and particularly, to an integrated crackstop structure.
In the manufacture of semiconductor devices, a plurality of integrated circuits are simultaneously prepared in a semiconductor wafer through the use of conventional photolithographic techniques. Thus, for example, a wafer may contain multiple separate integrated circuits which have been formed on the substantially planar surface area of the wafer according to conventional techniques. It is also convenient to provide a plurality of secondary devices such as contact pads, test monitor devices, and devices for measurement and alignment on the planar surface adjacent the outer perimeter of each integrated circuit or other semiconductor device. Each single integrated circuit is of relatively minute dimensions so that it is convenient to simultaneously form a plurality of them in a single wafer while marking the boundaries between the individual devices along perpendicular axes referred to as dicing lines or a kerf region. Since the dicing area is a region cut by a metal rotary blade, an element of an IC (hereinafter referred to as a function element) is not formed in this region, but a test element for testing the function element or an alignment mark for mask alignment is often formed there.
In accordance with techniques well known in the art, after a semiconductor wafer has been formed into interconnected semiconductor devices, the chips are tested to identify those which are satisfactory and those improperly formed or malfunctioning and unsatisfactory. As mentioned earlier, it is common practice to put test, measurement, alignment and die seal structures in the kerf region. After testing, adjacent satisfactory chips are left joined together while unsatisfactory chips are separated or the entire wafer is separated and the unsatisfactory chips are discarded. Separation (or dicing) may be performed by conventional techniques such as sawing or laser cutting along the dicing line.
One of the greatest problems of large scale integration is that of obtaining a high enough yield of devices from each wafer to be commercially profitable. As the number and complexity of devices per wafer increases, the yield often decreases proportionally. It is therefore highly desirable to minimize the number of devices that must be discarded as unsatisfactory.
One concern affecting yield is chip package interaction (CPI). A mismatch in the coefficient of thermal expansion between a chip and a laminate may lead to increased stress applied to the chip and result in mechanical damage to the chip. More specifically, the weaker high performance dielectric layers, for example lowK and UltralowK, are susceptible to such mechanical damage. This mechanical damage is detectable using Sonoscan imagery, and appears as a classic "white bump", with the damage closely affiliated with the solder connection through which the breaking stress is transferred.
White-bump mitigating structural modifications are a subject of considerable interest in today's chip manufacturing environment. Chip package interaction structural modifications may include thicker layers of polymer final passivation material (for example PSPI), which may function as a stress buffer. However, polymer passivation materials tend to have high internal stress, causing wafer bow when applied in thick blanket films. Customized discontinuous structures, such as PSPI Islands or annular bump pads, must be used to reap the benefits of a thick PSPI layer while at the same time limiting wafer bow.
Independently of these concerns, with newer technology nodes, there is a move towards elimination of the industry-standard aluminum pad for cost reduction. The aluminum pad is typically replaced with a copper "plug" which fills the final via structure. Copper Plug formation processes are generally incompatible with the thick-PSPI CPI structures described above. Simultaneous with all of these concerns is the requirement to create a chip-edge crackstop structure that will prevent microcracks from propagating through the dielectric layers of the chip.
More specifically, the dicing operation used to cut a semiconductor wafer into individual chips often induces microcracks in both the semiconductor substrate and the dielectric layers on top. Microcracks occurring in silicon substrates propagate very rapidly and tend to lead to failures that show up in the initial testing described above. Microcracks in dielectric layers propagate more slowly and tend to lead to delayed failures—often after the device is put in service in the field. Failures in the field are particularly expensive and disruptive.

Method of forming an integrated crackstop


A rail and supported panel assembly having first and second rail portions, each portion having a constant cross section defining an elongate recessed channel on an underside. Also included are a panel supported at a top edge, a post for supporting the rail portions, and a rail-to-post connection assembly located between the post and the rails. The connection assembly has a pair of partially overlapping arms movable with respect to each other about a pivot to accommodate a range of first and second rail portion alignment angles.

Barrier assemblies are provided for balconies, stairways, pathing, plazas, pool surrounds and many domestic, commercial and industrial applications. Many barrier constructions include a top rail, and if at an appropriate height, the rail is in the form of a handrail. A wide variety of post and rail designs, with and without infill panels are known. Existing designs suffer from a range of problems. For instance, with commonly used welded stainless steel handrails, the butt welds between lengths of stainless steel handrail require considerable on site work in order to provide an aesthetically pleasing and structurally sound continuous handrail. Some designs use unsightly bolts or other fixings. Other problems with existing designs include complexity of on site assembly, finger entrapment cavities and sharp edges. Where top rails, including handrails, are required to deviate from simple straight and right angle bend layouts, there is often a need for prefabrication to occur off site.
It is an object of the present invention to provide an assembly that overcomes at least some of the above-identified problems.

Handrail or top rail, post and panel assembly and connector therefor


A bicycle front derailleur includes a chain guide that is provided with a pushing element that is movable relative to the chain guide to assist in shifting a bicycle chain from a smaller front sprocket to an adjacent larger sprocket. The chain guide is part of a movable member that is movably coupled to a base member via a linkage assembly. The pushing element is rotatably coupled to the chain guide portion and activated by a chain to move relative to the inner chain guide member from a first position with the pushing element at rest to a second position in response to activation by the chain. The contact surface moves laterally outwardly into the chain receiving slot toward the outer chain guide member as the pushing element moves from the first position to the second position.

1. Field of the Invention
This invention generally relates to a bicycle front derailleur. More specifically, the present invention relates to a bicycle front derailleur that smoothly and reliably shifts a bicycle chain between the front sprockets of the drive train, and which aggressively shifts the bicycle chain to a larger front sprocket from a smaller front sprocket.
2. Background Information
Bicycling is becoming an increasingly more popular form of recreation as well as a means of transportation. Moreover, bicycling has become a very popular competitive sport for both amateurs and professionals. Whether the bicycle is used for recreation, transportation or competition, the bicycle industry is constantly improving the various components of the bicycle. One component or part of the bicycle that has been extensively redesigned over the years is the front derailleur. A front derailleur is typically mounted onto the bicycle frame adjacent to the front sprockets to shift the chain laterally between the front sprockets. Many bicycles have two or three front sprockets.
Generally, a front derailleur includes a fixed member non-movably secured to a bicycle frame, and a movable member supported to be movable relative to the fixed member. Typically, the fixed member is a tubular clamping member that is secured to the seat tube. Alternatively, the fixed member is sometimes coupled to the bottom bracket or coupled to a brazed-on mounting structure of the frame. In any case, the movable member typically has a chain guide with a pair of cage plates for contacting and moving a chain laterally between the front sprockets. The movable member is usually biased in a given direction relative to the fixed member by a spring. The movable member is usually moved relative to the fixed member by pulling and/or releasing a shift control cable that is coupled to the front derailleur. The movable member and the fixed member usually are interconnected through a plurality of pivotal links (i.e. a linkage assembly).
One problem with typical front derailleurs is that the chain is not always shifted from the smaller sprocket to the larger sprocket(s) as quickly (aggressively), smoothly and reliably as desired by some riders. Thus, undesirable audible clicking sounds can sometimes occur. Moreover, optimum power transfer from the rider to the bicycle might not be achieved during a front up shift (from smaller sprocket to larger sprocket) of the bicycle chain.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved bicycle front derailleur that overcomes the above mentioned problems in the prior art. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.


A battery pack comprises a set of battery cells, a battery cell holder holding the battery cells, at least one battery strap having a first end connected to a terminal of one of the battery cells and a second end extending from the battery cell holder, a printed circuit board having a first side and a second side, components mounted on the second side of the printed circuit board, a trace on the second side of the printed circuit board extending from one components to a contact connected to the trace and mated with the second end of the at least one battery strap. Multiple vias extend from the first side to the second side, and the contact comprises a first portion having a through hole and a leg integrally formed with and approximately perpendicular to the first portion, the leg extending from the first side of the PCB to the second side of the PCB through a first via, the trace extending from the first via, the leg soldered to the second side of the PCB and the via and the through hole aligned with a second via adjacent to the first via, the through hole sized and configured to receive a PCB end of the strap, the PCB end of the strap soldered to the contact.

Battery packs for cordless power tools may include a printed circuit board (PCB). Typically, the printed circuit board includes components and electrical traces on both sides of the board and test points on one side of the board. This enables the battery straps to be soldered to a via associated with a trace on a top side of the PCB (facing away from the cells/cell holder). This enables the battery strap to be soldered to the via (and electrically coupled to the trace) after the PCB has been combined with the cell holder. Having traces and/or test points and/or components on a side of a PCB requires a layer of copper on that side, etching the copper to remove any unnecessary copper and a coating layer to protect the traces. This adds significant cost in material and time to the production of the PCB.
In order to reduce the cost of the PCB one can have all of the traces on a single side of the PCB and attach all of the components to the same, single side of the PCB (i.e., not have any components attached to or traces on a second side of the PCB). For example, a component may be placed on a first (top) side of the PCB put a connection feature is received in a through hole of the PCB and the component—that is placed on the top side of the PCB—is connected to the PCB by the connection feature on the second (bottom) side of the PCB by way of solder, for example. In this manner, the battery pack terminals and all of the electrical/electronic components that need to be attached to the PCB can be wave soldered or otherwise attached to the PCB in a single pass.
FIGS. 1 and 2 illustrate an example battery pack 100. The battery pack 100 includes a housing 102. The housing 102 may include a top housing portion 104 and a bottom housing portion 106. The top and bottom housing portions may be held together by a plurality of fasteners, such as screws. The battery pack 100 may also include a latch 110 to mechanically couple the battery pack 100 to cordless, battery operated power tools or other cordless, battery operated devices.
FIGS. 3 through 5 illustrate a conventional battery pack which may include a housing illustrated in FIGS. 1 and 2. This battery pack includes a housing (only the bottom housing portion 306 being illustrated) and a battery corepack 300. The battery corepack 300 includes a PCB module 328 and a battery. The PCB module 328 includes a printed circuit board (PCB) 329, a plurality of battery pack terminals 332, a plurality of PCB traces 331 on a top side of the PCB wherein many of the PCB traces 331 lead to solder points 333 or test points on the top side of the PCB. The battery includes a battery cell holder 314, a plurality of battery cells, and battery cell straps 322 and 324 for coupling the battery cells to the PCB module 328.
As illustrated, in this battery pack the battery cell straps 322 and 324 include stamped metal contacts and wires soldered to the stamped metal contact and a soldered to the PCB 329. In this battery pack, when creating the PCB a layer of copper would have to be applied to the board and etched (removal of copper material) to provide the traces 331, solder points 333 and test points. This would result in a significant amount of wasted copper. The resulting traces 331 and solder points 333 allow the battery cell straps 322 and 324 to be soldered—or otherwise connected—to the PCB 329 after the PCB module 328 has been combined with the battery. The test points allow the corepack 300 to be tested after the PCB module 328 has been combined to the battery to insure that the corepack 300 meets the predetermined standards.
However, if there aren't any traces on the top side of the PCB (all of the traces of the PCB are on the bottom side/side facing the cell holder) then there aren't any contact points for the battery straps to be soldered to (in order to couple the battery cells to the various electrical/electronic components on the PCB) after the PCB has been combined with the cell holder. The below detailed description provides solutions that addresses this and other issues.


A method and apparatus for dynamic allocation of DMA buffers in the DRAM banks of an I/O adaptor. The method and apparatus determine the functional status of the adaptor, allocate critical, volatile DMA buffers in non-critical DRAM banks if the adaptor is fully functional, and allocate critical, volatile DMA buffers in critical DRAM banks if the adaptor is partially functional.

1. Technical Field
The present invention relates to input/output (I/O) adaptor optimization. More specifically, it relates to a method and system for allowing dynamic allocation of Direct Memory Access (DMA) buffers in DRAM banks of I/O adaptors.
2. Background Information
An I/O adaptor denotes a functional assembly that is adapted to provide an interface between a CPU and an input/output device or aggregate of devices adapted to compute, process, transmit, receive, retrieve, store, display, detect, record, reproduce, or utilize any form of information, intelligence or data. It acts as a translator between the computer and various input/output devices. I/O adaptors manage the communication between such devices and the computer so that the CPU is free to perform other tasks. I/O adaptors of one type or another can be found for diskette drives, hard drives, CD-ROM drives, Redundant Array of Independent Disks (RAID), high performance communications (e.g., Ethernet) and many other components.
Modern computer systems and networks require reliable and effective means for the processing, transmission, reception and storage of data. Customer requirements are usually highly application-dependent. For example, RAID systems vary in their interconnection architectures, physical packaging and dimensions, redundancy methods, fail-safe mechanisms, and the like. And the disk drives available for use within RAID systems also vary in their physical specifications, storage capacities, performance capabilities, and electrical interfaces. Therefore, a great deal of flexibility is required of I/O adaptors. I/O adaptors must also have good fault tolerance. A defective component of the I/O adaptor thus should have no or only minimum impact on the whole adaptor.
DMA is the hardware mechanism that allows peripheral components to transfer their I/O data directly to and from main memory without the need to involve the system processor. Use of this mechanism can greatly increase throughput to and from a device, because a great deal of computational overhead is eliminated. Data transfer can be triggered in two ways: either the software asks for data or the hardware asynchronously pushes data to the system. In either case, the driver method allocates a DMA buffer so that the data can be effectively transferred between system memory and I/O devices. A DMA mapping is a combination of allocating a DMA buffer and generating an address for that buffer that is accessible by the device.

Dynamic allocation of DMA buffers in input/output adaptors

International Business Machines Corporation