A pacemaker generates and transmits real-time intracardiac electrogram signals to an external display device for display thereon. Simultaneously, the pacemaker senses a variety of events occurring either within the heart tissue or within the pacemaker itself and transmits signals representative of those events for display, using appropriate marker icons, along with the intracardiac electrograms. In this manner, a physician viewing the intracardiac electrograms is simultaneously apprised of the various events. In one example, events displayed along with the intracardiac electrograms include the detection of atrial and ventricular events occurring within the heart during a non-absolute refractory period following generation of a stimulation signal. Other examples of events displayed along with the intracardiac electrograms include operations triggered within the pacemaker as a result of the condition of the patient, such as an auto-mode switching event, or operations triggered within the pacemaker as a result of the condition of the pacemaker itself, such as a battery test operation. Still other examples of events include pacemaker programming operations triggered using a remote programming device by a physician. Such events include an electrophysiological artificially-induced arrhythmia operation. In the described example, the external display device also presents surface electrocardiograms along with the intracardiac electrograms and the event marker icons.

A wide range of implantable medical devices are provided for surgical implantation into humans or animals. One common example is the cardiac pacemaker. Another is the implantable cardioverter defibrillator. Other examples include devices for stimulating or sensing portions of the brain, spinal cord, muscles, bones, nerves, glands or other body organs or tissues.
Implantable medical devices, particularly pacemakers, are often configured to be used in conjunction with an external programmer device which allows a physician to display information sensed by the device. For a pacemaker, for example, the external programmer device may operate to display electrical cardiac signals detected by the pacemaker in the form of IEGM's and ECG's. An IEGM is a graphic depiction of electrical signals emitted by active cardiac tissue as detected by electrodes placed on or in the heart. An ECG is also a graphic depiction of the electrical signals emitted by active cardiac tissue but is detected using electrodes placed on the body surface rather than in or on the heart itself.
One example of an external programmer that displays IEGM's and ECG's is an analyzer-programmer system (APS) identified as the APS II system which is provided by Pacesetter Inc. of Sylmar, Calif. More specifically, the APS II system displays IEGM's and surface ECG's in conjunction with icons representative of paced and sensed atrial and ventricular events such as atrial stimulus, ventricular stimulus, atrial activity outside atrial refractory/blanking period, ventricular activity outside ventricular refractory/blanking period, and the length of atrial refractory period. The APS II system also displays variable length horizontal lines representative of the length of the atrial and ventricular refractory periods and also displays numerical values indicative of measured intervals between the atrial and ventricular events. Further information regarding the detection and display of IEGM signals may be found in U.S. Pat. No. 5,620,473 to John W. Poore entitled "Calibration System for Pacemaker-Generated Intracardiac Electrogram" which provides for the display and calibration of IEGM signals. U.S. Pat. No. 5,620,473 is also incorporated by reference herein.
Other components of the APS II system of Pacesetter Inc. operate to allow a physician to program the operation of the pacemaker to, for example, control the specific parameters by which the pacemaker senses the IEGM signals and the manner by which the pacemaker detects arrhythmia conditions within the heart and responds thereto. For example, the APS II system allows the physician to specify the sensitivity with which the pacemaker senses electrical signals within the heart and to further specify the amount of electrical energy to be employed for pacing the heart in circumstances where expected heart signals are not sensed. Still other components of the APS II system operate to display a variety of diagnostic information received from the pacemaker. More specifically, the APS II system displays the different types of diagnostic information set forth in TABLE I.
TABLE I ______________________________________ EVENT NAME EVENT TYPE ______________________________________ AV A-pulse followed by a V-pulse AR A-pulse followed by an R-wave PVE Premature ventricular event PV P-wave followed by a V-pulse PR P-wave followed by an R-wave P@MTR-V P-wave at maximum tracking rate followed by a V-pulse P@MTR-R P-wave at maximum tracking rate followed by a R-wave MAGNET Magnet placed over the implanted device--either singly or in combination with an external telemetry system ______________________________________
U.S. Pat. No. 5,431,691 to Snell et al. entitled "Method and System for Recording and Displaying a Sequential Series of Pacing Events" provides a detailed description of the operation of the APS II system of Pacesetter Inc. including a description of the processing and displaying of the diagnostic information set forth in TABLE I. In particular, the Snell et al. patent describes a technique whereby the pacemaker processes and records diagnostic data in the form of "event records" which allow the data to be efficiently stored within the pacemaker, transmitted to the APS II system, and displayed. U.S. Pat. No. 5,431,691 to Snell et al. is incorporated by reference herein.
As can be seen from TABLE I, the events processed by the APS II system are primarily events sensed within the heart of the patient. Event records containing information pertaining to those events are recorded within the pacemaker for subsequent transmission to the external programmer for display thereon in a variety of formats including event record displays, event bar graphs, rate bar graphs, rate time graphs, and event time graphs, each under the control of the physician operating the external programmer. More specifically, the event record display presents the various detected events of TABLE I and the corresponding pacing rate with respect to the time of the occurrence of the event. For periods of time while the pacemaker is in a dual-chamber mode (such as DDD, DDI etc.), the events presented include PV, PR, AV (or V when the mode is VDDR or VDD), AR and PVC (premature ventricular contraction). For periods of time while the pacemaker is in a single-chamber mode (such as VVI, AAI etc.), the events are presented merely as paced or sensed. The event bar graph presents a histogram of different event types listing the total number of counts of each event type for a selected period of time. The event time graph presents histograms of event types vs. time of event occurrence. The rate bar graph presents histograms of sensed and paced events vs. their rate. The rate time graph presents histograms of rates vs. times. Further information regarding the different displays may be found in the Snell et al. patent.
As can be appreciated, a wide range of useful information, particularly directed to events sensed within the heart, is thereby provided to assist the physician in rendering a diagnosis as to any arrhythmia or other condition the patient may exhibit or to assist the physician in making choices as to adjusting various parameters by which the pacemaker monitors and paces the heart. The information is displayed in a variety of convenient graphical formats to help the physician visualize the information quickly and easily to facilitate prompt and accurate diagnoses.
The parent application referenced above describes various improvements to the APS II system. For example, the parent application describes improvements wherein the system records and displays numerous additional types of diagnostic data including data pertaining to 1) operational events triggered within the pacemaker as a result of the condition of the patient (such as automode switching events) and 2) operational events triggered within the pacemaker as a result of the condition of the pacemaker itself (such as battery tests or lead fault detection tests). The additional diagnostic data is displayed as part of one or more of the aforementioned event record displays, event bar graphs, rate bar graphs, rate time graphs, and event time graphs.
Although the system described in the parent application, which displays the additional diagnostic information in conjunction with event records, represents an improvement over the ASP II system, further room for improvement remains. In particular, it would be desirable to also display at least some of the additional types of event record diagnostic information in conjunction with the aforementioned IEGM and surface ECG displays to allow the physician to view the additional event record diagnostic information while simultaneously viewing IEGM's or ECG's and it is primarily to that end that the present invention is directed.

Method and apparatus for detecting and displaying diagnostic information in conjunction with intracardiac electrograms and surface electrocardiograms


Disclosed is a process for the continuous preparation of a polyester-based polymer having excellent quality which is useful as materials for medical care, coatings, and wrapping. In the process for the continuous preparation, a column-type continuous reactor is essentially employed.

A polyester-based polymer such as a bimolecularly cyclized ester, e.g., dilactide and glycolide, a monomolecularly cyclized ester, e.g., lactone, and a copolymer thereof (hereinafter, referred to as "polyester-based polymer") are decomposed by light, heat, oxygen, and the like, and those are entered into a natural recirculation system. Therefore, many investigations have been recently conducted for the uses as a biodegradable polymeric material from the viewpoint of safeness and prevention of global environmental pollution.
As a process for the preparation of a homopolymer of dilactide or diglycolide which is a bimolecularly cyclized ester, there have been conventionally known preparation processes which are divided into two groups.
That is, one of the processes is a method for directly obtaining a polymer by dehydropolycondensation of the corresponding hydroxycarboxylic acids. The other is a method for obtaining a polymer by synthesis of a dehydrated cyclic ester of a hydroxy acid known as examples of dilactide and diglycolide, and then by the ring opening polymerization of the ester to obtain a polymer.
According to the former direct polycondensation method, it is difficult to obtain a polymer having a molecular weight of not less than 4,000 ("Lactic acid" in Veriag Chemie, page 226, 1971, which is written by C. H. Halten) and, even though an attempt is conducted for increasing the molecular weight by studies of the reaction conditions, the molecular weight is limited in approximately 20,000 at largest as shown in JP-B-02052930. In the case that there is required the preparation of a polymer having a higher molecular weight, there has been conventionally employed the latter method which is the ring opening polymerization of a cyclic esterified product.
Further, as a continuous process for the preparation of the lactides or lactones, a continuous process for the preparation of aromatic polyester and lactones is disclosed as "a continuous process for the preparation of an elastic polyester" in JP-A-61261124, JP-A-61283619, JP-A-61287922, JP-A-62020525, and JP-A-62027425 Official Gazettes and "a process for the preparation of an elastic polyester" in JP-A-02302433 and JP-A-02302434 Official Gazettes. In all the processes, there are equipped screw-type or paddle-type agitating blades such as a kneader or an extruder in an inside of a reaction vessel, and a reaction system is agitated by the agitating blades while the reactants are sequentially moved from an inlet for feeding raw materials to an outlet for a product.
Still further, as a continuous process for the preparation of the lactides, JP-A-05093050 Official Gazette discloses a so-called CSTR continuous preparation process in which a plurality of agitating vessels are connected in series each other, and raw materials for the reaction are continuously supplied, whereby, a continuous polymerization is conducted within a retention time of period which is a reaction period between initial reaction vessel and final reaction vessel.
However, in all the processes, there is employed a reaction apparatus equipped with a dynamic agitator, and the processes do not give a disclosure and suggestion concerning a solution to difficulty in uniform agitation and difficulty in heat removal caused by an elevation in the viscosity of the reactants through the continuous preparation of a biodegradable polyester-based polymer having a higher molecular weight from lactides or lactones.
That is, even though there are tried the continuous processes for the preparation of the lactides in the JPs or literature as described hereinabove, viscosity in the polymer elevates to a very high viscous region such as 10,000-several hundred of thousands poise with an increase of an average molecular weight in the polymer produced, resulting in that agitation by a usual agitator becomes difficult, and it becomes difficult to take out reactants. Also, even though a powerful agitator is employed, and a reaction system is agitated by employing agitation blades devised, the reactants move only in a substantially laminar flow according to the rotation of the agitation blades, resulting in that it becomes difficult to uniformly mix an inside of a reaction system as a whole.
In addition, since the ring-opening polymerization of cyclic esters exothermally proceeds, it becomes difficult to control a temperature in a reaction vessel by difficulty in uniform agitation because of an increase in viscosity, whereby, the reaction occasionally proceeds in an abnormal state, and temperature distribution is also caused in the reaction system, resulting in that deterioration in quality of a polymer is caused by being locally heated.
In recent years, in order to solve the problems, there has been employed (for example, U.S. Pat. No. 5,484,882) a static mixer (hereinafter, referred to as SMX) which does not have a movable part, that is, an agitator. However, flow resistance becomes very large because of a structure by which flow is repeatedly divided, converted, and reversed by unmovable mixing elements.
In other words, pressure loss becomes very large in a reaction system, and it becomes difficult to design a reaction vessel and pumps, etc. Moreover, decline in productivity is caused by an upper limit in discharging pressure.
In the case that the SMX is employed, there is possible only a most suitable design for a specified operation condition because of the absence of a movable part by which mixing, that is, shear rate is controlled, and mixing cannot be controlled in other operation conditions, that is, almost of operation conditions, resulting in that an operation cannot help being conducted while including inferiority in mixing and thermal distribution which always exceed a range. Further, in order to lower a higher pressure loss, in the case that there increases a diameter of the SMX, that is, area of a section through which a fluid passes, inferiority in mixing and thermal distribution become exceedingly large. Although the SMX is occasionally employed as a continuous reaction apparatus which is a recirculation style in order to avoid inferiority in mixing and thermal distribution, and a mixing effect is improved by repeatedly recirculating, there is enlarged a distribution of retention period in an inside of a reaction vessel, and there cannot be avoided deterioration of quality such as decomposition and discoloration in a polymer by a long time heating. Still further, because flow volume increases in a recirculating line, a plant becomes gigantic, plant costs become very expensive, and it is not practical.
Also, there is disclosed a process (eg. U.S. Pat. Nos. 5,378,801 and 5,468,837) in which an extruder is employed for polymerization of a polyester-based polymer. In the process, in the case that polymerization is conducted in an industrial scale, there is a problem that it is difficult to remove heat, resulting in that quality in a polymer becomes occasionally worse.
Particularly, the polyester-based polymer prepared from a cyclic ester has an excellent biodegradability. However, it is readily hydrolyzed by acids, alkalis, or water, and there is apt to be caused a decline in a molecular weight also by heating. For example, in GUPTA M. C., "Colloid Polymer Science", (Deu) 260 (3) 308-311, 1982, there is reported an investigation example of thermal decomposition rate in a homopolymer of dilactide by a thermogravimetric analysis. However, there is caused an accelerated decline in a molecular weight at high temperatures such as not less than 250.degree. C. even in a hermetically sealed reaction vessel.
In addition, the homopolymer or copolymer of dilactide has a property that discoloration proceeds by being exposed to high temperature. That is, in the conventional process for the continuous polymerization of polymers from cyclic ester monomers, uniform mixing is prevented because of an increase of viscosity in the polymers caused by an increase of molecular weight, resulting in causing a problem that denaturation is partially caused by being locally heating, and quality is lowered.
Accordingly, setting aside a small scale experiment, there has been desired a more preferred process for an industrial mass production. It is a purpose of the present invention to provide a continuous process for the preparation of a polyester-based polymer having an excellent quality, by which there can be solved a difficulty in uniformly mixing caused by an increase of viscosity in reactants, a difficulty in removal of heat, and a decline in productivity by a high pressure loss, and which would become problematic in the case of industrially preparing the polyester-based polymer.

Continuous process for the preparation of a polyester-based polymer


A switching power supply 10 includes snubber capacitors 8Cb and 8Cc connected in parallel with rectifying devices 4b and 4c, respectively, on the secondary side of a transformer 3. A switching control circuit 7 controls the switching of four switching sections 1H, 1L, 2H, and 2L. In particular, the primary current It of the transformer 3 is cut off while the secondary current flowing through a smoothing inductor 5 decreases. Furthermore, when the primary current It of the transformer 3 is cut off, one of the high-side switching section 1H/2H and the low-side switching section 1L/2L that are ON is turned OFF a delay time later than the other. Then, resonance occurs between the equivalent capacitance of the snubber capacitor 8Cb/8Cc and the leak inductance on the secondary side of the transformer 3 with the primary winding 3a short-circuited, and thereby, commutation on the secondary side is quickly achieved. In other words, the equivalent primary current of the transformer 3 is quickly and sufficiently cancelled. Thus, the primary current It is quickly reduced, immediately before the cut-off.

The present invention relates to a switching power supply for supplying a stabilized DC voltage to industrial or consumer electronics equipments.
A power supply for a television set, a VTR, a personal computer, and so on, is required to stably supply a steady DC voltage. A switching power supply is preferable as such a power supply. The switching power supply uses semiconductor devices, e.g. MOSFETs, IGBTs, and thyristors, as switches to once convert an input DC voltage into an AC voltage by repeated cycles of ON/OFF states of the switches. The converted AC voltage is further converted into a steady DC voltage through the sequence of a transformer, a rectifying circuit, and a smoothing circuit, and the steady DC voltage is then output. In the switching power supply, a transfer factor, i.e. the ratio of the output voltage to the input voltage, is substantially determined by the duty factor of the switches. Accordingly, the switching power supply controls the duty factor of the switches by the control over the switches, and thereby stabilizes the output DC voltage.
Since a switching loss, i.e. the power loss caused by switching, is generally small, the switching power supply can supply power at high efficiency. Hence, the switching power supply is excellent for energy saving.
The transfer factor of the switching power supply substantially depends on only the duty factor of the switches, but does not substantially depend on the switching frequency, i.e. the frequency of the turning ON/OFF of the switches. Furthermore, in the switching power supply, when the switching frequency is raised higher, reactive elements, such as transformers, inductors, and capacitors, is miniaturized with the respective performances of the elements preserved. Therefore, the switching power supply is miniaturized with relative ease, maintaining a steady output voltage.
The following is the description of a switching power supply performing hard switching that is an example of a conventional switching power supply. FIG. 6 is the circuit diagram of the conventional switching power supply 100.
In the switching power supply 100, four switching sections 101H, 101L, 102H, and 102L, form a full-bridge on the primary side of a transformer 3. The switching sections 101H and 102H connected to a high-potential input terminal 1a of the full-bridge are referred to as high-side switching sections. The switching sections 101L and 102L connected to a low-potential input terminal 1b of the full-bridge are referred to as low-side switching sections. The four switching sections include respective switching devices 1HS, 1LS, 2HS and 2LS. These switching devices are semiconductor devices, for example, IGBTs. The four switching sections include respective parasitic capacitors 1HC, 1LC,2HC and 2LC, in parallel with the switching devices. A switching control circuit 70 controls the turning-ON/OFF of the four switching sections.
FIG. 7 is a diagram showing the waveforms of the currents and voltages occurring at various sections of the circuit shown in FIG. 6, according to the hard switching by the switching control circuit 70. In this diagram, positive directions of the currents and voltages at the various sections of the circuit are defined as.
The switching control circuit 70 outputs switching signals G1, G2, G3, and G4 to the switching devices 1HS, 1LS, 2HS, and 2LS, respectively. The switching signals G1, G2, G3, and G4 are rectangular waves. Each switching device is ON during the interval that the switching signal corresponding thereto stays high (H), and OFF during the interval that the switching signal stays low (L).
The switching control circuit 70 performs hard switching for the turning ON/OFF of the four switching sections. Here, hard switching refers to the switching for the simultaneous turning-ON/OFF between one of the high-side switching sections and one of the low-side switching sections. In the hard switching of the switching control circuit 70, the following three periods are sequentially achieved with predetermined time lengths and predetermined cycle periods: (1) A first period corresponds to the period T0-T1 in FIG. 7. During the first period, the first high-side switching section 101H and the second low-side switching section 102L are ON, and the second high-side switching section 102H and the first low-side switching section 101L are OFF. (2) A second period corresponds to the period T2-T3 in FIG. 7. During the second period, the first high-side switching section 101H and the second low-side switching section 102L are OFF, and the second high-side switching section 102H and the first low-side switching section 101L are ON. (3) A third period corresponds to each of the period T1-T2 and the period T3-T4, and is achieved during intervals between the first period and the second period. During the third period, all the four switching sections are OFF.
The following is the description of the hard switching of the switching control circuit 70 in the time sequence from the time T0 to the time T4 shown in FIG. 7.
 less than Period T0-T1 greater than
At the time T0, the switching control circuit 70 simultaneously changes the first switching signal G1 and the fourth switching signal G4 from L to H, thereby turning ON the first high-side switching section 101H and the second low-side switching section 102L. On the other hand, the first low-side switching section 101L and the second high-side switching section 102H are both OFF.
During the period T0-T1, a substantially steady and positive input voltage Vin is applied across the primary winding 3a of the transformer 3 via the first high-side switching section 101H and the second low-side switching section 102L. Thus, a primary voltage Vt, i.e. the voltage across the primary winding 3a, is substantially equal to the input voltage Vin. Furthermore, the primary current It of the transformer 3 flows from the first junction point P to the second junction point Q of the primary winding 3a. In other words, the primary current It flows in the direction of the arrow shown in FIG. 6. Then, a positive voltage Vin/n is induced across each of the first secondary winding 3b and the second secondary winding 3c of the transformer 3.
Here, the turn ratio of the primary winding 3a, the first secondary winding 3b, and the second secondary winding 3c of the transformer 3 is n:1:1, where n is a positive real number. Since a first rectifying diode 4b is ON, the voltage V5 across a smoothing inductor 5 is substantially equal to Vin/nxe2x88x92Vout. Here, an output voltage Vout, i.e. the voltage across a smoothing capacitor 6, is positive. The output voltage Vout may be assumed to be substantially steady, since the smoothing capacitor 6 has a sufficiently large capacitance. Accordingly, the current I5 flowing through the smoothing inductor 5 increases linearly in the direction of the arrow indicated in FIG. 6 during the period T0-T1. Note that the current 15 increases slowly, since the inductance of the smoothing inductor 5 is sufficiently large. The voltage Vc across a second rectifying diode 4c is substantially equal to +2Vin/n, where the positive direction of the voltage is defined as the direction of the arrow shown in FIG. 6, i.e. the direction of the reverse bias applied to the diode. Accordingly, the second rectifying diode 4c is OFF. Therefore, the current 15 of the smoothing inductor 5 is substantially equal to the current Ib flowing through the first rectifying diode 4b. As a result, during the period T0-T1, the secondary current of the transformer 3 flows only through the first secondary winding 3b, and increases linearly.
The primary current It of the transformer 3 is equal to the sum of the exciting current for the transformer 3 and the equivalent primary current depending on the secondary current of the transformer 3. As shown in FIG. 7, during the period T0-T1, the primary voltage Vt is maintained at the substantially steady value Vin. Accordingly, the exciting current in the primary current It linearly increases in substance. On the other hand, the equivalent primary current increases linearly, since the secondary current of the transformer 3 increases linearly as described above. As a result, the primary current It linearly increases in substance.
 less than Period T1-T2 greater than
At the time T1, the switching control circuit 70 simultaneously changes the first switching signal G1 and the fourth switching signal G4 from H to L, thereby turning OFF the first high-side switching section 101H and the second low-side switching section 102L. All the four switching sections are thus OFF. Accordingly, the input voltage Vin is not applied across the primary winding 3a of the transformer 3. In other words, the primary voltage Vt of the transformer 3 abruptly drops from the input voltage Vin to zero. Therefore, the respective induced voltages across the secondary windings 3b and 3c of the transformer 3 abruptly change to zero. Then, the voltage Vc across the second rectifying diode 4c abruptly changes to zero, since the first rectifying diode 4b is already ON. Accordingly, the second rectifying diode 4c is abruptly turned ON. As a result, the secondary current of the transformer 3 begins to flow through both of the first secondary winding 3b and the second secondary winding 3c. Thus, at the time T1, commutation occurs on the secondary side of the transformer 3.
During the period T1-T2, no voltage is applied across the primary winding 3a of the transformer 3, and the primary voltage Vt is thereby zero. Thus, no voltage is induced across the secondary windings 3b and 3c of the transformer 3. The voltage V5 across the smoothing inductor 5 is substantially equal to a negative steady voltage xe2x88x92Vout. As a result, the current I5 of the smoothing inductor 5 decreases linearly with a slight inclination.
At the time T1, the primary current It of the transformer 3 abruptly decreases to zero, since all the four switching sections are OFF. Accordingly, during the period T1-T2, the secondary current of the transformer 3 flows through each of the two secondary windings 3b and 3c, wherein one part of the secondary current flowing through the first secondary winding 3b is substantially equal in amount and opposite in direction to the other part flowing through the second secondary winding 3c, so that the equivalent primary current is zero.
 less than Period T2-T3 greater than
At the time T2, the switching control circuit 70 simultaneously changes the second switching signal G2 and the third switching signal G3 from L to H, thereby turning ON the first low-side switching section 101L and the second high-side switching section 102H. On the other hand, the first high-side switching section 101H and the second low-side switching section 102L are both OFF.
The input voltage Vin is applied across the primary winding 3a of the transformer 3 in the opposite direction to that during the period T0-T1, when the first low-side switching section 101L and the second high-side switching section 102H are ON. In other words, the primary voltage Vt of the transformer 3 abruptly drops from zero to xe2x88x92Vin. Accordingly, the induced voltage across each of the secondary windings 3b and 3c of the transformer 3 abruptly drop from zero to xe2x88x92Vin/n. Then, the second rectifying diode 4c is already ON. Accordingly, the voltage Vb across the first rectifying diode 4b is abruptly raised to +2Vin/n, where the positive direction of the voltage is defined as the direction of the arrow shown in FIG. 6, i.e. the direction of the reverse bias applied to the diode. Thereby, the first rectifying diode 4b is abruptly turned OFF. As a result, the secondary current of the transformer 3 begins to flow only through the second secondary winding 3c. Thus, at the time T2, commutation occurs on the secondary side of the transformer 3.
During the period T2-T3, the first low-side switching section 101L and the second high-side switching section 102H are ON. Accordingly, the primary voltage Vt is substantially equal to xe2x88x92Vin. Furthermore, the primary current It of the transformer 3 flows from the second junction point Q to the first junction point P of the primary winding 3a in the opposite direction to that during the period T0-T1. Then, the voltage across each of the first secondary winding 3b and the second secondary winding 3c is substantially equal to xe2x88x92Vin/n. Since the first rectifying diode is OFF and the second rectifying diode is ON, the voltage V5 across the smoothing inductor 5 is substantially equal to Vcxe2x88x92Vout=Vin/nxe2x88x92Vout. Accordingly, the current I5 flowing through the smoothing inductor 5 linearly increases in the direction of the arrow shown in FIG. 6, in the similar manner to that during the period T0-T1. Since the first rectifying diode 4b is OFF, the current I5 of the smoothing inductor 5 is substantially equal to the current Ic flowing through the second rectifying diode 4c. In other words, during the period T2-T3, the secondary current of the transformer 3 flows only through the second secondary winding 3c and increases linearly.
As shown in FIG. 7, during the period T2-T3, the primary voltage Vt is maintained at the substantially steady value xe2x88x92Vin, in the similar manner to that during the period T0-T1. Accordingly, the exciting current in the primary current It linearly increases in substance. Here, the direction of the primary current It is opposite to that during the period T0-T1. On the other hand, the equivalent primary current increases linearly, since the secondary current of the transformer 3 increases linearly as described above. As a result, the primary current It linearly increases in substance.
 less than Period T3-T4 greater than
At the time T3, the switching control circuit 70 simultaneously changes the second switching signal G2 and the third switching signal G3 from H to L, thereby turning OFF the first low-side switching section 101L and the second high-side switching section 102H. Since all the four switching sections are thus OFF, the input voltage Vin is not applied across the primary winding 3a of the transformer 3. In other words, the primary voltage Vt of the transformer 3 is abruptly raised from the input voltage xe2x88x92Vin to zero. Therefore, the induced voltage across each of the secondary windings 3b and 3c of the transformer 3 abruptly changes to zero. Then, the voltage Vb across the first rectifying diode 4b abruptly changes to zero, since the second rectifying diode 4c is already ON. Thereby, the first rectifying diode 4b is abruptly turned ON. As a result, the secondary current of the transformer 3 begins to flow through both of the first secondary winding 3b and the second secondary winding 3c, in-the similar manner to that at the time T1. Thus, at the time T3, commutation occurs on the secondary side of the transformer 3.
During the period T3-T4, no voltage is applied across the primary winding 3a of the transformer 3, and the primary voltage Vt is zero. Accordingly, the voltage V5 across the smoothing inductor 5 is substantially equal to the negative steady voltage xe2x88x92Vout. As a result, the current I5 of the smoothing inductor 5 decreases linearly with a slight inclination.
Since all the four switching sections are OFF at the time T3, the primary current It of the transformer 3 abruptly decreases to zero. Accordingly, during the period T3-T4, the secondary current of the transformer 3 flows through each of the two secondary windings 3b and 3c, wherein one part of the secondary current flowing through the first secondary winding 3b is substantially equal in amount and opposite in direction to the other part flowing through the second secondary winding 3c, so that the equivalent primary current is zero, in the similar manner to that during the period T1-T2.
Thus, the state immediately before the time T0 reoccurs in the period T3-T4. After that, the above-described operations during the period T0-T4 are repeated in cycle.
In the hard switching of the switching control circuit 70, the transfer factor, i.e. the ratio of the input voltage Vin to the output voltage Vout, is determined as follows:
Let Ton to be the sum of the time lengths of the first period T0-T1 during which the first high-side switching section 101H is ON, and the second period T2-T3 during which the second high-side switching section 102H is ON. Since the voltage (Vin/nxe2x88x92Vout) is applied across the smoothing inductor 5 during the first and second periods, the magnetic flux to be stored in the smoothing inductor 5 increases by (Vin/nxe2x88x92Vout)xc3x97Ton.
On the other hand, let Toff to be the sum of the time lengths of the period T0-T1 and the period T2-T3, during which all the switching sections are OFF. Since the voltage (xe2x88x92Vout) is applied across the smoothing inductor 5 during each period, the magnetic flux to be stored in the smoothing inductor 5 decreases by Voutxc3x97Toff.
Accordingly, the reset condition of the smoothing inductor 5, i.e. the condition that the increment and decrement of the magnetic flux are balanced in the smoothing inductor 5, is represented by the following equation (1),
(Vin/nxe2x88x92Vout)xc3x97Ton=Voutxc3x97Toff.xe2x80x83xe2x80x83(1)
The transfer factor, i.e. the ratio between the input voltage Vin and the output voltage Vout, is obtained from the equation (1) and represented by the following equation (2),
Vout/Vin=xcex4/n,
where
xcex4=Ton/(Ton+Toff).xe2x80x83xe2x80x83(2)
As the equation (2) indicates, the control over the duty factor xcex4 for the ON/OFF times of the high-side switching sections stably maintains the output voltage Vout at a substantially steady value.
However, the hard switching of the switching control circuit 70 has the following disadvantages: Each switching section of the full-bridge includes the parasitic capacitor connected in parallel with its switching device as shown in FIG. 6. When all the switching sections are OFF, each parasitic capacitor becomes stable in a charged state. In the hard switching, one high-side switching section and one low-side switching section are simultaneously turned ON. Accordingly, when each switching section is turned ON, its switching device connected in parallel with the parasitic capacitor is turned ON under the condition that the parasitic capacitor is charged to a certain extent. Then, the parasitic capacitor is short-circuited via the switching device under the ON condition, and the parasitic capacitor discharges abruptly. Thereby, a surge current occurs in the switching section and is converted into heat or an electromagnetic wave. The electric power is dissipated outside through the heat or the electromagnetic wave. Thus, the switching loss, i.e. the power loss caused by the switching, increases. Furthermore, the heat being due to the surge current causes fatigue in the switching section, and the electromagnetic wave produces noise to peripheral circuit devices.
For example, immediately before the time T0 in FIG. 7, the voltage V1H across the first high-side switching section 101H and the voltage V2L across the second low-side switching section 102L are each maintained at finite values. Accordingly, the parasitic capacitor 1HC of the first high-side switching section 101H and the parasitic capacitor 2LC of the second low-side switching section 102L are charged in proportion to the voltages V1H and V2L, respectively. When both the switching sections are turned ON at the time T0, both of the parasitic capacitors 1HC and 2LC discharge abruptly, and surge currents occur. Thereby, the current I1H flowing through the first high-side switching section 101H and the current I2L flowing through the second low-side switching section 102L increase so as to reach steep peaks sc. When the first low-side switching section 101L and the second high-side switching section 102H are simultaneously turned ON at the time T2, the currents I1L and I2H flowing therethrough have similar peaks.
In the hard switching, furthermore, one high-side switching section and one low-side switching section are simultaneously turned OFF. Accordingly, when the switching sections are OFF, the current supplied to the primary winding of the transformer decreases abruptly. Then, resonance occurs between the leak inductance of the primary winding and the parasitic capacitors in the switching sections, thereby causing surge voltages. The occurrence of the surge voltages causes, for example, energy storage and dissipation by the leak inductance of the primary winding. Thus, the switching loss increases.
For example, in FIG. 7, immediately before the time T1 at which the first high-side switching section 101H and the second low-side switching section 102L are turned OFF, the substantially equal currents I1H=I2L flow through the switching sections, respectively. At the time T1 when both the switching sections are turned OFF, intense resonance occurs between the respective parasitic capacitor 1HC and 2LC and the leak inductance of the primary winding 3a of the transformer 3, and then surge voltages occur. Thereby, the voltage V1H across the first high-side switching section 101H and the voltage V2L across the second low-side switching section 102L change to reach steep peaks sv as shown in FIG. 7. Similar peaks appear on the voltage V1L across the first low-side switching section 101L and the voltage V2H across the second high-side switching section 102H at the time T3 when these switching sections are simultaneously turned ON.
As the above-described, in the hard switching, the surge currents/voltages occur each time of the turning-ON/OFF of the switching sections, thereby increasing the switching loss. The increase of the switching loss is undesirable, since it reduces the energy efficiency of the switching power supply. Furthermore, the above-described surge currents/voltages cause electromagnetic waves at the switching frequency and the harmonics thereof. These electromagnetic waves are undesirable, since they hinder the operations of surrounding devices.
In recent years, there is an intensely growing demand for energy-saving and miniaturization of various electronic equipments. That leads to an intense demand for improvements in efficiency, miniaturization, and output stability of switching power supply. The switching frequency must be further raised in order to satisfy such demands. However, the higher the switching frequency is raised, the larger the switching loss increases. Hence, further raising the switching frequency requires a switching technology capable of reducing the switching loss. Soft switching is known as such a switching technology. Here, soft switching means the following switching: (1) causing resonance to occur between the parasitic capacitor in a switch and an external inductor during the transition from ON to OFF or from OFF to ON; (2) switching from ON to OFF or from OFF to ON when the resonance voltage or the resonance current is zero. In particular, switching with the zero voltage across the switch is referred to as zero volt switching (ZVS).
According to the soft switching, no electric power is dissipated in a switch at the time of the turning-ON/OFF. Hence, no switching loss occurs in principle. According to the ZVS, in particular, no charge remains in the parasitic capacitor of the switch at the time of the turning-ON. Therefore, no surge current occurs.
A conventional switching power supply 110 achieving the ZVS is, for example, disclosed in Japanese Laid-open Patent Application No. Hei 11-89232. FIG. 8 shows the circuit diagram of the switching power supply. The same reference signs as those in FIG. 6 designate similar components to those of the conventional example 100 shown in FIG. 6. This switching power supply 110 differs from the above-described conventional example 100 at the following two points: (1) The switching sections 1H, 1L, 2H, and 2L in the full-bridge include diodes 1HD, 1LD, 2HD, and 2LD, respectively, together with the switching devices and the parasitic capacitors. The diodes are connected in parallel with the respective switching devices. The cathode of the diode is thus connected to the high potential side of the switching device, and the anode of the diode is connected with the low potential side of the switching device. When the switching device is a transistor, such as an IGBT, the diode may be the body diode of the transistor.
(2) The switching control circuit 7 performs soft switching for the switching sections in the full-bridge. Hence, the switching loss reduces in comparison with the above-described conventional example 100. The following is the description of the soft switching of the switching control circuit 7.
FIG. 9 is a diagram showing the waveforms of the currents and voltages occurring at various sections of the circuit shown in FIG. 8, according to the soft switching by the switching control circuit 7. In this diagram, the positive directions of the currents and voltages at the various sections of the circuit are defined as the directions of the arrows in FIG. 8.
The switching control circuit 7 outputs switching signals G1, G2, G3, and G4 to the switching devices 1HS, 1LS, 2HS, and 2LS, respectively. The switching signals G1, G2, G3, and G4 are rectangular waves. Each switching device is ON during the interval that the switching signal corresponding thereto stays high (H), and OFF during the interval that the switching signal corresponding thereto stays low (L).
In the soft switching of the switching control circuit 7, the following four periods are sequentially achieved with predetermined time lengths and predetermined cycle periods: (1) A first period corresponds to the period T0-T1 in FIG. 9. During the first period, the first high-side switching section 1H and the second low-side switching section 2L are ON, and the second high-side switching section 2H and the first low-side switching section 1L are OFF. (2) A second period corresponds to the period T4-T5 in FIG. 9. During the second period, the first high-side switching section 1H and the second low-side switching section 2L are OFF, and the second high-side switching section 2H and the first low-side switching section 1L are ON. (3) A third period corresponds to each of the period T2-T3 and the period T6-T7, and is achieved during intervals between the first period and the second period. During the third period, the first high-side switching section 1H and the second high-side switching section 2H are OFF, and the first low-side switching section 1L and the second low-side switching section 2L are ON. (4) A dead time is an infinitesimal period inserted between two of the above-described three periods, and corresponds to each of the periods T1-T2, T3-T4, T5-T6, and T7-T8. During the dead time, either of the pair of the first high-side switching section 1H and the first low-side switching section 1L, or the pair of the second high-side switching section 2H and the second low-side switching section 2L is OFF. In other words, only one of the four switching sections is ON, and three other switching sections are OFF.
The following is the description of the soft switching of the switching control circuit 7 in the time sequence from the time T0 to the time T8 shown in FIG. 9.
 less than Period T0-T1 greater than
During the period T0-T1, both of the primary current It of the transformer 3 and the current I5 flowing through the smoothing inductor 5 increase linearly, in a similar manner to that during the period T0-T1 of the above-described conventional example. Then, the secondary current of the transformer 3 flows only through the first secondary winding 3b.
 less than Period T1-T2 greater than
At the time T1, the switching control circuit 7 changes the first switching signal G1 from H to L, thereby turning OFF the first high-side switching section 1H. On the other hand, the second low-side switching section 2L is maintained ON. Then, resonance occurs among the leak inductance of the primary winding 3a, the parasitic capacitor 1HC of the first high-side switching section 1H, and the parasitic capacitor 1LC of the first low-side switching section 1L. Because of the resonance, the primary current It simultaneously causes the parasitic capacitor 1HC of the first high-side switching section 1H to charge, and the parasitic capacitor 1LC of the first low-side switching section 1L to discharge. Accordingly, the voltage V1H across the first high-side switching section 1H is smoothly raised from zero, and the voltage V1L across the first low-side switching section 1L drops smoothly from the maximum value Vin.
Immediately before the time T2, the voltage V1H across the first high-side switching section 1H reaches the maximum value Vin. At the same time, the voltage V1L across the first low-side switching section 1L reaches zero. Then, the diode 1LD of the first low-side switching section 1L is turned ON, thereby clamping the voltage V1L at zero. At the time T2, the switching control circuit 7 changes the second switching signal G2 from L to H, thereby turning ON the first low-side switching section 1L. Thus, ZVS is achieved for the turning-ON of the first low-side switching section 1L.
 less than Period T2-T3 greater than
During the period T2-T3, the primary winding 3a is short-circuited via the two low-side switching sections 1L and 2L. During this period, the primary voltage Vt is substantially zero. Hence, commutation occurs on the secondary side of the transformer 3, in the similar operation to the above-described operation at the time T1 of the conventional example 100. In other words, the secondary current flows through both of the two secondary windings 3b and 3c, since the two rectifying diodes 4b and 4c are both turned ON. As a result, only a substantially steady voltage (xe2x88x92Vout) is applied to the smoothing inductor 5. Hence, the current I5 flowing through the smoothing inductor 5, and then the secondary current, decreases linearly.
The secondary current flowing through the first secondary winding 3b is larger than that flowing through the second secondary winding 3c during the period T2-T3, in contrast to the above-described conventional example 100, because of the following reasons: Since the voltage Vc across the second rectifying diode 4c drops to zero in the period T1-T2, the second rectifying diode 4c is turned ON at the time T2. However, because of the leak inductance on the secondary side of the transformer 3, the current Ib flowing through the first rectifying diode 4b decreases slowly, and the current Ic flowing through the second rectifying diode 4c increases slowly. Hence, during the period T2-T3, the major portion of the secondary current flows through the first secondary winding 3b, and only the minor remaining portion thereof flows through the second secondary winding 3c. As a result, the equivalent primary current does not decrease very much in the period T2-T3 because of the insufficient cancellation between the secondary windings 3b and 3c, but decreases linearly with a slight inclination by the above-described leak inductance. On the other hand, the exciting current of the primary winding 3a is maintained at a substantially steady value, since the primary voltage Vt is substantially zero. As a result, the primary current It decreases linearly.
 less than Period T3-T4 greater than
At the time T3, the switching control circuit 7 changes the fourth switching signal G4 from H to L, thereby turning OFF the second low-side switching section 2L. On the other hand, the first low-side switching section 1L is maintained ON. Then, resonance occurs among the leak inductance of the primary winding 3a, the parasitic capacitor 2HC of the second high-side switching section 2H, and the parasitic capacitor 2LC of the second low-side switching section 2L. Because of the resonance, the primary current It simultaneously causes the parasitic capacitor 2HC of the second high-side switching section 2H to discharge, and the parasitic capacitor 2LC of the second low-side switching section 2L to charge. Accordingly, the voltage V2H across the second high-side switching section 2H drops smoothly from the maximum value Vin, and the voltage V2L across the second low-side switching section 2L is smoothly raised from zero.
Immediately before the time T4, the voltage V2L across the second low-side switching section 2L reaches the maximum value Vin. At the same time, the voltage V2H across the second high-side switching section 2H reaches zero. Then, the diode 2HD of the second high-side switching section 2H is turned ON, thereby clamping the voltage V2H at zero. At the time T4, the switching control circuit 7 changes the third switching signal G3 from L to H, thereby turning ON the second high-side switching section 2H. As a result, ZVS is achieved for the turning-ON of the second high-side switching section 2H.
 less than Period T4-T5 greater than
During the period T4-T5, both of the primary current It of the transformer 3 and the current I5 flowing through the smoothing inductor 5 increase linearly, in the similar manner to that during the second period T2-T3 of the above-described conventional example. However, these currents are opposite in direction to those during the period T0-T1. Furthermore, the secondary current of the transformer 3 flows only through the second secondary winding 3c.
 less than Period T5-T6 greater than
At the time T5, the switching control circuit 7 changes the third switching signal G3 from H to L, thereby turning OFF the second high-side switching section 2H. On the other hand, the first low-side switching section 1L is maintained ON. Then, resonance occurs among the leak inductance of the primary winding 3a, the parasitic capacitor 2HC of the second high-side switching section 2H, and the parasitic capacitor 2LC of the second low-side switching section 2L. Because of the resonance, the primary current It simultaneously causes the parasitic capacitor 2HC of the second high-side switching section 2H to charge, and the parasitic capacitor 2LC of the second low-side switching section 2L to discharge. Accordingly, the voltage V2H across the second high-side switching section 2H is raised smoothly from zero, and the voltage V2L across the second low-side switching section 2L drops smoothly from the maximum value Vin.
Immediately before the time T6, the voltage V2H across the second high-side switching section 2H reaches the maximum value Vin. At the same time, the voltage V2L across the second low-side switching section 2L reaches zero. Then, the diode 2LD of the second low-side switching section 2L is turned ON, thereby clamping the voltage V2L at zero. At the time T6, the switching control circuit 7 changes the fourth switching signal G4 from L to H, thereby turning ON the second low-side switching section 2L. As a result, ZVS is achieved for the turning-ON of the second low-side switching section 2L.
 less than Period T6-T7 greater than
During the period T6-T7, the primary winding 3a is short-circuited via the two low-side switching sections 1L and 2L again. Accordingly, commutation occurs on the secondary side of the transformer 3, in the similar operation to that during the period T2-T3. The secondary current flows through both of the two secondary windings 3b and 3c. However, the secondary current flowing through the second secondary winding 3c is larger than that flowing through the first secondary winding 3b, in the opposite manner to that during the period T2-T3. Then, the equivalent primary current does not decrease very much. Furthermore, only the substantially steady voltage (xe2x88x92Vout) is applied to the smoothing inductor 5. Accordingly, both of the primary current It and the secondary current I5 decrease linearly.
 less than Period T7-T8 greater than
At the time T7, the switching control circuit 7 changes the second switching signal G2 from H to L, thereby turning OFF the first low-side switching section 1L. On the other hand, the second low-side switching section 2L is maintained ON. Then, resonance occurs among the leak inductance of the primary winding 3a, the parasitic capacitor 1HC of the first high-side switching section 1H, and the parasitic capacitor 1LC of the first low-side switching section 1L. Because of the resonance, the primary current It simultaneously causes the parasitic capacitor 1HC of the first high-side switching section 1H to discharge, and the parasitic capacitor 1LC of the first low-side switching section 1L to charge. Hence, the voltage V1H across the first high-side switching section 1H drops smoothly from the maximum value Vin, and the voltage V1L across the first low-side switching section 1L is smoothly raised from zero.
Immediately before the time T8, the voltage V1L across the first low-side switching section 1L reaches the maximum value Vin. At the same time, the voltage V1H across the first high-side switching section 1H reaches zero. Then, the diode 1HD of the first high-side switching section 1H is turned ON, thereby clamping the voltage V1H at zero. At the time T8, the switching control circuit 7 changes the first switching signal G1 from L to H, thereby turning ON the first high-side switching section 1H. As a result, ZVS is achieved for the turning-ON of the first high-side switching section 1H.
At the time T8, the same state as the time T0 reoccurs. Thus, the operations during the period from the time T0 to the time T8 are repeated in cycle.
The time length of the dead time, i.e. each time length of the period T1-T2, the period T3-T4, the period T5-T6, and the period T7-T8, is sufficiently shorter than any time length of the first period T0-T1, the second period T4-T5, and the third periods T2-T3 and T6-T7. Generally, each time length of the first, the second, and the third periods is about several microseconds, but the time length of the dead time is about several tens to several hundreds of nanoseconds.
When the dead times are ignored in comparison with the first period and other periods, the transfer factor (the ratio between the input voltage Vin and the output voltage Vout) in the above-described soft switching is obtained as follows:
Let Ton to be the sum of the time lengths of the first period T0-T1 and the second period T4-T5. In each of these periods, the voltage (Vin/nxe2x88x92Vout) is applied across the smoothing inductor 5 in the above-described manner. Therefore, the magnetic flux to be stored in the smoothing inductor 5 increases by (Vin/nxe2x88x92Vout)xc3x97Ton in total during the above-described two periods. On the other hand, let Toff to be the sum of the time lengths of the third periods T1-T4 and T5-T8. During each of the third periods, the voltage (xe2x88x92Vout) is applied across the smoothing inductor 5 in the above-described manner. Therefore, the magnetic flux to be stored in the smoothing inductor 5 decreases by Voutxc3x97Toff in total. Accordingly, the reset condition of the smoothing inductor 5 is represented by the similar equation (1) to that of the hard switching:
(Vin/nxe2x88x92Vout)xc3x97Ton=Voutxc3x97Toff.xe2x80x83xe2x80x83(1)
Therefore, the transfer factor is represented by the similar equation (2) to that in the hard switching:
Vout/Vin=xcex4/n,
where
xcex4=Ton/(Ton+Toff).xe2x80x83xe2x80x83(2)
In other words, in the soft switching, in the similar manner to that of the hard switching, the control over the duty factor xcex4 for the ON/OFF time of the switches in the high-side switching sections 1H and 2H stably maintains the output voltage Vout at a substantially steady value.
Furthermore, in the soft switching, the four switching sections 1H, 1L, 2H, and 2L are turned ON according to the above-described ZVS. Hence, the surge currents/voltages caused by the switching do not occur in the switching sections, in contrast to the hard switching. Thus, the switching loss in the soft switching is less than that in the hard switching.
The soft switching has the advantage in switching loss over the hard switching, but is at a disadvantage in respect of conduction loss compared with the hard switching as follows: The soft switching achieves the third periods, which corresponds to the periods T2-T3 and T6-T7 in FIG. 9, i.e. the periods during the short-circuited of the primary winding 3a of the transformer 3. During the third periods, the primary current It circulates through the two low-side switching sections 1L and 2L, and the primary winding 3a. In other words, the primary current It is not zero but finite, during the third periods. In this respect, the soft switching is contrast to the hard switching. Each of the switching sections generally includes an ON resistance, and the primary winding 3a of the transformer 3 generally includes a parasitic resistor. These resistors produce Joule heat and thereby dissipate energy when the primary current It flows. Thus, the conduction loss caused by the primary current It during the third periods (hereafter referred to as circulating current loss) in the soft switching is larger than that in the hard switching.
According to the demand for the miniaturization of switching power supplies, the sizes of the switching sections are restricted. As a result, the ON resistance of the switching section has a lower limit. In addition, the smaller the size of the switching power supply, the larger the lower limit of the ON resistance. In such a miniature switching power supply, the increase of the circulating current loss may be larger than the reduction of the switching loss in the soft switching. Then, the efficiency of the switching power supply does not increase sufficiently.
In the full-bridge type converter based on the above-described soft switching (hereafter referred to as an active clamp full-bridge (ACFB) converter), the leak inductance of the primary winding of the transformer is used to cause resonance together with the parasitic capacitors of the switching sections. However, the leak inductance is inherently small. When the leak inductance is too small, a sufficiently large resonance current cannot be obtained, and the parasitic capacitors of the switching sections may be insufficiently charged or discharged. As a result, ZVS cannot be achieved, and the switching loss may increase.
The source of the surge current/voltage caused by the switching is not limited to components in the switching sections. The surge current/voltage may be caused by the turning-OFF of each of the rectifying diodes 4b and 4c at the time of the commutation on the secondary side in both of the conventional switching power supply 100 according to the above-described hard switching and the ACFB converter 110 according to the soft switching. Thereby, the currents Ib and Ic flowing through the respective rectifying diodes 4b and 4c have peaks cf, and the voltages Vb and Vc across the respective rectifying diodes have peaks vf, as shown in FIGS. 7 and 9. The cause of the occurrence of the surge currents/voltages in the rectifying diodes 4b and 4c as follows:
Either of the rectifying diodes 4b and 4c is turned OFF at each start of the first period and the second period. The starts of the first period and the second period correspond to the times T0 and T2 in FIG. 7, and the times T0 and T4 in FIG. 9. A diode generally stores electric charges while it is ON. Thereby, when the diode is turned OFF by an applied reverse bias, the stored charges are discharged as a reverse current. In the above-described switching power supplies 100 and 110, a surge current occurs as the reverse current, when either of the rectifying diodes 4b and 4c is turned OFF caused by the commutation on the secondary side.
The two rectifying diodes 4b and 4c is connected with the two secondary windings 3b and 3c of the transformer 3, respectively. For example, when the first rectifying diode 4b is turned OFF, resonance occurs between the parasitic capacitance of the first rectifying diode 4b and the leak inductance of the first secondary winding 3b based on the above-described reverse current. Thereby, a surge voltage occurs across the first rectifying diode 4b. Similarly, a surge voltage occurs across the second rectifying diode 4c based on the reverse current, when the diode is turned OFF.
The surge currents/voltages caused by the turning-ON/OFF of the above-described rectifying diodes produce noises. The power loss caused by the noise is a part of the switching loss of the switching power supply, and undesirably reduces the efficiency of the switching power supply.
The object of the present invention is to provide a switching power supply that may reduce the circulating current loss in addition to the reduction of the switching loss by the soft switching.
The switching power supply according to the present invention comprises:
a DC-DC converter
(A) including:
(a) four switching sections of a first high-side switching section, a second high-side switching section, a first low-side switching section, and a second low-side switching section, each having (1) a switching device that is turned ON/OFF according to a switching signal from the outside, (2) a diode connected in parallel with the switching device, and (3) a capacitance connected in parallel with the switching device;
(b) a transformer having (1) a primary winding, and (2) a first secondary winding and a second secondary winding connected in series whose Junction point is a common terminal;
(c) a first rectifying section and a second rectifying section, each having (1) a rectifying device and (2) a snubber connected in parallel with the rectifying device, the snubber having a snubber capacitor; and
(d) a smoothing section having a first input terminal and a second input terminal, for smoothing an input supplied via the input terminals, and for outputting the smoothed input;
in the DC-DC converter,
(B) the cathode of the first high-side switching section is connected with the higher potential terminal of a substantially steady direct voltage source, the anode of the first high-side switching section is connected with the cathode of the first low-side switching section, and the anode of the first low-side switching section is connected with the lower potential terminal of the substantially steady direct voltage source;
(C) the cathode of the second high-side switching section is connected with the higher potential terminal of the substantially steady direct voltage source, the anode of the second high-side switching section is connected with the cathode of the second low-side switching section, and the anode of the second low-side switching section is connected with the lower potential terminal of the substantially steady direct voltage source;
(D) one terminal of the primary winding of the transformer is connected with the junction point between the first high-side switching section and the first low-side switching section, and the other terminal of the primary winding is connected with the junction point between the second high-side switching section and the second low-side switching section;
(E) a terminal other than the common terminal of the first secondary winding of the transformer is connected with the anode of the first rectifying section, a terminal other than the common terminal of the second secondary winding is connected with the anode of the second rectifying section, and the common terminal is connected with the first input terminal of the smoothing section; and
(F) the cathode of each of the first rectifying section and the second rectifying section is connected with the second input terminal of the smoothing section; and
a switching control section for
(A) determining a delay time based on a resonance cycle depending on the equivalent capacitance of the snubber in each of the first rectifying section and the second rectifying section, and the leak inductance on the secondary side of the transformer with the primary winding short-circuited; and
(B) outputting the switching signal with a predetermined switching frequency and a predetermined phase to each of the four switching sections, thereby
(a) achieving a first period and a second period sequentially with predetermined time lengths and predetermined cycle periods, (1) during the first period, the first high-side switching section and the second low-side switching section are ON and the second high-side switching section and the first low-side switching section are OFF, and (2) during the second period, the first high-side switching section and the second low-side switching section are OFF and the second high-side switching section and the first low-side switching section are ON;
(b) at the end of the first period, turning OFF one of the first high-side switching section and the second low-side switching section the delay time later than the turning-OFF of the other switching section; and
(c) at the end of the second period, turning OFF one of the second high-side switching section and the first low-side switching section the delay time later than the turning-OFF of the other switching section.
In the above-described switching power supply, the high-side and low-side switching sections that are ON during each of the first period and the second period are both OFF at the time when the delay time elapsed from each end of the periods. Then, the primary current, i.e. the current flowing through the primary winding of the transformer, quickly attenuates as follows.
During the first period, the first rectifying section is OFF, and during the second period, the second rectifying section is OFF. Thereby, full-wave rectification is achieved on the secondary side of the transformer. Then, in the OFF-side rectifying section, the snubber capacitor stores charges by a reverse bias. At each end of the first period and the second period, the induced voltage across each of the secondary windings drops to zero. Then, the snubber capacitor discharges in the OFF-side rectifying section. The discharge current causes a current to start flowing through the secondary winding connected with the rectifying section before the rectifying device is ON in the rectifying section. Based on the current, resonance occurs between the snubber capacitor and the leak inductance on the secondary side of the transformer. Here, the leak inductance on the secondary side of the transformer is defined as the leak inductance equivalently produced between the terminals other than the common terminal of the two secondary windings when the primary winding is short-circuited. In the description, the leak inductance is referred to as the leak inductance on the secondary side of the transformer with the primary winding short-circuited. Accordingly, the commutation of the secondary current of the transformer progresses smoothly and quickly, in contrast to the conventional switching power supply. In other words, substantially equal amounts of the secondary currents begin to flow through both the secondary windings immediately after each of the first period and the second period. As a result, the equivalent primary current is smoothly and quickly cancelled between the secondary currents flowing through the two secondary windings. Hence, the primary current is smoothly and quickly reduced at each end of the first period and the second period. Therefore, surge voltages are reduced when the primary current is cut off the above-described delay time later, and the switching loss caused by the cut-off of the primary current is thus reduced. Furthermore, the circulating current loss caused by the primary current is reduced, since the primary current is cut off between the first period and the second period.
In the above-described switching power supply, the switching control section may:
(a) at the end of the first period, turns OFF the second low-side switching section the delay time later than the turning-OFF of the first high-side switching section: and
(b) at the end of said second period, turns OFF the first low-side switching section the delay time later than the turning-OFF of the second high-side switching section.
In this switching power supply, the primary current of the transformer circulates through the two low-side switching sections and the primary winding until the corresponding delay time elapsed after each end of the first period and the second period.
Alternatively, the switching control section may:
(a) at the end of the first period, turns OFF the first high-side switching section the delay time later than the turning-OFF of the second low-side switching section; and
(b) at the end of the second period, turns OFF the second high-side switching section the delay time later than the turning-OFF of the first low-side switching section.
In this switching power supply, the primary current of the transformer circulates through the two high-side switching sections and the primary winding until the corresponding delay time elapsed after each end of the first period and the second period.
Apart from the above-described, the switching control section may:
(a) at the end of the first period, turns OFF the second low-side switching section the delay time later than the turning-OFF of the first high-side switching section; and
(b) at the end of the second period, turns OFF the second high-side switching section the delay time later than the turning-OFF of the first low-side switching section.
In this switching power supply, the primary current of the transformer circulates through the two low-side switching sections and the primary winding until the delay time elapsed after the end of the first period. On the other hand, the primary current of the transformer circulates through the two high-side switching sections and the primary winding until the delay time elapsed after the end of the second period. The above-described alternating of the current circulating sections equalizes stresses exerted on the switching sections.
In the above-described switching power supply, the switching control section may:
(A) determines a first dead time based on a resonance cycle depending on the equivalent capacitance of the first high-side switching section, the equivalent capacitance of the first low-side switching section, and the leak inductance of the primary winding of the transformer;
(B) determines a second dead time based on a resonance cycle depending on the equivalent capacitance of the second high-side switching section, the equivalent capacitance of the second low-side switching section, and the leak inductance of the primary winding of the transformer; and
(C) at each end of the first period and the second period, achieves one of the periods
(a) when the first high-side switching section and the first low-side switching section are both OFF during the first dead time; and
(b) when the second high-side switching section and the second low-side switching section are both OFF during the second dead time.
For example, at the end of the first period, the first high-side switching section is turned OFF earlier than the second low-side switching section. Then, resonance occurs among the leak inductance of the primary winding of the transformer and the equivalent capacitances of the first high-side switching section and the first low-side switching section. By the resonance, the capacitor in the first high-side switching section charges, and the capacitor in the first low-side switching section discharges. Furthermore, when the capacitor in the first low-side switching section discharges completely, the diode in the same switching section is turned ON, thereby clamping the voltage across the switching section at zero. In this state, the second low-side switching section is turned ON. Hence, in the above-described switching power supply, ZVS is achieved for the turning-ON of the second low-side switching section. Therefore, the switching loss is reduced. When the second low-side switching section is turned OFF earlier at the end of the first period, and even at the end of the second period, ZVS is similarly achieved for the switching section that is turned ON earlier.
The dead time is determined based on the resonance cycle depending on the equivalent capacitance of the high-side switching section, the equivalent capacitance of the low-side switching section, and the leak inductance of the primary winding of the transformer. Preferably, the dead time is substantially equal to xc2xc times the resonance cycle. On the other hand, the delay time is determined based on the resonance cycle depending on both of the equivalent capacitance of the snubber and the leak inductance on the secondary side of the transformer with the primary winding short-circuited. Preferably, the delay time is substantially equal to xc2xc times the resonance cycle. The delay time is mainly adjusted with the capacitance of the snubber capacitor. Therefore, in the above-described switching power supply, the primary current is cut off immediately after the above-described ZVS is achieved. Thus, the circulating current loss is reduced along with the switching loss.
In the above-described switching power supply, the snubber may include a resistor connected in series with the snubber capacitor. At the starts of the first period and the second period, an induced voltage from the primary side is produced across each of the secondary windings of the transformer. Thereby, either of the two rectifying sections being ON is turned OFF. In the rectifying section that is then turned OFF, resonance occurs between the snubber capacitor and the leak inductance on the secondary side of the transformer. The resistor in the snubber attenuates the resonance quickly. Thereby, the ringing caused by the resonance is suppressed, and in addition, the peak of the voltage applied across the rectifying device in parallel with the snubber is reduced.
Furthermore, in the above-described switching power supply, (a) the snubber may include an auxiliary rectifying device connected in parallel with the resistor; and (b) one pair of the anodes and the cathodes of the rectifying device and the auxiliary rectifying device may be connected with each other. At each end of the first period and the second period, the snubber capacitor discharges in the OFF-side rectifying section. Then, the discharge current flows through the auxiliary rectifying device in parallel with the resistor, thereby avoiding the reduction by the resistor. Accordingly, the peak of the resonance current increases in the resonance between the equivalent capacitance of the snubber and the leak inductance on the secondary side of the transformer. As a result, the equivalent primary current is sufficiently and more quickly cancelled at each end of the first period and the second period, and thus the primary current is sufficiently reduced. Accordingly, not only the conduction loss caused by the resistor in the snubber but also the switching and circulating current losses caused by the primary current are reduced. In addition, the heat generation of the resistor in the snubber caused by the discharge current is suppressed. Thereby, increase of the resistance and impairment of the functions of other devices owing to the heat are prevented.
In the above-described switching power supply, the rectifying device and the auxiliary rectifying device included in the snubber are preferably diodes. Alternatively, they may be semiconductor. switching devices, such as IGBTs and MOSFETs. In this case, the switching control section preferably controls the switching of the semiconductor switching devices in synchronization with the switching of the switching sections in the full-bridge on the primary side.
While the novel features of the invention are set forth particularly in the appended claims, the invention, both as to organization and content, will be better understood and appreciated, along with other objects and features thereof, from the following detailed description taken in conjunction with the drawings.

Matsushita Electric Industrial Co., Ltd.


The invention is a method for correlating and assigning digital camera images to a database file. The method enables a photographer to keep track of large numbers of subjects and items. The method uses a timestamp from a bar code reader to synchronize recorded swipes of bar codes with the digital images created produced by the camera. The bar code reader is used to swipe identifying bar code on items or subjects that are to be tracked, such as on a student's camera card, a police investigation report or a catalogue item. The time and the bar code serve as a means to cross-reference any item or subject to the digital images. The photographs and bar code scans are downloaded into a computer, and then by inspection of the recorded times of when the scans were made and the pictures were taken, the images can be assigned to the appropriate file. The images can then be loaded into the item's or subject's file, secure in the knowledge that the images are appropriately assigned.

Schools and other governmental organizations commonly employ digital photography to generate photo IDs. Photo IDs are used by the school to identify which students should be on the school premises, to help the students with their socialization and adaptation to the school, to aid in name recognition, and to facilitate a variety of administrative functions. In another application, the highway department uses IDs to identify drivers who are approved licensed drivers of a vehicle. Another example of photo ID use is in companies, particularly large companies and governmental agencies, to enhance security, wherein access to the facility is controlled through the wearing of photo identification.
In the case of schools, student identification cards have to be generated every year, and preferably with minimum disruption to the class day. Each student has a database associated with that student, listing things such as class, home room number, social security number, birth date, etc. Also, associated with the student is a photographic image of the student. The conventional way of generating a photographic image and matching that image with the student is as follows: the school provides a selected organization with a database of all the students. The selected organization then uses this database to create camera cards. Each student has one camera card. In a photography shoot the photographer has a digital camera that is electronically tethered to a computer. The computer, which is usually a laptop, has been previously loaded with the database information needed to generate camera cards for the students. The camera cards are distributed to the students who then present their individual camera cards to the photographer at the beginning of the shoot. The student gives the card to the photographer who swipes the camera card. The card has an electromagnetic strip. After reading the camera card, the computer brings up the student's database file. The photographer then takes one or more pictures of the student. As the photos are taken the images are transferred to the LCD screen of the laptop computer and downloaded onto the database of the computer. The photographer has an opportunity to view the images, and the student may also have an opportunity to view the photos. All of the images are associated with that particular student's file. A new shoot begins when the next student's camera card is swiped into the computer, thus beginning the process anew.
This method has several advantages. It generates instant pictures. The photographer and student are able to view the image. The image is associated with the student's database file, and there is little chance that the image will be associated with the wrong individual, as the student can quickly see that the pictures are associated with his name. There are some serious negatives to this process, and many of these negatives are a consequence of the fact that a laptop computer is required for each camera. Laptop computers are expensive. Like the camera, they are battery powered and subject to failure. The photographer not only has to be proficient in photography, but also must be proficient in operating the computer. On a practical level, in judging the amount of disruption caused by the photographic session, the fact that the student can view the photos tends to slow the entire process. Disruption and delays are contrary to the wishes of the school administration, and are to be minimized, even at the expense of the student's desire to have "just one more picture taken".
Schools and other organizations are seeking a method that is very similar to what they are used to doing, that is, shooting the pictures and developing them offsite. What is needed is a method for matching photographic images created by the digital camera to the subject (or item), where the matching process is independent of the laptop. Another advantage of maintaining autonomy of the digital camera from the laptop or any computer is that the software on computers is regularly changing, and maintaining compatibility between the digital cameras and the software running on the laptop is an ongoing issue.
What is needed is a method for matching digital photographic images to the database, wherein there is no necessity for a laptop, or other computer, to be tethered to the digital camera during the shoot.
The prior art teaches has several methods of organizing and tracking digital images. Walter Boyne, in U.S. Pat. No. 4,941,125 discloses a method for imputing images from a digital camera into a computer, where the data is indexed for easy retrieval at a later date. The patent is principally concerned with archiving documents. The method utilizes optical character recognition software to convert the images into text, and then generate an index of descriptive terms to index the images. Boyne does not teach the utility of a method, wherein the camera is not tethered to a computer.
In U.S. Pat. No. 6,466,934, Seese et al. use bar code readers, which are generally referred to as "external systems", to provide an interface without the need of an in-depth understanding of the database model. A first external system and a second external system provide for responding to an event, the event being related to communication with at least one of the first or the second external systems, and receiving a message, the message comprising a metadata event key and a session identifier, the session identifier identifying a workset database for use with the message, the workset database having a workset database structure dependent upon metadata; and processing an action series dependent upon the metadata event key. In other words, Seese '934 teaches that bar code readers can be used to trigger a second external system. Seese '934 does not teach that the bar code reader can be used to organize data.

Method of matching a digital camera image to a database using a timestamp device


Methods and apparatus, including computer program products, for receiving constraint characterizing data applicable to a sensor network, receiving a logical representation of a requirements specification for the sensor network, and processing the constraint characterizing data and the logical representation of the requirements specification to generate a modular representation of the sensor network. The constraint characterizing data includes physical environment data, sensor constraint data, and application domain data. The modular representation of the sensor network defines sensor node placement and sensor distribution within the sensor network.

This description relates to sensor network modeling and deployment.
A sensor network is formed by a collection of sensor nodes that are linked by a wireless medium to perform distributed sensing tasks. Sensor networks are deployed in a variety of environments to perform tasks such as surveillance, widespread environmental sampling, security, and health monitoring.


A method for improving engine starting for an engine having a variable event valvetrain is described. According to one aspect of the description, valve timing is adjusted during a start to reduce engine emissions and fuel consumption.

One method to control valve timing of an internal combustion having a variable event valvetrain is described in U.S. Pat. No. 6,681,741. This patent describes several valve timing methods that may be used during starting of an engine having a variable event valvetrain. In particular, the different methods attempt to improve cylinder turbulence and reduce fuel adherence to the intake port. The intake valves are initially set to open at a location that is before top-dead-center of the intake stroke of the cylinder in which the valve operates. After the engine speed reaches a predetermined level the intake valve opening time is switched to position that is after top-dead-center of the intake stroke of the cylinder. The intake valve opening remains at this location until a change in an operating condition causes the intake valve opening time to return to a position before top-dead-center of the intake stroke.
The above-mentioned method can also have several disadvantages. Specifically, the cylinder air-fuel mixture may not mix as well as desired when the engine is being cranked or when it is accelerating from crank speed up to the time it reaches a certain operating speed (run-up). Further, engine fuel consumption may be higher than desired because the cylinder charge motion and air-fuel mixing may not be sufficient at low engine speed to improve combustion. In other words, portions of the cylinder air-fuel mixture may combust less completely than other portions of the cylinder air-fuel mixture due to lack of homogeneity of the air-fuel mixture. Further still, the method only appears to recognize that it is desirable to heat an exhaust after treatment device. The method does not appear to recognize that there are additional benefits that can be achieved by quickly heating the engine and engine fluids.
The inventors herein have recognized the above-mentioned disadvantages and have developed a method of controlling intake manifold pressure that offers substantial improvements.

Variable event valvetrain operation during an engine start


Described herein are water-based inks that comprise water, a water miscible solvent having a boiling point of about 56° C. to about 98° C., and a latex. In one aspect, the water miscible solvent comprises about 10 wt % to about 30 wt % of the ink (based on the total weight of the ink). In another aspect, the latex is an alcohol-tolerant latex that exhibits limited or no particle size increase in the presence of alcohol. Further described herein are articles printed with the inks, and methods of printing with the inks.

State of the art solvent based inks typically contain slow solvents such as glycol ethers, which keep the ink from drying before it contacts the substrate. However, these solvents cause adverse plate swelling and diminish long term runnability at high speeds (e.g., 2000 feet per minute (fpm) or greater).
Advantageously, water-based ink formulations are less flammable than solvent-based inks. The flash point of a water-based ink should be less than that of a solvent based ink. This eliminates a potential safety hazard encountered during printing operations. Further, water is a significantly cheaper solvent than the commonly used organic solvents. However, water-based inks known in the art are not suited for high speed printing.
An opaque water-based ink obtains its opaqueness through the inclusion of a white pigment material in the ink formulation. Titanium dioxide (TiO2) and zinc sulfide (ZnS) are examples of white pigment materials that may be included in an ink. Opaque ink formulations are used to obscure, hide and/or cover underlying ink layers and/or the substrate on which the opaque inks are printed. Opaque ink is also used to enhance the appearance of an ink printed on over the opaque ink. For example, a colored ink printed over an opaque ink will exhibit brighter color and cleaner appearance. Water-based opaque inks are often used in this manner, that is, as first down inks.
Representative publications showing state of the art formulations include CN105062208, CN102649889, CN103819962, CN104672982, JP2017002266, CN104693888, CN102382510, U.S. Pat. No. 8,709,288, CN104710876, DE102004051019, IN2015MN03487, AU5257799, CN102605678, AU5941200, AU4237702, GB1578859 and US 2015/0197649.
US 2015/0197649 describes an alcohol-based printing ink that is based on a polyurethane-urea resin and an alcohol content of at least 50%.

High speed water-based inks containing alcohol tolerant latexes