The present invention relates to a thrust reverser for a turbojet engine having a cowling bounding a flow duct through which gases flow from the front of the cowling towards a rear of the cowling, the cowling having at least one reverse thrust opening communicating with the gas flow duct. The thrust reverser has a thrust reverser door pivotally mounted on the cowling so as to be movable between a forward and a thrust position, wherein the thrust reverser door covers the reverse thrust opening, and a reverse thrust position wherein the thrust reverser door uncovers the reverse thrust opening and directs at least a portion of the gases flowing through the gas flow duct outwardly through the reverse thrust opening. A vane having an air foil cross-sectional configuration is connected to the thrust reverser door and is located so as to be acted on by the gases passing through the gas flow duct when the thrust reverser door is adjacent to its forward thrust position, such that the vane exerts a force on the thrust reverser door urging it toward its forward thrust position.

The present invention relates to a pivoting door thrust reverser for a turbojet engine, more particularly a thrust reverser having a vane mounted on the pivoting thrust reverser door.
Turbofan-type turbojet engines are well known in the art and typically comprise a fan at the front of the turbojet engine which directs a flow of bypass air through a duct bounded by the engine cowling on the inside and a fan cowling on the outside. The generally annular duct bounded by the engine cowling and the fan cowling may channel both the bypass flow and the primary exhaust gas flow at a downstream portion or may channel only the bypass flow.
In aircraft on which the turbojet engine is mounted outside of the airframe structure, the fan cowling and the engine cowling are configured to form boundaries of the bypass flow duct and to provide aerodynamic outer surfaces to reduce drag.
FIGS. 1 and 2 illustrate a known pivoting door-type thrust reverser associated with the fan cowling of a turbofan-type turbojet engine. As illustrated in FIG. 1, the upstream portion of the fan cowling which defines the outer limits of the bypass flow duct and which is generally concentrically arranged about the turbojet engine (not shown) is designated as 1 and generally comprises an external cowling panel and an internal cowling panel interconnected by a frame 6. The outer surface of the external cowling panel has an aerodynamic surface over which the air external to the engine passes during aircraft flight. The inner surface of the inner cowling panel defines the outer boundary of the bypass flow duct through which the bypass air flow passes.
The fan cowling also comprises a thrust reverser, illustrated generally at 2, and a downstream fairing 3. The thrust reverser 2 comprises a door 7 pivotally attached to the cowling such that it is movable between a closed, forward thrust position, illustrated in FIG. 1, and an open, reverse thrust position in which the upstream end (towards the left as viewed in FIG. 1) of the thrust reverser door 7 is moved outwardly from the cowling, while a downstream portion is moved inwardly into the bypass flow duct airstream so as to redirect at least a portion of the bypass flow through an opening in the fan cowling in a direction that has a reverse thrust component.
An actuator 8 for moving the door 7 between its forward thrust and reverse thrust positions may comprise a hydraulic cylinder mounted to the frame 6, and having an extendible and retractable piston rod connected to the thrust reverser door 7.
The thrust reverser door 7 has an outer door panel 9 and an inner door panel 11 joined together by an internal structure. The upstream end of the door 7 may have a deflector 13 to maximize the efficiency of the thrust reverser when the door 7 is in the reverse thrust position. When the door is in the forward thrust position, as illustrated in FIG. 1, the outer door panel 9 is substantially flush with the external surfaces of the upstream panel and the downstream fairing 3.
As illustrated in FIG. 2, a plurality of thrust reverser doors 7 may be incorporated into the fan cowling, such doors being circumferentially spaced around the periphery of the fan cowling. A portion 18 of the fan cowling extends from an upstream portion 4 of the cowling axially between adjacent thrust reverser doors 7 to provide structural rigidity to the fan cowling and to provide pivot mounting points for attaching the doors 7 to the fan cowling. French Patents 1,482,538 and 2,030,034 illustrate typical, known thrust reversers.
U.S. Pat. No. 3,605,411 discloses a pivoting door-type thrust reverser in which the deflector mounted on the upstream or forward end of the thrust reverser door is movable to an extended position when the door is in the reverse thrust position.
French Patent 2,618,853 discloses a thrust reverser in which the deflector is retracted when the door is in its forward thrust position to optimize engine performance.
In some applications, as illustrated in FIG. 1, the deflector 13 projects from the inner panel 11 of the thrust reverser door 7 even when the door is in its forward thrust position without extending into the bypass flow duct. This forms a cavity 16 facing inwardly into the bypass flow duct which will slightly degrade engine performance.
French Patent 2,680,547 discloses a thrust reverser having a combination of spoilers and deflectors to attempt to optimize the direction of exhaust flow.
The above-described known thrust reversers incur major drawbacks because of the aerodynamic size constraints on the flow passages cleared by the thrust reverser doors which cause the doors to be biased in the open, thrust reversing direction. The full cross-section of the flow passages must be larger than the associated duct cross-section in a plane taken upstream, or forward, of the door on account of the pressure losses due to the gas flow deflection since the downstream, or rearward portion of the duct unobstructed by the inwardly protruding portion of the thrust reverser doors is minimized in order to produce an appropriate reverse thrust force.
Quite obviously, the bias of the doors toward the open or reverse thrust position is a safety drawback. The reverser would be safer if the thrust reverser door was biased towards the closed or forward thrust position. This consideration also applies to a thrust reverser door that would tend to close again under pressure even if they were partially deployed towards the thrust reversing position.
In some cases, the effect of the pressure acting on the thrust reverser door is such that very high stresses are transmitted through the thrust reverser door actuators between their attachment points to the upstream portion of the cowling and the doors. As a consequence, this structure and the door locking mechanisms must be undesirably heavy.

Pivoting door thrust reverser with deflecting vane


An electronic device and method are disclosed. The electronic device includes a main body housing, a pop-up module extendable and retractable from the main body housing, and a processor. The processor implements the method, including identifying, by at least one processor, a state where a pop-up module of the electronic device is extended to an external environment of the electronic device, based on receiving a first control signal, maintaining extension of the pop-up, based on receiving a second control signal, retracting the pop-up module into the electronic device, and based on receiving a third control signal indicating that the electronic device is in free fall, retracting the pop-up module into the electronic device.

An electronic device may include a pop-up module, which may be elevated or stowed respective to a main body housing. For example, the pop-up module may be an external accessory, and include components such as a camera module, an audio device, or modules for various additional function. For example, if the camera module is mounted on the pop-up module, the mounted camera module may be used as a front camera or a rear camera when the pop-up module is elevated ("popped up"), and may be protected by the main body housing when the pop-up module is stowed ("popped down") within the main body housing.

Electronic device with pop-up module driving structure and method for driving thereof


A radio frequency coil includes a non-cylindrical conformal surface (62, 76) that substantially conforms with a magnetic resonance subject. A plurality of conductor loops (60, 71, 72, 73, 74) are disposed in or on the non-cylindrical conformal surface. The plurality of conductor loops are configured to produce a substantially uniform Bi field in the magnetic resonance subject responsive to energizing at a Bi frequency. Optionally, a plurality of load-compensating conductor loops (90) are disposed in or on a compensatory non-cylindrical conformal surface (62) that substantially conforms with a magnetic resonance subject. The plurality of load-compensating conductor loops are configured to produce a non-uniform Bi field that compensates for a loading Bi non-uniformity caused by the magnetic resonance subject. Moreover, the coil may comprise switching means for switching the coil between a first mode of operation (e.g. a volume transmit mode) and a second mode of operation (e.g. a phased array reception mode).

The following relates to the magnetic resonance arts. It finds particular application in radio frequency coils for magnetic resonance imaging, and will be described with particular reference thereto. It finds application more generally in conjunction with magnetic resonance imaging, magnetic resonance spectroscopy, and other magnetic resonance applications.
In bore-type magnetic resonance scanners, the transmit coil is typically a birdcage-type coil including a plurality of rungs arranged as a cylinder and terminated by end-rings, end-caps, or so forth. Under radio frequency excitation at a magnetic resonance frequency, these coils generate a rotating B1, magnetic field that is substantially homogeneous over an imaging volume inside the birdcage-type coil. In whole-body coils, the cylindrical birdcage coil is typically arranged coaxially with the bore of the magnetic resonance scanner, and excites a large volume. For certain applications, a smaller birdcage coil is designed and arranged to image an anatomical region or other region of interest. For example, a head coil may be sized to fit over a medical patient's head to facilitate brain imaging or other head imaging. A smaller local birdcage coil can provide better electromagnetic coupling with the region of interest, and employs less radio frequency power as compared with a whole-body coil.
The excited magnetic resonance can be collected by the same coil used for the transmit phase (that is, a transmit/receive coil), or can be collected using a dedicated receive coil, such as a surface coil disposed close to the imaging region. In parallel imaging techniques such as SENSE, an array of receive coils are used in parallel, with suitable data processing performed to generate a composite image from the data acquired by the plurality of coils.
Space constraints can make providing a receiving coil array that is separate from the transmit coil problematic. For example, a birdcage head coil leaves little room for an additional array of surface receive coils. In one approach for addressing this problem, the birdcage transmit coil can be selectively configurable as a degenerate coil in which the mesh loops are decoupled. The birdcage coil is typically used as a volume resonator during the transmit phase, and then is re-configured using PIN diode switches or the like as a decoupled array of conductor loops that serve as coils of a SENSE coil array or other parallel imaging receive array. This approach does not provide flexibility in positioning the conductor loops relative to the imaging subject.
Another difficulty with existing radio frequency coils is loading-induced B1 field inhomogeneity. For static B0 magnetic fields greater than about 1 Tesla, inclusion of a region of a patient or other imaging subject inside the coil can substantially distort the B1 field, leading to an inhomogeneous B1 field. This inhomogeneity can be reduced by designing the radio frequency coil using design modeling that accounts for the coil loading. However, the birdcage coil has a limited number of design parameters, such as the number of rungs, coupling reactances between the rungs and end-rings, and so forth, which limits the extent to which birdcage coil design can counteract asymmetric coil loading.
The following contemplates improvements that overcome the aforementioned limitations and others.

Imaging region-specific radio frequency coils for MRI


A plasma CVD film formation apparatus includes: a reaction chamber; a shower plate installed inside the reaction chamber; and a susceptor for placing a wafer thereon installed substantially parallel to and facing the shower plate. The shower plate has a surface facing the susceptor, which is configured using a convex shape toward a center as a basic shape and overlaying at least one equation thereon, and the susceptor supports the wafer at a peripheral portion and at a position between a central portion and the peripheral portion.

1. Field of the Invention
The present invention generally relates to a semiconductor manufacturing apparatus, and specifically to a plasma CVD film formation apparatus that comprises a shower plate and a susceptor having unique shapes and achieves favorable wafer temperature distribution as well as film thickness and quality distributions.
2. Description of the Related Art
FIG. 1 shows an overview of a conventional plasma processing apparatus. This plasma processing apparatus 1 has a reaction chamber 6, a gas introduction port 5, and a second electrode comprising a susceptor 3 and a heater 2. The second electrode may be structured with its susceptor 3 and heater 2 brazed together, as disclosed in U.S. Pat. No. 3,207,147. Gas is introduced from the gas introduction port 5 through a gas line (not shown). A round-shaped first electrode 9 is placed immediately below the gas introduction port 5. The first electrode 9 has a hollow structure, and its bottom surface has many pores through which gas is injected toward a wafer 4. To facilitate maintenance and reduce parts costs, the first electrode 9 is also constructed in such a way that a shower plate 11 having multiple gas introduction holes can be replaced.
At the bottom of the reaction chamber 6 is an exhaust port 10. This exhaust port 10 is connected to an external vacuum pump (not shown), through which the interior of the reaction chamber 6 is evacuated. The susceptor 3 is placed parallel to and facing the first electrode 9. The susceptor 3 holds the wafer 4 on top, and heats the wafer 4 continuously by means of the heater 2 to maintain the substrate 4 at a specified temperature (150 to 450° C.). The gas introduction port 5 and first electrode 9 are insulated from the reaction chamber 6, and connected to a first high-frequency power supply 7 provided externally. In some cases, a second high-frequency power supply 8 is also connected. Numeral 12 indicates grounding. Consequently, the first electrode 9 and second electrode function as high-frequency electrodes and create a plasma reaction field near the wafer 4. The type and quality of the film formed on the surface of the wafer 4 vary in accordance with the type and flow rate of material gas, temperature, radio frequency type, spatial distribution of plasma, and potential distribution.
To form C-doped silicon oxide film offering a low dielectric constant, silicon hydrocarbons containing multiple alkoxy groups is used in combination with Ar and/or He. In some cases, alcohols, ethers, unsaturated hydrocarbons and the like may be used as bridging gases. In other cases, oxidizing gases such as ozone, oxygen and nitrous suboxide may be used.
The uniformity of the film formed on the wafer is closely correlated to the gas holdup time and plasma density in the reaction area. As shown in FIG. 1, the distance between the susceptor 3 and shower plate 11, or distance between the wafer 4 and shower plate 11, remains constant on the conventional plasma CVD film formation apparatus. Generally on a parallel-plate plasma CVD film formation apparatus, the distribution of electric field strengths between the two plate electrodes (Ø250 mm) presents a trend where the electric field strength becomes the greatest at the center and decreases gradually towards the outside in the radial direction, as described in U.S. Pat. No. 6,631,692. Based on this distribution trend, the electric field strength is approx. ±5% in the film deposition area on a Ø200 mm wafer, and the distribution band increases further on a ◯300 mm wafer. For this reason, the electric field near the center of the wafer 4 is relatively stronger than in the electric field away from the center in the radial direction, and accordingly the plasma density and gas reaction rate are also higher near the center. In addition, although the gas reaction rate is affected by the holdup time of gas in the reaction space, in an example using a conventional plasma CVD film formation apparatus the film thickness became the greatest near the center, indicating that the film thickness distribution is strongly affected by the plasma density. In cases like this, the film thickness distribution has traditionally been corrected by controlling the gas flow rate, mixing ratio of component gases, pressure, radio frequency and radio frequency power output. However, changing these parameters also changes the film thickness and deposition speed, which in turn reduces the stability of the process. In addition, oftentimes the film quality does not have a uniform distribution unless the wafer temperature distribution is uniform.
FIG. 2 illustrates the susceptor 3 and shower plate 11 reported by the inventors of the present invention in a technical bulletin published by the Japan Institute of Invention and Innovation (Technical Disclosure No. 2002-1338). In this figure, the susceptor 3 is placed on top of a heater 2 and the susceptor surface on which a wafer 4 is supported has a concave shape. The distance (db) from the back face of the wafer 4 to the center of this concave surface (the depth of the concave) is 0.1 to 4 mm, and it is stated that the wafer 4 should ideally contact the susceptor 3 only at its periphery. The shower head 11 has a convex shape, and the deformation rate (fd) of the shower head 11, as defined by the equation (dc−da)/da×100 (wherein dc is the distance between the showerhead and wafer at the center, and da is the distance between the showerhead and wafer at the periphery) is in a range of −1% to −20%. The report states that this shape allows for formation of film having uniform thickness and quality. However, the inventors of the present invention subsequently discovered that the aforementioned structure would not provide a uniform wafer temperature distribution, nor would it provide uniform film thickness or quality distribution, if wafers of large areas, such as those with a diameter of 300 mm, are processed.

Plasma CVD apparatus for forming uniform film


In one embodiment, a liquid crystal display device comprises a pixel electrode including a first main electrode disposed between a first line and a second line and extending like a belt in a first extending direction. A first counter electrode includes a second main electrode extending like a belt in the first extending direction, a second counter electrode having a third main electrode extending like a belt in the first extending direction. The second and third main electrodes are disposed on both sides of the first main electrode, and an initial alignment direction of the liquid crystal molecules is parallel with a direction passing through an interstice between the first end side of the first main electrode and the second line, and through an interstice between the second end side of the first main electrode and the first line.

Recently, flat display devices have been actively developed. Among others, liquid crystal display devices have attracted an attention due to their advantages such as lightness, thinness, and low power consumption. In particular, noteworthy configurations for an active matrix type liquid crystal display device incorporating a switching element in each pixel are those using a lateral electric field (including a fringe electric field) such as an IPS (In-Plane Switching) mode and FFS (Fringe Field Switching) mode. The liquid crystal display device in the lateral electric field mode includes pixel electrodes and counter electrodes formed in an array substrate, and performs switching of liquid crystal molecules using the lateral electric filed substantially parallel with a principal surface of the array substrate.
On the other hand, there has been also proposed a technique of performing switching of the liquid crystal molecules by forming a lateral electric field or an oblique electric field between the pixel electrode formed on the array substrate and the counter electrode.


In a multi-chip package having vertically stacked semiconductor integrated circuits (chips), a heat transmitting conductive plate (5) can be interposed between a lower layer semiconductor chip (3) and an upper layer semiconductor chip (4) and connected to a ground wiring of a substrate (2) through a bonding wire (9). A heating transmitting conductive plate (5) at the ground potential can block propagation of noise between the lower layer semiconductor chip (3) and upper layer semiconductor chip (4). Thus, the addition of noise to signals of an analog circuit in the upper layer semiconductor chip (4) can be avoided, reducing noise induced malfunctions. Furthermore, heat generated by the lower layer semiconductor chip (3) and upper layer semiconductor chip (4) can be transmitted through contact points with the heat transmitting conductive plate (5) for dissipation therefrom. This can improve heat dissipating capabilities of the semiconductor device (1) contributing to more stable operation.

A semiconductor device package type and method that is recently come into use is the multi-chip package (MCP). A multi-chip package can include multiple integrated circuit (IC) chips contained in a single package. This can raise chip packaging density, which can meet the demand for reductions in component/device size.
Multi-chip packages can be classified into planar packaging types, in which multiple chips are mounted on the same substrate that forms a plane, and vertical packaging types, in which multiple chips are arranged in vertical direction to form a stacked structure.
A conventional planar packaging type semiconductor device is set forth in a side cross sectional view in FIG. 31. The conventional semiconductor device is designated by the general reference character 101, and can include semiconductor chips 103 and 104, each having memory circuit formed thereon, and arranged in the same plane.
A known conventional vertical packaging type semiconductor device is shown in FIG. 32 in a side cross sectional view. In this example, conventional semiconductor device 108 can include semiconductor chips 106 and 107 stacked on a substrate 105. Circuit faces for semiconductor chips (106 and 107) can be turned upward (i.e., toward the top of the figure in FIG. 32).
Another conventional vertical packaging type semiconductor device is shown in a side cross sectional view in FIG. 33, and designated by the general reference character 112. FIG. 33 shows a chip-on-chip (COC) device 112 in which semiconductor chips 110 and 111 are arranged on a substrate 109 with their circuit faces opposing one another.
A conventional method of manufacturing a vertical packaging type multi-chip semiconductor device will now be described.
Referring to FIG. 34(a), in a conventional method of manufacturing a COC type device, a first step is to mount a lower side of semiconductor chip 110 onto a substrate 109 by dripping or applying an adhesive 113 onto the substrate 109 and then attaching semiconductor chip 110 to the substrate 109.
Referring to FIG. 34(b), the adhesive 113 may then be cured and bumps 110a can be formed on the circuit face of semiconductor chip 110.
Referring to FIG. 34(c), an upper side (e.g., a circuit face) of semiconductor chip 111 can be mounted onto semiconductor chip 110 so that electrodes of the semiconductor chips (110 and 111) are brought into contact with one another. The semiconductor chips (110 and 111) are then joined by a hot press fit. Thereafter, the semiconductor chips (110 and 111) are sealed with a resin to obtain the semiconductor device 112 shown in FIG. 33.
As shown in FIG. 34(c), in the manufacture of a conventional semiconductor device employing a vertical type multi-chip package, an adhesive may be uneven in thickness after curing. This can cause a tilt to occur in the semiconductor device (e.g., 110) with respect to a substrate surface (e.g., 109). Such a tilt can result in uneven force being applied to different portions of semiconductor device 110 when the other semiconductor device 111 is attached thereto. Such uneven force can damage circuit components on the face of semiconductor device 110.
Semiconductor devices employing vertical packaging type arrangements for a multi-chip package can reduce overall device sizes. However, such arrangements can have drawbacks in the event one or more of the included semiconductor chips consumes a large amount of power. In particular, when a semiconductor device consumes a large amount of a power, it generates a correspondingly large amount of heat. Conventional vertical packaging types, like those described above, may not provide sufficient heat dissipation. As a result, chips within the multi-chip package can overheat, resulting in malfunctions or damage to the device.
To address heat dissipation needs for a multi-chip package, conventional techniques are proposed that include placing a heat dissipating metal plate above an upper side of semiconductor chip or between semiconductor chips. One such conventional example is disclosed in Japanese Patent Publication 2000-294723A.
The technique disclosed in the above publication can have drawbacks in certain applications. For example, a semiconductor chip with an analog circuit can be mounted with a semiconductor chip with a digital circuit in order to provide multiple device functions. However, in such an arrangement noise generated from one semiconductor chip can adversely affect the other semiconductor chip.
That is, while the above conventional technique aims to improve heat dissipation capabilities, such a technique does not provide a countermeasure against noise. Therefore, multi-chip packages which include a heat dissipating metal plate that seek to include an analog circuit, which can be particularly susceptible to noise, may more readily draw in noise, causing a malfunction and/or a decline in reliability.
This can make it difficult to reduce overall package size when employing a vertical packaging type multi-chip package.
In light of the above, it would be desirable to arrive at a vertical packaging type semiconductor device and manufacturing method that can ensure high reliability by providing sufficient heat dissipation, while at the same time reducing or eliminating susceptibility to noise, as compared to conventional approaches.

Semiconductor device including a heat-transmitting and electromagnetic-noise-blocking substance and method of manufacturing the same


Method, and associated apparatus, for operating a hybrid access terminal operable in a CDMA 1x/EVDO hybrid communication session system. The hybrid access terminal is operable to communicate pursuant to an EVDO communication session and to a PPP communication session. The opening and closing of the communication sessions are independent of one another. Opening of one session does not require opening of another of the sessions. And, closing of one of the sessions does not require closing of the other of the sessions.

A CDMA 1X/EVDO hybrid access terminal (mobile device) is a hybrid system that has evolved from the CDMA 2000 system. EVDO stands for Evolution Data Only or Data Optimized and, as suggested by this, is a data only system. EVDO is also alternatively known as High Rate Packet Data (HRPD). One advantage of EVDO systems is that they allow a higher transfer rate for data. They are also useful to carriers to clear the 1X system voice capacity by removing data traffic from the 1X system.
Once a hybrid access terminal has an EVDO session established, applications that use the EVDO air interface will need to open a point-to-point protocol (PPP) session using Simple IP or Mobile IP. Current systems have two options for tying the PPP session with the EVDO session. By default, the two are never tied. Alternatively, the two may be always tied together.
The problem with this is that if EVDO and PPP sessions are always tied together, situations exist where the EVDO session does not necessarily need to be closed when the PPP session is closed, or the PPP session does not necessarily need to be closed when the EVDO session is closed. If the two are not tied together, there are situations where it is desirable to close both the EVDO session and the PPP session together and this may not happen if the two are not tied together.

Method and apparatus of selectively tying the opening and closing of EVDO and PPP sessions


In accordance with the invention a set of dyes suitable for use in ink-jet inks and method for formulating the same are provided. The yellow ink of the present invention contains a yellow colorant having a CIELAB hue angle, h.degree., less than 90.degree. to provide a true representation of colors, particularly skin tone colors. More specifically, a specific dye set for formulating the yellow, cyan, and magenta inks is disclosed, comprising Yellow 104, Direct Blue 199, and Magenta 377 dyes, respectively. The Yellow 104, the Magenta 377, and the DB 199 dyes provide near photographic images having lightfast characteristics necessary to preserve the trueness of the inkjet images by (1) producing images having less light fade and (2) images that when they do fade, fade in a more uniform manner across the color set.

The use of ink-jet printing systems has grown dramatically in recent years. This growth may be attributed to substantial improvements in print resolution and overall print quality coupled with appreciable reduction in cost. Today's ink-jet printers offer acceptable print quality for many commercial, business, and household applications at costs fully an order of magnitude lower than comparable products available just a few years ago. Notwithstanding their recent success, intensive research and development efforts continue toward improving ink-jet print quality. In general, ink-jet print quality still falls short of that produced by more expensive technologies such as photography and offset or gravure printing. A surge in interest in ink-jet imaging (e.g., the rendition of pictures) has resulted in the need to produce near photographic quality printed images at a reasonable cost. The challenge remains to further improve the image quality and lightfastness of ink-jet printed images, especially images containing skin tones without increasing their cost.
Color ink-jet printers typically use three inks of differing hues: magenta, yellow, and cyan, and optionally black. The particular set of colorants, e.g., dyes, used to make the inks is called a "primary dye set." A spectrum of colors, e.g., secondary colors, can be generated using different combinations of the primary dye set. In printing processes such as lithography, dye transfer, and some types of thermal transfer, it is possible to vary spot size so that less is demanded of the primary colored inks when producing a good secondary. When the color inks are used in a binary printing device, that is, one in which a dot of color is either present or absent, e.g., a thermal ink-jet printer, the ability of the primaries to give recognizable secondaries is even more important.
If such an ink is to be used in an ink-jet printing device, characteristics such as crusting, long term stability, and materials compatibility must also be addressed. If the ink is to be used in a thermal ink-jet printer, the further constraint of being thermally stable (kogation-resistant) is added.
In general, a successful ink set for color ink-jet printing must be compatible with the ink-jet pen and printing system. Some of the required properties for the ink-jet ink include: good crusting resistance, good stability, the proper viscosity, the proper surface tension, little color-to-color bleed, rapid dry time, no negative reaction with the vehicle, high solubility of the dyes in the vehicle, consumer safety, low strike through, high color saturation, and good dot gain.
Furthermore, the color characteristics of the colorants play an important role in the quality of the printed ink-jet image. Color ink-jet inks have been designed and tailored for printing business graphics such as depiction of information in the form of "pie-charts" and "bar-charts." U.S. Pat. Nos. 5,108,504; 5,116,409; 5,118,350; 5,143,547; 5,145,519; 5,185,034; 5,198,023; 5,534,051; and 5,536,306 disclose yellow dyes, namely acid yellow 23, basic yellow 13, basic yellow 51, and direct yellow 86, for use in ink-jet inks. These dyes, although suitable for business graphics, do not provide a "true" representation of skin tones.
Any given perceived color can be described using any one of the color spaces, such as CIELAB, and Munsell, as is well known in the art. For example, in the Munsell color space a given color is defined using three terms, Hue, Value, and Chroma. Similarly, as illustrated in FIGS. 1 and 2, in the CIELAB color space, a color is defined using three terms L*, a*, and b*. L* defines the lightness of a color, and it ranges from zero (black) to 100 (white). The terms a* and b*, together, define the hue. The term a* ranges from a negative number (green) to a positive number (red). The term b* ranges from a negative number (blue) to a positive number (yellow). Additional terms such as h.degree. (hue angle) and C* (chroma) are used to further describe a given color, wherein EQU h.degree.=tan.sup.-1 b*/a* equation 1 EQU C*=(a*.sup.2 +b*.sup.2).sup.1/2 equation 2
One attribute which is particularly important in imaging (i.e., color rendition of pictures) is "color trueness." Color trueness describes how close the ink-jet printed image is to the original or primary object, such as the skin tone of a human being or the color of the sky. In addition, it is important that the printed image preserve its color characteristics over time as it is exposed to light. Thus, there is a need for more lightfast colorants. It is also of particular importance that when the image does fade, the fading occurs uniformly across all printed colors, thus minimizing the hue shift between the more faded and the less faded colors.
In the CIELAB color space, delta E (.DELTA.E) defines the difference between two sets of colors, such as the color of the printed image and the original object, or the color of the original printed image and the color of the same image after lightfade--the higher the .DELTA.E number, the more difference between the two colors EQU .DELTA.E=(.DELTA.L*.sup.2 +.DELTA.a*.sup.2 +.DELTA.b*.sup.2).sup.1/2equation 3
Inks are known which possess one or more of the foregoing properties. However, few inks are known that possess all the foregoing properties, since an improvement in one property often results in the degradation of another property. Thus, many inks used commercially represent a compromise in an attempt to achieve an ink evidencing at least an adequate response in each of the foregoing considerations. Accordingly, investigations continue into developing ink formulations which have improved properties and which do not improve one property at the expense of the others. Thus, challenge remains to further improve the image quality and light fastness of the ink-jet prints without sacrificing pen performance and reliability.

Dye set for improved ink-jet image quality


An intervertebral disc prosthesis comprises a first endplate, a second endplate, and a bearing surface positioned between the first endplate and the second endplate. The bearing surface may be provided by a mobile bearing disc including a convex bearing surface configured to engage the first endplate and a concave bearing surface configured to engage the second endplate. The multiple bearing surfaces of the mobile bearing disc engage articulating surfaces on the endplates to form a plurality of articulating joints. Each articulating joint is configured to facilitate a particular type of movement for the segmental unit. Furthermore, each articulating joint is defined by a distinct center of rotation. The contact pair formed by the convex bearing surface of the bearing component and the concave bearing surface of the first endplate may provide a flexion/extension center of rotation for the prosthesis. The contact pair formed by the convex bearing surface of the bearing component and the concave bearing surface of the first endplate may provide a lateral bending/torsional center of rotation for the prosthesis.

This invention relates to the field of prosthetics, and more particularly, to an intervertebral disc prosthesis designed to replace a damaged intervertebral disc.
The human spine consists of twenty-four small bones known as vertebrae that protect the spinal cord and provide stability to the torso. The vertebrae are arranged in a column and stacked vertically upon each other. Each vertebra is comprised of two parts including an anterior part and a posterior part. The anterior part is often referred to as the vertebral body, and the posterior part is often referred to as the vertebral arch. The vertebral bodies are generally separated by a fibrous bundle of tissue called an intervertebral disc. These intervertebral discs act as a cushion to the spinal column by absorbing energy and transmitting loads associated with everyday movement. They also prevent the vertebrae from rubbing against each other. The combination of an intervertebral disc and its associated superior vertebra and inferior vertebra may be referred to as a functional segmental unit.
Over time, the normal aging process causes the intervertebral discs to degenerate, diminishing their water content and thereby reducing their ability to properly absorb the impact associated with spinal movements. Diminished water content in the intervertebral discs may also cause the vertebrae to move closer together. Tears and scar tissue can weaken the discs, resulting in injury. When the discs wear out or are otherwise injured, a condition known as degenerative disc disease results. With this condition, discs do not function normally and may cause pain and limit activity.
The condition of degenerative disc disease can potentially be relieved by a surgical procedure called artificial disc replacement or total disc replacement. In this procedure, the damaged intervertebral disc is replaced by an intervertebral prosthetic device (i.e., an "artificial disc" or "intervertebral disc prosthesis"). A typical prior art artificial disc comprises two endplates. One endplate faces a superior vertebra and the other endplate faces an inferior vertebra. A bearing surface is provided between the two endplates, allowing the endplates to rotate relative to one another and generally mimic the motion allowed by a natural disc.
In order to be safe and efficacious, a total disc replacement should not disrupt the normal kinematics of the functional segmental unit. Preferably, an intervertebral disc prosthesis should allow the vertebra to move with respect each other by means of the same, normal, physiological, instantaneous centers of rotation as the intact functional segmental unit. Under normal conditions a superior vertebra and inferior vertebra for a given functional segmental unit will rotate with respect to each other about differing centers of rotation, depending upon the type of movement, whether flexion/extension, lateral bending, or axial rotation (also sometimes called as "torsional rotation"). Therefore, the center of rotation that defines one type of movement may be different from the center of rotation that defines another type of movement.
As noted above, the locations of instantaneous centers of rotation in the lower cervical spine depend on the type of forces exerted on the spinal segments. While the locations of these instantaneous centers of rotation have not been precisely pinpointed, general observations have been made. For example, with respect to the C5-C6 cervical functional unit, axial rotation appears to be defined by a center of rotation (COR) that is located within the disc space when viewed from above but either to the left or to the right of the geometric center of the disc, depending on the direction of motion. For flexion/extension (F/E) movement, the COR at C5-C6 is located at the anterior portion of the subsequent, lower vertebra. In lateral bending, there is much speculation about the region of interest for determining the instantaneous centers of rotation. However, it appears that lateral bending is defined by a COR near the geometric center of the disc, which varies depending on the direction of motion.
Contemporary cervical intervertebral prosthetic devices typically have a COR that is centrally located immediately below a single contacting surface radius. While this may allow relatively normal lateral bending and axial rotation, such a design does not take into account the normal flexion-extension COR located at the anterior portion of the subsequent, lower vertebra. As far as flexion-extension is concerned, a central COR is not consistent with the normal kinematics of the functional segmental unit. Accordingly, a central COR for flexion/extension movements will force the vertebrae along non-physiologic paths.
As a vertebra goes through its ranges of motion, the pattern of motion is determined by a combination of the physical contact between the geometric anatomy of the structures, their physical properties, and the properties of the passive restraints that hold the functional units together (ligaments, muscles, etc.). The facets are the anatomical features that contribute most to dictating where the center of motion will be located. In the C5-C6 region, the facets are positioned approximately at a 45 degree angle to the disc. This is an important clue as to an anterior location for the flexion/extension COR. Thus, the centrally located COR typically found in current prosthetic discs is inconsistent with the plane of the contacting facets at the C5-C6 level.
Accordingly, it would be advantageous to provide a total disc replacement that performs consistent with the normal kinematics of the functional segmental unit. Furthermore, it would be advantageous to provide an intervertebral disc prosthesis configured to provide multiple, adaptative centers of rotation, depending upon the type of vertebral movement facilitated by the disc, including one center of rotation substantially removed from another center of rotation.

Disc prosthesis having remote flexion/extension center of rotation


An object of the present invention is to provide a trolling device which can reduce the operational force of a trolling lever while the oil pressure setting of a marine gear is raised to increase the capacity of a transmission torque. The trolling device has a pressure reducing valve 23 for reducing clutch oil pressure and a low speed valve 22 for adjusting the spring force of a pilot spring 24 of the pressure reducing valve 23 in conjunction with a trolling lever 25, the low speed valve 22 having a protrusion 22a which extends inside a coil spring constituting the pilot spring 24 to the side of the pressure reducing valve 23 and comes into contact with the pressure reducing valve 23 at least when forward and reverse clutches are fully engaged, the protrusion 22a having a drain oil passage 22c which comes into communication with an orifice 23c when in contact with the pressure reducing valve 23 during trolling and discharges drain oil from the orifice 23c.

Small crafts, such as fishing boats, fishing leisure boats, and the like, are frequently required to travel at quite low-speeds for some uses. For example, the following cases can be cited: stopping at fishing grounds; crafts stopping at a fixed point against a current without anchoring; traveling at a slow speed in accordance with the net hauling speed so as not to apply an excessive load to the net and to avoid tangling the net around the propeller during net hauling, etc.
As a device for achieving such travel, a trolling device mounted on a speed reducing and reversing apparatus provided with a friction disc hydraulic clutch is conventionally known (Patent Document 1).
The trolling device is so constituted that the speed of the craft can be adjusted by alternatively selecting an oil pressure at which a clutch can be fully connected and an oil pressure at which the clutch can be incompletely connected (half-clutch state) by rotating an operation lever.
With increase in engine outputs in marine gears, higher capacity of transmission torque is required. Increasing the number of friction discs in the clutches or the like can increase the capacity of the transmission torque, but doing so may cause problems such as an increased size of the marine gear body.
Accordingly, in order to increase the capacity of the transmission torque and also maintain the size of the marine gear body, the surface pressure of the friction discs needs to be raised to increase of the oil pressure setting of the marine gear.
[Patent Document 1] Japanese Unexamined Patent Publication No. H06-80098


The object of the invention is to provide a method for easily and objectively detecting mood disorders in a subject by measuring the expression levels of prescribed genes in the peripheral blood of the subject, the reliability of the detection result being high. The invention also provides a method for detecting mood disorders in a subject, the method having a step for measuring the gene expression levels of ribosomal protein genes, CDKN1C, or any combination thereof in the peripheral blood derived from the subject, and detecting whether or not the subject has mood disorders on the basis of the measurement results.

Mood disorder is a psychiatric illness represented by depression and has such symptoms as depressed moods, anxieties, impatience, declined mental activities, and it is also known that the symptoms of mood disorders include impaired appetite, insomnia, alcohol dependency and what not.
The mood disorders include major depression and bipolar disorders; it is reported that the lifetime prevalence exceeds 10% up to 15% these days and assumed that these rates will increase in future in consideration of stressful circumstances in the modern society. Although the mood disorder is an illness having a high incidence rate, many patients think that this illness is simply a physical malfunction, because the symptoms of the mood disorder vary and frequently appear physically, so that it is difficult to diagnose this illness accurately; furthermore this illness is related to social issues such as an increase in social withdrawal and suicide, and therefore there is an urgent need to accurately diagnose and treat mood disorders.
Conventional diagnoses of mood disorders frequently depend on evaluation made by doctors and clinical psychologists and subjective opinions of patients. As it is difficult to obtain a disease certificate on the basis of such a subjective diagnosis, some patients appeal excess symptoms, and on the other hand some patients avoid seeing physicians, because they do not want to be diagnosed as mood disorders for fear of other people's distorted views, and tend to underestimate their symptoms, so that it is difficult to diagnose mood disorders accurately. Furthermore, accurate evaluations made by physicians and clinical psychologists require skilled expertise as well as sufficient knowledge and experience about mood disorders; however, it is frequently difficult to tell physical symptoms that are not caused by mood disorders from physical symptoms caused by mood disorders.
In view of such circumstances, Japanese Patent No. 5442208, for example, proposes searching for possible causative genes of depression and using those genes in diagnosis as molecular markers.
However, since there are as many as 18 candidate genes for molecular markers searched in Japanese Patent No. 5442208 and no similarities have been found among their individual genetic functions, it cannot be ruled out that only genes changed in their expressions, which are indirectly or accidentally caused by direct functional changes associated with depression, are observed; therefore it is unknown whether or not a group of genes sharing similar biological functions change in their expression in depression. Accordingly, there is some possibility that the aforementioned search of molecular markers is insufficient or that marker genes expressed as a result of some specific functional changes of patients with depression are overlooked.
Moreover, no confirmatory analysis has been conducted in both specimens and methods as the means of searching for candidate genes, and therefore it cannot be ruled out that what was observed was genes that changed in their expressions accidentally; therefore the sensitivity and reproducibility of those molecular markers for depression is questionable, reliability being not so high.


A communications system including a primary station and at least one or more secondary stations. The secondary station transmits signals as spread spectrum signals and a receiver in the primary station receives and decodes the spread signals. Frequency offsets in the received spread spectrum signals are dealt with by digitizing the received signals to produce raw data samples which are despread, frequency analyzed and the spectrums derived are scanned for peaks exceeding a predetermined threshold and the outputs indicate the presence or absence of codes.

The present invention relates to improvements in or relating to spread spectrum signalling schemes and has particular but not exclusive application to the transmission of low power spread spectrum signals from low power transmitters which may be included in message receiving apparatus such as selective call receivers, for example digital pagers or hand held digital signal processing apparatus.
U.S. Pat. No. 4,882,579 discloses an acknowledge back (ack-back) paging system in which a central station transmits a sequence of addresses of a group of M different ack-back pagers for whom there are paging signals and after an interval this is followed by a sequence of messages to the group of ack-back pagers. The order of the messages is related to the order of the addresses in the transmitted sequence in a predetermined manner. The users of the group of addressed ack-back pagers indicate a response, for example by pressing a button, to their respective pagers thus providing ack-back data. The pagers in the group of addressed ack-back pagers then simultaneously transmit back to the central station their ack-back signals using different pseudo-random codes, a different pseudo-random code being allocated to each of the pagers in the group. In order to permit simultaneous transmissions the pagers must send the transmitted acknowledgement signal with extreme accuracy in frequency. In order to facilitate accurate frequency tuning the central station transmits a burst of reference carrier in a time interval between the transmissions of the sequence of addresses and the sequence of messages and the pagers have to include frequency control circuitry which permits such accuracy in frequency tuning. Additionally power control techniques are applied by the pagers to regulate transmitter output power.


When print data is received from a host computer, a rendering/compression/expansion unit generates image data in a unit of a band, then a specified logical operation is performed on the image data in the band unit and the resultant image data is compressed to be stored. When the image data corresponding to one page of an original image is stored, the image data is expanded and printed by a printer. Since the generation of image data and logical operation are performed in the band unit, the memory capacity required for the processing is small. Also, since the image data is compressed after the above process, the memory capacity required for storing is small. By virtue of this, resolution or tone of an original image does not have to be decreased depending on a memory capacity.

Present invention relates to a color printing apparatus for receiving image data from a data supplying source such as a host computer or the like and performing logical operation on the received data to print out a color image.
Generally, a system including a printer and a document processing apparatus e.g. document generating system or the like, is configured as shown in FIG. 21. The system is constituted by a host computer 101 which performs processing e.g. image forming or the like on data to be outputted, and a printer 102 which prints the data to be outputted processed by the host computer on a printing medium e.g. a print sheet, connected to the host computer 101. In the system, a user edits an image to be outputted by the host computer 101. When a user completes editing operation of the image to be outputted, the image data is converted to outputting data processable by the printer 102, and sent to the printer 102. The printer 102 prints a sheet according to the received data.
In order to express a color image on a display 1011 which is included in the host computer 101, the color image data in the host computer is expressed by additive mixture of color stimuli: R, G and B (FIG. 22A), because of the characteristics of the display. However, the printer 102 expresses data by subtractive mixture of color stimuli: Y, M, C and K (FIG. 22B).
Accordingly, when printing operation is to be performed, it is necessary to perform conversion from R, G and B to Y, M, C and K either in the host computer 101 or in the printer 102 utilizing some type of method. Since the method of conversion is already known to those who are skilled in the art, detailed descriptions will not be provided herein.
Further, in order to output a color image having an image area where plural colors overlap each other, it is necessary to perform logical operation for, e.g. mixing colors of the overlapped areas of an object or the like. Recently-available operating system (OS) for the host computer 101 includes a functional operation (hereinafter referred to as "rendering operation") for calculating colors of such image objects. In a system not having a rendering operation function, an image of three circles respectively colored by R, G and B as shown in FIG. 23A has to be printed in accordance with a predetermined rendering operation procedure, such as overwriting.
Lately, a host computer OS which includes the function of rendering operation is available for calculating colors of an image area where objects (circles) respectively colored by Y, M and C overlap on top of each other as shown in FIG. 23B. In a system including such OS, an application software operated on the host computer informs of a rendering operation procedure for calculating the overlapped colors to e.g. a display manager or the like in the OS, thereby realizing rendering operation for mixing overlapped colors or the like. The application software does not need to perform the rendering operation itself, or is not influenced by the result of the rendering operation. More specifically, when rendering of an image as shown in FIG. 23B is to be performed, the application software operating on the host computer which supports the rendering operation only needs to instruct the OS of the host computer to render each of the objects (circles) colored by Y, M and C, and designates a rendering operation procedure. If the same image (circles) is to be rendered by an OS which does not support the rendering operation, the overlapped area where plural objects overlap on top of each other needs to be first extracted with respect to each of Y, M and C by an application software or a printer driver, then the color of the extracted area to be outputted is determined by a rendering operation, and the overlapped area must be overwritten by a color determined by the rendering operation.
However, even if the OS on the host computer supports the rendering operation for calculating overlapped colors for displaying, a connected printer must also support such rendering operation for calculating the overlapped colors. Otherwise, it is necessary for an application software in the host computer or the printer driver to perform processing similar to that of a host computer which does not have an OS to support the rendering operation, to perform printing.
Moreover, in the rendering operation, a user normally generates an image to be outputted on a display on the host computer, thus the rendering operation procedure is designated on the basis of R, G and B data. Therefore, a rendering operation must also be performed at the printer side to calculate pixels expressed in R, G and B. In other words, printers, in most cases, cannot perform the rendering operation on Y, M, C and K data (where conversion processing of RGB.fwdarw.YMCK has been performed). This is due to the fact that the capacity of a memory source is quite limited for a built-in apparatus which does not include a virtual memory. Therefore, in most cases, tone or resolution of an image is decreased at the time of the conversion processing of RGB.fwdarw.YMCK performed by the host computer. In such case, the conversion processing is irreversible. Thus, the Y, M, C and K data received by the printer does not accurately corresponds to R, G and B data sent by the host computer; in other words, the printer cannot accurately reproduce data obtained by the rendering operation performed by the host computer, causing difficulty in supporting the rendering operation.
Color data processing performed by a color printer can be roughly classified into a case where processing is performed on Y, M, C and K data (FIG. 24), and a case where processing is performed on R, G and B data, then converted to Y, M, C and K data (FIG. 25). In the former case, there is a problem as described above in that the rendering operation is difficult to perform. In the latter case, if storage for storing R, G and B data consists of 1 memory bank, each color data of one pixel for Y, M, C and K is generated by a corresponding pixel of R, G and B data. Therefore, a transmission rate through a bus requires three times the rate of transmission for outputting the processing color (Y, M, C and K). If the required transmission rate from the memory storing rendering data (R, G and B) to a printer engine cannot be secured, a problem arises in that the tone or resolution of the image must be decreased.
When a printer apparatus is configured according to the diagram shown in FIG. 25, the printer realizes a decreased tone and resolution due to the above problem of a transmission rate through a bus. However, a print request from a user does not always require a rendering operation for calculating overlapped colors. In the apparatus such as that shown in FIG. 25, even when data not requiring a rendering operation is inputted, the tone or resolution, which could be outputted if processed by the apparatus configured as shown in FIG. 24, is unconditionally decreased.
Moreover, when a color printer which supports a rendering operation is to be realized, a memory thereof must have enough capacity to store each of R, G and B data corresponding to at least one page of data. Therefore, as resolution or tone of an output image increases, the memory capacity for storing the image data increases. Accordingly, in a case of a currently-available printer having a resolution of 600 dpi or a printer capable of expressing multiple tones, the memory required cost is high.

System for processing received print data prior to printing


As an optical disc is being rotated within an optical drive, an optical mechanism of the optical drive traces a discrete spiral path relative to the optical disc. As the discrete spiral path is traced by the optical mechanism of the optical drive, the optical mechanism selectively writes to the optical disc.

Many types of optical discs include a data region and a label region. The data region is where the machine-readable binary data is written to, whereas the label region allows the user to record a human-readable label or image on the optical disc. A laser or another type of optical beam can be used to read from and/or write to the data region and the label region of an optical disc. For example, in the patent application entitled "Integrated CD/DVD Recording and Label", filed on Oct. 11, 2001, and assigned Ser. No. 09/976,877, a type of optical disc is disclosed in which a laser or other optical beam can be used to write to the label region of an optical disc.
In some optical discs, the data region and the label region may be on opposite sides of the disc. The data side of such an optical disc typically has one spiral track or a number of concentric tracks preconstructed thereon in the form of grooves. Therefore, an optical drive is able to employ a feedback-type process, such as a closed loop-type process, to ensure that it is properly following a track when writing data to or reading data from the track. However, the label side of an optical disc, such as the label side of the optical disc described in the patent application assigned Ser. No. 09/976,877, usually does not have any preformed tracks. As a result, it can be difficult to properly follow a track when writing to the label side of such an optical disc.

Tracing discrete spiral path relative to optical disc

Hewlett-Packard Development Company, L.P.


A programmable logic device (PLD) adapted to enter a low-power or sleep mode with programmable wakeup pins in a wakeup group of pins is disclosed. Wake on a single pin change, wake on vector, and wake on a single pin transition are supported. The approach is to select the actively participating pins, enable the desired operation, define the wakeup condition, enter sleep mode, monitor the external signals coupled to the active pins, and exit sleep mode when the wakeup condition is detected.

1. Field of the Invention
The Present invention relates to the field of integrated circuits. In particular, it relates to power management in programmable logic integrated circuit devices.
2. The Prior Art
Programmable Logic Devices (PLDs) are known in the art. A PLD is an integrated circuit having a programmable logic core comprising uncommitted logic and routing resources that is able to implement an arbitrary end user design up to the logic capacity of the device. PLDs come in a number of types with Field Programmable Gate Arrays ("FPGAs") being the variety with the largest logic capacity and highest performance in commercially available devices, which typically makes them the flagship product lines of PLD manufacturers. Since high capacity and high performance typically result in high power consumption, the present invention is preferably applied to FPGAs, though the inventive principles herein apply to all classes of PLD.
An FPGA comprises circuitry to implement any number of initially uncommitted logic modules arranged in an array along with an appropriate amount of initially uncommitted routing resources. Logic modules are circuits which can be configured to perform a variety of logic functions, for example, AND-gates, OR-gates, NAND-gates, NOR-gates, XOR-gates, XNOR-gates, inverters, multiplexers, adders, latches, and flip/flops. Routing resources can include a mix of components, for example, wires, switches, multiplexers, and buffers. Logic modules, routing resources, and other features, for example, user I/O buffers and memory blocks, are the programmable elements of the FPGA.
The programmable elements have associated control elements (sometimes known as programming bits or configuration bits) that determine their functionality. The control elements may be thought of as binary bits having values such as on/off, conductive/non-conductive, true/false, or logic-1/logic-0 depending on the context. Depending on the technology employed different numbers and types of circuit elements are used to create a control element. For example, to connect two circuit nodes an antifuse, a floating gate transistor, or an SRAM bit controlling a pass transistor may be used as one type of control element in their respective technologies. Or to create a programmable logic-0/logic-1 generator to control a logic circuit, a single SRAM bit, programming one of two floating gate transistors (one coupled to logic-0 and one coupled to logic-1), or programming one of two antifuses (one coupled to logic-0 and one coupled to logic-1) may be used as a second type of control element in their respective technologies. Other types of control elements are possible and the above examples are not limiting in any way.
The characteristics of the control elements vary according to the technology employed and their mode of data storage may be either volatile or non-volatile. Volatile control elements, for example, SRAM bits, lose their programming data when the FPGA power supply is disconnected, disabled or turned off. Non-volatile control elements, for example, antifuses and floating gate transistors, do not lose their programming data when the FPGA power supply is removed. Some control elements, such as antifuses, can be programmed only one time and cannot be erased. Other control elements, such as SRAM bits and floating gate transistors, can have their programming data erased and may be reprogrammed many times. The detailed circuit implementation of the logic modules and routing resources can vary greatly and is appropriate for the type of control element used.
Like most integrated circuits, FPGAs typically have an input/output (I/O) ring surrounding a programmable core, though other approaches are possible. The I/O ring contains bonding pads and input and output buffers that interface to circuits external to the FPGA as well as power supply and ground connections. Some of the input and output buffers are typically dedicated to control functions. Others are programmable elements that can be part of an end user's design. It is common for the programmable element inputs and outputs (also called user inputs or user input buffers and user outputs or user output buffers) to pair equal numbers of input buffers and output buffers together to form input/output buffers (also called I/O buffers or user I/O buffers or user I/Os or sometimes simply I/Os). In some FPGAs, one or more of the inputs, outputs, or I/Os can be shared between user design functions and control functions.
The logic design programmed into an FPGA by the end user is typically implemented by use of a computer program product (also known as software or, more specifically, design software) produced by the PLD manufacturer and distributed by means of a computer-readable medium, for example, providing a CD-ROM to the end user or making the design software downloadable over the internet. Typically the manufacturer supplies a library of design elements as part of the computer program product. The library design elements provide a layer of insulation between the end user and the circuit details of the FPGA features available to the end user, for example, logic modules, memory blocks and programmable delay lines. This makes the design software easier to use for the end user and simplifies the manufacturer's task of processing the end user's design by the various tools in the design software.
Typically, a user creates a logic design using the manufacturer-supplied design software. The design software then takes the completed design and converts it into the appropriate mix of configured logic modules and other programmable elements, maps them into physical locations inside the FPGA, configures the interconnect to route the signals from one programmable element to another, and generates the data structure necessary to assign values to the various control elements inside the FPGA.
As semiconductor processing technology has advanced in recent years, transistor dimensions have continued to decrease. As a consequence, operating voltages for these small geometry transistors have also typically dropped—though this trend has slowed in the last few process nodes (130 nm, 90 nm and 65 nm) since the gate oxide thickness of the devices has not been scaled with the lateral transistor geometries in order to maintain operating voltages in the 1.0 volt to 1.2 volt range. The result has been transistors with very thin gate oxide layers, very short channel lengths, and low threshold voltages, which produce substantially more leakage current than in previous generations. This has resulted in the static current of a CMOS integrated circuit typically becoming a substantial portion (and occasionally the majority) of the entire power budget. Dynamic power is also on the rise due to the ever increasing numbers of transistors that can be fit into an integrated circuit unmitigated by the traditional decreases in operating voltage.
As integrated circuit power has been rising, consumer demand for hand-held, battery-powered devices has been increasing. Power reduction is critical in such applications because battery life is a key component of both product usefulness and consumer acceptance. Even in non-portable systems, power reduction is becoming a key issue in new electronic products by both semiconductor and systems manufacturers due to a variety of environmental concerns.
As a consequence, PLD manufacturers have been attempting to lower the power of their parts and there have been a number of different families of PLDs and FPGAs that have one or more modes with reduced power combined with reduced functionality (sometimes called a "low-power" mode or a "power-down" mode or a "sleep" mode). The parts can be placed in one of these modes to reduce power when normal operation is not required.
FIG. 1 shows a system using an FPGA of the prior art. In FIG. 1, FPGA 100 comprises FPGA core 102 where the large majority of the FPGA's programmable elements are located and the majority of the end user's design is programmed, and a power control block 104 that handles the necessary control functions for putting the part into a low-power or sleep mode (i.e., reducing some or all functionality of the circuit in order to reduce power consumption) and subsequently waking it up (i.e., restoring functionality not available in the sleep mode). User logic 106 is programmed into the FPGA core 102. There is a source of external system control logic 108 coupled to the power control block 104 in FPGA 100 by interconnect 110 through input buffer 112. In order for the external system control logic 108 to place FPGA 100 into sleep mode or to wake it up, a signal is asserted on interconnect 110.
One drawback of this approach is there is no means of communication between power control block 104 and user logic 106. This means that there is no way for the FPGA 100 to shut itself down in an orderly fashion relative to whatever is transpiring in user logic 106 at the time the sleep mode request is received. To achieve an orderly shutdown by stopping clocks and preserving the contents of sequential elements (like, for example, latches, registers, internal SRAM blocks, etc.) inside FPGA core 102, then at least one optional interconnect 114 is coupled between external system control logic 108 and user logic 106 through at least one input buffer 116. This means that the designer of external system logic 108 is familiar enough with the workings of user logic 106 to correctly generate the signals on optional interconnects 114 relative to the signal on interconnect 110. In a similar manner, when coming out of sleep mode, external system logic 108 must correctly generate the signals on interconnect 110 and optional interconnects 114 in order to perform an orderly wakeup before starting normal operation.
A second drawback of the approach of FIG. 1 is the inherent lack of flexibility. In the FPGAs of the prior art, input buffer 112 is a dedicated input that is used to initiate transitions into and out of sleep mode. This can be problematic, particularly in applications when multiple sources of stimuli are monitored to initiate those transitions.
One commercial family using the general approach of FIG. 1 is the Spartan 3 family of FPGAs from Xilinx, Inc. of San Jose, Calif., that have both a "suspend" mode and a "hibernate" mode. In suspend mode, all of the SRAM configuration bits and the various sequential elements (latches, flip/flops, SRAM blocks, etc.) keep their logic states and some sources of quiescent power are turned off in response to a single pin. In hibernate mode, external power switches are placed between the system power supplies and some or all (depending on the part) of the power supply pins of the FPGA effectively isolating them from the system (not shown in FIG. 1). Another commercial family using the FIG. 1 approach is the MachXO PLD family from Lattice Semiconductor Corporation of Hillsborough, Oreg. The MachXO family has a low power mode where the power is reduced and the user logic is not functional in response to a single pin.
FIG. 2 shows a system using another FPGA of the prior art. In FIG. 2, FPGA 200 comprises an FPGA core 202 and a power control block 204. User logic 206 is programmed into the FPGA core 202. There is a source of external system control logic 208 coupled to the power control block 204 in FPGA 200 by interconnect 210 through input buffer 212. In FPGA 200, the output of input buffer 212 also couples to user logic 206 in FPGA core 202. In order coordinate an orderly transition into a sleep mode, one or more interconnects 218 are coupled between power control 204 and user logic 206 in FPGA core 204.
This approach overcomes the first drawback to the FPGA architecture of FIG. 1, since only a single interconnect line is coupled between external system control logic 208 and FPGA 200. When the external system control logic 208 signals FPGA 200 to go into a low-power or sleep mode, user logic 206 can monitor the signal, place itself in a state appropriate for an orderly shutdown, communicate back and forth with power control block 204 on interconnects 218, and then turn control over the power control block 204 to place FPGA 200 in a low-power or sleep mode. To wake up FPGA 200, power control block 204 receives a signal on interconnect 210 and wakes up the FPGA 200 and initiates an orderly start up in conjunction with the user logic 206. Thus external system control logic 208 can be designed without any detailed knowledge of user logic 206.
One commercial family using the general approach of FIG. 2 is the Igloo family of FPGAs from Actel Corporation of Mountain View, Calif., which has a "flash-freeze" mode. In flash-freeze mode, the various sequential elements (latches, flip/flops, SRAM blocks, etc.) keep their logic states since the FPGA core remains powered up, however all clocks are shut off and certain circuits are placed in a low power state.
Unfortunately, the approach of FIG. 2 does little to make the use of Power Control block 204 more flexible, particularly with regards to the wakeup functionality. One of the strengths of PLDs is the ability to easily customize logic functions. However, when the FPGA 200 is in sleep mode any customized logic programmed inside of FPGA core 202 is unavailable for use in initiating the wakeup process.
Microcontrollers are known in the art. A microcontroller is a self-contained computer that typically contains a central processing unit (CPU), an adequate amount of both volatile memory (typically flash or EEPROM) and non-volatile memory (typically SRAM) for required tasks, and sufficient interface circuitry to interact with its environment and operate in a largely self-sufficient manner. Typically the non-volatile memory is used to store the software programs that the microcontroller runs during operation, though it can be used for other purposes such as data logging. Typically the volatile memory is used as a scratchpad for temporary data storage, though software can be loaded from outside the microcontroller into the SRAM and executed when necessary.
Microcontrollers are used in a wide variety of applications like automobiles, appliances, industrial controls, and hand-held devices. Often times they are left idle while waiting for some input, for example, a keystroke or a button push by a human user. Often to save power the microcontroller goes into a low-power or sleep mode waiting for a hardware interrupt generated by the expected external event, typically a transition on one of a designated number of pins on the microcontroller chip itself. When an interrupt is detected, the CPU wakes up and executes the interrupt handling software for the particular pin where the transition occurred. Often, the last instructions in the interrupt handling routine will put the microcontroller back into sleep mode until the next interrupt occurs.
An example of commercial microcontrollers using this approach is the MSP340 series from Texas Instruments of Dallas, Tex. They contain a CPU, up to 60 KB of flash prom, up to 2.5 KB of SRAM, up to four analog-to-digital converters, a hardware multiplier and a variety of bus interface I/O ports—some of them general purpose and some of them compatible with a specific interface standard. Five different low power modes are supported. Two of the 8-bit general purpose bus interface I/O ports have hardware interrupt capability providing up to 16 different hardware interrupts which can be used, for example, in conjunction with the power saving modes.
While this approach works well in microcontrollers with power-down modes, the infrastructure to handle hardware interrupts in software (CPU, non-volatile memory, SRAM, address and data busses, etc.) is typically not available in other sorts of semiconductors. In particular such functionality is unavailable in field programmable gate arrays of the prior art.

Programmable logic device with programmable wakeup pins


A method of fabricating a metal interconnection and a method of fabricating image sensor using the same are provided. The method of fabricating a metal interconnection including forming a interlayer dielectric layer on a substrate, forming an interconnection formation region in the interlayer dielectric layer, performing an ultraviolet (UV) treatment on the substrate after the interconnection formation region is formed and forming a metal interconnection in the interconnection formation region.

1. Technical Field
The present disclosure relates to a method of fabricating a metal interconnection and to a method of fabricating an image sensor using the same.
2. Description of the Related Art
An image sensor may transform optical images into electrical signals. Recent advances in computer and communication industries have led to a strong demand for high performance image sensors in various consumer electronic devices including, for example, digital cameras, camcorders, PCS (Personal Communication System), game devices, security cameras, and medical micro-cameras.
Specifically, a Metal Oxide Semiconductor (MOS) image sensor can be driven easily and implemented using various scanning methods. Also, the size of a product can be minimized as digital signal-processing circuits can be integrated into a single chip, and the fabricating cost can be reduced as MOS process technology can be reused. In addition, low power consumption makes it easy to apply MOS image sensors to battery-powered products. Therefore, with the advances in implementation of high resolution MOS image sensors, the use of MOS image sensors has rapidly increased.
Moreover, a MOS image sensor may include a photoelectric transformation device which absorbs incident light and accumulates the corresponding charge and multi-layer metal interconnections to output charges accumulated in the photoelectric transformation device. For the metal interconnections, aluminum or copper interconnections are widely used. As MOS image sensors become miniaturized, the copper interconnections are becoming more widely used as the copper interconnection may have lower specific resistance and can be formed in narrow patterns.
When forming copper or aluminum interconnections, a plasma etching process is used, and such process can cause damage to the photoelectric transformation device which can increase a dark level of output signals.

Method of fabricating metal interconnection and method of fabricating image sensor using the same


A container holder is operably mounted to the front of an instrument panel for minimal intrusion into the passenger compartment of the vehicle. The container holder includes a housing having a slot therein with an elongate width, and a drawer operably mounted in the slot and sequentially movable between a retracted position for storage adjacent the instrument panel, an extended position aligned with the slot, and a lowered use position extending outwardly into the vehicle passenger compartment. The housing includes a notch adapted to engage a mating lip on the instrument panel for positioning and supporting the container holder thereon.

The present invention relates to container holders for vehicles and particularly to a container holder storage system.
Numerous devices have been designed to hold containers such as cups, mugs, pop cans, glasses, and the like in vehicles. Many of these devices are adapted to move between a use position and an out-of-the-way storage position in a console or armrest so that they can be used only when desired and do not unnecessarily take up valuable space. Often they are stored in a center armrest between front passenger seats. However, not all vehicles have an armrest between the front passenger seats, nor does such a location always provide optimum placement of the container holder.
Some container holders that can be movably stored have been designed for attachment to the instrument panel of a vehicle, such as illustrated in U.S. Pat. No. 3,606,112 to Cheshier and U.S. Pat. No. 4,738,423 to DiFilippo. However, these cupholders require A horizontal opening extending into or below the instrument panel of the vehicle. The space necessary for such a horizontal opening may not be available at the desired height, given the compact design and mounting of a large number of components in modern instrument panels. Further, such horizontally extending openings are expensive to add to instrument panels since they cannot be easily retrofitted.
Thus, a container holder that optimizes use of vehicular space, container placement, ease of operation, and ease of installation including retrofitting is desired.


The present invention relates to a universal test systems and methods of use thereof for identifying a microorganism among at least two groups of widely divergent microorganisms. The universal test system comprises a predetermined combination of non-redundant biochemical tests comprising a substrate for at least one enzyme wherein the substrate, if acted on by the enzyme results in formation of a detectable product. Detectable products from the combination of biochemical tests are then used to identify the microorganism.

The development of methods to classify or identify bacteria has been an ongoing goal of the microbiology community since the very beginning of the discipline of microbiology. Early methods for classification were based upon microscopic examination of the microorganism and subsequent description of their cell morphology, i.e., coccal shaped cells, rod (bacillus) shaped cells, coccal-bacillus shaped cells, budding yeasts, and sphirochytes. Microbiologists also described their microscopic observations of microorganism cell arrangements as an additional means of categorizing microorganisms, i.e., streptococcus referred to a chain of coccal shaped cells resembling a string of pearls, staphylococcus referred to a cluster of coccal shaped cells resembling a cluster of grapes, etc. Later on stains were developed to add to the differentiating capabilities of the microscope. Far most important of these was the Gram Stain which divided microorganisms into two groups; gram-negative microorganisms, which stain pink to red, and gram-positive organisms, which stained light blue to blue. It was subsequently observed that among microorganisms that cause human disease, most gram-negative microorganisms were rod shaped and most gram-positive microorganisms were coccal shaped. Another early means of differentiating microorganism was to determine the microorganism's ability to grow in the presence or absence of oxygen. Microorganisms which grow in the presence of oxygen are called aerobes and those which grow in the absence of oxygen are called anaerobes.
One of the more important early discoveries in diagnostic microbiology was the ability to grow bacteria in test tubes or in petri plates using different types of liquid or solid bacteriologic growth media. Microbiologists subsequently began to add various chemicals to the growth media to develop further means of differentiating among microorganisms, such as growth or growth inhibition tests, e.g., 6.5% NaCl inhibits the growth of streptococci but not enterococci, or biochemical tests, e.g., enteric bacteria ferment the glucose to produce acid end products while nonfermentative bacteria do not.
The combining of all of the above-mentioned morphological, growth/inhibition, and biochemical tests into a battery of tests available to microbiologists for classifying bacteria led to the development of means of classifying bacteria into the traditional taxanomic entities of family, genus, species used to classify all living things. The microbiologists' approach historically has been to develop batteries of classifying tests which are applicable to only one group or family of microorganisms, e.g., Facklam's scheme for identifying viridans streptococci (Ref. 3), Kloos and Schleifer's scheme for identifying coagulase-negative staphylococci (Ref. 2), Edwards and Ewing scheme for identifying gram-negative enterics (Ref. 1), etc. Each of these schemes uses test formulations that were designed especially for the metabolism and growth characteristics of the family of microorganisms the scheme addresses. Thus, a glucose fermentation test for streptococci is formulated differently than a glucose fermentation test for staphylococci and for enteric microorganisms. In fact, commercial suppliers of prepared bacteriologic media provide the above family-specific formulations on a commercial basis. The Remel (12076 Santa Fe Drive, Lenexa, Kan. 66215-3594) Catalog No. 103 (January 1994) offers microbiologists a wide variety of conventional tubed biochemical formulations with which to perform the above referenced identification schemes. The Remel catalog specifically offers eight (8) different formulations of media for detecting carbohydrate fermentation by seven (7) different families of microorganisms. They are as follows: Purple Broth is used for testing enterics (see pages 40-41), Phenol Red Broth is used for testing Streptococci (see pages 38-39), P.R.A.S. Medium and CHO Medium are used to test Anaerobes (see pages 29-30, and 40), CTA Medium and Heart Infusion Broth are used to test Fastidious microorganisms (see pages 30-31, and 33), OF Medium is used for testing Nonfermentative Gram-negative bacilli and enterics (see pages 37-38), and Yeast Fermentation Broth is used for testing Yeast (see pages 47-48).
References:
1. Ewing, W. H., 1986, "Edwards and Ewing's Identification of Enterobacteriaceae", 4th ed., Elsevier Science Publishing Co., New York. PA0 2. Kloose, W. E., and K. H. Schleifer, 1975, "Simplified scheme for routine identification of human Staphylococcus species", J. Clin. Microbiol., 1:82-88. PA0 3. Facklam, R. R., and J. A. Washington II, 1991, "Streptococcus and related catalase-negative gram-positive cocci", p. 238-257, In A. Barlows, W. J. Hausler, Jr., K. L. Herrmann, H. D. Isenberg, and H. J. Shadome (ed.), Manual of Clinical Microbiology, 5th ed., American Society for Microbiology, Washington, D.C.
Beginning in the late 1960's with Roche Diagnostic's (1447 York Court, Burlington, N.C. 27215) introduction of the Enterotube Identification system for enteric bacteria and followed quickly by API's (595 Anglum Drive, Hazelwood, Mo. 63042-2395) release of the 20E Enteric Identification System, diagnostic companies began to adopt this same rationale for the development and manufacture of commercial bacterial identification kits. Vitek, MicroScan, IDS (Innovative Diagnostic Systems, 2797 Peterson Place, Norcross, Ga. 30071), and API each offer a family-specific product to identify each family or group of bacteria. (See Table I below).
TABLE I ______________________________________ Micro- organism MicroScan IDS Vitek API ______________________________________ Entero- MicroScan Dry IDS RapID Vitek API 20E bacteriaceae Overnight Gram- onE GNI negative ID Panel card Staphylococci MicroScan Vitek API Overnight GPI Staphldent; Dry Gram-positive card API ID panel UniScept 20GP; APISTAPH Streptococci MicroScan IDS RapID Vitek API 20S; Overnight STR GPI API Dry Gram-positive card UniScept ID panel 20GP Anaerobe MicroScan Rapid IDS RapID API 20A; Anaerobe Panel Ana API Anldent Yeast MicroScan Rapid IDS RapID Vitek API 20C Yeast ID Panel Yeast Panel YBC card Fastidious MicroScan HNID IDS RapID Vitek API NH NHI QuadFerm ______________________________________
History has taught microbiologists that the identification of clinical isolates or strains of microorganisms belonging to different families of bacteria requires the use of different conventional tube biochemical schemes or different commercial products. All traditional biochemical tests rely on growth as a means of amplifying the number of cells and inducing certain enzymes. The need to optimize the test formulae to the growth characteristics of individual families of bacteria is the basis for the historical focus on family specific tests (traditional tubed biochemical or commercial kits). For example, in the above discussion of conventional biochemical tests, there are eight different formulations for glucose fermentation formulated to be specifically reactive with seven different families of microorganisms. Because conventional biochemical tests are for the most part growth dependent, each glucose fermentation reaction has been optimized for growth of a particular family of microorganisms and for detection of glucose fermentation by that family of microorganism. This practice was carried forward by commercial biochemical identification systems, in that there are different biochemical identification products (see above list) for each of the different families or groups of microorganisms. The development of group specific product classes is both a reflection of the need to develop formulations to support family or group specific growth characteristics and to optimize substrate reactivity for the metabolism of each family or group of microorganisms. When diagnostic companies began the development of rapid identification tests that utilized chromogenic, fluorogenic or rapid conventional tests detected calorimetrically or fluorometrically, the family specific product format continued, even though the dependence on growth was greatly diminished. These new rapid ID systems were growth independent rather than growth dependent. They assay for preformed enzymes present in denser suspensions of bacteria than were used in growth-based systems.
Accordingly, it would be desirable to have a universal test system to classify and/or identify a microorganism belonging to one of any number of divergent multiple groups of microorganisms, such as by using a single battery of biochemical tests, thus, avoiding use of multiple batteries of tests or commercial test kits wherein each test battery or combination is tailored to specific groups or families of microorganisms.

Universal test systems and methods of use thereof for identifying multiple families of microorganisms


The invention relates to a flexible, resilient capacitive sensor suitable for large-scale manufacturing. The sensor comprises a dielectric, an electrically conductive layer on the first side of the dielectric layer, an electrically conductive layer on a second side of the dielectric layer, and a capacitance meter electrically connected to the two conductive layers to detect changes in capacitance upon application of a force to the detector. The conductive layers are configured to determine the position of the applied force. The sensor may be shielded to reduce the effects of outside interference.

Sensors, as the term is used here, refer to systems that react to a change in the environment. Pressure sensors react to an applied force or pressure using a variety of physical principles. Optical sensors change their optical properties under applied force. Similarly, electrically resistive, or simply resistive, sensors have an electrical resistance that changes under applied force. Piezoresistive sensors measure the change in electrical resistance of a piezoresistive material as pressure is applied.
Capacitive sensors change capacitance. This can be in response to an applied force; it can also be in response to the proximity of an object with relatively large capacitance, such as a person. Capacitive sensors can also use a combination of resistive and capacitive sensing, in which the electrical resistance is measured when the capacitance changes.
Capacitive sensors are known and are used, for example, in touch screens and elevator buttons. The change in capacitance is typically based on one of two principles. The first approach involves changing the capacitance monitored by the sensing system through direct electrical contact with a large capacitive object, usually a person through their finger. In certain cases this type of sensor may also function to detect the proximity of an object to the touch sensor, not requiring physical contact with the touch sensor. Because these systems often require direct contact between the person and the sensing system they may not work if, for example the person is wearing a glove. Additionally, capacitive coupling may not be well suited to quantitatively measuring the applied pressure or proximity, but are capable of binary (on/off) sensing.
The second approach uses two conductive planes separated by a compressible, resilient dielectric. This composite forms a capacitor whose capacitance depends in part on the distance between the conductive planes. The compression of the dielectric under pressure changes the capacitance between the planes, which can be detected by the sensing system. By calibrating the compression with the applied force or pressure, this system can be used to quantify the force or pressure of the interaction with the sensor.
In recent years, there has growing interest in so-called "smart fabrics" that give electronic devices physical flexibility. They allow an electronic device to be incorporated into an existing fabric rather than have a separate electronic device. An example of a smart fabric is a computer keyboard that can be rolled up when not in use.
Flexible sensors are needed for smart fabrics and other applications that require flexibility. Flexible optical pressure sensors have been described, for example, in U.S. Pat. No. 4,703,757 to Cohen and U.S. Pat. No. 5,917,180 to Reimer & Danisch. Flexible sensors based on electrical contact of two or more conducting planes are available from Eleksen Ltd. of Iver Heath, United Kingdom. Flexible pressure sensors that use principles of piezoreistance are available from Softswitch Ltd. of likely, United Kingdom. A flexible capacitive sensor based on the capacitance of the human body is described in U.S. Pat. No. 6,210,771 to Post, et al. A flexible capacitive sensor that uses the change in spacing between conductive planes is described in a series of U.S. Patents to Goldman, et al. These patents teach the use of flexible conductive and dielectric layers, but they do not teach a system which can be used to determine location, nor do they teach systems with multiple sensors (beyond the simple case of replications of a single sensor). All patent documents referenced in this specification are hereby specifically incorporated by reference in their entirety as if fully set forth herein.
Thus there remains a need for a large-area flexible capacitive pressure sensor with good spatial resolution, capable of quantifying applied pressure or force. Here we address those issues by describing multiple methods of constructing a flexible capacitive sensing system with multiple sensors that detects the presence of an applied force or pressure and is capable of determining the magnitude and location of the applied force or pressure.