An SPNT switch has at least two operating states and comprises N circuit branches. Each circuit branch comprises a first input/output port connected to a second input/output port via a series active device, and a phase shifting component connected in series with a shunt active device. When the shunt active device is in an on state, the reflection co-efficient due to a path to ground from the series active device via the phase shifting component and the shunt active device is +1. At least one DC terminal controls the state of the active devices, whereby in one of the operating states of the switch, both active devices are in the on state simultaneously, and in another of the operating states, both active devices are in an off state simultaneously.

Electronic switches which are suitable for radio frequency (RF) applications and which can be switched between several states of operation by the application of one or more bias voltages to one or more control terminals have widespread applications in such RF devices and components.
For example, modem cellular wireless telephony handsets are generally capable of operating on several different frequency bands and usually require an RF switch to alternately connect a single antenna to the various TX and RX circuit sections of the handset. The RF switch of a cellular handset is often grouped together with RF filters and other RF components in what is commonly referred to as an antenna switching module (ASM) or front end module (FEM). Various applications of RF switches in antenna switching modules are illustrated by Fukamachi et al in US patent application US20040266378A1. It can be seen that for these applications SP2T, SP3T and SP4T RF switches are required. Many other applications for RF switches exist, and the type of switch required is usually governed by parameters specific to the particular application.
An SP2T RF switch includes a common RF port, a first RF input/output port, and a second RF input/output port, the switch has an operation frequency range defined by a lower frequency limit fL and an upper frequency limit fU. An SP2T RF switch furthermore includes two circuit branches where each circuit branch comprises a first end and a second end. The first end of one circuit branch is connected to the first input/output port of the switch and the first end of the other circuit branch is connected to the second input/output port of the switch. The second ends of both circuit branches are connected to the common port of the switch. There are two states of operation of an SP2T RF switch: a first state of operation and a second state of operation. In the first state of operation, a low insertion loss path for RF signals within the operating frequency range of the switch exists between the first input/output port and the common port via one of the circuit branches, and simultaneously there is high isolation between the common port of the switch and the second input/output port for RF signals within the same frequency range; in the second state of operation, a low insertion loss path exists between the second input/output port and the common port via the other circuit branch for RF signals within the operating frequency range of the switch, and simultaneously there is high isolation between the common port of the switch and the first input/output port for RF signals within the same frequency range. Common embodiments of an SP2T RF can furthermore be switched between the first state of operation and the second state of operation actively by the application of a particular combination of control voltages to a number of control terminals of the switch.
A number of prior art embodiments of SP2T RF switches are described below; each prior art embodiment includes a first circuit branch and a second circuit branch where each circuit branch further includes one or more series or parallel active devices, where each active device has two states: an on state where the active devices presents a low impedance path to an RF signal, and an off state where the active devices presents a high impedance path to an RF signal, and where the state of the active device is controlled by the application of a bias voltage to the active device.
In U.S. Pat. No. 3,475,700, Ertel describes several transmit/receive SP2T RF switches which can alternately connect a TX port 14 or an RX port 16 to a common antenna 12. The switch depicted by Ertel in FIG. 1 of U.S. Pat. No. 3,475,700 comprises two series connected PIN diodes 18, 20, each of which can be switched between respective on-states and off-states by the application of a pair of control voltages to control terminals 27, 28. For example, if a negative voltage is applied to control terminal 27, and control terminal 28 is maintained at zero volts, then PIN diode 18 will be in the on-state, and PIN diode 20 will be in the off-state. Thus, TX signals entering the switch at port 14, will be able to pass through the on-state PIN diode 18 directly to the antenna 12, the TX signal will be simultaneously blocked from the RX port 16 by the off-state PIN diode 20. Conversely, if control terminal 27 is maintained at zero volts, and if a negative voltage is applied to control terminal 28, then RX signals entering the switch at the common antenna 12, will be fed directly to the RX port 16, and will be isolated from the TX port 14.
Another embodiment of an SP2T RF switch is depicted by Ertel in FIG. 6 of U.S. Pat. No. 3,475,700; this comprises two parallel connected PIN diodes 166,178, which are switched between respective on-states and off-states by the application of suitable control voltages to control terminals 170, 176, 182. The operation of the SP2T RF switch depicted by Ertel in FIG. 6 of U.S. Pat. No. 3,475,700 is broadly similar to the SP2T RF switch of FIG. 1 of U.S. Pat. No. 3,475,700, except that in the embodiment shown in FIG. 6, the electrical lengths of the pair of microstrip transmission lines between junctions 164 and 158, and between junctions 177 and 158 are both one quarter of a wavelength of the centre frequency of the operating band of the switch. In this way, when one or the other of PIN diodes 166, 178 are in the on-state, the impedance presented at junction 158 by the on-state PIN diode becomes infinitely large, thereby isolating the branch of the circuit including the switched on diode from the antenna 12.
As mentioned above, in each state of operation of an SP2T RF switch, there is a low loss path between the common port of the switch and one of the input/output ports, and simultaneously there is high isolation between the common port of the switch and the other of the input/output ports for RF signals within the operating frequency range of the switch. The principal disadvantage of the various SP2T RF switch embodiments described in U.S. Pat. No. 3,475,700 by Ertel is that the level of isolation offered by each embodiment is limited by the impedance of a single PIN diode in the off-state (FIG. 1) or in the on-state (FIG. 6). Ideally the off-state impedance of a PIN diode is infinite, and the on-state impedance of a PIN diode is zero, this would give rise to infinite isolation for each embodiment, however typical commercially available PIN diodes have an off-state impedance of one or two thousand Ohms, and an on state impedance of one or two Ohms, so that conventional PIN diodes will provide approximately 25 dB of isolation if deployed in the circuits shown in FIG. 1 or FIG. 6 of U.S. Pat. No. 3,475,700.
The isolation of an SP2T PIN diode RF switch can be improved to approximately 40dB if 4 PIN diodes are employed in the switch circuit, two in each circuit branch of the switch. One such SP2T RF switch is described by Kato et al in U.S. Pat. No. 5,519,364. The switch depicted by Kato et al in FIG. 1 of U.S. Pat. No. 5,519,364 is a high isolation SP2T RF switch comprising a pair of shunt PIN diodes in each circuit branch. Another type of SP2T switch architecture is described by Iwata et al, in U.S. Pat. No. 4,220,874. Iwata et al describe a number of embodiments of SP1IT and SP2T RF switches which employ a shunt PIN diode and a series PIN diode in each circuit branch. The SP2T RF switch depicted by Iwata et al in FIG. 4 of U.S. Pat. No. 4,220,874 comprises a pair of shunt PIN diodes D2, D4 and a pair of series PIN diodes D1, D3. The biasing of diodes D1, D2, D3 and D4 is achieved by application of a positive voltage (denoted by V1 in U.S. Pat. No. 4,220,874) or zero volts (denoted by V2 in U.S. Pat. No. 4,220,874) to control terminals S1 and S2 of the switch. The use of two PIN diodes per circuit branch as illustrated in U.S. Pat. No. 5,519,364 and U.S. Pat. No. 4,220,874 offers a substantial increase in the isolation of the switch. FIG. 1 shows a prior art SP2T RF switch according to the embodiment depicted by Iwata et al in FIG. 4 of U.S. Pat. No. 4,220,874.
The SP2T RF switch of FIG. 1 comprises 3 ports: a common port P1, a first input/output port P2, and a second input/output port P3. The switch includes two circuit branches B1, B2, where input/output port P2 is connected to the one end of circuit branch B1, and where input/output port P3 is connected to one end of circuit branch B2, and where the other ends of both circuit branches B1 and B2 are connected to the common port P1. A pair of control voltages applied to control terminals V1 and V2 can set the switch in a first state of operation or a second state of operation according to the logic table given below.
TABLE 1Logic table for prior art SP2T PIN diode switch of FIG. 1.Switch StateV1V2Circuit branch B1Circuit branch B2First State0 V5 VLow Loss betweenHigh Isolationof OperationP1 and P2between P1 and P3Second State5 V0 VHigh IsolationLow Loss betweenof Operationbetween P1 and P2P1 and P3
The switch of FIG. 1 includes PIN diodes D1, D2, D3, D4, where D1 and D2 are the respective shunt and series PIN diodes of circuit branch B1 and where D3 and D4 are the respective shunt and series PIN diodes of circuit branch B2
The switch further includes DC blocking capacitors C1, C2, C3, C4, C5, C6 which are selected so they have a very low impedance for RF signals within the operating frequency range of the switch. DC biasing components C7 and L3 provide a noise free DC voltage at node M, and DC biasing components C8 and L4 provide a noise free DC voltage at node N. DC biasing component L1 provides a path to ground, via R1, for a DC current arising from a nonzero voltage at node G, and similarly DC biasing component L2 provides a path to ground, via R2, for a DC current arising from a nonzero voltage at node H. Resistor R1 is selected to regulate the current which can flow from node G to ground when a DC voltage is present at node G, and resistor R2 is selected to regulate the current which can flow from node H to ground when a DC voltage is present at node H.
In the first state of operation of the RF switch of FIG. 1, diodes D2 and D3 are forward biased, and diodes D1 and D4 are reverse biased. An RF signal entering circuit branch B1 of the switch at port P2, will be substantially unaffected by reverse biased shunt PIN diode D1 connected to node G, will pass through the forward biased series PIN diode D2, will be isolated from circuit branch B2 by reverse biased series PIN diode D4, and hence will pass without significant attenuation to port P1 of the SP2T RF switch of FIG. 1.
Any small percentage of the RF signal which can pass through reverse biased series PIN diode D4 (due to the finite impedance of the reversed biased PIN diode D4), will have a low resistance path to ground at node H via forward biased shunt PIN diode D3 and capacitor C6 (recall that the value of C6 is chosen to be sufficiently large so that it has a low impedance for RF signals within the operating frequency range of the switch). Hence, the RF signal which enters the switch at P2 will be highly isolated from port P3 of the switch.
Consequently, in the first state of operation of the SP2T RF switch of FIG. 1, an RF signal entering the switch at port P2, will pass without significant attenuation to common port P1 of the switch and will be highly isolated from port P3 of the switch. Similarly, an RF signal entering the switch at common port P1, will pass without significant attenuation to port P2 of the switch, and will be highly isolated from port P3 of the switch.
In the second state of operation of the RF switch of FIG. 1, diodes D1 and D4 are forward biased, and diodes D2 and D3 are reverse biased. An RF signal entering circuit branch B2 of the switch at port P3, will be unaffected by reverse biased shunt PIN diode D3 connected to node H, will pass through the forward biased series PIN diode D4, will be isolated from circuit branch B1 by reverse biased series PIN diode D2, and hence will pass without significant attenuation to port P1.
Any small percentage of the RF signal which can pass through reverse biased series PIN diode D2, will have a low resistance path to ground at node G via forward biased shunt PIN diode D1 and capacitor C5. Hence, the RF signal which enters the switch at P3 will be highly isolated from port P2 of the switch.
Consequently, in the second state of operation of the SP2T RF switch of FIG. 1, an RF signal entering the switch at port P3, will pass without significant attenuation to common port P1 of the switch and will be highly isolated from port P2 of the switch. Similarly, an RF signal entering the switch at common port P1, will pass without significant attenuation to port P3 of the switch, and will be highly isolated from port P2 of the switch.
The SP2T RF switch depicted in FIG. 1 above operates very well within the frequency range of current worldwide cellular systems. However, at very high operating frequencies, such as the frequency band allocated for RF based automotive collision avoidance systems (centered at 24.125 GHz), a number of problems are encountered with the practical implementation of the SP2T RF switch depicted in FIG. 1.
As noted above, in the first state of operation of the SP2T RF switch of FIG. 1, an RF signal entering the switch at port P2 is unaffected by the path of the circuit from node G to ground via reverse biased PIN diode D1 and capacitor C5 because of the high impedance presented by the reverse biased PIN diode D1 connected to node G. This high impedance can be represented by a reflection co-efficient of +1 at node G due to the circuit path containing PIN diode D1 and capacitor C5.
In the second state of operation of the SP2T RF switch of FIG. 1, the high isolation of port P2 from signals entering the switch at port P3 or port P1 is achieved by the combination of the high impedance of reversed biased series PIN diode D2, and the low impedance path to ground at node G through forward biased shunt PIN diode D1 and via capacitor C5. The low impedance path to ground at node G via PIN diode D1 and capacitor C5 can be represented by a reflection co-efficient of −1.
In practical implementations, diode D1 and capacitor C5 will be soldered to a PCB and the PCB will include a first metal track which connects node G to the cathode of PIN diode D1 and a second metal track which connects the anode of diode D1 to capacitor C5.
These metal tracks will have a finite length, and the effect of these metal tracks will be to rotate the phase of the reflection co-efficient at node G due to the path containing PIN diode D1 and capacitor C5 so that it will no longer have the ideal value of +1 in the first state of operation of the RF switch of FIG. 1, or −1 in the second state of operation. The phase rotation caused by the finite lengths of metal tracks which connect node G, PIN diode D1 and capacitor C5 will introduce a substantial loss due to the reverse biased PIN diode D1 in the first state of operation of the SP2T RF switch of FIG. 1 and will substantially reduce the isolation offered by the forward biased PIN diode D3 in the second state of operation of the SP2T RF switch of FIG. 1.
At operating frequencies of 24 GHz, a metal track length of only 1 mm or 2 mm will have a significant effect on the phase of the reflection co-efficient at node G, thereby substantially increasing the loss between ports P1 and P2 and substantially reducing the isolation between ports P1 and P3 in the first operation state of the SP2T RF switch of FIG. 1.
A similar analysis reveals that the effect of the finite lengths of metal tracks required to connect node H, PIN diode D3 and capacitor C6 substantially increases the loss between ports P1 and P3, and substantially reduces the isolation between ports P1 and P2 in the second operation state of the SP2T RF switch of FIG. 1.


This application discloses a design verification tool to simulate a circuit design with a test bench to generate a simulated output for the circuit design and a simulation log corresponding to operation of the test bench during the simulation of the circuit design. The design verification tool can determine whether the simulated output for the circuit design is different than an expected output for the circuit design. A debug tool can synchronize the simulated output for the circuit design with test bench transactions from the simulation log that prompted the generation of the simulated output for the circuit design when the simulated output of the circuit design is different than the expected output of the circuit design.

Microdevices, such as integrated microcircuits and microelectromechanical systems (MEMS), are used in a variety of products, from automobiles to microwaves to personal computers. Designing and fabricating microdevices typically involves many steps, known as a "design flow." The particular steps of a design flow often are dependent upon the type of microcircuit, its complexity, the design team, and the microdevice fabricator or foundry that will manufacture the microcircuit. Typically, software and hardware "tools" verify the design at various stages of the design flow by running software simulators and/or hardware emulators, and errors in the design are corrected or the design is otherwise improved.
Several steps are common to most design flows for integrated microcircuits. Initially, the specification for a new circuit is transformed into a logical design, sometimes referred to as a register transfer level (RTL) description of the circuit. With this logical design, the circuit can be described in terms of both the exchange of signals between hardware registers and the logical operations that can be performed on those signals. The logical design typically employs a Hardware Design Language (HDL), such as the Very high speed integrated circuit Hardware Design Language (VHDL). As part of the creation of a logical design, a designer will also implement a place-and-route process to determine the placement of the various portions of the circuit, along with an initial routing of interconnections between those portions. The logic of the circuit is then analyzed, to confirm that it will accurately perform the functions desired for the circuit. This analysis is sometimes referred to as "functional verification."
After the accuracy of the logical design is confirmed, it is converted into a device design by synthesis software. The device design, which is typically in the form of a schematic or netlist, describes the specific electronic devices, such as transistors, resistors, and capacitors, which will be used in the circuit, along with their interconnections. This device design generally corresponds to the level of representation displayed in conventional circuit diagrams. Preliminary timing estimates for portions of the circuit may be made at this stage, using an assumed characteristic speed for each device. In addition, the relationships between the electronic devices are analyzed, to confirm that the circuit described by the device design will correctly perform the desired functions. This analysis is sometimes referred to as "formal verification."
Once the relationships between circuit devices have been established, the design can be again transformed, this time into a physical design that describes specific geometric elements. This type of design often is referred to as a "layout" design. The geometric elements, which typically are polygons, define the shapes that will be created in various materials to manufacture the circuit. Typically, a designer will select groups of geometric elements representing circuit device components, e.g., contacts, gates, etc., and place them in a design area. These groups of geometric elements may be custom designed, selected from a library of previously-created designs, or some combination of both. Once the groups of geometric elements representing circuit device components have been placed, geometric elements representing connection lines then are then placed between these geometric elements according to the predetermined route. These lines will form the wiring used to interconnect the electronic devices.
Typically, a designer will perform a number of analyses on the resulting layout design data. For example, with integrated circuits, the layout design may be analyzed to confirm that it accurately represents the circuit devices and their relationships as described in the device design. The layout design also may be analyzed to confirm that it complies with various design requirements, such as minimum spacings between geometric elements. Still further, the layout design may be modified to include the use of redundant geometric elements or the addition of corrective features to various geometric elements, to counteract limitations in the manufacturing process, etc. For example, the design flow process may include one or more resolution enhancement technique (RET) processes, that modify the layout design data to improve the usable resolution of the reticle or mask created from the design in a photolithographic manufacturing process.
After the layout design has been finalized, it is converted into a format that can be employed by a mask or reticle writing tool to create a mask or reticle for use in a photolithographic manufacturing process. The written masks or reticles then can be used in a photolithographic process to expose selected areas of a wafer to light or other radiation in order to produce the desired integrated microdevice structures on the wafer.
Returning to "functional verification," this type of analysis begins with a circuit design coded at a register transfer level (RTL), which can be simulated by a design verification tool. A designer, for example, utilizing the design verification tool, can generate a test bench that, when input to the simulated circuit design, can allow the design verification tool to analyze the functionality of the simulated circuit design. When the simulated circuit design operates differently than expected in response to the test bench, the designer can attempt to debug the circuit design, for example, to determine which of the gates in the circuit design is incorrectly configured, resulting in the generation of illegal states or transitions.
The design verification tool can record signal states and transitions of the circuit design, often called waveform data, which the designer can review in an attempt to identify a "bug" in the circuit design. The designer typically can utilize a debug tool to review the recorded waveforms, often alongside a source code of the circuit design, in an attempt to locate and address the circuit design failure.
Often, however, the simulated circuit design can operate differently than expected, not due to a "bug" in the circuit design, but due to a defect in the test bench, for example, incorrect stimulus being applied to the simulated circuit design, improper response checking, or both. Thus, the designer may attempt to review test bench states and transitions, a source code of the test bench, a source code of the circuit design, and the waveform data, often in unison, to ascertain whether the verification failure was the result of a "bug" in the circuit design, a test bench defect, or both.
Since many test benches are generated with object-oriented programming languages that are transient in nature, for example, with object components, such as classes, being created and destroyed during execution, test bench states and transitions are recorded separately from and in a different format than the waveform data of the simulated circuit design, leaving designers to manually collate test bench states and transitions with the waveform data.

Test bench transaction synchronization in a debugging environment


A coding control section 26 determines a quantization step size 24 and frame skip control information 25 based on a remainder of a buffer 20 and a maximum quantization step size 28 output from a quantization step size change width control section 29. The quantization step size change width control section 27 receives an average quantization step size 29 calculated by the coding control section 26, and determines the maximum quantization step size 28.

The present invention relates to a moving picture coding apparatus which is utilized for a visual telephone and a television conference.
In compressive coding of a moving picture, a moving picture coding technique in which orthogonal transformation and quantization are combined with each other is widely used. FIG. 4 is a block diagram showing a coding technique such as ITU-T H.263 and ISO/IEC MPEG-4. An input picture 10 is processed at a pixel block (16×16 or 8×8, for example) unit. In a subtracter 12, a difference between the pixel block of the input picture 10 and a pixel block of a predicted picture 20 is calculated. Discrete cosine transform is applied to the said difference by a DCT (discrete cosine transformer) 13. In a quantization circuit 14, an output from the DCT circuit 13 is quantized by a quantization step size 24 determined in a coding control section 23. An output from the quantization circuit 14 is converted into a code by a variable length coding circuit 21, and is output via a buffer 22. On the other hand, an output from the quantization circuit 14 is inverse-quantized by an inverse-quantization circuit 15, and inverse-discrete cosine transform is applied thereto by an inverse-DCT circuit 16, and the predicted picture 20 is added thereto for every block in an adder 17, and it is stored in a frame memory 18. A local decoded picture block stored in the frame memory 18 and the input picture 10 are supplied to a motion vector detecting circuit 11, and a motion vector is detected. Based on the local decoded picture from the frame memory 18 and the motion vector detected by the motion vector detecting circuit 11, motion compensation is conducted by a motion compensation circuit 19, and the predicted picture 20 is output. The coding control section 23 determines the quantization step size 24 from the remainder (generated code content) of the buffer 22, and outputs it to the quantization circuit 14 and outputs frame skip control information 25, and cuts off an input of the input picture 10.
Next, a state in which the coding control section 23 determines the quantization step size 24 to be used in the quantization circuit 14 based on the remainder information of the buffer 22 will be explained by referring to FIG. 5. At a step 41, the buffer remainder is compared with a threshold value T1, and when the buffer remainder is greater than the threshold value T1, at a step 42 a constant number C1 is added to the quantization step size 24, and by making the quantization rough, the generated coding content is made less. When the buffer remainder is less than the threshold value T1, at a step 43 the buffer remainder is compared with a threshold value T2, and if the buffer remainder is greater than the threshold value 2, at a step 44 a constant number C2 is subtracted from the quantization step size 24, and by making the quantization fine, the generated coding content is made greater. Next, clip processing (steps 45-48) is conducted so that the quantization step size 24 calculated in this manner is put between preset minimum quantization step size and maximum quantization step size.
As a method of setting a minimum value and a maximum value for the quantization step size, a method shown in JP-P111768/1988A can be raised. Although the minimum value and maximum value to be set are defined as a standard of a coding method such as H.263 and MPEG4, there is a case where a value to be taken is further restricted for picture quality control. For example, by setting the maximum value of the quantization step size to be smaller, it becomes possible to suppress picture quality deterioration of each frame in a picture or the like, which moves hard. However, in this case, to suppress generated information content, it is necessary to use a frame skip or the like together for means other than a change of the quantization step size. In this case, the coding control section 23 generates frame skip control information 25 based on the remainder of the buffer 22.
However, in the above-described conventional moving picture coding apparatus, since a frame skip occurs due to the temporary increase of information content in case of compression to a low bit rate, there is a task that a frame rate becomes unstable.

Moving picture coding apparatus and method


An Impact sensor assembly provides a modular housing for vehicle impact sensors. The assembly comprises an impact sensor, an upper housing member, a lower housing member and a connector for establishing an electrical connection between the assembly and an appropriate vehicle system. The assembly may further include electronics for processing signals received from the sensor. The lower housing member receives and retains the sensor, and closeably interacts with the upper housing member to encase the sensor. The assembly defines structural features that ensures its proper installation into a vehicle. The preferred embodiment assures proper functioning of deformation impact sensors. A method of installing the assembly provides a process for rapid and proper installation of the assembly into a vehicle.

Almost all passenger motor vehicles presently produced include some type of impact deployed restraint system to protect vehicle occupants, or others, during a vehicle impact event. Such restraint systems may include, for example, front and side airbags within the passenger compartment, side curtains, inflatable seat belts and seatbelt pretensioners. A restraint system may also include restraints for the protection of pedestrians involved in impacts with the vehicle, such as pedestrian airbags and hood release mechanisms. Sensing systems typically control the deployment of such restraints by detecting the occurrence of a vehicle impact event.
Sensing systems detect impact events through sensor elements, which are typically positioned at various areas prone to impact events throughout the vehicle. Sensor elements detect an impact event and, through various principles of operation, trigger deployment of one or several passive restraints in the vehicle as appropriate. Various types of sensors are utilized. For example, sensors comprised of piezoelectric cables, accelerometers, pressure sensors and crush-zone switches are frequently used. Also, deformation sensors can be used. These sensors generate an output, such as an electrical signal, that varies depending on the extent of deformation of the sensor. These sensors operate by physical participation in the impact event, i.e., they directly detect vehicle deformation. Therefore, these sensors can be utilized to detect an impact event and also to gather information regarding the rate and extent of deformation.
One type of deformation sensor is in the form of an elongated strip which may be oriented along a side door or bumper of a motor vehicle. Due to the configuration of some sensors, they are cumbersome, and their placement throughout the vehicle and installation can be a complex and time-consuming task. The modular assembly approach to vehicle manufacture increasingly demanded and practiced by automobile manufacturers has affected the design and componentry of motor vehicles in numerous ways. Several components are often joined together into an assembly or module, which is subsequently installed into the vehicle as a whole. This modular approach is designed to minimize the amount of assembly time during final production of a vehicle. Providing a modular approach to the installation of elongated impact deformation sensors could save time and make the task more manageable.
The design of an assembly for impact sensors must accommodate the functional qualities of the sensors, allowing the sensor to properly function even though contained within a housing. For example, deformation sensors must retain the ability to bend or deform once installed in the vehicle due to their mechanism of operation. For these deformation sensors, the ability of the sensor to bend or deform as the vehicle deforms is critical to the proper operation of the sensor. Therefore, any assembly or housing for these sensors must address this issue.
Also due to their mechanism of operation, deformation sensors may not detect an evenly applied impact that spans the length of the sensor. If such an impact occurs, it may force the entire sensor inward, not causing the bend or deformation of the sensor necessary to detect the impact. Conversely, deformation sensors may improperly generate a deployment signal due to minor deformations of the sensor element. For example, an unprotected sensor element may bend or deform in response to a rock or other object thrown at the vehicle. An ideal assembly for these sensors would therefore ensure proper deformation of the sensor during sensor-wide impacts while protecting the sensor from insignificant environmental impacts. Also, as with any vehicle component for installation during the manufacturing process and to be consistent with the goal of the modular approach to vehicle manufacturing, any impact sensor assembly should facilitate simple and efficient installation. The design of the assembly should be such that it is easily placed in its proper position and orientation. Furthermore, the assembly should allow for rapid connection to the necessary vehicle systems, such as a restraints control module.
Considering this background, there is a need for an assembly that provides a protective barrier for elongated impact sensor elements while ensuring proper operation during significant impact events. The assembly must allow proper functioning of the sensor and should facilitate the installation process, allowing for rapid and correct installation.

Impact sensor assembly and method of attaching same to a vehicle


The invention relates to processing configuration of a network node, such as for example a firewall, and for sharing the configuration management between several administrators. The configuration comprises a processing rule base, which contains rules to be used in the network node for filtering data packets, the rules comprising one or more identification values for identifying a data packet and an action. The configuration of the network node is validated by determining, whether the processing rule base fulfils requirements defined in a validation rule base. The use of validation rule base enables verifying that processing rule bases managed by different administrators fulfil some set requirements. Additionally, the invention accounts for detecting human errors in configurations.

A firewall is a gateway which operates at the same time as a connector and a separator between networks in a sense that the firewall keeps track of the traffic that passes through it from one network to another and restricts connections and packets that are defined as unwanted by the administrator of the system. Physically a firewall is a machine with appropriate software to do the tasks assigned to it. It can be a router, a personal computer (PC), a special appliance, or whatever that can be used for such purposes. A firewall is usually used for protecting an internal network of an organisation and for connecting the internal network to a public network, such as Internet. On data packet level a firewall filters data packets, which are entering and/or exiting the internal network. The rules according to which the data packets are filtered are defined in access rules. In addition to filtering data packets a firewall may secure data packets transmitted between, for example, some communication entities. In this case the firewall operates both as a firewall and a security gateway, such as a VPN (Virtual Private Network) gateway.
FIG. 1 illustrates an example with a first internal network 12, a second internal network 14 and a public network 10. The public network may be, for example, the Internet. The internal networks 12, 14 are connected to the public network 10 via firewalls 16 and 18, respectively. The firewall 16, 18 may be implemented as a single network node (server) or as a cluster of nodes. In FIG. 1, the firewall 18 is a firewall cluster comprising nodes 19a, 19b and 19c. The term security network element is used in this description for referring to a security network node or to a cluster of security network nodes, such as firewalls or routers, where data packet filtering is performed and which connects at least two networks to each other. A security network element may be, for example, a plain firewall node filtering packets or a firewall node provided with VPN functionality, or a cluster of such nodes.
Frequently, the access rules of a firewall are expressed as a table or list (rule base) of rules comprising data packet characteristics and related actions. The rule base is a central part of a security policy of a firewall. The data packet characteristics in rules are parameter values that are obtained from header fields of a data packet and may be e.g. source IP (Internet Protocol) address, destination IP address and service (or protocol) or some other values. The action gives information about how to handle a data packet, which corresponds the data packet characteristics defined in the respective rule (i.e. which matches the rule). This means that for a data packet, which has the header information indicated in a rule, the action indicated in the rule is carried out. In a firewall, the action is typically discard or allow (or deny/accept), which means the data packet is discarded or allowed to proceed, correspondingly. The rules of a rule base are examined in certain order until a decision how to process the data packet is reached. The order of the rules in the rule base typically defines the order in which header fields of a data packet are compared to the rules, that is, the rules are examined one by one from the beginning of the rule base. When a rule, to which the characteristics of a data packet match, is found, the action that is related to that rule is taken and often there is no need to continue examining the rules. However, the action defined in the rule may be continue, in which case examining the rule base is continued from the next rule, or jump, in which case examining the rule base is continued from the rule specified in the jump action. The action of the firewall may be as well refuse, which is similar to discard action. The difference is that discard action results in simply discarding the data packet and in refuse the sender of the data packet is notified of discarding the data packet.
In order to ensure that the firewall operates in desired way the firewall must be configured and managed accurately by a professional administrator. The firewall's management interface typically allows the security administrator to define various different kinds of rules. For example rules may be defined for individual hosts, host-groups, networks or IP (Internet Protocol) address ranges. In addition, the order of the rules in the rule base affects the operation of the firewall. That is, if there are two or more rules to which an individual data packet would match, the one that comes first in the rule base is taken into account. For this reason, the rules of a rule base need to be inspected as a whole when the operation of a firewall is analysed. However, the size of the rule base may be very large especially if the network that is protected with the firewall is large (and heterogeneous with regard to protection requirements). Also the structure of the rule base may be complex and the real effects of rules may not always be clear. Therefore, management of a firewall is a complex administrative task, in which mistakes are easily made.
Furthermore, the rule base used in a firewall is updated every now and then due to changed security requirements. Even a small change in the rule base may have a large effect on the total outcome and therefore also updating needs to be done by a professional administrator. In companies with several firewalls and sites, there is a need to share the responsibility and workload of managing and configuring the firewalls. However, not all administrators can necessarily be given the same rights in managing the firewalls. There may be need to enforce some general rules in firewalls organization wide and to set limitations to local administration without unnecessarily limiting the local administrators ability to make allowable changes.
Rule base templates are one possible way to control the structure of the rule base and to set non-editable rules to rule bases. For example only a super user (a special administrator whose management rights are not restricted in any way) can edit the templates, whereupon a normal administrator can edit only rule bases and a rule base is constructed on top of a template, which consists of rules like a normal rule base. Additionally the template may comprise special insert points, which are the points where the normal administrator can edit the rule base. A simple exemplary template is shown in the following:
Rule #SourceDestinationServiceAction1BCHTTPAllow2INSERTPOINT3ANYANYANYDiscard
The exemplary template above means that the first and the last rule in the rule base are fixed rules #1 and #3. A normal administrator would be able to add rules in the insert point after rule #1, but he/she cannot edit the rules #1 and #3, whereupon a rule base that extends from the template above, could look like the following for example:
Rule #SourceDestinationServiceAction1BCHTTPAllow2.1ACHTTPAllow2.2ADANYAllow3ANYANYANYDiscard
In this example the normal administrator has added rules #2.1 and #2.2, whereupon the HTTP (HyperText Transfer Protocol) data packets from source A to destination C are allowed and any data packets from source A to destination D are allowed to proceed. But the normal administrator cannot for example deny HTTP traffic from B to C, which is allowed in rule #1. In this way the super user can restrict the management rights of a normal administrator by defining suitable template rule bases. The disadvantage of using templates is that, defining suitable, restrictive enough, but not too restrictive, templates may be very difficult.
ACLs (access control lists) are another theoretical possibility for restricting management rights of normal administrators. An ACL could be defined for each rule, but since the order of the rules plays a central role in the total effect of a rule base, this may not even possible.
Security policy may contain also NAT (network address translation) rules. NAT is the translation of an Internet Protocol address (IP address) used within one network to a different IP address known within another network. Typically, a company maps its internal network addresses to one or more public IP addresses and unmaps the public IP addresses on incoming packets back into internal IP addresses. NAT also conserves on the number of public IP addresses that a company needs and it lets the company use a single (or a limited number of) IP address for connecting a plurality of computers to public networks. NAT rules are often processed in a firewall after a matching access rule, which allows the data packet, is found. Naturally, if the data packet is not allowed, no NAT rules are required to be processed. The matching system of the NAT rules is similar to access rules, but the action of the NAT rules is to change the source and/or destination addresses of the data packets to be processed.
In access rules the source and destination addresses are always expressed as addresses that are in the header of the data packet to be processed. If a destination NAT is defined for the data packet (network address translation for the destination address), the destination address in the data packet header is not the real address of the destination. Since the destination addresses are not always the true addresses there is a risk to get confused about the effects of a rule when defining a rule base. There is an example of a destination NAT rule below. The rule is applied if the source and destination addresses in the header of the data packet to be processed on HTTP service match to the NAT rule, whereupon the original destination address C of the data packet to be processed will be translated to E according to the NAT rule.
Rule #SourceDestinationServiceNAT1BCHTTPDestination NAT C → E
If source NAT (network address translation for the source address) is defined for a data packet the source address of the data packet is changed. Source address is always the true source address in the access rules, so this doesn't cause similar confusion as the destination NAT. The use of NAT rules makes analysing the total effect of rule bases even more difficult.
In addition, NAT rules make it possible to accidentally or purposefully override the effect of fixed template rules. For example the following rule base with template rules #1 and #3 and rules #2.1 and #2.2 of a normal user can be considered:
Rule #SourceDestinationServiceAction1BEHTTPDiscard2.1BCHTTPAllow2.2ADANYAllow3ANYANYANYDiscard
The normal administrator may add for example a destination NAT rule, where the destination address is changed for the data packets to be processed like:
Rule #SourceDestinationServiceNAT1BCHTTPDestination NAT C → E
Now, if an HTTP data packet from B destined to C is processed, it is first compared to rule #1 of the rule base, which does not match because of the destination. Therefore, it is compared next to rule #2.1 of the rule base, which is a match, because the source and destination and service match. According to this rule (rule #2.1 of the rule base) the packet is allowed to proceed. Then, the associated NAT rule is applied to the data packet, which changes the destination address of the data packet to E. So HTTP data packet from B to E is allowed in this way, which is clearly in conflict with the template rule #1 of the rule base. Therefore, using templates alone do not give guaranteed result of total effect of the rules.
Therefore, there is a need for a method to enforce and/or verify the total effect of rules in a rule base.


An apparatus for treating the brain comprises an implantable fluid exchange device coupled to a control unit to periodically alternate a delivery of a therapeutic agent with a removal of cerebrospinal fluid from a cranial subarachnoid space to prevent local inflammatory host-products from blocking a transmeningeal diffusion of the therapeutic agents into the cerebral cortex and thereby allow an effective treatment of cerebral cortical disorders by the delivery therapeutic agents.

Transmeningeal delivery refers to a treatment modality in which drugs and other therapeutic agents are delivered into a cranial subarachnoid space to allow them to diffuse through the pia mater into an underlying, diseased cerebral cortical area and thereby correct abnormal neural functions in that cortical area. Neurological disorders with focal cerebral cortical pathology include various forms of focal epilepsy, stroke, traumatic brain injury, and tumors. Although drug delivery directly into the subdural/subarachnoid space of the spinal cord ("intrathecal administration") is widely used in clinical practice for pain relief in obstetric anesthesia, as well as in lower abdominal, urogenital, rectal and lower extremity surgical procedures, the subdural/subarachnoid compartment of the brain is currently not utilized for therapeutic purposes, such as for the treatment of cerebral cortical disorders. This is due to a lack of appropriate devices which are both implantable in the subdural/subarachnoid space without causing significant damage to neural tissue and can also perform localized medication delivery for long periods without an eventual clogging or obstruction in their delivery systems rendering them incapable of functioning as intended. Current experimental or clinically used cannulas, catheters or drug-releasing polymers share the same common problem that bedevils their use. This problem is the induction of inflammatory host responses that encapsulate or clog the implant, preventing its ability to maintain constant, or at least sufficient, therapeutic agent delivery with consequent therapeutic effects. The inflammatory host response is mediated by cells, such as mast cells, macrophages, lymphocytes, fibroblasts and other cellular elements, and by molecules, such as various collagen, elastin, proteoglycans, adhesive glycoproteins and other molecules, which, together accumulate and aggregate, forming a fibrous, gelatinous layer over the dorsal surface of the cerebral cortex and its covering pia mater within 2-3 weeks. This layer of newly generated connective tissue forms a lasting barrier to drugs or other medications and therapeutic agents delivered into the subarachnoid space, effectively blocking their transmeningeal influx into the cortical tissue. As a consequence, presently used or experimental needles, cannulas, catheters, or drug-releasing polymers cannot provide treatment for cerebral cortical disorders for periods longer than 2-3 weeks. This forbids their implantation for the treatment of chronic cerebral cortical disorders, the treatment of which requires persistent treatment over a period of several month or years.

Apparatus and method for periodic fluid-delivery/fluid-removal cycles in the cranial subarachnoid space to treat cerebral cortical disorders


A method of obtaining high resolution, spatial images from a flat-panel imager is provided, in which a radiation opaque filter is provided over the flat-panel imager, interposed between the x-ray source and the patient tissue. The filter, comprised of x-ray and similar high energy radiation opaque material, is provided with an array of apertures in exact alignment with each pixel of the flat-panel imager. Each aperture has a diameter of about one-half a pixel. An initial image is taken, and then the filter and imager are moved, synchronously, to obtain three additional images, each motion repositioning the filter and imager, synchronously, a distance of one-half of one pixel. This results in four discontiguous x-ray exposures, which can be interpolated, preferably by computer algorithm, into a continuous, high resolution image. Although four exposures are needed, because of the presence of the filter, the patient dose remains the same as if only one exposure is made.

1. Field of the Invention
This invention pertains to an electronic imaging technique using a novel radiation-shielding, interpolative-sampling mechanism. It provides a new imaging modality for digital radiography. Using this technique, a low spatial resolution flat-panel imager (such as Amorphous Silicon, Selenium, etc.) can be used effectively for high spatial resolution digital radiography.
2. Background of the Prior Art
The recent development of Amorphous Silicon and selenium technology make the flat-panel, solid-state imagers very promising in some diagnostic x-ray projection imaging. However, the current technology in electronics and material science limits the potential to reduce the pixel size (presently 100 to 200 microns) of these large area, two-dimensional arrays. Many current procedures (such as mammography) require high spatial resolution which requires an image with a pixel size that is smaller than 100 microns.
A variety of companies have invested millions of dollars to develop the high spatial resolution, flat-panel imagers for large field digital mammography and digital radiography. For instance, General Electric has developed a flat panel imager that can cover a full-field of a breast for digital mammography. The physical pixel size of the imager, however, is about 100 microns (Niklason L T, Christian B T, Whitman G J, Kopans D B, Rougeot H M, Opsahl-one B, "Full-field digital mammographic imaging, Radiology" (abstract), 201 ():446, 1996). This invention provides a unique, inexpensive solution to the technical challenge of covering a large field while maintaining high spatial resolution, within the constraints of the current technology. None of them has been successful up to now. This invention provides a unique, inexpensive solution to this difficult problem within the constraints of the current technology.

Radiation-shielding, interpolative-sampling technique for high spatial resolution digital radiography

The University of Virginia Patent Foundation


An interferometric measuring device for detecting the shape, roughness or distance of surfaces is described. The interferometric measuring device has a modulation interferometer in which two partial beams are formed, one of which is shifted in its light phase or light frequency with respect to the other by a modulation device. The surface is measured with a measuring probe which is connected to the modulation interferometer and in which a measuring beam and a reference beam are formed, and an interference pattern which is analyzed in a connected receiving unit is formed from the measuring beam and the reference beam. A compact design that is easy to handle even in a manufacturing process is achieved by spatially separating the modulation interferometer which is designed as a basic unit from the measuring probe and by the fact that it can be connected to the measuring probe by an optical fiber arrangement, and the measuring arm and the reference arm are formed by solids conducting the measuring beam and the reference beam.

The present invention relates to an interferometric measuring device for detecting the shape, roughness or distance of surfaces by using a modulation interferometer having a spatially coherent beam source and a first beam splitter for splitting its beam into two partial beams, one of which is shifted in its light phase or light frequency with respect to the other by a modulation device and then the two partial beams are combined, having a measuring probe in which the combined partial beams are split into a measuring beam guided through a measuring arm and reflected on the surface and a reference beam guided through and reflected in a reference arm, and in which the reflected reference beam is superimposed on the reflected measuring beam, and having a receiving unit for splitting the superimposed beam into at least two beams having different wavelengths and converting the beams into electrical signals, and for analyzing the signals on the basis of a phase difference.
An interferometric measuring device is known from European Patent No. 126 475. In this known measuring device, rough surfaces of a measured object are measured interferometrically, a beam gun unit having laser light sources which emit light of different wavelengths being used. The laser light is divided into a reference beam of a reference beam path and a measuring beam of a measuring beam path using a beam splitter. The measuring beam path impinges on the surface to be measured, while the reference beam path is reflected on a reference surface, for example in the form of a mirror. The light reflected from the surface and the reference surface is combined in the beam splitter and focused, with the help of a lens, in an interferogram plane, where a speckle pattern is obtained. This speckle pattern is analyzed to determine the surface shape, a phase difference of the interferogram phases in the measuring point being determined. In order to simplify the analysis, a heterodyne method is used, the frequency of the reference beam being shifted with respect to the frequency of the measuring beam by a heterodyne frequency using a frequency shifter in the reference beam path. With this measuring device, a fine resolution of the surface shapes can be obtained.
However, the adjustment and handling are complicated for use in industrial manufacturing, for example.
Another interferometric measuring device is described in German Published Patent Application No. 39 06 118, in which optical fibers are provided between a plurality of laser light sources and a measuring section. Here again, a phase difference is evaluated for determining the surface structures. This known design is also disadvantageous with regard to the handling and adjustment in places that are difficult to access.
Another interferometric measuring device, as described in German Published Patent Application No. 198 08 273, which was not published previously, this device having a modulation interferometer and a spatially separate measuring probe connected to it by an optical fiber arrangement, is much more favorable for practical use in a manufacturing process for example. Advantages include in particular a short-term coherent radiation source of the modulation interferometer, yielding a stable beam that can be analyzed well, and the relatively compact design of the measuring probe. However, the arrangement of the measuring probe with respect to the surface of the measured object is still associated with some adjustment measures which would make a simplification seem desirable.
An object of the present invention is to provide an interferometric measuring device of the yielding simplified handling with a relatively simple, compact design.
Accordingly, the modulation interferometer designed as a basic unit which is spatially separate from the measuring probe and can be connected to it by an optical fiber arrangement, and the measuring arm and the reference arm are formed by solids conducting the measuring beam and the reference beam.
The measuring probe which is spatially separate from the modulation interferometer, which is designed as a basic unit, by the optical fiber arrangement is itself compact due to the design of the measuring arm and the reference arm as a solid and thus it is easy to handle and is designed to be easily adjustable with respect to the measured object. It is easy to adjust the reference arm and the measuring arm of the measuring probe relative to one another and with respect to the interferometric measuring device because of the unambiguous positioning of the individual elements.
If the design is such that a collimator device is provided at the input of the measuring probe and a focusing device is provided at the output of the measuring arm, and a deflecting element downstream from the focusing device is provided for output and then re-injection of the measuring beam directed at and reflected by the surface to be measured, then a favorable measuring beam and reference beam are obtained to form the interference pattern, and on the other hand the measuring beam can be aligned perpendicular to the measuring arm due to the deflecting element even when the surface to be measured is at an inclination to the direction of the measuring arm, so that a reliable measurement of the surface is achieved. An advantageous embodiment involves the collimator device and/or the focusing device being a GRIN lens.
Interference of the two partial beams before entering the measuring probe is prevented by the fact that one of the two partial beams in the modulation interferometer passes through a delay element which generates a difference in the optical path lengths of the two partial beams which is greater than the coherence length of the beam emitted by the short coherent beam source, and another difference in the optical path lengths is generated in the measuring arm with respect to the reference arm, compensating for the difference in optical path lengths generated by the delay element, and this interference comes about only after reflection at the surface or in the reference arm and thus coherence multiplexing is made possible.
Multiple sections of the surface to be measured or multiple separate surfaces can be measured rapidly and reliably without repositioning the measuring probe by the fact that the measuring arm has at least one additional deflecting element with which the measuring beam guided in the measuring arm is split and directed at another site on the surface to be measured, and the measuring beam reflected by this surface is injected back into the measuring arm. There are two different design possibilities here due to the fact that different optical path lengths can be preselected in the modulation interferometer by different interchangeable delay elements, and the compensating difference in the optical path lengths is formed by adjusting a reflecting or deflecting element of the reference arm or due to the separate reference arms assigned to the individual measuring beams split off in coordination with the different delay elements. If separate reference arms are provided, then the selected measuring site on the surface is obtained unambiguously by allocation to the corresponding delay element without further adjustment through coherence multiplexing. However, it is relatively simple to adjust the compensating optical path difference of the measuring arm with respect to the reference arm by the reflecting and deflecting element of the reference arm.
Two different design options for the measuring probe consist of the fact that the measuring arm and the reference arm(s) are designed as separate arms of the measuring probe in the manner of a Michelson interferometer (as illustrated in FIGS. 1 and 2) or in a common arm in the manner of a Fizeau interferometer (as illustrated in FIG. 3). If the measuring arm and the reference arm here are designed in a common arm of the measuring probe, this yields an especially compact design of the measuring probe, which can be used even under unfavorable space conditions.
A further simplification of the design of the measuring device is achieved due to the fact that the beam directed toward and away from the measuring probe is passed over a common monomode optical fiber arrangement, and the beam sent to the receiving unit is output from the optical fiber arrangement by an arm section. Coupling of the measuring probe to the modulation interferometer and the receiving unit can be accomplished easily by using plug connectors.

Modulation interferometer and fiberoptically divided measuring probe with light guided


A computer implemented method and system for exclusion of entities from a metric driven verification analysis score. The method includes using a processor, and performing the following steps: parsing a source code simulating a device under test and modeling the source code into a model that includes entities of one or a plurality of metric driven entity types; identifying in the source code entities of the same metric driven entity type of said one or a plurality of metric driven entity types that are logically linked and saving information on the identified entities that are logically linked; receiving from a user a selection of an entity to be excluded from the metric driven verification analysis score; and excluding all instances of the selected entity and all instances of the identified entities that are logically linked to the selected entity from a calculation of the metric driven verification score.

One technique of examining and verifying a design of a hardware component such as an integrated circuit is to model operation of the design in software. For the purpose of modeling the design, its functionality may be described as procedures, for example, using a hardware design language (HDL). For example, HDL may represent various functions or operations of the hardware design as separate models or statements in the HDL code.
The software emulation of the hardware (referred to, hereinafter as "source code") may be operated in different configurations to test or verify operation of various functionalities of the component. A test may cause execution of all or some of the statements of the HDL code. A fraction or percentage of the statements or other entities in the HDL code that are covered by a test may be referred to as coverage. Coverage may relate to the entire set of HDL code, or to a part or block of HDL code. Coverage may refer to code (e.g., whether a block of code has been executed during a test), expressions (e.g., whether all possibilities in a truth table have been covered by a test), functionality, or other facets of the emulation.
Metric-driven verification (MDV) is concerned with analyzing what needs to be verified in a device under test (DUT) and how, and setting metrics that would allow determining the progress towards converging to desired goals. Such goals may be, for example, desired coverage level or levels.
A user may wish to exclude one or a plurality of entities from a calculation of the metric driven verification score, for various reasons.

Method and system for automated refined exclusion of entities from a metric driven verification analysis score


A radial vibration detection apparatus for detecting the radial vibration value of an optical assembly of an optical disc drive. The radial vibration detection apparatus includes a cover, a magnet, a plurality of clamping structures and a base. The cover has a cover body, a plurality of engaging elements and a circumferential flange. The engaging elements are disposed on the lower surface of the cover body in an equiangular manner. The circumferential flange is formed on the cover body. The cover body has a magnet accommodating portion formed on the center thereof. The magnet is disposed in the magnet accommodating portion. The clamping structures are disposed in the engaging elements, respectively. The base is disposed under the cover and has a bottom, a circumferential wall and a second positioning element. The second positioning element is disposed on the circumferential wall to engage the first positioning element of the cover.

1. Field of the Invention
The present invention relates to a radial vibration detection apparatus, and in particular to a radial vibration detection apparatus that detects the radial vibration value of an optical assembly of an optical disc drive during optical assembly operation.
2. Description of the Related Art
Generally speaking, an optical disc drive includes an optical pick-up, a spindle motor, and a turntable, among other components. In order to rapidly and continuously access data in an optical disc during optical disc drive operation, the optical disc has to rotate at a high speed. When the optical disc rotates with the spindle motor, axial and radial vibration usually occurs, thereby causing focus and tracking errors in the optical pick-up on the optical disc.
Axial and radial vibration occurs due to several factors. For example, a bearing is not accurately assembled on the spindle motor, and the turntable for loading the optical disc is not correctly fitted in the bearing. Nevertheless, the design and manufacture of the bearing is enhanced. Thus, the axial and radial vibration is caused mainly by the assembly between the bearing and spindle motor or between the bearing and turntable rather than by the bearing itself.
Referring to FIG. 1, an optical assembly 5 includes a turntable 6 and a spindle motor 7. The turntable 6 is disposed on the spindle motor 7. The spindle motor 7 has a bearing (not shown) and is electrically connected to a circuit board 51. The turntable 6 has a body 61, a first part 61a and a second part 61b. An iron accommodating portion 62 is formed on the first part 61a of the body 61, and an iron element 63 is disposed therein. Additionally, five resilient clamp elements 64 are formed on the first part 61a and near the iron accommodating portion 62. The resilient clamp elements 64 protrude from the first part 61a and extend to the second part 61b in an equiangular manner. Thus, the body 61 is equally divided into five portions. The central hole of the optical disc is fitted onto the five clamp elements 64, and the optical disc is held thereby.
Usually, the turntable 6 is assembled on the spindle motor 7 by means of a punching process after the spindle motor 7 has been manufactured. At this time, assembling deviation is generated to enlarge the radial vibration, thereby causing manufacturing failure of the optical disc drive. In order to decrease or avoid the manufacturing failure of the optical disc drive, a detection device or process is needed on the production line. Specifically, the five resilient clamp elements 64 of the turntable 6 increase difficulty in detecting the radial vibration. Thus, a coordinate measurement machine or roundness measurement instrument is needed to detect the radial vibration. Nevertheless, the coordinate measurement machine or roundness measurement instrument is very expensive and the operation thereof is very complicated. Thus, detection of the radial vibration in the optical assembly 5 is inconvenient.
Hence, there is a need to provide a radial vibration detection apparatus to overcome the aforementioned problems. The radial vibration value of the turntable can be quickly and accurately detected on the production line. Meanwhile, the operation of the radial vibration detection apparatus is easy, such that defective optical assemblies are easily detected.


Described herein are systems and methods for efficient and accurate, automated detection of a region of interest interior to the ribcage from an in vivo mammalian image. It is found that efficient, automated identification of the region of interest interior to the ribcage can be achieved by the use of both a bone distance mask and a surface distance mask. The technique solves the problem of accurate and fast identification of the region of interest for a wide range of sizes and shapes of mammals, e.g., small mammals such as mice.

There are a wide array of technologies directed to in vivo imaging of mammals—for example, bioluminescence, fluorescence, tomography, and multimodal imaging technologies. In vivo imaging of small mammals is performed by a large community of investigators in various fields, e.g., oncology, infectious disease, and drug discovery.
In vivo imaging often involves the use of reagents, such as fluorescent probes, for non-invasive spatiotemporal visualization of biological phenomena inside a live animal. For example, fluorescence molecular tomography (FMT) involves in vivo imaging of mammals for quantitative analysis of administered and/or endogenous probes. In vivo microCT imaging, is an x-ray-based technology that can image tissues, organs, and non-organic structures with an extremely high resolution. MicroCT has evolved quickly, requiring low dose scanning and fast imaging protocols to facilitate multi-modal applications and enable longitudinal experimental models. Multi-modal imaging involves the fusion of images obtained in different ways, for example, by combining FMT, PET, MRI, CT, and/or SPECT imaging data.
Acquisition of such in vivo images can be time consuming, and rapid analysis of the acquired images is key to the efficiency of the process. Often, it is desirable to focus imaging efforts on only those portions of the mammal interior to the rib cage, which contains many organs of interest and for which advanced image analysis is needed. Advanced image analysis may involve, for example, advanced tomographic reconstruction for the quantitative analysis of an administered or endogenous probe in one or more target organs of the mammal. The portions of an image outside those target organs may not be important to the analysis, and processing time spent on those portions is wasted and results in reduced efficiency.
There is a need for a highly efficient method for detecting regions of interest of an in vivo mammalian image in order to eliminate unnecessary processing of unimportant regions of the image and reduce overall image processing time without losing important image detail.

Method and system for automated detection of tissue interior to a mammalian ribcage from an in vivo image

PerkinElmer Cellular Technologies Germany GmbH


A pressure measurement system includes a pressure transmitter and a remote seal assembly, and a capillary tube that connects a housing of the remote seal with a housing of the pressure transmitter utilizing at least one negligible-leakage quick connect coupling.

The present invention relates to the process control industry. More particularly, the present invention relates to remote seals and capillary tubes utilized in conjunction with pressure transmitters.
Pressure transmitters are used to remotely monitor the pressure of a process fluid. Remote seals, or remote diaphragm assemblies, are often used to distance the pressure transmitter from hazardous measurement environments, or for linking the pressure transmitter with inconveniently located process fluids. For example, remote seals are often used with corrosive or high temperature process fluids. In those situations, a remote seal having a diaphragm assembly and a capillary tube can be used to relate the pressure transmitter to the process fluid while the pressure transmitter is located a safe distance away. The capillary tube may extend tens of meters in order to couple the pressure transmitter with the process fluid. The remote seal communicates hydraulically with the process fluid through a thin, flexible diaphragm, which is used to isolate the process fluid from a fill fluid used in the capillary tube. As the diaphragm flexes, the incompressible fill fluid translates the pressure change through the capillary tube to a diaphragm located in the pressure transmitter. Deflection of the pressure transmitter diaphragm is transmitted through a similar method to a pressure sensor, which produces a signal relating to the pressure of the process fluid.
Remote seal hydraulic systems are filled at the factory with a precise amount of fill fluid and sealed. System performance is correlated with the precise level of fill fluid and is degraded with any oil leakage or the presence of air in the fill fluid. For severe applications, such as high process temperature or high process vacuum service, specialized factory production methods are used to remove air from the fill fluid and permanently seal the hydraulic system. For many less severe applications, the loss of a minute amount of fill fluid oil is acceptable.
Capillary tubes and remote seal diaphragms can be compromised due to wear and tear, accidents, and maintenance procedures, thereby causing leakage of fill fluid. For example, they can be cut or crimped as they are routed to their remote locations and therefore need to be repaired or replaced. Current methods for connecting the capillary tube to the pressure transmitter and remote seal include the use of a threaded or welded connection. These connections are not repairable in the field and are themselves a source of fluid leaks.
As such, it is desirable for less severe applications to have a field repairable, replaceable, and upgradeable remote seal system whereby leakage is minimized during coupling and uncoupling of the components and during operation.

Industrial process pressure transmitter with field repairable remote seals


A sliding type thin fingerprint sensor package mainly comprises a substrate and a fingerprint sensor chip. The chip defined as a sliding region and a conductive portion comprises a dielectric layer, a circuit layer and a passivation layer. The circuit layer has a plurality of external contact pads and at least one electrostatic conductive pad close to a window of the dielectric layer. The passivation layer formed on the circuit layer has a plurality of first openings to expose the external contact pads and a second opening to expose the electrostatic conductive pad of the circuit layer and the window of the dielectric layer. The electrostatic conductive pad and the window are located at the sliding region and the external contact pads are located at the conductive portion. The fingerprint sensor chip is electronically connected with the substrate. A sensing region of the fingerprint sensor chip is exposed via the second opening of the passivation layer and the window of the dielectric layer.

The well known used sliding type thin fingerprint sensor package 100, as illustrated in FIG. 1, includes a substrate 110, a fingerprint sensor chip 120, an electrostatic discharge bar 130, at least one bonding wire 140 and an encapsulant 150. The fingerprint sensor chip 120 has an active surface 121 forming a sensing region 124, a back surface 122 and at least one bonding pad 123 located at the exterior of the sensing region 124. The electrostatic discharge bar 130 is disposed on the active surface 121 of the fingerprint sensor chip 120 and located between the sensing region 124 and the bonding pad 123. The bonding wire 140 is applied for electrically connecting a connection pad 112 of the substrate 110 with the bonding pad 123 of the fingerprint sensor chip 120. The encapsulant 150 is formed on an upper surface 111 of the substrate 110 and the active surface 121 of the fingerprint sensor chip 120 so as to encapsulate the bonding wire 140 and exposes the sensing region 124 and the electrostatic discharge bar 130. However, the electrostatic discharge bar 130 of the sliding type thin fingerprint sensor package 100 is actually disposed on the active surface 121 of the fingerprint sensor chip 120, which will cause a complicated manufacturing process. Besides, it is found that the thickness of the sliding type thin fingerprint sensor package 100 cannot be reduced since the fingerprint sensor chip 120 is stacked on the substrate 110 to increase entire thickness of the substrate 110. In addition, since the encapsulant 150 is formed to encapsulate the bonding wire 140, the thickness of the known sliding type thin fingerprint sensor package 100 will be further raised and it is not allowed to encapsulate the electrostatic discharge bar 130 with the encapsulant 150 while forming the encapsulant 150.

Package, packaging method and substrate thereof for sliding type thin fingerprint sensor


The specification discloses a device and method for generating a virtual keyboard/display. By means of optical scanning, a virtual display/keyboard is generated on a physical plane through a scan laser switch. Using the code reading technology, the key position entered by the user can be read and transmitted to a computer. The disclosed device includes a first laser emitter, a second laser emitter, and a laser receiver. The disclosed method has the following steps. First, the first laser emitter performs a surface scan to generate the patterns of the keyboard/display. The second laser emitter simultaneously generates a first reflective beam and a second reflective beam when the user enters input using the virtual keyboard. Finally, the laser receiver receives the first and second reflective beams, thereby obtaining the signals entered by the user.

1. Field of Invention
The invention pertains to a device and method for generating a virtual keyboard/display and, in particular, to a device and method for generating a virtual keyboard/display through the surface and line scans of laser beams.
2. Related Art
A rising trend in electronic products is to be light, compact, quiet, and easy to carry. However, as set by visual limit and human mechanics, the input device and display cannot be minimized indefinitely. In practical uses, most users prefer to have larger input devices and display devices. Although there exist other equivalent input devices, such as hand-written panels, voice analyzers, and light pens, most users are still used to keyboard input. It is thus very hard to replace the keyboard with other means. Recently, virtual keyboards, which are designed particularly for conventional users, have been proposed. They also have the advantages of having no noise, occupying no space, and being easy to carry. The introduction of the virtual keyboards utilizes the digital micro mirror display technology. The patterns of the keyboard and display are produced by projection. Two beams of laser and two receivers are required to detect the reflection angles of light reflected by fingers. Combining the angles measured by the two photo sensors, the system can determine the position of the entered key. A drawback is that the two laser emitters and two photo receivers consume more electrical power, which is not ideal for long-term uses.

Device and method for generating a virtual keyboard/display

Industrial Technology Research Institute


A technique is provided that supports making evaluations of impact on a business performance indicator, which varies depending on timing at which a change of plan is decided. A sales plan evaluation support system, includes: a unit which obtains master information that includes a sales plan of a product and is used as input for material requirements planning (MRP) calculation; a first MRP calculating unit which obtains a first order-placement plan through MRP calculation by using the master information as input, the first order-placement plan including an ordered-item count and an order-placement date of a required item for the product; a revision timing setting unit which sets timing for revising the sales plan; a master modifying unit which modifies the master information; and a second MRP calculating unit which obtains a second order-placement plan through MRP calculation by using an order-placement plan having an order-placement date preceding the revision timing included in the first order-placement plan, as an order-placement plan which has been implemented prior to the revision timing, and by using, as input, master information modified by the master modifying unit, the second order-placement plan including an ordered-item count and an order-placement date of a required item for the product.

The present invention relates to a technology of calculating and displaying a placed-order amount and an inventory amount which vary depending on timing of modifying a sales plan or lead time, to thereby support evaluations of the sales plan.
Material Requirements Planning (MRP) is a technique of material planning, which was proposed in the 1970s in the United States and has gained a broader range of application in recent years. The MRP method is intended to obtain, with respect to required items for a product, such as assemblies, components, and raw materials, a plan for purchasing or manufacturing necessary items in required quantities by a required deadline, based on a production plan or a sales plan prepared at product level, a bill of material, and information on inventory and placed-orders (remaining orders) or the like.
Further, as a method of accurately estimating future inventory assets even in a case where estimated volume of sales of a product in reality is inconsistent with its sales plan, a simulation system is proposed for calculating an inventory assets balance, in which a time point, based on which MRP calculation is performed, is moved forward, and MRP calculation is performed at each advanced time point to obtain an inventory quantity based on an incoming quantity/outgoing quantity and an inventory quantity at a previous time point, to thereby calculate how the inventory changes at each time point (refer to Japanese Patent Laid-open No. 2004-161437).
According to the conventional technology, it is possible to calculate how a future inventory assets balance changes, based on a current sales plan; however, it is difficult to see how the inventory assets balance changes, depending on the timing of revising the sales plan.
Also, according to the conventional system, it is possible to understand the behavior of components which eventually arrive in stock to increase the inventory; however, it is difficult to find out when the order for the components being in stock was placed and at what timing the components are purchased in a large quantity under the current plan. Accordingly, it is not possible to conduct a quantitative discussion on decision making timing, that is, how soon a corporate manager has to make a decision to change the plan in order to prevent increased risk of deteriorating business performance.


A modular plug electrical connector includes a dielectric housing which holds a plurality of terminals, a cavity which is open to the terminals, and a circuit board which is mountable in the cavity. The circuit board has an edge and an array of contact pads along the edge. Each of the terminals has a groove. The grooves are aligned to receive the edge of the circuit board and are dimensioned such that the terminals engage the contact pads within the grooves when the board is mounted in the cavity.. In an alternate embodiment a modular plug electrical connector includes a dielectric housing having a mating end, a plurality of slots which are open at the mating end, a cavity which is open to the slots, and a circuit board which is mountable in the cavity. The circuit board has an edge and a plurality of terminals along the edge. The terminals are installed in the housing as a unit with the circuit board and are exposed in the slots for engagement by terminals of a mating modular jack when the circuit board is mounted in the cavity.

Modular plugs and modular jacks are commonly used for interconnecting plural wires in a communications systems. Signal lines in a communications system are subject to crosstalk which increases in magnitude as operating frequencies of the system are increased. Previous efforts to reduce crosstalk have focused primarily on the crosstalk which occurs in the modular jack. The constant trend toward higher data transmission rates has resulted in a need for further crosstalk reduction which may be obtained by reducing crosstalk in the modular plug.
A new concept for reducing crosstalk in a modular plug involves adding a compensating insert to the modular plug. Details of this new concept are disclosed in a U.S. patent application which is being filed concurrently with the present application and which is owned by the assignee of the present application. In at least one embodiment of the new crosstalk reduction concept, the compensating insert includes a circuit board which is installed in a cavity in the modular plug. The circuit board carries conductive traces which are arranged at one end of the board to be connected to communications system wiring, and at the other end of the board to be connected to terminals of the modular plug. A problem to be solved by the present invention is how to connect the traces on the circuit board to the terminals of the connector.


The invention provides a display device including: a first electrode and a second electrode which are disposed in different directions from each other on a flexible substrate; an optical functional layer disposed between the first and second electrodes; and a display unit having a display pixel formed at a rectangular area of overlap between the first and second electrodes, in which the first and second electrodes are respectively connected to a first flexible wiring member at a first region of a periphery of the flexible substrate and a second flexible wiring member at a second region adjacent to the first region, one of the first and second flexible wiring members is adhered onto the display unit, and a first connection portion and a second connection portion for connecting the flexible wiring members with external drive units are disposed at the same region on the periphery of the flexible substrate.

1. Field of the Invention
The present invention relates to a display device having a functional element formed on a flexible substrate. More specifically, the present invention relates to a display device preferably used in a passive matrix drive mode.
2. Description of the Related Art
As a next-generation display or a next-generation device, paper-like flexible displays and flexible lighting have begun to receive considerable attention, which displays or devices are realized by laminating a transparent electrode, an optical functional layer including an organic light emitting element or a liquid crystal element, and a back electrode on a transparent and flexible substrate, and forming a plurality of display pixels. These flexible displays are thin, lightweight, and easily portable, and can be folded when not used and unfolded when used, or suchlike. To achieve a flexible display, a flexible substrate, robust display pixels, durability of the display, miniaturization of the display and the like, are required.
Solutions for accomplishing miniaturization and reduction of weight are disclosed in Japanese Patent Application Laid-Open (JP-A) Nos. 2002-82627 and 2003-17245, but the problems have not been solved sufficiently thus far. As a driving system of a flexible display, two methods have been studied, that is, a passive matrix drive mode and an active matrix drive mode. However, since it is generally difficult to manufacture a flexible thin film transistor (TFT) that exhibits sufficient performance on a flexible substrate such as polyethylene naphthalate (PEN), the passive matrix drive mode is expected to be an effective driving mode. However, in the case of control by the passive matrix drive mode, the amount of wiring to be connected to an external drive circuit is larger than when the active matrix drive mode is used. Hence, dead space is increased. Accordingly, a technique for reducing the space taken up by wiring is required.
Further, a display unit such as a display is constituted by a collection of multiple display pixels present on a region formed by two electrodes, that is, an anode and a cathode, disposed in intersecting directions and an optical functional layer disposed between the two electrodes. Since two electrodes are disposed in intersecting directions, in the case of a rectangular panel, for example, electrodes are respectively drawn out from two adjacent sides, connected to a drive unit using a flexible printed circuit (FPC) or the like, and controlled. The passive matrix drive mode is an effective driving method for a flexible display, but it requires a large amount of connecting wiring for driving, and a large space is required for the wiring.
To realize a flexible display, it is essential to minimize the space occupied by constituents of the display other than the display unit, and it is important to house the wiring portions in a smaller space.

Display device with connection portions in same region


A cobalt-carbon (Co—C) eutectic metal alloy ohmic contact for a radio-frequency (RF) carbon nanotube (CNT) field effect transistor (FET) device and a method of manufacturing same are disclosed. Embodiments of a method include providing a graphite crucible, placing Co and a C source within the graphite crucible, heating the graphite crucible containing the Co and C source such that the Co and C source combine with graphite from the graphite crucible to thereby form a Co—C eutectic metal alloy, and creating an ohmic contact by depositing the Co—C eutectic metal alloy directly on top surfaces of CNTs of a RF CNT FET device such that the Co—C eutectic metal alloy is in direct contact with the CNTs. The Co—C eutectic metal alloy ohmic contact formed in this manner is consistently stabile and uniform and functions as a high work function layer that also serves as an adhesion layer to the CNTs.

In the push to scale CNT FET electronics from long channel optical lithography to short channel deep ultraviolet (DUV) lithography of 0.5 microns, the device contact length needs to be reduced to less than 1 micron. In the state of the art CNT FET, a thin adhesion layer of titanium (Ti) is capped with palladium (Pd) metal as an ohmic contact to a CNT array. This Ti layer is necessary for adhesion of the Pd to the CNTs, but the Ti layer has a lower work function then the CNT array, thus resulting in a barrier at each contact point. In the state of the art, it has been shown that the Ti layer hinders channel scaling of less than 1 micron. If the Ti layer is removed from the stack, channel scaling of less than 1 micron can be measured but the lack of adhesion between the Pd and the CNT array (e.g., on quartz) results in a yield of less than 10%.
A Co—C eutectic metal alloy as a ohmic contact fixes both of these problems. A Co—C eutectic metal alloy adheres to the wafer without a need for an adhesion layer. In contrast to the use of the high work function metal Pd, the use of a Co—C eutectic metal alloy comprising the high work function metal Co allows the Co—C eutectic metal alloy to be in direct contact with the CNTs and thus reduce the barrier on the contact. Thus, the Co—C eutectic metal alloy enables contact scaling of less than 1 micron with great adhesion resulting in yields above 75%.
While the work function of Co has been catalogued, it has not been applied to CNT FET's as an ohmic contact or part of the composition of an ohmic contact due to the difficulty in integrating the process. In embodiments herein, Co—C eutectic metal alloy ohmic contacts utilize the solubility of C into Co as a way to stabilize the deposition technique allowing for easy integration via electron beam evaporation.

Carbon mixture ohmic contact for carbon nanotube transistor devices


Foley type catheter embodiments for sensing physiologic data from a urinary tract of a patient are disclosed. The system includes the catheter and a data processing apparatus and methods for sensing physiologic data from the urinary tract. Embodiments may also include a pressure sensor having a pressure interface at a distal end of the catheter, a pressure transducer at a proximal end, and a fluid column disposed between the pressure interface and transducer. When the distal end is residing in the bladder, the pressure transducer can transduce pressure impinging on it into a chronological pressure profile, which can be processed by the data processing apparatus into one or more distinct physiologic pressure profiles, for example, peritoneal pressure, respiratory rate, and cardiac rate. At a sufficiently high data-sampling rate, these physiologic data may further include relative pulmonary tidal volume, cardiac output, relative cardiac output, and absolute cardiac stroke volume.

The Foley catheter, named for Dr. Frederick Foley who first described a self-retaining balloon catheter in 1929, has been in use since the 1930's, in a form nearly identical to its early models. In its most basic form, a Foley catheter has proximal portion that remains outside the body, a length that traverses the urethra, and a distal end that resides in the urinary bladder. The Foley catheter is held in place by an inflatable balloon that stabilizes the device in place, and prevents inadvertent withdrawal from the bladder. A typical Foley catheter includes at least two lumens along its length; one lumen serves as a conduit that drains the bladder, and the second lumen serves as an air conduit that allows the balloon to be controllably inflated and deflated.
Various developments have added diagnostic functionality to Foley type catheters, including the ability to measure pressure and temperature. For example, U.S. Pat. No. 5,389,217 of Singer discloses a catheter with oxygen sensing capability. U.S. Pat. No. 5,916,153 of Rhea and U.S. Pat. No. 6,434,418 of Neal both disclose a pressure sensor associated with a Foley type catheter. U.S. Pat. No. 6,602,243 to Noda discloses a temperature sensor associated with a Foley type catheter.
The Foley catheter, widespread in use, having a low cost, and easily put in place by health care professionals may offer still further opportunity as a vehicle for deriving critical diagnostic information. The technology disclosed herein provides for the delivery of highly resolved and previously unavailable diagnostic information, as may be derived from a Foley catheter with pressure sensing capability.

This patent is subject to a terminal disclaimer.


Provided is a wiring module to be attached to a power storage element group having a plurality of power storage elements, the wiring module including: bus bars; a plurality of coupling units for holding the bus bars; and a coupling portion for coupling the plurality of coupling units. The coupling portion includes: a locking portion arranged on an end portion of one coupling unit of the plurality of coupling units; and a locked portion that is arranged on another coupling unit adjacent to the one coupling unit and onto which the locking portion of the one coupling unit is to be locked. The locking portion extends in a direction intersecting a coupling direction in which the plurality of coupling units are coupled.

Conventionally, the technique disclosed in JP 2014-97962A has been known as a wiring module to be attached to a battery group including multiple batteries. This wiring module includes bus bars for connecting terminals of adjacent batteries, and an insulating protector for containing the bus bars. Multiple coupling units are coupled to form the insulating protector.
Each coupling unit includes an engaging portion and an engaged portion. The multiple coupling units are coupled by fitting together a fitting piece of one coupling unit and a fitting recess of another coupling unit arranged adjacent thereto. The fitting piece is configured to extend along a coupling direction in which the multiple coupling units are coupled. Also, the fitting recess is provided at a position opposing the fitting piece of the one coupling unit arranged adjacent thereto and the fitting piece is fit therein.