An improved printer is provided that receives a print job from a host computer and divides the bitmap image of a page to be printed into a series of image blocks or tiles. Each image block containing non-null data will be stored in the printer's memory system, typically placed in a non-contiguous memory location with respect to other blocks. The null image data blocks will not be stored in the printer's memory system, but instead only their locations on the physical printed page will be stored in a "block list table." Each entry in the block list table contains the beginning address of the physical RAM area that contains one of the image data blocks, and also contains other variables or attributes concerning the particular image data block, such as whether or not this block is a regular non-null data block, or a "no-op" (or "NOP") block containing null data. Null data blocks require no physical memory address to be listed in their entry on the block list table, since no physical RAM areas are needed for storing null bitmap image data. Rather than building a band buffer in contiguous memory before shipping rasterized data to the laser printhead, the present invention builds in a cache a series of rasterized line segments of bitmap data in real time and sends them to the laser printhead "on the fly," by retrieving a single rasterized line segment of data, block-by-block, as needed to complete a single entire line.

In some conventional laser printers generally available today, the architecture of the hardware and software operating systems is such that the bitmap page image is divided up into a checkerboard pattern of units called "blocks." The number of blocks per page is dependent upon the paper size, block size, printhead resolution in dpi (dots per inch), and bitmap resolution in bits/pel. For example, an 8 1/2".times.11" page can be divided into rectangular blocks in which there are twenty (20) horizontal blocks .times. one hundred (100) vertical blocks on the page. At a printhead resolution of 1200 dpi and bitmap resolution of one bit/pel, each block would be 512 pels wide .times.128 pels high.
Typically, the size of random access memory (RAM) in the printer is less than that required to store a full page bitmap. Hence, memory is allocated on a block basis when information is "painted" into each block by the rasterization process. Therefore, each block of bitmap image data is stored in a separate area from the other similar blocks, and these smaller areas will quite likely to be spread all over different memory address locations of the printer's RAM. However, when the bitmap image is to be printed, a transformation of the data stored in RAM must occur in conventional printers from a "scattered" block page representation to a "gathered" banded page representation, in which a "band" comprises a group of horizontal blocks that extend across the entire width of the printed page. This band building process copies the non-contiguous blocks into "band buffers" which each hold a page width strip in contiguous memory.
Depending upon the printer's throughput (i.e., pages per minute), multiple bands must be buffered before the image can be printed. In many printers, a specific set of memory locations is reserved in the printer's main RAM system to hold these multiple bands. A minimum of two bands is typically stored in the system's RAM: (1) the band that is presently being sent to the laser printhead as a serial data stream, and (2) another band that is currently being built so that it will be completed (and ready to print) before the previous band has finished being printed.
Some of the fundamental problems for the back end rendering software in conventional printers is that the band building process involves a copying operation of bitmap image data from the scattered blocks in non-contiguous RAM locations into the pre-allocated contiguous memory locations in RAM used to store the band buffer in real time (while the paper is moving through the printer), and thereby requiring a portion of the main processor's performance. In addition, null or "blank" blocks must be copied into the band buffer just like "real data" blocks, thereby requiring memory retrieval and storage operations that take up memory bandwidth (i.e., requiring access time to use the memory system's address and data busses). Furthermore, additional RAM locations must be allocated to hold the null block image data in the non-contiguous blocks, and additional memory must be allocated to hold the multiple band buffers.
Some of the patents which disclose image building systems for printers are as follows: U.S. Pat. No. 4,942,541 (by Hoel) discloses a patchification system that uses virtual memory for mapping image data in a printer. Physical memory is allocated as "patches" and the physical memory is used in creating a page image bitmap. A patch corresponds to a rectangular area of the page in bitmap form, and each patch is represented by non-contiguous segments of the virtual (or logical) memory, which when later mapped to the physical memory, are contiguous. When a "blank" patch is found during the step of allocation of physical memory, the blank patch is mapped to a single "blank" physical patch. All such blank patches are mapped to this same single blank physical patch. During printing, the blank physical patch is mapped back into the correct blank areas of the logical page image. This occurs during a serialization process, and if a particular mapped physical patch was found to be a zero patch, then the single blank physical patch in memory is accessed to ship the correct blank data (for the blank logical patch) to the printer. The non-blank data is mapped to physical memory addresses using logical patchified addresses, in which the physical addresses can be non-contiguous. When it is time to ship the data to the printer, the logical addresses which are contiguous use an offset (or pointer) to find the correct physical addresses to provide the proper data, as needed for the printer. This includes both blank and non-blank data as the individual patches of data are needed for the printer.
U.S. Pat. No. 5,502,804 (by Butterfield) discloses a laser printer that generates output page images in real time. Rather than requiring an entire page to be built in a bitmap form before sending it to the print engine, Butterfield discloses the use of building a single band to begin the process of printing, and after building the first band, a second band is created while the first band is being printed. By use of this method, a good deal of memory can be saved since an entire bitmap page need not be constructed before sending the data to a print engine. Even if sufficient memory is available to build a complete page, by using the banding technique of Butterfield a second page can be constructed in one band while a first page in another band is being printed. Butterfield receives high language level print job data and converts this data to "graphics orders" rather than converting directly to bitmaps. Since a single graphics command may affect more than one band, an order may be processed multiple times, using "command blocks" that are tabular structures in memory. An "order construction step" is first performed, and attempts to eliminates redundant orders by combining multiple inputs into single command blocks (thereby minimizing memory).
A first (intermediate) image drawing step proceeds in parallel with the order construction step, and draws objects in the page image. The objects are stored in the user memory for use as source data for the next (or second) drawing step. The second (deferred) image drawing step begins when all of the orders for the page image have been generated. This step may process order commands multiple times, one for each image band affected.
U.S. Pat. No. 5,574,953 (by Rust) discloses a data compression and decompression system that stores compressed data in non-contiguous memory. As the data is compressed and stored in memory, the non-contiguous segments are marked, by placing a pointer at the last location that points to the next memory used. Just prior to the pointer, a special "link" code is stored, which logically links together the non-contiguous memory. When the data is decompressed, if the code is a link code, then the address pointer directs the system to the next location in memory where the next compressed data is stored to retrieve that segment. If the code is not a link code, then the code (or data) is decompressed.
U.S. Pat. No. 5,129,088 (by Auslander) discloses a data processing system that creates virtual disks from non-contiguous groups of blocks on hard disk drives. Each drive (or drives) of physical memory locations is divided into physical partitions, each partition comprising a predetermined number of contiguous addressable blocks. The partitions in each group of blocks are not necessarily physically contiguous, although the "logical" blocks are contiguous. As the system memory requires further locations to be allocated, the system can automatically allocate one or more additional partitions, and this occurs dynamically to store further information.
U.S. Pat. No. 4,555,802 (by Fedak) discloses a system that divides image data into a plurality of segments in which each segment is either square or rectangular. The segments are analyzed to determine which contain blank or zero data or which contain at least one bit of non-zero data. The blank segments are ignored and the non-blank segments are stored and indexed. A directory is created to indicate the storage location of each group of non-blank segments as well as their spatial location with respect to the rectangular raster array of signals. All compaction and decompaction machine operations are independent of bit-significant informational content of the segments.
U.S. Pat. No. 5,416,615 (by Shirota) discloses a digital data transmitting device that extracts image data in both horizontal and vertical directions and forms an "original block" of n .times.n pixel data. From this information, a transformation operation is performed, such as a two-dimensional cosine transform, thereby creating a "differential block" that consists of m .times.m pixel data. The differential block data is "transform coded" to generate "coefficient data", and a "flag generation circuit" is used to transmit the coefficient data. However, this flag generation circuit generates a flag if there is an omission of the transmission of coefficient data when there is no meaningful data (generally meaning blank data), and a separate transmission circuit will transmit the flag or flags and the pixel data of blocks.
In conventional printers of the prior art, a "band" of rasterized bitmap image data must be constructed in contiguous memory before sending the band as serial data to the laser print engine. In fact, in most conventional printers, two separate bands have specific locations reserved in random access memory, one set of contiguous memory locations for the band that is now being output to the laser printhead, and a second set of contiguous memory locations for the band that is now being built. By the time the first band's data has been completely sent to the laser printhead, the second band will be entirely completed in contiguous memory, and will be available to send to the laser printhead as needed.
The amount of random access memory (RAM) reserved for the band building process is not insignificant. For example, at 1200 dpi (dots per inch) resolution, a band that covers an 8 1/2" wide page, and contains 128 horizontal raster lines will require 160 Kbytes of memory. For holding two bands (or at least reserving space in memory for two such bands), the printer's memory must reserve 320 Kbytes of space.
Since many laser printers are manufactured having 2 Mbytes of RAM, this 320 KB requirement is a significant portion of the entire printer's memory. If it were possible to eliminate the memory requirements for the band building process, then a significant savings in memory space and in memory bandwidth could be realized as a significant commercial advantage, and also a performance savings for the printer.

Method and apparatus for building rasterized lines of bitmap data to be printed using a piecewise-linear direct memory access addressing mode of retrieving bitmap data line segments


A hermetic compressor is provided. The compressor comprises: a hermetic casing; a driving motor having a stator, a rotor and a rotating shaft rotating with the rotor and having a journal formed thereon; a compressing portion driven by the driving motor for compressing a compressible medium; and a bearing for rotatably supporting the journal of the rotating shaft, wherein an oil remaining recess for containing a lubricating oil is formed on the journal when the compressor stops its operation and for supplying the oil between the journal and the bearing when the compressor starts its operation. Accordingly, the oil can be suitably supplied between the journal and the bearing when the compressor restarts, thereby preventing non-lubricating friction between the journal and the bearing.

The present invention relates to a hermetic compressor which is improved such that a lubricating oil remains on the surface of a journal of a rotating shaft of the compressor when the compressor stops its operation.
A hermetic compressor is generally employed in a cooling system such as a refrigerator or an air conditioner, so as to compress a gaseous refrigerant from an evaporator to a high-temperature and high-pressure state and supply the compressed refrigerant to a condenser. The hermetic compressor generally includes a hermetic casing, a driving motor installed inside the casing and a compressing portion driven by the driving motor to compress the refrigerant. The compressing portion is classified into a reciprocating type and a rotary type according to its compression mechanism.
FIG. 7 shows a sectional view of a conventional hermetic reciprocating compressor. As shown in the drawing, the conventional compressor includes a casing 100 forming a closed internal space, a driving motor 101 installed inside the casing 100 and a compressing portion 130 which is driven by the driving motor 101.
The driving motor 101 includes a stator 102, a rotor 104 rotatably installed inside the stator 102 and a rotating shaft 106 fitted into the rotor 104 and rotating therewith.
The compressing portion 130 includes a cylinder 131, a piston 132 reciprocating inside the cylinder 131 and a cylinder head 133. The piston 132 is connected to an eccentric portion 112 of the rotating shaft 106 by a connecting rod 134 and reciprocates inside the cylinder 131 according to a rotational movement of the rotor 104, thereby inhaling and compressing the refrigerant.
A journal 109 is formed at the lower portion of the rotating shaft 106 and rotatably supported by a bearing 108. The journal 109 slides frictionally against the bearing 108. A lubricating oil 118 is contained in the bottom portion of the casing 100 and picked up by an oil pickup tube 116 which is extended downwardly from the eccentric portion 112 of the rotating shaft 106 to be supplied between the journal 109 and the bearing 108. The oil picked up by the oil pickup tube 116 flows upward along an oil groove 110 formed on the outer surface of the journal 109 and is supplied to the surface of the journal 109, so as to perform a lubricating action between the journal 109 and the bearing 108.
However, when the driving motor 101 stops in the conventional hermetic compressor, most of the oil which is located between the journal 109 and the bearing 108 flows downward by its own weight, so that little oil remains therebetween. Therefore, when the compressor restarts its operation, non-lubricating friction generates between the journal 109 and the bearing 108 until the oil is supplied therebetween through the oil pickup tube 116, thereby increasing abrasion of the journal 109 and the bearing 108, making a starting rotation of the rotating shaft 106 unstable and generating noises.

Hermetic compressor with start-up lubrication


A method of analyzing images of stained slides on a remote client computer connected to a wide area network such as the Internet includes the steps of scanning a stained slide to produce a digital image file of the stained slide and storing the digital image at a first location. An image viewer and analysis program is executed on a client computer in a location remote from the first location. A stored digital image from the first location is transferred to the client computer. A user selects a field from the stored digital image using the image and analysis viewer program. The field is then scored either manually or automatically. A user may also score a section of a field. Multiple fields and/or sections may be scored to achieve an overall score for the slide. A hardcopy report may be generated based on the scoring.

Immunohistochemistry (IHC) is often used to diagnose suspect biological material. In addition, IHC techniques can be used prognostically to assist clinical decision makers. Typically, a source of biological material such as tissue is sent to a dedicated laboratory which then undergoes histological processing. Histology processing includes, for example, processing of tissue samples to fix and preserve the tissue samples. Fixing the tissue samples prevents degradation and stops the cells from changing characteristics. After fixation, tissue samples are then stained with one or more stains. The stained samples are contained on slides which can then be imaged for subsequent viewing.
Certain stains enable the pathologist to see the cellular structure and morphology under a microscope more easily. Still other stains or markers are antigen-specific and preferentially bind or otherwise associate with diseased tissue (e.g., cancerous tissue). These antigen-specific stains or markers can be used by a pathologist (or other trained professional) to score a particular slide.
For example, under prior testing processes, a client would send a tissue specimen and test request to a dedicated laboratory. The laboratory would then stain the slides with the appropriate IHC markers and, when ordered, provide a quantitative analysis of the sample using a computer that was directly associated with or otherwise locally connected to an imaging device such as a scanner. The images and any analysis are generated on a report using the computer associated with or locally connected to the imaging device. The images are then burned to a portable storage medium such as, for example, a DVD and sent back to the client with the original slides. The client can view the images and is given the option to supplement or alter the report using their professional interpretation.
There are several disadvantages, however, with a system and method like the one described above. First, because the images are stored on a DVD (or the like) and sent back to the client, there is a significant delay in the amount of time it takes for a pathologist or other trained health professional to review the slide. This delay can amount to several days. This delay can be troubling from a psychological perspective of the patient (e.g., waiting for the results of a breast biopsy for possible cancer). In addition, if diagnosis can be made soon after a sample is prepared and imaged, the patient can be treated that much sooner. In the case of cancer diagnosis, the patient can immediately start undergoing chemotherapy—a potentially life saving advantage over current methods. In addition to the delay, there is an increased cost of delivering the image-files via the mail or by way of courier.
The current method of delivering digital images to pathologists on DVDs (or other portable media) also restricts the ability to get multiple opinions from professionals located in different geographic locations. For example, using current practices, the same DVD would have to be forwarded to different pathologists in order to obtain multiple opinions (or multiple DVDs sent out simultaneously). This cumbersome and time-consuming procedure prevents patient's from obtaining multiple opinions on a timely basis.
Another disadvantage of the current system and method is that additional stains are often employed on a sample based on the initial results or scoring of a slide. For example, a physician may order a screening test for cancer which employs a broad-based or general stain. If this test is positive for cancer, the physician may follow-up with one or more additional tests using other stains which are more specific (e.g., stains which may identify whether a particular cancer is highly metastatic). Using the current system, several days (or more) are lost in sending the initial slide images to the pathologist. It would be preferable if the slide images were available almost immediately after imaging. In this manner, subsequent staining and imaging of the sample may be accomplished without delay.
There thus is a need for system and method in which pathologists or other trained health care professionals have virtually immediate access to imaged slides. Such a system and method would decrease the amount of time necessary to diagnose a particular condition or diseased state. In addition, multiple opinions could be obtained without the need to deliver images stored on a portable storage medium. The system and method would preferably permit a physician or other health care professional to order additional staining tests on a timely basis. Finally, the system and method would permit pathologists or other trained health care professionals to view and score slides from virtually any geographic location.

System and method for image analysis of slides


The valve actuator (1) includes a housing (2), a motor (4) coupled to the valve, wherein rotation of the motor (4) changes the position of the valve from a first position in which fluid flow may occur along at least one path and a second position in which fluid flow is either blocked or may occur along at least one second path, said motor (4) being normally supplied with electrical power from a main source of electrical power, at least one sensor (24,132) configured to detect the position of the valve and/or the valve speed, a switch (16) controlling the delivery of electrical power to the motor (4), and a power circuitry (19) connected to the switch (16). The valve actuator further includes a controller (20) connected to the at least one sensor (24,132) and to the power circuitry (19), said controller (20) collecting in real time data relative to the position and/or the speed of the valve and data relative to the power setting, calculating the position and/or speed correction in pro rata to errors between the collected data relative to the position and/or the speed of the valve and collected data relative to the power setting, and sending a new power setting to the power circuitry (19), wherein the power circuitry (19) amplifies the controller signal.

Valve actuators find wide application and are notably used in conventional refuelling systems onboard aircrafts.
The valve actuators generally all have processor control for setting, monitoring and controlling the actuator. Key control factors include actuator position, i.e. valve position, and actuator torque (primarily for rotary output actuators) and thrust (primarily for linear output actuators). In a rotary output actuator, for example, valve position is typically determined by counting the revolutions or part of a revolution of the driven rotary output shaft by a rotary encoder. The load generated at the actuator output shaft in such an actuator is typically determined by mechanical means, such as by a strain gauge or by a pressure transducer. Load might also be determined from a torque related current in the motor.
Moreover, the valve actuators generally also have facility for failsafe if, for example, there is an electrical power failure. To this end, the majority of actuators further incorporate a compression spring return mechanism to restore the actuator to the desired failsafe position.
Nevertheless, this type of valve actuator presents the drawback of providing a water hammer in case of overpressure.
Moreover, in refuelling system of aircrafts, these valve actuators allow only a general regulation as disclosed in the document US2008/0173762. This document discloses an aircraft refuelling system allowing the refuelling rates to be increased, in which fuel flow restrictors are mounted in the refuelling pipework of the aircraft and restrict the flow rate of fuel from the refuelling pipework into the fuel tanks. Fuel valves are also provided to allow each tank to be disconnected from the refuelling pipework. A general regulation is performed by a fuel pressure regulator on board the aircraft so as to define the maximum pressure in the refuelling pipework. This kind of general regulation is not adapted when there is a need to more refuelling a specific fuel tank. The onboard fuel circuit of an aircraft thus cannot be always optimized according to the concrete needs.
Therefore, a need exists for a valve actuators avoiding water hammer when an overpressure appears and allowing a new way of refuelling the respective fuel tanks of an aircraft notably.


Moisture management indexes are determined for a textile sandwiched between two plates. Electrical conductors arranged in concentric opposing pairs are used to measure changes in electrical resistance of the fabric. A quantity of water (or other chosen liquid) is poured down a guide pipe and changes of resistance measured against time. From this data, specific indexes are determined, in a repeatable fashion, and used for determining moisture management characteristics of the fabric.

1. Field of the Invention
The invention relates to moisture management of textiles.
2. Description of Prior Art
In the design of textile fabrics, or layers of fabrics as used in diapers, the manner in which moisture is absorbed, distributed and evaporated from the fabric is varied by changing the materials and/or the. structure. For various fabric applications in rainwear, sports equipment, medical dressings, incontinence pads and so forth, different properties, or combinations of properties or characteristics are required. Broadly stated, such applicable properties and characteristics are already known or empirically provided in practice. However, no satisfactory testing methods or equipment are available for scientifically measuring or testing fabrics, especially for complex fabrics.
It is an object of the invention to overcome or at least reduce this problem.
According to one aspect of the invention there is provided a method of determining moisture management indexes of a planar textile fabric piece by pouring a quantity of liquid onto an area of an upper surface of the piece, measuring changes in electrical resistance through the piece and within a plurality of laterally disposed electrically enclosed areas of upper and lower surfaces of the piece, and, based on the electrical resistances, computing indexes:
(i) S1 and S2, being accumulated liquid absorption of the upper surface of the piece and the lower surface of the piece, respectively; and
(ii) H, being maximum difference of water content at the upper and lower surfaces.
The method may include computing an index R, the relative difference In accumulated water content between the upper and lower surfaces of the textile piece, being equal to a ratio   R  =                    S        2            -              S        1                    S      1
The method may include computing indexes K1 and K2, the initial liquid absorption speeds at the upper and lower surfaces, respectively.
The method may also include computing indexes xcex11 and xcex12, the drying rates at the upper and lower surfaces, respectively.
According to another aspect of the invention there is provided equipment for computing specific indexes relating to moisture management of a planar textile piece of fabric material comprising:
a pair of opposed plates having an array of corresponding exposed opposed electrodes displaced at intervals from one another to form pairs of electrodes between which a piece of fabric can be held,
means connected to the electrodes for measuring changes in electrical resistance through the piece and developed laterally across electrically enclosed areas of upper and lower surfaces of the piece,
means for recording those changes in electrical resistance with respect to time, and
means for computing the indexes.
The electrodes are concentric electrical conductive rings displaced about a central region.
The equipment may include means for adjusting separation of the plates so as to apply different pressure to a fabric piece supported between the plates.
The electrodes may each be laid out rectangularly in plan over increasing surface areas about a central region.


A method and system for assigning self-routing addresses to nodes in a network with arbitrary, including irregular, topology is provided. The method and system are useful in packet-switched networks and in particular optical packet-switched networks for reducing processing associated with routing packets. Each self-routing address encodes a set of paths from all nodes in the network to the destination node. In an embodiment of the invention each output port of each node in a network sends a packet in response to the state of a bit in the self-routing address in a packet. Alternatively, each node address in the network is mapped to a bit in a self-routing address. Furthermore, a node can have multiple self-routing addresses encoding different sets of paths from all other nodes in the network to the node. In addition, hierarchical networks are included among the networks suitable for self-routing addresses.

The processing overhead associated with routing packets in packet-switched networks is a major hurdle in implementing high-bandwidth networks. High capacity networks capable of efficiently handling voice, video, and data are necessary to satisfy the growing demand of telecommunication and multimedia services. All-optical communication networks are likely to be the networks of the future in view of their relatively large bandwidths. However, presently implementation of such networks is limited by available switching technologies. Current wavelength division multiplexing networks employ circuit-switching technology making them unsuitable for data applications involving bursty traffic requiring large bandwidth. In part, the challenge is due to the lack of practical optical buffers and the relatively limited number of photonic devices available in comparison to electronics present challenges in implementing optical packet switched networks. See, e.g., Chan et al. and Yao, S. et al., "Advances in photonic packet switching: An overview," IEEE Comm. Magazine, vol. 38, No. 2, pp. 84-94 (2000).
Faster switching via optics based logic is a future possibility. In optical packet-switched networks, the optical data needs to be processed and switched at the line speed of ten to hundreds of gigabits per second. Recent advances in optical logic device research demonstrate implementations of boolean logic functions such as AND, OR, NOR, INVERT, and XOR based on ultrafast nonlinear interferometers. Some exemplary references are Doran N. J. et al. "Nonlinear-optical loop mirror," Optics Letters, vol. 13, pp. 56-58 (1988); and Whitaker, Jr., N. A. et al., "All-optical arbitrary demultiplexing at 2.5 Gb/s with tolerance to timing jitter," Optics Letters, vol. 16, pp. 1838-1840 (1991). However, optical logic devices continue to be bulky making integration difficult. Consequently, complex optical logic circuits are still unavailable.
Another solution for implementing optical packet networks for taking advantage of their bandwidth is transmitting the packet header at a lower speed in another channel as in optical sub-carrier multiplexing, see, e.g., Carena, A. et al., "OPERA: an optical packet experimental routing architecture with label swapping capability," Journal of Light wave Technology , vol. 16, No. 12, pp. 2135-2145 (1998); and Blumenthal, D. J. et al., "WDM optical IP tap switching with packet-rate wavelength conversion and subcarrier multiplexed addressing," OFC'99, pp. 162-164 (1999) and optical burst switching, see, e.g., Xiao, C. et al., "Optical burst switching (OBS)—a new paradigm for an optical Internet," Journal of High Speed Networks, vol. 8, pp. 69-84 (1999). These methods, however, are sensitive to the synchronization between the processing of the packet payload and the packet header. Consequently, being relatively intolerant of errors, they have questionable reliability.
Another approach for effective use of optical networks with current technology is to reduce the processing requirements, such as switching packets at a node. Such processing relies on electronic or optical switches and processors, thus forming a natural bottleneck. A known technique for reducing processing in routing packets in a network is to assign self-routing addresses to nodes in the network. Self-routing addresses simplify routing control since the address of a node contains all the routing information necessary for other nodes to direct packets to the destination without requiring look-up tables and similar customary processing steps. Intermediate nodes forward the incoming packets to the appropriate output ports using bit-by-bit comparison of the packet headers with the address of the local node. The routing decision, implemented with simple logic gates, does not require the typical lookup tables.
However, self-routing addresses are known to be suitable only for networks with regular topology such as hypercube networks and the Shuffle Net with no more than one address for each node. In other words, implementing self-routing addresses in a network requires mapping the physical topology of the network to logical networks with regular topology. See, e.g., Tan, S. T. et al., "Embedded unidirectional incomplete hypercube for optical networks," IEEE Transactions on Communications , vol. 41, No. 9, pp. 1284-1289 (1993); and Kop, C. K. et al., "Multi-access processor interconnection using subcarrier and wavelength division multiplexing," Journal of Lightwave Technology, vol.15, No.2, pp.228-241(1997). This is typically not possible in most networks. An additional drawback of self-routing addresses is that all paths between nodes are fixed resulting in difficulties in implementing congestion control and traffic engineering along with rerouting.

Self-routing address assignment in packet-switched networks


A gaseous fuel and air mixing venturi device is adapted for installation in a gaseous fuel carburetor and has a venturi body defining annular inner and outer venturi passageways which each have a throat of reduced cross-sectional area and have inlet ends in communication with an air inlet of the carburetor. A fuel inlet is configured for connection to a fuel port of the carburetor, and communicates with a plurality of fuel supply ports in the body communicating radially with the inner and outer venturi passages to mix with the air flowing in the passageways.

The majority of gaseous fuel carburetors for internal combustion engines have an air/fuel mixing section which is comprised of a spring mass system. This has the potential to create unstable engine performance due to interaction with the upstream pressure regulator or emissions control valve. The carburetor was originally designed to run open loop with a mechanical upstream pressure regulator, and on applications that did not have strict emissions requirements. In recent years emissions requirements have become very strict, and more sophisticated upstream air/fuel ratio controls have either replaced the mechanical pressure regulator entirely or supplement its operation. These devices are typically electromechanical and respond to the commands of a computer controller using a closed loop control strategy, based on the output of an oxygen sensor, located in the exhaust stream of the engine. These new systems can respond very quickly and often create unstable interactions between the carburetor and the upstream fuel valve. This interaction is possible because the air/fuel mixing section of the carburetor is comprised of a dynamic spring mass system.
There are several existing types of gaseous fuel carburetors and the majority use a diaphragm to actuate the air fuel mixing section against the force of a spring. The smallest model eliminates the diaphragm and uses a piston as the operator. The diaphragm is typically an elastomer coated fabric and is susceptible to chemical and thermal degradation, rupture due to engine backfiring, abrasive damage, and the like. The air/fuel mixing section of the carburetor also has sliding surfaces that are prone to wear. Down time of an engine due to required maintenance in an industrial application, such as a pump on an oil pipeline, can result in the loss of thousands of dollars from lost production.
Another deficiency of known gaseous fuel carburetors is the limited ability to thoroughly mix the air and fuel together. The fuel is introduced into the center of the air stream from a single location. This can create a lean mixture at the outer edges of the flow stream and a richer mixture in the center. This makes it more difficult for the engine to completely burn all incoming fuel, which often results in higher exhaust emissions and a reduction in horsepower.
Venturi mixers have been developed for gaseous-fueled engines in order to overcome some of the problems of the existing gaseous fuel carburetors with a spring-mass system forming the air/fuel mixing section. One example is the FMV6 Mixing Venturi manufactured by Continental Controls Corporation of San Diego, Calif. Other such devices are manufactured by Woodward and Heinzmann. These mixers are not installed in the existing carburetor. Instead, they replace the carburetor entirely, which often creates substantial installation difficulties and costs. The physical envelope of these mixers is typically very different from the existing carburetor. This requires major modifications to the engine's air intake system, which could result in thousands of dollars of lost production time. Another major deficiency is that these mixers do not include a butterfly for controlling the air/fuel mixture to the engine. In some instances the existing butterfly is separable from the carburetor and can be used with custom adapters. If the butterfly is not separable from the carburetor, a new butterfly may have to be purchased. If the location of the butterfly is different from the previous installation, additional changes to the governor linkage will be required. An additional mixture screw will also be required. Conventional retrofit difficulties increase significantly when the engine uses more than one carburetor, which is often the case.
U.S. Pat. No. 7,410,152 of Continental Controls Corporation describes a gaseous fuel and air mixing venturi device for a carburetor which can be used to replace a conventional spring mass air/fuel mixing section of the carburetor to produce better mixing.

Gaseous fuel and air mixing venturi insert device for carburetor


An implant for performing interbody fusion within a human spine, inserters for such an implant, and associated methodology. The implant is preferably formed in situ from at least two separate but lockable members (a base member and a closure member). The base member may be implanted into an interbody space first, after which the end plates may be finally prepared and the base member packed with fusion promoting substances before engaging and locking the closure member. The closure member provides structural support for the adjacent vertebral bodies (along with the base member) and may be selected after implantation of the base member having a specific length, width, height, taper, etc. . . . to ensure an optimal sizing of the implant for desired restoration of disc height, coronal taper, sagittal taper, etc. . . . .

1. Field of Invention
The present invention relates to an implant for performing interbody fusion within a human spine, inserters for such an implant, and associated methodology. More specifically, the implant aspect of the present invention involves an implant formed in situ from at least two separate but lockable members (a base member and a closure member), wherein: (a) the base member may be implanted into an interbody space first, after which the end plates may be finally prepared and the base member packed with fusion promoting substances before engaging and locking the closure member; and (b) the closure member provides structural support for the adjacent vertebral bodies (along with the base member) and may be selected after implantation of the base member having a specific length, width, height, taper, etc. . . . to ensure an optimal sizing of the implant for desired restoration of disc height, coronal taper, sagittal taper, etc. . . . .
2. Discussion of the Prior Art
The human spinal column is made up of a series of vertebral bodies with intervertebral discs disposed there between, which collectively provide support and structure for the body while allowing motion and flexibility, as well as protection for the spinal cord running through the spinal column and associated nerve roots which exit the spinal column. Various traumatic events and/or degenerative conditions may result in undesirable motion or change in disc height, both of which may cause chronic pain for the affected individual. The degree and treatment of pain varies by the individual but in many instances the pain can be disabling and uncontrollable by conservative means, leaving surgery as the only viable option. In many cases, the primary surgical treatment involves interbody fusion, wherein an implant is introduced into the disc space to restore the disc height and establish a bony bridge between the adjacent vertebral bodies with the goal of eliminating or at least reducing the pain of the affected individual.
To enable the introduction of an interbody fusion implant, the surgeon must perform the following steps to create a suitable environment for post-operative fusion: (a) surgical access to the affected disc space; (b) an annulotomy to gain access into the interior of the affected disc; (c) an initial or preliminary discectomy to remove some or all of the nucleus pulposus within the affected disc; and (d) final endplate preparation to remove the cartilaginous disc material to expose the underlying bony endplates of the adjacent vertebral bodies (preferably without violating the bony endplates). Final endplate preparation is a critical step in implant placement and achieving a solid fusion. It is required to remove all the cartilaginous disc material while not violating the bony end plate. Not removing the cartilaginous end plate can result in a delayed bony growth or incomplete bony growth, while fracturing the bony end plate can result in a fracture of the vertebral body and post-operative settling of the implant with concomitant loss of disc height and/or vertebral body alignment. Repetitive insertion of instruments into the disc space during the process of final endplate preparation can result in possible injury to the neural and vascular structures surrounding the disc space if the instruments are inadvertently passed or extended outside the disc space by the surgeon.
To help facilitate fusion, the implants preferably include one or more "fusion windows," that is, apertures extending from the superior surface to the inferior surface of the implant to allow bone to form through the implant to ensure a solid and robust fusion. To further facilitate fusion, these apertures may be filled with fusion promoting materials including but not limited to cancellous autograft bone, allograft bone, demineralized bone matrix (DBM), porous synthetic bone graft substitute, bone morphogenic protein (BMP), mesenchymal stem cells and/or combinations thereof and/or functional equivalents. Such materials are traditionally introduced into the implant before the implant is introduction into the disc space. Based on the oftentimes high amount of force required to be applied to the corresponding insertion tools, such fusion promoting substances can become loosened or dislodged during the introduction of the implant, which can in certain instances increase the amount of time required to achieve fusion.
Implants can be introduced into the interbody space in one of several known approaches or directions to the spine, including posterior (from the back), anterior (from the front), and lateral (from the side). Before 2003, interbody fusion via a lateral approach was uncommon because of the inability to safely pass through the psoas muscle, which flanks either side of the lumbar spine and includes the lumbar plexus. Lateral access surgery became safe and reproducible with the advent of the NeuroVision® system by NuVasive, Inc., which automatically detects the presence of nerves in the psoas muscle via surgeon-directed neurophysiology in combination with minimally disruptive access instrumentation (e.g. dilators, retractor, etc. . . . ) to aid the surgeon in avoiding nerves while establishing an operative corridor from a lateral approach.
The present invention addresses the need for additional interbody implant options, inserters, and techniques for use in lateral access surgery.

Interbody fusion implant and related methods


In a method and a system for restarting sequentially controlled equipment installed in a production line when the equipment is out of order, operations of the equipment are divided into a plurality of operation blocks, operations of each of which are executed independently of those in any other block. Each of the operation blocks are further divided into one or a series of operation steps to be sequentially executed in a predetermined order under a normal condition. At least one home position from which the equipment can be restarted is set in each operation block. An output element which has caused failure and is now stopped is restored to the home position after a cause of failure is removed.

1. Field of the Invention
The present invention relates to a method of restarting sequentially controlled equipment installed in a production line when the equipment is out of order. The equipment is restored to the normal condition after the cause of a failure is removed. The present invention also relates to a system for effecting such a method.
2. Description of the Related Art
According to a known sequential program control, each step of the control is sequentially executed according to the program which specifies the order for operating each output element, for example an actuator, constituting the operation system of equipment. An apparatus for monitoring whether or not the sequential program control is in order is proposed in, for example, Japanese Laid-Open Patent Publication No. 60-238906. According to this disclosure, operation patterns of elements constituting a sequential control circuit which can appropriately operate the equipment are initially stored in a memory. It is sequentially checked whether or not the operation patterns of the elements in operation coincide with those stored in the memory. If both of them do not coincide with each other, it is judged that the operation system has caused a failure.
In the event of a failure of the operation system of the sequentially controlled equipment, the operation of the equipment is suspended. In order to automatically restart the equipment after a defective portion is restored to the normal condition, it is necessary to manually return all output elements constituting the operation system to respective restorable operation steps, i.e., the so-called home positions, at which the output elements are capable of restarting without interfering with one another.
However, the home positions of all the output elements are generally set only to respective operation steps corresponding to the initial condition of the equipment. Therefore, when the failure occurs in the equipment at a certain later operation step in sequential operation steps, it takes a long time to return each output element to the home position (initial condition) thereof. Thus, much time is wasted before the equipment restarts operation.

Method and system for restarting sequentially controlled equipment installed in a production line


Apparatus and a method for printer size reduction moves a carrier with print element through a carrier displacement field containing two acceleration ramp area subportions on opposite sides of a print line subportion. The acceleration ramp subportions are of different lengths. A first subportion permits acceleration of the print element to substantially all of a first lower print element speed. The second subportion permits acceleration of the print element to less than substantially all of a second higher print element speed. The overall field size is reduced, but functions effectively for uni-directional printing at the first (letter mode) speed and bi-directional printing at the second (draft mode) speed.

Field of the Invention
The present invention relates to apparatus and a method for use in printing, specifically for use in the area of printing as implemented in the computing field. More specifically, the present invention relates to apparatus and a method for increasing and decreasing the speed of a print cartridge carrier, in conjunction with the control of the print quality, along an acceleration ramp area having a more optimum design of shorter length. The present invention is particularly beneficial for use within an ink jet printer, but may be incorporated with effect in other serial print systems as well.
Background Developments
Conventional ink jet printers employ a carrier to displace ink-containing print cartridges bi-directionally across a carrier displacement field. The carrier displacement field includes a print line portion (or simply "print line") through which the print cartridges travel to disperse ink, in a controlled manner, onto paper or other suitable media. The carrier displacement field also includes a non-print portion separate from and adjacent to the print line portion. The non-print portion typically comprises two equal-length subportions of the carrier displacement field with each of the two subportions being located adjacent to but on opposite sides of the print line portion of the carrier displacement field.
The non-print subportions of the displacement field are used to uniformly provide on both sides of the print line space for the carrier to acquire (at the start of its travel) and uniformly to lose (at the end of its travel) sufficient speed in accordance with a desired level of print quality as the print cartridge is moved back and forth across the media. In view of this purpose of the non-media subportions of the carrier field, that portion of the displacement field is referred to as the "acceleration ramp area." As one of ordinary skill in the art also would know, the carrier displacement field, at least for ink jet printers, typically also includes another portion, a maintenance station area, that typically is located at the outward-most end of the carrier displacement field and adjacent the outward-most side of one of the two subportions comprising the acceleration ramp area. A maintenance station located in the maintenance station area is used to clean and prepare the cartridge for dispersing ink.
In certain conventional printing systems, the two acceleration ramp area subportions are sized uniformly and with relatively great length to allow the carrier to accelerate to obtain full print speed before reaching the print line on both sides of the print line for all of the carrier's travel through the print line, and to support such carrier travel for the print mode with the highest characteristic speed. Specifically, sufficient acceleration ramp area for the carrier to achieve full operating speed for all of its travel through the print line is provided for printer function in the lower quality mode known as "draft mode."
In draft mode, the print cartridge disperses approximately half as much ink as it would be required to do in higher quality print modes such as "letter mode." Because the print cartridge is dispersing half as much ink in draft mode, it is useful to move the carrier through the print line at about twice the speed desired in letter mode. Without changing other operational characteristics such as acceleration rate (which change requires, among other things, use of a relatively larger power supply), obtaining that higher draft mode speed requires a relatively long acceleration ramp area of the kind conventionally provided. Unfortunately, however, longer ramps undesirably increase the size, cost and print quality of printing systems.
Other known printing systems take a different approach to acceleration ramp area sizing. Such systems address the cost/size versus print quality dilemma that is described above by uniformly reducing by a predetermined amount the length of the uniformly-sized non-print subportions of the acceleration ramp area. More specifically, the length of both acceleration ramp area subportions is modestly and uniformly reduced so the carrier reaches less than full draft mode print speed (i.e., less than, for example, 33 inches per second ("i.p.s.")) at the time the carrier reaches the print line and draft mode printing begins. The reduction in acceleration ramp area is an acknowledgment of the fact that ramp sizing in the earlier-described systems was done to prevent any degradation in print quality for a mode, which has as its very purpose allowing printing at lower quality. In view of the purpose of draft mode, ramp area sizing need not be controlled by the full draft mode speed.
In conventional systems, which have the size of both subportions of the acceleration ramp area uniformly reduced, both subportions support attaining something less than full speed for draft mode upon entering the print line, but fully support, at the start of and throughout the entire print line, attaining the slower speed required for high quality letter mode printing.
Illustratively, letter mode printing can be achieved with the carrier traveling at 15 i.p.s. through the print line, having been accelerated at 384 inches/s.sup.2 (or "1.0 g") through the ramp area. An acceleration ramp area subportion of sufficient length to allow a carrier accelerating at 1.0 g to enter the print line at 15 i.p.s. may have, for example, a length of approximately 0.30 inches. On the other hand, the ramp area to support entry of the carrier into the print line at a full draft mode speed of, for example, 33 i.p.s. and accelerating at 1.0 g from rest would be approximately 1.42 inches long, which is a significantly greater length. However, using the shorter length required to support full letter mode speed still would permit the carrier, operating in draft mode, to achieve a speed significantly in excess of approximately 8.25 i.p.s. or 25% of the full draft mode speed of 33 i.p.s. upon print line entry. And any percentage of full speed in this 25% or greater range has been viewed as an acceptable speed for commencing draft mode printing.
Since conventional printing systems with uniformly shortened acceleration ramp area subportions begin draft mode printing at less than full speed, such systems typically also incorporate improved mechanisms or subsystems that enable adjustment of the dispersion of the ink from the print cartridge in accordance with actual cartridge speed (as opposed to the desired, but-not-yet-realized speed) of the accelerating print cartridge. Such apparatus and methods simply may involve the use of improved servo devices to more effectively regulate machine function during acceleration of the carrier on both ends of the displacement field.
While the above-described approach to acceleration ramp area sizing makes possible an advantageous reduction in the size and, thus, in the cost of printing systems without too great a loss in print quality, it should be recognized that the foregoing conventional shortened-ramp approach rigidly treats both ramp area subportions uniformly, without consideration of any differences in function of the two subportions. Specifically, the conventional approach ignores differences in how the two subportions typically are used to implement draft mode printing and letter mode (or other high quality mode) printing. Accordingly, any further size reductions that would have been made possible by considering such differences have not heretofore been considered or implemented.
The present invention relies upon such differences. Specifically, the fact that printing in quality modes, e.g., letter mode involves only un-idirectional acceleration of the carrier and uni-directional printing in the print line, while draft mode acceleration and printing operates bi-directionally, has been relied upon to reduce the total acceleration ramp area for a printing system even further, and, by so doing, further reduce overall system size and cost.

Asymmetrical acceleration ramp area and method for print cartridge carrier of ink jet printer


A translinear f.sub.T multiplier has a pair of differential transistor amplifiers, each pair having commonly coupled emitters, with the base of one transistor of one pair being coupled to the base of one transistor of the other pair and the collectors of the pair being cross-coupled. A diode network provides three parallel diode paths from a reference voltage, two paths being coupled to receive an input signal and to the bases of the other transistors of each pair and the third path being coupled to a constant current source and to the bases of the first transistors of each pair. The resulting circuit configuration accommodates varying transition times.

The present invention relates to transistor amplifiers, and more particularly to a translinear f.sub.T multiplier transistor amplifier that allows for variable transition times.
Prior basic multiplier configurations include the Gilbert Multiplier, described with respect to FIG. 9 in U.S. Pat. No. 3,931,583 issued Jan. 6, 1976 to Barrie Gilbert entitled "Wideband Differential Amplifier", which is a four-quadrant multiplier, and the f.sub.T doubler, described in U.S. Pat. No. 3,633,120 issued Jan. 4, 1972 to Carl R. Battjes entitled "Amplifier Circuit", which alternatively doubles the f.sub.T characteristic or the gain of a common emitter-connected transistor amplifier. One limitation of these f.sub.T multiplier configurations in regard to thier use in pin driver output stages, where the amplifier is fully switched from one end of its range to the other, is that they do not allow for variable transition times since the amplifiers are very nonlinear at the extremes of their operating range.
What is desired is an f.sub.T multiplier transistor amplifier configuration that is reasonably linear so it can accommodate virtually any transition time required, from a minimum time to as long as needed.


A glove box assembly for a vehicle is provided and includes a storage bin, a dedicated climate controlled bin, and an air flow manifold. The air flow manifold is arranged to receive cooled air from a vehicle heating ventilation and air conditioning unit and direct the flow of cooled air into the climate controlled bin for cooling the climate controlled bin independent of the storage bin. The air flow manifold is further arranged to draw cooled air from the heating ventilation and air conditioning unit upstream of a blend door when air conditioning is operating so as to provide cooled air to the climate controlled bin independent of a vehicle cabin temperature setting.

Motor vehicles today are used for many purposes including commuting and trips of long duration. During such trips, for example, vehicle occupants often bring food and chilled beverages for consumption and such beverages are typically placed in various cup holders provided in today's vehicles. One disadvantage of the typical cup holders is that the chilled beverages often warm up to ambient vehicle temperature before or during their consumption. To counteract this disadvantage, a cooler is sometimes used by vehicle occupants to keep their beverages cool before consumption. However, using such a cooler in a vehicle requires, among other things, effort to pack and place the cooler in the vehicle as well as using vehicle interior space that could be used by an occupant or other cargo.
Thus, there is a need for a cooled instrument panel compartment that overcomes the aforementioned and other disadvantages.

Vehicle cooled instrument panel compartment


An image display system is provided with a difference calculator for calculating, when interlacing video signals are entered, differences between fields from the input interlacing video signals and non-interlacing video signals, into which the interlacing signals are converted when they are read out of a frame buffer, and a brightness controller for controlling the brightness of video signals in the after image field on the basis of the differences calculated by the difference calculator.

The present invention relates to an image display system for displaying interlaced images (of television and laser disc signals) on non-interlace display apparatuses, such as those used in personal computers (PC).
According to the prior art, video signals from television or laser discs are sometimes inputted to a PC and displayed on its screen, and these input signals constitute what are called interlaced images in which even-number fields and odd-number fields are alternated every 1/60 second. These signals comprising even-number and odd-number fields are together referred to as frames. An example of such display apparatus according to the prior art is disclosed in the U.S. Pat. No. 5,068,648.
When interlacing signals are to be used for displaying non-interlaced images on a PC screen, conversion from inter lace to non-interlace is required.
According to the prior art, interlacing signals from the input source are once stored in a memory known as a frame buffer, end when they are read out of the frame buffer, they are converted into non-interlacing signals to display non-interlaced images on the PC screen.
FIG. 6 illustrates conventional methods of interlace-to-non-interlace conversion: (a) shows a single buffer system, (b), a double buffer plus frame display system, and (c), another double buffer plus frame display system.
In the single buffer system shown in FIG. 6(a), the same buffer is used as read buffer for display indication and as write buffer for the input source.
In the double buffer plus frame display system shown in FIG. 6(b) (hereinafter called Double Buffer System 1), the read buffer for display indication and the write buffer for the input source arm separate, and the fields are displayed at a rate of 30 frames per second (fps).
In the double buffer plus frame display system shown in FIG. 6(b) (hereinafter called Double Buffer System 2), the read buffer for display indication and the write buffer for the input source are separate, and each even- or odd-number field is displayed at a rate of 60 fps. In display indication, each field is extended vertically, and interpolation lines are inserted into the spaces between fields.
The methods described above involve the following problems.
(1) Single Buffer System
An both fields of input interlaced images are displayed as single images, resolution in the vertical direction is high, resulting in clear displaying of still or slow-moving images, but fast-moving images are subject to motion artifacts on the contours of moving objects corresponding to time differences between fields (1/60 second), resulting in blurred contours.
As the speed of writing from the input source is constant in this systems while computers or the like use faster display apparatuses, reading from the frame buffer may over-take writing from the image input source to the frame buffer and, if it does, an image under updating is displayed.
(2) Double Buffer System 1
Since an update buffer and a display buffer are separately provided, there is no possibility for an image under updating to be displayed. However, as the even-number and odd-number fields of each input interlaced image are displayed as a single frame, fast-moving images are subject to motion artifacts on the contours of moving objects corresponding to time differences between fields, resulting in blurred contours.
(3) Double Buffer System 2
Since each even-number or odd-number field of the input interlaced image is displayed as a single frame, even fast-moving images are immune from motion artifacts due to differences in motion corresponding to time differences between fields, but the height of the frame is doubled when displayed and interpolating lines are inserted between the original lines, resulting in poor resolution in the vertical direction and consequent deterioration in picture quality.
Moreover, as most such methods do not take into consideration the correlation between one field and the next in inserting an interpolating line as mentioned above, the displayed image, especially where a striped pattern is involved, may turn out completely different from the original image.
The present invention, worked out in view of the above-described problems involved in the prior art, is intended to provide an image display system subject to no conspicuous motion artifact ensuing from differences in motion corresponding to time differences between fields.


In a bias voltage generating circuit for outputting through switching over a plurality of bias voltages and standby voltages provided for the respective bias voltages, a voltage return unit is provided for each bias voltage, and charges stored in the voltage return unit are supplied before power ON starts so that the bias voltage is approximated to a predetermined voltage. A drive controller drives the voltage return unit and a standby voltage generator, and a period of driving control is arbitrarily set by a register.

1. Field of the Invention
The present invention relates to a bias voltage generating circuit for generating a bias voltage of a drive circuit for activating a liquid crystal panel or the like, more specifically to a bias voltage generating circuit capable of turning off in a power-saving state and returning from the power-saving state to an operation state at a high speed.
2. Description of the Related Art
In recent years, a liquid crystal panel has been applied to various devices in a broader range including large-size devices and small-size devices such as a mobile telephone, there has been an increasing demand for reduction of power consumption in response to circumstances. An effective method in order to reduce the power consumption is that a liquid crystal drive circuit leaves an output circuit in a halting state during a blanking period, which is a non-display period, so that a steady-state current is zeroed (hereinafter, referred to as power saving processing). Another preferable method for reducing the power consumption is to increase in frequency of the power saving processing. In order to increase in frequency of the power saving processing, it is important to speed up a returning process from a power-saving state to an operation state.
Below, a bias voltage generating circuit and a drive output circuit are described according to a conventional technology, an example of which is recited in U.S. Pat. No. 6,930,543, referring to FIG. 1. FIG. 1 is a circuit diagram illustrating a bias voltage generating circuit of an operational amplifier for driving the liquid crystal and a drive output circuit whose output number is n according to the conventional technology. The description is given below based on an example in which the drive output number is n.
A reference numeral 100 shown in FIG. 1 denotes a bias voltage generating circuit. The bias voltage generating circuit 100 comprises a reference voltage generator 20 and a standby voltage generator 30. The reference voltage generator 20 comprises P-channel MOS transistors MP1, MP2 and MP3, N-channel MOS transistors MN1 and MN2, and a resistance R1. The standby voltage generator 30 comprises a switch SW1 connected between a ground voltage and a bias voltage Vbiasn. The bias voltage generating circuit 100 thus constituted has a function of outputting the bias voltage Vbiasn of NMOS transistors for a constant current source in operational amplifiers A1(1)-A1(n) for driving the liquid crystal. In the drawing, C1n(1)-C1n(n) denotes a wiring capacitance respectively.
An operation of returning the bias voltage generating circuit 100 from a power-off state is described referring to a timing chart shown in FIG. 2. A power save signal PS is set to a non-active state "high" in a T1 period where a main power is in ON state. Therefore, the P-channel MOS transistor MP3 of the reference voltage generator 20 is turned off, while the N-channel MOS transistor MN1 thereof is turned on.
At the time, the P-channel MOS transistor MP1, resistance R1 and N-channel MOS transistor MN1 of the reference voltage generator 20 generate a reference current Iref1. A current mirror circuit comprising the P-channel MOS transistors MP1 and MP2 generates a reference current Iref2. The N-channel MOS transistor MN2 diode-connected to the P-channel MOS transistor MP2 generates the bias voltage Vbiasn based on the reference current Iref2. The bias voltage Vbiasn is supplied to input capacitances of the operational amplifiers A1(1)-A1(n) for driving the liquid crystal and wiring capacitances C1n(1)-C1n(n). The T1 period is a period when output control switches SW10(1)-SW10(n) of outputs Vout(1)-Vout(n) of the operational amplifiers for driving the liquid crystal are set to ON.
The output control switches SW10(1)-SW10(n) are turned off in a T2 period where a first sub power is in ON state, while any other control operation is the same as that of the T1 period. When the output control switches SW10(1)-SW10(n) are turned off and simultaneously the power save signal is set to an active state "Low", the output voltages of the operational amplifiers A1(1)-A1(n) for driving the liquid crystal are thereby influenced. Therefore, the T2 period (first sub power ON state) is provided as an overlapping period (non-active state "high").
In a T3 period that is a power OFF state, as the power save signal PS is set to the active state "Low", the P-channel MOS transistor MP3 of the reference voltage generator 20 is turned on, while the N-channel MOS transistor MN1 is turned off. In other words, the reference current Iref1 is "0" so as to be the power OFF state. At the time, as the switch SW1 for controlling the standby voltage output is set to ON, the bias voltage Vbiasn is thereby "low".
In a T4 period that is a second sub power ON state, the switch SW1 for controlling the standby voltage output is turned off, and the output control switches SW10(1)-SW10(n) are also set to OFF. During the period, the bias voltage Vbiasn returns to a predetermined voltage, and the restoring operation is then completed.
In a T5 period that is the main power ON state, the switch SW1 for controlling the standby voltage output is turned off, while the output control switches SW10(1)-SW10(n) are turned on. Thereby, the operational amplifiers A1(1)-A1(n) for driving the liquid crystal output the Vout(1)-Vout(n) at a predetermined voltage level.
In the conventional bias voltage generating circuit, the small reference current Iref2 generated by the P-channel MOS transistor MP2 and the N-channel MOS transistor MN3 is used to charge the input capacitances of the operational amplifiers A1(1)-A1(n) for driving the liquid crystal and the wiring capacitances C1n(1)-C1n(n), so that the bias voltage returns to the predetermined voltage.
In recent years, the number of the operational amplifiers A1(1)-A1(n) for driving the liquid crystal is increased based on a large-screen and a higher image quality of the liquid crystal panel. More specifically, the input capacitances of the operational amplifiers A1(1)-A1(n) for driving the liquid crystal and n of the wiring capacitances C1n(1)-C1n(n) are increased, which makes it necessary to supply a large capacitance value with a small current. As a result, it becomes impossible for the bias voltage to return within a predetermined time frame.
Though it is possible to make bias voltage return within the predetermined time frame by increasing the reference current Iref2 of the bias voltage generating circuit, however, it results in the large increase of the power consumption.

Matsushita Electric Industrial Co., Ltd.


The cascaded, multi-level inverter can be found in a variety of applications and in a variety of industries. The inverter is typically used as a motor drive to provide variable voltage and variable frequency to a propulsion motor or other loads requiring variable frequency and voltage. In the present invention, the transformer is eliminated and its function included in an existing generator by adding a plurality of secondary windings to supply the isolated voltages needed by the multi-level power converter. Two specific examples of the present invention include a cascaded, multi-level inverter, or a variant referred to as the multi-source, flying source inverter, whose ac input voltage is derived from an electromagnetic generatorator.

1. Field of the Invention
The present invention relates generally to power converters, and, more specifically, the present invention relates to transformerless, multi-level power converter utilizing existing generators in ship-board propulsion applications.
2. Description of the Background
The cascaded, multi-level inverter can be adapted to a variety of different applications covering a wide range of industries. This voltage source topology is advantageous compared to other topologies because of its straightforward implementation and flexibility. The cascaded, multi-level inverter can be tailored to match available input voltage levels while providing a flexible arrangement in order to obtain a required output voltage level with known harmonic distortion characteristics.
The traditional implementation of a cascaded, multi-level inverter requires the use of a dc voltage source that can be either a single source with multiple series-connected voltage levels that share a common ground connection, or multiple, isolated dc power sources. These dc voltages are typically derived from isolated transformer secondary windings connected to rectifier circuits. The size and weight of the transformer are affected by the number of isolated windings and the required power level. The number of isolated secondary windings can be significant when applied to a multi-phase, multi-level power converter. The use of these transformers is less than ideal as they add complexity and cost to the voltage source topology.
As such, there is a need in the art to provide improved cascaded, multi-level topologies that address one or more of the above-described and other limitations to prior art systems. The present invention specifically addresses a system configuration consisting of a cascaded, multi-level inverter, or a variant referred to as the multi-source, flying source inverter, whose ac input voltage is derived from an electromagnetic generator.

Transformerless multi-level power converter


The system comprises a master module and slave modules able to be chain-connected and/or star-connected by means of a digital communication network, for example of the Ethernet type. The system is synchronized on the master module clock that supplies synchronization information to all the data frames it sends over the network. Each slave module reconstitutes the clock from the frames it receives. The data frames comprise data packets that can in particular be command data, audio data or video data. Each packet comprises a header describing the content of the packet. Each slave module knows at which location of a packet the data intended for it is located and at which location of a packet it can insert data.

The invention relates to a system comprising a digital communication network for data transmission, comprising audio type data, between a master module and a plurality of slave modules, each module comprising at least one network terminal to connect the communication network to the module, at least one network terminal of a slave module being connected to a network terminal of another module by means of the communication network.

Audio data transmission system between a master module and slave modules by means of a digital communication network


A method for treating a consumer article wherein a treating chemistry is activated or deactivated by the introduction of steam.

Conventional automatic cleaning appliances, such as washing machines, dishwashers, and dryers, for example, typically operate on a consumer article using one or more cycles of operation. The cleaning appliances may often treat the consumer article using a resource such as a treating chemistry. Typically, the cleaning appliance will dispense the treating chemistry into a sump or other mixing area of the appliance, where the chemistry is mixed with water and then applied onto the consumer article.

Steam activation or deactivation of chemistry in an appliance


An electronic device is provided. The electronic device includes a housing, a touchscreen display exposed through a first portion of the housing, a microphone disposed at a second portion of the housing, a speaker disposed at a third portion of the housing, a memory disposed inside the housing, a processor disposed inside the housing, and electrically connected to the display, the microphone, the speaker, and the memory. The memory is configured to store a plurality of application programs, each of which includes a graphic user interface (GUI).

In addition to an input scheme using a keyboard or a mouse, an electronic device has recently supported various input schemes such as a voice input and the like according to the related art. For example, the electronic device such as a smartphone or a tablet personal computer (PC) may recognize a voice input of a user in a state where a voice recognition service is executed and may execute an action corresponding to the voice input or may provide the result found depending on the voice input.
Nowadays, the voice recognition service is being developed based on a technology processing a natural language. The technology processing the natural language refers to a technology that grasps the intent of a user's utterance and provides the user with the result suitable for the intent.
The above information is presented as background information only to assist with an understanding of the present disclosure. No determination has been made, and no assertion is made, as to whether any of the above might be applicable as prior art with regard to the present disclosure.

Electronic device for processing multi-modal input, method for processing multi-modal input and server for processing multi-modal input


An ATM-port module for an ATM-node having an Ethernet switch includes an ATM-controller; and an Ethernet-switch interface connecting it to the Ethernet switch. The switch has an Ethernet encapsulating-unit for encapsulating ATM cells processes by the ATM-controller into packets for transmission to the switch, and an Ethernet decapsulating-unit for extracting ATM cells from packets received from the switch. The module further includes a segmentation-and-reassembly unit; and a buffering-and-scheduling unit. The buffering-and-scheduling unit provides a processed enlarged-ATM-cell to the encapsulating-unit when an indication flag indicates that an ATM port is a destination port of the enlarged ATM-cell; and a processed enlarged-ATM-cell to the segmentation-and-reassembly unit when an indication flag indicates that an Ethernet port is the enlarged ATM-cell's destination port.

ATM (Asynchronous Transfer Mode) is a packet switched and more specifically, cell switched broadband network technology. ATM forms the core of a broadband ISDN architecture that extends the digital transmission capabilities defined by ISDN for low rate voice, to voice and multimedia transmissions on the same lines.
ATM is a real time architecture that can provide very high bandwidth. Implementations currently operate at the speeds ranging from a special slow speed versions of 128 kbps up to 622.08 Mbps. Speeds as high as 2.488 Gbps will eventually be supported.
Because of the very high bandwidth, the ability to transmit multiple media data ATM can serve as an high speed architecture for both local area networks (LAN) and wide area networks (WAN).
ATM and AAL are associated with layer 2 of the OSI reference model.
The ATM layer is the service independent layer at which outgoing ATM cell headers and trailers are created, virtual channels and signal paths are defined and given unique identifiers, and cells are multiplexed or demultiplexed. The ATM layer creates the cells, then uses a physical layer to transmit them. Headers in received ATM cells are verified at this layer. Headers and trailers are also removed from incoming cells, the ATM layer is also responsible for traffic management.
The topmost layer is the AAL-layer (ATM Adaptation layer). The AAL-layer is service-dependent. It provides the necessary protocol translation between ATM and other communication services such as voice, video or data communication services involved in a transmission.
The AAL-layer has two sub-layers, i.e. the conversion sub-layer and the SAR-sub-layer. The conversion sub-layer provides the interface for the various services. The SAR-sub-layer (SAR: Segmentation and Re-assembly) is the sub-layer that packages variable size packages into fixed size cells at the transmitting end and re-packages the cells at the receiving end. The SAR-sub-layer is also responsible for finding and dealing with cells that are out of order or lost.
FIG. 1 shows an ATM node according to the state-of-the-art. The ATM node comprises several ATM-Port-Modules each comprising an ATM-controller unit. The ATM-controllers are linked via interfaces to an ATM switch device. Each ATM-Port-Module supports at least one physical transmission line (PHY). For XDSL up to 128 PHYs can be connected to the ATM-Port-Module. The ATM node can include cross connect without switching as well as true switching with signaling.
The number of ATM-Port-Modules within the ATM node is at least two. In a typical ATM node, several ATM-Port-Modules are provided. For instance, in a hub-system, up to 8 ATM-Port-Modules, in back-plane systems, up to 32 ATM-Port-Modules, and in large rack-based systems up to 256 ATM-Port-Modules are provided.
With the ATM-node according to the state-of-the-art as shown in FIG. 1, several problems arise. The production volume of the component for the ATM switch that forms the core module of the ATM node is much smaller than the production volume of the components for the ATM-Port-Modules by at least a factor of 10. A further significant problem is that there is no technical standard existent for the interconnection between the core module, i.e. and the ATM switch and the ATM-Port-Modules. In particular the ATM node according to the state-of-the-art as shown in FIG. 1 cannot be connected to an Ethernet network.
To overcome the production volume problem, an ATM node as shown in FIG. 2 has been developed by Transwitch (www.transwitch.com). This ATM node according to the state-of-the-art, as shown in FIG. 2, connects the ATM-Port-Modules of the ATM node via a passive cell bus. This proprietary back-plane bus or cell bus replaces the ATM switch within the ATM node. A disadvantage of the ATM node shown in FIG. 2 is that the cell bus limits the data throughput. The data throughput is limited by the cell bus of Transwitch to the maximum of about 1 Gbps. A further drawback is that the ATM node fails if one transmission line of the parallel cell bus is disconnected. A further major disadvantage is that the back-plane cell bus is also proprietary and not compatible to standard Ethernet systems.
FIG. 3 shows an ATM controller within an ATM-Port-Module according to the state-of-the-art. The ATM-controller performs the standard ATM-layer functions such as header detection and header translation. An ATM-OAM-processor performs OAM-functions (OAM: operation and maintenance) and traffic management functions in both directions. The ATM-header detector recognizes valid ATM-cell headers, i.e. by using predefined VPI/VCI-values (VPI: virtual path identifier; VCI: virtual channel identifier). Only a small subset of the large number of possible VPI/VCI-combinations are valid in a typical ATM-Port-Module. An ATM-header translation is performed before the ATM-cell leaves the ATM-controller. OAM-functions performed by the ATM-OAM-processors are i.e. loop back, performance monitoring and alarming. The OAM-functions are defined in the ITU-standard I. 610.
Traffic management functions are buffering of data streams and optionally policing, scheduling and traffic shaping. The traffic management functions of the ATM-controller are performed by buffering and scheduling devices. Policing is used to control the incoming cell streams. During the scheduling, an ensemble of connections with individual traffic parameters, either per connection or per group of connections, are selected and given opportunity to emit cells. Traffic-parameters are e.g. priority, minimum throughput, maximum burst size, cell loss rate. The traffic-parameters are assigned according to the information transported, e.g. real time voice, video data or non-real time data. Cell streams with the same destination are combined by the schedulers. In the signal path direction towards the ATM switch one scheduling device is assigned for each ATM-Port-Module, and in the opposite signal path direction at least one scheduler is assigned for each ATM-physical transmission line.
The ATM-OAM-processor and the buffering and scheduling devices are connected to a connection context memory within the ATM-controller. FIG. 4 shows a connection context memory according to the state-of-the-art. The ATM-header detector detects the header of an incoming ATM-cell and addresses an entry in a header lookup table. In the header lookup table, the outgoing header, port address P, OAM-parameter and a queue number Q are stored. The queue number Q serves as a pointer to a memory entry in the queue lookup table in which queue parameters are stored. The ATM switch receives enlarged ATM-cells with a prepended port address P that specifies the output port of the ATM-node.
FIG. 5a shows the data format of an ATM-cell having an ATM-header comprising 5 bytes and an ATM-payload comprising 48 bytes. FIG. 5b shows the data structure of an enlarged ATM-cell comprising a prepended port address P that indicates the destination port address in the node.
FIG. 5c shows the content of an ATM-cell according to the state-of-the-art. The ATM-cell consists of a 5 octet header in a 48 octet data or payload, section. Most of the bits in the ATM-header are used for virtual path and channel identification. The CLP (CLP: cell loss priority) bit indicates whether the cell can be discarded if the network traffic volume makes this advisable.
FIG. 5d shows the data structure of an Ethernet packet according to IEEE 802.3. The IEEE 802.3 standard is currently the most widely used architecture for local area networks (LAN). The frame sizes of the Ethernet packet shown in FIG. 5d varies between 64 and 1,518 data bytes. The Ethernet standard supports a wide range of transceiver types for communication over a given type of cabling. The most popular transceiver types are 10BASE5 (thick coax), 10BASE-T (two pair category 3,4,5 UTP [=unshielded twisted pair]), 100BASE-TX(two pair category 5 UTP), 100BASE-FX (dual multimode fiber), 1000BASE-T (four pairs category 5 UTP), 1000BASE-X (two optical fibers). The Ethernet frame comprises a preamble (7 bytes), a Start Frame Delimiter (SFD, 1 byte), the addresses of the frame's source and destination (each 6 bytes), a length or type field to indicate the length or protocol type of the following data field, a data field including padding if required (46-1500 bytes) and a Frame Check Sequence (FCS, 4 bytes) containing a cyclic redundant check (CRC) value to detect errors in the frame. Interpreting the type/length field as length or type distinguishes the two main types of Ethernet packets, i.e. Ethernet 2 and 802.3 based packets.
The payload of the Ethernet packet comprises 46-1,500 bytes of payload data. The payload data components must be at least 46 bytes and may include padding bytes.
As outlined above the ATM-nodes according to the state-of-the-art, as shown in FIGS. 1 and 2, are not compatible with Ethernet.

ATM-port with integrated ethernet switch interface


According to an embodiment, a magnetic head for perpendicular recording, includes a slider including a facing surface opposed to a recording medium, and a head portion on the slider and configured to perform information processing for the recording medium. The head portion includes a main pole configured to apply a perpendicular recording magnetic field to the recording medium, a recording coil configured to excite the main pole, a write shield pole opposing the main pole across a write gap, side shields arranged individually on opposite sides of the main pole in a track width direction and magnetically isolated from the main pole, and low-flux-density layers formed of a material having a saturation magnetic flux density lower than that of the main pole, located between the main pole and the side shields, and configured to regulate magnetic fluxes flowing from the main pole to the side shields.

1. Field
One embodiment of the invention relates to a magnetic head for perpendicular magnetic recording used in a disk drive and a disk drive provided with the magnetic head.
2. Description of the Related Art
A disk drive, e.g., a magnetic disk drive, comprises a magnetic disk, spindle motor, magnetic head, and carriage assembly. The magnetic disk is disposed in a case. The spindle motor supports and rotates the disk. The magnetic head writes and reads information to and from the disk. The carriage assembly supports the head for movement relative to the disk. The head comprises a slider attached to a suspension of the carriage assembly and a head portion on the slider. The head portion is constructed including a recording head for writing and a reproducing head for reading.
In recent years, magnetic heads for perpendicular magnetic recording have been proposed to provide magnetic disk drives of higher recording densities, larger capacities, or smaller sizes. In these magnetic heads, a recording head comprises a main pole, write shield pole, and coil. The main pole produces a perpendicular magnetic field. The write shield pole is located on the trailing side of the main pole with a write gap therebetween and serves to close a magnetic path between itself and a magnetic disk. The coil serves to pass a magnetic flux through the main pole. Side shields are arranged individually on the opposite sides of the main pole in a track width direction. The side shields are magnetically coupled to the write shield pole. A part of an end portion of the main pole is located between the side shields (e.g., Jpn. Pat. Appln. KOKAI Publications Nos. 2007-294059 and 2006-252620).
A recording magnetic field is applied to the magnetic disk from just below the main pole, whereupon a recording pattern is perpendicularly recorded on a recording layer of the disk along a track of a width substantially equal to the write gap width.
In the perpendicular magnetic recording heads furnished with the side shields described above, application of magnetic fields to adjacent tracks can be suppressed. On the other hand, however, the strength of the magnetic field from the main pole that records on-track signals is reduced. Possibly, therefore, a structure may be proposed to secure the magnetic field strength by enlarging a constricted portion at the distal end of the main pole. If such a bulky main pole is combined with the side shields, magnetic fluxes that flow directly from the main pole to the side shields increase. If the magnetic fluxes leak from just below the side shields, information on the adjacent tracks may be erased or degraded. Thus, it is difficult to further improve the recording density.

Magnetic head and disk drive provided with the same


A fixing station of an electrophotographic printing or copying apparatus includes a fixing roller (11) heated via a radiator module (30) and a pressure roller swingable up to and away from the fixing roller (11) via a cam mechanism (8, 7). In order that the fixing roller and pressure roller can be exchanged in the hot state, the fixing roller (11) is mounted in bearing flanges (14, 16), one bearing flange (16) being fastened fixedly and the other bearing flange (14) releasably in the machine. The releasable bearing flange (14) has holding elements (26) for the fixing roller, as well as a handle, by which the bearing flange (14), together with the fixing roller (11) suspended on it, can be removed from the fixing station. The pressure roller (9) is mounted releasably between two rockers (8) via a releasable receiving bolt (57). A cooling sheer (40, 51) is arranged in the machine for receiving the heated fixing roller (11) and the radiator module (30 ).

It is customary, in electrophotographic printers or copiers, to fix the recording medium, coated with toner, in a thermal fixing station. Thermal fixing stations of this type generally contain electrically heated fixing rollers having associated swing-to and swing-away pressure rollers. For the fixing, the recording medium is guided through between the fixing rollers and pressure rollers. The toner on the recording medium is fixed by the action of heat from the fixing roller. Since the toner has to be brought to melting temperature in the course of the short zone of contact of the recording medium with the fixing roller, a high heating capacity is necessary for the fixing roller. It is conventional, for this purpose, to install halogen radiators of high heating capacity in the hollow fixing roller.
But the disadvantage of halogen radiators is that their burning time is relatively short and that it is therefore necessary to exchange them quite frequently.
U.S. Pat. No. 4,493,982 makes known a device for extracting radiant heaters from the fixing station of a copier, which makes it possible to extract the radiant heater even in the hot state. The fixing roller remains in the housing of the machine.
European reference 0,184,202 (corresponding to U.S. Pat. No. 4,736,226) describes a fixing device having a fixing roller which is mounted on heating bars as bearing elements. To exchange the fixing roller, the heating bars are drawn out of the machine housing. An exchange of the fixing roller in the hot state is possible only with difficulty and only by a maintenance technician.
It has hitherto been customary, in the event of damage, for the exchange of the defective radiant heater and the defective fixing roller to be carried out by a trained maintenance technician, with the machine cold. This leads to a long machine shutdown and high expenditure for the repair of the machine. A particular disadvantage has been that, before the actual exchange, it has been necessary to wait until both the fixing roller and the halogen radiator to be exchanged have cooled. In view of the high thermal capacity of the fixing roller, this can take a relatively long time.
Moreover, to exchange the radiant heaters, it has been necessary to dismount the entire heating roller, thus additionally complicating the exchange.
Since the recording medium is moved between the fixing roller and pressure roller by means of friction, the pressure roller is subjected to relatively high wear. To exchange the pressure roller, it has hitherto been conventional to dismantle the entire fixing station. This involves a high outlay and leads to lengthy undesirable idle times of the printing apparatus.

Fixing station for an electrophotographic printing or copying apparatus

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