In an information signal editing device, when a user specifies a desired reproduction section or reproduction start position, a management information file recorded in a memory is rewritten into a second management information file which is created on the basis of the specified information, and a second information file is set on the basis of the second management information file. The information signal editing device constructed as described performs arbitrary virtual editing when a DVD-RAM disk is non-rewritable, whereby the user can obtain a desired reproduction signal.

In recent years, signals of consumer reproduction video data tend to be subjected to digitalization, and the digitalized signals are recorded in various types of media. There is a DVD format that is standardized and is prevalent worldwide as a common format. This DVD standard includes a "DVD video recording standard", as a standard for recording, that enables to record and reproduce video/audio data on/from rewritable media. While a detailed description thereof, which is given in the written standards, is omitted, the outline of the construction thereof will be given with reference to FIG. 16.
FIG. 16 is a diagram illustrating the construction of a conventional digital video recording/reproduction device.
In FIG. 16, numeral 1 denotes a DVD-RAM disk as a rewritable medium, numeral 2 denotes an MPEG stream recorded on the DVD-RAM disk 1, and numeral 3 denotes a first management information file for collectively managing constituent elements of the MPEG stream 2 and MPEG information (including resolution information for the MPEG stream 2, MPEG stream information indicating the size of each GOP or the like, information of a reproduction start position, information specifying a reproduction section and the like).
Numeral 4 denotes a reading means for accurately detecting and reading an information signal (actual file data) from the DVD-RAM 1 via an optical pickup or the like. Numeral 5 denotes an MPEG decoder which receives the MPEG stream 2 outputted from the reading means 4, decompresses data from the MPEG stream 2, and demodulates and reproduces video data and audio data. Numeral 6 denotes a reading control means for controlling the reading means 4 on the basis of the result obtained by a management information analysis means 7, that is, control information indicating a specified range or the like. Numeral 7 denotes the management information analysis means which obtains part or all of the first management information file 3 for video recording, which is recorded on the DVD-RAM disk 1, from the signal outputted from the reading means 4, and analyzes the obtained data. Numeral 8 denotes a video signal output terminal for outputting reproduced video data. Numeral 9 denotes an audio signal output terminal for outputting reproduced audio data.
In the case of a rewritable information medium such as the DVD-RAM disk 1, there are generally provided recording functions as described below.
Numeral 20 denotes a rewriting means for rewriting the DVD-RAM disk 1 by writing or erasing information relating to the first management information file 3 in/from the disk 1. Numeral 22 denotes a video signal input terminal for receiving a video signal. Numeral 23 denotes an audio signal input terminal for receiving an audio signal. Numeral 21 denotes an MPEG encoder which compresses the video signal inputted from the video signal input terminal 22 and the audio signal inputted from the audio signal input terminal 23, to create an MPEG stream based on the video recording standard. Further, numeral 26 denotes a reproduction section specifying means, through which a user specifies a desired reproduction section. Numeral 27 denotes a reproduction start position specifying means, through which a user specifies a desired reproduction start position. Numeral 25 denotes a management information rewriting specifying means for specifying information of an item of the first information management file 3 recorded on the DVD-RAM disk 1, that is to be rerwritten, or an item to be added, on the basis of the information specified by the reproduction section specifying means 26 or the reproduction start position specifying means 27. Numeral 24 denotes a rewriting control means for controlling the rewriting means 20 so that it rewrites data recorded on the DVD-RAM disk 1 when the data are rewritten into the information specified by the management information rewriting specifying means 25, the information is newly recorded in the MPEG stream 2, or the information is erased from the MPEG stream 2.
An operation of the information signal editing device constructed as described above will be described.
An information signal based on the video recording standard is recorded on the DVD-RAM disk 1. The information signal includes stream data which is constituted by digitalized video signal and audio signal, and the first management information file 3 for managing the stream data. The specification of the stream data is prescribed according to the standard thereof, and the stream data is compressed and decoded on the basis of, for example, an MPEG2. The audio signal is an MPEG audio or a compressed audio based on an AC-3 or the like, and this signal is recorded as a system stream by a dedicated constitution method. (Hereinafter, a description will be given taking the MPEG stream 2 as an example.) The first management information file 3 is recorded on the DVD-RAM disk 1 on which the MPEG stream 2 is recorded, as a single file, with an extension ".ifo", and is located in a folder in which the MPEG stream 2 is located.
As described above, the first management information file 3 includes the information relating to the constitution of the recorded MPEG stream 2 (such as the information of the size of a GOP as a compression unit, information of an entire volume, information of an amount of a piece of recorded data, the resolution information for the video signal). Further, in the video recording standard, a function of reproducing data on the basis of the result of simple editing of the management information is supported, and the result of the simple editing is also recorded in the management information file.
The simple editing function here is to add information of a specified part to the management information by user's specification of the desired reproduction section, reproduction start position or the like, from the information signal constituted by the MPEG stream and the management information, which is recorded on the DVD-RAM disk or the like. Since there is no need to modify the MPEG stream itself, the operation of the simple editing can be completed in a short time. Therefore, since random accessing, which is a characteristic of a plate-shaped recording medium such as the DVD-RAM 1, is performed quickly, the data which is subjected to the simple editing as described above can be reproduced smoothly regardless of the fact that data on the DVD-RAM disk 1 such as the MPEG stream 2 is not modified.
FIG. 16 illustrates the case of reproduction start position information to show a typical example of the simple editing function. The reproduction start position information is information of a scene specified by a user. The reproduction start position information is usually constituted by reproduction position information of the MPEG stream and, in addition, there are cases where the reproduction start position information is related to a physical or logical position on the DVD-RAM disk 1 to make it possible to smoothly specify a reproduction position, or is constituted by time axis information of video/audio stream data or quantity information of constituent elements.
The information signal recorded on the basis of the video recording standard as described above is outputted from the reading means 4 in the form processible by the MPEG decoder 5 or the like. Generally, the reading means 4 has a DVD-RAM reproduction means or a means for controlling an information medium reproduction means of a personal computer or the like which is incorporated with the DVD-RAM reproduction means, and has a controlling function to accurately read data by a dedicated application, microcomputer or the like, and a processing function such as a file system, whereby the information signal is outputted as reproduction data.
In the signal outputted from the reading means 4, information read by the MPEG decoder 5 is decompressed or the like, whereby data are decomposed. Then, video data is decompressed into original non-compressed video data from the MPEG stream 2, and audio data, when it is compressed, is decompressed into an original non-compressed audio. The respective data are outputted to the outside from the video output terminal 8 and the audio output terminal 9, converted into analog data or the like, and outputted to a monitor and a speaker, whereby a user is able to enjoy the content recorded on the DVD-RAM disk 1.
Further, among the digital signal outputted from the reading means 4, part of data of the first management information file 3 recorded on the DVD-RAM disk 1 is inputted to the management information analysis means 7. The management information analysis means 7 obtains desired management information from the information signal constituted by the MPEG stream 2 and the first management information file 3, which is recorded on the basis of the video recording standard, through the reading means 4. Then, the management information analysis means 7 analyzes information relating to reproduction, among the obtained management information. To be specific, the management information analysis means 7 analyzes information for performing continuous reproduction, information relating to a reproduction start position, and/or information specifying a reproduction section, and sends a required result to the reading control means 6, and the reading means 4 is controlled according to the specified reproduction mode. In this case, while not shown in the drawing, the device may be provided with an interface connecting the same with a user, so as to analyze the reproduction information selected by the user.
For example, the information analysis means 7 searches the selected reproduction start position from a plurality of reproduction start positions, through the first management information file 3 recorded on the DVD-RAM disk 1, and sends the information relating to the actual reproduction start position of the MPEG stream 2 that is recorded on the DVD-RAM disk 1, to the reading control means 6 on the basis of the searched information. The reading means 4 reads data according to the control by the reading control means 6, whereby reproduction at a desired position which is selected by a user becomes possible, so that the user can enjoy a desired reproduction video and audio.
Further, the conventional system as described above has a function of recording data on the DVD-RAM disk 1. In FIG. 16, a video signal and an audio signal inputted to the video input terminal 22 and the audio input terminal 23 are outputted from the MPEG encoder 21 as an MPEG stream. In this case, the video signal and the audio signal are subjected to MPEG compression and system-encoding. The format for the MPEG compression and the system-encoding is standardized in a like manner as that of the MPEG stream 2 and the first management information file 3 recorded on the DVD-RAM disk 1. The information signal outputted from the MPEG encoder 21 is, through the rewriting means 20, recorded on the DVD-RAM disk 1. Concurrently, the constituent content of the MPEG stream 2 is added to the first management information file 3 and, thus, the first management information file recorded on the DVD-RAM disk 1 is rewritten, and a second MPEG stream which is selected from the MPEG stream 2 recorded on the DVD-RAM disk 1 is reproduced on the basis of the rewritten management information file. At this time, even when there is additional data recording, the newly created MPEG file is a single file, and this file is added to the previous MPEG stream 2, and information relating to this added MPEG file is newly registered with the first management information file 3, whereby reproduction can be performed smoothly.
Further, when the simple editing supported by the video recording standard is performed by a user, the first management information file 3 recorded on the DVD-RAM disk 1 is rewritten. That is, for example, when the user specifies a specific section through the reproduction section specifying means 26, the first management information file 3 is rewritten by the rewriting control means 24 and the rewriting means 20, through the management information rewriting specifying means 25, on the basis of the specified range. Similarly, the first management information file recorded on the DVD-RAM disk 1 is rewritten by adding or deleting data to/from the first management information file 3, or modifying the same, on the basis of the information relating to the reproduction start position specified through the reproduction start position specifying means 27. Then, the second MPEG stream which is selected from the MPEG stream 2 recorded on the DVD-RAM disk 1 is reproduced on the basis of the rewritten management information file.
In this way, the first management information file 3 on the DVD-RAM disk 1 is rewritten by the simple editing function. When reproduction is performed, data are read on the basis of the newly rewritten management information file on the DVD-RAM disk 1. For example, when the reproduction start position is specified first, a user can specify the reproduction start position as well as specifying for general reproduction, and thus there is no need to search data requiring long reproduction time or the like, for the reproduction start position, resulting in instant data reproduction at the desired reproduction start position.
In this case, it is usual that the management information file 3 is rewritten when the simple editing or the like is finished, and the updated management information file is applied when reproduction is performed. Specifically, in order to protect the rewriting into the updated management information file from occurrence of power failure, an operation of ejecting a commutative disk such as the DVD-RAM disk 1 or the like, the rewriting of the DVD-RAM disk 1 is instantly carried out with the operation of specifying rewriting of the first management information file 3.
As described above, when the simple editing is performed, the rewriting of the management information file recorded on the DVD-RAM disk 1 has been required.
However, the above-described construction has a problem that it is impossible to carry out the simple editing when the information signal cannot be rewritten. To be specific, when the so-called write-protect such as a process of prohibiting writing on the DVD-RAM disk 1 is applied to protect the information signal written on the DVD-RAM disk 1, the first management information file 3 on the DVD-RAM disk 1 cannot be rewritten. Accordingly, it is impossible to carry out the simple editing as described above making full use of the characteristic of the disk, in which a reproduction start position at user's request is specified so that reproduction is performed from the specified position without rewriting the MPEG stream 2.
Further, in the above-described construction, while the information signal can be reproduced, it may be impossible to create an arbitrary duplicate file that is selected by a user from the information signal recorded on the DVD-RAM disk 1.
Furthermore, when a duplicate of the MPEG stream is created, there is no means for managing the duplicate stream. Therefore, a long time is required for an operation of reproducing the created duplicate stream.
The present invention is made to solve the above-described problem and has for its object to provide a device, a method, and a program for easily editing an information signal regardless of a state of a disk or the like, i.e., whether rewriting of the information signal recorded on the disk is possible or not.

Information signal edition apparatus, information signal edition method, and information edition program


An impurity doped region is formed in a semiconductor substrate, and an insulating layer is formed thereon. A conductive layer is formed and is patterned by a photolithography process Then, a conductive sidewall is formed inside of the conductive layer. The insulating layer is etched with a mask of the conductive sidewall and the conductive layer to create a contact hole leading to the impurity doped region. A capacitor lower electrode layer is deposited within the contact hole. Thus, a capacitor insulating layer and a capacitor upper electrode layer are formed, to obtain a stacked capacitor.

1. Field of the Invention
The present invention relates to a method for manufacturing a stacked capacitor which can be used in a memory cell of a dynamic random access memory (DRAM).
2. Description of the Related Art
Generally, in a DRAM, each memory cell is formed by one metal oxide semiconductor (MOS) transistor and one capacitor. Also, recently, a stacked capacitor, which has two electrode layers with an insulating layer therebetween, has been used as such a capacitor, to thereby increase the density of the DRAM.
According to a prior art method for manufacturing a stacked capacitor, an insulating layer is deposited on a semiconductor substrate including a drain region of a MOS cell transistor, and is patterned by a photolithography process to create a contact hole leading to the drain region. Then, a conductive layer, i.e., a lower electrode layer is deposited and is connected to the drain region. Finally, an insulating layer and a conductive layer, i.e., an upper electrode layer, are deposited to thereby obtain a stacked capacitor.
In the above-mentioned prior art stacked capacitor manufacturing method, however, since the contact hole for the capacitor lower electrode is formed directly by the photolithography process, so that the size of the contact hole is dependent upon the photolithography process, it is impossible to make the size of the contact hoe smaller than a size determined by the photolithography process. Therefore, there is a limit to the integration density of the stacked capacitor in accordance with the photolithographyprocess.

Method for manufacturing highly-integrated stacked capacitor


The present invention discloses a method and an apparatus for primary synchronization signal (PSS) detection. The method may comprise: performing a central-symmetrical preprocess on a receive vector by exploiting a central symmetry of the primary synchronization signal; and performing, based on the central-symmetrical preprocess, a non-coherent detection on the receive vector using local primary synchronization signals so as to detect the primary synchronization signal. The computation complexity in PSS detection may be significantly reduced by performing preprocess to the receive vector based on the central symmetry of the primary synchronization signal, thereby considerably enhancing the speed and performance of PSS search and further improving the cell search efficiency.

The 3GPP LTE is envisioned to be a key technology for the next-generation wireless communications. The LTE network, also known as Evolved Universal Terrestrial Radio Access Network (E-UTRAN), has been standardized by the 3GPP. In the LTE system, Orthogonal Frequency-Division Multiple Access (OFDMA) is adopted as the down-link transmission scheme, while Single-Carrier Frequency-Division Multiple Access (SC-FDMA) technology is used for the User Equipments (UE) to up-link access the station device (eNodeB).
In the LTE system, a cell search process is a process for performing time and frequency synchronization between a UE and a cell and detecting a cell ID. To enable the UE to quickly obtain the frequency and synchronization information, a primary synchronization signal (PSS) and a secondary synchronization signal (SSS) are designed in the LTE system. Each cell is identified through the cell-ID information carried by in the primary synchronization signal and the secondary synchronization signal. In the LTE system, the Zadoff-Chu sequence (hereinafter referred to as ZC sequence) is used to generate a PSS sequence, and three cells in a cell group are differentiated by three groups of sequences with roots of 25, 29, and 34, respectively. For the sake of illustration, FIG. 1 illustrates a diagram of a frequency domain ZC sequence. As illustrated in FIG. 1, the ZC sequence has a length of 63, wherein 62 sub-carriers excluding s direct current (DC) carrier are modulated, while the direct current carrier at the central position is not modulated so as to avoid direct current components.
This ZC sequence has a good auto-correlation property, but has a very low cross-correlation property. In other words, its auto-correlation value is very high, but its cross-correlation value is relatively low. Based on this feature, a non-coherent detection algorithm may be used in PSS sequence detection. In other words, the PSS sequence may be detected by detecting the peak of coherent values.
FIG. 2 illustrates a diagram of PSS detection according to the prior art. As illustrated in FIG. 2, at a receiver (i.e., at a user equipment UE), the received vector is filtered by a filter, so as to filter out the content have no relation with the PSS and avoid interference from other sub-carriers to the PSS. Then, the coherent values between the obtained receiver vector and the three local ZC sequences are calculated.
In case of PSS, due to the correlation property unique to the ZC sequence, the detected PSS will be matched to a local ZC sequence; at this point, a partial peak appears in an output of the PSS root identification module; by using this peak, it may be exactly determined at the receiver which PSS sequence the receive vector is, thereby determining the cell-ID. In case that the PSS does not appear, the calculated maximum coherent value will be lower than the determination threshold Ti, and at this point, the start point index θ of the sequence is plus 1 to enter into the next operation.
Thus, in the existing PSS detection algorithm, all the three local sequences are compared with the received sequence one by one, so as to determine whether the receive vector matches one of the ZC sequences. Besides, although the PSS sequence transmission frequency in downlink transmission is not very high, which is once in 5 ms, it is required to detect all received symbols in a prior scheme, so as to prevent miss-detection to the PSS symbols. Because the PSS transmission frequency is relatively low, most of these detected symbols are data symbols. However, even so, it is still required to use the three local ZC sequences to determine whether a received symbol matches one of the ZC sequence, and the algorithm will continue detection on a following symbol until a mismatch is determined. Therefore, actually, most of the detection operations for PSS algorithms are consumed on these data symbols, instead of the PSS sequence. All of the above result in that such PSS detection algorithm greatly consumes the data processing capability at the receiver; therefore, it is a rather inefficient detection policy, which will seriously restrain the speed of UE access to a cell.
Therefore, there is an urgent need for an improved PSS detection scheme in the art.

Method and apparatus for primary synchronization signal detection


A manufacturing method of a semiconductor device includes: depositing a thin film semiconductor layer on a semiconductor substrate with an insulating film therebetween, the insulating film having been formed on a surface of the semiconductor substrate; ion-implanting first impurity ions into the thin film semiconductor layer under a condition where a range of the first impurity ions becomes smaller than a film thickness of the thin film semiconductor layer when being deposited; and selectively ion-implanting second impurity ions into the thin film semiconductor layer with a dose quantity more than a dose quantity of the first impurity ions, in which a diode for detecting temperature is formed by a region into which the first impurity ions have been implanted and a region into which the second impurity ions have been implanted in the thin film semiconductor layer.

When an insulated gate bipolar transistor (hereinafter, sometimes referred to as IGBT) is used in an inverter or the like, there is a mode where overvoltage and overcurrent are caused, which is called a load short. In order to avoid element destruction even when being caught in such a mode, it is desirable for a power device itself to have overvoltage and overcurrent resistance performance such as a function to detect abnormal heat generation due to overvoltage and overcurrent, without delay as much as possible. As such device, a device structure in which a main semiconductor element, such as a power IGBT or a power MOSFET in which a large current flows, and a diode for detecting temperature (temperature sensing diode) are integrally incorporated into the same semiconductor substrate is known.
As illustrated in FIG. 11, it is known that there is a relationship in which a forward direction voltage (hereinafter, forward voltage) of a diode is generally decreased linearly as temperature of an element is increased. By using this property, when a diode layer for detecting temperature is formed on the surface of a semiconductor substrate on which a main semiconductor element (hereinafter, referred to as main element) is mounted with an insulating film therebetween, a temperature change of the main element can be immediately detected as a voltage change. If the detected temperature of the main element exceeds allowable temperature of the main element, an operating current is limited by decreasing a gate voltage of the main element so that the main element can be protected from thermal destruction.
In contrast, a potential difference (Vf: forward voltage) generated between an anode (p region) and a cathode (n region) when passing a forward direction current through a diode for detecting temperature is a sum of a junction voltage Vpn generated in a pn junction part and a voltage drop (I×Rpn) generated by resistance of the p region and the n region. More specifically, Vf=Vpn+(I×Rpn). The resistance value Rpn of the p region and the n region is determined by impurity concentrations of the p region and then region, and thus, if there is variation in the impurity concentrations, variation occurs in the resistance value Rpn of the p region and the n region. As a result, variation occurs in temperature detection accuracy by the diode.
As a manufacturing method of such a diode for detecting temperature, which is integrated with a main element, for example, a manufacturing method in which a p-n junction diode is formed by impurity doping in a polycrystalline silicon layer grown on the surface of a substrate of a main semiconductor element with a silicon oxide film therebetween is known (PTL 1, 2).
In addition, a structure of a diode for detecting temperature (FIG. 6 in PTL 3), in which, when the diode made of respective p-n impurity layers adjacent to each other with a junction therebetween is formed by ion implantation and laser anneal in a polycrystalline silicon layer grown on the surface of a substrate of a main element with an insulating film therebetween, the polycrystalline silicon layer is left in the lower layer part of the p-n impurity layers, is disclosed (PTL 3).
In addition, a document describing details of a manufacturing process of a polysilicon diode is disclosed (PTL 4).
FIGS. 9A through 9E illustrate a conventional manufacturing method of a MOSFET having a diode for detecting temperature (temperature sensing diode). In FIGS. 9A through 9E, hatching indicating cross-sectional surfaces is partially omitted for making the drawing be easily recognized.
As illustrated in FIG. 9A, a polycrystalline silicon layer 104 is formed on the whole area of the surface of a semiconductor substrate 101 having an active region and an inactive region with an insulating film 103 therebetween. Here, a left region in which a main element is formed is the active region, and a right region in which the diode for detecting temperature is formed is the inactive region.
Then, as illustrated in FIG. 9B, by using a photoresist 111 as a mask, the polycrystalline silicon layer 104 and the insulating film 103 on the active region of the semiconductor substrate 101 are selectively removed.
Furthermore, as illustrated in FIG. 9C, by using a photoresist 112 as a mask, boron (B) ions as impurity ions are selectively ion-implanted into the polycrystalline silicon layer 104 on the inactive region of the semiconductor substrate 101 and the active region of the semiconductor substrate 101 to form an impurity ion implantation layer 105a for the diode in the polycrystalline silicon layer 104 and to form an impurity ion implantation layer for the main element in the active region of the semiconductor substrate 101.
Then, as illustrated in FIG. 9D, by using a photoresist 113 as a mask, arsenic (As) ions as impurity ions are selectively ion-implanted into the polycrystalline silicon layer 104 on the inactive region of the semiconductor substrate 101 and the active region of the semiconductor substrate 101 to form an impurity ion implantation layer 106a for the diode in the polycrystalline silicon layer 104 and to form an impurity ion implantation layer for the main element in the active region of the semiconductor substrate 101.
Then, as illustrated in FIG. 9E, by performing thermal treatment to activate the boron ions and the arsenic ions ion-implanted in FIG. 9C and FIG. 9D, a p region 105 and an n region 106 are formed in the polycrystalline silicon layer 104.
Here, in the conventional manufacturing method of a semiconductor device having a MOSFET and a diode for detecting temperature, as illustrated in FIG. 9C and FIG. 9D, when the impurity ions are selectively ion-implanted into the polycrystalline silicon layer 104, in order to shield ion implantation into non-implantation regions other than implantation regions, a step for covering the non-implantation regions with the photoresists 112, 113 becomes necessary. In addition, for promotion of efficiency of manufacturing steps, the p region 105 and the n region 106 configuring the diode for detecting temperature are often formed in the same step as the formation of the main element in the active region of the semiconductor substrate 101 by ion implanting (refer to FIGS. 9C and 9D), as described in paragraphs [0022] to [0023] of PTL 1.
However, the conventional diode for detecting temperature has large variation of the forward voltage Vf.

Manufacturing method of semiconductor device


A method wherein a hologram is transferred from a transfer foil formed with a fine dimple pattern and having a reflecting layer, and information, e.g., an image or a character, other than information originally recorded on the hologram is added to the transferred hologram. The method comprises preparing a transfer foil having a reflection relief hologram comprising a resin layer having a fine dimple pattern, e.g., a relief hologram, a relief diffraction grating, etc., formed on the surface thereof, and a reflecting layer formed on the dimpled surface of the resin layer, transferring at least a part of the hologram to the surface of an object, and heating a part of the transferred portion with a heating device, thereby destroying the reflecting layer to record another information. Also disclosed are a method which enables a fine hologram pattern to be readily transferred to a large area, a transfer foil having a reflecting layer which enables a fine dimple pattern to be transferred precisely with excellent foil breaking characteristics, and a method of producing such a fine dimple pattern transfer foil.

The present invention relates to a transfer foil having a reflecting layer with a fine dimple pattern recorded thereon, for example, a transfer type reflection relief hologram, a reflection relief diffraction grating, etc.
In this application, a first invention relates to an information recording method wherein information recorded on a transfer foil is transferred to a substrate by a thermal recording head, for example, and information that is different from the information originally recorded on the transfer foil is recorded and displayed on the portion of the substrate where the original information has been transferred. The invention also relates to an information recording medium having information recorded thereon by the above-described method.
A second invention relates to a reflection relief hologram transfer foil which is formed in a specific transfer type, and also to a selective transfer method for a reflection relief hologram which employs such a transfer foil. More particularly, the invention relates to a transfer foil which enables a fine hologram pattern to be readily transferred to a large area, and to a transfer method employing such a transfer foil.
A third invention relates to a transfer foil having on the surface thereof an extremely fine dimple pattern, for example, a hologram, a building material, an optical recording medium, etc., which can be transferred in a precise pattern by a hot stamper, a thermal head or the like. The invention also relates to a method of producing such a transfer foil.
Holograms, in which information is recorded generally in the form of interference patterns of light, are used in various fields as high-density information recording media for recording and displaying two- and three-dimensional images and other information. Among them, relief holograms are formed in such a manner that a holographic interference fringe pattern is recorded in the form of a dimple pattern on a photoresist, for example, and the dimple pattern is transferred by plating, for example, to form a stamper, which is then stamped on a transparent thermoplastic resin material with or without a reflecting layer of a metal or the like formed on the surface thereof, thereby making a large number of duplicates. Relief holograms wherein a reflecting layer, e.g., a metal layer or a high refractive index layer, is provided on the relief surface and an image is reconstructed by light reflected and diffracted by the reflecting layer include two different types, in one of which the incident light is reflected substantially completely by the reflecting layer, while in the other part of the incident light is reflected to reconstruct a hologram image on a background of transmitted light. In this application, these two types are included in the reflection relief holograms. In addition, another type of relief hologram in which the dimple pattern comprises phase diffraction grating patterns properly arranged is also considered to be included in the reflection relief holograms.
A typical reflection relief hologram has a sectional structure shown in FIG. 10, and it comprises a hologram layer 1 of a thermoplastic resin material or the like and a reflecting layer 2 formed on a dimple interference fringe surface (i.e., relief surface) defined by the surface of the hologram layer 1. The reflecting layer 2 comprises either a deposited metal film, e.g., aluminum or tin, or a high refractive index transparent film, e.g., zinc sulfide. With a deposited metal film, a reflection relief hologram that reflects the incident light substantially completely by the metal is formed. With a high refractive index transparent film, the resulting reflection relief hologram is of the type in which part of the incident light is reflected to reconstruct a hologram image on a background of transmitted light because of Fresnel reflection based on the refractive index difference between the hologram layer 1 and the reflecting layer 2. Such a reflection relief hologram may be produced by either of the following two methods: one in which holographic information is recorded in the form of a dimple pattern on a photoresist, for example, and the dimple pattern is transferred by plating, for example, to form a stamper, which is then stamped on a transparent thermoplastic resin material that constitutes a hologram layer 1 to duplicate the dimple pattern, and a reflecting layer 2 is formed on the duplicated dimple pattern by deposition or the like; and the other in which a reflecting layer 2 is previously formed on a transparent resin layer that forms a hologram layer 1, and a stamper formed with the above-described dimple pattern is hot-stamped on the reflecting layer 2 to duplicate the dimple pattern (for example, see Japanese Patent Application Laid-Open (KOKAI) No. 58-65466 (1983)).
Incidentally, such a reflection relief hologram can be arranged in the form of a transfer foil (for example, see Japanese Patent Application Laid-Open (KOKAI) No. 01-283583 (1989)). FIG. 11 shows a section of the transfer foil. In order to enable the reflection relief hologram shown in FIG. 10 to be transferable, a base film 4 of PET (polyethylene terephthalate) or the like is provided on the side of the hologram layer 1 opposite to the side thereof where the reflecting layer 2 is provided, through a release layer 3 of wax or the like, and a heat-sensitive adhesive layer 5 of a vinyl chloride resin or the like is provided on the reflecting layer 2. The hologram layer 1 and the reflecting layer 2 in a desired profile region of a transfer foil having the above-described arrangement may be transferred to a substrate of vinyl chloride, for example, by using, for example, a thermal recording head or a hot stamper, as follows: The transfer foil is set in between a substrate 6 to which the hologram is to be transferred and a thermal recording head or hot stamper 7 such that the heat-sensitive adhesive layer 5 faces the substrate 6, while the base film 4 faces the thermal recording head or hot stamper 7, and in this state the thermal recording head 7 is driven or the hot stamper 7 is pressed under heating.
Thus, the reflection relief hologram has heretofore been transferred to the substrate 6, e.g., a card, as shown in FIG. 12, to display visible information, e.g., a mark, an image, etc., on a card or the like. However, it has been impossible to record and display in the transfer region image information, character information, etc. other than the information originally recorded on the transfer foil.
Further, in either the transfer method employing a hot stamper or the transfer method employing a thermal recording head, only the transfer hologram pattern portion is heated from the side of the base film which is remote from the hologram layer, a heat or pressure dispersion phenomenon occurs in the base film, so that it is difficult to reproduce the desired pattern strictly. Thus, the prior art is unsuitable for transfer of a fine pattern.
Incidentally, there has heretofore been a known method of duplicating a large number of transfer foils having an extremely, fine dimple pattern, for example, a relief hologram, a diffraction grating, an optical information recording medium, etc., as described above. According to this method, a resin layer that is provided on a base film through a release layer is softened by heat-pressing to form a dimple pattern, thereby duplicating a large number of transfer foils by embossing.
It is common for most of these dimple pattern transfer foils to form a reflecting layer of a metal or the like by plating technique on a dimple pattern formed on a resin layer in order to enhance the optical effectiveness of the dimple pattern.
However, the method, in which a metal thin film layer is provided on a dimple pattern formed on a resin layer, involves the problem that during the formation of a dimple pattern on the resin layer, the material of the resin layer may be transferred to a dimple forming stamper due to the release resistance occurring between the stamper and the resin layer. If silicone or the like is added to the resin layer to reduce the release resistance of the transfer foil in order to prevent the described problem, the adhesion with a reflecting layer formed subsequently lowers, so that the reflecting layer becomes likely to separate. If the film breaking strength of the resin layer is increased, the release characteristics and foil breaking characteristics required for the transfer process deteriorate, so that it becomes difficult to transfer a fine pattern.
When a dimple pattern is formed on a resin layer of a thermoplastic resin material under heating, there is a need for a process of releasing the resin layer from the stamper after cooling it because it is likely that the dimple pattern formed will be deformed by the heat remaining after the release.
In addition, when a metal thin film layer is formed on a dimple pattern, the dimple pattern may be deformed by heat or chemical influence during plating process or it may be impossible to obtain a reflecting layer with a uniform thickness distribution due to the dimple pattern. It is also likely that mixing of dust will cause a pinhole or adhesion failure. Thus, the prior art suffers from problems in terms of quality.
In addition, when the take-up type semicontinuous deposition method or the like is employed for the formation of a reflecting layer, the process efficiency is inferior in that a reflecting layer is deposited each time the embossing process has been completed, so that it is disadvantageous to small lot products in terms of both cost and time.

Transfer foil having reflecting layer with fine dimple pattern recorded thereon


A first light source outputs measurement light having a wavelength in infrared range. A second light source outputs guide light having a wavelength in visible range. A fiber coupler includes a first port into which the measurement light is input, a second port into which the guide light is input, and a third port outputting combined light formed by combining the measurement light and the guide light with each other. A measurement unit emits the combined light to a measurement object and receives return light reflected therefrom. A processing unit obtains information relating to a distance, a speed, or an oscillation of the measurement object, based on an interference signal of the return light and the reference light. The fiber coupler is formed by a single mode fiber that has a cutoff wavelength that is shorter than that of the measurement light and longer than that of the guide light.

A technique is known in which a measurement object is irradiated with coherent measurement light, and a distance, a speed, an oscillation, and the like are measured based on interference signals of reflected light (return light) and reference light (see WO 2017/187510). In the above described kind of optical interference measurement apparatus, invisible light such as infrared laser light is typically used.
WO 2017/187510 is an example of background art.
There is a strong demand for FA (Factory Automation) sensors with which a measurement position, that is, a position of the measurement object that is irradiated with measurement light can be visually confirmed. To this end, in developing an optical interference measurement apparatus for FA applications, the inventors have investigated adding a function for irradiating a measurement position with guide light for visually indicating the measurement position, separately from the measurement light.
Methods for implementing the guide light irradiation function may include a configuration in which an irradiation optical system of the guide light is provided separately from an irradiation optical system of the measurement light, and a configuration in which the measurement light and the guide light are combined with each other, and the measurement object is irradiated with the resultant light from a common irradiation optical system. However, the former configuration has a problem in that alignment of optical axes of the two irradiation optical systems is difficult and such a configuration incurs an increase in size of a measurement head. On the other hand, in the latter configuration, a WDM (Wavelength Division Multiplexing) coupler that is usually used as a means for multiplexing lights having different wavelengths is expensive and difficult to adopt. In addition, a method using a dichroic mirror is conceivable, but there is a problem in that such a method incurs an increase in the number of components and size of the apparatus body.

Optical interference measurement apparatus


There is provided a method of determining an optimal image transmission method when image data is transmitted from an image supplying device 1 and 1′ to an image display device 2 and 2′, the method including: before the image data is transmitted after a transmission path from the image supplying device 1 and 1′ to the image display device 2 and 2′ is established, determining the image transmission method on the basis of correspondence table, which is previously prepared, such that the optimal image transmission method according to at least one of transmission path information and capability of the image display device 2 and 2′ acquired by the image supplying device 1 and 1′ is derived.

Conventionally, if an image display device is connected to an image supplying device, the image supplying device is generally adapted to processing capability such as a compression method supported by the image display device.
As the adapting method, a system and method for exchanging computer data processing capability between a computer related to the image display device and the like and a computer related to the image supplying device and the like is known (for example, see Patent Document 1).
That is, it is possible to communicate information about the data processing capability between the computers.
In more detail, the computers exchange the capability such that data transmission between the computers can be performed with a most efficient data format with respect to the two computers.
A first computer which receives a data file sends a data processing capability list to a second computer which transmits the data file to the first computer.
The transmission computer checks the capability and determines the most efficient data format for transmission, similar to the capability list of the reception computer.
The transmission computer can process the data file with an intermediate format, for efficient data transmission which allows the reception computer to process the intermediate data file with a desired data format.
Meanwhile, in an OSI communication method, in a case where plural pieces of data having different coding methods are transmitted, a technology of the OSI communication capable of improving the convenience of the communication in addition to simple communication control is known (for example, see Patent Document 2).
In more detail, if a session connection is established, information about image data which will be transmitted, that is, CAPABILITY DATA SPDU including information about document image data and still image data, is transmitted.
A called terminal includes its capability information, which can be communicated, in the CAPABILITY DATA ACK SPDU and responds thereto.
A calling terminal receives the capability information, checks that a counterpart can be communicated, transmits ACTIVITY START SPDU, sequentially transmits the document image data and the still image data, and transmits ACTIVITY ENDS PDU.    [Patent Document 1] JP-A-7-203177    [Patent Document 2] JP-A-6-14083

Method of determining image transmission method, image supplying system, image supplying device, image display device, program and computer-readable recording medium


The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the trench. Several processes for manufacturing such devices are described. In one group of processes a directional deposition of silicon oxide is performed after the trench has been etched, yielding a thick oxide layer at the bottom of the trench. Any oxide which deposits on the walls of the trench is removed before a thin gate oxide layer is grown on the walls. The trench is then filled with polysilicon in or more stages. In a variation of the process a small amount of photoresist is deposited on the oxide at the bottom of the trench before the walls of the trench are etched. Alternatively, polysilicon can be deposited in the trench and etched back until only a portion remains at the bottom of the trench. The polysilicon is then oxidized and the trench is refilled with polysilicon. The processes can be combined, with a directional deposition of oxide being followed by a filling and oxidation of polysilicon. A process of forming a “keyhole” shaped gate electrode includes depositing polysilicon at the bottom of the trench, oxidizing the top surface of the polysilicon, etching the oxidized polysilicon, and filling the trench with polysilicon.

There is a class of semiconductor devices in which a gate electrode is formed in a trench that extends from the surface of a semiconductor chip. One example is a trench-gated MOSFET, and other examples include insulated gate bipolar transistors (IGBTs), junction field-effect transistors (JFETs) and accumulation-mode field-effect transistors (ACCUFETs). All of these devices share the common characteristic of a trench structure where the bottom of the trench for some reason can be exposed to high electric fields or where the bottom of the trench might form a parasitic capacitor including the gate electrode and the semiconductor material surrounding the trench.
FIGS. 1 through 10 show cross-sectional views and characteristics of known trench-gated devices. FIG. 1 shows a trench-gated MOSFET 100 having a top metal layer 102, a gate 104 formed in a trench 106 and separated from an epitaxial silicon layer 108 by a gate oxide layer 110. MOSFET 100 also includes an N+ source region 112 and a P-body 114. The drain of MOSFET 100 includes the N-epi layer 108 and an N+ substrate 116. A deep P+ region 118 is created under P-body 114, as suggested in U.S. Pat. No. 5,072,266 to Bulucea et al. The PN junction between deep P+ region 118 and N-epi layer 108 forms a voltage-clamping diode 117 where avalanche breakdown normally occurs. A P+ body contact region 119 forms a contact between metal layer 102 and P-body 114. The gate, which is typically formed of polysilicon, is protected from the metal layer 102 by an oxide layer 120 that is above the gate 104 and that is patterned with a feature that does not correspond to the trench itself, typically a contact mask.
As shown, gate oxide layer 110 consists of a uniform thin layer of oxide along the three sides of the polysilicon gate 104. That is, the portions of gate oxide layer 110 on the sidewalls of the trench and also the curved and linear portions of the gate oxide layer 110 at the bottom of the trench (except for some stress-related and etch-related changes in the oxide thickness that occur at the trench bottom) are generally of a uniform thickness in the range of, for example, 150 Å to 1,200 Å.
There are many variations of this general type of MOSFET. For example, FIG. 2 shows a MOSFET 130 which is generally similar to MOSFET 100 but does not include a deep P+ region 118. The gate of MOSFET 130 protrudes slightly through P-body 132 because the depth of P-body 132 and the depth of the trench 134 are determined in two unrelated processes. Thus, in vertical devices there is no guarantee of the net overlap of the polysilicon gate into the drain region. It turns out that this variation affects the operation of the device and may affect its reliability as well. Also, in FIG. 2 there is no additional diode formed by the deep P+ region 118 to clamp the voltage, so breakdown can occur wherever the voltage is raised to the point that the device goes into avalanche.
MOSFET 140, shown in FIG. 3, is variation of MOSFETs 100 and 130, where the MOSFET cells 142 contain no deep P+ region, and a diode cell 144 containing a deep P+ region is distributed at predetermined intervals throughout the array to act as a voltage clamp and limit the strength of the electric fields in the MOSFET cells. In MOSFET 140, the gate oxide layer is of uniform thickness.
FIGS. 4A–4G illustrate various aspects of the breakdown phenomenon. FIG. 4A shows the electric field strength contours at breakdown in a trench-gated device 150 having a relatively thick gate oxide layer. Device 150 is in effect a gated diode, a structural element of most trench-gated vertical power MOSFETs. As indicated, the strongest electric field, where impact ionization would occur during avalanche breakdown, is located at the junction directly beneath the P+ body region. In contrast, device 160, shown in FIG. 4B, has a relatively thin gate oxide layer. While some ionization still occurs underneath the P+ region, the highest electric field levels are now located near the corner of the trench. A field plate induced breakdown mechanism causes the strength of the electric field to increase.
FIGS. 4C and 4D show the ionization contours of devices 150 and 160, respectively, when they go into avalanche breakdown. Whether there is a thick gate oxide layer, as in FIG. 4C, or thin gate oxide layer, as in FIG. 4D, eventually in "deep" avalanche, i.e., when the device is forced to conduct large currents in avalanche, breakdown starts to occur at the corner of the trench. Even in the thick oxide case (FIG. 4C), where the peak electric field is not at the corner of the trench (FIG. 4A), as the drain voltage increases eventually ionization occurs at the corner of the trench. However, there are more contours in FIG. 4D, indicating a higher ionization rate where the gate oxide layer is thin.
FIG. 4E shows that if one introduces a diode clamp including a deep P+ region, as shown on the right-hand side, the diode will break down at a lower voltage, and avalanche breakdown should not occur at the corner of the trench. If the resistance of the current path through the diode is low enough, then the diode will clamp the maximum voltage of the device. As a result, the voltage will never rise to the point that avalanche breakdown occurs near the corners of the trenches.
FIG. 4F is a graph showing the breakdown voltage (BV) as a function of gate oxide thickness (XOX) for 20 V and 30 V devices. The doping concentration of the epitaxial (epi) layer in the 30 volt device is more lightly doped. The 30 V device would ideally have an avalanche breakdown of around 38 volts. In the 20 volt device the epi would be more heavily doped and the device would ideally have an avalanche breakdown of around 26 or 27 V. As the gate oxide is thinned from 1,000 Å to a few hundred Å, basically the breakdown voltages are relatively constant or may actually even increase somewhat as the shape of the field plate of the gate is actually beginning to help relax the electric field. At thicknesses of less a few hundred Å, however, breakdown degradation begins to occur.
Beyond the point where the breakdown voltage begins to drop (below 30 V for the 30 V device epi and below 20 V for the 20 V device) is the area labeled field plate induced (fpi) breakdown. In this area, breakdown occurs near the trench. For a reliable device one needs to add a diode clamp having a breakdown that is lower than the breakdown in the field plate induced area, so that the diode breaks down first. With a diode having a breakdown voltage as shown in FIG. 4F, breakdown would never occur near the gate in the 30 V device, but that diode would have too high a breakdown voltage to protect a 20 V device. To protect the 20 V device, the breakdown voltage of the diode clamp would have to be below the curve for the 20 V device.
FIG. 4G is a schematic diagram of the devices shown in FIGS. 4A–4D showing a gated diode in parallel with a MOSFET and a diode voltage clamp in parallel with both the MOSFET and gated diode. The arrangement is designed such that the diode clamp breaks down first. The gated diode never "avalanches" before the diode clamp. This becomes more and more difficult to do as the gate oxide layer becomes thinner.
FIGS. 5A and 5B show the ionization contours in a device 170 having a sharp trench corner and a device 172 having a rounded trench corner. FIG. 5B indicates that rounding the trench corners does reduce the magnitude of the ionization, but ultimately if one drives the device deeply enough into breakdown, the breakdown still occurs at the trench corner, and the device is at risk.
FIGS. 6A–6C show the electric field strength contours, the equipotential lines and the electric field lines, respectively, in a MOSFET 180. The gate of MOSFET 180 is tied to the source and body and is grounded, and the drain is biased at VD. From FIG. 6B it is evident that the drain voltage VD is divided and spaced out across the region. On the left hand side of FIG. 6B, the equipotential lines are squeezed closer together, and particularly around the trench corner they are squeezed even tighter. This produces electric field lines that are at right angles to the equipotential lines, as shown in FIG. 6C. One can see why a high electric field occurs at the trench corner and why rounding the corner does not solve this problem. It is basically a volumetric problem in that there is an electric field that terminates on an electrode having a lower surface area, namely the gate, and so the electric field lines are crowded at the corner.
FIG. 6D shows MOSFET 180 when it is turned on by putting a positive voltage VG on the gate. A current flows down the side wall of the trench and then it also spreads out along the bottom of the trench and into the region below the mesa at an angle from the side of the trench. However, in the process the current flows through areas that have high electric fields, as shown by the electric field contours of FIG. 6A. When a high current flows through an area that has a high field (and that would be the case where the device is saturated), the current carriers collide with the atoms of the epi layer and knock off, by momentum transfer, additional carriers. This forms new electron-hole pairs that in turn are accelerated and create additional collisions, ionizing additional atoms.
FIG. 6E shows the ionization contours in MOSFET 180 when it is in the on state. The ionization contours shown in FIG. 6E are different from those shown in FIG. 4C, for example, when device 150 is in the off state. The difference is that the ionization contours pull upwards all the way around the side of the trench, even up near the P-body. This has a number of damaging effects on the device. One effect is that it creates electron-hole pairs in the vicinity of the gate oxide that can be accelerated quite easily by the high electric field in that area. The electron-hole pairs can actually be trapped in the gate oxide, and they can damage the gate oxide.
Furthermore, this phenomenon produces an upper limit in the amount of voltage that one can put on the device, because so many electron-hole pairs may be produced that they begin to modulate the effective doping concentration of the epitaxial layer, by making the region around the side of the trench seem more heavily doped than it actually is. That occurs because electrons from the newly generated electron-hole pairs are swept into the substrate by the positive drain voltage VD, and the holes are swept into the P-body. The net effect is that, since the electrons and holes can only travel at a certain velocity, the local charge distribution adjusts itself to maintain charge neutrality. Specifically, surrounding the reverse-biased junction is a region known as a depletion region or space charge region, where (in the absence of impact ionization) no free charge carriers are present. The immobile charge residing within the depletion region, namely positive ions on the N-type side of the junction and negative ions on the P-type side of the junction, produces a "built-in" electric field across the junction. In the presence of impact ionization, the holes drifting across the N-type region add to the positive fixed charge and thereby increase the electric field, further enhancing the impact ionization process. These excess holes make the epitaxial region, which in this example is N-type material, appear more heavily doped because of the increase in the "built-in" field. The net effect is an increase in the electric field, which degrades the breakdown. This effect is shown in the current-voltage characteristics of FIG. 6F where the drain current ID increases dramatically at a certain drain voltage. The drain voltage at which this happens is the same for each of the gate voltages shown. This problem becomes worse as the gate oxide is thinned.
Another problem with the trench device relates to capacitance. FIG. 7A is a schematic diagram of a MOSFET 190 having a gate driven by a current source 192 and having resistive load 194. A voltage source 196 connected to the source and drain supplies a voltage VDD resulting in a drain voltage VD at the drain. As shown in FIGS. 7B–7D, at a time t1 current source 192 begins to supply a constant current to the gate and the voltage on the gate relative to the source, labeled VG in FIG. 7C, starts to rise. But because it does not immediately hit threshold, the drain voltage VD does not start to fall because MOSFET 190 is not yet turned on. As soon as the VG hits threshold, at time t2, MOSFET 192 saturates and turns on and carries current. VD starts to drop, but as it starts to drop it causes a capacitive coupling between the drain and the gate of MOSFET192 and halts the upwards progression of the gate voltage VG. VG remains flat until MOSFET 192 gets into its linear region. Then, MOSFET 192 begins to look like an on-resistance in a voltage divider, with a small voltage across MOSFET 192 and most of the voltage VDD across resistor 194.
At that point the capacitive coupling effect between gate and drain is satisfied and the VG continues its progress to a higher voltage. The plateau is due to a gate-to-drain overlap capacitance similar to the Miller effect, but this is not a small signal effect. This is a large signal effect. At that time the drain current ID also continues to rise, but as shown in FIG. 7D its upward progression is slowed.
FIG. 7E shows a plot of VG as function of the charge on the gate QG, where QG is equal to IG times the time t, IG being a constant. The gate voltage VG rises to a certain level, then it remains constant, and then it rises again. If there were no feedback capacitance between the drain and gate, the voltage would rise linearly, but instead the straight line is interrupted by the plateau.
In FIG. 7E, the point VG1, QG1 corresponds to a certain capacitance because C is equal to ΔQ over ΔV. Since it takes more charge to get to the point, QG2 and VG1, then that point reflects more capacitance. So the capacitance in the device, as shown in FIG. 7F, starts at a low value CISS, which is relatively constant, and then it jumps to a higher effective value CG(eff), and then it is relatively constant. Because of this effect the device has a higher effective capacitance than is desirable during the switching transition. As a result, there is an undue amount of energy lost in turning the device on.
As shown in FIG. 7G, the input capacitance actually has a number of components, including the gate-to-source capacitance CGS and the gate-to-body capacitance CGB, neither of which exhibits the amplification effect of the gate-to-drain capacitance CGD. The gate-to-drain capacitance CGD is shown in FIG. 7G, around the bottom and side wall of the trench. The equivalent schematic is shown in FIG. 7H. Even if CGD is the same order of magnitude as CGS and CGB, electrically it will look much larger (e.g., 5 to 10 times larger) because it is amplified during the switching process.
As indicated above, rounding the trench bottom helps to limit the damage to the gate oxide layer, although it is not a complete solution to the problem. FIGS. 8A–8C illustrate a process for forming a trench with rounded corners. In FIG. 8A small reaction ions 202 etch the silicon through an opening in a mask 200 at the surface. Ions 202 are accelerated by an electric field in a downward direction such that they etch a trench having essentially a straight side wall. When the trench reaches a certain depth the electric field is relaxed, as shown in FIG. 8B. Alternatively, one could possibly change the chemistry. At the end of the process, as shown in FIG. 8C, the electric field is modified so that the etching ions are traveling in all different directions. That begins to not only widen the trench, but also rounds out the bottom. Hence, the process includes an anisotropic etch that is converted to an isotropic etch. The anisotropy is also influenced by the formation of a polymer as a by-product of the etching operation on the sidewall of the trench. If the chemistry removes the polymer as soon as it forms, the etch will behave in a more isotropic way. If the polymer remains on the sidewall, only the bottom of the trench will continue to etch.
FIGS. 9A–9D show a method that includes creating a mask 210 (FIG. 9A), etching the trench 212 (FIG. 9B), forming an oxide layer 214 on the walls of the trench (FIG. 9C), which may be removed and then re-grown to remove defects (this is called sacrificial oxidation), and then filling the trench with a polysilicon layer 216 (FIG. 9D).
FIGS. 10A–10F illustrate a typical process of forming a trench MOSFET. The process starts with an N-epitaxial layer 220 grown on an N+ substrate 222 (FIG. 10A). Using the process of FIGS. 9A–9C, for example, a polysilicon-filled trench 224 is formed in N-epi layer 220 (FIG. 10B). The surface may or may not be planar depending on how the surface oxides are made in the process. Then a P-body 226 is introduced, although the P-body 226 could be introduced prior to the formation of the trench 224 (FIG. 10C). Both process flows are manufacturable, but forming the trench first is preferable because the etching process can influence the doping concentrations in the P-body. Then the surface is masked and an N+ source region 228 is implanted (FIG. 10D). An optional shallow P+ region 230 is implanted to ohmic contact between the P-body and a metal layer to be deposited later. P+ region 230 can be implanted through an opening in an oxide layer 232 that is deposited across the region and then etched to form a contact mask (FIG. 10E). The contact mask may or may not be used to define the P+ region 232. Finally, a metal layer 234 is deposited on the surface to contact the N+ source region 228 and P+ region 230 (FIG. 10F).

Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same


A laundry washing machine includes a housing with conventional washing elements within the housing. A door on a door opening of the housing enables access inside the housing to the conventional washing elements. A sensor senses color of cloth prior to passing the cloth through the door opening. The sensor is positioned so that it senses the cloth in a dedicated area outside of the machine adjacent to the door or door opening.

This section provides background information related to the present disclosure which is not necessarily prior art.
When washing clothes, it is desirable to process loads of the same color. Accordingly, white clothes are washed with white clothes and colored clothes are washed with colored clothes. If washing occurs with a mixed loads, different colors, this may reduce the washing effectiveness and damage the clothes. One example can be a misplaced colored cloth between an all-white load. Here, depending upon the washing cycle selected, the color can be transferred to the white clothes. Another example can be the mistaken selection of a high temperature washing cycle for an all colored load. The washing cycle may impact the clothes color. Further, the sorting of laundry by color is very difficult or impossible for users with a partial or complete blindness disability.
Accordingly, this disclosure overcomes the disadvantages of the prior art. This is done by sensing the color of the cloth outside of the washing machine prior to passage of the cloth into the washing machine. Additionally, a control system can identify the color of the cloth and confirm that it can be washed with the selected washing programs. Also, it is possible that the control system will deny washing if a selected washing program does not correspond to the cloth color.


A process for adjusting the steel-to-concrete bond strength in a hardened concrete structure having embedded steel elements. A source of DC voltage, preferably in the range of 5-40 volts, is connected at its negative side to the embedded steel and at its positive side to an external distributed electrode formed on the surface of the concrete structure. The external electrode may, for example, be a self-adherent electrolytic mass of moist pulp fiber, a conductive coating, or the like. Application of voltage to the structure and the resulting current flow between embedded steel and the external electrode, initially results in a progressive reduction in the steel-to-concrete bond strength. This can be particularly useful in connection with pre-tensioned or post-tensioned structures. Continued application of the voltage results in a progressive increase in bond strength, ultimately reaching a maximum strength significantly above initial values. This is useful in reinforced concrete structures, to improve the bond between the concrete and the reinforcing steel. By reference to pre-established database values, the process may be easily controlled to realize targeted modifications in bond strength. Significant improvement can also be achieved in the sealing of the interface between steel and concrete, to prevent seepage of contaminating liquids or gases along the interface.

The present invention relates to a process for the electro-chemical treatment of hardened concrete in order to modify (i.e. by increasing or decreasing) the bond strength between the hardened concrete and internally embedded steel, particularly reinforcing bars, pre-tensioning or post-tensioning rods or cables. Heretofore, this has been impossible, since there has been no known procedure for controllably changing the steel-to-concrete bond, in situ, in hardened concrete.
An additional aspect of the invention involves the modification of the steel-to-concrete interface in a hardened concrete structure to enhance the seal at such interface. Frequently, the interface seal between embedded steel reinforcing or tensioning elements is less than perfect, due to accumulation of bleeding water at the steel surface during the initial hardening of the concrete, or possibly due to insufficient compaction of the concrete when initially poured. Imperfections in the seal at the steel-to-concrete interface can result in seepages, in structures exposed to water pressure, or a possible carbonation of the concrete surfaces adjacent to the steel, with consequent corrosion of the steel.
The present invention is based in part upon the discovery that, during the electro-chemical treatment of concrete, utilizing the internally embedded steel as a cathode, and a distributed electrode structure spaced therefrom, typically at an exposed surface of the concrete, as an anode, a marked and permanent change occurs in the bond between the embedded steel and the surrounding concrete, as a function of the electrical charge applied. During an initial phase of the treatment, there is a progressive and significant reduction in the bond strength to a level far below the initial bond strength. This is followed, with continued treatment, by a progressive and significant increase in bond strength. I have observed that this variation in bond strength is both predictable and repeatable for given types of concrete. Accordingly, by establishing a simple database of relationships between a given treatment time and its effect upon the steel-to-concrete bond strength, it becomes possible to predictably modify such bond strength in an existing structure.
In the case of pre-tensioned or post-tensioned concrete structures, for example, it may be desirable to decrease the bond strength at the steel-to-concrete interface. This would tend to better accommodate flexing of the compressed concrete structural element. With static steel reinforcing bars, on the other hand, it may be desirable to effect an increased bond at the steel-to-concrete interface.
There are known electro-chemical treatments for reinforced concrete, for example, in which the internal steel is connected as a cathode and an external distributed electrode is used as an anode. An example, of such is the Vennesland et al. U.S. Pat. No. 4,832,803. Such known procedures, however, are intended for use in the rehabilitation of concrete structures which have become contaminated with chlorides, for example, or where conditions have become corrosive to the internally embedded steel, through carbonation or otherwise. While the techniques of the invention might still be usefully employed even in connection with contaminated concrete, the treatment of the invention is not a rehabilitative process, but is directed to controlling and modifying the bond at the steel-to-concrete interface. In the process of the present invention, treatment conditions and controlling parameters are altogether different than for rehabilitation.
For a more complete understanding of the above and other features and advantages of the invention, reference should be made to the following detailed description of preferred practices of the invention, and to the accompanying drawings.

Method for increasing or decreasing bond strength between concrete and embedded steel, and for sealing the concrete-to-steel interface


The present invention provides uses of compounds that bind selectively to cells undergoing perturbations and alterations of their normal membrane organization, while binding to a lesser degree to cell having membranes of normal organization. These compounds are termed perturbed-membrane-binding compounds (PMBC). The PMBC group of compounds includes new compounds and also known compounds.

Biological membranes of intact eukaryotic cells are characterized by a highly organized structure. This high level of organization is determined, among others, by the molecular structure of the specific lipids constituting the membranes; the ratio between the various lipid species from which the membrane is composed; the distribution of the phospholipids between the outer and inner leaflets of the membranes; and by the protein components of the membrane.
While maintenance of the high level of membrane organization is fundamental to normal cell physiology, substantial perturbations and alterations of the normal organization of membrane (PNOM) occur in numerous physiological and pathological conditions, and are characterizing a plurality of diseases (Martin, S., et al., 1995). Such alterations and perturbations may be evident both at the morphological level (membrane blebbing observed in cells undergoing apoptosis) and at the molecular level. The scope of perturbations accompanying either cell activation, cell disease or cell death is not fully elucidated. They include, among others, scrambling and redistribution of the membrane phospholipids, with movement to the cell surface of aminophsopholipids, mainly phosphatidylserine (PS) and phosphatidylethanolamine (PE), which are normally restricted almost entirely to the inner leaflet of the membrane bilayer, and movement of sphingomyelin and phosphatidylcholine from the outer leaflet to the inner leaflet of the membrane (Sims, P. J., et al., 2001). This redistribution is referred herein as loss of cell membrane lipid asymmetry (CMLA). These alterations play an indispensable role in making the cell surface a catalytic platform for the assembly of several clotting factor complexes, such as tenase and prothrombinase complexes (Bevers, E. M., et al., 1999). Thus, platelets undergo PNOM upon activation, and these alterations constitute an important factor in normal blood coagulation, as well as in the initiation and/or propagation of abnormal, excessive blood clotting in numerous disorders. These disorders include, among others, arterial or venous thrombosis or thrombo-embolism [e.g., cerebral stroke, myocardial infarction, deep vein thrombosis (DVT), disseminated intravascular coagulation (DIC), thrombotic thrombocytopenic purpura, etc.]; unstable atherosclerotic plaques, sickle cell disease; beta-thalassemia; anti-phospholipid antibody syndrome; among others in systemic lupus erythematosus (SLE); disorders associated with shedding of membrane microparticles, e.g., neurological dysfunction in association with cardiopulmonary bypass.
Apoptosis is another major situation in which alterations/perturbations of cellular membranes take place (Bratton, D. L., et al., 1997). Apoptosis is an intrinsic program of cell self-destruction or "suicide", which is inherent in every eukaryotic cell. In response to a triggering stimulus, cells undergo a highly characteristic cascade of events of cell shrinkage, blebbing of cell membranes, chromatin condensation and fragmentation, culminating in cell conversion to clusters of membrane-bound particles (apoptotic bodies), which are thereafter engulfed by macrophages (Bursch, W., et al., 1992). PNOM is a universal phenomenon in apoptosis, it occurs early in the apoptotic cascade, probably at the point of cell commitment to the death process, and has also been shown to be an important factor in the recognition and removal of apoptotic cells by macrophages (Van den Eijnde, S. M., et al., 1997).
A strong correlation has been recently drawn between PNOM and potent procoagulant activity of apoptotic cells (Bombeli, T., et al., 1997). PNOM in apoptotic endothelial cells, such as in atherosclerotic plaques (Mallat, Z., et al., 1997), probably plays an important role in the pathogenesis of thrombotic vascular disorders. PNOM is also a feature of inflammatory cells (i.e., lymphocytes, macrophages), activated by various triggers.
Compounds for selective binding to PNOM membranes may therefore serve as an important tool for detection and targeting of cells undergoing activation, damage or death process, especially by apoptosis. In the clinical context, binding to said membranes may be useful in: (1). a diagnostic aspect (e.g., to diagnose disease processes, to monitor course and progression of disease, to monitor the effect of various therapeutic approaches on disease course); (2). a therapeutic aspect (e.g., drug targeting to PNOM cells, and/or modulation of PNOM-associated disorders); and (3). in a clearance aspect (selective binding and removal of PNOM elements from body fluids).


Provided is a method of repair which method is capable of holding a molten brazing material at the bonding portion when a component is bonded with a brazing material to an inclined or to a curved surface. The method of repair repairs by brazing a repair portion in which a crack has developed and which needs repair, wherein a brazing material support (4) holding in the interior thereof a molten brazing material (5) is brought into contact with the repair portion, and under the condition that the brazing material support (4) is in contact with the repair portion, the molten brazing material (5) is solidified. Under the condition that the brazing material (5) in a powder form is brought into contact with the brazing material support (4), the brazing material (5) can be melted by heating to a temperature at or above the melting point of the brazing material (5). Alternatively, under the condition that the brazing material support (4) in the interior of which the brazing material (5) has been beforehand held is brought into contact with the repair portion, the brazing material (5) can be melted by heating to a temperature at or above the melting point of the brazing material (5).

For example, a stator vane, which is one of the components of a gas turbine, is exposed to the highest temperature combustion gas in a gas turbine. Accordingly, in the stator vane, inevitably develop damages such as cracks due to thermal fatigue, as a main factor, ascribable to the thermal stress at the time of start and stop. The stator vane also suffers damages due to other factors including creep damage and fatigue damage in addition to thermal fatigue.
Conventionally, when such damages develop, the damaged portions are repaired, for example, by the TIG welding and the stator vane is continuously used. Here, due to the thermal effect exerted by welding at the time of repairing and for the purpose of removing the residual stress, a deformation is caused in the stator vane. On the other hand, as the elevation of operational temperature of a gas turbine is promoted, the repair work load has been increased. Accordingly, it comes to be not easy to eliminate or minimize the deformation occurring in the stator vane. Such a deformation occurs in other machines as well as in gas turbines.
Proposals for solving these problems have been presented in Patent Documents 1 to 3.
The proposals of Patent Documents 1 to 3 are common in that a mixture composed of a powder (base material powder) of the same materials as the base of the component to be repaired and a brazing material powder is filled in the portion where the damage has developed. For example, in Patent Document 3, as shown in FIGS. 11A to 11C, the oxide layer of the surface portion of the base 70 of a stator vane of a gas turbine, which portion suffers cracks 71 developing therein, is scraped away in such a way that the cracks 71 partially remain unremoved; in the scraped portion, an equivalent-to-base material 72 (blank circles) composed of a material equivalent to the base 70 of the stator vane and a brazing material 73 (solid black circles) lower in melting point than the equivalent-to-base material 72 are filled; then, heat treatment is conducted while pressurizing with an inert gas, and thus the brazing material 73 is melted to perform the brazing of the cracks 71 by diffusion.    Patent Document 1: Japanese Patent Laid-Open No. 11-33832    Patent Document 2: Japanese Patent Laid-Open No. 11-43706    Patent Document 3: Japanese Patent Laid-Open No. 2006-46147


Embodiments of the invention provide a contention method. The contention method includes: receiving, by an access point, an uplink frame transmitted by a station; transmitting, by the access point, a frame responding to the uplink frame. The frame responding to the uplink frame is used to acknowledge the uplink frame and trigger the station to enter the next channel contention period. The contention method can acknowledge the uplink frame and trigger the station to enter the next channel contention period.

In WLAN (wireless local access network), a CSMA/CA (carrier sense multiple access with collision avoidance) contention mechanism is used. The time to initiate a contention in the contention mechanism is determined by a STA (station) according to the channel state monitored by the STA itself. Since it is an fully distributed contention mechanism, a central controller is not needed, and it is very suitable for performing contention between stations in an unauthorized frequency band, such as, ISM (Industrial Scientific Medical), TVWS and the like. And in the CSMA/CA, a size of a contention window increases with the number of collisions, thereby adapting to various scenarios with different number of stations.
However, with an increase of the number of STAs in BSS (basic service set), the system efficiency is reduced because of collisions and back-off. An OFDMA (orthogonal frequency division multiplexing access) contention is a potential solution. The OFDMA contention divides a whole channel into several subchannels, and a plurality of stations can initiate contentions on different subchannels at the same time. Therefore, the time of contentions between multiple stations can be shortened, and the probability of collisions happening can be reduced. Although there is a plurality of contention channels in the OFDMA contention, for system efficiency, the number of contention channels is generally less than that of stations. This is because the communication bandwidth is fixed, the more subchannels, the narrower the bandwidth of a single subchannel is, which leads to the fact that the time of transmitting a contention request frame gets longer in each contention. Besides, when the number of contention channels is more than that of stations, idle subchannels are wasted. Therefore, generally, the whole channel is divided into a plurality of subchannels, and all stations share all the subchannels through contention.
The number of stations succeeding in each contention is a very important factor to an OFDMA system. In one aspect, the more stations succeeding in each contention, it means the shorter the contention process is, and the less the system cost of contention is. In another aspect, the more the stations succeeding in each contention, the more frequency selective gain can be obtained.
In the single-channel CSMA/CA contention mechanism, a selection of the size of the contention window is to reduce the probability of collisions happening. However, it is different in the OFDMA contention, for the single subchannel, the probability of collisions should be reduced, however under this precondition, for different subchannels, the more the stations which initiate contentions at the same contention time, the better. Hence, The requirement of design for the contention window of the OFDMA contention is different from that of the CSMA/CA contention. Especially in the system which requires a coexistence of both stations using the two kinds of contention mechanisms, in order to ensure that the contention priority of the CSMA/CA stations is not lowered, a larger contention window may be used, which will affect the efficiency of the OFDMA contention seriously.
FIG. 1 is a schematic time sequence diagram of an OFDMA contention method in the prior art, and the entire process of contention and transmitting data includes the following steps:
the first step: a plurality of stations transmit contention frames, RTS (request to send), on a plurality of subchannels;
the second step: an AP (access point) transmits G-CTS (group CTS, the CTS is a response to the RTS frame) to all stations succeeding in the contention, and the AP allocates a resource to the stations succeeding in the contention in the G-CTS frame;
the third step: the stations succeeding in the contention transmit data on the allocated frequency and time resources; and
the fourth step: the AP replies to the stations with acknowledgement frames, G-BA (group BA, BA is block acknowledgement).
The above mentioned contention method has only one round of contention, in a situation that the number of stations succeeding in the contention is quite few due to factors such as the inappropriate contention window settings, or collisions and the like, there is no effective mechanism to further increase the number of the stations succeeding in the contention, which causes reduced system throughput.

OFDMA contention method and access point


A custom articulated ankle-foot orthosis (AFO) system is disclosed that is formed on a cast of the wearer's foot. The custom articulated AFO has an adjustably tightenable calf section hingedly connected to an adjustably tightenable foot section. The custom articulated AFO is made of thermally formable plastic sheet, is lined inside and outside, and is padded inside. The brace permits dorsal/plantar flexion while supporting the ankle against supination and pronation. The apparatus and methods of manufacture are disclosed.

Typically, individuals suffer from certain conditions of the feet that either greatly limit unaided mobility or require the use of aids such as walkers or canes in order for the individual to be mobile. Conditions which may cause this debilitating condition include tibialis tendonitis or rupture, degenerate joint disease, talocalcaneal varus or valgus, severe pronation, and/or trauma to ankle, talocalcaneal, subtalar, or midtarsal joints. To treat these conditions necessarily requires a stabilizing-type apparatus in order to stabilize the ankle area, talocalcaneal, midtarsal, and subtalar joints so that medial and lateral stability of the foot is achieved with the result that the patient enjoys the benefits of greater mobility.
Generally, the braces used for these types of ailments are large, thick, cumbersome, unattractive, and expensive. The patient must purchase a shoe or shoes that are one or many shoe sizes larger than they would normally require and must pay the expense of having a shoe made from a casting of their foot. Furthermore, less expensive, over-the-counter ankle braces do not provide adequate support and chafe sensitive areas of the feet that do not conform to the off-the-shelf brace.
In many cases of moderate or slight severity, it is desirable to affect medial (inner ankle) and lateral (outer ankle) stabilization while still permitting dorsal (upward) and plantar (downward) flexion of the foot. This permits the patient to walk more normally while still protecting the ankle joints from supination (where the ankle rolls outward) and pronation (where the ankle rolls inward). This may be accomplished by placing a hinge in the ankle-foot orthosis in line with the natural dorsal and plantar flexion of the ankle, creating an articulated ankle-foot orthosis or brace. Such hinges are typically not covered, and snag clothing and other objects.
Therefore, a need exists for an articulated AFO that is attractive, comfortable, fits in a normal-sized shoe, and does not snag clothing.

Articulated custom ankle-foot orthosis systems


A bale processor on a wheeled vehicle has a hopper converging inwardly and downwardly to a lower disintegration area at which is located a flail roller rotatable about an axis extending generally along the hopper and including a drive roller or rollers in the hopper for driving rotation of the bale around an axis parallel to the flail roller axis. The processed material is discharged from the disintegration area at the flail roller through an opening in one side wall of the hopper to form a row along that side of the vehicle. A container for particulate material, such as grain, to be added to and mixed with the processed material is carried at the side wall opposite the discharge opening and has an auger tube extending from the container to the hopper at a height below the flail roller and mid way along the side wall so as to introduce the grain into the processed material to mix therewith in the disintegration area.

U.S. Pat. No. 5,340,040 (Bussiere et al.), U.S. Pat. No. 6,578,784 (Lischynski) issued Jun. 17, 2003 and U.S. Pat. No. 6,708,911 (Patterson) issued Mar. 23rd 2004 to Highline Manufacturing Inc. disclose details of a known type of bale processor in which there is provided a hopper with two end walls and two side walls converging inwardly and downwardly to a discharge area at the bottom of the side walls. One of the side walls has an opening at the discharge area to allow material to be discharged. Within the hopper is provided one or more driven rollers which act to rotate the bale around its axis arranged longitudinally of the hopper. At the bottom of the hopper is provided a flail roller which rotates around an axis longitudinally of the hopper and carries a priority of flails for engaging and removing the baled crop material to be discharged through the discharge opening. The disclosures of these patents is incorporated herein by reference so that further details not specifically disclosed herein may be obtained by reference to those documents.
Mixing of grain and/or other particulate additives to hay for feeding animals is well known and widely used. Various arrangements for mixing using drums and the like are well known. In recent years bales crop materials have been processed using a machine of the type of Highline above and as shown in U.S. Pat. No. 6,199,781 (Hruska) issued Mar. 13th 2001 and U.S. Pat. No. 6,644,575 (Farrell) issued Nov. 11th 2003 attachments have been provided for such machines by which the particulate additive is applied onto the row of hay along side the machine after the hay has been laid. Thus a container is attached to the front or rear of the machine and a conveyor carries the material to the rear of the vehicle to drop the material onto the row.
Another machine is disclosed in U.S. Pat. No. 6,467,710 (Patterson) issued Oct. 22nd 2002 which uses a conveyor carrying bales to a disintegration system which co-operates with another conveyor for the particulate material to drop the two materials onto a discharge conveyor. This arrangement is less satisfactory because it does not use the hopper type bale processor which has become well established in this industry.

Bale processor with grain mixing attachment


A welding system includes a power source configured to generate power and deliver the power to a welding electrode. The power source comprises a positive stud and a negative stud. The welding system also includes control circuitry configured to determine whether the welding electrode is properly connected to the positive and negative studs of the power source.

The present disclosure generally relates to welding systems, and more specifically, to systems and methods to improve the operability of welding systems.
A wide range of welding systems and welding control regimes have been implemented for various purposes. For example, metal inert gas (MIG) techniques allow for formation of a continuing weld bead by feeding welding wire shielded by inert gas from a welding torch. Electrical power is applied to the welding wire and a circuit is completed through the workpiece to sustain an arc that melts the wire and the workpiece to form the desired weld.
Proper operation of the welding systems may rely on the knowledge of an operator to make appropriate electrode connections within the welding system. Unfortunately, an improper electrode connection may result in a poor quality weld with associated rework, thereby reducing the efficiency and operability of the welding system.

System and method for determining attachment and polarity of a welding electrode


An electric motor for blowers in motor vehicles, having a motor housing which includes as its housing components a pole housing and a bearing lid mounted on the pole housing, and having an electronics housing for receiving electronic components of an electronic unit. To lower the production costs for the electric motor, the electronics housing is embodied in two parts at least one of which is attached to a housing component of the motor housing.

1. Field of the Invention
The invention is directed to an improved electric motor, particularly for blowers in motor vehicles.
2. Description of the Prior Art
It is known for the control electronics for electronic speed control of the blower to be accommodated, along with corresponding electronic components for suppressing distortion from the motor, in an electronics housing that is protected from splashing water, and to make the electrical connection with the motor via a cable extended out of the electronics housing. The electronics housing is secured as a separate component to a body of the blower or fan driven by the electric motor.