In a staple remover wherein a pair of pointed teeth engage with a second pair of teeth to remove a staple the improvement which comprises providing a pair of clamping plates at the opposite end thereof.

1. Field of the Invention
The present invention relates to staple removers having pivotally mounted jaws and more particularly pertains to such staple removers which may be used to remove staples when one end only of the staple is left after attempted removal.
2. Description of the Prior Art
The use of staple removers are known in the prior art. More specifically, such devices heretofore devised and utilized for the purpose of removing staples are known to consist basically of familiar, expected and obvious structural configurations, notwithstanding the myriad of designs encompassed by the crowded prior art which have been developed for the fulfillment of countless objectives and requirements. Illustrative of such devices are U.S. Pat. Nos. 4,205,823; 4,903,945; 4,921,216; 4,674,727.
Staple removers having pivotally mounted pointed teeth to engage with and remove staples occasionally will dislodge only one leg of a staple or perhaps breaks the staple in attempted removal. When this happens the device is usually useless in rectifying the situation.
In this respect, the staple remover according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in so doing provides an apparatus primarily developed for the purpose of removing staples whether whole or broken.
With the present invention, clamp plates are provided on the opposite end of the staple remover so that if a staple is broken or only partially removed, the protruding staple or broken end thereof may be engaged by such plates and the removal completed.
Therefore, it can be appreciated that there exists a continuing need for new and improved staple removers. In this regard, the present invention substantially fulfills this need.


The present invention discloses a method for manufacturing a flash memory cell by using a trench method which can eliminate an increase of a stepped portion in a flash process as compared to a logic process by forming a floating gate on a STI portion since the floating gate is added to the flash memory as compared to a logic process. The method comprises the steps of: forming a plurality of trenches on both sides of the center of a silicon substrate; forming a trench isolation by filling the trenches with an insulating material; controlling a bonding ratio between floating gates by controlling the width and depth of the trench isolation at the both sides of the silicon where a tunnel oxide film grows within one cell; depositing a tunnel oxide film and then performing a well formation and a threshold voltage ion implantation; forming a floating gate within the trench isolations by depositing a floating gate polysilicon and then patterning the same into a predetermined shape; sequentially forming an ONO layer and a control gate poly on the patterned floating gates; and forming a control gate by sequentially etching the control gate poly and the ONO layer.

1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a flash memory cell by using a trench method which can acquire a margin of subsequent processes as well as making a logic and a flash memory into one chip by forming a floating gate of the flash memory within a shallow trench isolation (STI).
2. Description of the Related Art
In the prior art, the floating gate of a flash memory is formed on a Si wafer, thus a height generated upon forming the floating gate imposes a burden on a contact process and becomes more serious as the process technique becomes finer. Further, from the viewpoint of making one chip with logic, an increase in the stepped portion during a logic process and a flash memory process causes a reduction in the margin of a contact process and the subsequent processes.

Method for manufacturing a semiconductor device


An inserter for simultaneously creating a bone tunnel and delivering an all-suture anchor. The inserter is capable of inserting into the bone tunnel a soft, non-rigid suture anchor by forming a bone tunnel (to serve as an anchor receiving area) and simultaneously, in one motion, delivering the soft suture anchor to the anchor receiving area. The soft suture anchor is made entirely of non-rigid materials including, but not limited to, filaments of soft, malleable materials such as those commonly used to make sutures. The inserter is able to not only carry or deliver the all-suture anchor into a bony substrate, but is able to do so without having to preform a hole in the bone.

1. Field of the Invention
This invention relates to all-suture anchors made entirely of suture material and inserters for inserting such anchors into tissue at a surgical site. More particularly, this invention relates to devices for percutaneously inserting or driving all-suture anchors into a surgical site.
2. Description of the Prior Art
Anchors are commonly employed during surgical procedures to provide a reliable attachment location for sutures in or against a substrate, those attached sutures then being used to capture and retain other objects, such as soft tissue or bone. The substrate may be bony tissue or soft tissue such as ligaments, tendons, etc. In the case of bony tissue, suture anchors are generally inserted into and retained in a pre-formed hole in the bone, so that suture extends from the anchor out of the hole. In the case of soft tissue, suture anchors generally are placed on a side of the soft tissue such that suture extends through a hole in the tissue to extend beyond the soft tissue on a side opposite the anchor.
Soft suture anchors have recently been developed from filaments of suture material which are retained within pre-formed bone holes by being deformable to increase their diameter to a size greater than that of the bone hole, to thereby reside within the cancellous bone and under the bone cortex. One such suture anchor is disclosed in U.S. Patent Publication 2012/0290004, published Nov. 15, 2012, assigned to the assignee hereof and incorporated by reference herein. Since soft anchors are commonly made entirely of suture materials, they are sometimes called "all-suture" anchors.
The necessity for a pre-formed hole when using all-suture anchors in bone requires extra instrumentation and extra steps in the process of implanting soft suture anchors. The extra steps involve making a pilot hole in the bone with either a drill, a broach or a punch and then removing the instrument. The hole thus created is an anchor receiving area, but once this space is created the instrument must be removed to allow the all-suture anchor to be inserted by an inserter and then deployed. While so-called "self-punching" inserters, drivers or applicators have been known to be used with some suture anchors which are hard enough to withstand the stresses of insertion without pre-drilling, there remains a need for a self-punching inserter for soft, all-suture anchors.
Accordingly, it is an object of this invention to produce a self-punching inserter suitable for inserting all-suture anchors into bone.
It is another object of this invention to produce a self-punching inserter capable of percutaneously driving an all-suture anchor into place at a surgical site.


A current sensor includes a magnetic detection unit capable of detecting the magnetism, a first magnetic shield and a second magnetic shield. The first magnetic shield includes a first shield section and two second shield sections respectively connected in the vicinity of the two ends thereof. The second magnetic shield includes a third shield section and two fourth shield sections respectively connected in the vicinity of the two ends thereof. Between the first shield section and the third shield section is a conductor placement region, and the magnetic detection unit is positioned between the first shield section and the conductor placement region and is provided at a magnetic field canceling position where the magnetic field in the second direction is substantially zero at non-energized times after a prescribed current has flowed in the conductor, in relationship to the length of the two fourth shield sections along the third direction.

The present invention relates to a magnetic sensor and method of manufacturing such, a magnetic control device and a current sensor design method.
In the past, current sensors have been used in battery level measurement, motor drive current measurement, and electric power control equipment such as converters, inverters or the like, in hybrid electric vehicles (HEV) and electric vehicles (EV) and the like. In such current sensors, current flowing in a conductor such as a bus bar or the like is detected in a non-contact state by a magnetic detection element such as an MR element, Hall element or the like, for example,
In a current sensor, the magnetic field generated from the conductor due to the flowing of the current is detected by the magnetic detection element, but when a magnetic field is applied from outside on the magnetic detection element, the detection accuracy of the current sensor deteriorates. In order to control this deterioration of detection accuracy, providing a magnetic shield surrounding the periphery of the conductor and the magnetic detection element such as an MR element or Hall element has been proposed. In order to prevent deterioration of current detection accuracy when a magnetic field arising in the gap between two magnetic shields is applied diagonally on a magnetron conversion element, Patent Literature 1 discloses making the height position of the gap and the height position of the sensor substrate formed by the magnetron conversion element the same.

Magnetic sensor and method of manufacturing such, magnetic control device, and current sensor design method


Disclosed are materials and systems useful in determining the existence of radionuclides in an aqueous sample. The materials provide the dual function of both extraction and scintillation to the systems. The systems can be both portable and simple to use, and as such can beneficially be utilized to determine presence and optionally concentration of radionuclide contamination in an aqueous sample at any desired location and according to a relatively simple process without the necessity of complicated sample handling techniques. The disclosed systems include a one-step process, providing simultaneous extraction and detection capability, and a two-step process, providing a first extraction step that can be carried out in a remote field location, followed by a second detection step that can be carried out in a different location.

The presence of radioactive materials in water can come about due to the actions of mankind as well as acts of nature. For instance, while contamination of ground and surface waters can come about as a result of the release of radioactive material from various types of industrial and research facilities, in other cases, the presence of radioactive materials in ground or surface waters is due merely to the presence of these materials in the surrounding geological structures. Accordingly, examination of water for the presence of these contaminants is often desirable, even when the water may appear to originate from a pristine source.
Radiochemical analysis methods have been developed for determining the existence and level of such contamination. Current methods generally include multiple steps including an initial concentration step, in which the contaminants are removed from the sample, for example with an extraction medium, e.g., a chromatographic column or a filtration material, followed by purification of the contaminant and subsequent quantification of the radionuclide of interest. One example of such multi-step procedures is described in U.S. Pat. No. 6,126,901 to Patch, et al.
Researchers have also proposed methods for the direct determination of the presence of the radiochemicals while still on the extraction medium. For example concentration and direct detection of gamma-ray radiation on a column has been described (see, e.g., Link, J. M., Analytical Chemistry, 71 (1999) 2700-2707, and Headrick, J., Analytical Chemistry, 72 (2000) 1994-2000) as has concentration and direct detection of beta-particle radiation (see, e.g., Bosworth, N., Nature, 341 (1989) 167-168; Li, M., Analytical Chemistry, 66 (1994) 824-829, and U.S. Pat. No. 4,568,649 to Bertoglio-Matte). U.S. Pat. No. 6,303,936 to DeVol, et al. discloses an extraction-scintillation medium of substantially free-flowing, porous, solid particulate matter having one or more fluors retained within the particulate matter and an extraction agent adsorbed or otherwise bound to the surface of the particulate matter for the concentration and direct detection of, e.g., alpha-particle radiation. The devices of DeVol, et al. can be beneficially located in-line for monitoring the effluent from an industrial or research facility. U.S. Pat. No. 6,139,749 to Goken, et al. discloses a sorptive or reactive separator that can be incorporated in particulate form via embedding in a porous web or membrane or via attachment of the separator moiety to fibers of a fibrous matrix.
While the above described methods and materials describe certain advances in the art, room for improvement and further advances exist.

Methods and systems for detection of radionuclides


Disclosed is a method and apparatus for concentrated thermal radiation heat transfer from an electrically produced source of light. Whereby, the electromagnetic energy is conveyed from the source through lens assemblies for collection and distribution. The concentrated thermal radiation can be utilized locally or remotely through optical fiber systems. It can be collected on metal or other collecting surfaces and can heat various mediums. The heated medium can then be transferred by way of ventilation, pumps. or natural dispersion. The concentrated heat can be utilized without the use of a collection surface directly into its surroundings. In this embodiment the light from the source can also be put to use without the need for optical fiber systems or other devices. The array of lens assembles and optical fiber systems can be molded together out of plastic, glass, or other materials to minimize the cost of manufacturing.

1. Technical Field of the Invention
The present invention relates to a means for transferring, concentrating, collecting and utilizing thermal radiation from an electrically produced light source.
2. Prior Art
A previous attempt to produce a heat transfer system using the heat emanating from a regular light bulb as in U.S. Pat. No. 7,020,388 issued to Mills, Mar. 28, 2006 appears to have limited practical use. This system can only use one layer of direct heat from the source. Using only the ambient temperature would provide a minimal amount of heat per watt of electricity used.

Concentrated thermal radiation transfer system from electrically produced source


A method for preventing a restenosis within a vessel wall requires a medicament be delivered at predetermined locations into the vessel wall and allowed to subsequently disperse in a predetermined pattern. To deliver the medicament, a catheter with an expanding member is advanced into the vasculature of a patient until the expanding member is located as desired. The expanding member is then expanded to force dispensers into the vessel wall to the proper depth. A medicament is then pumped through the dispensers to create a plurality of equally spaced, localized medicinal deliveries which subsequently disperse to medicate an annulus shaped volume within the vessel wall.

Angioplasty is a widely used procedure for treating a stenosis within a body vessel such as a human artery. During an angioplasty procedure, a medical catheter having an inflatable balloon attached to a catheter shaft is advanced within the lumen of the body vessel until the balloon is adjacent to the stenosis. Next, the balloon is inflated causing the stenosis to compress into the vessel wall and the lumen of the vessel to dilate.
Although the angioplasty procedure is generally successful in dilating the lumen of the vessel and thereby allowing increased blood flow through the vessel, often times a restenosis occurs soon after the angioplasty procedure. It is widely recognized that the bodies response (inflammation) to tissue damage that occurs during the angioplasty procedure contributes to the restenosis. Several medicaments are known to be efficacious in the prevention of a restenosis if properly delivered near the site of the inflammation.
Heretofore, a number of devices have been suggested for use in conjunction with an angioplasty procedure to obviate a restenosis. For example, one such device utilizes a balloon to position a plurality of apertures against the vessel wall near the stenosis. After positioning the apertures, a medicament is released from the apertures, where the medicament contacts the endothelium layer of the vessel. Unfortunately, use of the aperture device generally results in an insufficient amount of medicament being delivered to the target area because a large portion of the released medicament does not penetrate the vessel wall, but rather, is washed away into the blood stream. Further, due to the toxic nature of some of the medicaments used in this procedure, the large portion of medicament entering the bloodstream can cause adverse health effects to the patient.
Also heretofore, devices capable of penetrating the wall of a vessel with a dispenser and releasing a medicament within the vessel wall have been disclosed. For example, U.S. Pat. No. 5,713,863, filed on Jan. 11, 1996 and entitled "Catheter With Fluid Medication Dispensers" and which is assigned to the same assignee of the present invention, discloses such a device.
It is to be appreciated that the use of devices with expanding members and penetrating dispensers will cause some trauma to the vessel wall. Specifically, as indicated above, dilation of the vessel lumen with a balloon or other expanding member is generally known to cause tissue injury to the vessel wall. Further, penetration of the vessel wall with a dispenser will certainly cause some injury to vessel wall tissue. Finally, the release of a medicament within the vessel wall will also cause some injury to the tissue of the vessel wall.
These various forms of tissue injury will trigger an inflammation response. As indicated above, this inflammation response is widely recognized to contribute to the restenosis of the vessel. It is also known that this inflammation response will cause localized changes near the injured tissue including increased permeability and increased blood flow. This localized increase in blood flow and permeability will generally increase the dispersion rate of medicaments released near an injury in a vessel wall.
For a medicament to be effective in preventing a restenosis it must be delivered to a prescribed area and in a prescribed dosage. As indicated above, the size, shape and location of the prescribed treatment area is dependent on the amount and location of tissue injury. On the other hand, the amount of tissue injury is dependent on a number of factors including the size of the balloon, the number of penetrating dispensers and the amount of medicament released. Further, the dispersion rate of the medicament will be affected by the amount of inflammation, the type of medicament, and the amount of medicament released. Consequently, all of these factors must be considered when determining the arrangement of the dispensers and the amount of medicament to be released at each dispenser that will result in a uniform dispersion of medication at the prescribed treatment area.
In light of the above, it is an object of the present invention to provide a method useful for preventing a restenosis caused by trauma to vessel tissue from an intravascular procedure. It is another object of the present invention to provide a method for preventing a restenosis in a vessel by delivering a medicament at predetermined locations within the vessel wall for dispersion into a prescribed shape that takes advantage of the increased medicinal dispersion rate due to the localized inflammation created by the procedure. It is yet another object of the present invention to prevent a restenosis by delivering a medicament at predetermined locations within a vessel wall to create a circumferential dispersion of the medicament within the vessel wall near a stenosis. Another object of the present invention is to safely deliver dangerous medicaments into a vessel wall while minimizing the amount of medicament which is washed away into the blood stream. Still another object of the present invention is to provide a method for treating a vessel which is easy to perform, safe, relatively simple, and inexpensive to perform.

Method for delivering medication into an arterial wall for prevention of restenosis


An apparatus and method pertains to calculating and presenting compensating values for one or more professions. An apparatus generates a user interface that prompts a user for a job description entry and a geographic location entry. The apparatus has a database to store salaries, each salary associated with a job description and a geographic location. The apparatus retrieves from the database salaries whose job description and geographic location matches the job description entry and the geographic location entry. The apparatus compiles retrieved salaries to generate a median salary, which is transmitted to a user device.

1. Field of the Invention
The present invention pertains to calculating and presenting compensation information for one or more jobs.
2. Background of the Invention
Similar to a commodity that is dictated by supply and demand of the marketplace, a person's service is perceived along similar values. For example, is the person's skill is in high demand such that it is difficult to recruit people with such skills? What is a reasonable compensation level for a person with a particular skill at a particular region? Does the person's current salary make the person susceptible to being scouted by another company?
A salary that a person receives for their services rendered is extremely important to that person because it directly affects the person's livelihood. If the person believes that their services rendered are more valuable than what is being compensated, there is likelihood that the person will seek a job elsewhere. However, salary information is not readily available making it difficult for a current or potential employer or employee to determine what is a reasonable level of compensation.
Previously, an employee or potential job seeker could receive salary information from job advertisements or from articles contained in a newspaper or magazine. However, salaries obtained from job advertisements are usually a perceived value of a potential employer based on their own circumstances and not necessarily what the market perceives as a reasonable salary. Concerning salary data contained in newspapers and magazines, they may be outdated as of the time of publication or may not be collected nor analyzed methodically. Thus, they do not reflect a true compensation level. Furthermore, this information may not be particular to the employee or job seeker's situation, thus may not be useful information.
From an employer's point of view, not knowing compensation levels of various positions in the company may be problematic. If the employees perceive that they are being underpaid, the employees may leave before the company can react to the compensation demands. Furthermore, without knowing a value placed on a skill in the marketplace, it is difficult for a employer to form a compensation package to entice people with those skills. Some employers have avoided making this decision by placing the onus on the potential employee to inform them as to what a reasonable salary should be. Others have relied on consulting firms to provide them with market salary information on various positions within the company. However, consulting fees are extremely expensive and the employer may not be able to obtain that information on a need basis. Further, such information is not available to an average person seeking a job.

Apparatus and method for providing compensation information


A security device may be configured to receive information regarding traffic that has been outputted by a particular user device; and compare the information regarding the traffic to security information. The security information may include device behavior information, traffic policy information, or device policy information. The security device may determine, based on the comparing, that a security threat exists with regard to the traffic; and take, based on determining that the security threat exists, remedial action with respect to the traffic. Taking the remedial action may include preventing the traffic from being forwarded to an intended destination associated with the traffic, providing an alert, regarding the security threat, to the particular user device, or providing an alert, regarding to the security threat, to another device.

Networks, such as networks found in consumers' homes, may connect various different devices to other networks, such as the Internet. Such networks are often targets of malicious attacks, in which unauthorized devices may attempt to send traffic through the network, or connect to other devices in the network in an unauthorized or unsafe manner. As another example, devices may be hijacked to behave in unexpected or unauthorized ways. For instance, a personal computer may be infected with a virus or other malware, which may cause the personal computer to send a relatively large number of emails in a brief period of time. Additionally, as home automation devices with network connectivity (such as light switches, temperature sensors, power outlet monitors, etc.) proliferate the market, security risks may arise, in which unscrupulous or negligent manufacturers or vendors of such home automation devices may invade the privacy (or may otherwise compromise the security) of users' home networks.


The system and method for real-time monitoring of a hydrocarbon reservoir (4) during extraction include an electro-magnetic source assembly (16) for transmitting a first plurality of electromagnetic fields. A plurality of seafloor antennae (30a–30d) is distributed over an area of the seafloor (8) corresponding to the reservoir (4), where each antenna (30a–30d) comprises recieves electrode array (30a–30d) adapted for receiving a second plurality of electromagnetic fields and generating signals corresponding to the detected fields. A data logging processor receives the signals over time and stores data corresponding to the signals. Different combinations of the receiver electrode are used in combination with transmitter antennae for measuring vertical, radial and/or azimuthal fields. Transmission and detection of the fields can be performed continuously or at timed intervals during hydrocarbon extraction to estimate the rate and efficiency of extraction.

Measurement of electrical resistivity beneath the seafloor has assumed an important role in hydrocarbon, e.g., oil or natural gas, exploration and reservoir assessment and development. Seismic methods had traditionally been used for such purposes, however, the results could be ambiguous. Several electromagnetic methods have been developed for mapping sub-seafloor resistivity variations. See, for example, U.S. Pat. No. 5,770,945 of Constable (magnetotelluric methods), U.S. Pat. No. 6,522,146 of Srnka (controlled EM source), International Publication No. WO 03/048812 of MacGregor and Sinha (controlled EM source), and International Publication No. WO 01/57555 of Rees (controlled EM source). The disclosure of each of the identified patent documents is incorporated herein by reference. Controlled EM source (CSEM) methods are well known in the art and have become almost routine for mapping of electrical conductivity of the seafloor in very shallow to deep ocean water, achieving seafloor penetration depths as great as 30 km in 5 km of water. Such methods have provided significant economic savings in terms of avoiding the costs of drilling test wells into sub-seafloor structures that do not contain economically recoverable amounts of hydrocarbon. However, to date, applications of these methods to hydrocarbon reservoirs have been limited to identification and mapping of hydrocarbon-filled layers.
Once it has been located and tapped, it is important to monitor changes in the hydrocarbon reservoir during gas/oil extraction for optimal production. One existing technique involves the drilling of discrete monitoring wells, which, in addition to being expensive and time consuming, are incapable of providing a comprehensive image of reservoir geometry due to the small number of sampling locations. Another technique involves the placement of sensors in the extraction well or "well-logging", in which the drill string is withdrawn, instruments are inserted for measurement then withdrawn, and the drill string is replaced. Other existing methods include repeated, or time lapse, seismic surveys, also known as 4-dimensional seismic modeling. Seismic surveys involve the use of air gun arrays to generate loud seismic pulses at the surface which are reflected by boundaries between the layers of rock and the hydrocarbon reservoir. The seismic method measures acoustic properties of the sub-seafloor structure, which are less well correlated with actual hydrocarbon content than is electrical resistivity. In addition, due to the hazards to those who operate the air gun or are located nearby and the damage to or disturbance of marine life in a wide area around the pulses, continuous or repeated seismic surveying is both undesirable and impractical for extended monitoring applications. Further, borehole seismic surveying involves expensive well down-time.
Accordingly, the need remains for a system and method for economically monitoring a reservoir over time for enhanced recovery of hydrocarbon from the reservoir with minimal damage to the environment from the monitoring technique.

System and method for hydrocarbon reservoir monitoring using controlled-source electromagnetic fields

The Regents of the University of California


A method for choosing the first candidate to be loaded from a series of job requests for a mix mode multimedia player is disclosed. A job table having a plurality of rows is provided. Each row for a job has a job message with a “Priority” status, a “Usage status” status, and an “Examining function” status. The jobs are generated by a loader manager module of the mix mode multimedia player according to the job requests. The job messages of the jobs are arranged according to the “Priority” status in order. Then, the first candidate is chosen according to the following steps. The “Usage status” status of the job message is examined. If the “Usage status” is “used”, the “Examining function” status of the job message is examined. At last, If the “Examining function” status is “Critical”, the job is set as the first candidate.

In 21-century, our amusements become more various than ever before. People can acquire information of scenic spots around the world or enjoy those pleasured and famous films at home just through a digital video disc (DVD) player. The DVD player plays the discs with extremely high quality to be good to hear and see as people are personal on the scene. People can get certain degree of satisfactions on scene organs without going to the theater. Still a further benefit is that people can repeat any section of the film which they want to see again without any restrictions.
Under the considerations of cost down and designing products with more capabilities in competitions, IC manufacturers endeavor to integrate their IC chips with more and more functions, such that a typical DVD player usually can play multimedia files in various formats recorded on a multimedia disc such as DVD, VCD, SVCD, CDR, CDRW etc. . . . For example, those file formats including MPEG, JPEG, MP3, MP4, and WAV, could be played by a conventional DVD player. However, the conventional DVD player cannot control playing operations of video and audio data independently, because those video and audio data are usually interleaving encoded in the conventional multimedia files. A user cannot control a conventional DVD player to a file with pure audio data; meanwhile to control the DVD player to play another file with pure video data. In other hand, a DVD player cannot play those files with pure video data while setting the files with pure audio format. If the DVD player cannot play the video and audio data separately or independently, the video data is played with interference when the audio data is set to be played at the same time, or the audio data is played with interference when the video data is set to be played at the same time. Moreover, a user want to set the video data to be played, but cannot set the audio data to be played at the same time. Moreover, it is also impossible for a user to set playing controls independently, such as stopping or pausing a current playing operation, or actuating a forward- or backward-winding operation on those of audio data or video data while the DVD player is just playing them.
An object of the present invention is to provide a mix mode multimedia player, which can play the audio format data and video format data by independently controlling without coupling. The present invention is particularly focus on the method of examining a job request to be loaded from many candidates on a job request table.

Method of choosing the first candidate to be loaded from a series of job requests for a mix mode multimedia player


Security device for preventing access to confidential information stored in a semiconductor chip, or protected chip. The security device comprises a second semiconductor chip, or protective chip, with the two chips facing each other and being coupled to each other by communication terminals. The protected chip is coupled to external circuits via the protective chip, and the two semiconductor chips are separated by a semiconductor resin having a non-homogeneous electrical resistivity. The protective chip is provided with means for measuring a plurality of resistances through the semiconductor resin and with means for determining, at least from the measured resistances, an encryption key intended to be communicated to the protect chip to protect the confidential information.

Secure electronic memory systems include security devices generally implanted in electronic modules, known as security application modules (SAM). These modules are very important as they contain confidential information, such as bank keys, the discovery of which would enable access to all of the electronic transaction system.
The confidential information to be protected is usually written into an electronic layer of a semiconductor chip, or microchip, with a passivation layer generally covering the electronic layer.
The passivation layer may not be a sufficient obstacle to gaining access to the confidential information, especially if sophisticated means are used to read the information through the passivation layer. Such reading means may utilize scanning techniques of the particle beam type, for example.
Existing security devices for safeguarding the confidential information include devices employing conventional intrusion sensors adapted to protect an enclosure containing the semiconductor chip with the information.
Two other approaches are known which protect the semiconductor chip from exterior reading.
The first approach masks the pattern of the semiconductor chip to be protected, for example by means of metalization, a grid of dummy circuits or a diamond carbon layer.
The second approach stores the confidential information in a volatile RAM type memory and possibly combines it with random numbers that are changed continuously. The information is then accessible only by means of an operating system that controls access. The principles used are identical to those used for cards on which a microprocessor is mounted, also known as smartcards or chipcards. With the second approach, the information contained in the RAM is always lost if the power supply to the semiconductor chip is interrupted. In such case, access to the information is not impossible providing the following are known:
(a) how to remove the covering of the semiconductor chip package when it is active (i.e., ON rather than OFF), without causing short-circuits that would lead to the loss of information, PA1 (b) the exact schematic of the semiconductor chip circuitry, PA1 (c) the memory scrambling table, PA1 (d) the address of the confidential information in the memory, and PA1 (e) the correct manner of writing and reading the address bus and the data bus in real time.
However, the various techniques mentioned hereinabove have the disadvantage of being ineffective if highly sophisticated tampering means are employed or of being costly, particularly when using a diamond carbon layer mask.

Security device for a semiconductor chip


A computer system having a microprocessor that provides bus control signals indicative of bus transaction types such as memory read, memory write, I/O read, and I/O write, generates a variable frequency clock for use by the microprocessor. The computer system also includes a clock generator and a control circuit. The control circuit instructs the clock generator to provide one of a plurality of clock frequencies based on the type of bus transaction specified by the CPU's bus control signals. Typically, I/O transactions cause the control circuit to instruct the clock generator to provide a low frequency clock. In an alternative embodiment, address signals may be used in conjunction with the bus control signals to define which one of a plurality of clock frequencies shall be selected.

1. Field of the Invention
This invention relates generally to an information processing device for use in personal computers, workstations, etc., and more particularly to a system for controlling the frequency operation or execution time of a bus cycle to be executed by the central processing unit (CPU) of an information processing device.
2. Description of Related Art
The recent progress in the techniques for increasing the operational rate of CPUs, dynamic random access memories (DRAMs), and erasable programmable read only memories (EPROM) has been phenomenal. Accompanying this progress, makers of personal computers have annually developed and marketed new products with improved processing rates. The clock frequency of the CPU is substantially increased and DRAMs, EPROMs or such memory units are employed as high speed memory for improving performance. However, although the CPU and memory speed have been significantly improved, the operational speed of Input/Output (I/O) devices and units employed in conjunction with such CPUs have not been correspondingly increased. Accordingly, when the clock frequency of the CPU is increased, the operational speed of associated CPU memory is as high as that of the CPU. However, the associated I/O device cannot operate at the processing speed of the CPU. As a result, some means is necessary for solving this problem.
Conventionally, this problem has been dealt with by employing the READY terminal of the CPU to cause the CPU to wait for the slower execution action of the I/O device, i.e. when the CPU accesses the I/O device, the I/O device inactivates the READY signal in order to cause the CPU to wait while the I/O devices completes the execution of instructions. As a result, the high speed CPU and the low speed I/O device are operationally congruent with one another.
The foregoing conventional method is now explained by means of the following examples. FIGS. 35 and 36 are explanatory views of a referenced information processing device. This referenced information processing device has been set up for the purpose of clarifying the differences between the invention of this application and the conventional art. The parts of the information processing device which are not directly relevant to this invention have been much simplified or omitted since they are not necessary to the explanation of this invention. Accordingly, the referenced information processing device is a little unnatural compared with the conventional information processing device but is illustrated as such because of the convenience and clarity it brings in understanding the invention of this application. The conventional method of increasing the processing or operational speed of the referenced information processing device is illustrated in FIGS. 35 and 36.
FIG. 31 illustrates a referenced information processing device. FIG. 32 is a timing diagram illustrating the operation of the information processing device of FIG. 31. In FIG. 31, CPU 21 is an 8 MHz version of the INTEL 80286. Relative to the terminals of CPU 21, CLK represents a clock input terminal and is supplied with a frequency twice an operational speed of CPU 21. Three signals, M/ IO, SI, SO are state discrimination signals representing the state of a bus cycle of CPU 21. These signals indicate the states set forth in Table 1 below. In Table 1, the corresponding signals are only those relevant to the description of this application.
TABLE 1 ______________________________________ ##STR1## ##STR2## ##STR3## Bus Cycle Corresponding Signals ______________________________________ 0 0 0 Interrupt Acknowledge 0 0 1 I/O Read ##STR4## 0 1 0 I/O Write ##STR5## 0 1 1 None (Idle) Hold or Shutdown 1 0 1 Memory Read ##STR6## 1 0 1 Memory Read ##STR7## 1 1 1 None (Idle) ______________________________________
Table 1 illustrates the correspondence between the bus cycles respectively with M/IO, SI, and SO. READY represents a ready terminal. When the signal at the ready terminal is high, extended bus cycles are activated into operation and when the signal is low, the bus cycles are terminated. In FIG. 31, for simplifying the explanation, READY is set low. A23-A0 are address buses. D15-D0 are data buses. A command decode circuit 2 produces command signals MEMR, MEMW, IOR, IOW) corresponding to the state discrimination signals M/IO, SI, SO indicative of the states of the bus cycles. The output of an oscillation circuit 23 is 16 MHz which is the clock signal for CPU 21.
FIG. 32 illustrates the timing relationships among the respective signals in the circuit of FIG. 31 and the timing diagram of four bus cycles executed by CPU 21. T31 represents the memory read bus cycle; T32, the I/O read bus cycle; T33, the memory write bus cycle; and T34, the I/O write bus cycle. Each of the bus cycles comprises two clock cycles TS and TC. Each of the clock cycles comprises two CLK pulses. Each of the CLK pulses has a frequency of 16 MHz, and the period of each cycle TS, TC is 125 ns (f/sec.). The period of each of the four bus cycles T31, T32, T33 and T34 is 250 ns. CPU 21 outputs the state discrimination signals M/IO, SI, and SO to discriminate relative to the respective bus cycles. Command decode circuit 2 decodes these state discrimination signals into corresponding command signals, i.e., MEMR relative to the bus cycle T31, IOR relative to the bus cycle T32, MEMW relative to the bus cycle T33, and IOW relative to the bus cycle T34. Each signal MEMR, IOR, MEMW and IOW has a pulse width of 125 ns.
FIG. 33 is a block diagram of the conventional method employed in connection with a referenced information device for providing an increase in the processing speed of a referenced information device shown in FIG. 31. In FIG. 33 CPU 201 is a 12 MHz version product of the INTEL 80826. Oscillation circuit 213 has an output pulse of a higher frequency comprising 24 MHz. When the clock frequency of CPU 201 is increased from 16 MHz to 24 MHz relative to the circuit of FIG. 31, the periods of the respective bus cycles (T31-T34) in FIG. 32 change from 250 ns to 167 ns, i.e., the cycle periods are shortened by approximately 33%. The memory read bus cycle and the memory write bus cycle can be executed in a period of 167 ns without any difficulty by employing a high speed memory. It is difficult, however, to operate an I/O device in 167 ns period because the processing speed of the I/O device has not been improved like that of memory units and substantially the same I/O bus cycle period as found in the referenced information processing device of FIGS. 31 and 32 is required. As a result, it is necessary to use the READY signal to provide an extended wait period for the execution of the I/O read bus cycle and I/O write bus cycle. READY control circuit 216 provides this extended wait function for the I/O bus cycle. No wait is necessary for the memory bus cycles. Command decoder circuit 212 in FIG. 33 also has the function of extending the pulse of the IOR and the IOW signals during a wait period in addition to the function of the command decoder previously described in connection with FIG. 31.
FIG. 34 is a flow diagram of the timing relationships among the respective signals in the circuit of FIG. 33. As in FIG. 32, the timing diagram of four bus cycles are shown. Each CLK pulse has a frequency of 24 MHz, and the period of each of clock cycles TS and TC is 83 ns. The period of each memory read bus cycle T21 and memory write cycle T23, which are provided with no wait, is 167 ns. In contrast to this, each I/O bus read bus cycle T22 and I/O write bus cycle T24, which are provided one wait in accordance with a wait signal, comprises three clock cycles TS, TC and TC, i.e., the periods of these bus cycles are 250 ns and are the same as those of bus cycles T32 and T34. An IOR signal and an IOW signal in bus cycles T22 and T24 are the most active among the inserted clock cycles TC and have a pulse width of 167 ns.
In the referenced information processing device of FIGS. 33 and 34, the READY signal is causes CPU 201 to wait in order to extend the bus cycles to thereby adjust the operational speed of a slower I/O device. Conventionally this method has caused substantially no problems. However, recently there have occurred situations indicating that this method is not perfect and is undesirable. Recently, personal computers have been progressively standardized. The specifications of especially the so called option slots, the connectors for expansion boards, have been fairly standardized. The option slots are connectors provided in personal computers for receiving expansion boards optionally used by users when they need functions in addition to those basically provided by personal computers manufactures. The expansion boards are supplied in a wide variety of types and kinds by personal computer manufacturers themselves and also by special expansion board third party vendors. Thus, expansion boards for the personal computers are becoming more and more important. Accordingly when personal computer manufactures merchandise new products, they are forced to design them beforehand so that a number of expansion boards produced for already marketed products can also operate on these new products.
The following assumptions are made relative to the circuits of FIGS. 31 and 33. The circuit of FIG. 31 is an already marketed product and the circuit of FIG. 33 is a new product and the I/O read bus cycle and the I/O write bus cycle are the bus cycles on an expansion board to be connected to the option slot provided in these information processing. devices. Further, it is assumed that an expansion board has been designed for an already marketed product, i.e., it is assumed that the expansion board has been designed so that the respective signals have the timings of the bus cycles T32 and T34 in FIG. 32. But each of bus cycles T22, T24 in FIG. 34 are given one wait to agree with the bus cycles T32, T34 only in the bus cycle period but differ from the bus cycles T32, T34 in other points. Compared with only the bus cycle T24, the pulse width of an IOW signal, for example, is different from that of the bus cycle T34, i.e., the pulse width of the bus cycle T34 is 125 ns, but that of the bus cycle T24 is 167 ns. The setup time and the hold time for data to be written via D15-DO for the IOW signal are different from those of the bus cycle T34. Thus, some expansion boards will not operate in connection with a new product based upon the operation of circuit of FIG. 33.
On the other hand, a microprocessor will be discussed from a viewpoint other than that from which has been discussed the information processing device.
The clock frequency of the microprocessor has been increased year by year in conjunction with the progress of semiconductor high speed digital design and fabrication. The information processing device manufacturers have also realized and now appreciate the importance of compatibility among their products, i.e., when an information processing device manufacturer merchandises a new version or product of their already marketed product, they take into consideration third party vendor application software and hardware, such as option boards, which already functionally operate with their marketed product, to provide their compatibility with their new version. The most common means to provide for this compatibility is to provide two frequencies is the same as that of the microprocessor of the old product and the other is the maximum operational clock frequency of the microprocessor of the new version or product. For example, in the case where the clock frequency of the microprocessor of the old product is 6 MHz, and that of the new product is 12 MHz, the new product has two clock frequencies of 6 MHz and 12 MHz, and operation is switched between these frequencies, e.g., by a switch. Usually new products are operated at the clock frequency of 12 MHz, but when an application program for the old product does not operate properly at the higher frequency of the new product due to a difference in processing speed, the clock frequency is switched to 6 MHz. Thus, the compatibility between the old and the new products can be assured by this approach. Thus, relative to these circumstances, the clock frequency switching circuit of the microprocessor has become an important function.
FIG. 35A is an example of a conventional clock frequency switching circuit for switching clock frequencies of microprocessor 1, such as an INTEL 80C286. The maximum clock input frequency is 24 MHz. This 80C286 microprocessor requires a clock of a frequency twice the internal operational speed and the microprocessor having the maximum clock input frequency of 24 MHz is called a CPU 12 MHz version. Oscillation circuit 306 provides an output frequency signal of 48 MHz called CLKI. A switch 305 provides the switching operation for the clock frequency of CPU 1. When switch 305 is in its lower position, signal S is of low level (L). When switch 305 is in its higher position, signal S is of high level (H). Flip flop (FF) 312 synchronizes signal S to produce a signal C.sub.A. Frequency dividing circuit 307 functions as a frequency bisecting circuit when the signal C.sub.A is L. When signal C.sub.A is H, circuit 307 functions as a frequency quartering circuit. Frequency dividing circuit 307 comprises two FFs. When their Q outputs are represented by Q.sub.A and Q.sub.B respectively, with C.sub.A =L, (Q.sub.A,Q.sub.B) changes from (0,0) to (1,1) and to (0,0), and with C.sub.A =H, (Q.sub.A,Q.sub.B) changes from (0,0) to (1,0), to (1,1), to (0,1) and to (0,0). This state transition is illustrated in FIG. 35C.
With reference to the general operation of the conventional information processing device of FIG. 35A, when the switch 305 is in its lower position, C.sub.A =L, frequency dividing circuit 307 functions as a frequency bisecting circuit. As a result, the frequency of the CLKO signal for CPU 1 is 24 MHz as compared to the frequency of 48 MHz of the CLKI signal to circuit 307. When switch 305 is in its higher position, C.sub.A =H, and frequency dividing circuit 307 functions as a frequency quartering circuit. As a result, the frequency of the CLKO signal is 12 MHz, i.e., frequency dividing circuit 307 in FIG. 35A switches the frequency between 24 MHz and 12 MHz to supply designated clock pulses to the CPU clock terminal. Here, as shown in FIG. 35B, C.sub.A =0 means the same as C.sub.A =L, and C.sub.A =1 means the same as C.sub.A =H. FIG. 35C is state transition diagram for the circuit of FIG. 35A. FIG. 35D illustrates the timing relationship relative to signals CLKI, S, C.sub.A, Q.sub.A and CLKO.
FIG. 36 is another conventional method for switching between different frequencies of operation. In this conventional method, respective outputs CLKI 1 and CLKI 2 from two different oscillation circuits 316, 326 are switched by clock switching circuit 317 to supply either of these clock frequencies as an output, CLKO. Oscillation circuit 316 provides an output frequency of 24 MHz and oscillation circuit 326 provides an output frequency of 12 MHz. Oscillation circuits 316, 326 oscillate independently of each other and are not synchronized. Accordingly, there is a danger that pulses of a narrow width are provided as an output, CLKO, when the clock rate is switched. Clock switching circuit 317 is, therefore, provided with a device to prevent the output of pulses not having the required specifications.
Thus, in the conventional approach provided in FIG. 35A, the oscillation circuit having a frequency as high as 48 MHz for original maximum oscillation is necessary in order to supply to CPU clock rates of 24 MHz and 12 MHz but comes at the expense of providing improper waveforms, particularly with narrower pulse shapes. In the conventional method of FIG. 36, two oscillation circuits are necessary but with a lower original maximum oscillation frequency compared to FIG. 35A. However, there is also the disadvantage of producing improper clock waveforms for the CPU. In addition, the costs of these circuits are high. Furthermore, clock switching circuit 317 is complicated, because two different unsynchronized two clock signals (CLKI 1, CLKI 2) are being switched.
Its a primary object of this invention to provide for dynamic or on-the-fly changing of bus cycle timing for a CPU in an information processing device in accordance with required changes in the clock frequency of operation of the CPU.
Another object of this invention is to provide a method for increasing the clock frequency of a CPU in the product design of new information processing devices which have been designed with higher operational frequencies to be compatible with higher frequencies of certain I/O devices, such as high speed memories, with shortened bus cycles thereby increasing the overall processing speed of the new product, while providing for compatibility with the timing relationships of clock dependent operational signals and cycles of such a new product with those of an older such product without limiting the operational frequency exclusively to the time periods for bus cycles required for timing compatibility for older applications provided via the device option slot, e.g., those corresponding to the I/O read bus cycle and the I/O write bus cycle of the conventional type and explained with reference to FIGS. 31-34.
Another object of this invention is to provide an information processing device with an innovative clock circuit which successfully provides for reduced costs over the frequency switching solutions of the prior art of FIGS. 35 and 36 while solving problems encountered in the prior art in providing the correct clocking signal waveform and frequency.

CPU clock generator having a low frequency output during I/O operations and a high frequency output during memory operations


In accordance with an embodiment, an electronic device includes a secure element configured to implement a plurality of operating systems; and a near field communication module coupled to the secure element by a single bus and by a routing circuit configured to route routing data between the plurality of operating systems and a receive circuit of the near field communication module.

Complex electronic devices, such as cell phones, tablet computers, computers, etc. integrate, over time, more and more functionalities and enable to implement digital services in order to integrate at best to everyday life. As an example, certain cell phones, and more particularly smart phones, integrated digital services such as a bank payment service, or also a service of use of public transport tickets, event tickets, an authentication of the user by a remote system (bank, public administration, etc.). To implement such functionalities, the devices may integrate electronic components specific to these functionalities, such as for example secure components which enable to keep/store identification, reference, and authentication information, generally called "credentials", and assets of the digital service provider, motion sensors, a near field communication module (NFC), etc.
A difficulty resulting from the addition of new functionalities is that this may compel certain electronic components to implement a plurality of, at least two, operating systems. Further, difficulties may arise from the cohabitation of a plurality of operating systems with different components/peripherals which are connected thereto.


A method for thermally stabilizing an optical parametric oscillator (OPO) 10 to maintain constant optical path length for stable high power output places a beam dump 32 outside an OPO cavity 18. The OPO 10 has a nonlinear crystal 22 within cavity 18 for splitting a single input pump beam 14 into lower energy signal and idler beams 16, 18. The method includes providing a cavity exit port for unconverted pump and generated idler beams, and absorbing unconverted beams in beam dump 32. The method includes athermalization by actively cooling surfaces used as an optics mounting base, and athermalization by constraining the size of cavity 18 by using thermally stiff members, guiding pins or rails, or by using bimetallic materials with different expansion.

The power output of an optical parametric oscillator (OPO) is predicted to be path length dependent. Experimental data for a particular OPO configuration show that path lengths must be maintained to within +/−50 micrometers of the peak position to maintain a power level of 95% of the peak power. To stay within 95% of the relatively stable portion of the power curve, slightly below peak power, path length changes of approximately +/−150 micrometers can be tolerated. The power output of another OPO configuration is even more path length dependent requiring path length changes of only +/−10 micrometers to maintain power levels to within 95% of the peak power. To stay within 95% of the relatively stable portion of the power curve, path length changes of approximately only +/−35 micrometers can be tolerated.
The path length of an OPO can be very dependent on thermal conditions, so athermalization is necessary. In one OPO, the unused pump energy of the IR pump source, as well as the idler energy is absorbed in a beam dump, contained within the OPO cavity. The beam dump is cooled using a closed loop chiller system, in which the chiller water first passes through the bulk of the OPO cavity (in channels running through the base plate), and is then in direct contact with the beam dump. After contacting the beam dump, the coolant returns to the chiller. Because of thermal loading, the chiller temperature is found to increase by approximately 2° C. over an 8-hour period. The coolant never reaches an equilibrium temperature, although the temperature rise slows with time. The output power reaches 95% of the final value within 1.5 hours of start up.
Thermal modeling of the OPO indicates that path lengths are strongly affected by thermal loading and the cooling configurations. Coolant temperature has a strong influence on the optical path length in the OPO, with a 2° C. rise in coolant temperature resulting in an approximately 75 micron path length change. Coolant temperature is determined by the chiller set point and by thermal loading due to the OPO internal heat sink. Ambient air temperature has only a very slight effect on the path length, with temperature rises of approximately 5° C. resulting in only a 2 micrometer increase in path length.
The path length of an OPO can be very dependent on thermal conditions. Thermal modeling of the OPO indicates that path lengths are strongly affected by thermal loading and the cooling configurations. Coolant temperature has a strong influence on the optical path length in the OPO, with a 2° C. rise in coolant temperature resulting in an approximately 75 micron path length change. The strong dependence of path length on coolant temperature and thermal loading result in a system that is not robust in terms of output power. In addition, long warm up times are required so that coolant temperature comes close to equilibrium. It will be appreciated that it would be highly desirable to have a method for controlling temperature to achieve a optical parametric oscillator that is robust in terms of power output.

Athermalization of an optical parametric oscillator


A disk device includes a main control unit controlling the operation of a controlled object on the basis of an error signal calculated from a target signal of the controlled object and an observation signal of the controlled object, a repetitive control unit sampling the error signal with a sampling clock pulse to obtain a repetitive signal component generated in synchronization with rotation of the disk medium from the sampled error signal, a sampling clock generation unit generating the sampling clock pulse and resetting a timing at which the sampling clock pulse is generated in accordance with a rotation detecting pulse and a sampling clock limit unit limiting generation of the sampling clock pulse at a timing immediately before generation of the rotation detecting pulse.

1. Field of the Invention
The present invention relates to a disk device configured to record information in and/or reproduce information recorded in a disk medium such as an optical disk or a magneto-optical disk and a disk drive controlling method applied to the disk device and more particularly to a technique used in the case that a disk is rotationally driven to perform servo control.
2. Description of the Related Art
A disk recording device that records information in a disk medium such as an optical disk or a magneto-optical disk and a disk reproducing device that reproduces information recorded in the disk medium as mentioned above include servo systems. For example, each of the above mentioned devices includes an optical pickup unit configured to emit and/or receive laser light with which a signal recording surface of an optical disk is irradiated and hence a mechanism that servo-controls the optical pickup unit may be necessary. Specifically, a focusing servomechanism for a biaxial actuator of the optical pickup unit, a tracking servomechanism and a gap servomechanism for a biaxial actuator of an optical head used in a near field may be necessary.
Incidentally, in the following description, devices configured to record data in and/or reproduce data recorded in a disk-shaped recording medium such as an optical disk by rotationally driving the disk-shaped medium such as the disk recording device and the disk reproducing device of the above mentioned types will be generally referred to as disk devices.
In the case that a voice signal and an image signal recorded using the disk device are to be reproduced, the optical disk is rotated at a high speed, for example, using a spindle motor and the rotation frequency of the spindle motor is accurately controlled using a rotation frequency control circuit. Upon high-speed rotation of the spindle motor, accurate detection of a pit will be necessary even when slight positional displacement is observed in a pit array or a substrate surface is slightly deflected. Therefore, a control system of a disk device includes a servo control unit that repetitively performs highly accurate control processing on, for example, a focusing operation and a tracking operation.
The servo control unit is configured to control operations by paying attention to the fact that, in the case that input signals of almost the same waveform are repetitively input into a control system, the input signal is of the type having a repetitive waveform and by reflecting ever occurred control errors in the currently performed control every time the input signal is repetitively input.
Upon sampling a target signal, an existing servo control device samples the target signal with a sampling signal which is in synchronization with rotation of an optical disk. In general, an output signal sent from an encoder installed in a spindle motor or obtained from a clock pulse recorded in a disk is used as the sampling signal. The output signal is in the form of N (N is an integer) pulses generated for one rotation in synchronization with rotation of the spindle motor or the disk and N sampling signal are obtained by using the output signal.
Incidentally, in the case that an encoder is not mounted on a spindle motor or it is difficult to reproduce a clock pulse from a signal recorded in a disk, a pulse signal has been typically generated on a one wave-for-one disk rotation basis from a control signal of a Hall element used to control the spindle motor. Typically, a PLL (Phase-locked loop) circuit has been configured by using the one wave-for-one rotation pulse signal as a basic clock signal so as to obtain a sampling signal of N pulses for one rotation generated in synchronization with the rotation of a disk. Generation of a one-wave pulse signal for one rotation of a disk may be relatively readily realized by attaching a Hall element to a spindle motor used.
Japanese Laid-open Patent Publication No. 2006-313589 describes an example of a configuration of a disk device to which the above mentioned servo system that performs the above mentioned repetitive servo control is applied.

Disk device and disk drive controlling method


A method is disclosed for forming a semiconductor device using strained silicon. After forming a first substrate material with a first natural lattice constant on a device substrate and a second substrate material with a second natural lattice constant on the first substrate material, a channel, source and drain regions of a field effective transistor are further defined using the first and second substrate materials. After implanting one or more impurity materials to the source and drain regions, and the transistor goes through an annealing process using a high speed heat source other than a Tungsten-Halogen lamp.

The present invention relates generally to semiconductor devices, and more particularly to a method to improve carrier mobility, through the incorporation of strained silicon, in semiconductor devices.
Metal-Oxide-Semiconductor field effect transistors (MOSFETs) are a common component of integrated circuits (ICs). By continually reducing the gate oxide thickness, and the length of the gate electrode, the semiconductor industry has doubled the transistor's switching speed every eighteen to twenty-four months, a phenomenon popularly known as the Moore's Law. The strategy of shrinking both the gate oxide thickness, and the source drain length, has allowed the Moore's Law to uphold in the past, but the technology market's insatiable desire for increasing switching speed is causing the strategy to reach its limits. Newer strategies, such as switching to new materials for the transistor's substrate, and the incorporation of new process methods to effectively use these new materials, are, therefore, designed and applied.
One such strategy for increasing the performance of MOSFETs is to enhance the carrier mobility of silicon (Si), thereby reducing resistance and power consumption, and increasing drive current, frequency response and operating speed. A method of enhancing carrier mobility that has become a focus of recent attention is the use of silicon material to which a tensile strain is applied. "Strained" silicon, or strained-Si, may be formed by growing a layer of silicon on a silicon germanium (SiGe) substrate or base. The silicon germanium lattice is generally more widely spaced than a pure silicon lattice as a result of the presence of the larger germanium atoms in the lattice. Because the atoms of the silicon lattice align with the more widely spread silicon germanium lattice, a tensile strain is created in the silicon layer. In other words, the silicon atoms are essentially pulled apart from one another. The amount of tensile strain applied to the silicon lattice increases with the proportion of germanium in the silicon germanium lattice.
Relaxed silicon has six equal valence bands. The application of tensile strain to the silicon lattice causes four of the valence bands to increase in energy and two of the valence bands to decrease in energy. As a result of quantum effects, electrons effectively weigh 30 percent less when passing through the lower energy bands. Thus the lower energy bands offer less resistance to electron flow. In addition, electrons encounter less vibrational energy from the nucleus of the silicon atom, thereby causing them to scatter at a rate of 500 to 1,000 times less than in relaxed silicon. As a result, carrier mobility is dramatically increased in strained silicon as compared to relaxed silicon, thereby offering a potential increase in mobility of 80 percent or more for electrons and 20 percent or more for holes. The increase in mobility has been found to persist for current fields of up to 1.5 megavolts/centimeter. These factors are believed to enable a device speed increase of 35 percent without further reduction of device size, or a 25 percent reduction in power consumption without a reduction in performance.
The abruptness of the source and drain extensions is critical in strained-Si technology. One difficulty is that dopants are observed to diffuse faster in strained-Si than in Si, thereby causing drain extensions to move further under the gate and increasing gate-to-drain capacitance. Also, the diffusion of germanium across the SiGe-to-silicon boundary will release stress and reduce mobility in the strained Si layer.
In further consideration, the junction depth for source and drains should be only 35–75 nm deep for the 100 nm generation of devices to go into production in the near future, while drain extensions should only be less than 20–35 nm deep.
Therefore, desirable in the art of semiconductor designs are additional designs that may reduce the implant energy and annealing time, thereby achieving higher carrier mobility as well as shallower junctions.

Thermal anneal process for strained-Si devices

Taiwan Semiconductor Manufacturing Co. Ltd.


A method and apparatus for enhancing electronic images allows for improved characteristics between light areas and dark areas, and is particularly effective for backlit images. A transition between light and dark image portions is detected. A determination is made from an analysis of spectral distributions as to whether an image portion is backlit. Upon detection, image data is adjusted to lighten or darken image portions to allow for improved image viewing. Use of cumulative probability distribution data associated with an electronic image facilitates isolation of backlit image portions and object image portions.

The subject application is directly broadly to image enhancement, and is particularly applicable to captured images of backlit specimens. However, it will be appreciated that the concepts disclosed herein are particularly applicable to any image enhancement wherein two or more portions of captured image have distinct lighting, brightness, or contrast characteristics.
Electronically encoded images are ubiquitous. Today, such images may be captured directly from a device, such as a digital still camera or digital video recorder, scanned in from other media, such as photographs, captured from streaming media, such as a live television feed, or consist of one or more previously obtained images retrieved from storage, such as from numerically encoded image archives. Many such images were either captured under less-than-ideal conditions, or with equipment that rendered a resulting image less than optimal due to variations in lighting or other properties on various aspects of a captured image. One example is images that are taken in a backlit setting. Such a situation may result when a bright sky, direct sunlight, or any other relatively intense background illumination source is situated behind an object of interest, such as a building, person or landscape feature. The background illumination in such a situation is sufficiently intense that detail or resolution of the foreground image or object, the backlit image portion, or both is compromised. Earlier approaches to address such concerns have been made algorithmically, electrically, via signal processing or mechanically (such as through filtration, f-stop, aperture size, and the like during image capture). However, earlier systems focused on capture or processing of an image as a whole, such that attempts to address concerns for one portion of an image would adversely impact other aspects of the image.
Captured or stored images are typically stored in an encoded format, such as digitally, which encoding is often done in connection with component values of a primary color space. Such color components are suitably additive in nature, such as red-green-blue (RGB), or subtractive, such as cyan, yellow, magenta (CYM), the latter of which is frequently coupled with a black color (K), referred to as CYMK or CYM(K). Additive primary color space descriptions are generally associated with images displayed on light generating devices, such as monitors or projectors. Subtractive primary color space descriptions are generally associated with images generated on non-light generating devices, such as paper printouts. In order to move an image from a display to a fixed medium, such as paper, a conversion must be made between color spaces associated with electronic encoding of documents.
The concepts disclosed herein are better appreciated with an understanding of various numeric models used to represent images, and image colorization, in image processing or rendering applications. One of the first mathematically defined color spaces was the CIE XYZ color space (also known as CIE 1931 color space), created by CIE in 1931. A human eye has receptors for short (S), middle (M), and long (L) wavelengths, also known as blue, green, and red receptors. One need only generate three parameters to describe a color sensation. A specific method for associating three numbers (or tristimulus values) with each color is called a color space, of which the CIE XYZ color space is one of many such spaces. The CIE XYZ color space is based on direct measurements of the human eye, and serves as the basis from which many other color spaces are defined.
In the CIE XYZ color space, tristimulus values are not the S, M and L stimuli of the human eye, but rather a set of tristimulus values called X, Y, and Z, which are also roughly red, green and blue, respectively. Two light sources may be made up of different mixtures of various colors, and yet have the same color (metamerism). If two light sources have the same apparent color, then they will have the same tristimulus values irrespective of what mixture of light was used to produce them.
CIE L*a*b* (CIELAB or Lab) is frequently thought of as one of the most complete color models. It is used conventionally to describe all the colors visible to the human eye. It was developed for this specific purpose by the International Commission on Illumination (Commission Internationale d'Eclairage, resulting in the acronym CIE). The three parameters (L, a, b) in the model represent the luminance of the color (L: L=0 yields black and L=100 indicates white), its position between red and green (a: negative values indicate green, while positive values indicate red), and its position between yellow and blue (b: negative values indicate blue and positive values indicate yellow).
The Lab color model has been created to serve as a device independent reference model. It is therefore important to realize that visual representations of the full gamut (available range) of colors in this model are not perfectly accurate, but are used to conceptualize a color space. Since the Lab model is three dimensional, it is represented properly in a three dimensional space. A useful feature of the model is that the first parameter is extremely intuitive: changing its value is like changing the brightness setting in a TV set. Therefore only a few representations of some horizontal "slices" in the model are enough to conceptually visualize the whole gamut, wherein the luminance is suitably represented on a vertical axis.
The Lab model is inherently parameterized correctly. Accordingly, no specific color spaces based on this model are required. CIE 1976 L*a*b* or Lab mode is based directly on the CIE 1931 XYZ color space, which sought to define perceptibility of color differences. Circular representations in Lab space correspond to ellipses in XYZ space. Non-linear relations for L*, a*, and b* are related to a cube root, and are intended to mimic the logarithmic response of the eye. Coloring information is referred to the color of the white point of the system.
Electronic documents, such as documents that describe color images, are typically encoded in one or more standard formats. While there are many such formats, representative descriptions currently include Microsoft Word file (*.doc), tagged information file format ("TIFF"), graphic image format ("GIF"), portable document format ("PDF"), Adobe Systems' PostScript, hypertext markup language ("HTML"), extensible markup language ("XML"), drawing exchange files (*.dxf), drawing files (*.dwg), Paintbrush files (*.pcx), Joint Photographic Expert Group ("JPEG"), as well as a myriad of other bitmapped, encoded, compressed or vector file formats.
It would be advantageous to have a system and method that allowed for ready conversion of any such encoded images to address loss of image quality associated with portions of an image being subject to different illumination or lighting characteristics.

Automatic image enhancement using computed predictors


Embodiments of the present invention may provide a coating material having heat resistance, abrasion resistance and low friction characteristics, which is coated on an operating component such as a rotating shaft working at a high speed without oil supply in a medium temperature environment (400° C.˜500° C.). This is so that the operating body can sufficiently withstand friction, heat generation and abrasion caused by contact with a bearing. The coating material of the present invention comprises 15 to 25 wt % antimony trioxide (Sb2O3), 50 to 70 wt % binder, 10 to 20 wt % tungsten disulphide (WS2) and 5 to 15 wt % silver (Ag). The binder comprises 60 to 80 wt % nickel (Ni) and 20 to 40 wt % chromium (Cr).

1. Field
The present invention generally relates to coating materials, and more particularly to a coating material having low friction characteristics and heat and abrasion resistance, which is coated on a component (e.g., rotating shaft) adapted to operate in a medium temperature environment (400 to 500° C.) so as to minimize any friction and abrasion between such component and a bearing supporting the same. The present invention is further directed to a method of coating said coating material.
2. Background
Air bearings, which use hydrodynamic properties of air, are generally used to support a rotating shaft in a high-speed rotating apparatus. An example of such type of apparatus includes an air cycle machine (an essential part of an air conditioning system for aircrafts), a gas turbine, a turbo-charger, an auxiliary power device or the like. An air foil journal bearing is one example of such air bearings. The air foil journal bearing includes a bump foil and has inherent stiffness and damping property according to the shape of the bump foil.
FIG. 1 is a sectional view illustrating an assembled structure of a rotating shaft and an air foil journal bearing of prior art.
As shown in FIG. 1, the air foil journal bearing 1 includes: a housing 2; a shim foil 4 provided along the inner peripheral surface of the housing 2; a bump foil 6 located on the shim foil 4; and a top foil 8 provided on the bump foil 6 and being subjected to a load acting vertically with respect to the axial direction of the rotating shaft 9. The existing air blowers or compressors, which are operated at high speeds, are deficient in that cooling systems must be equipped thereto since the rotating shaft and the bearing are prone to damage due to a rapid temperature rise caused by a rubbing phenomenon. As one of the approaches for dealing with such a problem, the foils 4, 6 and 8 are typically made from the INCONEL material in order to enhance the durability and operation reliability at high temperatures. Particularly, the surface of the top foil 8, which is in direct contact with the rotating shaft 9, is coated with a hybrid type solid lubricant. Alternatively, a sol-gel coating or a coating material including molybdenum oxide (MoS2) may be applied to the top foil 8. Further, the abrasion resistance and lubrication may be enhanced by coating a coating material 9′ containing chromium oxide (Cr3O2) (e.g., "CORONA 910/920" disclosed in U.S. Patent Application Publication No. US2007/0003693A1 (Lee et al.)) on the surface of the rotating shaft 9 by plasma spraying.
The above-mentioned prior art coating materials have a low limited life for abrasion since they are applied thin on the surface of the top foil. The CORONA 910/920, which is coated on the rotating shaft, exhibits its ability only at a high temperature of greater than 750° C. Those materials cannot guarantee a good lubricating ability when applied to a turbomachinery such as a turbocharger, which is operated at a medium temperature of 400 to 500° C.
Accordingly, there is a need in the art to develop a coating material capable of withstanding friction, heat and abrasion, which occur due to contacting the bearing, when the rotating shaft is rotated at a high-speed without any oil supply in a medium temperature environment of 400 to 500° C. (particularly when the rotating shaft starts or stops). There is a further need in the art to develop a coating method that allows the durability of the coating material to be retained for a long time.

Medium temperature coating material for high speed turbomachinery and method of coating same

Korea Institute of Science and Technology


A light-emitting device of the present invention includes: a semiconductor layer 1 including a light-emitting layer 12; a recess/projection portion 14 including recesses and projections formed in a pitch larger than a wavelength of light emitted from the light-emitting layer 12, the recess/projection portion 14 being formed in a whole area or a partial area of the surface of the semiconductor layer which light is emitted from; and a reflective layer formed on an opposite surface of the semiconductor layer to the surface from which light is emitted, the reflective layer having a reflectance of 90% or more. According to the light-emitting device having such arrangement, the light can be emitted efficiently by synergetic effect of the reflective layer and the recess/projection portion.

In recent years, the development of a light-emitting device is remarkable which adopts a III-V compound (hereinafter, referred to as "nitride") or II-VI compound formed with a quantum well therein and generates light by binding electrons with holes respectively in the quantum well with electric current applied from outside.
A material which is used mostly as the III-V compound is a GaN of the nitride. Commencing with the GaN, the refractive index of the nitride is larger than 1. Accordingly, there is a problem in extracting light from a light-emitting device to the atmosphere. For example, in the case of the GaN as an example, the refractive index is about 2.5. Accordingly, light incident to a normal line on a boundary between the GaN and the atmosphere at an angle which is larger than a predetermined angle (for example, 23.6 degrees) is not emitted to the atmosphere but totally reflected on the boundary surface and trapped in a GaN layer in the light-emitting device. Hereinafter, a conical area formed in an area having an angle smaller than a predetermined angle with respect to the normal line is referred to as an "escape cone."
Most part of light trapped in the GaN layer is reabsorbed in a crystal and an electrode material and changed to a heat, and is not extracted to outside. Therefore, there is a problem that the light-extraction efficiency is not improved when a flat GaN layer is used.
Therefore, with respect to such problem, the Patent Document 1 discloses, as shown in FIG. 34, a technology of forming rectangular recesses and projections having a pitch of 2 to 4 μm and a depth of λ*(2n+1)/4(n=1, 2, . . . ) on a light-extraction surface through which the light from the light-emitting device is emitted. According to this technology, light rays reflected respectively on the recesses and projections eliminate each other by having a difference of λ/2 in a phase. Accordingly, the light reflected on the light-extraction surface is reduced. Consequently, the light-extraction efficiency can be improved.
Further, the Patent Document 2 discloses, as shown in FIG. 35, a technology of forming a periodically ordered boundary face structure on a predetermined boundary face of an LED to improve the light-extraction efficiency. According to this technology, the light-extraction efficiency of light incident at an angle equal to or larger than the total reflection angle is improved. In accordance with a shape, doubled light-extraction efficiency can be obtained as compared to the case where there is no such structure.
Here, it is known that the light-extraction efficiency of light extracted from one boundary face or surface in the case where there is no normal surface shape can be given by n22/4*n12 when it is taking in consideration a solid angle of the escape cone and given that n1 being a refractive index of a portion including a light-emitting layer and n2 being a refractive index of an outer portion. Thus, in the case where a semiconductor layer is the GaN and its exterior is air, the light-extraction efficiency is calculated to be 4% since it is given that n1=2.5, n2=1. Further, if the light is extracted from all of the surfaces other than the bottom surface, and the structure is formed only on the upper surface so that the doubled light-extraction efficiency is obtained, a light-extraction efficiency of 24%=4*4 (side surfaces)+4*2 (doubled as the upper surface having recesses and projections) can be obtained.
Further, the Non-Patent Document 1 discloses, as shown in FIG. 36, a technology of forming a random texture or applying a rough finishing onto a surface of a semiconductor LED. According to this technology, an angular distribution of a light ray in the device is made random by the random texture formed on the surface. After taking multiple paths in accordance with the device structure, a possibility that the light escapes becomes high. Consequently, the light-extraction efficiency can be improved. It should be noted that a hatched layer in FIG. 36 is an active layer.
However, according to the respective methods shown in the Patent Documents 1, 2, light incident at an angle equal to or larger than the total reflection angle is not extracted from the GaN. Accordingly, there is a predetermined limit in improvement of the light-extraction efficiency. Further, since the recesses and projections are formed on the surface, the incident angle of light extracted from one point light source becomes wider as compared to the flat surface. However, the light-extraction efficiency at an angle where the light is essentially emitted is reduced. Accordingly, merely double at most in improvement in the light-extraction efficiency can be obtained.
Further, the Patent Document 2 also discloses a method for improving the light-extraction efficiency by adopting a resonator structure to limit distribution of emitted light to be within the escape cone. However, since the resonator structure is adopted in this method, accuracy in a resonator length (thickness of a semiconductor layer) is required. Accordingly, it becomes difficult to improve an extraction rate. Further, in the resonator structure, controlling all of the emitted light to be within the escape cone is fundamentally impossible, and improvement in the light-extraction efficiency is limited to about 50%.
Further, in the technology of the Non-Patent Document 1, a light ray taking multiple paths is absorbed by a reflective layer such as an electrode and reduces its strength drastically before it escapes. Further, even if a reflectance of the reflective layer is improved, the light-extraction efficiency may be rather reduced in the case where not only a pitch but also a shape is random, as can be seen in FIG. 36. Accordingly, the light-extraction efficiency is not improved. This fact is confirmed by experiments performed by the inventors of the present invention. In the experiment, a random and rough shape of surface obtained by applying a wet etching to polycrystal silicon is transferred onto and duplicated on the light-extraction surface.    Patent Document 1: Japanese Unexamined Patent Publication No. HEI07-202257    Patent Document 2: Japanese Unexamined Patent Publication No. HEI10-4209    Non-Patent Document 1: Schnitzer, et al. In Applied Physics Letters 63, 2174 (1993)


Die-to-die communication links for receiver integrated circuit dies within multi-die systems and related methods are disclosed for radio frequency (RF) receivers. The disclosed embodiments provide die-to-die communication links that allow for direct communication of operating parameters between receiver integrated circuit dies and other integrated circuit dies within a multi-die system so that the operation of receive path circuitry can be adjusted without requiring intervention from an external host processor integrated circuit. A variety of operating parameter information can be communicated through the die-to-die communication links so that the integrated circuit dies can quickly adjust to changing signal conditions without requiring intervention by the external host processor integrated circuit.

Current radio frequency (RF) receiver integrated circuits (ICs) often convert analog signals associated with broadcast channels to digital information and then perform digital processing on this digital information to generate digital data associated with a selected channel. As part of this digital processing, digital clocks are utilized to operate analog-to-digital converters and digital processing blocks. These digital clocks, however, can generate undesirable spurs at frequencies within the broadcast channels being tuned. Frequency planning can be used to adjust digital clock frequencies among a number of specific pre-determined clock frequencies to cause such interfering spurs to fall outside the frequency range for the channel to be tuned. However, this frequency planning can be difficult to achieve, and where multiple receive paths are included in close proximity such as within a single integrated circuit or within a multi-chip package so that multiple different channels can be tuned at the same time, frequency planning can become practically impossible to achieve for certain combinations of channels and digital clock spurs being selected and generated by the digital clocks associated with the different receive paths.
A host processor integrated circuit (IC) is often used to provide operational commands to an RF receiver integrated circuit as part of a larger RF system. The RF system can also include a demodulator integrated circuit that demodulates the output signals provided by the receiver integrated circuit. The host processor IC can utilize information received from the receiver circuitry and/or the demodulator circuitry to control how the receiver circuitry and/or the demodulator circuitry operate within the larger RF system. However, these external communications and related control paths between the host integrated circuit and the receiver and/or demodulator integrated circuit can be relatively slow compared to the signal reception environment being experienced by the RF system. As such, it is often difficult for the host processor integrated circuit to adjust operation of the components within the RF system quickly enough to account for rapid changes in signal conditions. As such, overall performance of the RF system can be degraded. For example, where the RF information being tuned is audio information, the audio content can include undesirable pops/clicks or other undesirable artifacts. And where the RF information being tuned is video information, the video content can include freezes/glitches or other undesirable artifacts. These undesirable artifacts are preferably avoided to maintain an adequate user experience.

Die-to-die communication links for receiver integrated circuit dies and related methods


The invention relates an epoxysuccinamide derivative represented by the general formula (1) ##STR1## wherein R.sup.1 and R.sup.2 are the same or different from each other and independently represent H or an aromatic hydrocarbon group or aralkyl group which may be substituted, or R.sup.1 and R.sup.2 may form a nitrogen-containing heterocyclic ring together with the adjacent nitrogen atoms, R.sup.3 is H or an acyl group, R.sup.4 is H or an aralkyl group, and R.sup.5 is an aromatic hydrocarbon group or aralkyl group which may be substituted, or R.sup.5 may form an amino acid residue, which may be protected, together with the adjacent nitrogen atom, or a salt thereof, and a medicine comprising the derivative as an active ingredient; and this compound has an inhibiting activity against cathepsin, and particularly, specifically inhibits cathepsin L and is hence useful for prevention and treatment of osteopathy such as osteoporosis.

On the current trend toward the aging society, abnormal acceleration of bone resorption in a man advanced in years involves many of various senile diseases. In particular, senile osteoporosis is prominent and about to become a great social problem. When the present pharmacotherapy for this senile osteoporosis is viewed, it is conducted to administer (1) estrogen, (2) protein anabolic hormone, (3) calcitonin or (4) vitamin D. However, their effects are found only in improvement of subjective symptom, and hence there is no critical therapy under the circumstances.
On the other hand, it is considered that factors causing osteoporosis include two of calcification and decalcification, and abnormal decomposition of supporting tissue, collagen. However, the development of pharmaceutical agents by paying attention to the abnormal acceleration of collagen decomposition is only now under way. It is reported that this collagen decomposition is involved by a group of cathepsins which are certain kinds of cysteine proteases, and particularly cathepsin L among the group of cathepsins deeply involves the decomposition FEBS Letters, Vol. 269, No. 1, pp. 189-193 (1990), "Intracellular Proteolysis" (Tokyo Kagaku Dojin)!. It is also proposed to use a cysteine protease inhibitor as a substance, which inhibits decreases of calcium salts and collagen fibers at the same time, in treatment for absorptive osteopathy (Japanese Patent Application Laid-Open Nos. 284127/1988 and 218610/1990). As to compounds which inhibit cathepsin B and cathepsin L, epoxysuccinic acid derivatives are reported in, for example, European Patent Publication No. 655447A1. However, these compounds inhibit cathepsin L and cathepsin B at substantially the same inhibition coefficients, and does not selectively inhibit cathepsin L which is said to involve bone resorption.
It is therefore an object to provide a novel compound which inhibits cathepsin L and family enzymes thereof at a concentration lower than against other cathepsin groups and is useful as an agent for preventing and treating osteopathy such as osteoporosis or hypercalcemia.

Epoxysuccinamide derivative or salt thereof, and medicine comprising the same