A filter includes first and second sheets of filter media, the second sheet being pleated and forming with the first sheet a plurality of axially extending flow channels having lateral cross-sectional shapes with two adjacent included angles each greater than 45° and less than 75°. Forming apparatus and methods are provided.

The invention relates to filters for filtering fluid, including air, exhaust, liquid, and other fluids, and to forming apparatus and methods for such filters.
The filter is formed by alternating layers of flat and pleated filter media. In one embodiment, the layers are rolled into a cylindrical or other closed loop shape, such as oval, racetrack shaped, etc. The channels formed by the intersection of the rolled pleated and flat layers run in an axial direction to the cylindrical structure along its length. Lower restriction and greater structural strength is provided, including crush strength, which is desirable for packaging and sleeving where appropriate. Particular geometries have been found to improve performance.
The invention further provides forming apparatus for the filter and methods of configuring and shaping same. In various applications, it may be desirable that the filter use pleated media with either triangular or trapezoidal cross-sections, rather than corrugated media with a sinusoidal shaped cross-section. The difference is significant for greater strength, stability, and structural integrity. This is particularly desirable in applications where force is applied in a radial direction to seal and hold the filter element in place, including in applications where the pleat height is less than 10 mm, and preferably less than 6 mm.
Conventional methods, including score-roll pleating and corrugation, cannot produce media with the noted desired geometry and structure. Pleating is commonly done by score-rolling, wherein the media passes between two rollers with male and female spikes and slots that score the media. The media then passes through downstream gathering wheels that feed the media against an opposing force. The inherent stiffness of the media causes the media to fold or crease into pleats along the score lines. For this reason, score-roll pleating is unsuitable for pliable media with insufficient stiffness. Another limitation is that desired small pleat heights in certain applications, e.g. less than 10 mm, cannot be obtained by the score-roll pleating method. Furthermore, creasing along the noted score lines can damage the media pleat tips for some types of filter media.
Another possibility is to use corrugation for producing a filter. In this method, corrugated rollers are used to imprint a shape onto the media, instead of creasing and folding the media as is done with other pleating methods. The limitation of the noted corrugation method is that the pleats have a sinusoidal cross-section, rather than triangular or trapezoidal. As above noted, triangular or trapezoidal flutes or channels are desired, with cross-sectional geometries which are more structurally stable and provide for more laminar flow.
In one aspect of the invention, a star gear pleating method is used to produce the pleated media filter. Particularly designed interlocking gears pass the media between one or more sharp tips of a gear tooth on one gear and a particularly formed root of the opposing gear. The teeth can be modified to provide triangular or trapezoidal pleats. The gears fold and gather the media without crushing it and without adversely affecting the performance of the filter. As the media is released from the interlocking gears, it is directed forward and out of the gears by guide bars which prevent the media from tending to follow the gears and become damaged. The present method does not rely on media stiffness to fold and crease the media, and hence it can be used on more pliable media without damage to the pleat tips. The media is partially gathered and folded between the interlocking teeth of the gears, which partial gathering helps prevent unwanted jams or reverse pleating otherwise common with score-roll pleating. The present method and forming apparatus allows much shorter pleat heights and faster pleating without damaging the media or breaking media fibers. In contrast to corrugation, the present technique provides less than 0.5 mm, the noted porosity is greater than 85%, and the noted extension or length b is less than 6 mm.
The noted two adjacent included angles are provided by a first angle 34, FIG. 2, between first sheet 12 and wall segment 18 of second sheet 14, and a second angle 36 between first sheet 12 and second wall segment 20 of second sheet 14. As noted above, each of angles 34 and 36 is greater than 45° and less than 75°. In the embodiment of FIG. 2, the noted lateral cross-sectional shape of flow channel 28 consists of three pleat tips 22, 24, 26 and three included angles 34, 36, 38. Third angle 38 is between first and second wall segments 18 and 20. In preferred form, the lateral cross-sectional shape of flow channel 28 is an isosceles triangle wherein
                              45                    °                <        θ        <                  75                    °                                                  0.5                                                              mm                <                              2                                      b              ·              sin                                                                                1              2                                                                                θ              ·              cos                                                                                1              2                                                                                θ                                1            +                          sin                                                                                1                2                                                                                θ                                      <                  2.9                                                              mm                    where θ is angle 38 between wall segments 18 and 20, and b is the noted extension or length of each of wall segment 20 between pleat tips 26 and 24 and wall segment 18 between pleat tips 22 and 24, as measured along the inside dimension of the wall, FIGS. 2, 3.
FIG. 4 shows an alternate embodiment and uses like reference numerals from above where appropriate to facilitate understanding. In FIG. 4, the lateral cross-sectional shape of flow channels such as 46 consists of four pleat tips 48, 50, 52, 54 and four included angles 56, 58, 60, 62. Each of first, and second angles 56 and 58 is greater than 45° and less than 75°. Each of third and fourth angles 60 and 62 is greater than 90°. The lateral cross-sectional shape is a trapezoid having first and second distally opposite sides 64 and 66 provided by wall segments 68 and 70 of pleats 20 and slanted towards each other. The trapezoid has distally opposite substantially parallel major and minor bases 72 and 74 extending laterally between sides 64 and 66. Major base 72 is longer than minor base 74. Wall segment 68 of second sheet 42 provides side 64 of the trapezoid. Wall segment 70 of second sheet 42 provides side 66 of the trapezoid. First sheet 40 provides major base 72 of the trapezoid. Second sheet 42 has a truncated wall segment 76 spanning first and second wall segments 68 and 70 and providing minor base 74 of the trapezoid. The ratio of the length of minor base 74 to the length of major base 72 is less than 0.27.
The flow channel lateral cross-sectional trapezoid shape of FIG. 4 consists of four walls, namely a first wall provided by first sheet 40 along major base 72, a second wall provided by first wall segment 68 of second sheet 42 along first side 64, a third wall provided by truncated wall segment 76 of second sheet 42 along minor base 74 and by a section of the next layer 18 of the first sheet at 40a in the spiral pattern along minor base 74, and a fourth wall provided by the second wall segment 70 of second sheet 42 along the noted second side 66. The noted first, second and fourth walls 72, 64, 66 have a single sheet thickness. The noted third wall at 74 has a double sheet thickness. The single sheet thickness of the first wall at 72 provided by first sheet 40 is less than 0.8 mm. The single sheet thickness of the second wall 64 provided by second sheet 42 at wall segment 68 is less than 0.8 mm. The double sheet thickness of the third wall 74 provided by first and second sheets 40 and 42 at 40a and 76 is less than 1.6 mm. The single sheet thickness of the fourth wall 66 provided by second sheet 42 at wall segment 70 is less than 0.8 mm. Walls 72 and 64 meet at pleat tip 48 and define angle 56. Walls 64 and 74 meet at pleat tip 52 and define angle 60. Walls 74 and 66 meet at pleat tip 54 and define angle 62. Walls 66 and 72 meet at pleat tip 50 and define angle 58. The length or height of wall 64 along wall segment 68 between pleat tips 48 and 52 is less than 10 mm, and preferably less than 6 mm. The length of wall 66 along wall segment 70 between pleat tips 50 and 54 is less than 10 mm, and preferably less than 6 mm.
In the preferred form of the embodiment of FIG. 4,
                                          45                        °                    <          θ          <                      75                        °                          ,                                          0.5                                                              mm                <                              2                                      b              ·                              (                                  w                  -                                                            b                      ·                      sin                                                                                1                      2                                                                                θ                                                  )                            ·              cos                                                                                1              2                                                                                θ                                b            +            w            -                                          b                ·                sin                                                                                1                2                                                                                θ                                      <                  2.9                                                              mm                    where θ is the included angle at the intersection of projections of wall segments 68 and 70, b is the length of each of trapezoid sides 64 and 66 as measured along the inside dimension, FIGS. 4, 5, and w is the length of major base 72 as measured along the inside dimension, FIGS. 4, 5.
In one embodiment the noted wall segments are alternately sealed to each other by a first upstream set of plugs such as 78, FIG. 1, to define a first set of flow channels 80 closed by plugs 78, and a second set of flow channels 81 interdigitated with first set of flow channels 80 and having open upstream ends. The wall segments are alternately sealed to each other by a second downstream set of plugs such as shown in dashed line at 82, and as is known, closing the second set of flow channels 81. The first set of flow channels 80 have open downstream ends. This forces the flow from intake 11 to flow through the wall segments of the media, i.e. to flow into the open upstream ends of flow channels 81, and then cross through the filter media wall segments, and then flow through the open downstream ends of flow channels 80.
FIG. 6 illustrates foiling apparatus for the above noted filter. First and second star gears 83 and 84 each have a plurality of teeth 85 and 86 interdigitated with a plurality of roots 88 and 90 therebetween. The gears rotate in intermeshed relation with the tooth of one gear in the root of the other. Gear 83 rotates clockwise as shown at arrow 92 about rotation axis 94. Gear 84 rotates counterclockwise as shown at arrow 96 about rotation axis 98. Gears 83 and 84 pass second sheet 42 therebetween, and gather and fold second sheet 42 along crease lines at pleat tips 26, 28, 30, etc., which crease lines provide the noted axially extending bend lines. Each root such as 90 has a given arcuate length along an inner hub surface 100 spanning between and separating a respective pair of teeth such as 86 and 102 having sides 104 and 106 extending generally radially outwardly from opposite arcuate ends of spanning root hub surface 100. Side 104 meets spanning root hub surface 100 at a first angle 108 at a first junction point 110. Side 106 meets spanning root hub surface 100 at the second arcuate end thereof at a second angle 112 at a second junction point 114. First and second junction points 110 and 114 are spaced from each other by the noted given arcuate length of spanning root hub surface 100. Each of angles 108 and 112 is greater than 90°.
Each tooth of at least one of the gears has an outer end with a pointed tip 116 extending into a respective root and spaced from first junction point 110 by a first triangular shaped gap, and spaced from second junction point 114 by a second triangular shaped gap. In one preferred embodiment, the teeth of each of the gears have pointed tips 116 and 118 at the outer ends of the teeth. In another embodiment, each tooth of at least one of the gears has an outer end which is truncated as shown in dashed line at 120, to have first and second pointed tips 122 and 124 extending into a respective root. In a further embodiment, the teeth of the other gear may also be truncated as shown at dashed line 126, with first and second pointed tips 128 and 130 extending into a respective root.
The noted given arcuate length of spanning root hub surface 100 defines minor base 74. Sides 104 and 106 of the teeth diverge from each other as they extend radially outwardly from spanning root hub surface 100 and are spaced from each other at their outer ends along a second given arcuate length defining major base 72. In preferred form, the sides of the teeth, for example sides 132 and 134 of tooth 85, bow convexly as they extend from the outer end of the tooth generally radially inwardly to respective roots spaced on opposite sides of the tooth.
A pair of parallel guide bars 140 and 142 are spaced on opposite sides of the intermeshing of gears 83 and 84. Bars 140 and 142 extend parallel to the direction of travel 144 of second sheet 42 through the gears. The bars are spaced straight sided triangular or trapezoidal pleats.

This patent is subject to a terminal disclaimer.


The invention relates to an amplifier assembly. The assembly comprises an input device for receiving a representation of an input signal (I, Q; A, phi), a signal-component separator, wherein the signal-component separator produces a first complex intermediate output signal (S1) and a second complex intermediate output signal (S2), wherein the signal-component separator produces the first complex intermediate output signal (S1) and the second complex intermediate output signal (S2) on the basis of the representation of the input signal (I, Q; A, phi), wherein the signal-component separator provides a plurality of amplitude levels, wherein the plurality of amplitude levels is selected in such a way that a sum of the first complex intermediate output signal (S1) and the second complex intermediate output signal (S2) is substantially a reflection of a complex input signal in accordance with the representation of the input signal (I, Q; A, phi) and the phase angle between the first complex intermediate output signal (S1) and the second complex intermediate output signal (S2) is small. Furthermore, the assembly comprises an amplifying device for amplifying the signals in the high-frequency state and a combining device for combining the signals.

In many areas of communications engineering, the linearity of the transmission process is one of the key requirements. In particular, this is of paramount importance in regard to digital transmission systems.
Nonlinearities in transmitters encourage unwanted emissions, which impair the quality of the link of other participants or other transmission services. Furthermore, the nonlinearities cause distortions which have a negative impact on the quality of the link itself.
Thus far, this problem has been dealt with by overdimensioning the high-frequency output stage relative to mean output power. Thus, for example, output power reserves ("back-off") of 10 db or more are not uncommon for ensuring the required linearity.
This overdimensioning of the system has many disadvantages. For one thing, the manufacturing costs are higher. For another, the power efficiency is low, i.e., the efficiency of a transmitter quickly drops with increasing back-off. With decreasing efficiency, the power loss increases. Corresponding cooling systems must be provided in order to dissipate the resulting waste heat.
Thus, for example, cooling systems have to be installed in base stations whose continual operation further worsens the power balance of the base station when the needed cooling power is taken into account. Typical values for the efficiency of modern base stations often lie in the single-digit percent range for this reason.
As a rule, one uses symmetrical or asymmetrical Doherty amplifiers with a corresponding digital predistortion for transmitter architectures in mobile base stations. In this kind of linear transmitting devices, the power amplifier as well as all other subassemblies in the signal path must be designed in regard to a simple predistortion with the most linear possible transmission characteristic.
However, in most cases this is only possible in the upper dynamic ranges at the expense of efficiency. With conventional digitally predistorted Doherty amplifiers for signals with high crest factor, greater efficiency relative to output power stage can be achieved in Class AB operation.
In order to afford the highest possible efficiency, a very complex amplifier model would have to be developed for a real-time implementation of the digital predistortion. This would also have to be able to allow for aging influences and environmental variables. Since this is too complex, the potential of the Doherty concept cannot be fully exploited.
Other concepts, such as the LINC concept (linear amplification with nonlinear components), which is a technique of amplifying amplitude-modulated signals with nonlinear amplifiers, only have low efficiency, or high complexity in the case of multilevel LINC systems.
Due to the use of power supply voltage modulators, the efficiency of the overall design is reduced by the losses of the voltage modulator(s) used. Thus, in order to hold down these losses, only a limited number of voltage levels can be implemented, ideally fixed and predefined ones. In multistandard multiband transmitters, therefore, the required combination of flexibility and high efficiency can only be achieved with difficulty, if at all.
In LINC transmitters, often also called "outphasing transmitters," a complex input signal is converted into two phase-modulated signals with constant envelope curve so that a vector addition of the two signals again yields the original input signal. The two phase-modulated signals thus have the same output level. This principle is shown as a phase diagram in FIG. 1. One can see here that the outphasing angle θ is small for large output powers (example at left), while for very small output signals the outphasing angle θ approaches 180° (example at right).
The two phase-modulated signals can now be processed with high-efficiency saturated or switched amplifiers and the high efficiency of these amplifiers can be utilized. The block diagram of a corresponding LINC transmitter from the prior art is shown in FIG. 2. Thus, for peak output power, this amplifier architecture constitutes a very efficient design.
As shown in FIG. 3, however, the efficiency rapidly declines for input signals with increasing crest factor. The energy efficiency of LINC designs decreases considerably more rapidly with increasing back-off than for linear amplifier designs such as power amplifiers in Class A or Class AB operation. This is attributable to the fact that the power combiner at the output synthesizes a signal with lower power from two signals with maximum output power. The excess power is dissipated in the power combiner in this case. This consequently leads to a low system efficiency for low output powers.
While the use of non-isolating combiners can provide an increase in efficiency, this is possible only at the price of less linearity.
One remedy is afforded by multilevel LINC designs, such as is shown in FIG. 4. Here, additional output levels are introduced for the two amplifiers, in order to keep the outphasing angle as small as possible during the synthesis of output signals with low power, and thereby minimize losses in the power combiner. The principle is shown as an example in a phase diagram in FIG. 5 for a multilevel LINC system with three output levels.
As can be seen from FIG. 6, by adjusting the output power of the output stages in multilevel LINC (ML-LINC) systems, both the overall efficiency and the dynamic range are improved relative to a pure LINC architecture in the amplification of signals with high crest factor.
Different techniques can be used to generate the desired additional output level.
The regulation of the output power in a manner dependent on the input power at any given moment can be achieved, for example, by a rough tracking of the power supply voltage of the saturated output stages with or without regulation of the input power, or by a dynamic scaling of the effective range of the output transistors, or by load modulation. In this process, both paths of the LINC system are scaled at the same time and in the same way, i.e., symmetrical power levels are used, so that the design can be kept very simple.
Alternatively, the use of asymmetrical power levels enables better efficiency, albeit at the cost of higher system complexity.
Nevertheless, the correct temporal coincidence of the output power regulation with the corresponding phase-modulated signal in multilevel LINC systems is of paramount importance for the linearity and quality of the signal. Since different information portions need to be processed in different system pathways, steps must be taken for the two information portions to be simultaneously reunited at the output in order to minimize signal distortions, which may lead to unwanted emissions, among other things.
Based on this situation, the object of the invention is to provide a new amplifier assembly which enables high efficiency along with low complexity. Furthermore, one object of the invention is to provide a new amplifier assembly which makes it possible to reconfigure linearity and energy efficiency individually even for different kinds of modulation.
The object is achieved by an amplifier assembly according to claim 1. Further advantageous features are the subject matter of the dependent claims in particular.
The present amplifier assembly makes it possible to achieve an advantageous compromise between the required linearity and the attainable efficiency for the amplification of digitally modulated signals together with low system complexity. In the proposed amplifier assembly, the very good linearity properties of the LINC concept are combined with the high efficiency of Doherty amplifiers.
The use of Doherty amplifiers instead of switched amplifiers as the output stages yields substantial benefits on the system level, resulting in a distinct simplification of the overall system.
In addition, despite or precisely because of the low system complexity with these modifications, all critical system aspects, such as the temporal tuning of two different signal paths, can be dispensed with while the benefits of ML-LINC systems are retained.
An amplifier assembly according to the invention will now be shown with reference to FIG. 11. The assembly here shows an input device IN for receiving a representation of an input signal I, Q; A, phi. In this process, only I and Q need be obtained, for example. Then, from I and Q, one can create a corresponding amplitude signal A(t) and a phase signal phi(t) with the help of a quadrature to polar coordinate converter.
Furthermore, the amplifier assembly according to the invention has a signal component separator SCS, wherein the signal component separator SCS generates a first complex intermediate output signal S1 and a second complex intermediate output signal S2 on the basis of the input signal representation I, Q; A, phi.
In the figure, this is shown on the basis of the amplitude signal A(t) and the phase signal phi(t). However, the corresponding intermediate output signals can also be generated from the I and Q components by a corresponding signal processing.
The signal component separator provides a plurality of amplitude levels, wherein the plurality of amplitude levels is chosen so that a sum of the first complex intermediate output signal S1 and the second complex intermediate signal S2 is substantially a reflection of a complex input signal corresponding to the representation of the input signal I, Q; A, phi and the phase angle between the first complex intermediate output signal S1 and the second complex intermediate output signal S2 is small.
That is, a multilevel system is provided wherein the angle can be kept small thanks to the plurality of amplitude levels. This reduces power loss during subsequent combining and increases overall efficiency.
Furthermore, the amplifier assembly according to the invention has one or more amplifying devices PA, PA1, PA2 for amplification of the signals in the high-frequency layer. The amplifying device can be applied to each of the intermediate output signals in the high-frequency layer, as shown in FIG. 11, or the amplifying device can also be applied to the combined intermediate output signals in the high-frequency layer.
Moreover, the amplifier assembly according to the invention has a combining device CO for combining the signals.
In an especially preferred embodiment of the invention, the amplifying device is a Doherty arrangement.
The combining device CO is preferably an isolating combining device. Alternatively, the use of a non-isolating combining device CO is provided. This permits an increase in efficiency, although a certain loss of linearity must be factored in.
Without limiting the generality of the invention, the amplifying device can be a symmetrical or an asymmetrical Doherty amplifier assembly. In a symmetrical Doherty amplifier design, the (two) transistors used are comparably dimensioned, whereas in an asymmetrical Doherty amplifier assembly the (two) transistors used are dimensioned differently. As a rule, an efficiency plateau of around 6 dB can be obtained with a symmetrical Doherty amplifier assembly, while in an asymmetrical Doherty amplifier assembly an efficiency plateau of around 6 dB can be obtained. An asymmetrical Doherty amplifier assembly permits an improvement in efficiency or dynamic range.
Alternatively or additionally, the amplifying device can have one or more multipath or multilevel Doherty amplifiers.
In one embodiment of the invention, the amplifier assembly has a conversion device UP for generating upward-converted signals based on the first complex intermediate output signal S1 and the second complex intermediate output signal S2, with the conversion device UP being an upward mixer, and the upward-converted signals being taken to the amplifying device PA; PA1, PA2.
In an alternative embodiment of the invention, the amplifier assembly has a conversion device UP for generating upward-converted signals based on the first complex intermediate output signal S1 and the second complex intermediate output signal S2, with the conversion device UP having a phase modulator with an element with variable gain or variable attenuation.
In one embodiment of the invention, the signal component separator SCS furthermore provides a limiting of the maximum amplitude and or minimum amplitude of the first complex intermediate output signal S1 and the second complex intermediate output signal S2. In this way, distortions can be avoided and overall efficiency increased. In particular, limiting the minimum amplitude is important for linearity as well as for efficiency. By introducing a minimum amplitude, crossing of the zero line is prevented and the signal bandwidth is thereby reduced. Furthermore, the dynamic range is enlarged.
In one embodiment of the invention, the amplifier assembly furthermore provides a predistortion. A predistortion makes it possible to compensate for existing nonlinearities and thus maintain the desired linearity. This can increase efficiency, since in an uncompensated operation nonlinearity can typically be higher at a high level of efficiency than the transmission system allows.
In one embodiment of the invention, the signal component separator SCS furthermore provides a signal for control of the dynamic gain of the amplifying device PA; PA1, PA2. Since the signal component separator SCS can determine the target signal to be achieved in terms of its amplitude, the amplifying device PA; PA1, PA2 can also be effectively adjusted in this way. Thanks to the possibility of adjusting the amplifying device PA; PA1, PA2, the efficiency of the amplifying device PA; PA1, PA2 can also be kept in a favorable range with high linearity and efficiency, assuring high overall efficiency and high linearity of the overall amplifier assembly.
In one embodiment of the invention, the signal component separator SCS provides at least partly different amplitude levels for the first complex intermediate output signal S1 and the second complex intermediate output signal S2, which can enlarge the dynamic range.
Starting from the high linearity and the low efficiency of a conventional LINC system with isolating combiner, energy efficiency can be boosted at the cost of linearity by increasing the number of levels in multilevel LINC transmitters.
This is shown as an example in FIG. 7 for a 3.8 MHz WCDMA signal. The peak efficiency of the amplifiers used is 55%.
The measured "far-away noise" for the same signal is shown in FIG. 8 as a function of the number of optimized levels.
With the same arrangement, by adjusting the system parameters, other mobile radio standards can also be processed, i.e., the amplifier assembly is highly flexible and can therefore be used for a multiplicity of transmission systems. FIG. 9 shows measured adjacent-channel power and efficiency as a function of the number of levels optimized for the signal statistics of a 20 MHz LTE signal. Here as well, the peak efficiency of the amplifiers used is 55%.
In each of FIGS. 7 to 9, one must consider that these are not based on a phase-coherent upward mixing. The effects of this are especially noticeable as excessive adjacent-channel noise for broadband signals such as the 20 MHz LTE signal used for the measurements in FIG. 9. By using a phase-coherent frequency conversion even for a large number of selected levels the spectral emission mask of broadband signals is maintained.
Consequently, with the proposed design, a broadband flexible multistandard and multiband transmitter with high level of efficiency can be realized.
If one compares the efficiencies of the Doherty amplifiers in FIG. 10, the lower curve corresponds to the efficiency, i.e., the Power Added Efficiency, while the upper curve corresponds to the Drain Efficiency of the same amplifier. It will be seen that the obtained mean efficiencies as measured against the peak efficiency of the Doherty output stages of 55% are very high.
Thus, the invention enables the use of efficient Doherty amplifiers as output and/or driver stages in a multilevel LINC design.
In this way, a digital linearization of the entire transmission train is provided via a LINC structure.
Thanks to this approach, the advantages of both technologies can be preserved, without having to deal with the respective disadvantages. Thus, the proposed amplifier assembly provides the linearity of a traditional LINC or multilevel LINC transmitter coupled with the increased efficiency of symmetrical/asymmetrical Doherty amplifiers.
At the same time, system complexity can be reduced by the use of Doherty amplifiers, since the output power control can be adjusted continuously according to the principle of Doherty-based active load modulation.
An auxiliary amplifier, which can be part of the Doherty configuration, can modulate the output power of the overall design by means of the signal present at the input. A primary amplifier can be operated in voltage saturation mode over the largest possible dynamic range (6 dB for symmetrical designs, up to 12 dB and more for asymmetrical ones) and its load can be adapted such that the primary amplifier drives just enough current into the load for the required output power. Thus, a substantial efficiency boost is achieved.
When controlling the output power with such an active load modulation, the amplitude information together with the phase information goes directly to the inputs of the power amplifier. Thus, amplitude and phase signals travel the exactly identical path and no time delay occurs between the two signals. Programmable delay elements and special voltage supply modulators are thus not necessary, which in turn yields greater system bandwidth.
The system is simplified in the way shown in FIG. 11. Instead of the phase modulator, a traditional upward mixer UP can be used in this system for the frequency conversion of the amplitude- and phase-modulated signal. A limiting of the input signal amplitude by a clipper and a digital predistortion can be implemented in the digital range, in order to further improve system performance. This substantially simplifies the predistortion as compared to a transmitter with linear subassemblies throughout, since only the phase and amplitude response of the two pathways have to be equalized for a few discrete points. Between the selected points, the system is linearized by means of outphasing, i.e. via LINC.
In addition, the proposed amplifier assembly achieves a substantially higher efficiency for a comparable linearity, since the system can use Doherty amplifiers instead of switched amplifiers. Although Doherty amplifiers have a lower peak efficiency than saturated and switched amplifiers as are used in outphasing systems thus far, they have a much higher efficiency over a large dynamic range.
Through the use of asymmetrical Doherty designs and/or multipath Doherty amplifier designs, furthermore, increases in efficiency can also be achieved, since these amplifier designs have a high efficiency over a dynamic range of substantially more than 6 dB. In this way, the proposed amplifier assembly achieves high average efficiency levels for digitally modulated broadband signals with relatively low system complexity.
The proposed amplifier assembly enables a substantial reduction in system complexity as compared to traditional systems. The proposed amplifier assembly improves linearity and efficiency as compared to known systems, especially for broadband signals with a high crest factor. Furthermore, the proposed amplifier assembly enables a simple modification of the system for amplifying different transmission standards as well as a dynamic optimization of efficiency and linearity for the particular transmission standard being used. Moreover, the proposed amplifier assembly permits a simplified design of the Doherty amplifiers and enables an increased dynamic range, especially as compared to known LINC transmitters. In the proposed amplifier assembly, furthermore, there is a reduction in the sensitivity of the system to deviations (mismatches) of the amplitude and phase response between the two pathways. Thus, good savings in OPEX and CAPEX as well as a significant increase in efficiency relative to traditional systems are possible.
The proposed invention can be used in the most diverse equipment. For example, it is possible to use the invention in mobile phone base stations as well as mobile phone stations themselves, and in broadcast radio stations. In particular, the invention is suitable for use in Software Defined Radio applications.


A semiconductor device having a field effect transistor and a method of forming the same are provided. The semiconductor device preferably includes a device active pattern disposed on a predetermined region of the substrate. The gate electrode preferably crosses over the device active pattern, interposed by a gate insulation layer. A support pattern is preferably interposed between the device active pattern and the substrate. The support pattern can be disposed under the gate electrode. A filling insulation pattern is preferably disposed between the device active pattern and the filling insulation pattern. The filling insulation pattern may be disposed under the source/drain region. A device active pattern under the gate electrode is preferably formed of a strained silicon having a lattice width wider than a silicon lattice.

The present invention relates to a semiconductor device and a method of forming the same and specifically to a semiconductor device including a field effect transistor and a method of forming the same.
As semiconductor devices become more highly integrated, field effect transistors in those devices suffer from various problems. For instance, a punch through characteristic of source/drain regions in the transistor becomes degraded as a channel length is decreased. In addition, when the source/drain regions are formed having a shallow junction, junction leakage current of the source/drain regions increases. This may cause a malfunction of the transistor or increase power dissipation of the semiconductor device. In addition, a channel width of the transistor is generally reduced to decrease a turn-on current of the transistor. If the turn-on current is decreased, an operation rate of the transistor is also decreased, thereby lowering an operation rate of the semiconductor device.
In the present semiconductor industry, a high operation rate with a low power supply is required, together with a high integration density. Therefore, extensive studies have been undertaken to solve those problems.

Semiconductor devices having a field effect transistor and methods of fabricating the same


A method of fabricating an electrical connecting structure of a circuit board is disclosed. The method includes: providing a circuit board having a plurality of first and a plurality of second conductive pads; forming on the circuit board a solder mask having a plurality of openings to thereby expose the first and the second conductive pads; forming an metal adhesive layer on the first and the second conductive pads; forming a conductive layer on the circuit board and the metal adhesive layer; forming on the conductive layer a resistive layer, wherein a plurality of openings are formed in the resistive layer to expose the conductive layer on the second conductive pads; forming a metal post by electroplating through the conductive layer on the second conductive pads; removing the resistive layer and the conductive layer covered underneath; and forming a soldering layer on the metal post.

1. Field of the Invention
This invention relates to methods of fabricating a circuit board, and more particularly, to a method of fabricating a circuit board having a plurality of electrical connection structures.
2. Description of Related Art
With the rapid development in technology, electronic products are capable of being made in a compact size, performed with multiple functions, and operated at a high speed. Therefore, packaging industry has been thriving to come up with advanced or improved semiconductor packages in order to meet the need for high performance electronic products.
A flip chip semiconductor package is one of the most advanced semiconductor packages in the art. The flip chip semiconductor package typically features in forming a plurality of solder bumps on electrode pads formed on an active surface of a semiconductor chip, such that the semiconductor chip can be electrically connected to a packaging substrate by soldering the solder bumps to the corresponding solder joints formed on the packing substrate.
In order to further improve the electrical performance of the electronic product, various passive components, such as resistors, capacitors or inductors, are optionally installed in the semiconductor package for the electronic product. These passive components are mounted on a circuit board or a packaging substrate of the semiconductor package by surface mount technology (SMT). It means that on the circuit board or the packaging substrate different electrical connection structures are required to be formed, so as for them to be soldered with solder joints and surface mount members, respectively. Accordingly, the different electrical connection structures are formed in different height and dimension to meet the requirements for different electrical connection purposes.
Related devices as described above and the methods for fabricating such devices are disclosed in U.S. Pat. Nos. 5,400,948, 5,672,542 and 6,551,917.
Referred to FIGS. 1A to 1E, a solder mask layer 21 is applied on a circuit board body 20 having a plurality of conductive pads 201, and a plurality of openings 211 are formed in the solder mask layer 21 to expose the conductive pads 201, (as shown in FIG. 1A). Followed is the formation of a metal adhesive layer 22 by physical deposition such as sputtering or evaporation, or chemical deposition such as electroless plating, (as shown in FIG. 1B), and a solder material 24 on the metal adhesive layer 22 on a predetermined number of the conductive pads 201 by stencil printing via a stencil 23 with grids 23a, as shown in FIGS. 1C and 1D. Then, a plurality of solder joints 24′ are formed by reflowing the solder material 24 as shown in FIG. 1E. It thus allows a plurality of first electrical first electrical connecting structures to be formed by the conductive pads 201 and the metal adhesive layer 22 where there are no solder joints formed thereabove, and a plurality of secured electrical connection pads to be formed by the solder joints 24′, and the conductive pads 20. As a result, the first electrical connection structures are clearly different in height and dimension from the second electrical connection structures.
However, forming solder joints by stencil printing is accompanied by difficulty in the control of the height of the solder joints during reflow. In consequence, the reflowed solder joints tend to be not equal in height, and thus their electrical connection with a chip or a printed circuit board is adversely affected. Moreover, the formation of the solder joints by stencil by printing the solder material on the conductive pads of the circuit board body is difficult in the control of the amount of the solder material. It thus easily results in the occurrence of a bridging phenomenon between adjacent solder joints and a short circuit problem will accordingly take place.
In other words, solder joints formed by conventional printing methods fail to be fine-pitched, such that there is always a limitation in the application of the current flip chip semiconductor packages.
Accordingly, a critical issue to circuit board manufacturers nowadays involves solving the above drawbacks and meeting the requirements of mechanical and electrical characteristics for solder joints concurrently.

Method of fabricating circuit board having different electrical connection structures

Phoenix Precision Technology Corporation


An integrated circuit package which has a staggered bond wire pattern that increases the bond finger width to pad pitch ratio of the package. The package includes a first bond shelf, a second bond shelf and a third bond shelf. Mounted to the package is an integrated circuit which has a plurality of die pads. The die pads are arranged in a pattern of groups, wherein each group has a first die pad that is adjacent to a second die pad, and a third die pad that is adjacent to the second die pad and a first die pad of an adjacent group. Bond wires connect the first die pads to the first bond shelf, the second die pads to the second bond shelf and the third die pads to the third bond shelf, so that each adjacent die pad is connected to a different bond shelf. The staggered bond pattern maximizes the bond finger width of the package.

1. Field of the Invention
The present invention relates to an integrated circuit package.
2. Description of Related Art
Integrated circuits are typically enclosed by a package that is mounted to an external printed circuit board. The integrated circuit has a plurality of outer die pads that are connected to corresponding bond fingers of the package. The pads are typically connected to the fingers by wires that are attached with an automated bonding machine.
The bond fingers have a width that is larger than the diameter of the wires to compensate for tolerances in the package, the integrated circuit and the bonding process of the wires. The width of each bond finger is significantly larger than the wire diameter to provide relatively large manufacturing yields for the package. A reduction in the bond finger width typically lowers the yield rate of the package.
The power and digital signals (I/O) of the integrated circuit are limited by the number of die pads that can be constructed on the device. Generally speaking the I/O and power can be increased by either enlarging the size of the integrated circuit or decreasing the spacing between die pads. The spacing is commonly referred to as the pad pitch. Increasing the size of the IC may reduce the yield of the device. Reducing the pitch requires a corresponding reduction in bond finger width which may also reduce the yield of the package. It would be desirable to provide a package that has a relatively low pad pitch but a high package yield rate.

Bond pad functional layout on die to improve package manufacturability and assembly


A foldable plastic slider for straddling relation with a profiled plastic zipper. The straddling slider for closing or opening the zipper by movement therealong, comprising: a transverse support member including opposing sides, a pair of legs depending from the opposing sides of the support member, and a pair of wings hingedly attached to the opposing sides. Each wing has an opening for receiving its respective leg, and each wing has a cored out cross piece. The cored out cross piece has a solid ramp latch. The wings are folded relative to the support member and the latches engage the legs to assemble the slider on the zipper in a closed sidewall position.

Plastic zippers with sliders are well known in the art. The plastic zipper includes male and female tracks forming respective interlocking profiles. In the manufacture of a thermoplastic bag, the male and female tracks extend along the mouth of the bag and are adapted to be secured in any suitable manner to opposing flexible panels of the bag. The male and female tracks may be integral marginal portions of these flexible panels or they may be extruded separately and thereafter attached to the flexible panels along the mouth of the bag. The slider, which is mounted to the zipper, is used to open and close the zipper. When the slider is in a closed position, the profiles are interlocked with each other. In response to moving the slider to an open position, the profiles are disengaged from each other.
A foldable zipper slider with compression-type latch is disclosed in U.S. Pat. No. 5,063,644. This slider locks into place over the reclosable zipper using a flexible tongue compression-type latch. This flexible tongue style latch is effective on larger sliders, but when the size of the slider is reduced it becomes difficult and expensive to mold such an apparatus. Accordingly, there is a need to improve the compression-type latch so it can be effectively used on a smaller scale. The present invention seeks to achieve this result.

Foldable zipper slider with improved compression-type latch


The present invention provides an improved prokaryotic cell expression system employing a tightly controlled host strain construct that controls uninduced, leaky expression of proteins while still auto-inducing well. Various aspects of the present invention address and overcome the problem of uninduced basal expression by providing a host strain that comprises a T7 polymerase gene, and mutants thereof, inserted between lac Z and lac Y of the lac operon (a “ZRY” construct), downstream of an otherwise wild-type lac operon control region.

T7 promoters have been used to achieve control of the expression of exogenous genes in E. coli, since their expression can be turned on by controlling the presence and expression of the T7 gene 1 (SEQ ID NO: 1) for T7 RNA polymerase (SEQ ID NO: 2) (Studier & Moffat, 1986; Studier et al., 1990; Tabor & Richardson, 1985). Phage T7 RNA polymerase does not recognize E. coli promoters, and vice versa (i.e., E. coli RNA polymerase does not recognize T7 promoters, except for the special "E. coli" one that transcribes gene 1).
The E. coli lac operon has been characterized (see e.g., Dickson et al, 1974; Schultz, Shields, & Steitz, 1991; Oehler, et al. 1990; Flashner & Gralla, 1988). The polycistronic lac operon mRNA molecule encodes three genes: Lac Z, Lac Y and Lac A. The product of the Lac Z coding region functions as a β-galactosidase; this function is required for the metabolism of lactose into glucose and galactose. The product of the Lac Y coding region functions as a lactose permease, which is a membrane-bound transport protein that allows lactose to enter the cell. Lac A is a β-galactosidase transacetylase, and does not appear to be strictly required for lactose metabolism.
The lactose operon genetic control region contains binding sites for 3 control proteins: CAP, RNA polymerase, and lac repressor (Dickson et al, 1974). Mutation L8 (a.k.a. L37) is a G to A transition (Dickson et al., 1977) in the CAP site, which eliminates the possibility of binding or activation by CAP protein when glucose is absent. Since binding by CAP protein activates the lac promoter 16-fold by introducing a 90° bend (Schultz, Shields, & Steitz, 1991), the L8 mutation results in a decreased level of transcription (e.g., to 6%). The phenotype is slightly Lac+ but melibiose negative at 42° C. (Ippen et al. 1968). During genetic analysis of the lac operon, second-site Lac+ (i.e., raffinose+) revertants of this CAP site mutant were selected after UV mutagenesis (Arditti et al, 1968; Silverstone et al. 1970), with the UV5 mutant consisting of a further change of two adjacent base pairs in the RNA polymerase binding site. The resulting promoter region, with a total of 3 base-pair changes, produced a promoter that is stronger than lac wild-type and oblivious to glucose repression, yet is still under control of lac repressor. The resultant L8-UV5 has been widely useful as a model promoter for basic transcription studies. As for the repressor, it is a tetrameric dimer-of-dimers and must bind at least two operators to achieve its full level of repression: Part of the binding of, and control by, the lac repressor depends on operator O2, some 400 bp into the lacZ gene (Oehler, et al. 1990; Flashner & Gralla, 1988). Operator O3, in the I gene, overlaps the CAP site so nearly that it has been proposed to 'repress' by interfering with CAP binding (Oehler et al, 1990); in parallel, it may serve to auto-repress the I gene.
Studier (2005) has recently formulated a mixture of sugars consisting of 0.5% glycerol, 0.05% glucose, and 0.2% lactose (ZYM-5052; herein "5052") to replace the manual addition of inducer IPTG, achieving effective and convenient "auto-induction" of cultures for the purpose of exogenous protein production in E. coli. The host strain for this system is BL21(DE3), a lysogen of phage lambda DE3 carrying the T7 gene 1 (SEQ ID NO: 1) under the control of the lac L8-UV5 promoter.
Auto-induction polypeptide expression systems rely on the principle that an inducer can induce production of target protein but is prevented from doing so by compounds that can be depleted during growth. This allows use of media in which target protein is produced automatically, without the need to monitor growth and add inducer at the proper time. Ideal auto-induction systems allow the host strain to grow in auto-inducing medium without expressing target protein until rather high density, when depletion of inhibitory factors would allow the inducer present in the medium to induce expression, thus producing high concentrations of target protein. For example, glucose in the medium can prevent the uptake and utilization of lactose inducer but when glucose is depleted, the lactose inducer can effectively induce expression of the target protein. Auto-induction is generally preferred over IPTG induction for increased simplicity (e.g., no need to follow culture growth or add inducer at the proper time), increased culture density, and increased concentration of target protein per volume of culture.
But, like all known inducible promoter systems, auto-induction polypeptide expression systems have a residual level of activity or "leakiness", which leads to the inappropriate transcription and expression of the gene being cloned under the control of the promoter.
The auto-inducing expression system of Studier (2005) is widely used in the industry. Additionally, there exist several modifications to the system. For example, some researchers have inserted the T7 RNA polymerase (gene I) into lacZ (e.g., New England Biolabs), which is reported to provide better control but at the expense of auto-induction (because auto-induction requires lacZ (beta-galactosidase) to make the inducer allolactose). As another example, some researchers have aligned T7 RNA polymerase gene I with the arabinose promoter (e.g., Invitrogen), but one must include arabinose in addition to 5052 sugar mixture for auto-induction. The inventor has observed that the auto-induced level is not as high with this strain, and it has a leaky background in Studier's recommended non-inducing medium. As another example, strains have been selected as resistant to several families of toxic proteins (e.g., Miroux & Walker, 1996; Lucigen). As another example, the gene for T7 lysozyme, a natural inhibitor of T7 RNA polymerase, has been included on another (chloramphenicol-resistant) plasmid (Studier 1991). Further examples include plasmid copy-number control for the T7 expression vector (e.g., pETcoco, Novagen), and the addition of another lac operator (although it now has O1 and O3) to the pET vector series.
Thus there exists a need for improvements to the auto-induction expression system in which the T7 gene 1 is under control of the lac L8-UV5 promoter, especially with regard to reducing the uninduced leaky level of expression.


A head-up display device and a transportation device are provided. The head-up display device includes a light source, a scanner configured to scan light emitted from the light source to form scanned light, an angle adjuster configured to change an exit angle of the scanned light, a display unit configured to form an image according to the scanned light from the angle adjuster, and a projection assembly configured to project the image formed on the display component to a selected area.

Heads-up (Heads-Up) digital display devices are also referred to as head-up displays (HUDs) for projecting a virtual image of driving information (such as speed information and navigation information) onto a side of a front windshield, thereby allowing a driver to see the driving information without looking down at an instrument panel.
With the application of the augmented reality (AR) technology to the field of the HUD, double-layer display becomes a good implementation for the AR HUD at present. Currently, the double-layer display mostly adopt two thin film transistor liquid crystal displays (TFT-LCDs) or a combination of a digital light processing (DLP) technology that is a display technology of the TI corporation and the TFT-LCDs (i.e., DLP+TFT-LCD) as a display component, but these two implementations have deficiencies in terms of power consumption, volume, brightness, cost effectiveness, and the like.

Head-up display device and transportation device


A flip-flop circuit capable of inhibiting current consumption as well as the circuit scale from increase is provided. This flip-flop circuit comprises a first latch circuit including first and second inverter circuits. A first power supply line capable of switching a supplied potential between a fixing potential supplied for fixing the potentials of output nodes of the first and second inverter circuits and a floating potential supplied for floating the potentials of the output nodes of the first and second inverter circuits is connected to the first latch circuit.

1. Field of the Invention
The present invention relates to a flip-flop circuit, and more particularly, it relates to a flip-flop circuit including latch circuits.
2. Description of the Background Art
A flip-flop circuit including various latch circuits is known in general. For example, Japanese Patent Laying-Open No. 8-279298 (1997) discloses such a flip-flop circuit.
FIG. 11 shows an exemplary conventional flip-flop circuit 101 having a structure similar to that of the aforementioned flip-flop circuit disclosed in Japanese Patent Laying-Open No. 8-279298. As shown in FIG. 11, the exemplary conventional flop-flop circuit 101 is constituted of two delay latch circuits 102a and 102b and an inverter circuit 103. The first-stage delay latch circuit 102a is constituted of a latch circuit 104 and a transfer gate transistor 105. The latch circuit 104 is constituted of two inverter circuits 106 and 107 and a transfer gate transistor 108.
Output terminals of the inverter circuits 106 and 107 are connected to input terminals of the inverter circuits 107 and 106 respectively. The output terminal of the inverter circuit 106 and the input terminal of the inverter circuit 107 are connected with each other through the transfer gate transistor 108 formed by a p-channel transistor 108a and an n-channel transistor 108b. A clock signal CLK and an inverted clock signal /CLK obtained by inverting the clock signal CLK by the inverter circuit 103 are input in the gates of the n-channel transistor 108b and the p-channel transistor 108a of the transfer gate transistor 108 respectively. Either the source region or the drain region of the transfer gate transistor 105 formed by a p-channel transistor 105a and an n-channel transistor 105b is connected to a node N101 between the input terminal of the inverter circuit 107 and the transfer gate transistor 108. A prescribed potential is input in either the drain region or the source region of the transfer gate transistor 105 from a node D. The clock signal CLK and the inverted clock signal /CLK obtained by inverting the clock signal CLK by the inverter circuit 103 are input in the gates of the p-channel transistor 105a and the p-channel transistor 105b of the transfer gate transistor 105 respectively.
The second-stage delay latch circuit 102b has a structure similar to that of the aforementioned first-stage delay latch circuit 102a. However, either the source region or the drain region of a transfer gate transistor 105 constituting the second-stage delay latch circuit 102b is connected to the node N102 of the first-stage delay latch circuit 102a between the input terminal of the inverter circuit 106 and the output terminal of the inverter circuit 107. Thus, a potential output from the node 102 of the first-stage delay latch circuit 102a is input in a node N103 through the transfer gate transistor 105 of the second-stage delay latch circuit 102b.
An operation of the exemplary conventional flip-flop circuit 101 shown in FIG. 11 for introducing a potential Vdd received in the node D into the node N101 of the first-stage delay latch circuit 102a is now described. It is assumed that the flip-flop circuit 101 holds the potential of the node N101 at a level Vss through the output potential of the inverter circuit 106 before introducing the potential Vdd from the node D. In this case, the clock signal CLK first falls to the potential Vss. Thus, both of the p-channel transistor 105a and the n-channel transistor 105b of the transfer gate transistor 105 receiving the clock signal CLK and the inverted clock signal /CLK in the gates thereof respectively enter ON-states. Thus, the flip-flop circuit 101 inputs the potential Vdd of the node D in the node N101 through the transfer gate transistor 105. At this time, both of the n-channel transistor 108b and the p-channel transistor 108a of the transfer gate transistor 108 receiving the clock signal CLK and the inverted clock signal /CLK in the gates thereof respectively enter OFF-states. Thus, the flip-flop circuit 101 transmits no output potential (Vss) of the inverter circuit 106 the node N101, thereby not fixing the potential of the node N101 to the level Vss. Therefore, the flip-flop circuit 101 inhibits the potential Vdd of the node D and the potential of the node N101 (output potential of the inverter circuit 106) from colliding with each other when introducing the potential Vdd from the node D into the node N101. Thus, the flip-flop circuit 101 inhibits current consumption from increase resulting from collision between the potential Vdd of the node D and the potential of the node N101.
The exemplary conventional flip-flop circuit 101 shown in FIG. 11 is provided with the transfer gate transistor 108 formed by the p-channel transistor 108a and the n-channel transistor 108b for inhibiting the output potential of the inverter circuit 106 from transmission to the node N101 when introducing the potential of the node N into the node N101, in order to inhibit current consumption from increase resulting from collision between the potential of the node D and the output potential of the inverter circuit 106 (potential of the node N101). In the exemplary conventional flip-flop circuit 101, therefore, the circuit scale is disadvantageously increased due to the transfer gate transistor 108.

Flip-flop circuit including latch circuits


The invention relates to drylaid nonwoven materials comprising bicomponent fibres comprising a low melting polyolefin component and a high melting polyolefin component, the low melting polyolefin component constituting at least a part of the surface of the fibre and comprising a non-grafted polyolefin component and a grafted polyolefin component, wherein the grafted polyolefin component has been grafted with an unsaturated dicarboxylic acid or an anhydride thereof, e.g. with maleic acid or maleic anhydride. The bicomponent fibres fibres have an excellent bonding affinity for natural fibres such as cellulose pulp fibres and allow the production of airlaid nonwovens with reduced generation of dust during the production process and with improved nonwoven strength properties.

Hygienic absorbent products such as disposable diapers contain, in addition to a water-permeable coverstock, a water-impermeable backsheet and one or more layers for distribution of liquid, an absorbent core typically comprising natural fibres such as cellulose fluff pulp fibres, synthetic fibres based on e.g. polyolefin and/or polyester and a superabsorbent polymer (SAP) material. In absorbent cores of this type, the synthetic fibres, which often are bicomponent fibres of e.g. polypropylene/polyethylene or polyester/polyethylene, are thermobonded to each other to form a supporting network for the core. Ideally, the synthetic fibres should be able to not only bond to each other, but also to the natural fibres and the SAP, so as to result in a core structure which is as strong and coherent as possible, and in which the natural fibres and the SAP are locked into place within the structure.
However, the existing synthetic fibres that are used for the production of drylaid, e.g. airlaid, nonwovens suffer from the disadvantage of suboptimal bonding to e.g. cellulose fibres. The problem is made worse by the fact that the natural fibres are typically relatively short, e.g. fluff pulp fibres with a length of not more than about 3 mm, as compared to the synthetic fibres, which are normally (although not necessarily) considerably longer. As a result, dust problems are created in the manufacturing process, and the performance of the resulting nonwovens is also suboptimal, since a large proportion of the natural fibres is not bonded to any of the synthetic fibres or otherwise held in place by means of the structure formed by bonding of the synthetic fibres.
It is therefore an object of the present invention to provide a bicomponent synthetic fibre which has an improved bonding affinity for natural fibres such as cellulose fluff pulp fibres and which therefore is particularly suitable for the production of drylaid nonwovens comprising a mixture of synthetic fibres and natural fibres.
EP 0465203-B1 discloses thermally bonded fibrous wet laid webs containing bicomponent fibres comprising a first component of polyester, polyamide or polypropylene and a second component of linear low density polyethylene (LLDPE) with a density of 0.88-0.945 g/cc and a grafted high density polyethylene (HDPE) with a density of 0.94-0.965 g/cc which has been grafted with maleic acid or maleic anhydride to provide succinic acid or succinic anhydride groups along the HDPE polymer.
EP 0421734-B1 discloses thermobondable bicomponent fibres composed of two different polyolefins having melting points which differ by at least 20.degree. C., the lower melting polyolefin containing 3-10% by weight of a monoglyceride of a fatty acid of 12 or more carbon atoms incorporated therein. The fibres are reported to be easily processable without the need for an oiling agent to be applied during spinning or drawing.
U.S. Pat. No. 4,950,541 discloses succinic acid and succinic anhydride grafts of linear ethylene polymers obtained by grafting maleic acid or maleic anhydride onto a LDPE (low density polyethylene), LLDPE or HDPE polymer. The grafted polymers are dyeable and can be used e.g. as the sheath component of a bicomponent fibre.
U.S. Pat. No. 4,684,576 discloses the production of blends of grafted HDPE with ungrafted LLDPE or LDPE, the HDPE having been grafted with maleic acid or maleic anhydride to provide succinic acid or succinic anhydride groups along the HDPE polymer. The blends are disclosed for use in producing laminate structures.
It has now unexpectedly been found that polyolefin bicomponent fibres whose low melting component comprises a non-grafted polyolefin component and a grafted polyolefin component which has been grafted with an unsaturated dicarboxylic acid or an anhydride thereof have advantageous properties when used in the production of drylaid nonwoven materials, including improved bonding to cellulose pulp fibres and improved strength properties in the resulting nonwovens.


An address decoder comprising a match signal generating circuit responsive to an inputted address signal and an address mask signal to mask any given bits of the inputted address signal, and an address selection signal generating circuit responsive to signals outputted from the match signal generating circuit, for generating a selection signal of a plurality of addresses which have corresponding bit values except for the masked bits. The address decoder can be used as a row address decoder or column address decoder of the semiconductor memory device for selecting a plurality of addresses simultaneously.

The present invention relates to an address decoder and a semiconductor memory device using the address decoder, and more specifically to an address decoder used for a semiconductor memory device by which a plurality of data can be written simultaneously to a plurality of cells so as to be suitable for use in an image memory.
In general, in the conventional semiconductor memory device having a plurality of memory cells, an inputted address signal is decoded by an address decoder to select a memory cell designated by an address corresponding to the inputted address signal. In the case of a conventional address decoder, when an address signal A.sub.3 A.sub.2 A.sub.1 A.sub.0 is inputted, inverted address value signals A.sub.i (i=0, . . . 3) are generated on the basis of address value signals, A.sub.3, A.sub.2, A.sub.1, representative of the respective bit values of the inputted address signal and cell selection signals Y.sub.j (j=1, . . . 15) corresponding to the address signals A.sub.3 A.sub.2 A.sub.1 A.sub.0 are generated by combination of the address value signals A.sub.1 and the inverted address value signals A.sub.i using AND gates. Here Y.sub.j represents Y.sub.j =X.sub.3 .multidot.X.sub.2 .multidot.X.sub.1 .multidot.X.sub.0, where the respective X.sub.i (i=0, . . . 3) represent A.sub.i or A.sub. i .
In the conventional semiconductor memory device including the address decoder as described above, since the inputted address signals correspond one to one to the output signals of the address decoder, when data are written to the cells, a data can be written in only a cell corresponding to each address. Therefore, it takes much time to clear all the data stored in a plurality of cells or in a part of the plural cells; that is, when the same data are written to the plural cells.
To overcome this problem, a flash write circuit as shown in FIG. 1 is incorporated in the semiconductor memory device in order to write the same data to a plurality of cells simultaneously. In the flash write circuit of the prior art semiconductor memory device, there are provided NOT gates 50 arranged for a pair of bit lines BL and BL, respectively; transistors 52 whose source and drain are connected between the output sides of the NOT gates and the bit lines BL, respectively; a flash write data line g to which the input sides of the NOT gates 50 are connected in common; and a flash write control line h to which the gates of the transistors 52 are connected in common. In this circuit, when a control signal for flash write is transmitted through the control line h, the transistors 52 are turned on, so that data to be written transmitted through the data line g are given to the bit lines BLof pairs of the bit lines via the NOT gates 50 and the transistors 52. In other words, data are written to the bit lines without use of a column address decoder 10. In this operation, if one word line e.g., WL.sub.i) is selected, the same data are written to all the memory cells connected to the word lines WL.sub.i
As described above, in the prior art semiconductor memory device, the flash write function is the simultaneous data writing operation for each row address unit. Therefore, it is possible to clear all the data of the memory or clear the data for each row address unit at high speed. However, there exists a problem in that it is impossible to write data to a part of cells arranged in the column direction at high speed, that is, to implement partial data erasure.

Address decoder which variably selects multiple rows and/or columns and semiconductor memory device using same


Techniques are described for a contextual natural language understanding (cNLU) framework that is able to incorporate contextual signals of variable history length to perform joint intent classification (IC) and slot labeling (SL) tasks. A user utterance provided by a user within a multi-turn chat dialog between the user and a conversational agent is received. The user utterance and contextual information associated with one or more previous turns of the multi-turn chat dialog is provided to a machine learning (ML) model. An intent classification and one or more slot labels for the user utterance are then obtained from the ML model. The cNLU framework described herein thus uses, in addition to a current utterance itself, various contextual signals as input to a model to generate IC and SL predictions for each utterance of a multi-turn chat dialog.

Conversational agents ("CA"), or dialog agents, serve as a computer interface in many applications. Such agents may be found, for example, in smart personal digital assistants, smart home controllers, and automated telephone answering services, among many other types of devices and applications. Existing CAs are typically implemented based on various types of dialog systems, where such dialog systems often target task-oriented dialogues in which a user is trying to achieve a goal. For example, to process a task-oriented dialogue such as a user booking a flight on an airline, a CA may analyze a user's speech to determine the user's goals and requests (e.g., departure city, destination city, date and time, whether one-way or round-trip) at each turn of the dialog to identify available flights.

Contextual natural language understanding for conversational agents


A method and apparatus is provided for determining related keywords to narrow a query, and/or for categorizing a query. A keyword graph connects keyword nodes to each other based on degrees of cross-reference indicating how frequently keywords associated with the nodes appear in searches. A domain node representing a category hooks to a category-matching node in the keyword graph. Based at least in part on a degree of cross-reference between another node and the category-matching node, the domain node hooks to the other node. Alternately, the domain node hooks to nodes that match user-identified keywords. At query time, the query is categorized by the domain node closest to a node matching the query. Keywords related to the category may be determined from the nodes that are hooked to the domain node. The related keywords can be used to narrow a search or expand the metadata of a document.

The goal of search is to find the most relevant information. Popular search engines such as Yahoo!, Google, and MSN, have relied on traditional horizontal approach to searching. Horizontal search engines are usually characterized by a lack of a hierarchal structure. Horizontal search engines rely on search crawlers that typically index almost everything over the Internet or a network. The results they produce span a very broad range of categories. However, users frequently desire search results from a narrower range of categories.
Since search queries tend to be short, one technique requires the search query to be more complex. Some search systems allow users to input complex logic queries in order to get better results. This approach is undesirable because the required search format in such systems is no longer intuitive. Some users would therefore not take the time to learn to use a system and avoid it altogether. Once a user is familiar with the particular search format, even more time and effort is required to craft a proper search statement.
In order to narrow searches while still allowing initial search queries to remain simple, a knowledge-based search engine suggests additional search terms to add to the initial search query. The knowledge-based search engine asks the user for keywords related to the initial query, and the user is required to submit the additional keywords at query time. The process of determining related keywords is difficult and time-consuming for the user. Thus, there is a need for an approach that is more efficient for the user performing a knowledge based search.
The approaches described in this section are approaches that could be pursued, but not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated, it should not be assumed that any of the approaches described in this section qualify as prior art merely by virtue of their inclusion in this section.

Categorizing queries and expanding keywords with a coreference graph


A pump for moving a fluid includes an outer chamber having a first end wall portion containing a fluid entrance port and a second end wall portion containing a fluid exit port, a valve tube slidably contained within the chamber and having a first edge with a cut out section, adjacent the chamber first end wall portion, a first cup member within the valve tube having an outwardly flared side wall with a lip resiliently bearing against the valve tube adjacent the first edge and having a bottom wall smaller than the chamber first end wall portion, spacer connecting and spacing apart the first cup member bottom wall and the chamber first end wall portion, a plunger having a tubular stem portion containing a check valve plug and extending through the chamber exit port, and having a second cup member contained within the valve tube and also having a bottom wall with a hole opening into the stem portion and an outwardly flared side wall bearing against the valve tube and oriented to oppose the first cup member, such that when the stem portion is moved outward through the exit port, the first and second cup members move apart and create a low pressure area between them, while the friction of the second cup member dragging against the valve tube moves the valve tube cut out section to a position beside the side wall lip of the first cup member, permitting liquid to pass through the entrance port and the cut out section and into the valve tube between the first and second cup members.

1. Field of the Invention
The present invention relates generally to the field of pumps for moving liquids, and more specifically to a high volume pump for low viscosity liquids such as water as well as high viscosity liquids such as shampoo, mustard and ketchup, the pump including an outer cylindrical chamber having a central entrance port in a first end wall and a central exit port in a second end wall, a valve tube slidably contained within the cylindrical chamber and having cut out sections in a first edge nearest the chamber first end wall, a first cup member having an outwardly flared side wall with a lip resiliently bearing against the inner surface of the valve tube to create a seal near the valve tube first edge with the cut out sections beyond the side wall lip and a circular bottom wall with a diameter smaller than that of the first chamber end wall, the first cup member bottom wall being connected to spacer members extending from the first end wall, a plunger having a tubular stem containing a check valve plug and extending through the chamber exit port and having a second cup member attached to the tubular stem within the chamber also having an outwardly flared side wall bearing against the inner surface of the valve tube to create a seal and oriented to oppose the first cup member, so that when the plunger stem is slid out though the exit port, the first and second cup members move apart and create a low pressure area or vacuum between them, while the friction of the second cup member dragging against the valve tube pulls the valve tube a certain distance relative to the first cup member, and thus moves the valve tube first edge cut out sections beyond the first cup member side wall lip, breaking the seal and permitting liquid to be drawn by the vacuum through the chamber entrance port, around the first cup member side wall and through the cut out sections to enter the valve tube between the first and second cup members; and pushing the plunger stem back through the exit port causes the second cup member to once again drag against the valve tube and move the cut out sections back beyond the first cup member side wall lip, restoring the first cup member seal and pressurizing the liquid between the cup members, driving the liquid into a hole in the second cup member bottom wall and up through the plunger stem, dislodging the check valve plug in the stem and permitting the pressurized liquid to enter a nozzle and escape.
2. Description of the Prior Art
There have long been pumps for use in vessel lids for dispensing cleaning fluids, mustard, and other liquids. A problem with these pumps has been that they almost invariably contain floating ball type check valves. These check valves have proven unreliable, often sticking, jamming and blocking fluid delivery, or moving out of position and leaking when the pump is left resting on its side. Another problem with these ball check valves has been that they can greatly increase the expense of the pump.
It is thus an object of the present invention to provide a high velocity, high volume pump suited for use in vessel lids and tops, and which is reliable and does not include any ball check valves.
It is another object of the present invention to provide such a pump which seals against leakage at all times and in any orientation or position.
It is still another object of the present invention to provide such a pump which delivers liquid with minimal pump action, and does not require extensive priming.
It is finally an object of the present invention to provide such a pump which has a design well suited for easy and inexpensive molding and assembly.


A system for detecting and counting ions comprises a source of atoms, a hot filament ion source, means for generating an electric field and a magnetic field, and means for detecting and counting the ions, and the filament comprises a portion that is concave along its longitudinal and/or transverse axis.

It is known to use a hot filament ion source in a system for detecting and counting ions. Atoms, originating from a source of atoms, present near the hot filament are ionized and the ions formed are reemitted. The reemitted ions form a beam that is focused in the direction of ion detecting and counting modules using ion extracting electrodes and a magnetic field.
The document "Optimisation of a Langmuir-Taylor detector for lithium" by R. Delhuille et al. (Rev. Sci. Instrum. 73, 2249 (2002)) describes a system for detecting and counting ions comprising a source of atoms, a hot filament ion source, ion extracting electrodes and ion detecting and counting modules. The filament of the ion source takes the form of a substantially flat strip, in other words the filament is a straight flat strip.
The operating principle of this system for detecting and counting ions may be summarized as follows: a source of atoms emits a gas composed of atoms. The atoms of the gas strike the hot filament, said filament has a work function higher than the ionization energy of the atoms. One or more judiciously placed extracting electrodes, possibly encircling the filament, facilitate the reemission of the ions, the trajectory of the latter being oriented toward the source of atoms. A magnetic field then deviates the trajectory of the ions toward the detecting and counting modules.
One drawback of the aforementioned system, such as described in the document, resides in the fact that only a certain percentage, typically 50%, of the ions emitted by the hot filament is focused on the ion detecting and counting modules, thereby leading to a substantial loss of said ions at the detecting modules.


Examples of the present disclosure are related to systems and methods to redirect vertical growth of flowering plants. In embodiments, a portable growing system may redirect vertical growth of plants in a late vegetative stage and in an early flower stage. This may allow lower budding sites positioned within the portable growing system to receive substantially the same amount of light as higher budding sites positioned within the portable growing system.

Field of the Disclosure
Examples of the present disclosure are related to systems and methods to control and redirect vertical growth of flowering plants. More particularly, embodiments relate to a dynamic and portable overhead plant training system with adjustable screens, wherein the screens are configured to allow lower budding sites (older sites) to receive substantially the same amount of light as higher budding sites (younger sites).
Background
The proliferation of urban gardening has spawned techniques that help maximize crop yields in restricted space, such as the space restrictions experienced by indoor gardeners. During the process of indoor gardening plants are grown in individual stationary containers and placed together in a space that delivers their environmental needs.
Some gardeners may place a fixed height and stationary screen above the stationary containers. Conventionally, the mesh screen is configured to redirect the vertical growth of the plant to a horizontal plane in late vegetative and early flowering stages. However, conventional growing methods also require stationary containers with fixed screens, wherein the screens are positioned at a fixed and stationary height. This creates a number of inefficiencies during the growing process. The inefficiencies may be due to different plants having different environmental needs, such as distance of light source to flowering sites, lighting cycles, temperatures, humidity, health or insect issues, varying growth rates, etc.
Accordingly, needs exist for more effective and efficient systems and methods for adjustable overhead plant training screens being coupled with a portable container that allows the gardener to cater to the needs of a single plant.

Systems and methods utilizing an overhead plant training screen


In a computer system processing out of order commands, a method for detecting situations in which errors could be caused by execution of an out of order command. The method includes the steps of receiving a first address of a first type and receiving a next address of the first type. Information is accumulated regarding differences between the first address and the next address. The method also includes receiving an address of a second type and using the accumulated information to determine whether the address of the second type is an address associated with a command whose execution can create a hazard. A hazard indication is generated if it is determined that the address of the second type is an address associated with a command whose execution can create a hazard. In one embodiment, the first type of address is an address associated with a first type of command and the second type of address is an address associated with a second type of command. In another embodiment, the first type of command and the second type of command are the same type of command.

In typical computer systems a processor, dynamic random access memory (DRAM) controller, or similar apparatus executes commands. Execution usually involves performing some operation on data that is stored in a memory location and referenced using an address. For various reasons, for instance to increase the rate at which a processor can execute commands, commands may be scheduled by a computer system to be executed in a different order than the order in which they were issued. Out of order execution can improve system performance but also introduces the possibility of errors. For example, when a read command is scheduled to be executed out of order in advance of a write command that originally preceded it, the data read upon execution of the read command may not be the correct data. This is because the write command that was supposed to have placed the correct data at a particular address to be read by the read command has not been executed. This type of error is a read after write (RAW) error. Whenever a read command involving an address is scheduled ahead of a write command involving the same address a RAW hazard exists. In other words, it is possible that the RAW error may occur, but not certain.
Write after read (WAR) and write after write (WAW) hazards can also be created by scheduling commands for execution out of order (reordering). Read after read (RAR) hazards can also exist in a system in which read operations have side effects. Depending upon the type of task being accomplished by the command and the type of processing system, not all types of hazards may actually threaten the integrity of data. For example, for some tasks writes may never be reordered. Therefore, it is not always necessary to identify each type of hazard.
Prior methods of detecting reordering hazards typically require that a list of addresses be maintained for all outstanding commands and that an address associated with a new command be compared against the list. This method requires a great deal of hardware, the amount of hardware may be expressed as O(n*m) where n is the address width and m is the number of outstanding commands. If the number of outstanding commands is large, this method requires a prohibitively expensive amount of hardware. In fact, such systems are usually restricted to having no more than eight commands outstanding. The complexity and size of prior reordering hazard detection systems are further increased if commands may span multiple units of address. When a command is received it typically includes both an address and a length, where the length indicates a number of addressing units whose first addressing unit begins with the address included in the command. Addressing units may vary with particular systems or applications. For example, an addressing unit may refer to a word of 16 bits or a quad word of 64 bits. When a command indicates multiple addressing units, a hazard detection system must account for each address not explicitly stated. With prior methods this causes the amount of hardware to be increased to O(n*m*1), where 1 is the maximum command address span. If some false positive indications are acceptable, the hardware requirements may be reduced somewhat. In this situation hazards may be indicated where they do not actually exist. This is somewhat undesirable because when hazards are detected, system operation is slowed by the system taking steps to prevent commands from being reordered around the hazardous command. For some systems or applications, however, a number of false positive indications will not impact performance.
Even systems that can tolerate some false positive indications may still be unable to use prior hazard detection methods if large numbers of outstanding commands may exist. What is needed is a method for detecting reordering hazards that is not dependent on the number of outstanding commands and that requires only a small amount of additional hardware.
The present invention provides a method and apparatus for detecting reordering hazards for a target application that can tolerate some false positive indications. The present invention also includes methods for reducing the number of false positive indications. In one embodiment, the present invention includes two registers each large enough to accommodate an address. A first register stores an address associated with an initial write command. A second register accumulates information about addresses associated with subsequent write commands. The contents of the second register are used to mask an address associated with a read command before it is compared with the contents of the first register to determine if reordering hazards may occur.
In another embodiment, the present invention includes one register that can store at least 3 states in each position corresponding to each bit of an address. One state indicates that a bit of an address associated with a read command matches a corresponding bit of an address associated with an initial write command if the bit is a one. Another state indicates there is a match if the bit is a zero. Finally, a third, "force" state indicates that there is a match regardless of the state of the bit.
The present invention requires less hardware than traditional methods of hazard detection when more than two outstanding commands are considered. In addition, the present invention can detect reordering hazards more quickly and therefore allows for faster system operation. This is because the present invention only requires one address comparison whereas the prior method requires a comparison to be made for each address outstanding.

Method and apparatus for the detection of reordering hazards


The present invention relates to derivatized cyclofructan compounds, compositions comprising derivatized cyclofructan compounds, and methods of using compositions comprising derivatized cyclofructan compounds for chromatographic separations of chemical species, including enantiomers. Said compositions may comprise a solid support and/or polymers comprising derivatized cyclofructan compounds.

Enantiomeric liquid chromatography (LC) separations have attracted great attention in the past few decades. Currently, over a hundred chiral stationary phases (CSPs) have been reported, and these CSPs are made by coating or bonding the chiral selectors to supports, usually silica gel supports. Interestingly, only a few types/classes of CSPs dominate the field of enantiomeric separations. Polysaccharide-based CSPs, macrocyclic antibiotic CSPs, and π complex CSPs are examples of dominant classes. And within each class of CSP there often are one or two dominate entities. Thus, despite the introduction of many chiral selectors/CSPs, only a few are used for the majority of separations. It has been said that in order for any new CSP to make a substantial impact, it must fulfill one or more of the following requirements: (a) broader applicability than existing CSPs, (b) superior separation properties for specific enantiomers (e.g., better selectivity, higher efficiency, more beneficial solvent compatibilities, shorter separation times, lower cost, enhanced ability to use supercritical fluid chromatography, etc.), or (c) fill an important separation niche where no other CSPs are operative.
Cyclofructans (CFs) are one of a relatively small group of macrocyclic oligosaccharides. Cyclodextrins are perhaps the best known member of this class of molecules. However, CFs are quite different in both their structure and behavior. CFs are cycloinulo-oligosaccharides consisting of six or more β-(2→1)-linked D-fructofuranose units. Each fructofuranose unit contains four stereogenic centers and three hydroxyl groups. A common shorthand nomenclature for these compounds is CF6, CF7, CF8, etc., where CFn denotes a cyclofructan having n fructose moieties (i.e., 6, 7, 8, etc.) in the cyclic oligomer.
Cyclofructans were first reported by Kawamura and Uchiyama in 1989. They can be produced via fermentation of inulin by at least two different strains of Bacillus circulans. The gene that produces the cycloinulo-oligosaccharide fructanotransferase enzyme (CF Tase) has been isolated, and its sequence determined and incorporated into the common yeast, Saccharomyces cerevisiae. Hence, the facile production of CFs is possible. The basic structure of CFs is shown in FIG. 1. From the x-ray crystal structure of CF6 it is known that the smaller CFs have no hydrophobic cavities as do cyclodextrins. Consequently, hydrophobic inclusion complexation, which plays an important role in the association of organic molecules with cyclodextrins, does not seem to be relevant for cyclofructans.
Instead, the pentose moieties (fructoses) of CFs form a propeller-like circumference around a crown ether core unit. For example, the crystal structure of CF6 reveals that six fructofuranose rings are arranged in a spiral or propeller fashion around the 18-crown-6 core, oriented either up or down toward the mean plane of the crown ether. Six three-position hydroxyl groups alternate to point toward or away from the molecular center, and the three oxygen atoms pointing inside are very close to each other (˜3 Å). It is clear that there is considerable internal hydrogen bonding in the cyclofructan molecule. As a result, access to the 18-crown-6 core on one side of the macrocycle is blocked by the hydrogen bonded hydroxyl groups. The other side of CF6 appears to be more hydrophobic, resulting from the methylene groups of —O—C—CH2—O— around the central indentation. A computational lipophilicity pattern of CF6 also confirms that CF6 shows a clear "front/back" regionalization of hydrophilic and hydrophobic surfaces. Both the crystal structure and computational modeling studies demonstrate that CF6 appears to have considerable additional internal hydrogen bonding. The fact that three 3-OH groups completely cover one side of the 18-crown-6 ring and the core crown oxygens are almost folded inside the molecule makes CF6 very different from other 18-crown-6 based chiral selectors. Table 1 gives relevant physico-chemical data for CF6, CF7 and CF8.
TABLE 1Physico-chemical properties of cyclofructans 6-8.Melting[α]D20 (°) inCavity I.D.MacrocycleMacrocycleMacrocycleM.W.Point (° C.)H2O(Å)O.D. (Å)Height (Å)CF6972.84  210-219a−64.62.314.68.7-9.4(231-233)CF71134.98215-222N/A126.96.36.199-8.9CF81297.12N/AN/A4.716.18.5-9.2aMelts and decomposes in this range.
Cyclofructans have been used in a variety of applications, mostly as an additive in consumer products or as a means to associate metal ions in solution. Many applications of CFs as additives in consumer products are similar to those of cyclodextrins. For example, CFs have been used as paper coatings, moderators of food and drink bitterness and astringency, browning preventive agents, emulsion polymerization agents, ink formulation agents, agents for suppressing smells, parts of drug delivery systems, lubricants, and so on. In addition, CFs have been shown to have cryoprotective effects and to be useful as complexing agents for some ions. However, to our knowledge CFs or their analogues have never been used as a broadly useful CSP for the separation of enantiomers by chromatography. Not intending to be bound by theory, it is possible that un-derivatized (or "native") CFs cannot be used as CSPs for gas-liquid chromatography (GLC) due to their high melting points and their inability to solubilize in other liquid GLC stationary phases. For the above-mentioned structural reasons, it is also possible that native CF6 and other CFs have limited capabilities to form either hydrophobic inclusion complexes and/or crown ether inclusion complexes.

Compositions and methods for cyclofructans as separation agents

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