In a communication system comprising a mapper or other type of physical layer device coupled to a link layer device, the physical layer device comprises payload extraction circuitry and payload insertion circuitry. The payload extraction circuitry is configured to extract a payload from an ingress synchronous transport signal received over an ingress link, and the payload insertion circuitry is configured to insert a payload received from the link layer device into an egress synchronous transport signal for transmission over an egress link. The payload extracted from the ingress synchronous transport signal is transmitted by the physical layer device to the link layer device over an output serial data line of a serial interface, and the payload inserted into the egress synchronous transport signal is received by the physical layer device from the link layer device over an input serial data line of the serial interface.

Conventional network-based communication systems include systems configured to operate in accordance with well-known synchronous transport standards, such as the synchronous optical network (SONET) and synchronous digital hierarchy (SDH) standards.
The SONET standard was developed by the Exchange Carriers Standards Association (ECSA) for the American National Standards Institute (ANSI), and is described in the document ANSI T1.105-1988, entitled "American National Standard for Telecommunications—Digital Hierarchy Optical Interface Rates and Formats Specification" (September 1988), which is incorporated by reference herein. SDH is a corresponding standard developed by the International Telecommunication Union (ITU), set forth in ITU standards documents G.707 and G.708, which are incorporated by reference herein.
The basic unit of transmission in the SONET standard is referred to as a synchronous transport signal level-1 (STS-1). It has a serial transmission rate of 51.84 Megabits per second (Mbps).
Synchronous transport signals at higher levels may be concatenated or channelized. For example, an intermediate unit of transmission in the SONET standard is referred to as synchronous transport signal level-3, concatenated (STS-3c). It has a serial transmission rate of 155.52 Mbps. The corresponding unit in the SDH standard is referred to as STM-1. In a concatenated synchronous transport signal, the entire payload is available as a single channel. A channelized signal, by way of contrast, is divided into multiple channels each having a fixed rate. For example, the channelized counterpart to the concatenated STS-3c signal is denoted STS-3. STS-3 is a channelized signal that comprises three separate STS-1 signals each at 51.84 Mbps.
A given STS-3c or STM-1 signal is organized in frames having a duration of 125 microseconds, each of which may be viewed as comprising nine rows by 270 columns of bytes, for a total frame capacity of 2,430 bytes per frame. The first nine bytes of each row are overhead, while the remaining 261 bytes of each row are payload. The overhead includes transport overhead (TOH) and path overhead (POH). Additional details regarding signal and frame formats, such as J0, J1 and other signals, and synchronous payload envelope (SPE) formats, can be found in the above-cited documents.
A drawback of conventional SONET or SDH network-based communication systems relates to the mapping of synchronous transport signals like STS-3c or STM-1 to or from corresponding higher-rate optical signals such as a SONET OC-12 signal or an SDH STM-4 signal. An OC-12 optical signal carries four STS-3c signals, and thus has a rate of 622.08 Mbps. The SDH counterpart to the OC-12 signal is the STM-4 signal, which carries four STM-1 signals, and thus also has a rate of 622.08 Mbps. The mapping of these and other synchronous transport signals to or from higher-rate optical signals generally occurs in a physical layer device commonly referred to as a mapper, which may be used implementing implement an add-drop multiplexer (ADM) or other node of a SONET or SDH communication system.
Such a mapper typically interacts with a link layer processor. A link layer processor is one example of what is more generally referred to herein as a link layer device, where the term "link layer" generally denotes a switching function layer. Another example of a link layer device is a field programmable gate array (FPGA). These and other link layer devices can be used to implement processing associated with various packet-based protocols, such as Internet Protocol (IP) and Asynchronous Transfer Mode (ATM), as well as other protocols, such as Fiber Distributed Data Interface (FDDI).
In mapping synchronous transport signals like STS-3c or STM-1 to or from higher-rate optical signals, a typical conventional mapper is unable to extract and transfer just the payload of the STS-3c or STM-1 signal to the link layer device. This is disadvantageous in that it requires the link layer device to include circuitry for performing the payload extraction operation, which increases the complexity and cost of the link layer device. Also, the link layer device is usually not optimized for such operations, and thus throughput performance may be negatively impacted. Similarly, the typical conventional mapper is unable to receive just the payload of the STS-3c or STM-1 signal from the link layer device, but instead must receive the entire signal including all framing overhead information. Again, this results in additional hardware requirements in the link layer device, in that circuitry is required to add the framing overhead to the payload to form the complete STS-3c or STM-1 signal. Implementing this type of payload insertion operation in the link layer device may also have a negative impact on throughput performance.
Accordingly, a need exists for an improved mapper that is capable of processing synchronous transport signals such as STS-3c or STM-1 without requiring that payload extraction or insertion operations for such signals be performed by a link layer device.

Synchronous transport signal mapper with payload extraction and insertion functionality


A magnetostrictive transducer including a plurality of magnetostrictive laminates each having a first end and a second end. The first and second ends of the laminates include openings. The laminates are arranged in a stacked configuration and bonded together by solder at the first and second ends. At the first and second ends the solder extends through the openings of the laminates forming a solder bar therein. The solder bars bond the laminates together with increased mechanical strength and also provide increased electrical contact between the laminates.

1. Field of the Invention
The present invention relates in general to ultrasonic medical or dental tools and, in particular, to an improved magnetostrictive transducer for ultrasonic medical or dental tools including an improved laminated structure that incorporates openings to bond the individual laminates.
2. Description of Prior Developments
Magnetostrictive transducers are well known devices for converting electrical energy into vibrational energy at ultrasonic frequencies. These devices are utilized in a variety of ultrasonic medical and dental tool applications including various types of dental scraping and scaling tools as well as surgical tools for fragmenting tissue.
One Example of such an application is disclosed in U.S. Pat. No. 5,382,162 to Sharp. As shown in FIG. 1, Sharp discloses an ultrasonic dental scaler which typically includes a dental scaler insert 2, a housing 10 and dental scaler electronics 16. The scaler insert 2 includes a magnetostrictive transducer 4, an O-ring 6 and a dental tool 8, as shown.
During operation, the scaler insert 2 is placed within the housing 10, wherein the O-ring 6 provides a water tight seal therebetween. Further, the magnetostrictive transducer 4 interacts with a magnetic field created by an energized coil 12 positioned on the housing 10 to vibrate the scaler insert 2. The scaler electronics 16 control the current supplied to the coil 12 so that the scaler insert 2 is vibrated at an ultrasonic frequency. This causes the dental tool 8 to be vibrated which enables it to scale teeth.
Conventional Magnetostrictive transducers of a laminated structure are described in such patents as U.S. Pat. No. 3,076,904 to Kleesattel, U.S. Pat. No. 3,930,173 to Banko and U.S. Pat. No. 4,986,808 to Broadwin et al. As shown in FIG. 2, such a laminated structure 18 typically includes a plurality of laminates 20 which are bonded together in a stacked configuration. The individual laminates 20 are elongated substantially flat members fabricated from magnetostrictive material such as nickel or a nickel alloy which are coated with a layer of oxide. The oxide serves to insulate the adjacent laminates from each other.
As is further evident from FIG. 2, the laminates 20 are bonded together at each end 22,24 by a brazing process. This brazing process produces brazed ends 22,24 having solder that covers all four sides of the stacked laminates 20. These brazed ends 22,24 are intended to keep the laminates 20 bonded together during operation as well as provide electrical contact between the laminates 20.
However, during operation, a problem arises in regard to these brazed ends 22,24. Since the magnetostrictive transducer 18 operates at an ultrasonic frequency, the individual laminates vibrate at this ultrasonic frequency. This vibration after a long period of time can cause metal fatigue in the abraded ends 22,24 which ultimately results in the solder cracking and the individual laminates 20 spreading part. Once the laminates 20 spread apart, the magnetostrictive transducer 18 is no longer functional and must be either replaced or repaired.
Further, conventional magnetostrictive transducers can also be difficult to fabricate. Since a large number of individual laminates are required to be bonded together, a significant amount of time is required to braze each of the ends. Also, the individual laminates are prone to be deformed during fabrication since the individual laminates are usually pushed along an assembly line before being bonded together.
In view of the above, a need therefor exists for a magnetostrictive transducer which is less susceptible to the metal fatigue that causes the laminations to spread apart. A further need exists for a magnetostrictive transducer that is more readily and easily fabricated.


An optical printed circuit board includes a substrate, a first cladding layer, a core layer, and a second cladding layer. The first cladding layer is formed on the substrate and defines a receiving groove. The core layer is received in the receiving groove. The second cladding layer is formed on the core layer. The refractive index of the core layer is greater than that of the first cladding layer and that of the second cladding layer. The core layer includes a bottom surface, a first refractive surface, and a second refractive surface. An included angle between the bottom surface and the first refractive surface is about 135 degrees. An included angle between the bottom surface and the second refractive surface is about 135 degrees.

1. Technical Field
The present disclosure relates to an optical printed circuit board (OPCB), an apparatus and a method for manufacturing the OPCB.
2. Description of Related Art
OPCBs include a cladding layer and a core layer received in the cladding layer. The core layer is used for transmitting optical signals. In related art, the core layer needs to be manually assembled in the cladding layer, which will reduce the manufacturing efficiency of the OPCBs.
Therefore, it is desirable to provide an OPCB, an apparatus and a method for manufacturing the OPCB that can overcome the above-mentioned limitations.

Optical printed circuit board, apparatus and method for manufacturing same


Metal tie straps create tension/compression connections between plywood or oriented strand board decking panels in portions or throughout the roof diaphragm of a typical panelized or built up roof system. Heat build up at such metal tie straps is minimized by installing a radiant reflective sheeting or cool seal over the metal tie strap before applying the roofing membrane over the sheeting and tie straps.

The present invention relates to industrial roofing, such as low slope roof diaphragms (Panelized Roof Systems) that are generally flat. Panelized Roof Systems can be installed over large or small warehouses. In these systems, roof sheathing comprises plywood or oriented strand board decking panels (generally 4 foot by 8 foot) with stiffeners pre-framed at 16 or 24 inches on center. The long dimension of each decking panel typically is oriented parallel to a support. Adjacent panel edges are placed over and nailed to common framing members. The roof forms a blocked diaphragm, which has significantly greater seismic and high wind resistance than conventionally framed roofs with unblocked sheathing. Various low slope roof diaphragm configurations are shown in the Engineered Wood Association publication "Lateral Load Connections for Low-Slope Roof Diaphragms", APA The Engineered Wood Association (2004).
Metal (usually galvanized steel) tie-straps are nailed over the roof decking (or sheathing) panels to transfer tension forces between two framing members. This creates a tension/compression connection from the wall to the inner portion of the diaphragm. This combination then is covered with built up roofing membrane usually comprising layers of felt, strapping, roofing tar and roofing shingles or rolls.
Typical roofing materials such as asphalt and modified bitumen and gravel can absorb more than seventy percent (70%) of the solar energy that falls upon them. Roofs having dark roofing materials, which tend to absorb more radiant or solar energy, may become as hot as 88° C. (190° F.) on a sunny day. Moreover, it has been reported that urban areas, such as Los Angeles, Calif., can record temperatures about 3 to 4° C. (6 to 8° F.) hotter than surrounding areas. These urban heat islands (i.e., differences in temperature between urban and rural areas) result in increased air-conditioning costs, energy use and pollution. (http://www.professionalroofing.net/past/oct98/feature.asp).
Metal tie straps (or continuity ties) are now required by building codes to be installed as support for roof regions of low-slope roofs near building side walls. In some cases the tie straps are installed onto decking panels throughout the roof diaphragm. Such metal tie straps conduct heat energy and cause the regions where such straps are found to become hotter than adjoining roof regions. Such excessive heating leads to "hot spots" where the asphalt and bitumen roof structure is even hotter than neighboring roof regions. These "hot spots" weaken the roof membrane, accelerate aging of the roof, and require additional maintenance to avoid leaks that can cause structural failure if not repaired in a timely manner. The industry continues to seek a panelized roof system that does not create "hot spots".


A multiplication logic circuit comprises array generation logic and array reduction logic. The array reduction logic comprises array reduction logic for a first level of array reduction which comprises maximal length parallel counters for reducing maximal length columns. The output of the maximal length parallel counters are then further reduced by a second level of reduction logic comprising logic circuits with asymmetric delays in order to compensate for the differential delays experienced by the outputs of the maximal length parallel counters.

It is instrumental for many applications to have a block that adds n inputs together. An output of this block is a binary representation of the number of high inputs. Such blocks, called parallel counters (L. Dadda, Some Schemes for Parallel Multipliers, Alta Freq 34: 349-356 (1965); E. E. Swartzlander Jr., Parallel Counters, IEEE Trans. Comput. C-22: 1021-1024 (1973)), are used in circuits performing binary multiplication. There are other applications of a parallel counter, for instance, majority-voting decoders or RSA encoders and decoders. It is important to have an implementation of a parallel counter that achieves a maximal speed. It is known to use parallel counters in multiplication (L. Dadda, On Parallel Digital Multipliers, Alta Freq 45: 574-580 (1976)).
A full adder is a special parallel counter with a three-bit input and a two-bit output. A current implementation of higher parallel counters i.e. with a bigger number of inputs is based on using full adders (C. C. Foster and F. D. Stockton, Counting Responders in an Associative Memory, IEEE Trans. Comput. C-20: 1580-1583 (1971)). In general, the least significant bit of an output is the fastest bit to produce in such implementation while other bits are usually slower.
The following notation is used for logical operations:                ⊕-Exclusive OR;        v-OR;        ^-AND;        -NOT.An efficient prior art design (Foster and Stockton) of a parallel counter uses full adders. A full adder, denoted FA, is a three-bit input parallel counter shown in FIG. 1. It has three inputs X1, X2, X3, and two outputs S and C. Logical expressions for outputs areS=X1⊕X2⊕X3,C=(X1^X2)v(X1^X3)v(X2^X3).A half adder, denoted HA, is a two bit input parallel counter shown in FIG. 1. It has two inputs X1, X2 and two outputs S and C. Logical expressions for outputs areS=X1⊕X2,C=X1^X2.
A prior art implementation of a seven-bit input parallel counter illustrated in FIG. 2.
Multiplication is a fundamental operation. Given two n-digit binary numbersAn−12n−1+An−22n−2+ . . . +A12+A0 and Bn−12n−1+Bn−22n−2+ . . . +B12+B0,their productP2n−122n−1+P2n−222n−2+ . . . P12+P0may have up to 2 n digits. Wallace has invented the first fast architecture for a multiplier, now called the Wallace-tree multiplier (Wallace, C. S., A Suggestion for a Fast Multiplier, IEEE Trans. Electron. Comput. EC-13: 14-17 (1964)). Dadda has investigated bit behaviour in a multiplier (L. Dadda, Some Schemes for Parallel Multipliers, Alta Freq 34: 349-356 (1965)). He has constructed a variety of multipliers and most multipliers follow Dadda's scheme.
Dadda's multiplier uses the scheme in on FIG. 3. If inputs have 8 bits then 64 parallel AND gates generate an array shown in FIG. 4. The AND gate sign ^is omitted for clarity so that Aj^Bj becomes AiBj. The rest of FIG. 4 illustrates array reduction that involves full adders (FA) and half adders (HA). Bits from the same column are added by half adders or full adders. Some groups of bits fed into a full adder are in rectangles. Some groups of bits fed into a half adder are in ovals. The result of array reduction is just two binary numbers to be added at the last step. One adds these two numbers by one of the fast addition schemes, for instance, conditional adder or carry-look-ahead adder.
UK patent application Numbers 0019287.2 and 0101961.1 and U.S. patent application Ser. No. 09/637,532 and US patent application entitled "A parallel counter and a multiplication logic circuit" filed on Jan. 25, 2001, the contents of all of which are hereby incorporated by reference, disclose a technique for the modification or deformation of the array prior to array reduction. The array deformation derives the benefit of reducing the depth of the array to a number greater than 2n−1−1 and less than or equal to 2n−1, where n is an integer. This reduction of the maximum depth of the array enables the efficient use of parallel counters in the array reduction step.


Embodiments of this disclosure disclose a planar array antenna, including at least one first radiation array arranged along a first direction. The first radiation array includes at least one first radiation unit and at least one radiation unit pair, the first radiation unit and the radiation unit pair are disposed on an axis of the first radiation array, the radiation unit pair includes at least two second radiation units, and the at least two second radiation units are symmetric with respect to the axis of the first radiation array. In addition, the embodiments of this disclosure further disclose a communications device to which the planar array antenna is applied.

An antenna is an indispensable part of a mobile communications device. During mobile communication, performance of a base station antenna directly affects a communication effect. With development of mobile communication, users have higher requirements on high-speed data transmission. In addition, requirement types of the users become increasingly diversified, and modern mobile communication is developing towards a multimode multiband direction. Mobile communications devices are updated at an increasingly faster speed. However, it becomes more difficult to obtain available urban site resources. A multimode multiband base station antenna provides a more effective means for site sharing during mobile communication, and satisfies a requirement of smooth upgrade of a device deployed on a live network and is environmentally-friendly and energy-saving. Therefore, the multimode multiband base station antenna is a direction of base station antenna development in the future. One multimode multiband base station antenna needs to include a plurality of antenna arrays that can work on a same frequency band or different frequency bands. However, limited mounting space and broadband work of the antenna array bring new challenges to antenna design.
To implement, in the limited mounting space, an electrical performance indicator of a multimode multiband antenna that satisfies the requirements, a solution in a current system is: implementing a dual-band array antenna by using a conventional two-column layout, that is, the dual-band array antenna includes two radiation arrays that are horizontally arranged, as shown in FIG. 1. However, the antenna has a relatively large horizontal width dimension and is not suitable for constructing a miniaturized multi-array antenna. If the horizontal width dimension of the antenna is reduced by reducing a distance between the radiation arrays, mutual coupling between the radiation arrays is increased, and there are problems that a horizontal beam width of the antenna is increased, a gain is reduced, or the like. Therefore, to reduce the horizontal beam width of the array antenna and increase the gain of the antenna, another solution in a current system is: implementing a dual-band array antenna by horizontally arranging one or more radiation units in a staggered manner, as shown in FIG. 2. However, although the horizontal width dimension of the antenna is relatively small by arranging one or more radiation units in a staggered manner, because the one or more radiation units deviate from an axis of the radiation array, the arrangement of the radiation units is asymmetric with respect to the axis of the radiation array, leading to anomalous asymmetric side lobes in a directivity pattern of the antenna and a reduced gain of the antenna.

Planar array antenna and communications device


A method and apparatus for aligning a swing tail cargo door. An alignment system comprises an alignment ramp, a set of pull-in hook mechanisms, and a set of lock trains. The alignment ramp may be configured for initial alignment between a swing tail cargo door and an aircraft fuselage during closing of the swing tail cargo door. The set of pull-in hook mechanisms may be disposed along an interface between the swing tail cargo door and the aircraft fuselage and may be capable of a final alignment between the swing tail cargo door and the aircraft fuselage during the closing of the swing tail cargo door. The set of lock trains may be disposed along the interface and may be capable of locking a plurality of latch actuators in the latched position.

1. Field
The present disclosure relates generally to an improved aircraft and in particular to a swing tail cargo door on an aircraft. Still more particularly, the present disclosure relates to a method and apparatus for moving a swing tail cargo door on an aircraft.
2. Background
A swing tail aircraft may be an aircraft in which the tail portion of the aircraft may be moveably mounted to allow the tail portion to swing or move to expose the inner portion of the aircraft. This tail may also be referred to as a swing tail cargo door.
With the use of the swing tail cargo door, larger cargo, such as, without limitation, vehicles, fuselage sections, or wings, may be placed into and moved out of an aircraft. This type of cargo may be loaded and unloaded from the back of the aircraft with the swing tail in an open position. In this manner, much larger parts may be placed into the aircraft in comparison to more traditional cargo doors.
With large cargo aircraft, the weight of the swing tail door may cause alignment problems when closing the swing tail cargo door. For example, the swing tail door may become out of line vertically with respect to the fuselage. If the alignment varies too much, latching and locking mechanisms may be unable to properly close, latch, and lock the swing tail door in place.
Currently, this kind of misalignment may require aircraft personnel to use equipment to lift the swing tail cargo door upwards to restore the vertical alignment to properly close the swing tail door. Such a process may be manually intensive requiring equipment and personnel to restore the alignment when closing the swing tail door. This type of system, however, may not allow for a quick closure especially in high wind conditions.
Accordingly, there is a need for a method and apparatus for aligning a swing tail cargo door, which overcomes the problems discussed above.

Method and apparatus for closing a swing tail on an aircraft


A method includes making a first determination as to whether a current pixel has a value which reflects a mosquito noise artifact, and determining whether to apply a filtering process at the current pixel based on a result of the first determination. In addition, or alternatively, a method includes making a second determination as to whether a current pixel has a value which reflects a ringing artifact, and determining whether to apply a filtering process at the current pixel based on a result of the second determination.

It is often desirable to apply compression-encoding to video signals prior to transmission or storage of the video signals. In some commonly employed compression-encoding strategies (e.g., ITU H.261/H.263/H.264 or MPEG 1/MPEG 2/MPEG 4), block transforms (e.g., discrete cosine transform, or "DCT") are applied with motion compensation, followed by quantization of the transform coefficients and entropy encoding. Some of the video signal information is typically lost during compression encoding, particularly during the quantization stage. The loss of information may lead to reduced image quality upon de-compression of the video signal. It is desirable to employ certain approaches to counteract image artifacts generated upon de-compression.
One type of de-compression artifact is known as "mosquito noise", which results from the abrupt truncation of high frequency DCT coefficients during quantization. Mosquito noise typically takes the form of small distortions (seen as "busyness") near edges, especially edges of moving objects. It has proposed to mitigate mosquito noise by applying low pass filtering to the video signal after de-compression. However, the low pass filtering may introduce blurring throughout the image.
Another type of de-compression artifact is known as "ringing noise". This too results from truncation of high frequency DCT coefficients and has the appearance of ripples that extend outwardly from edges. Again low pass filtering may be employed to mitigate ringing noise, but often at the cost of blurring the entire image.

Detection of artifacts resulting from image signal decompression


The present invention relates to a process for manufacturing flat sheets of a glass-based material and to an apparatus therefor. The process comprises providing a glass preform, heating the glass preform in a furnace, forming a gob and a pre-sheet, removing the gob and drawing the glass pre-sheet into a flat glass sheet. Also provided is an apparatus for drawing a glass preform into a glass sheet, the apparatus comprising a draw furnace, stretching arms for stretching and drawing the pre-sheet into a glass sheet, and opposing edge rollers for applying a downward force on the glass sheet. The draw furnace may include a plurality of individual heating elements, the temperature of each heating element capable of being separately controlled. The apparatus may further include an annealing furnace for annealing the glass sheet.

1. Field of the Invention
The invention relates generally to a method and an apparatus for forming glass sheet, and more particularly to drawing glass sheet from a glass preform.
2. Technical Background
There is an increasing demand for flat glass sheets, especially precision flat glass sheets, i.e. of high surface quality and consistent thickness, which are made of a glass-based material such as a special glass or a glass-ceramic. Flat panel displays incorporating such flat sheets have received a great deal of attention recently. Much of the attention has centered on small units such as those used in laptop computers. However, consideration is now being given to larger units for information and entertainment applications, where there is a surge of interest in glasses having a high strain point in the display industry. These glasses are needed to make flat display panels for the next-generation liquid crystal displays (LCDs), e.g., active matrix LCDs (AMLCDs), and other advanced displays, e.g., plasma displays. Generally speaking, a strain point of at least 700° C. is desired. Preferably, the strain point is greater than 800° C. In the case of AMLCDs, the need for such a high strain point is dictated by the interest in bonding silicon chips or arrays directly onto glass substrates. Fabrication of poly-silicon on glass substrates is further facilitated by process temperatures of 900° C. or greater. In order to accomplish this objective, it is necessary for the thermal expansion behavior of the glass to be very similar to that of silicon, and for the strain point of the glass to be high enough so that compaction (also known as shrinkage or densification) and/or warping of the glass does not occur after the silicon chips are bonded to the glass and the glass is subsequently heated in further processing steps.
Liquid crystal displays (LCDs) may take the form of two basic matrix types, intrinsic or extrinsic matrix addressed. The intrinsic matrix type relies upon the threshold properties of the liquid crystal material. The extrinsic, or active matrix (AM), type has an array of diodes, metal-insulator-metal (MIM) devices, or thin film transistors (TFTs), that supplies an electronic switch to each pixel.
In both cases, two sheets of glass form the structure of the display. The separation between the two sheets is the critical gap dimension, of the order of 5–10 μm. The glass sheets must be transparent, and must withstand the chemical conditions to which they are exposed during display processing. Otherwise, the needs of the two matrix types differ.
Intrinsically addressed LCDs are fabricated using thin film deposition techniques at temperatures ≦350° C., followed by photolithographic patterning. As a result, the substrate requirements therefore are often the same as those for segmented displays. Soda-lime-silica glass with a barrier layer has proven to be adequate for most needs.
A high performance version of intrinsically addressed LCDs, the super twisted nematic (STN) type, has an added requirement of extremely precise flatness for the purpose of holding the gap dimensions uniform. Because of that requirement, soda-lime-silica glass used for those displays must be polished. Alternatively, a precision formed, barium aluminoborosilicate glass, marketed by Corning Incorporated, Corning, N.Y. as Code 1737, may be used without polishing.
Extrinsically addressed LCDs can be further subdivided into two categories; viz., one based on MIM or amorphous silicon (a-Si) devices, and the other based on polycrystalline silicon (poly-Si) devices. The substrate requirements of the MIM or a-Si type are similar to the STN application.
Devices formed from poly-Si, however, are processed at higher temperatures than those that are employed with a-Si TFTs. Substrates capable of use temperatures (taken to be 25° C. below the strain point of the glass) of 600° C.–800° C. are demanded, although the actual temperature required is mandated by the particular process utilized in fabricating the TFTs. Those TFTs with deposited gate dielectrics require temperatures in the range of 600° C.–650° C., while those with thermal oxides call for temperatures of about 800° C.
Both a-Si and poly-Si processes demand precise alignment of successive photolithographic patterns, thereby necessitating that the thermal shrinkage of the substrate be kept low. The higher temperatures required for poly-Si mandate the use of glasses exhibiting higher strain points than soda-lime-silica glass in order to avoid thermal deformation (compaction, i.e. shrinkage) of the sheet during processing. As can be appreciated, the lower the strain point, the greater this dimensional change. Thus, there has been considerable research to develop glasses demonstrating high strain points so that compaction is minimized during device processing at temperatures greater than 600° C.
U.S. Pat. No. 4,824,808 (Dumbaugh, Jr.) lists four properties which have been deemed mandatory for a glass to exhibit in order to fully satisfy the needs of a substrate for LCDs:
First, the glass must be essentially free of intentionally added alkali metal oxide to avoid the possibility that alkali metal from the substrate can migrate into the transistor matrix;
Second, the glass substrate must be sufficiently chemically durable to withstand the reagents used in the TFT matrix deposition process;
Third, the expansion mismatch between the glass and the silicon present in the TFT array must be maintained at a relatively low level even as processing temperatures for the substrates increase; and
Fourth, the glass must be capable of being produced in high quality thin sheet form at low cost; that is, it must not require extensive grinding and polishing to secure the necessary surface finish.
That last requirement is most difficult to achieve inasmuch as it demands a sheet glass production process capable of producing essentially finished glass sheet.
The two methods commonly used in manufacturing LCD substrates are the float process and the fusion process. Both of these processes require a refractory glass melter to deliver a stream of glass to a sheet-forming device. In the case of high strain-point glass compositions, a relatively large high-temperature glass melter is needed to deliver a high-quality stream of glass to the sheet-forming device. This is because high strain-point glasses have high fusion temperatures, typically in excess of 1700° C.
In the float process, a stream of molten glass is discharged from a melting furnace into a float furnace that contains a liquid metal medium. Typically, the metal is tin. The atmosphere in the float furnace is controlled to prevent oxidation of the tin. The molten glass floats and spreads out on the liquid tin in the form of a flat, continuous ribbon. The ribbon of glass is conveyed into an annealing lehr or cooling tunnel, where it is cooled at a controlled rate to ambient temperature. The cooled glass has a flat, smooth surface that requires a minimum of further finishing by processes such as grinding and polishing.
However, it is very difficult to form glasses having high strain points in an enclosure containing molten tin. This is because tin has high vapor pressures at temperatures in excess of 1050 to 1100° C. At the high forming temperatures required for high strain-point glasses, the molten tin will vaporize inside the float furnace and subsequently condense in colder parts of the furnace. In some cases, the condensation may be sufficiently high to create what is referred to as "tin rain," a situation where tin rains on the glass and is incorporated on the glass surface.
In the fusion process, a glass-forming melt flows into a refractory trough and then overflows in a controlled manner from either side of the trough. A key advantage of this process is that the surface of the glass sheet which is ultimately formed does not come in contact with any refractory material or other forming equipment. Another benefit of the process is that it yields a very flat and uniformly thick sheet of glass. As a result, no secondary processing is needed to obtain a smooth, flat, and uniform sheet of glass for display applications. However, the method suffers from not being able to process glasses having high strain points due to the high temperatures required, since such temperatures greatly accelerate deterioration of the glass forming components, and the potential for increased contamination of the glass melt. Typically, it is desirable to form the glass at viscosities in the range of 105 to 106 poise to obtain optimum flatness and uniform thickness.
A brief description of both the fusion draw and float processes are given in a manuscript entitled "Glass" by D.C. Boyd and D. A. Thompson, Encyclopedia of Chemical Technology, Vol. 11, Third Edition, pp. 807–880 (see pages 860–863). The fusion draw process is also described in U.S. Pat. Nos. 3,338,696 and 3,682,609, both issued to Dockerty. Unfortunately, neither the fusion draw process nor the float glass process is effective in producing flat sheet from a glass composition having a high strain point, one whose strain point may, for example, exceed 900° C.

Process and device for manufacturing glass sheet


A method of treating a cathode of an OLED device having a substrate and which has a spaced anode and organic layers between the anode and cathode includes evacuating a chamber so that it has a pressure no greater than 10−6 Torr; heating the OLED substrate in the chamber to a temperature less than 100° C.; and delivering gas, including ozone, to the evacuated chamber which includes the heated OLED substrate at a sufficient rate so that the pressure is less than 1 atmosphere, so that the life of the OLED substrate is increased and the operating voltage is decreased.

An organic light-emitting diode device, also called an OLED device, commonly includes a substrate, an anode, a hole-transporting layer made of an organic compound, an organic luminescent layer with suitable dopants, an organic electron-transporting layer, and a cathode. OLED devices are attractive because of their low driving voltage, high luminance, wide-angle viewing and capability for full-color flat emission displays. Tang et al. described this multilayer OLED device in their U.S. Pat. Nos. 4,769,292 and 4,885,211. OLED devices are generally anticipated to overtake liquid crystal displays (LCDs) as the preferred display technology.
Degradation of the output intensity occurs over time, which can lead to hue shifts or loss of contrast. Many approaches have been attempted to improve the operational stability of OLEDs. In U.S. Pat. No. 6,104,137, Abiko et al. enclosed an oxidizing gas within an airtight case. However, enclosing a gas within an airtight case adds to the complexity of manufacturing an OLED device. Moreover, long term effects of oxygen diffusing into the OLED device can be detrimental to the operating life of the device. There is therefore a need to develop a method to improve the stability of OLED devices using stabilizing dopants without causing a deterioration of the color.

Method of improving stability in OLED devices


Introduced here are security management platforms configured to identify, assess, and monitor organizational vulnerability to security threats. By monitoring netflow data regarding the traffic traversing the Internet, a security management platform can identify security threats that would otherwise go undetected. Such action can be performed instead of, or in addition to, monitoring netflow data regarding the traffic traversing a local network (also referred to as an “internal network”) associated with an organization under examination. Thus, rather than monitor the traffic leaving public-facing Internet Protocol (IP) addresses residing on the local network, the security management platform can instead monitor traffic traversing the Internet and then filter the traffic to identify flows originating from the local network, flows destined for the local network, or any combination thereof.

A computer network (also referred to as a "data network") is a digital telecommunications network that allows nodes to share resources. In a computer network, computing devices exchange data with one another via connections (also referred to as "data links"). These data links may be established over cable media, such as copper wires or fiber optic cables, or wireless media, such as Wi-Fi or Bluetooth® communication channels.
The traffic in a computer network is often analyzed to improve decision making for network operations, security techniques, etc. Traffic may be acquired from a variety of computing devices residing within the computer network to provide extensive visibility of traffic flow. Given the complexity and volume of traffic routed through many infrastructures, a variety of network tools have conventionally been used to identify, analyze, and/or handle security threats to a computer network. Examples of network tools include intrusion detection systems (IDSs) and intrusion prevention systems (IPSs).

Correlation-driven threat assessment and remediation


A safety interlock system for a robotic apparatus includes a light curtain in combination with ultrasonic sensors to perform a staged interlock to reduce unnecessary alarms or shutdowns. A robotic apparatus, such as a linear travel-type robot system, is protected by a fixed light curtain for detecting intrusion of a foreign object into a work space of the robotic apparatus. Ultrasonic transducers provide signals indicating a distance to an object interrupting the light beams forming the light curtain. An X-axis position of the robotic apparatus is compared with an object distance to determine whether to slow or stop robotic motion. Four stages of response to light beam interruption are provided. If there is no input from the ultrasonic transducer, an interruption of a light beam causes an immediate and complete halting of robotic movement to provide fail-safe operation. If the ultrasonic transducer indicates that the robotic apparatus and object are separated by a safe nominal operating distance, e.g., greater than six feet, an audible alarm is activated but robot maneuvering is not inhibited. If separation is within a warning range of, for example, three to six feet, robot movement speed is reduced and the alarm is activated. Finally, if separation is determined to be less than the minimum value of the warning range, i.e., less than three feet, the robot is fully stopped and the alarm is activated.

Many tasks previously performed by humans are now accomplished by robotic machines controlled by a stored program of instructions. These tasks include repetitive operations adaptable to machine implementation, operations in hazardous areas or involving handling of hazardous articles, processes accomplished in environments not conducive to human workers and operations requiring precision maneuvering and positioning of work objects. For example, in the semiconductor fabrication field, robots are used in a clean room environment to transport, handle and process semiconductor components including silicon wafers, chips and packaged integrated circuits. Each robotic device interacts with other robotic devices and with human workers stationed in the work space to supervise, control and perform other adjunct processes.
Associated safety systems are used to detect collison hazards and control robot operations accordingly. Collision hazards may be caused by intrusion of a foreign object such as a human, another robotic device, or some other material into a work envelope or work area of the robotic device. Current state of the art multiple beam infrared detection systems, commonly known as "light curtains", are used to prevent robotic systems from coming into contact with obstacles that enter the work envelope. An example is a human entering the work envelope of the X axis of a linear travel-type robot system.
As shown in FIG. 1, a multiple beam infrared detection system includes an infrared transmitter unit 22 including an infrared emitter module 24. Emitter module 24 includes a plurality of vertically aligned infrared light emitting diodes for emitting a plurality of parallel infrared light beams 26 forming a "light curtain" 28 between transmitter assembly 22 and opposing infrared receiver assembly 30. Light curtain 28 defines a vertically oriented planar area along one side or wall of the work envelope. The infrared light beams are received by infrared receiver unit 30 which includes an infrared detector assembly 32 for detecting infrared light beams 26. Assembly 30 comprises a plurality of vertically aligned infrared detectors such as phototransistors or photodiodes for receiving and detecting respective light beams 26. Associated control electronics process signals from detector assembly 32 to supply a logic signal. The logic signal provides an indication of an interruption of any of the light beams 26 forming curtain 28.
A machine such as a linear travel-type robot system 40 is located behind light curtain 28 within the work envelope. Robot 40 is maneuverable along the X axis on platform 42 in response to control signals supplied by a robot controller. The light curtain is used to prevent the robotic system from maneuvering into contact with obstacles that enter the work envelope by inhibiting robot motion upon detection of an object penetrating the light curtain. When interrupted, the light curtain system actives a complete safety stop of the X axis motion of the robot to avoid a collison with the obstacle. A light curtain system similar to that described is disclosed in Blau, U.S. Pat. No. 5,015,840, incorporated herein by reference and is commercially available from manufacturers including Triad Controls, Inc. of Pittsburgh, Pa., and Scientific Technologies Inc. of Hayward, Calif.
In another configuration, a multi-sided guarding system includes a plurality of mirrors for reflecting infrared light beams to enclose a work envelope. A wrap-around light curtain is also used to provide a multi-sided guard for moving equipment, robots or machinery to prevent injury to personnel and to prevent damage to equipment when maneuvered in the presence of a foreign object in the work envelope. Referring to FIG. 2, infrared transmitter assembly 22 emits a plurality of vertically spaced parallel light beams 26 using an array of light emitting diodes to form a light curtain 28. Corner mirrors 34 reflect the light beams to infrared receiver unit 30 positioned immediately adjacent infrared transmitter unit 22 to enclose the work envelope within the light curtain. A machine such as a pick-and-place robot 44 is located within the work space and is responsive to a stored program for performing nominal maneuvering operations and to interruption of the light beams to halt all movements. Penetration of the light curtain halts robotic motion to prevent injury to personnel and avoid damage to the robotic apparatus by a foreign object.
As described, detection of a foreign object penetrating a light curtain completely inhibits or disables motion of a robotic device to avoid injury to personnel and damage to the device. However, light curtain systems operate to disable robotic operations regardless of the distance between the obstacle and the position of the robot. If a light beam forming the curtain is broken, a full electromechanical stop of the robotic device is initiated. This can result in over-protection of the robot operating envelope. For example, in the long length linear motion system shown in FIG. 1, the obstacle may actually not pose any hazard to operation, particularly if the distance between the current position of the robot and the obstacle is beyond the true requirements for safe operation. Similarly, in the wrap-around system depicted in FIG. 2, pick-and-place robot 44 may be positioned and maneuvering in a portion of the work envelope which would not create a hazard to personnel entering a far side of the envelope.
Accordingly, a need exists for a safety interlock system for detecting entry of a foreign object into a work envelope and selectively inhibiting mechanical operations of a machine in response to proximity of the object to the machine.
A need further exists for a safety interlock system for progressively inhibiting mechanical operations of a machine in response to a decreasing distance between the machine and a detected obstacle.
A need further exists for selectively decreasing a maneuvering speed of a robotic device in response to detection of an obstacle approaching the robotic device.
A need further exists for a safety interlock system including a fail-safe operation which inhibits operations of a mechanical device located in a work envelope upon detection of a foreign obstacle entering the work envelope when a distance between the machine and foreign object cannot be determined.
A need further exists for a method of maneuvering an apparatus within a work envelope which is responsive to penetration of a foreign object into the work envelope and a distance between the apparatus and the foreign object.

Combined light beam and ultrasonic transducer safety sensing system


A method and system for creating a data grouping platform for grouping data from disparate locations and sources, according to a user-defined aggregate. The method and system includes a method for receiving a user-defined aggregate, a user-defined trigger event, and a plurality of user-defined grouping criteria and parameters for creating the user-defined aggregate. The system and method also allows for a user to identify input data sets and sources for creating the grouped aggregates. Once the method and system receives the user-defined parameters, the method and system builds a platform to group data and build data aggregates based on the user-defined criteria.

The present disclosure relates to methods and systems for building a technology platform for grouping disparate data sets for applied analysis.
Data grouping, generally, relates to the process of combining data around a common unit of analysis. In some cases, the data is contained in multiple disparate and distributed data sources, and the process of grouping particular sets of data includes new and novel approaches for aggregating and combining the data to summarize it in a coherent manner and for applied analysis. In the healthcare context, for example, there may be multiple data sets coming from multiple sources, all of which are related to a single encounter with the healthcare system. For example, for an outpatient surgery, there may be data from an anesthesia claim, data from a surgical claim, data for a nursing claim, data for a facility claim, data for a pharmaceutical claim, and various other data sets related to the outpatient surgery event. In order to understand more about the outpatient surgery, an aggregate may be created to group all data that is related to the outpatient surgery, but is contained in the multiple disparate data sets. Thus, an aggregate may facilitate a way to summarize or relate the otherwise distributed information so that an informed analysis may be derived from the otherwise disparate data. By creating the aggregate, multiple similar events may be analyzed, compared, and/or used as a basis for making institutional decisions to positively impact business and monetary efficiencies. The process of grouping disparate sets of data around an aggregate, however, requires diverse and complicated logic rules for assimilating the data, and is typically accomplished by a hard-coded process, providing limited built-in flexibility.

Method and system for building a data grouping platform

INTERNATIONAL BUSINESS MACHINES CORPORATION


A shelf for overlying a shower barrier uses a pair of shelves that are connected by a connector shelf allowing the device to telescope. Each of the pair of shelves abut a side wall and overlie a curtain rod or the top of a shower door. Each shelf has a flat upper surface and a decorative downwardly depending front surface for enhancing the aesthetics of the shower enclosure and concealing the rod or top of the door. Various devices can be used to hold the shelves against the walls including telescoping rods attached to the connector shelf and the other two shelves with a set screw holding the rods in place. A compression spring can also push on the outer shelves; or screws can pass through either screw bosses on the two other shelves and into the respective walls or a bracket can, be attached to the outer shelves and the walls.

1. Field of the Invention
The present invention relates to a shelf that allows storage of various items thereon and aesthetically conceals a shower curtain rod from external view.
2. Background of the Prior Art
Most homes have one shower therein, with some having multiple units. One of the most common ways to close off a shower enclosure during use, in order to keep the shower water from splashing all over the bathroom, is through the use of a shower curtain. This simple device uses a rod that is positioned and secured between the end walls of the shower enclosure and the rod has a plurality of hooks that slide therealong and which hooks have a curtain hanging therefrom. When not in use, the shower curtain is slid to an open position, oftentimes held in such position by an appropriate tie or other similar device. When the shower is being used, the lower end of the curtain is positioned within the confines of the tub basin and the curtain is slid closed thereby directing the shower water into the tub. This simple utilitarian device is very effective in keeping most, if not all of the water, wherein belongs, within the tub.
The problem with shower curtains lies in their utilitarian existence. The shower curtain typically looks like a functional product. While many curtains may have a design imprinted thereon, sometimes the design being quite elaborate, the rod and the hooks that slide along the rod look quite industrial. Some users attempt to spruce up this aspect of the shower curtain by using rods and hooks that either come in fancy colors or are made from exotic metals, such as brass or polished nickel, however, the rod and the hooks visually remain what they are, functional.
Some have proposed devices that are used to conceal the rod and the hooks thereon, however, such devices tend to suffer from certain drawbacks. Many such prior art devices are unusually complex in design and construction making such devices unnecessarily expensive to manufacture and purchase, as well as difficult to install and use. Other devices appear for what they are, a concealment device that only looks marginally better than the rod and hooks that are being concealed.
Others eliminate the shower curtain altogether by installing a door on the shower enclosure. However, such a solution finds disfavor with many as it can be a costly retrofit and many home owners dislike the look of a sliding door over a bath tub, even less so than the look of a rod with hooks and a curtain hanging therefrom. Additionally, many folks do not like their bath tubs partially enclosed by the sliding door panels whenever a bath is taken.
Accordingly, there exists a need in the art for a device that allows a person to maintain a shower curtain barrier system for a shower enclosure while allowing the rod and curtain hooks to be concealed from view of a bathroom user. Such a device must be of relatively simple design and construction so that it is relatively inexpensive to manufacture and thus purchase by the shower curtain owning public. Such a device must be relatively easy to install and use once so installed. Ideally, such a device must not appear to simply be a concealment barrier for another product.


A message flow environment permits a developer to define a debug session in which nodes in a defined message flow have a debug function. A debug controller is used to select nodes as breakpoints using data in shared memory accessible to the nodes in the defined message flow. Each node having a debug function will determine whether it is a breakpoint by accessing the shared memory. Where a node determines that it is a breakpoint, the node will communicate debug information to the debug controller. An independent daemon runs to permit a developer to define breakpoints from the set of debug nodes. The nodes having a debug function maintain a stack in the shared memory which is sent to the debug controller by each breakpoint node when reached by a message.

In complex computer systems communication is often desirable between disparate applications. One approach to such communication is to implement a system architecture for programming and executing message flows. Such message flows transfer messages between different components in the computer system (either within a single computer or distributed over more than one computer). For example, message flows may be used to carry out database transactions in a distributed computing environment.
An example of a commercially available message flow architecture is the MQ Series Integrator developed by IBM Corporation (MQSI). This architecture supports a visual programming interface to permit developers to define message flows.
In a message flow architecture such as MQSI, a message flow is defined using nodes that represent message input, computation, database access, filtering, and output of messages. Message flows are represented as nodes connected in a manner defined by the developer. The defined message flows may be nested and have many other features found in conventional computer programs. Message flow environments typically provide development tools used by developers to define the message flows which run separately from the executable message flows themselves.
In defining a message flow a developer may inadvertently introduce errors or bugs that are not discovered until the defined message flow is tested. Message flow development environments may provide a debugging facility to assist the developer in uncovering bugs in the message flow design.
To facilitate debugging of a target message flow, message flow development environments such as MQSI permit the developer to specify a debug session. One way of providing for a debug session is to insert debug nodes between each node in the target message flow. The message flow developer is then able to specify certain of the debug nodes to be breakpoints. In this approach, the message flow architecture includes a debug controller component (perhaps part of the development component) and the debug nodes are implemented as plugins. Because the defined message flow executes separately from the development components such as a debug controller, there must be a communication channel established between the debug controller and the message flow being debugged.
One mechanism for such communication is to define the debug node plugins such that when a message reaches each plugin debug node, the node will use the communication channel to communicate with the debug controller. The debug controller then determines whether the developer has defined the plugin node to be a breakpoint. If the plugin debug node is defined to be a breakpoint, data is displayed to the developer to assist in debugging the message flow.
The communication between the debug plugin node and the debug controller typically occurs using a distributed computing communication mechanism such as TCP/IP sockets, Asynchronous Transfer Mode protocol, System Network Architecture, Novell Netware or Banyan Vines, depending on the machine platform used by the message flow environment. This type of communication between the executable message flow and the debug controller component introduces a potentially significant overhead into the debugging process as sockets and similar mechanisms may be relatively slow and each debug plugin node is required to use the mechanism to communicate with the debug controller.
With such an approach, debugging for small numbers of messages through a defined message flow may be feasible. However, for certain types of defined message flows it is desirable or necessary to permit a high volume of messages to be processed by the defined message flow to determine the source of a detected error. In such a case the overhead required in communicating between debug plugin nodes and the debug controller potentially slows the operation of the defined message flow to such a degree that the usefulness of the debugging operation is affected.
It is therefore desirable to have a debugging facility for a message flow environment which permits high volumes of messages to be processed while debugging facilities are in place in a message flow, without significant detrimental overhead cost.

High performance debugging in a message flow environment

International Business Machines Corporation


The invention relates to a method and system for tracking repairs or servicing of various products/devices at a service center using Radio Frequency Identification (RFID) tags that are attached to the product upon receipt at the service center and that remain on the product for use in subsequent repairs and servicing. Technicians may record symptoms, repairs made, quality control information, and/or other data (while the product is in their possession) into a service database. This information may then be transmitted to the attached RFID tag. Technician workstations may include transmitters. Information regarding status of repairs may be shared with the customer via user interface applications. Thus, the customer can know the repair status of their product.

Generally, products received for repairs at a service facility are first diagnosed by technicians to identify the problem(s). This usually requires initial testing in order to accurately identify the problem. Sometimes, the owner may share information regarding previous maintenance work that has been done on the product, before repairs begin. However, complete product history may be hard to come by because previous service records may have been misplaced or thrown away. Additionally, the owner of the product is unlikely to remember or even know the exact nature of previous maintenance work performed on the product. When the product is presented to the repair facility, time and money must be invested to obtain the current status of the product. Even then, not all the needed information may be available.
Additionally, once a product enters a service facility, it is common for the product to go through a series of specialized technicians who handle different aspects of maintenance. Even within the facility, it may be difficult to decipher what tasks have, and have not, been completed from one technician to another due to inefficient recordkeeping. To add to the problem, the owner of the product is usually told that repairs can take, for example, up to 6-8 weeks after the product is received. During this time the owner has no information as to the status of their maintenance request.
Some service facilities have been known to use the barcode mechanism to identify products. Barcodes, however, are limited in the information they provide and are incapable in physically tracking the product. Another disadvantage presented by barcodes is that they must be physically scanned using a barcode scanner, and the resulting number provides limited standardized information. Furthermore, barcodes may be easily destroyed or damaged, preventing scanning and/or reading.
Radio Frequency Identifiers (RFIDs) on the other hand, allow a product to be tracked using RFID tags associated with the product or object. The information held by an RFID tag may be more extensive than a barcode. RFID tags work in combination with RFID transceivers which can exchange data with the RFID tag via wireless radio communications. This allows the RFID tag to be placed anywhere on the product, including hard to reach places.
There are typically two types of RFID tags, passive and active. Passive tags do not have a power supply of their own. Therefore, an electrical current supplied by the antenna of an RFID transceiver may activate the tag so that it can begin exchanging data. By virtue of its low power consumption, passive tags usually have a short read range from about 10 mm up to about 6 meters. Active tags, however, have their own power supply and may have a longer read range, but are also larger and more expensive.
In the past, RFID tags have been used for example, in automotive vehicle service systems. For instance, an RFID tag attached to a tire may provide a trained mechanic information such as, current tire alignment. This system, however, lacks the ability to electronically record servicing in an orderly and efficient manner while at the same time sharing the most current servicing information with the vehicle owner.
Accordingly, a need remains for a system and method that can accurately and efficiently record and store maintenance procedures being performed at a remote servicing facility and share this information with the owner, while reducing the cost and time spent on performing the actual maintenance. It would also be beneficial to have repair history readily available with the product, in order to save time on initial testing and diagnosis.

System and method for managing data on an RFID tag associated with a product


An improved method and apparatus for making a multi-compartment package on a form, fill, and seal machine. Two pairs of heat sealing jaws are provided below a product delivery tube.

1. Technical Field
The present invention relates to a package made from a modified vertical form, fill, and seal packaging machine, and the apparatus and method for making same, that provides for a single piece construction of a multi-compartment package. In particular, the invention provides a flexible film package that has two or more compartments, with each compartment separated by a rupturable seal.
2. Description of Related Art
Vertical form, fill, and seal packaging machines are commonly used in the snack food industry for forming, filling, and sealing bags of chips and other like products. At present, no known vertical form, fill, and seal machine is capable of producing multi-compartment packages from a single tube of packaging film.

Method for producing multi-compartment packages


In a rigid vehicle axle comprising an axle beam with axle journals forming wheel carriers arranged at the ends thereof, and at least two trailing arms rigidly fixed to the axle beam, each half of the rigid vehicle axle comprises an axle beam section, a trailing arm section and a wheel head section arranged adjacent one after another and the ends of the axle tube sections overlap with the adjoining ends of the trailing arm sections and their end faces are congruent with the respectively adjoining end faces of the wheel head sections, at least in some areas, and the adjoining sections are welded together.

The invention relates to a rigid vehicle axle comprising an axle beam with axle journals or wheel carriers arranged at the ends thereof, and at least two trailing arms rigidly fixed to the axle beam, each half of the vehicle rigid axle—as viewed from the center of the axle—comprising, arranged one after the other, an axle beam section, a trailing arm section and a wheel head section and the wheel head section comprising at least an axle journal or wheel carrier.
DE 296 16 257 U1 representing the generic type of such an axle discloses a pneumatically suspended rigid vehicle axle, which comprises an axle tube and trailing arms welded thereto. Trailing arms with corresponding socket holes are pushed on to the axle tube, which is in the form of an axle journal at each of its two ends. The trailing arms are welded to the axle tube along the socket holes. The trailing arm is extended rearwards beyond the axle tube, where its free end serves as support for an air spring. The said extension, among other things, makes the trailing arm a component subject to flexural stress. In order to reduce any weakening of the trailing arm due to the socket holes, the cross sectional profile of the trailing arm must be designed with relatively large dimensions. Moreover, in the area of the welds, the layers of material of the axle tube and the trailing arm are superimposed one on top of another in the radial direction of the axle tube. Such material doublings and stiffening measures have a detrimental effect on the size of the unsprung mass.
Furthermore, DE 100 60 312 A1 discloses an axle tube for a vehicle axle which, for stability and weight-reduction reasons, has a plurality of tubular sections of different diameter between the axle journals and stub axles. These individual axle sections are butt-joined together, for example by friction welding.
It is the object of the present invention to provide a rigid vehicle axle, which increases ride comfort and driving safety and reduces tire wear. At the same time, the construction of the axle should facilitate adaptation to different self-propelled and/or towed vehicles.

Rigid vehicle axle with integral trailing arms


The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as inductors, capacitors or resistors, on a layer of passivation or on the surface of a thick layer of polymer. In addition, the process of the invention provides a method for mounting discrete electrical components at a significant distance removed from the underlying silicon surface.

(1) Field of the Invention
The invention relates to the manufacturing of high performance Integrated Circuit (IC""s), and, more specifically, to methods of creating high performance electrical components (such as an inductor) on the surface of a semiconductor substrate by reducing the electromagnetic losses that are typically incurred in the surface of the substrate.
(2) Description of the Prior Art
The continued emphasis in the semiconductor technology is to create improved performance semiconductor devices at competitive prices. This emphasis over the years has resulted in extreme miniaturization of semiconductor devices, made possible by continued advances of semiconductor processes and materials in combination with new and sophisticated device designs. Most of the semiconductor devices that are at this time being created are aimed at processing digital data. There are however also numerous semiconductor designs that are aimed at incorporating analog functions into devices that simultaneously process digital and analog data, or devices that can be used for the processing of only analog data. One of the major challenges in the creation of analog processing circuitry (using digital processing procedures and equipment) is that a number of the components that are used for analog circuitry are large in size and are therefore not readily integrated into devices that typically have feature sizes that approach the sub-micron range. The main components that offer a challenge in this respect are capacitors and inductors, since both these components are, for typical analog processing circuits, of considerable size.
A typical application for inductors of the invention is in the field of modern mobile communication applications that make use of compact, high-frequency equipment. Continued improvements in the performance characteristics of this equipment has over the years been achieved, further improvements will place continued emphasis on lowering the power consumption of the equipment, on reducing the size of the equipment, on increasing the operational frequency of the applications and on creating low noise levels. One of the main applications of semiconductor devices in the field of mobile communication is the creation of Radio Frequency (RF) amplifiers. RF amplifiers contain a number of standard components, a major component of a typical RF amplifier is a tuned circuit that contains inductive and capacitive components. Tuned circuits form, dependent on and determined by the values of their inductive and capacitive components, an impedance that is frequency dependent, enabling the tuned circuit to either present a high or a low impedance for signals of a certain frequency. The tuned circuit can therefore either reject or pass and further amplify components of an analog signal, based on the frequency of that component. The tuned circuit can in this manner be used as a filter to filter out or remove signals of certain frequencies or to remove noise from a circuit configuration that is aimed at processing analog signals. The tuned circuit can also be used to form a high electrical impedance by using the LC resonance of the circuit and to thereby counteract the effects of parasitic capacitances that are part of a circuit. One of the problems that is encountered when creating an inductor on the surface of a semiconductor substrate is that the self-resonance that is caused by the parasitic capacitance between the (spiral) inductor and the underlying substrate will limit the use of the inductor at high frequencies. As part of the design of such an inductor it is therefore of importance to reduce the capacitive coupling between the created inductor and the underlying substrate.
At high frequencies, the electromagnetic field that is generated by the inductor induces eddy currents in the underlying silicon substrate. Since the silicon substrate is a resistive conductor, the eddy currents will consume electromagnetic energy resulting in significant energy loss, resulting in a low Q capacitor. This is the main reason for a low Q value of a capacitor, whereby the resonant frequency of 1/(Lc) limits the upper boundary of the frequency. In addition, the eddy currents that are induced by the inductor will interfere with the performance of circuitry that is in close physical proximity to the capacitor.
It has already been pointed out that one of the key components that are used in creating high frequency analog semiconductor devices is the inductor that forms part of an LC resonance circuit. In view of the high device density that is typically encountered in semiconductor devices and the therefrom following intense use of the substrate surface area, the creation of the inductor must incorporate the minimization of the surface area that is required for the inductor, while at the same time maintaining a high Q value for the inductor. Typically, inductors that are created on the surface of a substrate are of a spiral shape whereby the spiral is created in a plane that is parallel with the plane of the surface of the substrate. Conventional methods that are used to create the inductor on the surface of a substrate suffer several limitations. Most high Q inductors form part of a hybrid device configuration or of Monolithic Microwave Integrated Circuits (MMIC""s) or are created as discrete components, the creation of which is not readily integratable into a typical process of Integrated Circuit manufacturing. It is clear that, by combining the creation on one semiconductor monolithic substrate of circuitry that is aimed at the functions of analog data manipulation and analog data storage with the functions of digital data manipulation and digital data storage, a number of significant advantages can be achieved. Such advantages include the reduction of manufacturing costs and the reduction of power consumption by the combined functions. The spiral form of the inductor that is created on the surface of a semiconductor substrate however results, due to the physical size of the inductor, in parasitic capacitances between the inductor wiring and the underlying substrate and causes electromagnetic energy losses in the underlying resistive silicon substrate. These parasitic capacitances have a serious negative effect on the functionality of the created LC circuit by sharply reducing the frequency of resonance of the tuned circuit of the application. More seriously, the inductor-generated electromagnetic field will induce eddy currents in the underlying resistive silicon substrate, causing a significant energy loss that results in low Q inductors.
The performance parameter of an inductor is typically indicated is the Quality (Q) factor of the inductor. The quality factor Q of an inductor is defined as Q=Es/El, wherein Es is the energy that is stored in the reactive portion of the component while El is the energy that is lost in the reactive portion of the component. The higher the quality of the component, the closer the resistive value of the component approaches zero while the Q factor of the component approaches infinity. For inductors that are created overlying a silicon substrate, the electromagnetic energy that is created by the inductor will primarily be lost in the resistive silicon of the underlying substrate and in the metal lines that are created to form the inductor. The quality factor for components differs from the quality that is associated with filters or resonators. For components, the quality factor serves as a measure of the purity of the reactance (or the susceptance) of the component, which can be degraded due to the resistive silicon substrate, the resistance of the metal lines and dielectric losses. In an actual configuration, there are always some physical resistors that will dissipate power, thereby decreasing the power that can be recovered. The quality factor Q is dimensionless. A Q value of greater than 100 is considered very high for discrete inductors that are mounted on the surface of Printed Circuit Boards. For inductors that form part of an integrated circuit, the Q value is typically in the range between about 3 and 10.
In creating an inductor on a monolithic substrate on which additional semiconductor devices are created, the parasitic capacitances that occur as part of this creation limit the upper bound of the cut-off frequency that can be achieved for the inductor using conventional silicon processes. This limitation is, for many applications, not acceptable. Dependent on the frequency at which the LC circuit is designed to resonate, significantly larger values of quality factor, such as for instance 50 or more, must be available. Prior Art has in this been limited to creating values of higher quality factors as separate units, and in integrating these separate units with the surrounding device functions. This negates the advantages that can be obtained when using the monolithic construction of creating both the inductor and the surrounding devices on one and the same semiconductor substrate. The non-monolithic approach also has the disadvantage that additional wiring is required to interconnect the sub-components of the assembly, thereby again introducing additional parasitic capacitances and resistive losses over the interconnecting wiring network. For many of the applications of a RF amplifier, such as portable battery powered applications, power consumption is at a premium and must therefore be as low as possible. By raising the power consumption, the effects of parasitic capacitances and resistive power loss can be partially compensated, but there are limitations to even this approach. These problems take on even greater urgency with the rapid expansion of wireless applications, such as portable telephones and the like. Wireless communication is a rapidly expanding market, where the integration of RF integrated circuits is one of the most important challenges. One of the approaches is to significantly increase the frequency of operation to for instance the range of 10 to 100 GHz. For such high frequencies, the value of the quality factor obtained from silicon-based inductors is significantly degraded. For applications in this frequency range, monolithic inductors have been researched using other than silicon as the base for the creation of the inductors. Such monolithic inductors have for instance been created using sapphire or GaAs as a base. These inductors have considerably lower substrate losses than their silicon counterparts (no eddy current, hence no loss of electromagnetic energy) and therefore provide much higher Q inductors. Furthermore, they have lower parasitic capacitance and therefore provide higher frequency operation capabilities. Where however more complex applications are required, the need still exists to create inductors using silicon as a substrate. For those applications, the approach of using a base material other than silicon has proven to be too cumbersome while for instance GaAs as a medium for the creation of semiconductor devices is as yet a technical challenge that needs to be addressed. It is known that GaAs is a semi-insulating material at high frequencies, reducing the electromagnetic losses that are incurred in the surface of the GaAs substrate, thereby increasing the Q value of the inductor created on the GaAs surface. GaAs RF chips however are expensive, a process that can avoid the use of GaAs RF chips therefore offers the benefit of cost advantage.
A number of different approaches have been used to incorporate inductors into a semiconductor environment without sacrificing device performance due to substrate losses. One of these approaches has been to selectively remove (by etching) the silicon underneath the inductor (using methods of micro machining), thereby removing substrate resistive energy losses and parasitic effects. Another method has been to use multiple layers of metal (such as aluminum) interconnects or of copper damascene interconnects.
Other approaches have used a high resistivity silicon substrate thereby reducing resistive losses in the silicon substrate. Resistive substrate losses in the surface of the underlying substrate form a dominant factor in determining the Q value of silicon inductors. Further, biased wells have been proposed underneath a spiral conductor, this again aimed at reducing inductive losses in the surface of the substrate. A more complex approach has been to create an active inductive component that simulates the electrical properties of an inductor as it is applied in active circuitry. This latter approach however results in high power consumption by the simulated inductor and in noise performance that is unacceptable for low power, high frequency applications. All of these approaches have as common objectives to enhance the quality (Q) value of the inductor and to reduce the surface area that is required for the creation of the inductor. The most important consideration in this respect is the electromagnetic energy losses due to the electromagnetic induced eddy currents in the silicon substrate.
When the dimensions of Integrated Circuits are scaled down, the cost per die is decreased while some aspects of performance are improved. The metal connections which connect the Integrated Circuit to other circuit or system components become of relative more importance and have, with the further miniaturization of the IC, an increasingly negative impact on circuit performance. The parasitic capacitance and resistance of the metal interconnections increase, which degrades the chip performance significantly. Of most concern in this respect is the voltage drop along the power and ground buses and the RC delay of the critical signal paths. Attempts to reduce the resistance by using wider metal lines result in higher capacitance of these wires.
Current techniques for building an inductor on the surface of a semiconductor substrate use fine-line techniques whereby the inductor is created under a layer of passivation. This however implies close physical proximity between the created inductor and the surface of the substrate over which the inductor has been created (typically less than 10 xcexcm), resulting in high electromagnetic losses in the silicon substrate which in turn results in reducing the Q value of the inductor. By increasing the distance between the inductor and the semiconductor surface, the electromagnetic field in the silicon substrate will be reduced in reverse proportion to the distance, the Q value of the inductor can be increased. By therefore creating the inductor overlying the layer of passivation (by a post passivation process) and by, in addition, creating the inductor on the surface of a thick layer of dielectric (such as a polymer) that is deposited or adhered over the surface of a layer of passivation, the Q value of the inductor can be increased. In addition, by using wide and thick metal for the creation of the inductor, the parasitic resistance is reduced. The process of the invention applies these principles of post passivation inductor creation while the inductor is created on a thick layer of dielectric using thick and wide metals.
U.S. Pat. No. 5,212,403 (Nakanishi) shows a method of forming wiring connections both inside and outside (in a wiring substrate over the chip) for a logic circuit depending on the length of the wire connections.
U.S. Pat. No. 5,501,006 (Gehman, Jr. et a].) shows a structure with an insulating layer between the integrated circuit (IC) and the wiring substrate. A distribution lead connects the bonding pads of the IC to the bonding pads of the substrate.
U.S. Pat. No. 5,055,907 (Jacobs) discloses an extended integration semiconductor structure that allows manufacturers to integrate circuitry beyond the chip boundaries by forming a thin film multi-layer wiring decal on the support substrate and over the chip. However, this reference differs from the invention.
U.S. Pat. No. 5,106,461 (Volfson et al.) teaches a multi layer interconnect structure of alternating polyimide (dielectric) and metal layers over an IC in a TAB structure.
U.S. Pat. No. 5,635,767 (Wenzel et al.) teaches a method for reducing RC delay by a PBGA that separates multiple metal layers.
U.S. Pat. No. 5,686,764 (Fulcher) shows a flip chip substrate that reduces RC delay by separating the power and I/O traces.
U.S. Pat. No. 6,008,102 (Alford et al.) shows a helix inductor using two metal layers connected by vias.
U.S. Pat. No. 5,372,967 (Sundaram et al.) discloses a helix inductor. U.S. Pat. No. 5 ""576,680 (Ling) and U.S. Pat. No. 5,884,990 (Burghartz et al.) show other helix inductor designs.
It is the primary objective of the invention to improve the RF performance of High Performance Integrated Circuits.
Another objective of the invention is to provide a method for the creation of a high-Q inductor.
Another objective of the invention is to replace the GaAs chip with a silicon chip as a base on which a high-Q inductor is created.
Yet another objective of the invention is to extend the frequency range of the inductor that is created on the surface of a silicon substrate.
It is yet another objective of the invention to create high quality passive electrical components overlying the surface of a silicon substrate.
The above referenced continuation-in-part application adds, in a post passivation processing sequence, a thick layer of dielectric over a layer of passivation and layers of wide and thick metal lines on top of the thick layer of dielectric. The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as an inductor, a capacitor or a resistor, on a layer of passivation or on the surface of a thick layer of dielectric. In addition, the process of the invention provides a method for mounting discrete passive electrical components at a significant distance removed from the underlying silicon surface.

Capacitor for high performance system-on-chip using post passivation process structure


A method and apparatus for editing the custom colors from a Quick Color Selector on a personal computer desktop. An Edit Custom Colors button is provided on the Quick Color Selector. Activating this button causes a Color Editor to appear, either as a separate window or as an expansion of the Quick Color Selector. This invention also provides for a user to specify which custom color chip is to be edited (the target chip). In particular, navigation controls are provided that enable the user to move an identifying cursor across an array of custom color chips. The navigation controls may appear in the Quick Color Selector or in a Color Editor. The Quick Color Selector still exhibits its expected transient behavior in that it, together with any separate Color Editor window, disappears immediately after the user selects a color chip.

Personal computers with color displays are becoming increasingly common in the workplace and home today. The increasing use of color displays and other color hardware, such as printers, is associated with the increasing use of, and provision for, color in software, such as operating systems, graphical user interfaces, and applications. Providing the user with the ability to specify colors is highly desirable, if not absolutely necessary.
For example, the most widely used operating systems or user interface systems today are based on the windows and desktop concepts such as the IBM Operating System/2 (OS/2), Macintosh OS, Microsoft Windows, and X/Motif. In such window systems, it is desirable for users to be able to customize the color of various window parts, such as the border, background, title bar, title bar text, etc., to suit their individual preferences.
In any application that displays text, such as a word processing, desktop publishing application or a browser, it is desirable to use color to highlight certain words or to clarify structure, such as hypertext links, items in outlines, or keywords in programming code. It would be desirable for the user to be able to specify what colors to use in highlighting the text, or in the color-coding scheme.
In applications where color is an integral element, such as in a graphics, image editing application, or in a data visualization application, it is clearly necessary for the user to be able to specify colors. A typical approach to allowing the user to select a color is to display a set of fixed color samples and a set of custom color samples in a dialog window. By "custom" we mean customizable, user-definable, or user-editable, as distinguished from "fixed" colors whose definition cannot be changed by the user, either easily or at all. For the purpose of this application, these terms will be considered synonymous: color selection dialog, color selection dialog window, color selector, and color palette. A color sample will be also referred to as a color "chip."
Two forms of color selection dialog are usually available. The first form will be referred to as a Persistent Color Selector. In this form, the dialog window is relatively long-lived. It remains visible and available for interaction until the user explicitly dismisses it, such as by clicking on a Cancel button. The second form will be referred to as a Quick Color Selector. In this form, the dialog window is relatively short-lived. It disappears immediately after a color sample is selected. For the purpose of this application, the essential distinction between the two forms has to do with whether clicking on (or otherwise activating) a color sample causes the dialog to disappear. In the Persistent form, clicking on a color sample does not dismiss the dialog. An explicit user action is required to dismiss the dialog. In the Quick form, clicking on a color sample dismisses the dialog and effects the color selection. The Quick form is usually more compact. In typical usage, it is seen for only a short time as compared with the Persistent form, which stays up on the screen as the user does various tasks.
Another difference is, that the Persistent Color Selector will usually provide a way for the user to edit the set of custom colors, while the Quick form will not. Both forms will show the fixed and custom color chips, but only the Persistent form will enable the custom colors to be edited. For example, the Persistent Color Selector may show an Edit Custom Colors (or similarly named) button. Activating this button either expands the dialog window to include an interface for editing the custom colors, or makes a separate dialog window appear, containing the color editing interface.
An interface for defining or editing custom colors is referred to as a Color Editor. It may appear as a separate window or as an expansion of a color selection dialog window. It typically contains controls which allow the user to define a custom color according to one or more color specification models, such as the RGB (red-green-blue), CMY (cyan-magenta-yellow), HSB (hue-saturation-brightness), or HSL (hue-saturation-luminosity) models. For example, in the RGB model, a color is defined by specifying its composition in terms of three primary colors--red, green, and blue.
As stated above, the Persistent Color Selector usually provides a way to invoke the Color Editor, but the Quick Color Selector does not. It is desirable for the Quick form to provide this functionality, but no solution is known in the prior art. This function is desirable because it gives the user more flexibility. It also results in more consistency between the Persistent and the Quick forms of color selection dialogs.
It is not enough to add an Edit Custom Colors button to the Quick Color Selector. Provisions are needed for allowing the user to specify which custom color chip is to be edited (the "target" chip, so called because it is the target of the Color Editor). The target chip cannot be specified by clicking on it because this action should, if the expected behavior of the Quick Color Selector is to be maintained, have the effect of finalizing the color selection and dismissing the dialog. Note that in the Persistent Color Selector, the target chip can be specified by clicking on it, because doing so neither finalizes the color selection nor dismisses the dialog.
It is therefore desirable to have a method and apparatus for specifying and customizing color selections on the Quick Color Selector on a personal computer desktop.

Method and apparatus for customizing colors in a data processing system

International Business Machines Corporation


An image processing device determines whether or not a scanned image is copy-prohibited based on comparisons between a histogram of the brightness of the pre-stored copy-prohibited material such as paper currency and a histogram of the scanned image, and/or between the size of the copy-prohibited material and the size of the scanned image. A document is scanned by a scanning unit, and the brightness histogram of the scanned image is generated by a histogram generating unit. This histogram is then used by a copy-prohibited determining unit to determine whether or not to prohibit copying.

1. Field of the Invention
The present invention relates to a technology that can be employed in an image processing machine such as color copier, which is designed to scan an original document or paper and print a duplicate image on a recording sheet, for preventing the forgery and counterfeiting of paper currency or other monetary instruments.
2. Description of the Related Art
With the spread of advanced digital color copying technology and copying machines incorporating such technology, the forgery and production of counterfeit paper currency, stock certificates, bearer bonds, and other monetary instruments has become a problem. In order to prevent such forgery, image processing devices equipped with anti-counterfeiting capability have been developed. Such devices contain pre-stored image data representing images of items for which copying is prohibited. When a user attempts to copy an original item, the image data that is scanned-in is compared against the pre-stored image data using pattern-matching techniques, and when the scanned image data matches the pre-stored image data, image formation on the copying sheet is prohibited. Alternatively, copying may be prohibited by having an entirely black image printed out onto the copy sheet.
One problem with such conventional systems, however, is that a large amount of memory is required to store the images of the various forms of currency and certificates in order to prevent them from being copied. Additionally, accounting for possible slanting or awkward angles of the original material in the scanned image data makes the comparison procedure performed by the image processing device very complicated.
It is thus an object of the present invention to provide an image processing device and method which determine whether or not items being copied are copy-prohibited items based on a histogram of the brightness levels of the copy-prohibited image and/or based on the size (area) of the copy-prohibited image as calculated from said histogram, thereby requiring less memory and a simpler procedure in determining whether or not scanned items are copy-prohibited.
In order to accomplish this object, according to one aspect of the present invention, an image processing apparatus includes a scanning unit for scanning an original item, a histogram generating unit for generating a first histogram of signal (first color histogram) from image signals scanned in by the scanning unit, and a copy-prohibited determining unit for determining based on the first histogram whether or not the item being copied is copy-prohibited. With such an image processing apparatus, the process for determining whether or not copying should be prohibited is simplified.
The copy-prohibited determining unit may include an area calculating unit for calculating the area (first area of the scanned original item based on the first histogram, a storage unit for pre-storing RGB signal histograms (a group of second histograms of copy-prohibited materials such as paper currency, stock certificates, bearer bonds and the like and the sizes (a group of second areas of these copy-prohibited materials, and a comparing unit for comparing each of the second histograms together with the size of the corresponding copy-prohibited material with the first histogram together with the size of the scanned item.
The copy-prohibited determining unit may determine that copying should be prohibited when both the first histogram and first area match any of the second histograms and the size of the corresponding copy-prohibited material. With such a copy-prohibited determining unit, the determination of whether or not copying should be prohibited can be made precisely.