A method of coating a material surface with thin film silicon comprises dissolving silicon in a metal solvent to form a solution and subsequently deposited the dissolved silicon from the solution by controlling the temperature of the solution and thereby depositing a layer of silicon onto the material surface. The metal solvent is preferably a mixture of gold and a metal or metals which either have a melting point below the deposition temperature range or which form a eutectic with gold and have a eutectic temperature below the deposition temperature range. The temperature of the solution is controlled so that the silicon becomes super saturated in the solution and is deposited out of solution onto the material surface.

At present, the fabrication of silicon solar cells involves the use of self-supporting crystalline or polycrystalline wafers. However, there are a number of advantages which can be obtained by the fabrication of silicon solar cells in the form of thin silicon films on a supporting layer. Accordingly, there is an increasing amount of interest with respect to commercially applicable methods of fabricating silicon solar cells in thin-film form.
There is also an increasing interest in depositing silicon of electronic quality over large areas for consumer applications such as liquid crystal displays for application as television screens. One such deposition technique is carried out by first dissolving silicon in a molten metal so that the melt is saturated with silicon and then cooling. Upon cooling, the amount of silicon which can be dissolved in the melt decreases. The excess silicon can be made to precipitate, out onto a substrate, at a controlled rate.
At present, tin (Sn) is the most commonly used metal for dissolving silicon for subsequent deposition. Tin is desirable in that it is electrically quite inert in silicon. Accordingly, the unavoidable incorporation of tin in the deposited silicon layer does not detract from the layer's electronic properties. However, tin is not desirable in that high temperatures (greater than 900.degree. C.) are required to dissolve much silicon in tin. The high deposition temperature severely limits the choice of substrate material due to thermal mismatch considerations. A further limitation upon substrate choice as well as upon the choice of processing conditions and cleanliness requirements is provided by the much higher prospects for contamination of the silicon layer by other impurities at high temperatures.
Gold forms a eutectic with silicon and has a unique ability to dissolve large amounts of silicon at low temperatures. The eutectic composition consists of about 18% silicon (atomic basis) with a corresponding eutectic temperature of about 363.degree. C. This means that at any temperature higher than this, a molten solution of silicon in gold can be formed with the silicon content being at least as high as at the eutectic. Although gold is very detrimental to the electronic properties of the silicon layer, (when incorporated into this layer in even very small quantities) the low deposition temperature means that virtually no gold is incorporated into the lattice structure of the silicon layer. Similarly, only small quantities of other impurities will be incorporated at such low temperatures. Accordingly, processing can be carried out using relaxed cleanliness requirements for (1) the substrate material; and (2) the deposition equipment. In addition, the purity requirements of the substrate and the solutions employed can be reduced. The low deposition temperatures also reduce thermal mismatch problems between the deposited silicon layer and the substrate.
The use of gold in silicon deposition-processing is not desirable because of the high solubility of silicon in gold at the eutectic. Large amounts of silicon required to form a melt at low temperatures giving rise to difficulties in controlling the precipitation rate of silicon from the solution upon cooling. This reduces the crystallographic quality of the deposited film and also gives rise to the possibility of desirable macroscopic gold inclusions in the deposited film.

Thin film growth using two part metal solvent


A denture cleaning apparatus is provided including a housing including a lower extent and an upper extent. A basket is situated in the upper extent of the housing. An agitator is rotatably mounted within the upper extent of the housing below the basket. Finally, a motor is mounted within the lower extent of the housing and coupled to the agitator for rotating the same only during the receipt of power.

1. Field of the Invention
The present invention relates to denture cleaners and more particularly pertains to a new denture cleaning device for cleaning soiled dentures with agitated fluid.
2. Description of the Prior Art
The use of denture cleaners is known in the prior art. More specifically, denture cleaners heretofore devised and utilized are known to consist basically of familiar, expected and obvious structural configurations, notwithstanding the myriad of designs encompassed by the crowded prior art which have been developed for the fulfillment of countless objectives and requirements.
Known prior art denture cleaners include U.S. Pat. No. 4,336,816; U.S. Pat. No. 5,275,185; U.S. Pat. No. 4,891,857; U.S. Pat. No. 4,922,939; and U.S. Pat. Des. No. 261,423.
In these respects, the denture cleaning device according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in so doing provides an apparatus primarily developed for the purpose of cleaning soiled dentures with agitated fluid.


A laser marker scanning laser beams to print a mark on an object includes a laser oscillator producing laser beams, an input device designating a mark to be printed, a galvanometer scanner successively receiving coordinate data corresponding to a predetermined location on the object, the galvanometer scanner scanning the laser beams produced from the laser oscillator toward the predetermined location on the object on the basis of the coordinate data, a memory storing sets of coordinate data of a multitude of locations on the object, the locations dividing a component line of each of marks which can be designated by the input device, and a control device successively delivering the coordinate data concerning the mark designated by the input device from the memory to the galvanometer scanner.

1. Field of the Invention
The present invention relates to a laser marker moving irradiation points of laser beams using a galvanometer scanner and printing a desired mark composed of characters, figures and/or symbols on an object on the basis of movement loci of the irradiation points.
2. Description of the Prior Art
FIG. 8 shows a conventional laser marker of the above-described type. The shown laser marker comprises a laser oscillator 10 producing laser beams, a galvanometer scanner 11 including a pair of galvanometer mirrors 12a and 12b reflecting the laser beams produced from the laser oscillator 10, and a condensing lens 15 condensing the reflected laser beams so that the laser beams are irradiated onto an object on which a mark is to be printed. Electric motors 13a and 13b are provided for changing angles of reflection of the mirrors 12a and 12b respectively. The laser beam is scanned horizontally in FIG. 8 or in the X direction by the mirror 12a, whereas the laser beam is scanned in the Y direction generally perpendicular to the X direction by the mirror 12b. A control device 14 is provided for controlling the angles of reflection of the mirrors 12a and 12b and the laser oscillator 10 so that the same is turned on and off. The control device 14 comprises a CPU 20 as a main component thereof as shown in FIG. 9. A memory 21 and an input device 22 are connected to the CPU 20.
The memory 21 stores graphic data concerning marks which can be designated prior to start of a printing operation and data of predetermined computing expressions or formulas. The graphic data includes coordinate data concerning both end points of respective component lines of each mark. More specifically, for example, graphic data of mark xe2x80x9cAxe2x80x9d includes coordinate data of end points T1 to T5 of component lines L1, L2 and L3, as shown in FIG. 10A. Furthermore, the computing expressions include those for obtaining subdivided points and those for obtaining compensation. The computing expressions for subdivided points are provided for obtaining coordinate data of a plurality of locations obtained by subdividing the component lines of the mark on the object on the basis of coordinate data of the graphic data. For example, concerning the mark xe2x80x9cA,xe2x80x9d coordinate data of a plurality of locations (points P1, P2, P3, and so on in FIG. 10A) is obtained by subdividing the component lines L1 to L3 as shown in FIG. 10A. The computing expressions for compensation are used to compensate the distortion of the laser beam due to an aberration of the lens 15.
The character xe2x80x9cAxe2x80x9d is designated by the input device 22 when it is to be printed by the conventional laser marker. The CPU 20 of the control device 14 then carries out the following steps 1 to 4:
Step 1: The CPU 20 retrieves graphic data concerning a plurality of marks stored in the memory 21 to input the graphic data (coordinate data of end points T1 to T5) corresponding to the designated mark xe2x80x9cA.xe2x80x9d
Step 2: The CPU 20 reads out the computing expressions for subdivided points from the memory 21 to compute coordinate data of a plurality of locations subdividing the component lines L1, L2 and L3 of the mark xe2x80x9cAxe2x80x9d on the basis of the coordinate data of end points T1 to T5.
Step 3: The CPU 20 reads out the computing expressions for compensation from the memory 21 to compensate distortion in the coordinate data of a plurality of the locations on the basis of the read expressions.
Step 4: The CPU 20 delivers the compensated coordinate data to the galvanometer scanner 11 cyclically for a predetermined period and further delivers an on-off signal to the laser oscillator 10.
Upon receipt of the coordinate data, the galvanometer scanner 11 scans irradiation points of the laser light produced from the laser oscillator 10 in such a manner that locations indicated by a series of coordinate data are connected together. As a result, the irradiation points are moved in the direction of arrow in FIG. 10B so that the desired mark xe2x80x9cAxe2x80x9d is printed on the object W. Japanese Unexamined Patent Application Publication No. 11-28586 (1999) discloses a laser marker of the type described above.
In the conventional laser marker, the memory stores only the coordinate data concerning the end points of the component lines of each mark as the data of marks which can be designated. Accordingly, the coordinate data is generated during the printing operation as described above. As a result, a printing speed cannot be increased so high since the CPU 20 (control device 14) needs to ensure a time for generation of coordinate data. Provision of the control device with the CPU of high processing speed type can increase the printing speed. However, the cost for the laser marker is increased with improvement in the performance of the CPU.
Therefore, an object of the present invention is to provide a laser marker which can increase the printing speed without a large increase in the cost.
The present invention provides a laser marker scanning laser beams to print a mark on an object, the laser marker comprising a laser oscillator producing laser beams, an input device designating a mark to be printed, a galvanometer scanner successively receiving coordinate data corresponding to a predetermined location on the object, the galvanometer scanner scanning the laser beams produced from the laser oscillator toward the predetermined location on the object on the basis of the coordinate data, a memory storing sets of coordinate data of a multitude of locations on the object, the locations dividing a component line of each of marks which can be designated by the input device, and a control device successively delivering the coordinate data concerning the mark designated by the input device from the memory to the galvanometer scanner.
According to the aforesaid laser marker, the memory stores the sets of coordinate data of a multitude of the locations obtained by dividing the component line of each of the marks on the object with respect to all the marks which can be designated by the input device. Accordingly, the control device need not generate coordinate data during the printing operation and merely delivers the coordinate data from the memory to the galvanometer scanner. Thus, since the conventionally required coordinate data generating time is unnecessary, the coordinate data can be supplied to the galvanometer scanner in a shorter period. Consequently, the printing speed of the laser marker can be improved without a cost increase due to an improvement in the data processing performance of the control device.


A quantum phase estimator may include at least one phase gate, at least one controlled unitary gate, and at least one measurement device. The quantum phase estimator receives at least one ancillary qubit and a calculational state comprised of multiple qubits. The phase gate may apply random phases to the ancillary qubit, which is used as a control to the controlled unitary gate. The controlled unitary gate applies a second random phase to the calculational state. The measurement device may measure a state of the ancillary qubit from which a phase of the calculational state may be determined.

Quantum algorithms promise computational speed-ups over their classical counterparts. Quantum phase estimation is a technique used in quantum algorithms, including algorithms for quantum chemistry (see, A. Aspuru-Guzik, A. D. Dutoi, P. J. Love, and M. Head-Gordon, Science 309, 1704 (2005), and B. P. Lanyon, J. D. Whitfield, G. G. Gillet, M. E. Goggin, M. P. Almeida, I. Kassal, J. D. Biamonte, M. Mohseni, B. J. Powell, M. Barbieri, A. Aspuru-Guzik, and A. G. White, Nature Chemistry 2, 106, 2008, arXiv:0905.0887), and quantum field theory (see, S. P. Jordan, K. S. M. Lee, and J. Preskill, "Quantum computation of scattering in scalar quantum field theories," (2011), arXiv: 1112.4833), Shor's algorithm for prime factorization (see, P. Shor, SIAM Journal of Computing 26, 1484 (1997)), and algorithms for quantum sampling (see, M. Ozols, M. Roetteler, and J. Roland, in 3rd Innovations in Theoretical Computer Science Conference (ITCS), (ACM, 2012) pp. 290{308, arXiv:1103.2774, and also K. Temme, T. Osborne, K. Vollbrecht, D. Poulin, and F. Verstraete, Nature 471 (2011), 10.1038/nature09770, arXiv:0911.3635). Quantum phase estimation can also be used to find eigenvalues of a unitary matrix efficiently.

Fast quantum and classical phase estimation


A method of fabricating a free standing membrane including via array in a dielectric for use as a precursor in the construction of superior electronic support structures, includes the steps of fabricating a membrane of conductive vias in a dielectric surround on a sacrificial carrier, and detaching the membrane from the sacrificial carrier to form a free standing laminated array. An electronic substrate based on such a free standing membrane may be formed by thinning and planarizing laminated array, followed by terminating.

There is a trend towards ever increasing complexity and ever greater miniaturization in the electronics industry. Space is at a premium, particularly in mobile equipment such as cellular phones and portable computers.
Integrated Circuits (ICs) are the heart of these electronic systems. As such, ICs are becoming more and more complex, and include ever larger numbers of transistors, and require increasing numbers of input/output contacts. They are required to operate at ever increasing switching speeds and frequencies, have ever increasing power consumptions and consequently generate ever increasing amounts of heat that requires dissipation.
ICs are connected to power supplies, user interfaces and other components via printed circuit boards (PCBs). To facilitate the connection of the IC to the PCB, it is necessary to provide a plurality of electronic connections. A common solution that has been adopted in order to interconnect the IC and its related PCB involves the usage of an Electronic Substrate. The Electronic Substrate is part of the IC package and replaces the traditional lead-frame as an interposer between the IC and the PCB. Such a substrate may include one, two or many conductor layers isolated by a variety of dielectric material layers, such as ceramic or organic materials. Such substrates generally have conductive arrays of contacts on their undersides. These may be ball contacts, providing a so called BGA (Ball Grid Array) or pins, providing a so-called PGA (Pin Grid Array) for electrical interconnection to the PCB. Alternatively, such substrates may be placed directly onto the PCB, without using balls or pins, providing a so-called LGA, (Land Grid Array) thereby. On its top side, the substrate will generally carry one or more ICs electrically connected thereto by the so-called Wire Bond or by the Flip Chip assembly techniques.
With reference to FIG. 1, an example of a Wire Bond BGA package of the prior art is shown, having a substrate 100; a ball grid array (BGA) of electrically conductive balls 102 that connects the pads 104 on the underside of the substrate 100 to a PCB therebeneath (not shown), and an array of electrically conductive wires, known as wire bonds 106, that connect the top side pads 108 of the substrate 100 to the IC 110. The IC 110 of such a package will usually be protected by a resinous material 112 that is otherwise known as a "molding" material.
With reference to FIG. 2, an example of a Flip Chip BGA package of the prior art is shown, having a Flip Chip BGA substrate 200. Once again, a ball grid array (BGA) 202 of electrically conductive balls is provided, that connects the pads 204 on the underside of the substrate 200 to the PCB therebeneath. Instead of wire bonds however, electrically conductive bumps 206 are provided on the top side pads 208 of the substrate 200, for connecting to the IC 210, by what is known in the art as the Flip Chip process. This process also involves the application of a resin material 212 between the IC 210 and the surface of the substrate 200. In this technology, the resin 212 is generally known as an "under-fill" material. The resin under-fill 212 acts as a stress buffer, and reduces the fatigue on the IC 210 and the bumps 206 during thermal cycling over the life time of the package 250. Sometimes the Flip Chip package 250 also includes a metal stiffener 216, which is attached to the substrate 200 by an adhesive layer 218, and a lid 220 that is attached to the back of the IC 210 with a thermal adhesive layer 222. The stiffener 216 is used to further stiffen the substrate 200 and helps maintain flatness during subsequent IC assembly processes, while the lid 220 helps dissipate the heat generated by the IC 210 during its operation.
The advanced BGA, PGA, LGA substrates used in Wire Bond and Flip Chip processes described hereabove and illustrated in FIGS. 1 and 2 respectively, generally include two main sections: a so-called "core section" and a "built-up section" that is applied layer by layer thereupon.
With reference to FIG. 3, a detailed example of a typical organic Flip Chip BGA (FCBGA) substrate 300 is shown. The core section 330 of the substrate 300 is constructed out of multiple copper conductor layers 332 that are usually separated by fiber-glass reinforced, organic dielectric material layers 334. The copper conductor layers 332 in the core 330 are electrically connected by Plated Through Holes (henceforth PTH) 336. Generally, in the process of forming the substrate 300, the core section 330 is formed first. PTHs 336 are then formed by mechanically drilling holes, copper plating them and plugging. Next, external copper conductor layers 338 of the core section 330 are constructed. Two built-up sections 340′, 340″ are then added, one on each side of the core 300. These built-up sections 340′, 340″ consist of a plurality of conductor copper layers 342, separated from each other by layers 344 of dielectric material, which may be reinforced by fiber-glass. The dielectric layers 344 contain copper plated micro-vias 346, which interconnect between adjacent copper conductor layers. The micro-vias 346 are usually laser drilled and hence are much smaller in diameter than the PTHs 336. This releases valuable space on the substrate's built up sections for applying ICs thereupon. The improved mechanical and electrical characteristics of the dielectrics used in the built-up sections, together with their higher conductor densities, enabled by the usage of the micro-vias 346, allow them, eventually, to reach the density of the IC contacts and to act as intermediating contacts to the PCB.
It will be noted that the core section 330 of such an FCBGA substrate 300 primarily serves as a through interconnect "carrier" for the build-up sections 340′, 340″, whilst also accommodating the low density power and ground copper conductor layers required to operate the IC.
Due to their finer I/O pitches, modern ICs require very flat, non-warped substrates to ensure the reliability of the package. This is difficult to achieve if the built-up section of the substrate is only formed on one side of the core. In order to create a flat, non-warped substrate during IC assembly processes and thereafter, the built-up sections are preferably built up on both sides of the core, so that a symmetrical structure is fabricated, resulting in a stress-balanced, flat substrate.
There is a cost to building up layers on both sides of the core however. It adds more manufacturing process steps, which, in turn, increases fabrication costs. Since the resulting substrate structure is more complicated, manufacturing yields drop off. Furthermore, the substrate thickness is increased, resulting in less compact, thicker packages that are less desirable for mobile communication and other applications where miniaturization is required. Additionally, it will be appreciated that the thicker the substrate, the greater the total inductance and thermal impedance of the package. This deteriorates the over all performance of the IC. In view of these drawbacks, many attempts have been made to improve on the sandwich structure described above.
One development that attempts to minimize thickness is to construct the substrate without a central core, providing what is known in the art as a "core-less substrate". In this concept, both the central core and the build-up section from the substrate's BGA (or PGA or LGA) side are eliminated, so that the entire substrate consists of one build-up section only, for interconnecting the IC to the PCB. The total substrate thickness is thereby significantly reduced, improving both its thermal impedance and its electrical performance. Furthermore, eliminating the core section of the substrate cuts down the cycle time of the manufacturing process and eliminates the need for mechanically drilled PTHs which are fairly expensive to fabricate.
United States Published Patent Application Number USSN 2002/0001937 to Kikuchi et al. addresses the above issues by describing the manufacturing of multilayer interconnect structures consisting of polymeric insulating layers and metal interconnects on a metal base plate that is subsequently partially removed to create a metal supporting stiffener having an aperture for the IC.
While USSN 2002/0001937 to Kikuchi et al apparently introduces a viable methodology for obtaining a core-less substrate, it nevertheless suffers from a number of drawbacks. Firstly, all the conductor layers of the substrate require expensive thin film interconnects. While conductor layers in the form of thin film interconnects provide better performance due to their improved densities and finer pitches, they are inappropriate to the substrate's power and ground metal planes which are usually low in density and pitch, and building them using expensive thin film technology is cost prohibitive. Furthermore, these layers usually require a certain metal thickness to reduce electrical resistance and to prevent overheating. This can become difficult to achieve when using thin film processing techniques. Furthermore, the Flip Chip bonding process applies a pressure which thin film interconnect structures are ill equipped to withstand. Such pressures tend to distort and/or stretch the interconnect structure, which in thin films are typically less than 100 microns thick. This sometimes causes cracking of the thin film dielectric layers and may lead to operating failure of the IC. Additionally, it will be appreciated that the presence of a metal stiffener adjacent to the IC consumes valuable space on the external surface of the substrate and may limit usage in applications requiring passive components, such as decoupling capacitors, in close proximity to the IC. Furthermore, the large aperture metal stiffener used may make this technology unsuitable for applications requiring, for example, multi chip substrates, low body-sized substrates, substrates supplied in two dimensional matrix arrays or in strip formats.
U.S. Pat. No. 6,872,589 to Strandberg describes a substrate for mounting an IC. Here again, the substrate structure is formed on a metal carrier base which is only partially etched away, leaving a metal stiffener having an aperture for the mounted IC. Although Strandberg's substrate described in U.S. Pat. No. 6,872,589 may be advantageous over that described in USSN 2002/0001937 by offering a lower interconnect layer count, it nevertheless still suffers from all the drawbacks of the structure of USSN 2002/0001937 as detailed above.
In light of the above it is clear that there is still a need for cost-effective, higher performance core-less substrates that can be used in a wide range of applications. To satisfy this need, one promising approach has been to attempt to eliminate the expensive thin film build-up structures described above and to replace them with other, cheaper materials and processes such as those established by and in common use in the printed circuit board (PCB) fabrication industry. Unlike thin film dielectric materials, the advanced dielectric materials used in the PCB industry may be applied by lamination techniques and are available in the form of prepregs which may be reinforced with glass fibers or other reinforcement materials. Proper selection of these dielectrics provides the potential to introduce "self supported" core-less substrate structures that eliminate or at least minimize the need for metal stiffeners. Furthermore, use of relatively low cost, established, PCB oriented processes, is expected to provide cost effective core-less substrates having multiple, low density, low pitch power and ground metal layers combined with high density, fine pitch metal signal layers.
Such laminate structures have been found to be susceptible to warping, particularly in consequence of hot pressing or curing processes. Core-less substrates obtained thereby, typically lack the flatness required for securely and reliably mounting ICs thereupon.
Where such substrates have been built up on one side of a metal carrier base that is subsequently removed prior to IC assembly, or thinned down to provide a stiffener supported substrate, internal unbalanced stresses invariably develop during fabrication. These stresses may be released on removal of the metal carrier, causing substrate curvature and warping. This can result in poor yields when assembling the IC thereupon, and may even lead to non flat packages that cannot then be mounted onto the corresponding PCB.
In an attempt to solve this issue, U.S. Pat. No. 6,913,814 to Ho et al. discloses a lamination process and resultant structure that provides a high density multi-layer substrate having a plurality of laminate layers, wherein each layer thereof is individually formed, and, only then are the layers stacked and laminated together. This approach apparently provides a viable alternative to the asymmetrical, sequentially built up, multi-layer substrates fabricated on a common metal carrier base of the prior art. The technology seems to provide a cost effective organic core-less substrate using tried and tested materials and processes established by the PCB fabrication industry, with solid copper vias replacing the PTHs.
Nevertheless, the technology described in U.S. Pat. No. 6,913,814 to Ho et al. has two major drawbacks: Firstly, in order to construct a structure having a bottom layer with a low pitch BGA thereupon for attachment to a PCB and a high pitch upper IC side, the substrate must be constructed from individual laminae, each having different densities and different dielectric layer thicknesses. Once again this results in an unbalanced, asymmetrical, structure with an inherent tendency to curving. Secondly, as is well known to those experienced in the art, connecting the substrate layers with via-to-pad contacts based upon metal contacts achieved through dielectric materials lamination is unreliable for high performance ICs applications, since these have a tendency towards loss of via contact and resultant package failures. This is especially of concern where high temperature processes are used during IC mounting onto the substrate.
In a co-pending application to the present inventors, IL 171378 filed 11 Oct. 2005 to Hurwitz et al., entitled "Novel Integrated Circuit Support Structures and their Fabrication" a method of fabricating an electronic substrate is described that addresses this issue. The fabrication method comprises the steps of: (a) selecting a first base layer; (b) applying a first etchant resistant barrier layer onto the first base layer; (c) applying a seed layer of copper; (d) building up a first half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers; (e) applying a second metal base layer onto the first half stack; (f) applying a protective coating of photoresist to the second base layer; (g) etching away the first base layer; (h) removing photoresist; (I) removing the first etchant resistant barrier layer; (j) building up a second half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers, wherein second half stack has a substantially symmetrical lay up to first half stack; (k) applying an insulating layer onto the second half stack of alternating conductive layers and insulating layers, and (l) removing the second base layer.
The processing method of IL 171378 to Hurwitz et al., essentially consists of building up half the desired structure on a sacrificial substrate, terminating the half structure stack with a thick layer that becomes a second sacrificial substrate, removing the first sacrificial substrate and building down a second half structure stack that is substantially symmetrical to the first half structure stack. Thus the first layers to be applied become the middle layers of the stack.
In theory, the first and second half structure stacks are mirror images of each other and have opposite residual stresses that cancel each other out giving a planar structure that shows no tendency to warp. However, because the stack is fabricated from the center outwards, with one half stack being fabricated first, from the center outwards, followed by the second half stack being fabricated on the first half stack, again from the center outwards, it is difficult to ensure that the processing conditions remain the same for the two half stacks, especially for structures with large numbers of layers. Discrepancies between the two sides typically results in some unbalanced residual stresses in the substrate that may lead to warping, resulting in the substrates that do not reach the strict planarity requirements of advanced IC package constructions, such as Package on Package (PoP), Package in Package (PiP), packages containing stacked ICs, and packages containing several ICs mounted by flip chip processes and others by Wire Bond techniques. For this and other reasons, the processing method of co-pending IL 171378 to Hurwitz et al., though being a major step forward in the art, nevertheless has limited applicability for very complicated, multilayered structures having a large number of active layers, and attempts to fabricate such structures have, in the past, lead to reduced yields.
Thus, despite the developments described above, and the major advantages of IL 171378 to Hurwitz, with regards to reliability due to high levels of planarity and smoothness, there is still a need for quick turnaround manufacturing processes and for chip support structures that are economical to manufacture and give high yields even for high count multilayer structures. The present invention addresses this need and presents new processing techniques and novel structures.

Advanced multilayer coreless support structures and method for their fabrication

Amitec-Advanced Multilayer Interconnect Technoloiges Ltd.


The present invention relates to the field of utility trailers and more specifically, to a covered utility trailer and a kit for assembling same. The covered utility trailer includes a trailer bed for supporting cargo. The trailer bed has a leading edge, an opposed trailing edge spaced apart from the leading edge and a pair of first and second, spaced apart, side edges joining the leading edge to the trailing edge. A pair of first and second, spaced apart, sidewalls and a leading wall are also provided. Each sidewall extends upright from a respective side edge of the trailer bed. The leading wall is mounted between the first and second sidewalls and extends upright from the leading edge of the trailer bed. A rear cargo access door assembly is disposed opposite the leading wall and between the first and second sidewalls. The rear cargo access door assembly extends upright from the trailing edge of the trailer bed. The rear cargo access door assembly includes a door frame and a pair of first and second cargo access doors hingedly mounted to the door frame in a double door arrangement. Each of the cargo access doors frame is selectively deployable in one of a swing door configuration and a ramp-forming configuration. The covered utility trailer also includes a roof assembly carried above the trailer bed. The roof assembly is supported by the leading wall and the first and second sidewalls, and is connected to the door frame. The trailer bed, the first and second sidewalls, the leading wall, the rear cargo access door assembly and the roof assembly co-operate with each other to define a box-like structure having an interior cargo storage space. A trailer transport rack assembly is also provided for carrying a plurality of kits to be shipped.

The assembly of conventional, heavy duty, utility trailers, and in particular, covered utility trailers often requires special equipment or tools, and routinely involves welding. The need for such special tools and/or welding and the manual skill required to carry out such assembly activities has resulted in these covered utility trailers being manufactured and fully assembled in factories or machine shops, prior to being shipped to distributors and retailers for sale to customers.
While assembly prior to shipping confers certain advantages (for instance, the product is ready for sale once received), the freight costs associated with this type of utility trailer tend to be relatively high. This is because the trailer tends to be a relatively, low-density load when assembled—it is bulky due to its box-like construction, but tends to be relatively, lightweight. As a result, less than optimal use of cargo container space is achieved when shipping these trailers. Once the trailers are shipped, a similar problem may be encountered in respect of storage. The distributor or retailer who receives these utility trailers must have adequate space to store them. Such bulky items require large storage areas.
In light of the foregoing, there is a real need for a covered utility trailer that can be assembled manually in a quick and easy manner without the use of special tools. Such a trailer would tend not to require assembly prior to shipping and accordingly, could be shipped and stored in a more compact and economical fashion thereby obviating the drawbacks associated with known covered utility trailers.
Utility trailers are often provided with rear cargo access doors that are hung on the jambs of the door frame. These cargo doors are vertically hinged such that they swing outwardly of the door frame to give access to the interior storage space of the trailer. To facilitate loading and unloading of the trailer, separate ramp members releasably mountable to the bottom member of the door frame may also be provided. In some cases, these ramps are stored in the interior storage space of the trailer when not in use. In other cases, they may be stored beneath the trailer bed within a purpose-built slot.
While these types of ramps tend to function in a generally satisfactory manner, they do tend to suffer from certain drawbacks. More specifically, the ramps stored within the interior storage space when not in use, tend to take up storage space in the trailer and may knock about when the towing vehicle is in motion, potentially damaging the cargo. Additionally, these types of ramps may be more susceptible to being forgotten, lost or stolen. Conversely, those ramps that are stored beneath the trailer suffer other disadvantages. In particular, those ramps may experience difficulties in deployment and storage. For instance, the ramps may become jammed within the slot due to the accumulation of dirt therein or because the ramp has sustained some damage which has now caused it to become warped and ill-fitting within the slot. Accordingly, it would be advantageous to provide a utility trailer with a versatile and compact ramp that may be stored easily and avoids the foregoing disadvantages.

Covered utility trailer and kit for assembling same


A machine vision system for determining seedlot vigor comprising an imaging device oriented to acquire an image of a germinating seed and an image analyzer for analyzing successive images of a seed and determining growth rate for a root of the seed, to determine the vigor of a seedlot to which the seed belongs. This system determines seedlot vigor independent of environmental germination conditions, measures a parameter which correlates highly with the characteristic of interest, and employs an appropriate experimental design, including sample size and test replication in order to insure that test results match actual final stands obtained from normal commercial production.

Seedlot vigor is the percentage of viable seeds within a given seedlot that possess sufficient growth potential to successfully progress through plant emergence under normal germination environmental conditions. Seedlot vigor is thus the percentage of seeds within a seedlot that possess the potential to become marketable plants. All other factors considered, this represents the maximum stand a seedlot can be expected to produce.
Seedlot vigor is often tested using plug trays. A plug tray consists of a series of small cells for sowing seeds typically for fruits, vegetables, and ornamental plants. An accurately sown crop in a plug tray consists of having exactly one seed per cell with good seed placement in each cell which contains adequate quality plug media. There are four stages through which a seed can progress in a plug tray. Stage 1 starts at the point when a seed has been sown, and ends when a radicle, i.e. embryonic root of a seedling, emerges from the seed coat. Stage 2 continues until emergence of the actual plant from the media. Stage 3 covers the growing of the plant until the plant is ready for sale. Stage 4 occurs during the time when a plant is being "finished" or hardened. Assuming a crop has been accurately sown, the final stand of marketable plants expected in a plug tray is dependent in large part on two factors: Seedlot vigor and environment.
An adequate environment must be provided to realize the maximum stand potential of a given seedlot. This includes proper levels of light, temperature, nutrition, water and gases. Additional cultural practices including chemical selection, application, and so forth, must also be managed in a logical and efficient manner.
In the past, the determination of seedlot vigor has been considered inconsistent and unreliable. The accepted seed testing standard set by the American Organization of Seed Analysts (AOSA) involves placing a prescribed number of seeds on blotter paper in a controlled environment for a certain length of time. By providing a controlled, standardized environment during the germination process, concerns with environment are reduced to a minimum. The final data obtained from this system consists of subjective counts of good seedlings collected at specified times.
As subjective counts are often found to be inaccurate, plug producers have turned to plug tray tests to measure the percentage of seeds within a seedlot capable of becoming marketable plugs, i.e. the final stand potential of a seedlot. One common goal of both the plug tray and blotter paper tests is to avoid having to identify the actual cause of poor vigor and just determine the percentage of seeds within a given seedlot which are satisfactory for use in commercial production. An in-house plug tray is generally able to distinguish between seedlots in a specific location which are capable of producing a final stand greater than 90%, for example, from those not likely to surpass 80%. However, even a well-replicated plug test cannot be expected to reliably predict final plug stands due to normal variation in cultural practices and germination environment. The plug tray test, however, has gained much acceptance because it automatically screens out the lowest vigor seeds because they simply do not emerge.
One problem with the plug tray test is that it cannot distinguish between seedlot vigor and germination environment. For example, if a given seedlot produces an 80% final stand, it does not necessarily follow that this seedlot possesses a total stand potential of 80%. It is possible for more than 80% of the seeds within this seedlot to have adequate vigor, but due to environmental problems, the final stand is only 80%. In addition, plug tray tests require expensive facilities and are labor and time consuming, often requiring 21 to 28 days for completion.
Another commonly used method involves the use of a stress test, in which it is presumed that if a seed can germinate satisfactorily under less than ideal conditions, it should be considered vigorous. One shortcoming with this approach, whether conducted on blotter paper or in a plug tray, is that stress tests have been found to be unreliable. One repercussion of testing seeds in conditions significantly different from normal production is often very inconsistent results.
Systems trying to exploit factors related to seed composition, such as levels of protein, ATP or RNA synthesis and chromosome or membrane degradation have encountered similar inconsistencies. A common characteristic of these tests is an attempt to isolate one component from a very complicated biochemical process. The hypothesis is that this one narrow factor changes in direct proportion with the ability of a seed to produce a marketable plug. Such biological systems, however, are generally too complex to allow such narrow tests to consistently and reliably predict such a general outcome.
Commercial plug production has essentially become a manufacturing process with growers facing ever-increasing demands to maximize the final stand of marketable plugs in each plug tray as efficiently as possible. Financially, seed is a major production input and seed vigor directly affects final stand.
Thus, what is needed is an efficient and economical method and apparatus which utilizes appropriate environmental conditions, measures a parameter which correlates highly with the characteristic of interest, and employs an appropriate experimental design, including sample size and test replication in order to insure that test results match actual final stands obtained from normal commercial production.

System and method for measuring seedlot vigor


Disclosed is a method for improving the performance of a layered electrode material. An interlayer spacing of the layered electrode material is measured and donated as (b). A salt compound is selected and added into a solvent with a molecular diameter of (c) to prepare an electrolytic solution, where a diameter (a) of a cation in the salt compound is smaller than the interlayer spacing (b), and c>b−a. The electrolytic solution is used as the working electrolytic solution for the layered electrode material.

Layered electrode materials are increasingly used in energy storage devices such as batteries and capacitors owing to their advantages of high specific capacity, low resistance and high energy density, and properties of double-layer capacitance and Faraday pseudocapacitance. In the practical use, cations in the electrolytic solutions undergo intercalation and deintercalation in the layered electrode materials to realize the charging and discharging process. During the cycle of charging and discharging, the layered electrode material will go through structural transformations from a layered structure to a defective spinel structure to a disordered rock salt structure, which will bring a decreased interlayer spacing, an increased impedance and a non-uniform surface-bulk structure, rendering the intercalation and the deintercalation of cations more difficult, or even impossible. As a consequence, an obvious deterioration will occur to the specific capacity and cyclic stability.
Thus, the intercalation and the deintercalation of cations have a great influence on the specific capacity and the cyclic performance of energy storage devices, and performances of the energy storage devices can be improved by decreasing the resistance in the process of intercalation and the de-intercalation of cations. Currently, most research concerning layered electrode materials is focused on performance analysis and enhancement, while the failure mechanism of layered electrode materials has not been studied thoroughly. Therefore, to deeply explore the relationship between the crystal structure of the layered materials and the co-intercalating behavior of solutes and solvents in electrolytic solutions, and the intercalation and the deintercalation of solvated/desolated ion, can provide technical reference for the performance improvement of energy storage materials and the development of a green and efficient route of recycling energy storage materials.
It has been found that during the intercalation and the deintercalation processes of cations in electrolytic solutions, if the cationic diameter differs greatly from the interlayer spacing, the cations often intercalate into or deintercalate out of the layered material in a form of hydrated ions, and the intercalation of water molecules is detrimental to the specific capacity and cyclic performance of the layered electrode materials. If the cationic diameter is larger and differs slightly from the interlayer spacing, the solvent molecules would be not prone to intercalating into the layered electrode material, so that the desolvation effect would be enhanced, and the specific capacity and cyclic performance would be improved correspondingly. If the cationic diameter is larger than the interlayer spacing, it will be difficult for cations to intercalate into the layered electrode materials, and the layered structure is prone to collapse, resulting in poor performance.
Chinese Patent Publication No. 103985902A discloses a method for improving the performance of lithium-sulfur batteries by using a desolvated gel electrolyte, where the desolvated gel electrolyte has high concentration of lithium hexafluorophosphate and a carbonate solvent, which can reduce the impedance of the electrolysis through the desolvation effect, leading to an improved electrochemical performance.
Given the above, the present disclosure provides a method for improving the performance of a layered electrode material, in which the interlayer spacing, cationic diameter and solvent molecular diameter are regulated to enhance the desolvation effect to make the solvent molecules fail to intercalate into the interlayer of the layered electrode material, so as to optimize the working electrolyte for the layered electrode material, leading to significantly improved specific capacity and cyclic performance of the layer electrode materials.

Method for improving performance of layered electrode materials


An inner receptacle is provided which is adapted to be used with a resilient squeeze bottle. The inner receptacle includes a flexible bag and includes a mechanism for causing the flexible bag to invert upon itself about its midpoint without requiring attachment of the inner receptacle to the squeeze bottle. The inversion enables substantially all of the product within the receptacle to be dispensed. One preferred mechanism for causing inversion is a support frame which resembles a bird cage. This support frame may be located inside or outside the top half of the flexible bag. Such inner receptacles offer special advantages when utilized with reusable squeeze bottles. The reusable squeeze bottles may be oval and include an opening at the top which accommodates the dispensing opening of the inner receptacle and an opening at the bottom end through which the entire inner receptacle may pass. An end plate is utilized to seal the bottom end of the squeeze bottle. One preferred squeeze bottle includes an inner sleeve and an outer sleeve which enables replacement of the inner receptacle while manipulating only one closure element.

1. Field of the Invention
The present invention relates to bag-in-bottle packages which include a resilient squeeze bottle and and inner receptacles incorporating a flexible bag for housing a viscous product, and more particularly, to such inner receptacles which include a flexible product bag which inverts upon emptying.
2. Description of the Prior Art
A wide variety of packages are known which include an outer squeeze bottle and an inner flexible product bag. Generally, the outer squeeze bottle includes a resilient side wall portion which when compressed, forces product from the bag through a dispensing passage. The dispensing passage generally includes a valve which prevents air from entering the product bag when the outer squeeze bottle is released. The squeeze bottle also generally includes a second valve which enables air to re-enter the outer squeeze bottle into the space located between the inner flexible product bag and outer squeeze bottle. Consequently, the inner product bag collapses as product is dispensed. One problem with such packages is that the inner flexible bag has a tendency to collapse prematurely; trapping product within the inner flexible bag so it cannot be dispensed.
One method to ensure that product is not trapped inside the inner flexible bag is to provide a mechanism for causing the bag to invert about its midpoint. U.S. Pat. No. 2,608,320, issued to Harrison on Aug. 26, 1952, discloses such a package which provides for bag inversion. This package requires that a thinner, flexible, lower bag portion be sealed to an upper, thicker, rigid, bag portion around the entire curved circumferential surface of the bag in an air tight manner. However, complete sealing along such a curved surface is difficult to accomplish; particularly when utilizing heat sealing. In addition, the rigid top portion is not resilient such that it is squeezable. Thus, the user is only able to squeeze the bottom portion of the package.
Commonly assigned U.S. Pat. No. 4,842,165 which issued on Jun. 27, 1989 to Van Coney discloses a package which includes an inner receptacle having a flexible product bag. The bag of the inner receptacle is secured to the interior surface of the side wall of the outer squeeze bottle about its midpoint to provide bag inversion. In the illustrated embodiments of the Van Coney invention the inner receptacle is secured by attachment of its outermost surface to the innermost surface of the squeeze bottle; preferably by means of adhesive or by heat sealing.

Bag-in-bottle package with reusable resilient squeeze bottle and disposable inner receptacle which inverts upon emptying without attachment near its midpoint to squeeze bottle


A method and arrangement for producing charge images of images to be printed in an electro-photographic printer or copier device. The method and arrangement provides for printing of different gray scale levels on the print medium by controlling LEDs that are directed toward a photo-conducting intermediate image carrier to emit a different number of successive light pulses. The number of pulses depends on the gray scale level of the raster image portion. The light pulses overlap on the intermediate image carrier to effect correspondingly different charge levels. The intermediate carrier is developed by the application of toner and the toner is transferred to the print medium.

1. Field of the Invention
The present invention relates generally to an electro-photographic printer or copier, and, in particular, to an apparatus for exposing a photoconductive intermediate image carrier of the printer or copier with different gray scale levels using a light source.
2. Description of the Related Art
Electrographic printing or copying devices are known (as shown for example in European patent document EP 0 683 954 B1). Such a printing device contains a driven intermediate support, which may be a photo-conducting drum, on which charge images of images to be printed are generated. The charge images have toner applied to them, the toner is transferred to a print medium, such as paper, and the toner is fused onto the print medium. To accomplish this, the printing device contains the following components grouped around the intermediate support: an exposure device (which is a character generator), a developer station, a transfer station, a cleaning station and a charge device. The charge device is used to charge the intermediate support to, for example, 500 Volts and then for generation of the charge images of the images to be printed with the exposure device to, for example, approximately 70 Volts. The charge images then have toner applied to them in the usual manner in the developer station. The transition from toner to the intermediate support however only takes place if sufficient current exists between the developer station, specifically the developer roller, and the discharged regions of the intermediate support. For instance, if the developer roller has a potential of 220 Volts and the charge images on the intermediate support have a potential of about 70 Volts, then a field results, which takes the toner from the developer station to the intermediate support. The potential must be reduced at least by means of a discharge of the intermediate support in order to make it possible to ink the intermediate support. This reduction in potential will be referred to in the following as a development threshold or development level. In the transfer station, the toner images are then transferred to the print medium. Finally, in the cleaning station the intermediate support is cleaned of residual toner. With that a new print operation can start.
From European patent document EP 0 683 954 B1, which is incorporated herein by reference, it is known to use LEDs (light emitting diodes) as an exposure device. Generally, these are arranged in a comb of adjacent LEDs, the comb lying at a right angle to the moving direction of the intermediate support. The image to be printed is broken down into rows and columns of raster cells (also referred to as macro-pixels), whereby the raster cells are further divided into output pixels (micro-pixels) and an LED is assigned to each output pixel. In order to generate raster cells with different gray levels, individual output pixels of the raster cell can be exposed accordingly. In order to further increase the number of gray level steps, the LEDs can be used in a multi-level operation, i.e. the emitted light energy can be changed by means of variation of the turn-on time and/or of the field current of the LEDs. A realization of such a multi-level operation is described in the above cited European patent document EP 0 683 954 B1.
European patent document EP 0 663 760 A1 also describes a digital LED printer with an LED comb, in which printed images of different gray levels are generated by modulating the exposure time of the LEDs.
A further arrangement with which an LED comb can be controlled is disclosed in U.S. Pat. No. 4,750,010. Once again the gray level of a raster cell of the printed image is set by the duration of the light pulses of the LED allocated to the raster cell.
U.S. Pat. No. 5,255,013 describes an LED printer head which provides one LED per raster cell (pixel) from a comb of LEDs and in which the gray level of the image to be printed that has been divided into raster cells is generated per raster cell by means of a series of successive rapid light pulses of the allocated LED.
In European patent document EP 1 018 834 A2 a character generator with LEDs is described, in which the light energy of the individual LEDs is set up in such a way that a desired dot can be generated on an intermediate support and the dot printed on the print material. In the process the fact is taken into consideration that the discharge curves of adjacent dots mutually influence each other. The light energy of the LED generating the dot on the intermediate support is set up in such a way that it does not become too great and does not discharge the intermediate support too strongly. The light energy is determined in the process by the light emission per LED and per time. To carry out this method, the light energies to be emitted for each LED (and each dot) must be calculated separately, which requires a time-consuming activation.
European patent document EP 0 564 868 A2 described a character generator which uses a laser to generate images on an intermediate support. Differing gray levels of the individual pixels in a row direction are generated as a result of activating the laser with an appropriate pulse width signal. To achieve a sharp edge in the transition on the border of an image, the pulse width signals fed to the laser of the pixels on the border are shifted in the direction of the nearest pixel within the image. Since the laser is fed with pulse width signals of variable width per pixel, the laser emits variable light energies per pixel.
European patent document EP 0 663 760 A1 describes an LED printer which exhibits a control architecture, with which a multitude of gray levels can be generated. To achieve a light emission for the LEDs that is independent of the properties of the individual LEDs, the characteristic properties of the individual LEDs are measured, a correction signal is taken from this information which is then fed to the activation circuit for the LEDs and is combined with the activation signal for the LEDs.
European patent document EP 0 388 833 A2 discloses an additional character generator with LEDs. Here a correction of the activation signals for the LEDs is also made depending on the environmental conditions.
U.S. Pat. No. 6,280,012 B1 describes a character generator for ink-jet heads. To avoid an overloading of the character generator for the case that a number of ink-jet heads are active at the same time, the ink-jet heads are combined into groups and activated in a staggered fashion.
U.S. Pat. No. 4,661,859 describes a printer with which gray levels can be printed. The data representing the gray level per pixel are fed to a counter, which correspondingly increments the value of the data. The counter status is converted into a pulse length signal, which is used for activation of a laser.

Method for generating charge images of images to be printed on a moving photoconductive intermediate support of an electrographic printing or copying device


The decoder for decoding the encoded audio data comprises an error detection device for detecting errors of encoded audio data; an error concealing method determining device for determining an audio frame and weight of window function which are used for concealing the errors based on error information detected by the error detection device; a frequency-to-time converter for converting audio data of frequency components to time-component audio frame; an audio frame buffer for accumulating the time-component audio frame outputted by the frequency-to-time converter; and a windowing processing device for adding weight onto the time-component audio frame outputted by the frequency-to-time converter and/or the audio frame accumulated in the audio frame buffer according to the weight of window function determined by the error concealing method determining device.

1. Field of the Invention
The present invention relates to an audio decoder and an audio decoding method for obtaining audio data by decoding encoded audio data. Specifically, it relates to an audio decoder and an audio decoding method which achieves to improve the sound quality at the time of error occurrence when encoded audio data is decoded in a decoding process.
2. Description of the Related Art
In compressed audio data (MP3, AAC, Dolby Digital, ATRAC and the like) which have become popular lately, data is compressed using combination of methods such as entropy encoding, window function, and orthogonal conversion so as to achieve a higher encoding efficiency than that of linear PCM. Such compressed audio data is replayed by being decoded in a decoder, and there are cases of error occurrence in a recording medium or on transmission paths. Especially, frequency of the error occurrence is high in radio transmission and the like. Thus, it becomes necessary to take measures so that errors are hardly perceived. In general, an error detection code such as CRC code is contained in the audio data to be transmitted, which makes it possible to detect the transmission errors.
When errors are detected through the error detection code as described above, conventionally, the detected audio frame is muted or skipped until reaching the audio frame which can be correctly decoded as the measures to cope with the errors. Also, it is possible to employ a method in which sound is smoothly attenuated by inserting zero to input signal of window function so as to reduce the noise (for example, see Japanese Unexamined Patent Publication 2002-073091).
As another method for making errors hardly perceived, often used is a method in which the audio data which is correctly decoded right before is accumulated in a memory and is repeatedly outputted until the data which can be correctly decoded is received.
However, there are shortcomings in the above-described conventional measures for overcoming errors as will be described below.
The first aspect of the shortcomings is as follows. When the adjacent decoded audio data is used for filling to conceal the error of audio data, the sound becomes discontinuous in between the audio frames, which cause the noise.
The second aspect of the shortcomings is as follows. Error concealing processing is performed by using only the error information within the encoded audio data so that there is only a small selection of factors for determining the error concealing method. Thus, it is hard to take sufficient measures for overcoming errors.
The third aspect of the shortcomings is as follows. The error concealing processing is performed by using only the error information of the audio data adjacent to the audio data which is being decoded currently so that it is impossible to take measures for overcoming errors by predicting the future condition.


A carbonation system is disclosed that effectively controls the treatment of fruits and vegetables with CO2 gas, providing enhanced flavor to fruits and vegetables. One embodiment of the invention uses a microprocessor to preferably monitor and control the pressure, temperature and gas flow within a sealable enclosure to effectively control the carbonation of fruits and vegetables. Another embodiment consists of a combination carbonation system and cooler that effectively controls the carbonation of fruits and vegetables by including pressure relief devices and an insulation cover. The insulation cover has apertures that provide for the distribution of CO2. A third embodiment is disclosed that also consists of a combination carbonation system and cooler. This third embodiment controls carbonation by including, among other features, feedback mechanisms and a pressure relief device. A method of using the first embodiment is also provided.

1. Field of the Invention
The present invention relates to a system for optimally controlling the carbonation of food. More particularly, this invention efficiently and effectively controls the exposure of fruits or vegetables to carbon dioxide gas, resulting in the enhanced flavor of the fruits or vegetables.
2. Description of Related Art
The carbonation of beverages, like soft drinks and juices, has been around for centuries. Yet, even today, there is an endless thirst for their enhanced taste or "tingly fizz." As a result of this popularity, carbonation has spread to food items and additional beverages. Milk, coffee, tea, yogurt and even breakfast cereals are now carbonated for the purpose of adding a new and exciting taste. More interestingly, carbonation has spread to fruits and vegetables. U.S. Pat. No. 5,968,573, as herein incorporated by reference, discloses a method for enhancing the flavor of fruits and vegetables by exposure to CO2 gas. Long-known nutritious snacks including, but not limited to, pears, grapes, oranges, nectarines, grapefruit, strawberries, cucumbers and tomatoes attain a new and exciting taste when exposed to CO2. These "fizzy" nutritious snacks are a healthy alternative to the carbonated drinks or juices that lack vitamins, minerals and other nutrients and provide hefty amounts of empty calories. Treating fruits and vegetables with CO2 enhances both the flavor and experience of consuming the carbonated food, rendering healthy food more appealing to consumers.
As disclosed in U.S. Pat. No. 5,968,573, enhancing the flavor of fruits and vegetables through exposure to CO2 gas can be achieved by storing the produce in a cooler or other container packed with frozen CO2 or "dry ice." (A strongly carbonated water environment can also be used to expose the food item to CO2.) The produce remains in the cooler or other container for approximately several hours, the amount of time varying depending on the specific type of fruit or vegetable and whether the fruit or vegetable is fresh or preserved in some other way. The produce is separated from the dry ice typically by a non-heat conductive barrier to prevent freezing. Once in the closed environment, the CO2 will begin to sublimate and create a cold and heavy CO2 atmosphere. The food item placed in the closed CO2-rich environment will, over time, take up enough CO2 within its tissue to provide the fruit or vegetable with an effervescent character. The effect of CO2 exposure on fruits and vegetables can be reproduced in 2-12 hours, by storing fresh fruit in a cooler or other container with 5-10 pounds of dry ice. When removed from the cooler or other container, the fruits and vegetables are covered with a material capable of inhibiting the loss of CO2, such as a material that is easily removable or edible. The effect of the CO2 exposure remains in the produce for some time after removing the produce from the cooler or other container.
Storing produce in a cooler or other container packed with dry ice and using only a non-heat conductive barrier to separate the produce from the dry ice, however, is problematic in that the carbonation is not always consistent. The user has to choose the duration the fruits or vegetables remain in the cooler or other container. If the user leaves the fruits or vegetables in the cooler or other container too long, deterioration of the fruits and vegetables may occur due to physiological changes caused by the high CO2 level or low oxygen level inside the fruit and vegetables. However, if the user does not leave the fruits or vegetables in the cooler or other container long enough, a strong "fizz" will not be achieved. The user also has to choose an appropriate amount of dry ice to be placed in the cooler or other container corresponding to the volume of space inside the cooler or other container. If the amount of dry ice is inappropriate, too little or too much pressure or too high or too low of a temperature can result. Extreme pressure sealed within the cooler or other container can lead to an explosion. On the other hand, if the pressure is too low within the cooler or other container, a strong fizz may not be produced. Too low a temperature can result in the freezing of the fruits or vegetables, while too high a temperature may not produce a strong fizz or desired taste. Furthermore, the non-heat conductive barrier lacks apertures that allow for the even distribution of CO2 into the area where the fruits and vegetables are stored. If the fruits or vegetables are not adequately separated from the dry ice by the non-heat conductive barrier, freezing can easily occur.
U.S. Pat. No. 5,968,573 also discloses that a 20-pound CO2 tank and a regulator can be used to pump CO2 into a closed container to carbonate fruits and vegetables, providing them with an effervescent quality. It is disclosed that the produce remains in the closed container for a varying amount of time depending on the specific type of fruit or vegetable, the temperature of the surrounding environment and the carbonation pressure. Also, an apparatus has been manufactured where the 20-pound CO2 tank, having a regulator, pumps CO2 into a closed container that is similar in shape and size to the CO2 tank. The CO2 is preferably pumped into the closed container through several conduits. However, using the apparatus as disclosed in the above-mentioned patent, and the manufactured apparatus, can be dangerous and entails awkward equipment that is inconvenient and burdensome. The closed container that holds the fruits and vegetables to be carbonated lacks a pressure relief device, which is needed to release excess CO2 pressure, preventing an explosion caused by extreme pressure sealed within the closed container. Furthermore, keeping the container cool to optimize the carbonation of fruits or vegetables is problematic. The container does not have its own temperature control source and will not fit into standard refrigerators. Yet again, the carbonation of the fruits or vegetables is not always consistent. The user has to determine the appropriate amount of CO2 to release into the closed container depending on the type of fruit or vegetable involved, and the user has to determine the amount of time needed for the particular fruit or vegetable to acquire a favorable effervescent flavor. Determining these amounts may not always provide an efficient and effective way to carbonate fruits or vegetables.
A carbonation system specifically designed for fruits and vegetables is therefore needed that achieves optimal or desired carbonation levels regardless of the type of produce. The carbonation system needs to be able to effectively and efficiently control the environment within a sealable enclosure and be able to increase or decrease the amount of CO2 that flows into or out of the sealable enclosure. The carbonation system needs to be easy to maintain, safe, convenient, compact and ideal for private and commercial use in places that would extend from restaurants, to kiosks, to grocers, to homes, to the outdoors. These and other advantages are provided by the invention disclosed below.

Carbonation system for enhancing the flavor of fruits and vegetables


A photographing device includes a camera mounting unit on which a camera is detachably mounted, a light source unit arranged at a predetermined distance from the camera mounting unit, and a table which is arranged between the light source unit and the camera mounting unit, and on which an object is placed. The object placed on the table is illuminated by the light source unit, and can be photographed by the camera.

1. Field of the Invention
The present invention relates to a photographing device for photographing an object such as a negative film, a slide film, or the like using a camera, e.g., an electronic still camera.
2. Related Background Art
In recent years, in the field of cameras, electronic cameras such as still video cameras (to be referred to as SV cameras hereinafter) have become increasingly popular. The SV cameras have the following features. Photographed image data can be recorded on a magnetic recording medium such as a video floppy disk without performing, e.g., a development process like in silver chloride cameras, and can be immediately reproduced on a television monitor (TV monitor). Thus, the SV cameras have become popular in various fields.
A conventional camera of this type comprises various functions such as a fixed focal point photographing lens, an external finder, a built-in flash device, a closeup function, and the like. In particular, the closeup function is often utilized when documents are photographed.
Since photographed image data can be immediately reproduced on a display such as a TV monitor, the SV camera is widely used in various presentations due to its convenience and good operability in place of conventional slides.
In order to take a closeup photograph of a transmission original such as a camera film using the above-mentioned electronic still camera, a closeup lens for realizing an enlarged-scale photographing operation, a transmission illumination source for uniformly illuminating a film, and the like are required. In addition, a negative-positive reversal function for photographing a negative film is required. For these reasons, it is very difficult to take a closeup photograph of a camera film.
Since a closeup photographing operation is performed while the camera main body is set in the vicinity of an original as an object, a slight movement of the camera appears as a large movement on a screen in an enlarged-scale photographing operation.
In existing apparatuses, although an apparatus for photographing a film image, and outputting image data to a monitor display has been proposed, only a bulky, special-purpose apparatus is available. Thus, demand has arisen for development of an apparatus which can easily photograph a film image by utilizing the SV camera.
The SV camera which records a still image on a video floppy disk, and reproduces image data has high possibility of such applications.
However, if a video camera is used, image processing based on electrical signals is performed, and an image is displayed on, e.g., a monitor display, it is expected that these problems about operability will be solved.


The present invention relates to an apparatus and a method for controlling a vehicle flap or a vehicle door, the apparatus having a housing, a first end of which is pivotably coupled to one of the following: a vehicle flap or a vehicle door and a vehicle frame, and a second end of which is pivotably coupled to the other one of the following: a vehicle flap or a vehicle door and a vehicle frame, a drive control device which is arranged on the housing, and at least one sensor which is in the form of an acceleration sensor. An abovementioned apparatus and a method, in which simple and reliable movement as well as detection and evaluation of the movement may be ensured, is provided by virtue of the acceleration sensor being arranged on the housing, and the acceleration sensor detecting the acceleration of the vehicle flap or vehicle door.

The present invention relates to an apparatus for controlling a vehicle flap or a vehicle door.
DE 198 29 731 A1 shows an apparatus for controlling a vehicle flap, in which a vehicle flap is pivotably arranged on a vehicle frame. One or more sensors which are intended to detect objects which have come between the vehicle flap and the vehicle frame are arranged on the vehicle frame, thus preventing these objects from being squeezed between the vehicle flap and vehicle frame. However, it is disadvantageous that it is not possible to determine the absolute position of the vehicle flap using this arrangement of the sensor or sensors.
It is also known from practice to fit sensors to the vehicle flap or vehicle door of motor vehicles, said sensors detecting the movement of the vehicle flap or vehicle door during an opening movement and a closing movement and their measurement results being evaluated in order to control the movement of the vehicle flap or vehicle door. However, they have the disadvantage that the sensors must be fitted to the movable part, the vehicle flap or vehicle door, of the motor vehicle as separate components. This results in the need for expensive and complex cabling which has to be disadvantageously arranged in the vehicle flap, for example, and additionally has to be routed from the vehicle flap into the vehicle body. When the vehicle flap is pivoted, a gap is produced between the vehicle flap and the vehicle frame, which gap must be bridged by the cabling, with the result that the cable harness used is routed to the outside and is thus susceptible to interference. It is also disadvantageous that the sensor has to be fitted at a defined position.
DE 101 19 340 A1 shows an actuating system for a tailgate of a motor vehicle, in which a first end of a gas-filled compression spring, which assists an opening movement of the tailgate, is pivotably arranged on the motor vehicle tailgate and a second end of said spring is pivotably arranged on the vehicle body. The cylinder of the gas-filled compression spring or the tailgate is connected to a drive device arranged on the vehicle body by means of a cable device, the cylinder being able to be moved using the cable device, which is driven by the drive device, in such a manner that the gas-filled compression spring is tensioned and a closing movement of the tailgate is initiated. A sensor is arranged at the point at which the gas-filled compression spring is fastened to the vehicle body, said sensor being in the form of a rotary potentiometer and transmitting an electrical signal which is associated with the opening angle of the tailgate to a control device which is likewise arranged on the vehicle body. A comparison unit can be used to determine a variable which is proportional to the angular speed of the tailgate from the time-dependent profile of the signal transmitted by the sensor, said variable being able to be used, by comparing it with a reference speed in the case of a deviation, to determine whether an obstacle is disrupting the movement of the tailgate. The drive of the opening or closing movement of the tailgate can be accordingly adjusted or reversed if there is a disruption.
DE 40 41 087 A1 shows an apparatus for the motorized movement of window sashes, skylights or smoke extractor flaps in buildings. The apparatus comprises a plurality of actuating devices which are each driven using an electric motor. The actuating devices each comprise a displaceable spindle, one end of which is connected to a frame element of a skylight. The spindles can be displaced in a drivable manner into the respective housings of the actuating devices by operating the electric motors, an opening or closing movement of the skylight being initiated by this. The electric motors each have a sensor which measures the rotational speed of the electric motor and forwards it to a central control apparatus which is fixedly arranged on the building, calculates, on the one hand, the instantaneous opening angle of the skylight from the transmitted data and, on the other hand, sends control signals to the electric motors in order to ensure a uniform opening movement even when the actuating elements are subjected to different loads.
EP 1 614 846 A1 shows a drive device for a motor vehicle tailgate, in which, on the one hand, an opening movement of the tailgate is driven using a gas-filled compression spring whose ends are pivotably arranged on the tailgate and vehicle body, and which, on the other hand, has an actuating apparatus which is driven by a motor that is arranged such that it is fixed to the vehicle body, is fixedly arranged on the vehicle body and is connected to the tailgate by means of a link which is pivotably articulated to the tailgate. A pivoting movement of the link, which is driven by the motor, makes it possible to initiate and control an opening and closing movement of the tailgate. A sensor element which measures the revolution of the motor is provided on the motor of the actuating apparatus, thus making it possible to indirectly determine the opening speed and acceleration of the tailgate, which also makes it possible to determine the relative position of the tailgate. A further sensor element which can be used to detect whether the tailgate is in a closed position is arranged on the vehicle body approximately at the level of the lower end of the tailgate, thus providing a reference position for determining the absolute position of the tailgate.

Device and method for controlling a vehicle flap or a vehicle door


A method and apparatus for hybrid automatic repeat request (HARQ) transmission are disclosed. If a packet has not been successfully transmitted, it is determined whether an HARQ early termination condition is met. If the HARQ early termination condition is met, the HARQ process is terminated and the packet is discarded at the HARQ level. The HARQ early termination condition is met if a positive acknowledgement (ACK) has not been received until the number of retransmissions reaches a predetermined limit that is dynamically configured based on channel condition, measurement, etc. Alternatively, the HARQ early termination condition is met if a transmit power required for successful transmission of the packet is much higher than an actual transmit power. Alternatively, the HARQ early termination condition is met if a transport format combination (TFC) selected for retransmission is different from an optimal TFC. A higher layer may be notified of the early HARQ termination.

Automatic repeat request (ARQ) is a transmission scheme that a receiver sends feedback to a transmitter informing that a data block has been decoded successfully or not, and a failed data block is retransmitted by the transmitter based on the feedback. Hybrid ARQ (HARQ) is a variance of the ARQ. In HARQ, the previously failed data block is stored in the receiver and combined with a retransmitted data block.
There are two types of HARQ schemes: chase combining and incremental redundancy. In chase combining, when the receiver detects an error in the received data block, a retransmission is requested and the incorrectly decoded data block is stored and combined with the retransmitted data block. In incremental redundancy, the retransmitted data block is coded differently from the previous failed data block, rather than simply repeating transmission of the same data block as in chase combining. Incremental redundancy gives better performance since coding and modulation are effectively performed across retransmissions. Chase combining may be considered a type of incremental redundancy.
HARQ may be used in a stop-and-wait mode or in a selective repeat mode. In the stop-and-wait mode, one data block is transmitted at a time. After each data block is transmitted, the transmitter waits until feedback, (i.e., positive acknowledgement (ACK) or negative acknowledgement (NACK)), is received. A new data block is transmitted, (or the previous data block is retransmitted), only after the feedback is received or if a timer expires. In the selective repeat mode, the HARQ process continues to send a number of data blocks specified by a window size, regardless of the feedback (ACK or NACK). The receiver keeps track of the sequence numbers of the data blocks received and informs the transmitter in the feedback. Once the transmitter has sent all the data blocks in the window, the transmitter re-sends failed data blocks indicated via a feedback channel.
In a simple stop-and-wait mode, the transmitter has to wait for the receiver's acknowledgement and this reduces system efficiency. Therefore, multiple stop-and-wait HARQ processes are usually used in parallel, wherein one HARQ process is waiting for an acknowledgement, another HARQ process may use the channel to send data.
A universal mobile telecommunication system (UMTS), (such as high speed downlink packet access (HSDPA) and high speed uplink packet access (HSUPA)), uses HARQ with chase combining or incremental redundancy with multiple stop- and wait HARQ processes in parallel. For example, for HSUPA enhanced dedicated channel (E-DCH) transmissions, a medium access control (MAC) layer in a user equipment (UE) performs E-DCH transport format combination (E-TFC) selection and delivers a transport block to the HARQ process, which handles transmission and retransmission of the transport block. For HSUPA, for the E-TFC selection, the MAC layer takes into consideration the maximum allowed puncturing, the maximum allowed UE transmit power, and the serving grant for the E-DCH, (i.e., how much power is allowed to be used by the E-DCH). However, for retransmission of a failed transport block, the same E-TFC is used, which implies that the same transport block size is used.
This causes several problems. First, the level of puncturing may be different for retransmissions in case the compressed mode used in the given frame is different. This may lead to higher puncturing, which may cause the UE to exceed its allowed puncturing, (i.e., the puncturing limit). Second, the power used by the E-DCH dedicated physical data channel (E-DPDCH) depends not only on the block size but also on the compressed mode used in the frame. The transmit power is recalculated for each retransmission, (i.e., beta factors for E-DCH are adjusted for every retransmission based on compressed mode). If the transmit power required for the retransmission is higher than the initial transmission power, the UE may exceed its maximum allowed transmit power, in which case the power is clipped to the maximum allowed power. This will result in an increase of the probability of error in the data block and consequently in an increase of the probability that the transmission will fail. The UE may also exceed its E-DCH serving grant. This will result in an increase of interference in the cell, which may affect the overall system capacity.
In a system where adaptive modulation and coding (AMC) is used, (such as 3GPP long term evolution (LTE) system), for a particular allocation of radio resources, a less robust modulation and coding scheme (MCS) allows for larger transport block sizes and a more robust MCS requires smaller transport block sizes. As a result, since the transport block size is fixed for every retransmission, the transmitter may not be able to change the MCS between retransmissions.
For LTE, it has been proposed to re-segment radio link control (RLC) protocol data units (PDUs) or RLC service data units (SDUs) if a transport block containing the RLC PDU or SDU is not transmitted successfully. However, it is proposed to be done after the HARQ process has already tried to transmit the transport block, (i.e., after all HARQ level retransmissions allowed in the specific HARQ process take place). The PDU or SDU re-segmentation is not performed at an HARQ level, but at an RLC level, which means every HARQ level retransmission is performed using the same transport block size. Therefore, the LTE system would suffer from similar problems described above.

This patent is subject to a terminal disclaimer.

Method and apparatus for hybrid automatic repeat request transmission


A plate heat exchanger is disclosed herein. In some instances, the plate heat exchanger may be disposed in an ice bin of a beverage dispenser for cooling one or more fluids. The plate heat exchanger may include a top plate, a bottom plate, an outer boundary wall, and a fluid flow path disposed between the top plate and the bottom plate. The fluid flow path may include an inlet and an outlet. A fin may be disposed within the fluid flow path from the top plate to the bottom plate between the inlet and the outlet.

Various types of beverage dispensers are commonly used to dispense cold beverages, such as carbonated beverages, water, and other beverages. Certain beverage dispensers may include a cold plate for cooling a beverage or beverage ingredients, such as carbonated water, plain water, and syrup, within the dispenser prior to dispensing the desired beverage therefrom. Generally described, the cold plate may be formed as an aluminum casting having a number of tubes or sleeves positioned therein and configured to allow the beverage ingredients to flow therethrough. The cold plate generally may be positioned within the beverage dispenser and in direct physical contact with an ice bin of the dispenser. For example, the cold plate may form or be disposed about the bottom of the ice bin. As the beverage ingredients pass through the tubes or sleeves of the cold plate, heat may be exchanged between the ingredients, the cold plate, and the ice contained within the ice bin. In this manner, the beverage ingredients may be appropriately cooled within the cold plate, prior to dispensing via a nozzle, such that the beverage dispenser provides the consumer with a cold beverage.
Although existing cold plates may be suitable for cooling many types of beverage ingredients, the extent of cooling provided may vary depending on the heat transfer efficiency of the cold plate. There is thus a desire for to increase the heat transfer efficiency of the cold plate. In addition, increased flexibility in the configuration of the cold plate is desired to accommodate a variety of ingredients. More so, it is desirable to reduce the cost of the cold plate by reducing the materials to be used.

Systems and methods for cooling one or more beverage components with a plate fin heat exchanger


A fan module includes a casing, a fan, and two vibration absorption assemblies. The casing has an accommodating space. The fan is located in the accommodating space and keeps a distance from the casing. Each of the two vibration absorption assemblies includes two first vibration absorption components and a second vibration absorption component. The two first vibration absorption components are respectively in contact with the fan and separated from the casing, respectively. The second vibration absorption component is connected with two first vibration absorption components and the casing, respectively. The first vibration absorption components and the second vibration absorption components are adapted for absorbing the vibration waves having different frequency ranges.

1. Technical Field of the Invention
The disclosure relates to a heat dissipation device, and more particularly to a fan module.
2. Description of the Related Art
A computer system (e.g. a personal computer or a server host) generates exhaust heat during operation, and the amount of the exhaust heat varies, depending on the operating time and the efficiency of the computer system. When the exhaust heat is gradually accumulated in the computer system, the internal temperature of the computer system will rise, thereby affecting the operating efficiency of the computer system, even causing a system crash. Therefore, a computer system may be provided with a heat dissipation device (e.g. a fan) to dissipate the exhaust heat generated during operation.
However, the rotation of the fan may cause vibration, and the vibration amplitude increases when the rotation speed of fan increases. This vibration has an influence on the performance of internal electronic components of the computer system. For a server, the fan is usually fixed to the server's chassis, so the vibration caused by the rotation of the high-speed fan is thus transferred to such peripherals as the hard disks, which affects the performance of these peripherals, and may even damage them. As a result, the vibration problem caused by fan rotation needs to be addressed.

INVENTEC (PUDONG) TECHNOLOGY CORPORATION


A connector (10) includes a housing (30) with a wire draw-out portion (34) from which wires (W) are drawn out. Rubber plugs (27) are accommodated in rubber plug accommodating portions (41) in the housing (30) and seal between the wires (W) and inner peripheral surfaces of the rubber plug accommodating portions (41). A back retainer (50) is mounted through a wire draw-out opening (34A) in the wire draw-out portion (34) and retains the rubber plugs (27). The back retainer (50) includes a retainer main body (52) for preventing backward movements of the rubber plugs (27) while allowing the insertion of the wires W therethrough. A position where the wires (W) are drawn out backward in the retainer main body (52) is closer to a back part of the wire draw-out portion (34) than the wire draw-out opening (34A).

1. Field of the Invention
The invention relates to a connector.
2. Description of the Related Art
Japanese Unexamined Patent Publication No. 2011-60451 discloses a connector with terminals connected to ends of wires and a housing with side-by-side cavities that receive the respective terminals from behind. Adjacent cavities are partitioned by a partition wall extending to the rear end of the housing, and a rubber plug retained by a back retainer is mounted in a rear part of each cavity. The back retainer is mounted into the housing while allowing the insertion of a plurality of wires therethrough. A rear end of the back retainer where the wires are drawn out backward is at the same position as a rear end of the housing.
A space behind the connector may be narrow, such as when a peripheral device is arranged behind and near the connector. Thus, the wires are bent at a large angle with the rear end position of the housing as a bending start position, and loads on the bent wires is large. Each wire may need to be drawn out laterally in the wire arrangement direction. Thus, the wires cannot be bent due to mutual interference and a large bending angle. Accordingly, freedom in arranging the wires may be impaired.
The invention was completed based on the above situation and an object thereof is to improve a degree of freedom in arranging wires while reducing loads on the wires due to bending.

Connector with rubber plug, retainer for retaining rubber plug and a guide formed on a rear part of the retainer for accommodating bending of wires


The present invention discloses a high voltage JFET. The high voltage JFET includes a second conductivity type drift region located on the first conductivity type epitaxial layer; a second conductivity type drain heavily doped region located in the second conductivity type drift region; a drain terminal oxygen region located on the second conductivity type drift region and at a side of the second conductivity type drain heavily doped region; a first conductivity type well region located at a side of the second conductivity type drift region; a second conductivity type source heavily doped region and a first conductivity type gate heavily doped region located on the first conductivity type well region, and a gate source terminal oxygen region; a second conductivity type channel layer located between the second conductivity type source heavily doped region and the second conductivity type drift region; a dielectric layer and a field electrode plate located on the second conductivity type channel layer. Wherein a drain electrode electrically is led out from the second conductivity type drain heavily doped region; a source electrode electrically is led out from a connection of the field electrode plate and the second conductivity type source heavily doped region; and a gate electrode electrically is led out from the first conductivity type gate heavily doped region. The transistor has a high breakdown voltage and easy to be integrated.

Field effect transistors are widely employed to design various simulation circuits, for example, applied to an amplifier circuit, a biasing circuit or a step-down circuit, a starting circuit, or a variable resistance, and so on. As an emerging demand for high voltage devices, how to improve breakdown voltage of various kinds of field effect transistors has become a design target of high voltage field effect transistor.
For MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), a DMOS (Double-diffused MOS) employing a planar diffusion technology is provided with characteristics such as a high current drive capacity, a low on-resistance, and a high breakdown voltage, such that DMOS is widely employed by power devices. Wherein, because LDMOSFET (Lateral Double-diffused MOSFET) is more compatible with CMOS technology, such that DMOS is widely employed. Normally, the DMOS device is provided with a drift region between an active region and an drain region, and a impurity concentration of the drift region is relative low. When the LDMOS is connected to a high voltage, because the drift region has a high impendence, the drift region can withstand a relative high voltage. In addition, the polycrystalline layer or metal layer of the LDMOS extends above an oxygen region of the drift region, and serves as a field electrode plate, thereby weakening a surface electric field of the drift region, and benefiting for improving a breakdown voltage.
For JFET, it is different from the LDMOSFET, the drain electrode voltage of the JFET is applied to the PN junction of the drain electrode and the gate electrode, and the breaking point is normally located within the body, not on the surface. So the breakdown voltage of the JFET cannot be improved either by a filed electrode or by other types. So, the conventional JFET is limited by PN junction, and the breakdown voltage is about 20˜30 volts, thereby limiting an application of JFET in high voltage field.
However, for emerging high voltage semiconductor integrated circuit technology, not only high voltage MOS transistor, but also high voltage JFET having high breakdown voltage and being compatible with CMOS/LDMOS integrated circuit producing technology are required, so as to meet a requirement of chips such as power management chips.

High voltage junction field effect transistor