An improved technique and associated apparatus for timing calibration of a logic device is provided. A calibration test pattern is transferred to a logic device first at a data rate slower than normal operating speed to ensure correct capture of the pattern at the device to be calibrated. Once the pattern is correctly captured and stored, the test pattern is transmitted to the logic device at the normal operating data rate to perform timing calibration. The improved technique and apparatus permits the use of any pattern of bits as a calibration test pattern, programmable by the user or using easily-interchangeable hardware.

Memory devices are constantly evolving in the directions of faster speed and higher memory density. To this end, dynamic random access memory (DRAM) devices have evolved from simple DRAM devices to EDO to SDRAM to DDR SDRAM.
One characteristic of modern memory technology is that it may use both the positive- and negative-going edges of a clock cycle to READ and WRITE data to the memory cells and to receive command data from a memory controller. DDR SDRAM represents one example of a modern memory technology that utilizes both positive- and negative-going edges of a clock cycle.
Because of the required high speed operation of contemporary memory devices, system timing and output signal drive level calibration at start-up or reset is a very important aspect of the operation of such devices to compensate for wide variations in individual device parameters or within the system design itself.
One of the several calibration procedures which is performed in current memory devices is a timing synchronization of a clock signal with data provided on an incoming command/address path and on a data path DQ so that incoming data is correctly sampled and outgoing data is correctly timed. Currently, a memory controller achieves this timing calibration at system initialization (start-up or reset) by sending continuous transitions on the clock path and transmitting a 15 bit repeating pseudo random SYNC sequence "111101011001000" on the READ/WRITE data path DQ and the command/address path. The memory device determines an optimal internal delay for the dock path relative to arriving command/address and data signals to optimally sample the known bit pattern. This optimal delay is achieved by adjusting the timing of the received data bits to achieve a desired bit alignment relative to the clock. This is accomplished by adjusting a relative timing of clock and data signals, for example setting delay values in the clock or data signal paths, until the received data is properly sampled by the clock and recognized internally. Once synchronization has been achieved, that is, the proper timing on the receiving data or clock paths have been set, the memory controller stops sending the SYNC pattern and the memory device, after all calibrations are completed, can be used for normal memory READ and WRITE access.
To perform the above-described calibration operations, each memory device in a current memory system typically contains means for generating the calibration bit pattern internally, independent of the memory controller. During calibration, the data incoming on a data path under calibration is compared to the internally-generated calibration pattern at each memory device. Internal generation of the calibration bit pattern requires that each memory device contain the additional circuitry needed for pattern generation. For example, each memory device may include the four-bit shift register circuit illustrated in FIG. 6. Because of circuit die size constraints, it would be preferable to simplify the circuitry by avoiding the requirement of generating the calibration bit pattern at every memory device.
While the timing calibration described above, which is conducted at start-up and reset, has been found to perform adequately in most circumstances, there is a problem in that as the data rate of memory devices is increased, the timing margin for data capture is decreased. The timing margin for data capture is the amount of time that valid data is available on the bus or at a device for use during system operations after practical system effects are introduced. For example, for a data transfer rate of 1 GHz (1×109 Hz), the maximum possible data valid time is only 1 ns (1×10−9 seconds). When practical system effects are introduced, such as accounting for device setup and hold, the timing margin for data capture is even less, for example, a timing margin of less than 100 ps (100×10−12 seconds) is typical.
This timing margin can be increased by precisely calibrating and aligning the received data with the data capture clock. Improved calibration techniques can reduce the total data arrival time uncertainty that must be accounted for from a theoretical maximum to the actual timing uncertainty observed at the device under actual operating conditions. This reduction in uncertainty results in a corresponding decrease in the timing budget allocated to uncertainty and thus an increase in the timing margin for data capture.
One area in which calibration and alignment with the data capture clock may be improved is in the bit composition of the calibration test pattern. Current systems customarily use a single calibration bit pattern for all calibration operations. Because the same calibration bit pattern may be used for multiple circuit configurations, the bit pattern is designed to test a variety of circuit conditions, although the exact conditions to be encountered are largely unknown at the time of circuit design. The bit pattern may be selected to test a variety of circuit characteristics that affect timing, including static layout length differences, input path delay differences, intersymbol interference, and simultaneously switching outputs.
Moreover, the calibration bit pattern currently in use, for example the 15-bit pseudo random pattern, may not perform optimally for modern high performance memory systems. Because current memory devices capture incoming data on both positive and negative going transitions of the clock signal, even when timing calibration is achieved it may not be clear if alignment was achieved on a positive going or negative going clock edge. That is, the 15-bit synchronization pattern lacks any timing signature. If, for example, synchronization was achieved on the negative going edge of a clock signal when the circuitry is designed on the assumption that synchronization is achieved on a positive going edge, when data is later sampled during memory access the data sampling may be off by one bit. Thus, calibration may be achieved in the wrong phase of the clock signal, leading to incorrect sampling of the data during memory access operations, or requiring additional complicated circuitry to ensure that incoming data is synchronized to the proper phase of the clock.
Therefore, there is a need and desire for an improved calibration technique implementable in logic using simplified circuitry that is capable of compensating for a variety of circuit characteristics that may affect timing.

This patent is subject to a terminal disclaimer.

Method of timing calibration using slower data rate pattern


A probing system for integrated circuit device, which transmits testing data/signal between an automatic test equipment (ATE) and an integrated circuit device, is disclosed. The probing system comprising a test head having a first transceiving module; a test station having a test unit couple to the test head to perform test operation; a communication module having a second transceiving module configured to exchange data with the first transceiving module; an integrated circuit device having at least one core circuit being tested; and at least one test module having a self-test circuit couple to the core circuit and the communication module for performing the core circuit self-testing.

1. Field of the Invention
The present invention relates to a probing system for integrated circuit device.
2. Background
Generally speaking, after an integrated circuit device is manufactured, a testing process is performed to check the electrical properties of the integrated circuit device. The integrated circuit devices that meet the specifications of the electrical properties are selected for the subsequent process, while others that do not meet the specifications are discarded to cut the cost.
The conventional automatic test equipment (ATE) uses probe tips on a probe card to contact signal pads on a device under test (DUT) so as to form a path for transmitting the probing signal from the ATE to the DUT and transmitting the tested electrical parameters from the DUT to the ATE. However, the operation speed of the integrated circuit device such as the transistor increases continuously as semiconductor fabrication technology improves. The conventional technique uses the probe tip to mechanically probe the DUT and therefore its overall time accuracy (OTA) cannot catch up with the DUT with a highly improved operation speed. Consequently, the conventional ATE obviously cannot be used to probe the electrical property of the high-speed integrated circuit device in the future.

Probing system for integrated circuit device


The present invention relates to an SOI substrate as a mask substrate for the charged particle beam exposure of which a silicon oxidized film has a suitable thickness for the fabrication of a mask, a silicon membrane layer has a suitable thickness as a mask membrane and is a low stress membrane having no defects and excellent uniformity and relates to its forming method. The SOI substrate is an SOI wafer which is obtained by forming an oxidized film on a first silicon wafer, forming a separation layer by hydrogen ion implantation into the first silicon wafer via the oxidized film, bonding the first silicon wafer onto a second silicon wafer, and cleaving the first silicon wafer from the second silicon wafer at the separation layer so that a silicon membrane layer is formed on the second silicon layer via the oxidized film. The method of forming the SOI wafer is characterized by comprising a step of causing epitaxial growth of silicon to form a silicon membrane layer on said silicon membrane layer simultaneously with doping either or both of boron and phosphorus.

The present invention relates to a method of forming a mask for use in the lithography for manufacturing semiconductor devices and, more particularly, to a mask for the charged particle beam exposure which transcribes a mask pattern onto a wafer using charged particle beams such as electron beams and ion beams and to a method for forming the same.
With miniaturization and increase in integration of semiconductor elements in semiconductor integrated circuits, an electron-beam projection lithography for transcribing a predetermined configuration onto a wafer using charged particle beams, especially using electron beams, was developed instead of the conventional photolithography using light beam. Recently, the development of EPL (Electron-beam Projection Lithography) method achieving higher throughput has advanced. As an electron-beam projection lithography, there is a method in which a prescribed mask pattern is divided into a plurality of sections, stencil masks formed with opening patterns each having a predetermined size and a predetermined arrangement are prepared, and electron beams are incident on the sections so that electron beams thus formed by the opening patterns are transcribed onto a wafer as a subject substrate on some reduced scale. There has been developed a system for forming a device pattern by combining prescribed patterns separately formed on the mask onto the subject substrate (for example, see Patent Document 1).
An example of a mask used for the aforementioned electron-beam projection lithography is shown in FIGS. 8(a), 8(b). Shown in FIGS. 8(a), 8(b) is an example of a mask 70 used for the electron-beam exposure using a wafer substrate of 8 inches. FIG. 8(a) is an entire view of the mask having two pattern regions (132.57 mm×54.43 mm) 71. Each of the pattern regions 71 comprises a membrane mask pattern 72 and a strut 73 (0.17 mm in width).
The membrane mask pattern 72 is a pattern with through-holes for transmitting electron beams which are formed in a silicon membrane. Since the membrane mask pattern 72 is quite thin, a pattern region is divided and reinforced by a supporting grillage, referred to as "strut" 73 (0.17 mm in width), from the back so as to reinforce the membrane mask pattern 72, thereby reducing the distortion of the pattern region and improving the accuracy of position of the pattern region. FIG. 8(b) is a partial enlarged schematic view of FIG. 8(a). The membrane mask pattern 72 is formed in interstices of the strut 73.
Therefore, the quality and characteristics of the silicon membrane are important for the purpose of forming a mask for the charged particle beam exposure of high quality and high accuracy.
Since the silicon of the membrane side and the silicon of the strut side are subjected to etching in separate processes, an etching stop layer having a predetermined thickness is required between the silicon of the membrane side and the silicon of the strut side in the mask substrate during fabrication of the mask. Generally used as such etching stop layer is a silicon oxidized film.
As for the mask substrate for forming the aforementioned mask for the charged particle beam exposure, there is a method using an SOI (Silicon On Insulator) substrate in which a silicon membrane is formed via a silicon oxidized film on a silicon wafer and a method using a substrate on which a silicon membrane is formed by sputtering via a metallic layer on a silicon wafer.
SOI substrate is reliable because SOI substrates have been practically employed as semiconductor circuit substrates for LSI and a silicon membrane as an upper layer for fabrication of pattern possesses higher reliability in quality because the silicon membrane is single crystal and is formed with zero defects.
As the manufacturing method of SOI substrate, there are two practical methods such as a bonding method and an implanting method. There are some kinds of SOI substrates corresponding to these manufacturing methods. Some SOI substrates have been studied as mask substrates for forming masks used for the charged particle beam exposure.
As the bonding method, for example, a silicon substrate (referred to as "base wafer") as a support substrate is subjected to thermal oxidation, a different silicon substrate (referred to as "bond wafer") used for forming a silicon membrane layer is bonded to the base wafer, and the bond wafer is subjected to lapping and polishing whereby a significant amount of thickness is reduced, thereby forming a wafer substrate as the silicon membrane layer (for example, see Patent Document 1).
Examples of substrate according to another bonding method include a Smart Cut wafer substrate in which a thermal-oxidized wafer (bond wafer) subjected to hydrogen ion implantation is bonded to a base wafer, and an ELTRAN (Epitaxial Layer Transfer) wafer substrate in which a wafer (bond wafer) having an epitaxial layer formed thereon is bonded to a base wafer.
As an example of substrate according to the implanting method, there is an SIMOX (Separation by Implanted Oxygen) wafer substrate in which the wafer substrate is subjected to oxygen ion implantation so as to form an implanted silicon oxidized film.
However, in a mask for the charged particle beam exposure employing the SOI substrate according to the method described in Patent Document 2, the silicon membrane layer bonded on the wafer substrate is subjected to lapping and polishing so as to have a reduced thickness. Therefore, larger variation in thickness of substrate should be caused. While the desired thickness is on the order of 2 μm, there may be differences about ±0.5 μm. Accordingly, the SOI substrate has a problem that it is not suitable for practical use for masks of high accuracy. Though there is a method called PACE (Plasma Assisted Chemical Etching) as a lapping and polishing technology which can improve the distribution in thickness to ±0.1 μm, this method provide poor productivity. For example, in case of processing an SOI substrate of 200 mm in diameter to remove 3.8 μm with accuracy of ±0.1 μm, the PACE process should be conducted three times so that one hour or more is taken for one substrate.
On the other hand, as for the mask for the charged particle beam exposure employing the SOI substrate according to the other method, for example, in case of a SIMOX (Separation by Implanted Oxygen) wafer substrate in which the wafer substrate is subjected to oxygen ion implantation so as to form an implanted silicon oxidized film, the silicon oxidized film is very thin such as 0.14 μm or less. This is insufficient, as an etching stop layer during the fabrication of mask. Further, the silicon membrane layer to be a membrane is also thin such as 0.25 μm or less. A mask for the charged particle beam exposure formed using the SOI substrate has a problem that the strength of the membrane is insufficient as the mask pattern. As for the Smart Cut wafer substrate in which a thermal-oxidized wafer (bond wafer) subjected to hydrogen ion implantation is bonded to a base wafer, the silicon membrane layer to be a membrane is thin such as 0.4 μm or less. A mask for the charged particle beam exposure formed using the SOI substrate has a problem that the strength of the membrane is insufficient as the mask pattern. In the ELTRAN (Epitaxial Layer Transfer) wafer substrate in which a wafer (bond wafer) having an epitaxial layer formed thereon is bonded to a base wafer, the silicon oxidized film and the silicon membrane layer can be formed to have desired thicknesses. However, the mask for the charged particle beam exposure formed by employing this substrate has a problem of large distortion of the mask pattern due to the compressive stress (300–400 MPa in case that the thickness of SiO2 is 1 μm) of the silicon oxidized film. As one of improvement measures, there is a method of imparting tensile stress to the silicon membrane by doping impurity ion such as boron or phosphorus of which atom radius is smaller than that of silicon into the silicon membrane by ion implantation in order to reduce the stress during the formation of mask pattern. However, since the required amount to be doped is too much such as 1×1018 atoms/cm3, it takes too much time to obtain the desired doping amount by the ion implantation. This means there is a problem that it is difficult to commercially achieve practical use.
On the other hand, a method of forming a mask for the charged particle beam exposure in which a silicon membrane is formed by way of sputtering has an advantage that the etching selectivity is improved because metal can be used as an etching stop layer (for example, see non patent document 1).
However, the structure of the silicon membrane formed by way of sputtering is in amorphous state and the silicon membrane is therefore not dense. If abnormal particles of silicon are generated, defects are produced. Accordingly, it is difficult to form a silicon membrane layer without defects and having uniform thickness. Thus, there is a problem that it is hard to obtain a high quality mask using a mask blank prepared by this forming method. In addition, since electrons are scattered at boundaries crystal particles in amorphous silicon, heat may be stored in the obtained mask. Therefore, there is an essential problem that the heat deformation of the mask is inevitable during the electron-beam exposure projection.
[Patent Document 1]
Japanese Patent No. 2829942
[Patent Document 2]
Japanese Patent No. 2725319
[Non-patent Document 1]
Abstracts of The 46th International Conference on Electron, Ion and Photon Beam Technology and Nanofabrication, p401, "Fabrication of complete 8" stencil mask for electron projection lithography".

Mask for charged particle beam exposure, and method of forming the same


A method and apparatus to convert absolute angular or linear position to digital information utilizes a ternary coding scheme. The code is arranged along a single track. Sensors placed at essentially equal intervals distinguish three states per position. The sensor outputs are converted from ternary to binary data by combinatorial logic. The sensors may be mechanical contacts, optical detectors, magnetic detectors, or capacitive detectors. Such an encoder may be used as a potentiometer, multiposition switch replacement, shaft encoder, or length measurement device.

Presently, a number of schemes exist to convert angular or linear mechanical position to a digital output. The most simple converters are potentiometers, which convert position to an output voltage by acting as a resistive divider. Their analog output can then be converted to a digital format, if required. In a case calling for an output signal that consists of discrete steps, a multiposition switch is the present choice.
With the advance of microprocessor-based equipment, digital incremental encoders have emerged. They typically employ a single track and two sensors arranged to produce a pair of square wave patterns with a 90.degree. phase shift. An up/down counter is connected to the sensor outputs to deliver position information. If a second track bearing an index marker is provided, the counter can be reset when the index position is sensed. Thus a quasi-absolute scheme results, in that accurate position information can be provided so long as power remains on, but after a power-up condition the position information is not accurate until a relative position is reached in which the index marker resets the counter.
Where true absolute information is required, for example where accurate position information is needed following a power-on condition without relative movement of the encoder parts, multitrack encoders are the most common choice. They typically feature a number of tracks equivalent to the .sup.2 log of the number of steps to be resolved, for example 8 tracks for a 256 step encoder. The aforementioned encoders most commonly utilize an optical scheme with a photographically fabricated coding wheel bearing a Gray code and LED/phototransistor combinations as detectors.
Since each track of a multitrack encoder contributes to the diameter of the device, it would be desirable, if possible, to reduce the number of tracks on the encoder without producing a corresponding reduction in the encoder's resolution. Although attempts have been made to design a Gray-coded absolute encoder that uses only a single track, these attempts have produced very inefficient encoders that utilize only a portion of the available output codes. For an n-sensor, binary, single-track (absolute) encoder, the best resolution that has heretofore been obtained is 4n (i.e., the number of output codes is equal to four times the number of sensors). See U.S. Pat. No. 5,029,304 to Tolmie, Jr., et. al. For a 5-sensor (or equivalently, five digit) binary encoder, for example, an encoder in accordance with the prior art would have a resolution of 4.times.5=20, and would thus utilize only 20 of the 2.sup.n =2.sup.5 =32 available output codes. This inefficiency becomes even more apparent as the number of sensors is increased. For a seven sensor binary encoder, for example, only 4.times.7=28 of the 2.sup.7 =128 output codes would be used.
This inefficiency in existing single track Gray-coded absolute encoders translates into unnecessary hardware. For example, for an application that requires a 128 position encoder, a single track binary encoder in accordance with the prior art would have 128/4=32 sensors and output lines, in comparison with 7 sensors and output lines for a conventional multitrack encoder. Thus, multitrack encoders remain as the preferred choice over single-track encoders, especially where high resolutions (e.g., 60 or more positions) are required.
Other principles worth mentioning are inductive or capacitive resolvers. Both schemes are by nature analog; their two or three phase outputs can be digitized and the rotary angle computed from the respective signal amplitudes. Synchro resolvers are a good example of a three-phase inductive rotary encoder. An application for a linear encoder is found in digital calipers.
One object of the invention is to provide an encoding principle which can yield a digitized absolute angular or linear position.
Another object of the invention is to produce a single track Gray-coded encoder having a resolution that approaches or is equal to the resolution of a mutitrack encoder, without a corresponding increase in the number of sensors.
Another object of the invention is to provide a single track encoder design that can be implemented using binary, ternary and quaternary sensing techniques.


A method for quantizing phase information on an electronic device is described. The method includes obtaining a speech signal. The method also includes determining a prototype pitch period signal based on the speech signal and transforming the prototype pitch period signal into a first frequency-domain signal. The method additionally includes mapping the first frequency-domain signal into a plurality of subbands. The method also includes determining a global alignment based on the first frequency-domain signal and quantizing the global alignment utilizing scalar quantization to obtain a quantized global alignment. The method additionally includes determining a plurality of band alignments corresponding to the plurality of subbands. The method also includes quantizing the plurality of band alignments utilizing vector quantization to obtain a quantized plurality of band alignments. The method further includes transmitting the quantized global alignment and the quantized plurality of band alignments.

In the last several decades, the use of electronic devices has become common. In particular, advances in electronic technology have reduced the cost of increasingly complex and useful electronic devices. Cost reduction and consumer demand have proliferated the use of electronic devices such that they are practically ubiquitous in modern society. As the use of electronic devices has expanded, so has the demand for new and improved features of electronic devices. More specifically, electronic devices that perform new functions and/or that perform functions faster, more efficiently or with higher quality are often sought after.
Some electronic devices (e.g., cellular phones, smartphones, audio recorders, camcorders, computers, etc.) utilize audio signals. These electronic devices may encode, store and/or transmit the audio signals. For example, a smartphone may obtain, encode and transmit a speech signal for a phone call, while another smartphone may receive and decode the speech signal.
However, particular challenges arise in encoding, transmitting and decoding of audio signals. For example, an audio signal may be encoded in order to reduce the amount of bandwidth required to transmit the audio signal. Inefficient encoding can utilize more bandwidth than is needed to accurately represent an audio signal. As can be observed from this discussion, systems and methods that improve encoding and decoding may be beneficial.

Systems and methods for quantizing and dequantizing phase information


A suspension including a load beam, a flex gimbal, and a displacement limiter. The load beam includes a distal end having a dimple extending downwardly therefrom and an aperture. The flex gimbal includes a base dielectric layer and a plurality of electrical conductors coupled to the dielectric layer. The dielectric layer includes a top side that is attached to a bottom side load beam at a first location. The displacement limiter is attached to the dielectric layer and includes a limiter member having a first portion extending through the aperture of the load beam and a second portion extending over a top surface of the load beam. Displacement of the flex gimbal relative to the load beam is limited by the second limiter portion.

Disc drives are the primary devices employed for mass storage of computer programs and data used in computer systems. Contemporary disc drives use rigid discs, which are coated with a magnetizable medium for storage of digital information in a plurality of circular, concentric data tracks. The discs are mounted on a spindle motor, which causes the discs to spin and the surfaces of the discs to pass under respective bearing disc head sliders. The sliders carry transducers, which write information to and read information from the disc surfaces. The combination of the slider and the read/write transducer is also known as a read/write head (hereinafter "head"). An actuator mechanism moves the heads from track-to-track across the surfaces of the discs under control of electronic circuitry. The actuator mechanism includes track accessing arms and suspensions for supporting the heads.
Head suspensions typically include a load beam, a gimbal that supports the head, and a flex circuit providing an electrical connection to the read/write transducer of the head. The gimbal is typically an etched gimbal ring that is welded to the load beam. The flex circuit is generally routed over or adjacent to the gimbal and the head. During operation, the load beam applies a downwardly directed load force to the head at a load point. As the disc rotates, air is dragged and compressed under bearing surfaces of the head creating a hydrodynamic lifting force that counteracts the load force and causes the head to lift and fly on an air bearing in close proximity to the disc surface. The gimbal includes flexure features that allow the head to pitch and roll over the load point while following the topography of the disc. The air bearing maintains spacing between the transducer and the disc surface, which reduces transducer efficiency. However, the avoidance of direct contact with the disc surface vastly improves the reliability and useful life of the head and disc components.
The disc drive industry has been progressively decreasing the size and mass of the slider structures in order to reduce the moving mass of the actuator assembly and to permit closer operation of the transducer to the disc surface. The former giving rise to faster data access and the latter giving rise to improved transducer efficiency that can be traded for higher data storage capacity. The size (and mass) of a slider is usually characterized with reference to a so-called standard 100% slider, known as a mini-slider. The term 70%, 50% and 30% slider are respectively known as a micro-slider, a nano-slider, and a pico slider, which are more recent low mass sliders that have linear dimensions that are scaled by the applicable percentage relative to the linear dimensions of a standard mini-slider.
Although smaller, low mass heads can provide both performance and economic advantages, the reductions in physical slider dimensions give rise to numerous problems that do not necessarily scale linearly with the dimensional changes. If, for example, the size and load force on the slider was simply halved, the air bearing stiffness in the pitch direction will be reduced on the order of one-eighth. Accordingly, the flexure features of the gimbal must have sufficient compliance to allow the slider adequate freedom to pitch and roll in order to maintain the trailing edge of the slider where the transducer is located at the desired distance from the rotating disc surface. Failure to do so, can lead to signal modulation, data loss, or even catastrophic failure of the head or disc components. Accordingly, suspensions designed for use with pico-sliders must include gimbals having highly compliant flexure features.
The conventional steel gimbal described above is generally too stiff to provide the desired compliance for operation with pico sliders. Gimbals having highly compliant flexure features are being developed. Unfortunately, such highly compliant gimbals and the heads they support become more susceptible to damage caused by large vertical displacement in response to a shock event.
Shock events can occur due to forces applied during assembly, fly testing, shipping, and handling of the suspension, or during use of the disc drive. For example, a transportation shock may generate displacement forces large enough to cause the delicate flexure features of the gimbal to bend past their yield point, which may result in a separation between the load beam and the head at the load point. Also, certain disc drives have a ramp which lifts the load beam to unload the slider from the disc surface during start and stop of disc rotation. If the slider is a self-loading slider, sub-ambient pressure developed between the slider and the disc surface can cause a large vertical displacement of the gimbal as the slider is lifted from the disc surface. Additionally, shock events that occur while the suspension is supported by the ramp, can also cause potentially damaging displacement of the head relative to the load beam.
Embodiments of the present invention provide solutions to these and other problems, and offer other advantages over the prior art.

Head suspension having a displacement limiter


An optical measurement device is provided with: a light source that irradiates, with light, a measurement object which has a fluid flowing thereinside; a light receiving unit which, upon receipt of scattered light from the measurement object irradiated with light, outputs a light reception signal according to the intensity of the scattered light; a disturbance generation unit which generates a disturbance signal for causing oscillation of a drive current to be supplied to the light source; and an adjustment unit which adjust the drive current on the basis of the result of a comparison between the disturbance signal and a signal generated on the basis of the light reception signal.

This type of apparatus is designed, for example, to prevent a change in properties of light emitted from a light source. For example, Patent Literature 1 discloses a technology/technique of stabilizing an oscillation wavelength of a laser diode (LD) by detecting the oscillation wavelength of the LD with an etalon, which is a wavelength discrimination device, and by controlling a LD drive current and a LD temperature. Alternatively, Patent Literature 2 discloses a technology/technique of stabilizing the oscillation wavelength of the LD by detecting the oscillation wavelength of the LD with a spectroscope that uses absorption spectra of molecules or atoms, and by controlling the LD drive current and the LD temperature. Moreover, Patent Literature 3 discloses a technology/technique of removing a random mode hop of the oscillation wavelength by superimposing an alternating current on a direct current supplied to the laser diode.

Optical measurement apparatus, optical measurement method, computer program, and recording medium


A microscope apparatus includes a monitoring optical system, an imaging unit capturing an image of an observation target through the monitoring optical system to generate a plurality of images, a correction unit disposed in the optical monitoring system and correcting various aberrations which occur due to an observation condition, and a decision unit deciding a correction amount of the correction unit based on the plurality of images generated by the imaging unit, whereby an image deterioration ascribable to the aberration occurring due to the observation condition in the microscope apparatus is appropriately and easily corrected according to a use condition of the microscope apparatus.

1. Field
The present application relates to a microscope apparatus including a monitoring optical system and to a storage medium storing a microscope apparatus control program for causing a computer to realize a control over the microscope apparatus.
2. Description of the Related Art
In recent years, in an observation apparatus such as a microscope, the acquisition of high-resolution images by using a high NA objective lens has become active. In order to thus acquire the high-resolution image, it is required to obtain an image without deterioration of image quality ascribable to aberration that occurs due to an observation condition such as the thickness of a cover glass and a change in refractive index of an immersion liquid due to its temperature dependency.
Therefore, in an invention of Japanese Unexamined Patent Application Publication No. 2005-31507, based on the distance between a sample being an observation target disposed in a microscope and an objective lens that the microscope has, a correction amount for optical aberration ascribable to the thickness of a cover glass protecting the sample or ascribable to the thickness of a holding member such as a transmissive petri dish holding the sample is decided, and according to the decided correction amount, a rotation angle of a correction collar is decided, whereby the aberration is corrected.
However, in the invention of the above Japanese Unexamined Patent Application Publication No. 2005-31507, since a change in refractive index of an immersion liquid due to its temperature dependency and the like are not taken into consideration, the decided correction amount is not sometimes appropriate.

Microscope apparatus and storage medium storing microscope apparatus control program


Substituted heterocyclinc compounds are disclosed. The compounds are useful for treating multidrug resistance. The compounds can be formulated in compositions with a carrier and, optionally, a therapeutic agent. One suitable substituted heterocyclic compound has the formula:

"Drug resistance" means a circumstance when a disease (e.g., cancer) does not respond to a therapeutic agent. Drug resistance can be intrinsic, which means that the disease has never been responsive to the therapeutic agent, or acquired, which means that the disease ceases responding to the agent or agents to which the disease had previously been responsive. "Multidrug resistance" is a type of drug resistance wherein a disease is resistant to a variety of drugs that can be functionally unrelated, structurally unrelated, or both. Multidrug resistance is a problem associated with cancer and other conditions, such as bacterial, viral, protozoal, and fungal diseases.
One cause of multidrug resistance in cancer patients is that many cancer cells express high levels of the transmembrane transport proteins, such as Pleiotropic-glycoprotein (also known as Pgp, P-glycoprotein, gp-170, or MDR1) and MRP1 (see Borst, P., "Multidrug resistance: A solvable problem?" Annals of Oncology, 10, suppl. 4, pp. S162–S164 (1999)). In adenosine-triphosphate driven processes, these transport proteins export hydrophobic compounds (such as vinblastine, daunorubicin, doxorubicin, etoposide, vincristine, and TAXOL®, which are cytotoxic drugs useful for treating cancer) from the cell in an effort to protect the cell from harm. The transport proteins remove the compounds from the cell prior to their having a lethal effect on the cell (see Legrand, et. al, "Simultaneous Activity of MRP1 and Pgp Is Correlated With In Vitro Resistance to Daunorubicin and With In Vivo Resistance in Adult Acute Myeloid Leukemia", Blood, Vol. 94, No. 3, pp. 1046–1056 (1999); and Zhu, B. T.; "A Novel Hypothesis for the Mechanism of Action of P-glycoprotein as a Multidrug Transporter," Molecular Carcinogenesis 25, pp. 1–14 (1999)). Although it is not currently known which of these two classes of proteins is more important for multidrug resistance, and indeed it may be that the class (or classes) of protein which is important depends on the type of cancer and the particular drug or drugs used to treat the cancer, Pgp is known to be highly expressed in approximately 50% of human cancers which require drug therapy. Consequently, Pgp is believed to be a major cause of multidrug resistance.
Other types of multidrug resistance, such as antibacterial, antiviral, and antifungal multidrug resistance may also be caused by the action of transport proteins that are similar to Pgp, and others (see "Annual Reports on Medicinal Chemistry—33; Section III Cancer and Infectious Diseases" ed. Plattner, J., Academic Press, Ch. 12, pp. 121–130 (1998)).
Furthermore, Pgp is also expressed at high levels in the gastrointestinal tract, liver, kidneys, and brain, and therefore Pgp represents a major pharmacological barrier to the bioavailability of many drugs (see Amudkar, et. al in "Biochemical, Cellular, and Pharmacological Aspects of the Multidrug Transporter," Annu. Rev. Pharmacol. Toxicol., 39, pp. 361–398 (1999)). For example, the oral bioavailability of many nutrients and drugs is negatively affected by the action of Pgp present in the gastrointestinal tract. "Oral bioavailability" means the ability of a drug or nutrient that is administered orally to be transported across the gastrointestinal tract and enter into the bloodstream. In addition, penetration of many drugs through the blood-brain barrier is adversely affected by Pgp.

Substituted heterocyclic compounds for treating multidrug resistance

H. Lee Moffitt Cancer Center & Research Institute, Inc.


According to one embodiment, a control circuit for an inkjet head or the like includes an input circuit configured to receive drive information for driving liquid ejection from a plurality of nozzle arrays. The drive information includes a drive signal value to be supplied to a channel of the plurality of nozzle arrays. A latch circuit array of the control circuit has latch circuits for storing the drive information for each array in the plurality of nozzle arrays. A setting register is configured to receive a setting value to configure the input circuit to correspond to a connection mode for the plurality of latch circuits. The setting value corresponds to the number of arrays in the plurality of nozzle arrays.

A liquid discharge head can include nozzle arrays that discharge ink or the like. In such a liquid discharge head, generally, a control circuit (also referred to as a head drive circuit) sequentially transmits print data corresponding to an image to printed to each nozzle array via an internal shift register. The shift register is configured to store the print data for each nozzle array.
In related art, it is required to change the configuration of the control circuit if the number of nozzle arrays to be included in a liquid discharge head design changes. It would be desirable to provide a control circuit that can accommodate designs with different number of nozzles arrays.


Embodiments of the present invention provide a film stack and method for depositing an adhesive layer for a low dielectric constant bulk layer without the need for an initiation layer. A film stack for use in a semiconductor device comprises of a dual layer low-K dielectric deposited directly on an underlying layer. The dual low-K dielectric consists of an adhesive layer deposited without a carbon free initiation layer.

1. Field of the Invention
The present invention relates to the fabrication of integrated circuits. More particularly, the invention relates to a process for depositing dielectric layers on a substrate.
2. Background of the Invention
One of the primary steps in the fabrication of modern semiconductor devices is the formation of metal and dielectric films on a substrate by chemical reaction of gases. Such deposition processes are referred to as chemical vapor deposition or CVD. Conventional thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions take place to produce a desired film. The high temperatures at which some thermal CVD processes operate can damage device structures having layers previously formed on the substrate. A preferred method of depositing metal and dielectric films at relatively low temperatures is plasma-enhanced CVD (PECVD) techniques such as described in U.S. Pat. No. 5,362,526, entitled "Plasma-Enhanced CVD Process Using TEOS for Depositing Silicon Oxide". Plasma-enhanced CVD techniques promote excitation and/or disassociation of the reactant gases by the application of energy, commonly radio frequency (RF) energy, to a reaction zone near the substrate surface, thereby creating plasma of highly reactive species. The high reactivity of the species reduces the energy required for a chemical reaction to take place, and thus lowers the required temperature for such PECVD processes.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices that will fit on a chip doubles every two years. Today's fabrication plants are routinely producing devices having 0.35 μm and even 0.25 μm feature sizes, and tomorrow's semiconductor manufacturing facilities currently produce devices having even smaller geometries.
As devices geometries become smaller, liner layers and capping layers having relatively high dielectric constants contribute more to the overall dielectric constant of a multi-component dielectric layer. Additionally, the smaller device geometries result in an increase in parasitic capacitance between devices. Parasitic capacitance between metal interconnects on the same or adjacent layers on a device can result in crosstalk between the metal lines or interconnects and/or create resistance-capacitance (RC) delay, thereby reducing the response time of the device and degrading the overall performance of the device. The effects of parasitic capacitance between metal interconnects on the same or adjacent layers in the circuit is especially of concern as the current state of the art circuits can employ 4 to 5 levels of interconnection, while advanced devices require 6, 7, or possibly 8 levels of interconnection.
Lowering the parasitic capacitance between metal interconnects separated by dielectric material can be accomplished by increasing the thickness of the dielectric material, by lowering the dielectric constant of the dielectric material, or both. Increasing the thickness of the dielectric materials, however, does not address parasitic capacitance within the same metalized layer or plane. As a result, to reduce the parasitic capacitance between metal interconnects on the same or adjacent layers, one must change the material used between the metal lines or interconnects to a material having a lower dielectric constant than that of the materials currently used, i.e., K≈3.0.
Therefore, as the size of the semiconductor devices are reduced, an ultra low-K dielectric material is required for the interconnect structure. One integration challenge has been the adhesion strength between low-K dielectric materials and surface on which they are formed. Bad adhesion can cause several reliability issues, including electro migration (EM) failure, chip package interaction (CPI) failure, etc. One solution used to improve the adhesion of the low-K dielectric material is to implement an adhesion layer before the main bulk film deposition of the low or ultra K layer.
FIG. 1 illustrates a schematic diagram of a conventional low-K dielectric layer deposited on a substrate by the processes known in the art. The diagram shows an adhesive layer 50 disposed on an underlying layer 20. The adhesive layer 50 provides a bond between the bulk layer 40 and the underlying layer 20. The adhesion layer 50 is composed of a carbon-free oxide initiation layer 10 followed by a transition layer 30 with increasing carbon content steadily between the initiation layer 10 and bulk layer 40. However, if the thickness 55 of an adhesion layer 50 is too great, it will cause an unacceptable increase in the K value, especially at advanced node (<20 nm).
Referring to FIG. 1, the PECVD initiation layer 10 is deposited by the plasma enhanced reaction of a film containing carbon free silicon and oxide, one such compound is silica (SiO2). A transition or graded layer 30 is then deposited on the initiation layer 10 by the plasma enhanced reaction of gases containing silicon, carbon and oxygen, and the concentration of the carbon containing gas is increased as a carbon doped film layer is formed to the full thickness 55 of the adhesion layer 50. The full thickness 55 of the adhesion layer 50 is approximately greater than 350 Å (angstroms×10−10). A four point bending technique is used to measure fracture energy by applying a crack driving "force" that is higher than the cracking "resistance" of the weakest layer in the thin film stack. The fracture energy measured for the conventional low-K dielectric layer deposited on the substrate of FIG. 1 is approximately 6.2 J/m2. This fracture energy indicates a good adhesion but the adhesion layer 50 has a large thickness without even considering the remaining thickness of the low-K dielectric layer.
The key for successful low-K integration is to maintain a strong adhesion while maintaining a minimum thickness 55 of the adhesion layer 50 at the advanced node. Therefore, there remains a need for thin dielectric layers (<150 Å) having dielectric constants below 2.5 that also have good adhesion properties.

Adhesion layer to minimize dielectric constant increase with good adhesion strength in a PECVD process


A press molding device, which has a die 2, a punch 3 and a cushion ring constituted by a first cushion ring 5 and a second cushion ring 6, is characterized in that the first cushion ring 5 is disposed around the punch 3, the punch 3 has a void 3c which houses the second cushion ring 6, and the second cushion ring 6 is housed in the void 3c of the punch 3 and has a reinforcing structure 50 maintaining posture of the second cushion ring 6.

Conventionally, there is well known a press molding device for drawing process having a die, a punch and a cushion ring that a work piece is pressed to the punch facing the die while the work piece is pinched by the die and the cushion ring so as to perform molding process. For instance, an example of the device is described in the Japanese Patent Laid Open Gazette 2002-86219.
Such a press molding device may have plural cushion rings. For example, a press molding device shown in FIG. 11 comprises a die 102 which is an upper mold, a punch 103 facing the die 102, a lower mold 104 constructed integrally with the punch 103, a first cushion ring 105 which is a ring-shaped member arranged around the punch 103, and a second cushion ring 106 arranged at the inner peripheral side of the first cushion ring 105.
Then, at the time that the die 102 is moved downward so as to perform molding, a work piece W interposed between the die 102 and the punch 103 is pinched by a pressure surface 102a of the die 102, a pressure surface 105a of the first cushion ring 105 and a pressure surface 106a of the second cushion ring 106 so as to prevent crease and crack of the work piece W.
At the time of molding by the above-mentioned press molding device, the die 102 is moved downward and the work piece W is pinched by the pressure surface 102a of the die 102, the pressure surface 105a of the first cushion ring 105 and the pressure surface 106a of the second cushion ring 106, and then the die 102 is moved downward further so that the work piece W is pressed to the punch 103 and is deformed, whereby the work piece W is processed to be molded. The work piece W is pinched completely by the punch 103 and the die 102 so as to finish the processing.
In the case that the work piece W is pressed to the punch 103 to be molded, the contact area between the inner second cushion ring 106 and the other members is small so that the posture of the second cushion ring 106 is unstable. Then, the regular posture may not be maintained and disorder may occur, thereby causing slant or the like. When the second cushion ring 106 is slanted, abnormal abrasion of the punch 103 and the die 102 and defects of the work piece W after processed such as crease and crack are liable to occur.

Press molding device and press molding method


Devices, methods, and computer-readable media are disclosed describing an adaptive approach for image bracket selection and fusion, e.g., to generate low noise and high dynamic range (HDR) images in a wide variety of capturing conditions. An incoming image stream may be obtained from an image capture device, wherein the incoming image stream comprises a variety of differently-exposed captures, e.g., EV0 images, EV− images, EV+ images, long exposure (or synthetic long exposure) images, EV0/EV− image pairs, etc., which are received according to a particular pattern. When a capture request is received, a set of rules and/or a decision tree may be used to evaluate one or more capture conditions associated with the images from the incoming image stream and determine which two or more images to select for a fusion operation. A noise reduction process may optionally be performed on the selected images before (or after) the registration and fusion operations.

Fusing multiple images of the same captured scene is an effective way of increasing signal-to-noise ratio (SNR) in the resulting fused image. This is particularly important for small and/or thin form factor devices—such as mobile phones, tablets, laptops, wearables, etc.—for which the pixel size of the device's image sensor(s) is often quite small. The smaller pixel size means that there is comparatively less light captured per pixel (i.e., as compared to a full-sized, standalone camera having larger pixel sizes), resulting in more visible noise in captured images—especially in low-light situations.
In image fusion, one of the images to be fused may be designated as the "reference image." The other images that are to be part of the fusion operation may be designated as "candidate images," and the candidate images are registered to the reference image before the fusion operation. The decision of which image in a set of captured images should serve as the reference image may be based on, e.g., an image quality measure (such as sharpness, face quality, noise level, etc.), a capture timing measure (such as the image captured closest in time to a received capture request, e.g., if images are being captured in a streaming fashion), a device condition measurement (such as an image captured with the least amount of device rotation), or any other image condition or set of conditions desired by a given implementation.
A "distance measure" may then be used to determine if the pixels in the candidate images are sufficiently similar to the corresponding pixel in the reference image to be fused. If the distance measure between a given candidate pixel in a candidate image and the corresponding pixel in the reference image is below a distance threshold, e.g., a noise-dependent distance threshold, the candidate pixel is deemed similar, and it may be used to contribute to the fused result for that pixel.
Often, there can be significant capture time differences between the images that are to be fused, and, therefore, the image registration process may not be able to account for local motion within the images, camera shake, and/or rotation between captured images, etc. In these situations, the differences between corresponding pixels in the reference and candidate images may not just be noise—they may instead be differences caused by a failure of the image registration algorithm. For example, a region(s) of the reference image that changes over time across the captured images, e.g., due to object motion or registration errors, may create "ghosting artifacts" in the final fused image. The appearance and characteristics of ghosting artifacts may vary from image to image. For example, a section of the image that has a certain color in the reference image, but has different colors in the other candidate images will, when combined with the candidate images, result in a faded look or a false color region that is potentially noticeable by a viewer of the final fused image. On the other hand, an edge area or a textured area that moves over time across the captured images may, when fused, have visible multi-edges (e.g., double edges, triple edges, etc.), which may also be noticeable in the final fused image. Thus, in some embodiments, avoiding ghosting artifacts may be desirable when fusing multiple image frames for the purpose of noise reduction.
Despite these potential difficulties, in general, by fusing multiple images together, a better quality resultant image may be achieved than may be obtained from a single image capture. The multiple image captures used in a given fusion operation may comprise: multiple images captured with the same exposure (e.g., for the purposes of freezing motion), which will be referred to herein as Still Image Stabilization (SIS); multiple images captured with different exposures (e.g., for the purposes of highlight recovery, as in the case of High Dynamic Range (HDR) imaging); or a combination of multiple images captured with shorter and longer exposures, as may be captured when an image capture device's Optical Image Stabilization (OIS) system is engaged, e.g., for the purposes of estimating the moving pixels from the shorter exposures and estimating the static pixels from the long exposure(s). Moreover, the captured images to be fused can come from, e.g., the same camera, multiple cameras with different image sensor characteristics, or different processing workflows (such as video capture and still image capture).
Thus, what is needed is an approach to adaptively fuse bracketed captures of arbitrary exposures, such that the fused result is optimal, e.g., in a statistical sense, for a given set of capturing conditions.


A light-emitting diode control circuit is provided, that includes: a duration selection circuit for selecting one of a first duration value, a second duration value, a third duration value, or a fourth duration value as a selected duration value based on a selection signal; a control clock generator for generating a control clock signal based on a slow clock signal and the selected duration value; a selection signal generator for generating the selection signal based on the control clock signal; an intensity signal generator for generating a current intensity signal based on a first intensity value, a second intensity value, the control clock signal, and the selection signal; a reference wave generator for generating a reference wave based on a fast clock signal; and a comparator for comparing the current intensity signal and the reference wave to generate a pulse width modulation signal to control the light-emitting diode.

Light-emitting diodes (LEDs) are semiconductor diodes that are designed to emit light of a particular wavelength when properly biased. Currently, LEDs are used in a variety of electronic devices for informational display, aesthetic display, or simply to provide light.
In general operation, an LED is either on (i.e., it is properly biased and is giving off light), or it is off (i.e., it is not properly biased and is off). Thus, when turned on, there is only one real intensity at which an LED can shine—its full intensity.
However, it is possible to create the appearance that the LED is being lit at a lower intensity by very quickly turning the LED on and off at a speed not discernable to the naked eye. The rapid switching of the diode on and off will reduce the total amount of light that the LED emits over a short period of time, making it seem as if the LED is actually emitting light at an intensity lower than the full intensity it would emit were it on continually.
This can be accomplished by generating a control signal for the LED that is rapidly changed from an on value that will bias the LED and turn it on to an off value that will turn the LED off. The exact frequency and duration at which the control signal turns the LED on will determine the perceived intensity of the LED.
This phenomenon can also be used to make it appear as if the LED is moving more gradually from an off state to a fully on state. If an LED is simply turned fully on or fully off, the transition between off and on will be abrupt, which can be displeasing to the eye. But by slowly increasing the amount of time that an LED is turned on over a set duration from constantly off state (i.e., gradually increasing its duty cycle from zero to 100%), the LED can be made to appear as if it is slowly fading from off to its maximum intensity. Likewise, by slowly decreasing the amount of time that an LED is turned on over a set duration from a constantly on state (i.e., gradually decreasing its duty cycle from 100% to zero), the LED can be made to appear as if it is slowly fading from its maximum intensity to off.
In order to accomplish this, however, it is necessary to generate an LED control signal that has a proper shape to appropriately vary the duty cycle of the LED to achieve a desired level of fading. Typically this is done by filling a set of registers with the data required to generate an appropriate LED control signal that will provide the desired duty cycle pattern for the required fading.
However, this approach is inherently limited in that only those fading patterns that are stored in memory can be used. Furthermore, changing fading patterns requires the loading of an entire new fading pattern in the control registers, which takes time and system resources.
It would therefore be desirable to provide a way to automatically vary the duty cycle of an LED in a manner that allows a variety of fading parameters to be easily varied.

Method and circuit for controlling operation of a light-emitting diode


A light emitting and detecting device and a method of manufacturing the same are provided. The method includes forming an insulating layer on a substrate doped with an n-type dopant or a p-type dopant, and removing a portion of the insulating layer to expose a predetermined area of the substrate; forming a doping layer doped with an opposite dopant to the dopant of the substrate by applying a dopant on the exposed area of the substrate and heat treating the substrate to create a light conversion effect in a p-n junction between the substrate and the doping layer; and forming first and second electrodes on the substrate to electrically connect the doping layer. Thus, it is possible to control the diffusion depth of the doping layer with opposite dopant to the substrate in the substrate.

1. Field of the Invention
The present invention relates to a light emitting and/or detecting device and a method of manufacturing the same, and more particularly, to a light emitting and/or detecting device that has a quantum structure and a microcavity formed by diffusion of dopant and oxidation of substrate surface, and a method of manufacturing the same.
2. Description of the Related Art
A logic element, a computing element, and a drive element can be integrated with high density and high reliability on a silicon substrate because silicon is cheap and the integration procedure to materialize a high integrated circuit is much cheaper than that for a compound semiconductor. Thus, most integrated circuits use silicon (Si) as a base material.
Numerous research studies are being carried out on the possibility to manufacture silicon-based light emitting diodes to embody low-priced photoelectron devices. It is experimentally proved that porous silicon and nano-crystal silicon have good light emitting characteristics and research on using these material for the above purposes is currently in progress.
FIG. 1 is a cross-section of a conventional light emitting and detecting device as illustrated in International Publication No. WO 03/067670. Referring to FIG. 1, a conventional light emitting and/or detecting device includes a substrate 11, a doping layer 15 formed on one surface of the substrate 11, and first and second electrodes 17 and 19, respectively, which are electrically connected on the doping layer 15 and formed on the substrate 11. When the doping layer 15 is formed, it is formed using a mask, and a control layer 13 that makes the doping layer 15 ultra-shallow can be further included on one surface of the substrate 11. After the doping layer 15 is formed, the control layer 13 can be selectively removed. The substrate 11 is made of a predetermined amount of semiconductor materials including silicon (Si), for example, Si, SiC, or diamond, and is doped with an n-type dopant or a p-type dopant.
The doping layer 15 is doped with an opposite dopant type to the substrate 11 by injecting a predetermined amount of dopant, for example, boron or phosphorous, to the substrate 11 through an opening of the control layer 13. Meanwhile, the boarder of the doping layer 15 and the substrate 11, i.e. a p-n junction 14, is formed as a quantum well, and in order to show a photoelectric conversion effect by a quantum restriction effect, the doping layer 15 is doped to a wanted ultra-shallow depth. The depth of the doping layer 15 in an ideal light emitting and detecting device is in the range of tens of nanometers.
In order to form the doping layer 15 with such doping depth, an ion implantation process is normally used. Thereafter, a heat treatment process is carried out to induce recrystallization, and to make the dopant injected at this stage diffuse deeply within the substrate 11 to control the doping depth. However, it is difficult to control the doping depth.
To solve the above-mentioned problem, a method of diffusing a dopant into the inner substrate is used in which a thin layer that includes the dopant or the dopant as a thin layer is mounted on a substrate and then a heat treatment is carried out. Layers such as a boro-silicate glass (BSG) layer, a boron silicide or a boron layer can be used as the thin layer. However, in this case, the dopant (boron) is quickly diffused into the substrate to a depth more than 100 nm during the heat treatment process. Even in a ten-minute heat treatment, the dopant is diffused into the substrate to a depth more than 300 nm. Therefore, it is hard to control the speed of the diffusion of a dopant even in a process of manufacturing a light emitting and detecting device by using a diffusion layer.

Light emitting and/or detecting device and method of manufacturing the same


The instant invention pertains to an organopolysiloxane composition for the formation of a cured release film wherein said organopolysiloxane composition cures rapidly under exposure to ultraviolet radiation to form a cured film that tightly adheres to various types of supports or base materials.. The organopolysiloxane composition for the formation of a cured release film of the instant invention is comprised of (A) an organopolysiloxane that contains in each molecule at least 2 higher alkenyl groups as represented by the general formula EQU H.sub.2 C.dbd.CH--(CH.sub.2).sub.n --. wherein n has a value of 2 to 8, (B) an organopolysiloxane that contains at least 2 mercaptoalkyl groups in each molecule, (C) an organopolysiloxane selected from the group consisting of organopolysiloxanes that contain in each molecule 1 higher alkenyl group with the general formula EQU C.sub.2 C.dbd.CH--(CH.sub.2).sub.n -. wherein n=2 to 8 and organopolysiloxanes that contain 1 mercaptoalkyl group in each molecule, and (D) a photosensitizer.

Ultraviolet-curing organopolysiloxane compositions known for the purpose of preventing adhesion between tacky substances and the surfaces of various types of substrates (e.g., paper, synthetic resin-laminated paper, synthetic resin films, knitted and woven fabrics, metal foils, and so forth) are known in the art. For example ,Japanese Patent Application Laid Open [Kokai or Unexamined] Number Sho 50-61386 [61,386/1975] discloses a composition comprised of a mercapto group-containing organopolysiloxane, a vinyl-containing organopolysiloxane, and a photosensitizer. Japanese Patent Application Laid Open Number Sho 61-20471 [20,471/1986]) discloses a composition comprised of a mercapto group-containing organopolysiloxane and a photosensitizer. Additionally known are organopolysiloxane compositions comprised of an alkenyl-containing organopolysiloxane, a mercapto group-containing silane, a platinum group metal compound, and a photosensitizer.
However, these ultraviolet-curing organopolysiloxane compositions suffer from slow curing rates, facile exfoliation or delamination of the cured film due to its poor adhesion to the various types of substrates, a reduction in the tack of the tacky substance (low residual adhesion ratio), and a strong mercapto odor. The present inventors developed the present invention as the result of extensive investigations for the purpose of solving the drawbacks to the prior art.
An object of the present invention is an organopolysiloxane composition which is useful for the formation of a cured release film wherein said organopolysiloxane composition cures rapidly under exposure to ultraviolet radiation to form a cured film that tightly adheres to various types of supports or base materials.

Organopolysiloxane composition for the formation of a cured release film


A programmable controller for switch-mode power converters that operates in a digital domain without reliance on operation software and the ability to vastly reduce or eliminate analog circuitry. The digital controller is re-programmable. In one embodiment, the substantially digital portion of the controller is a Field Programmable Gate Array that controls operation of the converter by generally converting an analog reference signal(s) (e.g. the voltage output) into the digital domain. The controller then can perform distributed arithmetic to generate a square wave signal capable of controlling at least a main switch of the converter. The present invention can, if desired, essentially eliminate analog controllers in power conversion systems such as switch-mode converters.

A switch-mode power converter is a power processing device that converts an input voltage or current source waveform into a specified output voltage or current waveform. Fundamental to the operation of switch-mode converters are controllers, which manage the operation of the converter by controlling the on and off periods of switches employed therein. Generally, controllers are coupled between the output and input of the converter in a feedback loop configuration (also referred to as a control loop or closed-control loop). Typically, the controller measures an energy level at the output (e.g., power, voltage, current, etc.) and based on the quantity of the output, dynamically increases or decreases switch on-time in the converter to maintain a constant output to a load.
Today, controllers in switch-mode power converters are primarily composed of interconnected analog circuits. Analog circuitry is undesirable for numerous reasons, for example: (1) Each controller requires hundreds of interconnected discrete components to obtain the desired functionality of a single controller. Hundreds of discrete components translates into large inventory costs, complicated and expensive manufacturing processes. (2) Analog controllers tend to require a fairly extensive area of power supplies to account for numerous discrete components comprising the controller, which is a disadvantage in today's power system industry where there is an ever increasing desire to minimize the size of power supplies. (3) Analog hardware is generally fixed and inflexible. Modifications to analog hardware controllers typically require a complete redesign of the entire controller. (4) Analog circuitry is subject to packaging and component defects especially as the number of components increases. (6) Analog circuitry is sensitive to noise.
As is evident from the foregoing, there are many problems associated with analog control circuits used in switch-mode power converters. Despite the numerous limitations of analog circuitry, however, it remains the choice for use in a majority of commercially manufactured switch-mode converters today, because there are no suitable technology design alternatives available for switched-mode converters.
Digital controllers have been successfully employed in place of analog controllers in slower power system designs such as Uninteruptable Power Supplies (UPSs), motor drives and three-phase rectifiers, which typically require response times in the range of 10-to-500 Hz or two-to-six milli seconds. In such devices, microprocessors and digital signal processors (DSPs) are typically able to execute commands in an allotted amount of time consistent with controlling the power system.
Nevertheless, microprocessors and DSPs are not viable alternatives to analog controllers for use with switch-mode converters today. For instance, microprocessors and DSPs are generally not capable of delivering required speeds and bandwidths as analog converters. A typical commercial AC-to-DC or DC-to-DC switch mode converter requires a response time of approximately 20 .mu.s and bandwidth requirements in the range of 5 kHz-to-100 kHz. Controllers for switch-mode converters must account for sampling within a switching cycle, which is two orders of magnitude faster than slower power system designs mentioned above. Such response times are easily obtained by analog circuitry. Microprocessors and Digital Signal Processor (DSPs), are generally not capable of matching the wide bandwidth requirements in their control loops to meet the fast transient requirements and high switching frequencies of such switch-mode converters.
Moreover, overcoming these limitations would require employing cost prohibitive processor schemes, when compared to the cost of analog controllers used today. For instance, a 60 watt DC-to-DC converter with analog control circuitry may cost around a $100 U.S. dollars, whereas the cost of a DSP alone may cost around $150.00 U.S. dollars. High performance DSPs are simply too expensive for use with switch-mode power converters when compared to low cost items like analog controllers for use with such controllers.
Attempts have been made to employ Application Specific Integrated Circuits (ASICs) as a digital alternative to analog circuitry in the control loop of switch-mode converters. ASICs provide parallel and pipelined processing which boosts speed considerably. When applied in a high volume product, an ASIC is also cost-effective. Nevertheless, ASICs, like analog circuitry, lack flexibility, since they are not re-programmable and are generally fixed designs. Once an ASIC controller design is fabricated, it is extremely difficult to reconfigure. Furthermore, ASICs do not lend themselves to lower volume products in terms of cost benefits and require considerable expense and effort to design and build.
The vast majority of commercial switch-mode power supplies available today still employ conventional analog circuitry in their control loops. Accordingly, what is needed is a cost effective and flexible digital alternative to conventional analog control circuitry in switch-mode converters.

Programmable digital controller for switch mode power conversion and power supply employing the same


A pneumatically actuated reciprocating fluid pump and spool valve combination is pneumatically shifted by pressurized air that exhausts from a respective pressurized bellows, diaphragm, or piston chamber, as the bellows, etc. nears the end of its pressure stroke (the exhaust stroke of the pumped fluid). This pressurized air exhausts from the bellows chamber via a shift piston and canister mechanism that seals on the face of the shift canister, rather than on its periphery. The pressurized air exhaust from the bellows chamber acts on the end of the valve spool element to shift the spool element to its opposite position, which reverses the application of pneumatic pressure and atmospheric exhaust between the two bellows chambers to actuate the reciprocating pump.

1. Field of the Invention
The present invention relates to a reciprocating fluid pump, and more particularly relates to a reciprocating fluid pump and spool valve combination for shifting pneumatic pressure between reciprocating pistons in the pump in order to effect pumping.
2. Description of the Prior Art
Reciprocating pumps are well known in the fluid industry. Such reciprocating fluid pumps are operated by a reciprocating spool valve which shifts pressurized air from one pumping chamber of the pneumatic reciprocating pump to the other as the pumping means (piston, bellows, diaphragm, etc.) reaches the end of its pumping stroke. The valve spool element in the spool valve shifts between two positions which alternately supply pressurized air to the pumping means of one side of the pump while simultaneously permitting the other pumping means to exhaust the air therefrom. The shifting of the valve spool element simply alternates this pressurized air/exhaust between pairs of pumping means within the pneumatic pump, thereby creating the reciprocating pumping action of the pump.
In conventional pneumatic reciprocating pump and spool valve combinations, the valve spool elements have been shifted mechanically or electronically. In mechanical shifting, the spool valve itself is typically constructed as an integral part of the reciprocating pump in a manner such that when the pump piston or diaphragm reaches the end of its pumping stroke, it engages a shift mechanism to mechanically shift the valve spool of the spool valve to its opposite position, which reverses the pressurized air and exhaust to the two reciprocating pumping means in order to reverse the direction of both pumping means to cause the just-exhausted fluid chamber to draw fluid thereinto and simultaneously exhaust (pump) fluid from the opposite full fluid chamber.
In electronic shifting of such a pneumatic reciprocating pump, the mechanical shifting means for the spool valve is replaced with an electric switch or switches which then activate a solenoid operated spool valve for effecting shifting of the valve spool in response to the reciprocating pump pistons', bellows', or diaphragms' having reached the end of their pumping strokes.
A third type of shifting of the spool valve is pneumatic shifting, wherein the pump pistons, bellows, diaphragms, etc. engage mechanical or electrical switches at the end of their respective strokes, which shift the supply air pressure to either end of the valve spool for shifting between positions. In the case of electrical switches, these electrical switches actuate solenoid valves which reciprocate the supply air pressure to the spool valve. A variation of this pneumatically shifted spool valve utilizes pressurized air on both ends of the valve spool, the shifting being effected by the electrical or mechanical switch to release the pressurized air from alternating ends of the valve spool to permit pressurized air at the opposite end to shift the valve spool.
One pneumatically operated reciprocating diaphragm pump on the market today is controlled by a mechanically shifted reciprocating rod that, in turn, causes an internal valve spool within the pump to shift to alternate the applications of pressurized air and exhaust to opposing diaphragm chambers within the pump. The initial shifting mechanism (reciprocating rod) is mechanical, in that it is shifted by being alternately struck on its ends by the two reciprocating fluid pump diaphragms. The alternating rod removes lateral support from a flexible inner sleeve that permits direct pressurized air to bleed around the sleeve to an end surface of the valve spool for shifting the valve spool to its opposite position. Reciprocation of the valve spool reverses the application of pressurized air and exhaust in the reciprocating pump diaphragm chambers in order to effect pumping of the pump, as is customary in all pneumatically operated dual reciprocating diaphragm or bellows-type pumps that are spool valve-actuated.
A similar type of pneumatically actuated reciprocating pump utilizes a spool valve incorporated into the pump body, the spool valve, of course, for reversing pressurized air and exhaust between the two opposed pumping chambers. The pumping chambers comprise connected diaphragms, which diaphragms alternately engage the end of a shifting rod to reciprocate it between left and right positions. The reciprocating shifting rod alternates air pressure and exhaust between the ends of the valve spool to reciprocate the valve spool. Reciprocation of the valve spool, of course, operates the reciprocating pump.
There are many problems associated with the currently available pneumatic reciprocating pumps and spool valve shifting mechanisms. Mechanical shifting of the spool within the spool valve is limited because of available space inside the reciprocating pump, and is also susceptible to premature wear and failure of either the mechanical shifting device for the spool valve, the pump diaphragm or piston itself, or both.
The use of electronics or electrical switching of the spool valve is prohibited in many situations because of the potential for spark and fire hazards generally associated with electric (i.e., spark generating) switching devices, not to mention the complexity that is introduced by the addition of an electric power supply, electrical switches, and solenoid-controlled pneumatic valves.
Some types of pneumatic switching of spool valves in reciprocating fluid pump mechanisms are also a potential source of problems. By providing air pressure to both sides of the spool within the spool valve, the spool has a natural tendency to locate itself in the exact center of the valve when air pressure to the pump is turned off. When it is again attempted to start the pump, the valve spool, being in the exact center of the spool valve, will not direct pneumatic pressure to either side of the valve pumping mechanisms. Therefore, the pump will not be able to start up. This is known in the industry as "deadhead." Deadhead can also occur in mechanical spool valve switches whenever switches on both sides of the pump trip during the same stroke. This can be due to a number of reasons including positive fluid pressure through the pump, the presence of a solid material within the pumped fluid, pneumatic leaks, and of course, mechanical switch malfunction. Air in the pumped fluid within the pumping chamber can also create deadhead problems.
The previously described pneumatically actuated reciprocating diaphragm pump that is actuated by an internal valve spool is difficult to adjust and control, because of the use of the internal deforming sleeve. The valve spool is shifted because the plastic sleeve deforms because it loses its lateral support when the control rod shifts. In theory, when air pressure against the sleeve reaches a predetermined amount, the sleeve will deform, eliminating the air pressure seal between the sleeve and valve spool, causing pressurized air to escape to the end surface of the valve spool to shift it to its opposite position. Because the deformation of the sleeve is so dependent upon a number of external factors (temperature, humidity, presence of lubricants or other chemicals, etc.), it is extremely difficult to predict when and how much the plastic sleeve will deform, and therefore when and how rapidly the valve spool will shift. In addition, constant flexure of the plastic sleeve will create material fatigue brittleness, etc. rendering the sleeve valueless for its intended purpose.
Prior art pneumatically actuated reciprocating fluid pumps have also consistently had problems with pumped fluid surge as pumped fluid from one chamber abruptly stops and fluid from the opposite chamber abruptly starts. This surge causes what is termed hydraulic hammering in supply lines, that tends to vibrate the lines, resulting in unnecessary abrasion, flexure, and fatigue in the lines, and also tends to vibrate the fluid connections and fittings loose near the pump. In certain applications, surge can dislodge particulate contamination within fluid filters and reintroduce this contamination into the fluid system.

Pneumatically shifted reciprocating pump


An apparatus for manufacturing a filtering medium in sheet form, comprising at least one first continuous machine, adapted for manufacturing paper and the like and suitable to form at least one first web on a first conveyor, and at least one second continuous machine also adapted for manufacturing paper and the like and suitable to form at least one second web on at least one second conveyor, the at least one second conveyor being arranged so as to make the at least one second web rest by gravity on the at least one first web, and at least one of the first and second continuous machines being suitable to form a web which is not uniformly distributed.

The present invention relates to an apparatus for manufacturing a filtering medium in sheet form.
Filters for fluids which comprise a structure for supporting and containing a filtering mass, through which the fluid to be filtered is passed so as to flow from a region connected to an inlet connector to a region connected to an outlet connector, are conventionally widely used in various fields of technology.
The filtering medium used most frequently is constituted by a sheet of paper, which is inserted in the filter after being folded and rolled up according to various methods; a filtering medium in sheet form has been recently proposed which comprises regions having a differentiated filtration degree and offers numerous advantages.
In one embodiment of the filtering medium, for example, the medium comprises longitudinal bands which alternately have a different filtration degree.
It is also known that paper-making technology entails the presence of at least two kinds of continuous machine.
A first kind of machine, known as flat-screen machine, comprises a head box which conveys natural or synthetic fibers in an aqueous suspension over a conveyor constituted by a supporting screen, which moves above suction boxes suitable to collect the water that passes through the screen, so as to form on the screen a fiber mat, known as web, which is then gradually dried until it assumes the conventionally sheet-like configuration.
A second type of machine, known as cylinder machine, comprises a container which contains a fibrous suspension in water and a hollow cylinder which is partially immersed in the suspension and covered with a wire mesh or equivalent material and rotates about a horizontal axis.
During rotation, the fibers cling to the surface of the wire mesh and are picked up by a conveyor constituted by a supporting felt, which is arranged tangent to the cylinder and is pushed against it by a presser roller.
There are machines which have a cylinder with a uniformly transparent wire mesh and machines in which the cylinder has a wire mesh with closed regions where no fibers deposit on the supporting felt.

Apparatus for manufacturing a filtering medium in sheet form


An image forming apparatus comprising: a controller controlling an image forming unit to form a test image, controlling a measurement unit to measure the test image on an image bearing member, and controlling a transfer unit to transfer the test image formed on the image bearing member to the sheet; a reception unit receiving a user instruction; and a second generation unit generating the conversion condition based on the user instruction and the measurement result of the test image, wherein the test image includes a first test image, a second test image, and an image indicating a position where the sheet is to be bent, and in a case where the sheet is bent along the position, a position of the first test image and a position of the second test image do not overlap with each other.

1. Field of the Invention
The present invention relates to correction control for correcting a characteristic of an image formed by an image forming apparatus.
2. Description of the Related Art
An image forming apparatus employing an electrophotographic method forms an electrostatic latent image based on image data on a photoconductor and develops the electrostatic latent image using a developing agent (toner) included in a developer device so as to form an image. To control the image formed by the image forming apparatus to have desired density, a measurement image formed by the image forming apparatus is measured and a correction condition is corrected in accordance with a result of the measurement.
U.S. Pat. No. 8,229,307 discloses an image forming apparatus which forms a measurement image on a photoconductor, measures the measurement image by a sensor, and corrects a correction condition in accordance with a result of the measurement performed by the sensor.
However, even in a case where the correction condition is corrected, desired density of an image formed on a sheet may not be obtained. This is caused by a measurement error of the sensor. If an error occurs in the result of the measurement performed by the sensor, density of the image formed by the image forming apparatus may not be corrected with high accuracy.

Image forming apparatus generating conversion condition of measurement unit and method for controlling the same


A printed sheet product is formed by a core of printable sheet material having a pair of opposing major planar sides. At least one side bears printing. A plurality of magnetizable stripes are laid down over at least one major side of the core in spaced parallel lines extending across the one major side of the core. Scoring extending sufficiently through the sheet product including the core and each of the magnetizable stripes to define a plurality of tag elements removable from the sheet. The tag elements are of an identical shape. Each tag element bears at least part of at least one of the magnetizable stripes and part of the printing. The scoring further defines a hole extending transversely through each removable tag element of the sheet. The printing includes a unique code in characters, bar codes or both. Labels bearing the same codes can be simultaneously prepared by the printing and scoring of the core and providing a pressure sensitive adhesive layer on the sheet product behind each label. The removable tag elements are elongated but other than rectangular in shape. All depicted removable tag elements vary in width along their length. Where each magnetizable stripe is positioned to extend across the width of the element, at least one stripe overlies the widest longitudinal end of the element. Where the magnetizable stripes are positioned to extend along the length of each removable tag element, the hole through the element is located in the widest longitudinal end of the element.

This invention relates to printed sheet products and, in particular, to sets of uniquely encoded, printed tags.
A substantial market has developed in recent years for individually manufactured, individually encoded transaction cards and tags. These are issued by stores and other businesses for such uses as membership verification, individual identification, etc. Transaction cards and/or tags typically bear a code in a printed bar format to permit automatic machine scanning. Sometimes labels are supplied with each card and/or tag and bear the same individual code number as the card/tag for attachment to application enrollment forms, membership lists, etc. Sometimes forms are supplied together with such tags. Their relatively low manufacturing cost in comparison to other forms of identification, e.g. embossed, magnetic stripe equipped credit and transaction cards and "smart" cards have led to their greater acceptance and more widespread use, especially where customer convenience is sought and the need for security with respect to the cards is relatively low.