A semiconductor memory device including a serial I/O buffer; DRAM cells; and SAM cells arranged in line, the SAM cells corresponding to the DRAM cells in one row. In the device in a first mode, the SAM cells are divided into N first portions each having boundaries, data stored in the SAM cells being transferred to the serial I/O buffer sequentially until the SAM cells in the boundaries of the first portions are transferred to the serial I/O buffer. In a second mode, the SAM cells are divided into M (N>M) second portions each having boundaries, data stored in the SAM cells being transferred to the serial I/O buffer sequentially until the SAM cells in the boundaries of the second portions arc transferred to the serial input output buffer. The semiconductor-memory device further includes a circuit for detecting changes from the first mode to the second mode and from the second mode to the first mode. The semiconductor memory device further includes a circuit for generating first and second signals. When the mode is changed from the first mode to the second mode, the circuit generates the first signal. When the mode is changed from the second mode to the first mode the circuit generates the second signal.

1. Field of the Invention
The present invention relates to a semiconductor memory device having a split transfer function, provided with a random access port and a serial access port, and, in particular, to a semiconductor memory device used for a high speed graphic memory.
2. Description of the Prior Art
It is well known that a dual-port semiconductor memory device having both a random access memory (RAM) and a serial access memory (SAM) is commonly used as a memory for graphics.
This type of a dual-port memory has, for example, a configuration such as that illustrated in FIG. 1.
FIG.1 is the configuration diagram of the dual-port semiconductor memory. In FIG. 1, data in the dynamic random access memory cells (512.times.512.times.4 random access memory cell array) are transferred to registers in an upper SAM or registers in a lower SAM through transfer gate. The data in the registers in the upper SAM and the lower SAM are selected by serial selectors 87 and transferred to an external device (not shown). An address to select one of the register in the upper SAM and the lower SAM by the serial selectors 87 is transferred from a serial address counter 80.
In normal usage, data stored in memory cells in a row in the RAM are transferred to registers in a SAM, and the data in the registers in the SAM are transferred serially to a display device (not shown) through a serial output buffer to display the data on a screen in the display device. A split transfer mode has been used in order to transmit the data in the memory cells in the row in the RAM to the registers in the SAM and to transfer the data to an external device through the serial output buffer, with good efficiency.
A split transfer under the split transfer mode is a mode in which memory cells in a row are divided into two parts and then data in the memory cells is transferred to the registers in two parts in the SAM alternately. In a normal readout transmission, synchronization of the timing of the data transfer from the RAM to the SAM and the timing of the input of a serial clock SC is very strict so that the data output from the SAM occurs without interruption because the next transfer data must be transferred to the registers in the SAM from the memory cells in a next row while an address pointer indicating a readout position in the registers in the SAM returns to a start address position in the registers of the SAM.
However, in the split transfer mode, by dividing the SAM into two parts (upper SAM and lower SAM), for example, there are no strict timing requirements and the output from the registers in the SAM can take place without interruption because data in the memory cells in the RAM are transferred to the upper SAM while data in the registers of the lower SAM are transferred to an external device (not shown).
The data readout from the registers of the SAM under the split transfer mode is initiated at the register addressed by a TOP Address Point ("TAP") which has been set in this split transfer cycle (SRT cycle) and the data readout is completed at the register indicated by a boundary address which has been previously set.
The registers in the SAM are divided into 2.sup.n parts (where n=1, 2, 3, . . . ) by using boundary addresses so that the data read out from the registers in the SAM are efficiently displayed on the screen. In the case where the data readout from the registers in the SAM are in a continuous split transfer mode, a pointer indicating an address of the register in the SAM jumps to a register in the SAM as a next data readout position indicated by a next TAP address for a next split transfer after a pointer indicating the register in the SAM as a readout position reaches a boundary address of the current split transfer.
A control signal QSF, the SAM counter address, the boundary address, and the TAP address are used for pointing the address of a register in the SAM. The control signal QSF indicates one of the upper SAM and the lower SAM. For example, if the control signal QSF is at the high level, the upper SAM is selected, if at the low level, the lower SAM is selected.
The control method for a SAM counter address and the control signal QSF will now be described with reference to FIGS. 1 to 4.
FIG. 2 is a detailed configuration diagram mainly showing the serial address counter 80 in the dual-port semiconductor memory device shown in FIG. 1.
FIG. 3 is a timing chart to explain a relationship among main internal signals which are used to control an operation of a SAM counter address (SAi) 72 and a control signal QSF under a continuous split transfer mode.
FIG. 4 is a configuration diagram of a circuit used for controlling a conventional split transfer operation.
In order to simplify an explanation, the memory cells in the RAM which are the core section of the dual port semiconductor memory device shown in FIG. 1 are divided into two. Registers 512 addressed by the SAM addresses in the SAM including an upper SAM and a lower SAM have 512 bits (0 to 511). Boundary addresses are 127, 255, 383, and 511. In addition, a control signal SC(n) indicates the n-th register in the SAM, and a SRT(m) indicates a split transfer mode or cycle having a tap address of m. In the case shown in FIG. 3, the first split transfer SRT1 cycle has two tap addresses, 255 and 511 and the boundary addresses of 127, 255, 383, and 511 are set in a boundary address register 86 shown in FIGS. 1 and 2. The second split transfer mode has the TAP address of 100.
As shown in FIG. 1, a TAP address is transferred to a first internal address register 81 in the serial address counter 80 from a column address buffer (register) 71 of 9 bits through first transfer gate 810 while a column address strobe signal /CAS is at the low level.
Boundary addresses are transferred to a boundary address register 86 from a row address buffer (9 bits) 60 when a row address strobe signal /RAS is changed to the low level.
In FIG. 2, a TAP address for indicating the data in a register in a row of the RAM is latched into a first internal address register 81 in the serial address counter 80. When the TAP address latched into the first internal address register 81 is transferred to a second internal address register 82 when a SAM counter address (SAi) in the SAM counter address register 72 is agreed with a boundary address stored in the boundary address register 86 by a first comparator 84 in the QSF circuit 800. When agreed, the first comparator 84 generates an agreement signal (which are control signals TAPLC2 described later) and transmits the agreement signal TAPLC2 to the second transfer gate 820 located between the first internal address register 81 and the second internal address register 82. By receiving the agreement signal TAPLC2 from the first comparator 84, the second transfer gate 820 transfers the TAP address stored in the first internal address register 81 to the second internal address register 82.
The column address or the TAP address stored in the second internal address register 82 is transferred to the third internal address register in the third internal address register 83 when receiving a control signal FSCT. This control signal FSCT is generated by the first comparator 84 when a first serial clock SC is received after the SAM counter address SAi is agreed with the boundary address BDAi.
Then, the TAP address stored in the third internal address register in the third internal address register 83 is transferred to the SAM counter address register 72.
A control signal QSF is generated by a QSF generator in a second comparator 85 in the QSF circuit 800 as a result of comparing the SAM counter address SAi in the SAM counter address register 72, the boundary address stored in the boundary address register 86, and an address stored in the first internal address register 81. The control signal QSF switches a SAM switch in order to select one of the upper SAM and the lower SAM to transfer data in the registers in the upper SAM or the lower SAM to an external device.
Data in the registers in the upper SAM are transferred to the external device while the control signal QSF is at the high level and data in the registers in the lower SAM are transferred to the external device when the control signal QSF is at the low level.
In controlling the SAM counter address in the SAM counter address register 72, with a SAM counter address (SAi) is incremented by "1" such as SAi=(SAi +1) according to receive the serial clock SC under the normal operation mode, not under the split transfer mode.
In the normal operation mode, the SAM counter address is returned to zero "0" when the SAM counter address is reached to "511" (or to the 511-th registers).
In addition, in the split transfer mode, the value of the SAM counter address (SAi) is changed by receiving a next TAP address which has been set when the SAM counter address (SAi) points to the register in the SAM addressed by the boundary address.
In the timing chart as shown in FIG. 3, when a following serial clock SC (383) is received at the timing T1 by the first comparator 84 (which is also transferred to the SAM counter address register 72 at the same time) in the split transfer SRT1 cycle (TAP addresses are 255 and 511), the first comparator 84 compares a boundary address (BDAj=383) stored in the boundary address register 86 with the SAM counter address (SAi=383) in the SAM counter address register 72, then shows agreement of them, the first comparator 84 generates a control signal STPA of the high level at the timing T2 shown in FIG. 3 and FIG. 4A. The control signal STPA changes to the high level when the serial clock SC is agreed with the boundary address compared by the first comparator 84.
A control signal SPLTC indicates the split transfer mode with the high level. A control pulse signal TAPLC2 of the low level is generated when the control signal STPA changes to the high level and the control signal SPLTC is at the high level at the timing T2 (shown in FIG. 3 and FIG. 4A). When the pulse signal TAPLC2 of the low level is generated at the timing T2, a TAP address (255) stored in the first internal address register 81 is transferred to the second internal address register 82.
FIG. 4A shows a configuration diagram of the first comparator for the control signals STPA and TAPLC2. Thus, the control pulse signal TAPLC2 is generated when the serial clock SC is agreed with the boundary address.
Then, a following serial clock SC is received by the SAM counter address (SAi) register 72 and the first comparator 84. The first comparator 84 generates and transmits the first serial clock SC acknowledge control signal FSCT of the high level to the third transfer register 830. By this, the TAP address (255) stored in the second internal address register 82 is transferred to the third internal address register 83, then, the TAP address is set to the SAM counter address register 72 as a new SAM counter address.
The value of the control signal QSF is changed by using the control signals NLM1SC and the ATAP signals. The control signal ATAP is changed to the high level when the value of the SAM counter address register 72 is agreed with the boundary address stored in the boundary address register 86.
The control signal NLM1SC is used for a WRAP AROUND mode which is the normal operation mode, not under the split transfer mode. The control signal NLM1SC is changed from the low level to the high level when the SAM counter address (SAi) 72 is agreed with the boundary address-1. By using the control signal NLM1SC, the control signal QSF is changed within two cycles.
It requires more than two cycles to change the control signal QSF after the first comparator 84 decides that the serial clock SC is agreed with the boundary address stored in the boundary address register 86.
The control signal NLM1SC is changed to the high level when the serial clock SC is equal to the cycle of the boundary address-1, for example at the timing T4 shown in FIG. 3. In this case, data in the memory cells in the upper RAM or the lower RAM are latched into the registers in one of the upper SAM and the lower SAM indicated by the control signal QSF. The data stored in the registers in the SAM are transferred to an external device (not shown) from the SC cycle in which the serial clock SC is agreed with the boundary address.
On the contrary when a first serial clock 1st-SC after the boundary address is agreed with the address stored in the SAM counter address register 72 is received at the first comparator 84 after the SRT2 cycle, this 1st-SC is the first SC for the first split transfer SRT1 cycle and this serial clock SC (255) is equal to the boundary address for the next split transmission SRT2 cycle. Accordingly, the value of the control signal QSF must be changed and a next TAP address (100) for the next split transfer SRT2 cycle must be set into the third internal address register 83. In this case, there is no serial clock SC which is a boundary address-1. In other words, the control signal NLM1SC has no high level pulse after the SRT2 (100) cycle. This is a problem. In order to avoid this problem, a control signal ATAP is used in the conventional dual-port semiconductor memory device.
The control signal ATAP is generated by the circuit shown in FIG. 4B.
This control signal ATAP changes to the high level and latched by a latch circuit 400 shown in FIG. 4B only when the TAP address is agreed with the boundary address, for example at the timing T2 shown in FIG. 3. This control signal ATAP is used like the control signal NLM1SC under the wrap around operation mode which has already been described in brief. In other words, the level of the control signal QSF is changed when a following serial clock SC is received while the control signal ATAP is at the high level.
FIG. 4B shows a configuration diagram of the generation circuit for the control signals ATAP, SQXF, and QSF.
We use following three modes or cycles (1) to (3) for readout data from the conventional dual-port semiconductor memory device.
(1) CBRS mode is a /CAS before /RAS refresh stop register set mode. A boundary address can be changed in the CBRS mode.
(2) SRT mode is a split transfer mode (SRT mode) which has been described above.
(3) CBR mode is a /CAS before /RAS refresh option reset mode (CBR mode). In the CBR mode, registers in a SAM are divided into two SAM, each of which is a same memory size and a boundary address is reset for the two SAM. For example, a SAM address is 0 to 511, the address of the registers in the first SAM is 0 to 255, and the address of the registers in the second SAM is 256 to 511. In the CBR mode, the addresses 255 and 511 are set as the boundary addresses.
With this type of a conventional memory, irregularities are produced in one part of the composite modes CBRS (/CAS before /RAS refresh stop register set), SRT (split transfer), and CBR (/CAS before /RAS refresh option reset).
Three of these irregular modes are given below and these problem areas are explained.
First, FIG. 5 is a timing chart for a conventional first SAM composite mode (example 1).
In FIG. 5, boundary addresses can be changed only in the CBRS and CBR cycles. In the case of the CBRS cycle a new boundary address is effective following to the split transfer SRT cycle after the CBRS cycle. For this reason, the internal boundary address is changed with a new boundary address after a falling edge (at timing T50) of the row address strobe /RAS for the SRT2 cycle in the example 1 shown in FIG. 5.
As shown in FIG. 5, the boundary addresses are 255, 511 (two division) in the SRT1 cycle. Following the CBRS cycle, the boundary addresses are changed to new boundary addresses, 127, 255, 383, and 511 (four division) at the timing T50 after the SRT2 cycle. Thus, the boundary addresses are changed only after the CBRS cycle and the CBR cycle.
After the boundary addresses are changed in the SRT2 cycle at the timing T50, a comparison operation is made of the SAM counter address (127) stored in the SAM counter address register 72 and the new boundary addresses (127, 255, 383, 5111) stored in the boundary address register 86 by the first comparator 84.
The serial clock SC(127) is received at the timing T51 and set into the SAM counter address register 72. This SC (127 designated by the character reference "*b") is equal to one of the new boundary addresses(127, 255, 383, and 511) of the four division by comparing at the timing T50 before receiving the next serial clock SC(383) at the timing T52 designated by the character reference "*c". Thus, the control signal STPA changes to the high level at the timing T50 shown in FIG. 5.
At the timing T50, the conventional dual-port semiconductor memory is in the split transfer mode because the control signal SPLTC is at the high level, so that the pulse of the low level of the control signal TAPLC2 is generated (designated by "*h" shown in FIG. 5), because the serial clock (127) is equal to one of the boundary addresses (127, 255, 383, and 511 in the four division). Then, the TAP address (383) of the SRT1 cycle is transferred into the SAM counter address register 72 at the timing T52. An erroneous operation is occurred for the SAM counter address register 72.
On the other hand, in the WRAP AROUND mode which is not a split transfer mode, the SAM counter address (SAi) in the SAM counter address register 72 must be "128" by receiving the first serial clock SC immediately after the SRT2 cycle at which TAP addresses 127 and 383 are set into the SAM counter address register 72.
However, the TAP address (383) set in the SRT1 cycle is set into the SAM counter address register 72 because the SRT2 cycle is occurred after the CBRS cycle (the four division). An erroneous operation is occurred for the SAM counter address register 72.
The combination mode (CBRS cycle and SRT2 cycle) represents the conditions under which this type of erroneous operation is produced because the number of boundary addresses is increased. In other words, the erroneous operation will be happened in the case where the boundary addresses are not equal to the SAM counter address in the SAM counter address register 72 before the boundary addresses are changed at the timing T50 and one of the boundary addresses is equal to the SAM counter address in the SAM counter address register 72 after the boundary addresses are changed at the timing T50.
This type of error or restriction is produced because the control signal STPA is changed to the high level by the result of the comparing operation between the SAM counter address and the new boundary address at the timing T50 after the boundary address change in the SRT2 cycle after the CBRS cycle.
Next, FIG. 6 is a timing chart for a second conventional SAM composite mode (Example 2).
In the example 2 shown in FIG. 6, boundary addresses are 127, 255, 383, and 511 (in four division) during the SRT1 cycle. At the timing T60 after the SRT1 cycle (shown as "*d" in FIG. 6), the control signal QSF is changed from the low level to the high level by receiving the serial clock SC(127) because the serial clock SC (127) is equal to the boundary address (127).
Subsequently, a dummy SRT (DSRT) cycle in which the serial clock SC is not received, a CBRS cycle (two division), and a SRT2 cycle are executed.
At the timing T65, the new TAP address (383) is set into the SAM counter address register 72 by the low level pulse of the control signal TAPLC2. This TAP address (383) is equal to the boundary address at the timing T61, so that the control signal ATAP is changed to the high level and latched by the latch circuit 400, as shown in FIG. 4B.
In this case, the control signal ATPA is changed to the high level from the low level at the timing T61 in the Dummy SRT cycle (DSRT cycle) before changing to new boundary addresses (255/511) of the two division by the CBRS cycle.
However, by the execution of the CBRS cycle prior to the SRT2(127/383) cycle the serial clock SC(383) (or the TAP address(383)) is no longer the boundary address after the boundary address are changed to the new boundary addresses (255 and 511) at the timing T63, therefore the control signal ATAP must be changed to the low level at the timing T63. However, the signal ATAP is latched by the latch circuit 400 shown in FIG. 4B and this latch is released only by entering a following serial clock SC (383) at the timing T62. As shown in FIG. 4B, the control signal TMPC is at the high level while a next serial clock SC is received after the completion of the split transmission mode.
Accordingly, even if the boundary address is changed at the timing T63 in this case, the signal ATAP of the high level is latched from the timing T61 to the timing T62 because a next serial clock SC is not received before the timing T62. For this reason, the control signal QSF produces an erroneous operation at the timing T64 immediately after the receiving of the first serial clock SC (383) designated by the character reference "*e" at the timing T62. The level of the control signal QSF is changed to the low level at the timing T64. This is a problem. The control signal QSF must not be changed to the low level at the timing T64.
As the conditions under which this type of erroneous operation is produced, the case occurs wherein the modes DSRT+CBRS+SRT are executed in the time interval following the change in the control signal QSF to the high level at the timing T10 until the first serial clock SC (383) at the timing T60, the number of the boundary addresses is changed into a rough division (from the four division (127, 255, 383, and 511) to the two division (255, 511) by the CBRS cycle and it is considered that the TAP address is equal to the boundary address prior to the CBRS cycle, and the TAP address is not equal to the boundary address after the CBRS cycle.
This type of restriction is produced because a pulse is generated in a control signal TAPLC1 by entering the DSRT cycle and it is not possible to hold the TAP address for the SRT1 cycle because the TAP address for the dummy SRT cycle is superscribed in the SAM counter address register 72 in which the data which is to be compared with the boundary is stored. In addition to this a boundary address change is produced, and even though there is no necessity for the signal QSF to be changed, there is no function for releasing the latching of the control signal ATAP in this conventional dual-port semiconductor memory configuration shown in FIGS. 1, 2, 4A, and 4B.
Finally, FIG. 7 is a timing chart for a third conventional SAM composite mode (Example 3).
In the Example 3 shown in FIG. 7, the boundary addresses for the SRT1 cycle are 127, 255, 383, and 511 which are stored in the boundary address register 86. The level of the control signal QSF is changed to the high level from the low level at the timing T70 after the serial clock SC(127) shown as "*f" in FIG. 7 is received, because the SAM counter address (127) in the SAM counter address register 72 is equal to the boundary address (127). Subsequently, the SRT2 cycle and the CBR cycle follow. In the case of the CBR cycle, the boundary addresses (127, 255, 383, and 511 for the four division) are changed to new boundary addresses (255 and 511 for the two division) at the timing T71 immediately following the CBR cycle.
In the conventional SAM composite mode (Example 3), like the second composite mode (Example 2) shown in FIG. 6, a new TAP address is set into the SAM counter address register 72 because the low pulse of the control signal TAPLC2 is generated at the timing T75. After the level of the control signal QSF is changed to the high level at the timing T70 and before the change of the boundary addresses at the timing T71, the TAP address (383) in the SAM counter address register 72 is equal to the boundary address (383). By this, the level of the control signal ATAP is changed to the high level at the timing T72.
However, the serial clock SC(383) designated by the reference character "*g" is not equal to the boundary address after the boundary addresses are changed at the timing T71 in the CBR cycle, therefore the control signal ATAP must be changed to the low level. However, this control signal ATAP is latched by the latch circuit 400 shown in FIG. 4B and this latch can be released by using the control signal TMPC generated only by receiving a next serial clock SC.
Accordingly, even if the boundary address is changed in the CBR cycle, the next serial clock (383) designated by the reference "*g" is not received before the timing T73, so that the erroneous of the control signal QSF is occurred at the timing T74 at which the first serial clock SC (383) is received. At the timing T74, the level of the control signal QSF must not be changed to the low level.
As the conditions under which this type of erroneous operation is occurred, the case occurs wherein the SRT cycle and CBR cycle are executed after the level of the control signal QSF is changed to the high level at the timing T70 and before the first serial clock CK (383) is received at the timing T73. It is recognized that the TAP address (383) is equal to the boundary address (383) prior to the execution of the CBR cycle or before the timing T71. In addition, the TAP address (383) is not equal to the new boundary addresses (255/511) after the timing T71 in the CBR cycle.
As in the case of the Example 2 shown in FIG. 6, this type of restriction occurs because a pulse is generated in the control signal TAPLC1 at the timing T72 by the SRT2 cycle and it is not possible to store the TAP address for the SRT1 cycle because the TAP address for the SRT2 cycle is superscribed in the SAM counter address register 72 in which the data to be compared with the boundary addresses is stored. In addition to this a boundary address change is occurred, and even though there is no necessity for the control signal QSF to be changed at the timing T74, there is no function for releasing the latching of the control signal ATAP in the dual-port memory having this conventional configuration.
As can be understood from the foregoing explanation for the conventional dual-port memory, in a conventional dual-port semiconductor memory device provided with a split transfer function, erroneous operation is produced from the selecting of the upper SAM and the lower SAM in the SAM in a composite mode made up of the above-described split transfer mode, CBRS mode, and CBR mode.

Semiconductor memory device having split transfer function


The disclosed technology includes system and method for discovering key places for a mobile device based on historical location data associated with the mobile device. The key places are discovered by mapping the historical location data into predefined land areas in a geographical region, aggregating the historical location data into time interval sessions, selecting a first set of the predefined areas based on density of location data in each of the predefined land areas, and filtering the first set of the predefined areas to obtain the key places. The key places are used to estimate one or more travel routes routinely taken by a user of the mobile device, and to build an association database, where one or more billboards and/or points of interests near the travel routes are associated with the mobile device or its user. Information documents for delivering to the mobile device are selected based at least on data in the association database.

Organizations have been displaying information to the public using large signs such as posters, billboards, etc., for a long time. Billboards are panels or structures displaying information or messages, and come in different forms and sizes. Larger sized billboards, such as those shown in FIGS. 1A and 1B are usually placed along roads and streets, and on structures such as poles and sides of buildings, to allow people traveling by to catch glimpses of them. Smaller billboards, signs, posts or displays, such as the ones shown in FIG. 1C, are usually placed on structures such as walls and bus stands so passersby can see them. Typically showing witty slogans and distinctive visuals, these signs are designed to catch a person's attention and create an impression very quickly. Yet, the impression is usually fleeting unless it is repeated. Often, people pass by these billboards, signs or posts and become interested in their displayed messages but do not retain enough information to follow up on their interests.

Method and apparatus for delivering publicly displayed information to mobile devices based on location history


A method for manufacturing an electronic component including the steps of preparing a pair of substantially round conductive wires, bending one end portion of each of the pair of conductive wires outward at an angle of about 90 degrees, forming a flat portion on each of the pair of substantially round conductive wires by press extending at least the portion on the tip side from the bending point so as to be extended substantially parallel to a lead portion of the lead terminal, such that a thickness of the flat portion is less than a diameter of each of the pair of substantially round conductive wires, forming a cup-shaped holder portion by bending the flat portion inwards, holding both end portions of a piezoelectric element in a pair of the cup-shaped holder portions, and electrically and mechanically connecting the cup-shaped holder portions and the electrodes formed in both end portions of the piezoelectric element by using a conductive joining material.

1. Field of the Invention
The present invention relates to an electronic component and a method of manufacturing for the electronic component, and more particularly, to an electronic component including a piezoelectric element and at least a pair of lead terminals having cup-shaped holder portions arranged to hold both end portions of the piezoelectric element.
2. Description of the Related Art
An electronic component related to the present invention including a strip-shaped piezoelectric element, a pair of lead terminals having cup-shaped holder portions holding both end portions of the piezoelectric element and connected to both end portions of the piezoelectric element by a conductive joining material, a capacitor substrate connected to the outer surface of the cup-shaped holder portions, and other lead terminals connected to the capacitor substrate are provided, is described in Japanese Examined Patent Application Publication No. 5-33847.
In such an electronic component, it is common to use pressed terminals prepared by stamping a metal plate using dies in order to make cup-shaped lead terminals accurately. The cup-shaped holder portions are formed by an additional treatment of the pressed terminals prepared by stamping. The cup-shaped holder portions formed in this way are excellent for holding piezoelectric elements and have highly reliable conductivity since solder can be used in a stable condition.
However, because they are pressed terminals, a large area of a metal plate is required in order to form cup-shaped holder portions, and accordingly a lot of material loss is caused, and at the same time, since the shape of the cup must be changed when a piezoelectric element of a different kind is to be held by the terminals, different dies are required and, as a result, there is a disadvantage that the material cost and processing cost increase.
On the other hand, an electronic component provided with lead terminals made of a conductive wire having a round section is also described in Japanese Unexamined Patent Application Publication No. 2000-114913. In the electronic component having round lead terminals, there is an advantage that, in contrast to the pressed terminals using a metal plate, the material loss is low and the processing cost is also low. However, in this case, since a V-shaped receiving groove is formed on the side of the round lead terminal and both end portions of a piezoelectric element are inserted in the receiving grooves, the thickness of the piezoelectric element is required to be much thinner than the diameter of the round lead terminals, and there is a problem that the types of piezoelectric elements are restricted. Generally, a round lead wire that is 0.48 mm in diameter is widely used, but piezoelectric elements that can be held by the round wire are very limited. As a result, it is difficult to hold the piezoelectric elements, or it becomes difficult to apply conductive joining materials such as solder, etc., into the receiving grooves, and there is a problem that the capability of holding piezoelectric elements is insufficient and the reliability of conductivity is low.

Method for manufacturing an electronic component


An apparatus is provided for the removal of oversized contaminants from particulate material the is particularly suitable for the removal of contaminants from low density, high surface area particulate materials. The removal of contaminants is accomplished during the transfer of the particulate material from its storage or transport container to a receiving container. The apparatus comprises an assembly having a weir, a trap disposed adjacent said weir, a screen o for separating particulate material from oversized contaminants, a baffle, and an opening through which particulate material will flow freely. The weir has a weir trap flange extending laterally from a weir wall. The trap is configured to capture contaminants if the container to which the assembly is secured is maneuvered to initiate the flow of the particulate material from the container to the receiving container. When so maneuvered, the lowermost portion of the trap in the proximity of the flow of the particulate materials subtends the weir. The screen permits particulate material trapped within the trap to pass therethrough so that the container can be completely emptied of particulate material while separating and capturing oversized contaminants. The baffle is spaced from the weir and disposed to deflect the flow of the particulate material towards the trap. The flow of particulate material follows a tortured path around the baffle and over the weir to exit the container through the opening.

In the preparation of propellants it is critically important to properly handle the ingredients of the propellants to assure safety. For many solid rocket propellants, mixers ranging in size from small (one pint) to extremely large (600 to 1000 gallons) are used to combine the ingredients. Such mixers use blades that have narrow tolerance between the blades and the interior wall of the mixer (usually fractions of an inch). During mixing, the ingredients are viscous and later solidify during curing of the mixture. As can be easily appreciated, a major safety concern is to eliminate or reduce undesired friction in the mixture during mixing. Hence, it is imperative that the contents of the mixture contain particles that are finer than the blade clearance. Devastating explosions have occurred as the result of friction caused by mixture contamination by some object or particle that is larger than the blade clearance.
In the manufacture of certain propellants it is particularly important to use ingredients that have a very high surface area to volume ratio. Certain desirable characteristics of a propellant such as burn rates and viscosity are affected by the ratio of surface area to volume of the propellant constituents. Consequently, low density or sub-micron particles of various materials are used frequently in the manufacture of solid propellants.
However, the use of low density or sub-micron particles as ingredients in a propellent mixture can cause significant safety problems. Small, high surface area particles are subject to viscose (stokes) drag in air and are not heavy enough to pass through a screen readily when driven by gravity or vibration. Such materials are too light to fall through a safety screen without an external driving force. For example, low density fumed silica particles (a silicon dioxide product known as "Cab-O-Sil") have a size of approximately 0.03 microns. The sub-micron iron oxide material known as "Pyrocat" has also been used in propellant formulations. This material has a surface area to weight that is of the magnitude of 100 square meters per gram or more. For such materials, the force of gravity is insufficient to draw the material through a #8 mesh safety screen (a screen with mesh openings of about 0.15 inches). Consequently, it is extremely difficult to screen the material for contamination.
Heretofore, there have been two methods for contamination removal from low density materials such as Cab-O-Sil and Pyrocat. One method is to use expensive solid particle fluidizing systems to move the materials through a screen using an air column. This method requires expensive capital investment for the fluidizing equipment, and the equipment is large and bulky and certainly not portable. Additionally, such equipment is usually designed to handle a specific material and not other low density materials.
The other method is simply to sift the material by hand through a mesh screen. As can be appreciated, this method has several drawbacks. The sifting must be done in an enclosed area and the person doing the sifting must wear appropriate breathing apparatus and goggles. Since the materials are so light, if they become airborne it may take minutes or hours for the materials to settle to the ground. Further, some low density materials can be catalytic, thereby introducing a serious hazard for explosion if an inadvertent spark occurs in a room of airborne particles. Also, so little material passes through the screen that the process is extremely time consuming. For example, it has required as much as one half hour to screen 0.4 pounds of Pyrocat for a propellant mix. This means that it may take as much as 133 man hours to screen enough material for a 600 gallon propellant mix.
Hence, it would be a significant advance in the art to provide an apparatus that could quickly separate light, low density, high surface area materials from coarser materials or hazardous contamination where fluidizing systems are not practical or have not been developed or where hand sifting is not practical.

Apparatus for removing contamination from low density particulate materials


A transmission system for a four wheel drive hybrid electric vehicle includes: an input shaft selectively connected to a front wheel transmission housing while being connected to an output shaft of an engine; a first motor/generator having disposed in the front wheel transmission housing; a second motor/generator having a function of the motor and the generator and connected to a rear wheel output gear disposed in a rear wheel transmission housing; a planetary gear set on the input shaft and including three rotating elements, in which among three rotating elements, a first rotating element is directly connected to the first motor/generator and selectively connected to the input shaft, a second rotating element is directly connected to the input shaft, and a third rotating element is selectively connected to a front wheel output gear; and a connection unit disposed at a selective connection part.

1. Field of Invention
The present invention relates to a transmission system for a four wheel drive hybrid electric vehicle, and more particularly, to a transmission system for a four wheel drive hybrid electric vehicle capable of maximizing improvement of fuel efficiency by performing driving of a power split mode having better low-speed driving efficiency and a parallel mode having better high-speed driving efficiency.
2. Description of Related Art
Generally, a hybrid electric vehicle is a vehicle which is driven by effectively combining at least two different kinds of power sources.
The hybrid electric vehicle generally uses an engine and a motor/generator, and uses the motor/generator having a relatively better low-speed torque characteristic as a main power source in a low speed and uses the engine having a relatively better high-speed torque characteristic as the main power source in a high speed.
Therefore, since the hybrid electric vehicle stops an operation of the engine using fossil fuel and uses the motor/generator in a low-speed section, the hybrid electric vehicle has an excellent effect in improvement of fuel efficiency and reduction of exhaust gas.
Further, a transmission system for the hybrid electric vehicle as described above is classified into a single mode type and a multi mode type.
The single mode type may not require connection units, such as a clutch and a brake for transmission control, but may have the reduced fuel efficiency at the time of high-speed driving and require an additional torque multiplication apparatus so as to apply to a large vehicle.
The multi mode type may have increased efficiency at the time of high-speed driving and may be designed to enable torque multiplication, thereby being applied to a medium-large size vehicle.
Recently, the multi mode type is mainly used rather than using the single mode type. Therefore, a research for the multi mode type has been actively conducted.
The transmission system in the multi mode type is configured to include a planetary gear set, a plurality of motors/generators which are used as a motor and a generator, a connection unit which controls rotating elements of the planetary gear set, a battery which is used as a power source for the motor/generator, and the like.
The transmission system in the multi mode type has different operation mechanisms depending on a connection configuration of the planetary gear set, the motor/generator, and the connection unit.
Further, since the transmission system in the multi mode type has characteristics of which durability, power transmission efficiency, a size, and the like vary depending on the connection configuration, a research and development for implementing a power transmission mechanism which is more robust, reduces power loss, and is compact in a field of the transmission system for a hybrid electric vehicle has continued.
The hybrid electric vehicle may be classified into a two wheel drive (hereinafter, referred to as 2WD) type and a four wheel drive (hereinafter, referred to as 4WD) type depending on a driving type.
The 2WD hybrid electric vehicle is generally configured to drive a front wheel using two motors/generators and a planetary gear set.
The 4WD hybrid electric vehicle is configured to drive the front wheel using the two motors/generators and the planetary gear set and is configured to drive a rear wheel using one motor/generator.
However, the 4WD hybrid electric vehicle according to various embodiments of the present invention uses the two motors/generators and the planetary gear set to drive the front wheel to convert a part of the power of the engine into electrical energy at all times, such that fuel efficiency may be reduced in a high-speed region.
Therefore, in order to supplement the above problem, there is a need to increase the number of planetary gear sets and the number of clutches and brakes, which may lead to reduced power transmission efficiency and increased production cost.
The information disclosed in this Background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.

Transmission system of four wheel drive hybrid electric vehicle


A power semiconductor device may include: an active region in which a current flows through a channel formed when the device being turned on; a termination region disposed around the active region; a first semiconductor region of a first conductive type disposed in the termination region in a direction from the active region to the termination region; and a second semiconductor region of a second conductive type disposed in the termination region in the direction from the active region to the termination region, the first semiconductor region and the second semiconductor region being disposed alternately.

The present disclosure relates to a power semiconductor device.
An insulated gate bipolar transistor (IGBT) refers to a transistor having a bipolar structure as a result of manufacturing a gate using a metal oxide semiconductor (MOS) and forming a p-type collector layer on a rear surface of the transistor.
After a power metal oxide semiconductor field effect transistor (MOSFET) according to the related art was developed, the MOSFET has been used in fields requiring fast switching characteristics.
However, due to a structural limitation of the MOSFET, a bipolar transistor, a thyristor, gate turn-off thyristors (GTOs), and the like, have been used in fields requiring a high voltage.
Since the IGBT is characterized by low forward voltage loss and fast switching speed, it has been widely used for fields which are impossible to implement with the existing thyristor, bipolar transistor, metal oxide semiconductor field effect transistor (MOSFET), and the like.
Describing an operation principle of the IGBT, in the case in which an IGBT element is turned on, a higher voltage is applied to an anode thereof than to a cathode thereof, and in the case in which the voltage higher than a threshold voltage of the element is applied to a gate electrode, polarity of a surface of a p-type body region located at a lower end of the gate electrode is reversed to thereby form an n-type channel.
Electron current injected into a drift region through a channel induces an injection of a hole current from a high concentration p-type collector layer located at a lower portion of the IGBT element, similar to a base current of the bipolar transistor.
Due to a high concentration injection of the minority carriers, a conductivity modulation phenomenon occurs in which conductivity in the drift region is increased by tens to hundreds of times.
Unlike the MOSFET, since the IGBT has a highly reduced resistance component in the drift region due to conductivity modulation, it may be used at a very high voltage.
The current flowing into the cathode is divided into the electron current flowing through the channel and the hole current flowing through a junction between the p-type body and an n-type drift region.
Unlike the MOSFET, since the IGBT has a p-n-p structure between the anode and the cathode due to the structure of a substrate, it does not have a diode embedded therein, such that it needs a separate diode connected thereto in anti-parallel.
The above-mentioned IGBT has main characteristics such as maintenance of blocking voltage, a decrease in conduction loss, and an increase in switching speed.
Particularly, in order to maintain the blocking voltage, a termination region is formed around an active region in which a current flows at the time of operation of the IGBT.
Since an entire size of the power semiconductor device is limited, the active region of the power semiconductor device is decreased in the case in which the termination region is increased in the power semiconductor device, such that performance of the device may be decreased.
Thus, a method capable of decreasing the size of the termination region while sufficiently maintaining the blocking voltage of the power semiconductor device has been demanded.


A lunch pail assembly has an upper member having a bottom wall, opposed side walls and end walls defining a first food and beverage compartment, a lid at the upper end of the first food and beverage compartment, a handle on the lid, and a fastening mechanism on the exterior of the opposed end walls. A detachable lower member having a bottom wall, opposed side walls and end walls defines a second food compartment having an open top end which is received within a depending lip on the bottom of the upper member. Catches on the end walls of the lower member releasably engage the fastening mechanisms on the upper member to selectively releasably connect the upper and lower members together to be carried as a single unit wherein food, beverages, and other articles of one type may be contained in the first food and beverage compartment and isolated from food and other articles of another type contained in the second food compartment. The upper member can be used independently of the lower member when disconnected therefrom. The lower member may be used to carry frozen dinners or may be used as a plate. A dish-shaped plate insert and cover fit inside the detachable lower member and are microwave, freezer, and dishwasher safe, whereby meals, such as a plate lunch, can be prepared in advance, placed in plate inserts, stored in a refrigerator or freezer, transported in the lower member, and when desired, placed in a microwave oven for preparing the food contained therein.

1. Field of the Invention
This invention relates generally to lunch pails, and more particularly to a lunch pail having a separate, detachable compartment for carrying plate lunches and other articles.
2. Brief Description of the Prior Art
In the work world of today, we have come a long way from carrying our lunch in a brown paper bag. More sophisticated means of carrying lunches are introduced on the market each year. One of the major problems with current lunch palls in general is: most commercially available lunch pails have only a single carrying compartment with perhaps one small tray insert. Many people would prefer to carry a plate lunch, be it homemade or store bought, due to the availability of microwave ovens in work places. Most lunch pails of today are not designed to carry a plate lunch, but rather sandwiches, fruit, and maybe a few small containers.
Therefore, I have designed a lunch pail with a detachable compartment which can be used as a plate and to carry plate lunches while still maintaining the main lunch pail compartment for snacks, fruit, drinks, and other desired articles.
There are several patents which disclose lunch pails and connectable containers.
Ruiz, U.S. Pat. No. 3,372,690 discloses an insulated lunch box having an insulated base portion with an upper tray-supporting surface with side panels hingedly connected at their bottom ends to the base portion to define a single compartment. Each of the side panels pivot to a vertical position and are provided with a groove on their inner surface which is positioned parallel to the upper tray-supporting surface of the base portion. A food tray having a peripheral horizontal flange is removably received on the tray-supporting surface of the base portion with its horizontal flange resting on the vertical flange of the base portion. The food tray is covered by a cover having outer edges which are folded over the horizontal flange of the food tray. The outer periphery of horizontal flange of the food tray and cover is received in the grooves of the side portions when they are vertically disposed.
Clubb, U.S. Pat. No. 4,078,701 discloses a multi-vessel container unit wherein either vessel is used to carry ice and/or liquids. The Clubb device has separate vessels removably mounted one on top of the other and held together by hinged clamps. The upper vessel is uninsulated and has a vertical pouring spout of sufficient diameter to receive and pass ice cubes therethrough and the lower vessel is insulated and has an open top end to receive ice cubes and a pouring spout on the side of sufficient diameter to prevent the passage of ice cubes therethrough. The bottom of the upper vessel is received in the open top end of the lower vessel. An insulating cover may be placed in the lower vessel a short distance below the open top end to prevent heat exchange between the two vessels.
The present invention is distinguished over the prior art in general, and these patents in particular by a lunch pail assembly having an upper member with a first food or beverage compartment for containing one type of food such as sandwiches or beverages and a detachable lower member having a second food compartment for containing another type of food such as a plate lunch. The upper member has a bottom wall, opposed side walls and end walls defining the first food and beverage compartment, a lid at the upper end of the first food and beverage compartment, a handle on the lid, and a fastening mechanism on the exterior of the opposed end walls. The lower member has a bottom wall, opposed side walls and end walls defining the second food compartment which has an open top end that is received within a depending lip on the bottom of the upper member. Catches on the end walls of the lower member releasably engage the fastening mechanisms on the upper member to selectively releasably connect the upper and lower members together to be carried as a single unit wherein food, beverages, and other articles of one type may be contained in the first food and beverage compartment and isolated from food and other articles of another type contained in the second food compartment. The upper member can be used independently of the lower member when disconnected therefrom. The lower member may be used to carry frozen dinners or may be used as a plate. A dish-shaped plate insert and cover fit inside the detachable lower member and are microwave, freezer, and dishwasher safe, whereby meals, such as a plate lunch, can be prepared in advance, placed in plate inserts, stored in a refrigerator or freezer, transported in the lower member, and when desired, placed in a microwave oven for preparing the food contained therein.

Lunch pail having detachable food compartment


A system and method is provided for providing location based services. The system includes at least one module configured to publish location information of a mobile user using a publish subscribe format based on a user preference mode of notification.

Faced with an increasingly difficult challenge in growing both average revenue per user (ARPU) and numbers of subscribers, wireless carriers are trying to develop a host of new products, services, and business models based on data services. One such service is location services, which provide information specific to a location including actual locations of a user. It is expected that location based services will generate additional business for the carrier, from both the mobile user and content providers.
For the mobile user as well as the service provider, location-based services offer many opportunities. For example, location-based services can increase revenue of the service provider, e.g., network carrier, while improving services to end users, e.g., mobile users. Some examples of location-based services that can be provided to the mobile user include:                Providing the nearest business or service, such as an ATM or restaurant;        Providing alerts, such as notification of a sale on gas or warning of a traffic jam; and        Providing weather reports which are germane to the location where the user is using the mobile device, etc.An advantage of using location services is that the mobile user does not have to manually specify ZIP codes or other location identifiers to use location-based services.
For the network carrier, location-based services provide value add by enabling services such as:                Resource tracking with dynamic distribution (e.g., Taxis, service people, rental equipment, doctors, fleet scheduling, etc.);        Finding people or information for the user (e.g., Person by skill (doctor), business directory, navigation, weather, traffic, room schedules, stolen phone, emergency 911);        Proximity-based notification (push or pull) (e.g., Targeted advertising, buddy list, common profile matching (dating), automatic airport check-in); and        Proximity-based actuation (push or pull) (e.g., Payment based upon proximity (EZ pass, toll watch).
In addition, location based services (LBS) are convenient for sharing location data between wireless devices to wireless devices and from wireless devices to stationary devices like a home computer or stationary tracking system or content provider, etc. This would allow a third party to determine an exact location of a mobile user such as, for example, a family member, friend, employee, etc.
Two methods are commonly in use to determine the location of a wireless device with a third method starting to become more popular. These methods include signal strength of cell towers that are near the wireless device (e.g., triangulation); GPS triangulation; and exposing the LBS as a web service.
The first method determines a wireless device's location by comparing the signal strength of cell towers that are near the wireless device. This method is called triangulation and is substantially the same method that GPS devices use to determine their location. The difference between cell triangulation and GPS triangulation, though, is the signals they use to determine location. The second method, GPS triangulation, uses satellites to determine a device location. In either case, the latitude and longitude are kept in the location services infrastructure.
Another method includes creating location based services by exposing the LBS as a web service. For example, when a device wants an update from the location-based system, it sends a request with the proper authentication credentials and a unique identifier that describes the device that is being tracked. The LBS returns the coordinates of the device being queried.
To date, though, there are a number of reasons that telecommunication networks have not embraced location-based services. These reasons include, for example, the fact that the latencies associated with precision location determination are high and network carriers have consistently wanted to control all services on the device platforms in play, preventing third party location based services to use device processing power and capabilities. Additionally, from a network perspective, location determination is an expensive operation that consumes significant network resources.

This patent is subject to a terminal disclaimer.

System and method for providing location based services using collaborative networks

INTERNATIONAL BUSINESS MACHINES CORPORATION


A through wall connector assembly which provides a substantially water-tight and air-tight seal around the circumference of an opening in a wall to allow for sealed extension of a line through the opening in the wall. The assembly includes a male member adapted to extend through the opening in the wall. The male member receives a first section and a second section of the line to be extended through the wall. A female member is attached to the male member to secure the male member and the female member in the wall. A first seal is positioned adjacent the male member on one side of the wall and a second seal is positioned adjacent the female member on the opposite side of the wall to prevent the ingress of air, moisture and water through the opening in the wall.

The present invention relates to connectors and, more particularly, to a through wall connector assembly that provides a substantially water-tight and air-tight connection through a wall.
It is often necessary to extend lines such as water, sewer and electrical conduit lines through the walls of a building and, in particular, basement walls or the structural wall just above the basement or foundation. A great deal of labor and expense is directed toward keeping the walls impervious to moisture and to reduce or prevent air infiltration. To accomplish this goal, the walls are normally covered with a vapor barrier and in the example of a basement wall, backfilled to direct water away from the basement wall. Additionally, drainage pipes, such as field tiles, are sometimes used to keep water away from basement walls. Special care is also taken to prevent unnecessary openings in the walls and to keep any necessary openings to a minimum.
Because of the need to extend water, sewer and electrical conduit lines into buildings, openings in the walls are required and these openings result in the possibility of ingress of moisture, outside air, and sometimes water. The openings are cut into the wood wall above the foundation or basement or into the basement wall. In poured concrete walls the openings are often made as the wall is being poured. The openings by necessity must be slightly larger than the line being extended through the opening. Many times, little care is taken in making the openings and this results in fairly large to gaping openings in the walls. Previous attempts to seal the excess space in the openings have not been entirely successful.


A method for measuring at least one characteristic property of a pneumatic tire for a vehicle wheel includes arranging at least one array of deformable sensors along a first direction; making the tire pass at speed over the sensors along a second direction; generating an electrical signal proportional to a speed of deformation of each sensor when the tyre contacts the sensor; detecting the electrical signal generated by each sensor; and determining, starting with the detected signals, the at least one characteristic property. The second direction is a motion direction of the tire. The first direction is transverse to the second. The at least one array of sensors extends in the first direction for a distance greater than or equal to a dimension of the tire in the first direction. When the at least one array includes a plurality of arrays, the arrays may be arranged substantially in parallel.

1. Field of the Invention
The present invention, in its most general aspect, relates to a method for measuring characteristic properties of a pneumatic tyre for vehicle wheels. More specifically, the invention relates to a method for detecting the size of the footprint area of a pneumatic tyre for vehicle wheels in high-speed motion conditions, and the distribution of pressure on such a footprint area.
2. Description of the Related Art
Throughout the present description and the subsequent claims, the term: characteristic properties of a pneumatic tyre, is used to indicate, for example, the dimensions and/or the shape of the footprint area of the tyre, the distribution of pressure (or vertical forces) acting locally on the footprint area of the tyre, the tyre inflation pressure, the distribution of longitudinal and/or lateral forces acting on the tyre and the rolling resistance.
The term: footprint area, is used to indicate that zone of the tyre wherein the exchange of forces between the tyre and the road surface (or between the tyre and a device simulating the road surface, such as a rolling runway of a drum simulating the road surface) takes place, i.e. that zone of the tyre which is in contact with the road surface (or with the device simulating the road surface).
The term: high-speed, is used to indicate a speed greater than 30 km/h, preferably greater than 100 km/h, even more preferably greater than 200 km/h.
As known, a considerable part of the research in the field of tyres for vehicle wheels has as a primary object that of optimizing the design parameters of the tyre to ensure adequate behavior thereof in the foreseen operating conditions. For such a purpose, tyres are inspected and tested to detect some properties representing the behavior of the tyre in operation.
For example, it is used to measure the size and/or the shape of the footprint area of a tyre and to detect the variation of such a size and/or shape as the rolling speed of the tyre varies. Indeed, it is known that a properly designed tyre has a wide, rectangular or square footprint area which substantially does not change as the rolling speed of the tyre changes.
Also, it is used to measure the distribution of pressure on the footprint area of the tyre and, even in this case, to detect the variation of such a distribution of pressure as the rolling speed of the tyre varies. Indeed, it is known that a properly designed tyre has a substantially uniform distribution of pressure between the shoulders and the center of the tyre, such a distribution being also substantially invariable as the rolling speed of the tyre varies.
Thus, for example, U.S. Pat. No. 5,749,984 discloses a method for monitoring a tyre wherein a measurement of the size of the footprint area of the tyre is carried out by a sensor suitably housed inside the tyre. In the preferred embodiment thereof, the sensor is a piezoelectric element which deforms when the tyre comes into contact with the ground thus generating an electrical signal proportional to the speed of deformation thereof. The position of the sensor inside the tyre is described as being particularly critical for generating a suitable electrical signal.
The Applicant has observed that this system is an invasive detection system (i.e. the sensor is provided inside the tyre) and thus it involves complication in the production process of the tyre, as well as it requires the production of tyres ad hoc. The Applicant has also verified that a system as the one described in the patent identified above does not allow the actual duration of contact between tyre and road, and therefore the length of the footprint area of the tyre, to be determined with precision. Indeed, the signal generated by the sensor is influenced by phenomena which take place before or after the tyre contacts the road. The Applicant has also observed that such a patent does not provide any indication of the shape of the tyre footprint, nor of the distribution of pressure on the footprint area.
A non-invasive system for detecting the distribution of pressure on the footprint area of a tyre under almost static conditions is disclosed in patent application EP 0 656 269. Such a system provides for the use of a plurality of arrays of load sensors directly applied on the road surface. Such sensors directly measure the vertical forces acting upon the footprint area of the tyre and generate an electrical signal proportional to such forces. The Applicant observes that, in line with the disclosure of the aforementioned document, such a system is capable of detecting the distribution of pressure for static conditions or for rolling speeds of the tyre lower than 5–6 Km/h, greater speeds being ruled out due to the limited and/or insufficient frequency response of the load sensors.

Method for measuring at least one characteristic property of a pneumatic tire for a vehicle wheel


A locker system includes a locker area, a plurality of lockers positioned in the locker area, and a plurality of augmented reality headsets. Individual augmented headsets of the plurality of augmented reality headsets including a display and being configured to be worn by respective individual users. The locker system also includes a controller communicatively coupled to the plurality of lockers and the plurality of augmented reality headsets, wherein the controller comprises a memory and a processor configured to execute instructions stored on the memory. The instructions include generating locker assignments to assign individual lockers of the plurality of lockers to the respective individual users, communicating the locker assignments of the assigned individual lockers to the respective individual users using the plurality of augmented reality headsets, and controlling operation of the assigned individual lockers of the plurality of lockers based on signals received from the plurality of augmented reality headsets.

This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present techniques, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Amusement parks or similar entertainment facilities often include one or more locker systems, such that users (e.g., guests and personnel) may store their belongings in the lockers while at the amusement park. However, it may be time consuming to find or register for an available locker among a large number of lockers. It may also be burdensome to unlock/lock a locker while attending to other needs (e.g., carrying things, enjoying the amusement park). In addition, it may be challenging to efficiently provide suitable lockers to a large number of users seeking lockers at the same time. Accordingly, it would be desirable to provide efficient systems and methods for assigning and enabling access to assigned lockers.


A computer implemented method performed by a global transaction processing system includes receiving a transaction request from an originator, the transaction request includes transactional data. The method includes validating the transactional data to determine one or more parameters associated with the requested transaction. The method includes dynamically generating a transaction information request form, the transaction request form including one or more requests for specific transactional data from the originator based on the one or more parameters associated with the requested transaction. The method includes transmitting the transaction information form to the originator and receiving the requested specific transactional data from the originator. The method also includes validating the transaction request based on the received transaction request and the received specific transactional data to determine if the transaction request is valid, as well as processing the transactional request based on the transaction request being determined to be a valid transaction request.

With the rise of globalization, the number of international financial transactions is enormous. These transactions, occurring between multiple parties in multiple countries, can be complex to process due to differing financial requirements and regulations associated with different countries. Often, this can lead to transactions failing to be processed, requiring the transactions to be submitted again, requiring additional time and, potentially, fees and other costs associated with performing the transaction. One common point of failure in international transactions is a failure on the part of the originator to provide all of the information required by the receiving party. For example, certain countries associated with the recipient may require additional information not required in the originator's country of origin, and vice versa. Failure to provide this information often results in the transaction being unable to be processed, requiring the transaction to be performed again. However, in some instances the originator may not be fully aware of why the transaction failed, and again neglect to include the required information, resulting in yet another failure. Accordingly, it would be desirable to have systems and methods for determining what information is required based on the transactions, and, in some instances, an ability to automatically correct.

Systems and methods for processing global financial transactions


An injection molding machine having two injection units retained in parallel on one heating cylinder retention member, so that nozzles of the two injection units can touch fixed-side molds by advance of the heating cylinder retention member toward the molds. Two nozzle touch rods having their one ends fixed to a fixed die plate mounted with the molds are disposed symmetrically outside the two injection units respectively. Nut pieces screwed down to ball screw shaft portions of the nozzle touch rods respectively are attached to the heating cylinder retention member rotatably. Two servo motors for driving and rotating the two nut pieces respectively and individually are mounted on the heating cylinder retention member. Thus, in the configuration in which the two injection units are retained on the one heating cylinder retention member, the nozzles of the two injection units can touch the molds with predetermined nozzle touch forces respectively in spite of a difference in whole length between the two injection units, which difference is unavoidable in manufacturing.

The present invention relates to a technique concerned with nozzle touch in an injection molding machine in which two injection units are retained in parallel on one heating cylinder retention member.
A twin injection unit type injection molding machine in which two injection units are retained in parallel on one heating cylinder retention member can divide and supply raw resin of one and the same lot into the two injection units. Thus, the raw resin is injected concurrently from the two injection units so that the variation in quality between parts molded concurrently can be made as small as possible. For example, in production of optical disk substrates to be laminated to each other, two optical disk substrates molded concurrently and having small variation in optical performance therebetween can be laminated to each other. Thus, an optical disk superior in quality can be formed.
FIGS. 3 and 4 are diagrams showing the configuration of a twin injection unit type injection molding machine manufactured by way of trial by the present inventors before the present inventors conceived the present invention. FIG. 3 is a partially cutaway plan view of a main portion of the injection molding machine, in which a part of a heating cylinder retention member is omitted. FIG. 4 is a right side view of FIG. 3, depicting the whole outline of the heating cylinder retention member.
In FIGS. 3 and 4, the reference numeral 51 represents a fixed die plate; 52A and 52B, fixed-side molds mounted on the fixed die plate and having one and the same shape; 53, a heating cylinder retention member (head stock); 54A and 54B, heating cylinders having their base portions retained on the heating cylinder retention member 53, disposed in parallel with each other and having one and the same shape; 55A and 55B, nozzles attached to the front ends of the heating cylinders 54A and 54B respectively and having one and the same shape; 56A and 56B, nozzle touch rods disposed bilaterally symmetrically outside the two heating cylinders 54A and 54B respectively, having their one ends fixed to the fixed die plate 51, and having one and the same shape; 56A-1 and 56B-1, ball screw shaft portions of the nozzle touch rods 56A and 56B; 57A and 57B, nut pieces retained rotatably by the heating cylinder retention member 53 and screwed down to the ball screw shaft portions 56A-1 and 56B-1 respectively; 58A and 58B, driven pulleys fixedly attached to the nut pieces 57A and 57B respectively; 59, a servo motor provided for nozzle touch and mounted on the heating cylinder retention member 53; 60, a driving pulley fixedly attached to the output shaft of the servo motor 59; and 61, a timing belt hung among the three pulleys, that is, the driving pulley 60 and the driven pulleys 58A and 58B, and for transmitting the rotation of the servo motor 59 (driving pulley 60) to the driven pulleys 58A and 58B.
In the configuration shown in FIGS. 3 and 4, the rotation of the servo motor 59 for nozzle touch is transmitted to the driven pulleys 58A and 58B through the driving pulley 60 and the timing belt 61, so that the nut pieces 57A and 57B rotating together with the driven pulleys 58A and 58B rotate relatively to the ball screw shaft portions 56A-1 and 56B-1 respectively. Thus, the nut pieces 57A and 57B move linearly along the ball screw shaft portions 56A-1 and 56B-1 respectively so that the heating cylinder retention member 53 and hence the two injection units move linearly together with the nut pieces 57A and 57B.
Nozzle touch of the two injection units is performed as follows. That is, when the nozzles 55A and 55B of the two injection units are separated from the fixed-side molds 52A and 52B so as not to touch them respectively, the servo motor 59 is driven to rotate in a predetermined direction. As a result, due to the aforementioned transmission system, the heating cylinder retention member 53 (two injection units) is driven to advance toward the molds so that the front ends of the nozzles 55A and 55B of the two injection units are pressed onto the peripheries of resin injection holes of the fixed-side molds 52A and 52B respectively (FIG. 3 shows the nozzle touch state). In the nozzle touch state, the servo motor 59 keeps generating predetermined torque so as to retain a predetermined nozzle touch force.
However, in the twin injection unit type injection molding machine in which two injection units are retained in parallel on one heating cylinder retention member 53 as described above, the two injection units indeed have totally the same shape in design, but there is a dimensional error within a tolerance between the paired injection units. Due to the dimensional error, which is unavoidable in manufacturing, there occurs a difference of about 0.1–0.2 mm in whole length between the paired injection units.
When there is a difference in whole length between the two injection units in such a manner, for example, when the whole length of the upper injection unit is longer than the whole length of the lower injection unit in FIG. 3, the nozzle 55A of the upper injection unit touches the mold earlier. Once the nozzle 55A of the upper injection unit is pressed onto the mold with a predetermined nozzle touch force, the power of the servo motor 59 does not act to press the nozzle 55B of the lower injection unit further toward the mold though the nozzle 55B of the lower injection unit has not yet obtained a predetermined nozzle touch force. Thus, the nozzle 55B of the lower injection unit is short of the nozzle touch force. The arrows in FIG. 3 schematically show a difference in nozzle touch force. A relation in force size opposite to the arrowed relation will be established if the whole length of the lower injection unit is longer than the whole length of the upper injection unit. Such a situation is unavoidable due to the configuration in which the driven pulleys 58A and 58B of the two injection units are driven concurrently by the single servo motor 59 for nozzle touch. Thus, once one of the injection units is short of nozzle touch force as described above, there occurs a problem that resin leaks from the front end of the nozzle of the injection unit short of the nozzle touch force.


A pin electronics, which inputs and outputs signal from and to an input/output pin of an electric part, provided in a testing apparatus that tests the electric part; including: a current source which outputs desired electric current; a first voltage generator which generates a desired voltage; and a diode bridge, which is connected to each of the current source, the first voltage generator, and the input/output pin of the electric part, that provides the desired electric current to the electric part and provides the desired voltage to the electric part; wherein: the first voltage generator has a current measuring unit that measures an electric current, which is input from the first voltage generator to the diode bridge.

This patent application claims priority based on a Japanese patent application, H11-282175 filed on Oct. 1st, 1999, the contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a testing apparatus for testing electric parts. More particularly, the present invention relates to pin electronics that input and output signal from and to input/output pins of the electric parts.
2. Description of the Related Art
FIG. 1 shows a block diagram of a conventional testing apparatus 100. The testing apparatus 100 judges whether an electronic part 16 is normal or not by applying a predetermined signal on the electronic part 16. For example, the electronic part 16 is part that performs a predetermined action according to an electric current or a voltage. The electronic part 16 includes not only a semiconductor part constructed by an active element such as an IC (Integrated circuit) or an LSI (Large-Scale Integrated circuit) but also a passive element, and several kinds of sensors. The electronic part 16 further includes a part that accommodates the above mentioned parts, which are coupled with each other, into one package or a part such as a breadboard that realize a predetermined function by mounting the above mentioned parts on a printed substrate.
On the transmission path of a signal from an input/output pin of the electronic part 16 to a driver 20, the testing apparatus 100 has a programmable load 24, a driver 20, a clamp unit 26, and a switch 28. The programmable load 24 provides a predetermined load to the electronic part 16 according to the output value of the electronic part 16. The clamp unit 26 controls a voltage at the input/output pin of the electronic part 16 in order to protect the driver 20, the judging unit 22 and the programmable load 24. The switch 28 connects the electronic part 16 and a DC measuring unit 14 when performing a voltage applying current measuring test, which applies a voltage on the electronic part 16 to measure a current, or performing an electric current applying voltage measuring test, which applies an electric current on the electronic part 16 to measure a voltage.
If the DC measuring unit 14 is provided for all of the input/output pins of the electronic part 16, the magnitude of the circuit becomes large, and thus the DC measuring unit 14 is not provided for all the input/output pins of the electronic part 16. Therefore, the voltage applying current measuring test or the current applying voltage measuring test could not be performed at the same time on the input/output pin of the electronic part 16. Furthermore, a floating capacity increases by providing the DC measuring unit 14 on the transmission path, thus causing a decrease of measuring accuracy at the time of AC testing.
Therefore, it is an object of the present invention to provide a pin electronics and a testing apparatus, which overcomes the above issues in the related art. This object is achieved by combinations described in the independent claims. The dependent claims define further advantageous and exemplary combinations of the present invention.
According to the first aspect of the present invention, a pin electronics, which inputs and outputs signal from and to an input/output pin of an electric part, provided in a testing apparatus that tests the electric part comprises: a current source which outputs desired electric current; a first voltage generator which generates a desired voltage; and a diode bridge, which is connected to each of the current source, the first voltage generator, and the input/output pin of the electric part, that provides the desired electric current to the electric part and provides the desired voltage to the electric part; wherein: the first voltage generator has a current measuring unit that measures an electric current, which is input from the first voltage generator to the diode bridge.
The current source may have a first current source that outputs the desired electric current to the diode bridge and a second current source that inputs the desired electric current from the diode bridge; and the pin electronics may further comprise: a control unit that controls the first current source to output a predetermined electric current and controls the second current source to input the predetermined electric current from the diode bridge when measuring an electric current, which is input to the electric part, by applying a predetermined voltage on the input/output pin. The first voltage generator may be provided corresponding to each of the input/output pins of the electric part.
The pin electronics may further comprise: a clamp unit that compensates for an output value of the electric part; and a comparator, which judges an output voltage output from the electric part; wherein: the clamp unit includes: a second voltage generator which generates a voltage to be provided to the electric part; a current generator which generates desired current; a switch that selects a voltage, which is generated by the second voltage generator, o, a the desired electric current generated by the current generator to be provided to the electric part; and the control unit controls the switch to select the current generator to provide the desired electric current to the electric part and controls the comparator to judge the output voltage when measuring the output voltage by applying the desired electric current on the electric part.
The control unit may stop provision of an electric current provided from the first current-source and the second current source to the diode bridge, when measuring the output voltage by applying the desired electric current on the electric part. The reference voltage source may provide a reference voltage whilst changing the reference voltage one after another, and the comparator compares the reference voltage, which is changed one after another, with the output voltage and judges that the output voltage has a voltage value equal to a voltage value of the reference voltage when the reference voltage matches the output voltage, when measuring the output voltage by applying the desired electric current on the electric part.
According to the second aspect of the present invention, a pin electronics, which inputs and outputs signal from and to an input/output pin of an electric part, provided in a testing apparatus that tests the electric part; comprises: a clamp unit which compensates for an output value of the electric part; wherein: the clamp unit includes: a voltage generator which generates a voltage to be provided to the electric part; a current generator which generates desired current; a switch that selects to provide a voltage, which is generated by the voltage generator, to the electric part or to provide the desired electric current generated by the current generator to the electric part; and the pin electronics further comprises: a comparator, which judges an output voltage output from the electric part; and a control unit that controls the switch to select the current generator to provide the desired electric current to the electric part and controls the comparator to judge the output voltage when measuring the output voltage by applying the desired electric current on the electric part.
According to the third aspect of the present invention, a testing apparatus for testing whether an electric part is normal or not, comprises: a pattern generator that generates a test pattern to be applied to the electric part and an expectation value, which is to be output when the electric part is normal; a pin electronics that outputs the test pattern to the electric part and inputs an output value of the electric part; a comparison unit that compares the expectation value and the output value, which is provided via the pin electronics, and judges whether the electronic part is normal or not; wherein: the pin electronics may have: a current source that outputs desired current; a voltage generator that generates desired voltage; and a diode bridge, which is connected to each of the current source, the voltage generator, and the input/output pin of the electric part, that provides the desired electric current to the electric part and provides the desired voltage to the electric part; and the voltage generator has a current measuring unit that measures an electric current, which is input from the voltage generator to the diode bridge.
According to the fourth aspect of the present invention, a testing apparatus for testing whether an electric part is normal or not, comprises: a pattern generator that generates a test pattern to be applied to the electric part and an expectation value to be output when the electric parts is normal; a pin electronics that outputs the test pattern to the electric part and inputs an output value of the electric part; a comparison unit that compares the expectation value and the output value, which is provided via the pin electronics, and judges whether the electronic part is normal or not; wherein: the pin electronics has: a clamp unit which compensates for an output value of the electric part; and a comparator, which judges an output voltage output from the electric part; wherein: the clamp unit includes: a voltage generator which generates a voltage to be provided to the electric part; a current generator which generates a desired current; a switch that selects whether to provide a voltage, which is generated by the voltage generator, to the electric part or to provide the desired electric current generated by the current generator to the electric part; and the testing apparatus further comprising a control unit that controls the switch to select the current generator to provide the desired electric current to the electric part and controls the comparator to judge the output voltage when measuring the output voltage by applying the desired electric current on the electric part.
This summary of the invention does not necessarily describe all necessary features of the present invention. The present invention may also be a sub-combination of the above described features. The above and other features and advantages of the present invention will become more apparent from the following description of embodiments taken in conjunction with the accompanying drawings.

Pin electronics having current measuring unit and testing apparatus having pin electronics thereof


Deleted property information relating to deleting an item, such as an electronic message, is used for restoring the deleted item. The deleted property information is stored in response to deleting the item. The stored deleted property information identifies a location of where the item was deleted from and may include other information. The location information may be a specific location such as a folder (e.g. inbox, sent, folder 1, . . . ), a calendar, a network location, and the like. In response to a request to restore a deleted item, the deleted property information is used to restore the deleted item to the location where the item was when deleted. A graphical user interface may be used to assist a user in restoring deleted items. The user interface may display a user friendly name (e.g. “Inbox”, “Folder 1”, . . . ) of where the deleted item(s) will be/have been restored.

Users commonly view electronic messages and perform other operations on electronic messages (e.g. forwarding, replying, marking urgent, moving, deleting . . . ). When a user deletes an electronic message, the electronic message may be moved to a deleted items folder. While the user may remove an electronic message from the deleted items folder, they may not remember where the message was originally located.