An irrigation assembly has a main pipeline supported at intervals by mobile towers, a plurality of drop tube assemblies at spaced intervals along the pipeline and a collector positioned to receive water from the drop tube assembly. A plurality of targets are positioned on the ground in the paths of motion defined by the movement of the collectors. The targets may be dishes. Each dish preferably has a perforated drain that penetrates beneath the surface of the ground. Interaction between the collector and the target causes the water stored within the collector to be released into the target. The irrigation assembly may provide for underground irrigation without a collector where a dish or trough receives water from the drop tube assembly and underground drains allow for water to be dispersed below the ground.

The present invention relates to mobile irrigation machines such as those used on agricultural fields for watering planted crops or in greenhouse applications.
Conventional irrigation systems have a main pipeline which is supported at intervals by mobile towers. Spray nozzles are connected at various points along the pipeline. The nozzles may attach more or less directly to the main pipeline or to drop tubes that extend out of the top of the main pipeline and curve downwardly to a nozzle or to the bottom of pipe. Pressure regulators may be interposed between the main pipeline and each nozzle to maintain a regulated water pressure entering each nozzle regardless of undulating terrain or pressure losses along the length of the pipeline. This assures that the nozzles will dispense water at a known rate at each point along the main pipeline.
One problem with current irrigation systems is that the emitted water spray from the nozzle is subject to evaporation loss. As soon as the water becomes airborne from the nozzle, some percentage is lost to the atmosphere by evaporation. Further evaporation can occur after the water lands on the plants or the surface of the ground. The percentage lost can be especially significant during dry seasons or in arid climates. Thus, there is a need for an irrigation system which reduces the effect of evaporation on the emitted water spray.

Mobile irrigation machine with underground water application


A method and system for improving shared hardware and software resource system is provided. The method includes detecting and registering an Internet of things (IOT) device connected to a network. Hardware/software resources and sensors associated with hardware and software operations executed by the IOT device are identified and all available data and associated metadata associated with the hardware/software resources and the sensors are stored in a database. Additional available hardware/software resources and sensors associated with a plurality of IOT devices connected to the network are displayed and a command signal for assigning a specified hardware/software resource or sensor to the IOT device is executed. A network identification code associated with a location of the specified hardware/software resource or sensor is retrieved and enabled with respect to said IOT device.

Accurately detecting device component malfunctions typically includes an inaccurate process with little flexibility. Determining malfunction solutions with respect to recovering device functions may include a complicated process that may be time consuming and require a large amount of resources. Accordingly, there exists a need in the art to overcome at least some of the deficiencies and limitations described herein above.

Shared hardware and software resource replacement

International Business Machines Corporation


An image recording apparatus of the present invention comprises an inkjet head which includes a nozzle plate where a plurality of nozzles that shoot ink are arranged in a column and an ink chamber which retains ink and is connected to the plurality of nozzles, at least one maintenance suction section which has a suction area larger than the nozzles, a suction section driving mechanism which causes the suction area to face the nozzles and moves the suction section relatively in the nozzle arrangement direction, and a positive pressure applying section which applies a positive pressure to the ink chamber. The maintenance suction section sucks in ink near the nozzles as moving in the nozzle arrangement direction, while the positive pressure is being applied to the ink chamber.

1. Field of the Invention
This invention relates to an image recording apparatus with a maintenance unit, and more particularly to an image recording apparatus with suction means for sucking in ink on the nozzle plate of the inkjet head.
2. Description of the Related Art
Inkjet image recording apparatuses have been widely used. This type of image recording apparatus has an ink head which includes an ink supply source, an ink chamber, and a plurality of nozzles serving as ink discharge outlets. The image recording apparatus shoots ink in the ink chamber from the individual nozzles, thereby recording an image.
The nozzles are arranged in a column on the nozzle plate. The nozzle plate has a water-shedding finish, thereby preventing the adhesion of ink. Even when a water-shedding finish has been given, the adhesion of ink cannot be prevented completely, which may permit ink to collect on the nozzle plate.
Therefore, to maintain the stable ink jet characteristic, the image recording apparatus has to remove the unnecessary ink on the nozzle plate. For this reason, the image recording apparatus has a maintenance unit for removing the unnecessary ink adhering to the nozzle plate. Such an image recording apparatus has been disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 5-201028.
In this publication, a maintenance unit 1000 as shown in FIG. 23 has been disclosed for a conventional recording apparatus. The image recording apparatus has a head body 1011 in which a plurality of nozzles 1013 are arranged in a column. On the nozzle forming face of the head body 1011, a water-repellent thin film 1014 is provided.
The maintenance unit 1000 includes a vacuum nozzle 1020, a positioning section 1023, an ink trap section 1026, and a vacuum pump 1027. One end of the vacuum nozzle 1020 is supported by the positioning section 1023 which is capable of moving in the direction in which the nozzles 1013 of the ink jet head are arranged. The other end of the vacuum nozzle 1020 is connected to the vacuum pump 1027 via the ink trap section 1026.
The maintenance unit 1000 causes the positioning section 1023 to scan along the arrangement direction of the nozzles 1013, thereby causing the vacuum nozzle 1020 to face the nozzles squarely one after another. At the same time, the maintenance unit 1000 causes the vacuum pump 1027 to operate, thereby making the pressure of one end of the vacuum nozzle 1020 negative. As a result, the maintenance unit 1000 causes the vacuum nozzle 1020 to suck in the unnecessary ink inside and outside each of the nozzles 1013 one after another.
Generally, in the image recording apparatus, a negative pressure is always applied to the ink chamber 1012 as shown in FIG. 24, except when ink is discharged. In FIG. 24, ink is indicated by reference symbol i. With the negative pressure, the ink in the nozzle 1013 forms a concave meniscus in the nozzle 1013.
The negative pressure is generally set so as to form a meniscus in a specific position in the nozzle. More specifically, the negative pressure is so set that the position where the surface tension of the meniscus balances with the negative pressure comes to the specific position in the nozzle. Since the meniscus is formed by the negative pressure, it is not desirable that ink should be sucked out of the nozzle carelessly.
However, when suction is applied under negative pressure, the ink i in the nozzle 1013 and ink chamber 1012 is sucked into the vacuum nozzle 1020 by suction exceeding the negative pressure in the ink chamber 1012, as shown in FIG. 25. Specifically, the maintenance unit 1000 sucks in ink in such a manner that it draws out ink forcibly from the inner part of the nozzle 1013. As a result, the fluid level of the ink i retreats from the nozzle 1013 into the ink chamber 1012. As described above, since the negative pressure in the ink chamber is set so as to form a meniscus in the nozzle, the fluid level of ink in the ink chamber 1012 moves again so as to go back into the nozzle 1013, even during suction by the vacuum nozzle 1020. When ink is sucked in under negative pressure as described above, the fluid level of ink moves unstably between the nozzle 1013 and the interior of the ink chamber 1012. As a result of the movement, the ink i pulls air into the ink chamber 1012.
When air has been pulled into the ink chamber 1012, there is a danger that the air will remain in the ink chamber 1012 in air bubbles. Since air bubbles cause pressure loss in the ink chamber 1012, there is a possibility that the inkjet head will lose the desired ink shooting characteristic.

Image recording apparatus with maintenance unit


A mode setting signal generating circuit activates mode setting signals in accordance with external signals. A test mode activating signal generating circuit takes in an externally applied address signal Add as the mode setting signals are activated, and drives a test mode activating signal to the active state in accordance with the state thereof. As power on detection signal from a power on detection circuit is activated, test mode activating signal is reset to the initial state, and a reset circuit holds the test mode activating signal at the inactive state, in accordance with imperfect activation of the power on detection signal. Internal state is prevented from erroneously set to a test mode state, even when power on detection signal is imperfectly generated at the time of power on.

1. Field of the Invention
The present invention relates to a semiconductor memory device and, more specifically, to a structure of a portion generating a test mode activating signal for placing the semiconductor memory device in a test mode. More specifically, the present invention relates to a structure for initializing the test mode activating signal generating portion at the time of power on.
2. Description of the Background Art
In semiconductor memory devices such as synchronous semiconductor memory devices, various tests are performed to ensure reliability of the products. Such tests include a screening test for revealing latent defects and screening out a defective product having initial failure at the time of marketing, and a multibit test mode for testing a plural bits of memory cells simultaneously for detecting absence/presence of defects of memory cells in a short period of time. The screening test has a burn in mode in which a semiconductor memory device is operated under a condition of higher temperature and higher voltage than the normal operating condition. These test modes are operation modes performed before marketing of the products, and these test modes are not utilized in a system which is actually used by a user.
When the semiconductor memory device enters a test mode in a system in which the semiconductor memory device is actually used, the internal state of the semiconductor memory device changes from the state in a normal operation mode, possibly causing malfunction. In order to prevent the semiconductor memory device from entering the test mode in actual use, generally, the test mode is set by a combination of states of a plurality of external signals which is not used in the normal operation mode in actual use. However, there are nodes of which initial output voltage cannot be determined in advance such as those in a latch circuit or a flipflop, or internal nodes which are floating, in the internal circuitry at the time of power on (at the start of application of power supply voltage to the semiconductor memory device). Therefore, the voltages of these internal nodes are non-predictable at the time of power on. In this case, if a timing condition allowing entrance to the test mode is met because of the voltage level of those nodes of which voltage levels are non-predictable (that is, of which voltage levels cannot be determined in advance after power on), the semiconductor memory device may possibly enter the test mode. In order to surely reset the non-predictable voltage levels of the internal nodes, a power on detection signal POR is used for resetting the non-predictable node(s) to a prescribed voltage level at the time of power on.
FIG. 13 schematically shows a structure of a conventional test mode activating signal generating circuit. Referring to FIG. 13, a test mode activating signal generating circuit 100 includes a tristate inverter buffer 100a which is enabled when mode set instructing signals MSET and ZMSET are activated, for inverting an externally applied specific address signal bit Add, buffering and transmitting it to an internal node NA, and a test mode activating signal output circuit 100b for outputting a test mode activating signal TME in accordance with the voltage of internal node NA and for latching the test mode activating signal TME when mode set instructing signals MSET and ZMSET are activated. Tristate inverter buffer 100a is set to an output high impedance state when mode set instructing signals MSET and ZMSET are inactivated.
Test mode activating signal output circuit 100b includes an inverter 100ba for inverting a signal on node NA for transmission to a node NB to generate test mode activating signal TME, and a tristate inverter buffer 100bb which is activated when mode set instruction signals MSET and ZMSET are activated, for transmitting a signal on node NB to node NA. Tristate inverter buffer 100bb is also set to an output high impedance state when mode set instructing signals MSET and ZMSET are inactivated.
Test mode activating signal generating circuit 100 further includes a p channel MOS transistor 102 responsive to activation of power on detection signal ZPOR for electrically connecting a power supply node NV to internal node NA. Power on detection signal ZPOR is kept at an active state of L level until the power supply voltage Vcc is applied to power supply node NV and voltage level at the node NV attains to a prescribed voltage level or attains to a stable state.
Operation of test mode activating signal generating circuit 100 shown in FIG. 13 will be described with reference to FIG. 14, which is a timing chart thereof.
In a synchronous semiconductor memory device, an operation mode is designated by a combination of states of external signals at a rise of a clock signal CLK. In a clock cycle #a, at a rising edge of clock signal CLK, row address strobe signal ZRAS, column address strobe signal ZCAS and write enable signal ZWE are all set to the L level. This state is referred to as a mode set command, which designates a mode different from the normal operation mode. When the mode set command is applied, a specific address signal bit Add is set to the H level.
When the mode set command is applied, mode set instructing signal MSET is set to and kept at the H level for a prescribed time period, and tristate inverter buffer 100a shown in FIG. 13 operates so that address signal bit Add is inverted and transmitted to internal node NA. The signal transmitted to internal node NA is inverted and transmitted to internal node NB by inverter circuit 100ba, and test mode activating signal TME attains to the H level. In test mode activating signal generating circuit 100b, tristate inverter buffer 100bb operates complementarily to tristate inverter buffer 100a, so that when mode set instructing signal MSET attains to the inactive state of L level, tristate inverter buffer 100bb is set to an operative state, and thus inverter 100ba and tristate inverter buffer 100bb constitute a latch circuit. Test mode activating signal TME is held at the active state of H level.
When test mode activating signal TME is set to the active state of H level in clock cycle #a, the semiconductor memory device enters the test mode (test mode entry). Thereafter, from the next clock cycle #b, a prescribed test operation is performed (test cycle period). In the test cycle period, tristate inverter buffer 100a is at an output high impedance state, tristate inverter buffer 100bb operates as an inverter, and therefore test mode activating signal TME is held at the H level.
When the test operation activated by the test mode activating signal TME is completed in clock cycle #c, the mode set command is again applied in clock cycle #d, and the mode set instructing signal MSET attains to and kept at the H level for a prescribed time period. Tristate inverter buffer 100a is set to an operative state, while tristate inverter buffer 100bb is set to the output high impedance state. Consequently, a signal at the H level is transmitted to internal node NA and, in response, test mode activating signal TME attains to the inactive state of L level. When mode set instructing signal MSET falls to the L level, tristate inverter buffer 100a attains to the output high impedance state, tristate inverter buffer 100bb is set to the operative state and the test mode activating signal TME is held at the L level. Consequently, the test mode is reset and thereafter, operation of another mode is performed.
The above described operation takes place when power supply voltage Vcc is turned on and the power supply voltage Vcc attains a stable state. The operation of test mode activating signal generating circuit 100 at the time of power on will be described.
At the time of power on, tristate inverter buffer 100a is at the output high impedance state, and test mode activating signal generating circuit 100b constitutes a latch circuit. In this state, voltage level of internal node NA in the initial state is determined by the state of the latch circuit (inverter 100ba and tristate inverter buffer 100bb) at the time of power on.
Now, when power supply voltage is turned on at time t0 as shown in FIG. 15, the power supply voltage Vcc on node NV rises gradually. The latch state of test mode activating signal generating circuit 100b is not predictable at the time of power on, and therefore the voltage levels of internal node NA and test mode activating signal TME are not predictable either (in FIG. 15, the voltage levels are shown as gradually rising, by dotted lines). This is because inverter 100ba and tristate inverter buffer 100bb are both in transient region in the initial state, consuming through current, so that output voltage levels thereof are non-predictable.
Until the power supply voltage Vcc attains to a prescribed voltage level at time t1, power on detection signal ZPOR is kept at L level, p channel MOS transistor 102 is rendered conductive in response, and internal node NA is electrically connected to power supply node NV. By the conduction of MOS transistor 102, the voltage level of internal node NA is set to the H level, initial state of the latch state of the test mode activating signal generating circuit 100b is set, internal node NA attains to the H level and internal node NB attains to the L level.
At time t1, even when power on detection signal ZPOR rises to the H level and MOS transistor 102 is rendered non-conductive, voltage levels of internal nodes NA and NB vary because of the latch circuit including inverter 100ba and tristate inverter buffer 100bb, such that internal node NA rises to the H level as the voltage level of power supply voltage Vcc increases, while test mode activating signal TME from node NB falls to the L level as the voltage level of internal node NA rises. Consequently, when the power supply voltage Vcc finally attains to the prescribed voltage level Va, internal node NA attains to the H level corresponding to the level of voltage Va, and test mode activating signal TME is held at the L level which corresponds to the ground level of the ground voltage GND. At the time of power on, the test mode activating signal generating circuit can be reset to a desired initial state, and hence erroneous activation of test mode activating signal TME at the time of power on can be prevented.
FIG. 16 shows an example of a conventional power on detection circuit. Referring to FIG. 16, the power on detection circuit includes a p channel MOS transistor P1 connected between a node S1 and a power supply node NV and having a gate connected to a node S2; a resistance element Z1 having one end connected to node S1; an n channel MOS transistor Q1 connected between the other end of resistance element Z1 and a ground node and having a gate connected to node S2; a coupling capacitance CP1 connected between power supply node NV and node S1; an n channel MOS transistor Q2 connected between node S2 and ground node and having a gate connected to node S1; and a p channel MOS transistor P2 and a resistance element Z2 connected in series between power supply node NV and node S2. The gate of p channel MOS transistor P2 is connected to node S1. A capacitance element CP2 is further provided for stabilizing the voltage level of node S2, between node S2 and the ground node.
The power on detection circuit further includes three stages of cascaded inverters IV1, IV2 and IV3 for receiving and inverting a signal on node S2 for transmission to node S3, a coupling capacitance CP3 connected between node S3 and power supply node NV; an inverter IV4 inverting a signal potential on node S3 for transmission to node S4; and two stages of cascaded inverters IV5 and IV6 for outputting power on detection signal ZPOR in accordance with a signal potential on node S4.
The power on detection circuit further includes a p channel MOS transistor P3 and a resistance element Z3 connected in series between power supply node NV and a node S5. The gate of p channel MOS transistor P3 is connected to node S4.
The power on detection circuit further includes an n channel MOS transistor Q3 connected between node S5 and the ground node and having a gate connected to node S4; a capacitance element CP4 connected between node S5 and the ground node; p channel MOS transistors P4 and P5 connected in series between nodes S5 and S6; an n channel MOS transistor Q4 connected between node S6 and the ground node and having a gate connected to node S4; and an n channel MOS transistor Q5 connected between node S1 and the ground node and having a gate connected to node S6. Each of p channel MOS transistors P4 and P5 has its gate and drain connected, and functions as a voltage lowering element. Operation of the power on detection circuit shown in FIG. 16 will be described with reference to the diagrams of operational waveforms of FIGS. 17 and 18.
Referring to FIG. 17, operation when power on detection signal ZPOR is generated normally will be described. Power is turned on at time t0, and the voltage level of power supply voltage Vcc at power supply node NV rises. As the power is turned on, because of capacitive coupling of capacitance element CP1, the voltage level of node S1 rises in response, n channel MOS transistor Q2 is rendered conductive, and p channel MOS transistor P2 is rendered non-conductive. As n channel MOS transistor Q2 is rendered conductive, node S2 is held at the level of the ground voltage. Consequently, by inverters IV1 to IV3, the voltage level of node S3 rises to the H level in accordance with the level of the power supply voltage. Node S3 has its voltage level reset at the H level at the time of power on because of capacitive coupling of capacitance element CP3, and accordingly, the signal level output to node S4 is set to the L level by inverter IV4, and power on detection signal ZPOR is held at the L level.
While the node S4 is at the L level, p channel MOS transistor P3 is conductive, and in accordance with a time constant defined by resistance element Z3 and capacitance element CP4, the voltage level of node S5 rises moderately. When the voltage level of node S5 exceeds threshold voltages of MOS transistors P4 and P5, the voltage of node S6 begins to rise. When the voltage level of node S6 becomes higher than the threshold voltage of MOS transistor Q5, MOS transistor Q5 is rendered conductive and node S1 is discharged to the L level.
As the voltage level at node S1 lowers, p channel MOS transistor P2 is rendered conductive, and voltage level at node S2 rises in accordance with a time constant determined by resistance element Z2 and capacitance element CP2. As the voltage level of node S2 rises, p channel MOS transistor P1 is rendered non-conductive, and the voltage level of node S1 is surely discharged to the L level. As the voltage level of node S1 lowers, MOS transistor Q2 is rendered non-conductive, and node S2 rises to the H level as the voltage level of power supply voltage Vcc rises. When the voltage level of node S2 exceeds an input logic threshold voltage of inverter IV1, node S3 is discharged and the voltage level thereat is lowered, and in response, the voltage level of node S4 rises. As the level of node S4 rises, power on detection signal ZPOR rises to the H level.
When the voltage level of node S4 rises, p channel MOS transistor P3 is rendered non-conductive, n channel MOS transistors Q3 and Q4 are rendered conductive, nodes S5 and S6 are discharged to the level of the ground voltage and MOS transistor Q5 is rendered non-conductive. As a result, as the voltage level of node S2 rises, MOS transistor Q1 is rendered conductive, and node S1 is held at the L level. By a loop of MOS transistors P2, Q1 and resistance elements Z1 and Z2, node S2 is held at the H level which corresponds to the voltage level of power supply voltage Vcc and, in response, power on detection signal ZPOR is also held at the H level.
From time point t0 when the power is turned on to the time point t1 when power on detection signal ZPOR rises to the H level, power on detection signal ZPOR is at the L level and in this period, internal nodes are reset. More specifically, power on detection signal ZPOR is set to the inactive state of H level when the power supply voltage Vcc attains a prescribed voltage level or a certain voltage level and becomes stable.
Referring to FIG. 18, operation when power on detection signal ZPOR is output imperfectly (with no active state) will be described.
As shown in FIG. 18, power is turned on at time t0 and the voltage level of power supply voltage Vcc increases. The speed of increase of the voltage level of power supply voltage Vcc is moderate. In this case, voltage levels of nodes S1 to S6 are not-defined. Conduction/non-conduction of MOS transistors are not established, speed of increase of voltage levels derived from capacitive coupling of capacitance elements CP1 and CP3 are quite moderate, and internal nodes are not able to shift voltage levels from the undetermined state to the established state. Therefore, in this state, when the voltage level, which is not predictable and non-defined, of internal node S4 is determined to be at the H level, power on detection signal ZPOR output through inverters IV5 and IV6 has its level increased as the voltage level of power supply voltage Vcc increases. When the voltage level of power supply voltage Vcc attains to a prescribed voltage level, voltage levels of those of internal nodes S1 to S6 which have attained to the H level surely increase, and nodes S1 to S6 are driven to prescribed voltage levels respectively.
The voltage level to which each node is driven is determined by the state of conduction/non-conduction of the MOS transistors. In FIG. 18, an operation sequence in which MOS transistor Q1 discharges node S1 to the level of the ground potential as the voltage of node S2 increases, is shown as an example. In this state, node S2 is charged through MOS transistor P2, its voltage level increases to the H level, node S3 is driven to the L level in response, and the voltage of node S4 is driven to the H level. When node S4 is driven to the H level, nodes S5 and S6 are also driven to L level.
Accordingly, in the operation sequence shown in FIG. 18, power on detection signal ZPOR has its voltage level increased in synchronization with the power supply voltage Vcc. Therefore, there is not a period in which power on detection signal ZPOR is held at the L level, and therefore reset operation for holding internal non-predictable nodes at prescribed initial voltages level is impossible.
When the speed of rise of power supply voltage Vcc is slow and power on detection signal ZPOR is generated imperfectly as shown in FIG. 18, the following problem arises.
More specifically, referring to FIG. 19, power is turned on at time t0, and in response, voltage level of power on detection signal ZPOR increases. Meanwhile, nodes NA and NB shown in FIG. 13 have the voltage levels not predictable in the initial state, and the voltage levels are determined by the state of latching of test mode activating signal generating circuit 100b. Therefore, when power on detection signal ZPOR has the voltage level thereof increased in accordance with the power supply voltage Vcc, then MOS transistor 102 is non-conductive and whether the voltage levels of nodes NA and NB assume H level or L level is determined dependent on the voltage levels of nodes NA and NB at that time. Therefore, when the power supply voltage Vcc attains to a prescribed voltage level or higher and the latch circuit of test mode activating signal generating circuit 100b enters the latch state, there are two states, i.e., one in which the signal at node NA attains to the H level and the signal at node NB, that is, test mode activating signal TME attains to the L level, and another in which the voltage level at node NA attains to the L level and test mode activating signal TME attains to the H level.
The test mode activating signal TME at the H level means that test mode is to be performed in the semiconductor memory device, and in normal operation mode, there is a possibility of malfunction.
In a standard DRAM (Dynamic Random Access Memory), a dummy cycle is provided for setting internal signal lines and internal nodes to prescribed initial states. However, what is done in the dummy cycle is simply to toggle the row address strobe signal/RAS several times, which means that only RAS related circuitry (circuitry related to the signal RAS, including circuits related to row selection) operates, and peripheral circuitry including the test mode activating signal generating portion is not reset.
In an SDRAM (Synchronous DRAM), a normal mode set cycle is performed in which special operation modes other than the normal operation mode (operation mode for data reading/writing) are all reset. If such a special normal mode set cycle is prepared, it is possible to reset the erroneously set test mode activating signal TME to the initial state. However, one of the test modes in which operation margin and operation characteristics are tested by externally applying a bias voltage VBB to a semiconductor substrate region, which is referred to as VBB application mode, cannot be reset even by the normal mode set cycle.
FIG. 20 schematically shows a circuit structure for performing VBB application mode. Referring to FIG. 20, the circuit for implementing VBB application mode includes VBB generating circuit 120 which is set to an operative state when test mode activating signal TME is inactive, for generating a bias voltage of a prescribed voltage level, and a selector 122 for selecting bias voltage from VBB generating circuit or an external voltage Ex applied from an external terminal 121 in accordance with test mode activating signal TME. The voltage from selector 122 is applied to a substrate region 123 of the semiconductor memory device. Substrate region 123 is a P type semiconductor substrate region and at the surface of substrate region 123, N type impurity regions 124a and 124b having high concentration are formed apart from each other. Between impurity regions 124a and 124b, a gate electrode layer 125 is formed with a gate insulating film underlaid. Thus one MOS transistor is provided in FIG. 20.
Generally, the substrate region 123 is formed of a well region or an epitaxial layer and a negative bias voltage is applied thereto.
When test mode activating signal TME is inactive, selector 122 selects and applies to substrate region 123 the bias voltage generated by VBB generating circuit 120. When test mode activating signal TME is active, selector 122 selects and applies to substrate region 123, the external voltage Ex applied from external terminal 121. Substrate bias voltage VBB stabilizes threshold voltage of the MOS transistor formed at the surface of the substrate region (transistor consisting of impurity regions 124a and 124b and gate electrode layer 125), and realizes high speed operation by reducing junction capacitance between substrate region 123 and impurity regions 124a and 124b.
The threshold voltage of the MOS transistor is represented as a function of a root of an absolute value of substrate bias voltage VBB. When the absolute value of bias voltage VBB increases, the threshold voltage of the MOS transistor increases. When the absolute value of the bias voltage VBB becomes smaller, the threshold voltage of the MOS transistor becomes smaller.
At the surface of substrate region 123, MOS transistors constituting the semiconductor memory device are formed. At the time of power on, when test mode activating signal TME is activated, selector 122 selects the external voltage Ex at external terminal 121. To external terminal 121, an external control signal (for example, row address strobe signal ZRAS or a column address strobe signal ZCAS) is applied in the normal operation mode. Therefore, at the time of power on, the external voltage Ex is at the ground voltage level or at the voltage level of the power supply voltage Vcc. When the external voltage Ex at the level of the ground voltage is selected and applied to substrate region 123, the threshold voltage of the MOS transistor becomes smaller and the MOS transistor, which is to be off, turns on. Therefore, even if normal mode set cycle is performed in the synchronous semiconductor memory device, internal nodes and internal signal lines cannot be set to the prescribed initial voltage levels as the transistor characteristic is different (which means that internal circuitry does not operate normally but malfunctions), and therefore data cannot be written or read correctly. There is also a possibility that a command decoder for decoding the externally applied normal mode set command does not operate normally, output of the normal mode set signal fails and, eventually, internal resetting is impossible.
When the external voltage Ex of external terminal 121 shown in FIG. 20 is set at the H level, the voltage level corresponds to the level of the power supply voltage Vcc. Therefore, when one of the impurity regions 124a and 124b is connected to the ground node, the substrate region 123 and the impurity region 124a or 124b is biased in forward direction, a large substrate current flows from external terminal 121 through selector 122, substrate region 123 and impurity region 124a or 124b, a larger current flows at a portion, not shown, by a latch up phenomenon caused by the large substrate current, and the semiconductor memory device may possibly run away. Further, it is possible that the large current causes disconnection of a line by heat (electromigration), eventually destroying the memory device.

Semiconductor memory device surely reset upon power on


In at least one embodiment, an apparatus (1) that comprises a compression sleeve element (2) established at least partially around portions of a first elongated member (6) that telescopes from a larger elongated member (8) in which it may nest. A relative motion obstruction element (4) may disallow only certain types of motion, e.g., rotational and axial, of the compression sleeve element relative to the elongated members around which it may be at least partially established. As it may be the compression enhancement element (3) —which may be used to generate a retaining compression force element—that prevents perpendicular displacement of the compression sleeve element, deactivation and effective disengagement of the compression enhancement element may allow for a quick removal of the compression sleeve element without requiring that it be slid off an end of either elongated member.

Some considerations relative to the use of telescoping member retention apparatus will be discussed to facilitate an understanding of the relevant technology. Telescoping members, often but not always telescoping tubes, frequently are found with apparatus that enable the retention of the two members in a desired relative position. Indeed, there are many such retention apparatus. But prior art apparatus, as evolved as they may be, still are not without their problems. Whether the problems that inhere in such technology relate to limitations associated with adequately securing the apparatus to the larger member in which the smaller member is nested (whether while the apparatus is operating to relatively retain the members or while the apparatus is in an adjustment configuration), and/or have a complexity of design that compromises operation, durability or repair speed, prior art apparatus often leave users dissatisfied. Certain embodiments of the present inventive technology may solve one or more of these problems, or at least relieve them to a noticeable extent.

Telescoping member methods and apparatus


A portable power grinder comprises a housing (11), a rotation motor (10) with a rotor (13) having a rear end portion (27) extending out of the motor (10), an output shaft (22) which is drivingly coupled via a reduction gearing (23) to the rotor shaft (13) and intended to carry a grinding tool, and a speed governor (18) for providing a constant motor speed. The reduction gearing (23) comprises a gear (24) integral with the rotor shaft (13) and another gear (25) integral with the output shaft (22). Alternative rotor shafts (13) with gears (24) of different sizes may replace each other for obtaining different gear ratios and different output speed levels, and the length of the rear end portion (27) of the rotor shafts (13) varies with the size of the integral gear (24). The housing (11) has a detachable lid (15) carrying the speed marking (2) of the tool and having an internal projection (28) of a size directly related to the speed level readable on the speed marking (21). The rear rotor shaft end portion (27) has a shape directly related to the maximum speed level provided by the actually fitted rotor shaft (13), and the lid projection (28) matches such rotor shaft end portions (27) only that correspond to gear ratios providing output speeds equal to or lower than the speed marking level.

This invention concerns a portable power grinder of the type including a housing, a rotation motor with a rotor shaft having a rear end portion extending out of the motor, an output shaft drivingly coupled to the motor rotor and intended to carry a grinding tool, and a speed governor for providing a constant motor speed.
A serious problem to deal with at in rotating power grinders is the risk for accidentally reaching overspeed and a resulting fast disintegration or blowing up of the grinding wheel. This may occur as a result of malfunction of the speed governor of the grinding tool or, perhaps more commonly, as a result of using a grinding wheel intended for a much lower maximum speed.
One reason why an improper grinding wheel may be mounted on the output shaft is that the maximum speed marking on the tool housing is incorrect. The marking may not inform of the maximum speed level provided by the speed limiting means actually mounted in the tool. Most suppliers of power grinding tools offer a number of different speed limiting means fitting into the same tool housing but providing different maximum speed levels, and if a tool is assembled with a speed limiting means which provides a higher maximum speed level than what is informed of by the tool housing marking, there is a great risk that the grinding wheel attached to the output shaft will not withstand the inertia forces generated at this higher speed level.
It is an object of the invention to create a solution to the above problem by providing an improved power grinder design which ensures that the maximum speed level provided by the speed limiting means does not exceed the speed level informed of by the tool housing marking.
A previously known power grinder having a speed marking which safely corresponds to the speed limiting means actually fitted in the tool housing is shown in U.S. Pat. No. 4,444,272. In this prior art tool, the speed marking is located on top of a non-rotating cup-shaped member forming an integral part of the speed governor and overspeed safety device of the tool. This cup-shaped member is exposed through an aperture in the tool housing such that the speed marking is readable from outside the housing.
This known speed marking arrangement, however, is restricted in its applicability to power grinders having fly-weight actuated speed governors and overspeed safety devices which are mounted at the rear end of the motor shaft.
This restricted applicability is a drawback which is avoided by a power grinder according to the invention.
Other features and advantages of the invention appear from the following specification and claims.


A cultivation system made up of multiple units, with each unit having an upper root compartment, a lower solution compartment, and a base. A growing solution is conducted into each unit via a supply conduit in the base and sprayed into the root compartment, after which it is drained into the solution compartment and then into drain conduits in the base.

Soil-free systems for growing plants include hydroponic systems and aeroponic systems. In hydroponic systems, the roots of cultivated plants are suspended in a nutrient solution, while in aeroponic systems plant roots are generally suspended in the air and provided with a nutrient solution by spraying. Both types of systems avoid the use of soil or an aggregate medium.
The basic principle of aeroponic growing is to grow plants suspended in a closed or semi-closed environment by spraying the plant's roots and lower stem with an atomized or sprayed, nutrient-rich aqueous solution. The leaves and crown of growing plants extend above the roots, and for larger plants, trellising is used to suspend the weight of vegetation and fruit.
Both hydroponic and aeroponic systems, however, have disadvantages, including cost, scalability, and limitations on the variety of plants that can be cultivated. In view of the shrinkage of arable land in the world and significant population growth, improved soil-free cultivation methods are needed.


A method and apparatus for associating metric information with an abstracted link of an abstracted network map that includes certain network elements (NEs) of a data transport network involves computing routes through the data transport network between the NEs of the abstracted network map. The routes may be computed using the shortest widest path algorithm. The routes from an NE are exchanged with the other NEs of the abstracted network map, so that an edge NE receives the resource availability information of all optimal routes between pairs of NEs in the abstracted network map. The edge NE then transforms the resource availability of a corresponding optimal route into metric information of an abstracted link. The metric information is sent to a client associated with the abstracted network map to permit the client to make routing decisions.

Today's networks are formed of a number of network elements (NEs) interconnected by links (frequently optical fiber links). The links interconnecting the NEs may be arranged in one of a number of ways, resulting in various network topologies, such as ring, star, linear, and full-mesh topologies. It is also common for different autonomously managed subnetworks to be bridged to each other at various gateways, and for data transport services to be provided across the networks in a manner that is transparent to users.
Typically, data transport service provider networks serve client networks of limited geographic footprint, and the provider networks interconnect disparate client networks, generally providing longer haul data transport. In recent years for numerous reasons, including scalability, security, privacy, and simplicity of routing, provider networks have recognized value in presenting abstracted representations of their topologies to client NEs. For various reasons involving service level agreements and other contracts between managers of the data transport service providers and client networks, a current composition of the provider network, and numerous other factors, one of many possible abstracted network maps representing at least a few NEs of the provider network and a portion of the data transport capacity between the represented NEs, is created and disseminated to selected client network elements. Such an abstracted network map includes nodes representing corresponding NEs. Typically, only the NEs relevant to the client network are represented. For example, every edge provider NE (a NE of the provider network that is connected by a link to a client network NE) in the network may be represented. The abstracted network map may further include tandem network elements of the provider network, in order to reduce a number of links in the abstracted network map.
As noted, the reasons for presenting the abstracted view of the provider network include that many complicated details of allowable routes and network availability may be irrelevant to client NEs when determining routes, and to permit scalability of the provider network. The number of NEs represented in an abstracted network map is typically fewer than (and may be significantly fewer than) a number of NEs in the provider network. By presenting an abstracted network map with relatively few nodes and corresponding abstracted edges therebetween, searching and comparing available routes across the abstracted network maps becomes faster. In the foreseeable future there may be hundreds or thousands of PNEs in provider networks. The efficiency of using abstracted network maps is therefore becoming a necessity. Furthermore, only changes in network topology and connectivity that affect the NEs represented in the abstracted network map require changes in the corresponding abstracted network map. Other changes may require updating of metric information regarding abstracted links, but do not require changing the abstracted network map, which considerably facilitates changes in the configuration of the provider NEs.
Abstracted network maps may be associated with a route planning procedure that compensates for transmission level routing constraints such as those taught in co-pending co-assigned United States patent application entitled METHOD AND APPARATUS FOR DERIVING ALLOWABLE PATHS THROUGH A NETWORK WITH INTRANSITIVITY CONSTRAINTS filed Oct. 24, 2003 under Ser. No. 10/691,517, and United States patent application entitled METHOD AND APPARATUS FOR DERIVING OPTIMAL PATHS THROUGH A NETWORK SUBJECT TO A SUBSET SEQUENCE CONSTRAINT filed on Feb. 27, 2004 under Ser. No. 10/787,107. These and other route planning procedures (including some that are variations of Dijkstra's algorithm) require abstracted link metric information correctly associated with resource availability of the provider network, in order to correctly select optimal routes. However, no procedure for computing link metric information for abstracted network links (i.e. links in the abstract network map between NEs that may not be linked in the provider network, but rather represent a set of all available routes through the provider network between the represented NEs) is known.
Accordingly there remains a need for a method for computing metric information for abstracted links of an abstracted network map, the metric information corresponding to resource availability of an underlying network, so that the metric information can be used for route planning.

Method and apparatus for computing metric information for abstracted network links


Systems and methods of automatically distilling concepts from math problems and dynamically constructing and testing the creation of math problems from a collection of math concepts comprising: providing a user interface to a user; receiving as input: a math problem; one or more math concepts; and/or a user data packet; extracting and compiling a concept cloud of one or more CLIs that comprise the mathematical concepts embodied in the input, describe the operation of the one or more math concepts, or relate to the UDP, respectively; generating one or more math problem building blocks from the concept cloud CLIs; applying a mathematical rules engine to the one or more math problem building blocks to build one or more additional math problems; and returning to the user, through the user interface, the one or more additional math problems built from the CLIs that define the concept cloud extracted from the input.

The present subject matter relates generally to systems and methods of automatically distilling concepts from math problems and dynamically constructing and testing the creation of math problems from a collection of math concepts. In addition, the present subject matter provides systems and methods of using branching algorithms to test and map a user's skills.
Teachers and students approach the study of mathematics with widely divergent skill sets and are required to work with textbooks and supplementary materials selected by their school, school district, state, or perhaps national department of education. These conditions can make it difficult to consistently achieve world-class results for all students at any grade level for any given math subject.
In math education, many discussions lead by teachers and explanations written in textbooks skip or gloss over the intermediate concepts required for a student to progress from concept a to concept n. As a result, many talented students may question their natural talent for mathematics simply because their intuition is thrown off by the missing steps. This leads to the unfortunate situation in which students who in fact possess a natural talent believe themselves not to be cut out for mathematics.
Math education materials tend to exhibit five kinds of information gaps described herein as Speed Bumps, Y-Intersections, Potholes, Gaps, and Chasms (collectively and generically referred to as "Gaps"). Gaps, in the generic sense of the term, can be interruptions to the contiguous flow of math concepts presented in textbooks, course lectures, or discussions, often characterized by one or more skipped steps, concepts, or insights that may not be specifically stated or clearly explained. In order of least severe to most severe, Speed Bumps can be characterized by descriptions or explanations that are poorly written. Y-Intersections can be characterized by descriptions or explanations that may be interpreted in more than one way, any one of which may or may not work for the current objective but one of which can support continued growth in mathematical skills. Potholes can be moderate interruptions to the flow of math concepts characterized by a lack of information or by unclear or misleading descriptions. Gaps—in the more specific application of the term—can be incidents of one or more skipped steps or concepts or insights that may not be made explicit or that are poorly explained. Chasms can represent the most severe breaks in the otherwise contiguous flow of math concepts as they may be characterized by the absence of a complement of concepts that comprise one or more topics. As successful system or method for addressing math education should be adapted to effectively address each of these types of Gaps.
While most easily described as an issue relating to education, addressing Gaps in mathematics knowledge can be important to people outside of a purely educational context. Identifying and improving people's math skills can be important in personal and professional development as well.
Accordingly, there is a need for systems and methods of automatically distilling concepts from math problems and dynamically constructing and testing the creation of math problems from a collection of math concepts, as described and claimed herein.

Systems and methods for automatic distillation of concepts from math problems and dynamic construction and testing of math problems from a collection of math concepts


An improved process for converting oligomers of alphahydroxycarboxylic acids, such as glycolic and lactic acid, to dimeric cyclic esters, such as glycolide and lactide. The continuous process is conducted at reduced pressures and depolymerizing temperatures in a heated columnar depolymerization zone, coupled with an essentially unheated receiver for unconverted oligomer. By feeding the oligomer to the upper end of the column while coordinating the feed rate with the depolymerization temperature such that a fraction of the oligomer is converted to a vapor product stream containing the cyclic ester and another fraction of the oligomer exits the column at its lower end and passes to the receiver vessel, the dimeric cyclic ester is produced at high production rates and the oligomer is subjected to minimal thermal stress.

1. Field of the Invention
This invention relates to an improved process for converting oligomers of alpha-hydroxycarboxylic acids, such as glycolic and lactic acid, to dimeric cyclic esters, such as glycolide and lactide. More particularly, the invention relates to a continuous process conducted at reduced pressures and depolymerizing temperatures in a heated columnar depolymerization zone, coupled with an essentially unheated receiver for unconverted oligomer, whereby dimeric cyclic ester is produced at high production rates and the oligomer is subjected to minimal thermal stress.
2. Description of the Related Art
Dimeric cyclic esters of hydroxycarboxylic acids such as glycolide (1,4-dioxane-2,5-dione) and lactide (1,4-dioxane-3,6-dimethyl-2,5-dione), are intermediates to high molecular weight poly (hydroxycarboxylic acids) which may be useful in biomedical and other applications because of their ability to be degraded biologically and hydrolytically to form physiologically and environmentally acceptable by-products.
The preparation of the dimeric cyclic esters of alpha-hydroxycarboxylic acids is an old and much studied process. One such scheme comprises first preparing an oligomer of the hydroxy carboxylic acid, i.e., a relatively short-chain condensation polymer thereof, then heating the polymer under reduced pressure to generate the desired cyclic ester, see for example: Gruter et al., U.S. Pat. No. 1,095,205 (1914); Lowe, U.S. Pat. No. 2,668,162 (1954); Selman, U.S. Pat. No. 3,322,791 (1967); Schmitt et al., U.S. Pat. No. 3,597,450 (1971); and Bellis, U.S. Pat. No. 4,727,163 (1988).
The above processes, spanning over 70 years of technology, involve heating the high-boiling polymeric intermediate under distillation conditions whereby the polymer thermolizes/depolymerizes to the move volatile cyclic ester, which distills from the reaction mass. Such processes suffer in that they require hours of reaction time at high temperatures for the conversion of the polymeric intermediate to the cyclic ester. Further, the rather long residence times at the high temperatures employed often result in side reactions, leading, for example, to unwanted isomers, charring of the polymer and consequently difficult to handle reactor heels.
A more recent patent, Muller, U.S. Pat. No. 5,053,522, discloses continuous and semi-continuous processes for the preparation of L-lactide: initially a quantity of L-polylactic acid (oligomer) and catalyst are added to a reactor, the reactor is heated under reduced pressure to operating temperatures and the L-lactide formed is distilled off. After a certain quantity of the product is distilled, additional L-polylactic acid is fed to the reactor. In the continuous process mode, patentee states the feed is advantageously arranged such that the volume of the reactor contents is kept constant as far as possible. Patentee also states that where the L-polylactic acid is fed batchwise, the residual volume of the reactor contents is not critical within a wide range with respect to product quality, but that it is advantageous to top off (refill) the reactor after a conversion of 50 to 90%. He further states in this regard that "It cannot be excluded that excessive lowering of the reactor contents leads to a deterioration in the product."
The disclosed process suffers in that, in all its modes of operation, at least a significant portion of the oligomer fed to the reactor is continuously under thermal stress throughout the depolymerization step, and that this eventually results in degradation products and high-boiling residues in addition to the desired lactide. That this is so becomes apparent on considering that under the so-called depolymerizing conditions, the oligomer can not only depolymerize to the lower molecule weight and more volatile cyclic ester (lactide) but that it can continue to polymerize (with loss of water, which contaminates the cyclic ester distillate) to higher molecular weight and less volatile material.
In general, high molecular weight oligomer does not yield cyclic ester as rapidly/readily as low molecular weight material. This may be attributed to the greater viscosity of the higher molecular weight material and the lesser content of terminal hydroxy groups.
It appears that for such reason those skilled in the art prefer to employ oligomers having relatively low mean molecular weights, for example, the 400 to 2000, preferably 500 to 800 polylactic acid molecular weights of Muller above. It appears, too, that the longer the oligomeric material is subjected to the thermal stress of the depolymerization temperatures the more prone it is to decompose to acidic by-products, and to lose its ability to generate cyclic ester at practical production rates and eventually to form discolored and charred reactor residues (heels).
It is also known, as disclosed in Bhatia, U.S. Pat. No. 5,023,349, to convert oligomers of alpha-carboxylic acids (glycolic, lactic) to dimeric cyclic esters (glycolide, lactide) by continuously feeding the oligomer to the top of a columnar reaction (depolymerization) zone heated at depolymerization temperatures while passing an inert gas (N.sub.2 or the like) up through the oligomeric mass to sweep the cyclic ester therefrom and form a gaseous product stream, then recovering the cyclic ester from the gaseous product stream. Any unconverted oligomer accumulates in a zone below the depolymerization zone. Although the gas-assisted process of Bhatia '349 represents a significant advance in the art in providing high conversion to and recovery of high quality dimeric cyclic ester (lactide) it has the drawback that the entraining inert gas occupies a significant portion of the reactor volume and thus limits the production rate.

Continuous reduced pressure dimeric cyclic ester production


A system and method for generating an oxygen enriched aqueous solution for therapeutic application includes a diffuser comprising a first diffusing member having a surface incorporating surface disturbances, and a second diffusing member positioned relative to the first diffusing member to form a channel through which an aqueous solution and oxygen gas may flow. A reservoir containing the aqueous solution is connected to a pump that draws the aqueous solution from the reservoir and inputs the aqueous solution into the diffuser. The aqueous solution is moved through the channel relative to the surface disturbances to create cavitation in the aqueous solution to diffuse the oxygen gas into the aqueous solution to produce an oxygen enriched aqueous solution.

This invention relates in general to diffusers and, more particularly, to a method and apparatus for diffusing or emulsifying a gas or liquid into a material.
The oxygen available in water or other liquids often has a therapeutic value. For example, eyes have a minimum necessary oxygen requirement. The continued presence of oxygen on the eye can be difficult to maintain when wearing contact lenses, particularly when contacts are worn during sleep when the eyes are closed. With typical contact lenses, oxygen passes through the water in the lens. There is a limit to the amount of water that can be used in any contact lens material and this, in turn, limits the amount of oxygen that can get to the eye. The oxygen content of the water used in the manufacture, storage, cleaning and wetting of contact lenses is an important factor in their manufacture and use. In particular, a contact lens wearer's ocular tissue can be damaged by a lack of oxygen. Contact lenses are designed in order to maximize the amount of oxygen reaching the cornea, keeping the eyes fresh and healthy all day long
In many applications, it is necessary to diffuse or emulsify one material—gas or liquid—within a second material. Emulsification is a subset of the process of diffusion wherein small globules of one liquid are suspended in a second liquid with which the first will not mix, such as oil into vinegar. One important application of the diffusion process is in wastewater treatment. Many municipalities aerate their wastewater as part of the treatment process in order to stimulate biological degradation of organic matter. The rate of biological digestion of organic matter is very dependent upon the amount of oxygen in the wastewater, since the oxygen is necessary to sustain the life of the microorganisms which consume the organic matter. Additionally, oxygen is able to remove some compounds, such as iron, magnesium and carbon dioxide.
There are several methods of oxygenating water. First, turbine aeration systems release air near the rotating blades of an impeller which mixes the air or oxygen with the water. Second, water can be sprayed into the air to increase its oxygen content. Third, a system produced by AQUATEX injects air or oxygen into the water and subjects the water/gas to a large scale vortex. Tests on the AQUATEX device have shown an improvement to 200% dissolved oxygen (approximately 20 ppm (parts per million)) under ideal conditions Naturally occurring levels of oxygen in water are approximately 10 ppm maximum, which is considered to be a level of 100% dissolved oxygen. Thus, the AQUATEX device doubles the oxygen content of the water. The increased oxygenation levels last only minutes prior to reverting back to 100% dissolved oxygen levels.
Greater oxygenation levels, and longer persistence of the increased oxygen levels, could provide significant benefits in treating wastewater. Importantly, the efficiency of the organic digestion would be increased and the amount of time need for biological remediation would decrease, improving on the capacity of wastewater treatment facilities.
Accordingly, a need has arisen for a diffusing mechanism capable of diffusing high levels of one or more materials into another material.

System and method for therapeutic application of dissolved oxygen


A measuring device includes a receiver having a cavity with differing narrowing diameters from an opening. The receiver can be moved axially. A part is moved a predetermined fixed distance, including movement while engaging and moving the receiver. The distance moved by the receiver is sensed, and the acceptability of the dimension of the object is determined by evaluating the distance moved by the receiver.

Parts and pieces of many different types and shapes are made by stampings and progressive stampings for use in a variety of different assemblies and constructions. Metal can be shaped into many different forms and configurations by the application of force causing a metal blank to conform to the shape of a die used while applying the force. Simple parts and pieces can be made by a single stamping. In a single stamping, force is applied in a single event so that the metal conforms to a die used while applying the force. For more complex parts or parts taking a shape quite different from the original metal blank, progressive stampings are used. In progressive stampings, a series of dies are used in a series of stamping events, with each die and each stamping event forming the metal in stages from the original blank to the desired final formation.
It is known to use stamping techniques to form a variety of parts having a head or a flange at an end thereof. For example, a substantially cylindrical or tubular part can be stamped to have a peripheral flange at one end. The stamping process may include a first formation process to form a flair or outward expansion of the tube, with a final process to complete the flange.
Stamping is often used to make parts and pieces inexpensively, since a stamping event is a rapid occurrence. Accordingly, parts can be formed quickly and inexpensively, with minimal waste. To ensure a high percentage of quality parts are shipped to customers cost effectively, testing procedures for stamped parts must be performed rapidly and reliably. Preferably, a testing method occurs quickly so that testing or inspection of the part does not slow the overall process of making the part.
Precisely dimensioned parts are sometimes required for proper sealing and/or fit or to ensure accuracy of a subsequent operation. Measuring the prescribed dimension can be difficult and time consuming. Since many parts made by stamping are produced quite rapidly and at low cost it is desirable that an apparatus and process for measuring the dimension work equally fast so as not to slow the manufacturing process unacceptably, or unduly add cost to the final price of the part.
What is needed in the art is a measurement device and process to quickly and accurately measure a dimension, such as the flared end of a stamped part.


The present invention provides a pinch clamp that includes a support leg member and a coupling leg member, which are interconnected by a curved portion, and a generally upwardly extending anchor portion having at least one anchoring flange located at the distal end of the anchor portion. The pinch clamp also contains at least one tabular member which extends outward from the anchor portion, which facilitates opening of the pinch clamp.

Pinch clamps are well known in the art and have been used for many years to control the flow of fluids through tubing. Despite the widespread use of pinch clamps, the current devices and methods for opening the pinch clamps are awkward, and sometimes even hazardous, especially when used on patients in the medical field. When a patient undergoes a medical procedure, it is extremely advantageous for the staff to be able to quickly and safely change the flow of fluids without disturbing the orientation of the tubing. Currently available pinch clamps are awkward and difficult to open one-handed. As seen in FIG. 1C, in order for a person to open such pinch clamps one-handed, a person must grip the pinch clamp 3 with at least one finger while simultaneously applying a force to the pinch clamp clasp with the thumb. As shown in FIGS. 1A and 1B, one cannot open this particular known pinch clamp with one hand without firmly gripping the clamp with one's finger(s) while trying to open the clamp with one's thumb or other finger(s). One attempting to open this particular known pinch clamp 3 with one hand without firmly gripping the clamp with one's finger(s) while trying to open the clamp with one's thumb or other finger(s) applies a force 2 which causes the pinch clamp to move/slide forward across one's fingers (as shown in FIG. 1A by arrow 5a), or rotate in a circular direction around one's finger (as shown in FIG. 1B by arrow 5b). When a pinch clamp is used on a tubing line in a medical application, it is extremely advantageous for the staff to be able to quickly and safely open and close a pinch clamp that is installed on the tubing. Since the tubing is typically attached to a patient, any pushing or pulling on the tubing may be painful or life-threatening to the patient. Because currently available pinch clamps require that the pinch clamp and associated tubing 6 (See FIG. 1C) be firmly grasped, undesirable pushing or pulling on the tubing line may occur. And because currently available pinch clamps require an awkward and difficult hand and thumb action to open the pinch clamp with one hand, undesirable pushing or pulling on the tubing line 6 may occur. The degree of difficulty to open the present pinch clamp with one hand is directly impacted by the size and strength of one's hand. Present pinch clamps are also more difficult to release when medical staff wear gloves, which are typically worn for the protection of the staff and the patient. Pinch clamps may be used during highly stressful medical procedures where every second counts. As such, fumbling with awkward equipment should be kept to a minimum. Therefore, there is an unfulfilled need for a pinch clamp which is easily manufactureable, easy to use, and that quickly and safely releases without substantially altering the orientation of the tubing.


Disclosed are a substrate treating apparatus and a method for inspecting a treatment liquid nozzle. The substrate treating apparatus includes a support member configured to support a substrate, a treatment liquid nozzle configured to discharge a treatment liquid to the substrate located on the support member, a light source configured to irradiate light to a point of the substrate, to which the treatment liquid is discharged, a camera configured to photograph the point of the substrate, to which the treatment liquid is discharged, and a controller configured to determine, through an image captured by the camera, whether a crown is generated when the treatment liquid collides with the substrate.

Embodiments of the inventive concept described herein relate to a substrate treating apparatus and a method for inspecting a treatment liquid nozzle.
In order to manufacture a semiconductor device or a liquid crystal display, various processes such as photolithography, etching, ashing, ion implantation, thin film deposition, and cleaning are performed on a substrate. Among them, an etching process is a process of removing an unnecessary area of a thin film formed on a substrate, and requires a high selection ratio and a high etching rate for a thin film. Further, a process of heating a substrate may be accompanied during the above-mentioned process.
In general, in a process of etching or cleaning a substrate, a chemical processing operation, a rinsing operation, and a drying operation are sequentially performed. In the chemical processing operation, a thin film formed on a substrate is etched or a chemical for removing foreign substances on a substrate is supplied to a substrate, and in the rinsing operation, a rinsing liquid such as pure water is supplied onto a substrate. The treatment of the substrate through the fluid may be accompanied by heating of the substrate.

Substrate treating apparatus and method for inspecting treatment liquid nozzle


This invention provides a simple detection method with excellent sensitivity and specificity, which allows prompt detection of an analyte by allowing a labeled reagent to effectively react with the analyte in the process of treating an analyte-containing specimen, such as during removal of impurities, a detection apparatus, and a detection kit. This method for detecting an analyte in specimens comprises steps of: bringing a labeled reagent containing a ligand that specifically binds to the analyte into contact with a specimen; and supplying the mixture of the specimen and the labeled reagent to a solid-phase support onto which a capture reagent that specifically binds to the analyte has been immobilized, wherein the step of bringing the specimen into contact with the labeled reagent is carried out at a site that is not on the solid-phase support and that is detached from the solid-phase support. The invention also provides a detection apparatus comprising a solid-phase support onto which a capture reagent that specifically binds to the analyte in the specimen is immobilized and a kit for detecting an analyte in a specimen and a device for supplying a specimen comprising a labeled reagent containing a ligand that specifically binds to the analyte.

As methods of analysis for detecting or quantifying an analyte in a sample with the utilization of immune response specificity, a variety of methodologies, such as immunodiffusion, enzyme assay, and agglutination, have been put to practical use. In particular, detection methods by means of flow-through assay (detection) techniques ("Guide to Diagnostic Rapid Test Device Components," 2nd edition, published by Scheicher & Schuell company, January 2000, Edited by Lisa Vickers, pp. 6-8 and JP Patent Publication (Kokoku) No. 7-34016B (1995)) or by means of immunochromatography assay (detection) techniques (a lateral-flow assay, a tangential-flow assay, JP Patent Publication (Kokoku) No. 7-13640B (1995), JP Patent No. 2890384) spread rapidly because of the convenience thereof in recent years. The principles of such detection methods are briefly described below. According to many of commercial flow-through assay techniques, a capture reagent (e.g., antibody) for capturing an analyte (e.g., antigens) is first immobilized on a membrane (a solid-phase support), and a given amount of a sample comprising an analyte-containing specimen suspended therein is supplied to the membrane. When the sample passes through the membrane, the existing analyte is captured by a capture reagent that has been immobilized on the membrane, and a complex of the analyte and the capture reagent is then formed. Subsequently, a given amount of a labeled reagent containing a ligand that specifically binds to the analyte (e.g., enzyme labels for the analyte) is supplied, and a complex of the capture reagent, the analyte, and the labeled reagent is formed at a site at which the capture reagent has been immobilized. The labeled reagent can be detected by any technique (in the case of an enzyme label, a color reaction takes place with the supply of a substrate) to determine the presence of the analyte.
Many types of commercial kits for immunochromatography assay techniques each comprise a strip membrane. The membrane comprises a capture reagent (e.g., antibody) for capturing an analyte (e.g., antigens) immobilized at one of its ends in the lengthwise direction, and a labeled reagent (e.g., colloidal gold particles that can be visualized) comprising a ligand that specifically binds to the analyte sustained in a spreadable manner on the membrane at the other end. If a given amount of a sample comprising an analyte-containing specimen suspended therein is supplied to the side of the membrane that sustains the labeled reagent, the analyte binds to the labeled reagent to form a complex of the analyte and the labeled reagent when the sample is spread over the membrane. The complex of the analyte and the labeled reagent spreads and flows over the membrane, and it is captured by the capture reagents immobilized on the membrane. Thus, a complex of the capture reagent, the analyte, and the labeled reagent is formed at a site at which the capture reagent has been immobilized. The presence of the analyte can be determined by detecting the labeled reagent by any technique (in the case of colloidal gold particles that can be visualized, an image of the aggregate thereof is to be detected).
In the many assay techniques, since large quantities of impurities were contained in analyte-containing specimens, a variety of types of chemical or physical preparations are carried out in order to remove the impurities. From such prepared samples, impurities are removed as much as possible, and the analyte is then extracted therefrom to form a complex of the capture reagent, the analyte, and the labeled reagent. This is an essential condition for an assay technique having high sensitivity and specificity. However, the procedures therefore are laborious and time consuming, which result in decreased operational efficiency. When an assay technique requires laboriousness, it often causes operational errors. This deteriorates the quality of the assay technique in terms of safety, costs, and operational efficiency.
Patent Document 1: JP Patent Publication (Kokoku) No. 7-34016B (1995)
Patent Document 2: JP Patent Publication (Kokoku) No. 7-13640B (1995)
Patent Document 3: JP Patent No. 2,890,384
Non-Patent Document 1: Guide to Diagnostic Rapid Test Device Components, 2nd edition, published by Scheicher & Schuell company, January 2000, Edited by Lisa Vickers, pp. 6-8

Convenient detection method, detection apparatus and detection kit


An analog-to-digital converting device includes: an integrator arranged to generate an integrating signal according to an analog input signal and a first analog feedback signal; a low-pass filter arranged to generate a first filtered signal according to the integrating signal; an analog-to-digital converter arranged to generate a digital output signal according to the first filtered signal; and a first digital-to-analog converter arranged to generate the first analog feedback signal according to the digital output signal.

The present invention relates to an analog-to-digital converting device and related method, and more particularly to an ADC with filtering functionality and related method.
In a wireless communication system, an analog-to-digital converter (ADC) is used to convert an analog signal into a digital signal after the RF signal is received by an antenna. However, the antenna may also receive signals other than the wanted signal at the same time. Therefore, a filter is used to filter out the unwanted signal before the signal inputting to the ADC. Normally, a filter has larger area or larger power consumption also has better filtering effect, but this also means that the filter costs higher. If a filter having bad filtering effect is employed, then the ADC should have wider dynamic range such that the unwanted signal can be suppressed by the ADC. However, the dynamic range of the ADC is inversely proportional to the supply voltage of the ADC, and the supply voltage only becomes smaller in the modern semiconductor process. Another way to increase the dynamic range of the ADC is to reduce the noise floor of the ADC. However, this method may again increase the area and power consumption of the ADC because the ADC may be designed to have large capacitor and small resistor. Therefore, providing a filtering ADC for cost/area reduction is an urgent problem in the field of wireless communication system.

Analog-to-digital converting device and analog-to-digital converting method


A torque transmitting assembly is provided. The torque transmitting assembly includes a generally cup shaped outer shell having a closed end and an open end. The closed end has at least one raised portion formed therein. The outer shell includes an outwardly extending lip surrounding the open end of the outer shell. The open end of the outer shell is adapted to be operatively engaged with a first rotating member. A generally disk shaped inner member has a central aperture and a central axis. The inner member includes at least one tab extending axially outwardly therefrom and engages the raised portion of the outer shell to facilitate a transfer of rotation between the outer shell and the inner member. The central aperture is adapted to be operatively engaged with a second rotating member. The inner member is received inside said outer shell.

A pinion carrier is a support structure that locates pinion (or planet) gears in a planetary gear set and transmits torque to other components within a vehicle transmission. A drive shell or planet carrier is a tubular metal component that carries torque from the pinion carrier to another component axially displaced from the pinion carrier in the transmission. The drive shell also revolves around the central axis of the pinion carrier and supports the pinion gears.
Some known methods for producing a pinion carrier include progressively stamping a cup and an end plate and welding the two pieces together; producing powdered metal components which are brazed or bolted together; or cold forming a cup which is welded to a stamped plate.
Current methods for producing a drive shell include deep drawing sheet metal to a tubular shape and forming splines on an inner wall thereof, and cutting a thin walled tube to length and forming splines on an inner surface thereof.
Known methods of producing a combined carrier and drive shell include progressively stamping cups from metal stock having different diameters which are then welded together facing each other. The inner cup is used as the pinion carrier, and the outer cup is used as the drive shell.
In respect of the practices listed above, several problems are experienced in forming the pinion carrier portion of the assembly. Due to the brittle nature of powdered metal parts, the cross-section of the portion of the pinion carrier that separates the retaining faces must be structurally large. During the manufacturing process, a grain density variation is created at the bases of the portion of the pinion carrier that separate retaining faces where it meets much thinner retaining faces. This density variation, along with the concurrent thickness change in the same area, results in a stress riser that frequently causes fracture and failure of the component. To counteract this, the legs and retaining faces must be made thicker than would be needed when produced from wrought material in order for the part to survive its application. This results in increased weight and space consumption, both of which are expensive and undesirable in an automatic transmission environment.
For stamped parts, the production method provides more flexibility than powdered metal and generally reduces space consumption by comparison. However, there is no ability to significantly change the material thickness for any component of the assembly. Therefore, the entire part will be the same thickness as that portion of the assembly needing the most strength. The result is excess mass and space consumption, although it represents a large improvement in these aspects as compared to parts produced from powdered metal. The biggest weakness of stamped parts is the lack of stiffness. Under heavy loading, the stamped parts frequently deflect to the point that the gears may become misaligned causing undesirable noise and wear.
For cold formed parts, improved stiffness is experienced over stampings, and the process can create various material thicknesses in different locations on the components. Therefore, it can minimize overall mass while concentrating material in critical areas. Furthermore, tooling is comparable to that for powdered metal and far less expensive and complex than that required for stamping. The level of detail achievable in cold forming is good enough that many applications require no machining other than creating the pinion shaft holes after forming. However, cold forming is somewhat limited in its ability to create long extrusions cost-effectively.
It would be desirable to produce a torque transmitting assembly wherein production efficiency is maximized and weight and production costs are minimized.

Torque transmitting assembly and method of producing


A cooling arrangement for a motor assembly includes a motor operably connected to a load. Also included is a motor controller disposed adjacent to, and fluidly coupled to, the motor, the motor controller disposed within a housing enclosing a cooling fluid for immersion of a plurality of motor controller components. Further included is a duct arrangement configured to route a cooling flow to a location proximate the housing of the motor controller for cooling therealong.

The present invention relates to a motor assembly, and more particularly to a cooling arrangement for the motor assembly, as well as a method of cooling the motor assembly.
Motor assemblies utilizing ram air flow are employed in a variety of applications, with one such application being an aircraft. The ram air flow in an aircraft may serve various purposes, such as in cooling systems for the aircraft. For example, the ram air flow may be utilized to remove heat from various aircraft lubrication and electrical systems and/or be used to condition aircraft cabin air. When the aircraft is in flight, the movement of the aircraft creates a sufficient source of ram air flow which can be used for the purposes described above. When the aircraft is on the ground or is operating at low speeds, however, a fan is typically utilized to supply air flow to the cooling systems. Such a fan is driven by an electric motor which, in turn, must be cooled by air flowing across it. The electric motor is controlled by a motor controller that is typically disposed at a location remote from the electric motor and the ram air fan, such as in a remote rack with other controllers and/or electrical components. Both the electric motor and the motor controller require cooling to maintain effective operation. Ineffective cooling of these components may lead to failure or inefficient operation. Additionally, the remote location of the motor controller and the electric motor require distinct and excessive cooling sources and flows.
Cooling of the motor controller with the fan by locating the motor controller in close proximity to the fan also introduces undesirable effects, as fans, especially ram air fans, are located such that they draw air from the harsh ambient. Harsh in this regard describes the presence of moisture, water, corrosive substances, aircraft cleaning liquid, foreign objects, etc. The motor controllers typically require forced air cooling through the motor controller. Use of air from harsh ambient can thereby result in reduced reliability and result in shortened time between failures for such co-located motor controller.

Cooling arrangement for a motor assembly and method of cooling a motor assembly


An optical gyro reduces the coupling loss produced when a laser beam is incident upon a photodetector and the noise generated by the laser beam returning to the laser from an external point of reflection. The gyro includes a ring resonator type semiconductor laser for having laser beams transmitted circularly in opposite directions relative to each other. The angle xcex1 formed by the surface of the active layer of the semiconductor laser and the lateral surface of each of the low refractive index layers sandwiching the active layer and showing a refractive index lower than the active layer satisfies the requirement of 75xc2x0 less than a less than 105xc2x0 over the entire periphery of the low refractive index layer. The gyro detects a beat signal generated in the semiconductor laser.

1. Field of the Invention
This invention relates to a gyro and a method of operating the same. More particularly, the present invention relates to a gyro comprising a ring resonator type laser.
2. Related Background Art
Mechanical gyros comprising a rotor and a vibrator and optical gyros adapted to detect the angular velocity of a moving object are known. Particularly, optical gyros are regarded as real innovation because they can start to operate instantaneously and provide a wide dynamic range. Optical gyros include ring resonator type laser gyros, optical fiber gyros and passive type ring resonator gyros, of which ring resonator type laser gyros comprising a gas laser were developed most early and have been used in aeronautic applications and other applications. Recently, small, high precision, ring resonator type laser gyros have been proposed and Japanese Patent Application Laid-Open No. 5-288556 describes such a gyro.
However, known ring resonator type laser gyros are so designed that a laser beam propagating clockwise and another laser beam propagating counterclockwise are once emitted therefrom to the outside and received by a photodetector, which transforms their optical beat into electric beat as signal. This means that a coupling loss arises when the laser beams enter the photodetector. Additionally, known ring resonator type laser gyros need an optical isolator in order to avoid the noise generated by the beams returning from an external point of reflection to the laser.
Japanese Patent Application Laid-Open No. 4-174317 describes a technique of observing the angular velocity of an object by causing a pair of laser beams to be transmitted circularly clockwise and counterclockwise within the semiconductor laser and utilizing the beat produced by the interference of the laser beams.
A laser device described in the above cited patent document will be described by referring to FIGS. 34 and 35 of the accompanying drawings. FIG. 34 is a schematic plan view of the device and FIG. 35 is a schematic cross sectional view taken along line 35xe2x80x9435 in FIG. 34. Referring to FIGS. 34 and 35, there are shown an InP substrate 10, ridge type optical waveguides 11, 12A, 12B and 12C, total reflection corner mirrors 13A, 13B, 13C and 13D arranged at the four corners, a voltage detection terminal 14 and a bias current supply terminal 15. The total reflection corner mirrors are formed, as shown in FIG. 35, by engraving the surface using an etching technique.
However, the technique described in the above cited patent document cannot provide a high yield when manufacturing such devices on a commercial basis. Further, there is a strong demand for laser devices of the type under consideration that can oscillate with a lower driving power. This invention is made under these circumstances.
Therefore, it is a first object of the present invention to provide a gyro comprising a semiconductor laser that can be driven with a low electric current or a low voltage and a method of operating such a gyro.
Another object of the present invention is to provide a gyro that is totally or almost free from problems such as coupling loss and optical feedback noise and a method of operating such a gyro.
Still another object of the present invention is to provide a compact gyro and a method of operating such a gyro.
According to a first aspect of the invention, the above object is achieved by providing a gyro comprising a ring resonator type semiconductor laser for having laser beams transmitted circularly in opposite directions relative to each other, wherein the angle xcex1 formed by the surface of the active layer of the semiconductor laser and the lateral surface of each of the low refractive index layers sandwiching the active layer and showing a refractive index lower than the active layer satisfies the requirement of 75xc2x0xe2x89xa6xcex1xe2x89xa6105xc2x0 over the entire periphery of the low refractive index layers.
The ring resonator type semiconductor laser can detect the beat signal produced by the rotation of the gyro as a change in the electric current flowing through the semiconductor laser, the voltage applied to the semiconductor laser or the impedance of the semiconductor laser.
Preferably, the surface precision of the lateral surface of each of the low refractive index layers is less than xc2xd of the wavelengths of the laser beams in the active layer.
According to a second aspect of the invention, there is provided a method of operating a gyro comprising a ring resonator type semiconductor laser, wherein the angle xcex1 formed by the surface of the active layer of the semiconductor laser and the lateral surface of each of the low refractive index layers sandwiching the active layer and showing a refractive index lower than the active layer satisfies the requirement of 75xc2x0xe2x89xa6xcex1xe2x89xa6105xc2x0 over the entire periphery of the low refractive index layers, the method using the change in the electric current, the voltage or the impedance as signal for determining the angular velocity of the ring resonator type semiconductor laser.
Preferably, the voltage or the electric current for driving the ring resonator type semiconductor laser is modulated by means of a frequency not found in the frequency band of the signal.
Preferably, a piezoelectric element is used to drive the ring resonator type semiconductor laser to rotate clockwise or counterclockwise.

Gyro and method of operating the same with a modulated frequency signal


A method and apparatus that provides process monitoring within a semiconductor wafer processing system using multiple process parameters. Specifically, the apparatus analyzes multiple process parameters and statistically correlates these parameters to detect a change in process characteristics such that the endpoint of an etch process may be accurately detected, as well as detecting other characteristics within the chamber. The multiple parameters may include optical emissia, environmental parameters such as pressure and temperature within the reaction chamber, RF power parameters such as reflected power or tuning voltage, and system parameters such as particular system configurations and control voltages.

1. Field of the Invention
The invention relates to semiconductor wafer processing systems and, more particularly, to a method and apparatus for performing in situ monitoring of process parameters of a semiconductor wafer processing system.
2. Description of the Background Art
Plasma enhanced processes that occur within a semiconductor wafer processing system are generally designed to run for a specific length of time and are monitored using an optical emissions spectroscopy (OES) technique. The OES equipment couples to a transparent window of a reaction chamber containing the plasma. The OES equipment monitors the optical emissions from the plasma. Typically, a single wavelength is extracted (filtered) from all of the emissia of the plasma, and the magnitude of the signal at the extracted wavelength indicates the present chemistry within the chamber. A change in this chemistry will increase or decrease the magnitude of the signal at the extracted wavelength and, as such, indicate a change in the process occurring within the chamber.
For example, a plasma in a dry etch process is typically monitored by extracting the carbon monoxide (CO) emission line at 4835 angstroms. A change in the magnitude of the carbon monoxide line is indicative of the endpoint of an oxide etch process.
Extracting a particular line, as well as suppressing the noise generated by the plasma at other wavelengths, requires substantial signal processing and careful OES equipment fabrication and calibration. Such endpoint detection requires the detection of a very small change in signal strength at a particular optical wavelength. As such, the desired signal is easily corrupted by noise. If care is not taken while monitoring the process, the endpoint may not be detected, and the wafer will be overetched. Such overetching may destroy the integrated circuits on the wafer and reduce the yield of the semiconductor wafer processing system.
Therefore, there is a need in the art for improved monitoring techniques for a semiconductor wafer processing system and especially for detecting etch endpoint as well as other process characteristics within a reaction chamber.

Method and apparatus for monitoring processes using multiple parameters of a semiconductor wafer processing system


In order to realize stable rocking operation of the armature and further obtain magnetic characteristics required for high-speed printing, the magnetic circuit forming member formed of magnetic material like a plate and having the through hole in the direction of thickness thereof is stacked in two or more layers in the direction of thickness, pressure is applied to the two or more stacked magnetic circuit forming members in the stacking direction to make the magnetic circuit forming members adhere to each other, and the two or more magnetic circuit forming members put in the adhering state are subjected to nitriding.

1. Field of the Invention
This invention relates to a nitride layer forming method, a magnetic circuit forming member, an armature, a wire dot printer head and a wire dot printer.
2. Discussion of the Background
The wire head printer head is adapted to rock an armature to which a printing wire is connected between a print position and a standby position and impact the tip of the wire in a print medium when the armature is rocked to the print position to perform printing. As the wire dot printer head, a device has been proposed, in which magnetic flux is generated in the periphery of the armature as a rocking object by a coil, and a magnetic circuit for attracting the armature from the standby position to the print position is generated to perform printing (See JP-A-2000-280497). In the invention described in JP-A-2000-280497, in order to heighten the strength of the armature, a nitride layer is formed on the surface of the armature.
On the other hand, the armature is provided with a fulcrum shaft functioning as the center of rotation and a through hole for inserting the fulcrum shaft, and disposed to be freely rotated (rocked) by holding the fulcrum shaft. In this case, the fulcrum shaft is rotatably inserted in the through hole. Consequently, during the printing operation, the fulcrum shaft is slid along the through hole, so that the inner surface of the through hole wears away. In order to prevent such abrasion, generally a nitride layer is formed on the surface (including the inner surface of the through hole) of the armature to improve the strength of the armature.
In the armature having the nitride layer formed on the whole surface thereof, however, the magnetic flux characteristic is deteriorated by the nitride layer. In recent years, it is necessary to increase the printing speed, that is, rock the armature between the print position and the standby position at a high frequency as much as 2500 times/sec. In that case, the armature having the nitride layer formed on the whole surface has the problem that the magnetic characteristic required for high-speed printing can not be obtained, so high-speed printing can not be performed.
Further, in the case where the fulcrum shaft is provided in the through hole as in the above armature, it is necessary to form a nitride layer or the like on the inner surface of the through hole. In the case where a nitride layer is not formed on the inner surface of the through hole, the fulcrum shaft slides along the through hole during the printing operation, so that the inner surface of the through hole wears away to cause jogging of the fulcrum shaft, resulting in the problem that the rocking operation of the armature becomes unstable.

Nitride layer forming method, magnetic circuit forming member, armature, wire dot printer head and wire dot printer