A circuit and a related process are utilized in a computer system for testing and configuring the width of various portions of memory in a memory array. The circuit captures a state of a memory width control signal (MEMCS16) during a test and configuration cycle, retains the state of the MEMCS16 signal for various blocks of memory, and controls the state of the MEMCS16 signal when a memory access to a particular memory block is made. The circuit tests the state of the MEMCS16 signal for various blocks of the system memory map and thereafter configures a memory control register appropriately. The state of the MEMCS16 signal is retained by a latch when a particular 128K region is accessed and a valid address is present on the address lines. The output of the latch is provided as a processor-readable test result in a bit of a control/test register.

1. Field of the Invention
The present invention relates to computer systems. Specifically, the present invention relates to the configuration and control of a computer memory array and expansion memory arrays.
2. Related Art
Computer systems almost always contain some form of memory. This memory is typically organized in the form of a memory array with each addressable memory location in the array comprising a group of binary data bits of information. The number of data bits corresponding to a particular memory location defines the width of that memory location. In a typical computer system, a memory width of 8-bit bytes or 16-bit words is very common. Other memory widths such as 32-bit, 64-bit, and 128-bit wide memory locations are also used in many computer system applications. The width of memory arrays in other computer systems may use any arbitrary number of bits per memory location.
It is often convenient to configure a memory array with some locations of the array having a first width and other memory locations of the array having a second width different from the first width. Similarly, other computer systems may employ a variety of different memory widths. Memory arrays are configured using various widths in order to optimize the available storage for selected address blocks (ranges of addressable memory). This optimization may be used, for example, if a particular type of data of a given width is stored in a specified address block. In other situations, a particular address block may be constrained to a particular width in order to maintain compatibility of the computer system with other similar computer systems. In still other situations, a particular address block may physically reside in an expansion memory board different from the hardware used for main memory. It is convenient to provide the capability for expansion memory to be a variable width depending on the storage requirements for a particular computer system. In this manner, the cost of expansion memory may be optimized.
Other factors may contribute to the need for more than one width of memory locations in the memory array. These other factors include the speed of the memory devices, the availability of memory devices, the technology needed for a particular address block (dynamic random access memory or DRAM, static random access memory or SRAM, read only memory or ROM, complementary metal oxide semiconductor or CMOS, etc.), and the cost of a particular memory device.
Once a computer system supports multiple memory widths, the memory control function of the memory array becomes more difficult. The processor making access to the memory array must be aware of the width of the memory array being accessed. Moreover, a memory array controller must generate the appropriate timing and control signals corresponding to the appropriate memory width. In prior art computer systems, particularly personal computer systems, hardware jumpers are used in the memory array to define the width of memory locations at pre-determined address regions. For example, extended memory boards, available for many personal computer systems, contain hardware jumpers by which a user may configure the memory board for a 16-bit wide data word for greater efficiency or an 8-bit wide data byte for compatability with other systems. Once the jumpers are configured on the memory board, the user installs the memory board in the computer system and powers up the system for use. The jumpers on the memory board result in the generation of a memory control signal by the memory board to the processor or other computer system component that makes a memory access. This memory control signal, commonly called a MEMCS16 signal, defines whether or not the memory board can supply an 8-bit or a 16-bit data word on a memory access. The processor or other device making access to memory, therefore uses the MEMCS16 signal to define the number of data bits to receive.
Significant problems result if the jumpers on a memory board are improperly configured. In this case, an invalid MEMCS16 signal will be generated to the processor and an invalid memory access will result. Other problems are encountered when more than one expansion board is installed in a computer system. In this case, each expansion board may contain circuitry for independently driving the MEMCS16 signal. In some circumstances, the operation of two expansion boards may conflict in controlling the state of the MEMCS16 signal. This may occur if two expansion boards are mapped to the same memory space. This may also occur if an expansion board is mapped to an incompatible memory area such as a boot ROM area. An expansion board is mapped to an incompatible area if, for example, the expansion board is configured for 16-bit word accesses when the mapped area can only provide an 8-bit byte access. These expansion board conflicts may cause a seemingly properly configured expansion board to become inoperable when another expansion board is inserted into the computer system. Significant problems, traceable to the control of a memory width signal (MEMCS16), result from an improperly configured and controlled MEMCS16 signal or memory width control signal.
Thus, a better means for controlling a signal specifying the width of blocks of memory in a computer memory array is needed.

Method and apparatus for testing and configuring the width of portions of a memory


A debris trap for use in a gas valve fitting is provided. The debris trap comprises an elongated body extending about a first axis. The elongated body forms a passage therein extending along the first axis between an inlet formed in a first end of the elongated body and at least one outlet formed in the elongated body. The at least one outlet is formed in a side wall of the elongated body to provide fluid communication with the passage about a second axis perpendicular to the first axis.

Many household appliances, particularly ranges, water heaters and dryers, burn natural gas or liquid petroleum ("LP") (natural gas and LP will be hereinafter referred to generally as "gas") to create heat energy. The appliances require a flow regulating valve to control the gas flow from a gas supply to a burner. One such flow regulating valve is a poppet valve.
A poppet valve has a seat that includes a gas passage and a sealing device such as a rubber poppet connected to an actuating arm. The poppet valve functions by selectively moving the rubber poppet toward or away from the seat by selectively actuating the arm connected to the rubber poppet. Particularly, the rubber poppet is moved away from the seat to increase the size of the flow passage or "open" the valve to increase the gas flow rate. The rubber poppet is moved toward the seat to decrease the size of the flow passage or to "close" the valve to decrease or terminate the gas flow rate. The amount of travel by the arm away from the seat determines the distance between the rubber poppet and the seat and the size of the flow passage that is created. To completely stop the gas flow, the rubber poppet is pressed against the seat to completely seal the gas flow passage.
Typically, the arm must be actuated to open the valve. To provide for fail safe operation, the arm is typically spring loaded such that it will automatically close when the arm is not being actuated. This configuration is preferred because if the action mechanism fails it is preferred to have the valve fail in the "closed" position.
The seat is typically a metallic material and the rubber poppet is typically a resilient material such as rubber, plastic or nylon that allows for good sealing contact with the metal seat.
The seat is typically threaded into a metal fitting that is attached to the body of the valve. By being threaded into the fitting, the valve may be adjusted by screwing the seat towards or away from the sealing disc of the poppet. This adjustable configuration is typically referred to as an adjustable seat valve. The metal fitting further includes threads for attaching the gas valve to a gas line having a corresponding fitting.
One problem with the current design of the adjustable seat valve is that when a metal fitting of the gas line is threaded to the metal fitting of the gas valve, the sliding contact between the two fittings forms tiny metal particulates and shavings. Further, when the seat is adjusted, the interaction between the seat and the tool used to adjust the seat may create metal particulates and shavings as well.
To prevent such particulates and shavings from falling into the valve, a wire mesh screen is typically employed above the sealing surface of the valve. Unfortunately, while such a screen is effective to block particles greater than 0.010″, particulates and shavings smaller than this are able to fall through the screen and the gas flow passage of the seat and land on the rubber poppet. Over time, this debris may prematurely deteriorate the sealing disc of the poppet thereby decreasing the seal that can be formed between the rubber poppet and the seat. Particulates from 0.001″ to 0.010″ are identified to cause such leaks. Unfortunately, providing increased filtering of such particulates would unacceptably reduce the BTU flow rate and pressure drop through the valve.
Therefore, a device that would prevent the metal particulate or shavings from falling through the gas flow passage and onto the rubber poppet to prevent deterioration of the seal without unacceptably reducing the BTU flow rate and the pressure drop through the valve would be desirable. The invention provides such a device.


Systems and methods for removing hydrogen peroxide from water purification systems are provided. In a general embodiment, the present disclosure provides a water purification system including a water treatment unit, an electrodeionization unit and a hydrogen peroxide decomposition catalyst in fluid connection with the electrodeionization unit. The water purification system can be fluidly connected to a renal treatment system.

The present disclosure generally relates to water purification systems. More specifically, the present disclosure relates to systems and methods for removing hydrogen peroxide from water purification systems used in renal treatment systems.
Water purification systems can be used in a variety of applications. For example, water purification systems can be used to feed purified water to a dialysis treatment system. A hemodialysis system uses fresh fluid from a solution bag or a water purification system to generate dialysis fluid that is used to dialyze a patient. Water purification systems can be built from many different technologies such as, for example, an electrodeionization ("EDI") unit having an electrodeionizer to obtain extremely pure water.
EDI units typically generate two streams of water—a treated water stream and a waste water stream. The treated water stream is extremely pure water that is substantially free of electrolytes. The treated water stream is used as the source water for other applications requiring purified water. The waste water stream may contain electrolytes and, depending on the design of the device, may have hydrogen peroxide as a byproduct of the EDI process. In this case, the waste water stream is usually emptied to a drain and discarded to prevent the hydrogen peroxide from being part of the treated water stream. However, discarding the waste water stream decreases the efficiency of the EDI for purifying water as approximately 25% of the water flow into a typical EDI unit becomes part of the waste water stream.


A lighting system of the present invention includes a master flash device, a remote flash device, a support part, and a light guiding member. The master flash device emits light in accordance with a light emission control of a camera. The remote flash device has a light-receiving part that receives the light of the master flash device and emits light in accordance with the light-receiving result of the light-receiving part. The support part has the remote flash device mounted at a place where the light of the master flash device is shielded by a shooting lens or a camera. The light guiding member optically forms a detour optical path that guides the light of the master flash device to the light-receiving part.

1. Field of the Invention
The present invention relates to a lighting system for shooting.
2. Description of the Related Art
There is a known lighting system which realizes multiple lighting and enhanced lighting using a master flash device and a remote flash device. The remote flash device emits light in connection with the detection of the light emission of the master flash device (patent document 1 described below).
Also, a ring-like flash device mounted at the front end of a lens is known as a flash device for macro shooting. Normally, a ring-like flash device of this kind is connected to an adapter on a camera via a cable and emits light in accordance with an electric signal (X contact) of the camera.
[Patent document 1] United States Patent Application Publication No. 2004/0240868
[Patent document 2] U.S. Pat. No. 6,480,679


In a receiving circuit, an antenna 11 receives a high-frequency signal at a predetermined frequency band, a level changing section 13 changes a signal level of the high-frequency signal received by the antenna, a subsequent-stage circuit 14 performs predetermined signal processing for the high-frequency signal whose signal level is changed at the level changing section 13, a detecting section 32 detects a signal level of the high-frequency signal for which the signal processing is performed by the subsequent-stage circuit 14, and a control section 33 sets a rate of change of the high-frequency signal by the level changing section 13, based on the signal level of the high-frequency signal detected by the detecting section 32, so that the signal level of the high-frequency signal detected by the detecting section 32 does not exceed a predetermined value.

1. Field of the Invention
The present invention relates to receiving circuits, more particularly, to a receiving circuit used in a wireless communication apparatus.
2. Description of the Background Art
With reference to the drawing, a receiving circuit used in a conventional wireless communication apparatus will be described below. The conventional wireless communication apparatus includes a mobile phone and a PHS, for example. Here, FIG. 8 is a block diagram showing a structure of the receiving circuit of the conventional wireless communication apparatus.
The receiving circuit of the wireless communication apparatus as shown in FIG. 8 includes an antenna 111, an amplifier 113, a bandlimiting filter 114, a frequency conversion circuit 115, a local oscillator 116, a bandlimiting filter 117, a frequency conversion circuit 118, and a local oscillator 119. Hereinafter, an operation of the above-described receiving circuit of the wireless communication apparatus will be briefly described.
First, a high-frequency signal is received by the antenna 111. After the received high-frequency signal is amplified by the amplifier 113, the amplified high-frequency signal passes through the bandlimiting filter 114, which is designed to pass only a required signal band, and is inputted to the frequency conversion circuit 115. Next, the high-frequency signal is mixed with a first local oscillating signal, which is outputted from the local oscillator 116, by the frequency conversion circuit 115. As a result, the high-frequency signal is converted to a first intermediate frequency signal. Then, the first intermediate frequency signal is inputted to the frequency conversion circuit 118 after passing through the bandlimiting filter 117. The first intermediate frequency signal is mixed with a second local oscillating signal, which is outputted from the local oscillator 119, by the frequency conversion circuit 118. As a result, the first intermediate frequency signal is converted to a second intermediate frequency signal. Then, various processes are performed for the second intermediate frequency signal by a circuit connected to a subsequent stage. As a result of the above-described processes, the high-frequency signal is converted to the second intermediate frequency signal.
When a user travels with the above wireless communication apparatus and approaches a base station, the wireless communication apparatus receives a high-frequency signal with a high electric field strength. In this case, a signal level of the received high-frequency signal substantially exceeds an output dynamic range of the frequency conversion circuit 115. As a result, the frequency conversion circuit 115 operates in the saturation region, thereby deteriorating reception characteristics of the receiving circuit of the wireless communication apparatus.
In order to solve the above-described problem, there exists a receiving circuit of a wireless communication apparatus as shown in FIG. 9. The receiving circuit of the wireless communication apparatus additionally includes a variable attenuator 112 between the antenna 111 and the amplifier 113. The feedback control is performed to control the amount of attenuation in the variable attenuator 112 in accordance with a signal level of a reception signal. As a result, it is possible to prevent a signal having a signal level substantially exceeding a dynamic range of the frequency conversion circuit 115 from being inputted to the frequency conversion circuit 115. Hereinafter, with reference to FIG. 9, the above receiving circuit of the wireless communication apparatus will be described.
The receiving circuit of the wireless communication apparatus includes the antenna 111, the variable attenuator 112, the amplifier 113, the bandlimiting filter 114, the frequency conversion circuit 115, the local oscillator 116, the bandlimiting filter 117, the frequency conversion circuit 118, the local oscillator 119, and a gain control section 121. Hereinafter, an operation of the receiving circuit of the wireless communication apparatus will be briefly described.
First, the operations performed by the antenna 111, the amplifier 113, the bandlimiting filter 114, the frequency conversion circuit 115, the local oscillator 116, the bandlimiting filter 117, the frequency conversion circuit 118, and the local oscillator 119 are identical to the operations performed by their counterparts in the receiving circuit as shown in FIG. 8, with the descriptions thereof omitted.
The second intermediate frequency signal outputted from the frequency conversion circuit 118 is inputted to the gain control section 121. The gain control section 121 rectifies the second intermediate frequency signal to obtain a direct current signal. Here, the variable attenuator 112 controls the amount of attenuation by using the obtained direct current signal as a gain control signal. Specifically, the variable attenuator 112 increases or decreases the amount of attenuation in accordance with a level of the gain control signal. Thus, the receiving circuit is able to vary a level of a reception signal.
As such, in the case where a reception signal with high electric field strength is inputted or a disturbing signal within a band of the bandlimiting filter 117 whose band is narrower than that of the bandlimiting filter 114 is inputted, a signal level of the second intermediate frequency signal is increased due to control of the variable attenuator 112, and a direct voltage (a gain control signal) is increased accordingly. As a result, the amount of attenuation in the variable attenuator 112 is increased, and a dynamic range of the frequency conversion circuit 115 is ensured, thereby preventing the frequency conversion circuit 115 from operating in the saturation region (for example, see Japanese Laid-Open Patent Publication No. H10-126301).
Note that, other than the above-described invention, there exists a receiving circuit of a wireless communication apparatus as disclosed in Japanese Laid-Open Patent Publication No. H10-93367 or Japanese Laid-Open Patent Publication No. H5-335857.
However, the receiving circuit as shown in FIG. 9 has the following problem. The gain control section 121 detects a level of an output signal outputted from the frequency conversion circuit 118, and performs AGC (Automatic Gain Control). Thus, in the case where a disturbing signal having a high signal level lying outside the band of the band limiting filter 117 is received, the gain control section 121 does not perform an AGC operation, which will be described below in detail with reference to the drawing. FIG. 10 is an illustration showing a high-frequency signal including a disturbing signal. Specifically, a horizontal axis represents a frequency, and a vertical axis represents a signal level.
In general, the amplifier 113 and the frequency conversion circuit 115 are required to deal with a plurality of signals having respective frequency bands. Specifically, the bandlimiting filter 114 allows signals having respective frequency bands f1 to f3 as shown in FIG. 10 to pass therethrough.
On the other hand, the bandlimiting filter 117 extracts only a required reception band. Specifically, in the case where signals as shown in FIG. 10 are inputted, the bandlimiting filter 117 passes only a required signal (frequency f2). Thus, in the case where a high-frequency signal including a disturbing signal (frequency f3), whose signal level is higher than the required signal as shown in FIG. 10, is received by the receiving circuit, only the required signal (frequency f2) is outputted to the gain control section 121. In this case, gain control should be performed based on the signal level of the disturbing signal (frequency f3) having the highest signal level. However, gain control is performed based on the intensity of the required signal (frequency f2) whose signal level is lower than the disturbing signal (frequency f3). As a result, a high-frequency signal including a disturbing signal (frequency f3) which is not adequately attenuated is inputted to the frequency conversion circuit 115, whereby a reception performance of a receiver is deteriorated since the frequency conversion circuit 115 operates in the saturation region.
In addition to the above-described problem, the receiving circuit as shown in FIG. 9 makes it difficult to reduce power consumption, which will be described in detail below.
For example, in the case where the wireless communication apparatus lies near the base station, an electric field strength of the required signal becomes relatively high. In this case, a level of the reception signal which has passed through the attenuator 112, the amplifier 113, and the frequency conversion circuit 115 does not change.
However, in the receiving circuit as shown in FIG. 9, even if an electric field strength of the required signal is substantially high, the amplifier 113 amplifies the reception signal with a predetermined constant gain and current value. As a result, in the receiving circuit as shown in FIG. 9, even if there is no need to perform an amplification process due to a sufficiently high electric field strength, the amplifier 113 performs amplification using a constant gain and current, which results in unnecessary power consumption in the receiving circuit.
Also, in addition to the above-described two problems, in the receiving circuit as shown in FIG. 9, the reception sensitivity of the receiving circuit is lowered due to the variable attenuator 112 inserted between the antenna 111 and the amplifier 113.
As shown in FIG. 9, in the conventional receiving circuit, the variable attenuator 112 is positioned between the antenna 111 and the amplifier 113. In this case, a signal loss of up to about 0.5 dB occurs in the variable attenuator 112 due to an insertion loss of a part itself and a loss resulting from the insertion of a part in a signal transmission line. Such a signal loss will result in a low SNR (Signal Noise Ratio). Especially, it is rather difficult to compensate for low SNR caused in a circuit preceding the amplifier 113 by using a circuit subsequent to the amplifier 113. Such a problem will be described below in detail. In the following descriptions, the total NF (Noise Figure) (hereinafter, referred to as NFtotal) of a plurality of circuits in a cascade arrangement is used as one example. NF represents the ratio of SNR of an input signal to SNR of an output signal. Specifically, NF is represented as the following equation:NF=(Sin/Nin)/(Sout/Nout).
In the above-described case, NFtotal is given by the following equation: NFtotal=NF1+(NF2−1)/G1+(NF3−1)/(G1*G2)+ . . . . Note that NF1 represents an NF of a first stage circuit, and G1 represents a gain of the first stage circuit. Also, NF2 represents an NF of a second stage circuit, and G2 represents a gain of the second stage circuit. Still further, NF3 represents an NF of a third stage circuit, and G2 represents a gain of the third stage circuit.
Here, assuming that the total NF of a circuit in which no loss occurs in a previous stage of the amplifier is NFtotal1, the following equation is established.NFtotal1=NF1+(NF2−1)/G1+(NF3−1)/(G1*G2)+
On the other hand, assuming that the total NF of a circuit in which a loss occurs in a previous stage of the amplifier is NFtotal2, the following equation is established. Note that NF0 represents an NF of the previous stage circuit of the amplifier, and G0 represents a gain of the previous stage circuit of the amplifier.NFtotal2=NF0+(NF1−1)/G0+(NF2−1)/(G0*G1)+(NF3−1)/(G0*G1*G2)+
Here, assume that a loss in the previous stage of the amplifier is 0.5 dB. In this case, NF0=0.5 dB, and G0=−0.5 dB. Thus, in the circuit in which a loss occurs in the previous circuit of the amplifier, not only NF0 is added but also a term NF1 is incremented since G0 is equal to or smaller than 1, which results in low NFtotal2. Even if an NF in a subsequent circuit is improved in order to prevent NFtotal2 from being lowered, the improvement effect of NFtotal2 of the entire circuit substantially reduces since the improved NF is multiplied by 1/(G0*G1).
As such, a loss in a previous stage of the amplifier 113 results in a low SNR, and it is difficult to compensate for such a low SNR in a subsequent stage of the amplifier 113. As a result, the reception sensitivity of the wireless communication apparatus is substantially lowered.

Matsushita Electric Industrial Co., Ltd.


Methods and apparatus for accurately performing proximity-effect compensation exposure are disclosed, even in cases where negative-type particle-beam-sensitive resist material is used. On a compensation mask, regions corresponding to regions on an underlying wafer that are to receive die patterns are subdivided into a multiple subfields having a pitch smaller than the spread width of particles back-scattered from the wafer 7. Certain of the subfields on the compensation mask define an aperture allowing passage therethrough of a particle beam. The aperture sizes are not uniform. Rather, each aperture is equal in area to an area of the nominally unexposed regions of the subfield less a prescribed constant area. The particle beam, after passing through a beam-shaping aperture, irradiates the compensation mask via an objective lens, and is scanned across the compensation mask by deflectors.

In particle-beam lithography apparatus and methods, a desired pattern is written or projection-exposed on a substrate such as a semiconductor wafer coated with a particle-beam-sensitive resist (hereinafter referred to simply as a "wafer"). Examples of particle beams include protons, ions, and electrons.
The most common particle beam used for such purposes is an electron beam. The electron beam is made incident on the resist in a controlled way. Whenever electrons enter the resist, they lose energy and experience trajectory changes via elastic and inelastic collisions known collectively as "electron scattering." Because scattered electrons can still cause exposure-related changes in the resist, electron scattering can reduce the resolution of pattern linewidths or other desired features to be defined by the electron beam on the wafer. This effect is known in the art as "proximity effect." The main type of scattering responsible for the proximity effect is back-scattering of electrons from the electron beam incident upon the electron-beam-sensitive substrate.
To compensate for the proximity effect, it is known in the art to make substantially equal, over the entire surface of the electron-beam-sensitive substrate, the exposure of the substrate caused by these backscattered electrons.
To such end, it is known in the art to employ a "compensation mask" particularly with projection exposure of a particle-beam-sensitive substrate using a particle beam. In such a scheme, the pattern to be transferred (as defined on a mask or "reticle") to the substrate is divided into many subfields. The compensation mask, which is separate from the reticle, is also divided into subfields (preferably in register with the subfields on the wafer). At each subfield on the compensation mask, an aperture through the thickness dimension of the mask is defined having an area that is equal to the area of the nominally unexposed regions of the corresponding subfield region on the substrate. With this method, by keeping the compensation mask and the substrate separated a prescribed distance from each other, uniform compensation exposure of each of the subfields is performed by blurring the energy beam (ultraviolet ray, electron beam, etc.) at the substrate by passage of the beam through the corresponding apertures in the compensation mask.
In the prior art described above, it is possible to favorably compensate for proximity effect whenever a positive resist is used. However, whenever a negative resist is used, it is not possible to achieve high precision of the pattern transferred to the wafer, despite attempts to compensate for proximity effects. More specifically, with a positive resist, if the compensating energy strikes a nominally unexposed region, there is only a small reduction in the resist-film thickness at that region, with no adverse effect on pattern precision. In contrast, with a negative resist, if the compensating energy strikes a nominally unexposed region, some residual resist--a negative resist defect--can remain after developing the resist, making high-precision pattern formation impossible.
Furthermore, with conventional proximity effect compensation methods, there is no particular mechanism for aligning the compensation mask and the substrate. Such alignment has been performed, for example, with a microscope or the like by viewing an open pattern at a prescribed area on the mask and the corresponding pattern on the substrate. But, as the degree of integration of transferred patterns has increased, it has become desirable to increase the precision of alignment of the compensation mask and the substrate, and perform compensation for the proximity effect in minute and close fashion in correspondence with the degree of refinement in the pattern at the various areas on the substrate.
Compensation exposure of the entire surface of the particle-beam-sensitive substrate has conventionally been conducted, for example, by scanning an energy beam of prescribed width across the compensation mask. Unfortunately, the precision by which such scans are placed adjacent each other is typically poor, causing problematic unevenness in compensation exposure at boundary regions between scans.

Method of using a compensation mask to correct particle beam proximity-effect


The present invention provides a foldable, four-wheel trolley of simple, lightweight construction for use in connection with the transport and storage of items of the type typically used in connection with the operation of beauty salons or similar uses. Moreover, the trolley is easily foldable from an expanded, operating configuration into a compact, folded configuration easy to store and transport when not in use. The trolley has a recessed top tray that is removably connected to the foldable trolley frame, and a plurality of storage drawers are slidably mounted within the foldable trolley frame at locations beneath the top tray and supports for hair dryers.

1. Field of the Invention
The present invention relates generally to portable trolleys or carts. More particularly, the invention concerns a foldable, wheeled trolley for use in connection with the transport of items in a beauty salon.
2. Discussion of the Prior Art
A large number of different types of wheeled trolleys or carts have been suggested in the past. For example, wheeled carts have long been used in convenience and grocery stores to transport items throughout the store. Similarly, wheeled carts are frequently used in garages and manufacturing facilities to hold and transport tools and various kinds of parts used in the conduct of the business.
As a general rule, the prior art wheeled carts are of a sturdy, heavy-duty, bulky construction making them difficult and expensive to transport in commerce. Accordingly, prior art wheeled carts are typically disassembled for shipment and then are reassembled at the location of use. Because of the complexity of construction of many of the prior art wheeled carts, assembly of the carts at the point of use can be difficult and time-consuming.
A primary object of the present invention is to provide a lightweight, four-wheeled trolley or cart of simple, lightweight construction for use primarily in beauty salons. Advantageously, the trolley is capable of being folded for a substantial reduction in size and shape making it easy to store when not in use and permitting it to be easily and inexpensively shipped in commerce. However, when the trolley is assembled into an operating configuration, it is quite stable and because of its unique design is capable of conveniently carrying a wide variety of tools and supplies of the character typically used in the operation of a beauty salon. More particularly, the trolley is provided with a readily accessible, recessed top tray for conveniently carrying small tools and supplies and a plurality of light-weight drawers slidably carried within the trolley frame below the top tray for carrying and storing larger tools and supplies. Additionally, in one form of the invention, readily accessible, side-mounted tool racks are pivotally connected to the top tray. When not in use these tool racks can be pivoted into a downward location proximate the sidewalls of the trolley frame to enable the trolley to be used in confined spaces.

This patent is subject to a terminal disclaimer.


According to an example embodiment of the invention, a configurable printed circuit board (PCB) includes one or more separable portions for supporting modules for interfacing with the PCB. The separable portions extend from an edge portion of a main body of the PCB, and are disposed between the main body of the PCB and a protective portion. A scored portion is provided at a boundary between the main body of the PCB and the separable portions, the separable portions being separable by being broken off from the main body of the PCB at the scored portion. According to an example embodiment of the invention, a method of configuring a PCB having one or more separable portions of the PCB includes securing the PCB and separating the one or more separable portions of the PCB from another portion of the PCB.

1. Field of the Invention
This invention generally relates to a configurable printed circuit board and, more particularly, to a printed circuit board having separable portions for supporting a desired number of modules that interface with the printed circuit board.
2. Description of the Related Art
For many applications, it is desired to have a printed circuit board (PCB) interface with another device. For example, it is increasingly common to connect fiber optic networks to PCBs. The fiber optic connection is established by an optical port, or small form-factor physical interface (SFP), capable of converting optical signals to electrical signals and vice versa. Conventionally, PCBs have been provided with support portions, extending from the edge of the main body of the PCB, on which optical ports are mounted.
Different applications require PCBs to have connections with different numbers of optical ports. Accordingly, PCBs having different numbers of support portions are required. Conventionally, PCBs have been custom made for a particular application, that is, custom made to have the proper number of support portions for the required application.
Such customized production of PCBs requires increasing and/or complicating the manufacturing equipment and procedures, thus increasing the cost, time and difficulty of production. In addition, it reduces the extent to which the produced PCBs are adaptable to different applications.
Accordingly, it would be useful to be able to produce PCBs that are adaptable to different applications (e.g., PCBs capable of having a variable number of support portions) without having to resort to such a customized production method.


An improved method of simultaneously printing a hook and loop fabric and adhering the fabric to another fabric or garment is provided. The method comprises the steps of applying a heat and pressure sensitive coating to one side of the hook and loop fabric, placing that fabric over a portion of another fabric or garment so that the hook and loop fabric touches the other fabric or garment, heating the two fabrics to commence activation of the coating, applying a printing material onto the hook and loop fabric and compressing the two fabrics together at an appropriate temperature and pressure, and for an appropriate time interval, to complete the activation of the coating so as to adhere the fabrics together and to activate the printing material. The resulting fabric or garment has a hook and loop fabric attached thereto in an unremovable, non-shifting manner due to adhesion of the two fabrics from the coating. The hook and loop fabric will, in addition, have an ornamental design printed thereon as a result of the application of the printing material.

This invention relates to the garment field, and more particularly, to a method of applying a print design to standard hook and loop fabric (for example, Velcro.RTM.), while simultaneously attaching the hook and loop fabric to an underlying fabric or garment.
Hook and loop fabrics are old in the art. Fabric and garments having other hook and loop fabric attached thereto is also old in the art.
Garments, such as shirts, sweatshirts, pants and hats, have long since been printed with ornamental designs. Methods of printing fabric which are known in the art include, among others, screenprinting, heat transfer printing and belt printing.
In its basic form, screenprinting consists of the alternating application of laying different screens over the same area of an underlying fabric or garment and the application of different colored printing material (inks, paints, etc.) applied with pressure over each screen. Each of the screens has a print element or portion of the overall design to be placed onto the fabric or garment. When the full set of screens (one or more screens), and their different colors, have been completely applied to the fabric or garment, a complete underlying design can be seen on the fabric or garment.
Belt printing uses substantially the same steps as screenprinting, but with the added mechanization of the cut fabric or garment proceeding along on a conveyor belt to different stations of screenprinting presses.
Heat transfer printing consists of the taking of an applique (which is transfer paper having a design printed thereon and treated with a heat and pressure sensitive adhesive on the back thereof), and transferring the design element of the applique onto a fabric or garment. The applique is transferred to the fabric or garment by applying the appropriate heat and pressure, for an appropriate period of time, thereby fusing the applique to the fabric or garment so that the ornamental design is visible on the outside of the fabric or garment.
It became popular to further adorn fabrics and garments with hook and loop fabric pieces, such as Velcro.RTM., so that removable ornamental pieces, such as figures of people or animals or writing, could be removably attached to interact with the printed-on design. It was a disadvantage of these types of systems that the hook and loop fabric pieces, onto which the detachable ornamental pieces could be placed, and which were interspersed around the fabric or garment, did not also contain any design features to allow them to blend into the surrounding or background picture. For example, if the system involved was a blue sky which incorporated different positions for a detachable element such as the sun, any position on which to place the sun would need to have a piece of the hook and loop fabric adhered or stitched over a part of the blue sky background. The hook and loop fabric would not necessarily be the same color as the blue sky background, and therefore, when no sun element was affixed to a particular hook and loop piece, that piece would be visible and disrupt the beauty of the underlying picture, it would also not be the same texture of the background picture.
Accordingly, it would be desirable to provide a method of printing the hook and loop fabric itself with the ornamental background design while maintaining the integrity of the hook and loop structure, so that removable ornamental elements could be affixed onto the design in any location to interact with that design.
Since the hook and loop fabric is different than the underlying fabric of the garment (usually cotton, polyester, a cotton-polyester blend or any other type of natural or synthetic fabric), it is also a disadvantage to stitch a hook and loop fabric to the underlying fabric or garment since different shrinkage coefficients exist for the two fabrics and the hook and loop fabric would ultimately crumple up or become detached from the garment during repeated wash cycles. Accordingly, it would also be advantageous to provide a method of resolving this attachment problem, while also enabling the hook and loop fabric to be printed.

Method of simultaneously printing a portion of a hook and loop fabric and attaching the fabric to another fabric and the fabric or garment resulting therefrom


The invention concerns a fluid distributor, in particular a hydraulic manipulator comprising a body (5), a pressure reducing valve (2) mounted in the body comprising a plunger (3) mobile in translation and whereof the displacement is controlled by a push-rod (11), a control member (6) including at least one finger (10) for modifying the position of the push-rod, means forming a solenoid (15) mounted in the body, a frame (16) adapted to be driven in translation simultaneously with the push-rod. The dispenser further comprises means for catching (20) the frame on the finger delimiting a window wherein the finger projects substantially transversely, the push-rod being mounted so as to pass right through the frame and project into the window, and the finger being interposed between the catching means and the push-rod.

The present invention relates to pressurized fluid distributors which are used to enable one or more downstream devices, operating with a pressurized fluid, to be controlled by means of a manually maneuvered member.
More particularly, the invention relates to hydraulic manipulators intended to provide control of different hydraulic functions of a public works vehicle, for example.
There is a known fluid distributor, disclosed in WO-96/30652 in particular, of the type comprising:                a body having at least one cavity, one end of which opens on to at least one face of the body,        at least one pressure reducing valve which is mounted in the body, and which comprises a push rod mounted movably at the level of the open end, a plunger mounted in the cavity and a control spring interposed between the push rod and the plunger, the said plunger being mounted so that it can oscillate in translation to carry out the pressure reduction function, and whose equilibrium point depends on the compression of the control spring caused by the depression of the push rod and the output control pressure to be delivered to a downstream device,        a control member for modifying the depression of the push rod in order to control the value of the delivered pressure, the control member being mounted pivotably facing the said face of the body and comprising at least one finger,        means forming a solenoid which can deliver a magnetic field in a direction substantially parallel to the direction of translation of the plunger, which are mounted in the body so as to be substantially coaxial with the push rod, and which form a bearing surface substantially coplanar with the said face of the body,        an armature, made from a material sensitive to the magnetic field, which can be moved in translation simultaneously with the push rod, and which comprises a contact surface located to face the bearing surface of the means forming the solenoid, in such a way that it bears on this bearing surface to lock the push rod in position with a predetermined attractive force.


An image pickup apparatus may include an imaging optical system operative to adjust a focal position of images corresponding to light incident from a lens, a frame arranged movably in an optical axial direction of light incident to the imaging optical system for fixing the imaging optical system by covering the periphery of the imaging optical system, a drive unit operative to move the frame in the optical axial direction to an arbitrary position within a predetermined range, an image pickup device operative to receive light incident through the imaging optical system so as to output a signal corresponding to the received light, and an urging unit inserted between a pedestal base having the image pickup device attached thereto and the frame for urging the frame in the optical axial direction as well as in a direction remote from the image pickup device.

1. Field of the Invention
The present invention relates to image pickup apparatuses and mobile phones, and in particular it relates to a small-sized image pickup apparatus and mobile phone capable of achieving a high-quality imaging function with low cost.
2. Description of the Related Art
Recently, a small-sized thin image pickup apparatus has been widely used so as to be mounted on a small portable electronic instrument such as a mobile phone and a PDA (personal digital assistant). As a result, not only speech information but also image information can be simply transmitted.
In such an image pickup apparatus built in a small portable electronic instrument, because of its small size, a focal length of an imaging optical system is extremely reduced, and the aperture F-value may be set at about 2 to 4 for increasing a shutter speed so as to prevent camera shake. Hence, the depth of focus on the image side is extremely reduced, so that the accuracy in positioning the imaging optical system in the optical axial direction relative to an imaging plane is severely demanded.
Elements on the light receiving section of an image pickup device for photo-electric conversion in the image pickup apparatus are arranged at a pitch of several micro-meters. Thereby, even if a miniature body, such as dust, exists on the image pickup apparatus, an object luminous flux is shielded, impairing picking up object images, so that dust proof of the image pickup apparatus becomes an important challenge.
Under such situations, in regard to the positional setting method and the dust proof method of an imaging optical system of the image pickup apparatus, various techniques have been proposed. For example, a technique is disclosed in that for eliminating the focus adjustment during manufacturing the image pickup apparatus, an image pickup device and an optical component are positioned in an optical axial direction by making a leg formed integrally with the optical component abut the image pickup device so as to urge the optical component in the image pickup device direction with an elastic member such as a coil spring while measures for dust proof being taken (see Japanese Unexamined Patent Application Publication No. 2003-37758, for example).


A method for multilevel programming flash memory cells of a three dimensional array of flash memory cells, the method may include receiving or determining a multiple phase programming scheme that is responsive to coupling between flash memory cells of the three dimensional array; and programming data to multiple flash memory cells of the three dimensional array in response to the multiple phase programming scheme. The multiple phase programming scheme determine a manner in which multiple programming levels are applied. At least two programming levels of the multiple programming levels correspond to bits of different significance.

Nonvolatile flash memory devices store information in the form of charge in a flash memory cell. A flash memory cell may consist of a CMOS transistor with an additional floating metal gate between the substrate and the transistors gate or it may be constructed with no floating metal gate such that charge may be trapped in the insulator between the control gate and the channel. The charge is either stored in the floating gate or in the insulator and is injected to the floating gate during an operation known as programming. The charge may be removed during an operation known as an erase operation.
As the charge in the floating gate or insulator may vary contiguously, it is possible to store more than just one bit per flash transistor by using several charge levels to symbolize different sequences of bits.
FIG. 1 demonstrates a voltage level distribution for a 3 pbc (bits per cell) flash memory cell. The voltage level distribution includes eight lobes 101-108. Each lobe represents a 3-bit value.
The voltage level distributions of FIG. 1 illustrates non-overlapping lobes, however this is only schematic, and in practical cases the lobes may overlap. The reason for overlapping may be intentional for obtaining high programming speed, or due to the retention effect. For floating gate devices, an "old" page, may introduce greater overlap between lobes than a new page, since after many program/erase (P/E) cycles there is accumulated trap charge, which is de-trapped over time. After a long duration, every lobe may have a larger standard deviation (STD) and may have a different mean location. These effects are also known as retention.
The 3 bpc cell includes a most significant bit (MSB), a central significant bit (CSB) and a least significant bit (LSB). A physical page of flash memory module may store three logical pages. This physical page is programmed one logical page after the other. The programming includes various types of programming such as MSB programming (in which some of the cells are programmed to a single lobe and some are left in the erase state. At the end of this programming process only two lobes exists, the erase and the MSB lobes), a CSB programming (in which the erase lobe and the MSB lobe are each split into two lobes by further programming pulses, depending on the original state of each cell and the corresponding CSB bit. At the end of this step there are four lobes) and a LSB programming (in which each of the four lobes is further split to create 8 lobes, overall). The logical pages are read by applying various types of read operations such as MSB read (in which a MSB threshold 114 is used), CSB read (in which two CSB thresholds 112 and 116 are used) and LSB read (in which four LSB thresholds 111, 113, 115 and 117 are used). FIG. 2 shows similar distributions for the case of 2 bpc devices.
The previous paragraph describes one method. There are several methods for programming 8 lobes.
A NAND flash array (or block) is constructed from NAND flash memory cells. The NAND flash memory cells are grouped into columns (or strings). FIG. 3 shows a typical prior art portion 30 of a NAND flash memory array that includes thirty two lines (wordlines 31(1)-32(32)) and multiple (Q) columns (32(1)-32(Q).
Once Colum 32(q) is illustrated in further details—it shows the thirty two flash memory cells 34(q) of the column, bit line select transistor and ground select transistor, and the voltages 33(q) supplied to the transistors and flash memory cells (Bit Line Select, Vbias, Vth). Column 32(q) is connected to sense amplifier 35(q), that in turn is connected to latch 36(q). A string (column) is duplicated many times (for example Q=34560-250000 times) in a block and includes several (for example—thirty two) flash memory cells. Each of the flash memory cells is associated with a different wordline (or row) which connects all of the corresponding cells in the other strings of the block. When a block is chosen, each string is connected to a corresponding bitline by turning on the Bit Line Select and the Ground Select transistors. When a read operation is performed, a sense amplifier is connected to the bit-line and after allowing some time (say 25-125 uS) for the bit-line voltage to settle, the result is stored by a latch.
In order to measure the charge in a certain cell within a string, all other cells are switched on by applying a high voltage on their gates (given by Vbias) and a comparison voltage, Vth, is applied to the gate of the selected cell. If the cell is charged and Vth is not high enough, the gate will not allow current to flow and the sense-amplifier will output a "0". On the other hand, if the cell is not charge or Vth is high enough, current will flow and the sense-amplifier will output a "1". Different schemes may exist where the cell being samples is biased with a constant voltage (say Vcc) but in the sense-amplifier a comparison against a reference string is performed which reference value may be determined by some external voltage, Vth.
The above sampling technique holds when a bit may be obtained only through a single threshold comparison. When more than a single threshold comparison is required, the above procedure may be performed for each threshold and the results may then be combined. Alternatively, several sense-amplifiers may be used simultaneously, each one compares against a different threshold, and the results are then combined to yield the required bit value.
All cells in a word-line (physical page) are programmed simultaneously and read simultaneously. In case of MLC or TLC, the programming of a wordline is divided into two or three stages, referred to as MSB, CSB and LSB page programming stages.
Above we described a standard floating gate planar NAND device. Historically, planar NAND design enabled continued storage capacity density improvements through continuous shrinking of the basic cell feature sizes from one NAND technology node to the next, reducing the basic gate size from 48 nm-41 nm-32 nm-25 nm-19 nm. However, it is proving harder and harder to shrink the basic silicon process feature size for several reasons. The main reasons include: a. limitations in the tools required and b. limitation in the reliability of a single NAND flash cell. The NAND Flash cell reliability is primarily determined by the number of electrons use to store a state in a cell. In smaller technology nodes (such as 16 nm) the number of electrons per state in a cell becomes very small (a few tens), greatly reducing the reliability of the stored information.
Therefore, it has been suggested to produce a multi-layered NAND Flash memory array which overcome the limits of planar NAND design and which continues with current trends in storage density improvements. It was suggested that in a multi-layered NAND Flash array, the basic feature size will be much larger than current planar NAND feature size (e.g. 40 nm instead of 19 nm) and thus eliminating the problems associated with such small technology nodes (namely, tooling and NAND transistor reliability). However, to allow improvement in density, the NAND arrays are to be stacked one on top of the other, 64-128 floor high. Thus, obtain a gain in the vertical dimension, which is higher than the loss due to going back from a 19 nm to 40 nm technology node. The introduction of NAND cell in a third dimension earned this technological advancement the name of 3D NAND.
There are various manners to build 3D NAND device and still allow the reduction in cost per bits, even though the production process has become more complicated and requires more steps. One of the key steps which allows the reduction of the cost is etching or hole drilling which enables to simultaneously produce multiple NAND gates on several floors, without increasing the cost linearly with the number of floors.
Several methods have been suggested for producing 3D NAND which differ in how the NAND cells are organized in space. Non-limiting examples of 3D NAND arrays include the bit cost scalable (BiCS) standard memory, pipe shaped BiCS memory (p-BiCS) of Toshiba, the terabit cell array transistor (TACT) of Toshiba, the Vertical recess array transistor (VRAT) of Samsung, a 3D dual control-gate with a surrounding floating-gate of Hynix.
In a vertical channel design, the NAND Flash bit-line or column described previously and in FIG. 3, end up as a vertical column, perpendicular to the base axis of the die. This is also shown schematically in FIG. 5 where multiple vertical planes 101(1)-101(J), each having an array of flash memory cells 101(1)-102(J) connected via bit lines 103. In general the j'th plane (j ranging between 1 and J) 101(j) has multiple pages (such as page 4) each page (or row) includes multiple flash memory cells and the cells of each page are read concurrently.
All pages belonging to the same bit-lines (to the same plane) constitute a block—thus planes 101(1)-101(J) form J erase blocks. As in the planar case, all cells belonging to the same block are erased simultaneously and all cells belonging to the same page/row are programmed simultaneously. A block may constitute more than one plane, as shown in FIG. 6 in which erase block 105(1) includes two planes 101(1) and 101(2).
FIG. 7 shows a slightly more complex structure of vertical channel 3D NAND. This is Toshiba's p-BiCS structure where each bit-line is actually made of two vertical lines connected at the bottom (U-shape) and flash memory cells are arranged in pairs such as pairs 106(1)-106(4)—wherein one flash memory cell of the pair is connected to one vertical line and the other flash memory cell of the pair is connected to the other vertical line (both vertical lines are connected at their bottom).
In a vertical channel 3D NAND the NAND Flash bit-line or column is horizontal to the base axis of the die, as shown in FIG. 4. The bit-line and rows are defines in a similar manner as in the vertical channel. The planes 101(1)-101(J) are horizontal.
A 3D NAND array adds additional disturb factors. One of these is additional cell to cell coupling. Now each cell has many more neighboring cells. Instead of nine neighboring cells in a planar NAND (four near neighbors and four diagonal), now there are twenty six neighbors to each cell 200 (see FIG. 9) where we can distinguish between three levels of neighbors. Six level one neighbors 201, twelve level two neighbors 202 and eight level three neighbors 203. Thus, the charge stored on neighboring cells may affect the threshold voltage of the center cell.
Cell to cell coupling in 3D NAND is also different than in planar NAND through coupling between different blocks. Different blocks may affect one another through the cells on their borders. Since in standard NAND, block programming order is arbitrary, it is difficult to control the coupling effects on the boarders of the blocks.
It should be noted that cell to cell coupling may vary, depending on 3D NAND implementation and may also exhibit no coupling due to the basic structure of the NAND cell. However, it is inevitable that as 3D NAND device technology node will shrink to increase density, so will cell to cell coupling will become more severe.
The coupling effect between cells is further increased when multiple bits per cell are programmed due to the larger charge and larger voltages.
In the following we present methods to limit the amount of disturb from neighboring cells using methods of programming ordering, depending on the 3D NAND structure, read back coupling cancellation methods and block management schemes.

Digital signaling processing for three dimensional flash memory arrays

AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD


Processing diversity signals includes receiving diversity signals at a number of antennas. The diversity signals have communicated information, and the antennas are associated with channel paths. A phase of at least one diversity signal is adjusted. The diversity signals are combined to form a combined signal. The combined signal is processed to yield the communicated information. A combined complex channel gain estimate is determined from the combined signal. An individual complex channel gain estimate is calculated for each antenna from the combined complex channel gain estimate. Phase adjustments associated with the channel paths are established according to individual complex channel gain estimates. The phase adjustments are applied to next diversity signals having next communicated information. The next diversity signals are processed to yield the next communicated information.

Spatial diversity generally involves using multiple antennas for transmitting and receiving diversity signals in a wireless communication system. One known technique utilizes spatial diversity in conventional Code Division Multiple Access (CDMA) systems. This known technique, however, may require additional receiver devices at the mobile device to process diversity signals. Another known technique for using diversity antennas at a mobile device involves the use of low complexity receivers. This known technique, however, may require periodic training or adaptation to extract channel information from the diversity signals, which may result in performance degradation at high mobile speeds. Consequently, known techniques for processing diversity signals have been unsatisfactory in certain situations.

Processing diversity signals at a mobile device using phase adjustments


A method and apparatus for canceling interference between a transmission signal and a received signal in a full-duplex RS in a communication system are provided, in which an RF/IF signal received from a first node through an antenna is converted to a baseband received signal, demodulated and decoded, a baseband transmission signal is generated by encoding and decoding the decoded data, a baseband interference estimate is calculated using the baseband received signal and the baseband transmission signal, a baseband interference is eliminated from the baseband received signal according to the baseband interference estimate, the baseband transmission signal is converted to an RF/IF transmission signal for a second node, an RF/IF interference estimate is calculated by converting amplitude of the RF/IF transmission signal and delaying it, and an RF/IF interference is eliminated from the RF/IF received signal according to the RF/IF interference estimate.

Future-generation communication systems are under development to provide high-speed, large-data transmission and reception services to mobile stations (MSs). For the high-speed data transmission and reception, future-generation communication systems adopt a multi-hop relay scheme. Multi-hop relay is a scheme of transmitting data via fixed or mobile RSs over multiple hops. When the channel status between a base station (BS) and an MS is poor, a multi-hop relay path is established and data is transmitted and received between the BS and the MS via RSs, thus providing a better radio channel to the MS. Therefore, with the use of the multi-hop relay scheme in a shadowing area experiencing severe shielding due to buildings, a communication service can be provided efficiently to a user (i.e., an MS). Also, the multi-hop relay scheme provides a better data channel to a cell boundary where an MS is in poor channel status and expands cell coverage.
An RS demodulates and decodes data received from a transmitter (i.e., a BS) and then encodes and modulates the demodulated and decoded data, prior to transmission to a receiver (i.e., an MS). This RS enables high-speed data transmission and reception by reducing path loss between radio links, and enables data transmission and reception even when the MS is remote from the BS or the MS is located in a shadowing area.
However, if a transmit antenna and a receive antenna are not substantially isolated from each other in the RS, a relatively strong signal (for example, a transmission signal) interferes with a relatively weak signal (for example, a received signal). Thus, different radio resources should be used for the transmission signal and the received signal. In the case where N RSs are taken to transmit one-frame data, the BS should use (N+1) times more resources than for direct transmission to an MS. As a result, the whole system capacity may be decreased. Now a description will be made of a comparison between the direct transmission and the relayed transmission in terms of radio resources (for example, slots) when the BS transmits one-frame data to the MS with reference to FIGS. 1A and 1B.
FIG. 1A illustrates slots taken to transmit a signal from a BS to an MS in a conventional communication system.
Referring to FIG. 1A, the BS transmits one-frame data directly to the MS in a single slot.
FIG. 1B illustrates slots taken to transmit a signal from a BS to an MS in a multi-hop relay communication system. Before describing FIG. 1B, it is assumed that the multi-hop relay communication system includes N RSs.
Referring to FIG. 1B, the BS transmits one-frame data to the MS via the RSs in a new slot on each of links BS-RS1, RS1-RS2, . . . , RSN-MS. Consequently, the BS requires (N+1) slots to transmit the one-frame data to the MS via the N RSs.
As described above, RSs enable high-speed data transmission and reception and also enable data transmission and reception even when an MS is remote from a BS or in a shadowing area in a multi-hop relay communication system. However, unless a transmit antenna is sufficiently isolated from a receive antenna in an RS, a relatively strong signal interferes with a relatively weak signal. The resulting requirement for using different time and frequency resources for each signal transmission leads to resource consumption. Also, the use of RSs wastes limited radio resources and thus decreases system capacity.

Apparatus and method for canceling interference in relay station in a communication system


A method is disclosed for translating by a computer system of a COBOL computer program into a translated computer program in a readable and maintainable syntax in an object oriented programming language. The translated program including variable names equivalent to the original COBOL variable names and with attributes described in COBOL syntax. The translating method further providing for memory allocation in the translated computer program for storage of “COBOL” variables compatible with that of the original COBOL program; a description of program flow that is readable, and utilizing arithmetic operators to describe operations between COBOL variables. Also disclosed is a special object oriented run-time library for creating and performing operations between COBOL numeric objects, including maintaining storage of variable content in the original COBOL format, and for enabling readability of the translated source code by allowing arguments for variable type descriptions to be expressed in COBOL syntax.

As well known in the art, a compiler is an important component of a computer system. A compiler performs the machine process of compiling computer programs written in high-level languages such as COBOL, C, C++, JAVA, and the like into machine code executable by the computer system.
Compilers/translators have been developed for translating (compiling) original source code programs written in earlier developed high-level languages such as COBOL into more modern languages such as C, or JAVA. The translation typically takes as input a source program file, such as a COBOL source program, and produces a second program file in a second high-level language such as "C". Another pass of compilation is then utilized to compile the second program in the second language to produce a machine code or executable program file. This two-step compilation approach potentially provides for better portability (running the program on a wider variety of machines) and also for increased performance since more optimized and modern tools and compilers operating on a modern language such as "C" or "JAVA" are available than for older languages such as COBOL.
However, the first translation step typically results in code in the new language that is quite difficult to read or understand, and which when compiled in the second compilation step may produce an executable that hides information relating to the original program. For example, variable names in the original program may not be the same in the translated computer program and a resulting executable and code that was understandable in the first language may translate to code that is difficult to understand in the second language. This obfuscation may require a programmer to expend extra time and effort to carry out debugging and maintenance operations. Further, it makes it necessary to retain copies of the original source code to be retranslated each time a change is made in order to conduct development and maintenance operations.
In general, a COBOL to C (or JAVA) translation process is made difficult because the COBOL language provides for a number of different program variable data types that are not typically directly provided or supported in other programming languages. COBOL data types include integers, and floating point numbers which may in some form be supported in the second language, but decimal numbers (decimal numerics), COBOL style character strings and other commonly used COBOL data types, are not supported directly by the "C" or JAVA programming languages. Descriptions of files with complex attributes are also provided in COBOL and not provided in other languages. Of particular interest in COBOL are decimal numeric variable types since direct support for variables of decimal numeric type are typically not provided in the C or C++ languages, or in the JAVA language. Also of interest is the COBOL character string variable type because, although certain character string data types are provided in C/C++, they are not stored in the same memory format as in COBOL, and therefore are not directly compatible. In COBOL, a character string has a fixed length, whereas in C character strings are stored as variable length strings with a null termination character designating the end of the string. The "C" programming language also provides for character arrays to be declared with each element having a fixed number of characters, but the input/output operations typically interpret the characters within a specific element of the array as null terminated character strings with the fixed number of characters being a maximum length of the strings, rather than a specified actual length. In COBOL, character strings are typically padded with characters representing blank spaces when the actual character string is not as long as the memory provided to store the entire string. With basic differences such as these, a direct translation of COBOL to C presents significant difficulty for many COBOL language constructs, and, in general, translation of the prior art has not in the prior art produced a translated program that is easily readable or maintainable by a programmer.
COBOL, although probably not considered by most programmers to be a "modern" programming language, is still very important to many businesses because the COBOL language has been utilized in development of many large computer business applications that are in still in production use today. However, the COBOL programming language is not commonly taught or used in schools and, as a result, COBOL programmers, especially young COBOL programmers, are harder to find than programmers knowledgeable of other computer programming languages such as C, C++, and JAVA.
Compilers that compile source programs written in the COBOL programming language are also not as common, and may not produce code as optimized as those compilers provided for more common and modern programming languages because there is potentially less market for these compilers. Integrated development environments, debuggers, and other programming tools and program debug tools may not work as of the original high-level language and the original high-level program. For these and other reasons, some businesses have found it advantageous to consider translating certain programs into another language.
The translation of a COBOL source program into a program with basically equivalent functionality as in another programming language, is not a simple task because COBOL has certain features that are not readily mapped (translated) into more common programming languages such as C, C++ or JAVA that results in a form that is easily readable by a human. For example, COBOL provides for definition of many and varied data types using "PICTURE" clauses to describe "DISPLAY" variables and these constructs are not found nor easily definable in either the C++ or JAVA programming languages. Additionally, there are no convenient built in data types for supporting variables having the format flexibility of COBOL PICTURE statements in C, C++, or JAVA. This is also true for COBOL file descriptions, and COBOL procedural control statements.
Several prior art compiler tools have been developed for translating an original COBOL source program into other computer languages such as C, or JAVA, but the resulting translated program code produced by utilization of these existing tools suffers from being expressed in a form that is not easily read or understood by a programmer. In fact, the C or JAVA code produced by the existing tools is almost at a level of a machine assembly language, and thus is typically only useful as input to a second compiler for building executable code.
Since improved readability of a translated program would be considered as a desired goal of a translator program, it is important to examine the prior art tools to see why it has not been possible to produce more readable code when translating a program described or written in the COBOL programming language.
One exemplary prior art tool used for translating a COBOL source program written in the COBOL programming language into a program in the "C" language, is an Open Source tool provided by OpenCOBOL.org. Open Cobol.org is a group that is described at the internet website "http://OpenCOBOL.org" as follows:                "OpenCOBOL is an open-source COBOL compiler. OpenCOBOL implements a substantial part of the COBOL 85 and COBOL 2002 standards, as well as many extensions of the existent COBOL compilers. OpenCOBOL translates COBOL into C and compiles the translated code using the native C compiler. You can build your COBOL programs on various platforms, including Unix/Linux, Mac OS X, and Microsoft Windows.        The compiler is licensed under GNU General Public License. The run-time library is licensed under GNU Lesser General Public License."
Another similar prior art COBOL to C compiler/translator tool is a "fork" based upon the OpenCOBOL.org compiler that is provided by a French company, COBOL-IT, having an address: 231 rue Saint-Honoré, 75001 Paris, FRANCE and a home website at "http://COBOL-IT.com".
Both the OpenCOBOL.org and the COBOL-IT compilers/translators operate in similar manner to provide as a first step, the translation of a COBOL source program into an intermediate program file in a second programming language that for these two tools is "C". Then as a second step, both compilers provide for building an executable with a selected C compiler, the C compiler provided with the intermediate program file produced in the first step. Examining the intermediate C code typically produced in the first step by each of these exemplary prior art compilers illustrates that the C code, while functionally correct and "compilable" by a C compiler, is not at all easily readable or quickly understandable by a person. The "C" program produced by the prior art compilers is useful mainly as an intermediate file in the two-step compilation process.
That is, in this exemplary prior art, the C code translation of an original COBOL source program is intended to be "read" mainly by a C compiler that is utilized to compile and produce a final executable program file. The translated C code produced by the prior art compilers of COBOL-IT.org and OpenCOBOL.org is not intended for use as a computer program that might be read or maintained by a programmer. In fact, as stated, the resulting intermediate C code can be viewed as almost a kind of generic intermediate assembly language in the two-step compilation process, with the second compiler, the C compiler, being utilized to produce a platform dependent executable program file.
Translation of an original COBOL source program into a program in the JAVA language is another alternative prior art approach. A compiler program tool called "NacaTrans" which provides translation of a COBOL program into a program in the JAVA language is available from the "NACA project" that is described at the World Wide Web URL (Uniform Resource Locator) address: "http://technology.publicitas.com/naca/". The NACA project translator program compiler tool is described briefly on this website as follows:                "NacaTrans implements a COBOL to JAVA transcoder engine. It's designed as a compiler, that takes COBOL BMS source files and output is JAVA or XML files. As a compiler, it uses a traditional compiler architecture: lexer, syntax analyser, semantic analyser, generator. All these compilations steps are implemented in the single Naca's Nacatrans module."
The NacaTrans translator deals with JAVA code generation and execution. The generated JAVA code utilizes a syntax that is intended by the developers of the tools to provide for expression of COBOL language properties within the limits of the JAVA language. This is described by the authors as follows:                "The generated code does not look like classical native JAVA and it is not object oriented from the application point of view. This was by design choice, to enable a smooth migration of COBOL developers to the JAVA environment. The goal of the NACA tools was to keep business knowledge in the hand of people who wrote the original COBOL programs."
In order to illustrate the lack of readability discussed above, two exemplary COBOL source program listings for programs named EXAMP1 and EXAMP2 are provided in FIG. 7 and FIG. 12 respectively. The corresponding resulting intermediate program files produced by the two prior compiler tools discussed above are provided in FIG. 8 and FIG. 14. FIG. 8 is a listing of compilation output (in "C") produced by running the prior art COBOL-IT compiler when the "EXAMP1.Cbl" program of FIG. 7 is provided as input to the COBOL-IT compiler. FIG. 14 provides a similar listing of compilation output in the JAVA language produced by running the prior art NACA COBOL to JAVA transcoder with a second example program "EXAMP2.cbl" (FIG. 12) program as input. FIG. 16 also included at the end of this specification provides another example of JAVA code produced by another open source prior art tool named "RES" available on the World Wide Web at the site identified by the URL "openCOBOL2JAVA.sourceforge.net".
It is readily seen from examining the listings provided in FIG. 8, FIG. 14, and FIG. 16 that the exemplary translated C and JAVA code produced by these prior art tools is not nearly as "readable" (understandable by a human) as the original COBOL source code. For example, in the exemplary JAVA code in FIG. 14 and FIG. 16, it can be observed that the variable declarations in both the "C" and the JAVA code are related to the original COBOL variable declarations but are expressed in a form that would not be readily understood by a COBOL programmer without reference to the original COBOL source program. In the same code, it can be further observed that both the JAVA and the "C" computation statements consist of many calls to library methods or subroutines to perform the "work" of the program, and the code for invoking these calls is also not easily "readable" or readily understood by a COBOL programmer.
Thus, even with the original COBOL program source for reference, it would be quite difficult for a programmer to understand either the declarations or the computation statements in either the C code produced by the COBOL-IT and OPENCOBOL.org compilers or the JAVA program code produced by the NACA transcoder. The exemplary code produced from both compilers is not only difficult to understand or read, but it also would be extremely difficult to attempt to modify the JAVA or the C code to make major fixes or to add any major new functionality, that is, to maintain the code. The JAVA code and the C code produced by these prior art compilers is neither readable, nor maintainable.
Further, the method of storing data in memory described in the translated C or JAVA program corresponding to the data described in the original COBOL program is not presented in the same form or organization as would be expected during running of the original COBOL program. This in turn potentially presents or introduces compatibility problems in sharing data on files between a translated program and another (untranslated) original COBOL program.
Thus, it would be a useful improvement over the prior art to provide a machine or machine implemented method for translating an original COBOL source program into a more modern programming language while maintaining readability of the original code. Accordingly, it is an object of the present invention to provide a machine implemented compilation or translation method that overcomes the difficulties of the prior art as discussed above, and that significantly improves on the readability of a translated COBOL program, in both the variable declaration and description sections of the original COBOL program, in the description of files, and also in the related procedural code which describes operations between variables, files and other data of the original COBOL program.
It is a further object of the present invention to provide a machine implemented compilation/translation method that makes it possible to reduce development and maintenance costs and time normally expended in carrying out these activities.

Method for translating a cobol source program into readable and maintainable program code in an object oriented second programming language


A pressure-sensitive adhesive tape contains a substrate and a pressure-sensitive adhesive layer disposed on at least one side of the substrate, wherein the substrate contains colored layers containing a silver layer, a layer of a color other than silver and black, and a black layer which are superposed in this order.

LCDs of the internal/external dual lighting type which are employed in cell phones and the like include a liquid-crystal display module unit and a backlight unit which are fixed to each other with a pressure-sensitive adhesive tape as shown in FIG. 7 (see JP-A-2002-249741, JP-A-2002-23663, and JP-A-2002-235053). (The term "JP-A" as used herein means an "unexamined published Japanese patent application".) This pressure-sensitive adhesive tape is required to have the property of reflecting light and the property of shutting off light having specific wavelengths. Light-reflecting properties are necessary for reflecting the light from the backlight to thereby enhance luminance and reduce the power consumption based on the effective utilization of reflected light. On the other hand, light-shutting properties are necessary for inhibiting the light from the backlight from leaking out to the LCD surface to cause viewing failures.
Pressure-sensitive adhesive tapes which reconcile light-reflecting properties and light-shutting properties have hitherto been investigated. Pressure-sensitive adhesive tapes of this kind generally have a colored layer disposed on one side of the substrate film or have a colored pressure-sensitive adhesive layer. In general, a white layer is disposed on the backlight side in order to reflect the light from the backlight, and a black layer is disposed on the liquid-crystal display module side in order to prevent the light from leaking out to the LCD surface. For example, a pressure-sensitive adhesive tape employing a substrate film colored white has a transparent pressure-sensitive adhesive layer disposed on the backlight side and has a black layer or black-pressure-sensitive adhesive layer disposed on the liquid-crystal display module side. A pressure-sensitive adhesive tape employing a substrate film colored black has a white layer or white pressure-sensitive adhesive layer disposed on the backlight side and has a transparent pressure-sensitive adhesive layer on the liquid-crystal display module side. Furthermore, a pressure-sensitive adhesive tape employing a transparent substrate film has a white layer or white pressure-sensitive adhesive layer disposed on the backlight side and has a black layer or black pressure-sensitive adhesive layer disposed on the liquid-crystal display module side.
However, in order to reconcile light-reflecting properties and light-shutting properties with such a pressure-sensitive adhesive tape, it is necessary to superpose many colored layers or to form colored layers thickly. This has resulted in a problem that the pressure-sensitive adhesive tape comes to have an increased total thickness and be unable to conform to thickness and weight reduction in cell phones and the like.


A method and apparatus for tenderizing meat by electrical stimulation is characterized by a portable device supplying an electrical current through an electrode or electrodes.

The use of electrical stimulation of a carcass to expedite tenderizing is described by U.S. Pat. No. 2,544,681 to Harsham et al. It is recognized in that patent electrical stimulation results in an accelerated postmortem drop in the pH of the animal tissue and that this accelerated pH drop is beneficial to beef tenderness. Subsequent work in the field has shown that electrical stimulation of muscle rapidly depletes adenosine triphosphate (ATP) from the muscle. This chemical is necessary for muscle contraction to take place. Chilling of muscle (which is a common procedure in the meat packing industry) while the ATP level is still high results in a contraction or shortening of the muscle which produces an undesirable toughness. Depletion of ATP before chilling by electrical stimulation prevents or considerably reduces contraction and provides for much more tender beef. In U.S. Pat. No. 4,358,872 to Van Zandt, a rectal probe is used to tenderize beef, using electrical stimulation.

Portable apparatus and method for tenderizing meat


The present invention lies in the field of nitrocellulose nail varnishes and its subject is the use of an arylsulphonylurethane as film forming resin in these varnishes, which makes it possible in particular to avoid the release of formaldehyde, a carcinogenic compound which is formed when an arylsulphonamide-formaldehyde resin is employed.. Another subject of the invention is new poly(arylsulphonylurethanes) containing from 2 to 5 arylsulphonylurethane groups and possessing a molecular mass of between 450 and 1500.

The state of the art proposes a number of solutions.
Patent Application PCT WO 90/12829 describes the use of epoxysulphonamide resins in compositions for cosmetics and especially in nitrocellulose nail varnishes. However, the cost of these resins rules out an industrial application.
French Patent Application FR 2,421,604 describes nitrocellulose nail varnishes comprising, as product replacing the arylsulphonamide-formaldehyde resins, a composition including sucrose benzoate by itself or mixed with methyl methacrylate, sucrose acetate isobutyrate and a phthalate, an adipate or an organic phosphate. This solution therefore requires the preliminary preparation of a premix, and this makes the process more complex and costly.
The known solutions are therefore not wholly satisfactory.

Use of an arylsulphonylurethane as film forming resin in nitrocellulose nail varnishes, new arylsulphonylurethanes and new nitrocellulose nail varnishes

Societe Nationale des Poudres et Explosifs


A grill that includes a base and, residing thereupon, a cooking surface in the form of a grate for supporting food to be cooked by the grill. A first removable drawer is positionable beneath the grate having at least one burner. A source of combustible fuel, such as a pressurized gas, is contained within a tank located within the base of the grill. A fuel line emanating from the pressurized tank terminates at a control valve having a first gas transmitting position facilitating the combustible fuel fed to the at least one burner and a second gas blocking position preventing the combustible fuel to be fed to the at least one burner. The control valve is capable of assuming the first gas transmitting position only if the first removable drawer has been fully positioned beneath the cooking surface. When an alternative drawer, such as one containing charcoal is employed, fuel from the pressurized tank is blocked from emanating from the tank.

Barbeque grilling is a very popular past time combining a social get together with a unique cooking experience. Historically, virtually all barbequing was conducted using charcoal or other solid fuel sources. More recently, gas grilling has gained in popularity because of its relative ease of use noting that gas is available instantaneously not requiring a liquid fire starter and charcoal prepping. Nevertheless, many of those who engage in outdoor grilling still prefer charcoal sources, as it is generally believed that charcoal adds to the flavor of the cooked product.
As noted, there are drawbacks in employing charcoal as a fuel for grilling. Charcoal burns hotter than alternative fuel sources and, as a consequence, uneven cooking and flame up due to greases, oils and similar flammable liquids is always a potential. It is also difficult to control the temperature of a charcoal fuel source noting that, initially, charcoal provides an inadequate source but when properly combusted, charcoal can generate impressively high temperatures.
Gas sources such as propane are available commercially. Propane is generally housed within a pressurized tank as a liquid and is fed directly to a burner using metering controls generally provided with most outdoor grills. As such, a gas fed grill operates much like a conventional stovetop providing the user with a clean and efficient cooking environment albeit one that does not offer the traditional grilling experience and flavor achievable only through the use of charcoal.
Recognizing the advantages available through the use of charcoal and propane gas, it has been suggested that a universal grill have the ability to switch between the two fuel sources depending upon the wishes of a user. Great care, however, must be exercised in doing so for one would not wish to continuously employ a gaseous fuel source when using charcoal. As a consequence, one wishing to shuttle between charcoal and propane would generally be encouraged to access the pressurized propane tank and physically close the valve sitting on top of the tank to manually disrupt gas flow, which would otherwise feed a burner. However, if one, through inadvertence, failed to close the pressurized tank when using charcoal, a dangerous situation could ensue where the combination of gas and charcoal could cause dangerous flare-ups and consequent significant injury to a user.
Furthermore, one would generally not wish to simply add charcoal to a propane burner element as the debris from the charcoal in terms of ash and unconsumed carbon would foul the burning element resulting in uneven and disrupted gas flow once a user was to convert from charcoal back to gas fired burners.
It is thus an object of the present invention to provide a grill capable of operating on either pressurized gas or charcoal and yet overcomes the disadvantages as described above.
These and further objects will be more readily apparent when considering the following disclosure and appended claims.


An improved automotive headrest and an automotive seat with the improved automotive headrest. The automotive headrest comprises a support and a headrest body disposed on the support, the headrest body has a first cavity and a second cavity independent of one another, and the first cavity and the second cavity are provided with a speaker unit respectively, and the two speaker units are located on the left and right sides of the headrest body respectively. The automobile headrest has a simple structure, a small size, and a good visual field.

The existing automotive seat mainly includes a backrest and a headrest, with the headrest being mounted on the automotive seat. At present, most of the traditional automotive seats do not have a sounding unit, or speaker. When the occupant wishes to listen to music or answer the phone, it is generally realized by car audio. However, this way has the problem of poor privacy.
Aiming at this problem, Chinese Patent CN206141387U provides an automotive electronic headrest comprising a headrest frame, a main headrest and two side headrests, the headrest frame comprising a main support and two side extension supports connected to opposite sides of the main support, the main headrest being sheathed on the main support, and the two side head headrests being respectively sheathed on the corresponding side extension supports. Each of the side headrests is provided with at least one audio assembly and at least one microphone assembly. Although the automotive electronic headrest provided by this Chinese patent solves the above problems to some extent, it has two side headrests, which results in a large overall volume of the headrest, which wastes cost and affects the appearance. Further, the design affects visual field on the left and right sides.