A transmission side terminal 10 is provided with a transmission and reception unit 20 for transmitting and receiving an e-mail and an e-mail composing unit 32 for composing an e-mail including a special character for inquiry having associated therewith an information reply request, which is to obtain information on a destination mobile terminal of the e-mail to be transmitted. A reception side terminal 10 is provided with the transmission and reception unit 20, a determination unit 34 for determining whether a received e-mail includes a special character for inquiry, and a reply e-mail composing unit 32, when it is determined that the received e-mail includes the special character for inquiry, for composing a reply e-mail including a special character for reply with which reply information in accordance with the information reply request is associated.

In recent years, mobile terminals including cellular phones are widely and commonly used, and the number of users has been increasing. In particular, recently, exchanging messages between the users of the mobile terminals through transmission/reception of e-mails by use of mobile terminals such as a cellular phone and PDA is widely and routinely performed. Moreover, the mobile terminals are equipped with various function units and application programs such as a digital camera, GPS (Global Positioning System) and non-contact IC card function, for example. These days, mobile terminals are thus multifunctional, improving convenience for users significantly.
In Japan, due to a revision of the Ordinance of the Ministry of Internal Affairs and Communications (Regulations for Telecommunications Facilities for Telecommunications Business), the 3G (third generation) cellular phone terminals released on and after April 2007 are required to have a function for notifying the departments concerned of the location information of the terminal at the time of transmission of an emergency message. Under such a circumstance, it seems that the GPS (Global Positioning System) in particular will be spread even more widely among the functions incorporated in the mobile terminals. There have been suggested a variety of mobile terminals having navigating functions by the GPS, including one described in Japanese Patent Application Laid-Open No. 10-341476.
The cellular phone described in the Japanese Patent Application Laid-Open No. 10-341476 can, as a normal cellular phone, communicate with another cellular phone by radio and, in addition display the present location obtained by a GPS reception unit and a GPS image data generation routine on a liquid crystal display by a map, whereby the user of the cellular phone can know his/her present location almost exactly.
The user moving with such a cellular phone may use the GPS function as a usable guide. Thereby, the cellular phone can significantly reduce a risk that he/she gets lost and cannot arrive at a destination, even if a meeting spot designated is where the user has never been before.
However, an intended usage of the GPS is normally to obtain the location information of the mobile terminal. Therefore, the cellular phone described in Japanese Patent Application Laid-Open No. 10-341476 cannot provide the present location of a mobile terminal of a corresponding party supposed to meet but provides only the present location of the mobile terminal itself.
When the user wishes to know the present location of the corresponding party, for example, if the corresponding party carries a cellular phone, it is possible to obtain the present location of the corresponding party through wireless communications or e-mails with the corresponding party. However, it could be a considerable burden for the corresponding party to verbally describe his/her present location and, in some cases, it may be difficult for the corresponding party to talk or explain on the phone, such as when the corresponding party is on a train. In addition, it may be a troublesome task for the corresponding party to write the present location in e-mail, and further, there may be some cases where the corresponding party cannot successfully describe the present location by using textual information. It may happen that the corresponding party has no idea about the present location if he/she is unfamiliar with the place.
In order to deal with such problems, Japanese Patent Application Laid-Open No. 2002-262338, for example, discloses a technique in which each of the mobile terminal of the user and the mobile terminal of the corresponding party is provided with the GPS function and obtains its location information from a GPS satellite. According to this technique, the user can obtain even the location information of the corresponding party from a location information service center by using his/her mobile terminal and also map information from a map information database.
A mobile communication terminal described in the Japanese Patent Application Laid-Open No. 2002-262338, enables the user to obtain the present location information of the mobile terminal of his/her mobile terminal as well as the present location information of the mobile terminal of the corresponding party. Moreover, this mobile communication terminal can show not only the user's location but also the corresponding party's location on a map displayed on a display unit of the user's mobile terminal. It is thus possible to easily locate the present location of the corresponding party. Hence, according to the mobile communication terminal described in the Japanese Patent Application Laid-Open No. 2002-262338, it is possible to easily recognize a locational relationship between him/her and the corresponding party.


A ballpoint pen refill which can be applied to a retractable ballpoint pen is provided. An ink 2 endowed with a thixotropic property and an ink follower 3 at the rear of this ink are contained within an ink tube 1 comprising a tip holder member 9 and an ink member 10. A ball 6 is held in a front end aperture 9a thereof. A ballpoint pen tip 4 having an inner reshaped surface 4f of a front end rim 4b that is formed into a spherical surface in the shape of the ball is fitted therein. A coil spring 7 that always presses the ball onto the inner reshaped surface is provided with a movable member 8 between the spring and ball. A stopper 5 provided with a ventilation means is fitted into a rear end of the ink tube. A partition portion 9g having an ink-flow passageway for restricting the amount of ink that flows and a rear end surface 9c is formed in an engagement portion 9d of the tip holder member 9 that is fitted in the ink member 10.

A capped ballpoint pen of the prior-art shown in FIG. 7 uses an ink which is endowed with a thixotropic property and which is poured directly into an ink-accommodating tube 1. The ink 2 that is endowed with a thixotropic property, such that the viscosity thereof is high in a static state but drops when the ball rotates during writing, is accommodated within the ink-accommodating tube. An ink follower 3 that follows the consumption of the ink and also prevents the ink from flowing backwards, is inserted at a rear portion of this ink. An engagement portion 9d of a tip holder member 9 is fitted in the front end of the ink-accommodating tube, and a ballpoint pen tip 4 is fitted in a front end aperture 9a thereof. A stopper 5 provided with a ventilation means is fitted in the rear end of the ink-accommodating tube 1. This type of ballpoint pen refill is inserted into a penholder tube B in a state such that only a writing portion protrudes from the front end thereof, and a front end portion of this penholder tube is covered by a cap C.
The prior-art ink-accommodating tube 1, shown in FIG. 8, has a smaller-diameter portion 1c that is open at the front end and a larger-diameter portion 1d that is open at the rear end. The ink 2 endowed with a thixotropic property and the ink follower 3 at the rear of this ink are incorporated within the ink-accommodating tube 1. The ballpoint pen tip 4 is fitted into a front end aperture 1a of the ink-accommodating tube 1, and a coil spring 7 that always presses a ball 6 against an inner reshaped surface 4f of a front end rim portion 4b that holds the ball is also disposed therein. The stopper 5 provided with a ventilation means (such as an opening) is fitted into the rear end of the ink-accommodating tube 1. This example relates to a refill which uses an ink having a thixotropic property and which is poured directly into an ink-accommodating tube, whereby drying of the ink at the front end of the tip or leakage thereof is prevented.
In the prior-art, a ballpoint pen or refill that uses a low-viscosity ink (a water-based ink) necessitates a complicated structure. This complicated structure may be similar to that of an internal-wadding type of water-based ballpoint pen wherein ink is guided to a tip end portion by a relay core in which ink is absorbed by an ink-absorbing member of cotton-like fibers covered by an outer film. Another example of a complicated structure may be that of a pen-core type of water-based ballpoint pen that uses a pen core member having an ink-flow adjustment function that comprises comb grooves which pour the ink directly into the ink-accommodating tube, ink grooves, and air grooves. A ballpoint pen or ballpoint pen refill which is formed by the direct pouring of an ink endowed with a thixotropic property, which provides clear handwriting with the same smooth writing feeling as that of a low-viscosity ink, has an advantage in that it is simple to pour the ink directly into the ink-accommodating tube. This feature is obtained because, although the ink maintains a high viscosity in a static state, the viscosity drops at the instant at which a shearing action occurs in the ink in contact with the ball surface when the ball rotates, so that the ink becomes a fluid.
On the other hand, if a state is assumed in which an impact force is exerted on the refill or ballpoint pen, the nature of the ink ensures that a shear action is generated at the contact surface between the ink and the ink-accommodating tube in the types of refill shown in FIGS. 7 and 8 as prior-art examples. The entire body of ink vibrates and thus the weight of the ink itself exerts an impact force on the ink follower when the tip is orientated upward or on the ball when the tip is orientated downward. An ink follower has certain physical properties such as viscosity and the degree of wetting thereof with respect to the inner surfaces of the ink-accommodating tube. However, all that supports the impact loading exerted on the ball is the force that holds the ball, which is produced by the process of reshaping the front end rim holding the ball. Consequently, if the impact force exceeds the force holding the ball, the ball could push the front end rim wider and fall out.
Therefore, of these ballpoint pens that use an ink endowed with a thixotropic property that is poured directly into an ink-accommodating tube, the type of pen that has a writing portion covered by a cap having a clip that can be attached to and removed from clothing (as shown in the prior-art example of FIG. 7) is carried in a state in which the tip is orientated upwards, so that there is no problem when this refill is used in a capped type of ballpoint pen. However, another application for this refill might be in a retractable type of ballpoint pen in which the tip is in a downward-orientated state and a pressing action on a pressing member accommodated within the holder tube causes a writing portion to protrude from or retract into an opening portion at a front end of the holder tube. In this case, there is a danger that an impact during the protrusion/retraction operation or while the pen is being carried could cause the ball to fall from the front end of the tip. If the ball falls out, ink will flow from the front end of the tip and stain the tube and clothing. Consequently, this refill has not been used in a retractable type of ballpoint pen up until now.
An objective of the present invention is therefore to provide a ballpoint pen refill that can be used without problems in a retractable type of ballpoint pen by using a configuration that completely prevents leakage or dripping from the front end of the tip, even when the tip is orientated downward. This refill also prevents the ball from falling out when it is subjected to an impact force and, if the ball should fall out for some reason, prevents the ink from flowing out from the front end of the tip.

Ballpoint pen refill and fabrication method thereof


In a volume control method applied to an audio processing system, firstly, a digital audio stream including a plurality of digital audio packets is received from a transmitter. It is determined whether an excitation signal is detected. The digital audio packets are sampled within a predetermined sampled period according to codecing rules, on condition that the excitation signal is detected. Output values corresponding to the digital audio packets are retrieved from the sampled digital audio packets according to the sampling operation. The digital audio packets are analyzed to generate sums of sampled frequency. An averaged volume level is calculated according to the sums of sampled frequency. An audio shift value is generated according to the averaged volume level and a predetermined standard volume level. Volume control is implemented to subsequently received digital audio packets from the digital audio stream according to the audio shift value.

1. Technical Field
The present disclosure relates to network communications, and more particularly to a volume control method and system typically applied to a Voice over Internet Protocol (VOIP) system.
2. Description of Related Art
FIG. 1 is a block diagram of a structure of a typical volume control system applied to an audio processing system, for example, a VOIP system. The volume control system comprises a transmitter (an outgoing side) 11 and a receiver (an incoming side) 13, each comprising a plurality of software and/or hardware modules or components.
The transmitter 11 at least comprises an analog-to-digital converter (ADC) 112, a codecing unit 114 and a packetizing module 116. The receiver 13 at least comprises a gain control unit 130, a digital-to-analog converter (DAC) 132, a codecing unit 134 and a de-packetizing module 136.
The ADC 112 retrieves an analog audio stream from an audio resource (not shown), and converts the analog audio stream to a digital audio stream. The codecing unit 114 samples the digital audio stream to generate a plurality of digital audio frames, and encodes (compresses) the sampled digital audio frames according to G.711 codecing rules. When the encoding process is complete, the codecing unit 114 outputs the encoded digital audio frames to the packetizing module 116.
The packetizing module 116 adds an Internet Protocol (IP) header to one of the encoded digital audio frames, and packetizes the encoded digital audio frame into a User Datagram Protocol (UDP) packet using a UDP module (not shown) of the volume control system. In addition, the packetizing module 116 packetizes the UDP packet into a Real-time Transport Protocol (RTP) packet using an RTP module (not shown) of the volume control system, and packetizes the RTP packet into an IP packet.
The above operations are repeated to packetize all of the encoded digital audio frames into IP packets. The packetizing module 116 may also packetize a number of the encoded digital audio frames into a single IP packet.
Each of the IP packets comprises a destination address and, consequently, can be transmitted to a correct destination via an IP network.
The IP packets forming the digital audio stream are transmitted from the transmitter 11 to the receiver 13. The de-packetizing module 136 retrieves and de-packetizes the IP packets into the RTP packets, de-packetizes the RTP packets into the UDP packets using the RTP module (not shown), and de-packetizes the UDP packets into the encoded digital audio frames using the UDP module (not shown).
The codecing unit 134 decodes the encoded digital audio frames to recover the digital audio stream with a pulse code modulation (PCM) format. The DAC 132 converts the digital audio stream to the analog audio stream (audio signals) for broadcast to a user located at the receiver 13. The volume of the audio signals may be controlled by the user with the gain control unit 130.
When a multiparty voice conference is held via a typical audio processing system, volume inconsistency usually occurs at separate incoming sides. Therefore users at each incoming side must manually achieve volume control, by gain control or by adjustment of parameters including linearity for power amplifier noise, for example. It is inconvenient for users to frequently use the volume control and, thus, an improved volume control method and system are desired.


An ultrasound sensor includes a transmitting/receiving device configured to transmit/receive ultrasound waves; and a controller configured to make the transmitting/receiving device transmit an ultrasound burst wave, as each of the ultrasound waves, and detect an object through a reception signal that is output from the transmitting/receiving device. The controller is configured to shift operation mode to a detecting mode, when the object is detected in a monitoring mode. In the monitoring mode, the number of waves included in the ultrasound burst wave is changed in two stages. The detecting mode is of detecting the object, using the ultrasound burst wave having the waves that are being used at a time point when the object is detected in the monitoring mode.

Conventionally, there has been provided an ultrasound sensor, which is configured to determine presence or absence of an object in a detection area, and measure a distance to the object, using a time period from transmission of ultrasound waves to reception of waves reflected by the object.
This type of ultrasound sensor includes a transmitter configured to transmit ultrasound waves, and a receiver configured to receive ultrasound waves. Alternately, there has been provided an ultrasound sensor which includes a transmitting/receiving device that is used for both a transmitter and a receiver. The ultrasound sensor including the transmitting/receiving device is configured to drive the transmitting/receiving device with a transmission signal to transmit ultrasound waves to a detection area, and configured to detect reflected waves through a reception signal that is output from the transmitting/receiving device that has received ultrasound waves. Therefore, it is possible to determine presence or absence of an object in the detection area and measure a distance to the object, through measuring a time period from driving of the transmitting/receiving device with the transmission signal to detection of the reflected waves through the reception signal output from the transmitting/receiving device.
Because the transmitting/receiving device is used for transmission and reception of ultrasound waves, part of the transmission signal may turn to a circuit for detecting the reception signal. Furthermore, because the transmitting/receiving device vibrates mechanically when being driven with the transmission signal, reverberation may occur. For this reason, there has been proposed a configuration of setting a time period for detecting the reflected waves, when a time in which the sensor is not influenced by the reverberation comes, after driving of the transmitting/receiving device with the transmission signal. By adopting this configuration, it is possible to detect the reflected waves without the influence of the transmission signal and the reverberation (e.g., see JP2010-181208A).
Incidentally, attenuation of the reflected waves to the transmitted ultrasound waves is more increased, as a distance to an object to be detected is longer. Therefore, if energy of ultrasound waves to be transmitted is constant, amplitude of the reception signal is more reduced as the distance to the object to be detected is longer. From this, an increase in amplitude of ultrasound waves to be transmitted, or enhancement of reception sensibility for ultrasound waves can be considered, in order to more increase a distance at which the sensor can detect an object.
However, the increase in the amplitude of ultrasound waves to be transmitted causes a time period, during which the sensor is influenced by the reverberation, to be longer. Accordingly, it may cause a problem that the distance at which the sensor can detect an object is more reduced on a short-distance side. On the other hand, the enhancement of the reception sensibility causes an increase in a possibility of receiving ultrasound waves other than the waves reflected by the object. As a result, an S/N ratio becomes deteriorated, and it may cause a problem that erroneous detection easily occurs.

PANASONIC INTELLECTUAL PROPERTY MANGEMENT CO., LTD.


An iron with a lower housing includes a heating base and a sole plate under the base, an evaporation chamber and a steam distribution chamber in communication with steam outlets in the sole plate. The evaporation chamber includes at least one steam channel having an outlet in the lower surface of the base and arranged in such a way that the steam flows through the evaporation chamber along a path which promotes evaporation of the water before it reaches said channel, and the distribution chamber is provided in the lower surface of the base and communicates with the outlet of the steam channel.

The present invention relates to electric steam irons which comprise a sole having a base heated by means of an electric resistance and an ironing plate mounted below the base, a so-called principal vaporization chamber provided in the base, closed by a cover and supplied by water by means of an injection device through an opening provided in the cover, and a chamber for distributing steam in communication with steam outlet holes pierced in the plate.

Electrical steam iron with steam channels


Reduction in the blockiness of a simulated film grain block can be achieved either by the use of adaptive downscaling or adaptive deblocking filtering to adjust the intensity of the pixels at the block edge in accordance with at least one film grain block parameter, such as film grain size, intensity and texture. Performing such adaptive downscaling or adaptive deblocking filtering achieves improved performance at lower computational cost by avoiding modification of film grain block pixels in lesser affected areas.

Motion picture films comprise silver-halide crystals dispersed in an emulsion, coated in thin layers on a film base. The exposure and development of these crystals form the photographic image consisting of discrete tiny particles of silver. In color negatives, the silver undergoes chemical removal after development and tiny blobs of dye occur on the sites where the silver crystals form. These small specks of dye are commonly called 'grain' in color film. Grain appears randomly distributed on the resulting image because of the random formation of silver crystals on the original emulsion. Within a uniformly exposed area, some crystals develop after exposure while others do not.
Grain varies in sizes and shapes. The faster the film (i.e., the greater the light sensitivity), the larger the clumps of silver formed and blobs of dye generated, and the more they tend to group together in random patterns. The grain pattern is typically known as 'granularity'. The naked eye cannot distinguish individual grains, which vary from 0.0002 mm to about 0.002 mm. Instead, the eye resolves groups of grains, referred to as blobs. A viewer identifies these groups of blobs as film grain. As the image resolution becomes larger, the perception of the film grain becomes higher. Film grain becomes clearly noticeable in cinema and high-definition images, whereas film grain progressively loses importance in SDTV and becomes imperceptible in smaller formats.
Motion picture film typically contains image-dependent noise resulting either from the physical process of exposure and development of the photographic film or from the subsequent editing of the images. The photographic film possesses a characteristic quasi-random pattern, or texture, resulting from physical granularity of the photographic emulsion. Alternatively, a similar pattern can be simulated over computed-generated images in order to blend them with photographic film. In both cases, this image-dependent noise is referred to as grain. Quite often, moderate grain texture presents a desirable feature in motion pictures. In some instances, the film grain provides visual cues that facilitate the correct perception of two-dimensional pictures. Film grain is often varied within a single film to provide various clues as to time reference, point of view, etc. Many other technical and artistic uses exist for controlling grain texture in the motion picture industry. Therefore, preserving the grainy appearance of images throughout image processing and delivery chain has become a requirement in the motion picture industry.
Several commercially available products have the capability of simulating film grain, often for blending a computer-generated object into a natural scene. Cineon® from Eastman Kodak Co, Rochester N.Y., one of the first digital film applications to implement grain simulation, produces very realistic results for many grain types. However, the Cineon® application does not yield good performance for many high-speed films because of the noticeable diagonal stripes the application produces for high grain size settings. Further, the Cineon® application fails to simulate grain with adequate fidelity when images are subject to previous processing, for example, such as when the images are copied or digitally processed.
Another commercial product that simulates film grain is Grain Surgery™ from Visual Infinity Inc., which is used as a plug-in of Adobe® After Effects®. The Grain Surgery™ product appears to generate synthetic grain by filtering a set of random numbers. This approach suffers from disadvantage of a high computational complexity.
None of these past schemes solves the problem of restoring film-grain in compressed video. Film grain constitutes a high frequency quasi-random phenomenon that typically cannot undergo compression using conventional spatial and temporal methods that take advantage of redundancies in the video sequences. Attempts to process film-originated images using MPEG-2 or ITU-T Rec. H.264|ISO/IEC 14496-10 compression techniques usually either result in an unacceptably low degree of compression or complete loss of the grain texture.
As a result of work done by applicants; there now exist techniques for simulating grain by combining multiple blocks of film grain samples for subsequent addition to an image. These techniques create each block independently of the others. When combining such blocks of film grain, artifacts can occur. One previous technique for reducing artifacts mandates diminishing the intensity of the simulated grain along the edges of each block. Diminishing the intensity affords ease of implementation at the expense of reduced grain quality. Applying a deblocking filter to each film grain block constitutes another approach to reducing artifacts. While applying a deblocking filter has a lesser impact on the quality of the grain, implementing such a filter increases computational complexity.
Thus, there is need for a technique for deblocking film grain blocks, which achieves better quality (i.e., reduced artifacts) while maintaining a low computational cost.

Technique for adaptive de-blocking of block-based film grain patterns


The invention provides a core-shell polymer which comprises (a) a core phase having carboxyl groups on surface part of the core and (b) a shell phase which is a glassy polymer containing neither functional groups reactive to the the carboxyl group nor functional groups reactive to the amino group, wherein the toluene-soluble fraction is not higher than 10% by weight based on the whole core-shell polymer; polyamide resin compositions comprising said core-shell polymer; and molded articles produced by molding said compositions.. Impact strength of the resin composition or its molded articles was improved by using the core-shell polymer.

Polyamide resins have excellent thermal deformation resistance, rigidity and oil resistance and are used in electric appliance parts and automobile parts. Further improvement in impact strength and water resistance is desired, however.
As regards the impact strength, in particular, various attempts have already been made, including, more specifically, the use of ABS resins and modified polyolefins.
On the other hand, impact modifiers of the core-shell polymer type have been proposed, with a rubbery polymer as the core and a glassy polymer as the shell. Impact modifiers of this kind show good dispersibility in resins and it is relatively easy to attain reproducibility from the morphology viewpoint.
A core-shell polymer for improving the impact strength of polyamide resins has already been proposed in U.S. Pat. No. 3,668,274 AND EP-51,471, each of which polymer contains carboxyl groups in the shell phase. Compositions composed of this carboxyl-modified core-shell polymer and nylon 6 indeed show good notched Izod impact strength (thickness: 1/8 inch) at temperatures not lower than 23.degree. C. but still have problems: the impact strength is low and the melt viscosity is high. The latter fact offers a problem from the moldability viewpoint.
In the pigment-related technical field, core-shell polymers whose core and shell phases are both modified with a carboxylic acid(s) are known (Japanese Kokai Tokkyo Koho Nos. 63-213509 and 61-185505). However, they cannot be used as impact modifiers for polyamide resins.


A system and method for performing continuous configuration, test, and build management for developing and building software applications is provided. In building the desired software applications, a build manager system is configured to first obtain the target source code from a source code repository. The build manager system then transforms the source code to generate a living build comprising one or more artifacts. The build manager system manages the artifacts and performs additional secondary tests and secondary processing including integration, quality and evaluation tests without requiring an additional transformation of the source code. The build manager system retains and associates the results from the secondary processes such that traceability between source code, builds, and artifacts are enforced and the build process is controlled.

Typically, a software build process takes source code and other configuration data as input and produces artifacts, also referred to as derived objects, as output. Software artifacts define a superset that includes output (also known as derived objects) including, but not limited to, specifications, architecture and design models, source and executable code, configuration, test data, scripts, process models, project plans, and documentation. The exact number and definition of steps in the software build process depends greatly on the types of inputs (e.g., Java, C/C++, or Perl/Python/Ruby source code) and the type of desired output such as the goals of the build process (e.g. creating an intermediate output for test and verification, working or continuous production, or full production build) of a desired version of the software, and even the desired output environment (e.g., CD image, downloadable zip file, or self-extracting binary for a particular system). If the source code includes a compiled language, the build process would likely include a compilation and perhaps a linking step.
The identification of the inputs to the build process is itself part of the process. Often selection of inputs is automatic and/or implicit and is therefore hidden from view of users, making the selection step easy to overlook. For example, when a developer runs a development build, the selection of inputs (e.g., source code and configuration data) is implicit, but still occurs. The sources that are present on that particular developer's development environment are effectively selected as inputs to the build process. When the build process is performed in a clean environment, the identification of the inputs has to be explicit. For example, when a build takes place on a build server, one of the first steps is to retrieve explicitly specified source code, such as from a source code repository or other artifact storage system. The retrieved source code is used as the input for the build.
A controlled build process is a build process that makes the definition of the explicit inputs and is comprised of a series of explicitly defined steps used to produce the output (e.g., artifacts or derived objects). A controlled build process is repeatable; given the same inputs, it should produce the exact same outputs. A controlled build process also provides traceability from the sources to artifacts and from the artifacts back to the sources, thereby ensuring tests results are related to both artifacts and the resulting output from the build process simultaneously. In order to provide this traceability, each invocation of the controlled build process is uniquely identifiable. In one embodiment, an identifier such as a build number is used to identify separate builds. Controlled build processes are not necessarily automated, although automation certainly facilitates the process and helps ensure consistency.
In general, two primary types of builds take place during a software development project: developer builds and authoritative builds. Developer builds are performed by the developers in the course of development in their software development environments. By their very nature, these are non-controlled builds. There is no explicit definition of the inputs to the build process. The inputs are the sources and configurations that happen to exist in the developer's environment at the time of the software build. Typically, there is no way to track these inputs; therefore, the historical revision of any of the source files is unknown. In fact, some of the source files may include changes that have not been committed to the Source Code Management (SCM) system, or worse yet, they may include files that were modified outside the knowledge of the SCM and without permission or authority to modify those files.
Authoritative builds, on the other hand, are the embodiments of the controlled build process. Authoritative builds take place on a clean environment where all inputs are explicitly defined and controlled. Typically, an authoritative build takes the source code directly from the SCM and uses only explicitly defined environmental dependencies, which also can be defined by the SCM. During the authoritative build, explicitly defined steps are executed in a deterministic order. In general, a mechanism is provided to allow for traceability such as a build number and/or a SCM label. The build number uniquely identifies each particular authoritative build and its artifacts (derived objects) and the SCM label (or baseline) provides traceability back to the inputs.
A build management system (build management system 102) is a software tool typically used by developers in conjunction with an SCM to perform and manage authoritative builds. build management system 102 software is responsible for providing a clean environment for the authoritative build, determining what inputs are to be used for a build and then obtaining those inputs from a known source, such as from an SCM. The build management system 102 also performs and manages the steps required to execute the build process and generate the artifacts.
The generated artifacts from the build process also must be stored and maintained. For example, the artifacts are sometimes in the source control management (SCM) system or they can be stored various locations in the system 100, including with a flat file storage system or on the file system of a host computer. SCMs, however, are designed to store source code and thus optimized for use cases related to the storage and retrieval of source code and not for build artifacts. In particular, SCM systems have difficulties tracing artifacts to the build that produced them because the structure of an SCM does not provide direct mechanisms for code traceability. Instead, SCMs attempt to create a mechanism to implying traceability. For example, labels or tags, snapshots or baselines, depending on the SCM, branches or streams; and the file system namespace organization can all be used in an attempt to trace the build that produced a particular artifact. Further, SCMs are typically not designed to optimize access to the artifacts, or optimize the storage of artifacts. In particular, storing artifacts in a SCM is burdensome because SCMs are designed to track the evolution of file contents, not to store efficiently sets of files and provide traceability to a build. Furthermore, access to artifacts is not optimized because most SCMs optimize access to the latest revision of a file. The build management system 102 in contrast requires access to artifacts that were not generated by the latest build. Finally, storage of artifacts in a SCM is often not optimized because most SCMs do not optimize the storage of binary files and most build artifacts are binary.
In a conventional software development environment, projects utilize multiple types of builds, such as local development builds, continuous integration builds, nightly builds, and release builds. In this conventional context, the build process includes the transformation of source code to a program object and other artifacts associated with a given build, as well as additional processing, such as testing or deployment of a given build to a desired environment or target build purpose. It is common for organizations to utilize large numbers of different build types, varying, for example, according to build scope, purpose, targets, and environment, during the development of complex software.
Build types are separated into two distinct classes of builds: local development builds and authoritative builds, where authoritative builds take place on a build management server. Authoritative builds such as continuous integration, nightly, or release builds are not truly different types of builds, but rather different stages of the build life. A build may start out as a continuous integration build, designed to run only the most important automated tests to verify specific aspects of the build. For a continuous integration build the focus is on providing quick feedback to the development team. The last successful build for any day may be run through a more exhaustive test suite during the night and thus become the nightly build. Based upon a large number of factors, such as the features included in a build or the timeline of the project, a build in some instances is a release build. A build may even be deployed or promoted to the quality assurance (QA) environment or production.
In conventional build systems, each build is a single event in time. Once a conventional pure build is completed, nothing else can be added to that build. It is impossible to add a process to run automated functional tests to a traditional build after that build has completed. To deal with this problem, multiple build types are created. For example a continuous integration build performs a pure build, namely getting the source from the SCM, transforming it, and then running continuous integration tests on that pure build. Similarly a conventional nightly build separately gets the source from the SCM, transforms it, and then runs functional test on that separate pure build. Then once again, for a release build source is once again separately obtained from the SCM, separately built as a new pure build, and followed by deployment of the separately built software and artifacts to the target environment. In this manner the pure build 200 process is repeated multiple times, even if the underlying code has not been modified or changed in any manner.
During software development, source code files are in a constant state of change. This means that the files that were used by the continuous integration build 302 are most likely different than the files used by the nightly build 304, which are likely to be different than the files used by the release build 306.
Additionally, every build process in a conventional system produces a separate set of artifacts. The continuous integration build produces a first set of artifacts that it uses for continuous integration tests. The nightly build then produces a second, distinct set of artifacts, even if the nightly build utilizes the exact same source code as the continuous integration build. Furthermore, the release build creates yet another set of artifacts, regardless of whether it also uses the same source code as the other builds. Consequently, the artifacts being deployed by the release build are not the same as those that were used in the exhaustive nightly test test suite run during as part of the nightly build.

System and method for continuous software configuration, test and build management


An intake flow booster is provided for insertion between the carburetor and intake manifold of an internal combustion engine which includes a series of downwardly depending tubes having an internal frustro-conical shape. The fuel/air mixture leaving the carburetor passes through a well in the manifold plate and into the manifold tubes whereby the mixture flows more efficiently to the engine providing a higher performance and greater horsepower.

1. Field Of The Invention
The invention herein pertains to a device to improve the efficiency and increase the power of an internal combustion engine and particularly to an intake flow booster to improve the performance of the engine at a partial throttle opening.
2. Description Of The Prior Art And Objectives Of The Invention
Manufacturers for many years have attempted to improve the power output of internal combustion engines in order to utilize a smaller size engines having the same or greater horsepower than larger engines in order to save materials, space and weight. In certain applications such as in aircraft and boats only limited space is available and the horsepower developed by an engine is of prime importance. In certain applications, such as in aircraft, weight and size limitations of the engines are of utmost importance whereas in automobiles the operating efficiency and fuel economy are major concerns of both manufacturers and operators alike.
Various types of fuel saving devices have been conceived in the past such as carburetor adapters to improve the homogenization of the air/gas mixture before it reaches the firing chambers. Other devices have been conceived which are an attempt to improve the fuel efficiency of the engines as set forth in U.S. Pat. No. 4,409,951. Other carburetor modification devices are shown in U.S. Pat. Nos. 3,966,430; 4,019,483; 4,092,966 and 4,281,632.
While the above-identified devices have provided useful and advantageous under certain circumstances, such prior devices generally work on the principal of increasing the air/fuel mixture speed but with a loss in total air/fuel flow. This will greatly reduce the power of the engine at full throttle.
With these and other shortcomings of previous devices known, the present invention was conceived and one of its objectives is to provide a device which increase the air/fuel flow into the combustion chamber and which will provide more horsepower from the engine at full throttle.
It is another objective of the present invention to increase the air/fuel flow whereby the engine can operate at a higher horsepower at a particular throttle opening, therefore burning less fuel and providing greater efficiency.
It is still another objective of the present invention to provide an intake flow booster for positioning between the carburetor and intake manifold which will make the internal combustion engine more efficient under all operating conditions.


Techniques are described for detecting the presence or absence of certain molecules, analytes, or substances present in the oral cavity or characteristics of the saliva in the oral cavity. In particular, aspects of the invention disclose a systems, methods, apparatuses, and computer-readable media for detecting bio-markers.

Currently, several devices are available on the market that can detect certain activities (e.g., walking, running) and conditions (e.g., heart rate). Many of these devices are limited in the information that they can detect and provide, such as wristbands, with regard to a body. Devices that may provide a greater range or depth of information may be invasive (e.g., draw blood) and/or provide temporary data points of information.

This patent is subject to a terminal disclaimer.


A jointless artificial foot having a resilient foot insert. In order to improve comfort while walking, a tubular, cylindrical segment which is arranged lying and has a horizontal cylinder axis and an axial slot situated at the rear is provided for the foot insert, the lower C-limb being fastened on the rear end region of a leaf spring extending forward beyond the foot insert, while the upper C-limb is equipped with a foot adapter for releasable connection to a leg prosthesis.

The invention relates to a jointless artificial foot for a leg prosthesis. The invention especially relates to such a jointless artificial foot having a resilient foot insert which is arranged inside a foot molding, is of approximately C-shaped design in longitudinal section, with the opening to the rear, and takes up the prosthesis load with its upper C-limb and via its lower C-limb transmits that load to a leaf spring connected thereto, which spring extends, approximately parallel to the sole region, forward beyond the foot insert and the front end of which projects right into the foot-tip region.
Initial proposed solutions envisaged the artificial foot having a rigid construction made, for example, of wood, which was subsequently provided with a joint, in order to imitate the function of the ankle. Then, in a further development, a resilient foot insert which was composed of leaf springs and was coated with foam was envisaged (cf. e.g. U.S. Pat. No. 4,959,073).
DE 40 38 063 C2 discloses a jointless prosthesis foot having a foot insert which is of one-piece design, permits at least a plantar and dorsal flexion and an axial compression and, in the longitudinal section of the foot, has an approximately S-shaped design. The upper limb, together with a front oblique limb adjoining at an obtuse angle, forms an angular element, which is rigid overall and the lower end of which is adjoined by a central, leaf spring-like limb which, at its rear end, is connected to the lower limb via an approximately semi-circular limb connection. In this case, the lower end of the rigid angle element extends forward approximately into the region of the tough basic joints.
FR-A1-26 40 499 discloses a jointless artificial foot in which the central part of the approximately C-shaped foot insert lies roughly in the front third of the length of the sole, while the upper C-limb forms a connection to the leg prosthesis. The C-shaped foot insert assumes a spring function which is supplemented by a resilient cushion placed between the two C-limbs, in order to achieve a certain suppleness when putting the foot on the ground. However, it has been shown in practice that even this artificial foot does not permit a natural walking motion.
Furthermore, German Utility Model G 93 15 665.0 discloses a comparable jointless artificial foot. This document provides a foamed plastic foot molding having a metallic reinforcement element which is formed by a U-shaped profile, the respective limbs of which can be moved elastically toward one another under load. The terminating limb ends have a decreasing material thickness toward their free end, while the limb ends are provided with thickened portions. The lower U-limb is screwed to a leaf spring at its free end, while the upper U-limb is connected to the holder of a leg connection part. The leaf spring may consist of carbon fiber or titanium. The space between the free U-limbs may be filled with a soft polyurethane foam. This elastic spring element is intended to permit a foot movement in the manner of a pro/supination about the longitudinal axis of the foot and a natural movement sequence.

Otto Bock Orthopaedische Industrie Besitz-Und


In a distributed cloud environment, a collecting agent deployed external to a kernel of a compute host collects network data packets describing various raw events communicated between compute instances of the distributed cloud environment and metadata associated with the events from various sources. The collecting agent communicates the metadata to a cloud service where it may be stored. The collecting agent communicates the packets to a stream processor that is decoupled from the collecting agent. The stream processor processes the packets in a stateful manner to generate a set of time series data. The time series data is communicated to the cloud application, where a set of enhanced time series data is generated by merging the time series data with the metadata in a distributed manner. A topology map describing the compute instances of the distributed cloud environment is then generated based on the set of enhanced time series data.

Cloud applications and software architectures have experienced a shift from traditional monolithic architectures to microservices. Modern cloud applications based on microservices are characterized by multi-level architectures and deployments. Each user request to interact with a business application is realized through complex coordination among many services. A service may be defined as a logical grouping of functionally-equivalent instances within an application.
With a shift from the traditional monolithic architectures to microservices in modern cloud applications, the complexity of monitoring the services in an application has increased manifold. When migrating from traditional architectures to microservices architectures, monolithic applications typically are broken down into hundreds or even thousands of smaller, cohesive, functional microservices. To ensure reliability and performance of API-centric, service-oriented cloud applications, Site Reliability Engineers (SREs) and software DEVelopment and information technology OPerationS (DevOps) teams need to monitor the interactions between various microservices. As a matter of definition, DevOps refers to a set of practices that emphasize the collaboration and communication of both software developers and information technology (IT) professionals while automating the process of software delivery and infrastructure changes.
Application monitoring techniques for cloud applications may be categorized based on two dimensions. Traditional monitoring approaches involve instance-level monitoring (or diagnostic-oriented monitoring) in which logs and metrics from individual instances (e.g., application code, virtual machines, containers) and underlying hardware components are gathered. Service-level monitoring (or objective-oriented monitoring) involves grouping of functionally equivalent instances and tracking the service-level objectives (SLOs). The instance-level and service-level monitoring approaches can further be categorized into white-box or black-box techniques depending on whether they require changes to the application code or not. White-box monitoring approaches require code changes and common white-box techniques include log-based monitoring, Application Performance Management (APM), code instrumentation for collecting custom metrics and distributed tracing techniques. Black-box monitoring approaches do not involve changes to the code and common black-box techniques either leverage operating system-based insights or network communications to gain insights into services and applications.
Traditional application monitoring solutions designed for monolithic software architectures rely on logs or call stacks as a source of truth. In monolithic applications, the monitoring complexity is related to interactions inside the application code. Conversely, in microservices-based applications, this complexity shifts to interactions between services over the network. Consequently, the traditional code-embedded and log-centric monitoring tools are no longer effective for monitoring service-oriented cloud applications. One of the fundamental challenges of monitoring the health and performance of modern cloud applications is that of achieving visibility into all the services, APIs, and databases that make up an application.
Modern applications leverage a lot of external API services such as Google Auth®, Stripe®, and Salesforce®. Oftentimes, such external services can be the root cause of cloud-based application execution issues. Traditional code-embedded and log-based monitoring solutions are of limited use for monitoring external services, as they do not capture any information on external service interactions.
As described above, the breakdown of monolithic applications into hundreds or even thousands of smaller, cohesive, functional microservices shifts the monitoring complexity from interactions inside code to interactions over a network. Function calls within the code in monoliths have been replaced by calls going over the network in microservices. For example, the state of every request must be transferred from one service to another to build a response. The result is an explosion of chatter such as API calls, remote procedure calls (RPCs), database calls, memory caching calls, and the like. Due to this shift in complexity from the code to the interactions over the network, monitoring solutions that rely on logs or code instrumentation have become less effective for microservices-based architecture. The critical information that SREs and DevOps need to monitor is no longer the code inside a microservice, but instead is the interactions between various microservices.
Due to the breakdown of monolithic applications into a large number of functional microservices, the white-box monitoring approaches have become too complex to manage. Since modern applications use a plethora of languages and frameworks, white-box approaches need to continuously evolve to support new programming languages and frameworks.
Therefore, there is a need for an improved method, system, and computer program product to implement networked microservice modeling.
This background information is provided to reveal information believed by the applicant to be of possible relevance to embodiments of the present invention. No admission is necessarily intended, nor should it be construed, that any of the preceding information constitutes prior art against embodiments of the present invention.

Systems and methods for networked microservice modeling


Disclosed is a process for melt blending a mixture of a thermoplastic polyamide and segmented thermoplastic copolymers of polyurethane and the product thereof. The process of the invention is useful for recycling textile goods, such as pantyhose, into a form useful for fabricating into shaped articles such as moldings, sheets, and fibers.

The term "spandex" is employed in the art to describe a long chain synthetic fiber comprised of at least 85% by weight of a segmented polyurethane. The segmented polyurethane is composed of soft segments and hard segments. The soft segments can be polyether-based portions of the polymer chain, such as are derived e.g. from poly(tetramethylene ether)glycol. The hard segments can be derived from the reaction of an organic diisocyante, such as methylene-bis-(4-phenylisocyanate) with a diamine chain extender.
Spandex fiber has long been known in the art to impart desirable elasticity to textile goods. In many uses, spandex fibers are employed in combination with other textile fibers, notably nylon 6,6, in order to achieve some particular combination of aesthetic, comfort, and economic goals. Such combinations are achieved by combining fibers of spandex with fibers of nylon 6,6 during the textile fabrication process. One particular textile end-use is in pantyhose. Unlike many textile goods, pantyhose have very limited lifetime, and are discarded frequently, creating a significant waste stream. Until the development of the present invention there was no means for recycling that waste stream in an economical way.
While chemical separation of the spandex from the nylon was known, it was not cost-effective. Clearly the best approach was to shred the pantyhose and melt extrude the polymer into pellets or new fibers. However, spandex polymer exhibits considerable degradation when extruded at the temperatures of ca. 265.degree. C. or greater normally required for extrusion of nylon 6,6.
Michels et al., GDR 105974, disclose a process for extruding polymer melts consisting of two or more components which do not react chemically with one another and do not form a microscopically homogeneous solution. However, only blends of polyethylene terephthalate and polyethylene are disclosed. Extrusion temperature was 270.degree. C.
Franke et al., Angew. Makromol. Chem. 206, 21ff(1993), disclose the extrusion of blends of polyamide 6 with thermoplastic polyurethanes comprising at least 78% of thermoplastic polyurethanes. Extrusion was accomplished using a twin screw extruder with a melt temperature of ca. 230.degree. C.

Polyamide/polyurethane micro-blend and process


A system is provided for visualizing data in a computerized visual environment. The system comprises (i) a viewing device that displays, to a user of the viewing device, a graphical user interface within a virtual three-dimensional space, (ii) a handheld device configured to allow the user to customize the display of a three-dimensional data visualization within the graphical user interface using hand motions made by the user, and (iii) a computing device coupled to the viewing device and the handheld device. The computing device is configured to cause to display to the user on the viewing device a filter plane overlaying the three-dimensional data visualization, detect a position of the filter plane that is movable by the user in the graphical user interface, and alter the three-dimensional visualization in the graphical user interface based on the detected position of the filter plane.

In recent years, hardware such as headsets, adapters, and viewers used in virtual reality or augmented reality environments have become widely available. In the case of VR, a user sees a visual environment comprised of computer-generated graphical objects and in the case of AR or MR, a user sees a visual environment comprised of both real-world objects and computer-generated graphics. In either case, the user can interact with the environment by moving his head and/or hands, and the user's movements are captured by the hardware and translated into the computerized environment using specialized software.
A virtual environment provides a user with a comprehensive space to visualize a vast amount of data. However, this can be visually overwhelming to a user, especially when the user is trying to hone in to extract desired information from a large data set. Such difficulty hampers data analysis. Existing VR visualization tools merely implement traditional methods for data filtering, such as filtering a data set prior to rendering the filtered data in the VR environment and permitting filtering only on the data set, but not against the visualization. These traditional approaches fail to leverage the potential of VR as a platform because a user cannot gain unique insight associated with VR data rendering.

Systems and methods for filtering data in virtual reality environments


In order to so improve a surgical machine comprising a housing and a surgical drive that maintenance of the machine is simplified, it is proposed that the drive and the housing be directly on indirectly connectable in a detachable manner.

The present invention relates to a surgical machine with a housing and a surgical drive.
Machines of the kind described at the outset are used in different variants and embodiments in surgery. Examples of such machines are drilling machines, milling machines and saws, in particular, jigsaws and oscillating saws. In some cases, both the design of such machines and their operation are very complicated. Also problems with the maintenance and cleaning of the machines keep recurring.
The object of the present invention is, therefore, to so improve a machine and a method of the kind described at the outset that the machine is easier to handle.

Surgical machine and method for controlling and/or regulating a surgical machine

Abstract: A method for controlling and/or regulating a surgical machine is also proposed.


The disclosed systems and methods relate to improving PCI Express (PCI-E) L1 Active State Power Management (ASPM) exit latency by speculatively initiating early L1 exit based on a network stimulus. Aspects of the present invention may enable a higher level of performance and responsiveness while supporting the benefits of ASPM. Aspects of the present invention may minimize operational cost by reducing latency in processes that utilize a PCI-E interface. Aspects of the present invention may be embodied in a Network Interface Controller (NIC) or any other device with a PCI-E interface that supports ASPM.

The Peripheral Component Interconnect Express (PCI-E) interface may be found in servers, desktops, and mobile PCs. An important power saving feature of PCI-E is Active State Power Management (ASPM). When L1 ASPM is enabled on a given PCI-E link, and the link has been inactive for a period of time (e.g. tens or hundreds of microseconds), the PCI-E link will transition to a L1 state that consumes much less power than the full power, fully functional L0 (on) state. While in the L1 state, the PCI-E clock may be stopped and a PLL may be powered down to save power. However, in order for a given device to start a DMA and transfer data across the PCI-E link, the link must be returned to the L0 state.
The process of transitioning from L1 to L0 is not instantaneous. This period of time is called the "L1 exit latency". The L1 exit latency starts from the point in time a device determines that it needs to make a PCI-E transaction (e.g. a DMA) and initiates the transition to L0. The L1 exit latency ends when the PCI-E link has been fully transitioned to a L0 state. The precise L1 exit latency will depend on the design of the devices at both ends of the PCI-E link, but this may be greater than 20 microseconds if the PLL was not powered down and may be greater than 100 microseconds if the PLL was powered down.
Gigabit and Fast Ethernet Controllers may use a PCI-E bus to interface to the PC since PCI-E is a common high-speed peripheral interface. In addition, it is highly desirable for these Ethernet controllers with a PCI-E interface to support L1 ASPM so that the PCI-E link can automatically be put into a low power state during periods of inactivity on the interface. However, the long L1 latencies may negatively affect network responsiveness and performance. This is because the L1 exit latency can affect the latency that it takes for one network station to process and respond to a network packet that was sent by another network station. At Gigabit Ethernet speeds, even the addition of 10 microseconds of latency may be undesirable in some scenarios involving latency sensitive applications or benchmarks.
The L1 exit latency of a device depends on the physical layer design for that device. Trade-offs can be made between performance, cost, and complexity with the physical layer design. So the range of L1 exit latencies may very greatly from a bit less than 10 microseconds to hundreds of microseconds. Even devices with "lower" L1 exit latency may have exit latency greater than 30 (and sometimes greater than 100) microseconds from L1 when the PCI-E reference clock and PLL have been powered down, since the clock has to be restarted and the PLL has to re-acquire lock when transitioning to L0.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.

Method and system for improving PCI-E L1 ASPM exit latency


A control device in an electric power steering device calculates a first assist component based on steering torque and a vehicle speed. The control device also calculates a compensation component associated with an reverse input and calculates a steered angle command value based on an addition value of the compensation component and basic drive torque that is an addition value of the steering torque and the first assist component, produces a second assist component by performing steered angle feedback control that causes the steered angle of a vehicle to follow the steered angle command value. The control device controls drive of a motor based on an assist command value that is an addition value of the first assist component and the second assist component.

1. Field of the Invention
The invention relates to an electric power steering device that assists vehicle steering operation.
2. Description of Related Art
Japanese Patent Application Publication No. 2008-137486 (JP 2008-137486 A) describes this kind of electric power steering device. The electric power steering device includes a torque sensor that detects a steering torque applied by a driver to a steering mechanism, and a control device that controls drive of a motor. The control device sets an assist command value based on the steering torque detected by the torque sensor and controls the drive of the motor to cause assist force from the motor to follow the assist command value.
While a vehicle is traveling, a reverse input associated with a road surface reaction force generated depending on a road condition is transmitted from steered wheels of the vehicle to a steering wheel through a steering mechanism. A driver can then obtain information such as a road condition and grip force of the steered wheels while driving the vehicle through the reverse input transmitted to the driver's hands grasping the steering wheel. The reverse input also includes braking vibrations or the like as well as road surface reaction force, which is a factor for poor steering feel. Accordingly, if a required reverse input only is can be transmitted more appropriately, the steering feel can be improved.


A drive circuit for driving a display device includes: a first data latch circuit that holds image data corresponding to one line from; a second data latch circuit that holds image data held in the first data latch circuit; a decoding circuit that decodes the image data held in the second data latch circuit; a gradation amplifier circuit that includes gradation amplifiers that amplify or buffer, and output respective gradation voltages; a gradation voltage selection circuit that selects gradation voltages necessary for display; a decision circuit that decides on use/non-use of gradations, using the image data; and an enabling/disabling circuit that selectively disables operation of the gradation amplifiers corresponding to gradations that are identified as not to be used, using the decision results output from the decision circuit.

1. Field of the Invention
The present invention relates to a drive circuit for a display device (for example liquid-crystal display device) and in more detail relates to a drive device for a display device whereby miniaturization and reduction of current consumption can be achieved.
2. Description of the Related Art
A drive circuit for a liquid-crystal display device incorporating RAM (Random Access Memory) as a frame memory is commonly employed in liquid-crystal models for mobile telephones. For the drive circuits employed in such applications, miniaturization, reduced current consumption and improved image quality are demanded. It is therefore desired to achieve miniaturization of the liquid-crystal display device as a whole by miniaturizing the drive circuit, to achieve reduction of current consumption by eliminating surplus operations and to achieve improvement in image quality by improving performance.
Typically, the drive circuit for a liquid-crystal display device outputs a plurality of gradation voltages (for example, in the case of 64 gradations, 64 gradation voltages) from a prescribed number of output terminals (for example, in the case where there are three output terminals for R, G and B at each pixel, with a total pixel number=132, the total number of output terminals is 396). In this way, the desired color image is displayed by varying the amount of light transmitted through the liquid-crystal panel for each pixel.
The drive circuit for a liquid-crystal display device includes a gradation voltages output circuit that select a single desired gradation voltage using gradation data from a prescribed number of gradation voltages (in the image data) and output these selected gradation voltages to the various output terminals. It is therefore necessary for the gradation voltages output circuit to amplify (or buffer) the gradation voltages. Two methods of arranging the amplifiers for performing this are conventionally known, namely, "switch drive and "amplifier drive". "Switch drive" means that the same number of gradation amplifiers as the number of voltage gradations (for example, 64 gradation amplifiers if the number of voltage gradations is 64) is provided for each of the gradations, and a gradation voltage selection circuit that is provided at the output of these gradation amplifiers selects and outputs the desired gradation voltage to each output terminal. The characteristic feature of this method is that the current consumption for output of the gradation voltage is that consumed within the gradation amplifiers, which are provided in the same number (for example 64) as the number of voltage gradations.
In contrast, "amplifier drive" means that respective amplifiers are arranged at all of the plurality of output terminals (for example all of 396 output terminals), and the gradation voltage at each output terminal is amplified (or buffered). In the case of this method, the current consumption for output of the gradation voltage is that consumed within the amplifiers, which are of the same number as the number of output terminals (for example 396).
Thus, comparing the two methods: "switch drive" and "amplifier drive" in respect of their current consumption, they differ in that, in the case of "switch drive", current is consumed in centralized fashion by gradation amplifiers of the same number (for example 64) as the number of voltage gradations, whereas, in the case of "amplifier drive", current is consumed in dispersed fashion by the same number of amplifiers as the number of output terminals (for example 396), which is considerably greater than the number of voltage gradations.
In the case of a data line drive circuit i.e. a circuit in which a plurality of data lines of a liquid-crystal panel are driven by simultaneously outputting a plurality of different gradation voltages from a plurality of output terminals, if "switch drive" is adopted, usually, the same number of gradation amplifiers as the number of gradations are provided. Also, typically, a plurality of different gradation voltages amplified (or buffered) by these gradation amplifiers are selected by the gradation voltage selection circuit and respectively supplied to the output terminals of the data line drive circuits. A technique for reducing current consumption in this case is to identify the gradation amplifiers that are employed and the gradation amplifiers that are not employed when the gradation voltages are outputted, and to disable the operation of the gradation amplifiers that are not employed. An example of this technique is disclosed in Japanese Unexamined Patent Application Publication No. 2002-108301.
FIG. 11 is a functional block diagram showing an example of a data line drive circuit corresponding to the circuit layout disclosed in Japanese Unexamined Patent Application Publication No. 2002-108301, in which no frame memory RAM is incorporated.
The data line drive circuit of FIG. 11 comprises a decision circuit 101, an enabling/disabling circuit 102, a gradation voltage generating circuit 103, a gradation amplifier circuit 104, a first data latch circuit 105, a second data latch circuit 106, a level shifting/decoding circuit 107, a gradation voltage selection circuit 108, and an output circuit 109. n output terminals S1 to Sn corresponding to then output lines are provided on the output side of the output circuit 109 (n is an integer of 2 or more).
The decision circuit 101 decides on the gradation to be used (i.e. the respective gradations of the n output lines corresponding to the input gradation data) on the n output lines in accordance with 6-bit digital gradation data that is input (on an interface) from an external CPU (central processing unit, not shown) and outputs the result of this decision in 64-bit form. The enabling/disabling circuit 102 determines whether the respective gradation is to be used or not in accordance with the 64-bit decision results data from the decision circuit 101 and delivers a 64-bit control signal in accordance with this result to the gradation amplifier circuit 104. On the other hand, the gradation voltage generating circuit 103 generates the same number of gradation voltages as the prescribed number of gradations (in this case, 64) and delivers these to the gradation amplifier circuit 104.
The gradation amplifier circuit 104 comprises 64 gradation amplifiers, of the same number as the number of gradations, and respectively amplifies (or buffers) the 64 different gradation voltages delivered from the gradation voltage generating circuit 103. The operation of these gradation amplifiers is controlled in accordance with a control signal delivered from the enabling/disabling circuit 102 and selectively disables the operation of gradation amplifiers corresponding to gradations that are determined not to be used. This enables current consumption to be reduced. The gradation amplifier circuit 104 outputs to the gradation voltage selection circuit 108 a analogue gradation voltage that is thus subjected to control as to whether the amplifier in question is to be used or not and which is amplified (or buffered).
The first data latch circuit 105 successively stores the 6-bit gradation data input from outside, in accordance with a latch signal LAT. The second data latch circuit 106 receives the gradation data of the n output lines stored in the first data latch circuit 105, in accordance with a horizontal signal STB, and holds the gradation data to output simultaneously onto the n output lines. For each of the n output lines, the level shifting/decoding circuit 107 performs level shift the 6-bit gradation data delivered from the second data latch circuit 106 and identifies the gradation that is to be selected by decoding thereof.
The gradation voltage selection circuit 108 inputs 64 analogue gradation voltages whose use or non-use is controlled, and which are amplified (or buffered) by 64 gradation amplifiers in the gradation amplifier circuit 104. For each of the n output lines, the gradation voltage selection circuit 108 selects a single analogue gradation voltage level from these 64 different analogue gradation voltage levels, in accordance with the identification result obtained from the level shifting+decoding circuit 107. The output circuit 109 respectively outputs the gradation voltage which is thus selected to the n output terminals S1 to Sn through the n output lines.
In the prior art data line drive circuit layout shown in FIG. 11, the power consumption can be reduced, but problems occur when RAM (Random Access Memory) that functions as a frame memory is added.
In a liquid-crystal display device, which is employed in appliances where a still image is often displayed, such as a mobile telephone, a frame memory is incorporated in the data line drive circuit. Reduction in power consumption is aimed at by arranging for the signal from the CPU to transfer image data only when the frame image is changed. The various signals delivered from the CPU and the various types of control signal of the data line drive circuit are therefore asynchronous. However, in order to display an image, the data line drive circuit must be driven with a fixed period. Also, when image data corresponding to one line are transferred from the frame memory to the first data latch circuit 105 that functions as a line memory, the image data corresponding to one line are transferred simultaneously using a latch signal of fixed period. Consequently, it is necessary to decide upon use/non-use of gradations in the image data in the line memory simultaneously.
Considering the case where the data line drive circuit FIG. 11 incorporates RAM that functions as a frame memory, this RAM must be arranged upstream of the first data latch circuit 105. Consequently, gradation data corresponding to one frame in the image data delivered from the CPU is first of all stored by being successively inputted to this RAM with a given timing. After this, data corresponding to one line of the gradation data is simultaneously transferred, with another timing, from this RAM to the first data latch circuit 105, where it is stored. Consequently, the problem arises that, even if the respective gradations to be used for the n output lines have been decided upon using the gradation data inputted to this RAM in the same way as was done in the case of the circuit layout shown in FIG. 11, the decision results do not necessarily agree with the gradations to be used by the gradation data outputted from this RAM (gradation data that was transferred and stored by the first data latch circuit 105).
Also, since the image to be displayed by the image unit is unchanged, when the image is displayed by using the gradation data corresponding to one line stored in this RAM, there is no actual input action to input gradation data itself to this RAM. Consequently, in the prior art construction, the problem arises that image display cannot be achieved unless a decision of use/non-use is made based on input of gradation data from outside.
Thus, with the prior art data line drive circuit shown in FIG. 11, it is not possible to cope with requirements for RAM incorporation as described above. An example of a technique for effecting improvement in this respect is disclosed in Japanese Unexamined Patent Application Publication No. 2004-271930 "Drive circuit for a display device" (applied for on the 10 Mar. 2003). FIG. 12 shows an example of the circuit layout of the data line drive circuit used in the drive circuit of the display device of Japanese Unexamined Patent Application Publication No. 2004-271930.
As shown in FIG. 12, this data line drive circuit has the same construction as the data line drive circuit of FIG. 11 except for the fact that RAM 110 that functions as a frame memory (used for storing the image data corresponding to a single frame) is inserted upstream of the first data latch circuit 105 and the fact that use/non-use of the each gradation is decided upon using 64-bit gradation voltage data decision circuit 101 from the gradation voltage selection circuit 108. Accordingly, in order to simplify the description, identical circuit elements are given the same reference symbols as in FIG. 11 and description relating thereto is omitted.
The RAM 110 stores an amount of 6-bit gradation data inputted from outside corresponding to one frame. The amount of gradation data corresponding to one line (corresponding to n output lines) of the amount of data corresponding to one frame that is stored in the RAM 110 is simultaneously transferred to the first latch circuit 105 in response to a latch signal LAT. This amount of gradation data corresponding to one line is held in the first latch circuit 105. Also, the gradation data corresponding to one line (corresponding to n output lines) that is held in the first data latch circuit 105 is transferred simultaneously to the second data latch circuit 106 in response to the horizontal signal STB and is held in the second data latch circuit 106. The holding of this gradation data by the second data latch circuit 106 is continued for a horizontal period (1 H).
It should be noted that the first data latch circuit 105 is provided for the purpose of arranging that in the case where a gradation data write signal to the RAM 110 delivered from the CPU and a latch signal LAT are delivered overlapping in time, writing to the RAM 110 is performed with priority.
The decision circuit 101 examines the 6-bit gradation data corresponding to one line in the gradation voltage selection circuit 108 and decides on gradations which are then selected (gradations to be used) and gradations that are not selected (gradations not to be used). This utilizes the fact that this gradation use/non-use decision function and the original gradation voltage selection function possessed by the gradation voltage selection circuit 108 have in common the decoding of the same 6-bit data to 64-bit data. The circuit layout shown in FIG. 13A to FIG. 13D is employed for realizing this gradation use/non-use decision function.
FIG. 13A to FIG. 13D are views showing an example of a circuit, specifically decision circuit 101, that decides upon use/non-use (selection/non-selection) of gradations, corresponding to a single display line (corresponding to n output lines). The circuit layout is the same for each of the n output lines, so in FIG. 13A to FIG. 13D only the portion relating to a single output terminal S1 is shown.
In the decision circuit 101 of the construction shown in FIG. 13A to FIG. 13D, in the gradation voltage selection circuit 108 having a typical construction, switches 205 for selecting the gradation to be used in accordance with the output of the level shifting/decoding circuit 107 are provided. Also, in order to make possible the decision of a selection/non-selection of the gradation, switches 202 are provided that control the connection/non-connection action with the output terminal S1 respectively on the output sides of the 64 gradation amplifiers 201. These gradation amplifiers 201 are of the same number as the number of gradations (these gradation amplifiers 201 are provided in the gradation amplifier circuit 104). The decision circuit 101 of FIG. 13A to FIG. 13D is further provided with: switches 203a for pre-charging the power source voltage VDD on the Vn line (output side line of the switches 202); switches 207a for dropping the potential of the Vn line from the power source potential VDD to the earth level GND; and switches 206 for preventing the decision action of use/non-use (selection/non-selection) of a gradation being influenced by the output terminals S1 to Sn.
The decision circuit 101 of the construction shown in FIG. 13A to FIG. 13D reads and decodes an amount corresponding to one line of gradation data in the RAM 110 in the condition of FIG. 13A and performs opening/closing control of the gradation selection switches 205 in accordance with the result thereof. If a gradation voltage amplified (buffered) by the gradation amplifier 201 of FIG. 13A is selected, the gradation selection switch 205 thereof is turned ON (closed); if the gradation voltage is not selected, the gradation selection switch 205 is turned OFF (opened). This is the normal action based on the gradation voltage selection function of the gradation voltage selection circuit 108.
When the 6-bit gradation data delivered from the RAM 110 is decoded to 64-bit gradation data, in other words when the horizontal signal STB becomes high level (H), as shown in FIG. 13B, the power source voltage pre-charging switch 203a is turned ON. In this way, the power source voltage VDD is pre-charged onto the line Vn (output side of the switch 202) and, as a result, the line Vn becomes VDD level.
Next, after the power source voltage pre-charging switch 203a has returned to OFF, the ground voltage application switch 207a is turned ON. If, at this time, the gradation selection switch 205 is turned ON (if the gradation in question is selected), as shown in FIG. 13C, the line Vn drops from the VDD level to the GND level. Conversely, if at this point the gradation selection switch 205 is turned OFF (the gradation in question is not selected), as shown in FIG. 13D, the line Vn is held at the VDD level.
Thus, if the corresponding gradation is selected, the Vn line (the output side of the gradation amplifier 201 and gradation selection/non-selection decision switch 202 i.e. the output end of the gradation amplifier circuit 104) becomes GND level and if the corresponding gradation is not selected, the Vn line becomes VDD level. It is thereby possible for the decision circuit 101 to decide on selection/non-selection of the each gradation at this time, by reading the voltage level of the n Vn lines in the gradation voltage selection circuit 108.
The enabling/disabling circuit 102 disables the operation of the unselected gradation amplifier 201 in accordance with the result of the decision by the decision circuit 101 which has thus been obtained. After this, when the gradation selection/non-selection decision switch 202 and the decision operation effect-preventing switch 206 are turned ON, the output of the 64 gradation amplifiers 201 is delivered to the output terminals S1 to Sn.
FIG. 14 is a timing chart showing the operation of the drive circuit FIG. 12. The operation of the decision circuit 101 constructed as shown in FIG. 13 may be described as follows with reference to this timing chart. In order to simplify the display, in FIG. 14, only the waveform related to the output terminal S1 is shown. Also, in FIG. 14, "1 H" indicates one horizontal synchronization period.
First of all, at the timing 1 in FIG. 14, the latch signal LAT is turned ON, and, in response thereto, the gradation data corresponding to one line in the image data that is stored in the RAM 110 that functions as a frame memory is transferred and stored in the data latch circuit 105. At this point, the gradation selection/non-selection decision switch 202 is turned ON, the power source voltage pre-charging switch 203a is turned OFF, the decision operation effect-preventing switch 206 is turned ON, the ground voltage application switch 207a is turned OFF, and, as a result, the output terminal S1 is at level 0.
At the next timing i.e. timing 2, all of the decision result signals that are output by the decision circuit 101 become high-level (H), irrespective of the image data. As a result, all of the switches 202 are turned OFF, so all of the gradation amplifiers 201 are put in an inactive condition. Also, in order that the voltage when the decision operation is executed should not be applied to the data lines (output terminals S1 to Sn) of the liquid-crystal display device, all of the switches 206 are turned OFF. The condition of the switches at this time time is shown in FIG. 13A.
At the next timing i.e. timing 3, the horizontal signal STB is turned ON, and, in response thereto, the gradation data corresponding to one line in the first data latch circuit 105 is transferred and stored in the second data latch circuit 106. Also, the level shifting/decoding circuit 107 reads gradation data corresponding to one line in the second data latch circuit 106 and selects a gradation in accordance therewith by using the switch 205. Specifically, the gradations to be employed in regard to the n respective output lines are selected and other gradations are put in non-selected condition. In addition, at this time, the switch 203a is turned ON and, as a result, the line Vn is pre-charged to the power source voltage VDD. The conditions of the switches at this time are as shown in FIG. 13B.
At the next timing i.e. timinig 4, the switch 203a is turned OFF, and the switch 207a is turned ON. As a result, the line Vn whose the gradation selection switch 205 that is turned ON (i.e. the output line whereof the gradation voltage delivered from the gradation amplifier 201 is decided to be "used") is lowered from the power source voltage VDD to the ground level GND. The condition of the switches at this time is that shown in FIG. 13C.
On the other hand, the power source voltage VDD of lines Vn whose gradation selection switch 205 was turned OFF (i.e. output lines whereof gradation voltage delivered from the gradation amplifier 201 was decided to be "not used") is held without alteration. The condition of the switches at this time-point is that shown in FIG. 13D.
At this timing 4, the voltage level of each 64 lines that are connected with the gradation amplifier circuit 104 may be held as "1", in case that the Vn line is, for example, power source voltage VDD. The voltage levels of the 64 lines may be held as "0", in case that the Vn lines is, for example, ground voltage GND . The decision circuit 101 may therefore be constituted by a latch circuit.
At the next timing i.e. timing 5, the switch 207a is turned OFF. At the next timing i.e. timing 6, the switch 206 is turned ON and the gradation amplifiers 201 are respectively connected with the output terminals S1 to Sn. At this time, the gradation amplifiers 201 are maintained in the inactive condition in accordance with the decision result from the decision circuit 101 or altered to the activated condition. The gradation voltages in accordance with the gradation data are thereby applied to each data line through the output terminals S1 to Sn.
In general, it is desirable that the voltage that is supplied to respective parts by the data line drive circuit for the liquid-crystal display device should be held as far as possible fixed, except when the voltage level fluctuates due to, for example, changeover of the operational condition. In view of this aspect, as described above, in the case of the data line drive circuit (incorporating RAM) of FIG. 12, it is necessary for the decision operation effect-preventing switch 206 to be put in the OFF condition during execution of the gradation selection/non-selection decision operation in a single horizontal synchronization period (1 H). During this condition, the output terminals S1 to Sn therefore assume a high impedance (Hi-Z) condition. Specifically, a high-impedance (Hi-Z) period is generated. As a result, the period during which a constant voltage is maintained is decreased by the extent of the Hi-Z period. In order to compensate for this decrease, it is necessary to raise the operating speed of these circuits by improving the drive capability of the gradation amplifiers 201 or gradation voltage selection circuit 108. Therefore, the current consumption increases and the area of the circuitry increases.
In the data line drive circuit of FIG. 12, during the decision action of gradation selection/non-selection, all of the output terminals S1 to Sn (where for example n=396) are inevitably put in the Hi-Z condition. During this action, the gradation voltages cannot therefore be applied to all of the pixels of the liquid-crystal panel. This means that the charging period in respect of the capacitance of the pixels of the liquid-crystal panel becomes shorter, thereby lowering picture quality. In order to avoid this, the need is produced to raise the operating rate by increasing the drive capacity of the gradation amplifiers 201 and/or gradation voltage selection circuit 108 by an amount corresponding to the shortening of the charging time in respect of the capacitances of the pixels of the liquid-crystal panel.
In this way, in the case of the data line drive circuit of FIG. 12, the data line drive circuit incorporates RAM 110, and reduction in current consumption is aimed at by disabling the operation of the gradation amplifiers 201 corresponding to the gradations that are not selected and corresponding to incorporation of the RAM 110. However, picture quality is thereby reduced.
It has now been discovered that in the conventional drive circuit, in order to prevent a lowering of picture quality, it is necessary to increase the operation speed of the gradation amplifiers and/or gradation voltage selection circuit; this is associated with an increase in current consumption or increase in area of the circuitry.


Embodiments of modifying data are disclosed.

Digital patterning embeds certain additional digital data in particular portions of an original data set. This approach can be slow, because it may include the processing of the original data set in uncompressed form. Since this approach embeds additional digital data, it may generate a modified digital data set that is larger than the original digital data set, making the modified digital data set more difficult to store and transmit.

Hewlett-Packard Development Company, L.P.