Address snoop methods and multi-processor systems to enable easy implementation of a large number of I/O blocks in the multi-processor system, independently of processor blocks, and to prevent the upper limit of the performance of the multi-processor system from deteriorating (prevent latency from increasing). An address snoop method for a multi-processor system having a structure in which a plurality of processor blocks each having a plurality of processors and a plurality of memories are coupled to a plurality of input and output (I/O) blocks via an address connecting apparatus, is configured to carry out an address snoop process that judges whether to respond with respect to an access request, in the address connecting apparatus in place of each I/O block, when the access request is generated from an arbitrary one of the processor blocks.

1. Field of the Invention
The present invention generally relates to address snoop methods and multi-processor systems, and more particularly to an address snoop method for carrying out an address snoop process in a multi-processor system in which a plurality of processor blocks are coupled to a plurality of input and output (I/O) blocks via a connecting apparatus, and to a multi-processor system which employs such an address snoop method.
2. Description of the Related Art
A multi-processor system has a structure in which a plurality of processor blocks and a plurality of I/O blocks are coupled via a connecting apparatus also referred to as data and address crossbars. Each processor block includes a plurality of processors and a plurality of memories. On the other hand, each I/O block includes a storage unit such as a disk drive. In the following description, it will be assumed for the sake of convenience that each processor block is formed by a CPU block that has a plurality of CPUs and a plurality of cache memories.
In the conventional multi-processor system, the I/O block is provided in a 1:1 relationship to the CPU block or, even, if a plurality of I/O blocks are independent, a small number of I/O blocks can be shared by a plurality of CPU blocks. However, the number of accesses among the cache memories increases proportionally to the number of CPU blocks, and increasing the number of CPU blocks does not necessarily improve the performance of the multi-processor system. Accordingly, a system has been proposed to improve the performance of the multi-processor system by interconnecting the CPU blocks via the I/O blocks.
However, even when such a proposed system is employed, if the number of I/O blocks per CPU block is in a 1:1 ratio as in the case of the conventional multi-processor system or, the I/O blocks are shared by a plurality of CPU blocks, the performance of the multi-processor system is greatly restricted, thereby eliminating the significance of employing such a proposed system.
For this reason, there are demands to realize a structure which can implement a large number of I/O blocks, increase the number of I/O blocks usable by each CPU block, and use the CPU blocks and the I/O blocks in a flexible combination.
For example, a Japanese Laid-Open Patent Application No. 9-138782 proposes a multi-processor system having a structure in which a memory access output by a processor unit is monitored by other cache memories using the interconnected network. On the other hand, Japanese Laid-Open Patent Application No. 9-138783 proposes a multi-processor system having a mechanism that simultaneously executes a plurality of unicastings having different transfer destination ports. In addition, Japanese Laid-Open Patent Application No. 2001-184321 proposes a multi-processor system coupled via a node interconnecting network.
When a large number of I/O blocks are implemented in the multi-processor system, independently of the CPU blocks and the CPU blocks and the I/O block communicable connect by data and address crossbars, it becomes necessary to separately snoop the address in each I/O block. In other words, conventionally each I/O block includes address snoop circuitry and/or programmable logic. In this case, it is necessary to supply a signal required for an address snoop process from the address connecting apparatus (or address crossbar) to each I/O block. However, in order to supply the signal required for the address snoop process to each I/O block, it is necessary to take implementation measures, such as increasing the number of pins of the address connecting apparatus per LSI and dividing the functions of a plurality of LSIs, thereby introducing problems in that the implementation is difficult and that the cost increases. In addition, because of the structure of the multi-processor system (particularly the address connecting apparatus and the I/O blocks), a wiring length increases and a transmission delay is generated, thereby introducing a problem in that the upper limit of the performance of the multi-processor system deteriorates (latency increases).

Address snoop method and multi-processor system


Systems and apparatus for providing content distribution network (or CDN) egress and/or ingress functionality and methods for making and using the same. In various embodiments, the system can comprise not only a traditional CDN but also a reverse CDN, wherein edge Points of Presence (or PoPs) can be used as ingest points. The system advantageously can be applied to given emerging workloads, such as autonomous applications, artificial intelligence (AI) applications and Internet of Things (IoT) applications, among other things.

A content distribution (or delivery) network (or CDN) is a geographically-distributed network of proxy servers and data centers. By providing high network availability and high network performance by distributing the servers geographically, CDNs serve a large portion of data content, including media streaming, web objects, applications, and social media. CDNs suffer from several disadvantages. Traditional CDN solutions, for example, provide broad coverage to metro areas but serve rural space poorly. Approximately half of consumers in the United States live outside of metro areas.
In view of the foregoing, a need exists for an improved system and method for providing content distribution (or delivery) network egress and/or ingress functionality in an effort to overcome the aforementioned obstacles, challenges and deficiencies of conventional data processing systems.
It should be noted that the figures are not drawn to scale and that elements of similar structures or functions are generally represented by like reference numerals for illustrative purposes throughout the figures. It also should be noted that the figures are only intended to facilitate the description of the preferred embodiments. The figures do not illustrate every aspect of the described embodiments and do not limit the scope of the present disclosure.

Content distribution network system and method


A high performance inductor which has a relatively low sheet resistance that can be integrated within a semiconductor interconnect structure and can be used in RF applications, including RF CMOS and SiGe technologies, is provided. The inductor is either a dual-metal inductor including a first layer of metal which serves as an upper metal wire in the semiconductor structure and a second layer of metal located directly on top of the first layer of metal, or a tri metal inductor, which includes a third layer of metal located directly on top of the second layer of metal. No vias are located between the various metal layers of the inventive inductor.

1. Field of the Invention
The present invention relates to integrated circuits (ICs), and more particularly to an IC including a high performance metal stacked inductor that is integrated into a semiconductor interconnect structure
2. Background of the Invention
In the semiconductor industry, digital and analog circuits, including complex microprocessors and operational amplifiers, have been successfully implemented in silicon-based integrated circuits (ICs). Such Si-based ICs typically include active devices such as, for example, bipolar transistors and field effect transistors (FETs), diodes, and passive devices, including resistors, capacitors, and inductors.
Attempts to miniaturize radio frequency (RF) circuits, however, remain a challenge. RF circuits are generally employed in cellular phones, wireless modems, PDAs, and other types of communication equipment. The miniaturization problem is a result of the difficulty in producing a good inductor in silicon technologies which is suitable for RF applications at widely used microwave frequencies from 900 MHz to 2.4 GHz.
Monolithic microwave integrated circuits (MMICs), which are rapidly outpacing discrete ICs in mobile wireless communication products, require high-Q (quality factor) passive components, such as inductors and capacitors, to be able to realize integrated filters and matching sections with small insertion losses.
If conventional silicon technology is used, e.g., BiCMOS, the inductor is clearly the performance and density limiting passive element. While the quality factor Q of an integrated inductor can be improved by modifying the interconnect technology by switching from AlCu to Cu or Au interconnects, the area consumption of the inductor structure is difficult to reduce.
It is well known that the direct current (DC) resistance of a metal line that forms a spiral inductor is a major contributor to the inductor Q degradation. One way to reduce this effect is to use wide metal line widths. However, such an approach increases the inductor area and the parasitic capacitance associated with the structure. Wider metal line widths within a spiral inductor are also subject to frequency dependent loss mechanisms related to eddy current generation within the metal lines (typically called "proximity effect"). Wider and more closely spaced spiral lines will be subject to increased proximity effect over narrower, more widely spaced lines.
The large inductor area limits the miniaturization that can be achieved. The combined negative contributions of parasitic capacitance associated with the large area (lower self resonance frequency), and proximity effects from wide metal lines (increasing frequency dependent loss) further limit the useful frequency range.
A standard feature in present day very large scale integration (VLSI) is the use of multi-level interconnects for inductor integration. Using this technology, some have shunted several layers of metal together to "simulate" a thicker metal layer than achievable in AlCu interconnect technology. See, for example, U.S. Pat. No. 5,446,311 to Ewen, et al. Shunted inductors represent an improvement over the previous prior art.
A typical prior art dual-metal inductor of the type described in the Ewen, et al. disclosure is shown, for example, in FIG. 1. Specifically, FIG. 1 shows a prior art dualmetal inductor 10 that comprises a top metal wire inductor 16 in the MA level that is connected by via 14 to a bottom metal wire inductor 12. The bottom metal wire inductor 12 is connected by another via 14″ to a termination metal level 11. The dual-metal inductor 10 is located in an interlevel or intralevel dielectric (not specifically labeled) of an interconnect structure.
In the prior art dual-metal inductor 10 shown in FIG. 1, the top metal wire inductor 16 is typically an Al wire having a thickness of about 4 μm, and the bottom metal wire inductor 12 is typically a Cu wire having a thickness of about 3 μm. Vias 14, 14″ typically have a much smaller width than the metal wire inductors and they are typically comprised of W.
The dual-metal inductor shown in FIG. 1 is used in the industry to provide high performance in both series and parallel inductors for very high Q applications (peak Q of 28, 1 nH inductor, 3–4 GHz) and is driven by the sheet resistance of the metal wire inductors. Series inductance densities of 3–4× single devices are being achieved.
One major problem with the metal stacked inductor shown in FIG. 1 is that the inductor has a sheet resistance that is too high for use in many RF applications. The high sheet resistance of the prior art dual-metal stack inductor is caused by the presence of the W via that is used in interconnecting the top metal wire inductor to the bottom metal wire inductor. The resistance of the W via is much higher than that of metal wires.
Despite the above, there is a continued need for providing integrated metal stacked inductors that have a high quality factor Q (on the order of about 25 or above), yet have a substantially low sheet resistance (on the order of about 5 mOhms/square or less). Such integrated metal stacked inductors would be highly useful in RF applications, in particularly RF complementary metal oxide semiconductor (CMOS) and SiGe technologies.

Tri-metal and dual-metal stacked inductors

International Business Machines Corporation


Examples can include a system for flipping components in REVIT or other BIM software. A plugin can receive an indication that a flip has occurred in a plan displayed on a graphical user interface (“GUI”). The plan can include an assembly that has a handedness, such as a door or window. The plugin can determine what the handedness should be based on assembly parameters indicating mirroring, facing, and hand flipped. Because some assemblies cannot correctly mirror without adjusting handedness, the plugin can determine the appropriate handedness and replace the assembly with a different assembly when the handedness is incorrect after flipping. The new assembly can display in the GUI at the correct location.

Computer-aided design ("CAD") software allows users to design structures for construction, among other things. One type of CAD software is Building Information Modeling ("BIM") software, which allows users to elaborately design three-dimensional structures. AUTODESK REVIT is one type of BIM software that can be used to design complex buildings all the way down to components and assemblies for use in a project. For example, a user can model an entire plumbing or electrical installation within a building. Doors, windows, and other reversible components can also be laid out in REVIT.
REVIT can also mirror a room, such as if the same room is desired but in an opposite configuration. However, door swings, hot and cold assemblies, ducts with directional flow, and other reversible items can become incorrect when doing so, swinging, opening, or facing in the wrong direction in the mirrored plan. REVIT can track mirroring, hand flip, and facing flip features for components like doors and windows. Mirroring can indicate if a part is mirrored, facing flip indicates whether the facing has been flipped, and hand flip indicates if the handle is flipped. However, REVIT does not track left swing, right swing, flow direction, hot/cold, and other important directional properties.
When a plan is flipped, doors and windows can appear correct on the graphical user interface ("GUI"). However, the part family can still be the same one as the original plan. For example, a right swing door assembly with a flip applied can look correct but swing in the wrong direction. This can lead to incorrect orders and frustrations during the building process.
For at least these reasons, a need exists for systems that can intelligently flip components in REVIT.

Intelligent assembly flipping in computer-aided design


The present invention discloses a retractable ladder which is a common climbing tool in daily life and engineering industry. The retractable ladder comprises a pedal operated unlock device, section-positioning lock devices and an accidental operation preventing device. The main components of the unlock device is disposed in the first ladder section and enclosure caps at upper ends of each ladder section, except for the uppermost ladder section, are provided with the lock devices and unlock nose spikes. The retractable ladder is changed from an extended state to a folded state simply by operating the unlock device with foot of the user so as to release the lock of the ladder. Consequently, the retractable ladder will automatically retract to descend all of the ladder sections from top to bottom in turn. When the ladder is changed from the folded state to the extended state, section-positioning pins are pulled out downwardly from the uppermost ladder section so as to lock the ladder sections. The retractable ladder of the present invention is configured to extend and retract conveniently, and the use of the ladder is very easy. Further, the retractable ladder is advantageous in ease of assembling and maintenance, Meanwhile, safety is ensured so as to prevent hurts of hands of the user which may occur when a manual retractable ladder is used. In addition, the retractable ladder has advantages of low cost, safe operation and prominent improvements to the art.

Ladders are essential articles in daily life and engineering industry. Some of ladders have long length so that it is inconvenient for carrying and storing them. In view of this, a conventional retractable ladder has been developed in the prior art. In general, this retractable ladder extends to its greater length at deployed position in use and retracts to its shorter length at its retracted or stowed position so as to be easily and conveniently carried and stored and thus become popular.
In one embodiment of the prior art, such a retractable ladder is provided with a pedal actuated device for descending the ladder sections. The pedal actuated device is disposed at the lowest rung member on a connecting rod which is movable at inside of the ladder stile of the rung member. The connecting rod is connected with a transmission means, which is disposed in a box of the lowest rung member of the ladder rung member, via a steel wire. The trailing end of the transmission means has an approximately U-shape transmission piece of which one end is shaped to move along with the connecting rod. The device for descending ladder sections comprises a foot pedal, a pulling rod and ropes. The rung box comprises a box, a manipulating hook, a guide bracket, a catch plate, a connecting rod, a transmission pin, a pin base, a transmission piece and the like.
It is apparent from the above that the device has a complicated structure, thereby resulting in a high cost and difficulty in assembling and maintenance.


A tester for characterizing individual ones of a semiconductor laser devices of a laser bar includes a holder for securing the laser bar in a fixed position. For moving in at least one relative direction with respect to the laser bar, a movable measurement system is provided for characterizing the individual ones of the semiconductor laser devices as a function of the at least one relative direction.

1. Field of the Invention
The present invention relates generally to testing of semiconductors, and particularly to testing of laser bars, which are an intermediate structure in the manufacture of laser devices.
2. Technical Background
Laser devices, such as semiconductor diode lasers or laser chips, have become important commercial components. They are used in a wide variety of applications ranging from the readout sources in compact disks to the transmitters in optical fiber communication systems. While new applications in high-speed telecommunication networks continue to emerge, how to ensure that diode lasers are reliable and manufacturable is the most challenging issue. One proven approach to this issue is to deploy tight quality control by using laser bar testing systems that characterize diode lasers in many aspects and in an efficient manner.
Diode lasers are manufactured on wafers or substrates which are processed and further divided into sections or quarters. The sections are further divided into laser bars by breaking or cleaving the sections along the scribe lines, to form facets along the elongated sides of the sections. The laser bar contain many laser diodes.
During the process of diode laser fabrication from the wafer to the final packaging of individual laser devices or diodes, the first stage where these lasers exhibit both electrical and optical characteristics is when laser bars are formed. Therefore, it is desired to characterize lasers at this early stage by probing and testing all the lasers when they are still in the form of a laser bar. The laser devices that do not meet specifications will be scrapped before entering into further labor-costing or time-costing stages, i.e. packaging and life-testing or burn-in. Usually, a full procedure of bar testing includes six measurements for each laser that is being probed: front-facet light versus current, back-facet light versus current, voltage versus current, horizontal far field pattern, vertical far field pattern and an optical spectrum analysis. A system that performs one or all of these measurement functions is called a laser bar tester.
In a conventional laser bar tester, after a laser bar holder or chuck has been removed to load/unload laser bars at a remote station, the laser bar and a single long contact probe are mounted on a rotational stage and detectors are scattered around the laser bar. In order to make a specific measurement, i.e. light versus current, the laser under test or the selected laser device and the probe have to rotate to face one particular detector with the probe engaged. Thus testing of all characteristics involves moving the laser bar and probe many times. This mechanism enabling multiple movements of the probe and the laser bar is prone to vibration that can cause the lift-off of the probe from the laser surface of the selected laser device, potentially damaging the laser because of transient electrical discharges during or in-between measurements.
Therefore, there is a need to improve the laser bar tester to minimize damage to the laser devices due to the testing process while maximizing efficiency.
One aspect of the present invention is a tester for characterizing individual ones of a semiconductor laser devices of a laser bar, wherein the tester includes a holder for securing the laser bar in a fixed position. For moving in at least one relative direction with respect to the laser bar, a movable measurement system is provided for characterizing the individual ones of the semiconductor laser devices as a function of the at least one relative direction.
In another aspect, the present invention includes a pair of detectors, each moving in arc paths around the laser bar to sample the far-fields.
Additional features and advantages of the invention will be set forth in the detailed description which follows, and in part will be readily apparent to those skilled in the art from that description or recognized by practicing the invention as described herein, including the detailed description which follows, the claims, as well as the appended drawings.
It is to be understood that both the foregoing general description and the following detailed description are merely exemplary of the invention and are intended to provide an overview or framework for understanding the nature and character of the invention as it is claimed. The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate various embodiments of the invention and together with the description serve to explain the principles and operation of the invention.


A plurality of constant ON-time buck converters are coupled to a common load. The output of each buck converter is coupled to a common load via a series sense resistor. The regulated output voltage across the common load is compared to a reference voltage to generate a start signal. The start signal is alternately coupled to the controller on each buck converter. The ON-time of a master buck converter is terminated when a ramp signal generated from the regulator input voltage exceeds the reference voltage. All other slave converters have an ON-time pulse started by the start signal and stopped by comparing a sense voltage corresponding to their output current during their ON-time pulse to the peak current in the master converter during its ON-time. A counting circuit with an output corresponding to each of the plurality of buck converters is used to select which buck converter receives the start signal.

Constant ON-time controllers are used in a class of buck regulators that use the output voltage ripple to initiate an ON-time whenever the regulator output voltage falls below a reference voltage. The ON-time is terminated (generating an ON-time pulse) by circuitry in response to other conditions (e.g., level of regulator input). During the ON-time pulse, energy is supplied directly from the regulator input voltage to the regulator output via an electronic switching device. Likewise, when the ON-time pulse has terminated, stored energy from the regulator input voltage is supplied to the regulator output. Most constant ON-time regulators include circuits that adjust the ON-time pulse duration as a function of the regulator input voltage and regulator output voltages, thus resulting in an almost constant frequency as the duty cycle changes. The regulator output voltage ripple is determined to a large extent by the ripple current in the energy storage inductor flowing through the output capacitor's equivalent series resistance (ESR). In applications that require low voltage ripple; the ESR must be very small. This creates two problems for constant ON-time controllers, stability and susceptibility to noise. Some circuits use techniques that supplement the ESR generated ripple with a voltage ramp. These voltage ramps minimize the susceptibility of the controller to noise and thus substantially reduce jitter.
A typical constant ON-time controller for a buck regulator is shown in FIG. 5. The output voltage (Vout) 516 is set by a duty cycle that is defined as the ratio of ON-time of the high-side field effect transistor (FET) 507 to the total switching period. Whenever Vout 516 drops below the reference voltage Vref 517, comparator 508 sets latch 509. Gate drivers 508 turn FET 507 ON thereby charging inductor (L) 504 and delivering current to the load (not shown) coupled to Vout 516. Latch 509 remains set until the voltage 518 across capacitor (C) 511 exceeds Vref 517. At this time, comparator 510 resets latch 509 and gate drivers 500 turn FET 507 OFF and FET 506 ON. The energy stored in L 504 causes the load current to continue to flow to Vout 516. Catch diode (D) 505 insures current in L 504 is not interrupted during switching to minimize transients.
The ON-time (time interval FET 507 is ON) is a function of both Vin 515 and Vref 517. As Vin 515 rises, the ON-time will be shorter since C 511 charges faster. If Vref 517 is increased, C 511 has to charge to a higher voltage to trip the comparator 510, also resulting in a longer ON-time. Thus, the circuitry adjusts the ON-time to minimize the frequency changes (as determined by the time between pulses) that would otherwise result from changes in Vin 515 and Vout 516. To increase the current in inductor (L) 504 in response to a step change in the load (not shown) coupled to Vout 516, the control loop generates more ON pulses per unit time. To decrease the current in L 504, the control loop generates fewer pulses per unit time. Therefore, during transient load steps the frequency is not constant.
Multi-phase buck converters are used in applications that demand high output currents. They may be constructed by connecting two or more buck converters to the same output capacitor. The control loop for a multiphase buck converter must regulate the output voltage and ensure that the inductor in each phase has the same current. Multi-phase buck controllers are popular in low voltage, high current applications that require a fast transient response. They are often used to generate the supply voltage for the central processing unit (CPU) integrated circuit (IC) in desktop and notebook computers. Voltage mode, current mode, and hysteresis type controllers have all been used successfully to control the output voltage in these applications. However, converters with these types of controllers require a second current loop to match the current from each converter since it is desirable to have each converter provide an equal share of the load current. Therefore, in a dual phase buck converter, the energy storage inductor in each converter should normally supply half the load current. Likewise, in a three-phase converter system, the inductor in each phase should normally supply one third of the load current.
Current mode controllers are a popular choice for multiphase controllers because their current loop can regulate the current sharing in each phase. But hysteresis and constant ON-time controllers may also be used when a second current loop is added to force current sharing. Current sharing may be controlled either on an average basis or on a cycle-by-cycle basis. If average current sharing is used, then the bandwidth of the current control loop must be very low. As the current is adjusted by changing the duty cycle, it will take time for the inductor current to change. This delay makes average current sharing difficult to implement. The most likely way to ensure that average current sharing stable is to design the response of the current control loop to be very slow. This may not be desirable since during the occurrence of a current imbalance it will take many cycles for the control loop to correct the imbalance. On the other hand, peak current sharing can control the current sharing on a cycle-by-cycle basis. A system employing peak current sharing is easy to stabilize and can correct for unequal current sharing quickly.
FIG. 1A is a simplified block diagram of a dual phase buck regulator with constant ON-time control and active current sharing. The output capacitor (C) 102 is usually a network of many capacitors in parallel. The equivalent series resistance (ESR) represented by resistor ESR 101 is the effective series resistance of this capacitor network. ESR 101 is the real part of the complex impedance of the network of parallel capacitors making up C 102. Two sense resistors, R 137 and R 103, provide voltages VR2 127 and VR 1122 that are proportional to the current in inductors 117 and 104 in each phase, respectively. VR1 122 is the difference in potential between node 124 and Vout 130 and VR2 127 is the difference between node 131 and Vout 130. The four field effect transistors (FETs), FET 106, FET 107, FET 116, and FET 118 control the duty cycle of each phase. Diodes 105 and 115 are flyback diodes that insure the currents in the inductors 104 and 117, respectively, are not interrupted. The gate drivers 119 and 120 in phase drive circuits 180 and 181 interface with the control circuit 121 and provide the voltages needed to drive FETs 106, 107, 116 and 118. The control circuit 121 determines which of the two phases, 180 or 181, to turn ON when the output voltage (Vout) 130 falls below the reference voltage (Vref) 123. The output currents IL1 141 and 1L2 I42 combine to provide load current lout 160 to load 140.
FIG. 1B illustrates the timing of two converter phases 180 and 181. The two graphs in FIG. 1B show that by complementary switching the two converter phases 180 and 181, both the amplitudes of the output current ripple (Iout 160) relative to output currents IL1 141 and IL2 142 and output voltage ripple (Vout 130) relative to sense voltages VR1 127 and VR2 122 are cut in half and the ripple frequency is doubled.
FIG. 2 is a circuit diagram of an open loop constant ON-time buck controller for dual converters. The output 240 of the comparator 229 is coupled to an input of AND gates 230 and 231. The outputs 241 and 242 of flip flop (FF) 228 are coupled to the other inputs of AND gates 230 and 231 respectively. Outputs 241 and 242 alternately turn ON each converter phase (280 and 281) when Vout 250 drops below the reference voltage (Vref) 217. The pulse circuits 225 and 226 and OR gate 227 provide the clock to the FF 228. FF 228 is configured as a "D-type" FF that changes state on each positive clock edge (of its CLK input). Therefore, since each pulse from pulse circuits 225 and 226 are logic ORed in OR gate 227 to form clock 252, each pulse causes outputs 241 and 242 of FF 228 to switch states. When output 242 is logic one, AND gate 231 is enabled and latch 220 in the converter phase 281 is set when the output of comparator 229 (coupled to 240) transitions to logic one. When latch 220 is set, FET 218 turns ON (via gate drivers 219) charging inductor L 227 and providing current to Vout 250. Conversely, if output 241 is logic one, then AND gates 230 is enabled and latch 209 in converter phase 280 is set when the output of comparator 229 transitions to logic one turning ON FET 207 (via nate drivers 208) charging inductor L 204 and providing current to Vout 250. Latches 209 and 220 are reset by comparators 210 and 221 when the voltages on capacitors 211 and 222, respectively, exceed Vref 217. Capacitors 211 and 222 are discharged by FETs 212 and 224. Sense resistors 203 and 245 are used to sense the current in inductors 204 and 227, respectively. FETs 206 and 216 and diodes 205 and 225 insure the currents in the charging inductors are not interrupted. Capacitor 201 is the load filter capacitor and resistor 202 represents its ESR.
In both cases, the ON-time pulse commences by setting a latch 209 for converter phase 280 and latch 220 for converter phase 281. The latch 209 signals gate drivers 208 to turn high-side FET 207 ON and latch 220 signals gate drivers 219 to turn FET 218 ON. The timing circuits (outputs of comparators 210 and 221 respectively) reset each corresponding latch (latch 209 and latch 220, respectively) after a fixed ON-time. Resetting latch 209 turns high-side FET 207 OFF and resetting latch 220 turns FET 218 OFF. Depending on which phase is active, low-side FET 205 and FET 216 are turned ON when corresponding latches 209 and 220 are reset.
The constant ON-time timing circuits are set up so that the ON-time pulses HSON1 285 and HSON2 286 are proportional to the Vref 217 and inversely proportional to Vin 215. Thus, if Vin 215 increases, the current in through R 213 and R 223 will also increase. An increase in Vin 215 will cause capacitors C 211 and C 222 to charge faster resulting in a shorter ON-time. If the Vref 217 increases, C 211 and C 222 will have to charge to a higher voltage to switch comparators 210 and 221, respectively, resulting in longer ON-times. This constant ON-time circuit maintains a nearly constant frequency as Vin 215 and Vref 217 vary. However, circuit 200 does not have adequate performance because even small errors in the ON-time pulse width may result in very large current sharing errors. Because of the possible large current sharing errors, a current control loop (not shown) must be added to actively adjust the pulse width to minimize current sharing errors.
FIG. 3 is a circuit diagram of circuit 300 that has the function of a closed loop average current sharing constant ON-time buck converter. The output 340 of the comparator 329 is coupled to one input AND gates 330 and 331. The outputs of flip flop (FF) 328 are coupled to positive edge delay circuits 388 and 389. Positive edge delay circuits 388 and 389 delay the rising edges of outputs 341 and 342 which in turn alternately turn ON each converter phase when Vout 350 drops below the reference voltage (Vref) 317. Pulse circuit 325 receives ON-time pulse (HSON1 385) from latch 309. Pulse circuit 326 receives ON-time pulse (HSON2 386) from latch 320. HSON1 385 and HSON2 386 are logic ORed in OR gate 327 to provide the clock to the FF 328. FF 328 is configured as a "D-type" FF that changes state on each positive clock edge. Therefore, since each pulse from pulse circuits are logic ORed in OR gate 327 to form clock 352, each pulse causes the outputs of FF 328 to switch states. When output 341 is logic one, AND gate 330 is enabled and latch 320 in the converter phase 381 is set when the comparator 329 transitions to logic one. When latch 320 is set, FET 318 turns ON charging inductor L 327 and providing current to Vout 350. Conversely, if output 342 is logic one, then AND gate 331 is enabled and latch 309, in converter phase 380, is set when the output of comparator 329 transitions to logic one.
Diodes 306 and 325 insure the currents in inductors 304 and 327 are not interrupted during switching. Load filter capacitor 301 has ESR 302. Gate drivers 308 and 319 provide drive voltages to FETS 305, 307, 316 and 318. FETs 213 and 324 discharge capacitors 311 and 322 in response to reset signals from latches 309 and 320 generated when the voltages of capacitors 311 and 322 exceed Vref 317 and the outputs of comparators 310 and 321 transition to a logic one.
In both cases, the ON-time pulses commence by setting a latch 309 for converter phase 380 and latch 320 for converter phase 381. Latch 309 signals gate drivers 308 to turn high-side FET 307 ON and latch 320 signals gate drivers 319 to turn FET 318 ON in converter phase 381. The timing circuits (output of comparators 310 and 321) then reset each corresponding latch (latch 309 and latch 320, respectively) after a fixed ON-time. Resetting latch 309 turns high-side FET 307 OFF and resetting latch 320 turns FET 318 OFF . Depending on which phase is active, low-side FET 305 and low-side FET 316 are turned ON when corresponding latches 309 and 320 are reset.
If HSON1 385 transitions to logic one, then both inputs 341 and 342 of AND gate 330 are at logic one. The positive transition of HSON1 385 triggers pulse circuit 325, which clocks FF 328 so that its Q output transitions to logic zero thereby degating AND gate 330 thus removing the set input to latch 309. Since the Q output of FF 328 transitions to logic zero, its complementary output (input to positive edge delay circuit 389) transitions to logic one. Without the positive edge delay of Edge Dly 389, converter phase 381 would turn ON as soon as converter phase 380 turned ON and Vref 317 is greater than Vout 350. Edge Dly 388 and Edge Dly 389 guarantee that there will be a period of time when both phases cannot be ON concurrently whenever Vref 317 is greater than Vout 350
The constant ON-time circuit in converter phase 380 is configured such that the ON-time pulse (HSON1 385) is proportional to the Vref 317 and inversely proportional to Vin 315. Thus, if Vin 315 increases the current in through R 313 will also increase. An increase in Vin 315 will cause capacitor C 311 to charge the faster resulting in a shorter ON-time. If the Vref 317 increases, C 311 will have to charge to a higher voltage to switch comparators 310, resulting in a longer ON-time. This constant ON-time circuit maintains a nearly constant frequency as Vin 315 and Vref 317 vary. Converter phase 381 is designed to be a slave to converter phase 380 in that the voltage for charging C 322 to set its ON-time (HSON2 386) is no longer a function of Vin 315 but rather feedback voltage 354.
Transconductance amplifiers (GMA) 332 and GMA 334 each sense the voltage across their corresponding sense resistors R 303 and R 337. GMA 332 and GMA 334 generate currents IR 370 and IR 371, respectively. IR 370 flows through resistor R 336 generating voltage 373 and IR 371 flows through R 335 generating voltage (V) 372. V 372 and V 373 are proportional to the voltage drops across their corresponding sense resistors R 337 and R 303. GMA 333 converts the difference between V 372 and V 373 to a current IR 375, which produces a voltage at node 354 as current IR 375 is integrated by C 322. When FET 324 is turned OFF (HSON2 386 is logic one), C 322 charges to Vref 317 to switch comparator 321 and reset latch 320 terminating the ON-time pulse to converter phase 381.
R 336 is coupled to the negative input of GMA 333 and R 335 is coupled to the positive input of GMA 333. If the current through sense resistor R 303 (converter phase 380) is larger than the current through sense resistor R 337 (converter phase 381), then the feedback is such that current IR 375 decreases thus lengthening the ON-time for converter phase 381 and increasing the current from converter phase 381. The output current of GMA 333 determines the ON-time pulse width of converter phase 381. Thus, GMA 333 will trim the ON-time pulse width of converter phase 381 until its output current substantially matches the output current in converter phase 380. Since the current of GMA 333 is always positive, the current in sense resistor R 303 is always slightly larger (determined by the gain of GMA 333) than the current in sense resistor R 337. The drawback to this technique is that it is hard to stabilize. After an ON pulse is trimmed, the new steady state current will be delayed for several switching cycles. The bandwidth of GMA 333 must be very low or the system may oscillate. Furthermore, since GMA 333 must have a very low bandwidth, it will take many switching cycles for this system to correct for current sharing errors.
Therefore, a need for control circuitry for a multiphase constant ON-time buck controller that insures current matching between the converter phases with small current sharing errors and fast response time to load changes.

Peak current sharing in a multi-phase buck converter power system


Systems and methods for analyzing the risk associated with lenders offering vehicle loans is determined based on historical data associated with the vehicle. Vehicle registration data for a region is accessed to determine the vehicles registered in the region and the lien holders of the vehicles. Historical data of the vehicles is accessed and analyzed to determine if any events adversely affecting the value of the vehicles, such as vehicle title brands, are associated with the vehicles. The vehicle history data is associated with the lien holders of the vehicles. A risk value may be determined for each lien holder by comparing the lien holder's total number of liens to those liens on vehicles associated with history events adversely affecting the value of the vehicle.

1. Field of the Disclosure
This disclosure relates to systems and methods for analyzing risk associated with lenders offering loans for automobiles.
2. Background of the Disclosure
Most consumers wishing to purchase a new vehicle, such as an automobile, do not have adequate cash to purchase the vehicle. As a result, consumers often need to finance their vehicles by taking out a loan. Some consumers borrow directly from a bank, while other consumers may borrow from the entity selling the vehicle, such as a car dealership. Car dealerships may not only offer loans as a service to their customers, but also as an additional means to generate profit from the sale of vehicles by charging interest on the loan. Some car dealerships, however, may not have adequate cash to provide funding for all of their customers. As a result, some car dealerships borrow money from a bank or financial institution in order to finance loans to customers to buy vehicles. In such scenarios, the bank or financial institution may be considered a direct lender, while the car dealership may be considered an indirect lender.
When vehicles are purchased with financing, the purchased vehicle acts as part of the collateral for the loan. As such, the value of the vehicle is linked to the risk associated with lending money for the purchase of the vehicle. Direct and indirect lenders of funds might mitigate some of this risk by adjusting the interest rate offered on the vehicle loan. For example, the interest rate on a new vehicle may be lower than that of a pre-owned vehicle, or the interest rate on a loan for a luxury brand of car may be lower than the interest rate for a loan on a non-luxury brand of car, because the luxury brand may retain its value better. Indirect lenders may manage this risk on a sale-by-sale basis since they may adjust the interest rates for each sale individually. A direct lender, however can only manage the risk associated with the dealings involving the indirect lender, not the risk associated with the individual sale. Accordingly, direct lenders may evaluate the business practices of the indirect lender in order to assess risk. For example, the direct lender might charge a car dealer only selling new cars less interest than a car dealer only selling pre-owned cars. Alternatively, a direct lender might charge less interest to a car dealer specializing in luxury brands than a car dealer specializing in non-luxury brands.
While most new cars of the same make, model, and sub-model carry approximately the same value, the value of pre-owned cars can vary greatly within the same class. For example, wear, mileage, geography and maintenance history may all affect the value of a pre-owned car in addition to the make, model and sub-model of the vehicle. Furthermore, pre-owned cars may have been subject to events that significantly impact the value of the car in a negative way. In some jurisdictions, these events result in a "brand" being placed on the title of the vehicle. A brand is a permanent designation on the title of the vehicle indicating that an event occurred to the vehicle that may negatively impact the value of the vehicle. For example, if a vehicle received flood damage, it may be branded, or, if a vehicle was involved in an accident and declared a total loss (i.e., the cost to repair the vehicle exceeds the value of the vehicle), the title of the vehicle may receive a brand. Vehicle title branding exists, in part, to notify later purchasers of the vehicle of an event negatively impacting the value of the vehicle because in many cases, repair may make the event less noticeable or undetectable.
Direct lenders often rely upon the indirect lenders to which they lend money to ensure the vehicles they finance are free from title brands, defects or other adverse historical events that would significantly, and negatively, impact the value of the vehicles. While direct lenders may be able to analyze the business practices of the indirect lenders in their portfolio at a macro level, it may be difficult to ensure that the indirect lenders are following the best practices of their industry, or the best practices of their business model. For example, while an indirect lender may represent to a direct lender that they will only finance pre-owned cars free of title brands, the direct lender has no way of verifying that the indirect lender is not providing loans for vehicles with title brands or adverse history events. Thus, direct lenders are limited in their means for assessing the risk of their indirect lenders.

Systems and methods for analyzing lender risk using vehicle historical data


A non-mechanical ascent rate indicator for use in saltwater scuba diving. A high density sphere attached by means of a ball chain tether to the gauge, or hose, of a scuba diver has a free rate of ascent of less than 60 feet/minute, the difference in this rate and that of the diver will be shown by the amount to free loop in the tether as it is observed on a horizontal plane even to the diver's eyes. A safe ascent rate will provide a loop of approximately 1 to 11/2 inch.

1. Field of the Invention
Decompression sickness, or "the bends" caused by increased environmental pressure is commonly seen in divers using scuba (self-contained underwater breathing apparatus).
Divers using scuba gear must control their rate of ascent towards the surface to avoid the bends. A device to indicate the rate of ascent is needed, the instant invention discloses a simple device that indicates the rate of a diver's ascent.
2. Description of the Related Art
U.S. Pat. No. 3,121,333 issued to Alinari in 1964 describes an indicating instrument for divers that accurately indicates the decompression stoppages as a function of the immersion accomplished. The instrument comprises a bellows subject to the hydrostatic pressure from the liquid in which it is immersed coupled to a pressure gage for measuring the instantaneous pressure. U.S. Pat. No. 4,820,953 issued to Sauballe et al in 1989, describes a rate of ascent monitor for divers that uses a sound transducer with velocity characteristics to sense a rate of pressure changes.


A method of extracting phytochemical products from sorghum is achieved by treating a sorghum bran material composed of removed outer portions of whole sorghum seeds. The removed outer portions constitute those portions of the outer 40% or less by weight of the whole sorghum seeds. By utilizing different treatment techniques, phytochemical products of fats and oils, pigments, waxes, and antioxidants can be obtained from the sorghum material.

Phytochemicals are chemical elements and compounds that are produced naturally within plants. As such, phytochemicals are deposited in various combinations and amounts within the different anatomical components of the plant, including roots, stalks, stems, leaves, seeds, and the fruit of the plant. Certain phytochemicals are considered responsible for basic physical characteristic properties of the host plant, including its color, odor, taste, texture, etc. Phytochemicals may also determine the nutritive and pharmacological properties of the plant. For centuries, specific phytochemical substances have been utilized in medical applications, either as processed plant components or extractions of plant components, without a full understanding or knowledge of the active chemical compounds.
Sorghum is a domesticated plant well known to man. It has been hybridized since early Egyptian times and is highly diversified in its varieties. As used herein, the terms "sorghum" and "milo" may be used interchangeably. In the United States, varieties of sorghum have few uses other than for animal feed or as a less expensive feed grain substitute for corn or wheat. In other parts of the world, particularly Africa and Asia, sorghum is used for flour and human food.
There are four major chemical classifications of phytochemical substances that have been found in sorghum plant components. These include 1) fats and oils, 2) pigments, 3) waxes, and 4) antioxidants. Each of these components may be useful and have significant value if removed or separated from the sorghum plant, as well as other non-sorghum plants.
One of the commercial applications for sorghum is its use as an extruded matrix product that may be used for various purposes. These may include uses as a construction component, an insulation material, or a packing material. In such extrusion, the sorghum seeds or berries must first be milled or processed to remove the hull and outermost seed layer from the seeds so that only the interior of the seed is used in forming the extrudable sorghum resin. The removed hull and outermost seed layer from the milling process, which may be in the form of a powder called "bran", is typically a waste product heretofore having low or little value and may be used for such purposes as feed for livestock.
Because the removed bran, consisting of the hull and outermost seed layer, may contain significant amounts of the phytochemicals discussed above, methods for removing or separating these compounds from the bran can significantly increase its value. Accordingly, the present invention is directed to such methods.

Methods of extracting phytochemicals from sorghum bran


A catheter device for therapeutic and diagnostic use within a human vascular system has a catheter body with a hub located at a proximal end of the catheter body, and a tip located at a distal end of the body. A guide structure is connected to the catheter body proximate the tip, with the guide structure having a wing shape that provides hemodynamic lift in response to laminar blood flow around the catheter. The wing shape of the guide structure tapers down from a leading edge to a trailing edge, with the leading edge facing the catheter tip so that when the catheter is positioned inside a vessel wall of the vascular system and oriented in a downstream direction, the lift created by the laminar blood flow biases the catheter tip toward the vessel wall. Preferably, the distal end of the catheter body comprises a flexible material so that the catheter tip can deflect laterally towards the vessel wall in response to the hemodynamic lift. An intermediate section of the catheter body between the hub and the tip provides a semi-rigid control connection whereby pushing, pulling, and rotation of the hub produces a corresponding movement of the catheter tip.

A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the U.S. Patent and Trademark office patent file or records, but otherwise reserves all copyright rights whatsoever.
The present invention concerns the use of catheters in the field of interventional neuroradiology. In particular, this invention pertains to microcatheters provided with auxiliary guide structures to permit safe navigation of the catheter within the intracranial vessels for embolization of high flow vascular lesions.
Microcatheter technology has advanced from the 1980""s to the point that a microcatheter is now commonly used in the treatment of vascular lesions of the central nervous system. Microcatheters are low profile catheters used to treat strokes, cerebral aneurysms, fistulas, arterial venous malformations, and other areas by occluding the pathologic vascular abnormality through an endovascular approach utilizing selective deposition of coils, particles, balloons, or liquid adhesives. Such microcatheters can also be used in other areas of the body.
In these delicate procedures, a major difficulty involves steering the catheter through the tortuous bifurcations of the cerebral arteries to navigate it to the site of treatment. Catheter steering difficulties often add hours of time and complications to the procedure making it impractical to treat some areas of the brain. The ability to steer the catheter precisely and quickly is essential for effective catheterizations with minimal risks.
Endovascular treatment of cerebral vascular lesions employs one of two classes of microcatheter, either a flow directed microcatheter or a guidewire directed microcatheter. Flow directed microcatheters typically have a curve steamed in the tip of the microcatheter and are advanced through the vessel based on the amount of blood flow, assisted by externally advancing the catheter, sometimes from a small guidewire. In some cerebral vascular pathologies, a flow directed microcatheter is unable to reach its target, particularly in those areas with slower flow. A guidewire directed microcatheter, on the other hand, is advanced based on catheterization using a micro-guidewire and pushing the catheter distally. This increases the risk of vessel perforation by the guidewire and is often limited by an inability to push the catheter around numerous turns.
As used in the prior art, a guide catheter is first advanced from the femoral artery by a percutaneous method, terminating in a carotid or vertebral artery. A microcatheter is then advanced through the guide catheter into the cervical and cerebral vasculature. The placement of such a microcatheter is accomplished either by use of a guidewire or by taking advantage of hemodynamics. Each of these conventional methodologies has drawbacks. The guidewire directed microcatheter risks puncturing a vessel or aneurysm with significant hemorrhagic consequences intracranially. The flow directed microcatheter frequently lacks control directionality. New guidewires may now be used with flow directed microcatheters, however, this reintroduces the risks associated with the use of a guidewire and also raises the possibility of puncturing the wall of the flow directed soft microcatheter. Delivery of the greatest variety of embolic agents is usually possible only through a guidewire directed catheter. A more limited selection of embolization materials can be delivered through a flow directed microcatheter due to its suppleness.
What is needed, then, is a microcatheter than can be quickly and precisely guided through the vascular system for treatment of cerebral vascular lesions, with a reduced risk of vessel perforation.
The microcatheter of the present invention combines a catheter body with a hemodynamic guide structure attached to the catheter body proximal to its distal orifice. The guide structure is wing-shaped to take advantage of Bernoulli""s principal and the kinetic energy of laminar blood flow around the catheter. The wing provides hemodynamic lift to move the catheter tip toward vessel walls and into a vessel bifurcation branch.
The wing-shaped guide structure generates lift from hemodynamic flow similar to that commonly employed by wings on conventional aircraft. This lift can be used to direct the tip of the microcatheter into a branch of a primary or parent vessel, including one that has an acute reverse orientation. By controlling the proximal external hub portion of the catheter, the wing can be oriented to course along the desired wall of the catheterized vessel until the orifice of the branching vessel is located, thereby permitting the catheter to be further advanced into the branching vessel. The catheter of this invention permits rapid and safe catheterization of cerebral vessels without the use of a guidewire and without tip stem curvature. Multiple embolic agents can be used with the catheter and it is particularly well suited for the use of liquid adhesives. It can be employed in highflow vessels, and the microcatheter is also functional in cerebral vessels of normal flow.
The size of the wing-shaped. guide structure is operational on the scale commonly encountered in cerebral microcatheters. It has particular applicability in the treatment of cerebral arterial venous malformations, especially using liquid adhesives.
Thus, the present invention provides a catheter device for therapeutic and diagnostic use within a human vascular system. The catheter has a cylindrical catheter body formed around a lumen, with a hub located at a proximal end of the catheter body, and a tip located at a distal end of the body. A guide structure is connected to the catheter body proximate the tip, with the guide structure having a wing shape that provides hemodynamic lift in response to laminar blood flow around the catheter. The wing shape of the guide structure tapers down from a leading edge to a trailing edge, with the leading edge facing the catheter tip so that when the catheter is positioned inside a vessel wall of the vascular system and oriented in a downstream direction, the lift created by the laminar blood flow biases the catheter tip toward the vessel wall. Preferably, the distal end of the catheter body comprises a flexible material so that the catheter tip can deflect and move towards the vessel wall in response to the hemodynamic lift. An intermediate section of the catheter body between the hub and the tip provides a semi-rigid control connection whereby pushing, pulling, and rotation of the hub produces a corresponding movement of the catheter tip.

Microcatheter with hemodynamic guide structure


Various aspects are disclosed for distributed application management using an embedded persistent queue framework. In some aspects, task execution data is monitored from a plurality of task execution engines. A task request is identified. The task request can include a task and a Boolean predicate for task assignment. The task is assigned to a task execution engine embedded in a distributed application process if the Boolean predicate is true, and a capacity of the task execution engine is sufficient to execute the task. The task is enqueued in a persistent queue. The task is retrieved from the persistent queue and executed.

Enterprises can develop distributed applications that perform a task or service for enterprise users or enterprise customers. The enterprises can provide access to distributed applications that are hosted on data centers. Distributed applications achieve scale and availability goals by sharing their workload across the processes for those applications. Data centers include various physical and virtual components that can host applications and web services, cloud computing environments, virtualization environments, as well as other computing systems. For instance, computer virtualization relates to the creation of a virtualized version of a physical device, such as a server, a storage device, a central processing unit (CPU), a graphics processing unit (GPU), or other computing resources. Operating or managing a data center can involve maintaining hundreds to thousands of virtual machines as well as the hardware of host machines, which include CPUs, GPUs, and other physical hardware.
Some systems distribute tasks by dividing sets of hardware or domain entities within a management plane, and divvying tasks to managers for each entity. This can unduly imbalance tasks across the datacenter and can be sensitive to perturbations in a cluster membership. In addition, existing methods of task distribution fail to consider other tasks for the distributed applications that are executing or have executed within the datacenter. As a result, there is a need for more effective task distribution for distributed applications.


A detection unit 4 with detection means 3 and fluid inflow/outflow guide means 2 is connected to a passage 1 for fluid with conductive material or to a pool section 5 for pooling of the fluid. The detection unit 4 guides inflow and outflow of the fluid through the fluid inflow/outflow guide means 2 and detects a concentration of conductive material through the detection means 4. A concentration of conductive material in the fluid is continuously measured with high accuracy.

In an engine or other prime mover with a piston or other reciprocating part, for example, the piston and a cylinder may wear due to sliding motions between them, resulting in production of iron powder or other magnetic material which is entrained in drain oil from the engine flowing through a passage. Thus, it is required to measure a concentration of the magnetic material contained in order to accurately grasp worn degree of the equipment.
Generally, in order to grasp the worn degree of the equipment, lubricant or drain oil is manually sampled to measure a concentration of magnetic material; alternatively, a magnetic material concentration measuring device is arranged adjacent to the passage for the lubricant or drain oil to measure the concentration of magnetic material.
A magnetic material concentration measuring device comprises, for example, an observational LC oscillation circuits with a first coil adjacent to a passage for drain oil and a corrective LC oscillation circuit with a second coil arranged in a position not affected by the magnetic material in the drain oil, the concentration of the magnetic material being detected on the basis of difference in oscillating frequency between the LC oscillation circuits (see, for example, Patent Literature 1). Another example comprises magnetic-field applying means and magnetic measuring means with a magnetic sensor in the form of a superconducting quantum interference device both arranged adjacent to a passage for drain oil so as to detect only magnetic fields of magnetized components, which has been disclosed for example in the latter:    [Patent Literature 1] JP 2005-83897A    [Patent Literature 2] JP 10-268013A

Conductive material concentration measuring device and magnetic material concentration measuring device


A microelectronic device comprises local digit line structures, global digit line structures, source line structures, sense transistors, read transistors, and write transistors. The local digit line structures are coupled to strings of memory cells. The global digit line structures overlie the local digit line structures. The source line structures are interposed between the local digit line structures and the global digit line structures. The sense transistors are interposed between the source line structures and the global digit line structures, and are coupled to the local digit line structures and the source line structures. The read transistors are interposed between and are coupled to the sense transistors and the global digit line structures. The write transistors are interposed between and are coupled to the global digit line structures and the local digit line structures. Additional microelectronic devices, memory devices, and electronic systems are also described.

Microelectronic device designers often desire to increase the level of integration or density of features within a microelectronic device by reducing the dimensions of the individual features and by reducing the separation distance between neighboring features. In addition, microelectronic device designers often desire to design architectures that are not only compact, but offer performance advantages, as well as simplified, easier and less expensive to fabricate designs.
One example of a microelectronic device is a memory device. Memory devices are generally provided as internal integrated circuits in computers or other electronic devices. There are many types of memory devices including, but not limited to, non-volatile memory devices (e.g., NAND Flash memory devices). One way of increasing memory density in non-volatile memory devices is to utilize vertical memory array (also referred to as a "three-dimensional (3D) memory array") architectures. A conventional vertical memory array includes strings of memory cells vertically extending through a stack structure including tiers of conductive structures and insulative materials. Each string of memory cells may include at least one select device coupled in series to a serial combination of vertically stacked memory cells. Such a configuration permits a greater number of switching devices (e.g., transistors) to be located in a unit of die area (e.g., length and width of active surface consumed) by building the array upwards (e.g., vertically) on a die, as compared to structures with conventional planar (e.g., two-dimensional (2D)) arrangements of transistors.
In a conventional non-volatile memory device (e.g., a conventional 3D NAND Flash memory device) including a vertical memory array, digit lines (e.g., bit lines, data lines) are coupled to the strings of memory cells of the vertical memory array, and openings are provided next to edges of the vertical memory array to accommodate digit line contacts for each of the digit lines. The digit line contacts electrically connect the digit lines to logic circuitry to facilitate operations (e.g., read operations, program operations, erase operations) on the strings of memory cells of the vertical memory array. However, conventional configurations of digit lines and logic circuitry can hamper improvements in the performance (e.g., data transfer rates, power consumption) of the non-volatile memory device, and/or can impede reductions to the sizes (e.g., horizontal footprints) of features of the non-volatile memory device.

Microelectronic devices, and related memory devices and electronic systems


In accordance with the present invention, there are provided in vivo methods for the reduction of cyanide levels. The present invention employs a scavenging approach whereby cyanide is bound in vivo to a suitable scavenger. The resulting complex renders the cyanide harmless, and is eventually excreted in the urine of the host. Further in accordance with the present invention, there are provided compositions and formulations useful for carrying out the above-described methods.

Cyanide (CN), a fast acting toxic compound, is frequently used in suicides, homicide, and chemical warfare (see, for example, Salkowski et al., in Vet. Hum. Toxicol. 36:455-466 (1994) and Borowitz et al., in B. Somani (Ed.), Chemical Warfare Agents, Academic Press, New York, pp.209-236 (1992)). Cyanide toxicity can arise from a variety of sources, e.g., from inhalation of smoke produced by the pyrolysis of plastics or nitrile-based polymer fibers, materials that are commonly used in construction and for furniture manufacture. Cyanide toxicity can also occur from ingestion of plant extracts containing cyanogenic glycosides (such as cassava), or from inhalation of airborne vapors encountered in industrial or occupational settings (for example, during electroplating). Clinically, the release of cyanide from sodium nitroprusside (see, for example, Vessy and Cole, in Br. J. Anaesth. 57:148-155 (1985)) and laetrile (see, for example, Sadoff et al., in J. Am. Med. Assoc. 239:1532 (1978)) can create a life-threatening situation.
Acute cyanide poisoning of mammals is characterized by convulsion, uncoordinated movement, decreased motor activity, coma and respiratory arrest, symptoms indicating that the brain is one major target site for cyanide. This type of neurotoxicity is now known to be caused by cyanide-induced depletion of dopamine (see, for example, Kanthasamy et al., in Toxicol. App. Pharmacol. 126:156-163 (1994)) and by an increase in calcium in the brain (see, for example, Yamamoto, in Toxicol. 61:221-228 (1990)). The systemic toxic effect of cyanide has been attributed mainly to its binding to the ferric iron in cytochrome c oxidase, the terminal oxidase enzyme of the mitochondrial respiratory chain. The reaction forms a stable but reversible complex and subsequently disrupts cellular energy production. The reduction of cellular oxygen consumption results in an increase in venous oxygen partial pressure (PO.sub.2).
The classic antidotal action for cyanide poisoning, introduced by Chen et al. in 1933 (see, for example, Chen et al., Proc. Soc. Exp. Biol. Med. 31:250-252 (1933)), involves inhalation of amyl nitrite, followed by intravenous injection of sodium nitrite and sodium thiosulfate. This procedure is still used clinically worldwide, including the United States (see, for example, Dreisbach, in Handbook of poisoning: Diagnosis and treatment, 12th edn., Lange Med. Publications., Los Altos, Calif., p.251 (1987)). In essence, in this method, oxyhemoglobin in red blood cells in the circulation is converted into methemoglobin by chemical reaction with nitrites. Methemoglobin then binds cyanide, thereby removing it from the circulation. Sodium thiosulfate is used as a sulfur donor to allow the formation of thiocyanate, through the reaction catalyzed by rhodanese enzyme (see, for example, Baskin et al., in J. Clin. Pharmacol. 32:368-375 (1992)).
There are, however, major drawbacks of the nitrite/sodium thiosulfate method. For example, the rate of methemoglobin formation is quite slow, taking up to 20 minutes to produce sufficient amounts of methemoglobin. Moreover, the formation of methemoglobin compromises the oxygen-carrying capacity of red blood cells. This is particularly undesirable for victims of smoke inhalation, as adequate ventilation and blood oxygenation are particularly crucial for survival in such situations. Furthermore, hypotension induced by the treatment (i.e., nitrite-induced hypotension) can be life-threatening.
In addition to nitrites, a variety of chemical agents have been used to induce methemoglobinemia as a treatment for cyanide poisoning. These include primaquine phosphate, 6-methoxy-8- (6-diethylamino-hexylamino) lepidine dihydrochloride, p-aminooctoyl-phenone, p-aminopropiophenone, hydroxylamine, 4-dimethylaminophenol, and the like (see, for example, Scharf et al., in Gen. Pharmacol. 23:19-25 (1992)). Although the rates of methemoglobin formation induced by these agents are faster than those produced by nitrites, the same problems as described above are common to all methemoglobin formers.
Recently, hydroxocabalamin, vitamin B.sub.12, has been shown to be effective in the treatment of cyanide poisoning in smoke inhalation (see, for example, Houeto et al., in Lancet 346:605-608 (1995)). Hydroxocabalamin is a cobalt-containing compound for which only minute amounts are needed physiologically. Clinical use of hydroxocabalamin for the treatment of cyanide poisoning, however, requires the use of 5 grams per patient. Such high levels of hydroxocabalamin are not only expensive but also potentially toxic because extremely high circulatory levels of cobalt are produced.
Nitroprusside (SNP for sodium nitroprusside) is widely used as a source of nitric oxide for the treatment of severe hypertension, induction of arterial hypotension during surgery, the reduction of after-load after myocardial infarction and during severe congestive heart failure (see, for example, Rokonen et al., in Crit. Care Med. 21:1304-1311 (1993) and Sellke et al., in Circulation 88:II395-II400 (1993)). A nitroprusside molecule (NaFe(CN).sub.5 NO.2H.sub.2 O) contains one nitric oxide and five cyanide groups. Upon intravenous infusion, nitroprusside is known to be metabolized through one-electron reduction to release nitric oxide, a potent vasodilator, which exerts the desired antihypertensive effect (see, for example, Bates et al., in Biochem. Pharmacol. 42:S157-S165 (1991) and Kowaluk et al., in J. Pharm. Exp. Therap. 262:916-922 (1992)). Unfortunately, however, upon release of nitric oxide, SNP further decomposes to release five cyanide groups which can produce life-threatening cyanide poisoning in patients. This high level of cyanide release occurs very commonly in high dose or prolonged therapy with nitroprusside.
Current clinical treatment of nitroprusside-induced cyanide toxicity is, unfortunately, limited to the use of amyl nitrite and sodium nitrite (for the conversion of hemoglobin to methemoglobin) or vitamin B.sub.12. The many drawbacks of using these agents have been set forth above.
Accordingly, there is still a clear need in the art to develop effective, rapid acting, non-toxic antidotes for cyanide poisoning.

Methods for in vivo reduction of cyanide levels and compositions useful therefor


The invention describes an optical deflection element for the refractive production of a spatially structured bundle of light beams fanned concentrically to an optical axis of the deflection element. The optical deflection element has a base body made of optically transparent material, and has a light input and output side. The light input side is configured such that a primary bundle of light beams can be coupled in the base body. The light output side has a cylindrically symmetrical contour, which defines a recess in the base body. The fanning of the primary bundle of light beams is achieved by refraction on rotationally symmetric interfaces, which are variably inclined relative to the optical axis. The invention further relates to an optical measuring device for the three-dimensional measurement of a cavity in an object and a method for producing a concentrically fanned, spatially structured bundle of light beams.

The surface structure of at least approximately tubular inner surfaces of a cavity can be captured three-dimensionally by means of optical triangulation. In this process a spatially structured illumination pattern is projected onto the inner surface of the respective cavity to be captured and the scene is captured digitally by means of a camera system. By measuring the distortion of the illumination pattern projected onto the inner wall as a result of the surface shape, which can be done automatically using known image processing methods, it is possible to calculate a digital model, which maps the shape of the cavity. Deviations and/or distortions of the captured projected lines from the known, initially symmetrical circular shapes that were concentric to an optical axis are captured in this process.
Such a cavity measurement by means of optical triangulation can advantageously be used when measuring or profiling the human auditory canal. The anatomy of the auditory canal means that an optical measuring device must be provided, which cannot exceed a maximum diameter of 4 mm. This basic condition applies to the entire object-side optical system of such a measuring device, said optical system having to be inserted into the auditory canal. The object-side optical system here comprises at least a camera system and an optical element for producing the structured illumination. The camera system and the optical element are disposed concentrically to a common optical axis of the optical measuring device here.
It is known that diffractive optical elements can be used to produce structured illumination. In particular (binary) phase gratings, also known as so-called Dammann gratings, can distribute the incident intensity of a primary light beam bundle selectively and in some instances largely uniformly to specific orders of diffraction due to a particularly advantageous substructure.
A so-called circular Dammann grating for producing a structured illumination pattern from concentric rings is known from the publication "Changhe Zhou, Jia Jia, Liren Liu; Circular Dammann Grating; Optics Letters, Vol. 28, No. 22, 2003, pages 2174-2176". However this has the disadvantage that it is difficult to achieve larger deflection angles in relation to the optical axis of the circular phase grating. It is true that larger deflection angles would in principle be possible using extremely small phase grating structures in the region of 150 mm but such small phase grating structures are technologically extremely difficult to produce. To produce such fine gratings, etching processes are needed which require much finer structuring than the etching processes currently used with a best resolution of 400 nm.

Refractive production of a concentrically fanned structured bundle of light beams, optical, measuring device with refractive defection element


A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.

As high performance computing ("HPC") systems have gotten more powerful, they have been increasingly used for computations based on rigidly defined mathematical models. For example, a weather simulation may be based on a series of equations having an exact mathematical representation, as might a finite element analysis for determining heat flow around the leading edge of an airplane wing or stresses in a bar of steel. These simulations generate synthetic data; that is, data based not on reality, but based on the mathematical model of reality used to define the bounds of the simulation. The worth of such models may be judged by how closely their computed results are demonstrated in reality (e.g., by observing the weather, or building an airplane wing or a bar of steel and testing it in a laboratory).
However, such models generally are incapable of processing data that derive from real measurement instruments (e.g. anemometers, thermometers, torsion gauges and the like). As these instruments have developed in complexity and efficiency, the amount of data that they generate has multiplied greatly. The size and location of these volumes of data as they are being generated are going to stress global infrastructures, and the cost of simply moving or storing data will become a significant issue in the future. More "real world" data than ever before are available for analysis in the development of scientific models, and as technology improves the quantity of data surely will continue to increase. Real data are more useful to analyze than simulated or synthetic data, but the HPC systems of today are largely optimized for heavy computation, and are not capable of quickly accessing the vast amounts of real data that measurement instruments can generate.
Some leading-edge measurement instruments like the Square Kilometer Array telescope will be able to produce raw data at speeds of up to 1000 petabytes (1 billion gigabytes) per day. This data must be sorted, filtered, and analyzed. While it is conceptually possible to filter these data to only 0.1% of their raw size (i.e., to 1 petabyte per day) for analysis, remote processing still is likely to be problematic. One petabyte per day is about 12.13 gigabytes per second on average (more during bursts), a channel capacity that is greater than long-haul systems like the Internet can handle. Because the data cannot be sent elsewhere for processing, rapid local access to bulk data is therefore needed in HPC systems.

Populating localized fast bulk storage in a multi-node computer system


The invention hereindescribed relates to a form of cancer therapy which exploits the cytotoxic properties of acetaminophen when converted to NABQI by the metabolic activity of tumour cell specific P450; vectors for use in the delivery of P450 to tumour cells; and therapeutic compositions comprising said vectors.

Current therapies to treat cancer involve, amongst other things, radiation therapy and chemotherapy each of which, although effective at retarding the growth of cancer cells, have significant disadvantages since each treatment is typically selective for cells that are actively dividing. Consequently, normal dividing cells are also destroyed resulting in significant undesirable side effects, such as nausea and immunosupression, the latter of which can lead to complications of secondary infections. In recent years research has focussed on providing selective treatments which lessen these undesirable side effects. One such therapy is GDEPT 1,2.
GDEPT is of particular interest with respect to the treatment of cancer in that it offers advantages over conventional chemotherapeutic methods of cancer treatment. In such conventional methods the drugs administered to the patient attack not only the targeted cancer cells but also normal cells. Destruction of cancer cells is achieved at the expense of inflicting damage on normal cells, creating serious side-effects. In treatment of cancer by GDEPT the objective is to create an anti-cancer drug in situ within the cancer cell while creating little or none in normal cells, thereby attacking the cancer cells while leaving the normal cells substantially unaffected. This is typically achieved by administration to the patient of a vector containing a gene for an enzyme which can convert a relatively non-toxic substance (commonly referred to as a prodrug) into a cytotoxic agent. The vector also contains a promoter, ie a DNA sequence constituting a switch for the gene, this promoter being responsive to a regulatory protein found solely in the cancer cells or to a greater extent in the cancer cells than in normal cells. The gene is thus expressed substantially in the cancer cells so it is only (or mainly) in the cancer cells that the enzyme is produced and that conversion of the prodrug to the cytotoxic agent takes place. Formation of the cytotoxic agent therefore takes place primarily in the cancer cells. In this way the cancer cells are selectively attacked, with relatively little damage to normal cells.
In one example of the use of GDEPT in cancer treatment, the prodrug is 5-fluoro-cytosine (5-FC). 5-FC is itself relatively non-toxic to human cells but can be converted into a potent anti-cancer drug, 5-fluorouracil (5-FU), by the enzyme cytosine deaminase. A bacterial gene which expresses cytosine deaminase is incorporated in a viral vector in association with a promoter which is responsive to a regulatory protein that is characteristic of the particular type of cancer cell under attack. For instance, in treating breast cancer the promoter could be one which is responsive to the regulatory protein EBB2 or in treating liver cancer one which is responsive to α-fetoprotein.
In known GDEPT techniques, difficulty has been encountered in achieving as high a degree of selectivity as is desirable, (ie in destroying cancer cells while limiting the damage to normal cells). This is at least partly due to the fact that normal cells may come under attack from cytotoxic agents which have been formed in the cancer cells but have found their way out of those cells, for example when the cells break down under the cytotoxic action of the drug.
In addition, some chemotherapeutic agents are selective for particular cell-cycle phases (eg G1, S, G2 or mitosis). It is desirable to provide chemotherapeutic agents that are not so restricted in their effects and can kill cells irrespective of the cell-cycle stage.

P450/acetaminophen genetically directed enzyme prodrug therapy (GDEPT)


A backlight unit includes a power supply converter including a primary winding connected to an input power supply voltage, and a secondary winding which is connected to an output node and outputs a light emitting diode drive voltage to the output node in response to a mode signal and a switching control signal; and a light emitting diode string connected to the output node of the power supply converter, where the power supply converter serially connects a boosting winding to the secondary winding and the output node and when the mode signal represents a three dimensional image display mode, and outputs a boosted light emitting diode drive voltage to the output node through the boosting winding.

1. Field
Exemplary embodiments of the invention relate to a backlight unit and a display device including the backlight unit.
2. Description of the Related Art
A conventional display device displays a two dimensional flat image. As a demand for three-dimensional ("3D") image increases in various fields such as a movie, a medical image, a game, an advertisement, an education, military, etc., a 3D image display device has been developed.
A three-dimensional display device displays a 3D image using a principle of binocular parallax through the eyes of a viewer. For example, since the eyes of the viewer are spaced a predetermined distance apart from each other, images observed by each eye from different angles are input to the brain of the viewer. A 3D image device allows the viewer to perceive a 3D effect and to sense a depth through the process described above.
A 3D display device may be classified into a stereoscopic type 3D display device and an auto-stereoscopic type 3D display device according to whether a viewer wears on special glasses or not to perceive the 3D effect. The steroscopic type 3D display device typically uses a polarizing method and a shutter glass method, and the auto-steroscopic type 3D display device typically uses a parallax barrier method and a lenticular method.
In the shutter method, when a left-eye image and a right-eye image are displayed on a display panel by a frame unit, a 3D image is realized by alternately opening and closing a left shutter and a right shutter of the shutter glasses in synchronization with the frame unit. In a 3D image display device including a liquid crystal display device, when a right-eye image is displayed during a right eye section after a left-eye image is displayed during a left eye section, the left-eye image may affect the right-eye image due to a slow response speed of the liquid crystal such that an image quality may be deteriorated. The deterioration of image quality may be effectively prevented by periodically turning a backlight unit of the liquid crystal display device on and off. That is, after turning a backlight unit off after a left-eye image is displayed on a display panel, the backlight unit is turned on again when a right-eye image is displayed in the display panel.

Backlight unit and display device including the same


The piezoelectric-acoustic transducer of the present invention has a hollow case provided with a sound hole. A piezoelectric actuator is disposed inside this case that has one end fixed to the case and that bends in the direction of the thickness of the case when voltage is applied. A diaphragm is secured to one portion of the piezoelectric actuator and is positioned at a distance from the piezoelectric acturator in the direction of the thickness of the case.

1. Field of the Invention
The present invention relates to a piezoelectric-acoustic transducer, and particularly to a piezoelectric-acoustic transducer used with the object of reducing both costs and power consumption, such as in piezoelectric receivers, piezoelectric speakers, and piezoelectric sounders.
2. Description of the Related Art
Piezoelectric-acoustic transducers are widely used as devices for converting electrical signals to acoustic signals because they enable low power consumption and compact size.
FIG. 1(a) is a sectional view of a piezoelectric-acoustic transducer of the prior art, and FIG. 1(b) is a plan view of the interior of this device. In FIGS. 1(a) and 1(b), diaphragm 102 is supported and secured around the entire circumference of its outer edge inside the unit case 101. Piezoelectric ceramic 107 is attached to the surface of diaphragm 102. By applying voltage to piezoelectric ceramic 107, piezoelectric ceramic 107 bends according to the direction of the applied voltage, bending in an upward direction as shown in FIG. 2(a) or bending in a downward direction as shown in FIG. 2(b), and sound pressure is in turn generated by the bending of diaphragm 102 that occurs with this bending. Materials that may be employed for this diaphragm 102 are limited by the relation between piezoelectric ceramic 107 and thermal expansion coefficients.
With this type of piezoelectric-acoustic transducer, a high level of distortion of the diaphragm is necessary to generate great sound pressure. To this end, Japanese Patent Laid-open No. 227199/88 and Japanese Patent Laid-open No. 227200/88 disclose piezoelectric-acoustic transducers in which distortion of the diaphragm is facilitated by making the periphery of the diaphragm thinner. Such a diaphragm has a piezoelectric bimorph construction in which the diaphragm is composed of two layers of piezoelectric ceramics and is secured and supported around its circumference. Japanese Patent Laid-open No. 227200/88 in particular discloses a construction in which the boundary area between the secured/supported portion and the free-state portion, or the free-state portion adjacent to this boundary, is thinner than the portion in which the bimorph is formed. In Japanese Patent Laid-open No. 227199/88, at least one recessed portion is formed at the boundary between the secured/supported area and the free-state portion, or in the free-state portion adjacent to this area, and by this construction, the circumference of the diaphragm is made thinner.
Japanese Patent Laid-open No. 166717/82 discloses a bimorph piezoelectric oscillator that is constructed by bonding a metal plate to a piezoelectric plate and that is secured at two opposing locations on the periphery of the vibrator with the remaining portion of the periphery left free, thereby increasing the area that functions as a electroacoustic transducer.
However, all of the above-described prior-art piezoelectric-acoustic transducers generate sound pressure through distortion of a diaphragm formed in a single unit with a monolithic piezoelectric unit, and as a result, all suffer from the following drawbacks: First, the conversion efficiency to sound waves is poor and increasing the generated sound pressure is difficult. Not only is there is a limit to the extent to which the periphery of the diaphragm can be thinned in order to facilitate distortion of the diaphragm, but this modification cannot be expected to greatly increase sound pressure. As a second drawback, generated sound waves exhibit a high level of harmonic distortion, and this distortion becomes dramatically worse at sound pressures above a particular level. This problem occurs first because the operation of the diaphragm exhibits a hysteresis characteristic rather than a linear characteristic with respect to the applied voltage, and this characteristic consequently causes irregularity in the phase of generated sound waves. In addition, distortion in sound waves is also caused because the displacement of the diaphragm is limited, and at distortions of the diaphragm greater than a particular level, the displacement becomes nonlinear with respect to input signals.
Finally, a piezoelectric-acoustic transducer of the prior art also has the drawback that the selection of material, weight, and rigidity of the diaphragm is constrained because the diaphragm is formed as a single unit with the piezoelectric that drives the diaphragm, and these constraints limit the degree of design freedom for obtaining ideal acoustic characteristics.


A computer implemented method of generating behavior of a graphics character within an environment including a selected graphics character and one or more graphics elements, the method comprising: generating an image of the environment from a perspective of the selected graphics character; processing the image using an artificial intelligence engine with one or more layers to determine an activation value for the graphics character wherein at least one of the layers is a fuzzy processing layer, and generating the behavior of the graphics character based on the activation value.

Most approaches to animation of autonomous computer generated characters do not utilise a character's view of its environment. Input for a character's artificial intelligence is typically obtained by searching a scene description database for input data and performing involved calculations to obtain required input data. This data is supplied to the character's artificial intelligence engine which outputs character behaviour information.
This approach has a number of disadvantages as follows:                1. occlusion must be ignored or else computed at a high computational cost.        2. resolution of input data is not proportional to distance unless this feature is explicitly computed.        3. visibility due to field of view has to be explicitly computed.        4. topological features such as holes, concavities and profile are difficult and inefficient to represent in a non vision based system.        5. Spatial subdivision optimisation must be used to avoid n squared performance scalability.        6. To provide accurate input information is computationally expensive and limits the number of autonomous computer generated characters that can be simultaneously controlled.
Reynolds, "Flocks, Herds, and Schools: A Distributed Behavioral Model" Computer Graphics, 21(4), July 1987, pp. 25-34, teaches automated behaviour of characters in a 3-D environment where the characters have limited knowledge of their environment.
Systems whereby the limited knowledge available to the character is derived from an image from the perspective of the character are also known.
However, such known systems do not compute distortion free images for wide angles of view.
A disadvantage of such known systems is characters are unable to be realistically responsive to their entire environment represented as a spherical view from the character's position.
Furthermore, the known systems process the image analytically to identify characteristics about objects within the field of view.
A disadvantage of such systems is that this processing costs computation time.
Another disadvantage of such systems is that the data loses generality and thereby limits the flexibility of the use of the data by the engine which determines behaviour of the character.
Another disadvantage is that analytical solutions are often susceptible to unpredictable or unstable behaviour when the input data is not as expected.

Method of animating a graphics character using fuzzy processing layers


A cracker having a bread-like taste is formed from a dough for crackers which incorporates an aqueous suspension of a mixture of flour and yeast and a fermented mixture comprising flour and yeast.

This invention relates to a cracker tasting bread-like.
The invention also relates to a method of making such a cracker type.
It is a well-known fact that crackers are typical bakery consumables, mainly made and packaged today by industrial methods.
Also known is that crackers are specially valued on account of their low moisture content, which makes them crisp and crumbly, as well as adapted for long-term preservation.
while such features are much appreciated, conventional crackers are not appreciated by all because they are usually lacking in fragrance. Although providing an alternative choice to bread, crackers are never so well accepted as real bread.

Method of making crackers having a bread-like taste