A new algorithm for clock offset estimation for resources distributed across a network (such as the Internet). By exchanging a sequence of time-stamped messages between pairs of network nodes and separately estimating variable delays for each message direction, present inventive embodiments provide more accurate estimates for clock offset between node pairs. Present inventive algorithms operate in a variety of peer and server network configurations while providing significant improvement in convergence speed and accuracy.

Accurate and reliable time information is necessary for many systems and applications involving distributed resources, including networked systems and processes typified by the Internet. In such systems, different functional elements are required to have their clocks synchronized. Clock synchronization involves two aspects: frequency synchronization and time synchronization. The former means that element clocks run at the same frequency, and the latter means that elements agree at a particular epoch with respect to the coordinated universal time (UTC), i.e., there is no offset between element clocks. For many purposes, it is appropriate to focus on estimating clock offset and to assume higher order effects, such as the frequency offset, can be ignored or provided for separately.
One application in which clock synchronization becomes essential is in the transport of speech packets over the Internet. Thus, for example, if a network element knows the scheduled playout time of a voice packet at a destination and shares a common notion of time with the destination, it can schedule the transmission of the voice packet to the destination accordingly. Alternatively, if the network element knows that the playout time for the voice packet has passed, it can discard the packet and avoid unnecessarily transmitting it to the destination where it would be discarded anyway. Another example application in which synchronization proves necessary is in the transport of packets from a core network to base stations in a wireless network. That is, transmission of packets on a radio link (e.g., from the base station to the mobile device) is usually synchronous, and it is important to ensure that the core network delivers the packet to the base station in time.
In certain wireless cellular systems, it is possible to transmit multiple copies of the same frame from different base stations to a mobile device whenever the mobile device can receive a sufficiently strong average signal from both base stations, although there will still be instantaneous variations on the received signal due to fast fading. The mobile device then combines the multiple copies prior to decoding. In an unreliable radio environment this greatly improves the probability that the frame is received correctly due to signal diversity. This technique, called soft handoff or sometimes macrodiversity, relies on the fact that the transmissions from the multiple base stations are synchronized in time, so that the mobile can combine the copies without ambiguity. In this context as well it is important for a common notion of time across multiple base stations when needed and an efficacious way to achieve this is through the mechanism and processing technique described in this invention. Therefore, it is often important that the base stations be synchronous with the core network.
Synchronizing the clocks is a two step process: first, the magnitude of the offset between the clocks is estimated, and then one of the clocks is adjusted, as needed. Clocks inherently tend to drift and therefore offset estimation and correction must be done on a continuing basis.
Clock synchronization issues have been extensively addressed in the literature. See, for example, D. Mills, Internet time synchronization: the Network Time Protocol, IEEE Trans. Communications, Vol. 39, No. 10, October 1991; D. Mitra, Network synchronization: analysis of a hybrid of master-slave and mutual synchronization, IEEE Trans. Communications, COM-28, 8 (August 1980), pp. 1245-1259; and N. W. Rickert, Non Byzantine clock synchronization—a programming experiment, ACM Operating Systems Review 22,1 (January 1988), pp. 73-78.
A well-known clock synchronization protocol that has been successfully deployed in the Internet is the Network Time Protocol (NTP), described, for example, in D. Mills, Network Time Protocol (version 3) Specification, Implementation and Analysis RFC 1305, March 1992. One of the most important network clock synchronization issues addressed by NTP is how to use the collected data to estimate the clock offset between a pair of network elements.
In V. Paxson, On Calibrating Measurements of Packet Transit Times, LBNL-41535, ftp://ftp.ee.lbl.gov/papers/vp-clocks-sigmetrics98.ps.gz, March, 1998 (and in a shortened paper with the same title published in Proc. ACM Sigmetrics98, Jun. 22-26, 1998), the author proposed a new algorithm for clock offset estimation. For easy reference, this algorithm will be referred to as the Separate Direction Estimation Algorithm (SDEA) and the cited papers as Paxson. While SDEA can provide improved performance relative to the NTP algorithm, SDEA nevertheless suffers from significant limitations, especially in applying SDEA to contexts in which loading is different for each of the directional links between pairs of network elements. The incorporated application describes techniques by which limitations of the NTP algorithm and SDEA are overcome and SDEA techniques are extended and improved. Increasingly stringent demands on network performance have caused workers in the field to seek other broadly applicable improved clock offset estimation techniques.

Method for estimating offset for clocks at network elements


A computer system for multiplying a first matrix and a second matrix that reduces rounding error, including a processor, a memory, a storage device, and software instructions stored in the memory for enabling the computer system, under the control of the processor, to perform obtaining a first set of dimension values for the first matrix and a second set of dimension values for the second matrix, selecting one of a plurality of multiplication permutations if the first set of dimension values and the second set of dimension values are greater than a crossover value, multiplying the first matrix by the second matrix using the multiplication permutation and a Strassen-Winograd method, recursively sub-dividing the first matrix and the second matrix producing a set of sub-matrix products and a recursion tree, and propagating the set of sub-matrix products up the recursion tree to produce a product matrix.

A matrix is a rectangular array of numeric or algebraic quantities subject to mathematical operations, e.g., multiplication, addition, subtraction, etc. Matrices are typically used to solve systems of equations where there are multiple variables to be computed. A matrix is especially useful in processing large quantities of numbers and unknowns, which can otherwise be difficult by individual computation. For example, matrices may be used to determine the vibrational resonance of a car engine, evaluate the electronic structure of a molecule, model heat transfer within a closed system, aid in rotation and translation of computer graphics, etc. The applications listed above are typically carried out on supercomputers.[A][B]=[C]  (1a)
                                          [                                                                                a                    11                                                                                a                    12                                                                                a                    21                                                                                a                    22                                                                        ]                                          [                                                                                b                    11                                                                                b                    12                                                                                b                    21                                                                                b                    22                                                                        ]                          =                  [                                                                      c                  11                                                                              c                  12                                                                                c                  21                                                                              c                  22                                                              ]                                    (1b)
Equations (1a) and (1b) shown above illustrate a typical matrix-matrix multiplication. A first matrix [A] has two rows and two columns and is referred to in the art as a 2×2 matrix. The first matrix [A] has four elements: a11, a12, a21, and a22. A second 2×2 matrix [B] also has four elements: b11, b12, b21, and b22. A third 2×2 matrix [C] contains the result of the multiplication of the first matrix [A] and the second matrix [B]. The resulting third 2×2 matrix [C] has four elements: c11, c12, c21, and c22. To calculate the value of all the elements in the third 2×2 matrix [C] using the traditional method for matrix-matrix multiplication, equations (2) through (13) shown below are used.s1=a11b11  (2)s2=a12b21  (3)s3=a11b12  (4)s4=a12b22  (5)s5=a21b11  (6)s6=a22b21  (7)s7=a21b12  (8)s8=a22b22  (9)c11=s1+s2  (10)c12=s3+s4  (11)c21=s5+s6  (12)c22=s7+s8  (13)
As demonstrated above, multiplying two 2×2 matrices, using the traditional method, requires 8 multiplication operations and 4 addition operations. As the size of the matrices being multiplied becomes larger, the number of multiplication operations and addition operations increases on the order of the cube of the matrix size, denoted O(n3). Due to the larger computational cost of these operations, a number of methods have been developed to decrease the number of computation steps.
One such method is the Strassen method. The Strassen method recursively divides a matrix into smaller sub-matrices upon which the arithmetic savings of requiring only 7 multiplication operations are applied at each level of recursion. The Strassen method is typically employed for matrices that are greater than 128×128 or larger, depending on the computational resources being used. While the Strassen method typically provides a significant decrease in computation time, the method introduces a precision loss due to an uneven distribution of arithmetic in the result matrix. Thus, while the computation of a matrix multiplication requires fewer computation steps using the Strassen method, the end result may be less precise than would occur using traditional methods. In this context, precision is defined as the number of significant digits to which a value may be reliably measured.
To further reduce computation steps by the Strassen method, many variant methods have been created. The Winograd variant of the Strassen method provides a balanced trade-off between decreased additions and increased memory requirements and complexity.
Equations (14)–(34) illustrate application of the Winograd variant of the Strassen method for matrix-matrix multiplication for the previously defined 2×2 matrices [A] and [B] in equation (1b).s1=a21+a22  (14)s2=s1−a11  (15)s3=a11−a21  (16)s4=a12−s2  (17)s5=b12−b11  (18)s6=b22−s5  (19)s7=b22−b12  (20)s8=s6−b21  (21)m1=s2s6  (22)m2=a11b11  (23)m3=a12b21  (24)m4=s3s7  (25)m5=s1s5  (26)m6=S4b22  (27)m7=a22s8  (28)t1=m1+m2  (29)t2=t1+m4  (30)c11=m2+m3  (31)c12=t1+m5+m6  (32)c21=t2−m7  (33)c22=t2+m5  (34)
As demonstrated above, multiplying two 2×2 matrices using the Strassen/Winograd method requires 7 multiplication operations and 15 addition operations. The power of Strassen methods comes from the recursion. The 2×2 matrix elements may themselves be matrices so that a reduction in arithmetic is achieved at each level of recursion. The number of multiplication operations and addition operations increases on an order approaching Log2(7) of the matrix size, denoted O(n2.8). Due to the high computational costs of matrix multiplication operations, a number of methods have been developed to decrease the number of computation steps.
As the dimensions of the matrices being multiplied increases, i.e., an increase in the number of rows and/or columns, the required computation increases exponentially creating a necessity for a recursive computational method to subdivide and more accurately solve for the unknowns. A threshold occurs where the Winograd variation of the Strassen method is more efficient than the traditional matrix-matrix multiplication method is described as a crossover point. Essentially, the Winograd variation of the Strassen method is used recursively to perform the matrix-matrix multiplication until the crossover point is reached. Once the crossover point is reached, the traditional matrix-matrix multiplication method is more efficient than the Winograd variation of the Strassen method.
The precision loss introduced by the Winograd variation of the Strassen method is typically seen in matrix-matrix multiplication using floating point numbers. A floating-point number is a number represented by a mantissa and an exponent according to a given base. The mantissa is usually a value between zero and one. To find the value of a floating-point number, the base is raised to the power of the exponent, and the mantissa is multiplied by the result. Ordinary scientific notation uses floating-point numbers with 10 as the base. In a computer, the base for the floating-point number is usually two. Precession loss typically arises in floating point number calculations through round-off errors. Round-off errors are a result of rounding results of floating-point operations (e.g., multiplication steps in matrix-matrix multiplication) during mathematical calculations.

Precision improvement method for the Strassen/Winograd matrix multiplication method


A method and apparatus for sharing information. First bits are selected from a shared secret key in a first device. The first bits have a selected length. Second bits with the selected length in signals are sent from the first device to a second device. The signals have selected types of properties based on the first bits. The second bits are encoded in states for the selected types of properties. A key is generated in the first device. The key is based on the second bits received at the second device having the selected types of properties identified as matching expected types of properties.

1. Field
The present disclosure relates generally to exchanging information and, in particular, to generating keys for use in exchanging information. Still more particularly, the present disclosure relates to a method and apparatus for generating a key for exchanging information without revealing a secret key.
2. Background
In exchanging information, some information sent between devices may be considered confidential, secret, or sensitive. Information may be sent between devices in a manner that does not allow other parties to see the information. The information is typically encrypted in a first device using an encryption process. The encrypted information is then sent to a second device. The second device then decrypts the information. Encryption is typically performed using an encryption process in which a key is used to encrypt the information. The second device also needs to have the key to decrypt the information as well as knowing the encryption process used.
Many different systems are present for encrypting information. For example, public key cryptography is commonly used by many companies to perform secure transactions. These transactions may include transferring funds, providing clients secure access to accounts, and other suitable purposes. Protocols using public keys may not be as secure as desired. An eavesdropper may view the encrypted information and use sophisticated processes to decrypt the information.
Private key cryptography may provide a more secure process for exchanging information. A weakness in processes that use private keys is the fact that the key needs to be shared between two devices exchanging information. If an unauthorized party is able to intercept the key being transmitted between two devices, then the unauthorized party may be able to access encrypted information sent between the two devices. Therefore, it would be desirable to have a method and apparatus that takes into account at least some of the issues discussed above, as well as other possible issues.


A combined corner pot holder and railing apparatus for flush-mounting on the inside corner of a deck/porch railing having a substantial depth to conceal the pots from view a triangular box with horizontally extending flanges for resting on the top of the railing, the flower planter having a flower pot container section defined by three walls connected by a triangular base, the container having a pair of side walls including a first side wall and a second sidewall joined in angular relation, and a back wall. The sidewalls adapted to a butt side portions of the railing and with each sidewall having a horizontally extending support flange configured to extend to fit on the top horizontal surface of the railing keeping the container positioned in the corner of the railing. The two laterally extending support flanges are in orthogonical relationship one to another and each are in orthogonical relationship to the associated sidewall to provide a mating fit to the inside corner of the railing in a manner that requires no attachment fixtures to be pierced into the railing structure for holding the flower pot container in place.

The present invention relates generally to planters for containing potted flowers, and more particularly to a flush-mounted pot holder configured to fit at the corner of a porch/deck railing for displaying flowers. Traditionally, planters for containing plants, particularly flowers grown from seedlings in soil, are of elongated box construction commonly attached to a dwelling frame structure, such as a window ledge, by fastening devices to provide a conventional "window box". Alternatively, planters are attached to porch/deck structures, such as railings, configured as elongated rectangular boxes adapted for growing plants in soil contained in said boxes. When filled with soil, these planters are heavy and require structurally strong brackets fastened by screw fasteners into the frame, are accordingly difficult to install, and will disfigure the frame with perforations associated with fastening the brackets. Such planters are installed in plain view and detract from the aesthetic appearance of the dwelling, particularly when the within contained plants are not in bloom.
It is also popular to place planters in interior spaces at home and in offices installed on partial-height walls. Typically, such boxes are placed on top of the partial wall and are held in place by brackets with the planter in plain view. One such device is covered by U.S. Pat. No. 4,912,876, to Grisberg, which is directed to a partition wall planter for mounting on the top of a partial height wall by bottom-mounted support brackets. This planter is positioned on top of the wall which is provided with decorative side panels. The support brackets are secured between the decorative panels and the partition wall frame to hold the planter in place on top of the wall, the walls of the planter being in plain view.
Applicant is also aware of related art in the field of the invention including U.S. Pat. No. 4,129,119 to Engel issued Oct. 17, 1978, and U.S. Pat. No. 1,084,414 to Eger issued Jan. 13, 1944, U.S. Pat. No. 986,395 to King issued Mar. 7, 1911, and to U.S. Pat. No. 2,316,384 to Abramson issued Apr. 13, 1943.
Ginsberg essentially is a triangular planter that may be attached to the corner on top of a partial wall, however, the Ginsberg planter does not have outwardly extending flanges for flush mounting the planter on the side of a partial wall or deck railing. The planter as disclosed by Eger, includes an outwardly extending flange for supporting a flower box on a deck railing being attached by brackets clamped to the railing, however, the planter is mounted on the outside of the railing in plain view, is not adapted for hanging on the inside corner of a railing, the flower box is intended to be conspicuously visible, and is of elongated, gutter type construction. King and Abramson both show containers which have vertical side panels configures to form substantially triangular receptacles, however they are not adapted for use in the corner of a porch railing. Engel discloses an elbow planter box including two trough-like receptacles for forming a continuous planter or a flower box of generally rectangular configuration. The provision for extending the length of a section of the planter by a splicer, and includes an elbow section, however, the Engel planter is adapted for containing plants planted in soil, and is not particularly adapted for containing pots, and includes two box like receptacles and has no integral means of fastening the planter to a structure.
While the above noted patents disclose devices for securing planters to half-walls, and railing and to provide a elbow feature for corner applications in a heretofore acceptable manner, the prior art devices lacked the desirable feature of concealment of the container and pots, and limiting the display to the blooms of plants arranged in the planters.
It is thus apparent that prior art lacks corner plant or devices for flower pots of triangular construction configured to be easily attached to in a flush-mounted manner to the inside portion of a porch railing corner segment, wherein the planter and the within-contained flower pots are obscured from view.


A conical housing of a horizontal decanter centrifuge includes a discharge port liner that attaches to the conical housing from the outside of the housing. The discharge port is substantially rectangular in configuration, and the liner slides down into the port opening. The liner is coupled to the housing with bolts or similar releasable coupling apparatus.

Horizontal decanter centrifuges are capable of processing large quantities of liquid and removing suspended solids from the liquid. These types of centrifuges are used in many different industries, but they find especially useful application in the oil and gas industry in the purification of drilling fluid, referred to as drilling mud.
In the purification of drilling fluid, huge quantities of sand and rock, including cuttings from the drilling process, are processed through one or more centrifugal separators. The mixture of solids and liquid enters a centrifuge and proceeds into a conical housing which turns at high speed, for example 3,000 rpm. At this speed, heavier solids migrate out to the inside surface of the conical housing, while the liquid migrates closer to the axis of rotation of the housing. A screw conveyor then scoops the solids which have accumulated on the inside surface of the housing toward a solids discharge port. The purified liquid, such as drilling mud, is discharged from the centrifuge at a liquids discharge port.
The sizes of the individual solid particles that are discharged from the solids discharge port fall within a wide range of diameters, but regardless of the sizes, these solid particles are abrasive as they pass over edges of the centrifuge discharge port. Over time, this abrasion requires maintenance on the centrifuge, which in the most severe cases may even call for the replacement of the conical housing.
In order to reduce the speed at which the abrasion of the discharge port occurs, known centrifuges include liners at the discharge ports. The discharge ports themselves are circular and the liners are inserted from the inside of the conical housing into the discharge port. The liners and the surface into which they are inserted are tapered, so that as the conical housing turns at high speed, the tapered liner presses more firmly into the circular opening of the discharge port.
Unfortunately, even the most wear resistant liner eventually erodes to the point that it no longer protects the discharge port. At this point, the liners in all of the discharge ports must be replaced. In most cases, this operation can only be performed by qualified personnel in a shop, and thus the centrifuge itself must be removed from its housing and shipped to a repair facility.
Once the centrifuge arrives at the repair facility, the conical housing must be removed in order for repair personnel to gain entry to the interior of the conical housing. Then, the eroded liners are removed and replaced with fresh ones. Finally, the refurbished conical housing is put back the centrifuge and the refurbished conical housing must then be balanced. If the conical housing is not properly balanced, then at 3,000 rpm the machine may generate unacceptable vibration or worse.
Thus, there remains a need for a device to protect the discharge ports of a horizontal, decanter centrifuge which will not require such an expensive and involved procedure as is current today in the art. The present invention is directed to filling this need in the art.


The system includes an engine, a sensor, and a controller. The engine provides a driving motion for the vehicle. The sensor unit is configured to determine a range of a leading vehicle. The controller is in communication with the engine and the sensor unit, such that the controller may shut down the engine based on the range of the lead vehicle as determined by the sensor unit.

1. Field of the Invention
The present invention generally relates to a motor vehicle control system configured to reduce fuel consumption. More specifically, the present invention relates to a sensor system for shutting down the engine of a vehicle to reduce fuel consumption.
2. Description of Related Art
Many systems have been developed to improve the fuel efficiency of internal combustion engine powered vehicles. Recently, systems have been developed that automatically turn off the engine while the vehicle is stationary, for example at stop lights or in stop and go traffic. When the vehicle needs to move, the engine is immediately restarted to power the vehicle. Such vehicles have provided significant improvements in fuel efficiency. Tests have shown that one such model has improved fuel savings by 15% in congested traffic. Such systems turn off the engine based on vehicle parameters such as vehicle speed, braking, and acceleration. Further, these parameters are monitored in order to determine whether the engine should remain stopped or be restarted. For example, the engine is typically not turned off when the vehicle speed is above 6 kph.
Despite the benefits of present intermittent stop type systems for motor vehicles, there is a continuing need to enhance the fuel efficiency of such systems.


A system switching control device includes a switching section, two cell storage sections, a system control section, a circuit cell storage section and a cell circuit section. The switching section executes system switching operation for changing its connection between the two cell storage sections, in which cells inputted to the switching section is selectively supplied to one of the cell storage sections (operating system cell storage section), and are not supplied to the other (standby system cell storage section). The timer section counts a time concerning a system switching time U(s) after the system switching. The system control section reads out cells from the standby system cell storage section during the system switching time U(s) just after the system switching so as to clear the cells therefrom, and reads out cells from the operating system cell storage section during a period after the system switching time U(s). The cells read out from the cell storage sections are temporarily stored in the circuit cell storage section having enough storage capacity, and thereafter packed by the cell circuit section in appropriate frames and transmitted. All the cells which accumulated in the operating system cell storage section during the system switching time U(s) are moved into the circuit cell storage section during the period after the system switching time U(s), thereby cell overflow and cell loss at the cell storage sections are avoided.

The present invention relates to a system switching control device and a system switching control method for executing system switching operation between two systems (operating system and standby system), in which one cell storage device is selected as an operating system cell storage device from two cell storage devices of the two systems and cells are selectively supplied to the operating system cell storage device.
A system switching control device is used in an apparatus having two systems to be alternately employed as an xe2x80x9coperating systemxe2x80x9d and a xe2x80x9cstandby systemxe2x80x9d. FIG. 1 is a schematic block diagram showing an example of a conventional system switching control device. The conventional system switching control device of FIG. 1 is composed of a switch section 101 and a cell circuit section 108 which is connected to the switch section 101. The switch section 101 includes a switching section 103, two cell storage sections 104, a system control section 105 and a timer section 106.
The switching section 103 selectively supplies inputted cells to one of the cell storage sections 104. The cell storage section 104 that receives the cells from the switching section 103 is regarded as an operating system cell storage section 104, and the other cell storage section 104 that does not receive the cells from the switching section 103 is regarded as a standby system cell storage section 104. In short, the switching section 103 executes system switching operation between two systems (operating system and standby system). The cell storage section 104 temporarily stores the cells supplied from the switching section 103 in its buffer. The buffer operates as a FIFO (First-In First-Out) memory having enough capacity, in which the received cells are stored in order of reception and the stored cells are read out in order of the storage. The system control section 105 executes cell read control to the operating/standby system cell storage sections 104 when the system switching operation is conducted.
The cell circuit section 108 packs the cells supplied from the cell storage section 104 in appropriate frames and transmits the frames. The timer section 106 is a timer to which a system switching protection time T(s) is set. In the system switching operation, the timer section 106 starts counting when a count start instruction is supplied from the system control section 105. When the count reached the system switching protection time T(s), the timer section 106 informs the system control section 105 of the elapse of the system switching protection time T(s) and resets the count to xe2x80x9c0xe2x80x9d.
FIG. 2 is a schematic block diagram showing an example of the composition of the cell storage section 104 of the conventional system switching control device of FIG. 1. The cell storage section 104 shown in FIG. 2 includes a cell reception section 109, a cell write section 110, a buffer 111 and a cell output section 112.
When the cell reception section 109 received a cell from the switching section 103, the cell reception section 109 sends a first cell reception signal (indicating that a cell to be written in the buffer 111 has been reached) to the cell write section 110. The cell write section 110 which received the first cell reception signal from the cell reception section 109 executes cell write control to the buffer 111. The buffer 111 is a FIFO memory which stores cells in order of reception and outputs the cells in order of the storage. The system control section 105 executes cell read control to the buffer 111. The cell output section 112 receives the cells read out from the buffer 111 and sends the cells to the cell circuit section 108 in order of reception.
FIG. 3 is a schematic block diagram showing an example of the composition of the cell circuit section 108 of the conventional system switching control device of FIG. 1. The cell circuit section 108 shown in FIG. 3 includes a circuit cell reception section 113, a circuit cell write/read section 114, a circuit buffer 115 and a circuit section 116.
When the circuit cell reception section 113 received a cell from the cell storage section 104, the circuit cell reception section 113 sends a second cell reception signal (indicating that a cell to be written in the circuit buffer 115 has been reached) to the circuit cell write/read section 114. The circuit buffer 115 is a small-size FIFO (First-In First-Out) memory which is provided to the cell circuit section 108 in order to absorb a delay of cells due to cell-packing operation by the circuit section 116. The circuit cell write/read section 114 which received the second cell reception signal from the circuit cell reception section 113 executes cell write control of the circuit buffer 115, in which the received cells are written in the circuit buffer 115 in order of reception. The circuit cell write/read section 114 also executes cell read control of the circuit buffer 115, in which the cells stored in the circuit buffer 115 are read out in order of the writing.
The circuit buffer 115 has a threshold cell storage capacity. When the amount of the cells stored in the circuit buffer 115 reached the threshold cell storage capacity, the cell circuit section 108 sends a cell threshold signal to the system control section 105. The system control section 105 which received the cell threshold signal suspends the cell reading from the operating system cell storage section 104, thereby loss of cells at the circuit buffer 115 can be avoided. The circuit section 116 receives the cells read out from the circuit buffer 115, packs the cells in appropriate frames, and transmits the frames.
In the following, the operation of the conventional system switching control device of FIGS. 1 through 3 will be described more in detail. The inputted cells flow through the switching section 103, the operating system cell storage section 104 and the cell circuit section 108. In the ordinary cell transfer state, the system switching operation for switching between the operating system and the standby system is executed. In the system switching operation, the switching section 103 stops the supply of cells to the present standby system cell storage section 104 (former operating system cell storage section 104) and starts the supply of cells to the present operating system cell storage section 104 (former standby system cell storage section 104).
When the system switching occurred, the system control section 105 suspends the cell reading from the present operating system cell storage section 104 for a system switching time U(s). Therefore, in the present operating system cell storage section 104, cell writing to the buffer 111 is executed ordinarily but cell reading from the buffer 111 is suspended during the system switching time U(s).
In the system switching operation, the system control section 105 operates as follows. The system control section 105 confirms that no cell remains in the former operating system cell storage section 104 (present standby system cell storage section 104). If one or more cells remained in the former operating system cell storage section 104, the system control section 105 continues monitoring the former operating system cell storage section 104 until it confirms that all the cells have been outputted and no cell remains. If we assume it takes a confirmation time S(s) for the confirmation of the vacancy of the former operating system cell storage section 104 since the start of the system switching, the cell reading from the present operating system cell storage section 104 keeps on being suspended during the confirmation time S(s). After the vacancy of the former operating system cell storage section 104 could be confirmed, the system control section 105 further suspends the cell reading from the present operating system cell storage section 104 for the system switching protection time T(s) which is set to the timer section 106. The system switching protection time T(s) guarantees the xe2x80x9cno passingxe2x80x9d for a cell that has been supplied from the switching section 103 to the former operating system simultaneously with the system switching and which has not reached the former operating system cell storage section 104. The system control section 105 does not make the judgment of the vacancy (no remaining cells) of the whole former operating system only by the vacancy of the former operating system cell storage section 104, but further waits for the system switching protection time T(s), thereby cells existing in the former operating system other than the former operating system cell storage section 104 are prevented from being lost.
The system switching protection time T(s) is set long enough so that any cell remaining in the former operating system can pass the former operating system. After the system switching protection time T(s) (after the confirmation time S(s) after the system switching) has elapsed, the system control section 105 starts the cell reading from the present operating system cell storage section 104. If cells remaining in the former operating system existed at this stage, the cells are lost. The system switching time U(s) can be expressed as:
U(s)=S(s)+T(s).
Consequently, cells which are written in the present operating system cell storage section 104 during the system switching time U(s) are accumulated in the present operating system cell storage section 104.
However, in the conventional system switching control device, the number of cells accumulated in the present operating system cell storage section 104 increases as the system switching is repeated, thereby overflow occurs in the cell storage section 104, and as a result, cell loss occurs.
In the following, a process to the cell loss will be explained referring to FIGS. 4A through 4E. FIGS. 4A through 4E are schematic diagrams showing the change of states of the conventional system switching control device of FIG. 1 when the system switching is repeated.
FIG. 4A shows an ordinary cell transfer state before a system switching is executed, in which cells flow through the operating system cell storage section 104 and the cell circuit section 108.
FIG. 4B shows a state just after a system switching, in which the system control section 105 suspends the cell reading from the present operating system cell storage section 104 during the system switching time U(s) while executing cell reading from the present standby system cell storage section 104. Consequently, cells keeps on being supplied to the operating system cell storage section 104 and accumulates in the buffer 111 of the operating system cell storage section 104 during the system switching time U(s). The number of cells which accumulates in the buffer 111 of the operating system cell storage section 104 during the system switching time U(s) will hereafter be assumed to be M (cells).
FIG. 4C shows a state when the system switching has been completed, in which the cells accumulated in the operating system cell storage section 104 moves to the cell circuit section 108 and accumulates in the cell circuit section 108, since the cell input speed to the circuit section 116 of the cell circuit section 108 is slower than the cell read speed from the cell storage section 104. The circuit section 116 takes long time for dividing the cells into information cells and control cells and packing the cells in frames, therefore, the cell input speed to the circuit section 116 becomes slow and the cells are accumulated in the cell circuit section 108.
In FIG. 4C, if all the cells accumulated in the cell storage section 104 moves into the cell circuit section 108, overflow occurs in the circuit buffer 115 of the cell circuit section 108 and thereby cell loss occurs. The threshold cell storage capacity is set to the circuit buffer 115 in order to avoid the cell loss. When the amount of the cells stored in the circuit buffer 115 reached the threshold cell storage capacity, the cell circuit section 108 sends the cell threshold signal to the system control section 105. When the system control section 105 received the cell threshold signal, the system control section 105 suspends the cell reading from the operating system cell storage section 104 and thereby the cell loss at the circuit buffer 115 is avoided. Consequently, some cells remain accumulated in the cell storage section 104. The number of the cells remaining in the cell storage section 104 will hereafter be assumed to be N (cells).
FIG. 4D shows a state just after a second system switching. Referring to FIG. 4D, the number of cells accumulated in the operating system cell storage section 104 becomes M+N, in which M is the number of cells accumulated in the present operating system cell storage section 104 during the system switching time U(s) and N is the number of cells which remained in the present operating system cell storage section 104 during the period when it was operating as the standby system cell storage section 104.
FIG. 4E shows an ordinary cell transfer state after the state of FIG. 4D, in which the cell circuit section 108 sends the cell threshold signal to the system control section 105 if the amount of stored cells reaches the threshold cell storage capacity and the system control section 105 which received the cell threshold signal suspends the cell reading from the operating system cell storage section 104. Consequently, 2xc3x97N cells are accumulated in the operating system cell storage section 104. In short, the number of cells accumulated in the operating system cell storage section 104 increases by N on each system switching (more precisely, each time when the cell storage section 104 becomes the operating system cell storage section 104). If we assume the capacity of the buffer 111 of the cell storage section 104 is C (cells), overflow and cell loss occurs at the buffer 111 of the cell storage section 104 when:
Nxc3x97S greater than C
(S: the number of system switching).
It is therefore the primary object of the present invention to provide a system switching control device and a system switching control method for a device including cell storage sections to be alternately employed as an operating system cell storage section and a standby system cell storage section by means of system switching operation and a cell circuit section for packing the cells which have been temporarily stored in the cell storage sections in appropriate frames and transmitting the frames, by which loss of cells due to the system switching operation can be eliminated.
In accordance with a first aspect of the present invention, there is provided a system switching control device comprising a first system cell storage section, a second system cell storage section, a switching section, a timer section, a system control section, a circuit cell storage section and a cell circuit section. The first system cell storage section and the second system cell storage section temporarily store cells supplied thereto, respectively. The switching section executes system switching operation for changing its connection between the first system cell storage section and the second system cell storage section so that cells inputted to the switching section will be selectively supplied to one of the cell storage sections and thereby the cell storage section that is supplied with the cells will be designated as an operating system cell storage section and the other cell storage section that is not supplied with the cells will be designated as a standby system cell storage section. The timer section counts a time concerning a system switching time U(s) after the system switching operation which is executed by the switching section. The system control section, which is connected to the first system cell storage section, the second system cell storage section and the timer section, reads out cells from the standby system cell storage section during the system switching time U(s) just after the system switching operation executed by the switching section, and reads out cells from the operating system cell storage section during a period after the system switching time U(s). The circuit cell storage section temporarily stores the cells read out by the system control section from the standby system cell storage section and the operating system cell storage section. The cell circuit section packs the cells supplied from the circuit cell storage section in appropriate frames and transmits the frames. The circuit cell storage section is designed to have an enough storage capacity by which all the cells which accumulated in the operating system cell storage section during the system switching time U(s) can be moved into the circuit cell storage section during the period after the system switching time U(s).
In accordance with a second aspect of the present invention, in the first aspect, the circuit cell storage section has a storage capacity that is larger than that of each of the first system cell storage section and the second system cell storage section.
In accordance with a third aspect of the present invention, in the first aspect, after the system switching operation executed by the switching section, the system control section confirms that no cell remains in the standby system cell storage section and thereafter the timer section counts a system switching protection time T(s). A period from the system switching operation executed by the switching section to the end of the system switching protection time T(s) counted by the timer section is regarded by the system control section as the system switching time U(s).
In accordance with a fourth aspect of the present invention, in the first aspect, the circuit cell storage section stores received cells in order of reception and outputs the stored cells in order of the storage.
In accordance with a fifth aspect of the present invention, in the first aspect, the circuit cell storage section includes a circuit cell reception section, a circuit buffer, a circuit cell output section and a circuit cell write/read section. The circuit cell reception section receives cells which are supplied from the first system cell storage section and the second system cell storage section. The circuit buffer, having the enough storage capacity, temporarily stores the cells received by the circuit cell reception section. The circuit cell output section outputs the cells read out from the circuit buffer to the cell circuit section. The circuit cell write/read section executes cell write control for writing the cells received by the circuit cell reception section into the circuit buffer and cell read control for reading out the cells from the circuit buffer.
In accordance with a sixth aspect of the present invention, in the cell write control in the fifth aspect, the circuit cell write/read section writes the cells received by the circuit cell reception into the circuit buffer in order of reception. In the cell read control, the circuit cell write/read section reads out the cells from the circuit buffer in order of the writing.
In accordance with a seventh aspect of the present invention, in the cell read control in the sixth aspect, the circuit cell write/read section suspends the cell reading from the circuit buffer when a signal for preventing cell loss at the cell circuit section is supplied from the cell circuit section.
In accordance with an eighth aspect of the present invention, in the first aspect, the cell circuit section includes a circuit cell reception section, a circuit section, a circuit buffer and a circuit cell write/read section. The circuit cell reception section receives cells which are supplied from the circuit cell storage section. The circuit section packs the received cells in appropriate frames and transmits the frames. The circuit buffer, which is provided between the circuit cell reception section and the circuit section, temporarily stores the cells received by the circuit cell reception section and thereby absorbs delay of cells due to the cell packing operation executed by the circuit section. The circuit cell write/read section executes cell write control for writing the cells received by the circuit cell reception section into the circuit buffer and cell read control for reading out the cells from the circuit buffer.
In accordance with a ninth aspect of the present invention, there is provided a system switching control method for a system switching control device which is provided with: a first system cell storage section for temporarily storing cells supplied thereto; a second system cell storage section for temporarily storing cells supplied thereto; a switching section for executing system switching operation for changing its connection between the first system cell storage section and the second system cell storage section so that cells inputted thereto will be selectively supplied to one of the cell storage sections and thereby the cell storage section that is supplied with the cells will be designated as an operating system cell storage section and the other cell storage section that is not supplied with the cells will be designated as a standby system cell storage section; a timer section for counting a time concerning a system switching time U(s) after the system switching operation which is executed by the switching section; a system control section which is connected to the first system cell storage section, the second system cell storage section and the timer section, which reads out cells from the standby system cell storage section during the system switching time U(s) just after the system switching operation executed by the switching section, and reads out cells from the operating system cell storage section during a period after the system switching time U(s); a circuit cell storage section for temporarily storing the cells read out by the system control section from the standby system cell storage section and the operating system cell storage section; and a cell circuit section for packing the cells supplied from the circuit cell storage section in appropriate frames and transmitting the frames. The system switching control method includes a cell clearance step. In the cell clearance step, all the cells which accumulated in the operating system cell storage section during the system switching time U(s) are cleared from the operating system cell storage section and moved into the circuit cell storage section during the period after the system switching time U(s).
In accordance with a tenth aspect of the present invention, in the ninth aspect, the circuit cell storage section is designed to have a storage capacity that is larger than that of each of the first system cell storage section and the second system cell storage section.
In accordance with an eleventh aspect of the present invention, in the ninth aspect, after the system switching operation executed by the switching section, the system control section confirms that no cell remains in the standby system cell storage section and thereafter the timer section counts a system switching protection time T(s). A period from the system switching operation executed by the switching section to the end of the system switching protection time T(s) counted by the timer section is regarded by the system control section as the system switching time U(s).
In accordance with a twelfth aspect of the present invention, in the ninth aspect, the cells are stored in the circuit cell storage section in order of reception and the stored cells are outputted from the circuit cell storage section in order of the storage.
In accordance with a thirteenth aspect of the present invention, in the twelfth aspect, the cell output from the circuit cell storage section is suspended when a signal for preventing cell loss at the cell circuit section is supplied from the cell circuit section.
In accordance with a fourteenth aspect of the present invention, in the ninth aspect, the cells supplied from the circuit cell storage section to the cell circuit section are temporarily stored in a circuit buffer before being packed in the frames so that delay of the cells due to the cell-packing operation will be absorbed.

Device and method for system switching control


A β crystalline form of the compound of formula (I):

Perindopril and its pharmaceutically acceptable salts, and more especially its tert-butylamine salt, have valuable pharmacological properties.
Their principal property is that of inhibiting angiotensin I converting enzyme (or kininase II), which prevents, on the one hand, conversion of the decapeptide angiotensin I to the octapeptide angiotensin II (a vasoconstrictor) and, on the other hand, degradation of bradykinin (a vasodilator) to an inactive peptide.
Those two actions contribute to the beneficial effects of perindopril in cardiovascular diseases, more especially in arterial hypertension and heart failure.
Perindopril, its preparation and its use in therapeutics have been described in European Patent specification EP 0 049 658.
In view of the pharmaceutical value of this compound, it has been of prime importance to obtain it with excellent purity. It has also been important to be able to synthesise it by means of a process that can readily be converted to the industrial scale, especially in a form that allows rapid filtration and drying. Finally, that form had to be perfectly reproducible, easily formulated and sufficiently stable to allow its storage for long periods without particular requirements for temperature, light, humidity or oxygen level.

β crystalline form of perindopril tert-butylamine salt

Abstract: characterized by its powder X-ray diffraction data.

Abstract: Medicinal products containing the same which are useful as inhibitors of angiotensin I converting enzyme.


A broad-spectral-bandwidth photodetector designed for use with all types of optical fibers used in different avionics networks and sensors and a process for fabricating such photodetectors. A Schottky barrier photodetector is provided that includes germanium, which has a broad spectral response to light in the ultraviolet to near-infrared range (220 to 1600 nm). The provision of a photodetector having a broad spectral response avoids the use of multiple different types of photodetectors and receivers in an avionics platform with different optical fiber networks and sensors.

The technology disclosed herein generally relates to fiber optic networks that enable communication between electrical components. Fiber optic networks have the advantages of higher speed, lower weight and electromagnetic interference immunity over copper networks. Many models of commercial airplanes have fiber optic networks for size, weight and power reduction.
Optical networking using plastic optical fiber (POE) has advantages over copper wiring in weight, size, bandwidth, power, and electromagnetic immunity. Plastic optical fiber has advantages over glass optical fiber (GOF) in ease of handling, installation and maintenance. Using POF may result in appreciable weight savings. The weight savings may be significant for networks onboard vehicles, such as airplanes, where the weight savings may result in reduced fuel consumption and lower emissions.
Before POF networks can fully replace GOF networks, the legacy avionics systems using GOF networks will also be used in many old and new models of commercial airplanes. Glass optical fiber has minimum loss at wavelengths of 1550 nm. Glass optical fiber also has minimum dispersion at 1300 nm. Short distance multi-mode glass optical fiber networks also use an 850-nm wavelength because the widely available, mature and low-cost vertical cavity surface-emitting laser transmitter operates at a wavelength of 850 nm. Therefore, some legacy avionics GOF networks operate at 850 nm, 1300 nm and 1550 nm. These legacy GOF networks will co-exist with POF networks in many airplane systems.
The existing solution is to use different photodetectors for different fiber optic networks or sensors. For example, for low-data-rate POF networks (e.g., a controller area network (CAN) bus) which use POF made of poly(methyl methacrylate), a silicon photodetector is used for the receiver operation in the visible wavelength range (450, 550 and 650 nm). For high-speed gigabit POF networks (e.g., ARINC 664, gigabit Ethernet), an InGaAs photodetector is used for receiver operation at the 1200 to 1550 nm wavelength range. For GOF networks, a GaAs photodetector is used at a wavelength of 850 nm and an InGaAs photodetector is used for either 1300-nm- or 1550-nm-wavelength networks. The drawbacks of the foregoing solution are manifold.
First, in an airplane system which has different fiber optic networks and sensors, different receivers are required. The supply, storage and installation of parts for multiple receivers increases the production cost of the airplane avionics system.
Second, currently there is no commercial-off-the-shelf (COTS) photodetector having broadband spectral characteristic that meet the broad spectral range and high quantum efficiency requirements of all fiber optic (POF and GOF) networks in future commercial airplanes avionics systems. For example, some COTS receivers have photodetector sizes which are not optimized for coupling with large-diameter POF. As a result, a POF network with mismatched photodetector sizes has lower receiver sensitivity, which in turn provides a lower optical link margin and a short link distance.
Third, some COTS POF receivers have a photodetector structure which causes the receiver to generate extra optical pulses at a lower than expected optical power level. This problem is referred to herein as "arbitrary pulse phenomena" (APP). As a result of the APP problem, the dynamic range of the fiber optic networks is reduced.

Universal broadband photodetector design and fabrication process


An image processing method, comprising: acquiring, by a CT scanning system, projection data of an object; and processing, by using a convolutional neural network, the projection data, to acquire an estimated image of the object. The convolutional neural network comprises: a projection domain network for processing input projection data to obtain estimated projection data; an analytical reconstruction network layer for performing analytical reconstruction to obtain a reconstructed image; an image domain network for processing the reconstructed image to obtain an estimated image, a projection layer for performing a projection operation by using a system projection matrix of the CT scanning system, to obtain a projection result of the estimated image; and a statistical model layer for determining consistency among the input projection data, the estimated projection data, and the projection result of the estimated image based on a statistical model.

X-ray Computerized-Tomography (CT) imaging systems have been widely used in fields such as medical treatment, security inspection, industrial non-destructive detection etc. Ray sources and detectors collect data of a series of attenuation signals according to a certain trajectory, the data of the series of attenuation signals is preprocessed, and a three-dimensional spatial distribution of linear attenuation coefficients of an object to be inspected may be obtained through recovery using an image reconstruction algorithm. CT image reconstruction process is to recover linear attenuation coefficient distribution from data acquired by the detectors. Currently, analytical reconstruction algorithms such as filtered back-projection, Feldkmap-Davis-Kress (FDK) etc. and iterative reconstruction methods such as Algebra Reconstruction Technique (ART), Maximum A Posterior (MAP) etc. are mainly used in practical applications.
With the increasing diversity of demands for X-ray CT imaging, the requirements for reducing radiation dose have become higher and higher. Techniques for CT image reconstruction using a convolutional neural network have been proposed. However, reconstruction methods using convolutional neural networks require supervised training in a process of training the neural networks. Such a method requires acquiring a large number of real images as labels, that is, the convolutional neural network requires both projection data of low quality and projection data (ground truth value) of high quality.

Image processing method using convolutional neural network, image processing device and storage medium


Disclosed is a composition comprising a combination of: Polygonum fagopyrum seed extract, Chlorella vulgaris extract, palmitoyl wheat protein hydrolysate, algae extract, and tripeptide. The composition may further comprise one or more of the following: Citrus unshiu peel extract, Sphacelaria scoparia extract, Bambusa vulgaris extract, Pisum sativum (pea) extract, Evodia rutaecarpa fruit extract, and dipalmitoylhydroxy proline. Such compositions are useful in methods for aiding in improving skin firmness, lifting the skin, preventing or decreasing skin sagging, and preventing or decreasing visible signs of aging resulting from internal and external causes such as environmental stresses.

A primary goal of cosmetic science is improvement of the outward appearance and health of skin. While the visible signs of aging cannot be fully avoided, they can be dramatically minimized. Less desirable skin traits include wrinkles, fine lines, age spots, uneven skin tone, and loss of firmness or sagging of the skin, which all indicate aged skin. Thus, much of cosmetic science is targeted at treating underlying conditions that cause or stimulate the signs of skin aging.
The underlying conditions causing signs of skin aging can be characterized as intrinsic and extrinsic. Intrinsic causes of skin aging are inevitable and genetically determined; with age, the skin naturally becomes thinner and drier and important skin proteins, including collagen, responsible for maintaining the firmness of skin, and elastin, responsible for maintaining skin's elasticity, are degraded, reduced, and not replaced as quickly as in young skin. Extrinsic causes of skin aging include exposure to sunlight, ultraviolet (UV) light, lifestyle choices such as cigarette smoking, diet, exercise, stress levels, and amount of sleep. Evidence suggests that both intrinsic and extrinsic causes of aging lead to cumulative oxidative damage, which is incurred throughout one's lifetime and ages the skin. For example, UV light generates reactive oxygen species (ROS) in the skin. Oxygen free radicals or ROS are highly reactive species which are known to be a major factor in cell injury via oxidation and subsequent function impairment of lipids, proteins, and nucleic acids. ROS include hydrogen peroxide (H2O2), the superoxide anion (O2−), and free radicals such as the hydroxyl radical (OH−). These molecules are unstable and highly reactive, and can damage cells by chemical chain reactions such as lipid peroxidation. Indeed, active oxygen has been suggested as a major cause in not only aging but also several diseases including heart disease and cancer.
Free radicals, ROS, and RNS are known to degrade elastin and collagen in the skin and to decrease the ability of fibroblasts to produce collagen. Collagen is the primary protein of skin. Collagen (in a pre-processed form called pro-collagen) is assembled in cells and consists of three polypeptides wound around each other in a triple helix form, which is stabilized by intrachain disulfide bonds. After the helical molecule is assembled and modified in the cell it is secreted into the extracellular medium and further processed to a mature form (tropocollagen). Matured collagen molecules assemble into fibrils in the extracellular space in a staggered, parallel, fashion wherein the molecules are stabilized in this fibril pattern by covalent cross-linking bonds between the N-terminus of one molecule and the C-terminus of another. The collagen fibrils are interlaced and branched in skin. These interlaced, branched collagen fibrils provide the skin with its shape and firmness. Thus, when collagen is degraded or lost, skin looses its firmness and becomes lax. Another skin protein, elastin, coils and recoils like a spring and accounts for the elasticity of skin. Elastin is normally not produced by the human body after puberty and aging begin. Therefore, to reduce the visible signs of skin aging, such as loss of resiliency, which causes sagging of the skin, it is important to prevent degradation or loss of elastin and/or to stimulate production of elastin.
Like loss of collagen and elastin due to oxidative damage from free radicals, ROS, and RNS, loss of moisture and increased inflammatory responses contribute to skin aging. Indeed, the skin's capacity to inhibit inflammatory responses and retain water decreases with age, making the skin more vulnerable to dehydration and wrinkling. Lipids and fats in the skin help combat water loss by providing an epidermal barrier. This barrier hinders the growth of bacteria, which can cause skin irritation and sensitivity, which leads to increased inflammation and contributes to aging of skin.
The skin employs a host of protective mechanisms to defend itself against the ravages of the environment, free radicals, ROS, and RNS. One of the most widely studied protective mechanisms is the system of free radical scavengers. Free radical scavengers help to protect the skin by neutralizing dangerous substances, such as ROS and RNS, which are generated by sun exposure and pollution. Therefore, a composition containing free radical scavengers along with compounds that stimulate or increase synthesis or production of important skin proteins, such as collagen and elastin, or compounds that reduce or prevent loss or degradation of such proteins are useful for hydrating the skin, inhibiting inflammation of the skin, and lightening or increasing the evenness of skin tone and thereby for improving the appearance, texture, and moisture of the skin and for maintaining general skin health.

Skin firming and lifting compositions and methods of use


An antenna assembly comprises a computer expansion card comprising a metallic layer which forms a radiating element or a metallic shield which forms the radiating element and a feed line coupled to the radiating element. Other embodiments may be described.

The subject matter described herein relates generally to the field of electronic communication and more particularly to antenna assemblies which may be used in electronic devices.
Many electronic devices such as notebook and laptop computers, personal digital assistants (PDAs), and the like include one or more wireless transceivers to send and receive data via wireless networks. Multi-mode devices, which can transceiver data on multiple different wireless networks, may share hardware, e.g., transmitters, receivers, antennas, etc., in order to reduce both the cost and size of a device. Accordingly, integrated antenna assemblies, and particularly antenna assemblies which may be used on multiple networks, may find utility.


A packet switched IP call to a mobile user device in a wireless network is supported where the mobile user does not have a static IP address and where the mobile user is not engaged in communications in which an IP address is currently assigned. The originating party utilizes the directory number of the mobile user to initiate the packet switched call with at least an originating packet being directed to a home agent in the wireless network. The home agent assigns a temporary IP address to the mobile user's UE and translates packets addressed to the user's directory number to the assigned IP address. A switching node forwards the assigned IP addressed packets to the corresponding UE.

This invention relates to wireless telephone networks and more specifically relates to a wireless network utilizing packet switching and Internet protocol (IP) packets to provide communications with wireless telephone users that do not have a static IP address.
Wireless telephone networks continue to evolve. In the United States, wireless telephones in the public switched telephone system (PSTN) began with the mobile telephone system (MTS) that utilized lower frequencies for radio frequency transmissions and carried voice communications by analog signals. The MTS was spectrally inefficient in that a single frequency or channel was used to cover communications over a large geographic area. The wireless cellular telephone system provided an improvement by utilizing the concept of smaller geography cells that allowed communication channel frequencies to be reused in relatively nearby cells. The cellular system evolved from carrying communications by analog signals to digital signals. Various types of digital signaling have been, and continue to be, utilized including time division multiple access (TDMA) and code division multiple access (CDMA) signaling. With the growing popularity of the Internet and the use of IP addressing for routing packets to a destination device, many wireless devices accommodate both voice communications using a digital signaling protocol and data communications using packets with IP addressing.
As networks continue to evolve, some networks, e.g. third generation universal mobile telecommunications systems (3G—UMTS), offer voice communications carried by packet switching and IP addressing. Due to limitations of the current IP addressing scheme (version 4), it is not possible to assign unique static IP addresses to all devices on the Internet. Where a mobile user desires to initiate a call using packet switching and does not have a static IP address assigned, a dynamic IP address can be assigned using dynamic host configuration protocol (DHCP) or other mechanisms to identify the mobile user during the call session. An IP address for the mobile user is required since packets carrying communications from the called party (a network user) to the originating mobile user will utilize the mobile user's IP address for return packets carrying communications to the mobile user. However, difficulties arise when it is desired to originate a packet switched call from a network user to a mobile user that does not have an assigned static IP address. Unless the mobile user's device is registered and has been assigned a dynamic IP address prior to the initiation of the packet switched call to the user, such calls cannot be made since an IP address of the mobile user's device is not available to the packet switch even though the originating party may know the directory telephone number (DN) of the mobile user. Thus, there exists a need for a solution to this problem.

Enabling packet switched calls to a wireless telephone user


According to the present invention, methods and apparatus are provided to improve the Transmission Control Protocol (TCP) for data such as delay sensitive or bursty data. A maximum send window and a minimum send window are set to correspond to maximum and minimum bandwidth parameters associated with a network. Round trip times are monitored to adjust maximum send windows and minimum send windows. A variable rate shaper is also used to pace packet introduction onto the network.

1. Field of the Invention
The present invention generally relates to the Transmission Control Protocol (TCP). More specifically, the present invention provides techniques and mechanisms for improving TCP, particularly for transmitting data such as storage application data.
2. Description of Related Art
TCP provides reliability, network adaptability, and flow control. Reliability is generally provided by using mechanisms such as sequence numbers to enable retransmission. Network adaptability and flow control are generally provided by using mechanisms such as windows. A window limits the amount of data not yet acknowledged that can be transmitted onto a network.
Conventional TCP congestion control mechanisms work well for many types of data transmissions. However, conventional TCP congestion control mechanisms often do not work adequately for delay sensitive or bursty data, such as data associated with an Internet Protocol (IP) Storage Application. In one example, TCP does not work adequately for transferring data associated with Storage Area Networks (SANs).
Consequently, it is desirable to provide techniques for improving TCP to allow more effective and efficient transmission of data such as delay sensitive and bursty data.


A computer readable medium stores executable instructions to receive a Multidimensional Expressions (MDX) query. The MDX query is recursively rationalized to form a rationalized query. The rationalized query is applied to a multidimensional data source to produce query results. The query results are returned.

Business Intelligence (BI) generally refers to software tools used to improve business enterprise decision-making. These tools are commonly applied to financial, human resource, marketing, sales, customer and supplier analyses. More specifically, these tools can include: reporting and analysis tools to present information, content delivery infrastructure systems for delivery and management of reports and analytics, data warehousing systems for cleansing and consolidating information from disparate sources, and data management systems to collect, store, and manage raw data.
OLAP tools are a subset of business intelligence tools. There are a number of commercially available OLAP tools including Business Objects OLAP Intelligence™ which is available from Business Objects Americas of San Jose, Calif. OLAP tools are a report generation tool, and a tool suited to ad hoc analyses. OLAP generally refers to a technique of providing fast analysis of shared multi-dimensional information stored in a database. OLAP systems provide a multi-dimensional conceptual view of data, including full support for hierarchies and multiple hierarchies. This framework is used because it is a logical way to analyze businesses and organizations. In some OLAP tools the data is arranged in a schema which simulates a multidimensional schema. The multi-dimensional schema means redundant information is stored, but it allows for users to initiate queries without the need to know how the data is organized.
The querying process for OLAP can involve, depending on the specific implementation, writing and executing a query. Multidimensional Expressions (MDX) is a query language for OLAP databases, like SQL is a query language for relational databases. Thus, an MDX statement can be used to query for a result from an OLAP data source, i.e., a cube. The MDX statement can resemble SQL statements where one can ask for data on a row and columns from a cube. As with an SQL query, each MDX query requires a data request (the "SELECT" clause), a starting point (the "FROM" clause), and a filter (the "WHERE" clause). These and other keywords provide the tools used to extract specific portions of data from a cube for analysis, e.g., to extract a slice.
An MDX query specifies the appropriate columns and rows within the SELECT clause (the "ON COLUMNS" and "ON ROWS" clauses). For example, the MDX query can have the following format:
SELECTAxis Dimensions Members  ON COLUMNS,Axis Dimensions Members  ON ROWSFROMCubeWHERESliced Dimensions MembersThe "Axis Dimensions Members" specify which columns and rows to select. The "Sliced Dimensions Members" specify which slice of the cube to select.
Due to the nature of OLAP data sources, there is a lot of redundant data and a lot of columns and rows are selected in queries of even moderate complexity. In addition, users typically include many members in their queries. These factors lead to some MDX queries that are too long to be successfully executed by an OLAP server. Part of a multidimensional application, or an interface to a multidimensional data source, that communicates with the multidimensional data source maintains a sets of members that will be queried. This set is enumerable. When data associated with the list of members is needed a multidimensional query, such as an MDX statement, is constructed. Previously this query included an enumeration over a list. For example, a fragment of the MDX query could be:
SELECT {member1, member2, . . . member45312, . . . } ON COLUMNS
For a large list of members, the multidimensional query could be a very large statement. With some multidimensional data sources there can be a hard limit on the size of queries.
Therefore, it would be desirable to provide a new technique for reducing the size of queries to multidimensional data sources.

Apparatus and method for recursively rationalizing data source queries


In a method of manufacturing an electronic device, an electronic component and a mount substrate are disposed such that one of surfaces of the electronic component faces toward one of surfaces of the mount substrate, and a connection electrode of the electronic component is electrically connected and mechanically bond to a patterned conductor of the mount substrate. A resin film is then disposed on the electronic component and the mount substrate. A gas captured in between the resin film and the electronic component is sucked through a hole provided in the mount substrate from a side of the mount substrate opposite to the electronic component. The resin film is thereby deformed to closely contact the electronic component and the mount substrate. The resin film is then heated and adhered to the mount substrate.

1. Field of the Invention
The present invention relates to an electronic device comprising a mount substrate and an electronic component mounted on the mount substrate, and to a method of manufacturing such an electronic device.
2. Description of the Related Art
Surface acoustic wave devices include interdigitated electrodes formed on a surface of a piezoelectric substrate. Surface acoustic wave devices are widely used as filters in mobile communication equipment such as cellular phones.
An electronic component such as a semiconductor component is frequently used in the form of a package. The package is configured such that the electronic component is mounted on a mount substrate, connection electrodes of the electronic component are electrically connected to patterned conductors of the mount substrate, and portions connecting the connection electrodes of the electronic component and the patterned conductors of the mount substrate are sealed. The same holds true for the case where the electronic component is a surface acoustic wave device. In the present application, a device which comprises a mount substrate and an electronic component mounted on the mount substrate is referred to as an electronic device.
For electronic devices, methods for electrically connecting the connection electrodes of the electronic component to the patterned conductors of the mount substrate are broadly divided into two: a face-down bonding and a face-up bonding. In the face-down bonding, the electronic component is placed such that the surface of the electronic component having the connection electrodes formed thereon faces toward the mount substrate. On the other hand, in the face-up bonding, the electronic component is placed such that the surface of the electronic component having the connection electrodes formed thereon, faces away from the mount substrate. The face-down bonding is advantageous over the face-up bonding in terms of downsizing of the electronic device.
In general, according to a conventional method of manufacturing an electronic device employing the face-down bonding, after electrically connecting the connection electrodes of the electronic component and the patterned conductors of the mount substrate, an underfill material is filled in between the electronic component and the mount substrate to seal the portions where the connection electrode of the electronic component and the patterned conductor of the mount substrate are electrically connected to each other.
When a surface acoustic wave device is used as the electronic component, however, the aforementioned general method cannot be employed because of a problem typical of the surface acoustic wave device. The problem typical of the surface acoustic wave device derives from the fact that the surface acoustic wave device has interdigitated electrodes formed on a surface thereof. That is, while the surface acoustic wave device needs to be sealed in order to prevent the interdigitated electrodes from being contaminated by moisture or foreign materials such as dust particles, it is necessary to prevent a resin or the like for the sealing from touching the surface acoustic wave propagation region on the surface of the surface acoustic wave device so as not to adversely affect the operation of the surface acoustic wave device.
Therefore, in a conventional method for manufacturing an electronic device comprising a surface acoustic wave device as its electronic component, after the connection electrode of the surface acoustic wave device is electrically connected to the patterned conductor of the mount substrate, the surface acoustic wave device is enclosed and sealed with a cap-like structure formed of ceramics or metal. There is another method available for manufacturing an electronic device comprising a surface acoustic wave device as its electronic component. In this method, after the connection electrode of the surface acoustic wave device is electrically connected to the patterned conductor of the mount substrate, the surface acoustic wave device is enclosed and sealed with a side-fill material.
In each of Published Unexamined Japanese Patent Applications Heisei 10-125825, 2001-53092, and 2001-176995, disclosed is a method of manufacturing an electronic device comprising a chip-type electronic component mounted on a substrate.
According to the method disclosed in Published Unexamined Japanese Patent Application Heisei 10-125825, the chip-type electronic component is first mounted on the substrate through flip chip bonding. Then, the electronic component is covered with a sealing film made of a resin. Then, the film is pressed against the substrate at around the electronic component with a stamping die to adhere the film to the substrate, thereby sealing the electronic component with the film. In Published Unexamined Japanese Patent Application Heisei 10-125825, disclosed are two methods for adhering the sealing film to the substrate: one making use of adhesiveness of the film and the other employing an adhesive.
In the method disclosed in Published Unexamined Japanese Patent Application 2001-53092, the chip-type electronic component is first mounted on the substrate. Then, an adhesive is applied to areas of a flexible sheet and/or the substrate at which the sheet and the substrate are to be bonded to each other. The electronic component is then covered with the sheet. Then, a gas captured in a cavity defined by the sheet and the substrate is sucked through a small hole provided in the substrate. Thereafter, the sheet is pressed against the substrate using a shaping tool, thereby causing the adhesive to bond the sheet to the substrate.
In the method disclosed in Published Unexamined Japanese Patent Application 2001-176995, the chip-type electronic component is first mounted on the substrate. Then, a deformed film is placed onto the electronic component. A gas captured therebetween is sucked through a hole provided in the substrate to fit the deformed film onto the electronic component and adhere the deformed film to the substrate. In Published Unexamined Japanese Patent Application 2001-176995, disclosed are two methods for adhering the deformed film to the substrate: one employing an adhesive and the other making use of the thermo-adhering property of the deformed film.
Among the methods of manufacturing the electronic device comprising a surface acoustic wave device as its electronic component, the one in which the surface acoustic wave device is enclosed and sealed with a cap-like structure presents a problem in that it is difficult to downsize the electronic device. Another problem with this method is that it is impossible to improve the strength and stability of mechanical bonding between the connection electrode of the surface acoustic wave device and the patterned conductor of the mount substrate, because the aforementioned structure does not contribute to the mechanical bonding between the connection electrode of the surface acoustic wave device and the patterned conductor of the mount substrate.
Among the methods of manufacturing the electronic device comprising a surface acoustic wave device as its electronic component, the one in which the surface acoustic wave device is enclosed and sealed with a side-fill material has a problem in that the side-fill material can enter the surface acoustic wave propagation region on the surface of the surface acoustic wave device.
When the electronic device is an oscillator or a high-frequency circuit component, too, as in the case of the surface acoustic wave device, operation of the electronic component can be adversely affected by a sealing resin if the resin touches the surface of the electronic device. Accordingly, the aforementioned problems also arise when an oscillator or a high-frequency circuit component is used as the electronic component, as in the case of a surface acoustic wave device.
On the other hand, according to the methods disclosed in Published Unexamined Japanese Patent Applications Heisei 10-125825, 2001-53092, and 2001-176995, it is possible to seal the electronic component without causing the sealing resin or the like to touch the surface of the electronic component.
The method disclosed in Published Unexamined Japanese Patent Application Heisei 10-125825, however, involves mechanical driving of the stamping die, which requires large-scale equipment to manufacture the electronic device. The manufacturing process therefore becomes complicated.
The method disclosed in Published Unexamined Japanese Patent Application 2001-53092 involves a cumbersome step of applying an adhesive to the areas of the sheet and/or the substrate at which the sheet and the substrate are to be bonded to each other.
According to the method disclosed in Published Unexamined Japanese Patent Application 2001-176995, the deformed film is used to package the electronic component. In this publication, disclosed is a technique of fitting the deformed film onto the electronic component by suction through a hole provided on the substrate. However, the publication does not disclose that the film is deformed by the suction through the hole provided in the substrate. It is thus conceivable that the deformed film mentioned in this publication is a film that has been shaped in advance to fit the outer shape of the electronic component. Therefore, the method disclosed in Published Unexamined Japanese Patent Application 2001-176995 requires the step of preparing the deformed film, and this step is also cumbersome.
For a band pass filter employing a surface acoustic wave device, the center frequency of its passband is set, for example, at around 1800 MHz. In this case, a permissible shift of the center frequency of an actual filter from the desired center frequency is about +/−1.2 MHz at maximum. The band pass filter employing a surface acoustic wave device thus requires its center frequency to be set with extremely high accuracy.
On the other hand, in the case of manufacturing the electronic device through the steps of covering the surface acoustic wave device mounted on the substrate with a resin film, and then heating the film to thereby adhere the film to the substrate, there is a problem in that the processing for adhering the film may cause a change in characteristics of the surface acoustic wave device. This is conceivably because at the initial stage of heating the film at a high temperature, the volatile components in the resin of the film come out into the environment and deposit on the surface acoustic wave device. For a band pass filter employing a surface acoustic wave device, a change in the characteristics of the surface acoustic wave device can cause a shift of the center frequency in a passband of the filter, and a degradation in transmission characteristics of the filter such as an increase in the insertion loss, in particular.

Electronic device and manufacturing same