Enhancing the foam head on a bottled beverage where a pressurized container is housed within the neck of the bottle and above the level of the liquid and so arranged that upon opening of the bottle the pressurized container also opens to release the liquid stream therefrom initially to float on the top surface of the beverage in the bottle.

This invention relates to methods and apparatus for enhancing the foam based on a glass of beverage.
This invention particularly relates to beverages that are dispensed into drinking vessels and which in this process are provided with foam heads formed by release of gases contained in solution in the beverage prior to dispensing. The beverage may contain alcohol such as is found in dark or light beers and lagers or may be wholly or substantially alcohol free such as in carbonate soft drinks like ginger or other root beers, lemonade and the like or the so-called low alcohol beers.
The beverage may be dispensed by drawing from a bulk store such as a barrel or may be dispensed by emptying from individual containers such as a can or bottle containing a measured quantity of the beverage.
It is highly desirable, particularly for beers, to provide a dense foam head to the dispensed beverage in the drinking vessel, which head will be retained for long periods even during consumption of the liquid portion of the beverage, because the consumer relates foam or head retention and head density or quality to a high quality beverage.
The present invention is concerned with new and improved methods of and apparatus for enhancing foam heads on beverages.

Methods and apparatus for enhancing beverages


A nozzle includes a center body and a shroud circumferentially surrounding at least a portion of the center body to define an annular passage between the center body and the shroud. The nozzle further includes a bimetallic guide between the center body and the shroud. A method for supplying fuel to a combustor includes flowing a working fluid through a nozzle, injecting the fuel into the nozzle, and mixing the fuel with the working fluid to create a fuel and working fluid mixture. The method further includes swirling the fuel and working fluid mixture, sensing flame holding in the nozzle, and reducing the swirl in the fuel and working fluid mixture.

Combustors are commonly used in many forms of commercial equipment. For example, gas turbines typically include one or more combustors that mix fuel with a working fluid to generate combustion gases having a high temperature, pressure, and velocity. Many combustors include nozzles that premix the fuel with the working fluid prior to combustion. Premixing the fuel with the working fluid prior to combustion allows for leaner fuel mixtures, reduces undesirable emissions, and/or improves the overall thermodynamic efficiency of the gas turbine.
During normal combustor operations, a combustion flame exists downstream from the nozzles, typically in a combustion chamber at the exit of the nozzles. Occasionally, however, an event referred to as "flame holding" occurs in which a combustion flame exists upstream of the combustion chamber inside the nozzles. For example, conditions may exist in which a combustion flame exists near a fuel port in the nozzles or near an area of low flow in the nozzles. Nozzles are typically not designed to withstand the high temperatures created by flame holding, and flame holding may therefore cause severe damage to a nozzle in a relatively short amount of time.
Various methods are known in the art for preventing or reducing the occurrence of flame holding. For example, flame holding is more likely to occur during the use of higher reactivity fuels or during the use of higher fuel-to-working-fluid ratios. Flame holding is also more likely to occur during operations in which the fuel-working fluid mixture flows through the nozzles at lower velocities. Combustors may therefore be designed with specific safety margins for fuel reactivity, fuel-to-working-fluid ratios, and/or fuel-working fluid mixture velocity to prevent or reduce the occurrence of flame holding. While the safety margins are effective at preventing or reducing the occurrence of flame holding, they may also result in reduced operating limits, additional maintenance, reduced operating lifetimes, and/or reduced overall thermodynamic efficiency. Therefore, a nozzle, combustor, and/or method for operating the combustor to respond to flame holding would be desirable.

System and method for a combustor nozzle


A computing cooling system includes a chassis having chassis air inlet(s) and outlet(s). Heat dissipation device(s) thermally coupled to heat producing component(s) are located in the chassis adjacent the chassis air outlet(s). A first fan device located in the chassis adjacent the chassis air inlet(s) pulls first air from outside the chassis into the first fan device via the chassis air inlet(s), and pushes the first air though the heat dissipation device(s) and out of the chassis via the chassis air outlet(s). A second fan device located in the chassis adjacent the chassis air inlet(s) pulls second air from outside the chassis into the second fan device via the chassis air inlet(s), pushes a first portion of the second air past the heat dissipation device(s) and out of the chassis via the chassis air outlet(s), and pushes a second portion of the second air into the chassis.

The present disclosure relates generally to information handling systems, and more particularly to cooling high-performance information handling systems.
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems such as, for example, laptop/notebook computing devices, may be configured to perform relatively high-performance computing operations that generate relatively high amounts of heat. For example, the rise of electronic Sports (eSports), the expansion of Massively Multi-player Online (MMO) gaming, and other gaming innovations and trends have expanded the demand for relatively high-performance gaming laptop/notebook computing devices that produce relatively high amounts of heat, and thus require advanced thermal designs that cool those laptop/notebook computing devices appropriately to ensure their operation and comfortable use. Furthermore, smaller/thinner laptop/notebook computing devices tend to differentiate a laptop/computing device platform from its competitors, but the relatively high performance/high about of heat generated by gaming laptop/notebook computing devices limit the degree to which those gaming laptop/notebook computing devices can be reduced in size due to the thermal/cooling complications that result.
Accordingly, it would be desirable to provide a high-performance computing cooling system that addresses the issues discussed above.

High-performance computing cooling system


Non-destructive testing system performs accurate testing as to whether lamination joining portion of different metal materials is in strong joining state by secure metal joining. The system sets a lamination joining portion of different metal materials of a work to a certain position and angle. Laser light in certain waveform is applied to lamination joining portion surface to capture images by infrared camera, and data processing device obtains infrared images. Based on infrared images, Fourier transform is performed on each pixel of infrared images, and phase image is created by console device. Based on created phase image, effectiveness/defectiveness of joining is determined. In this non-destructive testing, whether reflection by vertical wall in vicinity is significant is determined, based on intensity of infrared images obtained immediately after irradiation with laser and angle between laser light optical axis and testing part surface is finely adjusted to obtain infrared images with less noise.

1. Field of the Invention
The present intention relates to a non-destructive testing system, and particularly relates to a non-destructive testing system that performs non-destructive testing of a joining portion (lamination joining portion) formed by joining lamination of different metal materials or the like.
2. Description of the Related Art
Conventionally, there is known a technology for joining different metal materials in lamination, for example, by resistance spot welding, friction stir welding, or the like.
Patent Document 1 (Japanese Patent Application Laid-Open No. 2009-00700) discloses such a joining method and a joint structure of different metal materials.
Further, as a non-destructive testing method, Patent Document 2 (Translation of PCT Application JP-T-2010-513883) discloses a technology in which a melted portion and a non-melted portion enclosing the melted portion of a material joining portion is heated temporally, for example, in a pulse form of a rectangular wave or in a sine waveform with a certain cycle to obtain thermal images (corresponding to 'infrared images' in the present invention) transmitted through the material joining portion, and to detect presence or absence of a melted portion.
Still further, Patent Document 3 (Deutsche Patent Application Laid-Open No. 102008030691A1) discloses a technology for non-destructive testing in which the thickness of foreign matter present inside a testing object is detected by infrared lock-in thermography and a technology for a non-destructive testing apparatus using the technology for non-destructive testing. Patent Document 3 also discloses that the thickness of a foreign matter can be detected as follows. That is, heating is performed in a rectangular waveform or a sine waveform at different frequencies, and pixels of thermal images (corresponding to 'infrared images' in the present invention) obtained with the certain cycle are subjected to computation so as to obtain phase images for the respective frequencies. The thickness of a foreign matter can be detected, based on the respective phase images.


A valve plate assembly (1) of a hydraulic axial piston machine is described, the valve plate assembly comprising a wear plate (2) made of a ceramic material surrounded by a compression ring (4). Such a valve plate assembly should be produced and maintained in a cost-effective manner. To this end, the wear plate (2) is connected to a support plate (3) by means of the compression ring (4).

Such a valve plate assembly is known, for example, from U.S. Pat. No. 10,094,364 B2.
In a hydraulic axial piston machine a cylinder block rotates in a housing. The cylinder block is provided with a number of cylinders. In each cylinder a piston is moveable up and down. One end of the piston bears a slide shoe which slides over a swash plate and is held in contact with the swash plate by means of retainer means. A valve system is arranged at the other end of the cylinder drum. The valve system comprises a valve plate assembly rotating with the cylinder block and a stationary part which is fixed to the housing.
When oil is used as hydraulic fluid, there is usually no problem with friction between moving parts. However, when liquids are used which do not have a lubricating effect, like water, the problem of friction has to be solved by other means.
One possibility is to use special plastic materials, like PEEK (Polyetheretherketone). However, a plastic material is not very resistant to wear caused by particles in the pumped fluid.
To overcome this problem, it is attractive to form the tribological surface from a ceramic material with high wear resistance and a low coefficient of friction under fluid lubricated conditions.
It is, however, difficult to bring the ceramic material in the desired form.


The present invention is directed to color display devices in which each display cell is capable of displaying three color states. The display fluid filled in the display cells comprises two types of pigment particles. The color display device may further comprise a brightness enhancement structure on its viewing side.

U.S. Pat. No. 7,046,228 discloses an electrophoretic display device having a dual switching mode which allows the charged pigment particles in a display cell to move in either the vertical (up/down) direction or the planar (left/right) direction.
In such a display device, each of the display cells is sandwiched between two layers, one of which comprises a transparent top electrode, whereas the other layer comprises a bottom electrode and at least one in-plane electrode. Typically, the display cells are filled with a clear, but colored dielectric solvent or solvent mixture with charged white pigment particles dispersed therein. The background color of the display cells is preferably black. When the charged pigment particles are driven to be at or near the transparent top electrode, the color of the particles is seen, from the top viewing side. When the charged pigment particles are driven to be at or near the bottom electrode, the color of the solvent is seen, from the top viewing side. When the charged pigment particles are driven to be at or near the in-plane electrode(s), the color of the display cell background is seen, from the top viewing side. Accordingly, each of the display cells is capable of displaying three color states, i.e., the color of the charged pigment particles, the color of the dielectric solvent or solvent mixture or the background color of the display cell.
The dual mode electrophoretic display, according to the patent, may be driven by an active matrix system or by a passive matrix system.
Alternatively, a color display may be achieved by a red/green/blue (RGB) system, in which each pixel is broken down into three or four sub-pixels and each sub-pixel has a red filter, blue filter, green filter or no filter over a black and white reflective medium. By selectively turning sub-pixels on or off, a full color spectrum may be achieved.


A flanged outlet, such as an electrical outlet box is provided for installation on an exterior wall of a building. The outlet has laterally enclosing walls the interior surfaces of which define an opening therewithin. The opening faces outwardly away from the exterior building wall. The box has a unitary integrally formed flat flange that extends laterally from the exterior surfaces of all of the walls about the entire perimeter of the outwardly facing opening. The flange is located behind the outlet opening. The flanged outlet can be employed in conjunction with upper and lower sheets of waterproof material, such as the waterproof black paper that is used to provide a moisture barrier in conventional building construction. A lower sheet of waterproof material resides between the flange of the outlet and an outwardly facing building surface and extends downwardly from beneath the outwardly facing opening of the outlet. An upper sheet of waterproof material is fastened to the outwardly facing building surface above the outlet flange. Moisture is thereby carried down the outer surfaces of the waterproofing sheets, and cannot penetrate to the interior of the building through openings defined therein to accommodate the outlet of the invention.

1. Field of the Invention
The present invention relates to an outlet adapted for installation on an exterior wall of a building wherein the outlet has a unitary, integrally molded flat flange extending thereabout.
2. Description of the Prior Art
In the construction of buildings exterior wall outlets are frequently required. Such outlets are typically formed to house electrical sockets which are accessible from the outside of a building. Other types of outlets, such as plumbing hose bibs, dryer vents, and the like are also provided.
Conventional commercial and residential structures typically have outer walls formed of stucco, wood siding, shingle siding, aluminum siding or brick. Although building walls are constructed with the objective of creating a wind proof and water tight structure, very frequently a certain amount of precipitation can penetrate the outer structures of the walls, such as through cracks between siding boards or panels and by porous seepage through stucco.
To waterproof a building during the initial building construction the framework of the building is normally swathed with overlapping horizontally oriented strips of a waterproofing material, such as construction grade black paper. This black paper does provide a waterproof barrier or skin within the confines of the outer wall structure and is designed to provide an impenetrable barrier to precipitation. However, in order to provide access from outside the building to external wall outlets holes must be cut in the black paper. Each such hole represents a possible source of water penetration into the interior of the building at the location of each exterior wall outlet.
A conventional exterior outlet has the disadvantage of not being waterproof. For example, stucco is somewhat porous so that water can seep in behind the stucco and run down the outer surface of the horizontally overlapping layers of waterproof black paper. The black paper keeps the water from entering the interior of the building structure until the water reaches an opening in the black paper which has been cut to accommodate an exterior wall outlet. At that location water dripping down the outside of the black paper drops onto the top of an outside wall outlet and can flow across the top of that outlet structure inwardly toward the interior wall. In a standard exterior wall outlet box the water drips off of the black paper and runs inwardly, generally horizontally along the top of the outside outlet, and seeps into the interior of the building. The interior walls of the building are thus subjected to water damage, and significant safety hazards are created. For example, if the water enters an electrical outlet box it can create a short circuit and the danger of either fire or electrical shock.

Waterproof flanged exterior wall outlet secured to a building framework


The invention describes a multiple lamp balance transformer and a drive circuit. The multiple lamp balance transformer has two magnetic cores with a closed magnetic flux path and two coils wound around the closed magnetic flux path. The two coils have the same number of windings. The impedance property of the coil and Lenz's Law are used to balance the operating current of the lamps connected to the coils. The drive circuit has a multiple lamp balance transformer connected to several lamps, and a boost transformer uses a controller to supply the current and voltage to the lamps. A current detect/protect circuit connected to the coils and the controller detects the current passing through the coils and converts the operating current of the lamp into a voltage to be sent to the controller, so that the controller controls and provides sufficient power to the lamps.

1. Field of the Invention
The present invention relates to a multiple lamp balance transformer and a drive circuit, and more particularly to a transformer and a drive circuit used in a lamp equalizing circuit of a cold cathode fluorescent lamp (CCFL).
2. Description of Related Art
A cold cathode fluorescent lamp (CCFL) is generally used as a light source of a backlight module for liquid crystal display (LCD) panels. The CCFL is driven by a drive circuit of an inverter. Due to technological advancements and consumer requirements, the size of an LCD panel becomes increasingly larger and a single lamp no longer satisfies the illumination requirements thereof. Therefore, two or more lamps are needed. To assure an even brightness for the LCD panels, it is necessary to adjust the current of each lamp constantly, so that the current passing through each lamp is equal. Since the height of the CCFL varies and the CCFL has negative impedance, it is difficult to maintain consistent impedance for all lamps. As a result, the impedance of each lamp varies and the current cannot be equalized. If the currents between the lamps are not equal, the brightness will be uneven. An excessively large current will shorten the life of the lamps, and will result in a different aging rate of each lamp.
Reference is made to FIG. 1, which is a circuit diagram for using two independent balance transformers to balance the current of four CCFLs. In FIG. 1, a controller 10 supplies currents I1, I2, I3, I4 with a voltage required by a lamps L1, L2, L3, L4 through a boost transformer Tr to emit light. By adopting the impedance of the coil of a balance transformer as well as following Lenz's law, the operating currents passing through the lamps and the coils are balanced. If the currents I1, I2, I3, I4 are equal, the currents passing through each coil of the balance transformers T1, T2 are equal. Thus, the magnetic motive forces produced separately by the currents I1, I2 at the coil of the balance transformer T1 and the currents I3, I4 at the coil of the balance transformer T2 are equal and these magnetic motive forces cancel each other. As a result, there will be no magnetic flux between the balance transformers T1, T2. The leakage flux produced in each of the balance transformers T1, T2 passes through an air gap on the external side to complete a circuit. Since the magnetic resistance of the air gap is very high, the inductance effect caused by this circuit is negligible.
Further, a voltage detect/protect circuit 20 picks up the operating currents I1, I2, I3, I4 of the lamps and converts these operating currents I1, I2, I3, I4 into a voltage to be sent to the controller 10. The controller will then control and adjust the power output and supply the required voltage to the operating currents I1, I2, I3, I4 for emitting light currents according to an error signal.
However, only the currents I1, I2 or the currents I3, I4 of the prior art can be balanced independently, and the quantity of balance transformers used is increased according to the increase of the quantity of lamps. From FIG. 1, if it is necessary to drive four lamps, then two balance transformers T1, T2 are needed. Such arrangement not only increases the size of the whole drive circuit, but also increases the cost thereof, and wastes manpower and working hours for assembly.

Multiple lamp balance transformer and drive circuit

Lien Chang Electronic Enterprise Co., Ltd.


In at least some embodiments, a system, comprises a first computing unit having a first type of processors. The system further comprises a second computing unit having a second type of processors, the second computing unit being coupled to the first computing unit. The first and second computing units are configured to provide parallel processing of an application based on an algorithm that distributes work evenly to a plurality of threads. The number of the threads assigned to each of the first and second computing units is based on a number of processors associated with each of the first and second computing units and a per-processor performance of the first and second computing units.

There are different types of parallel applications. For example, computationally intensive applications (i.e., the application directs a processor to perform computational operations) are one type of parallel applications.
Parallel processing can be performed by two categories of systems. A "homogeneous" system implements one or more computers having the same type of processor and a "heterogeneous" system implements one or more computers having at least two types of processors (e.g., two different homogeneous systems may be combined to create a heterogeneous system). In either case, the parallel execution of an application workload by a plurality of processors improves system performance if the time needed to distribute and execute the workload for a plurality of parallel processors is less than the time needed to execute the workload for a single processor.
New or changing heterogeneous systems may be created over time. For example, an organization may purchase a computer having a first type of processor at one time, and at a later time, purchase another computer having a second type of processor. The organization may dynamically choose to configure the two computers to process applications as separate systems or to process applications as a heterogeneous system. In heterogeneous systems, efficiently distributing application workloads for parallel processing becomes more complicated due to the different capabilities of processors. For example, distributing the same amount of work to different processors of a heterogeneous system may result in under-utilization of some of the processors (e.g., the faster processor may be under-utilized). The under-utilization of processors reduces the performance of parallel processing.
To address this issue, at least some applications that are run on heterogeneous systems implement algorithms that assign more work to the thread of a faster processor. However, the time, cost and effort needed to design, test and implement such algorithms for new or changing heterogeneous systems are undesirable.

Dynamic performance ratio proportionate distribution of threads with evenly divided workload by homogeneous algorithm to heterogeneous computing units

Hewlett-Packard Development Company, L.P.


An apparatus for trimming sharp edges from a non-round workpiece having a contour includes a member for trimming the workpiece by impinging a stream of heated gaseous medium on the workpiece; a member for holding the workpiece, the member for holding being rotatably mounted relative to the member for trimming relative to the member for holding; and a cam for guiding the member for trimming, the cam cooperating the member for holding with the member for trimming so that the member for trimming follows the contour of the workpiece when the member for holding is rotated relative to the member for trimming.

The invention relates generally to the field of molding of plastic articles and, more particularly, to a method and apparatus for trimming molded plastic articles.
Procedures for blow molding double wall plastic articles typically involve the formation of flash or excess material around the perimeter of the part being formed. This flash is pressed thin, or "pinched off" by means of metal to metal contact areas of the opposing mold halves, at the mold parting line and adjacent to the mold cavity or cavities. This pinchoff area is typically relatively wide, on the order of 0.025 to 0.050 inches. When the flash is torn or cut from the molded part, a significant amount of the pinched flash remains attached to said part and must be subsequently removed by mechanical trimming.
In response to the pinchoff problem, a mold construction was developed which is known as "zero land" construction whereby the amount of flash is greatly reduced. However, when the flash is removed from the part, the remaining parting line edge is sharp. This sharp edge is unacceptable in some instances. For example, plastic cases manufactured to hold children's toys cannot have sharp edges due to the risk of injury to children.
In both of the above processes, pinchoff and sharp edges have traditionally been removed by hand with a knife. This hand trimming causes several problems, such as the direct increase in labor cost, inconsistent trimming quality and the possibility of repetitive motion syndrome in the wrists of the hand trimmers.
Another approach has been to heat trim the edges of "zero land" molded articles with a hand held propane torch. This method produces acceptably rounded edges of the articles but still involved the above-described problems associated with hand trimming.
It is therefore desirable to trim blow molded plastic articles in a procedure which does not involve substantial additional labor costs, which produces consistent quality trimming, and which does not pose the risk of injury to operators.
U.S. Pat. Nos. 5,273,422 and 5,431,865 assigned to the assignee of the present application provide an excellent alternative for addressing the foregoing problems in the industry. However, each of these patents, as well as the use of a hand torch, involve the use of a torch for impinging a flame on the workpiece, and therefore require a source of fuel such as propane and the like for the torch. Keeping and using such fuel, however, leads to apprehension in personnel as well as additional precautions which must be taken to ensure safe storage, handling and use of highly combustible materials.
It is therefore the primary object of the present invention to provide an apparatus for trimming blow molded plastic articles which does not involve the use of flame and highly combustible fuel materials.
It is a further object of the present invention to provide an apparatus for trimming plastic articles which produces consistent quality trimming of sharp edges of plastic molded articles.
It is still a further object of the present invention to provide an apparatus for trimming molded plastic articles which does not involve repetitive hand motions of operators and which, therefore, does not pose the risk of repetitive motion syndrome.
It is another object of the present invention to provide an apparatus for trimming which protects hinge portions and other areas of the article during trimming.
Other objects and advantages will become apparent to those skilled in the art upon a consideration of the following disclosure of the invention.

Apparatus for hot fluid trimming of plastic molded articles


Signal area efficiency in integrated circuit designs is improved by increasing the information efficiency of signal wiring on an integrated circuit. Candidate signals are selected for combination by prioritizing signals according to length of travel, travel path, and information content. Signals with low information content and with greater distance between endpoints make poor utilization of fixed wiring and provide the best candidates for improvement. Candidate signals which travel similar (substantially parallel) paths from point to point across the integrated circuit are combined to improve chip area utilization efficiency. A variety of techniques are described for combining low-information-content signals onto a small number of wires, transmitting them over the small number of wires, and re-expanding them at their destination. Assuming that the combining/expanding circuitry occupies less space than the point-to-point wiring which would otherwise be required, there is a net reduction in chip area. One aspect of the invention is directed to using auto-routing switching techniques for combining signals. Another aspect is directed to applying these combining/expanding techniques to the integrated circuit design process.

Since the introduction of integrated circuitry some decades ago, integrated circuit technology has progressed steadily to provide continually increasing integrated circuit density and speed, while lowering power consumption. As a result, extremely complex integrated circuit designs have become possible, sometimes including up to millions of transistors. There is no indication that this trend towards higher density and speed in integrated circuits will abate, or reverse, at any time in the foreseeable future.
As the ability to increase logic capacity (density) of modern integrated circuitry has grown, so has the complexity of modern logic designs. Associated with such increased logic complexity and logic density, however, is a similar increase in interconnection density (i.e., the interconnections between logic elements on an integrated circuit chip.) Generally, the greater the number of logic elements which are employed in a logic design, the greater the number of logic signals which interconnect them. These interconnections can often occupy large areas on an integrated circuit die (semiconductor die), particularly when large busses and complex logic blocks are employed in the design of the integrated circuit.
In attempting to improve interconnection efficiency, designers will often employ multiplexing techniques or large parallel busses between logic blocks. FIGS. 1a and 1b are representative of these techniques.
FIG. 1a is a block diagram of a multiplexed circuit 100a wherein three logic blocks 110a (LOGIC BLOCK #1), 110b (LOGIC BLOCK #2) and 110c (LOGIC BLOCK #3) are interconnected via a multiplexer 120 (NUX). Well known in principle to those of ordinary skill in the art, the multiplexer 120 selects either the "n" input signals on lines 115a or the "m" input signals on lines 115b based upon the state of a selection signal (not shown), and presents the selected signals (115a or 115b) on its "k" output lines 115c to the block 110c, where "k", "m", and "n" refer to a number of signals being carried on lines 115c, 115b and 115a, respectively. In the example given, "k" must be a number which is at least as large as the greater of "m" and "n". By the use of the multiplexer 120, LOGIC BLOCK #3 110c can be caused to receive signals (115a, 115b) from either LOGIC BLOCK #1 110a or LOGIC BLOCK #2 110b, at any given time. Assuming that the multiplexer 120 (MWX) is located on the integrated circuit chip close to LOGIC BLOCK #1 110a and LOGIC BLOCK #2 110b, then the area required for signal routing is reduced by limiting the number of signals (i.e., "k" rather than "n+m") which must be routed to LOGIC BLOCK #3 110c.
FIG. 1b is a block diagram of a system (design) 100b employing a plurality of logic blocks 125a, 125b, 125c, and 125d interconnected by a common bus 135a. Bus buffers 130a, 130b, 130c, and 130d between the logic blocks 125a, 125b, 125c, and 125d, respectively, and the bus 135a provide means by which the logic blocks can receive data from the bus 135a and place data on the bus 135a. The bus buffers 130a, 130b, 130c, and 130d are designed and controlled such that only one bus buffer will drive (place data on) the bus 135a at any time. The logic blocks associated with the bus buffers (130a, 130b, 130c, or 130d) which are not driving the bus can receive the data which is being driven onto the bus. By bussing groups of common signals between logic blocks, wiring efficiency is improved as compared to providing discrete non-shared connections between the logic blocks.
Unfortunately, large busses can still occupy a great deal of chip area, particularly when a large number of logic blocks are interconnected by the bus. Chip space must be allocated for routing the bus to each of the logic blocks. If a logic block uses the bus infrequently, then the benefit received from the chip area utilized to connect the logic block is low.
Multiplexing and bus-connection techniques are effective in reducing the number of signal connections between logic blocks, but are largely ineffective in improving either information efficiency or utilization of the signal wires themselves. For example, for slowly changing digital signals (i.e., digital signals which change state only infrequently), information is conveyed only when the signals change from one state to the another (i.e., if the state of a signal is already known, then there is no significant benefit in retransmitting the state of the signal until it changes state). Since the bus connections and multiplexed connections described above are static connections (i.e., fixed), they occupy space but provide no benefit when they are idle (i.e., when the signal values carried thereon are unchanging). The following U.S. Patents are incorporated by reference herein: U.S. Pat. Nos. 4,639,620; 4,755,765; 4,855,999.; 4,939,729; 5,012,126; 5,045,714; 5,241,224; and 5,260,610.

Integrated circuit device having a switched routing network


Technologies for measuring a hydration level of a user includes a hydration measurement device having an arm position sensor and one or more reflectance sensors. The hydration measurement device generates sensor data indicative of a position of a user's arm using the arm position sensor. The hydration measurement device performs reflectance measurements with the reflectance sensor(s) at a first position that is determined based on the sensor data and a second position that is raised relative to the first position that is also based on the sensor data. The hydration measurement device determines a hematocrit of the user's blood based on the reflectance measurements and determines a hydration level of the user based on the determined hematocrit. Other embodiments are described and claimed.

Wearable compute devices are increasingly equipped with various sensors to monitor the health of the user. Such wearable compute devices may come in many different form factors such as a smart bracelet, smart watch, a wearable monitor, or the like. Furthermore, these wearable compute devices are increasingly used during athletic endeavors. During these endeavors the user's hydration level fluctuates based upon many different factors including but not limited to the user's exertion, weather, and the user's hydration. Monitoring of the user's hydration is important because dehydration may lead to reduced performance and heat intolerance.
During certain circumstances, measuring a user's hydration while performing an athletic endeavor may have its challenges. For example, sweating, rehydration, and a requirement for a user to be stationary may lead to inaccurate measurements while the user is performing the athletic endeavor.

Technologies for measuring hydration level of a user


A molded structural-wood-fiber product is disclosed that is formed in three dimensions under conditions of heat and pressure. The molded product has the form of a single-piece wood-fiber web consisting of corrugations having indentations along the ridges of the corrugations on both sides of the web. Sheet facings may be applied to one or both sides of the fiber web to form a stiff, lightweight composite panel that has similar stiffness both along and across the corrugations. Several fiber webs or composite panels may be bonded together in stacked configurations to produce high-strength, light-weight panels, beams or platforms for heavy-duty applications. The unique structure of the three-dimensional fiber web permits straightforward high-speed manufacture using a rigid mold and one-dimensional pressing forces. Specific items that can be manufactured utilizing the fiber web and composite panels include pallets, bulk bins, heavy-duty boxes, shipping containers, wall panels, roof panels, cement forms, partitions, poster displays, reels, furniture, caskets, and doors.

A wide variety of forest products are manufactured from wood fibers. The present invention focuses upon a class of wood-fiber products that are molded in three dimensions under conditions of heat and pressure to produce a structural wood fiber web that serves as the principal structural component of composite structural-fiberboard panels. The geometry of the web of the present invention permits the use of straightforward mass-production techniques, utilizing a simple rigid mold that may be pressed together with one-dimensional forces. When the fiber web is bonded to sheet coverings or facings to produce a composite panel product, the composite structure forms a strong, lightweight, rigid three-dimensional truss. The prior art does not disclose a wood-fiber structure of the form of the invention nor does the prior art show fiberboard structures having three-dimensional features that may be so readily mass-produced in a wide range of overall board thickness.
In the prior art, methods and apparatus are disclosed for forming various other fiberboard products having three-dimensional elements. For example, Setterholm and Hunt in U.S. Pat. No. 4,702,870 describe a method and apparatus for forming three-dimensional structural components from wood fiber. Their method and apparatus require the use of a resilient mold insert to form three-dimensional features in the finished fiberboard product. The resilient mold insert is most commonly composed of an array of elastomeric protuberances. The elastomers are attached to a rigid support plate.
Elastomers are weak and difficult to attach firmly to the support plate. In mass-production of wood-fiber products, elastomeric mold elements exhibit problems with compression-set and relatively rapid deterioration under the heat and pressure necessary for product consolidation and drying. As a result, the elastomeric mold elements have a relatively short lifetime and need to be frequently replaced in high-speed production facilities. In addition to short mold lifetimes, the three-dimensional fiberboard objects disclosed in the invention of Setterholm and Hunt are limited to objects having a flat face, backed by webs extending approximately normal to the flat face.
Heat transfer from the resilient mold insert of Setterholm and Hunt to the fiber mat is slow because of the low thermal conductivity of the elastomeric elements of the mold inert and because of long thermal-conduction pathways to regions of the fiber between the elastomeric mold elements. Slow heat transfer results in long drying times within the press, a major problem for this method, particularly for thick products. Drying speed may be increased using radiowave heating of the fiber mat, but this increases the complexity and cost of equipment used to form and dry the fiberboard products.
Thus, the invention of Setterholm and Hunt reveals the structure of a very specific wood fiber product that is formed using a method and an apparatus that are not readily adapted to high-speed mass-production, particularly in the case of thick panel products. As will become apparent in the next several sections, the present invention defines a new fiber structure that may be used in many of the same applications as the invention of Setterholm and Hunt, yet without the drawbacks in product formation and mass-production encountered with the invention of Setterholm and Hunt.
A process for making grids from fibers, described by Hunt in U.S. Pat. No. 5,277,854, also uses the idea of a resilient mold insert which is capable of forming objects in three-dimensions. Because of the use of a resilient mold insert, this invention suffers from the same difficulties as does the invention of Setterholm and Hunt. In addition, while the mold insert of Hunt is capable of generating three-dimensional forces, it is used to generate a fiber product that has generally two-dimensional features only.
In U.S. Pat. Nos. 5,198,236 and 5,314,654, Gunderson and Gleisner describe a method and apparatus that uses a rigid mold to form three-dimensional features in structural fiberboard products. Once again, the fiberboard products disclosed in their patent are limited to flat-faced objects backed by webs extending approximately normal to the flat face. In addition, the rigid mold elements disclosed by Gunderson and Gleisner must be retracted during consolidation of the fiber. In U.S. Pat. No. 5,314,654, a second forming step is required using a resilient mold insert similar to that of Setterholm and Hunt. Therefore, formation of the structural fiberboard product disclosed by Gunderson and Gleisner suffers from the same difficulties as have been pointed out for the invention of Setterholm and Hunt. In addition, the need for retractable mold elements makes this method complex and expensive.
Prior art disclosed in U.S. Pat. No. 5,316,828, by Miller, reveals a reinforced fluted medium and corrugated fiberboard that has increased strength and stiffness in comparison to conventional corrugated fiberboard due to the addition of three-dimensional elements in a simple corrugated fiberboard structure. The three-dimensional elements take the form of adhesive material applied along lines that are transverse to the flutes. The adhesive at least partially fills in and bridges across the valleys of the flutes, holding the corrugated board more rigid under compressive and bending stresses both along the corrugations and across the corrugations.
The invention requires two distinct materials, wood fiber and adhesive, to form the basic structure of the product. The structure of Miller is therefore not formed as a single piece and would require multiple manufacturing steps. In addition, considerable adhesive would be required to fill in the valleys to the top of the flutes. The adhesive could fill in and bridge only a small portion of the flutes in thick corrugated boards, making the technique ineffective for thick corrugated panels. Finally, application of adhesive to both sides of the fluted medium would increase product weight and material cost, and complicate board manufacture.
In U.S. Pat. No. 4,726,863, Cline describes a method for making a high-strength composite paperboard panel. The panel is composed of an undulated midstratum layer to which are adhesively bonded an underlayer and an overlayer. There is no variation of the structure along the flutes formed by the undulations, making the structure generally two-dimensional and placing it in a different structural class than the present invention. Because of its two-dimensional structure, which is similar to the structure of conventional corrugated boards, the panel product disclosed by Cline has less strength and stiffness across the undulations compared to along the undulations.
In summary, numerous composite wood-fiber panel products are described in the prior art. Only a few of these products are comprised of three-dimensional elements which produce fiberboard panels having high strength-to-weight ratios and approximately equal strength and stiffness in all directions within the plane of the panels. The prior art disclosures of three-dimensional elements in fiberboard panels all suffer from significant difficulties in production of thick panels and in mass-production at high-speeds. These difficulties have impeded implementation of much of the prior art by the fiberboard industry and end-users. The present invention overcomes these difficulties by defining a new three-dimensional wood-fiber structure that has excellent strength-to-weight properties, and yet it can be readily mass-produced in the form of both thin and thick panels.

Molded wood fiber web and structural panels made utilizing the fiber web


A respiratory mask has an adjustable forehead support member that is simple and inexpensive to manufacture. The forehead support member may be adjusted by rotating a forehead pad about an off-center bore or by bending an angular adjustment beam. The mask has a mask cushion with an accordionate membrane having at least two hinged portions. The mask may be constructed with a mask frame, the mask cushion, and the forehead support member molded as one piece.

CPAP treatment is a common ameliorative treatment for breathing disorders including OSA. CPAP treatment, as described in U.S. Pat. No. 4,944,310, provides pressurized air or other breathable gas to the entrance of a patient's airways at a pressure elevated above atmospheric pressure, typically in the range of 4-20 cm H2O. It is also known for the level of treatment pressure to vary during a period of treatment in accordance with patient need, that form of CPAP being known as automatically adjusting nasal CPAP treatment, as described in U.S. Pat. No. 5,245,995.
NIPPV is another form of treatment for breathing disorders that can involve a relatively higher pressure of gas being provided in the patient mask during the inspiratory phase of respiration and a relatively lower pressure or atmospheric pressure being provided in the patient mask during the expiratory phase of respiration. In other NIPPV modes, the pressure can be made to vary in a complex manner throughout the respiratory cycle. For example, the pressure at the mask during inspiration or expiration can be varied through the period of treatment.
Typically, the ventilation assistance for CPAP or NIPPY treatment is delivered to the patient by way of a nasal mask. Alternatively, a mouth mask full-face mask or nasal prongs can be used.
In this specification, any reference to CPAP treatment is to be understood as embracing all of the above-described forms of ventilation treatment or assistance.
A CPAP apparatus broadly includes a flow generator for supplying a continuous source of pressurized air or other breathable gas. Such a flow generator is typically a stand-alone unit having an electric motor driving a blower and is typically controlled by a servo-controller under the control of a microcontroller unit. Alternatively, other supplies of pressurized gas can be used. The flow generator is connected to the mask by a gas supply conduit or tube to supply the pressurized gas to an interior of the mask. The mask or gas supply conduit generally includes a venting system to vent exhalation gases from the interior of the mask to the atmosphere. The mask is normally secured to the wearer's head by a headgear or straps. The straps are adjusted with sufficient tension to achieve a gas-tight seal between the mask and the wearer's face. The mask generally includes a forehead support to rest against the user's forehead to support and stabilize the mask with respect to the user's face and prevent the mask from exerting undue pressure on the user's nose when the straps are tensioned. Examples of nasal masks are shown in U.S. Pat. Nos. 4,782,832 and 5,243,971.
One problem that arises with the use of masks is that a single shape of mask must be utilized for a large variety of users having differently shaped and sized heads and facial regions. Therefore, it is desirable for the forehead support to be adjustable to alter an extension between a forehead contacting portion of the forehead support and the mask frame, thereby accommodating a variety of users with a single mask configuration, while maintaining a comfortable fit and gas-tight seal for each user. Additionally, an adjustable forehead support can be adjusted to position the gas supply conduit in a desired position with respect to the user, such as to prevent the gas supply conduit from contacting the wearer's forehead or face and causing discomfort to the user.
Adjustable forehead supports are known. See, for example, the adjustable forehead supports disclosed in U.S. Pat. No. 6,119,693 to Kwok et al. and PCT International Patent Application Publication No. WO 00/78384 to Kwok et al., both assigned to the assignee of the present application. Both references disclose effective, durable forehead support mechanisms. However, these mechanisms require several components that increase the expense of manufacturing such mechanisms and make the mechanisms more appropriate for masks that will be used over an extended period of time, generally 3-6 months. Such mechanisms are relatively costly to use with masks intended for single or short-term use.
There are circumstances where an inexpensive, disposable short-term use mask is appropriate. For instance, such a mask might be appropriate under CPAP testing conditions where the testing is expected to last only a few days or weeks. Such a mask might also be used for patients admitted to hospitals for short-term stays. Extended use masks require periodic disassembly, cleaning and disinfecting, and reassembly to maintain sanitary conditions. The use of a disposable mask can eliminate such mask maintenance during extended treatment. Instead of performing the mask maintenance at the periodic intervals, a user can just dispose the disposable mask at the proper intervals and use a new disposable mask. However, for it to be generally desirable to use a disposable mask in such extended term treatment, the cost of the mask must be sufficiently low so as to compare favorably economically with the overall cost of an extended use mask, including the cost of the extended use mask, as well as the time required and nuisance of the periodic maintenance of the extended use mask.
Thus, there is a need for an inexpensive short-term use mask for providing breathable gases to a patient, as during CPAP treatment. To accommodate a large variety of users comfortably with a single mask configuration and maintain a gas-tight seal for each user, the mask should include a simple, easy to use adjustable forehead support mechanism. The mask should be inexpensive enough to be disposable during extended term CPAP treatment while comparing favorably economically to the use of an extended term mask. The mask should also be inexpensive enough to justify single-use. It is an object of the present invention to provide such a mask.

This patent is subject to a terminal disclaimer.

Mask with integral cushion and forehead piece


A catalyst enables hydrosilylation of aliphatically unsaturated carbon-carbon bonds by silicon-bonded hydrogen to be conducted rapidly in water. The catalyst provides a rapid method of carrying out hydrosilylation in water. An emulsion form of catalyst includes a dispersion in water of liquid catalyst, the main component of which is a platinum and alkenylsiloxane complex. The volumetric average particle size of liquid catalyst dispersed is less than or equal to 1 .mu.m. Hydrosilylation of an aliphatically unsaturated carbon-carbon bond by silicon-bonded hydrogen is carried out in water using the catalyst.

Hydrosilylation is a reaction in which silicon-bonded hydrogen adds across an aliphatically unsaturated carbon-carbon bond under catalysis by a hydrosilylation catalyst such as chloroplatinic acid, platinum-alkenylsiloxane complexes, and platinum-olefin complexes.
Carbon-silicon bonds can be easily generated by this reaction, and as a consequence, it has found use in reactions for the synthesis of a variety of organosilanes, silicon-containing organic compounds, and organopolysiloxanes. It is also employed as a crosslinking reaction for curable organopolysiloxane compositions.
However, as shown in Japanese Patent Publication Kokoku Number Sho 58-17226 (17,226/1983)U.S. Pat. No. 4,248,751; Japanese Patent Application Laid Open Kokai/Unexamined Numbers Sho 62-257939 (257,939/1987)/U.S. Pat. No. 4,761,454; and Sho 63-6053 (6,053/1988)/U.S. Pat. No. 4,791,029; execution of hydrosilylation reactions in water has been associated with an inhibition of activity of the hydrosilylation catalyst by water, and hence a failure of hydrosilylation to proceed rapidly and the necessity for long periods of time for the reaction to reach completion.
Addition of large amounts of hydrosilylation catalyst to accelerate the reaction under these conditions leads to problems such as only a localized development of hydrosilylation, and discoloration due to the large amounts of catalyst employed.

Hydrosilylation catalyst and hydrosilylation method


A rack guide unit includes a closure member secured to an external opening end of an accommodation portion of a housing, and a rack guide. A compression coil spring and a coned disc spring that urge the rack guide toward a rack shaft are interposed between the closure member and the rack guide. A holding member that holds the coned disc spring includes a guide tube that guides a radially inner portion of the coned disc spring and a seat plate that receives a load from the coned disc spring. An elastic member held in an accommodation groove formed in the outer periphery of the guide tube is frictionally engaged with the inner periphery (opposed portion) of a tubular portion of the rack guide.

1. Field of the Invention
The invention relates to a rack guide unit and a steering system including the rack guide unit.
2. Description of Related Art
Generally, a rack-and-pinion-type steering system is provided with a rack guide unit that reduces a backlash between a rack and a pinion. In the rack guide unit, when a rack guide by which a rack shaft is slidably supported wears out, a compression coil spring interposed between the rack guide and a plug pushes the rack guide toward the rack shaft to compensate for a clearance between the rack guide and the plug.
According to Japanese Patent Application Publication No. 11-43055 (JP 11-43055 A), a coned disc spring is interposed between a rack guide and a plug so as to be installed in series with a compression coil spring. The coned disc spring is deformed to absorb an impact only when an excessively high impact load is input into the coned disc spring.
In FIG. 4 in JP 11-43055 A, the coned disc spring and an intervening member are accommodated and held in a tubular portion formed in the plug. In JP 11-43055 A, the intervening member is referred to as "second rack support". The intervening member is interposed between the compression coil spring and the coned disc spring. Specifically, the intervening member is held by a snap ring that is fitted in both a circumferential groove formed in the inner periphery of the tubular portion that guides the outer periphery of the coned disc spring and a circumferential groove formed in the outer periphery of the intervening member, and the coned disc spring is held between the intervening member and the bottom of tubular portion.
According to the technique described in JP 11-43055 A, in order to hold the coned disc spring and the intervening member in the plug, a cumbersome work for fitting the snap ring in both the circumferential groove of the plug and the circumferential groove of the intervening member is required. Thus, the total number of man-hours needed to obtain a subassembly of a rack guide unit including the plug is increased. This affects the efficiency of assembly of the rack guide unit.

Rack guide unit and steering system including the rack guide unit


A ΔΣ-type AD converter includes a subtractor which receives an analogue input signal and a feedback signal and which outputs a signal pertaining to a difference between the signals, an integrator which integrates a signal output from the subtractor, a comparator which binarizes a signal output from the integrator by comparing with a predetermined threshold value, a counter which measures respective pulse widths of a signal output from the comparator, and a PWM circuit which outputs a pulse signal of a predetermined period having a duty cycle responsive to a count value output from the counter and which feeds back the pulse signal as the feedback signal to the subtractor. The counter measures the respective pulse widths in each PWM frame period in synchronism with the PWM circuit, and the PWM circuit feeds back to the subtractor a pulse signal whose duty cycle is set in accordance with a value of the measured pulse width in a next PWM frame. A count value output from the counter is extracted as a converted digital output value.

The present invention relates to a ΔΣ-type AD converter arranged so as to exhibit a high dynamic range while a ΔΣ-modulated sampling frequency is suppressed to a comparatively-low level. The present invention also provides a class-D amplifier and a DC-DC converter which utilize the ΔΣ-type AD converter.
FIG. 2 shows a related-art ΔΣ-type AD converter. A subtractor 10 subjects an analogue input signal and a feedback signal to subtraction. An integrator 14 integrates a signal output from the subtractor 10. A quantizer 16 compares a signal output from the integrator 14 with a predetermined threshold value, thereby binarizing the signal. A signal output from the quantizer 16 is a one-bit digital signal which assumes a value of "1" or "0" at a sampling interval unit of ΔΣ modulation, and the one-bit digital signal is subjected to analogue-to-digital conversion, and a result of conversion is output. The one-bit digital signal is subjected to one sample delay by means of a one sample delay circuit 12, and the thus-delayed signal is fed back as the feedback signal to the subtractor 10. ΔΣ-type AD converters, such as those described in; for example, Patent Documents 1 and 2, are available as a related-art ΔΣ-type AD converter.
[Patent Document 1] JP-A-2000-174627
[Patent Document 2] JP-B-2856117
A dynamic range of the ΔΣ-type AD converter changes according to a sampling frequency, and a required dynamic range has hitherto been ensured by means of increasing the sampling frequency. However, as a result of an increase in the sampling frequency, an operational amplifier capable of making a high-speed response over a wide range is required as an operational amplifier used in an integrator, which adds to cost.

ΔΣ-type AD converter, class-D amplifier, and DC-DC converter


A data processing system 2 is described including a cache memory 8 and a plurality of DRAM banks 16, 18, 20, 22. A victim select circuit 32 within a cache controller 10 selects victim cache storage lines 28 upon a cache miss such that unlocked cache storage lines are selected in preference to locked cache storage lines, non-dirty cache storage lines are selected in preference to dirty cache storage lines, and cache storage lines requiring a write back to a non-busy DRAM bank are selected in preference to cached storage lines requiring a write back to a busy DRAM storage bank. A DRAM controller 24 is provided that continuously performs a background processing operation whereby dirty cache storage lines 28 within a cache memory 8 are written back to their respective DRAM banks 16, 18, 20, 22 when these are not busy performing other operations and when the cache storage line has a least recently used value below a certain threshold. A bus arbitration circuit 12 is provided that re-arbitrates bus master priorities in dependence upon determined latencies for respective memory access requests. As an example, if a high priority memory access request results a cache miss, with a lower priority memory access request resulting in a cache hit, then the lower priority memory access request will be re-arbitrated to be performed ahead of the normally higher priority memory access request and may be finished before that higher priority memory access request starts to return data words to a data bus 14.

1. Field of the Invention
The present invention relates to data processing systems. More particularly, the present invention relates to the management and control of the memory system within a data processing system.
2. Description of the Prior Art
It is desirable that data processing systems should operate as quickly as possible to meet the increasing demands for processing capability placed upon them. In this regard, there is continual progress in producing processing systems that operate at higher speeds and so are able to execute more instructions per second. As the processors increase in speed, it is important that other systems of the data processing system should also increase in speed if they are not to become a processing bottleneck holding back the overall performance of the system. An example of such an other system is the memory system associated with a data processing system.
A memory system of a high performance data processing system may comprise a hierarchy of levels of data storage, e.g. an internal on-chip cache, an external off-chip cache, a random access memory and a non-volatile memory, such as a hard drive or flash ROM. Schemes which can increase the overall performance of the memory system of a data processing system are highly advantageous.
Viewed from one aspect the present invention provides data processing apparatus comprising:
(i) a cache memory having a plurality of cache storage lines;
(ii) a plurality of main memory units operable to store data words to be cached within said cache memory; and
(iii) a cache victim select circuit for selecting a victim cache storage line into which one or more data words are to be transferred from one of said main memory units following a cache miss; wherein
(iv) said cache victim select circuit is responsive to an operational state of at least one of said main memory units when selecting said victim cache storage line.
A cache memory does not typically have enough storage capacity to store all of the data that may be required by the system. Accordingly, the cache memory stores a subset of the total data and when a memory access request is made to an item of data not stored within the cache, then that item of data must be fetched to the cache. In order to make room for the new item of data within the cache, an existing item of data has to be removed from the cache. The selection of which cache storage line (set of data items) should be replaced is performed by a cache victim select circuit. When there are a plurality of main memory units holding the data that is to be cached within the cache memory, then different victim selections will require accesses to be made to different ones of this main memory unit. In this circumstance, it is strongly desirable that the cache victim select circuit should be responsive to the operational state of at least one of the main memory units. Arranging the cache victim select circuit to be responsive to an operation state of at least one of the main memory units allows the victim selection to be adjusted depending upon the detected operational state and accordingly higher performance to be achieved through the selection of a cache victim that will cause the least delay.
The present invention is particularly useful when the cache memory is configured as a write back cache memory. In such embodiments data words from the victim cache line have to be written back to the main memory from where they originally came and so the operational status of that main memory may be critical in determining the degree of delay that would be associated with selection of that particular cache line as the victim cache line.
One highly useful operational parameter to sense regarding a main memory unit is whether or not that main memory unit is already busy exchanging one or more data words with the cache memory. If the main memory unit is already busy, then its current operation will have to complete before it is able to service any requirements stemming from the selection of a victim cache storage line that requires that busy main memory unit to be accessed.
The advantages of the invention are particularly evident when there are many memory masters simultaneously requesting access and a plurality of main memory units that are able to operate independently and concurrently transfer data words to the cache memory. In such embodiments it is highly desirable to select as a cache victim a cache storage line that is not already busy performing a data exchange with the cache memory. The ability of parallel data exchanges with the cache memory to occur increases system performance and accordingly it is desirable that the memory access workload be split evenly between the main memory units to make better use of this parallel capability.
In preferred embodiments it is desirable that the cache victim select circuit should be responsive to a dirty flag (a flag indicating that a line contains one or more data words that have been changed since they were transferred to the cache memory from the main memory) associated with the cache storage lines so as to select in preference those cache storage lines that are marked as non-dirty. Non-dirty cache storage lines will not require writing back to the main memory and so the delay associated with refilling that cache storage line will be reduced.
In modem high performance data processing systems it is advantageously efficient to provide more than one data word requesting unit that may each request exchange of one or more data words with the cache memory. Sharing the memory structures between data word requesting units in this way provides an advantageous compromise between making the most efficient use of the circuit resources provided balanced against the requirements for maximum performance.
Typical examples of data word requesting units are a central processing unit and a video display driving circuit.
In a system having multiple data word requesting units as discussed above, it is desirable that one or more cache storage lines may be locked for preferential use by one of the data word requesting units. In this way it is possible to reduce the likelihood of the activity of one of the data word requesting units having an undue detrimental impact upon the performance of another of the data word requesting units.
A further way in which the cache memory resources may be made better use of is to arrange the cache victim select circuit to be responsive to an indication of which cache storage lines were least recently used when selecting the victim cache storage line.
An overall scheme that has been found particularly advantageous is one in which said cache victim select circuit selects as said victim cache storage line that cache storage line having properties placing it highest in a list of N properties, where 1xe2x89xa6Nxe2x89xa66, said list of N properties being formed of the N highest properties in the list:
(i) least recently used line that is not locked and is not dirty;
(ii) least recently used line that is not locked, is dirty and can be written back to a main memory unit that is not busy;
(iii) least recently used line that is not locked, is dirty and has to be written back to a main memory unit that is busy;
(iv) least recently used line that is locked and is not dirty;
(v) least recently used line that is locked, is dirty and can be written back to a main memory unit that is not busy;
(vi) least recently used line that is locked, is dirty and has to be written back to a main memory unit that is busy.
In some circumstances a partially random cache victim selection scheme may be preferred as a starting point and in such embodiments said cache victim select circuit selects as said victim cache storage line that cache storage line having properties placing it highest in a list of N properties, where 1xe2x89xa6Nxe2x89xa66, said list of N properties being formed of the N highest properties in the list:
(i) randomly selected from those cache storage lines that are not locked and are not dirty;
(ii) randomly selected from those cache storage lines that are not locked, are dirty and can be written back to a main memory unit that is not busy;
(iii) randomly selected from those cache storage lines that are not locked, are dirty and have to be written back to a main memory unit that is busy;
(iv) randomly selected from those cache storage lines that are locked and are not dirty;
(v) randomly selected from those cache storage lines that are dirty and can be written back to a main memory unit that is not busy;
(vi) randomly selected from those cache storage lines that are locked, are dirty and have to be written back to a main memory unit that is busy.
In other circumstances a partially round robin cache victim selection scheme may be preferred as a starting point and in such embodiments said cache victim select circuit selects as said victim cache storage line that cache storage line having properties placing it highest in a list of N properties, where 1xe2x89xa6Nxe2x89xa66, said list of N properties being formed of the N highest properties in the list:
(i) selected in sequence from those cache storage lines that are not locked and are not dirty;
(ii) selected in sequence from those cache storage lines that are not locked, are dirty and can be written back to a main memory unit that is not busy;
(iii) selected in sequence from those cache storage lines that are not locked, are dirty and have to be written back to a main memory unit that is busy;
(iv) selected in sequence from those cache storage lines that are locked and are not dirty;
(v) selected in sequence from those cache storage lines that are locked, are dirty and can be written back to a main memory unit that is not busy;
(vi) selected in sequence from those cache storage lines that are dirty and have to be written back to a main memory unit that is busy.
The system may be configured to operate with only some of the properties (e.g. be responsive to properties (i), (ii) and (iii) or (i) and (ii)) and then, if a matching cache storage line if not found, at least part of the system is placed into a wait state until a suitable victim becomes available.
The plurality of main memory units may be main memory units at the same level within the memory hierarchy. In this context banks of dynamic random access memory that may be concurrently and independently accessed are particularly well suited for use with the invention and are increasingly desirable for other reasons, such as reduced cost single-chip designs.
Viewed from another aspect the present invention provides a data processing method comprising the steps of:
(i) storing data words within a plurality of cache storage lines of a cache memory;
(ii) storing in a plurality of main memory units said data words to be cached within said cache memory; and
(iii) selecting a victim cache storage line into which one or more data words are to be transferred from one of said main memory units following a cache miss; wherein
(iv) said selection is responsive to an operational state of at least one of said main memory units when selecting said victim cache storage line.
Viewed from a further aspect the present invention provides a data processing apparatus comprising:
(i) a write back cache memory having a plurality of cache storage lines;
(ii) at least one main memory unit operable to store data words to be cached within said cache memory, a cache storage line being dirty if it contains any data words that have been changed since they were transferred from said at least one main memory unit to said cache storage line; and
(iii) a background operation control circuit for triggering writing back of data words from dirty cache storage lines to said at least one main memory unit as a background process, cache storage lines written back using said background process becoming not dirty and continuing to store said data words that were written back.
Write back caches have the advantage that data transfers between the cache and the main memory are reduced in number. More particularly, a data transfer to the main memory only occur when the data words are loaded into the cache and then when the data words are flushed from the cache. Changes that occur to the data words whilst they are stored within the cache are not passed to the main memory but are left until the cache data is flushed from the main memory when the final state of the data words is written into the main memory. If data words that are cached have not been changed whilst they were stored in the cache then there is no need for them to be written back to the main memory. Accordingly, in order to differentiate between cache data words requiring writing back and those not requiring writing back a dirty flag may be provided.
The invention recognizes that cache refills to dirty cache lines are slower than to non-dirty cache lines and so measures that can reduce the number of cache refills needed to dirty cache lines are advantageous. The invention further recognizes that there are periods of time in which the bandwidth between the main memory and the cache memory is not being fully utilized or may in fact be standing completely idle if all of the data requirements of the system can be met from cached data. The invention exploits this otherwise unused capacity to reduce the number of dirty cache lines within the cache memory as a background process. This in turn reduces the number of write backs of dirty cache data that have to be performed during the foreground processing operations which are accordingly speeded up.
In a normal system dirty data is written back to the main memory as it is flushed (i.e. removed) from the cache memory. In contrast, in the present invention the dirty data is written back to the main memory but is also retained within the cache memory but now being marked as non-dirty.
The present invention is particularly useful in systems having a plurality of main memory units that are able to operate independently and concurrently to transfer data words to the cache memory as such systems will often have unused bandwidth between the cache memory and the main memory that can be exploited by the background process of the present invention.
In preferred embodiments the background process is also responsive to how recently a cache data word has been used when determining whether or not it should be written back if dirty. If a cached data word is being used very frequently and so likely to change very frequently, then it is advantageous that it should not be written back as part of the background process since this would consume a disadvantageous amount of electrical power and may also utilize some of the spare bandwidth to the main memory system that could be more effectively used by writing back cached data words that infrequently changed and so would be likely to remain non-dirty once they had been written back.
A further refinement in the background process is that write backs should not be attempted to main memory units that are already busy servicing another memory access request.
The invention is particularly well suited to embodiments in which the main memory unit comprises a plurality of banks of dynamic random access memory of flash memory and that is fabricated as a single-chip device, although commodity DRAM or flash memory could be used.
Viewed from a further aspect the present invention provides a data processing method comprising the steps of:
(i) storing data words within a plurality of cache storage lines of a write back cache memory;
(ii) storing in at least one main memory unit said data words to be cached within said cache memory, a cache storage line being dirty if it contains any data words that have been changed since they were transferred from said at least one main memory unit to said cache storage line; and
(iii) writing back data words from dirty cache storage lines to said at least one main memory unit as a background process, cache storage lines written back using said background process becoming not dirty and continuing to store said data words that were written back.
Viewed from a further aspect the present invention provides data processing apparatus comprising:
(i) a memory circuit;
(ii) a data bus coupled to said memory circuit;
(iii) a plurality of bus master circuits coupled to said data bus for issuing memory access requests to said memory circuit via said data bus;
(iv) a bus arbitration circuit for controlling in accordance with a hierarchy of bus master priorities which bus master is granted priority in gaining use of said data bus when more two or more bus masters issue temporally overlapping memory access requests; wherein
(v) said bus arbitration circuit is responsive to a determination of latency of pending memory access requests to re-arbitrate priority in gaining use of said data bus between bus masters such that a first bus master circuit having a first pending memory access request and a lower position in said hierarchy than a second bus master circuit having a second pending memory access request may gain use of said data bus ahead of said second bus master circuit if said first memory access request has a lower latency than said second memory access request.
Bus arbitration between different bus masters normally is performed based upon a fixed hierarchy of priorities. However, the present invention recognizes that more efficient use of the bus band width can be made when the bus arbitration circuit is responsive to a determination of the latency of different memory access requests and is able to re-arbitrate the priorities in dependence upon the determined latencies.
In particularly preferred embodiments it may be possible for a second memory access request to be started and completed entirely within the latency period of a first memory access request before that first memory access request in fact needs to use the data bus to complete.
A common situation in which the invention may be advantageously used is one in which the memory system comprises a cache memory and a main memory. In such systems if a high priority first memory access request results in a cache miss whereas a lower priority second memory access request results in a cache hit, then it is advantageous to re-arbitrate the priorities such that the second memory access request is serviced from the cache memory whilst the first memory access request continues to progress to perform the data fetch from main memory and cache line refill.
In an analogous manner in a system including a plurality of main memory units that can independently and concurrently operate, the invention may advantageously operate to re-arbitrate between memory access requests such that a request to a non-busy main memory unit may be moved ahead of an otherwise higher priority request to a busy main memory unit.
The invention is particularly useful in embodiments in which the main memory comprises one or more banks of dynamic random access and the system is provided as a single-chip.
Viewed from a further aspect the present invention provides a data processing method comprising the steps of:
(i) issuing memory access requests from a plurality of bus master circuits to a memory circuit via a data bus;
(ii) controlling, in accordance with a hierarchy of bus master priorities, which bus master is granted priority in gaining use of said data bus when more two or more bus masters issue temporally overlapping memory access requests; wherein
(iii) in response to a determination of latency of pending memory access requests, priority in gaining use of said data bus between bus masters is re-arbitrated such that a first bus master circuit having a first pending memory access request and a lower position in said hierarchy than a second bus master circuit having a second pending memory access request may gain use of said data bus ahead of said second bus master circuit if said first memory access request has a lower latency than said second memory access request.

Data processing apparatus and method for cache line replacement responsive to the operational state of memory


Scanning signals SX and SY produced from a scanning signal-generating portion are directly supplied to a VCM driver amplifier without being attenuated according to the magnification factor. A magnification-setting portion sets the VCM driver amplifier at a magnification factor. A PI control signal produced from a PI control portion is directly supplied to a VCM driver amplifier without being attenuated according to the magnification factor.

The present invention relates to a scanning probe microscope typified by a scanning atomic force microscope (AFM) and, more particularly, to a scanning probe microscope that provides high noise margin during high-magnification observations and offers observation images with good resolution.
In a scanning probe microscope such as an AFM, microscopic tissues and microstructures on a sample surface are detected by making use of interaction between the sample surface and a scanning probe. For this purpose, a cantilever comprising a cantilever having a probe tip at its front end is used as a scanning probe. Where such a cantilever is employed, when the probe is made to scan the sample surface, an attractive force or repulsive force based on an atomic force is produced between the sample surface and the probe. Accordingly, if this atomic force is detected as an amount of deflection of the cantilever, and if quite slight movement of the sample stage in the Z-direction is so controlled that this amount of deflection is kept constant, i.e., the gap between the sample surface and the probe is retained constant, then the used control signal or the detected amount of deflection itself is representative of the topography of the sample surface.
FIG. 6 is a block diagram showing one example of the structure of the prior art scanning probe microscope. A sample 52 is placed on a sample stage 55. A cantilever 53 has a free end to which a probe 54 is attached. This probe 54 is located above, and opposite to, the sample 52. The amount of deflection of the cantilever 53 is detected by measuring the spot position of laser light 72 emitted from a laser generator 71 and reflected by the back surface of the cantilever 53 with a position detector 73.
The position detector 73 is composed, for example, of four separate light-detecting electrodes. The detector is so aligned that when the amount of deflection of the cantilever 53 is zero, the spot of the laser light 72 is brought to the center of the 4 separate electrodes. Therefore, if the cantilever 53 deflects, the spot of the laser light 72 moves on the 4 separate electrodes. The output signals from the 4 electrodes produce a voltage difference. This voltage difference is amplified by a differential amplifier 74 and applied as a deflection amount signal S1 to the non-inverting input terminal (+) of a operational amplifier 75. A target value-setting portion 79 applies a target value signal regarding the amount of deflection of the cantilever 53 to the inverting input terminal (-) of the operational amplifier 75.
An error signal S2 delivered from the operational amplifier 75 is fed to a proportional-plus-integral-control portion (PI control portion) 76 via a low-pass filter 80. The PI control portion 76 combines the error signal S2 and its integral value and feeds the resulting signal as a PI control signal to a voice coil motor (VCM) driver amplifier 70 and to an observed image signal amplifier 77, the PI control signal acting also as an observed image signal. The VCM driver amplifier 70 produces a driving current, or an exciting current, corresponding to the voltage level of the PI control signal and excites a VCM 81. Thus, the cantilever 53 is made to move a slight distance corresponding to the voltage level of the PI control signal in the Z-direction. The observed image amplifier 77 amplifies the PI control signal by a factor that is specified by a magnification-setting portion 83 and corresponds to the magnification factor in the Z-direction. The amplified signal is supplied as an observed image signal S5 to an image display device (e.g., a CRT) 86.
A scanning signal-generating portion 78 produces XY scanning signals SX and SY to cause the cantilever 53 to move a slight distance in the X- and Y-directions. A magnification control portion 82 attenuates the scanning signals SX and SY by factors that correspond to the magnification factors in the X- and Y-directions, respectively, and are specified by the magnification-setting portion 83. The scanning signals SX and SY attenuated according to the magnification factors are supplied to a VCM driver amplifier 84, which in turn excites a VCM 85 according to the scanning signals SX and SY to drive the cantilever 53 over slight distances in the X- and Y-directions.
The observation magnification factors of the scanning probe microscope in the X- and Y-directions are enlarged by narrowing the range scanned by the probe across the sample surface. In the above-described prior art technique, the magnification control portion 82 attenuates the scanning signals SX and SY according to the magnification factors. The attenuated scanning signals are supplied to the VCM driver amplifier 84 via a scanning line L1, thus narrowing the range scanned.
In addition, with respect to the Z-direction, the scanning probe microscope permits the magnification factor to be set according to the state of the surface of the sample. With the aforementioned prior art technique, if the amplification factor of the PI control signal achieved by the observed image signal amplifier 77 is set high through the magnification-setting portion 83, extension is possible in the Z-direction.
FIG. 5 is a block diagram showing the structure of the prior art VCM driver amplifier 84 about the X- and Y-directions. The scanning signal attenuated by the magnification-setting portion 82 is applied to one differential input terminal of an operational amplifier A1 via the scanning line L1. A current that responds to the voltage level on the scanning line L1 and is amplified according to a reference voltage Vref applied to the other differential input terminal is produced from the output terminal of the operational amplifier A1 and fed to the VCM 85. The output current from the VCM 85 is furnished to a detecting resistor R. The voltage developed across the detecting resistor R is applied to one input terminal of an operational amplifier A2. The output voltage from the operational amplifier A2 is applied as the above-described reference voltage Vref to the other differential input terminal of the operational amplifier A1.
With the prior art technique described above, the voltage level of the scanning signal applied to the operational amplifier A1 decreases with increasing the magnification factor. Therefore, if noise of the same level is introduced in the scanning signal line L1, the ratio of the noise level to the scanning signal level increases with increasing the magnification factor, thus lowering the noise margin. Consequently, if slight noise is introduced in the scanning signal line L1, the resolution is greatly affected adversely.
On the other hand, with respect to the Z-direction, the voltage level of the PI control signal applied to the observed image signal amplifier 77 drops with reducing the unevenness of the sample surface. Therefore, if noise of the same level is introduced in the signal line, the ratio of the noise level to the level of the PI control signal increases with decreasing the unevenness of the sample surface. In consequence, the noise margin drops.
It is an object of the present invention to provide a scanning probe microscope that is free of the foregoing problems, always provides high noise margin irrespective of the magnification factor and the state of the surface of the sample, and enables observation with high resolution.


A novel process and apparatus is disclosed for performing chemical reactions. Highly compressed gaseous streams such as H2, CO, CO2, H2O, O2, or CH4 are raised to Mach speeds to form supersonic jets incorporating shockwaves. Two or more such jets are physically collided together to form a localized reaction zone where the energy from the shockwaves causes endothermic reactions wherein the chemical bonds of the reactant gases are broken. Between and among reactants molecular surface interaction and molecular surface chemistry take place. In the ensuing exothermic reactions a desired new chemical product is formed and this product is locked into a lower state of enthalpy (state of energy of formation) through adiabatic cooling by means of a free jet expansion.

This disclosure relates generally to the field of chemical compound production and more specifically to an improved process and apparatus for using the extremely time-efficient, energy input-efficient, and therefore cost-efficient "collision physics" to achieve chemical compound production by means of the supersonic collision shockwave reaction mechanism.
For centuries, the conventional way of chemical reaction was based on mixing two or more chemicals in a stirring, blending or intermixing method with or without the addition of a liquid, often with the assistance of the input of heat, pressure and time, and sometimes further assisted by introducing a catalyst into the reaction. The objective was to cause the original respective bonding of a chemical A and a different chemical B to be loosened, thereby to allow one or more new compounds to be made as a result of a new pairing of A and B. If either or both of A and B are themselves compounds, then a new pairing of a number of variations of the components of A and B.

Process and apparatus for supersonic collision shockwave reaction mechanism for making chemical compounds

Physical Shockwave Industrial Applications, LLC


Provided is a touch sensing system and method for providing a proximity sensing function using a touch screen panel. The touch sensing system may include at least one storage unit including at least one program, a touch screen configured to detect a touch of an object, and at least one processor configured to activate a proximity sensing function on the touch screen according to a control of the at least one program, to detect proximity of the object based on sensing information of a proximity sensing area predetermined on a partial area of the touch screen, and to process a predetermined operation in response to detecting the proximity of the object.

1. Field of the Invention
The following embodiments relate to a touch sensing system and method for providing a proximity sensing function using a touch screen panel.
2. Description of the Related Art
A proximity sensor refers to a kind of a location sensor or a displacement sensor and is also referred to as a sensor configured to detect a location of an object when the object is proximately approaching.
FIG. 1 is a diagram illustrating an example of a device 100 including a proximity sensor according to a related art. The device 100 of FIG. 1 including the proximity sensor may be, for example, a smart phone. Referring to FIG. 1, the device 100 includes, as a portion of constituent elements, a screen 110 representing a touch screen, an infrared (IR) sensor 120 representing the proximity sensor, and a flexible printed circuit board (FPCB) 130 connected to the IR sensor 120. For example, the device 100 such as the smart phone may detect proximity of an object using the IR sensor 120, and may provide a variety of functions based on the circumstances. When the IR sensor 120 detects the proximity of the object in a call mode, the device 100 may provide a function of preventing an input via the screen 110.
In the related art, a space for a proximity sensor needs to be secured within a device that is to use the proximity sensor. Accordingly, a size of the device may be limited by the space used to use the proximity sensor. In addition, a predetermined amount of power may be additionally consumed to use a separate sensor.

Touch sensing system and method for providing proximity sensing function using touch screen panel