A light emitting device (LED) package and a manufacturing method thereof are provided. The LED package includes an LED including a first electrode pad and a second electrode pad disposed on one surface thereof; a bonding insulating pattern layer configured to expose the first electrode pad and the second electrode pad; a substrate including a via hole bored from a first surface to a second surface and a wiring metal layer formed on an inner surface of the via hole to extend to a part of the second surface; and a bonding metal pattern layer bonded to the wiring metal layer exposed through the via hole at the first surface of the substrate and also bonded to the first electrode pad and the second electrode pad.

1. Field
Example embodiments of the following description relate to a light emitting device (LED) package and a manufacturing method thereof, capable of reducing a size of a product and simplifying a manufacturing process by performing the manufacturing process at a wafer level.
2. Description of the Related Art
Recently, a light emitting device (LED) has been applied to small home appliances, interior goods, and further to various products including large-scale back light units (BLUs), general lighting devices, and electronic devices.
In those products applying the LED, increase in a degree of freedom of design is demanded. For example, size reduction of the LED is required to reduce a width of the BLU for a slimmer TV and to achieve various types of the general lighting and the electronic devices.
FIG. 1 illustrates a sectional view showing a structure of a conventional LED package 10. Referring to FIG. 1, the LED package 10 is structured by mounting an LED 14 on a package body 11.
The package body 11 includes a first lead frame 12 and a second lead frame 13 which are exposed through a bottom surface of a cavity 11a, disposed at an upper surface of the package body 11.
The LED 14 may include two electrode pads with different polarities, disposed on one surface. The two electrode pads are mounted on the package body 11 to be in contact with the first lead frame 12 and the second lead frame 13, respectively. A phosphor resin layer 15 is formed at the package body 11 including the LED 14. A lens unit 16 is disposed on the phosphor resin layer 15.
However, the LED package 10 as shown in FIG. 1 has a limitation in reducing a size of the LED package, since the package body 11 is relatively large compared to the LED 14. Also, in the products applying the LED package 10, an increase in a degree of freedom in design is limited.
In addition, since the LED 14 is mounted to the package body 11 as a separate chip, mass production becomes difficult. Also, the manufacturing process is complicated, accordingly increasing processing cost and time.

Light emitting device package and manufacturing method thereof


Apparatus and method for transmitting control information in a multidimensional computer network are disclosed herein. A multidimensional computer network consists of a number of homogeneous or heterogeneous processing sites, called nodes. All that is required of a node is that it be able to receive data blocks from other nodes and send data blocks to other nodes. Interconnecting the nodes are links which connect the nodes in a regular or irregular pattern. The invention applies to multidimensional, or parallel, networks as well as to single dimensional networks where only one path exists between any two nodes. The invention improves upon the prior art by stealing bandwidth from the data transmission facilities on demand without requiring prior reservation of a fixed amount of bandwidth. The bandwidth is used to transmit control information in small data transmissions.

Since the advent of the electronic computer in reliable form, workers in the art have given much consideration to systems employing a number of computers functioning together in interrelated fashion to accomplish a given overall task. In some of these multiprocessor systems a large computer utilizes its superior speed and capacity to perform the complex portions of a program, but assigns smaller and slower satellite processors the less complicated and less urgent tasks in order to reduce the load and demands upon the large computer. The large computer is required to undertake the responsibilities of assigning subtasks, making sure that the smaller processors are kept occupied, ascertaining the availability and performance of the smaller processors, and providing a unified result.
Other multiprocessor systems utilize a different approach, employing a plurality of processors and a common bus system, with the processors having essential equality of function. In this type of system, separate control computers or control systems are often used to monitor the availability and capability of an individual processor for a given subtask, and to control the routing of tasks and information between processors. The processors may be arranged and operated so that they monitor the status and availability of the other processors and determine the routing of messages and programs. The common and substantial drawback of these systems is that the software and operating time required for overhead and maintenance functions interfere with the performance of the principal objectives. Problems of routing and monitoring may increase dramatically in relation to the number of processors involved, so that ultimately a disproportionate amount of effort is spent in overhead functions.
Since the days of the early "Binac" (two parallel processors) and comparable systems it has been recognized that a multiprocessor provides a redundant capability that can substantially improve the overall reliability of an operating system. Actual installations of multiprocessor systems have until recently been quite limited, largely due to the extensive software problems involved. Nevertheless, the advantages of multiprocessor operation for real time applications and other situations in which system down time cannot be tolerated have led to the development of systems which are successful in operation but which nevertheless involve significant commitments to overhead software and operating time.
Illustrative of multitasking systems are U.S. Pat. Nos. 3,445,822, 3,566,363 and 3,593,300, all relating to a system in which multiple computers access a single shared main memory, and in which capabilities and requirements are compared in order to assign tasks optimally to individual processors.
Another example of the prior art is U.S. Pat. No. 4,099,233, in which a number of processors share a single bus and a control unit incorporating a buffer register is used in the transfer of data blocks between a transmitting miniprocessor and a receiving miniprocessor. This concept has been employed in a distributed mail sorting system in Europe.
U.S. Pat. No. 4,228,496 pertains to a multiprocessor system in which buses between processors are coupled to bus controllers which monitor transmissions and determine the priority of data transfers between processors, each of which can be coupled in to control a certain part of a number of peripheral devices.
The "Ethernet" system, described in U.S. Pat. No. 4,063,220 and U.S. Pat. No. 4,099,024 discloses another approach to the problem of intercommunicating between different processors and peripherals. All units are coupled to a common multiple access network and compete for priority. Collision detection is based upon time priority, which in turn means that global capabilities cannot readily be controlled, coordinated or given specificity.
Details of these complex systems can only be fully appreciated by analysis of the patents and any related publications. However, review will verify that in each instance prioritizing of data transfer and the selection of processors requires extensive intercommunication and supervisory control if tasks are to be shared. Expansion of the systems to include additional processors does not present identical problems with these different systems, but in each instance substantially complicates system software, applications programming, hardware, or all three.
In most networks, each message is positively acknowledged when it reaches the destination node by sending an acknowledgement word back along the path used to transmit the message (this technique applies to both circuit switched and packet switched networks). Thus, a source node enqueues its message into the network and starts a countdown timer. If the positive acknowledgement is received before the timer expires, the message transmission is considered successful. If the timer expires before an acknowledgement is received, the message transmission is considered a failure and the message must be resent.
The problem with the above scheme is that the source node only knows if the message succeeds or fails, no maximum progress report is given. Message failure might have been caused by several reasons including network congestion, broken links, transmission errors, and node errors. Since the source node does not know the cause of the failure or the maximum message progress, its only option is to retry sending the message or abort the message.
An obvious improvement to the above scheme is to add negative acknowledgements that indicate why the message failed. Thus, some single-dimensional (one path) networks return specific status words when the message transfer has failed. However, this method does not scale to multidimensional networks where multiple paths can fail. In the above example, suppose Node 1's children, Nodes 2 and 4, both fail sending the message for different reasons. They both return this information to Node 1. Node 1 must then return both errors to Node 0, requiring Node 0 to process every error that occurs on every search path. While this protocol satisfies the expendability need, it requires too much overhead memory by not encapsulating status information into a single status word. Furthermore, too much network bandwidth is required to support this method.
A final refinement to the scheme would allow intermediate nodes to accumulate error reports and pass only the most severe error report to its parent. Although this scheme reduces the acknowledgement message traffic, it does not encapsulate the message progress through the network. Using this scheme, the source node is only informed of the most severe error occurring on any search branch without any information regarding message progress being reported.
Inherent constraints on multiprocessor system size and capability are imposed by the use of one or two logically passive busses. While different techniques can be employed to facilitate intercommunication, such as the grouping of subsystems into global resources evidenced in U.S. Pat. No. 4,240,143, the amount of useful traffic must reach a limit and variable delays impose insuperable problems when large numbers of processors are used. Situations may arise in which one or more processors become locked out or deadlocked, and these circumstances in turn require added circuitry and software to resolve the problems. The impracticality of substantially extending the number of processors, say to 1024, thus becomes evident.
It is desirable for many applications to depart from the constraints of these existing approaches and to utilize modern technology to best advantage. The lowest cost technology available today is based upon mass produced microprocessors, and high capacity rotating disk memories, such as Winchester technology devices using small head to disk spacing in a sealed environment.
It is desirable to expand a multiprocessor system without disproportionate or even concomitant software complexity. It is desirable further to be able to handle computer problems that may be characterized as having a distributed structure, in which an overall function can be dynamically subdivided into limited or iterative processing tasks.
Virtually all data base machines fall into this category, which also includes such other typical examples as sorting, pattern recognition and correlation, digital filtering, large matrix computations, simulation of physical systems and the like. In all of these situations there is a requirement for widely dispersed, relatively straight-forward individual processing tasks with a high instantaneous task load. This situation unduly burdens prior art multiprocessor systems because it tends to increase the time and software involved in overhead, and because practical difficulties arise in implementation of the systems. Using a shared passive bus, for example, propagation rates and data transfer times introduce an absolute barrier as to the rate at which transactions can be processed.

Network control information without reserved bandwidth

International Business Machines, Corporation


Methods, systems, and apparatuses for a portable device capable of receiving satellite navigational system signals to retrieve visibility mask information corresponding to the portable device's current location and/or trajectory are described.

1. Field of the Invention
The present invention relates generally to reducing power consumption in a portable device capable of receiving Global Navigation Satellite System (GNSS) signals, and more particularly, to minimizing signal acquisition time and the number of required tracking channels in a portable device having a GNSS receiver using information regarding the portable device's current location.
2. Description of the Related Art
Satellite navigational systems provide positional and timing information to earth-bound receivers. Each system has its own constellation of satellites orbiting the Earth, and, in order to calculate its position, a receiver on Earth uses the satellites "in view" (i.e., in the sky above) from that system's constellation. Global Navigational Satellite System (GNSS) is often used as the generic term for such a system, even though such navigational satellite systems include regional and augmented systems—i.e., systems that are not truly "global." The term "GNSS," as used herein, covers any type of navigational satellite system, global, regional, augmented or otherwise, unless expressly indicated otherwise.
The number of GNSS systems, both planned and presently operational, is growing. The widely-known, widely-used, and truly global Global Positioning System (GPS) of the United States has been joined by one other global system, Russia's GLObalnaya NAvigatsionnaya Sputnikovaya Sistema (GLONASS), and is presently being joined by Europe's Galileo and China's BeiDou (also known, in its second generation, as COMPASS) systems—each of which has, or will have, its own constellation of satellites orbiting the globe. Regional systems (those that are not global, but intended to cover only a certain region of the globe) include Japan's Quasi-Zenith Satellite System (QZSS) and the Indian Regional Navigational Satellite System (IRNSS) currently being developed. Augmented systems are normally regional as well, and "augment" existing GNSS systems with, e.g., messages from ground-based stations and/or additional navigational aids. These include the Wide Area Augmentation System (WAAS), European Geostationary Navigation Overlay Service (EGNOS), Multi-functional Satellite Augmentation System (MSAS), and GPS Aided Geo Augmented Navigation (GAGAN). Regional GNSS systems, such as QZSS, can also operate as augmented systems.
Moreover, GNSS capabilities are no longer limited to any particular type of system or device. A GNSS receiver may be implemented in a mobile terminal, a tablet computer, a camera, a portable music player, and a myriad of other portable and/or mobile personal consumer devices, as well as integrated into larger devices and/or systems, such as the electronics of a vehicle. The term "GNSS receiver" as used herein, covers any such implementation of GNSS capabilities in a device or system.
Broadly speaking, the reception/processing of GNSS signals involves three phases: acquisition, tracking, and positional calculation (or "navigation solution"). Acquisition is the acquiring or identifying of the current satellites in view (SVs), which means satellites that are "visible" overhead, i.e., the satellites from which the GNSS receiver can receive signals. Obviously, in any "global" GNSS constellation of satellites, roughly half of the satellites are orbiting on the other side of the planet at any time. Acquisition uses one or more of satellite almanac information, the GNSS receiver's last positional calculation, assistive information concerning the local region received by terrestrial transmission, signal processing (specifically, finding satellite signals by correlating known signal patterns), and other means well-known by those of ordinary skill in the art, in order to acquire the current SVs. Acquisition can be understood as "finding" the SVs, tracking is the fine tuning of the signals received from the acquired SVs and the keeping track of the acquired SVs over time. Once acquired and adequately tracked, the SV's signals are processed to extract the navigational, positional, timing, and other data transmitted in each SV's signal, and the data from all the SV's being tracked is then used to calculate the GNSS receiver's position. Of course, there are further complexities to the actual reception and processing of GNSS signals, such as various loops feeding back information between these phases for further correction and adjustment of data, as is known to one of ordinary skill in the art.
When a GNSS receiver is implemented in a portable and/or mobile device which relies upon one or more batteries for power, the components used for GNSS signal reception, signal processing, and positional calculation use a substantial amount of the power budget when in use. When the GNSS capability is being used for continuous updating of positional information, such as when navigating a route in a moving vehicle or while walking in unfamiliar terrain, it is a particularly large drain on the one or more batteries.
More specifically, when in an environment where the "view" of the GNSS receiver is completely blocked for large regions of the sky, large amounts of battery power are wasted both in attempting to acquire SVs which can never be acquired and tracking SVs which can no longer be tracked.
The waste is not trivial, as every milliamp (mA) decreases the battery life of a portable device. Such battery power consumption spent on tasks which, by definition, can never succeed is a significant waste. Thus, there is a need for a system, method, and/or apparatus to reduce the power consumed in acquiring and/or tracking SVs blocked by local environmental conditions from a GNSS receiver in a portable device powered by one or more batteries.

Method and apparatus for guided acquisition and tracking in global navigation satellite system receivers


A noise suppressing circuit (1) suppresses noise emerging from an electronic apparatus (2) and propagating through conductive lines (3a and 3b). The noise suppressing circuit (1) comprises a low-band noise reducing circuit (10) and a high-band noise reducing circuit (80). The low-band noise reducing circuit (10) is connected to the electronic apparatus (2) through the conductive lines (3a and 3b). The high-band noise reducing circuit (80) is cascade-connected to the low-band noise reducing circuit (10) and connected to conductive lines (4a and 4b) of a power line (4). The high-band noise reducing circuit (80) comprises: a detection circuit for detecting common mode noise propagating through the conductive lines (3a and 3b); a phase-inverted signal generating circuit for generating a phase-inverted signal that has a phase opposite to the phase of the noise detected by the detection circuit; and an injection circuit for injecting the phase-inverted signal generated by the phase-inverted signal generating circuit into the conductive lines (3a and 3b).

It is known that an electronic apparatus such as a switching power supply carries noise that may have a wide range of frequencies from a frequency as low as 100 kHz to a frequency as high as several hundred MHz. Noise emerging from an electronic apparatus is sent to another electronic apparatus through an alternate current power line, and may affect the other electronic apparatus. Therefore, in many countries, various restrictions are placed on conducted noise, that is, noise emerging from an electronic apparatus and emitted outside through an alternate current power line. According to the restrictions on conducted noise imposed in a great part of such countries, the frequency range to be restricted ranges from 150 kHz or 450 kHz to 30 MHz. The noise at a frequency of 30 MHz or higher applies to a restriction on emission noise.
FIG. 21 and FIG. 22 illustrate examples of frequency characteristics of conducted noise of a switching power supply wherein no measure is taken for suppressing noise. FIG. 21 shows the characteristic in a frequency range of 0 to 1 MHz. FIG. 22 shows the characteristic in a frequency range of 0 to 200 MHz. In FIG. 21 and FIG. 22 peak values of the conducted noise are shown. In FIG. 21 and FIG. 22 numeral 201 indicates a frequency range in which common mode noise exists. In FIG. 21 numeral 202 indicates a frequency range in which normal mode noise causes a problem. In FIG. 21 and FIG. 22 numeral 203 indicates an example of frequency range that applies to the restriction on conducted noise. In FIG. 21 numeral 204 indicates a permissible level of conducted noise according to the European Standard EN55022 corresponding to the standard of the International Special Committee on Radio Interference (CISPR). In FIG. 21 numeral 205 indicates a permissible level of conducted noise according to the Class B of the standard of the Federal Communications Commission (FCC). As shown in FIG. 21 and FIG. 22, the noise emerging from the switching power supply exists in a wide range of frequencies including a range of 150 kHz to 30 MHz that applies to the restriction on conducted noise and a range of 30 MHz and higher that applies to the restriction on radiated noise.
In FIG. 21 a frequency of approximately 75 kHz at which a great peak of conducted noise arises is a switching frequency of the switching power supply. As shown in FIG. 21, it is noted that a plurality of harmonics pertaining to the switching frequency creat a great noise.
To prevent the adverse effect of noise as described above, in prior art, a noise filter circuit as shown in FIG. 23 is often provided between the power line and the electronic apparatus that develops noise. The noise filter circuit of FIG. 23 will now be described. The noise filter circuit comprises: two terminals 101a and 101b connected to the power line; and two terminals 102a and 102b connected to the electronic apparatus as a noise source. The noise filter circuit further comprises: a capacitor 111 having an end connected to the terminal 101a and the other end connected to the terminal 101b; a common mode choke coil 112 provided between the terminals 101a and 101b and the terminals 102a and 102b; a capacitor 113 having an end connected to the terminal 102a and the other end grounded; a capacitor 114 having an end connected to the terminal 102b and the other end grounded; and a capacitor 115 having an end connected to the terminal 102a and the other end connected to the terminal 102b. The common mode choke coil 112 has one magnetic core 112a and two windings 112b and 112c wound around the core 112a. The winding 112b has an end connected to the terminal 101b and the other end connected to the terminal 102a. The winding 112c has an end connected to the terminal 101b and the other end connected to the terminal 102b. The windings 112b and 112c are wound around the core 112a in such directions that, when magnetic fluxes are induced in the core 112a by currents flowing through the windings 112b and 112c when a normal mode current is fed to the windings 112b and 112c, these fluxes are cancelled out by each other.
Among the components of the noise filter circuit of FIG. 23, the common mode choke coil 112 and the capacitors 113 and 114 have a function of reducing common mode noise. Typically, the combination of the capacitors 113 and 114 is called a Y capacitor. The capacitors 111 and 115 have a function of reducing normal mode noise. Each of the capacitors 111 and 115 is typically called an X capacitor or an across-the-line capacitor.
Problems that the noise filter circuit of FIG. 23 has will now be described. The problem relating to the measure taken against common mode noise of the noise filter circuit will be described first. In many countries the leakage current flowing through the capacitors 113 and 114 of FIG. 23 is limited to a specific standard value or below so as to assure safety, that is, to prevent shock hazards. The leakage current is proportional to the capacitance of the capacitors 113 and 114. Therefore, the capacitance of the capacitors 113 and 114 is limited to a specific value or below. The capacitance of the capacitors 113 and 114 is typically limited to several thousand picofarads (pF) or below although the standard value of leakage current depends on the circumstances and the supply voltage of each country.
FIG. 24 shows an example of frequency characteristic of impedance of the Y capacitor including the capacitors 113 and 114. FIG. 24 shows the characteristics each obtained when the capacitance of each of the capacitors 113 and 114 is 330 pF, 680 pF, 1000 pF, 2200 pF, 4700 pF or 10000 pF.
In the example of frequency characteristic of conducted noise of the switching power supply of FIG. 21, the noise level is high in a frequency range of 500 kHz and lower. However, as shown in FIG. 24, the impedance of the Y capacitor is high in a frequency range of 500 kHz and lower, and the Y capacitor does not make a great contribution to a reduction in common mode noise in this frequency range. Therefore, the noise filter circuit of FIG. 21 has a problem that it is not capable of sufficiently reducing common mode noise in a frequency range of 500 kHz and lower.
The problem relating to the measure taken against normal mode noise of the noise filter circuit of FIG. 23 will now be described. In the noise filter circuit of FIG. 23, there exists leakage inductance that results from leakage of magnetic flux in the common mode choke coil 112. FIG. 25 illustrates a circuit made up of the noise filter circuit of FIG. 23 to which imaginary coils having an inductance equal to the leakage inductance are added. The circuit of FIG. 25 is made up of the circuit of FIG. 23 in which the imaginary coil 116 is provided between the winding 112b of the common mode choke coil 112 and the terminal 102a, and the imaginary coil 117 is provided between the winding 112c of the common mode choke coil 112 and the terminal 102b.
In the circuit of FIG. 25 the elements having a function of reducing normal mode noise are the capacitors 111 and 115 and the coils 116 and 117. These elements make up a π filter. However, the inductance of the coils 116 and 117, that is, the leakage inductance of the common mode choke coil 112 depends on the inductance of the coil 112 and the coupling coefficient between the windings 112b and 112c of the coil 112. Therefore, typically, it is difficult that the leakage inductance has a great value and it is difficult to design the circuit such that the leakage inductance has a specific value.
Typically, normal mode noise is problematic in a low frequency range of 1 MHz and lower. In such a frequency range the absolute value of impedance of the coil is expressed as 2 πfL where 'f' is a frequency. Therefore, a coil having a high inductance is required for increasing the absolute value of impedance of the coil and thereby sufficiently reducing normal mode noise in a low frequency range of 1 MHz and lower. Because of these reasons, the noise filter circuit of FIG. 23 has a problem that it is not capable of sufficiently reducing normal mode noise.
To overcome the foregoing problems, many of actual noise filter circuits have a configuration as shown in FIG. 26. The noise filter circuit of FIG. 26 comprises: the two terminals 101a and 101b connected to the power line; and the two terminals 102a and 102b connected to an electronic apparatus as a noise source. The noise filter circuit further comprises: a fuse 121 having an end connected to the terminal 101a; a capacitor 111 having an end connected to the other end of the fuse 121 and the other end connected to the terminal 101b; and the common mode choke coil 112 connected to the ends of the capacitor 111. The common mode choke coil 112 has the one magnetic core 112a and the two windings 112b and 112c wound around the core 112a. The winding 112b has an end connected to the other end of the fuse 121. The winding 112c has an end connected to the terminal 101b.
The noise filter circuit of FIG. 26 further comprises: a capacitor 122 having an end connected to the other end of the winding 112b and the other end connected to the other end of the winding 112c; a capacitor 123 having an end connected to the other end of the winding 112b and the other end grounded; a capacitor 124 having an end connected to the other end of the winding 112c and the other end grounded; and a common mode choke coil 125 provided between the capacitors 123 and 124 and the terminals 102a and 102b. The common mode choke coil 125 has one magnetic core 125a and two windings 125b and 125c wound around the core 125a. The winding 125b has an end connected to the one of the ends of the capacitor 123 and has the other end connected to the terminal 102a. The winding 125c has an end connected to the one of the ends of the capacitor 124 and has the other end connected to the terminal 102b.
The noise filter circuit of FIG. 26 substantially has a configuration in which the common mode choke coil 125 is added to the noise filter circuit of FIG. 23. According to the noise filter circuit of FIG. 26, the common mode choke coil 125 works for compensating for the insufficient function of reducing common mode noise and the insufficient function of reducing normal mode noise of the noise filter circuit of FIG. 23. However, the noise filter circuit of FIG. 26 has a problem that, since it has the two common mode choke coils 112 and 125, the circuit configuration is complicated and the noise filter circuit is increased in size.
In the noise filter circuit of FIG. 26, it is required to increase the leakage inductance of each of the common mode choke coils 112 and 125 so as to sufficiently reduce normal mode noise in a low frequency range of 1 MHz and lower. To achieve this, it is required to increase the number of turns of the coils 112 and 115. However, if the number of turns of the coils 112 and 115 is increased, there arises a problem that the interwinding stray capacitance is increased and the effect of reducing noise in a high frequency range is reduced. Alternatively, each of the coils 112 and 125 may have a structure in which the turns are divided into a plurality of portions by separators to reduce the interwinding stray capacitance of the coils 112 and 125. However, this raises the costs of the coils 112 and 125.

This patent is subject to a terminal disclaimer.


The invention presents systems and methods for initializing the phase-change layer of an optical medium. The methods include alternately quenching the phase-change material into amorphous states and crystallization states in a single pass of an optical head past the optical medium. The systems include one or more light sources that generate at least two amorphous melt regions and at least two crystallization regions in the optical medium.

Some forms of optical recording media record digital information in a material that can assume two distinct phases. Such media are often referred to as "phase-change" media. In the amorphous phase, the molecules of the material do not exhibit any long-range structure. In the crystalline phase, by contrast, the molecules possess a long-range order. The reflectivity of the material in the amorphous phase is different from the reflectivity of the material in the crystalline phase.
Phase-change material may be included in a disk as a phase-change recording layer. Digital information may be encoded in the phase-change layer by creation of regions of amorphous material and regions of crystalline material. The digital information encoded in the phase-change layer may be recovered by rotating the disk under a focused light and sensing the changes in reflectivity as the light strikes different regions of the disk.
The phase-change recording layer may be deposited on a polycarbonate substrate between dielectric layers and coated with a light reflection and heat dissipation layer. Techniques such as sputtering may be used to form the phase-change layer. The phase-change layer may be a compound comprising silver (Ag), indium (In), antimony (Sb) and tellurium (Te), although other compounds may be used as well.
When sufficiently heated, the material in the phase-change layer melts. Once melted, the material may be "quenched" or cooled into one of two phases: a crystalline phase or an amorphous phase. In general, heating the material to a high melting temperature followed by rapid cooling causes the material to assume the amorphous state. If cooling is more gradual, however, the molecules in the material have time to align themselves, and the material assumes the crystalline state. Although the material must be melted and cooled to cause it to become amorphous, the material may assume a crystalline phase at a lower temperature when heated for a longer time.
An optical recording medium typically includes a recording zone having a vast multitude of tiny regions addressable by a laser beam. The phase-change material in each region forms a data site that may be individually changed from one state to the other, thereby allowing for storage of digital data. The data sites are typically arranged in tracks called "data tracks." Data stored on such an optical recording medium can be erased and/or written over by new data.


The present application related to a method for detecting an object image using a convolutional neural network. Firstly, obtaining feature images by Convolution kernel, and then positioning an image of an object under detected by a default box and a boundary box from the feature image. By Comparing with the sample image, the detected object image is classifying to an esophageal cancer image or a non-esophageal cancer image. Thus, detecting an input image from the image capturing device by the convolutional neural network to judge if the input image is the esophageal cancer image for helping the doctor to interpret the detected object image.

The esophagus is a tubular organ connecting the pharynx and stomach [2], which is mainly responsible in transporting foods swallowed by the mouth to the stomach. The normal esophageal mucosa has multiple layers of squamous epithelial cells with the thickness of 200 to 500 μm; from the surface down to the bottom, the esophageal mucosa can be divided into the following layers: The mucosal epithelium (EP), lamina propria mucosal (LPM), mucosal muscularis (mm), submucosa (SM) and muscularis propria (MP). Esophageal cancer is a global top 8 most common cancer; the malignant tumors derived from epithelial tissue are called the esophageal cancer. Cancers (also known as the malignant tumors) generally affects physiological functions, the types include the sarcoma, lymphoma, leukemia, melanoma, carcinosarcoma and malignant glioma.
Among them, malignant tumors occurred in the connective tissues are called the sarcomas; the connective tissues include the fibrous tissue, adipose tissue, muscle, blood vessel, bone and cartilage. The lymphoma and leukemia occur in hematopoietic tissue. Melanomas occur in skin cells. Malignant tumors occurred in both epithelial and connective tissues are called the carcinosarcoma. Malignant gliomas are the malignant tumors occurred in the nervous tissue. The malignant tumors of esophageal carcinoma not only infiltrate the epithelial tissue of esophagus, but also the connective tissue in later stage.
At present, disease diagnosis technologies usually rely on single macro data and information, such as body temperature, blood pressure and body scan images. For example, for the detection of major diseases such as cancer, most of them are based on imaging devices including X-ray, CT scanning and nuclear magnetic resonance (NMR) imaging technology. When these diagnostic devices are used together, they are useful for the diagnosis of diseases in varying degrees. However, when these devices are used alone, they cannot carry out accurate, reliable, efficient and economic detections in the early stage of major diseases. In addition, many of these existing devices are large and invasive, such as X-ray, CT scan or nuclear magnetic resonance (NMR) imaging technology. Therefore, the endoscopy was developed to examine the presence of lesions in the digestive organs.
Early esophageal cancer is not easy to diagnose thereof. Except the fact that there are almost no symptoms in the early stage, some early esophageal cancers cannot be figured out; since the changes of these lesions are very subtle, and often just some color changes only; therefore, if the traditional endoscopy is used to detect the lesions, there will be a large number of early esophageal cancer lesions being neglected with delay treatment. Therefore, Lugol chromoendoscopy, Narrow Band Image (NBI) and Magnifying Endoscopy have been developed for lesions that are difficult to detect about.
However, the operation of endoscopy is very complicated. Before carrying out endoscopic detection, it requires medical staff to have professional licenses related to endoscopy. Moreover, the medical staff should operate the endoscope and distinguish the lesions at the same time. Even though the endoscopic detection method has been improved in many ways, it is inevitable to encounter manual operation negligence, or the endoscopic image is still not easy to identify about.
Based on the aforesaid difficulties, the present application provides a method in detecting object images by using a convolutional neural network, in which the host performs convolution operation and inputs images to the convolutional neural network to calculate and obtain the feature images, derive the images of object, and compare the sample image through the object image; classify the object images into a target object image or a non-target object image; avoid the difficulty of artificial image identification.

Method for detecting image of object using convolutional neural network


A fluidic oscillator is disclosed for providing oscillating flow to outlet ports (172, 173). The fluid oscillator (100) in one embodiment has no fluid communication between a pair of diverging diffuser legs (163, 164) downstream of the upstream edge (169) of a splitter (165) and no fluid communication between a chamber (162) and either of the diverging diffuser legs downstream of the splitter edge. In other embodiments, a turbulent flows generator is formed by use of bump step (202), pins (220, 230), surface discontinuities (250) or a combination thereof.

U.S. Pat. No. 5,165,438 discloses two fluidic oscillators, each of which employs a wedge-shaped splitter to route the flow of a fluid down diverging diffuser legs. In one oscillator, a feedback passageway from each leg is routed back to the flow path upstream of the splitter to create a condition establishing oscillating flow through the legs. In a second oscillator, a passageway between the legs downstream of the upstream end of the splitter creates a condition establishing oscillating flow through the legs.
While these designs have proven quite effective, the passages required to establish oscillation are expensive to fabricate and prone to clogging from debris in the fluid. In addition, in some such designs cavitation damage has occurred in the device adjacent to the transverse passage, eroding the walls of the diverging diffuser legs. Further, impurities in the flow have been found to erode the upstream end of the splitter. A need exists to provide an even more effective fluidic oscillator design which is reliable, long-lived and economical.


A hard disk device has a temperature detection device operable to detect a temperature in the hard disk device. A controlling section is operable to control functions of an electronic apparatus. A notifying section is operable to notify an abnormality of the electronic apparatus. The controlling section acquires the temperature detected by the temperature detection device from the hard disk device. The controlling section controls the notifying section to notify the abnormality of the electronic apparatus when the acquired temperature is higher than a reference temperature.

The present invention relates to an electronic apparatus having a built-in hard disk device that is provided with a thermistor sensor for detecting an internal temperature of the hard disk device, and when the internal temperature detected by the thermistor sensor at the time of recording information is higher than a predetermined temperature, the hard disk device executing a self-diagnosis function to read out the once recorded information again, thus verifying the contents of the recorded information. For example, the invention relates to an electronic apparatus such as a DVD recorder having a built-in hard disk device or a liquid crystal TV having a built-in hard disk device.
In the past, in various kinds of electronic apparatuses such as a DVD recorder or a liquid crystal TV, there has been employed a technique in which a temperature sensor is disposed inside the apparatus to monitor the internal temperature of the apparatus, and when the internal temperature of the apparatus abnormally rises, a cooling fan is driven, or the abnormality is notified to a user, for example, by displaying an error message, thereby preventing a possible malfunction of the apparatus (see Patent Documents 1 to 4, for example).
A recording device disclosed in Patent Document 1 is a DVD video recorder with a hard disk drive (HDD). The recording device is configured such that a temperature detecting section such as a thermistor sensor directly detects the internal temperature of the recording device and when the internal temperature of the recording device excessively rises, the internal temperature of the recording device is lowered by controlling a cooling fan.
An optical information recording and reproducing device disclosed in Patent Document 2 is configured such that a thermistor sensor directly measures the internal temperature of the device and when it is detected that the measured temperature is higher than a predetermined value, the detection result is outputted to the outside to caution.
An information processing system with a temperature detection function disclosed in Patent Document 3 is provided with temperature detection means for directly detecting the internal temperature of a file memory device to prevent destruction of the file memory content which may caused by an access to the file memory device when the internal temperature is high. In the information processing system, it is determined whether or not the temperature detected by the temperature detection means is higher than a predetermined temperature. When the temperature is detected to be higher than the predetermined temperature, an operation of protecting the stored content is executed.
A disk device disclosed in Patent document 4 is provided with temperature detection means for directly detecting a temperature of the disk device. In the disk device, it is determined whether or not the temperature detected by the temperature detection means is within a range of temperature that guarantees a secure operation of the disk device. When it is determined that the detected temperature is outside the guarantee range, the disk device invalidate a write cash function and an automatic substitute function. When receiving a write command, the disk device executes verification after performing a write to the disk so as to confirm whether or not the write can be normally executed.
Patent Document 1: Japanese Patent Publication No. 2002-324391A
Patent Document 2: Japanese Patent Publication No. 03-268291A
Patent Document 3: Japanese Patent Publication No. 06-67910A
Patent Document 4: Japanese Patent Publication No. 2003-297025A
According to Patent Documents 1 to 4, the temperature detection means is provided inside a device of which the internal temperature is to be monitored. The internal temperature of the device is directly detected by the temperature detection means, and on the basis of the detected temperature, the control of the cooling fan, the display of the message, the write to the disk, or the like are performed. However, the respective devices disclosed in Patent Documents 1 to 4 require the temperature detection means for directly detecting the internal temperature of the device.
Recently, electronic apparatuses having a built-in hard disk drive (HDD) have become widely used as a recording medium. The hard disk drive has a large recording capacity and a very fast access speed. In this respect, such electronic apparatuses having the built-in hard disk drive will become more widely used.
Since the hard disk drive is used as an auxiliary memory device of a computer, the hard disk drive requires high reliability in information recording and reproduction. For this reason, the hard disk drive is generally hermetically enclosed in a metallic case. Various methods have been devised for controlling internal operations of the hard disk drive. For example, there is a method in which a thermistor sensor is installed in the hard disk drive to detect the internal temperature, and when the internal temperature of the hard disk drive detected by the thermistor sensor at the time of recording information is lower than a predetermined lower limit temperature or is higher than a predetermined upper limit temperature, the hard disk drive executes a self-diagnosis function (hereinafter, referred to as "write verification") to read out the once recorded information again, thus verifying the contents of the recorded information. In this case, the predetermined lower limit temperature is set to 20° C., for example. This is because if the information is recorded at a temperature lower than 20° C., the information may be improperly recorded. Meanwhile, the predetermined upper limit temperature is set to 60° C., for example. This is because if the information is recorded at a temperature higher than 60° C., the information may be improperly recorded.
As described above, the hard disk drive has the thermistor sensor inside the case as the temperature detection means for detecting the internal temperature, and the hard disk drive stores information about the temperature detected by the thermistor sensor.

Electronic apparatus having built-in hard disk device


Systems and methods with dynamic Connectivity Fault Management (CFM) and Continuity Check Messages (CCMs) that enable dynamic configurations to avoid limitations associated with static reconfigurations. Variously, a network, a method, and a network element are configured to implement a dynamic CFM method for dynamic notifications and actions taken based thereon between Maintenance End Points (MEPs). The systems and methods may also include a CCM attribute adjustment method between two MEPs, a CCM suspension and/or resumption method between two MEPs, and a MEP auto-discovery and leaving method. Advantageously, the systems and methods may be utilized in a variety of contexts including controlled maintenance, in-service software upgrades, network congestion, discovery of new remote MEPs, and the like to enable dynamic configurations between MEPs. The systems and methods may also apply to Carrier Ethernet, Multiprotocol Label Switching-Transport Profile (MPLS-TP), and the like.

Carrier Ethernet is evolving to support the needs of the carrier network environment. Carrier Ethernet requires scalable, reliable, and dynamic mechanisms to support operations, administration, and management (OAM) and traffic engineering (TE). Standards have been developed in the Metro Ethernet Forum (MEF), International Telecommunication Union (ITU), Institute of Electrical and Electronics Engineers (IEEE), and the like providing many of these required extensions. Specifically, Connectivity Fault Management (CFM) is an Ethernet standard to provide many common OAM functions associated with underlying network transport for services. For example, CFM is defined in IEEE 802.1ag-2007 IEEE Standard for Local and Metropolitan Area Networks Virtual Bridged Local Area Networks Amendment 5: Connectivity Fault Management, the contents of which are herein incorporated by reference. Also, OAM functions are also defined in ITU-T G.8013/Y.1731 (July/2011) "OAM functions and mechanisms for Ethernet based networks," the contents of which are herein incorporated by reference. Further, the MEF also defines Ethernet OAM in various technical specifications, such as MEF 17 (April/2007) "Service OAM Requirements & Framework," the contents of which are herein incorporated by reference. Variously, CFM enables definition of maintenance domains, their constituent maintenance points, and the managed objects required to create and administer them; definition of relationships between maintenance domains and the services offered by Virtual Local Area Network (VLAN)-aware bridges and provider bridges; description of protocols and procedures used by maintenance points to maintain and diagnose connectivity faults within a maintenance domain; and the like.
CFM includes Continuity Check Messages (CCM) which may generally be referred to as "heart beat" messages for CFM. That is, CCMs provide a mechanism to detect connectivity failures in a Maintenance Entity Group (MEG) or a Maintenance Association (MA). CCMs are multicast messages that are confined to a MEG Level or a Maintenance Domain (MD). These messages are unidirectional and do not solicit a response. Each Maintenance End Point (MEP) transmits a periodic multicast CCM inward towards the other MEPs. Conventionally, CCM related attributes are statically configured in IEEE 802.1ag-2007, G.8013/Y.1731, and the MEF. In order to change the attributes, static reconfiguration is required. Also, MEPs are statically configured in IEEE 802.1ag-2007, G.8013/Y.1731, MEF 17, etc. In order to add or remove a MEP from a MEG or a MA, static reconfiguration is also needed.
The disclosure herein addresses problems caused by the requirement for such static reconfiguration. For example, such static reconfiguration required by the prior art systems adds complexity, especially with the large scale of proactive service OAM sessions. Further, either from complexity, or time allowed (for uncontrolled cases), it is difficult to protect service traffic during such static reconfiguration.

Systems and methods for dynamic operations, administration, and management


Provided is a control system that includes a vibration mechanism that generates a vibration and presents the vibration to a user and a control apparatus that controls the vibration mechanism. The control apparatus acquires vibration data representative of a waveform of a vibration that is to be generated by the vibration mechanism and causes the vibration mechanism to generate a vibration in accordance with corrected vibration data obtained by executing processing for reducing part of frequency components, included in the waveform represented by the acquired vibration data, other than a resonant frequency of the vibration mechanism.

In the same manner as in an operation device or the like that is used in connection with a home-use game machine, some devices that are used while worn on the body of or held by the user include a vibration mechanism for vibrating a portion or the whole of the device. Thereby, the device can be vibrated at arbitrary timing and present a vibration to the user.

Vibration device and control system for presenting corrected vibration data


A new and distinct plum variety that has mildly sweet fruit, black skin, and bright red flesh with abundant juice is described. The new variety has consistently high productivity, setting crops even in rainy, cool bloom conditions.

Prunus salicina.
xe2x80x98Suplumtwentyfourxe2x80x99.
This invention relates to the discovery and asexual propagation of a new variety of plum, Prunus salicina cv. xe2x80x98Suplumtwentyfourxe2x80x99. The new variety was first hybridized by Carlos D. Fear and selected by Bruce D. Mowrey. The new variety was evaluated by Bruce D. Mowrey and David W. Cain near Wasco, Kern County, Calif. The variety was originated by hybridization. The new variety is characterized by its high consistent productivity, setting crops even in rainy, cool bloom conditions.
The seed parent is xe2x80x98Suplumtwelvexe2x80x99 (U.S. Plant Pat. No. 4,965) and the pollen parent is Sun World breeding selection xe2x80x98275-136xe2x80x99 (unpatented). The parent varieties were first crossed in 1988, with the date of sowing of March 1989 and the date of first flowering being 1991. The new plum variety was first asexually propagated by Bruce D. Mowry near Wasco, Kern County, Calif. in May 1992, by budding onto Nemared rootstock.
The new variety xe2x80x98Suplumtwentyfourxe2x80x99 is similar to its seed parent the xe2x80x98Suplumtwelvexe2x80x99 variety in that it has approximately the same ripening date. It differs from its seed parent by having flesh that is more nearly solid, bright red color. The seed parent, in contrast, is more yellow in color in the region near the pit cavity until the fruit is at the soft ripe stage. xe2x80x98Suplumtwentyfourxe2x80x99 may be further distinguished from its seed parent by having larger size fruits, (averaging 7.0 cm in diameter compared to 6.3 cm for xe2x80x98Suplumtwelvexe2x80x99), a rounder, less oblate shape, and a smoother skin surface as compared to the more corrugated skin surface texture of the seed parent xe2x80x98Suplumtwelvexe2x80x99.
The new xe2x80x98Suplumtwentyfourxe2x80x99 variety is distinguished from its pollen parent xe2x80x98275-136xe2x80x99 (unpatented) by yielding larger fruits, averaging 7.0 cm. in diameter compared to the 6.0 cm fruits of xe2x80x98275-136xe2x80x99. Fruits of xe2x80x98Suplumtwentyfourxe2x80x99 are rounder as compared to the more oblate shape of xe2x80x98275-136xe2x80x99 fruits. The flesh of xe2x80x98Suplumtwentyfourxe2x80x99 is brighter and more nearly solid red, developing earlier than in xe2x80x98275-136xe2x80x99, which has a more yellow flesh in the pit region until the fruit is fully ripe. The new variety is more consistently productive than xe2x80x98275-136xe2x80x99, setting full crops in rainy, cool bloom conditions while xe2x80x98275-136xe2x80x99 sets poorly under such conditions. The new variety ripens approximately nine days after its pollen parent xe2x80x98275-136xe2x80x99.
The new plum variety cv. xe2x80x98Suplumtwentyfourxe2x80x99 most nearly resembles the xe2x80x98Suplumelevenxe2x80x99 (U.S. Plant Pat. No. 4,902) variety. It may be distinguished from the xe2x80x98Suplumelevenxe2x80x99 by having more intense red flesh coloration which develops earlier in the maturation process than xe2x80x98Suplumelevenxe2x80x99. xe2x80x98Suplumtwentyfourxe2x80x99 ripens approxiamately 20 days earlier than xe2x80x98Suplumelevenxe2x80x99, with fruit that is softer, with more melting flesh texture than in the xe2x80x98Suplumelevenxe2x80x99 variety. Moreover, the fruit of xe2x80x98Suplumtwentyfourxe2x80x99 is more nearly round and less oblate in shape than xe2x80x98Suplumelevenxe2x80x99.
The new xe2x80x98Suplumtwentyfourxe2x80x99 variety vaguely resembles the xe2x80x98Black Amberxe2x80x99 variety, but differs from xe2x80x98Black Amberxe2x80x99 by producing fruit with red-colored flesh in contrast to the yellow flesh of the xe2x80x98Black Amberxe2x80x99 variety. The new variety yields larger fruits that are more uniform in comparison to the xe2x80x98Black Amberxe2x80x99 variety. Additionally, the xe2x80x98Suplumtwentyfourxe2x80x99 variety ripens approximately five days earlier than the xe2x80x98Black Amberxe2x80x99 variety.
The new variety xe2x80x98Suplumtwentyfourxe2x80x99 ripens at the same time as the xe2x80x98Santa Rosaxe2x80x99 plum variety. It differs from the xe2x80x98Santa Rosaxe2x80x99 variety by possessing black skin and bright red flesh, in comparison to the dark red skin and yellow-red flesh of the xe2x80x98Santa Rosaxe2x80x99 variety.
The new xe2x80x98Suplumtwentyfourxe2x80x99 variety has been shown to maintain its distinguishing characteristics through successive asexual propagations by, for example, budding onto xe2x80x98Nemaredxe2x80x99 rootstock.

Plum tree named xe2x80x98Suplumtwentyfourxe2x80x99


An enclosure for an engine wiring harness includes a first enclosure member and a second enclosure member that is substantially similar to the first enclosure member. The first and second enclosure members each have an upper edge, a lower edge, and an intermediate portion extending between the upper edge and the lower edge. The first and second enclosure members are assembled together with the upper edges in contacting engagement and with the lower edges in contacting engagement. The assembled enclosure defines a passageway for receiving at least a portion of the engine wiring harness, a first opening in communication with the passageway, a second opening in communication with the passageway, and an attachment assembly for securing the enclosure to an engine.

Engine wiring harnesses provide electricity to, and communicate signals between, electrical components of, or associated with, an engine. Engine wiring harnesses typically include multiple wires, with individual branches of the engine wiring harness being for distinct purposes. For example, some branches of an engine wiring harness may provide electricity to components that require it, such as electrically-actuated injectors. Other branches of the engine wiring harness may communicate signals, such as signals originating at a sensor that are communicated to an engine control module.
Engine wiring harnesses are positioned external to the engine block and head, and may be secured to the engine in some instances. For example, U.S. Pat. No. 5,203,292 relates to a wiring arrangement for electric parts of an outboard motor. The '292 patent discloses a cover that is secured to an engine, with various electrical connections being contained within the cover. These electrical connections within the cover are joined via connectors to wires that service electrical components. The shape and configuration of the cover is designed to correspond with the shape of the electrical connections contained within the cover, however, and not all engines use a wiring arrangement like in the '292 patent. Therefore a need remains for improvements relating to engine wiring harnesses.


A weather strip includes an ethylene-α-olefin-nonconjugated diene copolymer rubber composition having a volume resistivity of no less than 1.0E+6 Ω·cm and having a specific gravity of less than 1.30, the rubber composition including: carbon black in an amount of 40 parts by mass to 140 parts by mass; and at least one polymer having a specific gravity of no more than 1.8 and an ethylene content of no more than 70 wt % and at least one polymer having a specific gravity of no more than 1.8 and an ethylene content of no less than 70 wt % in a collective amount of 5 parts by mass to 50 parts by mass, per 100 parts by mass of an EPDM polymer. At least a mount base of the weather strip, which is to be mounted to a car body, is formed of the rubber composition.

It is known that galvanic corrosion occurs on a portion of a steel plate of a car body to which a weather strip is mounted and results in rusting. This is because rubber materials used for weather strips contain a large amount of carbon black, which readily allows electric current to flow. The rubber material of the weather strip, which is mounted to and in contact with a fitted portion of a steel plate, is electrochemically more noble than steel. Upon contacting conductive liquid such as rain or rinse water, the interface between the rubber material and steel acts as a local cell, and the electric current flowing therein ionizes the steel, which is less noble than the rubber material, resulting in oxidation and dissolution of steel.
Increasing demands for a lighter car body for fuel efficiency cause more car manufacturers to use lighter metals such as aluminum alloy instead of conventionally used steel for car bodies. However, aluminum is less noble than steel and thus more prone to galvanic corrosion than steel, which inevitably arouses concerns about galvanic corrosion on the fitted portion in contact with the weather strip.
To eliminate these concerns, weather strips that can prevent galvanic corrosion are required. Patent Document 1 describes a weather strip formed of an ethylene propylene rubber. Although carbon black-containing rubber members having surface electric resistivity of 1.0E+4 to 1.0E+5 Ω·cm are widely used, Patent Document 1 describes a rubber member containing less carbon black and having surface electric resistivity of no less than 1.0E+6 Ω·cm, which can substantially prevent rusting on an aluminum alloy member.
Patent Document 2 describes an ethylene-α-olefin-nonconjugated diene copolymer rubber composition containing carbon black that has a relatively low surface electric resistivity of 1.0E+4 to 1.0E+6 Ω·cm. Despite such a relatively low surface electric resistivity, the rubber composition can form a weather strip that will not corrode aluminum alloy for a long time. This is achieved by kneading the rubber composition in an unvulcanized state until it obtains a viscoelasticity having a complex modulus that changes at a certain rate or higher. The complex modulus is an index of viscoelasticity of unvulcanized rubber.
Patent Document 3 describes a technique of including white fillers as well as carbon black in an ethylene propylene rubber as reinforcing agents to make a weather strip. White fillers are added to reduce luster of the black rubber including carbon black, not to prevent galvanic corrosion described above.


Methods, systems, and storage media are described for Load Balancing Optimization (LBO) and Mobility Robustness Optimization (MRO) for fifth generation (5G) systems. In particular, some embodiments may be directed intra-radio access technology (RAT) energy saving scenarios while other embodiments may be directed to and inter-RAT energy saving scenarios. Other embodiments may be described and/or claimed.

Among other things, embodiments of the present disclosure may help provide Load Balancing Optimization (LBO) and Mobility Robustness Optimization (MRO) for fifth generation (5G) systems. In particular, some embodiments may be directed intra-radio access technology (RAT) energy saving scenarios while other embodiments may be directed to and inter-RAT energy saving scenarios.


An improved method and apparatus for easily and accurately aligning confocal tandem scanning reflected light microscopes having scanning disc hole diameters as small as 20 microns are described. The method involves the observation and analysis of Moire and other patterns of light occurring within the microscope, and using the apparatus to make very sensitive adjustments that result in a fully aligned, rugged, and stable confocal tandem scanning reflected light microscope offering improved resolution, contrast, and optical slicing capability.

In U.S. Pat. No. 3,517,980 of Jun. 30, 1970, Petran and Hadravsky described a confocal tandem scanning reflected light microscope wherein light is passed to a target through a rotating disc containing several thousand very small holes. Such light is then reflected from the target in a pattern of pinpoints of light through holes in the scanning disc that are exactly opposite the illumination holes. Such a microscope improves resolving power and permits observation of objects covered by translucent materials. The embodiments produced and available to date have used scanning discs having hole diameters of about 60 microns, which holes are larger than is desirable for best microscope resolution, contrast discrimination, and thinnest optical slicing capability. The major reason for not producing microscopes with smaller disc holes is the inability to align such microscopes precisely and easily, and to maintain such alignment, using component mounting schemes and adjustment techniques currently embodied.
This present invention relates to confocal tandem scanning reflected light microscopes having scanning disc holes of diameter as small as 20 microns, and more particularly to an improved optical element mounting apparatus, and to an improved method of adjusting such apparatus. Confocal tandem scanning microscopes having very small scanning disc holes are particularly important and useful for real time, high-magnification viewing of, among other things, living bulk translucent tissues (as in the living eye) and the thinnest possible optical slices thereof, with best resolution and contrast discrimination, all a direct result of the presence of smaller scanning disc holes and precise optical path alignment methods.
In current confocal tandem scanning microscopes using 60 micron holes, alignment of optical elements in the light path is critical, difficult and time consuming, and may not be precise enough to obtain best microscope performance, even for the 60 micron holes. In devices currently on the market, the various elements to be adjusted are basically stacked (piggybacked) so that certain adjustments along the stack are inter-related with other adjustments of elements in the stack. The alignment process involves placing external red and green light sources at the illumination area and viewing area of the disc respectively, and attempting to move the interacting components so as to achieve exact registration of all the red and green pinpoints of light, when viewed through the objective lens opening (both the illumination and the viewing areas can be seen superimposed due to the presence of a beamsplitter). If adjustments can be made so that all the red holes can be exactly superimposed on the all the green holes, the microscope is correctly aligned. Such a method is very laborious and somewhat imprecise when the holes are 60 microns in diameter, and is prohibitively laborious and very imprecise when the holes are 20 or 30 microns in diameter, and therefore is not practical for use when the smaller holes are employed.
One other type of confocal tandem scanning microscope that is currently available (called a "one-path" or "one-sided" confocal tandem scanning microscope) uses disc holes in the 20 to 40 micron range, and requires no special alignment, since it projects the illumination and receives it back through the same scanning hole. Such a microscope is less complex and generally less expensive than a full "two-path" microscope as in the original invention, but has the disadvantage of requiring that the beamsplitter be placed in apposition to the opposite surface of the disc, so that the illuminating light passes through the beamsplitter before passing through the disk, thus exposing the eyepiece to a substantially larger amount of stray reflections than in the two- path microscope. A one-path embodiment is most effective where the light (signal) reflected from the target is bright relative to the light from undesired sources (noise), including stray internal reflections. Such a microscope is readily usable in observing integrated circuit "chips" and other high-reflectance or high contrast targets; however, it is less effective where the light reflected from the target is well below ambient light, such as when the target is one of many types of soft biological tissue (e.g., living eyes) or other relatively non-reflective or low contrast materials.

Confocal tandem scanning reflected light microscope


A power semiconductor device includes a power semiconductor element formed on a substrate and a temperature detector including a temperature detecting diode element having at least one diode for detecting temperature formed on the substrate. Additionally, the temperature detecting diode includes two regions having different conductive type each other. The capacitance between one region and base region of the semiconductor element is as large as capacitance between another region and the base region.

1. Field of the Invention
The present invention generally relates to a power semiconductor device and, more particularly, to the power semiconductor device having at least one temperature detector incorporated therein.
2. Description of the Prior Art
The power semiconductor device is generally known as used to deal with a relatively high electric power and does therefore evolve a relatively large amount of heat. In order to protect the power semiconductor device from being overheated, importance has come to be recognized to provide the semiconductor device with an overheat protection. For this purpose, the power semiconductor is generally provided with a temperature detector on the same substrate where semiconductor elements are formed, to thereby monitor the temperature of the substrate. The prior art power semiconductor device having such a temperature detector incorporated therein will be discussed in detail with particular reference to FIGS. 11 and 12.
As shown in FIG. 11, the power semiconductor device identified by 50 includes a power semiconductor element 80 such as, for example, an insulated gate bipolar transistor (IGBT) and a temperature detector 60. This temperature detector 60 employed in the power semiconductor device 50 is made up of two diode elements 70 and 71 formed on a p-type region 52 of the substrate 51 with a insulating layer 54 intervening therebetween. As shown in an equivalent circuit diagram in FIG. 13, the diode element 70 is used for detecting the temperature of the substrate and is connected in forward biased fashion between an anode 62 and a cathode 64, whereas the diode element 71 is connected in reverse biased fashion between the anode 62 and the cathode 64 for cramping a reverse voltage which may be generated in, for example, a control circuit. In detecting the temperature of the substrate, this temperature detecting diode element 70 generally relies on the temperature dependency of the forward going voltage VF between the anode 62 and the cathode 64.
In practice, the reverse voltage cramping diode element 71 does not require the temperature dependency to be taken into consideration and, therefore, a single diode is employed therefor for minimizing a space occupied thereby on the substrate. On the other hand, temperature dependent change of the forward going voltage VF between the anode 62 and the cathode 64 of the temperature detecting diode element 70 is relatively small and, therefore, for the temperature detecting element 70, a plurality of diodes connected in series with each other are generally employed to increase the temperature dependent change. By way of example, FIG. 13A illustrates, in a schematic plan view, the power semiconductor device in which the temperature detecting diode element 70 is comprised of two diodes 70a and 70b and the reverse voltage cramping diode element 71 is comprised of a single diode. FIG. 13B illustrates a cross-sectional representation taken along the line Dxe2x80x94D in FIG. 13A. In this power semiconductor device shown in FIGS. 13A and 13B, respective portions of the insulating layer 54 positioned immediately beneath the diodes 70a, 70b and 71 have an equal thickness.
It has, however, been found that the temperature detector 60 employed in the above described power semiconductor device 50 is susceptible to an erroneous operation that is brought about by external noises such as, for example, unwanted external electromagnetic waves and is therefore limited in application. Specifically, since the power semiconductor device 50 has parasitic capacitances, a difference occurs between an electromotive force generated in a forward going path of the diode element 70 and that generated in a negative going path of the diode element 71 when the temperature detector 60 is interfered with an external electromagnetic wave, resulting in an erroneous operation.
The parasitic capacitances referred to above will be discussed in detail. As discussed above, FIG. 12 is an equivalent circuit diagram of the power semiconductor device 50 shown in FIG. 11. Regions 56 and 58 of different conductivities opposite to each other that form the diode elements 70 and 71, respectively, of the temperature detector 60 confront the p-type region 52, which is a base region of the power semiconductor device 80, through the insulating layer 56. Considering that this p-type region 52 is held at a potential which is the same as the emitter potential and that the diode elements 70 and 71 forming respective parts of the temperature detector 60 are formed on the insulating layer 56, a parasitic capacitance C1, C2, C3 and C4 is formed between the base region 78 and each of regions of respective conductivities of the diode elements 70 and 71.
Hitherto, the presence of the parasitic capacitances C1 to C4 has not been recognized. In contrast, the inventors of the present invention have found that the presence of those parasitic capacitances brings about detrimental problems to the proper functionality of the temperature detector used in the power semiconductor device. By way of example, since the regions of the two different conductivities forming the respective diode elements have respective surface areas that are generally different from each other, the parasitic capacitances on respective sides of each of the diode elements are of different values, that is, C1xe2x89xa0C2 and C3xe2x89xa0C4. Also, where the two diodes 70a and 70b are connected in series with each other to form the temperature detecting diode element as shown in FIG. 13A, the total capacitance generated between the diodes 70a and 70b and the base region 78 of the power semiconductor element 80 amounts to twice that generated between the reverse voltage cramping diode element 71 and the base region 78, that is, C1=2xc3x97C3 and C2=2xc3x97C4. Because of this, when an external noises such as the external electromagnetic wave interfere with the power semiconductor device 50, a difference occurs between an electromotive force generated in the forward going path of the diode element 70 and that generated in the negative going path of the diode element 71 as hereinbefore described, resulting in an erroneous operation. A similar difference occurs even between an electromotive force generated in a circuit between the diode 70a and the cramping diode 71 and that between the diode 70b and the cramping diode 71, resulting in an erroneous operation.
The Japanese Laid-open Patent Publications No. 8-236709, No. 10-116987 and No. 58-25264 discloses a semiconductor device in which a power element and a heat sensitive element formed on a common semiconductor substrate with an insulating layer intervening therebetween to prevent a parasitic action of the heat sensitive element. Even in the power semiconductor devices disclosed in those publications, since the heat sensitive element confronts the semiconductor substrate through the insulating layer, parasitic capacitances tends to be formed in a manner as discussed hereinabove. However, none of those publication address to the problem associated with the parasitic capacitances.
Accordingly, the present invention has been devised to provide an improved power semiconductor device having a temperature detector incorporated therein, which is substantially free from an erroneous operation which would otherwise be brought about under the influence of an external noise such as an external electromagnetic wave.
In accordance with one aspect of the present invention, there is provided a power semiconductor device which includes a power semiconductor element formed on a substrate and a temperature detector including a temperature detecting diode element having at least one diode formed on the substrate for detecting a temperature. The temperature detecting diode has two regions of conductivity types different from each other. Also, a capacitance formed between one of the regions and a base region of the semiconductor element is substantially equal to a capacitance formed between the other of the regions and the base region.
A surface area of one of the two regions confronting the base region of the semiconductor element is preferably equal to that of the other of the two regions confronting the base region.
In one preferred embodiment of the present invention, the temperature detector may also include a reverse voltage cramping diode element having a diode for cramping a reverse voltage. In this case, the temperature detecting diode and the cramping diode are connected in reverse biased fashion to each other.
In another preferred embodiment of the present invention, the sum of capacitances between the regions of the temperature detecting diode and the base region may be substantially equal to the sum of capacitances generated between the regions of the cramping diode.
In a further preferred embodiment of the present invention, total area of the temperature detecting diode confronting the base region may be substantially equal to the total area of the cramping diode.
In a still further preferred embodiment of the present invention, the temperature detecting diode element may include a plurality of diodes connected in series.
In a still further preferred embodiment of the present invention, the temperature detecting diode may be formed opposite the base region through the insulating layer. Consequently, the first ratio between total area against the base region and thickness of the insulating layer in the temperature detecting diode may be substantially as large as the second ratio between total area against the base region and thickness of the insulating layer in the cramping diode.
According to the power semiconductor device of the present invention, the power semiconductor device includes a temperature detector including a temperature detecting diode element having at least one diode for detecting temperature formed on the substrate, on which a power semiconductor element is also formed. The temperature detecting diode has two conductive regions of conductivity types different from each other. Also, a first capacitance generated between one region and the base region of the semiconductor element is substantially equal to a second capacitance formed between another region and the base region. Therefore, the difference from first electromotive force and second electromotive force may be substantially eliminated, so that the temperature detector will not operate erroneously.
According to the power semiconductor device of the present invention, two conductive regions of the temperature detecting diode have area opposite the base region of the semiconductor element as large as each other. Then, the capacitance generated between each region and the base region may be as large as each other. Therefore, the difference from first electromotive force and second electromotive force may be substantially eliminated, so that the temperature detector will not operate erroneously.
According to the power semiconductor device of the present invention, the diode for cramping reverse voltage may be connected between the anode and the cathode in a reverse biased fashion in the temperature detector with respect to the temperature detecting diode. Therefore, the reverse voltage generated between the cathode and the anode may be cramped and be changed within area of predetermined value.
According to the power semiconductor device of the present invention, the total capacitance summed from capacitances generated between the regions of the temperature detecting diode and the base region of the cramping diode may be substantially as high as the total capacitance summed from capacitances generated between the regions of the cramping diode and the base region. Therefore, even if any noise from outside, e.g. magneto-electric jamming will trespass into the power semiconductor device, difference between one electromotive force generated in the circuit of the temperature detecting diode and another electromotive force generated in the circuit of the cramping diode may be substantially eliminated, so that the temperature detector will not operate erroneously.
According to the power semiconductor device of the present invention, the total area of the temperature detecting diode confronting the base region may be substantially as large as the total area of the cramping diode. Then, the total capacitance summed from capacitances generated between the regions of the diode for detecting temperature and the base region of the cramping diode may be substantially as high as the total capacitance summed from capacitances generated between the regions of the cramping diode and the base region. Therefore, even if any magneto-electric jamming will trespass into the power semiconductor device, the difference between one electromotive force generated in the circuit of the temperature detecting diode and another electromotive force generated in the circuit of the cramping diode may be substantially eliminated, so that the temperature detector will not operate erroneously.
According to the power semiconductor device of the present invention, the temperature detecting diode element may include a plurality of diodes connected in series with each other. Therefore, the voltage VF between the anode and the cathode in the forward direction may be amplified, so that temperature may be detected at high precision.
According to the power semiconductor device of the present invention, the temperature detecting diode may be formed opposite the base region through the insulating layer. In addition, the first ratio between the total area against the base region and thickness of the insulating layer in the temperature detecting diode may be substantially as large as the second ratio between the total area against the base region and thickness of the insulating layer in the cramping diode. Then, the total capacitance summed from capacitances generated between the regions of the temperature detecting diode and the base region of the cramping diode may be substantially as high as total capacitance summed from capacitance generated between each region of the cramping diode and the base region. Therefore, even if any magneto-electric jamming will trespass into the power semiconductor device, difference between one electromotive force generated in the circuit of the temperature detecting diode and another electromotive force generated in the circuit of the cramping diode may be substantially eliminated, so that the temperature detector will not work erroneously.

Power semiconductor device with temperature detector


A tail turn-up assembly has a frame positioned upstream of a reel spool. A carriage is pivotally mounted to the frame by a four bar linkage. The carriage is pivotable, from a retracted position to an extended position. When the carriage is engaged with the reel spool, a pair of curved tracks are positioned so that arcs defined by the tracks have their centers coincident with the spool axis. A knife carriage rides on the curved tracks and is constrained to move circumferentially about the reel spool. An actuator on the carriage causes the knife carriage to traverse circumferentially about the reel spool. The knife carriage has a leading edge formed by a knife which tears through the a tail which is cut from the web when the knife carriage is moved on the curved tracks.

The present invention relates to windups in general and to automatic reel change in a windup in particular.
A windup is used with a calender or other paper handling equipment. Paper is unwound and passed through a calender, coater or other paper handling equipment and wound on to empty spools. In a process such as calendering, it is most cost effective if the winding of paper onto the reels is as automatic as possible. Automation reduces labor, increases productivity of the machinery used, and increases safety.
After leaving the last lead-out roll in a calender or other paper converting equipment, the paper web is threaded through a rider roll assembly. The rider roll assembly typically includes a pivoting arm, a lead-in roll, and a rider roll. Auto splicing components and a traversing knife, as well as a nip guard may also be mounted to the pivoting arm. The rider roll engages a reel being formed about a spool which is held in a windup stand.
Stiff paper webs can present difficulties in reliably directing a paper tail around the new spool in a windup. This is particularly true if a nip guard requires the web to be threaded into a narrow gap between the nip guard and the new spool. What is needed is an automatic device which can thread a web of paper or other sheet material, particularly board or stiff paper, reliably and in the presence of a nip guard.


A steering device for a vehicle includes a first sun gear connected to a steering member, a second sun gear which is operated according to operation of the steering member and connected to a steering mechanism for turning vehicle wheels, a first planet gear which is meshed with the first sun gear, and a second planet gear which is rotated integrally with the first planet gear and meshed with the second sun gear. The steering device is constructed in such a manner that at least one of the first and second sun gears is a profile shifted gear, and the first and second planet gears are formed as a cylindrical body which has internal teeth of the same number at both end parts thereof.

1. Field of the Invention
The present invention relates to a steering device for a vehicle which turns vehicle wheels according to operation of a steering member.
2. Related Art
A steering device for a vehicle which includes a first sun gear connected to a steering member, a second sun gear which is operated according to operation of the steering member and connected to a steering mechanism for turning vehicle wheels, a first planet gear having external teeth and meshed with the first sun gear, a second planet gear which is rotated integrally with the first planet gear and has external teeth meshed with the second sun gear, and a carrier for supporting the first and second planet gears so as to revolve and rotate on their own axes, the steering device being constructed in such a manner that at least one of the first and second sun gears is a profile shifted gear, whereby the numbers of teeth of the first and second sun gears are made different from each other, and the first and second planet gears are formed on a columnar body which has external teeth of the same number at both end parts thereof, whereby the number of components and working steps can be reduced has been known (Reference should be made to Japanese Patent Publication No. JP-A-2005-344757, for example).
However, in the steering device in JP-A-2005-344757 which is constructed in this manner, the two planet gears are arranged outside of the sun gears having the external teeth in a radial direction and at positions divided in two in a circumferential direction so as to revolve and rotate on their own axes. For this reason, an area including the planet gears becomes large-diameter in the radial direction, which makes the steering device large-sized. Moreover, lubricant to be applied to the teeth of the sun gears and the planet gears is likely to be scattered to the exterior, and sliding speed of the planet gears having the external teeth is so high that vibration noise in meshed parts becomes loud. Therefore, measures for overcoming such drawbacks have been desired.


The invention relates to a film comprising an interpenetrating network, its uses and processes for making the same. The film produced displays good durability, chemical resistance and transparency. The film is produced from an interpenetrating network formed as a colloidal suspension in an organic solvent and a particulate solid.

Natural self-cleaning surfaces, such as the lotus leaf, rely on the spontaneous formation of rolling water droplets that suspend and trap contaminants enabling their facile removal. The required extreme non-wetting effect is attained through a combination of surface texturing and chemistry that results in a Cassie-Baxter wetting state. The durability of this superhydrophobic state is ensured by the cohesiveness and self-healing properties of organic tissues. Synthetic superhydrophobic textures have been made that mimic and surpass natural self-cleaning, however, the structural stability of such structures is, often, insufficient for real-world applications. The few robust structures that have demonstrated industrial-standard abrasion resilience remain highly dependent on substrate type, or are limited by optical transparency. Self-healing super-hydrophobic materials instead often require regeneration through external stimuli and are commonly based on more laborious multi-steps processes. In addition, few surfaces have demonstrated stable sliding angle (SA) and contact angle hysteresis (CAH) during abrasion, both of which are fundamental for achieving a pristine lotus-effect (SA<10°) and efficient self-cleaning. Amongst known superhydrophobic materials, fluoro-functionalized nanostructured silica represents one of the foremost exploited class of materials, but is impeded by its poor mechanical durability. These standing challenges limit the usefulness of existing superhydrophobic coatings, and durable superhydrophobicity remains an actively researched area.
Incorporation of elastic-plastic compounds in sophisticated hierarchical textures required for attainment of a perfect Cassie-Baxter wetting state has the potential to enhance their robustness and long-term use. Elastically and plastically deformable hierarchical structures and materials that provide high optical transparency are challenging to design and synthesize.
Interpenetrated polymer networks (IPNs) represent a class of extremely tough polymers, due to the atomic level interlacing of polymeric chains, forming toughened polymeric nets without the need for covalent bonding between the chains. However, their synthesis is sensitive to full gelation, and requires careful control of the net-to-net entanglement. Two component IPNs are commonly made of a dispersed phase integrated within a more dominant continuous phase, and leverage on the benefits of both cross-linked constituents. In particular, the polyurethane-acrylic (PU-PMMA) system has drawn much attention due to the contrasting soft-rubbery and stiff properties exhibited by the two individual constituents. However, there is a lack of methods to co-texture large-scale surfaces with IPNs.


A cement admixture object of the present invention can make slump-retaining ability excellent to retain fluidity and, at the same time, can realize a viscosity of cement compositions so that work becomes easy at a field handling them, can make the state of a cement composition better. The present invention relates to a cement admixture                which comprises a polycarboxylic acid copolymer having a polyalkylene glycol side chain,        said polycarboxylic acid copolymer being constituted of two or more species of copolymers with different acid values, andat least one of said two or more species of copolymers with different acid values having an oxyalkylene group containing 3 or more carbon atoms.

A cement admixture is widely used as a water-reducing agent for cement compositions such as cement paste, mortar and concrete, and has become essential in constructing civil engineering and building structures and the like from cement compositions. Such concrete admixtures increase the fluidity of cement compositions to thereby reduce the water requirement of the cement compositions, and therefore are effective in improving the strength, durability and the like, of hardened (cured) products. Among such water reducing agents, polycarboxylic acid concrete admixtures comprising a polycarboxylic acid copolymer exhibit superior water-reducing performance to naphthalene and other conventional water reducing agents, thus have already led to good results in many cases as high performance AE (air-entraining) and high-range water-reducing admixture.
Such cement admixtures are required to be able not only to show water-reducing performance in such cement compositions but also to improve cement compositions in viscosity to thereby facilitate the works at the sites of handling them. Thus, the cement admixture used as a water-reducing agent are required at the sites of civil engineering and building structure construction and the like not only to be able to show water-reducing performance by decrease in a viscosity of cement compositions but also to provide a viscosity in such the level that the works will be facilitated at the sites of handling them. If a cement admixture can exhibit such performance characteristics, it will improve the working efficiency in civil engineering and building structure construction and the like.
Meanwhile, regarding a dispersant for an inorganic powder, Japanese Kokai Publication Hei-9-248438 (page 2) discloses the dispersant containing a water-soluble co-condensate or a water-soluble polymer in which a random polymerization chain (A) of an oxypropylene group and/or an oxybutylene group and an oxyethylene group is introduced. However, when it is used in cement compositions as an essential components, there was a room for contrivance in order to further improve the working efficiency in a field of the sites of civil engineering and building structure construction and the like, by improving the retaining ability of fluidity of concrete at a manufacturing filed or at the sites of handling them and, at the same time, by improving the condition of concrete so that the workability of concrete becomes excellent.
In addition, Japanese Patent Application 2003-128594 proposes a cement admixture which improves water-reducing property of cement compositions to make a strength and durability of its hardening product excellent, and can realize such a viscosity that work is easy in a field handling them, by introducing an alkylene oxide part having 3 or more carbon atoms into an intermediate part which is a particular part of a polyethylene glycol chain of a polycarboxylic acid copolymer having a polyethylene glycol chain. However, in such the cement admixture, since hydrophobicity of a cement admixture is too strong, an adsorbing force onto cement is weakened and, in order to enhance a cement dispersing ability, an amount of a cement admixture to be added is relatively large, and there remains a problem that economical disadvantage is caused.


An acoustic signal processing device includes a frequency domain transform unit configured to transform an acoustic signal to a frequency domain signal for each channel, a filter coefficient calculation unit configured to calculate at least two sets of filter coefficients of a filter for each section having a predefined number of frames with respect to a sampled signal obtained by sampling the frequency domain signal transformed by the frequency domain transform unit for each frame such that the magnitude of a residual calculated based on a filter compensating for the difference in transfer characteristics between the channels of the acoustic signal is minimized, and an output signal calculation unit configured to calculate an output signal of a frequency domain based on the frequency domain signal transformed by the frequency domain transform unit and at least two sets of filter coefficients calculated by the filter coefficient calculation unit.

1. Field of the Invention
The present invention relates to an acoustic signal processing device, an acoustic signal processing method, and an acoustic signal processing program.
2. Description of Related Art
A sound source separation technique for separating a component by a certain sound source, a component by another sound source, and a component by noise from a recorded acoustic signal has been suggested. For example, in a sound source direction estimation device described in Japanese Unexamined Patent Application, First Publication No. 2010-281816, in order to select sound to be erased or focused, the sound source direction estimation device includes acoustic signal input means for inputting an acoustic signal, and calculates a correlation matrix of an input acoustic signal. In the sound source separation technique, if transfer characteristics from a sound source to a microphone are not identified in advance with high precision, it is not possible to obtain given separation precision.
However, practically, it is practically difficult to identify a transfer function in an actual environment with high precision. It is anticipated that the sound source separation technique is applied to remove noise (for example, an operating sound of a motor or the like) generated during operation when a humanoid robot records ambient voice. However, it is difficult to identity only noise during operation.
Accordingly, active noise control (ANC) in which the amount of prior information to be set in advance is small has been suggested. ANC is a technique which reduces noise using an antiphase wave with a phase inverted with respect to noise using an adaptive filter.

Acoustic signal processing device and method