A novel amino acid transporter molecule mediating transportation of amino acids, which are nutrients essentially required in the survival and proliferation of various normal cells constituting a living body and various pathology-associated abnormal cells such as tumor cells, into cells and being expressed specifically in tumor cells compared with normal cells; and drugs for treating various pathogenic conditions such as tumor (cancer) which are obtained by identifying and isolating the above amino acid transporter molecule and identifying a substance capable of inhibiting the biological activity and/or expression of this molecule. Intensive studies were made to identify a tumor cell membrane surface molecule associating or interacting with a cell membrane surface 4F2hc molecule seemingly playing an important role in the activation of an unknown amino acid transporter. As a result, a gene encoding the novel amino acid transporter molecule, which mediates the incorporation of various neutral amino acids, various drugs or physiological substances into cells, has been found out and a substance capable of inhibiting the incorporation of amino acids via this molecule and thus inhibiting the proliferation of tumor cells has been also found out.

Amino acids play a very important role not only as a substrate for protein synthesis but also as a precursor in gluconeogenesis and in biosynthesis of many biomolecules such as porphyrin, purine and pyrimidine.
Most of such a biosynthesis reaction is carried out in cells and, therefore, in the cells, various proteins which are generally called amino acid transporters for incorporating amino acid into the cells from outside of the cells are contained in cell membrane.
The amino acid transporter not only functions for supplying amino acids to each cell but also is incorporated into tissues playing a role of an epithelial transport of amino acids in small intestine and renal tubule and a resorption of neurotransmitter in nervous tissue whereby it is oriented at an important position for the expression of a specific function of tissues.
With regard to an amino acid transport mechanism (an amino acid transport system mediated by amino acid transporter), its identification and classification have been carried out using cultured cells and cell membrane samples since about 1960's and, reflecting the diversity of amino acid molecules, there have been identified amino acid transport systems mediated by various amino acid transporters having different substrate specificity (Physiol. Rev. Vol. 70, p. 43-77, 1990).
However, such a transport system does not independently function to each amino acid but each amino acid bears an intracellular transport for more than one amino acids using the more than one amino acids as substrates.
Amino acids are classified into basic amino acids (diamino/monocarboxylic acids) having positive charge, acidic amino acids (monoamino/dicarboxylic acids) having negative charge and neutral amino acids (monoamino/monocarboxylic acids; or those excluding basic amino acids or acidic amino acids). Because of such a charge of amino acid, when a neutral amino acid or an acidic amino acid having negative charge, for example, is transported into cells having negative electric potential against the concentration gradient, it is necessary to carry out an active transport associated with some energy consumption.
From such a viewpoint, in amino acid transporters, that which shows a dependency on sodium (Na+) and that which shows an independency on Na+ are present like in the case of a sugar transport system. The Na+-dependent transporter has a big concentrating ability since it is able to transport the amino acid against the concentration gradient by coupling amino acid transport with Na+ transport and, therefore, it plays an important role in the site in a living body where formation of a big concentration difference mediated by cell membrane is requested (Annual Rev. Kidney "Structure and Function of Kidney-Specific Organic Solute Transporters", p. 91-100, 1995, published by Chugai Igakusha). Such a Na+-dependent transporter can be further classified into two families, i.e. an Na+/Cl−-dependent transporter family and an Na+/K−-dependent transporter family (Annual Rev. Neurosci., Vol. 16, p. 73-93, 1993 and FASEB J., Vol. 7, p. 1450-1459, 1993).
Further, in combination of such a charge property, amino acid transporters can be classified, in view of the substrate specificity, into molecule where basic amino acid (diamino/monocarboxylic acid) is a substrate, molecule where acidic amino acid (monoamino/dicarboxylic acid) is a substrate and molecule where neutral amino acid (monoamino/monocarboxylic acid; or that excluding basic amino acid or acidic amino acid) is a substrate.
It has been known that, for example, a basic amino acid having amino group or imidazole group on the side chain such as arginine, lysine and histidine (basic amino acid which is nearly neutral) is transported mostly by an Na+-independent amino acid transporter y+ (J. Membrane Biol., Vol. 66, p. 213-225, 1982). It has been known that an acidic amino acid having carboxyl group on the side chain such as glutamic acid and aspartic acid is transported by an Na+-dependent amino acid transporter XA,G (Biochim. Biophys. Acta, Vol. 732, p. 24-31, 1983). In the case of transport of a neutral amino acid to which many amino acids belong, it has been known that an Na+-independent amino acid transporter L (Ann. Rev. Physiol., Vol. 46, p. 417-433, 1984) and Na+-dependent amino acid transporters A and ASC (Ann. Rev. Physiol., Vol. 46, p. 417-433, 1984 and J. Membrane Biol., Vol. 52, p. 83-92, 1980) play an important role (Physiol. Rev., Vol. 70, p. 43-77, 1990 and Saishin Igaku, Vol. 50, p. 1997-2004, 1995).
As mentioned already, amino acids play a very important role as materials in biosynthesis of various biocomponents taking place in cells and, therefore, it is presumed that abnormal transport of the amino acid into cell participates in various symptoms.
It has been known from the studies up to now that the symptoms in which abnormal transport mechanism of the amino acid into cells are participated are aminoaciduia where disorder of amino acid resorption from renal tubule occurs and amyotrophic lateral sclerosis, etc. in which disorder of glutamic acid incorporation and nerve cell death are participated (Annual Rev. Kidney "Structure and Function of Kidney-Specific Organic Solute Transporters", p. 91-100, 1995, published by Chugai Igakusha; Saishin Igaku, Vol. 50, p. 1997-2004, 1995; and Saishin Igaku, Vol. 51, p. 64-70, 1996).
Amino acid transporters play an essential and very important role in incorporation of amino acids necessary for generation, differentiation, proliferation and maintenance of all cells and, therefore, they are believed to participate not only in the above-mentioned symptoms but also in onset of many other symptoms. In addition, when the indispensability of amino acid transporter in living body is taken into consideration, it is hardly concluded that incorporation of various amino acids is not mediated by several already-identified transporters only but it is believed that many other unknown amino acid transporters will be present.
Identification of such unknown amino acid transporters which play a role essential for existence and maintenance of cells, tissues, organs and living body has a possibility of clarification of causes for onset of various diseases for which the causes have not been clarified yet. In addition, if the relation between such amino acid transporters and various diseases is made clear, an effective treatment of such diseases will become possible by regulation of biological function or expression of the amino acid transporters. Accordingly, it is a pressing need to identify new amino acid transporter and to clarify the relation between the transporter molecule and a symptom.
However, in spite of medical and social needs as such, it is a current state that there has been little progress in identification of an amino acid transporter and clarification of an amino acid transport mechanism.
Thus, in order to identify an amino acid transporter molecule, it is necessary to purify the molecule and, in order to analyze the activity of the purified substance, it is necessary to reconstitute the purified substance to cell membrane so that an amino acid transport activity is regenerated. However, an amino acid transporter molecule has a relatively little expression amount as a membrane protein and has a relatively small regenerating efficiency and, therefore, there is a difficulty in the technique in the identification of new molecules.
In addition, identification of an amino acid transporter which is specifically expressed in abnormal cells directly participating in the symptom such as cancer cells (tumor cells) and plays a role of supplying an amino acid to the abnormal cells has a very important significance in the clarification of existence and proliferation of such symptom-related cells and also in the development of therapeutic methods for cancer, etc. However, an amino acid transporter is inherently a molecule essential for the existence of normal cells and is believed to be present in a wide range of cell species and, accordingly, it is not easy to identify an amino acid transporter molecule which is expressed specifically in such abnormal cells.
As a neutral amino acid transporter, ASCT1 and ASCT2 have been cloned as sodium-dependent transporters (Kanai, Curr. Opin. Cell Biol., 9, 565 (1997)). However, the main substrates thereof are alanine, serine, cysteine, threonine and glutamine and their substrate specificity is different from a neutral amino acid transporting system L. Further, glycine transporter and proline transporter have been cloned but their substrate specificity is different from neutral amino acid transport system L (Amara and Kuhar, Annu. Rev. Neurosci., 16, 73 (1993)).
Although not a transporter per se, cDNAs of rBAT and 4F2hc which are a type II membrane glycoprotein having only one transmembrane structure believed to be an activating factor for an amino acid transporter have been cloned and it has been known that, when they are expressed in oocytes of Xenopus laevis, uptake of a basic amino acid is activated together with that of a neutral amino acid (Palacin, J. Exp. Biol., 196, 123 (1994)).
Accordingly, it is an effective key for providing a therapeutic method for the symptom and disease that an amino acid transporter molecule which has not been identified yet and is specifically expressed in abnormal cells deeply associated with such a symptom is identified and that the relation between the molecule and existence/proliferation of the abnormal cells is clarified.
Thus, when the biological activity of the amino acid transporter molecule or the expression of the molecule is controlled, it is now possible to treat the diseases.
The present inventors have paid their attention to the already-known cell membrane surface molecule 4F2 (CD98) which is believed to be essential for the proliferation of tumor cells in order to investigate a novel amino acid transporter which is specifically expressed in such symptom-related abnormal cells or, particularly, tumor cells and have succeeded in identifying a novel amino acid transporter molecule named LAT1 (L-type amino acid transporter-1) which is particularly significantly expressed in tumor cells as compared with the expression in normal cells.
Thus, for a quick cell division and continuous growth and proliferation, the tumor cells are to be provided with nutrients such as amino acids and saccharides thereinto and it is believed that such a providing is carried out by means of an up-regulation of an amino acid transporter which is specific to the nutrients (Physiol. Rev., Vol. 70, p. 43-77, 1990). For growth, proliferation and maintenance of the tumor cells, a protein biosynthesis is to be carried out in the cells and, therefore, incorporation of the essential amino acids into the cells (transport from outside of the cells to inside of the cells) is particularly important.
From the studies up to now, it has been believed that, for the proliferation of tumor cells, a known cell membrane surface antigen named 4F2 (CD98) classified into a type II membrane glycoprotein believed to have a function of activating the amino acid transporter which has not been identified yet will play an important role (J. Immunol., Vol. 126, p. 1409-1414, 1981; J. Immunol., Vol. 129, p. 623-628, 1982; Proc. Natl. Acad Sci. USA., Vol. 84, p. 6526-6530, 1987; Cancer Res., Vol. 46, p. 1478-1484, 1986; J. Biol. Chem., Vol. 267, p. 15285-15288, 1992; Proc. Natl. Acad Sci. USA, Vol. 89, p. 5606-5610, 1992; Biochem. J., Vol. 324, p. 535-541, 1997; and J. Exp. Biol., Vol. 196, p. 123-137, 1994).
Under such circumstances, the present inventors have carried out an intensive investigation for identification of human tumor cell membrane surface molecule which conjugates or interacts with a 4F2 molecule and found a gene coding for a novel amino acid transporter LAT1 having the following characteristics whereupon the present invention has been accomplished.

DNA encoding neutral amino acid transporter

Japan Science and Technology Corporation


Systems and related methods to simulate trapped annular pressure and wellhead movement during downhole drilling scenarios.

The existence of trapped annular pressure and wellhead movement caused by production temperatures is known in the industry. Conventionally, analysts have either hand calculated the increase in trapped annular pressure caused by production temperatures, or used spreadsheets or other calculation algorithms to guess at a result. However, none of these efforts provide the needed quality assurance for such sophisticated calculations. Moreover, these approaches focused on production events, thereby entirely ignoring the effects that downhole temperatures and pressures have on the well during drilling operations.
Accordingly, in view of the foregoing shortcomings, there is a need in the art for a systematic workflow methodology that predicts and/or determines the effect that temperatures and pressures have on trapped annular pressure and wellhead movement during drilling operations.

System, method and computer program product to simulate drilling event scenarios


A startup control algorithm for a multiple compressor liquid chiller system is provided wherein the maximum number of compressors to be started to satisfy system load conditions is provided. The control algorithm designates all of the compressors of the multiple compressor system for starting and reduces the number to be started in response to the satisfaction of several predetermined criteria. The predetermined criteria are related to the leaving chilled liquid temperature, the shutdown time for the chiller system and the last operating time period for the chiller system.

The present invention relates generally to a startup control for a chiller system. More specifically, the present invention relates to determining the number of compressors in a multiple compressor chiller system to start during the startup process for a multiple compressor chiller system.
Many liquid chiller or refrigeration applications use multiple compressors, i.e., two or more compressors, in one or more corresponding refrigerant circuits. One purpose for the use of multiple compressors is to obtain an increased capacity from the chiller system, which increased capacity could not be obtained by operating a single compressor. In addition, the use of multiple compressors can provide for improved reliability of the overall system by having one or more compressors remain operational to provide a reduced level of cooling capacity in the event that a compressor fails and can no longer provide cooling capacity.
The compressor motors of the chiller system can be powered directly from the AC power grid at the system location, which would result in the compressor being operated at only a single speed. Alternatively, the compressor motors can use a variable speed drive inserted between the system power grid and the motor to provide the motor with power at a variable frequency and variable voltage, which then results in the compressor being capable of operation at several different speeds. Variable speed operation of the motors can be obtained by providing a corresponding variable speed drive for each compressor motor or by connecting all of the compressor motors in parallel to the inverter output of a variable speed drive. One drawback of using a variable speed drive for each compressor is that the overall chiller system becomes more expensive because multiple drives with a given cumulative power rating are more expensive than a single drive of the same output power rating. One drawback to connecting the compressor motors in parallel to the single inverter output of the variable speed drive is that a fault or failure of one of the motors may disable the variable speed drive and thus prevent the other motors connected to the variable speed drive from operating the remaining compressors on the chiller system. This disabling of the other motors connected to the variable speed drive defeats the function of the redundant compressors because all the compressors are disabled as a result of the disabling of the motors and the variable speed drive.
One startup control for a multiple compressor system, whether the compressor motors are powered by the AC power grid or by variable speed drives, involves the starting of a lead compressor followed by the subsequent starting of additional compressors. One example of this type of control can be found in U.S. Pat. No. 4,614,089 (the '089 patent). The '089 patent is directed to controlling the operation of refrigeration systems which contain multiple compressors. The control has a "power-up set" function that activates a delay which can be set individually, and thus differently, for each of the compressors. Upon the system startup, one compressor can be started, for example, every 30 seconds until all compressors, or fewer if the desired suction pressure is achieved, are back on line. One drawback to this technique is that the maximum number of compressor cannot be started at one time and can only be obtained after a delayed time period.
Therefore, what is needed is a system and method for starting a multiple compressor chiller system that can determine the maximum number of compressors to start for a given system load.

This patent is subject to a terminal disclaimer.

Startup control system and method for a multiple compressor chiller system


A method and system to facilitate failure modes and effects analysis (FMEA) of one or more components of a system. The FMEA is indicated with the generation of an FMEA form. A graphical user interface provides a sequential order of completion for a number of steps. The steps are followed to generate graphical representations which are to be completed by an FMEA analyst and received by the graphical user interface to facilitate generating the FMEA form.

1. Field of the Invention
The present invention relates to failure modes and effects analysis (FMEA). In particular, the present inventions relates to generating a FMEA form to indicate the FMEA.
2. Background Art
Failure Modes and Effects Analysis (FMEA) relates, in general, to a process used to determine the adequacy of current control process and the need to mitigate risks by making changes to the current control process. FMEA relates to any number of industries and applications. Each industry and application may have separate standards and criterion for the control processes used therein.
In the automotive industry, SAE specification J1739 details a number of standards and criterion for automotive related FMEAS. J1739 defines FMEA as a systemized group of activities intended to: (a) recognize and evaluate the potential failure of a product/process and its effects; (b) identify actions which could eliminate or reduce the chance of the potential failure occurring; and (c) document the process. It is complementary to the process of defining what a design or process must do to satisfy the customer.
Generating a FMEA form to indicate the FMEA, whether the FMEA is conducted with respect to the J1739 specification or another specification, tends to be a difficult process in that most FMEA specifications fail to provide a robust method for generating the FMEA form.

Method to facilitate failure modes and effects analysis


A method for reading data stored in a multiple bit memory cell, the memory cell comprising a switch located within an array of switches arranged in columns and rows, each switch having a control node and first and second switched nodes between which the flow of current is dependent on the voltage applied to the control node, wherein each row has a word line connected to the control nodes of the switches of that row, each column comprises only one switch from each row, and each column has first, second and third bit lines connectable to one of the switched nodes of each switch of that column to define the stored data, the method comprising: fixing the voltage of the second bit line of the switch and reading data from the first and third bit lines, and subsequently: fixing the voltage of the first bit line of the switch and reading data from the second and third bit lines.

The present invention relates to ROMs (read-only memories), and in particular to a method of reading data from multiple bit line ROMs.
1. Field of the Invention
There is a general motivation in the field of ROM cell technology to produce smaller ROM cells than are currently available, so that chip areas can be reduced while still storing large amounts of data.
2. Description of the Related Art
ROMs are typically based on arrays of transistors. For example, NMOS transistors may be used. One configuration using NMOS transistors involves an array in which each transistor is grounded at its source terminal 10 as shown in FIG. 1. Alternatively, PMOS transistors may be used, or a combination of both NMOS and PMOS. In any case, the transistors will typically be arranged in columns 11 and rows 12 as can be seen in FIG. 1. Transistors in the same row 12 will share a common gate connection 13, referred to herein as a word line. Transistors in the same column 11 will share a single output wire 14, referred to herein as a bit line.
Programming of the NMOS ROM shown in FIG. 1, is achieved by selectively connecting the bit lines 14 to the drain terminals 15 of the transistors in the array. A connection may be made by inserting a via 16 between a bit line and a drain. In an NMOS ROM, a via 16 programmes a "0" bit. Conversely, a non-connection 17 programmes a "1" bit.
A ROM is read using the gate 18 and the drain 15 terminals of the transistors. First, all word lines 13 are grounded and the bit lines are pre-charged to VDD. Next, the pre-charging circuitry is switched off and the appropriate word line 13 is activated, that is, a positive voltage VCC is applied to the word line. If there is a connection 16 between an activated transistor and a bit line, the voltage on the bit line will be pulled down to zero volts, and can be interpreted as a "0" in the data. If there is no connection 17 between an activated transistor and a bit line, the bit line will remain floating and will give a high voltage (a "1").
It can clearly be seen that the technique described above only allows for one bit of data to be stored per transistor. Since the density at which interconnects can be defined is much greater than the density at which transistors can be defined, it is desirable to create a ROM structure in which multiple bits may be stored per transistor. In such a structure, the bits may be encoded by means of multiple available configurations of interconnects to the transistor.
One way of implementing the concept of storing multiple bits per transistor is to have multiple bit lines 24 for each column 21, as shown in FIG. 2A. However, it should be noted that the number of bits that can be stored in each ROM cell is not proportional to the number of bit lines (X, Y, Z) per column. This is because connections to more than one bit line for a given transistor will short the different bit lines together and will not give a meaningful reading. This situation is shown as 22 in FIG. 2A.
Since multiple bit line connections per transistor are not possible, there are four possible states that can be used to store data in the ROM cell depicted in FIG. 2A. 26, 27 and 28 show vias connected between drain terminals and bit lines X, Y and Z respectively. 25 shows a fourth possible state in which the drain terminal is not connected to any of bit lines X, Y or Z.
The four states can be detected in a manner similar to that used for a standard single bit line ROM cell, as described above. The states can be decoded into a series of 2-bit words, as shown in the following truth table:
TABLE 1Configuration(see FIG. 2)XYZBit 1Bit 22511100260110127101102811011
Table 1 is merely one example of one way in which the detected values may be decoded. In the present example of an NMOS ROM cell, a reading of "111" would mean that no connections were in place between the drain terminal of the transistor and the bit lines X, Y and Z. In the example of Table 1, the state 111 would mean a word "00" had been encoded. A reading of "101" would mean that a via was in place between terminal Y and the drain terminal, and this would correspond to the word "10".
In general, 2n n-bits words can be encoded into 2n−1 bit line connections. However, it has been found that in practice it is only useful to use three bit lines (n=2).
U.S. Pat. Nos. 6,355,550 and 6,498,066 disclose ROMs using three bit lines per column. The ROMs are embedded in multi-layered integrated circuits. FIG. 2B shows a representation of the possible connections in such prior art ROMs. "x" represents a position where a via may be placed in order to form a connection. Connections may be made at points 200, 201 or 202 between conductive pad 220 and bit lines 210, thus giving four possible states (200, 201, 202 or no connection).
ROM cells such as those described above are typically fabricated using a series of masks and applying a series of patterned layers to a substrate. (See U.S. Pat. Nos. 6,355,550 and 6,498,066.)
One of the potential problems concerning multiple bit line ROMs is the effect of capacitive coupling. Distortion of stored data can arise if a change in voltage on one bit line causes a corresponding change in an adjacent bit line through capacitive charge sharing. FIG. 3 illustrates the process of this capacitive charge sharing.
In the pre-charge state, two adjacent bit lines are connected to voltage VDD. In this state, V(bit line 1)=V(bit line 2)=VDD.
In the discharge state the bit lines are disconnected from VDD and instead bit line 1 is grounded and bit line 2 is left floating. In this state, V(bit line 1)=0 and V(bit line 2)=VDD×CB2/(CB2+CC), where CC is the capacitance between bit lines 1 and 2 through the dielectric substrate that separates them. Thus, some of the charge stored in CB2 moves onto CC and the voltage on bit line 2 is reduced. If CC is large enough compared to CB2, the voltage on bit line 2 may incorrectly be read as a "0".
In single bit line ROMs, this problem can be overcome by interleaving columns of bit cells and grounding bit lines associated with unused bit cells. For example, odd columns could be used for odd addresses and even columns for even addresses. In this way, at any given time the bit lines adjacent to a sensitive bit line will be grounded, and no coupling can occur.
However, with multi-bit ROMs the situation is more complicated since the three bit lines associated with each column will all be sensitive at the same time. The problem of coupling therefore remains to be solved in a different way.
A further disadvantage that may be found with known multiple bit line ROMs is that several masks may need to be remade when a ROM is to be reprogrammed. A particular set of masks will be appropriate for a particular set of data to be programmed into a ROM, but when a different set of data need to be programmed several masks may need to be altered to produce different patterns on the substrate.
It is therefore an aim of the present invention to produce a multiple bit memory cell, and a method of reading such a memory cell, that can overcome the above-stated problems and disadvantages.


A microfabricated diffusion source to provide for a controlled diffusion rate of a vapor comprises a porous reservoir formed in a substrate that can be filled with a liquid, a headspace cavity for evaporation of the vapor therein, a diffusion channel to provide a controlled diffusion of the vapor, and an outlet to release the vapor into a gas stream. The microfabricated diffusion source can provide a calibration standard for a microanalytical system. The microanalytical system with an integral diffusion source can be fabricated with microelectromechanical systems technologies.

For a wide array of analytical techniques, accurate analysis of air or other gas contaminants requires the generation of standard atmospheres to calibrate and verify instrument response. Direct injection of a standard atmosphere into an analytical system can also be used as a diagnostic tool to evaluate the performance of individual system components and the overall system as a whole. This real-time diagnostic information can then be used to compensate for changes in instrument response due to changes in the operating environment or the deterioration of system components.
Portable, handheld microanalytical systems, which have been termed "chemical laboratories on a chip," are being developed to enable the rapid and sensitive detection of particular chemicals, including pollutants, high explosives, and chemical and biological warfare agents. These microanalytical systems should provide a high chemical selectivity, to discriminate against potential interferents, and the ability to perform the chemical analysis on a short time scale. These microanalytical systems also require accurate, reliable, and field-portable standards for calibration and evaluation of instrument response.
A common analytical technique, particularly for microanalytical systems, is gas chromatography. A conventional gas chromatograph comprises a means for injection of a sample to be analyzed, a supply of carrier gas, a column for separating the components of the sample, and a detector for detecting the separated components that are eluted from the column. For quantitative analysis, it is necessary to accurately determine how much of a component is in the unknown sample. Generally, quantitative analysis requires the comparison of the size of the chromatographic peak of a component in an unknown sample to a chromatographic peak of the same component in a known calibration standard.
In addition to calibration, standards can be used to evaluate quantitative errors in the chromatographic process. Quantitative errors can be associated with peak size measurement, standardization, sampling techniques and sample introduction, and chromatographic system errors. In particular, standards can be used to identify column-induced changes in the sample character and detector errors due to overload or other factors. For example, a standard can be used to determine and correct for retention time shifts due to adsorption or other problems during gas chromatography measurements.
Both static and dynamic methods have been used to produce gas or vapor standards. Dynamic methods, based on continuous flow of a standard-containing gas mixture, have the advantages of reducing adsorption problems and being able to vary the concentration of the standard by simple change in the diluent flow. In general, the standard should be as close to the unknown sample as possible, stable, and of high purity. Especially with trace analysis, sample size of the standard and the unknown sample should be kept the same within measurement error.
One dynamic method to generate vapor standards is to use the diffusion of vapor through a capillary to add small amounts of the vapor to a flowing gas stream. In a conventional diffusion source, the liquid whose vapor is to provide the standard of interest is contained in a reservoir at a known temperature. The liquid is allowed to evaporate from the reservoir and the vapor diffuses through the capillary into a flowing diluent gas stream. The vapor concentration in the resulting gas mixture can then be determined from rate of diffusion of the vapor through the capillary and the flow-rate of the diluent gas.
Whereas such diffusion tubes are well developed for conventional systems, a need exists for accurate, reliable, and field-portable standards for the calibration and evaluation of microanalytical systems. The present invention comprises a microfabricated diffusion source for use with such microanalytical systems. The invention can provide a very small sized calibration source that can be integrated with the fabrication of the microanalytical system by microelectromechanical systems (MEMS) technologies. This integrated fabrication eliminates the need for an external calibration source and also takes advantage of the economies of scale and low cost inherent with MEMS manufacturing. In addition, due to the very low calibrant flux requirements, which are typically in the nanograms or picograms per second, the lifetime of the microfabricated diffusion source can be months to years. These lifetimes can minimize, or in some cases eliminate, the need to periodically replenish the calibration source material.


This invention deals with a composite vascular construct, which is formed of a first, blood contacting component and a second, tissue contacting component. Preferably, the present vascular constructs are in the form of a vascular patch or vascular graft with surface-activated, non-absorbable fabric with immobilized biomolecules on the blood contacting surface, and an absorbable, compliant film or microporous sheath on the other surface of the non-absorbable component of the composite graft or patch.

Most common among synthetic vascular constructs are vascular grafts. However, there has been a steady increase in the development of some allied constructs such as vascular wraps, patches, and endovascular stent grafts. Most of the design criteria used in the development of useful vascular grafts are usually applicable for other forms of vascular constructs in spite of noticeable differences in end-use requirements. Since the use of Vinyon N cloth (made of a copolymer of vinyl chloride and acrylonitrile) by Voorhees and coworkers in 1952, as a tubular construct for bridging arterial defects, many investigations have been directed toward the development of synthetic vascular grafts. Of the many systems investigated, Polyethylene terephthalate (PET) and polytetrafluoroethylene (PTFE) are the most commonly used polymers. Needless to say, limited attention was given to vascular patches or wraps, which can be made from similar materials as those of the vascular grafts, but which are used less frequently than the grafts.
Although PTFE and PET vascular grafts, having a diameter of more than 6 mm, have been clinically successful, development of clinically acceptable, small diameter grafts has been generally unsuccessful. Thrombus and neointima formation will readily occlude the small diameter synthetic vascular grafts. The resulting loss of patency remains the greatest obstacle to the development of a small caliber vascular prosthesis. Thus, there is a need for an engineered material that will provide the necessary mechanical and thromboresistant properties for a successful synthetic vascular prosthesis to facilitate recent advancements in vascular surgery.
During the many attempts made in the prior art toward the development of small diameter grafts, special attention has been given to (1) improving the biomechanical compatibility of the graft; (2) modifying the luminal surface to minimize platelet aggregation and subsequent thrombosis; and (3) pre-seeding the luminal wall with endothelial cells to provide a more natural environment to the blood component and to normalize the blood flow in the grafts.
Since Voorhees and coworkers (1952) first used Vinyon "N" cloth as a vascular graft and their conclusion that synthetic materials could serve as conduits, development in this area did not keep pace with impressive advances in materials and medical device technologies. Meanwhile, the considerable health concerns associated with vascular diseases and inadequate supply of native vessels for bypass procedures have led to the development of synthetic vascular grafts made from expanded polytetrafluoroethylene (PTFE), polyethylene terephthalate (PET) or polyurethane (PU), which satisfies the need for large size vascular grafts with patency approaching those of autologous grafts. However, the synthetic, small-diameter grafts are yet to match the autologous grafts in terms of long-term patency. For the past twenty years, no major developments have been accomplished in this area in spite of the recent rush to exploit new findings associated with tissue engineering. This may be attributed to the fundamental disconnect between highly focused areas of the academic vascular research and industrial efforts where interests broadly extend from abstract cell biology and tissue engineering to short-term, applied vascular research. It is well acknowledged that functional failures of synthetic vascular grafts are associated with (1) loss of patency due to platelet aggregation and subsequent thrombosis; (2) delayed or inadequate surface endothelialization; (3) blood leakage and/or mechanical failure due to improper graft construction and/or biomechanical properties; and (4) infection, which may be traced to compromised graft sterility. Unfortunately, in addressing these failure modes, individual investigators (1) addressed one particular mode and practically ignored others, which can affect the collective performance during in-use applications; (2) rushed to use extreme animal models in early stages of graft evaluation, which can obliterate simple findings leading to hasty interpretation of results and failure when tested in humans; and/or (3) rushed to rely heavily on tissue engineering as the solution for existing problems without acknowledging the lengthy process required to provide a prototype graft. Needless to say, a novel approach to address the issue of vascular graft failures is needed. Such an approach is expected to (1) address the different modes of graft failure in a collective manner and to provide an integrated solution to the root causes of these failures; and (2) use existing knowledge of tissue engineering in tandem with established principles of bioengineering and device design, while taking advantage of advances made in the development of transient bioabsorbable implants.

Composite vascular constructs with selectively controlled properties


A power transmission chain (1) has links (11), pins (14), and interpieces (15). The links (14) each have a front and a back insertion parts (12, 13) through which the pins are inserted. The pins (14) and the interpieces (15) connect links (11) that are arranged side by side in the lateral direction of the chain such that the front insertion part (12) of one of the links (11) and the rear insertion part (13) of the other link (11) correspond to each other, and the connection is made such that that the links (11) are bendable in the longitudinal direction. The locus of a contact position of a pin (14) and an interpiece (15) is an involute of a circle. Two or more kinds of sets of a pin (14) and an interpiece (15) having different radii of base circles of involutes are formed, and these sets of a pin (14) and an interpiece (15) are randomly arranged.

As a continuously variable transmission for an automobile, there has been known one which includes: a drive pulley (2), having a fixed sheave (2a) and a movable sheave (2b), provided on the engine side; a driven pulley (3), having a fixed sheave (3b) and a movable sheave (3a), provided on the drive wheel side: and an endless power transmission chain (1) provided over the both, and in which the movable sheaves (2b) (3a) are caused to come close to or leave away from the fixed sheaves (2a) (3b) by a hydraulic actuator, whereby a chain (1) is cramped by a hydraulic pressure so as to cause a contact load between the pulleys (2) (3) and the chain (1), and torque is transmitted by a frictional force of the contact part, as shown in FIG. 18.
As the power transmission chain, Patent Document 1 (Publication of Japanese Patent Application Laid-open No. H08-312725) proposes one which includes: a plurality of links having front and back insertion parts through which pins are inserted; and a plurality of first pins and a plurality of second pins for connecting the links aligned in a chain width direction so as to be bendable in a longitudinal direction such that a front insertion part of one link and a back insertion part of another link correspond to each other, in which a first pin fixed to a front insertion part of one link and movably fitted in a back insertion part of another link and a second pin movably fitted in the front insertion part of the one link and fixed to the back insertion part of the other link move relatively in a rolling and contacting manner so as to enable bending in a longitudinal direction between the links.
The power transmission chain of Patent Document 1 suppresses polygonal vibration caused due to the fact that the chain is not a continuum and reduces noises of a continuously variable transmission using it. However, in order to enhance quietness and to improve comfort of an automobile in which the chain is mounted, for example, it is preferable to further reduce noises.
An object of the present invention is to provide a power transmission chain and a power transmission device capable of suppressing polygonal vibration to thereby remove causes of noises.

Power transmission chain and power transmission device


Level converter converts a word line group specifying signal, which is sent from a row decoder and has amplitude of a power supply potential Vcc and a ground potential GND, into mutually complementary logic signals WD and ZWD of a high voltage Vpp and a negative potential Vbb. An RX decoder decodes an address signal to output a signal of an amplitude of (Vpp-Vbb) specifying a word line in a word line group. A word driver provided corresponding to each word line transmits a word line specifying signal or a negative potential to the corresponding word line in accordance with signals WD and ZWD sent from a level converting circuit. The nonselected word line receives negative potential Vbb from a word driver. The selected word line receives high voltage Vpp from the word driver. It is possible to suppress a channel leak current at a memory transistor in the nonselected memory cell, which may be caused by the potential change of the word line and/or bit line, and a charge holding characteristic of the memory cell can be improved.

1. Field of the Invention
The present invention relates to a semiconductor memory device, and in particular to a dynamic semiconductor memory device storing information in the form of electric charges. More particularly, the invention relates to a structure in a dynamic semiconductor memory device for improving charge retention characteristics of memory cells. More specifically, the invention relates to a structure of circuitry for selecting word lines.
2. Description of the Background Art
FIG. 63 schematically shows a whole structure of a dynamic semiconductor memory device (will be referred to as "DRAM") in the prior art. In FIG. 63, the DRAM includes a memory cell array 900 having memory cells MC arranged in a matrix of rows and columns. In memory cell array 900, a word line WL is provided corresponding to each row of memory cells MC, and a column line (bit line pair BL and /BL) is provided corresponding to each column of memory cells MC. FIG. 63 representatively shows one word line WL and one bit line pair BL and /BL. Memory cell MC is provided corresponding to a crossing of bit line pair BL and /BL and word line WL. In FIG. 63, memory cell MC is provided corresponding to the crossing of bit line BL and word line WL, as an example. Memory cell MC includes a capacitor MQ storing information in the form of electric charges, and a memory transistor MT which is responsive to a signal potential on word line WL to be turned on to connect memory capacitor MQ to bit line BL (or /BL).
The DRAM further includes an address buffer 902 which produces an internal address signal from an externally applied address signal, a row decode circuit 904 which decodes the internal row address signal sent from address buffer 902 to produce a decode signal specifying a corresponding word line in memory cell array 900, and a word line drive circuit 906 which transmits a signal voltage indicative of the selected state onto the corresponding word line in accordance with the row decode signal from row decode circuit 904. Word line drive circuit 906, of which specific structure will be described later, transmits a high voltage Vpp higher than an operation power supply potential Vcc onto the selected word line (i.e., word line corresponding to the row specified by the address signal).
The DRAM further includes a sense amplifier group or band 908 including a plurality of sense amplifiers which are provided corresponding to respective bit line pairs BL and /BL, and differentially amplify signal potentials on the corresponding bit line pairs, a column decoder 910 which decodes the internal column address signal from address buffer 902 to produce a column select signal specifying a corresponding column (bit line pair) in memory cell array 900, an I/O gate circuit 912 which operates in accordance with the column select signal from column decoder 910 to connect the corresponding column (bit line pair) in the memory cell array to an internal data line (internal I/O line) 913, and an I/O circuit 914 for inputting and outputting external data DQ.
I/O gate circuit 912 includes column select gates provided corresponding to the respective bit line pairs. Upon writing of data, I/O circuit 914 produces internal write data from externally applied data DQ, and transmits the same to internal data line 913. Upon reading of data, I/O circuit 914 produces external read data DQ from internal read data on internal data line 913. In FIG. 63, I/O circuit 914 is shown to perform input and output of data through the same pin terminal. However, I/O circuit 914 may be adapted to perform input and output of data through different pin terminals.
For determining a timing of internal operation of the DRAM, there is provided a control signal generating circuit 916. Control signal generating circuit 916 receives a row address strobe signal /RAS, a column address strobe signal /CAS, a write enable signal /WE and an output enable signal /OE, and generates various internal control signals. In FIG. 63, control signal generating circuit 916 is shown to apply internal control signals to address buffer 902 and row decoder 904.
When the row address strobe signal /RAS is activated, it attains the L-level and designates start of the memory cycle (start of access to the DRAM), and enables latching and decoding of the address signal, respectively, by address buffer 902 and row decode circuit 904. Address buffer 902 latches the address signal and produces the internal row address signal to apply the same to row decode circuit 904 when row address strobe signal /RAS attains the L-level. Row address strobe signal /RAS controls the operation of circuitry related to selection of a row in memory cell array 900.
Column address strobe signal /CAS determines the timing of operations related to column selection. When signal /CAS attains the L-level, address buffer 902 latches the externally applied address signal and produces the internal column address signal to apply the same to column decoder 910. Column decoder 910 decodes the applied address signal in accordance with the L-level of signal /CAS.
When activated, write enable signal /WE attains the L-level and indicates that the data write operation is designated. When activated, output enable signal /OE attains the L-level and designates that data of a selected memory cell is to be read out. Now, selecting operation of a memory cell of one bit will be briefly described below.
In response to the fall of signal /RAS, address buffer 902 takes in the externally applied address signal to produce the internal row address signal under the control by control signal generating circuit 916. Row decoder 904 decodes the internal row address signal thus produced under the control by control signal generating circuit 916, and produces a word line designating signal designating a word line WL. Word line drive circuit 906 raises the potential of the addressed word line WL in accordance with the word line designating signal from row decode circuit 904. As will be detailed later, word line drive circuit 906 raises the potential of the selected word line to high voltage Vpp higher than operation power supply voltage Vcc. The reason of boosting the potential of a selected word line will also be detailed later.
Memory transistor MT contained in memory cell MC connected to the selected word line is turned on to connect memory cell capacitor MQ to bit line BL (or /BL). The potential of bit line BL (/BL), which is kept in an electrically floating state at the intermediate potential Vcc/2 changes in accordance with information (accumulated electric charges) stored in memory capacitor MQ.
The sense amplifier contained in sense amplifier band 908 is activated under the control by control signal generating circuit 916, to amplify and latch the potential difference of each bit line pair BL and /BL.
When signal /CAS attains the L-level, address buffer 902 latches the externally applied address signal and produces the internal column address signal to apply the same to column decoder 910. Column decoder 910 is activated under the control by control signal generating circuit 916 to decode the internal column address signal from address buffer 902 and generate the column select signal specifying a corresponding column (bit line pair) in memory cell array 900.
I/O gate circuit 912 selects the corresponding column (bit line pair) in accordance with the column select signal from column decoder 910, and connects the selected column (bit line pair) to internal data line 913.
Writing and reading of data are performed depending on signals /WE and /OE. In the data writing operation, signal /WE attains the L-level, and I/O circuit 914 produces internal write data from externally applied write data D and transmits the internal write data onto the selected column via internal data line 913 and I/O gate circuit 912. In the data reading operation, signal /OE attains the L-level, and I/O circuit 914 produces and outputs external read data Q from the internal read data on internal data line 913.
FIG. 64 shows an example of the structures of row decode circuit and word line drive circuit. In FIG. 64, there is shown the structures of portions related only to one word line WL.
In FIG. 64, row decode circuit 904 includes a row decoder 924 provided corresponding to the word line WL. Row decoder 924 includes an AND decoder 924a receiving a predetermined combination of internal row address signals from the address buffer, and an inverter 924b inverting an output WD of AND decoder 924a. Both outputs of AND decoder 924a and inverter 924b have a swing of Vcc (i.e., its H-level is equal to power supply voltage Vcc, and its L-level is equal to the ground potential level). AND decoder 924a is set to the selected state and outputs the signal at H-level, when all the applied address signals are at the H-level.
Word line drive circuit 906 includes a word line driver 926 provided corresponding to each word line WL. Word line driver 926 includes an n-channel MOS transistor N1 transmitting a decoded signal WD sent from a corresponding row decoder 924, an n-channel MOS N2 which is turned on to transmit a boosted word line drive signal RX onto word line WL in response to the signal potential on node A, and an n-channel MOS transistor N3 which is turned on to discharge word line WL to the ground potential level in response to an inverted decoded signal ZWD sent from the corresponding row decoder 924.
An RX generating circuit 930 is activated in response to the fall of signal /RAS, and outputs the high voltage Vpp generated by a high voltage generating circuit 932 as word line drive signal RX at a predetermined timing.
Operation will now be described below.
During standby state, row decoder 924 is kept at the precharged state under the control by control signal generating circuit 916 shown in FIG. 63, output WD of AND decoder 924a is at the L-level, and signal ZWD supplied from inverter 924b is at the H-level. In this state, MOS transistor N2 is off, and MOS transistor N3 is on. Word line WL has been discharged to the ground potential level via MOS transistor N3.
When signal /RAS attains the L-level, the memory cycle starts. Row decoder 924 is activated in accordance with the external control signal sent from control signal generating circuit 916 shown in FIG. 63, and decodes the address signal applied from the address buffer 902. When signal WD sent from row decoder 924 is at the H-level, node A is charged to the potential level of (Vcc-Vth) which is lower than power supply potential Vcc by the threshold voltage Vth of MOS transistor N1. Signal ZWD is at the L-level, and MOS transistor N3 is off.
After node A is charged, the potential of the boosted signal RX generated by RX generating circuit 930 rises and is applied to one conduction terminal (drain) of MOS transistor N2. In MOS transistor N2, owing to the capacitive coupling between the gate and the drain, the potential of node A rises (self-boosting operation), and the gate potential of MOS transistor N2 rises. Thereby, word line WL receives the boosted signal RX via the MOS transistor, and the potential of word line WL is raised to high voltage Vpp level higher than power supply potential Vcc. When the signal WD sent from row decoder 924 is at the L-level, the potential of node A does not rise and MOS transistor N2 maintains the off state, even if word line drive signal RX sent from RX generating circuit 930 rises. At this time, signal ZWD is at the H-level, MOS transistor N3 is on, and the potential of word line WL is at the ground potential level.
By the following reason, the potential of node A maintains the L-level when the signal of node A is at the L-level, even if the signal RX rises. When node A is charged to the potential level of (Vcc-Vth) (i.e., when signal WD is at the H-level of Vcc level), MOS transistor N1 is substantially off (i.e., has a potential difference of threshold voltage Vth between gate and source). When the signal RX rises, MOS transistor N1 becomes completely turned off when the potential of node A rises owing to the capacitive coupling, and the charges in node A are confined. Thus, node A is set to the electrically floating state, so that the potential thereof is raised to a value not lower than (Vcc+Vth). Meanwhile, when signal WD is at the L-level, node A is also at the L-level, and MOS transistor N1 is on. Therefore, node A does not attain the floating state even when signal RX rises, and thus the potential of node A does not rise but maintains the L-level. Thus, MOS transistor N1 has a function as a decoupling transistor decoupling the node A from the output of row decoder 924 (output of AND decoder 924a) in response to the rise of the potential of node A.
The reason for raising word line drive signal RX to a level not lower than the operation power supply potential Vcc level is as follows. The potential of the selected word line can be raised to high voltage Vpp at a speed higher than that at which it is raised up to power supply potential Vcc. Therefore, stored information of the memory cell (accumulated charges of the memory capacitor) can be read onto the bit line (BL or /BL) at an earlier timing. A quantity Q of accumulated charges of the memory capacitor can be represented as Q=C.multidot.(V-Vcp), where V represents a potential of one electrode of the memory capacitor (i.e., storage node connected to the memory transistor), Vcp represents a potential of the other electrode (cell plate) of the memory capacitor, and C represents a capacitance of the memory capacitor. Therefore, in order to increase the quantity Q of accumulated charges of the memory capacitor, it is preferable to increase the potential V of the one electrode of memory capacitor as high as possible. One electrode of memory capacitor is connected to bit line (BL or /BL) via memory transistor MT as shown in FIG. 63. By setting the potential of word line WL to high voltage Vpp, the voltage at power supply potential Vcc level of bit line (BL or /BL) can be transmitted to the one electrode of memory capacitor MQ without loss of the threshold voltage of memory transistor MT. Thereby, an intended quantity of the accumulated charges is ensuredly accumulated in memory capacitor MQ.
In general, potential Vcp of the cell plate is set to an intermediate potential of Vcc/2. The potential transmitted to the one electrode of the memory capacitor is equal to power supply potential Vcc level when it is at the H-level, and is equal to the ground potential level when it is at the L-level. The reference potential (precharge potential) of bit lines BL and /BL is the intermediate potential Vcc/2. By transmitting the potential at power supply potential Vcc level as the high level of memory capacitor, the quantity of variation of the potential of bit line (BL or /BL) can be constant when reading data at the H-level and at the L-level from the memory capacitor, and thus the stable sense operation (i.e., increase of the sense margin and others) can be achieved.
FIG. 65 shows another structure of the word line select circuit in the prior art. In the structure shown in FIG. 65, the word driver itself has a decoding function.
In FIG. 65, row decoder 904 includes a row predecoder 940 which predecodes the internal address signal sent from the address buffer to generate a row predecode signal AX, an RX decoder 946 which predecodes a particular internal address signal sent from the address buffer to generate word line drive signals RXa (RX0-RX3 in FIG. 65), and a row decoder 942 which decodes the predecode signal sent from row predecoder 940 to generate signals WD and ZWD specifying the word line group including a plurality of word lines.
Row predecoder 940 generates the predecode signals (which are representatively indicated by AX0, AX1 and AX2 in FIG. 65) for specifying the word line group including a predetermined number of (four in FIG. 65) word lines. Row decoder 942 is provided corresponding to the word line group, and generates the decode signal for simultaneously designating the word lines included in the corresponding word line group. Row decoder 942 includes an AND decoder 943 receiving the predecode signal supplied from row predecoder 940, and an inverter 945 inverting the output of AND decoder 943. AND decoder 943 and inverter 945 use high voltage Vpp as the operation power supply potential, and operate to decode the predecode signal applied from row predecoder 940 and having a swing of power supply potential Vcc level and convert the potential of the decoded signal at the high level into high voltage Vpp level. The signal at the ground potential level is not converted, and is output as the signal at the ground potential level.
RX decoder 946 includes an X-predecoder 947 which predecodes the internal address signal sent from the address buffer, and a level converter circuit 949 which converts the H-level of the output of X-predecoder 947 into high voltage Vpp level for generating word line drive signals RX0-RX3. One of word line drive signals RX0-RX3 sent from the level converter circuit 949 is set to the H-level, and the remaining three word line drive signals are set to the L-level (ground potential level).
In word line drive circuit 906, a plurality of (four in FIG. 65) word drivers 950a-950d are provided for one row decoder 942. Word drivers 950a-950d receive word line drive signals RX0-RX3 from RX decoder 946, respectively. Word drivers 950a-950d have the same structure and, more specifically, each includes an n-channel MOS transistor N4 which transmits decode signal WD sent from row decoder 942 to an internal node B, an n-channel MOS transistor N5 which transmits word line drive signal RXi (i=0-3) to corresponding word line WLi in response to the signal potential on node B, and an n-channel MOS transistor N6 which discharges word line WLi to the ground potential in response to decode signal ZWD sent from row decoder 942. MOS transistor N4 is supplied at its gate with high voltage Vpp. Operation will now be described below.
Signals WD and ZWD output from row decoder 942 are at the L- and H-levels, respectively, when the decoder 942 is in the standby state or nonselected state (i.e., when at least one of outputs AX0, AX1 and AX2 of row predecoder 940 is at the L-level). In this state, the potential of node B is at the L-level, MOS transistor N5 is off, and MOS transistor N6 is on, so that all word lines WL0-WL3 are held at the ground potential level.
In the operation, when all outputs AX0, AX1 and AX2 of row predecoder 940 are at the H-level, outputs WD and ZWD of row decoder 942 are at the H- and L-levels, respectively. MOS transistor N6 is off, and MOS transistor N5 is on. The potential of node B is at the level of (Vpp-Vth), where Vth is the threshold voltage of MOS transistor N4. Signal WD is at the high voltage Vpp level. MOS transistor N4 is substantially off. In this state, one of word line drive signals RX0-RX3 supplied from RX decoder 946 rises to the H-level of high voltage Vpp level.
It is now assumed that word line drive signal RX0 is at the high voltage Vpp level, and other word line drive signals RX1-RX3 are at the L-level of the ground potential level. In the word driver 950a, the potential of node B rises to the potential level not lower than (Vpp+Vth) owing to the self-boost effect of MOS transistor N5, where Vth is the threshold voltage of MOS transistor N5. Thereby, MOS transistor N5 transmits word line drive signal RX0 at high voltage Vpp level onto word line WL0 without the loss of the threshold voltage. In word drivers 950b-950d, word line drive signals RX1-RX3 are at the L-level of the ground potential level, and the signals at the L-level of the ground potential level are transmitted onto word lines WL1-WL3 via MOS transistors N5, respectively.
FIG. 66 shows still another structure of the conventional word line driver circuit. FIG. 66 shows a structure of the word driver provided for one word line. In FIG. 66, the word driver includes a p-channel MOS transistor P1 which raises word line WL to high voltage Vpp level in response to decode signal ZWD, and n-channel MOS transistor N1 which discharges word line WL to the ground potential level in response to decode signal ZWD. The H-level of decode signal ZWD which is supplied from a decode stage (not shown) is equal to high voltage Vpp level, and the L-level thereof is equal to the ground potential level. Decode signal ZWD designates only one word line. p-channel MOS transistor P1 receives high voltage Vpp at one conduction terminal (source), and is connected at the other conduction terminal (drain) to word line WL. The n-channel MOS transistor N1 has one conduction terminal (source) connected to receive the ground potential, connected to a gate receive decode signal ZWD, and the other conduction terminal (drain) connected to word line WL. The word driver shown in FIG. 66 has a structure of a CMOS inverter circuit which operates with high voltage Vpp and ground potential. Operation will now be described below. In the standby state or nonselected state, signal ZWD is at high voltage Vpp level. MOS transistor P1 is off, and MOS transistor N1 is on, so that word line WL is discharged to the ground potential level. When signal ZWD attains the L-level of the ground potential level, MOS transistor N1 is turned off, and MOS transistor P1 is turned on, so that high voltage Vpp is transmitted to word line WL.
FIG. 67 shows a specific structure of the memory cell array. In FIG. 67, there are shown memory cells MC00, MC01, MC10 and MC11 arranged in two rows and two columns. Memory cells MC00 and MC10 are connected to word line WL0, and memory cells MC01 and MC11 are connected to word line WL1. Memory cells MC00 and MC01 are connected to bit line pair BL and /BL, and memory cells MC10 and MC11 are connected to bit line pair BL1 and /BL1.
A precharge/equalize circuit PEO and a sense amplifier SA0 are provided for bit line pair BL0 and /BL0, and precharge/equalize circuit PE1 and sense amplifier SA1 are provided for bit line pair BL1 and /BL1.
Each of precharge/equalize circuits PE0 and PE1 includes n-channel MOS transistors T2 and T3, which are turned on in response to a bit line equalize signal BEQ to transmit a predetermined intermediate potential VBL to corresponding bit lines /BL and BL, and an n-channel MOS transistor T1, which is turned on in response to equalize signal BEQ to electrically short-circuit the bit lines BL0 (BL1) and /BL0 (/BL1). Generally, there is a relationship of VBL=Vcp=Vcc/2.
Bit line equalize signal BEQ is activated to precharge and equalize the bit lines BL0 (BL1) and /BL0 (/BL1) to intermediate potential VBL (=Vcc/2) when the signal /RAS is "H1" of inactive state. When the signal /RAS attains the active state of the L-level, the bit line equalize signal BEQ attains the inactive state of the L-level, so that transistors T1, T2 and T3 are turned off, and bit lines BL0 (BL1) and /BL0 (/BL1) are set to the electrically floating state at the intermediate potential. When word line (e.g., WL0) is selected and its potential rises, memory transistors MT in memory cells MC00 and MC10 are turned on, and potentials of bit lines BL0 and BL1 change from precharge potential VBL in accordance with information stored in memory cells MC00 and MC10. Bit lines /BL0 and /BL1 hold the precharge potential. Thereafter, sense amplifiers SA0 and SA1 are activated to amplify potential differences of bit lines BL0 and /BL0, and bit lines BL1 and /BL1, respectively.
In the DRAM, memory capacitor MQ stores information in the form of electric charges. Leak of charges from the capacitor reduces the amount of accumulated charges. The leak of accumulated charges from the memory capacitor will be discussed below.
As shown in FIG. 68, it is assumed that data at the H-level (i.e., signal at power supply potential Vcc level) is written into memory cell MC. Upon completion of data writing, word line WL attains the nonselected state of the ground potential level (0 V). During the standby state, bit line BL is kept at the potential of Vcc/2 set by the precharge/equalize circuit shown in FIG. 67. In memory capacitor MQ, the potential of a storage node SN is Vcc, and the potential of cell plate SP is Vcp. In this state, the potential of gate of memory transistor MT is sufficiently lower than the potential of its source (i.e., conduction terminal connected to bit line BL). Therefore, even if the potential of word line WL varies to some extent, e.g., due to the influence by noises, memory transistor MT surely maintains the off state, and hence the electric charges neither flow from memory capacitor MQ into bit line BL nor flow from bit line BL into memory capacitor MQ.
As shown in FIG. 69, it is now assumed that memory cell MC1 has stored data at the H-level, and memory transistor MT1 is connected to word line WL0. Memory cell MC2 is connected to word line WL1, and has stored data at the L-level. Memory transistors MT1 and MT2 are connected to bit line BL. When word line WL1 is selected to raise its potential, data held at memory cell MC2 is transmitted onto bit line BL. Thereafter, the sense amplifier operates and the potential of bit BL is discharged down to the ground potential (0 V). In this state, the gate and source of transistor MT1 in the memory cell MC1 are set to the same potential. In this state, therefore, memory cell MC1 has the electric charges held at memory capacitor MQ1 flown to bit line BL when the potential of word line WL0 rises due to the capacitive coupling with word line WL1, or when the potential of bit line BL slightly decreases in the negative direction due to the capacitive coupling between word line WL1 and bit line BL at the time of fall of the potential of word line WL1. In this manner, the potential change of the word line or bit line causes leak of charges accumulated in the memory capacitor via the channel of the memory transistor, and this leak causes change of the charge retention characteristics, which is referred to as "disturb refresh".
As shown in FIG. 70, it is assumed that memory capacitor MQ has stored data at the L-level during the standby state. The source of MOS transistor is one of the two conduction terminals held at the potential lower than that of the other. In the case shown in FIG. 70, therefore, the source is the conduction terminal connected to storage node SN. Even in this case, when the potential of word line WL rises due to the influence by noises, charges flow into memory capacitor MQ. This results in destruction of the stored information due to leak of electrons in the memory capacitor. Therefore, even the case shown in FIG. 70 presents a problem that sufficient immunity against "disturb refresh" cannot be achieved.
FIG. 71 shows an example of a subthreshold current characteristics of the MOS transistor. FIG. 71 shows a relationship between a gate/source voltage V.sub.GS and a drain current I.sub.D with a drain/source voltage V.sub.DS of 0.1 V. When gate voltage V.sub.GS is lower than the threshold voltage, drain current I.sub.D decreases exponentially. However, a small current flows even when the potentials of the gate and the source are equal to each other. If the electrostatic capacitance of memory cell capacitor MQ is relatively large, the leak does not significantly affect the refresh cycle. However, if the capacitance of memory capacitor is greatly reduced so as to comply with high integration of DRAM in recent years, the amount of accumulated charges decreases, so that the leak current significantly affects the refresh cycle.
In order to prevent the flow of charges which may be caused by the channel leak, the impurity concentration at the channel region may be increased sufficiently for increasing the threshold voltage Vth of memory transistor MT. The subthreshold current which may cause the channel leak is the drain current through a weakly inverted region in the channel region, and formation of this weakly inverted region is suppressed by increasing the threshold voltage.
However, if the threshold voltage Vth of memory transistor MT is raised as described above, it is necessary to further increase the voltage of high voltage Vpp applied to word line WL in order to write the signal potential at power supply potential Vcc level (i.e., H-level data) into memory capacitor MQ. If the high voltage Vpp is increased, a load of the circuit generating the high voltage Vpp increases, so that stable supply of high voltage Vpp is impossible, or the circuit scale or size must be increased. Also, current consumption increases by the following reason. In general, a high voltage generating circuit produces the high voltage Vpp from power supply potential Vcc by utilizing a charge pump operation of a capacitor. An efficiency of conversion from power supply potential Vcc to high voltage Vpp is not higher than 50%. For example, if the current consumption of the circuit utilizing the high voltage Vpp increases by 1 mW and the conversion efficiency is 50%, the current consumption of power supply potential Vcc increases by 2 mW. Further, if high voltage Vpp is increased, a high voltage is applied to the word line, which results in a problem related to the reliability of breakdown voltage characteristics of the word line as well as a problem related to the reliability of the transistors supplied with high voltage Vpp (MOS transistor and memory transistor in the word driver). In particular, a problem related to reliability of components arises in the word driver portion, because high voltage Vpp is applied across the drain and source of the MOS transistor therein.
If the refresh cycle is shortened in order to compensate for deterioration of the refresh characteristics (charge retention characteristics of memory cell), only reading and rewriting (restoring) of data of memory cell are merely performed in the refresh operation, and external access is inhibited, so that an external device cannot access the DRAM during the refresh period, resulting in reduction of a utilization efficiency of the DRAM and in performance deterioration of a processing system using the DRAM.

Dynamic semiconductor memory device having excellent charge retention characteristics


The present invention provides a novel and improved process for the preparation of Zonisamide and the intermediates thereof. In one aspect of the present invention, the process provides for: the preparation and isolation of a novel crystalline form of anhydrous 1,2-benzisoxazole-3-methanesulfonic acid of formula 1; the direct chlorination of the acid of formula 1 into its acid chloride of formula 2; and the in situ conversion of the intermediate acid chloride of formula 2 into Zonisamide

Zonisamide is known as 1,2-benzisoxazole-3-methanesulfonamide or 3-(sulfamoylmethyl)-1,2-benzisoxazole and has anti-convulsant as well as anti-neurotic effects. It is marketed as an anti-epileptic drug (ZONEGRAN™).
The synthesis of zonisamide has been achieved by several routes, most of which begin by the conversion of 4-hydroxycoumarin into 1,2-benzisoxazole-3-acetic acid.

A variety of bases have been used in this reaction including sodium methoxide (generated in situ from sodium metal and methanol; T. Posner, Chem. Ber., 42, 1909, 2523), pyridine (Mustafa et al., Tetrahedron, 19, 1963, 1831), sodium acetate (Casini et al., J. Heterocyclic Chem., 1965, 385), alkali carbonates and aliphatic amines (United States Patent Application Publication No. US 2002/0183525 A1 and International Patent Application Publication No. WO 02/0705495 A14).
Two routes have been utilized to convert the 1,2-benzisoxazole-3-acetic acid intermediate into zonisamide. Scheme 2 depicts the initial route for its preparation by a bromination, decarboxylation and nucleophilic substitution sequence to give sodium 1,2-benzisoxazole-3-methanesulfonate (Gianella et al., Chimie Therapeutique, 7(2), 1972, 127; and Uno et al., J. Med Chem., 22(2), 1979, 180). This process provides zonisamide in ca. 44% overall yield.

Disadvantages of this process include the fact that the 1,2-benzisoxazole-3-methylbromide intermediate is a strong lachrymator and therefore it is undesirable to handle, especially on scale-up. Also, this intermediate is not very crystalline and tends to separate as an oil before solidifying thereby leading to difficulties with respect to isolation and purification.
Scheme 3 shows the second route by forming sodium 1,2-benzisoxazole-3-methanesulfonate via sulfonization of 1,2-benzisoxazole-3-acetic acid to 1,2-benzisoxazole-3-methanesulfonic acid (1).

Originally the chlorosulfonization was carried out using excess chlorosulfonic acid as a solvent (H. Uno and M. Kurokawa, Chem. Pharm. Bull, 26(11), 1978, 3498). Besides undesired ecological and safety issues that the extremely corrosive chlorosulfonic acid poses, disulfonization occurs. The removal of disulfonated product needs additional purification steps which results in loss of material and costs time, solvent and labour, etc. Later it was discovered that the use of 1,4-dioxane moderates the reactivity of chlorosulfonic acid thereby minimizing concomitant side reactions (U.S. Pat. No. 4,172,896). However, to achieve this, the reaction was carried out in 1,2-dichloroethane, which is a cancer suspect agent. This solvent poses other safety and environmental problems due to its flammability and effects on the ozone layer, respectively.
International Patent Application Publication No. WO 03/020708 A1 discloses the chlorination of sodium 1,2-benzisoxazole-3-methanesulfonate with a very large excess of phosphorous oxychloride (POCl3) to form 1,2-benzisoxazole-3-methanesulfonyl chloride (2) which is isolated and subsequently converted to zonisamide by treatment with ammonia gas (Scheme 4).

The disadvantage of this process is that the very large excess of POCl3 (8.1 mol equivalents) must be removed before isolation of 1,2-benzisoxazole-3-methanesulfonyl chloride (2) and subsequent conversion to zonisamide. Direct chlorination of 1,2-benzisoxazole-3-methanesulfonic acid (1) into 1,2-benzisoxazole-3-methanesulfonyl chloride (2) is not described in WO 03/020708. In fact, WO 03/020708 teaches that since 1,2-benzisoxazole-3-methanesulfonic acid (1) is a more hygroscopic compound than its alkaline or earth alkaline salts, it is recommended to isolate the product as a salt rather than the free sulfonic acid. Further, it is taught in WO 03/020708 that due to differences in their solubilities, it is preferable to convert the 1,2-benzisoxazole-3-methanesulfonic acid (1) into its salts for easier separation from the reaction mixture. WO 03/020708 also discloses a 1,2-benzisoxazole-3-methansulfonic acid monohydrate Form I having a water content of about 7.6% (measured by Karl Fischer titration). A 1,2-benzisoxazole-3-methanesulfonic acid (1) having a lower water content of 2.8% (measured by Karl Fischer titration) was obtained from the monohydrate but only after drying under very harsh conditions (drying for two days at 60° C. and for approximately 16 hours at 100° C.), and no further details about the compound are provided in WO 03/020708.
In Japanese unexamined (Kokai) Patent Application No. JP53077057 A2, there is mention of converting a 3-methanesulfonic acid of the general formula (VII)
directly into a methanesulfonic acid halide of the general formula (II)
using a halogenating agent, wherein X is a hydrogen atom or a 5-or 6-position halogen atom and Y indicates a halogen atom, but no further details about the 3-methanesulfonic acid (VII) have been given.
International Patent Application Publication No. WO 03/072552 A1 discloses the conversion of sodium 1,2-benzisoxazole-3-methanesulfonate into 1,2-benzisoxazole-3-methanesulfonyl chloride (2) using thionyl chloride and catalytic amounts of N,N-dimethylformamide (DMF). Although the conversion of 1,2-benzisoxazole-3-methanesulfonic acid (1) to the corresponding 1,2-benzisoxazole-3-methanesulfonyl chloride (2) is generally mentioned in this application, experimental details have only been given for the conversion of the sodium 1,2-benzisoxazole-3-methanesulfonate and, again, large excesses of highly corrosive chlorinating agents were used.
Clearly, an industrial process overcoming the deficiencies of the prior art processes, which would provide zonisamide in a high-yield, cost-effective, environmentally friendlier and safe manner was required.
None of the prior art has characterized the existence of any crystalline forms of anhydrous 1,2-benzisoxazole-3-methanesulfonic acid. There is a continuing need to investigate crystalline forms of 1,2-benzisoxazole-3-methanesulfonic acid which can provide useful intermediates for zonisamide synthesis.

Process for the preparation of zonisamide and the intermediates thereof


A cyanide-free lytic reagent composition and method of use for measuring the total hemoglobin concentration and white blood cells in a blood sample are disclosed. The lytic reagent composition includes a quaternary ammonium surfactant to lyse red blood cells and release hemoglobin and a ligand to form a stable chromogen with the hemoglobin. The lytic reagent composition has a pH in a range of 3 to 10. The lytic reagent composition can also include a second quaternary ammonium surfactant. The ligand can be malic acid, malonic acid, ethylene diamine, N,N-diethylethylene diamine, N,N′-diethylethylene diamine, diethylene triamine, tetraethylene pentamine, 1,6-hexanediamine, 1,3-pentanediamine, 2-methylpentamethylenediamine, 1,2-diaminocyclohexane, 4-aminoacetophenone, bis-hexamethylenetriamine, pyridazine, or 3,6-dihyroxypyridazine.

The determination of total hemoglobin is indicative of the oxygen-carrying capacity of whole blood. More than 300 abnormal hemoglobins have been discovered upon examination of patients with clinical symptoms and by electrophoretic surveys of a clinically normal population. Many of these abnormalities result in clinical pathologies having altered hemoglobin levels or hemoglobin having an altered ability to bind oxygen. Among these diseases are sickle cell anemia, both α and β-thalassemias and hemoglobin M.
An ability to measure hemoglobin (Hgb) in blood samples is an essential part of diagnostic analysis and is also important for monitoring responsiveness to therapies directed towards diseases which affect hemoglobin and to therapies directed towards other diseases, which may have adverse side effects on the hemoglobin level.
White blood cells in the peripheral blood of normal subjects consist of five types, i.e., lymphocytes, monocytes, neutrophils, eosinophils and basophils. The latter three types of white blood cells are collectively referred to as granulocytes. Counting and differentiating different types of white blood cells in a blood sample provides valuable information for clinical diagnosis.
The classification and counting of white blood cells has most commonly been conducted by the differential analysis method which is also referred to as the manual method. Automatic blood analyzers are also commonly used for counting white blood cells, employing a lytic reagent to lyse red blood cells and then measuring the remaining white blood cells. A more sophisticated apparatus has been developed that counts different types of white blood cells (differential analysis of) including monocytes, lymphocytes and granulocytes. Ideally, one would like to be able to accomplish multiple diagnostic analyses such as hemoglobin measurement and counting the numbers of white blood cells or differential analysis of white blood cell subpopulations in a single automated step.
Among the many well-known methods for hemoglobin determination, the cyanide hemoglobin method has been recommended as a standard by the International Committee for Standardization in Hematology. Modification of this method by Matsubara and Okuzono has led to its wide usage in clinical laboratories. In this method, the iron ion of the heme group in all forms of hemoglobin of the red cells is oxidized to methemoglobin by potassium ferricyanide. The methemoglobin is then complexed with the cyanide anion, which has a very high affinity to the iron ion of the heme group, and forms a cyanmethemoglobin chromogen. This extremely stable chromogen has a maximum absorption at 540 nm, which is measured manually by spectrophotometer.
Despite the stable chromogens formed by the standard cyanmethemoglobin method and its modified automatic methods, the reagent waste has caused enormous environmental concern because of the potassium cyanide used. In the last twenty years, a tremendous effort has been undertaken to develop automated hemoglobin analysis methods without utilizing cyanide.
Oshiro et al, Clin. Biochem. 1583 (1982), teach the use of a reagent for hemoglobin analysis that comprises sodium laurylsulfate (SLS) and Triton X-100 (a nonionic surfactant) in a neutral pH (7.2). The SLS is used to lyse red blood cells and is believed to further produce a SLS-hemoglobin complex which has a maximum absorption at 539 nm and a shoulder at 572 nm. The reaction completes within 5-10 minutes and the total hemoglobin measurement is quantitative. However, as later taught in U.S. Pat. No. 5,242,832 (to Sakata), it is not possible with Oshiro's method to analyze white blood cells simultaneously with hemoglobin measurement.
U.S. Pat. No. 5,242,832 (to Sakata) discloses a cyanide-free lysing reagent for counting white blood cells and measuring the hemoglobin concentration in blood samples. The lysing reagent comprises at least one first surfactant which is a quaternary ammonium salt, at least one second surfactant which includes cationic and amphoteric surfactants, and at least one hemoglobin stabilizer selected from the group including Tiron, 8-hydroxyquinoline, bipyridine, 1-10-phenanthroline, phenolic compounds, bisphenol, pyrazole and derivatives, second phenyl 5-pyrazolone and derivatives, phenyl 3-pyrazolone, and imidazole and its derivatives. Sakata teaches that fractionation of the white blood cells into two or three groups including an aggregate of lymphocytes, an aggregate of monocytes, eosinophils and basophils, and an aggregate of neutrophils can only be accomplished by using at least two suitable surfactants and by rigorously controlling the surfactant concentration. Sakata also teaches that the preferred pH range of the lysing reagent is from 5.0 to 8.0. If the pH value is 3.0 or less, damage to the white blood cells increases thus rendering measurement of white blood cells difficult, and if the pH is 9.0 or more, the stability of hemoglobin deteriorates over time.
PCT/US95/02897 (Kim) discloses a cyanide-free reagent for determining hemoglobin in a whole blood sample. The reagent comprises a ligand selected from the group consisting of imidazole and derivatives, N-hydroxyacetamide, H-hydroxylamine, pyridine, oxazole, thiazole, pyrazole, pyrimidine, purine, quinoline and isoquinoline, and a surfactant with a strong erythrolytic capability selected from the group consisting of lauryl dimethylamine oxide and octylphenoxy polyethoxyethanol. The analysis method is fast, less than 10 seconds. However, the reagent only performs under an extreme alkaline condition, pH from 11 to 14. In addition, no capability of counting white blood cells or differentiating white blood cell subpopulations is taught by Kim.
U.S. Pat. Nos. 5,763,280 and 5,882,934 (to Li et al.) disclose cyanide-free reagents containing an organic ligand for measurement of hemoglobin and white blood cells in a blood sample. The organic ligand can be triazole and its derivatives, tetrazole and its derivatives, alkaline metal salts of oxonic acid, melamine, aniline-2-sulfonic acid, quinaldic acid, 2-amino-1,3,4-thiadiazole, triazine and its derivatives, urazole, DL-pipecolinic acid. isonicotinamide, anthranilonitrile, 6-aza-2-thiothymine, adenine, 3-(2-thienyl)acrylic acid, benzoic acid, alkali metal or ammonium salt of benzoic acid, or pyrazine and its derivatives.
U.S. Pat. No. 6,740,527 (to Wong et al.) discloses cyanide-free reagents for measurement of hemoglobin and white blood cells in a blood sample. The reagents contain at least one hydroxylamine salt selected from the group consisting of hydrochloride, sulfate, phosphate, and other acid salts.
A need is still present for a cyanide-free lytic reagent that contains a ligand that is inexpensive and environmentally friendly for a relatively large consumption on routine hematology analyzers.

Cyanide-free lytic reagent composition and method of use for hemoglobin and white blood cell measurement


In order to provide protection for first information, protection information, for example parity information, for the first information is spatially distributed with respect to the first information in memory. A logic unit maps the first information and the spatially distributed information corresponding thereto from them memory onto a connection operating under a protocol supporting the protection information.

The present invention relates to computer systems, and to the diagnosis of computer system errors.
Computer systems are becoming more complex and as a direct result more difficult to diagnose when they go wrong. Soft and transient errors further make diagnosis more difficult because the "fault" can disappear when an attempt is made to diagnose an error.
Mechanisms have been proposed for the diagnosis of errors in system-level interconnects and also in large DRAM and SRAM arrays. However, this does not address the protection of other interconnects within a system. Although such interconnects are typically fairly robust, faults can still occur.
For example, boot information for a processor is typically held in a programmable read-only memory (PROM) that is not parity protected. In normal usage, the PROM and bus system through which it is accessed are very reliable, so that this has not conventionally been seen as a problem. However, very rarely, the information held in the PROM 30 could become corrupted, for example as a result of a cosmic ray event. In this case, it is possible that incorrect information can be provided to the processor via the bus system. As the PROM contains boot information, and is used by the processor at an initial boot time, then this could cause a problem in that the processor might not start correctly or hang during a restart.


The invention provides a pressure-sensitive adhesive for the skin excellent in pressure-sensitive adhesiveness to the human skin and repeelability therefrom, which does not cause the horny layer to be torn away in peeling and is lowly irritant to the skin; and tapes or sheets made by using the same. The pressure-sensitive adhesive is characterized by comprising (a) 100 parts by weight of a copolymer which is prepared from an olefinic macromonomer and a vinyl monomer and whose molecular weight (in terms of polystyrene and as determined by gel permeation chromatography (GPC)) has a two-peak distribution (with the proviso that when the copolymer is to be post-cured, the distribution is one as determined before the post cure) and (b) 20 to 250 parts by weight of a softener which is compatible with the copolymer and liquid or pasty at room temperature and has a boiling point of 250 or above (with the proviso that when the content of the softener (b) exceeds 80 parts by weight, the copolymer must be post-cured).

In the field of medical pressure sensitive adhesive tape, the needs over the products which are gentle to the skin, and are free from damage of skin after repeated application to the skin. In this regard, there are some example tapes that are so-called low adhesion type tape made from acrylics and rubber. However, these products also cause some problems. After applying the tape to the skin, the adhesion increases with time, and the peeling of tape off the skin becomes difficult and a part of adhesive leaves on the skin after removal.
For example, the re-peelable medical adhesives which consist of acrylic-acid and acrylic-ester copolymer are described in, JP 2700835, JP 3014188, Laid-open Publication H 11-269439 and Laid-open Publication H 11-286664. The crosslinking of acrylic acid in the adhesive copolymer by isocyanate is described in the later 2 patents. However, the isocyanate is quite reactive for many compounds and often reacts with the drugs in the adhesive. In this case, the crosslinking reaction itself is inhibited.
In Laid-open Publication H 10-251609, described is the re-peelable type adhesive which consists of acrylic AB type block copolymer. However, The manufacturing of acrylic AB block adhesive has many technological problems and it is difficult to supply it at the present situation.

Pressure-sensitive adhesive for the skin and tapes or sheets for the skin made by using the same


The invention relates to an electromechanical positioning unit formed as an inertial drive to position objects with atomic scale positioning precision and with displacement ranges up to centimeters. The positioning unit contains at least one preferably tube shaped piezo electric actuator for transmitting electrically controllable inertial driving motions to a slider. The object of the invention is a slider consisting of at least one part of relatively high mass (mass unit) and of at least one flexible deformable part (flexible unit) allowing the frictional forces to be adjustable by bending the flexible parts and the mass part providing high loading capacity of the positioning unit. By combining these two parts it is possible to position heavy objects and to exert forces necessary to drive tools.

The invention relates to an electromechanical positioning unit according to the generic term in claim 1. It particularly concerns a positioning unit formed as an inertial driving mechanism with at least one tube-shaped piezoelectric actuator with a movable slider. The actuator has electrodes for connecting it to variable voltages for electrically controlling its motion. The slider is to be moved inside this piezo actuator in the direction of the piezo movements along a tube-shaped sliding surface.
Positioning units of this kind with nanometer precision, activated by piezo actuators based on the principle of inertial driving, are used as positioners with atomic resolution, analysis tools (e.g. scanning tunneling microscope) and tools in micro- and nanotechnology. In these inertial drives the displacement of a slider relative to a sliding surface is achieved by high acceleration of the sliding surface so that the inertial force of the slider exceeds the frictional force and the slider can not follow the motion of the sliding surface.
Especially compact forms of the positioning unit are the one-axis inertial drives as described in DE 38 22 504 Al, in WO-Al-94/06160 and in Review Sci. Instr. 63 (1) (January 1992, pages 263/264). According to these articles one or several piezo actuators move a sliding surface fast and slowly. This particularly tube-shaped sliding surface symmetrically surrounds the slider.
In DE 38 22 504 Al a micromanipulator with several sliders supporting and moving an object is described. The sliders with support heads directly supporting the object are to be moved piezo-electrically inside a tube-shaped sliding surface. However, the frictional force of these sliders having the shape of a cylinder-bolt and not having any flexible elements are not adjustable.
The slider of the positioning unit described in WO-Al-94/06160 ("low-mass support means") is wire-shaped and its frictional force is adjustable by its flexible bendable shape but limited to small variations of the bending. That means only a small bending range is allowed to create a reasonable frictional force. This form of the slider allows inertial driving only if the frictional force is very small. Thus a tip, e.g. the tip of a scanning tunneling microscope, can be moved but not heavy objects. The slider can only exert extremely small forces because these forces are limited to the strength of the frictional force.
Furthermore the forces that can be exerted to the slider in WO-Al-94/06160 are limited by the power capacity of the piezo actuator. The transition from adhesion to sliding strongly depends on the shape of the impulse transmitted from at least one of the piezo actuators to the sliding surface and depends on the mass of the slider. It is also depending on the coefficients of friction of the different materials involved. The piezo actuators depolarize if the applied voltages exceed say a few 100 Volts and after that can not move any more thus limiting the transmission of power into the inertial drive.
In "Review Sci. Instr." 63 (1), January 1992, pages 263/264, a slider made of two halves of a cylinder cut along its axis is described, both cylinder halves hold inside a tube-shaped piezo actuator by frictional forces. For this purpose a spring is introduced between the two halves protecting them from falling out of the tube but allowing the two halves to be moved by piezo forces along the axis of the tube. From this it is known that it is extremely difficult to adjust the spring mechanically so that the two halves of the slider can be moved by piezo forces along the axis of the tube. The mechanical construction of the slider with the two halves of the cylinder and the spring, that is difficult to adjust, is so complicated that the diameter of the piezo actuator can not be less than 19 min to 20 mm practically. The bulkiness of the whole construction makes it sensitive for mechanical disturbance from outside like acoustic waves from walking steps making the positioning with atomic precision impossible normally without special vibration isolation systems.
The practical application of a positioning unit affords that the drive is tolerant against variations of the frictional forces arising from aging, dust, corrosion of the slider, change of the spring constant etc. This tolerance is not given by the unit in Review Sci. Instr. 63 (1). In this article the motion of the slider against gravity could only be achieved by driving the "Piezoelectric ceramics" with voltages exceeding 50 volts. Operation against forces larger than gravity is not possible; particularly the unit can lift nothing by itself except the slider.
According to the above mentioned Review Sci. Instrum. 63 (1) the slider-mass consists of two cylinder halves that are pressed against the friction tube wall with the help of a spring. If during operation both mass parts have different friction against the friction tube wall, which can hardly be avoided in "micro"-practice, both mass parts run asynchronous. By this they can tilt and stick in the friction tube. So a substantial disadvantage of the known device is, that the slider always must consist of two cylinder halves and therefor of two mass units, that are pressed transversally to the transport direction against the inner wall of the friction tube.