The present invention provides a bib having a relatively high Notched Tear Resistance in combination with a relatively low Circular Bending Stiffness. The relatively high Notched Tear Resistance reduces the ability of an infant wearer to tear off a piece of the bib when a bib has been punctured (e.g. by biting). The relatively low Circular Bending Stiffness provides a soft, drapable bib which is comfortable to the wearer.

Disposable bibs are well known in the art. Such bibs can be provided for use on babies during feeding. Disposable bibs can have a laminate construction comprising multiple layers. For instance, disposable bibs can include an absorbent paper layer for receiving spilled food material and a plastic film layer for preventing penetration of spilled liquids through the bib and onto the baby's clothing. Other multiple layer bib constructions are also known.
Disposable bibs can have the disadvantage that an infant wearer can puncture the bib, such as by biting. If the infant wearer then tears off a piece of the bib, the effective coverage of the wearer's clothes is decreased. Additionally, separate torn pieces of the bib create additional pieces of waste requiring disposal.
Adding a woven element to a bib, such as a woven cloth layer to provide absorbency or strength, has the disadvantage that such woven constructions increase the cost of the bib. The costs of woven structures make such structures impractical for use in disposable bibs.
Attempting to reduce tearing of the bib by merely increasing the tensile strength of one or more components of the bib is also generally not satisfactory. For instance, increasing the tensile strength of the bib, such as by merely changing the thickness of one of the bib components, generally results in an undesirable increase in stiffness. Further, increasing the tensile strength can result in higher material costs or added complexity of manufacture.
More importantly, the Applicants have found that merely increasing the tensile strength of the bib does not necessarily reduce the in use incidence of tearing of the bib. Applicants have discovered that incidence of tearing of the bib is correlated with a property hereinafter referred to as the Notched Tear Resistance (NTR) of the bib. The Notched Tear Resistance is a determination of the force required to tear a previously notched sample of a substrate into two separate pieces.
Additionally, the Applicants have invented a disposable bib having an NTR which substantially reduces the incidence of tearing of the bib without substantially increasing the stiffness of the bib. The inventive bib also provides the reduced incidence of tearing without requiring an excessively high bib peak tensile strength.
Accordingly, it is an object of the present invention to provide a disposable bib which resists tearing.
Another object of the present invention is to provide a disposable bib which resists tearing yet is relatively flexible.
Another object of the present invention is to provide a disposable bib which resists tearing yet has a peak tensile strength below a threshold value.
Yet another object of the present invention is to provide a disposable bib without the use of woven elements, wherein the bib resists tearing and is relatively flexible.

Disposable bib having notched tear resistance


A removable mold apparatus that forms a portion of the inner surface contour of an elongated hollow over molded polymeric solar collector distribution manifold and its preferred method of leveraged use that integrates select raw material components and process methods to enhance both manufacturing efficiency and hermetic enjoinment durability, most especially when over molding onto connectively spaced tube absorber constructions.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Conventional polymeric solar collectors typically include two manifolds that are each hermetically enjoined to each end of an absorber construction wherein the absorber construction is comprised of a great multiplicity of hollow conduits through which water is uniformly passed from one enjoined manifold to the other. The manufacturing of these solar collectors utilizes a variety of thermoplastic melt forming and enjoining methods that are in practice leveraged to significantly varying degrees in the quest for overall manufactured product value. Accordingly, polymeric forming manufacturability through extrusion has utilized 3 basic forms of solar collector absorber component construction. They are in order of manufacturability from the least leveraged to the most leveraged: (1) a single conduit preferably round, (2) a profile consisting of two parallel sheets with a multiplicity of connected partitions, (3) a string of planar aligned conduits, preferably round, with connective webs between each conduit and an attachment means at the end of each string.
Conventional methods for cost effectively joining the extruded absorber constructions to the manifolds in order of the least leveraged to the most leveraged include, (1) plastic thermal fusion via hot platen or infrared fixture welding to a separately extruded manifold, and (2) injection molding the manifold directly over the separately extruded absorber construction.
The most preferred embodiment of this present invention is directed toward the most leveraged methods of extrusion absorber construction and manifold joining or more specifically the over molding of manifolds directly over mold cavity inserted connectively spaced tube substrates. It features a novel molding apparatus and the further use of polypropylene as the primary core material of overall construction, and further uses very specific material formulation and process methodology to most effectively leverage the overall benefits of the novel apparatus. This present invention represents a giant step forward to a field of art that has been relatively stale, as shown by a brief summary of representative patent documents provided herein for reference.
U.S. Pat. No. 4,352,772, to Bezner describes what amounts to a very generalized insert or over molding method and a more specific apparatus oriented method to make a polymeric thermoplastic manifold to absorber joint of a solar collector more specifically or heat exchanger more generally. The document describes a "stay with the mold absorber tube supporting projection means". All 3 of the previously mentioned extruded absorber embodiments are featured. Most particularly a connectively spaced tube absorber extrusion is featured in what as will here be revealed as a clearly non-viable embodiment as relating to the methods as disclosed. This as would be regarded as the most leveraged extrusion embodiment of the Bezner disclosure appears to limit its focus upon a concern that limited extrusion process accuracy, more specifically in the form of accumulated spacing error, must be compensated for to insure that the multiplicity of tubes will fit the extended uniform spacing of the very necessary supportive projections. This "elastic web" coping mechanism has been repeatedly shown to be unnecessary. It can be further shown that it is not even a viable manufacturing alternate. In particular, the very numerous overly sharp crevices within the outer shape contour of the extruded structure are exceedingly difficult to hermetically fill and fuse into during molding. It is of great significance that the ultimate assignee of the patent has over these past 3 decades has been manufacturing and marketing only the least leveraged extruded single tube absorber embodiment and not the "elastic web" coping mechanism.
Of additional practical significance is that the Bezner assignee has consistently over molded manifolds in only one foot wide sections. The pool heating market demands 4 foot wide solar collector constructions. To meet this demand the assignee has consistently built out 4 one foot wide completed sections fixture welded together in 6 places. The disclosure is totally silent as regarding the highly influential processing aspect of mold gating strategy. When one studies the product it becomes evident that it is molded through multiple gates that are located on the side of the manifold directly opposite the inserted absorber. This explains the one foot wide sections. It is known to this inventor that the manifold mold core will bend during injection more and more as the manifold width is progressively widened using such a mold gating strategy. This introduces undesirable manifold thickness eccentricity resulting in manifold warp and weakened manifold to absorber enjoinment. The true practical utility of the method as disclosed is arguably very limited to solar collector construction in accordance to its very particular and ongoing method of practice.
U.S. Pat. No. 6,787,116, to Williams et al. describes, essentially a "stay with the part separately molded polymeric insert" intended to provide a secondary seal in addition to the primary seal of the very general Bezner molded manifold over absorber method. The key patent eligibility aspect lies with the 4 sided hollowed out box like structure that is provided creating a perimeter around strings of inserted absorber tubes by means of a separately molded component having sufficiently thinned side walls to enable the heat delivered by the injected over molding material to overwhelmingly thermally melt and fuse with that separately molded insert.
Although adequate for their intended purposes, none of the above patent documents describe a primary header to absorber joint over molding process that employs a removable absorber tube support means. More particularly, there are inherent and unique benefits available with using connectively spaced tube mold cavity inserted substrates that can be more or less effectively integrated within the manufactured article relative to the extent to which the process methodology is developmentally leveraged. The assignee of this present invention has for many years been using such an apparatus with much room for significant improvement. In light of the above, it would be beneficial to introduce a novel removable absorber tube support means apparatus that is much more functionally developed than its foundational precursor, and is especially more functionally developed for molding manifolds over connectively spaced tube absorber extrusion constructions.

Molding apparatus and method for operating same


A reflective rear light for a truck includes a bottom base, a light base, a circuit board, a reflective plate unit and a light lens unit. The circuit board is formed integral, provided with plural LED lights divided into plural indicting sections. Further the LED lights of all the indicating sections are matched with a reflective plate for reflecting light to reinforce the LED lights and to gain better effects.

1. Field of the Invention
This invention relates to a reflective rear light for a truck, particularly to one consisting of a bottom base, a light base, a circuit board, a reflective plate unit and a light lens unit, with the circuit board made integral. LED lights are mounted on the circuit board, divided into several sections for indicating different objects. Then the LED lights are matched with reflective plates so that LED lights are reinforced to gain better effects.
2. Description of the Prior Art
A conventional truck rear light shown in FIG. 1 includes a bottom base A1, a reversing light lens A30, a main light lens A20 and a license plate lens A40 fixed respectively in a front and a bottom side of the bottom base A1. A main light base A2 is installed in the bottom base A1, facing to the main light lens A20. A reversing light base A3 is fixed on the main light base A2, facing to the reversing light lens A30. A license plate light lens A40 is fixed under the rear side of the main light base A2, and a side light base A5 is covered with a side light lens A50, fixed at an outer side of the bottom base A1. The main light base A2, the reversing light base A3, the license plate light base A4 and the side light base A5 are respectively combined stably with sealed circuit boards A21, A31, A41 and A51 and LED lights A22, A32, A42 and A52. Then LED lights and sealed circuit boards are sealed with water-proof glue to form several single lights, and then combined with the bases, thus forming a truck rear light provided with the illuminating and identifying functions of a brake light, a tail light, a reversing light, a side indicating light (indicating a side or a direction) and a license-plate light.
Next, the main light base A2, the reversing light base A3, the license plate light base A4 and the side light base A5 are respectively matched with the circuit boards A21. A31, A41, and A51 and relative LED lights A22, A32, A42 and A52 for lighting different sections, complicating largely assembling work, in addition to insufficient brightness of the LED lights.


A vertical search engine may rank items based on both the quality of data associated with each item and the popularity of each item. The vertical search engine may access data associated with items from a variety of different sources, including feed sources and crawl sources. Data quality inputs are determined for each item based on the quality of the data associated with each respective item. In addition, popularity inputs are determined for each item based on user interest in each respective item. A global rankings score is then calculated for each item based on the data quality inputs and popularity inputs for each respective item. The global ranking score may be used to order search results for search queries in such a way that items from feed data and items from crawl data may be displayed in a unified manner, rather than being segregated by data source.

A search engine is a program designed to find information stored on one or more computing devices. In its most recognized format, search engines, such as those employed by MSN, Yahoo, and Google, for example, are used to find websites and documents throughout the Internet. These types of search engines typically perform "horizontal" searches, providing a breadth of information related to the search query. However, users often desire information within a narrow topic or field. Accordingly, vertical search engines have been designed to perform specialized searches to mine data for a narrow niche. For example, a shopping vertical search engine may be employed to search information for products users may wish to purchase. Other types of vertical search engines include job/career verticals, travel verticals, local services verticals, research verticals, real estates verticals, automobile verticals, and news verticals, for example.
Typically, vertical search engines maintain a database containing information relating to the particular topic of the vertical. In addition, the information is typically fed to the search engine by a number of feed sources. When the vertical search engine receives search queries, it may access the database to generate search results for the query. For example, a shopping vertical search engine may include a database storing product information and offers that are fed to the search engine by a number of different sources, such as merchants and retailers. When the shopping vertical search engine receives search queries, it accesses the database and provides a listing of products with associated product information and offers based on the query.
A drawback to having only feed data available to vertical search engines is that search results provide only limited information to users. A large amount of information relating to the particular topic of the vertical may be missing. To capture more information, web crawl information may also be added to the database. For example, a shopping vertical search engine may crawl retailer websites to capture information regarding products being sold by the retailer. However, information gathered by such a web crawl may be less complete and less reliable than information fed to the search engine. In addition, it is difficult to commingle and order items from both feed sources and crawl sources such that items users are most likely to be interested in are provided first. For example, if items were ordered based on the reliability and completeness of information associated with each item, items from feed sources would typically be listed first and crawl sources would been hidden at the end of the search results, even though users may be interested in items from crawl sources.


Partially opaque intellectual property (IP) includes source code providing the IP functionality. Meta-comments (pragmas or attributes) are provided with the source code to enable visibility of one or more nodes in the IP. Aliasing of the visibility-enabled nodes may also be provided for using meta-comments in the IP source code. The visibility-enabled nodes may be used by system designers in debugging a system design in either a software simulation environment and/or in debugging of a hardware device implementing the partially opaque IP.

1. Field of the Invention
This invention relates generally to methods, machine readable media and apparatus for use in connection with testing, evaluating and debugging generally opaque intellectual property ("IP"). More specifically, this invention relates to a technique for providing limited visibility of nodes, signals and other information in encrypted IP.
2. Description of Related Art
In the field of electronics, various electronic design automation (EDA) tools are useful for automating the process by which integrated circuits, multi-chip modules, boards, etc., are designed and manufactured. In particular, electronic design automation tools are useful in the design of standard integrated circuits, custom integrated circuits (e.g., ASICs), and in the design of custom configurations for programmable integrated circuits. Integrated circuits that may be programmable by a customer to produce a custom design for that customer include programmable logic devices (PLDs). Programmable logic devices refer to any integrated circuit that may be programmed to perform a desired function and include programmable logic arrays (PLAs), programmable array logic (PAL), field programmable gate arrays (FPGA), complex programmable logic devices (CPLDs), and a wide variety of other logic and memory devices that may be programmed. Often, such PLDs are designed and programmed by a user with an electronic design automation tool that takes the form of a software package. A wide variety of these devices are manufactured by Altera Corporation of San Jose, Calif.
Modular design can significantly accelerate the implementation of a system design in electronic devices. A user (also referred to herein, as appropriate, as a "customer" and/or "system designer") can partition a design into logic blocks, for example wherein each logic block provides a specific functionality. These logic blocks can be implemented on the target device using cores of intellectual property (IP). IP may, for example, be a high-speed serial interface (HSSI), a digital signal processor or other microprocessor, ALU, memory, or a multiplier. "IP" may also be referred to herein as an "IP block" or an "IP core," as appropriate and as will be appreciated by those skilled in the art. These terms are generally interchangeable for purposes of the present invention, unless otherwise indicated specifically or contextually.
The "IP designers" discussed herein are the individuals who develop and create IP that can be used in various electronic designs. This IP is designed to be plugged into designs and used, more or less, as building blocks for larger systems. An electronic system in many cases comprises logic designed by system designers, where the designed logic incorporates one or more pre-designed blocks of IP. Such IP is typically designed by different individuals than the designers of the overall system. When the IP is designed by a different company than the system in which the IP is used, the company providing the pre-designed IP typically has an interest in keeping the implementation details of the IP a trade secret and discouraging its unauthorized use.
EDA tools provide system designers with automated tools for designing and verifying circuit designs. EDA helps create, analyze and edit proposed electronic designs for purposes of simulation, prototyping, debugging, execution, computing, etc. EDA also can be used to develop systems that will use one or more user-designed subsystems and/or components in connection with pre-existing IP provided by another party.
In the course of generating an electronic design, simulation, timing analysis and/or other techniques may be used to debug the electronic design. During the course of a debugging simulation, a designer monitors various signals at nodes in the electronic design. Being able to identify signal behavior at specific nodes in the proposed electronic design allows the system designer to track down the source of errors or other problems and/or otherwise gather and use information regarding the behavior and operation of the proposed design.
As mentioned above, IP designed by one entity often is delivered to system designers as an encrypted netlist, encrypted RTL, or some other "opaque" version of the IP, as will be appreciated by those skilled in the art. IP whose implementation details are not readily visible to users will be referred to as "opaque" IP herein. IP can be provided in several forms: as drop-in blocks that include all of the information needed to realize the design, such as providing complete mask-level realization data for an ASIC core, as fixed functions that may or may not contain complete mask-level realization data, or in a parameterizable form that may or may not incorporate all of the data needed to realize the design. In the case of Altera IP, it usually is supplied as parameterizable RTL or netlists that are synthesized on the customer's desktop. No mask-level realization data is supplied.
Since the IP is essentially opaque to the user, it is not practicable for the user to probe internal nodes (for example, key registers, signals and state machines) to see the IP's state during the system debugging process carried out in simulation and/or running in hardware. This lack of visibility into an IP core can impede the system design and debugging process and can leave the user wondering if a problem is due to errors in the portion of the system the user designed or a problem with the IP.
Earlier debugging and analysis techniques and systems (which have not covered the debugging of opaque IP) have added features to the proposed electronic design (for example, in the RTL code) by synthesizing debugging logic into the design itself. These added features and/or circuits change the proposed design by building the diagnostics into the system. Therefore, debugging done inside the hardware using these types of techniques actually leads to changes the design, which is not always desirable.
Another approach to debugging a hardware device within a working system is to use a separate piece of hardware equipment called a logic analyzer to analyze signals present on the pins of a hardware device. Typically, a number of probe wires are connected manually from the logic analyzer to pins of interest on the hardware device in order to monitor signals on those pins. The logic analyzer captures and stores these signals. However, the use of an external logic analyzer to monitor pins of a hardware device has certain limitations when it comes to debugging such a device. For example, such an external logic analyzer can only connect to and monitor the external pins of the hardware device. Thus, there is no way to connect to and monitor signals that are internal to the hardware device. Unfortunately, when programming a hardware device, it is useful to monitor some of these internal signals in order to debug the device. One solution to this problem has been Altera's SignalTap, which is well known to those skilled in the art.
Although some hardware devices may come ready made with some internal debugging hardware, this debugging hardware typically is hardwired to route specific internal signals and cannot be readily adapted by a user who wishes to look at other signals. Because a programmable device is by its very nature a device that a user is attempting to program to perform a particular function, it is important to the user to be able to specify signals to be monitored, as well as trigger signals and trigger conditions in order to efficiently debug any particular device. Further, creating an electronic design for a programmable device is an iterative process that requires creative debugging by a user who may wish to monitor various signals, and who may change his mind on which signals to monitor fairly frequently in the course of debugging a PLD within a system. Known external and internal logic analyzers do not provide this flexibility with regard to generally opaque IP.
Techniques that permit thorough development and evaluation of digital systems and devices by system designers and other users, while maintaining proprietary IP protection (for example, by IP block opaqueness), would represent a significant advancement in the art. Moreover, it would be a further advancement if these techniques were adaptable to allow an IP designer to enable visibility and assign meaningful aliases for one or more useful nodes within opaque IP and to allow the system designer to select certain of these visibility-enabled nodes in debugging and other settings and contexts.


A gripper head travelling through a shed in a weaving loom, has a longitudinal lateral guide surface (14A, 17A) along its gripper head body which is temporarily contacted by guide lever fingers in those positions of the head where its proper guidance is most critical, e.g. at the time of the weft transfer. The guide lever fingers are so driven by a drive mechanism that these fingers are withdrawn from the loom shed just as soon as the weft transfer is completed.

It is essential that the two gripper heads do not collide with each other when they come closest to each other in the center of the shed for the transfer of the weft thread. Thus, proper guiding of the gripper heads is essential. Two basic possibilities are available for solving this problem. In the majority of tape gripper head looms very light flexible synthetic material tapes are used for carrying a gripper head at one end of the tapes which are guided over the entire weaving width in so-called guide teeth. The guide teeth are so arranged that during the travel of the gripper these teeth grip from below through the warp threads of the lower shed. The guide teeth are rigidly connected with the reed beam carrying a plurality of reeds to form a slay. When the slay is in the beat up position, the guide teeth dip below the warp threads of the lower shed. In connection with the just described structures, reference is made to European Patent Publications 0,204,274 (Pezzoli), published Dec. 10, 1986, and 0,402,285 (Riolet), published Dec. 12, 1980.
The type of gripper guide as described above has the disadvantage that the guide teeth dip below the warp threads of the lower shed only relatively shortly before the slay comes into the beat up position, whereby the lower shed warp threads do not tense-up fast enough before the beat-up. Thus, there is the danger that irregularities occur in the finished fabric in those positions corresponding to the point where the guide teeth dip under the lower shed warp threads since the latter are insufficiently tense at the time of beat-up. Such irregularities may appear in the form of stripes or the like. Another disadvantage of the just described construction is seen in that a relatively large number of guide teeth closely spaced is necessary in order to properly guide a gripper head travelling along with a flexible tape.
It is desirable that the gripper guiding is safe and positive along the entire weaving width, even when the weaving width is rather broad and even when high speed looms are involved.
Another possibility of guiding the gripper through the shed involves making the two gripper tapes substantially stiffer than the tapes that are guided by the guide teeth mentioned above. For this purpose it is known to use the reed beam sole as a sliding guide surface for the gripper head. The warp threads of the lower shed also run across the reed beam sole. Rearwardly, the gripper heads are also guided if desired by a guide piece connected to the respective gripper head and riding along the reed or reed blades. However, in this type of construction there is no guiding at all or just a minimal guiding in an upward direction and in the direction of the beat up motion.
The above described type of guiding has the disadvantage that the gripper head can be relatively easily brought out of its path by the vibrations of the loom. This problem becomes the more aggrevated the broader the loom is and the faster the loom operates. However, wide weaving widths and a fast operation are an economic necessity.
German Patent Publication 1,710,292 corresponding to U.S. Pat. No. 3,665,975 (Kokkinis), patented May 30, 1972 discloses control levers of a device for the positive controlling of the weft thread transfer from one gripper head to the other. These control levers reach through the warp threads of the lower shed. This type of arrangement is an improvement over the above mentioned construction, because irregularities in the fabrics, such as stripes or the like are avoided. This avoidance is accomplished in that the control levers are withdrawn out of the lower shed immediately after the transfer of the weft thread from one head to the other. That is, the withdrawal of the control levers takes place substantially before the actual beat up or weft binding takes place.
Further, one should take into account that a positive guiding of the gripper heads or of the tapes or rods carrying these heads is actually only necessary until the proper transfer of the weft thread from one head to the other has taken place without any collision of the two gripper heads. Thereafter, that is, during the reverse and outward motion of the grippers, it is no longer critical if there are small deviations from the ideal track of the grippers. German Patent Publication 1,710,292 mentions the possibility that the above control levers may perform, in addition to their controlling the gripper clamping lever, a function of centering or fixing the position of the gripper rod during the thread transfer or thread take over. However, a solution for such centering of the position of the gripper rods is not disclosed in this reference. German Patent Publication 3,901,549 (Gerhring), published May 23, 1990 further discloses a gripper with a guide element made of wood and attached to the gripper on its side facing the reed. The purpose of the wood piece is to provide a stabilizing guide along the reed blades for the gripper head as it carries the weft thread into the shed. As a result, the gripper head travels with its wooden guide element along the reed during its alternating back and forth movements into and out of the shed. This type of construction has several disadvantages. One disadvantage is seen in that the particular configuration and securing of the wooden guide element to the gripper is problematic. Another disadvantage is seen in that the individual reed blades of the slay are exposed to a continuous wear and tear by the friction with the wooden guide element.

Weaving loom with a guide for guiding a gripper head travelling through a shed


A high volume manufacturing (HVM) and circuit marginality validation (CMV) test for an integrated circuit (IC) is disclosed. The IC comprises a port binding and bubble logic in the front end to provide flexibility in binding a port to the uop and to create empty spaces (bubbles) in the uop flow. The out-of-order (OOO) cluster of the IC comprises reservation disable logic to control the flow sequence of the uops and stop schedule logic to temporarily stop dispatching the uops from the OOO cluster to the execution (EXE) cluster. The EXE cluster of the IC comprises signal event uops to generate fault information and fused uJump uops to specify combination of branch prediction, direction, and resolution in any portion of the test. Such features provide a tester the flexibility to perform HVM and CMV testing of the OOO and EXE clusters of the IC.

In an integrated circuit or semiconductor chip manufacturing environments, high volume manufacturing (HVM) tests may refer to testing various portions of the chip in a time effective manner. Circuit marginality validation (CMV) test may refer to one of the tests performed on a chip before concluding that the chip is ready to be shipped. Chip failures may be caused by circuit marginalities. Circuit marginality may encompass failures due to unsafe design approximations, process variations, and failure to account for some electrical and thermal properties of a chip.

Circuit marginality validation test for an integrated circuit


Computer-implemented systems and methods are described herein for determining mechanical properties of an electronic assembly. An input specification for a model of the electronic assembly is received, wherein the input specification includes a compressible body and a surrounding component in the electronic assembly. A geometric interference between the compressible body and the surrounding component is identified. A displacement is generated for the compressible body to account for the geometric interference. A non-linear contact is then generated between the displaced compressible body and the surrounding component. The model is updated with the displacement and the non-linear contact. Then, a resulting force equilibrium is determined within the electronic assembly based on the updated model, wherein the resulting force equilibrium is determined by removing the displacement from the updated model.

When electronic packages are assembled, internal gasket and thermal pads are compressed, generating an initial stress/deformation state in all components of the package. But the mechanical CAD geometries for electronic packages are usually provided in an assembled position, with the thickness of the thermal pads and gaskets in their resting states. Therefore, hardware designers usually do not know if the package will fulfill its mechanical requirements until physical testing, when the thermal pads are compressed during assembly.

Determining mechanical reliability of electronic packages assembled with thermal pads


A high breakdown voltage junction terminating structure having a loop-like RESURF structure formed on a SOI substrate is disclosed. A lateral IGBT, a lateral FWD, an output stage element and a driving circuit are formed in the inside region of the structure. The lateral IGBT and the lateral FWD are surrounded by a trench isolation region as an insulation region. Drain electrodes of high breakdown voltage NMOSFETs are provided on the inside of the high breakdown voltage junction terminating structure. Along with this, a gate electrode and a source electrode of each of the NMOSFETs are provided on the outside of the high breakdown voltage junction terminating structure. The periphery of the high breakdown voltage junction terminating structure is surrounded by a trench isolation region as a second insulation region. A control circuit is provided on the outside of the second insulation region. With this structure, a high breakdown voltage semiconductor device is obtained at low cost, in which power elements, circuits for driving the power elements and logic elements for controlling the power elements are integrated together into the same chip.

A. Field of the Invention
The present invention relates to a semiconductor device such as a high breakdown voltage IC (integrated circuit) in which high breakdown voltage lateral semiconductor elements and low breakdown voltage semiconductor elements for controlling are integrated together on the same substrate by applying a dielectric isolation technique thereto. In particular, the invention relates to a semiconductor device forming a one-chip inverter in which lateral IGBTs (insulated gate bipolar transistors) and lateral FWDs (free wheeling diodes) are mounted on the same substrate together with driving circuits of the respective IGBTs, a control circuit and a level shift circuit.
B. Description of the Related Art
In recent years, in high breakdown voltage semiconductor devices, a high breakdown voltage power IC has been developed in which power switching elements such as IGBTs and circuits for driving, controlling and protecting the IGBTs are integrated together on one semiconductor substrate. An element isolation technique such as that of junction isolation or dielectric isolation is used to mutually isolate the elements in such a high breakdown voltage power IC.
In a structure using dielectric isolation, capacitance per unit area in an isolated region is much smaller than that for a structure in which junction isolation is used. Thus, the structure has an advantage of hardly causing damage or malfunction of the semiconductor device due to latch-up induced by a parasitic element. In addition, a dielectric isolation structure can eliminate generation of a leak current caused by light irradiation under an environment of a strong radiation, which occurs in an element with a junction isolation structure.
Because of the above advantage of a dielectric isolation structure, a one-chip inverter is developed by using a dielectric isolation technique. In the one-chip inverter, lateral IGBTs and lateral FWDs are mounted together on the same substrate with a control element for controlling the IGBTs and the FWDs. The advantage of the one-chip inverter over a conventional structure in which power element chips and control element chips are separately provided is that an inverter device can be miniaturized with a considerable reduction in chip surface mounting areas and is highly reliable because of the reduction in the number of electrical connections between chips with bonding wires.
In FIG. 9, an arrangement of a general inverter circuit is shown. As shown in FIG. 9, a power device used for driving an electrical machine (not shown) such as a three-phase motor is made up of six IGBTs (Q1, Q2, Q3, Q4, Q5 and Q6) and six FWDs (D1, D2, D3, D4, D D6) connected in parallel to the respective IGBTs, with which a bridge circuit is formed. Anodes of the FWDs D1, D2, D3, D4, D5 and D6 are connected to emitters of the IGBTs of Q1, Q2, Q3, Q4, Q5 and Q6, respectively. Cathodes of the FWDs are connected to collectors of the respective IGBTs.
A direct-current voltage is applied between collectors of the IGBTs Q1, Q2 and Q3, upper arm switching elements in the U-phase, the V-phase and the W-phase, respectively, and emitters of the IGBTs Q4, Q5 and Q6, lower arm switching elements in the U-phase, the V-phase and the W-phase, respectively. The direct-current voltage is obtained by an AC power source 1, a converter 2 and a capacitor C.
Gates of the IGBTs Q1, Q2 and Q3 on the upper arm side are connected to corresponding output stage elements 3a, 3b and 3c, respectively. Gates of the IGBTs Q4, Q5 and Q6 on the lower arm side are connected to respective corresponding output stage elements (not shown) provided in control circuit 4. In other word, the IGBTs Q1, Q2, Q3, Q4, Q5 and Q6 are turned on and off on the basis of output signals from the respective corresponding output stage elements. In FIG. 9, in order to avoid making the figure complicated, illustration of connection between each gate and a corresponding output stage element is omitted.
A control signal for determining which ones of the IGBTs Q1, Q2, Q3, Q4, Q5 and Q6 are turned on and which ones are turned off is transmitted from control circuit 4 on the basis of a signal supplied from a microcomputer (not shown). Control signals for the IGBTs Q1, Q2 and Q3 on the upper arm side are subjected to voltage adjustment by level shift circuit 5 before being supplied to output stage elements 3a, 3b and 3c through driving circuits 6a, 6b and 6c corresponding thereto, respectively. Control signals for the IGBTs Q4, Q5 and Q6 on the lower arm side are supplied to their illustration-omitted respective output stage elements through their respective corresponding driving circuits (not shown) provided in control circuit 4.
FIG. 10 is a plan view schematically showing an arrangement of a principal part for the upper arm of the U-phase in a related one-chip inverter. As shown in FIG. 10, in the related one-chip inverter (a part of the upper arm for the U-phase) 10, on a SOI (silicon on insulator) substrate, there are formed control circuit 11 that outputs a control signal to a driving circuit for each of the U-phase, the V-phase and the W-phase on the basis of an input signal, high breakdown voltage NMOSFETs (N-channel insulated gate field effect transistors each using an oxide film as a gate insulator film) 12a and 12b each forming a level shift element in a level shift circuit, lateral IGBT 13 as a switching element on the U-phase upper arm, lateral FWD 14 connected in parallel to lateral IGBT 13, output stage element 15 supplying a switching signal to lateral IGBT 13, and driving circuit 16 producing an output signal to output stage element 15 on the basis of signals supplied from drain electrodes 17a and 17b of the high breakdown voltage NMOSFETs 12a and 12b (level shift elements) through wires 18a and 18b, respectively.
A region for forming each of the circuits and the elements is separated from others by trench isolation region 19. FIG. 10, however, only shows circuits relating to the key functions of the inverter without showing protection circuits included in the driving circuit and the control circuit, and circuits having other functions (the same is true for any other figures). Moreover, in some cases, for the level shift element, instead of the high breakdown voltage NMOSFET for a level-up circuit, a high breakdown voltage PMOSFET (P-channel MOSFET) for a level-down circuit is mounted.
FIG. 11 is a vertical cross sectional view taken on line G–G′ in FIG. 10 showing a cross sectional structure of high breakdown voltage NMOSFET 12a (level shift element). As shown in FIG. 11, SOI substrate 20 has a structure in which first semiconductor substrate 21 as a supporting substrate, and second semiconductor substrate 23 as a semiconductor layer in which element structures are formed, are layered with oxide film 22 as an insulator layer in between. Drain electrode 17a of the high breakdown voltage NMOSFET 12a is provided at the center of the high breakdown voltage NMOSFET 12a. High breakdown voltage junction terminating structure 24 is formed around drain electrode 17a, and is made up of a RESURF (reduced surface field) structure such as a double RESURF or a single RESURF.
Gate electrode 25 and source electrodes 26a and 26b of the high breakdown voltage NMOSFET 12a are formed in a part of the peripheral section of high breakdown voltage junction terminating structure 24. P-diffused layers 27a and 27b are provided on the surface of high breakdown voltage junction terminating structure 24 to achieve a high breakdown voltage by a RESURF effect. Trench isolation region 19 is provided around high breakdown voltage NMOSFET 12a. Oxide film 28 is formed on each side wall of trench isolation region 19. An inside part between oxide films 28 is filled with polycrystalline silicon 29.
As shown in FIG. 11, in a related one-chip inverter, wire 18a connected to drain electrode 17a of high breakdown voltage NMOSFET 12a traverses over high breakdown voltage junction terminating structure 24. This causes an area between wire 18a and second semiconductor substrate 23 to which a high voltage of the order of 600V, for example, is applied. Therefore, interlayer insulator film 30 such as an oxide film provided between high voltage wire 18a and second semiconductor substrate 23 must be thick enough. Thin interlayer insulator film 30 causes an electric potential of high voltage wire 18a to affect an electric potential distribution in the substrate, which results in degradation in a breakdown voltage of high breakdown voltage NMOSFET 12a. Furthermore, possible breakdown of interlayer insulator film 30 is caused at a sudden increase in the electric potential of drain electrode 17a.
The same is true for an interlayer insulator film provided between wire 18b, connected to drain electrode 17b of the other high breakdown voltage NMOSFET 12b shown in FIG. 10, and second semiconductor substrate 23. Moreover, the same is also true about a part for the upper arm of the V-phase and a part for the upper arm of the W-phase that have the same arrangement as that of the above-described part for the upper arm of the U-phase.
The inventors previously reported that use of a self-shielding technique eliminates the structure, in which a wire at a high electric potential traverses over a substrate at the ground (GND) level with an insulator in between, to thereby make it possible to actualize an IC with a high breakdown voltage of 1000V or more (see Fujihira et al., "Self-shielding: New High-Voltage Inter-Connection Technique for HVICs," Proc. 8th Int. Symp. Power Semiconductor Devices and ICs, Maui, 1996, IEEE (1996), pp 231–234). Various proposals are presented about the self-shielding technique (see, for example, Japanese Patent No.3,214,818, JP-A-9-55498 and U.S. Pat. No. 6,124,628).
FIG. 12 is a plan view schematically showing an arrangement of a principal part for an upper arm of the U-phase in a related inverter device in which the self-shielding technique is applied to a multi-chip arrangement. As shown in FIG. 12, control circuit 11, output stage element 15 and driving circuit 16 are formed into high breakdown voltage IC chip 31. IGBT 32 and FWD 33 are formed into their respective chips different from high breakdown voltage IC chip 31.
Output stage element 15 and driving circuit 16 are formed in a region surrounded by high breakdown voltage junction terminating structure 34 made up of a loop-like RESURF structure in high breakdown voltage IC chip 31. Output stage element 15 is electrically connected to gate electrode 35 and emitter electrode 36 of IGBT 32 through bonding wires 37 and 38, respectively.
FIG. 13 is a vertical cross sectional view taken on line H–H′ in FIG. 12, which view shows a cross sectional structure of high breakdown voltage NMOSFET 12a as a level shift element. As shown in FIG. 13, drain electrode 17a of high breakdown voltage NMOSFET 12a is formed at one end of high breakdown voltage junction terminating structure 34. At the other end of high breakdown voltage junction terminating structure 34, gate electrode 25 and source electrodes 26a and 26b of high breakdown voltage NMOSFET 12a are formed. A cross sectional structure of the other high breakdown voltage NMOSFET 12b is the same as that shown in FIG. 13. A structure of a part for the upper arm of the V-phase and a structure of a part for the upper arm of the W-phase are the same as the structure of the part for the upper arm of the U-phase.
As explained above, in the related one-chip inverter, thick interlayer insulator film 30 is necessary between high voltage wire 18a and second semiconductor substrate 23. However, there is a limit to the thickness of the insulator film such as an oxide film that can be formed on the substrate in respect to manufacturing cost. The thickness of an interlayer insulator film put to practical use under the present situation is of the order of 6 μm in a one-chip inverter with a 600V breakdown voltage. Compared with this, realization of a one-chip inverter of 1200V breakdown voltage class with the same structure as that of one with the 600V breakdown voltage necessitates that the interlayer insulator film under the high voltage wire be formed with a thickness exceeding 10 μm for ensuring high reliability. This makes it difficult to produce the chips at low cost.
The present invention was made in view of the above problem with an object of providing a high breakdown voltage semiconductor device at low cost in which device power elements and a driving circuit for driving the elements are integrated together in the same chip. A semiconductor device in which logic elements for controlling the power elements are also integrated together in the above chip. The present invention is directed to overcoming, or at least reducing, the effects of one or more of the problems set forth above.

Fuji Electric Device Technology Co., Ltd.


A portion of a hearing instrument housing or shell comprises one or more chambers having planar, conical, or convex walls. During assembly, this shape helps guide the receiver tube towards tip of the shell and the receiver tube hole. Additionally, it will reinforce the walls of the shell, decreasing the tendency of the shell to vibrate when the receiver is generating sound.

Hearing instruments, i.e., devices that assist the hearing impaired, designed for complete or partial insertion into the user's ear canal, have a shell or housing that holds various components. One such component is the receiver, the element that generates the sound heard by the instrument's user. The sound is carried from the receiver by a receiver tube affixed to a port on the receiver to an opening (the receiver tube hole) in the tip of the shell, the portion of the hearing instrument positioned in the ear canal towards the eardrum.
During assembly, the receiver and its receiver tube are inserted into the shell, receiver tube first, and the tube is passed through the receiver tube hole. Once the receiver is in place inside the shell, anchored by a support, any excess portion of the receiver tube protruding from the shell is removed.
During assembly, the receiver tube is inserted into the shell and aimed towards the receiver tube hole. Occasionally, the end of the tube misses the receiver tube hole and catches on the inside of the shell. In that instance, the receiver tube must be pulled out and reinserted in an attempt to pass the tube through the receiver hole.
An Improved Configuration for the Inside of the Shell
The problem mentioned above may be minimized by providing an inwardly-sloping contour inside the shell of the hearing instrument. In particular, the interior of at least a portion of the shell comprises a chamber having planar or conical surfaces or inwardly curving or convex surfaces that guide the receiver tube towards the tip of the shell and the receiver tube hole.
Depending on the size and length of the hearing instrument, the shell may contain more than one such chamber. For example, where there are two chambers, the receiver tube is inserted into and through the first chamber and the tube then passes through an optional interconnecting passage and into and through the second chamber. A stopper having dimensions greater than the interconnecting passage may be provided on the receiver tube. When the stopper meets the end of the first chamber, the tube will not travel further into the shell, fixing the location of the receiver in the shell. A stopper may also be provided for a shell having a single chamber.
The design discussed here will improve the assembly process. An additional benefit achieved by the configurations discussed here is that walls of the shell are reinforced, reducing any tendency of the walls to vibrate.


A system and method for determining a clock rate of a digital phase lock loop is disclosed. The system includes a first input to receive a first clock signal, an output to provide a second clock signal, and a dividerless initial clock rate determination module to calculate an initial clock rate value based on an reciprocal of a pulse length of the first clock signal. In a particular embodiment, the dividerless initial clock rate determination module performs a piecewise linear operation to calculate the initial clock rate value.

Sample rate converters are used in a variety of applications. In a television tuner, sample rate converters may be used to synchronize various input and output signals so that those signals may be processed by the tuner. The sample rate converters adjust the sample rate of the various input and output signals to a common sample rate.
In order to adjust the sample rate of the input and output signals, a digital phase lock loop may be used to generate a clock signal for the sample rate converter. The digital phase lock loop may generate the clock signal by synchronizing an external clock to a system clock. Typically, the digital phase lock loop is initialized with a starting clock rate that may be generated by digital logic. However, the digital logic used to generate the starting clock rate often includes complex computational hardware units and often consumes valuable circuit space and system power. Accordingly, there is a need for an improved system and method to generate an initial clock rate for a digital phase lock loop.


A method of managing video programs and associated program components on a storage unit of an electronic device is provided. A total number of playbacks of each video program stored in the storage unit and a total number of playbacks of each program component stored in the storage unit for each of the video programs are tracked. A percentage of playbacks of each program component stored on the storage unit relative to the total number of playbacks of its corresponding video program is determined. From this, candidates of program components for deletion from the storage unit are identified based on the values of the determined percentages. The tracking, determining and identifying steps of the method are performed by electronic components of the electronic device. A device is also disclosed.

Digital Video Recorders (DVRs) and like consumer electronic devices used in connection with the storage or playback of video programs, such as television shows, movies, and the like, may have a pre-determined and pre-defined amount of storage capacity or memory for use in storing a given amount of video or multimedia program data and associated data or files and the like. Such data may be obtained via various media delivery systems such as transport streams (TS) via Internet Protocol TV (IP-TV), video-on-demand (VOD), and like services provided via network connections, subscriptions and the like or via connection or communication with other devices. The above systems may enable a user or subscriber to record or save a video or multi-media program or like content in storage as electronic data so that the program may be played and viewed at a later time at the viewer's convenience.
Simply for purposes of example, and not by way of limitation, a typical electronic device such as DVR may have a pre-determined amount of internal storage capacity or memory sufficient to store numerous different video programstotaling several to several tens of hours or more of content. Of course, different electronic devices may be designed and manufactured to have more or less storage capacity/memory. Nonetheless, such electronic devices will have a pre-determined and finite amount of storage capacity and will be expected to become or closely approach full capacity at some point in time during normal use.
Further, when a DVR or like device records a video program, for instance via a network connection to a service provider, the DVR will typically automatically record an entire transport stream (TS) associated with the video program. Thus, the video program and all associated content are typically packaged as a single program on a single transport stream (SPTS) with different associated contents identified with different program identification numbers (PIDs). As technology advances, the contents of such video programs are becoming increasing more data intensive and complex having a greater number of associated components. For instance, a video program or component provided in high definition (HD) will require significantly more storage space than regular definition programs and components. Thus, the repository systems of DVRs and like consumer electronic devices for these recordings are also necessarily being provided with expanded memory to handle this greater amount of data.
In addition, it is not only the format (i.e., HD) of the video content that is increasingly becoming more intensive, but also the content with respect to the plurality of associated information. Simply by way of example, and not by way of limitation, the associated information for a video program may include many different language audios, subtitle and/or closed caption information, several different camera angles, different director's cuts/specials, commentary and alternative targeted content. Accordingly, when a user desires playback of such a recording, specific components of the TS or SPTS can be parsed together and presented to the user based on user choice, for instance, audio language, camera angle, and the like. A consequence of recording the entire TS or SPTS is that the recording of this data requires a greater amount of memory or storage space and, if some of the program components of a particular video program are never or only very frequently presented for viewing, such unused components take up storage space thereby limiting space available for additional or future recordings of other video programs.
Thus, regardless of the amount of storage capacity of a DVR or like consumer electronic device, it will likely eventually become full or close to full having recordings of many different programs and associated content having been collected over a period of time. The status of available storage capacity or memory is generally unknown to the user or users of a DVR and is only made known to the user when the DVR or like device provides a prompt or indication to the user with respect to deleting at least some of the currently stored content to make a sufficient amount of memory available for the recording of additional content.
A traditional solution with respect to freeing-up storage space includes providing a list of content to the user so that the oldest dated content is offered to the user as a first possibility for deletion. This typically only occurs when there is lack of space for new content to be recorded. Such memory management systems typically enable the user to mark or lock some content that is not desired for deletion so that the selected content cannot be accidentally deleted. As another alternative, when a DVR runs out of storage space for new recordings, the user may be able to manually browse through a list of the recorded content based on categories and genre folders or the like and manually mark content for deletion.
A problem with the above described techniques for managing recordings is that as the storage capacity of the DVR is increased and the total number and content of files on the DVR increases, it becomes increasing more difficult for the user to route through, remember, and decide which content is to be deleted to make room for new content to be recorded. Accordingly, there is a need for a method, apparatus and system which aid a user in readily and quickly deciding which recorded content among a large amount of content items is to be deleted to free a sufficient amount of memory.

Method and device for optimizing storage of recorded video programs


A method and an apparatus provide targeted guidance for a user to locate and trace-out the path of a buried electrical cable, and to locate a cable fault along the cable. A current pulse is applied to the cable, whereby a magnetic field is generated around the cable and an acoustic signal is emitted from the cable fault. The apparatus detects and measures magnetic field information to locate the cable. The apparatus measures a time delay between detecting the magnetic signal and detecting the acoustic signal. By comparing successive time delays at successive measuring positions, a relative proximity to the cable fault is determined. The cable location information and the cable fault distance information are combined to produce a direction indication for the user. Tracing the cable layout and determining the cable fault location can be carried out in a single procedure using a single apparatus.

In the field of locating a cable fault in an underground or other buried cable, it is known to locate the fault using a ground microphone, whereby the user has no initial information about the position of the sensor over the cable or conductor line and no information about the position of the fault. In order to find the location of the fault, the user of the device gradually approaches closer to the fault by making successive measurements, in a "trial and error" process, namely in that the user successively moves the ground microphone to successive measurement positions, and then determines and compares successive coincidence measurement values at the successive measurement positions. The coincidence measurement value represents the time difference between the arrival of the magnetic field pulse that is generated around the cable by an electrical pulse fed into the cable, and the acoustic pulse that is generated by a sparking arc or flash-over or the like at the cable fault due to the electrical pulse in the cable. If the coincidence measurement values become smaller from one measuring position to the next, then the user knows that he is getting closer to the cable fault. On the other hand, if the coincidence measurement values become larger, then the user knows that he is moving farther away from the cable fault.
In the above known process using the known equipment, it is problematic that the user has no information about the actual position and layout of the cable itself. Thus, the user might move transversely to the cable line from one measuring position to the next, or inadvertently move away from the path or layout of the cable, for example especially where the cable makes a curve. In such a case, the user thus obtains larger difference measured values, which suggest to him, that he is moving farther away from the cable fault location. However, these measurements and the resulting measured values are faulty, because of the progressive motion to successive measuring positions relative to the unknown position and layout of the cable.
To avoid the above problem, it is known to trace out the position and layout of the cable in a previous process by means of an acoustic frequency transmitting and receiving system. Thereby, the user first determines the position and layout of the underground or other buried cable, and records or marks the cable position and layout for later reference when subsequently carrying out the separate cable fault locating process as described above.
Thus, for locating the cable fault, it is generally necessary to carry out two successive time-consuming measuring processes one after the other, namely first locating and tracing out the location and the layout of the cable itself, and thereafter performing the actual cable fault locating process. This is time consuming and requires two distinct sets of equipment, and therefore becomes expensive and cumbersome.

Method and apparatus for target-guided localizing of a cable fault


A multiferroic material for magnetic and electric switching including Iron selenide (Fe3Se4) nanoparticles and its derivatives or doped with at least one element selected from transitional metals, rare earths elements or combination of the two and chalcogens. Ferroelectric polarization and coupling of magnetic and ferroelectric behavior in the doped Fe3Se4 is observed at a temperature ranging from 15 to 30° C.

Ferroic properties such as magnetic and ferroelectric ordering and the development of electronic materials based on these properties permeate a broad range of technologies (defense, consumer electronics, space, energy and health care etc). The interest in finding materials with more than one ferroic properties coexisting at room temperature in a single-phase material is quite challenging. Such materials are termed as multiferroics. The existence of coupling between magnetic and ferroelectric ordering is termed as magnetoelectric coupling. In such a material, the application of an external magnetic field can generate or influence preexisting electrical polarization, whereas the applied electric field can influence the magnetic polarization. The multiferroic materials have a wide range of applications in information storage, satellite communications, microwave field, precision control, spin electronic devices, circuit measurement of high voltage transmission lines, magnetic sensors and capacitors—inductors integrated field-effect devices and other aspects. In addition, these materials also have great significance in terms of fundamental physics research. Currently, the multiferroic material has become a very important functional material, attracting the attention of materials scientists.
Multiferroics are the compounds, which contain two or more ferroic orders out of polarization, magnetization and elasticity in the same phase. The search for these compounds has engaged the research towards hundreds of materials containing rare-earth ferrites, manganites, chromites, nicklates and many more among the composite materials. However, for any technical applications of these materials, room temperature functionality and strong coupling with the ferroic order-parameters is crucial. The technical challenges associated with most of the compounds are following: very low magnetic transition temperature, small polarization values and week coupling between them. Lately, there were reports on the unconventional multiferroics where mechanisms were discussed for the origin of ferroelectricity in centrosymmetric materials based on charge ordering and bond ordering. A magnetoelectric is a generic name for the material, which exhibits significant mutual coupling between its magnetic and electronic properties. Especially important group in this category are multiferroics, which simultaneously demonstrate ferroelectricity and ferromagnetism. Although there exist few examples of single-phase multiferroics, the multiferroic composites with superior magnetoelectric parameters are much more attractive for applications. These composites consist of mechanically coupled ferroelectric and ferromagnetic phases. The conversion of magnetic to electric energy takes advantage of piezoelectric (or more general electrostrictive) properties of the ferroelectric phase and piezomagnetic (or magnetostrictive) properties of the ferromagnetic phase.
Recently, high temperature multiferroicity was predicted in BaFe2Se3 phase, which was quite unexpected. Later, it was shown experimentally with the help of photoemission spectroscopy that two kinds of electrons (localized and itinerant) coexist in BaFe2Se3 phase [Phys. Rev. Lett., (2014), 113, 187204].
Article titled "Structural, magnetic, and electronic properties of iron selenide Fe6-7Se8 nanoparticles obtained by thermal decomposition in high-temperature organic solvents" by Lyubutin I S et al. published in The Journal Of Chemical Physics, 2014, 141(4):044704 reports iron selenide nanoparticles with the NiAs-like crystal structure synthesized by thermal decomposition of iron chloride and selenium powder in a high-temperature organic solvent. Depending on the time of the compound processing at 340° C., the nanocrystals with monoclinic (M)-Fe3Se4 or hexagonal (H)-Fe7Se8 structures as well as a mixture of these two phases was obtained. In addition, an unusual effect of "switching" of magnetization in a field of 10 kOe was found in the Fe3Se4 nanoparticles below 280 K, which can be important for applications.
Article titled "Observation of enhanced dielectric coupling and room-temperature ferromagnetism in chemically synthesized BiFeO3@SiO2 core-shell particles" by Mandar M. Shirolkar et al. published in Journal of Physical Chemistry C, 2012, 116 (36), pp 19503-19511 reports the effect of SiO2 coating on the structural, magnetic, and dielectric properties of chemically synthesized high-purity BiFeO3 particles. The as-synthesized BiFeO3 particles demonstrate properties comparable with those reported for bulk BiFeO3. On the other hand, the structural measurement on BiFeO3@SiO2 shows that the SiO2 coating has anisotropically compressed the lattice of BiFeO3 particles and stimulates the variation in the electron density. This affects magnetic and dielectric behaviour of material. Frequency-dependent dielectric constant study at low temperature (20-325 K) revealed slight reduction (8-10%) in the dielectric constant of BiFeO3@SiO2 particles compared to uncoated BiFeO3 particles.
Article titled "Structure, magnetic and dielectric properties of nanocrystalline Se-xFe" by Karimat El-sayed et al. published in Superlattices and Microstructures, 2014, 75 (2014) 311-323 reports nanocrystalline Se-xFe (x=3 and 5 wt %) samples were prepared by solid state reaction. XRD revealed the presence of two phases; FeSe2 and Se. HRTEM showed the epitaxial growth of FeSe2 on Se. The magnetization measurements showed ferromagnetic behavior above room temperature for sample with x=5 wt %. The a. c conductivity for x=3 wt % follows the overlapping large polaron tunneling model, while for (x=5 wt %) sample it follows the correlated barrier hoping model. The temperature dependence of the dielectric measurements revealed an anomaly above room temperature for (x=5 wt %) sample, while it appeared at room temperature for (x=3 wt %) sample.
Article titled "Room temperature ferroelectric, ferromagnetic and magnetoelectric properties of Ba-doped BiFeO3 thin films" by Meiya Li et al. published in Journal of Physics D: Applied Physics, Volume 40, Number 6 reports Ba-doped multiferroic BiFeO3 thin films were successfully prepared on Pt/TiO2/SiO2/Si(100) substrates by pulsed laser deposition. X-ray diffraction showed that the Bi0.75Ba0.25FeO3 thin film was single phase with (101) preferential polycrystalline orientation. Both ferroelectricity and ferromagnetism of these films were observed at room temperature by P-E and M-H loop measurements, respectively. The magnetoelectric coupling effect was demonstrated by measuring the dielectric constant in a varying magnetic field. The dielectric constants measured at 10 kHz increased with an increase in the applied magnetic field, giving a coupling coefficient (εr (H)−εr (0))/εr (0) of 1.1% at H=8 kOe at room temperature, which shows potential application.
Article titled "Room Temperature Nanoscale Ferroelectricity in Magnetoelectric GaFeO3 Epitaxial Thin Films" by Somdutta Mukherjee et al. published in Physical Review Letter, 2013, 111, 087601 reports room temperature ferroelectricity in the epitaxial thin films of magnetoelectric gallium ferrite. Piezoforce measurements show a 180° phase shift of piezoresponse upon switching the electric field indicating nanoscale ferroelectricity in the thin films. Further, temperature-dependent impedance analysis with and without the presence of an external magnetic field clearly reveals a pronounced magnetodielectric effect across the magnetic transition temperature. In addition, our first principles calculations show that Fe ions are not only responsible for ferrimagnetism as observed earlier but also give rise to the observed ferroelectricity, making gallium ferrite a unique single phase multiferroic.
Article titled "Room temperature ferroelectric and magnetic investigations and detailed phase analysis of Aurivillius phase Bi5Ti3Fe0.7Co0.3O15 thin films" by Keeney, Lynette et al. published in Journal of Applied Physics, v. 112(5); p. 052010-052010.10 reports Aurivillius phase Bi5Ti3Fe0.7Co0.3O15 (BTF7C3O) thin films on α-quartz substrates were fabricated by a chemical solution deposition method and the room temperature ferroelectric and magnetic properties of this candidate multiferroic were compared with those of thin films of Mn3+ substituted, Bi5Ti3Fe0.7Mn0.3O15 (BTF7M3O).
Article titled "Electrical properties of Fe7Se8, Fe3Se4, and NiFe2Se4 single crystals" by N. R. Akhmedov et al. published in Physica Status Solidi (a) 20(1) ⋅ November 1973 reports Electrical properties of Fe7Se8, Fe3Se4, and NiFe2Se4 single crystals.
Article titled, "Observation of magnetoelectric behavior at room temperature in Pb(Fe1-xTix)O3" by V. R. Palkar in Materials Science reports the coexistence of ferroelectric and ferromagnetic properties at room temperature is very rarely observed. We have been successful in converting ferroelectric PbTiO3 into a magnetoelectric material by partly substituting Fe at the Ti site. The Pb(Fe1-xTix)O3 system exhibits ferroelectric and ferromagnetic ordering at room temperature. Even more remarkably, our results demonstrate a coupling between the two order parameters. Hence it could be a futuristic material to provide cost effective and simple path for designing novel electromagnetic devices.
Article titled "Large Increase in the Energy Product of Fe3Se4 by Fe-Site Doping" by Pankaj Poddar et al. published in The Journal of Physical Chemistry, C, 2014, 118, 4016-4022 reports synthesis of Fe3-xMnxSe4 (x=0.01-0.2) nanorods. As required for practical applications, after doping, the Curie temperature remains unchanged; however, at optimum (x=0.03) doping of manganese ions, the magnetization of the host matrix increases significantly from 4.84 to 7.54 emu/g. The corresponding energy product value was found to be increased by more than 130%. At low temperature (10 K) the energy product shows almost a 2 order of magnitude increase (˜0.12 MG Oe), which makes it valuable for many low temperature applications. This improvement is a vital step for its use in some of the household applications where a large volume and relatively lower energy product are needed.
Article titled "Ferromagnetic ordering in nanostructured Mn-doped InP" by P. Poddar et al. published in Applied Physics Letters, 2005, 87, 062506 reports the observation of ferromagnetic ordering at 25 K in a diluted magnetic semiconductor DMS nanoparticle system: In0.9Mn0.1P, sized 3 nm. These particles were synthesized using a novel nanochemical technique without using any external surfactant. Structural and elemental characterizations established the occurrence of the zinc-blend phase of the DMS without any separate or induced impurity phase. A robust onset of ferromagnetic order is observed in magnetization measurements at around 25 K with blocked state behavior below 15 K characteristic of magnetic nanoparticles. The system shows strong frequency dependence of the susceptibility, similar to the behavior observed for spin glasses. Reversible transverse susceptibility experiments done using a resonant radio-frequency (rf) method reveal a strong temperature-dependent effective anisotropy.
Article titled "Multiferroics: different ways to combine magnetism and ferroelectricity" by D. I. Khomskii published in Journal of Magnetism and Magnetic Materials reports Multiferroics—materials which are simultaneously (ferro)magnetic and ferroelectric, and often also ferroelastic, attract now considerable attention, both because of the interesting physics involved and as they promise important practical applications. In this a survey of microscopic factors determining the coexistence of these properties, and discuss different possible routes to combine them in one material. In particular the role of the occupation of d-states in transition metal perovskites is discussed, possible role of spiral magnetic structures is stressed and the novel mechanism of ferroelectricity in magnetic systems due to combination of site-centered and bond-centered charge ordering is presented. Microscopic nature of multiferroic behaviour in several particular materials, including magnetite Fe3O4, is discussed.
In recent years, iron selenide Fe—Se compounds have attracted a great deal of interest because of promising application in peculiar electronic, optical, and magnetic devices. Room temperature multiferroic materials are technologically promising because of their applications in high-density memory storage, sensors and actuators. Till now, only very few materials show these properties at room temperature and the properties are very weak in nature. The Fe3Se4 has also gained attention quite recently because of its high uniaxial magnetic anisotropy constant without the presence of any rare earth metal or noble metal atom leading to very high coercivity at room temperature (˜4 kOe).
There are only 32 space groups, which show spontaneous and reversible polarization, i.e ferroelectricity. At room temperature, the coexistence of both ferroelectric and magnetic polarization in a single-phase material is scarcer. Fe3Se4 is ferrimagnetic at room temperature with Curie temperature 323 K. But there is no report in literature about the dielectric properties of this material till date. Therefore, the research and development of new multiferroic materials have great significance in theory and practical application.
The main object of the present invention is to provide a multiferroic material comprising Fe3Se4 nanoparticles and its various derivatives characterized in that ferroelectric polarization in Fe3Se4 and coupling of magnetic and ferroelectric behavior is observed at room temperature.
Another object of the present invention is to provide a multiferroic material comprising Fe3Se4 nanoparticles doped with at least one element selected from transitional metals, rare earths elements and chalcogens.
Yet another object of the present invention is to provide use of iron selenide alone or doped with at least one element selected from transitional metal, rare earths and chalcogens for magnetic and electric switching at room temperature.

Room-temperature ferromagnetic-ferroelectric multiferroic material


A pH analyzer is operated to measure conductivity of a solution by applying a substantially DC current having peak values, IREFxe2x88x92PEAK, to a reference electrode of an ion-sensitive sensor having an ion-specific electrode in contact with the solution. The reference electrode is coupled to the ion-specific electrode through the solution. The peak voltage, VIONxe2x88x92PEAK, between the ion-specific electrode and the common electrode is measured, and the conductivity of the solution is identified based on       C    SOL    =                    I                  REF          -          PEAK                            V                  ION          -          PEAK                      .

This invention relates to conductivity measurement, and particularly to a process of measuring conductivity of a fluid using a pH analyzer.
Conductivity measuring analyzers are well known in the art and are used to measure the conductivity of a fluid, such as a liquid or dispersion of solids in a liquid. Conductivity analyzers are used to investigate the properties of electrolyte solutions, such as the degree of disassociation, the formation of chemical complexes and hydrolysis. A contact conductivity sensor employs a pair of electrodes in contact with the electrolyte solution. The measurement circuit supplies a voltage to the electrodes that such that the resulting current between the electrodes is used to measure conductivity. More specifically, the sensor provides an output current that is a measurement of the conductivity of the solution, which is the inverse of resistivity.
In many industrial process control systems, it is necessary to measure both the conductivity of a solution, as well as its pH. Ordinarily, an ion-sensitive sensor, such as a pH sensor, and a separate conductivity sensor, are employed in the process control system. In some cases, however, a conductivity sensor is simply not available. For example, certain maintenance and diagnostic operations may require conductivity measurements that might not be needed in normal operation of the process control system. In other cases, the ion-sensitive sensor and conductivity sensor might not share the same measurement circuit, and may require separate electrical control loops, which can be expensive and difficult to retrofit into existing systems. The present invention is directed to the problem of measuring conductivity of a fluid in the absence of a conductivity sensor, and particularly to a method of operating an ion-sensitive sensor to measure conductivity of a fluid, so that the analyzer may be operated as both a pH analyzer and a conductivity analyzer.
According to the present invention, an analyzer is operated to measure conductivity of a solution. A current, IREF, is applied to the reference electrode of an ion-sensitive sensor having an ion-specific electrode. The current is a substantially constant current having first and second opposite states of substantially equal value. A peak-to-peak voltage, VION, between the ion-specific electrode and a common electrode is measured, and the conductivity of the solution, CSOL, is identified based on       C    SOL    =                    I        REF                    V        ION              .
According to another aspect of the present invention, the analyzer operates the ion-sensitive sensor to measure pH of the sample solution and operates the ion-sensitive sensor to measure conductivity of the solution. More particularly, an average voltage, VIONxe2x88x92AVE, is measured between the ion-specific electrode and the common electrode and an average voltage, VREFxe2x88x92AVE, is measured between the reference electrode and the common electrode. The pH of the solution is identified based on a difference between the measured average voltages VIONxe2x88x92AVE and VREFxe2x88x92AVE.
According to different embodiments of this aspect of the invention, pH measurement may be accomplished simultaneously with conductivity measurement, or during mutually exclusive cycles.

Process of measuring conductivity using a pH analyzer


A continuous manufacturing system is provided for producing an intermediate web assembly having a series of regularly occurring preprinted segments that are disposed on a surface of the web. The segments are initially produced in a sheet form which is prepared by rendering high quality images in discrete areas representative of the portions to be subsequently separated to form the segments. The individual segments are cut from the sheet and then are provided to a placer mechanism that sequentially places the segments individually on the web to create an intermittently laminated web assembly.

There are wide varieties of product offerings available in the market today that serve multiple purposes and functions, including product offerings that are used in fulfilling the needs of particular market segments such as in the prime label market and other business communication assemblies that are used to convey or handle information.
Printed products, such as pieces that are intended to be used in business communications, can be delivered in a wide variety of formats, constructions and configurations. Normally, one of the most significant limiting factors for a manufacturer being able to produce a particular construction or expand product capabilities is the equipment the manufacturer has on hand to generate such printed pieces.
Traditional manufacturers of business communications, such as business forms and labels, are also usually limited in the type of jobs that a manufacturer will accept based on size of the job, or more particularly the order quantity or value of the order. That is, due to cost factors, a customer will not place an order with a manufacturer for a small to medium sized piece quantity as the set up or make ready of the job makes the order cost prohibitive, even assuming that the manufacturer would accept the order if a particular price could be obtained to justify production.
The foregoing difficulty is largely based on conventional manufacturing techniques that normally utilize webs of material that are successively printed or otherwise treated in order to produce a finished product assembly. As such, small to medium sized runs of product are generally not adaptable to this type of manufacture due to the amount of material (length of a web) that must be used in order to prepare a particular job and manufacture the product in a cost effective manner.
Such conventional manufacturers have normally produced product runs that range in the hundreds of thousands to millions or even tens of millions of pieces for a single order. As such, the equipment that is used to produce this level or quantity of product is then set up to handle only large manufacturing runs. The apparatus used in this type of fulfillment will normally only operate efficiently in this higher range of production quantities and often cannot be reconfigured. Thus, even if a manufacturer wished to pursue smaller runs or orders sizes, the manufacturer is faced with the dilemma of making new capital expenditures to purchase equipment that specializes in this type of application not to mention having to retrain existing personnel or hire and train new employees to generate this type of production activity.
Another drawback facing conventional manufacturers of business communication products is that in addition to the possibility of retooling the production infrastructure, the producers may also need to seek out new sales channels and distributors for products that fall within the smaller production run niche as the conventional sales channels are likely still focusing on procuring orders for larger production runs.
A still further drawback of trying to migrate to smaller customer applications relates to quality of the pieces that need to be generated. With the focus of the market slowly shifting to smaller runs, the end user is now demanding a greater image quality than that typically associated with conventionally printed products. It is believed that the reason for such far reaching changes is that budgets for marketing and business communications have been cut back in recent years and as such, end users want more from each piece that is produced rather than relying on the quantity of pieces to generate the desired result.
Conventional processes that are used today, for example, in creating business communication pieces, such as prime labels and other pressure sensitive label configurations, are typically based on a continuous web technology that uses flexographic presses. The process includes the feeding of a continuous web of material, such as a preformed web of pressure sensitive laminate which normally consists of a top ply having a layer of adhesive on its underside that is covered by a release liner to form the laminate assembly through the press. The web is then processed through a press, typically a flexographic press, and an image is applied to the web by various stations. The web may then be collected, die-cut and the individual labels removed and applied.
Flexography is commonly used today for the printing of decorative items including the rendering of packaging and employs a series of plates and one or more stations, containing inks, to apply colored images to the web as the web traverses the press. Through improvements in ink qualities and other modifications and enhancements in the technology, the image quality in flexographic presses and resulting products has improved to about 150 lines per inch.
Typically, for a point of reference, screens that have rulings of about 60 to 100 lines per inch are normally used to make halftone printed images for newspapers. Screens with about 120 to 150 lines per inch are commonly used today to produce images for magazines and commercial printing. Such screens are regularly produced by electronic dot generation.
Electronic dot generation is normally performed by computers that use unique screening algorithms in cooperation with electronic scanners and image setters to produce halftone images that are to be subsequently used to render an image. The pixels of digitized images are first assembled into dots that are then used to form shapes, sizes, rulings, etc. which create the ultimate image produced on the substrate.
While flexographic technology or flexography is desirable for use in such printing due to the economies that can be achieved when compared with other types of printing processes, such as lithography, there are a number of drawbacks in utilizing this process for certain applications. Initially, the quality is limited, despite improvements in the technology to about 150 lines per inch. This can make some complicated graphics appear "grainy". Other images, such as those that use flesh tones or deep or rich colors, may look faded or "washed out". The effects of this level of image resolution can detract from the product appearance which may diminish the value of the technology and the products produced particularly for the prime label market. With increasing sophistication of consumers, as well as technology and expectations from each, such effects may be undesirable to potential end users.
Flexography also suffers from other drawbacks, such as the time that is involved in preparing a production job to run or "make ready" as it may otherwise be known in the industry. That is, the steps that are used to prepare the flexography equipment for running a particular job or order. This "make ready" process includes such activity as the preparation of multiple plates to produce the image at each station, mixing inks, calibration and alignment of the images between stations and the like. Operation of the flexography presses may also include multiple operators which can add to manufacturing costs. In addition, waste can also be a problem with such conventional printing technologies in that a number of feet, yards or meters of web material must be processed through the press in order to have the colors reach a predetermined threshold and to ensure appropriate registry of the stations as they are printing the images on the web. The amount of material wasted can be several times the length of the press or up to several hundred feet of material. The use of such volumes of materials obviously increases the cost of the operation. Thus, due to the make ready process and waste factors, the production of products (e.g. prime labels) through the use of flexography may then be limited to serving only certain market segments, namely large market segments. Markets that are applicable for this technology segment are generally believed to be those orders for large quantities of several hundred thousand or millions of pieces, which potentially leaves the smaller label market, e.g. 100 to 1,000,000 labels, unfulfilled or at least not adequately served by currently available technologies due to cost and materials thresholds.
Another drawback believed to be associated with flexographic technologies is that the technology cannot provide any variability in the product, including such basic functionality as sequential numbering, addressing or adding promotional text in connection with a seasonal advertisement or other offering without the addition of further processing stations. If such features are required by an end user or customer, such as with product date or coding, this function generally cannot be performed by flexographic presses without the inclusion of additional stations. Instead, these features typically must be achieved through an off line operation, such as ink jetting, often after the label has been applied to the container or carton. Alternatively, the ink jetting may be performed directly on the container as part of a separate operation.
Flexographic presses normally have a number of pre-determined stations. For example a four color press may have only four stations that can be used to treat or process the web. Thus, if other stations are to be added, such as a numbering head, the manufacturer likely then has to reduce the number of colors that can be added to the web as one station has been surrendered for the numbering head.
Flexographic technology also limits the ability to add personalization to products produced on such presses. This may be particularly desirable in certain market segments where such prime label products on consumer package goods ("CPG") may further enhance the product or service offering by making the product more attractive to prospective purchasers, thereby increasing the appeal to the consumer of the product or service.
Identifiers such as labels, business cards or tags may also be readily rendered using desktop equipment. While the resolution may be slightly improved when compared with conventional flexographic technology, speeds of application are significantly reduced as the images are processed in a sheet wise fashion on desktop equipment. This results in only a few sheets per minute being produced as opposed to hundreds of feet per minute that are commonly capable of being processed by flexographic equipment. That is, the desktop unit may only handle and print one sheet at a time before the next sheet is advanced for printing or imaging when compared with a conventional web fed process which produces sheets at a faster rate. Thus, in using such a desktop process one may only be able to render a handful of sheets per minute as opposed to a flexography operation that may process several hundred feet per minute. Use of desktop processes is thus not likely efficient in trying to generate hundreds and certainly not thousands of labels, but may be useful in creating a few dozen labels for very small applications such as a small home or small office environment.
What is needed, therefore, is a continuous production system by which high quality graphics provided in a sheet wise environment can be used to create products for a number of distinct applications in an endless manufacturing system. For example, graphics having a resolution in excess of about 150 lines per inch can be produced in an efficient and cost effective manner, such as in a continuous system operating at greater than fifty feet per minute. Moreover, a system which can add substantial variability to the product as well as other features, such as embossments, over laminates, variable printing or imaging and the like, would greatly expand the penetration of this form of business communication in the marketplace. The present invention seeks to provide a system for producing an intermediate assembly that is capable of having a number of different surface configurations, e.g. labels, cards, tags, plastics, films and the like. The surface configurations, which will consist of a series of discrete individual elements will each have printing or imaging that includes graphical or resolution quality of about 150 or more lines per inch and preferably more than 300 lines per inch, which is approximately equal to about 2500 to 3500 dots per inch ("DPI") in order to create a high quality image product that is intended to be aesthetically appealing to the consumer and to more effectively communicate the business message of the application.

System for producing pressure sensitive intermediate web assembly having regularly occurring discontinuous segments produced in a continuous fashion


A knee joint prosthesis includes two guide faces for receiving the condyles of a distal femur. The prosthesis includes a tibial plateau of polyethylene which is embedded in a metal tibial shank with a plate. The underside of the plate is planar and bears against a resection area of the tibia shaped as a planar endface. On the inside of the plate, in the region of the guide faces, pockets are formed. The pockets follow the curvature of the guide faces in sagittal planes and exhibit at their lowest point a maximum wall thickness of 1.5 mm, while the minimum wall thickness of the tibial plateau resting in the pockets amounts to 6.5 mm.

The invention relates to a knee joint prosthesis generally. More particularly, the invention relates to a prosthesis having a tibial plateau which is embedded by a plate in a metal tibial shank and exhibits two guide faces for the condyles of the distal femur, while the plate bears in the direction of the axis of the shank against a prepared endface of the tibia.
U.S. Pat. No. 4,568,348 discloses a knee joint prosthesis having a conical plate and a conical underpart of the tibial plateau. One problem of knee joint prostheses of that kind is that a relatively large amount of sound bone material must be removed in order to insert the prosthesis. Moreover conical anchoring areas which do not have axial symmetry are difficult to produce so that they are accurate in shape and stand at the correct height and angular position to the longitudinal axis of the tibia.