A method of testing a memory array is disclosed, the method comprising writing a test pattern to the memory array in as few as one or two RAS cycles by first activating the input/output data lines and then selectively activating multiple rows and columns. The method can be used with a variety of test environments. For example, the disclosed method may be implemented in testing using automated test equipment, and may also be incorporated in devices having built-in self-test circuitry. The disclosed method reduces the time required to test the memory array with minimal additional circuitry and no encroachment on valuable die real estate.

A typical memory array is constructed of multiple memory cells arranged in a matrix of columns and rows which are respectively correlated to bit lines and word lines. Each individual memory cell is located at the intersection of a particular word line and bit line. The memory cell is accessed by referencing that location or address. Each memory cell can hold one of two values, a "1" or a "0". After a memory array is manufactured it must be tested in order to identify which memory cells, if any, are defective. The primary concern is to detect faults that will cause a memory device to function incorrectly. Faults typically tested for include stuck-at faults, coupled-cell faults and single-cell pattern-sensitivity faults.
One method of testing memory devices is to write a specific pattern of "1"s and "0"s and then read the cells to see if there are any unexpected values. For example, a checkerboard pattern can be used to test for single-cell pattern sensitivity faults. A pattern of alternating "0"s and "1"s evaluates individual cells for defects such as charge leakage. Writing a "1" to one cell and "0"s to the surrounding cells tests the first cell's ability to hold the charge. In another example, row-stripes and column-stripes patterns may be used to test coupled-cell faults. Most test procedures address the set of faults most likely to occur rather than attempting to identify every possible fault, incorporating the appropriate series of test patterns.
Conventional memory testing is primarily performed in one of three methods. The first method uses automatic test equipment (ATE). According to this method all test-related circuitry and control and test data is external to the memory device. ATE testing is only performed on memory devices before they are incorporated into a system or other structure. The second test method, called built-in self-test (BIST), incorporates the test circuitry and data into the chip along with the memory device or devices. BIST allows the memory array to be tested at any point in the memory device's useful life. The third method of testing is a hybrid of the other two methods. Referred to as `designed for testability` (DFT), this method implements parts of the test circuitry on the chip, the rest being provided externally in a conventional application of hardware and control and test data. The ever-increasing costs of testing memory devices demands continuing advancements in test methods and procedures.
There are tradeoffs associated with each type of memory test method. ATE testing may be slower than the others and usually only provides for testing memory devices before they are integrated into a system. ATE testing provides no on-going verification of memory integrity. The benefit of ATE testing is that none of the valuable die real estate on the chip is taken up with testing circuitry--the entire chip area can be dedicated to the memory function.
DFT may be faster than ATE testing by virtue of the fact that the most memory cell input/output intensive circuitry is incorporated into the device itself. So, even though a portion of the test circuitry and data is still external to the memory device, the test processing is faster than that achieved with ATE processing. The DFT method also minimizes the impact on available die real estate by selectively incorporating test circuitry into the memory device.
BIST incorporates all required test circuitry and control and test data in the memory device itself, which has the effect of either reducing the area available for memory cells or forcing an increase in the overall size of the die. Activating the BIST circuitry also requires additional control signals. When additional pins are fabricated into the device the user can test the chip during its operational life. Since all test circuitry is incorporated into the device, the device spends much less time on the test equipment during the manufacturing process. BIST provides memory device testing that is both easier and faster than testing methods external to the memory device. BIST devices are used primarily for embedded memories where neither the address, read/write, nor data input lines are externally observable. Depending upon the BIST architecture, which determines when the testing actually occurs, memory access times may be impacted by the self-test processing. Unlike DFT, BIST can only perform algorithms built into the BIST hardware. BIST is currently the preferred method, however. The increase in hardware overhead and the inflexibility with regard to test algorithms is the accepted cost of achieving the significant reduction in test times, as well as the capability to perform BIST without external support and at the operational speed of the circuit.
In a conventional memory array, an external read or write operation is limited in the number of memory cells which can be addressed at one time. As a result, testing methods such as ATE and non-concurrent BIST, which write to and read from every memory cell, require a larger number of external cycles to test a memory device. Reading from or writing to a memory cell is relatively slow, leading to the situation where conventional testing techniques are less efficient because of the large number of external cycles. There is a need in the art for a test method which provides the same level of fault coverage in a reduced number of external read/write cycles. There is a further need in the art to provide a way to improve the performance of memory tests, thereby increasing the efficiency of the manufacturing process and expanding the ability to incorporate more extensive algorithms in the selected test method by using a test method which provides the same level of fault coverage in a reduced number of external read/write cycles.
One partial solution is presented by Sang H. Han and Miroslaw Malek in Two-Dimensional Multiple-Access Testing Technique for Random-Access Memories, 248 Proc. IEEE Int. Conference on Computer Design (1986). Their method proposes three test access modes and a modified address decoder which can be set to simultaneously select k output lines. Mode-0 is the conventional `one access per memory cell` process. Mode1 accesses k memory cells in one selected row at a time. Mode2 allows the test to access k cells in each of k rows at a time. Mode1 proved to speed up the test by k times, and Mode2 by k.sup.2 times. Ham's system provides some relief to the burden of memory testing, but the system is limited to reading or writing blocks of data according to the number of input lines available, providing only an incremental improvement in test speed. As a result, Han's and Malek's system provides only partial relief to the ever-increasing cost of testing. There remains a need to improve test performance.
In 1989, Ranier Kraus, et al. in Design for Test of Mbit DRAMs, 316 Proc. IEEE Int. Test Conference (1989), presented another partial solution which increased the performance of BIST procedures by as much as 75% for 4 Mbit DRAM devices. Kraus' process also executes at three levels or modes. In Mode1, predefined test patterns are written into the entire memory array and tested automatically in parallel. Since an internal address counter is used, this method is the fastest of the three, having the least number of external cycles. Mode2 is more flexible, allowing patterns to be assembled individually by addressing each word line externally. This process is much slower than Mode1 because it has a significantly increased number of external cycles over Mode1. Mode3 is the worst performer of the three modes. It tests margins and is used in conjunction with Mode1, Mode2, or any conventional test. Kraus' method requires circuitry comprising a test comparator, a test pattern generator, and a modified column predecoder and column decoder. At the 4 Mbit level this translates to about 1% of the chip area being dedicated to the test circuitry, except in cases where all bits are either "1" or "0", in which case a parallel read or write can be performed in two external cycles.
Kraus was able to drastically improve the time required to test memory devices, but only by incurring significant cost of additional manufacturing to incorporate the test circuitry into the chip, reduced die real estate available for memory cells, and inflexibility due to the requirement that the test patterns be predefined into the test pattern generator. Thus the cost of testing was not so much reduced by Kraus as shifted. What is still needed is a test method which has less impact on die real estate and which maintains or improves upon the test processing speed. More flexibility in test logic is also needed, such that test patterns may be developed and integrated into the test processing at any point. Kraus' system is employed primarily in BIST devices. What is needed is a test method which achieves the same or similar performance improvements in all test architectures (ATE, DFT, and BIST), reducing the cost of memory device testing.

Test method and apparatus for writing a memory array with a reduced number of cycles


A new and distinct Torenia plant named ‘Dancatpink’ characterized by delicate, funnel form flowers consisting of four petals in which the top petal is pale purple, RHS 76B, and the lower and side petals are purple, RHS 77A, with a yellow-green blotch in the center of the lower petal, RHS 154A; its vigorous growth habit, its bushy and cascading growth habit which maintains its compact rounded growth; its dense branching which gracefully cascades from hanging baskets; its early flowering response and year round blooming in a moderate climate; its suitability as an annual for hanging pots outdoors under partial shade; and its good weather tolerance.

The present invention relates to a new and distinct cultivar of Torenia plant, botanically known as Torenia sp. of the Scrophulariaceae family, hereinafter referred to by the cultivar name 'Dancatpink'.
'Dancatpink' was discovered and selected by the inventor, Gabriel Danziger, as a flowering plant in a controlled environment in Moshav Mishmar Hashiva, Israel.
'Dancatpink' is an induced mutant of the cultivar Torenia sp. 'Rose Moon' (unpatented) selected in a cultivated environment in Moshav Mishmar Hashiva, Israel. The mutation arose by radiation,stabilized by removing the cutting from the mutated sector of the treated plant.
Asexual reproduction of the new cultivar by soft tip cuttings was first performed in May, 2002 in Moshav Mishmar Hashiva, Israel, and has demonstrated that the combination of characteristics as herein disclosed for the new cultivar are firmly fixed and retained through successive generations of asexual reproduction. The new cultivar reproduces true to type.


A drive unit which can prevent the decrease of the luminance of a self-luminous device due to degradation or a change is electric characteristic thereof. The drive unit has a semiconductor device having an electric characteristic almost the same as the that of the self-luminous device, and drives the semiconductor device in accordance with the frequency of light emission of the self-luminous device. The device generates a characteristic change detection signal indicating the degree of a change in an electric characteristic of the semiconductor device, and supplies the self-luminous device with a drive signal having a current level or a voltage level based on the characteristic change detection signal.

1. Field of the Invention
The present invention relates to a drive unit of a self-luminous device such as an organic electroluminescent device and the like.
2. Description of the Related Art
An image display device used in a portable terminal such as a hand-held mobile phone and the like requires a thin-profile display panel. As the conventional thin-profile display panel, a liquid crystal display panel is generally used. However, a display panel which is constituted of a matrix of a plurality of organic electroluminescent devices, hereinafter called organic EL devices, is more preferable as the image display device for portable terminal, because the display panel with the organic EL devices is not only thin but also lightweight.
Two methods are generally used to drive the organic EL device, those are, a current driving method and a voltage driving method. The organic EL device emits light, luminance of which is corresponding to a supplied current level, so that the drive unit adopting the current driving method keeps a current supplied to the organic EL device at a constant current level, and the drive unit adopting the voltage driving method keeps voltage applied to the organic EL device at a constant voltage level.
However, since the organic EL device is a self-luminous device, a current-luminance characteristic is varied depending on cumulative driving period and the operating environment. When the organic EL device is driven with a constant current, the luminance decreases as the driving time increases. On the other hand, the luminance increases as the ambient temperature increases, and it decreases as the ambient temperature decreases. When the organic EL device is driven with a constant voltage, the rate of variation in the luminance is larger than that in the case where the organic EL device is driven with the constant current. This is because the amount of the current flowing through the organic EL device changes as a consequence of the variation in impedance of the organic EL device depending on the driving time and the operating environment.

Drive unit of self-luminous device with degradation detection function


A drive circuit (1) for driving a load (3) comprises: a power supply (10) for supplying an output current (IL); a controller (20) for controlling the power supply; a current sensor (25) for generating a current sense signal (V25); a controllable switch (30) in series with the output (2a, 2b), the switch being controlled by a mode controller (50); wherein the mode controller in a reduced brightness mode generates its switch control signal (SLC) for the switch for alternatively opening and closing the switch. At the end of a current pulse, an average current value averaged over the pulse duration is calculated, compared with a reference value (VREF), and, if said average value is larger than the reference value, a duration for the next pulse pause is calculated such that an average value averaged over the entire pulse period is equal to the reference value.

LEDs are conventionally known as signalling devices, for instance an indicator that an apparatus is stand-by. With the development of high-power LEDs, LEDs are nowadays also used for illumination applications. In a particular application, a LED array is used in a tail light unit of a vehicle, specifically a motor vehicle. In such application, the LED array can have two different operational modes. In a first mode, the LEDs generate maximum light intensity. This is achieved by operating the LEDs continuously with nominal current (DC). In this mode, the LED array functions as brake light, so this mode is also referred to as "brake mode". This brake mode is only active for as long as the vehicle driver actuates the brake pedal or brake handle.
In a second mode, the LEDs generate reduced light intensity. In this mode, the LED array functions as tail light, so this mode is also referred to as "tail mode". Reducing the light intensity can be done by reducing the LED current. However, this is not preferred, because the color and efficiency of the LEDs may change if the current intensity changes. Therefore, reducing the light intensity is typically done by driving the LEDs with pulsed current, i.e. the current is alternatively zero or maximal (i.e. nominal). A time interval where the current is zero will be indicated as an OFF interval or pulse pause: during such interval, the LED is OFF. The duration of this interval will be indicated as OFF duration or pulse pause duration. A time interval where the current is nominal will be indicated as an ON interval or pulse: during such interval, the LED is ON. The duration of this interval will be indicated as ON duration or pulse duration. The average light intensity depends on the duty cycle, i.e. the ratio of the pulse duration (ON) to the duration of the pulse period (ON+OFF). A lamp driver is designed to keep the average light intensity constant by keeping the average current constant.
Driver circuits for driving an arrangement of LEDs with substantially constant current are already known. Typically, such constant current driver circuit comprises a current sensor for sensing the LED current, and a sensor signal is fed back to a controller, which controls a power source such that the sensed current is kept substantially constant at a predetermined level. The drive circuit further comprises a controllable switch connected in series with the lamp. In tail mode, the controller switches the switch OPEN and CLOSED alternatively. During the pulse intervals, the LED current is kept substantially at the nominal level; if current deviations occur, the influence on the average current is compensated by varying the duty cycle.
A problem may occur if the power source is a relatively slow power source. This problem typically may occur in case the power source is implemented as a converter, but the problem may also arise in the case of other types of power sources. In this respect, "slow" means that the time it takes for the power source to have its output current rise from zero to the nominal current level is longer than the pulse duration. During the pulse pause, the output current of the power source reduces, perhaps even drops back to zero, and at the start of the next pulse the current starts rising again. Thus, if the nominal level is reached at all, it may take many current periods until the LED current finally reaches this level, which means that the intensity of the tail lights reaches its operative level only very slowly.
The present invention aims to provide a drive circuit where this problem is overcome or at least reduced. More particularly, the present invention aims to provide a drive circuit which is capable of driving LEDs with pulsed current and which has improved start-up characteristics.

Drive circuit for driving a load with pulsed current


The present invention facilitates semiconductor device fabrication by providing mechanisms for utilizing different isolation schemes within embedded memory and other logic portions of a device. The isolation mechanism of the embedded memory portion is improved relative to other portions of the device by increasing dopant concentrations or reducing the depth of the dopant profiles within well regions of the embedded memory array. As a result, smaller isolation spacing can be employed thereby permitting a more compact array. The isolation mechanism of the logic portion is relatively less than that of the embedded memory portion, which permits greater operational speed for the logic.

Electronic devices typically include a number of individual components such as memory, logic, and the like. In the past, these individual components have been formed on separate die or chips. These separate chips were packaged separately and attached to one or more circuit boards of the electronic device. The circuit board contained the necessary interconnects to attain desired functionality from the individual components. As a result, the electronic device as a whole operated according to the individual components formed and interconnected via one or more circuit boards and electronic connections.
One problem with utilizing individual components packaged separately is that great substantial reductions in die or component sizes do not always yield the same reduction in component size due to the fact that packaging and interconnects do not generally reduce in proportion. Thus, desired scaling/shrinking, which is a continuing demand for electronic devices, may not be obtained despite reduction in die sizes.
One potential solution is to combine multiple components onto a single die. Thus, for example, logic can be combined with embedded memory on a single die. The necessary interconnects between the logic and the embedded memory are formed within/on the die thereby reducing the need for interconnects on a circuit board, separate packaging, heatsinks, and the like. Additionally, performance gains can be achieved by reducing transmission path lengths and the like between components.
However, some desired space savings can be lost by combining multiple components onto a single die. Fabrication procedures employed for multiple components may not be as well suited as procedures employed for single, specific components. As a result, in some instances at least a portion of one or more components may be fabricated to a relatively larger size than would otherwise be done.

Application of different isolation schemes for logic and embedded memory


A method and apparatus for automatically adjusting the sensing threshold of cardiac rhythm management devices. The invention is particularly suited for implementation in devices such as implantable cardiac pacemakers and implantable cardioverter/defibrillators. A method and apparatus are provided in which a noise level and signal level for a sensing channel are determined for each cardiac cycle with the sensing threshold of the channel being adjusted in accordance therewith.

Currently available implantable cardiac rhythm management devices, including bradycardia and tachycardia pacemakers and cardiac defibrillators, have sense amplifier circuits for amplifying and filtering electrogram signals picked up by electrodes placed in or on the heart and which are coupled by suitable leads to the implantable cardiac rhythm management device. In most devices, the signals emanating from the sense amplifier are applied to one input of a comparator circuit whose other input is connected to a source of reference potential. Only when an electrogram signal from the sense amplifier exceeds the reference potential threshold will it be treated as a detected cardiac depolarization event such as an r-wave or a p-wave. The source reference potential may thus be referred to as a sensing threshold.
In the case of a programmable cardiac rhythm management device the prescribing physician can change the threshold potential of the comparator, but in spite of the flexibility which the programmable threshold offers, malsensing of cardiac depolarization will still occur frequently enough to result in patient discomfort and/or deleterious health effects. This may be due to the fact that cardiac depolarization events (intrinsic beats) can result in widely different peak amplitudes, depending on patient activity body position, drugs being used, etc. Lead movement and noise may further impede the detection of cardiac depolarization events. Noise sources may include environmental noise, such as 60 Hz power line noise, myopotentials from skeletal muscle, motion artifacts, baseline wander and T-waves. When the peak amplitudes associated with cardiac depolarization events become too small relative to a programmed threshold, or when noise levels in the electrocardiogram approach the sensing threshold, the likelihood of oversensing increases (i.e., false detection of depolarization events). If the sensing threshold is increased too high in an attempt to overcome the effects of noise, on the other hand, the likelihood of undersensing (i.e., failing to detect depolarization events) is increased. There is a need, therefore, for methods and apparatus that automatically adjust the sensing thresholds of cardiac rhythm management devices on a continuous beat-to-beat basis in a manner that better avoids both undersensing and oversensing.

This patent is subject to a terminal disclaimer.

Method and apparatus for adjusting the sensing threshold of a cardiac rhythm management device


A ground coffee extraction apparatus has a base to which a filter cup loaded with ground coffee is assembled from below. A delivery system pumps cool water from a cool water tank into the extraction apparatus. The cool water exerts a downward force greater than a resilient force of resilient elements of the extraction apparatus to drive a sliding element and a downward pressing element downward. Consequently, an O-ring seals a gap between the downward pressing element and the filter cup while the downward force is evenly applied to the ground coffee in the filter cup, thereby sealing and compacting the ground coffee hydraulically. After coffee is extracted, the cool water is drawn back into the cool water tank so that the sliding element and the downward pressing element are moved upward to unseal the filter cup. Hence, the automatic extraction apparatus enables rapid, uniform, and standardized sealing and compacting.

1. Technical Field
The present invention relates to a ground coffee extraction apparatus which uses water pressure to seal a filter cup and compact coffee granules loaded therein so that coffee of consistent quality can be extracted through a convenient automatic operation.
2. Description of Related Art
Coffeemakers are well known in the art. Conventionally, ground coffee, which is prepared by grinding coffee beans into granules, is filled into a filter cup to be coupled with a coffeemaker, and is then manually compressed and flattened with a tamper to reduce the voids and air between the coffee granules, wherein operation of the tamper relies chiefly on the operator's sense of touch. Afterward, the filter cup is screwed onto the coffeemaker forcedly so as to secure the filter cup sealingly in place. When the coffeemaker is turned on, hot water drips onto and thereby infuses the ground coffee in the filter cup so that coffee is extracted. However, the aforesaid filter cup and tamper are difficult to use because the force by which to screw the filter cup in place and compact the ground coffee varies with operators, and in consequence the density of the compacted ground coffee tends to fluctuate. As a result, the coffee extracted tastes differently.


A saw blade for an electric saw tool with a drive shaft making a reciprocating arcuate swing motion, the saw blade comprising a saw plate which has centrally a coupling part for connecting and fixing the saw plate to the drive shaft of the saw tool and has an appearance as being elliptic, and has cutting teeth on the outer periphery. Also, a saw blade for an electric saw tool with a drive shaft making a reciprocating arcuate swing motion, the saw blade having at one end a coupling part for connecting and fixing the saw blade to the drive shaft of the saw tool and having at the other end cutting teeth of the saw blade, and height of the cutting teeth being smaller in the order from near to at both ends of a line of the teeth.

Field of the Invention
The present invention relates to a novel structure for a saw blade in such type that the saw blade is mounted and fixed to a drive source, which source performs a reciprocating circular motion (movement) with a small extent of swing amplitude (rotation angle), in order to make cutting.
The terminology "the arcuate swing" referred to hereunder in the specification signifies the aforementioned "reciprocating circular motion with a small extent of swing amplitude (rotation angle)".
Prior Art
A saw blade is generally categorized in either a type of operation with a reciprocation movement (typically of a manually operable saw) or a type of circular movement (as a round saw). Both types of saw have high ability of cutting but do not yet become an ideal tool since they are problematic in safety, scatter loose particles from cutting, make loud noises, and so on.
Meanwhile, a specific electric cutting tool has been proposed as follows.
In detail, as shown in FIG. 6, a saw blade B exclusively used in the electric cutting tool is mounted and fixed, by use of a tightening screw, to a drive shaft A set in the body of the electric cutting tool. (The tool exemplified in FIG. 6 may mount, for example, a polishing member in place of the saw blade to thereby also serve as an electric file (rasp) or polisher.)
The drive shaft A does not make a unidirectional rotation but has a swing style of performing a reciprocating arcuate movement (arcuate swing) of a quite small swing angle (generally about 3.0 degrees). The tool is activated to cause the whole of the exclusive saw blade B to reciprocate at a small central angle. Strictly speaking, the cutting teeth on the saw blade make a circular movement, but show a spurious situation of linear reciprocating movement due to the quite small swing angle. And practically, due to the quite small swing amplitude, users who holding the tool in swinging may feel swing as of a swing type electric razor but is not impressed with as that the blade reciprocates transversely.
The cutting operation using the tool is carried out merely by straightly pushing the saw blade against wood to form a "slit hole" in the wood. For example, a saw blade disclosed in Japanese Unexamined Patent Application Publication No. 2000-512561 official gazette has basically the same structure as the exclusive saw blade B.
Naturally, it is possible to make a slit hole in the wood by use of a conventional hand-held saw with a round blade. However, this cutting is performed through unidirectional rotation of the blade. Thus, the blade basically tends to roll along on the wood to be worked. In detail, the cutting operation is carried out by first making a narrow through bore against the blade's force of rolling along on the wood, and then making larger the width of the through bore to a predetermined size. For this, it is naturally necessary to learn a specific working technique, which unlike the operation using the tool shown in FIG. 6 for which operation it is enough to merely push the tool's blade straightly against the wood in the direction of the wood's thickness. Besides, in use of the round saw, the loose particles from cutting jet and scatter at a substantial high initial rate from the slit bore being worked, thereby having a problem of deteriorating the working circumstances. This can be said to have various problems, such as high dangerousness and so on.
The mentioned problems can be cleared by use of the method making use of "the arcuate swinging of blade" for performing cutting. When the exclusive saw blade B is used for cutting, cutting can be carried out without troubles at the beginning of operation or when cutting a thin wood. However, there will be inconvenience when making a slit hole in a thick wood. In detail, there is such danger that the saw blade's left side end and right side end continue to collide against left and right lateral sides of the slit hole in the wood to thereby be heated and finally smoke, or, the cutting teeth on the ends of the saw blade are deformed due to heating. Such troubles have been confirmed actually.
Regarding reasons of happening of the above-mentioned facts which reasons will be detailed later, it is so inferred that as the cutting operation proceeds, the saw blade collides against the left and right sidewalls of the slit hole. Practically, there has been neither brought onto the market nor proposed any attempts of an improved saw blade structure having no above-mentioned troubles or proposing any improvement for them although generation of heat and deformation was known and seen as a problem.


A color image processing device is disclosed which has an increased degree of freedom in black-coloring processing and permits color images which have good color reproducibility and are less susceptible to position displacement in black-colored portions to be output. The device includes a minimum detector circuit, a first lookup table for determining the amount of black material (K), a second lookup table for determining the amount of black material (k1) in color materials which has one of 256 values from 0 to 255, a third lookup table for determining the amount by which the underlying color is removed (k2) which has one of 256 values from 0 to 255, and three subtracters and three dividers for processing the outputs of the lookup tables to calculate Cxe2x80x2, Mxe2x80x2 and Yxe2x80x2 indicating the amounts of color materials used in the printer. The amount of black material and the amount of black material mixed with each of C, M and Y are controlled according to the relations:

This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-246232, filed Aug. 31, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a color image processing device adaptable to an image forming apparatus for forming the image of an object onto a transferred material.
In the field of color printing and color copying (including printouts by printers), a method has been widely used which forms color images by using black (K) in addition to three primary colors of cyan (C), magenta (M) and yellow (Y) (chromatic colors) in the subtractive primaries of color mixture. The reason why black is used is that color materials of C, M and Y can be saved, the reproducibility of shadow portions can be improved, and gray balance can be ensured easily (the density of black can be increased) in comparison with image forming by only three primary colors of C, M and Y. As color materials, inks are used in printing and part of printers and toners are used in color copying and most color printers.
In order to form color images using four colors, it is required to convert C, M and Y data (color data) into C, M, Y and K data (color data and black data), which is referred to as a black-coloring process.
As a black-coloring algorithm, xe2x80x9cLogical Algorithm of Black Ink Printingxe2x80x9d is disclosed by Shinji Kita in the fifth Chromatic Engineering Conference, p 59-62, 1988, according to which, even if a black-coloring signal is maximum, color signals can be reduced by black-coloring, and the amount of black is increased in achromatic-color high-density portions and the amount of black is increased as much as possible in chromatic color portions as well. This method is known as a GCR (Gray Component Replacement) method which permits good color reproduction using the average overlapping model for dots which overlap in the black-coloring process.
In the GCR method, however, there is a problem that the consumption of materials for chromatic colors increases because chromatic color materials are further used although the amount of black has already reached a maximum. In addition, there is another problem that color materials, toners in particular, may peel off paper when the total amount of all the color material of black, C, M, and Y exceeds a given amount.
On the other hand, C, M, Y and K signals resulting from the black-coloring process have advantages that black is reproduced deeply and the reproducibility of chromatic colors in high-density portions is not degraded by the use of too much black in those portions.
However, the superposition (or misalignment) of multiple color materials and the misalignment of black must be taken into consideration.
For example, if, when the amount of black is little in an achromatic high-density area adjacent to an area which is printed in black only (black area), the black area and the high-density area are displaced relative to each other, then not a black image but a white image will be produced. This is due to the fact that a difference in density is produced between the black area and the adjacent area because a color in the adjacent area which should originally have been represented by the superposition of colors is represented by black only.
An object of the present invention is to provide a color image processing device which is adapted for image forming apparatus and which has an increased degree of freedom in black-coloring processing based on the GCR system and permits color images which have good color reproducibility and are less susceptible to position displacement in black-colored portions to be output without affecting image processing on portions other than black-coloring portions and peeling of color materials.
The present invention provides a color image forming apparatus comprising: black-coloring processing portion for decomposing first color image signals each corresponding to one of multiple colors into second color signals and a black signal, and output section for outputting the second color signals and the black signal as a color image using chromatic color materials and a black color material, and wherein the black-coloring processing portion decomposes the first color signals into the second color signals and the black signal in accordance with
K=f(min(I))
A=h(I)xe2x88x92j(g(min(I)))
B=i(I)xe2x88x92k(g(min(I)))
Ixe2x80x2=A÷B (Axe2x89xa0B or Bxe2x89xa00)
where K is the black signal, I is the first color signals, Ixe2x80x2 is the second color signals, min(I) is the minimum among the first color signals, f(min(I)) is a function of min(I), g(min(I)) is a function of min(I), h(I) is a function of I, i(I) is a function of I, j(g(min(I))) is a function of g(min(I)), and k(g(min(I))) is a function of g(min(I)).
In addition, the present invention provides a color image forming apparatus comprising: first range correction section for compressing the signal range of first color image signals each corresponding one of multiple colors to produce second color signals; black-coloring processing portion for decomposing the second color image signals from the first range correction section into third color signals and a black signal; second range correction section for expanding the signal range of the third color signals and the black signal; and output section for outputting the color signals and the black signal from the second range correction section as a color image, and wherein the black-coloring processing portion decomposes the first color signals into the second color signals and the black signal in accordance with
K=f(min(I))
A=Ixe2x88x92g(min(I))
B=Ixe2x88x92g(min(I))
Ixe2x80x2=A÷B (Axe2x89xa0B or Bxe2x89xa00)
where K is the black signal, I is the second color signals, Ixe2x80x2 is the third color signals, min(I) is the minimum among the second color signals, f(min(I)) is a function of min(I), g(min(I)) is a function of min(I), h(I) is a function of I, i(I) is a function of I, j(g(min(I))) is a function of g(min(I)), and k(g(min(I))) is a function of g(min(I)).
Moreover, the present invention provides a color image forming apparatus comprising: color signal switching section for, at normal operation time, selectively outputting signals supplied directly or indirectly from color conversion section and, at color conversion table creation time, selectively outputting arbitrarily set signals to black-coloring processing portion; output section for outputting color signals and a black signal decomposed by the black-coloring processing portion as a color image; color data extraction section for extracting color data from image data outputted by the output section; and color conversion information creation section for creating To information representing a transformat ion relationship from a color coordinate system before the color conversion to a color coordinate system after the color conversion on the basis of the correspondence between the extracted color data and the arbitrarily set signals, and wherein the black-coloring processing portion decomposes the first color signals into the second color signals and a black signal in accordance with
K=xcex1xc3x97(min(I))
A=g(I)xe2x88x92h(k2)
B=i(I)xe2x88x92j(k2)
Ixe2x80x2=A÷B (Axe2x89xa0B or Bxe2x89xa00)
where K is the black signal, I is the first color signals, Ixe2x80x2 is the second color signals, min(I) is the minimum among the first color signals, xcex1 is f(min(I) or a constant, k2 is the amount by which underlying color is removed (less than min(I)), g(min(I)) is a function of min(I), h(k2) is a function of k2, i(I) is a function of I, and j(k2) is a function of k2.
Furthermore, the present invention provides a color image forming apparatus comprising: color signal switching section for, at normal operation time, selectively outputting signals supplied directly or indirectly from color conversion section and, at color conversion table creation time, selectively outputting arbitrarily set signals to first range correction section for compressing the signal range of input signals; black-coloring processing portion for performing a black-coloring process on the signals corrected by the first range correction section; second range correction section for expanding the signal range of the signals subjected to the black-coloring process by the black-coloring processing portion; color data extraction section for extracting color data from image data outputted by the output section; and color conversion information creation section for creating information representing a transformation relationship from a color coordinate system before the color conversion to a color coordinate system after the color conversion on the basis of the correspondence between the extracted color data and the arbitrarily set signals, and wherein the black-coloring processing portion decomposes the first color signals into the second color signals and the black signal in accordance with
K=f(min(I))
A=Ixe2x88x92g(min(I))
B=Ixe2x88x92g(min(I))
Ixe2x80x2=A÷B (Axe2x89xa0B or Bxe2x89xa00)
where K is the black signal, I is the second color signals, Ixe2x80x2 is the third color signals, min(I) is the minimum among the second color signals, f(min(I)) is a function of min(I), g(min(I)) is a function of min(I), h(I) is a function of I, i(I) is a function of I, j(g(min(I))) is a function of g(min(I)), and k(g(min(I))) is a function of g(min(I)).
Further, the present invention provides a color image forming apparatus comprising: black-coloring processing portion for decomposing first color image signals each corresponding to one of multiple colors into second color signals and a black signal; extraction section for extracting an image area to be output in black only in the color signals; black conversion section for converting color image signals for the image area to be output in black only into black signals; and output section for outputting a color image corresponding to the second color signals and the black signals from the black conversion section, and wherein the black-coloring processing portion decomposes the first color image signals into the second color signals and the black signal so that the black signal is increased preferentially in achromatic high-density image portions, the color signals are increased in other image portions, and the total of the amounts of color materials and the amount of black material used in the output section is not larger than a predetermined value.
In addition, the present invention provides a color image forming apparatus comprising: color signal switching section for, at normal operation time, selectively outputting signals supplied directly or indirectly from color conversion section and, at color conversion table creation time, selectively outputting arbitrarily set signals to black-coloring processing portion; extraction section for extracting an image area to be output in black only in the color signals; black conversion section for converting color image signals for the image area to be output in black only extracted by the extraction section into black signals; output section for outputting color signals and a black signal decomposed by the black-coloring processing portion as a color image; color data extraction section for extracting color data from image data outputted by the output section; and color conversion information creation section for creating information representing a transformation relationship from a color coordinate system before the color conversion to a color coordinate system after the color conversion on the basis of the correspondence between the extracted color data and the arbitrarily set signals, and wherein the black-coloring processing portion decomposes the first color image signals into the second color signals and the black signal so that the black signal is increased preferentially in achromatic high-density image portions, the color signals are increased in other image portions, and the total of the amounts of color materials and the amount of black material used in the output section is not larger than a predetermined value.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.

Abstract: K=xcex1xc3x97min(C, M, Y)

Abstract: Cxe2x80x2=(Cxe2x88x92k1)/(255xe2x88x92k2)

Abstract: Mxe2x80x2=(Mxe2x88x92k1)/(255xe2x88x92k2)and

Abstract: Yxe2x80x2=(Yxe2x88x92k1)/(255xe2x88x92k2)

Abstract: where xcex1 is a black rate of up to 100%.


A method includes applying a first seed layer extending over a horizontal surface and via sidewalls of a dielectric material and exposed underlying contact metallization; removing at least some of the first seed layer from the contact metallization and the horizontal surface while leaving a sufficient amount of the first seed layer on the sidewalls as a catalyst for subsequent application of a third seed layer; sputtering a second seed layer over the contact metallization and the horizontal surface; using an electroless solution to react with the first seed layer and apply the third seed layer over the sidewalls; and electroplating an electroplated layer over the second and third seed layers.

The present invention relates to interconnect metallization overlying a polymer layer and extending through vias in the polymer layer to underlying contact metallization.
High density interconnect (HDI) is a high performance chip packaging technology wherein sequential layers of metallization on polymer are used to interconnect chip pads with high chip density. In one form of HDI circuit module, an adhesive-coated polymer film overlay having via openings covers a plurality of integrated circuit chips in chip wells on an underlying substrate. The polymer film provides an insulated layer upon which is deposited a metallization pattern for interconnection of individual circuit chips through the vias. Methods for performing a HDI process using overlays are further described in Eichelberger et al., U.S. Pat. No. 4,783,695, issued Nov. 8, 1988, and in Eichelberger et al., U.S. Pat. No. 4,933,042, issued Jun. 12, 1990. The polymer layer may comprise electrically insulating material upon which an electrically conductive material can adhere such as, for example, a polyimide.
Vias extending through the polymer layer to chip pads can be formed by any appropriate process. A preferred method of laser-drilling vias in the polymer film is described in Eichelberger et al., U.S. Pat. No. 4,894,115, issued Jan. 16, 1990. Conventional interconnect metallization processes generally use an argon ion laser to drill vias to chip pads or other types of contact metallization. Typical via depths are about thirty (30) to about forty (40) micrometers, and typical via sidewalls are sloped out and upwards from their horizontal bottom surfaces on the order of about forty-five degrees (45.degree.) to about sixty degrees (60.degree.). After via drilling, residual debris is removed by plasma ashing or reactive ion etching (RIE) treatment. The via surfaces can then be backsputtered to remove any oxide on the underlying metallization. A thin seed layer of titanium (about 1000 angstroms) is sputtered, and a thin layer of copper (about 3000 angstroms) is sputtered. These layers provide a thin conducting layer capable of serving as a ground plane for subsequent electrodeposition of copper. In one embodiment, copper is plated to a thickness of about four (4) micrometers, and another thin layer of titanium is then sputtered over the plated copper. The metallization layers (titanium, copper, copper, and titanium) are patterned using photoresist processing steps. Additional polymer layers can be applied with the via and via metallization process being repeated for each layer to complete the electrical circuit module.
Good coverage of the sputtered metal layers has been achieved using conventional methods because the sidewalls of the vias are sufficiently sloped. This technique, however, imposes limitations on the resolution capability for thicker polymer layers. For example, if a polymer layer is in the thickness range of fifty (50) to seventy-five (75) micrometers, if a slope of about forty-five degrees (45.degree.) to about sixty degrees (60.degree.) is to be used, the diameter of the hole at the top of the via will be significantly larger (twice as large) as the diameter for a dielectric layer having a thickness of thirty-five (35.degree.) micrometers, and the vias will thus require larger metal cover pads (areas of metallization in and around the vias).
Using current designs, vias often have twenty five micrometer (one mil) diameters at their narrowest sections and rectangular cover pads of about sixty-five micrometers per side. These dimensions cannot be achieved with thicker dielectric layers having the same sloped sidewalls, and interconnect density would thus be reduced for thicker polymer layers. Reductions in density lead to requirements for additional layers.
If steeper sidewalls (sidewalls with increasing slopes) are used, yield and reliability issues associated with metal coverage arise. Because sputtering is primarily directional, little or no metal is sputtered on very steep sidewalls of a polymer layer. Incomplete coverage of sputtered metal does not support subsequent electrodeposition processing, and metallized vias are formed with gaps in the metallization that can have high resistance values or create open circuits.

Method of fabricating metallized vias with steep walls


A wide-angle lens (100) includes a front group (110), an aperture (80), and a rear group (120). The front group (110) includes a first lens (10), a second lens (20), and a third lens (30) arranged in order from a side (La) closest to an object to an image side (Lb). In such a wide-angle lens, to suppress an occurrence of a ghost caused by multiple reflection between a lens surface (22) of the second lens (20) on the image side (Lb) and a lens surface (31) of the third lens (30) on the object side (La), the sag amount Sag31 (mm) and the diameter D31 (mm) of the lens surface (31) satisfy the following conditional expression: 0<1Sag31/(D31/2)<0.125.

In wide-angle lenses, a lens configuration of six elements in five groups has been proposed to achieve high resolution (see Patent Literature 1). In the wide-angle lens described in Patent Literature 1, a front group, an aperture, and a rear group are arranged in order from an object side to an image side, and in the front group, at least a first lens, a second lens, and a third lens are arranged in order from a side closest to an object to the image side.
The first lens is a negative meniscus lens of which a lens surface on the image side is a concave curved surface. The second lens is a negative meniscus lens of which a lens surface on the image side is a concave curved surface. The third lens has a concave curved lens surface on the object side.

Wide-angle lens capable of suppressing multiple reflection between the second lens and the third lens


A method for creating a tangible item (such as an “A” pillar garnishment 18) which increases the capacity of the item to absorb energy by the incorporation and/or addition of a plurality of adhesive-covered beads 25, and which utilizes the method and/or type of energy used to normally form the item to incorporate and/or add the adhesive-covered beads 25, thereby increasing efficiency while reducing cost. A new and novel tangible item, such as “A” pillar garnishment 18, having programmed energy absorption characteristics is also disclosed.

1. Field of the Invention
The present invention generally relates to a method for forming a tangible item and to a tangible item which is made by a method which allows the created tangible item to efficiently absorb energy and, more particularly, to a new and novel method for increasing the amount of energy which may be absorbed by a tangible item, without appreciably increasing the amount of energy used to normally form the item, and which further allows the produced tangible item to have disparate energy absorption portions in an intentional and programmable manner.
2. Background of the Invention
It is relatively common to see traffic accidents and/or other mishaps which involve a vehicle and/or other type of selectively movable assembly. In these circumstances, a passenger (e.g., an individual residing within the vehicle or within other types of selectively movable assemblies) may be "thrown" within and/or otherwise jostled or moved within the vehicle or other type of selectively movable assembly by the force of the circumstances, in a manner which is dangerous and injurious to the passenger (e.g., the passenger forcibly contacts a portion of the interior of the vehicle or selectively movable assembly and is injured or killed).
It is therefore desirable to construct and/or adapt certain automotive and/or other types of parts and/or components (e.g., respectively forming or representing "tangible items") which readily absorb this impact-type of force and/or energy and "cushion the blow" to the passenger, thereby reducing the likelihood of injury and death. While current tangible items do absorb some energy, they do so in a relatively inefficient manner, are relatively costly to manufacture, and are not "programmable", (i.e., they do not have intentionally disparate energy absorption portions where contact is most likely to occur).
Further, it is desirable to achieve such a capacity without expending substantially more energy than is already being utilized and/or expended to create the part and/or component (e.g., the "tangible item"), and it is frequently and additionally desirable to cause only a portion of a part and/or component to be constructed and/or adapted to efficiently absorb energy (e.g., the portion which is readily contacted by the passenger), thereby reducing the overall cost in producing such an energy absorbing item while concomitantly achieving the desired energy absorption characteristics where they are most likely to be needed.
Further, it is desirable that, if these desirable energy-absorption enhancement characteristics are made within a tangible item, they be made in a manner which substantially utilizes only the type and the amount of energy which is currently used to form the item, thereby further not appreciably increasing the amount of energy already used to produce the item.
There is therefore a need for a new and novel method of forming an automotive part and/or other tangible item which can absorb a relatively high and/or relatively large amount of energy, for a tangible item which has enhanced energy absorption properties, and further for a method which does not substantially increase the amount of energy already expended in forming and/or otherwise creating a part and/or other tangible item but which allows the formed item to have enhanced energy absorption characteristics. There is therefore also a need for a new and improved tangible item having enhanced energy-absorption properties and which may have selectively and intentionally disparate energy-absorbing properties, thereby tailoring and/or "programming" the characteristics of the produced item to the needs of the environment in which it is placed. The present invention provides these and other novel benefits.

Method for forming a tangible item and a tangible item which is made by a method which allows the created tangible item to efficiently absorb energy


A thin film transistor including a first polycrystalline semiconductor layer disposed on a substrate, a second polycrystalline semiconductor layer disposed on the first polycrystalline semiconductor layer, and metal catalysts configured to adjoin the first polycrystalline semiconductor layer and spaced apart from one another at specific intervals.

1. Field
The described technology relates generally to a thin film transistor. More particularly, the described technology relates generally to a thin film transistor including polycrystalline semiconductor layers, a method of manufacturing the active layers of the thin film transistor, and a display device including the thin film transistor.
2. Description of the Related Art
A display device is used to display an image. An organic light emitting diode (OLED) display has been increasingly used as the display device. The organic light emitting diode (OLED) display is self-light emitting and can reduce a thickness and a weight of the display device because it does not require an additional light source, as is used in a liquid crystal display (LCD). Further, the organic light emitting diode (OLED) display has high quality characteristics, such as low power consumption, high luminance, and a high response speed. A conventional organic light emitting diode (OLED) display includes a thin film transistor (TFT) formed in each pixel of the OLED display and an organic light emitting element connected to the thin film transistor.
The thin film transistor includes a semiconductor layer. Recently, a technique for forming a silicon layer using a polycrystalline semiconductor layer through the diffusion of a metal catalyst has been developed. However, in a case in which the silicon layer is formed of a polycrystalline semiconductor layer through the diffusion of the metal catalyst, a concentration of the metal catalyst at a portion where the diffusion of the metal catalyst is ended is higher than a concentration at other portions. Accordingly, there is a problem in that a semiconductor characteristic of the polycrystalline semiconductor layer deteriorates.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the described technology and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.

Thin film transistor, method of manufacturing active layers of the thin film transistor, and display device


An arrangement by which an external device is connected to a radio device via its antenna without modifying the radio device mechanically. The radiating element (311) of the antenna of the radio device is a conductive part of its casing, which is fed electromagnetically by means of a feed element (322). The connecting is implemented by a coupler (310) to be placed at the antenna on top of the casing, from which coupler there is an intermediate cable (350) to the external device. The coupler includes a coupling element (311), from which there is electromagnetic coupling to the radiating element (321) through a thin dielectric membrane, or direct galvanic coupling. From the coupling element to the jumper cable there is electromagnetic coupling through an intermediate element (312), or direct galvanic coupling. Because the radiating plane is located on the outer surface of the radio device, its distance to the coupling element can be made very small. Thus the attenuation caused by the coupler on the transfer path from the antenna port of the radio device to the external device is lower than in the known arrangements.

In practice, the external device is most often an additional antenna that improves the quality of the radio connection, and the radio device is most often a mobile phone. An additional antenna may be needed in a vehicle, for example, when the field strength of a base station within the body of the vehicle is low. The additional antenna is then naturally outside the body, fastened to it. The vehicle can have a fixed holder for using an external antenna, and a phone placed in it is coupled to the external antenna by a coupling part and a cable. The external device can also be a measurement device or analyzer used in production or servicing. Naturally, such a device does not radiate electromagnetic energy, although the radio device "sees" it as a mere antenna.
For connecting an additional antenna, a mobile station can have a coaxial connector coupled to the antenna port. However, such a connector arrangement based on galvanic coupling is relatively expensive and unreliable in the course of time. Therefore, electromagnetic coupling can be used instead of galvanic coupling. FIG. 1 shows a known arrangement for coupling to the antenna of a radio device as two partial images. The partial image on the left shows the radio device RD as seen from the back and the other partial image shows it as a simplified longitudinal section. The antenna of the radio device is an internal antenna of the PIFA type (planar inverted F-antenna). The longitudinal sectional image thereof shows a ground plane GND, a radiating plane 121 and a short-circuit conductor 125. The radiating plane is relatively close to the back cover 105 of the radio device, and the ground plane is inner within the device. The arrangement includes a coupler 110 having approximately the spread of the internal antenna and being fastened with adhesive joint, for example, at the antenna on the outer surface of the back cover 105. The coupler includes a conductive strip-like coupling element 111, which has, for the above mentioned reason, relatively strong electromagnetic coupling with the radiating plane 121. Through this coupling, radio frequency energy is conveyed from the near field of the antenna outside the radio device and vice versa. A coaxial intermediate cable 150 runs from the coupling element to the additional antenna or other external device.
In this description and the claims, the short expression "coupler" means a device to be fastened to a radio device without modifying it mechanically, through which a radio frequency connection is arranged to an external device.
The applicant is aware of the method according to FIG. 2, described in patent application Ser. No. FI 20022117, for coupling to the internal antenna of a mobile phone, for example, for connecting an additional antenna. The coupling arrangement includes a coupler 210 placed on the back cover of the phone, having a first and a second coupling part. The first coupling part is intended to be placed at the internal planar antenna of the phone, and it has two interconnected coupling conductors 211 and 212, which are rigid conducting wires in this example. Of the phone, only the radiating plane 221 of the planar antenna is drawn in the main FIG. 2. The small side image also shows a part of the phone casing 205 between the radiating plane and the coupling conductor 211. In this example, the radiating plane is divided into a first and a second branch for increasing the number of operating bands. The feed and short-circuit points of the antenna are in an area in which the branches are interconnected. When the coupler has been put in its place, the coupling conductor 211 is located on top of the first branch as viewed from the direction of the normal to the radiating plane, and the coupling conductor 212 is correspondingly located on top of the second branch. In this way, the coupler is made to function both on the lower and upper band of the antenna.
The second coupling part of the coupler is intended to be located at the internal ground plane of the phone, and it consists of a conductive plate 213 with its side edges bent to form a right angle. These side edges press against the sides of the phone so that the coupler is fastened to the phone. There is a significant electromagnetic coupling between the conductive plate 213 and the ground plane. The coaxial intermediate cable 250 between the coupler and am external device is fastened to the conductive plate. The inner conductor of the intermediate cable is galvanically coupled to the interconnection point of the coupling conductors 211 and 212, and the outer conductor is galvanically coupled to the conductive plate close to the coupling point of the inner conductor. Through the coupling between the conductive plate and the ground plane, energy from the radio frequency field of the ground plane can also be transferred to the external device. The conductive plate 213 and the conducting wires 211, 212 function as a generator feeding the additional antenna, for example, through the intermediate cable 250.

Antenna arrangement for connecting an external device to a radio device


A peripheral device is installed in a cabinet of an electronic gaming machine and configured to detect and communicate with a personal electronic device of a player of a casino game. The personal electronic device is configured to communicate identity information and/or account information to the peripheral device that, in turn, can be used to enable gameplay on the electronic gaming machine. Other embodiments described herein reference a network architecture facilitating cryptographically-secure and verifiable accounting of all point or real-money transactions in a casino environment.

A gaming industry entity, such as a casino, may be required by a regulatory body to maintain accurate records of cashless transactions (e.g., ticket in/ticket out transactions, player card transactions, and so on) initiated by or through an electronic gaming machine controlled by that entity. Conventionally, such transaction records are communicated directly from an electronic gaming machine using software and/or hardware approved of by the regulatory body to a local or remote server.
However, conventional electronic gaming machines typically process cashless transactions without verifying the identity of the individual authorizing or performing the transaction. For example, an electronic gaming machine may automatically debit a player account associated with a player card when that card is inserted into the electronic gaming machine without verifying the identity of the person who inserted the card.
Furthermore, typically once approved, cashless transaction reporting hardware and/or software associated with an electronic gaming machine cannot be modified to incorporate new or additional features—including security-enhancing features—without undergoing an expensive and time-consuming re-approval process conducted by, or under the authority of, the regulatory body.

Network architecture for gaming industry accounting


The present invention discloses a multifunctional adjustable computer support stand designed for disabled users. The present invention includes a movable base used to accommodate a computer host; two swing rods, formed on the bottom of the base; a retractable rod; a rotation member able to rotate to any desired angle; a support rod pivotally connected with the rotation member, including a shaft rod extending form the one end of the support rod; a rotatable base member, including a left U-shaped frame and a right U-shaped frame used to hold a monitor; an adjustment frame, U-shaped used to firmly hold a keyboard.

1. Field of the Invention
The present invention relates to a computer support stand wherein some portions are adjustable and rotatable to unspecific angles so as to match the combined use of a computer host, a display and a keyboard, which is more convenient for disabled users.
2. Description of the Prior Art
Generally, the traditional computer desk used to provide the space for the arrangement of a computer host, a display, a keyboard, a mouse and even a printer so as to achieve the convenience of users.
Although, this kind of computer desk can solve the problem regarding the space accommodating a plurality of computer apparatuses and thus beautifies the space and provides visual delight, disabled users or the sick persons lying on sickbeds are unable to use it. Therefore, to let the sick persons lying on beds be able to use a computer normally is the purpose of the present invention In order to resolve the above problem, an improved computer frame is disclosed in the present invention.
On the other hand, the lives of sick persons who have been lying on sickbeds for a long time are quite boring except the time for rehabilitation. In this condition, if the sick persons lying on sickbeds can use computers freely and easily to kill time, it is believed that this is helpful to make the sick persons recover more quickly.

Multi-functional adjustable computer support stand


With a game implemented by the present game program, an expected pass display area of a ball will be displayed on a monitor between a dispatch position of the ball and a arrival position of the ball. When a dispatch operation of a pitcher character is initiated, the contact position of a command means in the expected pass display area will be identified if the command means is placed into contact with the expected pass display area. If the contact position is moved in the expected pass display area by the command means before a character has dispatched a moving object, the contact position after movement will be identified as the final contact position. When this occurs, a ball character will be dispatched from the pitcher character to the final contact position.

1. Field of the Invention
The present invention relates to a game program, and in particular to a game program for causing a computer to implement a game that will dispatch a moving object from a character displayed on a touch panel type of monitor. In addition, the present invention relates to a game device and a game method that is implemented by this game program.
2. Background Information
Various video games have been proposed in the past. Various video games now allow one to issue various commands to a character displayed on a monitor by operating an input unit that is independent of a game unit, e.g., various input buttons on a controller, or by operating various input buttons that are integrally provided on the game unit. For example, a standard game device has a monitor, a game unit that is separate from the monitor, and a controller that is separate from the game unit. A plurality of input buttons are arranged on the controller. In addition, a portable game device has a game unit, a liquid crystal monitor arranged in the approximate central portion of the game unit, and a plurality of input buttons that are arranged on both sides of the liquid crystal monitor. With this type of game device, various commands can be issued to a character displayed on the monitor by operating at least one of the plurality of input buttons.
Thus, one known video game in which commands to a character are performed from input buttons includes a competitive video game, e.g., a baseball game, in which athlete characters are displayed on a monitor and a competition takes place. With this baseball game, when the player operates a pitcher, the player can move the mitt position of the catcher character by selectively pushing the directional command button during the pitching motion of the pitcher character. Then, the ball character will be thrown to the mitt position of the catcher character when the moving object, e.g., the ball character, is released by the pitcher character.
With a conventional baseball game, a player can indicate the course in which the pitcher character will throw the ball to the catcher character by selectively operating the directional command buttons. For example, by selectively and continuously pushing the right direction command button and the down direction command button, a player can cause the mitt position of the catcher character to move to a position at the lower inside corner of a left-handed batter. When this occurs, the ball character released by the pitcher character will be thrown to the mitt position of the catcher character that is at the lower inside corner of the left-handed batter.
Here, the player must continuously push the right direction command button and continuously push the down direction command button, and cause the mitt position of the catcher character to move to the lower inside corner position of the left-hand batter, within a period of time that is limited by the pitching motion of the pitcher character. Because of this, if there is a distance between the mitt position of the catcher and the desired course position, e.g., the lower inside corner of a left-handed batter, the ball character may be released from the pitcher character before the mitt position of the catcher character arrives at the lower inside corner position of the left-handed batter. In other words, the ball may be placed on a course that is different from the desired course.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need to make it possible to accurately and easily place a moving object in a desired position. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.

Game program, game device, and game method


A processor in a data processing system includes a master-shadow physical register file and a renaming unit. The master-shadow physical register file has a master storage coupled to shadow storage. The renaming unit is coupled to the master-shadow physical register file. Based on an occurrence of shadow transfer activation conditions verified by the renaming unit, data in the master storage is transferred from the master storage to the shadow storage for storage. Data is transferred from the shadow storage back to the master storage based on the occurrence of a shadow-to-master transfer event, which includes, for example, a flush of the master storage by the processor.

A processor typically utilizes a physical register file (PRF) to store data for use by functional units of the processor. A PRF can support both Out-of-Order (OoO) instruction execution and speculative execution of instructions across an instruction window. A large instruction window allows for high performance of the processor but also necessitates a sizable PRF. Further, as the number of execution units supported by the processor increases, additional reads and writes need to be supported by the PRF, requiring both additional registers and additional ports for each register. These additional registers and ports make the PRF a significant physical design bottleneck to enabling large instruction windows with wide execution widths. Previous solutions proposed to accommodate the wide execution widths include duplication of the PRF to reduce the number of read ports per PRF and hierarchical PRF schemes that involve a hierarchy of PRFs with complex mechanisms to track and move entries between the PRFs.
The average lifetime of an active PRF entry also affects its reusability and hence the effective size of the PRF. With OOO and speculative execution, a significant portion of the active lifespan of the PRF is spent waiting in recovery mode, where the PRF is not actively read and lies in wait in case of a wrongly predicted speculative execution. Improvements in handling the active lifespan of the PRF effectively boosts reusability and provides some relief for enlarged PRFs.

Methods and systems for utilizing a master-shadow physical register file based on verified activation


An electric machine and method for operating an electric machine are provided. The electric machine includes a first rotational component and a second rotational component rotationally engaging the first rotational component via a splined interface. The electric machine further includes a first lash reducing spring radially positioned between a first set two adjacent splines in the splined interface.

Certain types of hybrid vehicles introduce rotational energy from electric motors into vehicle drivelines using a torque converter. In these motors, rotor carriers are rotationally coupled to torque converters as well as rotor hubs to facilitate efficient rotor rotation, during motor operation. Furthermore, some electric motors, such as permanent magnet synchronous motors (PMSM), utilize signal feedback from a sensor, such as a resolver, to control electromagnetic operation in the motor. In certain circumstances, dedicated integrated circuits (ICs) are employed to process resolver signals.
One example approach is shown by Satyaseelan et al., in U.S. 2018/0062469 A1. Satyaseelan's system uses a Belleville spring to retain a rotor to a rotor hub. However, Applicant have recognized several drawbacks with Satyaseelan's system. For instance, the motor in Satyaseelan relies on axial clamping forces to reduce lash in the splined interface between the rotor hub and the rotor. However, clamping forces generated by the Belleville spring may not be sufficient, in certain circumstances, to provide a desired clamping strength between the rotor hub and the rotor to reduce lash. As a result, the interface between the rotor and the rotor hub may experience unwanted lash, which in turn decreases machine durability due to impacts between the splines in the interface and ultimately drives down the motor's lifespan. Additionally, the lash may decrease the accuracy of signals from the motor's resolver, decreasing motor efficiency. Additionally, it will be appreciated that incorporating a Belleville washer into a space limited motor also introduces a number of packaging challenges and may cause unwanted design changes to adjacent components or may increase the motor's overall profile.
In one example, the issues described above may be at least partially addressed by an electric machine including a first rotational component (e.g., rotor carrier) engaging a second rotational component (e.g., rotor hub) via a splined interface. The electric machine further includes a first lash reducing spring radially positioned between a first set of two adjacent splines in the splined interface. In this way, the lash in the machine's splined interface is substantially reduced using a robust and space efficient spring loading mechanism. Additionally, directly spring loading the splines using a spring mechanisms also allows for increased lash reduction in the splined interface when compared to a Belleville washer axially preloading a splined interface. As a result, the electric machine's longevity is increased due to a decrease in spline degradation caused by impacts between the splines and other factors.
In one example, the electric machine may further include a sensor (e.g., a resolver) coupled to the second rotational component (e.g., rotor hub) and designed to generate a signal indicative of speed and/or position of the electric machine's rotor. Due to the lash reduction between the splines, accuracy of the sensor signal is drastically increased. In particular, electromagnetic (EM) modulation in the machine's stator may be more accurately controlled to increase motor efficiency, output, etc.
Further, in one example, the electric machine may include a second lash reducing spring positioned between a second set of two adjacent splines in the splined interface. The first and second lash reducing springs may be positioned on radially opposing sides of the splined interface to balance rotational loading on the rotor bearing. As a result, the likelihood of bearing degradation caused by imbalanced rotational loading is considerably reduced.
It should be understood that the summary above is provided to introduce in simplified form a selection of concepts that are further described in the detailed description. It is not meant to identify key or essential features of the claimed subject matter, the scope of which is defined uniquely by the claims that follow the detailed description. Furthermore, the claimed subject matter is not limited to implementations that solve any disadvantages noted above or in any part of this disclosure.

Electric machine and method for manufacture of an electric machine


A quiet fill water system for a washing machine comprises a washing tub having an outer wall and an entry port disposed within the outer wall and a valve having a water inlet and a water outlet. A water reservoir is coupled to the outer wall, the water reservoir having a tube entry port, a cup-shaped bottom portion and a water outlet wherein the water outlet is mated with the outer wall entry port so as to provide fluid communication between the water reservoir and the washing tub. A capillary tube having a first end, a second end and a tip portion is disposed such that the first end is coupled to the water outlet of the valve and the second end is positioned within the tube entry port so that the tip portion is disposed within the cup-portion of the water reservoir at a lower position relative to the water outlet such that a quiescent reservoir of water is formed during a fill period so as to decrease the level of noise of the fill period.

This invention relates to washing machines and more specifically to quiet water fill systems for washing machines.
Conventional washing machines, for example dishwasher machines, clothes washing machines and the like, wash articles in an internal washing tub. During the washing of these articles, the washing machines typically produce undesirable levels of noise. The "fill cycle," defined as the period the internal washing tub is filled with water, is a large contributor to the total noise levels of a washing cycle. There are two primary sources of noise during a fill cycle: valve noise; and tub noise. Valve noise results from water passing through the water entry valve, coupled with a high pressure drop across the valve that causes cavitation and related noise. Tub noise results from water directly entering the washing tub at a relatively high flowrate, colliding with the wall of the washing tub.
Therefore, it is apparent from the above that there is a need in the art for a quiet water fill system for washing machines.


Recommending applications based on call requests between applications is disclosed, including: receiving a plurality of sets of application call request recordings from respective ones of a plurality of client devices; using the plurality of sets of application call request recordings to generate association relationships between a first application and one or more other applications; determining a set of application recommendation information determined based at least in part on the association relationships between the first application and the one or more other applications; and sending the set of application recommendation information to a recipient client device.

With the rapid development of mobile communication technology and the arrival of the mobile media age, the mobile phone has become an essential mobile communication tool. Once simply a means of making telephone calls, the mobile phone has become increasingly smart and has evolved into a mobile platform for collecting and processing personal information. With the help of operating systems and a wide array of application software, the smart phone has become a mobile terminal.
The current approach to recommending applications mainly consists of a "related application" recommendation function, whereby similar applications are provided for some applications in an application store for downloading applications.
However, the correlations between applications in the existing approach to application recommendation are generally static. That is, the application store analyzes inter-application correlations based on static information, such as, for example, application classification or application developer, which is provided by the applications.
However, static correlations are preconfigured and do not necessarily reflect the relationships between applications when they are in use. Therefore, static correlations cause the current approach to application recommendation to be less useful because of how correlations between applications might change over time.

BANMA ZHIXING NETWORK (HONGKONG) CO., LIMITED


In one embodiment, a circuit is provided that includes a precharge device, a DNG FET transistor, and at least one pull-down FET transistor with a floating body. The precharge device is connected to a precharge node for charging it during a precharge state. The DNG FET transistor is connected between a DNG node and a charge sink for operably linking the DNG node to the charge sink during an evaluate state. In addition, the DNG transistor has an associated precharge leakage current. The at least one pull-down FET transistor has an input threshold voltage whose value is inversely affected by its floating body voltage. The at least one pull-down transistor is connected between the precharge node and the DNG node for discharging the precharge node during the evaluate state if so dictated by logical function input values applied to the pull-down transistors during the evaluate state. The DNG leakage current, during the precharge state, draws a sufficient amount of charge from the DNG node to maintain the at least one pull-down transistor body voltage(s) at a sufficiently low value so that the precharge node does not wrongfully evaluate to a discharge level during the evaluate state.

Dynamic devices are synchronous logic circuits that generate an output depending upon a predetermined combination of inputs for performing a logical function. Dynamic devices are characterized by two states, precharge and evaluate. In the precharge state, a precharge (or storage) node is charged to a known or predetermined voltage level. In the evaluate state, a logic section (or xe2x80x9ctreexe2x80x9d) of pull-down transistors configured to perform a basic logical function (e.g., NAND, NOR, or combination thereof) is given the opportunity to discharge the node to a second known or predetermined voltage level or to allow the charge to persist.
The logic section is typically connected between the precharge node and a controllable virtual ground (or DNG) node. In turn, the logical function input signals are connected to the gates of one or more of the transistors in the logic section tree for activating the logic section and xe2x80x9csinkingxe2x80x9d the charge at the precharge node through the DNG node if the logical function inputs satisfy the particular logical function being implemented. A transistor (commonly referred to as a DNG transistor) is typically connected between the DNG node and ground, and a precharge transistor is connected between the precharge node and a supply voltage. During a precharge state (when the logical inputs are not valid), the DNG transistor is turned off, and the precharge transistor is turned on so that the precharge node charges regardless of whether the logic section conducts between the precharge and DNG nodes. On the other hand, during an evaluate state, the DNG transistor turns on, and the precharge transistor turns off, thereby allowing the logic section to discharge the precharge node if so dictated by the logical function inputs.
Dynamic circuits are typically implemented with field effect transistors (xe2x80x9cFETxe2x80x9ds) including both P-type (xe2x80x9cPFETxe2x80x9d) and N-type (xe2x80x9cNFETxe2x80x9d) transistors. For example, in one common parallel NOR configuration, a PFET transistor, with its gate connected to a clock signal, is used as the precharge transistor; an NFET transistor, with the clock signal also connected to its gate input, is used as the DNG transistor; and two or more parallel NFET transistors connected between the precharge and DNG nodes, with the logical inputs connected to their gate inputs, are used as the pull-down transistors forming the logic section. In this configuration, when the clock signal is low (precharge state), the NFET DNG transistor turns off, and the precharge PFET transistor turns on to charge the precharge node. Conversely, when the clock signal is high (evaluate state), the precharge PFET transistor turns off, and the DNG NFET transistor turns on to discharge the precharge node if the logic section is activated by the logical function inputs.
With reference to FIG. 1, a non-idealized equivalent circuit 100B is shown for a conventional FET transistor 100A (which happens to be an NFET transistor Q1). The equivalent circuit 100B comprises a parasitic bipolar junction transistor (xe2x80x9cBJTxe2x80x9d) portion Q1B connected in parallel across a FET portion Q1A. As is depicted in the equivalent circuit 100B, the FET Q1 has an associated drain leakage current, IL, which has components from both the FET portion Q1A and the parasitic bipolar portion Q1B. It also has a xe2x80x9cbody,xe2x80x9d which corresponds to the base of the parasitic BJT In circuit analysis and design, the body is normally not considered because with most FET manufacturing processes, it is connected to either the supply voltage or ground, which effectively eliminates its influence on the FET. However, with partially depleted silicon-on-insulator (xe2x80x9cSOIxe2x80x9d) processes, the body is left to float between the drain and the source. This leads to several adverse effects when such FETs are used in dynamic circuits. First, it decreases the pull-down transistors"" input threshold levels, which increases their leakage currents attributable to their equivalent FET portions. Second, during the evaluate state it allows the equivalent parasitic bipolar portions to be activated, which increases their leakage currents at this critical time.
A FET transistor has an associated input threshold voltage, VT, that determines the required input voltage, VGS, for turning it on. Thus, for example, with an NFET transistor, if its input voltage (VGS) is greater than the input threshold voltage level (VT), then the FET is said to bexe2x80x9cturned on.xe2x80x9d However, even when VGS is less than VT, there is still a finite amount of drain current, which is referred to as sub-threshold leakage current. This sub-threshold leakage current, which is part of the FET""s overall leakage current, IL, increases as VGSxe2x88x92VT increases. In fact, in the subthreshold region the amount of drain current, ID, that can flow through the FET is exponentially proportional to the input voltage, VGS. Unfortunately, one physical characteristic of FET transistors is that their input threshold voltages are inversely proportional to their body voltages. For example, with NFET transistors, as their body voltages increase, their input threshold levels decrease. Thus, with partially depleted SOI NFETs whose body voltages are allowed to float upward, their input threshold voltages are lowered, which exponentially increases their leakage currents due to the ambient electrical noise at their gate inputs. When such FETs are used as pull-down transistors in dynamic circuits, this increased leakage current causes them to be more susceptible to wrongfully discharging the precharge node.
The upwardly floating body voltages impose even greater problems as a result of the parasitic BJT portions. During the precharge state, the DNG node is normally charged to a level that is approximately an input threshold voltage, VT, lower than the voltage at the precharge node. This means that the body voltage will be somewhere between these two relatively high voltages. However, when the circuit evaluates, and the DNG node discharges to ground, a significant voltage drop is then induced between the body and the DNG node, which corresponds to the emitter of the parasitic bipolar transistor Q1B. This forwardly biases the bipolar transistor thereby producing xe2x80x9ccollectorxe2x80x9d current, which adds to the overall FET leakage current, IL. Thus, the leakage current in the logic section is significantly increased during the evaluate state, which can cause the circuit to wrongfully evaluate to a discharged level even though the logic section is not suppose to be activated based on the logical input values.
Several different solutions have been used to address this problem. With one solution, an NFET transistor with an inverted clock input is connected across the DNG transistor to bleed away the charge at the DNG node during the precharge state and thereby lower the body voltages of the pull-down transistors. This xe2x80x9cbleed-offxe2x80x9d transistor is sized large enough to sufficiently discharge the DNG node yet small enough to ensure that the precharge node properly charges during the precharge state. Unfortunately, this solution is disfavored because it requires three extra transistorsxe2x80x94one transistor for discharging the DNG node and two transistors for providing an inverted clock input.
Another solution incorporates the use of an over-sized holder transistor. A holder transistor is typically used in a dynamic circuit to supply additional charge to the precharge node for xe2x80x9choldingxe2x80x9d it charged -even when the pull-down transistors leak charge through to the DNG node. This solution simply involves using an over-sized holder transistor for compensating against the increased pull-down transistor leakage currents caused by their increased body voltages. Unfortunately, this solution is also disfavored because it excessively slows down the circuit""s ability to precharge and evaluate, which impairs its ability to operate at high-performance frequencies.
The present invention is directed to a system and method for dynamic circuits. In one embodiment, the circuit includes a precharge device, a DNG FET transistor, and at least one pull-down FET transistor with a floating body. The precharge device is connected to a precharge node for charging it during a precharge state. The DNG FET transistor is connected between a DNG node and a charge sink for operably linking the DNG node to the charge sink during an evaluate state. In addition, the DNG transistor has an associated precharge leakage current. The at least one pull-down FET transistor has an input threshold voltage whose value is inversely affected by its floating body voltage. The at least one pull-down transistor is connected between the precharge node and the DNG node for discharging the precharge node during the evaluate state if so dictated by logical function input values applied to the pull-down transistors during the evaluate state. The DNG leakage current, during the precharge state, draws a sufficient amount of charge from the DNG node to maintain the at least one pull-down transistor body voltage(s) at a sufficiently low value so that the precharge node does not wrongfully evaluate to a discharge level during the evaluate state.

System and method for improving performance of dynamic circuits


An optical focus actuator for a data storage system having an adjustable optical lens includes support member having top and bottom surfaces and a central throughbore extending between the top and bottom surfaces, an elongated movable lens support bobbin disposed in the throughbore, an electromagnetic actuator disposed between the support member and the movable lens support bobbin for moving the lens for adjustment thereof, and a wire support comprising a plurality of upper wire loops extending in opposed directions and looped about an upper end of the movable support bobbin and a plurality of lower loops extending in opposed directions and looped about a lower end of the movable support bobbin, the loops being supported at both ends by said support member.

The present invention relates to the storage and retrieval of information from optical media and pertains particularly to an improved high bandwidth focus actuator and suspension system for use in an optical disk drive.
Optical disk drives are in widespread use and include video disk drives used in video applications as well as optical disk drives that serve as a peripheral memory storage devices in computer systems. The latter category includes write-once-read-mostly (WORM) drives, CD-ROM drives and magneto-optic (erasable) drives.
In one form of optical media, information is encoded in concentric or spiral tracks on the surface of a disk by physically altering minute regions of the media to change the reflectivity thereof. Data is written and read from the optical media utilizing a laser beam which is reflected off of the media. It is critical to maintain the laser beam in focus at the appropriate level of the optical media.
Optical focusing systems are well known for this purpose and typically include an optical head having an adjustable objective lens to allow focusing of a laser beam onto a storage media. Typically the lens is directly driven by an electromagnetic motor such as a voice coil motor (VCM). The lens is usually mounted on a movable portion of the motor. The suspension of the lens mount is critical and must allow for very precise vertical movement.
For some applications, it is desirable to have an objective lens move only in the axial direction to maintain focus and not move in other directions. It is also highly desirable for the structure to have minimum resonances.
One frequently used approach is a plain bearing constraint and a moving VCM. However, hardware using this approach may suffer from wear and stick slip induced non-repeatability of motion. Adequate constraint of tilt and lateral motion is difficult.
Another approach uses a moving magnet for generating the force and a cantilever arrangement which allows for horizontal displacement. Such a system is disclosed in U.S. Pat. No. 4,633,456.
The prior art systems have a number of drawbacks including low efficiency and inadequate bandwidth. Another drawback is lack of adequate constraint against lateral motion and tilt. It is therefore desirable that an improved suspension system and high performance actuator be available for use in the optical head of an optical disk drive system.

Suspension system for focus actuator of an optical disk drive

International Business Machines Corporation