A semiconductor apparatus includes a semiconductor substrate that has a diameter of 2 inches or larger, and an N-type semiconductor layer that is stacked on the semiconductor substrate using a material including gallium nitride (GaN). A median of a plurality of measured values of the concentration of carbon (C) at a plurality of locations on a face of a region of the N-type semiconductor layer is equal to or lower than 1.0×1016 cm−3. The maximum value in difference between the median and the other measured values is lower than 5×1015 cm−3.

1. Technical Field
The present invention relates to a semiconductor apparatus and a method of manufacturing the same.
2. Related Art
As semiconductor apparatuses (semiconductor devices and semiconductor elements) used for controlling electric power, a gallium nitride (GaN) based semiconductor apparatus is known, in which an N-type semiconductor layer is stacked on a semiconductor substrate. The N-type semiconductor layer contains gallium nitride (GaN) as a main material, and silicon (Si) as a donor (dopant or impurities). As such N-type semiconductor layers, one is known in which an n−-GaN layer has a low donor concentration of about 1×1016 cm−3 for the primary purpose of increasing withstanding voltage (e.g., see Patent Document 1).
In general, such N-type semiconductor layer is manufactured by a metal organic chemical vapor deposition (MOCVD) method. In MOCVD, trimethylgallium (TMGa: (CH3)3Ga) is used as a source of gallium (Ga). As a source of nitrogen, ammonia (NH3) is used. Hydrogen is used as a carrier gas. Silane is used as an N-type dopant source.
[Patent Document 1] JP-A-2011-35066 A
When the N-type semiconductor layer has a low donor concentration of about 1×1016 cm−3, the N-type semiconductor layer can be easily affected by other impurities to cause a non-uniform distribution of the concentration of donor, so that it is difficult to achieve uniform electric properties on the substrate. Such variation in the concentration of donor affects withstanding voltage in interfaces with other semiconductor layers and electrodes. In particular, when the N-type semiconductor layer is formed on a semiconductor substrate having a large diameter of more than 2 inches by vapor deposition, the N-type semiconductor layer is easily affected by impurities, such as carbon. Therefore, there is a problem in that, when a plurality of chips are cut out from the semiconductor wafer, variation in product quality is prone to be caused in each chip.
The present invention is directed to solve the above problems, and accordingly, can be embodied in the following forms.
(1) According to an aspect of the invention, a semiconductor apparatus includes a semiconductor substrate that has a diameter of 2 inches or larger and an N-type semiconductor layer that is stacked on the semiconductor substrate using a material including gallium nitride (GaN). A median of a plurality of measured values of the concentration of carbon (C) at a plurality of locations on a face of a region of the N-type semiconductor layer is equal to or lower than 1.0×1016 cm−3, and the maximum value in difference between the median and the other measured values is lower than 5×1015 cm−3.
Carbon (C) of the N-type semiconductor layer has an action of compensating and reducing a donor of the N-type semiconductor layer. According to the semiconductor apparatus of the above form, because the median of a plurality of measured values of the concentration of carbon (C) is equal to or lower than 1.0×1016 cm−3 and the maximum value in difference between the median and the other measured values is lower than 5×1015 cm−3, the concentration of carbon (C) allows a concentration of donor in the region of the N-type semiconductor layer to be uniform, without non-uniformly compensating the donor by carbon (C). Therefore, when a plurality of chips are cut out from a substrate of more than 2 inches to form semiconductor apparatuses, the function of the donor in each of the obtained semiconductor apparatuses can be stable and uniform.
(2) In the configuration of (2), the N-type semiconductor layer contains silicon as a donor, a median of a plurality of measured values of the concentration of the donor at a plurality of locations on the face of the region of the N-type semiconductor layer is equal to or lower than 1.4×1016 cm−3, and the maximum value in difference between the median and the other measured values is lower than 5×1015 cm−3.
If the concentration of donor is lower as in the above form, the donor can be easily affected by variation in the concentration of carbon (C). In the present form, because the concentration of carbon (C) is reduced, variation in action of the donor can be reduced.
(3) In the semiconductor apparatus of (1) or (2), electrodes are respectively connected to the substrate and the N-type semiconductor layer.
(4) In the semiconductor apparatus of (1) or (2) further includes a P-type semiconductor layer that is stacked on the N-type semiconductor layer, and an additional N-type semiconductor layer that is stacked on the P-type semiconductor layer. A drain electrode is connected to the substrate, a source electrode is connected the additional N-type semiconductor layer, and a gate electrode is connected to an insulation layer on the P-type semiconductor layer.
As aspects of the semiconductor apparatus, various configurations can be employed.
(5) According to another aspect of the invention, a method of manufacturing the semiconductor apparatus according to any one of (1) to (4) includes forming the N-type semiconductor layer by crystal growth using a group III raw material including trimethylgallium (TMGa) and a group V raw material including ammonia (NH3). V/III, a mole ratio of the group V raw material to the group III raw material, is a range of 2100 to 4000.
With the configuration of (5), the N-type semiconductor layer is formed by crystal growth using the group III raw material including trimethylgallium (TMGa) and the group V raw material including ammonia (NH3). By using such V/III, the concentration of carbon (C) can be set in the range as described above. Meanwhile, in the following description, the V/III means a mole ratio of the group V raw material to the group III raw material.
According to another aspect of the invention, a method of manufacturing a semiconductor apparatus having an N-type semiconductor layer stacked on a semiconductor substrate using a material including gallium nitride (GaN) includes a first step of arranging a plurality of the substrates in a region of more than 2 inches in diameter, and a second step of forming the N-type semiconductor layer by crystal growth, using a group III raw material including trimethylgallium (TMGa) and a group V raw material including ammonia (NH3). The second step is adjusted so that a V/III, a mole ratio of the group V raw material to the group III raw material, is within a range of 2100 to 4000, and also so that a median of a plurality of measured values of the concentration of carbon (C) at a plurality of locations on a face of a region of the N-type semiconductor layer is equal to or lower than 1.0×16 cm−3 and the maximum value in difference between the median and the other measured values is lower than 5×1015 cm−3.
(7) In the configuration of (6), the second step is adjusted so that silicon (Si) is contained as a donor, and also so that a median of a plurality of measured values of the concentration of the donor at a plurality of locations on the face of the region of the N-type semiconductor layer is equal to or lower than 1.4×1016 cm−3, and the maximum value in difference between the median and the other measured values is lower than 5×1015 cm−3.
With the configuration of (7), a plurality of the substrates are arranged in the region of more than 2 inches and in this state, the N-type semiconductor layer is formed thereon by crystal growth. In this form, the N-type semiconductor layer can be concurrently formed on a plurality of the substrates in the region of more than 2 inches.
In a configuration in which an N-type semiconductor layer added with a donor of a low concentration is stacked, the present invention allows the concentration of the donor to be uniform over a broad range on the face of the N-type semiconductor layer, even on large semiconductor substrates of more than 2 inches.
A. Embodiments
(1) Schematic Configuration of a Semiconductor Apparatus 10
FIG. 1 is a sectional view schematically showing a configuration of the semiconductor apparatus 10. The semiconductor apparatus 10 is a GaN-based semiconductor apparatus formed using gallium nitride. The semiconductor apparatus mentioned herein is equivalent to one which includes a semiconductor wafer according to embodiments and the peripheral components. In addition, FIG. 1 is a view illustrated to easily understand technical features of the semiconductor apparatus 10, not intended to exactly depict dimensions of each part thereof. In the present embodiment, the semiconductor apparatus 10 is used for controlling electric power and thus, is referred to as a power device, also so-called a vertical MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).
The semiconductor apparatus 10 is a NPN-type semiconductor apparatus including a substrate 110, a first N-type semiconductor layer 120, a P-type semiconductor layer 130 and a second N-type semiconductor layer 140, and has a structure in which the first N-type semiconductor layer 120, the P-type semiconductor layer 130 and the second N-type semiconductor 140 are stacked in this order on a substrate 110 by crystal growth using a metal organic chemical vapor deposition (MOCVD) method.
In FIG. 1, XYZ axes perpendicular to each other are shown. The X-axis of XYZ axes in FIG. 1 is an axis along a stacking direction, in which the first N-type semiconductor layer 120 is stacked on the substrate 110. A +X-axis direction of the X-axis direction along the X-axis is a direction directing from the substrate 110 to the first N-type semiconductor layer 120, and a −X-axis direction is a direction opposite to the +X-axis direction. The Y-axis and Z-axis of XYZ axes in FIG. 1 are axes perpendicular to the X-axis and also to each other. A +Y-axis direction of the Y-axis direction along the Y-axis is a direction directing from left to right in the paper plane of FIG. 1, and a −Y-axis direction is a direction opposite to the +Y-axis direction. A −Z-axis direction of the Z-axis direction along the Z-axis is a direction directing from the back side to the front side with respect to the paper plane of FIG. 1, and a +Z-axis direction is a direction opposite to the +Z-axis direction.
(2) Configuration of Each Part of the Semiconductor Apparatus 10
(2)-1 Substrate 110
The substrate 110 has a plate shape extending along a plane parallel to the Y-axis and Z-axis. In the present embodiment, the substrate 110 consists essentially of gallium nitride (GaN) and also contains silicon (Si) as a donor at a concentration higher than that in the first N-type semiconductor layer 120. In the present embodiment, the average concentration of silicon (Si) over the entire region of the substrate 110 is equal to or higher than 1.0×1018 cm−3. The substrate 110 may be a part configured to fix and support each semiconductor layer of the semiconductor apparatus 10, and in other embodiments, may also be a part consisting essentially of, for example, silicon (Si).
The substrate 10 has an interface 111 and an interface 112. The interface 111 of the substrate 110 is a surface parallel to the Y-axis and the Z-axis and orienting to the −X-axis direction. The interface 112 of the substrate 110 is a surface parallel to the Y-axis and the Z-axis and orienting to the +X-axis direction, and is opposed to the interface 111. The interface 112 is adjacent to the first N-type semiconductor layer 120.
A thickness of the substrate 110 is a distance between the interface 111 and the interface 112 in the X-axis direction, and in the present embodiment, is 320 μm (micrometer). In other embodiments, the thickness of the substrate 110 may be any value selected from a range of 100 μm to 1 mm (millimeter).
In the present embodiment, an electrode 210, also referred as to a drain electrode, is formed on the interface 111 of the substrate 110. In the embodiment, the electrode 210 is an electrode having a structure, in which a layer formed of aluminum (Al) is stacked on a layer formed of titanium (Ti). In other embodiments, the electrode 210 may be an electrode formed of at least one of conductive materials, such as, platinum (Pt), Co (cobalt), palladium (Pd), nickel (Ni), and gold (Au), other than Ti and Al.
(2)-2 First N-Type Semiconductor Layer 120
The first N-type semiconductor layer 120 is formed on the substrate 110 in a stacked state, and thus forms a layer extending on a plane parallel to the Y-axis and the Z-axis. The first N-type semiconductor layer 120 consists essentially of gallium nitride (GaN), and contains silicon (Si) as a donor at a concentration lower than that in the second N-type semiconductor layer 140. A range of the concentration of silicon (Si) will be described below. The first N-type semiconductor layer 120 is also referred as to 'n−-GaN'.
The first N-type semiconductor layer 120 has an interface 121 and an interface 122. The interface 121 of the first N-type semiconductor layer 120 is a surface parallel to the Y-axis and the Z-axis and orienting to the −X-axis direction. The interface 121 is adjacent to the substrate 110. The interface 122 of the first N-type semiconductor layer 120 is a surface parallel to the Y-axis and the Z-axis and orienting to the +X-axis direction, and is opposed to the interface 121. The interface 122 is adjacent to the P-type semiconductor layer 130.
A thickness of the first N-type semiconductor layer 120 is a distance between the interface 121 and the interface 122 in the X-axis direction, and in the present embodiment, is 10 μm. In other embodiments, the thickness of the first N-type semiconductor layer 120 may be any value selected from a range of 5 to 15 μm.
(2)-3 P-Type Semiconductor Layer 130
The P-type semiconductor layer 130 is formed on the first N-type semiconductor layer 120 in a stacked state, and thus forms a layer extending on a plane parallel to the Y-axis and the Z-axis. The P-type semiconductor layer 130 consists essentially of gallium nitride (GaN), and contains magnesium (Mg) as an acceptor. In the present embodiment, the average concentration of Mg over the entire region of the P-type semiconductor layer 130 is equal to or higher than 1.0×1018 cm−3 and equal to or lower 1.0×1020 cm−3. The P-type semiconductor layer 130 is also referred as to 'p-GaN'.
The P-type semiconductor layer 130 has an interface 131 and an interface 132. The interface 131 of the P-type semiconductor layer 130 is a surface parallel to the Y-axis and the Z-axis and orienting to the −X-axis direction. The interface 131 is adjacent to the first N-type semiconductor layer 120. The interface 132 of the P-type semiconductor layer 130 is a surface parallel to the Y-axis and the Z-axis and orienting to the +X-axis direction, and is opposed to the interface 131. The interface 132 is adjacent to the second N-type semiconductor layer 140 and an electrode 230.
A thickness of the P-type semiconductor layer 130 is a distance between the interface 131 and the interface 132 in the X-axis direction, and in the present embodiment, is 1 μm. In other embodiments, the thickness of the P-type semiconductor layer 130 may be any value selected from a range of 0.3 to 2 μm.
(2)-4 Second N-Type Semiconductor Layer 140
The second N-type semiconductor layer 140 is formed on the P-type semiconductor layer 130 in a stacked state, and thus forms a layer extending on a plane parallel to the Y-axis and the Z-axis. The second N-type semiconductor layer 140 consists essentially of gallium nitride (GaN), and contains silicon (Si) as a donor at a concentration higher than that in the first N-type semiconductor layer 120. In the present embodiment, the average concentration of silicon (Si) over the entire region of the second N-type semiconductor layer 140 is equal to or lower than 1.0×1019 cm−3. The second N-type semiconductor layer 140 is also referred as to 'n+-GaN'.
The second N-type semiconductor layer 140 has an interface 141 and an interface 142. The interface 141 of the second N-type semiconductor layer 140 is a surface parallel to the Y-axis and the Z-axis and orienting to the −X-axis direction. The interface 141 is adjacent to the P-type semiconductor layer 130. The interface 142 of the second N-type semiconductor layer 140 is a surface parallel to the Y-axis and the Z-axis and orienting to the +X-axis direction, and is opposed to the interface 141. The interface 142 is adjacent to an electrode 240.
A thickness of the second N-type semiconductor layer 140 is a distance between the interface 141 and the interface 142 in the X-axis direction, and in the present embodiment, is 0.2 μm. In other embodiments, the thickness of the second N-type semiconductor layer 140 may be any value selected from a range of 0.1 to 0.5 μm.
(2)-5 Electrodes and Insulation Layers
Electrodes are formed on the substrate and each layer. Namely, the electrode 230, also referred to as a P body electrode, is formed on the interface 132 of the P-type semiconductor layer 130. The electrode 230 reduces electrons and positive holes generated in the P-type semiconductor layer 130, thereby enhancing withstanding voltage. The electrode 240, also referred to as a source electrode, is formed on the interface 142 of the second N-type semiconductor layer 140. An insulation layer 260 is formed to extend from an upper surface of the first N-type semiconductor layer 120 to a side surface (the right side in the figure) of the P-type semiconductor layer 130, and an insulation layer 270 is formed to extend from the upper surface of the first N-type semiconductor layer 120 to a side surface (the left side in the figure) of the second N-type semiconductor layer 140 by way of a side surface of the P-type semiconductor layer 130. The insulation layers 260 and 270 are layers formed of aluminum oxide (Al2O3), silicon dioxide (SiO2), or the like. On the insulation layer 270, an electrode 250, also referred to as a gate electrode, is formed.
(3) Method of Manufacturing the Semiconductor Apparatus 10
FIG. 2 is a flow chart showing the method of manufacturing the semiconductor apparatus 10. Upon manufacturing of the semiconductor apparatus 10, a manufacturer firstly prepare a MOCVD apparatus for implementing the metal organic chemical vapor deposition (MOCVD) method and then arrange a plurality of substrates 110 in a reaction chamber of the MOCVD apparatus (step P122). Preferably, substrates having a diameter of more than 2 inches are used as the substrates 110. In this step, the substrates 110 having a diameter of 2 inches or less may be arranged in a closely-packed state using a plurality of substrates thereof (e.g., seven substrates). The substrates 110 have a thickness of 300 μm to 500 μm and are doped with silicon (Si). The concentration thereof is 1.0×1018 cm−3.
In a subsequent step P124, the MOCVD apparatus forms the first N-type semiconductor layer 120 on the substrate 110 by crystal growth using silane as a dopant source, based on operations of the manufacturer. Trimethylgallium (TMGa) as a group III raw material, ammonia (NH3) as a group V raw material, and silane as an N-type dopant source are supplied to the reaction chamber through a piping of the MOCVD apparatus, using hydrogen (H2) as a carrier gas. In this case, the first N-type semiconductor 120 is formed to have, for example, a thickness of 5 to 15 μm. Meanwhile, V/III of the sources, a growth pressure, a concentration of silicon (Si) and the like will be described below.
Then, in a step P126, the MOCVD apparatus forms the P-type semiconductor layer 130 on the first N-type semiconductor layer 120 by crystal growth using CP2Mg (bis(cyclopentadienyl)magnesium) as a dopant source, based on operations of the manufacturer.
In a subsequent step P128, the MOCVD apparatus forms the second N-type semiconductor layer 140 on the P-type semiconductor layer 130 by crystal growth using silane as a dopant source, based on operations of the manufacturer. The concentration of silicon (Si) in the second N-type semiconductor layer 140 is higher than that in the first N-type semiconductor layer 120. As conditions of the step P128, the same conditions as those in the step P124 with respect to sources, pressure and the like, except for the concentration of silicon (Si), can be employed.
Next, in a step P130, the manufacturer takes an intermediate product of the semiconductor apparatus 10 out of the MOCVD apparatus, and forms the electrodes 210, 230, 240 and 250 and the insulation layers 260 and 270, respectively, on the intermediate product. Thereby, the semiconductor apparatus 10 is completed.
(4) Operations/Effects of the Embodiment
(4)-1 A concentration of carbon (C) and a concentration of donor in the step (P124) of forming the first N-type semiconductor layer 120 will be described.
FIG. 3 is an explanatory view explaining a state where a plurality of substrates 110 are arranged in the reaction chamber. In FIG. 3, ones having a diameter of 2 inches were used as the substrates 110, and seven substrates 110 were arrange within an area of 6 inches to be arranged in a closely packed state. Namely, six substrates are arranged to surround one substrate 110. This is intended to equate placing seven GaN substrates of 2 inches with using a substrate of 6 inches in a pseudo manner, instead of using substrates of 2 inches or greater (e.g., 6 inches). Then, the first N-type semiconductor layer 120 was grown and stacked on the plurality of substrates 110 and subsequently, the concentrations of carbon (C) and donor on a face of the first N-type semiconductor layer 120 was investigated.
FIG. 4 is a graph explaining a relationship of the concentration of carbon (C) on the face of the first N-type semiconductor layer 120 and the V/III, in which variation in the concentration of carbon (C) of the first N-type semiconductor layer 120 grown on the substrates 110 while varying the V/III is illustrated. The V/III means a mole ratio of the group V raw material to the group III raw material. Specifically, to obtain the graph in FIG. 4, the present inventors used trimethylgallium (TMGa) as the group III raw material and also used ammonia (NH3) as the group V raw material. Three kinds of V/III, i.e., 1473 (first group), 2000 (second group), and 2506 (third group), were used. Then, a plurality of samples (seven substrates), in which an N-type semiconductor layer was formed on each of substrates of 2 inches, were manufactured and the concentrations of carbon (C) thereof were measured. The concentrations of carbon (C) were measured using a secondary ion-microprobe mass spectrometer (SIMS). In this case, each of the measured values was obtained by sampling the concentration of carbon (C) on the face of each of the seven substrates. FIG. 5 is an explanatory view explaining a relationship of concentration differences between a median and other measured values in the concentrations of carbon (C) and the V/III. As shown in FIG. 5, the concentrations of carbon (C) were studied using differences between the median and the other values in the measured values.
As shown in FIGS. 4 and 5, the median of the concentration of carbon (C) in the first group (V/III: 1473) is 1.4×1016 cm−3, and the maximum value in difference between the median and the other measured values is 9.3×1015 cm−3. The median of the concentration of carbon (C) in the second group (V/III: 2000) is 8.7×1015 cm−3, and the maximum value in difference between the median and the other measured values is 5.0×1015 cm−3. The median of the concentration of carbon (C) in the third group (V/III: 2506) is 7.4×1015 cm−3, and the maximum value in difference between the median and the other measured values is 2.6×1015 cm−3. If comparing the first to third groups, it can be found that, as the V/III is increased, the median of the concentration of carbon (C) is decreased from 1.4×1016 cm−3 to 7.4×1015 cm−3 and also the maximum value in difference between the median and the other measured values is narrowed from 9.3×1015 cm−3 to 2.6×1015 cm−3, and thereby variation in concentration is reduced.
FIG. 6 is a graph explaining a relationship of a concentration of a donor on the face of the first N-type semiconductor layer 120 and the V/III. Correspondingly to FIG. 4, the concentrations of donor with respect to the V/III (the first to third groups) were measured on the seven substrates. The concentrations of donor were obtained by a C-V measurement. In this case, the measured values were obtained by sampling the concentration of donor on the face of each of the seven substrates, similarly to the concentration of carbon (C) in FIG. 4. FIG. 7 is an explanatory view explaining a relationship of concentration differences between a median and other measured values in the concentrations of donor and the V/III. As shown in FIG. 7, the concentrations of donor were studied using differences between the median and the other values in the measured values.
As shown in FIGS. 6 and 7, the median of the concentration of donor in the first group (V/III: 1473) is 3.0×1016 cm−3, and the maximum value in difference between the median and the other measured values is 7.0×1015 cm3. The median of the concentration of donor in the second group (V/III: 2000) is 2.0×1016 cm−3, and the maximum value in difference between the median and the other measured values is 4.2×1015 cm−3. The median of the concentration of donor in the third group (V/III: 2506) is 7.3×1015 cm−3, and the maximum value in difference between the median and the other measured values is 2.6×1015 cm−3. If comparing the first to third groups, as the V/III is increased, the median of the concentration of donor is decreased from 3.0×1016 cm−3 to 7.3×1015 cm−3 and also the maximum value in difference between the median and the other measured values is narrowed from 7.0×1015 cm−3 to 2.6×1015 cm−3. Thus, it can be found that the concentrations of donor exhibit the same tendency as those in the concentrations of carbon (C). Namely, it can be found that the concentrations of silicon (Si) exhibit the same tendency as those in the concentrations of carbon (C). From this, it is conceived that the donor and the carbon have a relationship as described below.
Carbon (C) of the first N-type semiconductor layer 120 compensates the donor of the first N-type semiconductor layer 120, thereby reducing action of the donor. Accordingly, variation in concentration of the donor can be reduced by lowering the concentration of carbon (C) and also decreasing variation in concentration of carbon (C). By reducing variation in concentration of the donor, it is possible that, when a plurality of chips are cut out from the substrate 110 of more than 2 inches to form semiconductor apparatuses, the action of the donor in each of the obtained semiconductor apparatuses is stable and uniform.
The lower the variation in concentration of the donor, the more preferable it is, but for example, when a specification, in which, as a range in which products are less affected, the value of the concentration of donor is equal to or less than 1.4×1016 cm−3 and variation thereof with respect to the median is more than 5.0×1015 cm−3, is required, the concentration of donor is regulated below such values due to a limitation in an adjusting range of the concentration of carbon (C) in the first N-type semiconductor layer 120.
The first N-type semiconductor layer 120 is formed by crystal growth using the group III raw material including trimethylgallium (TMGa) and the group V raw material including ammonia (NH3). Accordingly, carbon (C) in trimethylgallium (TMGa) is entrained into the first N-type semiconductor layer 120. Therefore, when the V/III is increased, the concentration of carbon (C) in the N-type semiconductor layer can be decreased, but if the V/III is higher than 4000, the crystal growth rate is reduced, thereby decreasing productivity. On the other hand, if the V/III is lower than 2100, the concentration of carbon (C) is increased, thereby increasing variation in the concentration of donor. Therefore, the V/III of the group V raw material to the group III raw material adjusted to a range of 2100 to 4000 is preferably used.
Also, the range of the V/III is more preferably from 2500 to 3500, further more preferably, from 2500 to 3000. By using such V/III, the concentration of carbon (C) can be reduced, thereby decreasing variation in the concentration of donor.
(4)-2 The reason that the concentration of carbon (C) in the step (P126) of forming the P-type semiconductor layer 130 is set to be equal to or higher than 5.0×1016 cm−3 is described.
If the concentrations of carbon in the first and second N-type semiconductor layers 120 and 140 are equal to or lower than 1.0×1016 cm−3, the P-type semiconductor 130 becomes a rate-limiting factor in an electron mobility of the semiconductor apparatus 10. Therefore, to improve an ON resistance and the like of the semiconductor apparatus, it is requested that a channel mobility between the P-type semiconductor layer 130 and the insulation layer 270, i.e., a sheet conductivity σ[S] is higher, for example, that the sheet conductivity σ[S] of the channel is 40 μS or higher. Herein, the sheet conductivity a is expressed by the following equation (1).σ=μ·ε·Em/2  (1)                μ: channel mobility [cm2/Vs]        ε: dielective constant of the insulation layer [F/cm]        Em: breakdown voltage [V/cm]
Because ε and Em are determined by material properties, for example, if substituting ε=3×10−13 and Em=5×106, the channel mobility μ has to be equal to or higher than 50 cm2/Vs.
FIG. 8 is a graph explaining a relationship of the channel mobility μ and the concentration of carbon (C). A vertical axis represents the channel mobility μ and a horizontal axis represents the concentration of carbon (C) of the P-type semiconductor layer. In FIG. 8, it can be found that, as the concentration of carbon (C) in the P-type semiconductor layer 130 is increased, the electron mobility of the channel is increased. Here, it can be found that, when the channel mobility μ is set to be equal to or higher than 50 cm2/Vs, the concentration of carbon (C) in the P-type semiconductor layer 130 set to be equal to or higher than 5.0×1016 cm−3 is preferable.
FIG. 9 is a graph explaining a relationship of the concentration of carbon (C) and the V/III. To set the concentration of carbon (C) to be equal to or higher than t than 5.0×1016 cm−3, the following method can be employed in the step P126 of FIG. 2. Specifically, to obtain the graph in FIG. 9, the inventors used trimethylgallium (TMGa) as the group III raw material and also used ammonia (NH3) as the group V raw material, and also used as a doping source magnesium (Mg) of 1.0×1018 cm−3 to 1.0×1020 cm−3. Cases where the V/III was varied between 250 and 2500 and the pressure is set to 760 Torr and 200 Torr are investigated. A plurality of samples, in each of which a P-type semiconductor layer was formed, were manufactured and the concentrations of carbon (C) thereof were measured. The concentrations of carbon (C) were measured using a secondary ion-microprobe mass spectrometer (SIMS).
From FIG. 9, it was found that the concentration of carbon (C) of the P-typed semiconductor layer 130 is increased as the V/III is deceased. To set the concentration of carbon (C) to be equal to or higher than 5.0×1016 cm−3, the V/III has to be within a range represented by oblique lines in FIG. 9, i.e., 500 or lower. In addition, the V/III has to be 1 or higher to achieve a vapor deposition.
Also, although the pressure supplying the source gases was investigated with respect to cases of 200 to 760 Torr, carbon (C) can be increased in a case of 200 Torr. Herein, the pressure is preferably a range of 300 to 500 Torr, particularly preferably, 400 to 450 Torr.
Such concentration of carbon (C) can be easily set by adjusting the V/III and pressures of supplying the sources gases.
The concentration of carbon (C) of the P-type semiconductor layer 130 is preferably equal to or more than 5.0×1016 cm−3, but if considering influences of electric properties, such as withstanding voltage, of the semiconductor apparatus 10, preferably 1×1018 cm−3 or lower. In addition, the concentration of carbon (C) of the P-type semiconductor layer 130 is preferably five or more times larger than the concentrations of carbon (C) of the first and second N-type semiconductor layers 120 and 140, thereby enhancing the electron mobility. Particularly preferably, the concentration of carbon (C) of the P-type semiconductor layer 130 is seven or more times.
B. Other Embodiments
The present invention is not limited to the foregoing embodiments, examples or variants thereof, but can be embodied in various configurations without departing from the scope and sprits of the invention. For example, technical features in the embodiments, examples, and variants thereof corresponding to technical features in each of the forms described in the section "Summary of the Invention" can be appropriately modified and combined to solve some or all of the technical problems as described above, or to achieve some or all of the effects as described above. In addition, the technical features can be appropriately omitted, unless it is mentioned herein that the technical features are essential.
FIG. 10 is a sectional view showing a semiconductor apparatus according to another embodiment. The present embodiment is an example applied to a Schottky barrier diode. A semiconductor apparatus 300 is constituted by arranging an N-type semiconductor layer 320 of a GaN substrate 310, connecting an ohmic electrode 330 to an outer surface of the substrate 310, and then connecting a Schottky electrode 340 to an outer surface of the N-type semiconductor layer 320. As such, various configurations, in which an N-type semiconductor layer is formed on a substrate, can be employed as a semiconductor apparatus, to which the present invention can be applied.
In addition to the semiconductor wafer on which a concentration of carbon (C) or donor in semiconductor layers is adjusted, the semiconductor apparatus according to the present invention includes various components, such as electrodes, as the peripheral components of the semiconductor wafer. For example, the present invention can be embodied in aspects, such as an electric device having a semiconductor apparatus of the foregoing type or an apparatus for manufacturing a semiconductor apparatus of the foregoing type.

Semiconductor apparatus including N-type semiconductor layer


A communication device including a transmitting unit configured to perform transmission processing of a first signal, a receiving unit configured to perform reception processing of a second signal which responds to the first signal in a predetermined period determined by a time point of the transmission processing, and a determining unit configured to perform determination as to whether or not at least part of the first signal is correctly received at a transmission destination device on the basis of information acquired in process of the reception processing.

While, in a wireless LAN system which complies with IEEE 802.11, communication is performed using a frequency band for which a license is not required, there is a case where interference occurs due to influence by other systems which use a frequency band for which a license is not required. More specifically, in the case where a frequency band used by the wireless LAN system for communication overlaps with a frequency band used by other systems for communication, there is a case where signals transmitted from the respective systems interfere with each other. In recent years, various methods for reducing influence of such interference has been developed.
For example, Patent Literature 1 discloses a method for suppressing interference between a wireless LAN system which complies with IEEE 802.11 and a Zigbee system.

Communication device and communication control method


A steering control apparatus in which a steering shaft coupled to a steering wheel is mechanically separated from a turning mechanism to turn a turning wheel, a steering angle of the steering wheel is detected, and the turning mechanism turns the turning wheel by a turning angle corresponding to the steering angle, includes a hypercycloidal mechanism including an external tooth gear revolving in a housing according to rotation of the steering wheel, an Oldham coupling mechanism to extract only a self-rotating movement in a rotation movement of the external tooth gear as a self-rotating movement of a rotation disk, and a rotation regulating mechanism by engagement between a groove formed in the rotation disk and a projection projecting from the housing. Then, a compact mechanical steering angle regulating mechanism is provided in which an allowable rotation range of the steering wheel is made ±180 degrees or more, and a low output and low capacity motor is used, and reduction in size and in cost of the apparatus is realized.

1. Technical Field
The present invention relates to an improvement of a steering control apparatus which electrically controls steering of a steering wheel by using an electric motor.
2. Prior Art
In recent years, a steering control apparatus is proposed in which a steering shaft coupled to a steering wheel is mechanically separated from a turning mechanism to turn a turning wheel, and the interlocking control of these is electrically performed by SBW (Steer By Wire) control (hereinafter referred to as SBW control).
In this steering control apparatus, an operation direction and a steering angle of the steering wheel are detected, a turning angle corresponding to the steering angle in the operation direction is given, and steering corresponding to the operation of the steering wheel is performed.
At that time, an electric motor is driven according to the operation amount of the steering wheel, turning force of a turning actuator, lateral force generated in a vehicle, yaw rate, and the like, and the steering force is transmitted to the steering shaft through a speed reducer.
Besides, the steering force includes, in addition to a normal steering auxiliary force, a steering reaction force to stop the rotation of the steering wheel in the case where the turning actuator is put in the maximum turning position.
In the SBW control, since the steering reaction force is generated by the electric motor, when the turning actuator is put in the maximum turning position, it has been difficult to prevent the rotation of the steering wheel by the electric motor.
For example, when a lock state occurs, a large output motor is required in order to generate the steering reaction force against the steering torque by the driver, and since a large current flows through the motor, there has been a fear that the motor is burnt by overheating. However, when current is limited in order to prevent the burning of the motor, a torque necessary for the steering assist motor is not obtained, and it has been impossible to restrict the excessive steering of the driver.
Then, in order to regulate the rotation of the steering wheel within a restriction range of a certain fixed allowable angle, some sort of mechanical braking means has been required.
Incidentally, in the case where the rotation of the steering wheel is made ±180 degrees or less, when a projection provided on a rotation shaft is brought into contact with a projection provided on a fixing member such as a housing, the rotation of the steering wheel can be regulated within a certain allowable rotation range. However, since the allowable rotation range of a normal steering wheel is approximately 3 to 4 turns, when the allowable rotation range is made ±180 degrees or less, a tire turning angle relative to a rotation angle of the steering wheel becomes excessively large. As a result, there has been a problem that the behavior of the vehicle becomes sensitive and steering stability is impaired.
Thus, as set forth in, for example, JP-A-2000-16316, means for setting a rotation limit angle of a steering wheel is disclosed in which a first projection provided at a steering shaft, a second projection provided at a steering shaft housing, a third projection and a fourth projection engageable with the first projection are provided to realize rotatable support around the steering shaft over 360 degrees or more.


A full-color organic electroluminescence (OEL) display panel includes a substrate and a plurality of full-color OEL pixel devices in a matrix form as a display frame. Each of the pixel devices is composed of a plurality of sub-pixel regions, corresponding to R, G or B colors. Each of the specific color sub-pixel regions in the pixel device abuts the same specific color sub-pixel region of the adjacent pixel device thereof to form a double-sized emission area. With this arrangement of sub-pixel regions, it is easier to manufacture (a) high-resolution full-color OLED panels by a metal-mask alignment process, and (b) high-resolution full-color PLED panels by an ink-jet printing process.

1. Field of Invention
The invention pertains to an organic electroluminescence (OEL) display panel, and particularly to a full-color OEL display panel.
2. Background of the Related Art
An organic electroluminescence (OEL) device possesses the advantages of both a liquid crystal display (LCD) and an inorganic light-emitting diode (LED), such as compact size, high resolution, low power consumption, self-emission and fast response. Thus, an OEL device is considered to be a promising candidate for the next-generation of flat display panels.
Nowadays, full-color capability has gradually become a basic requirement for display panels. Furthermore, the quality demanded of full-color display panels has increased progressively. One important index for display panel quality is resolution that is defined by units of dpi (dot per inch). Generally, the pixel device of a display panel is composed of red (R), green (G) and blue (B) sub-pixel regions (hereinafter referred to as R, G and B sub-pixel regions) so as to provide full-color effects by mixing the light of these colors emitted from the individual sub-pixel regions of the pixel device. For current full-color LCD or OEL display panels, the sub-pixel regions therein are generally arranged in a stripe form, a mosaic form or a delta form.
The sub-pixel region arrangement based on the prior stripe form may be seen in FIG. 1A, in which each pixel device 100 in the matrix form is composed of R, G and B sub-pixel regions 110, 120, and 130 arranged row by row on a substrate. This arrangement is the simplest in terms of its manufacturing process, circuit design and driving method. However, the color mixing effect from the stripe-form display panel is the poorest. Refer to FIG. 1B for the prior sub-pixel region arrangement in a mosaic form, in which each two adjacent R, G and B sub-pixel regions 110, 120, and 130 are separated by the width of one sub-pixel region. Using this sub-pixel region arrangement, the color mixing effect from the corresponding display panel is improved. However, the circuit design and the driving method are complicated. Refer to FIG. 1C for the prior sub-pixel region arrangement in a delta form, in which each two adjacent R, G and B sub-pixel regions 110, 120, and 130 are separated by the width of 1.5 sub-pixel regions. Using this sub-pixel region arrangement, the color mixing effect from the corresponding display panel is further improved. However, the circuit design and the manufacturing process of the delta-form display panel are more complicated.
No matter which sub-pixel region arrangement is adopted in achieving full-color display capability, the manufacturing process of the sub-pixel regions determines the resolution of the full-color OEL display panel.
OEL devices generally are simply classified according to the EL materials used; the device using small molecules is called an organic light-emitting diode (OLED), the device using polymers is called a polymer light-emitting diode (PLED).
For a current full-color OLED device with RGB side-by-side format, a metal-mask alignment method is generally utilized to form the individual RGB sub-pixels. Therefore, the resolution of a OLED panel depends on the opening dimensions of the metal mask, which is related to the thickness of the metal mask and the ability of fine etching. Presently, the opening of a 30-micrometer(um)-thick metal mask is about 60 to 90 um. Therefore, a metal mask with 70 um opening can be utilized to make a full-color OLED panel with 121-dpi resolution. If a higher resolution of the OLED panel is required, a thinner metal mask or a finer etching skill has to be taken, which poses a considerable level of difficulty in the display panel manufacturing process.
For a full-color PLED panel, an ink-jet printing (IJP) method is often used, which is generally known as a precise and high-reproductive coating process. Hence, the IJP method could meet the requirements of automatic, miniaturized, low-cost, high-throughput and low-environment-impact manufacturing process. As for IJP, the higher the panel resolution is, the smaller the drop size is. However, in most situations, smaller ink drops pose a higher level of difficulty in the design of ink-jet head. Therefore, an important issue for the design of full-color OEL display panels is how to make an efficient arrangement of sub-pixel regions in the display panel.

Full-color organic electroluminescence display panel having sub pixel regions

Industrial Technology Research Institute


Methods are presented by which polymeric compositions, such as coating compositions, can be sprayed with compressed fluids, such as carbon dioxide, nitrous oxide, or ethane, at higher solids levels and with finer atomization to give improved spray application quality with reduced emission of solvent.

Many industrial processes spray compositions that contain viscous or solid polymeric components, such as coatings, adhesives, release agents, additives, gel coats, lubricants, and agricultural materials. To spray such materials, it has been common practice to use relatively large amounts of organic solvents. The solvents perform a variety of functions, such as to dissolve the polymers; to reduce viscosity for spraying; to provide a carrier medium for dispersions; and to give proper flow when the composition is sprayed onto a substrate, such as coalescence and leveling to form a smooth coherent coating film. However, the solvents released by the spray operation are a major source of air pollution.
There are several patents which disclose new spray technology that can markedly reduce organic solvent emissions, by using environmentally acceptable supercritical fluids or subcritical compressed fluids, such as carbon dioxide, to replace the solvent fraction in solvent-borne Compositions that is needed to obtain low spray viscosity: U.S. Pat. Nos. 4,923,720 and 5,108,799 disclose methods for using supercritical fluids for the spray application of coatings. U.S. Pat. No. 5,106,650 discloses methods for using supercritical carbon dioxide for the electrostatic spray application of coatings. U.S. Pat. No. 5,009,367 discloses methods for using supercritical fluids for obtaining wider airless sprays. U.S. Pat. No. 5,057,342 discloses methods for using supercritical fluids for obtaining feathered airless sprays. U.S. Pat. No. 4,882,107 discloses methods for using supercritical fluids to apply mold release agents, such as in the production of polyurethane foam. U.S. Pat. No. 5,066,522 discloses methods for using supercritical fluids to apply adhesive coatings.
Smith, in U.S. Pat. No. 4,582,731, issued Apr. 15, 1986; U.S. Pat. No. 4,734,227, issued Mar. 29, 1988; and U.S. Pat. 4,734,451, issued Mar. 29, 1988; discloses methods for the deposition of thin films and the formation of powder coatings through the molecular spray of solutes dissolved in supercritical fluid solvents, which may contain organic solvents. The concentration of said solutes are described as being quite dilute; on the order of 0.1 percent by weight. In conventional spray applications, the solute concentration is normally 50 times or more greater than this level.
The molecular sprays disclosed in the Smith patents are defined as a spray "of individual molecules (atoms) or very small cluster of solute" which are in the order of about 30 Angstroms in diameter. These "droplets" are more than 10.sup.6 to 10.sup.9 less massive than the droplets formed in conventional methods that Smith refers to as "liquid spray" applications.
The conventional atomization mechanism of airless sprays is well known and is discussed and illustrated by Dombroski, N., and Johns, W. R., Chemical Engineering Science 18: 203, 1963. The coating exits the orifice as a liquid film that becomes unstable from shear induced by its high velocity relative to the surrounding air. Waves grow in the liquid film, become unstable, and break up into liquid filaments that likewise become unstable and break up into droplets. Atomization occurs because cohesion and surface tension forces, which hold the liquid together, are overcome by shear and fluid inertia forces, which break it apart. However, viscous dissipation markedly reduces atomization energy, so relatively coarse atomization typically results. Liquid-film sprays are angular in shape and have a fan width that is about the fan width rating of the spray tip. They characteristically form a "tailing" or "fishtail" spray pattern, wherein coating material is distributed unevenly in the spray. Surface tension often gathers more liquid at the edges of the spray fan than in the center, which can produce coarsely atomized jets of coating that sometimes separate from the spray. As used herein, the phrases "liquid-film atomization" and "liquid-film spray" are understood to mean a spray, spray fan, or spray pattern in which atomization occurs by this conventional mechanism.
As disclosed in the aforementioned related patents, supercritical fluids or subcritical compressed fluids such as carbon dioxide are not only effective viscosity reducers, they can produce a new airless spray atomization mechanism, which can produce finer droplet size than by conventional airless spray methods and a feathered spray needed to apply high quality coatings. Without wishing to be bound by theory, the new type of atomization is believed to be produced by the dissolved carbon dioxide suddenly becoming exceedingly supersaturated as the spray mixture enters the spray orifice and experiences a sudden and large drop in pressure. This creates a very large driving force for gasification of the carbon dioxide, which overwhelms the cohesion, surface tension, and viscosity forces that oppose atomization and normally bind the fluid flow together.
A different atomization mechanism is evident because atomization appears to occur right at the spray orifice instead of away from it. Atomization is believed to be due not to break-up of a liquid film from shear with the surrounding air but, instead, to the force of the expanding carbon dioxide gas. Therefore, no liquid film is visible coming out of the nozzle. Furthermore, because the spray is no longer bound by cohesion and surface tension forces, it leaves the nozzle at a much wider angle than normal airless sprays and produces a "feathered" spray with tapered edges like an air spray. This produces a rounded, parabolic-shaped spray fan instead of the sharp angular fans typical of conventional airless sprays. The spray also typically has a much wider fan width than conventional airless sprays produced by the same spray tip. As used herein, the phrases "decompressive atomization" and "decompressive spray" are understood to mean to a spray, spray fan, or spray pattern that has the preceding characteristics.
Generally, the preferred upper limit of supercritical fluid addition is that which is capable of being miscible with the polymeric coating composition. This practical upper limit is generally recognizable when the admixture containing coating composition and supercritical fluid breaks down from one phase into two fluid phases. To better understand this phenomenon, reference is made to the phase diagram in FIG. 1, wherein the supercritical fluid is carbon dioxide. The vertices of the triangular diagram represent the pure components of a coating formulation admixed with carbon dioxide, which for the purpose of this discussion contains no water. Vertex A is solvent, vertex B is carbon dioxide, and vertex C represents a polymeric material. In this diagram, the polymer and the solvent are completely miscible in all proportions and the carbon dioxide and the solvent are likewise completely miscible in all portions, but the carbon dioxide and the polymer are not miscible in any portion, because the carbon dioxide is a non-solvent for the polymer. The curved line BFC represents the phase boundary between one phase and two phases. The point D represents a possible coating composition to which carbon dioxide has not been added. The point E represents a possible composition of a coating formulation admixture after addition of supercritical carbon dioxide. The added supercritical carbon dioxide is fully dissolved and has reduced the viscosity of the viscous coating composition to a range where it can be readily atomized by passing it through an orifice such as in an airless spray gun. After atomization, the carbon dioxide vaporizes, leaving substantially the composition of the original viscous coating composition. Upon contacting the substrate, the liquid mixture of polymer and solvent coalesces to produce a smooth coating film on the substrate. The film forming pathway is illustrated in FIG. 1 by the line segments EE'D (atomization and decompression) and DC (coalescence and film formation).
Although the supercritical fluid spray methods have been successful, one difficult problem that is created is that the reformulated polymeric composition, which is called a concentrate, has increasingly higher viscosity as higher levels of solvent are removed to further reduce solvent emissions. Concentrate viscosities typically increase from a conventional viscosity of about 100 centipoise to about 800 to 5000 centipoise or higher as more solvent is removed. Therefore, obtaining fine atomization becomes increasingly more difficult. This limits the amount of solvent that can be removed and hence the solids level that can be used in the concentrate. The poorer atomization gives poorer spray application quality such as poorer coatings. Therefore a need clearly exists for methods by which atomization can be enhanced when using supercritical fluids or subcritical compressed fluids to spray polymeric compositions in order to reach higher solids levels and to obtain finer atomization to obtain improved spray application quality.

Method for spraying polymeric compositions with reduced solvent emission and enhanced atomization

Union Carbide Chemicals & Plastics Technology Corporation


A magneto-optic data storage device includes multiple data storage levels, each storage level including a transparent dielectric seed layer and a partially transmissive recording layer having a multilayer structure including alternating layers of Co/Pt forming a superlattice structure disposed over the seed layer wherein the sputtering pressure for depositing the Co/Pt superlattice recording layer was below 40 mTorr; and wherein the seed layer is formed of ITO and has a thickness between 20 nm to 100 nm and was sputter deposited at a pressure of greater than 8 mTorr and less than or equal to 20 mTorr so that the superlattice recording layer has a high coercivity and high Kerr rotation and wherein the superlattice recording layer has a thickness of from between 2 to 20 nm.

An optical disk with multiple data levels is used to increase the capacity of the disk (for example, see references: Rubin et al SPIE vol. 2338 1994! 247; Holster et al, U.S. Pat. No. 4,450,553 1984!; Rosen et al U.S. Pat. No. 5,202,875; Best et al , U.S. Pat. No. 5,255,262; Best et al, U.S. Pat. No. 5,381,401). Data are selectively accessed by the laser beam from the different recording levels by changing the focal position of the focusing lens. The storage media used for this purpose and described in U.S. Pat. No. 5,381,401, are typically non-metallic transmissive materials such as dyes and GeTe-based phase change materials. A multilevel magneto-optical storage disk was prepared using a Co/Pt recording layer as mentioned in the commonly assigned U.S. Pat. No. 5,612,109. Even though these Co/Pt superlattice recording layers can be made thinner to increase the transmission through the layer, the materials were deposited at abnormally high sputtering pressure to increase the coercivity of the layer. At such high sputtering pressure, the recording layers become very porous and their Kerr rotation and reflectivity decrease significantly.

Magneto-optic data storage device having multiple data storage levels


Method of demultiplexing a composite signal light beam includes the steps of directing the composite signal light beam and a reference light beam at a photorefractive material, modulating the reference beam at a frequency about equal to the modulation frequency of a selected signal beam to be demultiplexed, and recovering the phase conjugate signal produced by interference of the reference beam with the composite signal light beam within the photorefractive material. The method also enables optical phase detection of the selected signal beam with respect to the reference beam.

The present invention relates to the field of optical phase sensitive detection.
It would be highly desirable to provide a technique which employs optical phase sensitive detection in numerous applications which previously benefitted from electronic phase sensitive detection. In addition, since optical phase sensitive detection can be applied to two-dimensional data such as images, massive parallel phase sensitive detection schemes could be employed to great advantage. For example, image multiplexing could be done by encoding numerous images at different frequencies in the same input channel. Using optical phase sensitive detection, the images can be easily separated out, thereby enabling real time video information to be transmitted in audio bandwidth channels. A special case would be an image comprising a large array of dots, each representing separate audio channels. This could be modulated with a GHz carrier frequency to increase effective data rates per unit bandwidth. This would be especially useful for images transmitted in coherent fiber bundles, where it should be possible to utilize the full optical bandwidth available. Applications to digital communication systems will increase throughput rates by taking advantage of the massive parallelism inherent in our novel technique.
Thus, two-dimensional phase shift keying can be realized using spatial light modulators (SLMs) to encode symbols in matrix form, and optical phase sensitive detection can be used to demodulate the symbol matrix. Further extensions to two-dimensional digital communication systems can be made such as frequency shift keying where coherent detection is important.

All optical phase sensitive detector and image demultiplexer

The United States of America as represented by the Secretary of the Air Force


Provided is a spindle motor. The spindle motor includes a rotatable shaft, a stator, a rotor, and a turntable. The stator is positioned around the shaft. The rotor includes a rotor yoke coupled to the shaft. The rotor is rotated with the shaft integratedly by a reaction with the stator. The turntable is coupled to the shaft. The rotor yoke and the turntable are coupled to each other and are fixed to the shaft.

The present disclosure relates to a spindle motor.
A spindle motor is used to rotate a disk to allow an optical pickup to read data recorded in the disk.
The spindle motor includes a rotor yoke coupled to a shaft. A disk can be rotated by loading the disk on the upper side of the rotor yoke.


A collapsible intermodal flat rack features a cargo deck with first and second arches pivotally mounted to the cargo deck. Each arch is provided with a crank mechanism including a gearbox having an input shaft and an output shaft. The output shaft is attached to the corresponding arch so that the arch may be moved between a storage position, where a top portion of the arch is located adjacent to the cargo deck, and a use position, where the top portion of the arch is elevated from the cargo deck, by actuation of the input shaft.

The term "intermodal" refers to a manner of transporting cargo by way of ships, semi-trailer trucks and/or railways. Cargo containers used during intermodal transport have been standardized to facilitate international trade. Indeed, the cargo containers must pass the certification tests of the International Organization for Standardization (ISO) for durability if they are to be used for both domestic and international transport. The moat widely used ISO classification of container is the 1AA class. Such containers are 40 foot long, 8 foot in wide and 8.5 foot high and have lifting and stacking points at the tops of their four corners. As a result, cargo handling and transport equipment, such as cranes, trucks, trailers, railway cars, etc., have been built to accept containers having such fitments.
The weight capacity of a cargo container is often limited by the weight of the container itself. In other words, if the container is made lighter, it may be used to carry a heavier cargo load. As a result, collapsible intermodal flat racks, such as the flat racks offered by Domino Flatracks (Clive-Smith Cowley Ltd) of the United Kingdom and illustrated in published UK Patent Application GB 2376014 and U.S. Pat. No. 5,275,301, both to Clive-Smith, have been developed. Such collapsible intermodal flat racks omit the container side and end walls and top and instead feature a floor or cargo deck that features arches that are pivotally attached to move between an upright use position, a folded stored position and an expanded position for placing a load on the cargo deck from above (such as by crane).
In addition to offering a weight savings, such collapsible intermodal flat racks permit the cargo deck to be longer than 40 foot as the arches feature lifting and stacking fitments and are positioned inward from the flat rack ends and 40 foot apart to permit handing by standardized equipment.
In addition, the collapsible intermodal flat racks permit the flat racks, when in the collapsed storage configuration, to be stacked for transport. As a result, the necessity of returning an empty cargo container is avoided. Instead, a number of collapsed intermodal flat racks may be transported in the same space required to return a single empty non-collapsible ISO class 1AA container.
While the collapsible intermodal flat racks of Clive-Smith offer the above advantages, changing the configuration of the arches or vertical uprights is laborious in that they must be directly lifted and handled and manually moved between the use, storage and expanded load positions. One solution to this problem is offered in U.S. Pat. No. 7,823,739 to Sadkin et al., where end walls of a collapsible shipping container are moved by a support or lever on each side having one end pivotally attached to the end wall, and a second end that moves within a track formed on the side of the cargo deck beam. A hydraulic or electric motor is positioned under the deck and moves the ends of the levers positioned within the tracks so that they travel towards the longitudinal center of die cargo deck thus causing the end walls to fold. The disadvantage of this approach, however, is that a source of power, either onboard or off is required. Furthermore, the motor mechanism adds to the cost and complexity.


A smear preparing apparatus that operates under selectable operation modes, may include: a smearing unit that prepares smeared slides by smearing samples onto slides; a staining unit that is capable of housing the smeared slides and that performs staining processing by accommodating a staining solution used to stain the samples on the housed smeared slides; a fluid circuit that supplies the staining solution to the staining unit; and a controller that controls the supplying of the staining solution to the staining unit depending on a selected one of the operation modes.

The disclosure relates to a smear preparing apparatus that smears samples onto slides and stains the samples, a method of controlling the smear preparing apparatus, and a sample processing apparatus.
As illustrated in FIG. 25, International Patent Application Publication No. WO2017/038323 ("Patent Literature 1") discloses a smear preparing apparatus 900 including a smearing unit 901 that prepares smeared slides 912 by smearing samples onto slides 911, a staining unit 902 that is capable of housing smeared slides 912 and that performs staining processing by accommodating a staining solution used to stain the samples on the housed smeared slides 912, and a fluid circuit unit 903 that supplies the staining solution to the staining unit 902. The smear preparing apparatus 900 of Patent Literature 1 is configured to cause selection of an operation mode to perform the staining processing and an operation mode to not perform the staining processing.
For example, there is a demand for reducing the usage amount and the waste amount of the staining solution in the smear preparing apparatus as described above.
One or more aspects aim to reduce the usage amount and the waste amount of the staining solution.

Smear preparing apparatus, method of controlling smear preparing apparatus, and sample processing apparatus


A package and method of making the package are provided. An embodiment package includes an integrated circuit supporting a conductive pillar, a substrate having a landing pad on each embedded metal trace, a landing pad width greater than a corresponding embedded metal trace width, and a conductive material electrically coupling the conductive pillar to the landing pad. In an embodiment, the landing pad overlaps the metal trace in one direction.

Semiconductor packages have been continuously improved to meet new demands for high-performance, small-size and high-speed electronic appliances. Accordingly, semiconductor packages have been evolved from old-fashioned dual in-line packages (DIPs) to state-of-the-art semiconductor packages such as CSPs. As a result, electronic appliances such as smart phones and tablet computers can be miniaturized using the CSPs as their components.
The CSPs are particularly ideal or suitable for ideal for a package having a large number of pins (e.g., 100+) with high speed operation or for a package having a relatively large size chip. Although the definition of the CSPs has not been fixed in semiconductor industry, the packages that are smaller than about 120% of the size of a semiconductor chip are typically referred to as a CSP. Even semiconductor packages larger than 120% of the size of a chip, such as ball grid array (BGA) packages, land grid array (LGA) packages, and small outline non-leaded (SON) packages, may be considered to be a CSP. In particular, the BGA packages having solder balls instead of leads mounted on the lower surface thereof, the LGA packages having a land array mounted on the lower surface thereof, and the SON packages having two land arrays instead of leads mounted on the lower surface thereof are examples of the CSPs.
In a package such as a flip chip Chip Scale Package (fcCSP), an integrated circuit (IC) may be mounted to a substrate (e.g., a printed circuit board (PCB) or other integrated circuit carrier) through a bump on trace (BOT) interconnection.
In light of the demand for ever smaller packages, attempts are often made to reduce the distance between adjacent bumps, which is known as the bump pitch. One way to reduce the bump pitch is by shrinking the width of the metal traces used in the BOT interconnection. Unfortunately, reducing the width of the metal traces may lead to undesirable or detrimental consequences.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.

Package having substrate with embedded metal trace overlapped by landing pad

Taiwan Semiconductor Manufacturing Company, Ltd.


A method and system for dynamic pricing of web services utilization. According to one embodiment, a method may include dynamically predicting utilization of a web services computing resource that is expected to occur during a given interval of time, and dependent upon the dynamically predicted utilization, setting a price associated with utilization of the web services computing resource occurring during the given interval of time. The method may further include providing the price to a customer.

1. Field of the Invention
This invention relates to computing systems and, more particularly, to management of utilization of computing resources by resource users.
2. Description of the Related Art
In order to implement various business functions, many enterprises employ a substantial degree of computing infrastructure, including data storage systems, computer systems, networking and communications equipment, client hardware, etc. For example, an enterprise may deploy a substantial amount of computing resources to implement databases and applications configured to store and process data relating to inventory and catalogs, manufacturing, finance/accounting, customers, ordering, and/or any other business function pertinent to the enterprise.
In many instances, computing resources may be provisioned according to the maximum expected resource workload for a given quality of service. For example, the ability of the enterprise to receive and process customer orders placed via the internet may depend on computing resources such as internet communication bandwidth into the enterprise and available computing and storage capacity to process orders. The enterprise may wish to assure that delay experienced by customers during ordering is maintained below a certain level even during periods of high customer order volume. Correspondingly, the enterprise may provision bandwidth, computing and storage capacity associated with the ordering system according to the peak level of expected ordering activity.
However, demand for computing resources may be highly variable. For example, customer activity may follow cyclical patterns over the course of a given 24-hour period, depending on customer demographics and geography. Further, customer activity may exhibit seasonal variation or long-term trends. Additionally, demand may vary due to random or singular events. If computing resources are provisioned according to certain maximum expectations of demand, such resources may be relatively idle during periods when demand is less than the maximum. Depending on the overall pattern of demand, this may lead to significantly inefficient use of computing resources.

Method and system for dynamic pricing of web services utilization


A method and apparatus for verifying a color of an LED in a printed circuit board include a sensor that permits passage of light from a target wavelength of the color and generates a resulting output voltage based upon an intensity of light of the target wavelength. A test system analyzes the resulting output voltage and provides a pass/fail signal to indicate whether the LED is the correct color and/or in operation.

1. Field of the Invention
This invention relates to a method and apparatus for verifying a color of an LED in a printed circuit board.
2. Description of Related Art
Printed circuit boards often contain one or more light emitting diodes (LEDs) used as external signals, internal diagnostics and for other suitable applications. Typically, verification of the operation of a printed circuit board having LEDs required powering up a fully rendered printed circuit board and manually verifying the operation of the LEDs. Alternatively, a test fixture may be constructed including bulky and expensive fiber optics that extend between the printed circuit board to be tested and a test system.
A method and apparatus for verification of a color of an LED according to a preferred embodiment of this invention eliminates much of the time-consuming and costly procedures required by manual verification and the equally costly test fixtures having multiple and complex fiber optic runs.
The apparatus according to a preferred embodiment of this invention includes a sensor. The sensor preferably includes, in combination, a photosensitive semiconductor, an optical filter, a pair of probes and a bias resistor. The optical filter preferably permits only light from a target wavelength of the color to be detected from the LED to pass. The probes are connected with respect to the photosensitive semiconductor and the optical filter and pass current generated from the photosensitive semiconductor across the bias resistor. As a result of the described construction, the sensor provides an output voltage corresponding to a target wavelength corresponding to an appropriate color of the LED and blocks light outside of the target wavelength.
In addition, a test system is in communication with the sensor for converting the output voltage into a machine or operator-readable pass/fail signal. The test system may be an in-circuit tester in combination with software suitable for translating the output signal from the sensor into such a pass/fail signal. The test system may additionally include a verification module for determining whether the output voltage exceeds a predetermined minimum test voltage for the intensity of light of the target wavelength and/or a warning signal to indicate excessive ambient light between the sensor and the LED.
The software and/or the test system may be configured to include the steps of: (1) measuring a Von across the sensor when the LED is on; (2) measuring a Voff across the sensor when the LED is off; (3) subtracting the yoff from the Yon to determine a nominal voltage; and (4) comparing the nominal voltage with a predetermined minimum voltage for the color to be verified.
It is one object of this invention to provide a method and apparatus for accurately and inexpensively verifying a color of an LED.
It is another object of this invention to provide a method and apparatus for verifying a color of an LED in a printed circuit board without requiring a fully operational and powered printed circuit board.
It is yet another object of this invention to provide a method and apparatus for verifying a color of an LED wherein existing test fixtures can be adapted for use in connection with the apparatus.
It is still another object of this invention to provide a method and apparatus for verifying a color of an LED that does not require adjustment of potentiometers or placement of optical cables.
It is yet another object of this invention to provide a method and apparatus for verifying a color of an LED that can utilize a common return and thus use only a single wire per sensor plus one for the common return.

Method and apparatus for verifying a color of an LED in a printed circuit board


A tool holder comprises a holding portion and a specification marking member. The holding portion is used to secure a tool, whereas the specification marking member is used to mark thereon a specification corresponding to the specification of the tool. The specification marking member is formed of a retaining portion extending from the holding portion, and a marking portion on which a specification is marked. The marking portion is removably located in the retaining portion.

As shown in FIG. 1, a previous embodiment of the present invention, tool seat 1 is provided with a specification marking portion 2 on which a specification corresponding to that of a socket 3 is marked. In light of the specification marking portion 2 being a fixed structure, the tool seat 1 is limited in purpose. A socket wrench set may have sockets of up to thirty specifications in the English System, or thirty three specifications in the Metric System. In another words, the tool seat 1 in the prior embodiment is not interchangeable in terms of specification.
As shown in FIG. 2, tool holder base 10 comprises a plurality of seats 12 for holding a plurality of sockets 11 various in specification. The seats 12 are provided with a specification marking portion 14 and are located on the tool holder base 10 by a locating hole 13 of the base 10. The seats 12 are also defective in design in that they are limited in purpose, and that they are not interchangeable in terms of specification.
As shown in FIG. 3, a tool holder base 10 is provided with a plurality of seats for holding a plurality of tool component parts 11. The seats are not interchangeable in terms of specification.

Tool holder with specification marking structure


A system for assisting in performing an interventional procedure includes a first subsystem (1) and a second subsystem at different places, especially in different rooms. At a first place the first subsystem a) generates a first image of a subject (22) while an interventional device (12) is introduced into the subject and b) determines the position of the interventional device within the subject. At a second place the second subsystem a) generates a second image of the subject with the introduced interventional device and b) plans and/or monitors a treatment based on the second image and the already determined position of the interventional device, i.e. the second subsystem does not need to start a completely new position determination procedure, thereby reducing technical efforts. Moreover, the first and second images are generated by different imaging modalities which allows for, for instance, improved image guidance, planning and/or monitoring.

US 2011/0166410 A1 (Gutierrez) discloses a brachytherapy system for a target region comprising an applicator having a plurality of channels that are hollow and expandable, wherein the applicator is adapted to be implanted in the target region. The system further comprises a tracking device, a tracking signal generator to generate a signal received by the tracking device and a processor. The tracking device has a size and shape to be advanced and retracted through at least a portion of the plurality of channels. The processor determines a position of one or more of the plurality of channels based on a movement of the tracking device, wherein the processor determines a location of one or more of the plurality of channels in an image based at least in part on a position measurement from the tracking device.
US 2007/0078327 A1 (Kindlein) discloses a system for effecting radiation treatment on a pre-selected anatomical portion of an animal body, wherein the system comprises a first imaging means for generating image information of the pre-selected anatomical portion to be treated and processing means for generating a radiation treatment plan partly based on the image information for effecting the radiation therapy on the pre-selected anatomical portion, wherein the treatment plan includes information concerning a number, position and direction of a plurality of hollow treatment channels to be inserted within the anatomical portion, one or more positions and corresponding times of one or more radiation emitting sources to be inserted through the plurality of hollow treatment channels, and the amount of radiation dose to be emitted. The system further comprises insertion means for inserting the plurality of hollow treatment channels at the planned positions and directions into the anatomical portion and radiation delivery means for inserting at least one energy emitting source through the plurality of hollow treatment channels at the one or more positions into the anatomical portion. Identifying means are present for identifying the location of at least one treatment channel from the group of the plurality of inserted treatment channels, wherein the identified location is compared with one or more of the pre-planned locations present in the treatment plan.
US 2003/0065260 A1 (Cheng) discloses a system for identifying and quantifying departures in the placement of needles or catheters from intended placements in a treatment plan for treating an organ. The needles or catheters carry therapeutic agents for insertion into the organ for use in the treatment plan. The system comprises an imaging device for imaging the organ, an intraoperative tracking interface comprising a display, and a computing device in electronic communication with the intraoperative tracking interface. The computing device is adapted to input the intended placements into the intraoperative tracking interface and to, for at least one needle or catheter, calculate a difference in an x-y plane between the intended placement of that needle or catheter and an actual placement of that needle or catheter. Moreover, the computing device is adapted to calculate, from the calculated difference in the x-y plane, a position error for each of the therapeutic agents, to adjust positions of therapeutic agents along each needle or catheter by an amount to be determined in accordance with the calculated position error and to determine positions of a deposited number of therapeutic agents through imaging carried out by the imaging device.
An interventional system is, for instance, a high-dose rate (HDR) brachytherapy system which comprises several brachytherapy catheters to be introduced into a target region. Within the brachytherapy catheters a radioactive radiation source is moved to different dwell positions at which the radioactive radiation source is located for respective dwell times, in order to treat the target region by radioactive radiation emitted by the radioactive radiation source.
The brachytherapy catheters are introduced into the target region while a real-time ultrasound image of the target region is generated and shown to the physician. Moreover, the real-time ultrasound image can be overlaid with a pre-interventional image of the target region, which has been generated by, for instance, a magnetic resonance (MR) imaging device or a computed tomography (CT) imaging device. These images guide the physician while introducing the brachytherapy catheters into the target region. However, even by using this image-based guidance of the physician, the brachytherapy catheters may not be placed accurately enough, which may lead to a reduced quality of the outcome of the brachytherapy procedure.

System for assisting in performing an interventional procedure


Method and an apparatus for the profiling of single-gear or multiple-gear grinding worms for grinding tooth profiles in accordance with the principle of continuous diagonal generating grinding. A grinding worm is divided into at least two axial zones wherein one zone remains unmodified and a second zone receives, by means of special profiling methods, modifications of the thread flanks for the generation of tooth flank modifications The main attribute of these profiling methods is additional movements, which are superimposed on the disk-shaped profiling tool and/or the grinding worm in relation to a given profiling shift position, and which result in the modifications of the grinding worm flanks that are mapped onto the flanks of the toothed wheel work during subsequent diagonal generating grinding across a grinding worm zone profiled in this manner. Additional movements designed to generate the modifications include, in particular, pivoting of the profiling tool around an axis (F) or pivoting the grinding worm around an axis (C) during profile dressing, as well as continuous incline change during line-by-line profiling.

This patent application is a continuation-in part patent application of U.S. patent application Ser. No. 09/020 898 filed on Feb. 9, 1998 and claiming priority of German patent application No. 197 06 867.7 filed on Feb. 21, 1997. These two patent applications are declared an integral part of the present patent application.
This invention relates to a method for the generation of a single- or multi-start grinding worm for grinding tooth profiles in accordance with the principle of continuous diagonal generation grinding, and an apparatus for implementing this method, by which across a portion of the worm width the flanks of the worm thread are given modifications, and the ratio between the modified and the non-modified grinding worm zone yields an optimum with respect to a favorable exploitation of the overall worm width.
The majority of cylindrical gears used in gear drive technology today have involute tooth profiles. However, for load reasons, the meshing of two involute gears often fails to produce an optimal operating behavior, so the tooth flanks are provided with modifications deviating from the involute, in both the profile and longitudinal directions by means of design calculations. As the magnitude of such modifications for the most part falls within the micrometric range, grinding processes play an essential role in the manufacture of modified tooth flanks.
The more straightforward modifications of tooth flanks consist primarily of profile or longitudinal crowning, tip or root relief in relation to profile and end relief in relation to face width If we view these modifications in terms of their variation in the two tooth flank directions (tooth depth and face width), we can see that they are tooth flank modifications that always change in the one tooth flank direction only, while remaining constant in the second tooth flank direction. In continuous generating grinding, these modifications can be achieved either by means of profiling of the grinding tool with special profiling tools (generally profile modifications) or by means of appropriate movement of the machine axes (generally longitudinal modifications). In the latter case, these additional axial movements during continuous generating grinding often result in unwanted distortion of the tooth flank profile.
In contrast, the application of more complicated tooth flank modifications requires varying specifications in a number of transverse sections and on a number of cylinders. In extreme cases, each point on the flank of the tooth can be allotted its own modification magnitude (deviation of the profile from the involute). The manufacture of such gearing by means of continuous generation grinding requires special technological procedures.
The state of the art for the profiling of grinding worms remains an important factor in arriving at a solution. In the known processes in this respect (FIG. 1) a disk-shaped profiling tool 1 is often used. This profiling tool is shifted in a translatory linear stroke 3 relative to a rotating grinding worm 2 during which the profiling tool contacts the tip and/or the root of one or both flanks of the grinding worm thread 4. The stroke action 3 of the profiling tool and the rotational movement 5 of the grinding worm 2 are precisely attuned to one another, so that after one revolution of the worm the profiling tool has traveled a path as xcfx80 * module * number of starts. Of the multitude of procedural specifications applied in this regard, two general principles are known.
When profiling with a profile roll (FIG. 1a), the active zone 6 of the disk-shaped profiling tool 1 has a single-tapered or double-tapered profile. During the profiling procedure, this shape leads to line contact between the profiling tool 1 and a normal section of the grinding worm thread 4. The advantage of this contact relationship is that the entire depth of the grinding worm thread (h), including the root and tip zones, can be. profiled with a single translatory stroke 3 of the profiling tool or of the grinding worm 2 across the width of the grinding worm (b5). The result is short profiling times. As with this method a large portion of the flank depth of a worm thread axial section is always engaged (generally the entire profile), it will be referred to hereinafter as profile dressing.
Profiling with a universal roll (FIG. 1b) uses a disk-shaped profiling tool having, for example, a radius profile in the active zone 6. With this tool, the contact between the profiling tool 1 and the grinding worm thread is almost punctiform. Thus, only a very limited portion of the grinding worm thread depth (h) is profiled during each stroke 3 across the width of the grinding worm (b5). A multitude of profiling strokes is needed to profile the entire grinding worm thread, the profiling tool being infed by a defined amount (xcex94U) into the grinding worm thread depth after each stroke. This profiling method leads to long profiling times, particularly in the case of grinding worms with large modules. However, it is also known that, because of the point contact in the zone of contact, this method is very advantageous for the generation of virtually any desired modifications down the profile grinding worm thread profile. In the following text, this method will be referred to as line-by-line profiling.
In a known process for producing complicated tooth flank modifications in generation grinding, the grinding tool is tangentially displaced in relation to the gear during the working stroke (shifting or diagonal generative grinding) (DE 3704607). A special feature of this generation grinding process is that, because of the tangential shift during the cutting stroke, a new line of action between the gear and the grinding worm can be allocated to every gear normal section. By the use of a grinding worm that has a worm thread of continually changing pressure angle across its entire active width, the aforementioned process compensates for process-related distortion of the tooth flank. This distortion occurs during the continuous generation grinding of helical gears if the center distance between the workpiece and the tool changes during the working stroke (e.g., when producing longitudinal crowning). A disadvantage of this procedure is that the grinding worm receives altered pressure angles (modifications) across its entire active width, and hence, when grinding worms are used with conventional abrasives, there is increased wear in those worm zones where grinding proceeds at higher metal removal rates. On the other hand, if non-profilable grinding worms with super-hard abrasives are used, the flexible profiling of the grinding worm thread with new pressure angle changes (modifications) is not possible.
In regard to line-by-line profiling, a process is known (Wo 95/24989) in which, according to the tooth flank modifications to be generated, a grinding worm is provided with different modifications in various width zones. Applying line-by-line profiling of the grinding worm, these individual width zones are given modifications down the profile of the thread which differ from zone to zone but remain constant within a given zone. Between the individual width zones of the grinding worm, there are transitional zones in which a transition occurs between the thread profile modification of one width zone and the thread profile modification of the following width zone. The generation of continuous flank modifications in the direction of worm width and, consequently, in the gear tooth longitudinal direction, is not possible with this process.
Beginning with the known state of the art (as described above), the task presented is to provide a grinding worm with a geometry and flank topology which, on the one hand, permit high metal removal rates and on the other hand, permit the generation of tooth flank modifications on the micrometric level. This task, in turn, entails a need to develop methods or a combination of these methods which allow for flexible profiling of grinding worms with modified thread flanks. In doing so, we must also decide which modifications of the grinding worm thread flanks can be generated with which profiling method or with which combination of profiling methods, with due consideration for the quality demands on the gearing to be ground, and for the goal of minimizing profiling time. Finally, an apparatus must be developed which can be used to execute the profiling process or combination of profiling processes.
The solution to this task is based on the two known fundamental methods for profiling grinding worms, viz.: profile dressing and line-by-line dressing, as well as on the diagonal generation grinding of gears.

Profiling methods and apparatus for generation of modified grinding worms


A module-based framework evaluates designs of advanced start stop systems, particularly 12 V advanced start stop systems. The framework separates vehicle and battery analysis and uses a power profile to evaluate different designs of the vehicles and batteries. Particularly, the framework can evaluate different battery solutions and compare performances as a function of drive cycles, motor size, and electrical loads. In addition to modeling, actual batteries are tested for the same power inputs for validating performance differences. This framework identifies performance limiting components for determination of the vehicle system component optimization.

The advantages of vehicle electrification of 12 V automotive systems is appealing to automotive manufacturers. Although fuel economies of 12 V electrification are generally not directly applicable to 48 V and high voltage hybrid automotive systems, total fuel savings are potentially significant based on the large quantity of conventional vehicles currently in use today. Standardization of 12 V electrification solutions remains problematic as designs are dependent on both vehicle and battery variables. As such a singular battery solution for all, or most, vehicles does not appear to solve this problem.
To address this need, a module-based simulation tool builds battery parameters based on vehicle demands together with component selection based on control optimization. A model framework includes the connection of different modules and data flows between the different modules.

This patent is subject to a terminal disclaimer.

Battery simulation module, and battery analysis tool for determining a battery solution using a battery simulation module


A microprocessor heat sink fastener assembly, comprising a base to couple to a heat sink a retention nut to be received by a cavity of the base, and a retention clip to be attached to the base and to be cantilevered therefrom. The retention clip is to engage with a latching structure extending from a latching structure of a retention plate.

Loading of modern land grid array (LGA) microprocessors into sockets requires the application of large for loads to ensure that all of the electrical connections between the processor package and the socket contacts are established and stable. Current methods to load a microprocessor on a socket includes placing a thermal solution, which is generally the heat transfer surface of a heatsink, on the integrated heat spreader on the die side of the microprocessor and bolted to a motherboard. The load is transferred to the microprocessor through the heatsink. Multiple fasteners and load points are used to apply the load, requiring a specific sequence of fastener tightening. In many cases, the heatsink is caused to tilt by uneven distribution of the of the load when the fasteners are tightened. This can displace the microprocessor, resulting in damage to the socket contacts and to the microprocessor.

Mechanism combining fastener captivation and assembly tilt control for microprocessor thermal solutions