A home-network and a method for allocating channels are provided. The home-network includes a buffer having queues and temporarily storing a data to be transmitted to each device, a priority sense part determining if the data of a packet unit transmitted from an outer server has a high priority for transmission and first inputting the data with a high priority into the queue of the buffer, a frame sense part sensing how many packets are included in one frame of the data stored in the buffer, and a channel allocation part allocating channels if enough channels are available for the transmission of a whole frame according to the number of packets sensed by the frame sense part. Accordingly, it is possible to reduce a delay time of wireless data, and channels are allocated according to the order of receipt of the data such that all devices perform equally.

1. Technical Field
Systems and methods consistent with the present invention relate to a home-network and a method for assigning channels thereof, and more particularly, to a home-network that can offer improved image quality and performance of each device by adaptively allocating channels to each device depending on the sizes of frames in receiving, and a method for allocating channels thereof.
2. Related Art
In a related art home-network system, a home-network receives data from an external server. Among the data, multimedia data such as a moving picture is compressed into a frame unit, and the compressed data of frame unit is packetized into an Internet Protocol (IP) unit according to its capacity so as to be transmitted via IP network. Each compressed frame has different capacity according to a compression method, degree of movement of image, degree of association with the previous frames, and audio insertion. Accordingly, each frame may consist of a small or large number of packets according to its compressed size.
The related art process of transmitting the packetized data from the outer server to a certain device of the home-network will be explained with reference to FIG. 1.
In a related art home-network system, moving image data, audio data, and web data from the first moving image server, the second moving image server, Voice over Internet Protocol (VoIP) server, and Web server are transmitted via a router to a selected home-network from each of the servers, and the home gateway of the home-network transmits the data to each selected device.
The first moving image server tries to transmit the moving image data with a first frame of three packets a, a second frame of two packets b, and a third frame of one packet c to device 1 of the home-network. The second moving image server tries to transmit to device 2 the moving image data with a fourth frame of two packets d, a fifth frame of three packets e, and a sixth frame of one packet f. The VoIP server for transmitting audio data tries to transmit audio data F1, F2, F3 to device 3, and the web server tries to transmit web data to device 4.
As moving image data, audio data, and web data are delivered to the router from each server, the router outputs each data in real-time in the order of receiving, to transmit to the home gateway. For example, the router first transmits two packets a of the first frame of the first moving image server, transmits one data unit each of the web server and audio data F1, and then transmits the remaining one packet a of the first frame of the first moving image server. If the router transmits data from each server in real-time, a plurality of packets for one frame of the moving image data may be not sequentially transmitted.
If each data is delivered from the router via the IP network to the home gateway, the home gateway transmits the data via wireless network to each device in the home-network. At this time, the home gateway allocates channels in the order of receiving the data to transmit each data. Accordingly, the home gateway allocates two channels to transmit two packets a of the first frame from the first moving image server to the device 1, and then allocates one channel to transmit one packet d of the fourth frame from the second moving image server to the device 2. Then, the home gateway allocates one channel to transmit audio data F1 from the VoIP server to the device 3, and allocates one remaining packet a of the first frame from the first moving image server to the device 1.
According to the related art real-time data transmission method, two of the three packets of the first frame are firstly transmitted to the device 1, and then the remaining one packet is transmitted after the period of time during which three channels are allocated. Three packets for the first frame do not consecutively arrive at the device 1 but arrive separately, which can cause a delay in the delivery time. If a delay occurs, the probability of data loss may increase, and the data may need to be re-transmitted due to the data loss. Accordingly, the amount of data that must be stored in a buffer may increase. Therefore, it may be impossible to reproduce images when desired, or the image quality may suffer due to the delay of the moving image data.
To solve the above related art problems, packet prioritization has been used, in which transmitted data is prioritized.
According to the related art method of packet prioritization, each device of the home-network is prioritized, depending on the capacity of the transmitted data. For example, the device 1 is set to the first priority with data capacity of several megabytes, and the device 2 is set to the second priority which assures having a smaller data capacity than that of the device 1. The device 3 receives audio data from the VoIP server and is set to the highest priority to receive the audio data in real-time.
When priority is set, if moving image data, audio data, and web data are transmitted from each outer server as shown in FIG. 2, a router sequentially arranges each data in the order the data was received and transmits to the home gateway as the related art. The home gateway allocates channels according to the priority of a device to transmit data to each device. First, if the home gateway allocates the number of channels corresponding to the preset data capacity, for example, three channels to the device 1 with the first priority, three packets of the first frame from the first moving image server are transmitted to the device 1.
When the home gateway can allocate the number of channels corresponding to the preset data capacity, for example, two channels for the moving image data from the second moving image server with the second priority, two packets of the fourth frame from the second moving image server are transmitted to the device 2. If the audio data F1, F2 are transmitted from the VoIP server with the highest priority, the home gateway instantly allocates two channels to transmit the audio data to the device 3. If there is no data with higher priority and some channels are available for use, the home gateway allocates the remaining channels for the web data from the web server and transmit them to the device 4.
Likewise, if the data of the second frame and the third frame are received from the first moving image server, the home gateway allocates three channels as preset to transmit at once two packets of the second frame and one packet of the third frame. Then, if data of the fifth frame is received from the second moving image server with the second priority, the home gateway allocates two preset channels to firstly transmit two of three packets of the fifth frame. The home gateway delivers one remaining packet of the fifth frame from the second moving image server only after it first delivers real-time audio data F3, F4 from the VoIP server with the highest priority, web data received from the web server prior to the last packet of the fifth frame, and moving data from the first moving image server.
As described above, according to the related art packet prioritization, data is transmitted to each device depending on preset priority and data capacity. Accordingly, since three channels can be allocated to the device 1, two packets of the second frame and one packet of the third frame are sequentially transmitted to the device 1 despite the fact that they do not need be transmitted together. On the other hand, since only two channels can be allocated to the device 2, three packets of the fifth frame are transmitted separately as two packets and one packet despite the fact that they need to be delivered together. In other words, when the packet prioritization is applied, an excessive number of channels are allocated to the device with high priority, in spite of the limited number of channels available in a wireless network. This may lead to an unnecessary waste of channels, and a buffer overflow due to excess of buffer capacity allocated to each device.
As the result, the transmission rate of a server may slow down, which can consequently cause unnecessary control signals to be continuously generated. The performance of the device with sub-priority significantly deteriorates due to the small capacity of the data that can be transmitted at once. Even the data transmitted to the device with high priority is not guaranteed to be delivered as a whole frame unit. Therefore, it is very likely that when sequentially transmitting a plurality of frames, a portion of packet of the frame positioned at rear side may not be transmitted together. As the result, delay may occur.
Accordingly, when allocating channels in the home-network system, it is necessary to adaptively allocate channels according to the frame size of data transmitted to the home-network from each outer server, instead of presetting the data capacity and the priority of a device to prevent allocating too many channels to a device with high priority, and decreasing the performance of a device with sub-priority.

Home-network and method for allocating channel thereof


An information processing device according to the present invention includes a memory; and at least one processor coupled to the memory. The processor performing operations. The operations includes: receiving first multiple-images; and generating, based on a first image in the first multiple-images, a third image relating to a second image in a second wavelength band different from a first wavelength band of the first image.

A technique for observing an earth's surface on a high altitude by using an observation device such as an artificial satellite or an aircraft is generally referred to as "remote sensing". Remote sensing often observes an intensity of an electromagnetic wave such as light emitted from an area of a predetermined range on an earth's surface. In a method for storing an observation result acquired by using remote sensing, observation values are often stored as pixel values in an image. In other words, each of pixel values in an observation image relates to an intensity of an electromagnetic wave along arrangement of a thing on an earth's surface of an observed area.
When, for example, an observation device is an image sensor, an observation result is acquired as an image from the image sensor. A pixel value included in the image is a value of an intensity of observation light emitted, from a target object, in an incident direction of a light reception element of the image sensor.
Note that, when a pixel value is a value indicating brightness of observation light, the pixel value is a "luminance value".
In observation using an image sensor, it is often the case that light in a wavelength included in a wavelength band of a specific range is selectively used. Therefore, image sensing uses a filter that transmits light of the wavelength band of the specific range.
Further, remote sensing may use light in a plurality of wavelength bands. The reason is that a thing to be observed reflects, according to a material and a state of a surface thereof, light having different intensities in different wavelength bands. In this case, remote sensing observes intensities of light in a plurality of wavelength bands by using a plurality of filters having different wavelength bands of transmitted light.
An application using information of a ground object being acquired from an image taken by such remote sensing is expected. The application is, for example, an application for generating a map, an application for grasping a land use state, an application for grasping a disaster situation, an application for acquiring a growth situation of an agricultural crop, or an application for identifying a mineral.
However, a ground object may be covered with a thing (or moving object) such as a cloud, a mist, a fog, a bird, or a flying object. Therefore, in an image acquired by an observation light reflected on an earth's surface, there is a case in which an image of a partial area cannot be acquired. In other words, in remote sensing, an image of a partial area may be deficient.
Therefore, a technique for restoring a deficiency is proposed (see, for example, PTL 1). An image processing device described in PTL 1 restores an area covered with a cloud in an input image by using a reference image of another date and time in which there is no cloud in the same area. The image processing device described in PTL 1 reads an input image and measurement environment information. Then, the image processing device described in PTL 1 determines an area (deficient area) covered with a cloud in the input image. Then, the image processing device described in PTL 1 acquires, based on the measurement environment information, a reference image having been observed at a solar position similar to the input image and including information of an earth's surface equivalent to the deficient area. Then, the image processing device described in PTL 1 replaces a pixel value of the deficient area of the input image with a pixel value of an area equivalent to the deficient area in the reference image. In this manner, the image processing device described in PTL 1 restores an image of a deficient area in an input image.
The technique described in PTL 1 will be described with reference to the drawings.
FIG. 7 is a block diagram schematically illustrating a configuration of functions of an image processing device 7 described in PTL 1.
The image processing device 7 is connected to an image supply device 78 and an output device 79.
The image supply device 78 supplies au observation image 111 and measurement environment information 710 to the image processing device 7.
The image processing device 7 includes an image reception unit 71, a similar environment image acquisition unit 72, a deficient area restoration unit 75, and an image storage unit 76.
The image storage unit 76 previously stores images (reference images 720) observed at various dates and times and under various environments.
The image reception unit 71 receives the observation image 111 and the measurement environment information 710 from the image supply device 78.
The similar environment image acquisition unit 72 determines an area covered with a cloud as a deficient area 150 in the observation image 111. Further, the similar environment image acquisition unit 72 acquires, from the image storage unit 76, the reference image 720 including an image (e.g. information of a ground object of the deficient area 150) having been observed at a solar position similar to the observation image 111 and being equivalent to the deficient area 150, based on the measurement environment information 710.
Based on the observation image 111, the reference image 720, and the deficient area 150, the deficient area restoration unit 75 replaces the deficient area 150 in the observation image 111 with an image of a relating area in the reference image 720 and generates a restoration image 740. The deficient area restoration unit 75 then transmits the restoration image 740 to the output device 79.
The output device 79 outputs the restoration image 740. The output device 79, for example, displays the restoration image 740.

Information processing device, information processing method, and recording medium


To obtain a high performance computer decreased in the number of commands to be executed. A control circuit receives a command (CMD), and outputs a special command signal which becomes "H" when the command (CMD) instructs "push" command, to a register file. The register file, when the special command signal is "H", outputs the stored data value of register as register data regardless of the values of read register address signals, and and outputs the stored data value of register as register data. An ALU adds the register data and control data, and outputs the ALU operation result to the register file. An address adder adds the register data and control data, and outputs the address addition result to an external memory.

1. Field of the Invention
The present invention relates to a high performance computer using a reduced number of commands to be executed.
2. Description of the Background Art
A computer realizes various processes by converting an arbitrary procedure programmed in software into a series of commands described in the command language executed by the computer, and executing this series of commands. The MIPS R3000 computer (hereinafter called R3000) developed by MIPS is a known computer. The R3000 is specifically described in "mips RISC ARCHITECTURE" by Gerry Kane.
FIG. 14 is a block diagram showing the structure of a central processing unit (CPU) of the R3000. In the diagram, reference numeral 1 is a register file, 2 is an arithmetic and logic unit (ALU), 3 is an address adder, 4 is a program counter, and 5 is a control circuit (including a command decoder). Shift circuits, multiplying circuits and all others relating to operation are included in the ALU 2.
Reference numerals 6a and 6b are stored data of registers readout from the register file 1, 7a and 7b are immediate values outputted from a control circuit, 8 is an operation result of the ALU, 9 is output data of a program counter or an address value of a command memory, CMD is an output signal of a command memory or a command for operating this computer, and 11 is an operation result of an address adder or an address value of a data memory. Reference numeral 18 is address data showing the number of a write register described in a command word, and 16a and 16b are address data showing the numbers of read registers described in each command word.
The control circuit 5 receives a command CMD, and outputs control data 7a and 7b to the ALU 2 and address adder 3 according to the command CMD, and also outputs read register address signals 16a and 16b and a write register address signal 18 to the register file 1.
The register file 1 outputs the register data 6a to the ALU 2 and address adder 3 according to the read register address signals 16a and 16b and the write register address signal 18, and also outputs the register data 6b to an external memory (not shown). If a write register is instructed by the write register address 18, the ALU operation result 8 is written into the write register.
The ALU 2 adds the register data 6a and control data 7a, and outputs the result of the addition or the ALU operation result 8 to the register file 1.
The address adder 3 adds the register data 6a and control data 7b, and outputs the result of the addition or the address addition result 11 to the external memory. This address addition result 11 is the address to be accessed by the external memory.
The program counter 4 sequentially increases and outputs the program count value 9 when the control signal 23 is "L".
The computer R3000 interprets the command 10 having read the program count value 9 as an address value in the control circuit 5, generates a necessary signal, and gives the signal to the corresponding blocks to execute the processing.
FIG. 15 is an explanatory diagram showing an internal constitution structure of the register file 1. As shown in the diagram, memory cells MC are formed in a matrix, and memory cells MC of each line are registers R0 to R31 of $0 to $31. Access to these memory cells MC is effected under control of decoding circuits 600 to 602.
The decoding circuit 600 receives a write register address signal 18, and selectively asserts plural write register selection lines 19 according to the write register address signal 18. The decoding circuit 601 receives the read register address signal 16a, and selectively asserts plural read register selection lines 20a according to the read register address signal 16a. The decoding circuit 602 receives a read register address signal 16b, and selectively asserts a read register selection line 20b according to the read register address signal 16b.
FIG. 16 is a circuit diagram showing an internal structure of a memory cell MC. As shown in the diagram, a memory unit 21 includes a loop connection of inverters G1 and G2, and an NMOS transistor Q1 is inserted between the input unit of the inverter G1 and a write signal line L8 in which one-bit information of ALU operation result 8 is obtained. The output of the inverter G1 is connected to the input of an inverter G3, and an NMOS transistor Q2 is inserted between the output unit of the inverter G3 and a register data line L6a in which one-bit information of register data 6a is outputted. The output of the inverter G1 is also connected to the input of an inverter G4, and an NMOS transistor Q3 is inserted between the output unit of the inverter G4 and a register data line L6b in which one-bit information of register data 6b is outputted. To the gate of the transistor Q1, a write selection line L1 is connected, and a read selection line L2a is connected to the gate of the transistor Q2, and a read selection line L2b is connected to the gate of the transistor Q3. To the write selection line L1, the write register selection line 19 is connected, and the read register selection line 20a is connected to the read selection line L2a, and the read register selection line 20b is connected to the read selection line L2b.
Therefore, when the write register selection line 19 becomes H, the transistor Q1 is turned on, and the one-bit information of the ALU operation result 8 obtained from the write signal line L8 is written into the memory unit 21; when the read register selection line 20a becomes H, the transistor Q2 is turned on, and the stored data in the memory unit 21 is outputted as register data 6a through the data register line L6a; and when the read register selection line 20b becomes H, the transistor Q3 is turned on, and the stored data of the memory unit 21 is outputted as register data 6b through the register data line L6b.
In this register file 1, the write register selection line 19 is selectively asserted based on the write register address signal 18, and the ALU operation result 8 is written into the memory cell MC of register Ri (i=0 to 31) connected to the write register selection line 19 when asserted; the read register selection line 20a is when asserted the read register address signal 16a, and register data 6a is outputted from the memory cell MC of register Ri connected to the read register selection line 20a when asserted; and the read register selection line 20b is asserted based on the read register address signal 16b, and register data 6b is outputted from the memory cell MC of register Ri connected to the read register selection line 20b when asserted.
In this way, the register file 1 includes a data memory device group in a bit width that can be processed by a processor existing inside the computer. In the case of the register file 1 of the R3000, there are 32 registers of 32-bit width, and they are numbered from $0 to $31 to be distinguished. In the specification, hereinbelow, the x-th register in a group of 32 registers is expressed as $x.
In a recent computer, these register groups can freely read and write data, but in the case of the R3000, in particular, the register $0 is specified as a zero register, in which data cannot be written and, when reading, always the value 0 is read out, as determined in the hardware.
Incidentally, $31 is called a link register, which is specified as a register in which the data of the return destination address is stored when restoring after execution of a branch command. Besides, $29 is specified as a register for stack pointer, and this is a register for storing the address value on an external memory element for saving the data in the register in advance, in case of change of the value of the register in the CPU before the command at the branch destination is branched in the case of execution of the branch command.
However, $31 and $29 are determined in the manner of use only by type, and can be used for storing other data, and no problem is caused if used otherwise. Accordingly, for the use of $29, it is necessary to specify its number in the command word. As for $31, basically, it is necessary to specify its number in the command word, but it can be also used without specifying in the command word.
Unlike the R3000, there are other computers in which the registers can be used for specific commands only. In such computers, the read and write registers are determined by the commands, the name of registers is not particularly described in the command word.
In a recent computer, software called a compiler is essential, and the existing computers of high speed and high performance are realized by the hardware of a computer and the software of a compiler. The compiler is a kind of software which shuffles the commands in an order easy to execute by the computer, or makes efficient use of the operation units of the computer. For the compiler, the efficiency is high when the computer incorporates many registers so that the data can be moved among registers of the computer. Therefore, instead of limiting the registers by commands, it is convenient if various registers can be utilized by various commands. In most recent high performance computers, hence, registers are not fixed by commands.
In a computer having registers fixed by commands, the degree of complexity increases, and only up to eight registers can be installed, and in computers having 16 or more registers (32 in most recent ones), registers are not fixed by commands. Accordingly, the number (or name) of the register to be used is specified in the command word. Designation of register by command is more advantageous for a semiconductor integrated circuit because the register file can be composed of memory elements or the like.
The address adder is an adder for calculating the address of an external memory element when executing a load command (a command of reading data of an external memory element of CPU into a register in the CPU) or store command (a command of writing data of a register in the CPU into an external memory element of CPU). Besides, the ALU, program counter, and control circuit are ordinary circuits necessary in a computer, and are not particularly explained herein.
Described below are examples of execution of various commands by the R3000 representing the conventional computers. FIG. 17 shows command word and machine language of a command for executing a call-return statement (a command of branching into arbitrary series of commands and returning to an original series of commands) by the R3000. A machine language is an expression of a command word in a series of binary numerals so as to be understood by the computer, and in a recent high performance computer, one command has a fixed length of 32 bits.
In FIG. 17, command 1 is calling a series of commands A (composed of command 10 to command 16) by using the command "jal". When processing of the series of commands A is over, returning to command 2, then command 2 is executed. Such processing is called call-return process. In command 1, the address value of command 10, or 10 in this case, is set in the program counter. In the machine language of command 1, the first six bits express the branch command "jal", and the subsequent five bits and next five bits and final 16 bits express the branch destination address 10. This "10" is set in the program counter 4.
In the "jal" command, it is necessary to return to the next command after completion of the execution of the series of commands A at the branch destination, and the address value of command 2, that is, 2 is set in the register $31 tacitly in the hardware. In the command word or machine language, nothing is required to be specified. In the "jal" command, it is tacitly known that the value adding 1 to the present program count value (1 showing the address of command 1) (that is, 2 showing the address of command 2) is written in $31, so that it is not necessary to describe particularly in machine language. It corresponds to the special case of using the register $31 without specifying it after the command.
The computer executes command 10 after command 1. Command 10, "addi", is an addition command, and it shows that the stored data of register $29 is added with (-6) and written into register $29. In the machine language of command 10, the first six bits express the command of "addi", the subsequent five bits represent register $29 to write in, next five bit, register $29 to read out, and final 16 bits, addition data (-6). In the ordinary "addi" command, the read register and write register are different, and two registers must be specified, and in this case, too, the register $29 must be specified twice in the machine language.
Command 11 is a store command, which means the stored data of register $31 is stored in an address of an external memory of the CPU, and the address herein is the summed value of the stored data of register $29 and 5. That is, the command 13 to be executed later is "jal" command same as command 1, and the address of return destination is unconditionally written in the register $31, and therefore this command occurs because it is necessary to save the stored data of the present register $31 in the external memory. In the machine language of command 11, the first six bits express the store command, the next five bits denote the register number $29 necessary for address calculation, the subsequent five bits represent the register number $31 hold the data to be stored outside, and the final 16 bits refer to data 5 to be added.
In this way, in the computer, in order to save the data of a register to an external memory, a register for specifying the address of a vacant space on the memory to save in is required, and it corresponds to register $29 in the R3000. In this example, only the stored data of register $31 is saved, but the number of registers to be saved is arbitrary depending on the number of registers to be used by the series of commands.
It may be considered that command 12 and command 13 are intrinsic commands of the series of commands A, while command 10 and command 11 are preparations for executing command 12 and command 13. Command 13 is "jal" command, and after executing the necessary processing after branching, it returns to command 14. Command 14 is a load command, and the value adding 5 to the stored data of register $29 is used as the address number for reading the data from the external memory, and is transferred and written into the register $31. That is, so the series of commands A may return to the called command, the return destination address is set in the register $31. Command 15 means that the stored data of register $29 and 5 are summed up. It means to return to the stored data of register $29 before calling the series of commands, that is, to return the vacant space to the initial state.
Command 16 instructs that the address value indicated by register $31 is set to the program counter, and branched. In this example, the stored data value of the register $31 is 2, that is, the address value of command 2, and control branches to command 2. That is, control returns to the next command after command 1 which called the series of commands A.
Below is specifically described the processing method of command 10 and command 11 in FIG. 17 by the conventional computer shown in FIG. 14.
1) When processing the "addi" command of command 10 in FIG. 17
The control circuit 5 decodes the command CMD, sets "11101" as write address signal 18, and "11101" as the read register address signal 16a, and sets the immediate value -6 to be added as control data 7a. The register file 1 outputs the stored data (D29) of register $29 as the register data 6a, on the basis of the read register address signal 16a and write register address signal 18, and specifies the register $29 as write register. Consequently, the ALU 2 outputs the ALU operation result 8 obtained by adding the register data 6a (D29) and control data 7a ("-6") to the register file 1, so that the ALU operation result 8 is written in as the stored data value of register $29 in the register file 1.
2) When processing "sw" command of command 11 in FIG. 17
The control circuit 5 decodes the command CMD, sets "11101" as the read register address signal 16a, and "11111" as the other read register address signal 16b, and sets the immediate value 5 to be added as control data 7b. The register file 1, on the basis of the read register addresses 16a and 16b, the stored data value (D29) of register $29 is added to the address adder 3 as register data 6a, and the stored data value (D31) of register $31 is outputted to the external memory as register data 6b.
The address adder 3 outputs the address addition result 11 obtained by adding the register data 6a (D29) and control data 7b ("5") to the external memory. As a result, the value stored in register $31 is written in the external memory having an address equal to the address addition result 11.
FIG. 18 is a diagram showing the command for executing the "for" statement by the R3000 (the command repeatedly executing the same command row a specified number of times), together with the command code and its machine language. FIG. 18 shows an example of "for" statement of repeating the command instructed by command 3 by 1024 times.
First, command 1 sets 1024 as the number of repetitions in the first register. In command 1, "addi" is an addition command, and it shows that 1024 is added to the stored data value of register $0 to be written in $30. In register $0, the value is always 0 as mentioned above. In the machine language of command 1, the first six bits represent the addition command "addi", the next five bits denote register $30, the next five bits denote $0, and the final 16 bits express 1024.
In command 2, similarly, as the stored data of register $28, "1" is set as the meaning of the first of repetition. Command 3 is an intrinsic command (processing) to be repeatedly executed by the "for" statement, and there is only one command 3 in this example, but about 64,000 (216) commands are possible.
In command 4, after executing necessary processing (command 3 herein), the value 1 is added to the stored data value of register $28, and it is set as the stored data value of register $28. The read register and write register are same, and therefore the command may be described as shown in parentheses. In the machine language, however, since it is the same command as ordinary "addi" command, the first six bits represent the addition command "addi", the next five bits represent the read register $28 the next five bits express the write register $28, and the final 16 bits express addition 1. Thus, in the machine language, $28 must be described twice.
In command 5, the stored data value of register $28 and stored value of register $30 are compared, and if not coinciding, it means, to return to the process two addresses back of the presently running address (that is, address of command 3). In the machine language of command 5, same as the machine language of command 1, the first six bits express the comparison branch command bne!, the next five bits, the stored data value of register $28, the next five bits, the stored data value of register $30, and final 16 bits, -2.
In command 5, until the stored data value of register $28 becomes 1024, the stored value of register $28 and stored value data $30 do not coincide. In command 4, the stored data value of register $28 increase by one each, and therefore the stored data value of register $28 does not reach 1024 unless command 4 is executed 1024 times from command 3. When the stored data value of register $28 becomes 1024, in command 5, the stored data value of register $28 and stored data value of register $30 coincide, so that the processing is transferred to command 6 without branching to command 3. Hence, repeated command of "for" statement is executed.
FIG. 19 is a block diagram showing a specific structure of the R3000 shown in FIG. 14. As shown in the diagram, the R3000 is provided with a comparator 100 for branch command control. The comparator 100 receives register data 6a and register data 6b, and outputs the comparison result of the register data 6a and register data 6b to the program counter 4 as a comparative result signal 101.
The control circuit 5 usually outputs a control signal 23 of "L", and when the command CMD instructs "bne" command, the control signal 23 of "H" is outputted to the program counter 4.
The program counter 4 receives the control signal 23, control data 7b, and comparative result signal 101, and outputs the value adding the control data 7b to the present program count value 9 as a new program count value 9 when the control signal 23 is "H" and the comparative result signal 101 indicates disagreement, and adds 1 to the program count value 9 and outputs as a new program count value 9 when the control signal is "H" and the comparative result signal 101 indicates agreement. The program counter 4 sequentially increases the program count value 9 and outputs when the control signal 23 is "L".
The processing method of command 4 and command 5 in FIG. 18 by the R3000 shown in FIG. 19 is described below.
1) When processing "addi" command of command 4 in FIG. 18
The control circuit 5 decodes the command CMD, and sets "11100" as the write address signal and "11100" as the read register address signal 16a, and sets the immediate value 1 to be added as the control data 7a. The register file 1 outputs the stored data value (D28) of register $28 as the register data 6a, on the basis of the read register address signal 16a and write register address signal 18, and specifies register 28 as the write register. Consequently, the ALU 2 outputs the ALU operation result 8 obtained by summing up the register data 6a (D28) and control data 7a (1), and therefore the ALU operation result 8 is written as the stored data value of the register $28 in the register file 1.
2) When processing "bne" command of command 5 in FIG. 18
The control circuit 5 decodes the command CMD, and sets "11100" as the read register address signal 16a, and "11110" as the other read register address signal 16b, and sets the immediate value -2 added to the program count value 9 as control data 7b. The control circuit 5 outputs the control signal 23. The register file 1 outputs the stored data value (D28) of register $28 as the register data 6a on the basis of the read register address signals 16a and 16b, and outputs stored data value (D30) of register $30 as register data 6b. The comparator 100 compares the register data 6a (D28) and register data 6b (D30), and outputs the result of comparison to the program counter 4 as comparative result signal 101.
As a result, the program counter 4 which receives the control signal 23 of "H" outputs the value ("3") adding control data 7b ("-2") to the present program count value 9 ("5") as a new program count value 9 when the comparison result signal 101 indicates disagreement, and adds 1 to the present program count value 9 ("5") and outputs as a new program count value 9 ("6") when the comparative result signal 101 shows agreement.
In this way, in the conventional computer such as the R3000, when performing call-return process, as shown in FIG. 17, the called series of commands 10 was always requested to execute command 10 and command 11. Similarly, in the case of loop processing, as shown in FIG. 18, it was required to execute the loop control commands, that is, command 4 and command 5.
That is, every time the call-return process or loop command is executed, always two commands must be executed regardless of the content of the command to be executed, and it was inefficient.

Processor using implicit register addressing


A self-propelled microbial fuel cell apparatus includes a microbial fuel cell with a cathode electrode and an anode electrode wherein the anode electrode is enclosed within an enclosure that has an opening in it. The microbial fuel cell is positioned within a self-propelled delivery vehicle so that the electrodes of the fuel cell are exposed to interface with a microbial environment.

By integrating vehicles with microbial fuel cells that generate energy thru ground, liquid, or atmospheric interfaces, a vehicle can achieve remote, in-situ, charging to extend or perform missions and thereby have less reliance on home bases or support stations for energy replenishment. In essence, a mobile asset with such capabilities can "sleep" or recharge in remote operational areas such that it can harvest sufficient energy from the environment to work persistently without the need for intervention to re-power.

Microbial fuel cell integrated in vehicle

The United States of America, as Represented by the Secretary of the Navy


An information management system for use with a computer having a display screen, the system including means for organizing information into an ordered sequence of worksheets in a workspace, each worksheet of the sequence of worksheets comprising an array of cells; and means for enabling a user to navigate through the sequence of worksheets on a worksheet to worksheet basis so as to display a selected one of the worksheets on the display screen. The system also includes means for selecting a plurality of worksheets from the ordered sequence of worksheets; and means for displaying on the display screen a perspective presentation of the selected worksheets.

The invention relates to an information management system which organizes information by using an electronic spreadsheet.
Commonly available spreadsheet programs, such as 1-2-3 by Lotus Development Corporation, provide users with an electronic worksheet for organizing and manipulating data. Such a worksheet can, for example, be configured so that when displayed on a computer screen it looks and functions like a financial spreadsheet. Usually, each worksheet is associated with its own file, and only one file, and thus, only one worksheet can be present in the workspace at any one time.
The worksheet typically consists of a rectangular grid of cells that provides a structure for entering and calculating data and for organizing and storing information. Each cell can store three types of data, namely, labels, values and formulas. Labels are text, such as "Sales" or "Inventory", which can be used to identify and visually organize the values that are entered in a worksheet. Values are numbers. Formulas are expressions that combine labels, values and cell references to yield a label or value as a result.
In some previously available programs, formulas could include any combination of mathematical operations from simple arithmetic, such as addition, subtraction, multiplication, division and exponentiation, etc., to advanced financial and statistical analysis. In such programs, when the user enters a formula into a cell, the program typically calculates the formulas result and displays that result for the cell. In addition, a formula can refer to a range of cells that contains data that the formula will process. For example, in 1-2-3 one such function is referred to as the "at sum" function and has the following form: @SUM(<<range>>), where <<range>> specifies a range of cells. The @SUM function sums the values of the cells in the specified range to produce a result.
Many other functions, similar to the @SUM function, exist in previously available spreadsheet programs for processing data within a range of cells to produce a result. Such functions may be used in financial worksheets, for example, to compute such frequently needed financial statistics as net income, total operating expenses, average costs, to name a few.
One approach to manipulating the worksheet and entering data into the worksheet is by entering each command and each piece of data individually through a keyboard. Another commonly used approach is by using a macro which is a programmed series of keystrokes and special commands. A macro is a user generated program which may be invoked by a short sequence of keystrokes and which automatically implements a much longer commonly used sequence of keystrokes. Thus, instead of having to conduct the sometimes involved and often time consuming process of entering a commonly used sequence of keystrokes through the keyboard, a much shorter sequence of keystrokes is used to invoke the macro that enters that long sequence automatically. Thus, the long sequence of keystrokes is reduced to the short sequence of keystrokes that calls the macro.
Whether the user enters commands individually through the keyboard or automatically through a macro, in previously available systems each command communicated directly with the display. This meant that the display was completely updated after each command so that it displayed the worksheet as revised by that command. Thus, in those earlier systems, using a macro to automatically enter a long keystroke sequence often resulted in many revisions to the displayed image occurring over a very short period of time.

System for managing information in a three dimensional workspace


An epicyclic gear carrier assembly for use in an epicyclic gear train of a gas turbine engine, the epicyclic gear train having a central axis and a plurality of epicyclic gears rotatable about individual gear axes. The epicyclic gear carrier assembly comprises at least a carrier plate defining a plurality of circumferentially spaced axle bores which are disposed radially outward from the central axis and are co-axial with the individual gear axes. A plurality of corresponding gear axles are disposed within the axle bores, and the plurality of epicyclic gears are rotatably mounted to the gear axles via bearing elements. An epicyclic carrier member comprises a plurality of axle engaging elements that are co-axial with the gear axles and are engaged thereto by load transmission members such that load is transferred from the gear axles to the epicyclic carrier member.

Epicyclic gearboxes are well known and are frequently used for their compact design and efficient high transmission ratio capabilities which is particularly useful in the environment of gas turbine engines. Epicyclic gear trains are also advantageous due to their versatility. Planetary and star gear trains are alternate arrangements used in epicyclic gearboxes. Both generally comprise three gear train elements: a central sun gear, an outer ring gear, and a plurality of planet gears supported by a planet carrier between and in meshing engagement with both the sun gear and the ring gear. A rotary input can be connected to any one of the three elements. Holding one of the remaining two elements stationary with respect to the other two, permits the third to serve as an output. In planetary gear trains, the central sun gear provides the input, the outer ring gear is held stationary, and the planet gears that rotate therewithin cause their planet carrier to rotate, which provides the reduced speed rotary output. In star gear trains, the sun gear provides the input. However, the planetary carrier is held stationary, and the outer ring gear provides the rotary output in a direction opposite that of the input sun gear.
While conventional epicyclic gear trains are significantly compact, particularly in relation to their high gear reduction capabilities, in relation to other types of gear trains, potential improvements remain possible in order improve the compactness of such gear train arrangements.
Further, certain shortcomings exist with known epicyclic drive trains. For example, as with many mechanical elements that transfer torque, a small but nevertheless significant amount of torsional deflection commonly occurs due to the elasticity of the material of the carrier, as a result of twist between upstream and downstream plates of the gear carrier, when the gear train is under load. The gear carrier generally twists around its central axis, causing the individual axis of rotation of the gears to lose parallelism with the central axis of the gear carrier. This torsional deflection results in misalignment at gear train bearings and at the gear teeth mesh, which leads to efficiency losses and reduced life of the parts.
Attempts to address this problem of planetary carrier torsional deflection are known. U.S. Pat. No. 5,466,198 issued Nov. 14, 1995 to McKibbin et al, for example, clearly sets out the problem and proposes a planetary gear train drive system which isolates the planetary carrier from torsional deflections. A torque frame or torque transfer structure is connected to a rotating load, such as a bladed propulsor. Pivotal joints, circumferentially disposed with respect to the carrier, each pivotable about a radial axis, connect axially extending arms of a torque frame to the planetary carrier. The pivotal joints permit the planetary carrier to be isolated from torsional deflections. However, further reductions in the torsional deflections resulting in the planetary carrier are possible.
There remains a need for a more compact epicyclic gear train arrangement that is capable of transferring torque while further reducing torsional deflections therewithin.


An apparatus having a frame, a slide assembly and a barrel is disclosed. The slide assembly may be slidably mounted to the frame along a sliding plane. The barrel may be disposed in the slide assembly. The barrel generally has a bore shaped to accept an ammunition round. The bore may define a bore axis intersecting the sliding plane such that when the ammunition round is fired the slide assembly recoils both backward and upward relative to the frame.

Conventional pistols have a barrel locked to a slide that accommodates a recoil when the gun is fired. The slide is typically aligned parallel to an axis of the barrel. During recoil, the movement of the slide causes the pistol to rotate muzzle-upward in the hands of the shooter. A mechanism to minimize the rotation is desirable.


A tacking fastener for securing workpieces together to form a temporary assembly is provided that includes a stem and a sleeve. The stem includes a proximal end portion, a central portion, and a distal end portion. The stem further includes a head disposed at the proximal end portion, the head defining a distal face having a gripping feature. The sleeve includes a flange disposed at the distal end portion, the flange defining a proximal face having a gripping feature. The sleeve is disposed around the stem and configured to form a tacking rivet upon installation of the tacking fastener. The sleeve is plastically deformed during installation to form a plurality of bulbs, thereby being capable of securing workpieces of varying grip length. The stem and the tacking rivet remain within the workpieces after the workpieces are secured.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Tacking rivets are used to temporarily fasten adjacent workpieces together for positioning purposes. The tacking rivets are inserted into only some of the apertures of the workpieces to properly align all the apertures of the workpieces before permanent rivets are inserted to permanently fasten the workpieces. After the permanent rivets are inserted into the remaining apertures, the tacking rivets are removed, for example, by drilling through the tacking rivets. More permanent rivets are then inserted into the apertures previously occupied by the tacking rivets to further fasten the workpieces.
A typical tacking rivet engages the workpieces by radially expanding a body of the tacking rivet to result in an interference fit between the body of the tacking rivets and the aperture surfaces. This interference fit may damage the aperture surfaces, making it difficult to insert the permanent rivet later due to the altered size/geometry of the apertures. Moreover, it is also difficult to remove typical tacking rivets without damaging the aperture surfaces of the workpieces. Further, typical tacking rivets of a specific length may be suitable only for workpieces of a specific thickness. Therefore, different sizes of typical tacking rivets are kept on-hand for workpieces of different thicknesses, thereby increasing inventory costs.

Blind, bulbing, tacking rivet and method of installation


A valve flap device for an exhaust system of a motor vehicle, having at least one tubular valve housing with a flow cross section running perpendicular to a central axis and being formed by the inner geometry and a shaft which can turn about a valve axis with a valve flap mounted on the shaft, being mounted in the valve housing to close the flow cross section. The valve flap device can be made with low material input and at the same time with low fabrication expense at low costs. For this, the valve housing is made from a tubular blank of sheet metal with a tube diameter that is calibrated to the flow cross section at least partially by mechanical, plastic forming.

In EP 1 887 200 A1 and in DE 60 2004 000 705 T2 are described valve flap devices with a tubular cast iron housing having valve flaps mounted by a shaft to control the flow through them.
The throttle devices described in EP 835 998 A1 and in DE 20 2008 005 992 U1 have tubular cast iron throttle housings that have been machined to produce the final geometry.
In DE 100 42 923 A1 is described a throttle mechanism in which the shaft for the valve flap is mounted on both sides and the bearing is press-fitted into the valve housing.


A method for re-transmitting data or control information in a radio link control layer relates to determining whether re-transmission will be ended by comparing a number of transmission with a critical value when the transmission of data or control information has successively failed. The retransmission cycle is comprised of the steps in the order of transmitting information, checking the transmission failure with exit, and counting the transmission number with exit. Therefore, the present invention makes any transmission be checked and prevents wasting radio resource which can occur in re-transmitting data or control information in UMTS mobile communication system.

1. Field of the Invention
The present invention relates to a method for re-transmitting data or control information in the radio link control layer of an IMT-2000 radio communication system and particularly, to a method for re-transmitting data or control information in the radio link control layer, capable of preventing waste of radio resource and errors by checking failure of the last transmission and performing the next process, when the number of the transmission of data or control information reaches a critical value by continuous transmission failure of data or control information between the radio link control layers of sender and receiver.
2. Description of the Related Art
A Third Generation Partnership Project (hereinafter, referred to as 3GPP) was formed by national or international or regional standardization organizations, such as ETSI of Europe, ARIB/TTC of Japan, T1 of USA, CWTS of China, and TTA of Korea in order to make a detailed specification of a European type third generation mobile communication system (IMT-2000 system). This system is called as UMTS (Universal Mobile Telecommunications System). UMTS adopted WCDMA (Wideband Code Divisional Multiple Access) technology as a radio access network technology. UMTS is being developed based on the General Packet Radio Service (GPRS) making its root on a packet-switched network and further based on the Global System for Mobile Communications (GSM) making its root on a circuit-switched network. In addition, the third generation mobile communication systems which are able to provide multimedia services, such as voice, video, and data, are under development in the above partnership.
The International Telecommunication Union (ITU) which is a subsidiary organization of the United Nations (UN) has the authority to establish the standards of international telecommunication. The 3GPP intends the international standards and suggests its own IMT-2000 standards to the ITU, which is different from the other organization 3GPP2. Conventionally, the radio access technology of the standards is called as W-CDMA and IMT-2000 technology standard, and also includes Universal Mobile Telecommunications System (UMTS).
The 3GPP includes five technical specification groups (hereinafter, referred to as TSG) in order to operate the project and to develop the technology rapidly and effectively. And the respective TSG takes a charge of development, approval, and management of a reference specification of related area. Among those groups, a radio access network (hereinafter, referred to as RAN) group develops a function, requirements of a user equipment and UMTS terrestrial radio access network (hereinafter, referred to as UTRAN), and the specification for an interface under an object of defining a new radio access network in the third generation mobile communication system.
The TSG-RAN group includes a plenary group and four Working Groups. The first Working Group (WG1) develops specification of the physical layer (first layer), the second working group (WG2) defines functions of the data link layer (second layer) and network layer (third layer). Also, the third working group determines specifications of an interface among a base station in the UTRAN, Radio Network Controller (hereinafter, referred as RNC) and a core network and the fourth working group discuss required conditions about the radio link capacity and requirements for the radio resource management.
FIG. 1 shows a structure of a radio interface protocol according to the 3GPP radio access network.
The radio interface protocol between a user equipment and UTRAN is composed of a physical layer, data link layer and network layer in parallel. Vertically, it includes a control plane for transmitting a control signal and a user plane for transmitting data information.
Describing FIG. 1 in more detail, the control plane includes a Radio Resource Control Layer (hereinafter, referred to as RRC), Radio Link Control Layer (hereinafter, referred as RLC), Medium Access Control Layer (hereinafter, referred as MAC) and Physical Layer. The user plane includes a Packet Data Convergence Protocol (hereinafter, referred as PDCP), RLC layer, MAC layer and physical layer.
The physical layer provides information transmission service to the upper layer using various radio transmission technologies. It is connected with the MAC layer which located at the upper portion by a transport channel and through the channel, data are moved between the MAC layer and physical layer. The transport channel is divided into a dedicated transport channel and a common transport channel according to whether it is monopolistically used by a user equipment or can be shared and used by a number of user equipments.
The MAC layer provides a re-allotting service of MAC parameter for allotting and re-allotting radio resource. The MAC layer is connected with the RLC layer by the logical channel and various logical channels are provided according to the kind of transmitted information. Generally, in case of transmitting information of the control plane, a control channel is used and in case of transmitting information of the user plane, a traffic channel is used.
The RLC layer provides radio link setting and canceling service and performs segmentation and concatenation of a RLC Service Data Unit (hereinafter, referred as SDU) which came from the upper layer of the user plane.
The header information is added to the RLC SDU and transmitted to the MAC layer in the form of the Protocol Data Unit (hereinafter, referred as PDU).
The PDCP layer is located at the upper portion of the RLC layer to transmit data by converting the data transmitted through internet network protocol, such as IPv4 or IPv6 into data in the form which fits the RLC layer. Also, data can be efficiently transmitted through radio interface by reducing unnecessary control information which is used in a wire network. This function is called as Header Compression and for instance, it can be used for reducing the amount of header information for TCP/IP.
The RRC provides an information broadcast service for broadcasting information to every user equipment located in a predetermined area. Also, the RRC takes the charge of control plane signal processing for exchanging control signal in the third layer and has functions of setting of radio resource between the user equipment and UTRAN, maintaining and canceling of the same. Particularly, the RRC has functions of setting, maintaining and canceling of a radio bearer and allotting, repositioning or canceling of radio resource used for radio resource access. At this time, the wireless bearer means a service which is provided by the second layer in order to transmit data between the user equipment and UTRAN. Namely, setting a radio bearer means that characteristics of protocol layer and channel which are necessary for providing a predetermined service are defined and each concrete parameter and operation method are set.
Hereinafter, the RLC layer will be described in more detail.
The RLC layer performs segmentation and concatenation of the RLC SDU which comes from the upper layer and composes the RLC PDU by adding the RLC header to the RLC payload which is composed after the operations of segmentation and concatenation. Since the RLC PDU header can include serial number, the receiver can detect the RLC PDU which is damaged when it is transmitted by checking the serial number of the received RLC PDU and can ask the sender for re-transmitting of the corresponding PDU.
The process that the RLC SDU are converted into an RLC PDU by the functions of segmentation and concatenation is shown in FIG. 2. As shown in FIG. 2, an RLC PDU can include one or more RLC SDU and an RLC SDU can be divided into a number of RLC PDU.
The operation of RLC layer includes three types of modes according to the functions and they are transparent mode, unacknowledged mode and acknowledged mode.
First, in case of operating the transparent mode, no header information is added to the RLC SDU which came from the upper layer. Generally, in the transparent mode, the RLC SDU segmentation and concatenation are not used, but exceptionally, the operations of segmentation and concatenation can be applied to the transparent mode according to the setting of the radio bearer
Second, in case operating the unacknowledged mode, re-transmission is not supported even if the transmission is failed. Therefore, even if the data are damaged or there occurs problems in transmitting the data and the related data are discarded. AS services which can use the unacknowledged mode, there are a cell broadcast service, voice over IP which uses the IP network and the like.
Finally, if the RLC layer operates in the acknowledged mode, re-transmission is supported in case of packet transmission failure. Namely, the sender RLC layer receives the state information with which success of transmission can be judged from the receiver and retransmits the RLC PDU which requires re-transmission.
The state information including the information of the lost PDU is loaded in the Status PDU and transmitted by the receiver. The Status PDU can be transmitted from the sender to the receiver, and at this time, the sender sends the MRW (Move Receiving Window) instruction.
When the RLC layer operates in the acknowledged mode, the RLC PDUs are stored in the RLC buffer in the order according to the serial information in the header. The stored RLC PDUs are delivered to the MAC layer as many as the MAC layer requires, and generally, transmission is performed according to the order of the serial number. Since the RLC PDU sent from the sender first time are transmitted in the order of the serial number, the receiver RLC layer can determine the lost RLC PDU by observing the serial numbers received.
For example, if the serial numbers of the received RLC PDU are #23, #24, #25, #32 and #34, the RLC PDUs having the serial numbers of #26 to #31 and #33 are presumed to be lost. The receiver checks the serial numbers of the received RLC PDU and transmits the status PDU including the information of positive acknowledgement or negative acknowledgement to the sender, thus to support the process of re-transmission of the sender.
Generally, the RLC layers of the sender and receiver, respectively, have a transmission window and receiving window. The transmission window means the extent of the RLC PDU that the sender can send at once, and the receiver can receive only the PDUs having serial numbers which are in the receiving window and the PDUs having serial number which deviate from the receiving window. Similarly, the receiver can receive only the PDUs having the serial numbers which are in the receiving window, and the PDUs having the serial numbers which deviate from the receiving window are discarded as soon as they are received.
The sender manages the state variables which are related to the re-transmission function of data. The state variables are, VT (DAT), VT (MRW) and VT (RST).
In the above, the VT is an abbreviation of "Variable for Transmission", the DAT is "Data", the MRW is "Move Receiving Window", and RST is "Reset".
Hereinafter, the state variable will be described with reference to accompanied drawings.
FIG. 3 is a flow chart showing the process for re-transmitting the data or control information of the RLC using the conventional state variable.
First, the state variable is set to 0. Then the state variable related to the corresponding information is increased by 1 after such information concerning the radio link control layer has been transmitted. If the value of the state variable is smaller than the critical value, by comparing the size of the state variable and the critical value which was already set, the information is transmitted again. At each time the information is transmitted, the state variable is increased by one. Finally, when the state variable becomes same as or larger than the critical value, the re-transmission process is terminated and the sending and receiving setting is converted to perform a new process (steps 31, 32, 33, 34 and 35).
FIG. 4 is a flow chart showing the RLC PDU re-transmission process particularly using the state variable VT (DAT).
The VT (DAT) indicates the number of transmission of a specific RLC PDU in the sender RLC layer. Whenever the RLC PDU is sent, the VT is incremented by 1. At this time, a state variable VT (DAT) exists for respective RLC PDU. If the above value becomes same as or larger than MaxDAT corresponding to the critical value to prevent the specific RLC PDU from being constantly re-transmitted, all the SDU related to the corresponding PDU are discarded and instruction of Move Receiving Window (hereinafter, referred as MRW) is performed. At this time, the MRW instruction is transmitted in the form of a super field which comprises the status PDU sent from the sender and the super field is called as a Move Receiving Window Super Field (steps 41, 42, 43, 44, 45 and 46).
FIG. 5 is a flow chart showing a process of re-transmitting the MRW instruction particularly using the state variable VT (MRW) in the processes for re-transmitting information in FIG. 3.
The MRW instruction is sent when there is needed to move the receiving window in case the VT (DAT) value is same as or larger than MaxDAT or for another reasons. At this time, The receiving window instruction must be set considering all of data which are affected by discard of the corresponding PDU. For example, in case a RLC SDU is composed of a number of RLC PDU and the VT (DAT) of the first PDU becomes same as the MaxDAT, if the first PDU is discarded, the corresponding SDU no longer have any value as data and accordingly, all of the RLC PDU including the corresponding SDU must be discarded. At this time, the MRW instruction must include information of all of the PDU which were discarded.
The VT (MRW) means the number that the MRW instruction is sent and the value is increased by one whenever the MRW instruction is sent. The sender drives Timer_MRW which is a corresponding timer after the MRW instruction is sent. If MRW_ACK which is a positive response information of the MRW instruction cannot be received until the timer is expired, the MRW instruction loading the same information is re-transmitted.
When the value of VT (MRW) becomes same as or larger than the MaxMRW which corresponds to the critical value, the RLC layer determines that the MRW instruction can no longer be performed and resets the operation of the RLC layer (steps 51, 52, 53. 54 and 55).
FIG. 6 is a flow chart showing the process of re-transmitting the RST of the RLC layer using the state variable VT (RST) in the processes for re-transmitting information in FIG. 3.
The reset instruction is performed by sending the RESET PDU to the receiver in case the VT (MRW) value is the same as or larger than the MaxMRW, or the operation of the RLC layer is reset by another reasons. The sender drives Timer_RST which is a related timer when the RESET PDU is transmitted. If the RESET ACK PDU, which is positive response information, is not received from the receiver until the timer is expired, an identical RESET PDU is re-transmitted.
The VT (RST) represents the number that the RST instruction is sent and the value is increased by one whenever the sender sends the RESET PDU. When the VT (RST) becomes the same as or larger than the MaxRST, the RLC layer determines that further restoration is impossible, notifies such condition to the upper layer and stops the operation (steps 61, 62, 63. 64 and 65).
The RLC layer obtains various information which is necessary for re-transmission of the RLC PDU and operation of the RLC layer without any help from the upper layers, thus to make a root to be independently operated.
In addition, the above described state variable VT (DAT), VT (MRW) and VT (RST) is increased by one whenever the corresponding information (respectively, RLC PDU, MRW instruction and RESET PDU) is transmitted as in FIGS. 3 to 6. When the value reaches the critical or threshold value (respectively, MaxDAT, MaxMRW, Max and RST), the corresponding process is terminated and additional operations are requested. At this time, problems of the re-transmission method according to the respective state variables will be described as follows.
First, the problems in the re-transmission method of the RLC PDU will be described. If the present value of VT (DAT) is MaxDAT-1 and negative response is received from the receiver, the sender re-transmits the corresponding PDU and increases the value of the VT (DAT) by 1.
At this time, since the value of the VT(DAT) became the same as the MaxDAT, the sender immediately discards the corresponding RLC PDU and RLC SDU and sends the MRW instruction. Since the MRW instruction includes information on discarding of the RLC PDU which was sent right before, the receiver must discard it even if the receiver received the corresponding RLC PDU successfully. Therefore, the PDU which was sent right before and information on discarding of the RLC PDU can be transmitted almost simultaneously and accordingly, in conclusion, the RLC PDU is unnecessarily transmitted and resource is wasted.
Second, the problems on the method for re-transmitting the MRW instruction will be described as follows. If the present value of the VT (MRW) is MaxMRW-1 and if the MRW_ACK is not received before the driven Timer_MRW is expired, the sender re-transmits an identical MRW instruction and the value of the VT (MRW) is increased by 1.
At this time, since the value of the VT (MRW) becomes the same as the MaxMRW, the process of moving the receiving window is immediately ended and the RESET PDU is sent to the receiver. Since the transmitted reset instruction nullifies the MRW instruction which was sent right before and synchronizes the RLC layer of the receiver, the MRW instruction can not display the effects even if it was successfully received at the receiver, and the RLC layer of the receiver performs the reset instruction. Therefore, in conclusion, the MRW instruction is unnecessarily transmitted and resource is wasted.
Third, the problems on the re-transmission method of the RLC reset instruction will be described as follows. If the present value of the VT (RST) is MaxRST-1 and the RESET ACK PDU is not received before the driven Timer_RST is expired, the sender re-transmits the RESET PDU and increases the value of the VT (RST) by 1.
At this time, the RLC layer immediately stops every operation since the value of the VT (RST) became the same as the MaxRST, and notifies to the upper layer that the reset process of the RLC layer has failed. In this case, since the RESET PDU, which was sent right before, cannot display the effects even if the receiver received it successfully, the corresponding RESET PDU is unnecessarily transmitted and resource is wasted.
As in the above cases, in the conventional method for re-transmitting data or control information, the data or control information may be unnecessarily transmitted. Also, if such re-transmission method is used, serious errors in operating the system can occur. For instance, when the values of the MaxDAT, MaxMRW and MaxRST (which are critical or threshold values of the respective state variables) are set as "1", the value of the VT (DAT) becomes "1" after initially transmitting a specific PDU and sender sends the MRW instruction on the PDU which was transmitted immediately. After initially sending the MRW instruction, the value of the VT (MRW) becomes "1", and accordingly, the RESET PDU is immediately transmitted. Also, the value of the VT (RST) becomes "1" right after the RESET PDU is transmitted and the sender notifies the upper layer that an error is occurred. Namely, in case the critical value of the state variable is set as "1", the system cannot be operated normally.

This patent is subject to a terminal disclaimer.

Method for controlling retransmission of information using state variables in radio communication system


The electronic device has a power supply input unit which inputs power from an external power supply, an information processing unit which is capable of performing a first function and a second function which consumes more power than the first function does, a display unit which responds to power input to the power supply input unit by displaying whether or not to allow the performance of the first function and the performance of the second function, and an operation unit which receives an operation to be performed in response to the display on the display unit. The information processing unit switches between allowing only the performance of the first function and allowing both of operation in the first function and the performance of the second function according to the operation received by the operation unit.

1. Field of the Invention
The present disclosure relates to an electronic device and an imaging apparatus which can draw power from an external power supply through a communication cable.
2. Description of the Related Art
There have been known electronic devices which can operate on an external power supply such as another electronic device through a communication cable. For example, an electronic device which is connected to a USB (Universal Serial Bus)-compliant host device via a USB cable operates on a host device, i.e., an external USB power supply. When the above described electronic device which can operate on a host device is made to perform an operation which consumes current exceeding 500 mA, which is the maximum current value to be supplied from the external USB power supply as specified in the USB standard, the USB power supply and the electronic device may malfunction. To solve that problem, there have been disclosed configurations for preventing the malfunctions which would otherwise occur by providing a USB host device with an extended power mode in which the USB host device can supply non-standard current not defined in the USB standard and by causing an electronic device to enable its main operation part to perform an operation which consumes non-standard current higher than 500 mA specified in the USB standard as the maximum current value on the condition that the electronic device has confirmed that the host device has the extended power mode (for example, see Unexamined Japanese Patent Publication No. 2009-176190).
It is an object of the present disclosure to provide an electronic device and an imaging apparatus which can make efficient use of power supply capability of an external power supply.

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.


In a high-breakdown-voltage diode, a high-concentration p-type layer is selectively formed in an n-type silicon layer, and a high-concentration n-type layer is formed in the same separate from the layer by a predetermined distance. An insulation film having a dielectric constant larger than silicon is formed on that portion of the n-type silicon layer which extends between the layers, for relaxing concentration of an electric field caused in the surface of the substrate.

1. Field of the Invention
This invention relates to a high-breakdown-voltage semiconductor element.
2. Description of the Related Art
A technique of providing a guard ring around an end pn-junction formed in an element region to be supplied with a high voltage is known as a method of increasing the breakdown voltage of a semiconductor element. The guard ring reduces the degree of electric field concentration at a tip portion of a depletion layer extending from the pn-junction, thereby increasing the breakdown voltage of the element. The effect of reducing the degree of the electric field concentration is obtained by optimally designing the depth of diffusion of the guard ring layer, the distance between the guard ring layer and a terminal region, and the distance between guard ring layers (if a plurality of guard ring layers are employed).
FIG. 16 shows an end portion of a high-breakdown-voltage diode having such a guard ring structure. A high-concentration p-type layer 2, which is to be an anode region, is formed in the upper surface of a high-resistance n-type silicon layer 1 (substrate). Further, a high-concentration n-type layer 3 is formed in the upper surface of the layer 1 separated from the layer 3 by a predetermined distance, for stopping the extension of a depletion layer. The layer 3 is provided with an electrode 5 for supplying a voltage identical to that of a cathode. High-concentration p-type layers 21 and 22 serving as guard rings are formed in the surface between the layers 2 and 3. An electrode 7 is formed on the lower surface of the layer 1 with a high-concentration n-type layer 6 interposed therebetween.
In such a structure, it is difficult to determine the distance between a guard ring layer and a terminal region, and the distance between guard ring layers in the case of employing a plurality of guard ring layers.
As described above, the conventional high-breakdown-voltage semiconductor element of a guard ring structure is hard to design.


Methods are provided for repairing an existing structure to cover at least a portion of the existing structure with a repair structure. Such methods comprise mounting one or more standoff retainers to the existing structure; coupling one or more standoffs to the standoff retainers such that the standoffs extend away from the existing structure; coupling one or more cladding panels to the standoffs such that the panels are spaced apart from the structure to provide a space therebetween; and introducing a curable material to the space between the panels and the existing structure, the panels acting as at least a portion of a formwork for containing the curable material until the curable material cures to provide a repair structure cladded, at least in part, by the panels. Corresponding apparatus for effecting such methods are also provided.

Concrete is used to construct a variety of structures, such as building walls and floors, bridge supports, dams, columns, raised platforms and the like. Typically, concrete structures are formed using embedded reinforcement bars (often referred to as rebar) or similar steel reinforcement material, which provides the resultant structure with increased strength. Over time, corrosion of the embedded reinforcement material can impair the integrity of the embedded reinforcement material, the surrounding concrete and the overall structure. Similar degradation of structural integrity can occur with or without corrosion over sufficiently long periods of time, in structures subject to large forces, in structures deployed in harsh environments, in structures coming into contact with destructive materials or the like.
FIG. 1 shows an example of a damaged concrete structure 10. Structure 10 is generally rectangular in cross-section and comprises undamaged in section 10A and damaged in section 10B. The damage to structure 10 has changed the cross-sectional shape of damaged section 10B. While damaged section 10B remains generally rectangular, its surface profile is relatively uneven. In some portions 12 of structure 10, the concrete damage is sufficient to expose reinforcement material 14 (e.g. steel rebar).
There is a desire for methods and apparatus for repairing and/or restoring concrete structures which have been degraded or which are otherwise in need of repair and/or restoration.
Some structures have been fabricated with inferior or sub-standard structural integrity. By way of non-limiting example, some older structures may have been fabricated in accordance with seismic engineering specifications that are lower than, or otherwise lack conformity, with current seismic engineering standards. There is a desire to reinforce existing structures to upgrade their structural integrity or other aspects thereof.
There is also a desire to protect structures from damage which may be caused by, or related to, the environment in which the structure is deployed and/or the materials which come into contact with the structure. By way of non-limiting example, structures fabricated from metal or concrete can be damaged when they are deployed in environments that are in or near salt water or in environments where the structures are exposed to salt or other chemicals used to de-ice roads.
Structures for which it is desirable to repair, restore, reinforce and/or protect are not limited to concrete structures. There are similar desires for structures fabricated from other materials.

Methods and apparatus for restoring, repairing, reinforcing and/or protecting structures using concrete


A plurality of process cartridges are provided at a device main body. The process cartridges are arranged in tandem in a vertical direction, and are each mountable/removable by being withdrawn in a horizontal direction. A transport belt is disposed near side portions of the process cartridges. The transport belt transports paper between the transport belt and each of the process cartridges. A cover covers the side portions of the process cartridges and is axially supported at the device main body, below the process cartridges, to be swingable. The cover is attached to be capable of opening and closing a process cartridge side portions side of the device main body. The belt is mounted at the cover so as to be disposed between the process cartridges and the cover, and operates integrally with the cover.

1. Field of the Invention
The present invention relates to an image formation device which forms an image on a recording medium.
2. Description of the Related Art
An image formation device for forming an image on a recording medium is known which is provided with a plurality of process cartridges, which are provided at a main body of the device to be mountable and removable in a lateral direction (horizontal direction), and which are arranged in tandem (see, for example, Japanese Patent Application Laid-Open (JP-A) No. 2003-241616). A belt body, which is disposed at a lateral direction side of these process cartridges (a side of side portions of the process cartridges), is swung to open up the lateral direction (side portions) side of the process cartridges, and the process cartridges are mounted/removed.
However, in JP-A No. 2003-241616, the belt body is axially supported at the device main body. Therefore, when the belt body is swung and the lateral direction side of the process cartridges is opened up, the belt body is not greatly separated from the process cartridges. Hence, the belt body is an obstacle at times of mounting/removal, particularly of a lowest of the process cartridges. Moreover, at times of mounting/removal of the process cartridges, the belt body may be soiled by toner which leaks from the process cartridges.

Image formation device with belt mounted pivoting cover


A portable user device may provide Global Positioning System (GPS) services. The device may include a GPS receiver. The GPS receiver may provide accurate information about the current location of the device. A user may use the device to perform tasks. Certain tasks may generate excess heat or de-generate heat that causes the GPS receiver to perform unsatisfactorily. Methods are provided that can test GPS receiver performance during acquisition mode and during tracking mode. During testing, the GPS receiver may be given a predetermined amount of time to acquire a GPS fix. The GPS receiver may be tested repeatedly to acquire successive GPS fixes. After a desired number of tests are performed, a success rate may be calculated. If the success rate is satisfactory, the GPS receiver satisfies design criteria. If the success rate is not satisfactory, the GPS receiver may be reconfigured with new settings.

This invention relates to electronic devices and more particularly, to portable electronic devices with satellite navigation system capabilities.
Electronic devices use satellite navigation systems to support navigation functions. For example, an electronic device may use a satellite navigation system such as the Global Positioning System (GPS) to obtain position information, timing information, and other navigation information. The Global Positioning System includes satellites that orbit the Earth, Earth-based control and monitoring stations, and GPS receivers that are located within the electronic devices. GPS services may be provided on a continuous basis anywhere that is within range of the orbiting satellites.
A portable electronic device may include a GPS receiver. The GPS receiver may sometimes be referred to as a GPS unit. The GPS unit determines the current position (location) of the portable electronic device. During operation, the GPS unit may receive data streams from GPS satellites orbiting the Earth. Using a local clock, the GPS unit analyzes each data stream to make a transit time and distance estimation.
A method known as geometric trilateration may be used to determine the location of the GPS unit by analyzing the estimated distances of each of the satellites to the GPS unit. The accuracy of location measurements made using the GPS unit depends on accuracy of the local clock. The local clock is typically implemented using a crystal oscillator. If the output of the oscillator exhibits errors, the GPS receiver may not function as expected.
Some GPS units are housed in dedicated handheld devices. Other GPS units are used in more complex devices such as cellular telephones. Devices such as these may have components whose operations can adversely affect GPS performance.
As an example, a cellular telephone may include cellular telephone transceiver circuitry that is used to make telephone calls. The cellular telephone transceiver circuitry includes power amplifier circuitry that transmits radio-frequency (RF) signals to a nearby base station. If care is not taken, a rapid change in heat generated from the power amplifier circuitry may adversely affect the accuracy of the oscillator in the GPS unit, thereby resulting in degraded GPS performance. Acquiring a GPS location measurement when making a phone call may therefore be unacceptably slow.
Conventional arrangements for testing GPS receiver performance involve measuring the performance of the GPS unit while the power amplifier circuitry is placed in an active mode that constantly transmits radio-frequency signals. The performance of the GPS unit, however, may be most adversely affected when the thermal transient (i.e., the instantaneous change in heat generated by the cellular telephone transceiver circuitry) is maximized. Testing GPS performance using the conventional approach is not a rigorous test of GPS performance, because leaving the power amplifier circuitry in the active mode does not maximize thermal transient.
It would therefore be desirable to be able to provide ways of testing GPS receiver performance.

Methods for testing satellite navigation system receivers in wireless electronic devices


An anterior cervical plating system having moveable plate segments to vary the overall length of the plate, moveable to allow and/or cause intersegmental compression of vertebral bodies, and coupled together by a non-detachable fastener. The plating system includes locking elements for locking only one bone screw to the plate, instrumentation, and method for installation thereof. The plating system is capable of both passive and active dynamization and the ability to produce the former from the latter.

The use of plates, screws, and locks to prevent separation and backing out of screws from the plate, for use on the anterior aspect of the cervical spine to provide alignment and stability as an adjunct to fusion of adjacent vertebral bodies is known in the art. Also known in the art is that compressive load, within a physiological range across a fusion site, is beneficial to the fusion process. Conversely, a failure to maintain a compressive load across a fusion site, or to have a gap in the fusion construct continuity may lead to a failure to achieve fusion called pseudoarthrosis. A primary purpose of the aforementioned cervical hardware is to provide stability during the healing and fusion process. The fusion process occurs in part through a process called "creeping substitution" by which new living bone replaces the dead bone such as that of a bone graft. The fusion process involves a phase of bone resorption as preliminary to the formation of the new bone. It is possible then for the bone resorption to result in gaps in the continuity of the fusion mass, such that if the hardware is sufficiently rigid, such as occurs as a result of increasing the strength of the components and constraining the relationship of the screws to the plate, those gaps may persist and increase in size as the hardware holds the bone portions separated rather than allowing those bone portions to move together to close those gaps. This holding apart of the bone portions (called distraction) can therefore lead to a failure of fusion (pseudoarthrosis). These rigid systems by a combination of not inducing compression at the fusion site and of holding the bone portions to be fused apart may cause a "distraction pseudoarthrosis."
Alternative cervical plating systems have attempted to prevent distraction pseudoarthrosis by allowing the vertebral bodies to collapse towards each other as needed during the fusion process. Generally this has been done by allowing the bone screws to be free to move relative to the plate, that is, movement such as sliding, swiveling, rotating, and angulating, independent of whether the screws are prevented from separating or backing out of the plates such as by the use of locks. Undesired multidirectional instability can occur in such plating systems that is counter to the very purpose of such hardware which is to increase or provide for stability.
Another approach to solving this problem has been to attach by screws a block to each of the vertebral bodies to be fused and then to allow those blocks to slide up and down on a pair of rods. Each of these constructs have in common that they sacrifice stability, the ability to hold the bones to be fused rigidly in place and prevent undesired motion; for the ability to allow, but not cause the vertebral bodies to collapse.
There exists therefore a need for an improved anterior cervical plating system that is: (1) sufficiently rigid to maintain the desired alignment of the vertebral bodies to be fused; (2) capable of inducing compressive load across the fusion site; and/or (3) capable of allowing for the motion of the vertebral bodies towards each other to prevent or to close any gaps in the continuity of the fusion construct, while still being capable of preventing motion in all other directions. When similar challenges have been faced at other skeletal locations, the solution involved anchoring the bone screws through the far cortex of the bone portions to be joined, in effect anchoring the screws in such a way as to make it possible for the screws to force movement of the plates. In the cervical spine anteriorly, however, it has been found to be highly undesirable to drive the bone screws through the far cortex of the vertebral bodies, as this is where the spinal cord is located. There remains therefore a need for an improved cervical plating system as just described that does not require that the bone screws penetrate the far cortex to achieve the desired purpose as described.
The size of the vertebral bodies and the spacing between the vertebral bodies varies from patient to patient. The height of the vertebral bodies and the discs therebetween may vary level by level even in the same person. Thus, a plate of correct length does not necessarily have bone screw receiving holes correctly positioned to overlie the vertebral bodies in accordance with the spacing of the vertebral bodies to which the plate is to be applied. As a result, conventional plating systems of the past had to be manufactured in many different lengths and spacing configurations which were nevertheless fixed in an attempt to provide plates for many, though still possibly not all, of the various sizes and spacings of the vertebral bodies to which the plate was to be applied. For example, in a multi-segment plate the length of the plate would need to correspond to the overall length of the vertebral bodies to be joined and actual distances therebetween and the screw holes of the plate arranged to overlie the vertebral bodies. In order to cover the possible range of sizes, health care facilities would need to carry a large inventory of different sizes of plates, in some cases as many as sixty different sized plates would be needed. Such a large inventory is an expensive undertaking and still worse, facilities with a high caseload need to invest in more than one of each plate size to provide for the possibility of overlapping demand for the same plate size. Facilities with lower caseloads may find it prohibitively expensive to stock an inventory of plates sufficient to cover the range of possible sizes and thus might not be able to afford to stock a set at all or have less than all sizes of plates needed for all cases. Manufactures cannot afford to place a set of plates on consignment in facilities with low caseloads as the number of sales would not cover the carrying costs of the plates.
There exists therefore a need for an improved anterior cervical plating system that (1) allows for the overall adjustability of the length of the plate; (2) allows for variations in spacing between the bone screw receiving holes of the plate portions corresponding to the attachment point of the plate to the vertebral bodies; (3) reduces the requisite plate inventory; and (4) can avoid or prevent distraction pseudoarthrosis without itself introducing multidirectional instability.

Instrumentation for use with dynamic single-lock anterior cervical plate system having non-detachably fastened and moveable segments