The present invention provides a dolastatin-10 derivative having excellent anticancer activity, a method of producing the same and anticancer drug composition containing the same as an active ingredient.

Dolastatin-10 was isolated from the Indian Ocean sea hare Dolabella auricularia in 1987 and identified to have the following chemical structure [J. Am. Chem. Soc., 1987, 109, 6883-6885]. Dolastatin-10 exhibits physiological activity as an antimicrotuble agent similar to taxane and vinca alkaloid, but is a structurally different peptide [Chem. Ind., 1999, 51-55; Curr. Pharm. Des., 1999, 5, 139-162].

Different in structure from taxane and vinca alkaloid as well as proven to have inhibitory activity against various human tumors in in vitro and animal model experiments in pre-clinical trials, dolastatin-10 was expected to not exhibit the side effects found in taxane and vinca alkaloid, such as myelotoxicity. In spite of the structural difference, however, dolastatin-10 was found to have myelotoxicity, neurotoxicity, and other side effects, such as taxane and vinca alkaloid, in clinical studies [Clin. Cancer Res., 2000, 6, 1293-1301; Drugs of the Future, 1999, 24(4), 404-409].
A variety of dolastatin-10 derivatives were synthesized, with derivatization conducted on the five moieties Dov (dolavaline), Val (valine), dolaisoleucine, dolaproline, and dolaamine. Of them, the dolaproline and dolaamine moieties have been intensively studied while dolastatin-10 derivatives were disclosed in WO 2003/008378 where the methoxy of the dolaproline moiety was substituted with thiomethoxy and in U.S. Pat. No. 5,599,902 where the dolaamine moiety was modified. Meanwhile, EP No. 260 858 discloses a derivative in which the dimethylvaline of the Dov moiety is substituted with monomethylvaline.

Dolastatin-10 derivative, method of producing the same and anticancer drug composition containing the same


A graphical user interface for a videophone in a cable television system allows the user to access the videophone functionalities with an input control device and a television monitor. The user can place a call, receive a call and store/access/call addresses using a remote in conjunction with the graphical user interface display screens. The videophone has several elements including a user interface, a graphics engine, a network interface, a remote control interface, and an output audio/video line connected to a television monitor. The user interface receives and processes control inputs using a microprocessor and the graphics engine generates the display screens using a DSP. Depending on processing requirements, the DSP may implement the user interface rather than the microprocessor. Also, anti-aliasing fonts are used to generate a high quality display. To save processing cycles, the anti-aliasing fonts may be retrieved from a look-up table rather than being generated in real time. The videophone may be implemented as a plug-in device to a set-top box, a standalone unit, or a standalone unit with a set-top box between the monitor and the videophone unit. When implemented with a set-top box the same remote control unit may be used to control the television and videophone functions.

Advances in telephony have occurred such that full duplex audio communication between parties can be supplemented by providing full duplex video communication in tandem with full duplex audio.
It is envisioned that consumers will use videophones to converse with friends and relatives living in distant cities. Videophones are especially desirable for special occasions which consumers often videotape such as holidays, birthdays, new baby and child related accomplishments, etc. Also, other features add to the attractiveness of the videophone. For example, incorporation of a portable video camera in the videophone system would allow people to walk around their home and not only talk to someone on the other end, but also show the other person things through the camera. Further, incorporation of video message recording and retrieval functionality would allow the videophone to act analogously to today's answering machines/voice mail options. Also, remote monitoring could be implemented so that a person could check on various aspects of their home. The possibilities are numerous.
There is a need in the art to easily and inexpensively implement the aforementioned video functionality. The basic problem that has arisen is how to provide video telephony services to a customer's home or office. Primitive standalone videophone units which incorporate a screen, camera, and the like into a small telephone device have been implemented. Several drawbacks are associated with these units. It is difficult for the users to appreciate the full breadth of the video nor are these units easily adapted to realize the advanced features described above.
One viable alternative is to utilize existing cable television networks and display devices. However, to implement the videophone in a cable system, the user must be able to interact with such a device through standard mediums already found in those environments including remote controls, set-top boxes, and television sets. The user interface has many constraints imposed by usability requirements, performance requirements, and memory limitations. In addition, very compute-intensive digital audio and video signal transmission must be performed by the videophone. A user interface cannot use a significant number of processor cycles or utilize too much memory.
Also, many consumers are not computer literate, and therefore, systems which operate on personal computers or act like computers cannot satisfy the needs of a substantial segment of the consuming public, and accordingly, are impractical.
Thus, there is a need to design a user interface which can operate in a video telephony system without suffering from the above drawbacks.

Method and apparatus for implementing a user interface for a videophone in a cable television network


The present invention provides a synthetic process for the N-demethylation of N-methyl morphinans. In particular, the invention provides improved synthetic methods for the preparation of N-demethylated morphinan compounds that may be employed as starting materials, for example, commonly available N-methyl opiates such as oripavine and thebaine, and C(3)-protected hydroxy derivatives of oripavine.

Commercially valuable "nal" morphinan compounds or intermediates, such as naltrexone, naloxone, nalbuphene, nalmefene, and buprenorphine, are generally prepared from nor-morphinan compounds that lack substitution on the nitrogen atom of the heterocyclic ring. These nor-morphinan compounds may be derived from natural opiates or derivatives, such as thebaine and oripavine. This approach, however, requires removal of the N-methyl substituent, an approach that can lead to a complex mixture of products. There is a need, therefore, for improved synthetic methods for the preparation of N-demethylated morphinan compounds.


Vertical cavity surface emitting lasers are disclosed, one example of which includes a substrate upon which a lower mirror layer is formed. An active region and upper mirror layer are disposed, in that order, on the lower mirror layer. In particular, the upper mirror layer includes a plurality of DBR layers formed on the active region. The upper mirror layer additionally includes a photonic crystal formed on the plurality of DBR layers and having a periodic structure that contributes to the definition of a central defect. As a consequence of this structure, the photonic crystal has a reflectivity that is wavelength dependent, and the central defect enables the VCSEL to propagate a single mode.

1. The Field of the Invention
The present invention relates to vertical cavity surface emitting lasers. More particularly, the present invention relates to single mode vertical cavity surface emitting lasers that use photonic crystals with a central defect.
2. Background and Related Art
Vertical cavity surface emitting lasers (VCSELSs) are an example of semiconductor lasers used in fiber optical systems and have several advantages over other types of semiconductor lasers. VCSELs can be manufactured in large quantities due to their relatively small size and can often be tested on a single wafer. VCSELs typically have low threshold currents and can be modulated at high speeds. VCSELs also couple well with optical fibers.
VCSELs are typically made from both GaAs semiconductor materials and InP semiconductor materials, but GaAs semiconductor materials make better multi-layer mirror systems than InP semiconductor materials. A high reflectivity mirror system is needed in a VCSEL because the light resonates in a direction that is perpendicular to the pn-junction. The cavity or active region of a VCSEL is thus relatively short and a photon has little chance of stimulating the emission of an additional photon with a single pass through the active region. To increase the likelihood of stimulating the emission of photons, VCSELs require highly efficient mirror systems such that a photon can make multiple passes through the active region. The reflectivity is currently achieved using Distributed Bragg Reflector (DBR) layers.
One problem associated with VCSELs is related to the wavelength of the light that is generated. Current VCSELs typically generate light that has a wavelength of approximately 0.85 microns. This wavelength is primarily useful in very short distance fiber optic communications but is typically inadequate for longer distance fiber optic networks such as telecommunication networks. Attempts to develop and fabricate VCSELs that operate at longer wavelengths (1.3 microns and 1.55 microns, for example) and at higher power have proven to be very difficult. This difficulty is related to the fact that InP semiconductor materials permit the growth of a suitable active region for generating longer wavelengths, but the InP DBR layers are not effective. When GaAs semiconductor materials are used, the growth of the DBR layers is straightforward, but the active region is unsuitable. In addition, attempts to increase the power produced by VCSELs results in multimode emission. The difficulty in fabricating and designing the multiple DBR layers and the need for the lattice structures of the various layers in the VCSEL to match are additional reasons that impede the successful creation of a high power single mode VCSELs. Typically, attempts to create such VCSELs have resulted in VCSELs that produce insufficient power, are unreliable, or generate multiple modes.

Single mode vertical cavity surface emitting laser using photonic crystals with a central defect


A target detection apparatus includes a target detection section, a following section, a reception tendency determination section, and a target determination section. The reception tendency determination section determines a tendency of received electrical power of a reflected wave from the objective target relative to a distance from the vehicle to the objective target on the basis of a result of following the objective target by the following section. The target determination section determines the objective target as a high target allowing the vehicle to pass under, when the reception tendency determination section determines that the received electrical power has a tendency to be constant regardless of the distance to the objective target.

In-vehicle radar apparatuses are known that detect information on a target having reflected a radar wave, such as a distance to the target, a relative speed of the target to the vehicle, and an azimuth of the target, by sending and receiving the radar wave. As an in-vehicle radar apparatus of this type, there is such the apparatus as described in PTL 1 below which estimates a height of a target from a road surface, the target continuously detected over a plurality of measurement cycles, from electrical power distribution of the received power, specifically a production pattern of a null point.


The present invention relates to apparatus for measuring the genetic sequence of electrically charged biopolymers by means of hybridization. The measuring apparatus comprises a container that contains a biopolymer and can be removed from the apparatus, and electrodes that apply an electric field to the container and are electrically insulated from the container. When an electric field is applied to the container, suspended biopolymeric molecules are attracted toward the positive electrode, thus increasing the speed of hybridization.

1. Field of the Invention
The present invention relates to apparatus for measuring the genetic sequence of biopolymers, such as DNA and protein.
2. Description of the Prior Art
The DNA chip for hybridization described in the published Japanese translation of patent application Ser. No. 512,605 of 1999 is configured in such a manner that a large number of electrodes are formed on a substrate and a current source is connected to each of these electrodes. There are 100 to 10,000 electrodes on the substrate and, in normal applications, a different type of DNA segment is fixed to each electrode.
By flowing unknown DNA segments onto the substrate to which known DNA segments are fixed for hybridization as described above, it is possible to have an unknown DNA segment combine with its corresponding DNA segment. If the unknown DNA segment is labeled with a fluorescent reagent, the sequence of the unknown DNA segment that has combined with any known DNA segment can be determined.
The prior art cited above will now be described in further detail. As shown in FIG. 1, a positive voltage is applied to an electrode 1 to which a known DNA segment indicated by 2 is fixed. Since DNA is negatively charged, an unknown DNA segment indicated by 3 is attracted toward the electrode 1 where the known DNA segment 2 is fixed, as shown in FIG. 1b. As a result, hybridization that used to take several hours to finish is completed in only several tens of seconds.
The combining force is weak in case known and unknown DNA segments with different sequences wrongly combine with each other, as shown in FIG. 2a. Thus means the segment pair can be separated by applying a weak negative voltage to the electrode 1 after hybridization, as shown in FIG. 2b. Thus, it is possible to precisely measure even a single-base difference as seen in such DNA samples as SNPs (single nucleotide polymorphisms).
Such a DNA chip as described above is housed in a cartridge together with, for example, a fluid system combined with a detection system.
This DNA chip has had the following problems, however:
1) Cartridges are designed to be disposable, as a rule. On the other hand, the prior art cartridge requires a large number of electrodes and electrical connection terminals to be formed thereon and, therefore, is costly. Furthermore, electrodes and their processing circuits are also required for a reading unit used with the cartridge. Thus, the cost of a total system also is high.2) Since the electrical connections of the DNA chip are made of electrodes, metal surfaces in contact with a solution are liable to cause electrochemical noise or fluctuations. Furthermore, electrical contact with the terminals of the reading unit tends to become defective.3) The DNA chip requires electrodes and their electrical taps to be formed on the cartridge, thereby increasing the size of the cartridge. The reading unit also requires such elements as terminals and voltage supply circuitry.

Apparatus for measuring the genetic sequence of biopolymers


A method is presented for grinding a surface of an elongate bar having a plurality of thin film magnetic elements aligned in a line, each of the thin film magnetic elements having a magnetoresistive sensor for reading a magnetic record from a recording medium and an inductive electromagnetic transducer for writing a magnetic record into the recording medium in a stacked structure, the surface of the bar being a grind surface so that it can be formed into an air-bearing surface by means of the grinding. The method has steps of providing first resistive films on the grind surface in advance along a first longitudinal line parallel to a longitudinal direction of the bar, and providing second resistive films on the grind surface in advance along a second longitudinal line parallel to the longitudinal direction of the bar. The method further has a step of grinding the grind surface while pressing the bar against a rotating grinding disc with the longitudinal direction of the bar positioned toward a radial direction of the grinding disc, measuring electric resistance values of the first and second resistive films, and controlling an amount that is ground of the grind surface in the longitudinal direction and a direction perpendicular to the longitudinal direction based on the electric resistance values of the first resistive film and the second resistive films.

1. Field of the Invention
The present invention relates to a method for grinding a bar in which thin film magnetic elements with inductive electromagnetic transducers and MR sensors are formed.
2. Description of the Related Art
A hard disk drive generally uses a thin film magnetic head. Among other kind of heads, a composite thin film magnetic head has been widely used, which has a stacked structure comprising a read head having a magnetoresistive sensor (also referred to as MR sensor) for reading magnetic data and a write head having an inductive electromagnetic transducer for writing magnetic data.
A thin film magnetic head of this kind is fabricated according to the following steps. First, a plurality of thin film elements each having an MR sensor and/or an inductive electromagnetic transducer in a stacked structure are formed on a ceramic substrate. Then the wafer on which the thin film elements are formed is cut into elongate bars such that a plurality of thin film elements are aligned in a single line. The cut bars are then ground by a special grinding machine to form an air-bearing surface.
FIGS. 1A to 1C exemplarily show a conventional method for grinding a bar in which thin film elements are formed in line. A wafer on which thin film magnetic elements are formed in two dimensions is cut line by line into bars 172. Bar 172 is carried on holder 156 as shown in FIG. 1A, and pressed against a rotating grinding disc 152 of a grinding machine while being carried on holder 156 as shown in FIG. 1B, whereby the entire grind surface of bar 172 is ground by grinding disc 152.
However, if bar 172 is pressed against grinding disc 152 in a tilted position, bar 172 is ground unevenly in the longitudinal direction of bar 172, i.e., in the direction in which the thin film magnetic elements are aligned. In other words, the inner circumferential portion is ground excessively while the outer circumferential portion is ground insufficiently as shown in FIG. 1C. In FIG. 1C, when bar 172 is ground to meet the line of "target MRH" shown in the figure, thin film magnetic element 161a disposed in radially outward portion will not be ground to the target MRH, thin film magnetic head 161b in the center portion will be ground to the target MRH, and thin film magnetic head 161c disposed in radially inward portion will be ground exceeding the target MRH.
For reference, the term "Air bearing surface (ABS)" is used herein to mean a surface of a thin film magnetic head facing a recording medium. The term "MR height (MRH)" is used to mean a height or length of an MR sensor measured perpendicularly from an ABS to the opposite end."
As an MR sensor, for example, an AMR (Anisotropic magneto Resistive) sensor utilizing an anisotropic magnetoresistive effect, a GMR (Giant Magneto Resistive) sensor utilizing a giant magnetoresistive effect, or a TMR (Tunnel Magneto Resistive) sensor utilizing a tunnel magnetoresistive effect are commonly used. It is important to form an MRH according to design requirement in order to ensure the output performance. For this reason, in the prior art, a wafer is formed with an extra amount of MR height. When the wafer is cut into bars, this surplus portion still remains. Then the bar is ground to ABS, and the surplus portion of the MR sensor is removed to form the target MRH.
Thus, if the amount that is ground varies depending on the position within the bar as described above, MRH varies from one thin film magnetic head to another, entailing significant degradation of the yield ratio. In order to address such an issue, a method has been disclosed in which resistive films, which are dummy films, are embedded in the grind surface of the bar in advance. Since the resistive films vary in electric resistance as the resistive films are ground, the amount that is ground can be controlled by monitoring the resistance value of the resistive films. For example, see specifications etc. of Japanese Patent Laid-down Publication No. 101634/2001 and 242802/99.
However, in the above prior art, while the amount that is ground are properly controlled in the longitudinal direction of the bar, the amount that is ground cannot be properly controlled in the direction perpendicular to the longitudinal direction of the bar, i.e., in the short direction of the bar, which will be explained below in detail.
A thin film magnetic head typically has an inductive electromagnetic transducer on the upper side of an MR sensor in the stacked direction. The inductive electromagnetic transducer has an upper magnetic pole layer and a lower magnetic pole layer, and pole tip regions of the both layers are opposite to ABS with a write gap sandwiched therebetween. For reference, the term "throat height (TH)" is used herein to mean the length (height) of a region in which both magnetic pole layers are opposite to each other with the write gap interposed, i.e., the length of pole tip regions from ABS to the opposite end. Since throat height TH is a key dimension for writing characteristics, it is desirable to form throat height TH accurately according to design requirement.
The drawing on the right in FIG. 1C schematically shows a distribution of the amount that is ground in the short direction of bar 172. MR sensor 161m and write head portion 161t are arranged side by side in the short direction. As has already been described, the amount that is ground of bar 172 in the longitudinal direction is controlled by using MRH as the target, so that thin film magnetic element 161b in the center portion shown in the figure is ground substantially to meet the target MRH. However, in reality, bar 172 is subject to a pitch motion in the circumferential direction in the grinding process due to various causes such as deformation of holder 156 and bar 172 themselves, the rigid adhesion of bar 172 to holder 156, and the variation in the position of bar 172 when attached to holder 156. This results in variation in the amount that is ground in the forward and backward direction of bar 172, i.e., in the rotational direction of grinding disc 152. While as shown in the drawing on the right in FIG. 1C, a larger amount of bar 172 may be ground in the forward portion as described above the arrow in the figure, the bar 172 may in other cases be ground in a larger amount in the backward portion as described below the arrow in the figure. The direction of the pitch motion is unsteady. In the actual grinding process, the amount that is ground may vary in both the longitudinal and perpendicular directions. However, the amount that is ground can be properly controlled in the longitudinal direction by the above conventional method.
As mentioned above, the amount that is ground was controlled by taking MRH as a reference in the prior art, because MRH is much smaller than throat height TH, and hence MRH is more likely to be subjected to greater influence by the variation in grinding. In fact, it was possible in the prior art to suppress the variation of throat height TH to a small extent by controlling MRH. It will be required, however, to improve accuracy in the dimension of throat height TH, as well as to suppress, as a matter of course, the variation of MRH, in the current tendency toward even higher areal density.
It has become difficult to improve the processing accuracy of throat height TH by conventional grinding methods, in which the processing accuracy of throat height TH depends on that of MRH, and there exists a need to control the processing accuracy of throat height TH itself.

Method for grinding a bar of thin film magnetic elements utilizing a plurality of resistive films


It is presented a method for providing a user interface of a mobile communication terminal including a motion sensitive sensor, a keypad and a display, the mobile communication terminal being capable of being in at least an active mode and a key-lock mode, the method including: detecting, using the motion sensitive sensor, a first user input indicating a desire to switch modes; when the mobile communication terminal is in the active mode, as a response to the first user input, switching the mobile communication terminal to the key-lock mode; and when the mobile communication terminal is in the key-lock mode, as a response to the first user input, switching the mobile communication terminal to the active mode. Corresponding apparatuses and computer program products are also presented.

Mobile terminals, or mobile (cellular) telephones, for mobile telecommunications systems like GSM, UMTS, D-AMPS and CDMA2000 have been used for many years now. In the older days, mobile terminals were used almost exclusively for voice communication with other mobile terminals or stationary telephones. More recently, the use of modern terminals has been broadened to include not just voice communication, but also various other services and applications such as www/wap browsing, video telephony, electronic messaging (e.g. SMS, MMS, email, instant messaging), digital image or video recording, FM radio, music playback, exercise analysis, electronic games, calendar/organizer/time planner, word processing, etc.
One problem with mobile terminals is inadvertent actuation of keys of the keypad. This can result in undesired phone calls, or even worse, deletion of content in the mobile terminal, such as phone book records or photographs.
In the prior art, it is known to allow the user to lock the keypad to reduce the risk of inadvertent key actuations. However, when unlocking the keypad, the key sequence is often awkward with keys needed to be pressed in a certain sequence, to reduce the risk of inadvertent unlocking of the keypad.
Another problem in the prior art is with using the mobile terminal as a clock to tell the time. To allow this functionality, the terminal always shows the time, even when the keypad is locked. The problem with this is that power is used to show the time even though most of the time the user does not actually look at the display.
Consequently, there is a need to provide a mobile communication terminal and method providing a user interface which is easier to use in conjunction with keypad locking.

Mobile communication terminal and method


Imaging systems may include camera modules that include an array of image sensors. An image sensor may include multiple image pixel arrays arranged in rows and columns, multiple control circuits for operating the image pixels of that image sensor, and shared readout circuitry for reading out the image pixels of the image pixel arrays of that image sensor. Each control circuit may be operable to select rows of image pixels that extend across a row of image pixel arrays. Shared readout circuitry may include one or more line buffers configured to temporarily store image data captured by image pixels in the selected rows of image pixels. Shared readout circuitry may include selection circuitry configured to readout image data from groups of associated pixels located in separate image pixel arrays. An imaging system may include processing circuitry for processing the image data from each group of pixels.

This relates generally to imaging systems, and more particularly, to imaging systems with multiple image sensors.
Image sensors are commonly used in imaging devices such as cellular telephones, cameras, and computers to capture images. In a typical arrangement, an imaging device is provided with a single image sensor with a single array of image sensor pixels and a single corresponding lens. Some imaging devices use arrays of image sensors and corresponding lenses to gather image data. This type of system, which is sometimes referred to as an array camera, may be used to extend depth of focus, increase output resolution through super-resolution processing, and capture depth information from a scene.
In a conventional array camera, each array of image sensor pixels is provided with control circuitry and pixel readout circuitry for operating that array of image sensor pixels. Image data from each array of image sensor pixels is therefore commonly readout separately and is often later combined using post-processing circuitry. This type of arrangement can require relatively large amounts of memory for storing full image frames from each array of image sensor pixels prior to combining the image frames. Providing sufficient memory for this type of image frame storage can be problematic.
It would therefore be desirable to be able to provide improved imaging systems with multiple arrays of image sensor pixels.

Method and apparatus for array camera pixel readout

Semiconductor Components Industries, LLC


A shielded connector assembly for interconnecting a camera module (50) to a printed circuit board (not shown) via a flexible printed circuit board (70) comprises a shielded shell (10) having a receiving space (100), a spring plate (30) assembled in the shielded shell, a flexible printed circuit board secured in the receiving space and abutting against the top surface of the spring plate. The flexible printed circuit board includes a first section (701) received in the receiving space and second section (700) extending beyond the receiving space. The fist section at least defines a plurality of conductive pads (708) to contact with pads (not shown) formed on the bottom face of the camera module. A protecting element (702) is disposed on top surface of the first section and encloses the conductive pads and disconnects therewith so as to prevent the flexible printed circuit board from being scraped during production and assemble and the like.

1. Field of the Invention
The present invention relates to an electrical connector assembly, and more particularly to an electrical connector assembly for interconnecting an electronic module such as a camera module for use with a cellular phone or the like to an electrical member such as a printed circuit board via a flexible printed circuit board. At least a protecting section is formed on the flexible printed circuit board to prevent pads formed on the printed circuit board from being scraped accidentally.
2. Description of the Related Art
Conventionally, electronic modules such as a camera module for use with a cellular phone has to be securely maintained in electrical connection with an electronic member such as a printed circuit board. Therefore, a camera socket is dimensioned to securely receive a camera module therein. Consequently, the camera module is electrically connected with the printed circuit board via the shielded connector.
In order to comply with a miniaturization trend of electrical connectors, a flexible printed circuit board is used in said electrical connector to reduce the height of the electrical connector and provide a reliable electric path between a camera module and a printed circuit board.
U.S. Pub No. 2007/0238357, published on Oct. 11, 2007, discloses an electrical connector assembly for interconnecting a camera module and a printed circuit board via a flexible printed circuit board. Said electrical connector assembly includes a shielded shell, a flexible printed circuit board received in the shielded shell and a supporting member sandwiched between the shielded shell and the printed circuit board. The shielded shell has a receiving space and defines two pairs of sidewalls extending upwardly. Each of an opposite sidewalls defines a resilient portion projecting towards the receiving space for retaining the camera module. The flexible printed circuit board is received in the receiving space also for electrically connecting the camera module. The supporting element upholds the flexible printed circuit board. When the camera module is assembled in the receiving space from above, the flexible printed circuit board is sandwiched between the camera module and supporting element, meanwhile, the pads formed on upper surface of the flexible printed circuit board contact with the pads formed on the bottom face of the camera module so as to transfer the signal of the camera module to printed circuit board.
It is well know that flexible printed circuit board is made of soft material and is easy to bend and distort, accordingly, the flexible printed circuit board, especially the pads formed thereon to electrically connect with the pads formed on the bottom of the camera module, is easy to be scraped during production, assembly and so on. Accordingly, when camera module is assembled in the receiving space of the shielded shell, there has a possible that the pads formed on the flexible printed circuit board will not contact with the pads formed on the bottom of the camera module due to the damage or deformation. As a result, a reliable electrical path between the camera module and printed circuit board is not provided.
Thus, there is a need to provide an improved electrical connector assembly to overcome the above-mentioned problems.

Electrical connector assembly with a protecting section over a flexible printed circuit board connected thereto


A vehicle door latch release device is provided in which a latch device enabling latch release in response to operation of an electric actuator and mechanical input of a latch release operating force is provided on a door, and input of a mechanical latch release operating force into the latch device is enabled in an emergency in which latch release by the electric actuator is disabled, wherein a human power acting on the emergency operating member, which can be operated by a vehicle user, can be transmitted as a mechanical latch release operating force to the latch device via operating force transmission means, and restriction/permission switching means can switch between an operation restricted state in which operation of the emergency operating member is restricted and an operation permitted state in which operation of the emergency operating member is enabled in response to a predetermined operation by a vehicle user.

An arrangement in which a push button provided on a grip part of a door so as to face the vehicle compartment side is pushed by a small stroke portion when the situation is normal to thus operate an electric actuator, thereby releasing a latched state of a latch device, and in an emergency when electrical latch release of the latch device becomes impossible due to a flat battery, etc., the push button is pushed in by a larger stroke than normal to thus input a mechanical latch release operating force into the latch device is already known from Patent Document 1.


A fluidic structure includes a channel, a portion of which can contain fluid. Light can propagate in the portion, such as in response to illumination. The refractive index of material at the portion's boundary can be higher than that of the fluid, and more than approximately 10% of intensity of light propagating longitudinally occurs in the fluid, possibly approximately 90%. An IC can be positioned along the portion, with a set of cells of a photosensor array on the IC sensing photons emanating in response to the propagating light. The light can enter through a light-transmissive component along the channel's boundary, then pass obliquely through a portion of the channel that contains air before passing through a bounding component and obliquely into the portion that can contain fluid. The light can couple to an anti-resonant waveguide mode.

The present invention relates generally to providing light to channels or portions of channels, such as in applications in which photons emanate from the channels or portions in response to propagating light.
Goddard, N. J., Singh, K., Bounaira, F., Holmes, R. J., Baldock, S. J., Pickering, L. W., Fielden, P. R., and Snook, R. D., "Anti-Resonant Reflecting Optical Waveguides (ARROWs) as Optimal Optical Detectors for MicroTAS Applications", dias.umist.ac.uk/NJG/Abstracts/MicroTAS/MicroTas2.htm, pp. 1-5, describe techniques in which light is confined in a low refractive index medium, such as an aqueous solution, surrounded by high refractive index reflecting boundaries, such as highly reflective Fabry-Perot resonators. Optical detection can be performed via an evanescent field at the channel-waveguide boundary, or a CCD chip can be instead used to monitor angle changes.
U.S. Pat. No. 6,580,507 describes a multiple-longitudinal flow cell channel system in which an array detector is positioned to monitor radiation from at least two of multiple flow cell channels, at separate groupings of pixels on the detector. Absorption or fluorescence of analytes in response to electromagnetic radiation can be monitored, where the analytes are contained in fluid flowing through the channels.
It would be advantageous to have improved techniques for providing light to channels or portions of channels.


A semiconductor memory device includes: a memory cell array including a plurality of memory cells arranged in rows and columns for holding information, each of the memory cells having a control gate; a plurality of word lines extending in a row direction, each of the word lines being connected to the control gates of the memory cells of a corresponding row of the memory cell array; a plurality of bit lines extending in a column direction and connected to sources or drains of the memory cells; a row decoder for selecting any of the plurality of word lines; a column decoder for selecting any of the plurality of bit lines; a charge pump circuit for generating a voltage higher than a supply voltage; and a first switch located in a connection path between the row decoder and the charge pump circuit.

1. Field of the Invention
The present invention relates to a bias generator for generating a bias to be applied in a semiconductor memory device, such as a flash memory, or the like, and to a method for controlling such a bias generator.
2. Description of the Prior Art
Flash memories, which form a class of nonvolatile semiconductor memory device, are roughly divided into floating gate flash memories, which have a conductive floating gate located between a control gate and a semiconductor substrate and surrounded by an oxide film, and MONOS flash memories, which have an insulation film between a control gate and a semiconductor substrate, the insulation film being formed by an oxide film, nitride film, and oxide film in this order from the lower layer to the upper layer, wherein charge trapped by the nitride film serves as memory information.
In the MONOS flash memory, the nitride film for trapping the charge is an insulation film, and therefore, locally trapping the charge is possible. Charges are accumulated at opposite sides of a trap layer, whereby memorization of two-bit information is possible using different regions of one memory cell. Thus, the MONOS flash memory has been joining the mainstream of the nonvolatile bulk memory.
FIG. 9 is a cross-sectional view of a MONOS flash memory cell which has a trap layer. The MONOS flash memory cell includes impurity diffusion regions 1902 and 1904 in the upper part of P-type semiconductor substrate 1900, which form N-type source or drain, and a first silicon oxide film 1906, a silicon nitride film 1908, a second silicon oxide film 1910, and a conductive control gate 1912 sequentially deposited on a channel region between the impurity diffusion regions 1902 and 1904.
The silicon nitride film 1908 works as a trap layer to retain information by means of trapping charge. Referring to FIG. 9, the silicon nitride film 1908 includes charge trapping regions 1914 and 1916 at opposite sides (i.e., two positions), with which retaining two-bit information in one memory cell is possible.
To locally trapping charges in two different regions of one memory cell, typical MONOS flash memories employ electron injection into the trap layer with channel hot electron for the data-writing mechanism (CHE writing) and hole injection by means of band-to-band tunneling injection (BTBT injection) for the data-erasing mechanism such that charges trapped at the opposite sides of the silicon nitride film 1908 are neutralized.
TABLE 1 shows the voltages applied to a MONOS memory cell in respective operation modes. In this example, the source and drain terminals have potential relationship and current direction in respective operation modes which are defined as reference. According to the terminal definition employed in this example, the source and drain terminals in the same memory cell are replaced by each other as the reading operation mode and the writing operation mode are switched from one to the other. The sense potential, which is the source potential during writing verification and erasure verification operations, refers to the potential at which a selection bit line constituting the source of a memory cell from which data is to be read is charged by the cell current of a selected memory cell.
TABLE 1SourceControl GateDrainReadingSense potential4V1.3 VWriting0 V10V4 V to 7 VWriting verificationSense potential6V1.3 VErasureFloat-4.5V4 V to 7 VErasure verificationSense potential3V1.3 V
In the writing operation, a high voltage of about 10 V is applied to the control gate for CHE writing while a stepped voltage, which is increased stepwise at every writing cycle from about 4 V to about 7 V, is applied to the drain. In the erasure operation, a negative voltage of about −4.5 V is applied to the control gate for BTBT injection, while a stepped voltage, which is increased stepwise at every erasure cycle from about 4 V to about 7 V, is applied to the drain. In the reading operation, to obtain a necessary cell current, a voltage of about 4 V is applied to the control gate while a voltage of about 1.3 V is applied to the drain.
FIG. 10 shows the timing of applying a voltage to the memory cell in the writing operation. At time t1, data-write signal Co_WE for controlling the writing operation transitions to "L" level so that the operation is set to the writing mode, and accordingly, control gate potential VCG is set to a high voltage of about 10 V. Then, at time t2 at which control gate potential VCG is set to about 10 V, drain potential VBL is set to about 4 V.
At time t3, data-write signal Co_WE transitions to "H" level to end one writing cycle. Accordingly, control gate potential VCG is set to a potential of about 6 V for verification of writing. The drain terminal, to which a potential of about 4 V is applied during the writing operation, is used as the source terminal during the writing verification operation, and source potential VBL is set to 0 V. The drain voltage unshown is set to a voltage of about 1.3 V.
In the writing verification operation, if the writing level is judged as being unreached, the writing cycle that starts at time t1 is repeated. In this process, drain potential VBL is set to a higher potential by one step.
Setting of the control gate potential in the writing operation thus occurs prior to setting of the drain voltage such that the writing operation is started after the control gate potential is set to a target potential in order to prevent deterioration in endurance characteristics. The deterioration in endurance characteristics would occur if the writing operation be carried out in a transient potential state where the control gate potential rises so that an electron trapping region would be enlarged.
FIG. 11A shows a memory cell. FIG. 11B to FIG. 11D are circuit diagrams showing the types of charge pump circuits and regulators necessary for generating the potentials which are to be applied to the memory cell 1200 in respective operation modes shown in TABLE 1. In the writing verification and erasure verification operations illustrated in FIG. 11B, the potential of about 1.3 V which is to be applied to the drain is generated by a bit line potential generation circuit 1104 based on supply voltage (VDD) and applied via a reading bias transistor 1105. The gate voltage of about 4 V to 6 V is set by a gate potential regulator 1106 based on the HV potential generated by a HV charge pump circuit 1100 which is higher than the supply voltage.
In the writing operation illustrated in FIG. 11C, the stepped potential of about 4 V to 7 V which is to be applied to the drain is set by a drain potential regulator 1108 based on the HV potential generated by the HV charge pump circuit 1100. The control gate potential of about 10 V is derived from HHV potential generated by a HHV charge pump circuit 1102 which is higher than the potential generated by the HV charge pump circuit 1100.
In the erasure operation illustrated in FIG. 11D, the stepped potential of about 4 V to 7 V, which is to be applied to the drain, is set by the drain potential regulator 1108 based on the HV potential generated by the HV charge pump circuit 1100 as is in the writing operation. The potential of about −4.5 V which is to be applied to the control gate is generated by a negative potential generation circuit 1110.
FIG. 12 shows an example of the circuit structure of a flash memory 1300 which includes the MONOS cells shown in FIG. 9. The flash memory 1300 includes a memory cell array 1402 to which a virtual ground array (VGA) suitable to a bulk memory is applied.
The memory cell array 1402 is formed by memory cells arranged in an array of rows and columns. The control gates of the memory cells in the same rows are connected to common word lines WL0 and WL1. Any of the word lines is selected by a row decoder 1414 according to an input address. The sources and drains of the memory cells of the same rows are connected together and connected to bit lines BL0 to BL3. Any of the bit lines is selected by a column selection gate 1406 which is controlled based on selection signals YG0 to YG3 that the column decoder 1416 outputs according to the input address and by a source-drain selection gate 1407 which is controlled based on selection signals SD0 and SD1 that the source-drain decoder 1418 outputs according to the input address.
In the reading operation, writing verification operation and erasure verification operation, the operation of the HHV charge pump circuit 1102 and the negative potential generation circuit 1110 is halted so that the output potential of the HHV charge pump circuit 1102 is at the level of the supply potential, and the output potential of the negative potential generation circuit 1110 is at the level of the ground potential. The potential of about 4 V to 6 V which is to be applied to the control gate of a selected memory cell is set by the gate potential regulator 1106 based on the HV potential which is higher than the supply voltage generated by the HV charge pump circuit 1100. The multiplexer 1422 selects this potential and supplies the selected potential to the positive-side power supply node of the row decoder 1414, whereby the selected word line is set to the potential of about 4 V to 6 V. The potential of about 1.3 V, which is to be applied to the drain of the selected memory cell, is derived from a potential generated by the bit line potential generation circuit 1104 based on the supply voltage and is supplied to the selected memory cell via a reading bias transistor 1105, the source-drain selection gate 1407, and the column selection gate 1406. Reading of memory data from a memory cell is carried out by a sense amplifier 1408 comparing the potential of a bit line selected via the column selection gate 1406 and the source-drain selection gate 1407 with reference potential VREF. The result of the comparison, Sout, is output to an external device.
In the writing operation, the HV charge pump circuit 1100 and the HHV charge pump circuit 1102 are activated while the negative potential generation circuit 1110 is halted such that the output potential of the negative potential generation circuit 1110 is at the level of the ground potential. The potential of about 10 V, which is to be applied to the control gate of the selected memory cell, is derived from the output potential of the HHV charge pump circuit 1102 selected by the multiplexer 1422. The multiplexer 1422 supplies the selected potential to the positive-side power supply node of the row decoder 1414 as the potential of the selected word line. The potential of about 4 V to 7 V, which is to be applied to the drain of the selected memory cell, is derived from the output of a data writing circuit 1412 which receives a potential set by the drain potential regulator 1108 based on the output potential of the HV charge pump circuit 1100. The output of a data writing circuit 1412 is supplied to the selected bit line via the source-drain selection gate 1407 and the column selection gate 1406. Meanwhile, the supply voltage of the column decoder 1416 and the source-drain decoder 1418 is the output potential of the HHV charge pump circuit 1102 selected by a multiplexer 1424, and the selection control signal potential of the column selection gate 1406 and the source-drain selection gate 1407 is at the level of the output potential of the HHV charge pump circuit 1102. With this arrangement, the potential of about 4 V to 7 V which is the output of the data writing circuit 1412 can efficiently be transferred to the bit line. The source of the selected memory cell is grounded by making a switch 1410 conducting, the switch 1410 being connected to a selected bit line via the source-drain selection gate 1407 and the column selection gate 1406.
In the erasure operation, the HV charge pump circuit 1100, the HHV charge pump circuit 1102 and the negative potential generation circuit 1110 are activated. The negative potential of about −4.5 V which is to be applied to the control gate of the selected memory cell is derived from the output of the negative potential generation circuit 1110, which is supplied to the negative-side power supply node of the row decoder 1414 and set as the potential of the selected word line. The potential of about 4 V to 7 V which is to be applied to the drain of the selected memory cell is set by supplying the output of the data writing circuit 1412 to the selected bit line via the source-drain selection gate 1407 and the column selection gate 1406. The data writing circuit 1412 receives the potential set by the drain potential regulator 1108 that receives the output potential of the HV charge pump circuit 1100. Meanwhile, the supply voltage of the column decoder 1416 and the source-drain decoder 1418 is the output potential of the HHV charge pump circuit 1102 selected by the multiplexer 1424 as in the writing operation. The source of the selected memory cell is rendered floating by turning off the switch 1410 which is connected to the selected bit line via the source-drain selection gate 1407 and the column selection gate 1406.
The voltage generation control and timing control for switching of the charge pump circuits and multiplexers in the respective operation modes are realized based on an internal control signal output from a controller 1426.
Referring to FIG. 11C, the flash memory needs a plurality of higher voltages for rewriting operations and therefore requires a plurality of charge pump circuits, e.g., the HV charge pump circuit 1100, the HHV charge pump circuit 1102 and the negative potential generation circuit 1110. Thus, the size of the peripheral circuit other than the memory cell array is large as compared with the other memory types. Especially in a chip having a small memory capacity, the size occupancy of the peripheral circuit relative to the chip size is large, which constitutes a factor of an increase in cost. In view of such, in order to suppress the increase in chip size because of the charge pump circuits in the nonvolatile memory, Japanese Laid-Open Patent Publications Nos. 2001-338493, 2001-338493 and 2005-176590 disclose the techniques of generating a plurality of voltages by one charge pump circuit.

Charge pump circuit, semiconductor memory device, and method for driving the same


A method of chaining together multiple dependent web-based procedure calls into a single request is disclosed. A request containing multiple MIME encoded service requests is transmitted to a first service. The request is parsed and the first service identified and performed. The results of the first service are appended to the remainder of the request which is forwarded to a second service listed in the request. The second service listed in the request may use the output of the first service as input and performs the second service. The process continues until the last service listed in the request is performed. Any output from the performance of the service requests is returned to the requesting device following execution of a MIME encoded callback request, the callback request being embedded in the original request following the last of the listed service requests.

Distributed devices on a network frequently request services from remote devices. In a typical scenario, a requesting device sends a request or procedure call over a network to a receiving server via a transport protocol such as the Hyper Text Transport Protocol (HTTP). The requests are connection-based and require a connection to remain open between the requesting device and the receiving server until the requested action has been performed and the response returned to the requesting device. Conventionally, the requests work on a response-request basis where each request is for a single service and the output from the performed service is sent back over the open connection.
Unfortunately, the conventional response-request model does not address situations where the requesting device needs several different services performed which are dependent upon each other. For example, the situtation where a requesting device needs the output from a first service for the performance of a second service, and the output from the second service is required for the performance of a third service. In such a situation, the requesting device is required to make three separate requests in sequence while arranging to use the output from one service as the input for another service. The three requests requires three separate connections between the requesting device and the receiving device or devices holding the services. Existing alternatives such as the Simple Object Access Protocol (SOAP) require the use of heavyweight XML parsers which represent a resource drain for smaller or busy devices.

System and method for forward chaining web-based procedure calls


An apparatus for compensating temperature changes in a temperature associated with a compensated device includes: (a) An input circuit having a first input locus for receiving a temperature-indicating signal and a second input locus for receiving a sign-indicating signal. The temperature-indicating signal indicates magnitude of the temperature. The sign-indicating signal indicates a first sign when a control signal is greater than a predetermined value and indicates a second sign when the control signal is less than the predetermined value. (b) A signal processing circuit coupled with the input circuit and with the host device for presenting a substantially a zero value temperature-compensating signal when the ambient temperature is at a predetermined level, and for presenting the temperature-compensating signal substantially opposite in polarity with substantially equal magnitude as the temperature-indicating signal received at the first input locus when the ambient temperature is not at the predetermined level.

To reduce temperature drift in an analog circuit, a temperature dependent bias current I(T) may be used. Such bias currents are sometimes expressed as a current (I) function of temperature (T), I(T). The bias current I(T) may be generated from a PTAT (Proportional To Absolute Temperature) current-DAC (Digital to Analog Converter) connected to a CTAT (Complementary To Absolute Temperature) current-DAC. The CTAT current is subtracted from the PTAT current, or vice versa, to generate the desired bias current I(T). The resulting I(T) is injected into a sensitive node of the circuit to be compensated.
Temperature sensitive circuits may have both positive as well as negative residual temperature coefficients that need to be trimmed for high drift performance. Note that for a differential stage as in an operational amplifier input stage there are two "opposite" nodes which can be used to inject the temperature dependent current I(T) (i.e., drain node of each of the two input transistors, "injection nodes"). In such a differential circuit, it may be sufficient to generate one bias current I(T), for example with positive temperature coefficient, and to inject the one bias current I(T) into either of the two "injection nodes", depending on which type of compensation is desired. However in analog circuits having only one input node or in other circuits for some reason having an architecture offering only one "injection node", two bias currents I(T) have to be provided by the PTAT/CTAT current DAC to provide compensation for both positive and negative temperature coefficients.
If bias current I(T) is established so that I(T)=0 at an elevated temperature above a nominal or target operating temperature for a device, then bias current I(T) always flows in the same direction within a wide interval of operational temperature range. This design approach permits using one simple current mirror to change the sign of bias current I(T) current. Such a sign change may be required because a positive temperature coefficient in bias current I(T) is used to compensate a circuit having a negative temperature dependence, and a negative temperature coefficient in bias current I(T) is used to compensate circuits with a positive temperature dependence. As a result, prior art practice has heretofore provided for specifying the operation or performance of a circuit up to an elevated temperature, such as by way of example and not by way of limitation, 90° C.
However, this widely used prior art approach has disadvantages. At the normal operating temperature, a nonzero current (i.e., bias current I(T)≠0) is injected into a sensitive node. As a result, noise is increased. Further, good compensation for temperature dependence by the circuit can be guaranteed only up to the temperature where bias current I(T)=0. Above to the temperature where bias current I(T)=0 the current mirror used for temperature coefficient inversion may no longer work. By way of example and not by way of limitation, in a configuration of such a current mirror employing a PMOS mirror, the mirror cannot sink any current. Still further, the first trim action when preparing the circuit must be performed at the temperature where bias current I(T)=0. For this reason, a high temperature final package trim must be performed before the operating temperature test. This procedure does not allow easy implementation of graded units that have undergone a room temperature test only. That is, low price units that involve one test at operating temperature with standard trimming cannot be produced using the above procedure. Such a procedure—one test at operating temperature with standard trimming, followed by a test at high temperature to compensate residual drift, followed by another test at operating temperature to check initial accuracy—raises the price of a circuit well above a one-test-required part.
To be able to compensate both negative and positive temperature drifts, currents with both positive and negative temperature coefficients must be generated. Generating a biasing current to represent both positive and negative temperature coefficients is particularly difficult if the biasing current approaches zero and changes sign within the temperature operating range of the device for which compensation is being provided. In such a case involving sign changes of biasing current within an operating range, the entire circuit for generation of the I(T) biasing current has to be duplicated in order to ensure accurate generation of positive-correcting as well as negative-correcting biasing currents.
There is a need for an apparatus and method for compensating change in a temperature associated with a host device that injects substantially zero correction or compensating current into the host device at the nominal operating temperature of the host device.
There is a need for an apparatus and method for compensating change in a temperature associated with a host device that can invert or compensate for temperature dependency substantially across an entire operating temperature range for the host device.

Apparatus and method for compensating change in a temperature associated with a host device


A process for producing an α-substituted acrylic norbornanyl compound represented by the formula [3] includes reacting an α-substituted acrylic acid anhydride represented by the formula [1] with a substituted norbornanyl alcohol represented by the formula [2].

The present invention relates to a process of producing α-substituted acrylic norbornanyl compounds, which are useful as monomers adapted to the next generation photoresists.
It is known that α-substituted acrylic norbornanyl compounds have bright prospects as monomers for the next generation resist materials and that such resists containing the monomers as their constituent element are superior in light transmission and surface adhesion (see U.S. Pat. No. 6,784,312 corresponding to Japanese Patent Laid-open Publication 2003-040840).
It is possible to synthesize an α-substituted acrylic norbornanyl compound by a dehydration and condensation reaction of an α-substituted acrylic acid with a norbornanyl alcohol (see U.S. Pat. No. 6,784,312) or by a reaction of α-substituted acrylic chloride with a norbornanyl alcohol (see U.S. Pat. No. 6,784,312).
Japanese Patent Laid-open Publication 2004-175740 (Application No. 2002-345084) discloses a process for producing an α-substituted acrylic norbornanyl compound by reacting an α-substituted acrylic acid with a substituted norbornene.

Process for producing α-substituted acrylic norbornanyyl compounds

Abstract: wherein R1 represents a hydrogen atom, methyl group, ethyl group, n-propyl group, isopropyl group, n-butyl group, sec-butyl group, tert-butyl group, fluoromethyl group, difluoromethyl group, trifluoromethyl group, or perfluoroethyl group, and wherein one of R2, R3 and R4 is a CF3C(CF3)(OH)CH2— group, and each of the other two of R2, R3 and R4 is a hydrogen.


The present invention provides a framed soap containing uniformly entrained bubbles and a method for producing the same. The framed soap of the present invention is produced by cooling and solidifying in a cylindrical cooling frame and characterized in that 10 volume % or higher air bubbles having a number average particle diameter of 65 μm or smaller are uniformly entrained.

In the past, the air bubble-containing soap, whose specific gravity is decreased by introducing air bubbles etc. so that it can float on water, has been publicly known.
On the other hand, the soap preparation methods are broadly classified into the framing method and the milling method.
The framed soap is prepared by pumping molten soap at a high temperature into a cylindrical cooling frame, cooling/solidifying the soap together with the cylindrical cooling frame, and then cutting and forming.
On the other hand, in the case of milled soap, soap chips that are formed beforehand are kneaded and plodded to shape a bar soap.
Among these common soap production methods, it has been very difficult to produce an air bubble-containing soap especially by the framing method.
That is, in the framing method, high-temperature/low-viscosity molten soap is pumped into a cylindrical cooling frame. Therefore, even when air bubbles are entrained in the molten soap, air bubbles float and separate inside the cylindrical frame during the cooling process. By cutting and shaping after cooling, a soap containing a large amount of air bubbles and a soap containing a very small amount of air bubbles are generated. Thus, it is difficult to obtain an air bubble-containing soap of uniform quality.
Therefore, in order to produce an air bubble-containing soap, the milling method was used in the past (patent literature 1). Alternatively, air bubbles were entrained in molten soap by individual shaping (method in which molten soap is poured into a frame of one soap, patent literature 2 etc.). Thus, either of these production methods has been used.
Patent literature 1: Japanese publication of examined application No. S59-27796
Patent literature 2: Japanese unexamined patent publication No. 2006-176646

Framed soap and method for producing the same


An apparatus is described. The apparatus includes main memory control logic circuitry comprising prefetch intelligence logic circuitry. The prefetch intelligence circuitry to determine, from a read result of a load instruction, an address for a dependent load that is dependent on the read result and direct a read request for the dependent load to a main memory to fetch the dependent load's data.

A pertinent issue in many computer systems is the main memory (also referred to as system memory). Here, as is understood in the art, a computing system operates by executing program code stored in main memory and reading/writing data that the program code operates on from/to main memory. As such, main memory is heavily utilized with many program code and data reads as well as many data writes over the course of the computing system's operation. Finding ways to improve main memory accessing performance is therefore a motivation of computing system engineers.

Main memory control function with prefetch intelligence


The invention relates to a series of novel silicone alkoxylated esters which contain terminal carboxyl groups. This class of compounds provides unique solubility in many organic solvents as well as very substantive salts of the carboxylic acid when neutralized with base. The compounds of the present invention are prepared by reacting a the hydroxyl group in a silicone polymer with an anhydride.

1. Field of the Invention
The present invention relates to a series of novel silicone alkoxylated esters which have terminal carboxyl groups. These materials provide outstanding lubrication, and softening when applied to a variety of fiber substrates. The compounds of the present invention are prepared by reacting a hydroxyl containing silicone polymer, and an anhydride.
2. Arts and Practices
Silicone compounds have been known to be active at the surface of cellulosic and synthetic fibers as well as paper. They are good nondurable lubricants and are very stable to oxidation, however, their high cost and lack of efficiency at low concentrations as well as low durability have made their acceptance in commercial products quite low.
In addition to their high cost, silicone compounds have little or no solubility in mineral oils, fatty triglycerides and other classical fatty quaternary compounds used for softening. This has resulted in the inability to prepare stable blends for use as a textile fiber treatment.
In many applications, there is a desire for a more fatty soluble softener. The desired molecule should have the desirable softening and antistatic properties of silicone, yet have compatibility with traditional fatty materials and oils. Even though a textile softener which has both the desirable softening and antistatic properties of silicone as well as compatibility with fatty compounds has been a long felt need, it isn't until the compounds of the present invention that such a system has been attained.
U.S. Pat. No. 3,511,699 to Sterman issued May 12, 1970 teaches that epoxy compounds placed in the silicone backbone by hydrosilation can be cured onto certain fibers to give improved substantivity. The substantivity is based upon the reaction of hydroxyl groups on the cellulosic and the epoxy group in the silicone polymer.
U.S. Pat. No. 4,587,320 issued to Swihart discloses that certain carboxy functional products can be prepared by equilibrating silicone glycols and a carboxy silane. The compounds of the Swihart invention because they are prepared by reacting a performed carboxy silane with a silicone glycol do not produce the desired functionality of the present invention. As will become clear from the disclosure the compounds of the present invention are carboxy functional esters of alkoxylated glycols. They are quite different in structure and in function form the Swihart compounds.

Silicone alkoxylated esters carboxylates


Provided is an LCD having a liquid crystal panel including an active region serving as a display region and an outer region serving as a non-display region. The LCD includes a first substrate including an array unit and a color filter formed in the active region, an ESD (electrostatic discharge) circuit formed in the outer region, a pattern spacer formed on the ESD, a second substrate facing the first substrate, and a sealant for attaching the first and second substrates together.

1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device preventing damage in an electrostatic discharge circuit and a manufacturing method thereof.
2. Discussion of the Related Art
The growth of the information technology and consumer electronics industries has driven the need for a next generation display device capable of processing and displaying the large capacity image information increases gradually.
Such next generation display devices are required to be lighter, thinner, shorter and smaller characteristics, a high luminance, a large-sized screen, low power consumption and a low price. Examples of next generation display devices include a liquid crystal display device (LCD), a plasma display panel (PDP), an electro luminescent display (ELD), and a vacuum fluorescent display (VFD). Among them, the LCD is the most widespread.
The LCD exhibits superior resolution compared to other flat displays, and a fast response rate comparable to that of the CRT in implementing a moving picture.
The LCD is widely used in various technology fields such as PC monitors, notebook computer monitors, TV receivers, vehicle-mounted TV receivers, navigation devices, and the like because it has high brightness and contrast and low power consumption.
Structurally, in the LCD, two substrates are arranged facing each other. Electrodes are respectively formed on facing surfaces of the two substrates. Liquid crystal is injected into a gap between the two substrates. An alignment state of the liquid crystal is changed by an electric field that is generated by a voltage applied to the electrodes. Accordingly, a light transmittance is varied and thus an image is displayed.
The LCD includes a liquid crystal panel for displaying an image and a driving unit for applying a driving signal to the liquid crystal panel. The liquid crystal panel includes first and second substrates attached together with a predetermined gap therebetween, and a liquid crystal layer injected into the gap between the first and second substrates.
The first substrate includes thereon a plurality of gate lines arranged in one direction to be spaced apart from each other by a predetermined distance, a plurality of data lines arranged perpendicular to the gate lines to be spaced apart from each other by a predetermined gap, a plurality of pixel electrodes formed in a matrix pattern in respective pixel regions defined by the gate lines and the data lines, and a plurality of thin film transistors (TFTs) that are switched by signals of the gate lines to transmit signals of the data lines to the respective pixel electrodes.
The second substrate includes thereon a black matrix layer for blocking light from regions other than the pixel regions, a color filter layer for representing color, and a common electrode for reproducing an image.
When the color filter is formed on an array substrate (that is, the first layer) including the TFTs, production yield and attachment margin can be improved.
A color filter on TFT (COT)-type LCD and a TFT on color filter (TOC)-type LCD in which a TFT and a color filter are formed on the same substrate will now be described.
FIG. 1 is a plan view illustrating a part of an array substrate for a related art COT-type LCD.
Referring to FIG. 1, a plurality of gate lines 152 are arranged in one direction on a substrate 150. A gate link line 154 is connected to one end of the gate line 152 and a gate pad 156 is connected to the gate link line 154. A plurality of data lines 158 are arranged perpendicular to the gate lines 152 to define a plurality of pixel regions P. A data link line (not shown) is connected to one end of the data line 158 and a data pad (now shown) is connected to the data link line.
An island-shaped gate pad port 153 is provided at the gate pad 156. The gate pad port 153 is connected to an external driving circuit to directly receive a driving signal therefrom.
A TFT T is formed at an intersection between the gate line 152 and the data line 158. The TFT T includes a gate electrode 160, an active layer 162, and source/drain electrodes 164 and 166.
A transparent pixel electrode 168 is formed in the pixel region P defined by the gate and data lines 152 and 158.
A black matrix 170 is formed on the TFT T, the gate line 152 and the data line 158. R/G/B color filters 171a, 172b and 172c are sequentially formed on the pixel electrodes 168.
In the above structure, the gate link line 154 and the gate pad 156 constitute a non-display region E and a TFT array region corresponds to a display region C. In the related art, light leakage occurs at a boundary region D between the non-display region E and the display region C.
FIG. 2 is an enlarged sectional view of a side taken along line I-I′ in FIG. 1. FIG. 2 illustrates an outer portion of the related art COT-type LCD.
Referring to FIG. 2, a COT-type LCD 190 includes first and second substrates 150 and 192 facing each other. The first and second substrates 150 and 192 are attached together using a sealant 194. A gate pad 152 and a gate pad port 153 connected thereto are exposed outside the sealant 194.
A polarization plate 196a is formed on an outside surface of the second substrate 192 and a polarization plate 196b is formed on an outside surface of the first substrate 150. Here, the polarization plate 196a has a polarization axis perpendicular to that of the polarization plate 196b. A top cover 198 is formed to cover around the peripheries of the first and second substrates 150 and 192.
The first substrate 150 includes thereon a TFT array region (not shown), color filters 172a, 172b and 172c formed on the TFT array region, and a black matrix 170 formed on the color filters. The second substrate 192 includes thereon a transparent electrode 199.
In the COT-type LCD 190, there occurs light leakage at the boundary region D between the non-display region E and the display region C, resulting in the degradation of an image quality.
To prevent this light leakage, the black matrix 170 must be formed also on the outer portion of the display panel as well as on the TFT region.
However, when the black matrix 170 is formed also on the second substrate 192 facing the first substrate 150, a second overcoat layer must also be formed on the black matrix 192 in order to reduce the step difference of the black matrix 170.
The second overcoat layer formed on the black matrix causes an undesirable increase in both the thickness of the LCD and its production cost.
Also, when an electrostatic discharge (ESD) circuit is formed at an end of an array portion in the first substrate, a contact hole must formed on the black matrix of the outer portion.
When the contact hole is formed on the black matrix, the material of the black matrix is transferred into the contact hole and thus an undesired organic layer is formed therein. Consequently, the manufacturing process becomes unstable and the quality or characteristic of the contact between the contact hole and the pixel electrode degrades.

Liquid crystal display device and manufacturing method thereof


Plant cells in tissue culture are more efficiently transformed in a method which involves treatment with a cytokinin followed by incubation for a period sufficient to permit undifferentiated cells in cotyledonary node tissue to differentiate into meristematic cells and to permit the cells to enter the phases between the G1 and division phases of development.

This invention relates to the transformation of plant cells, and particularly to improved methods for the transformation of intact plant cells in tissue culture.
Much research in plant molecular biology is now directed to the improvement of plant varieties via use of recombinant DNA techniques. Historically, plant breeders used classical genetic techniques to identify, preserve and crossbreed varietal lines having desirable traits. More recently, new plant varieties were induced by chemicals or by radiation treatment to mutate plant cells which were then regenerated using tissue culture techniques. These random and unpredictable approaches have obvious drawbacks. By the use of recombinant DNA technology, specific genes producing specific proteins, such as those imparting insect resistance, may be introduced into a plant to produce a desired variety with a particular trait. One method for the introduction of recombinant DNA into plant cells is the microparticle bombardment method described by Sanford et al., Journal of Particle Science and Technology, 5:27-37, the disclosures of which are hereby incorporated herein by reference.
In the transformation of cells by microparticle bombardment introduction of recombinant DNA to impart a desired trait, it is important that the transformation be efficient, i.e., that large numbers of cells be transformed by the method, at least transiently, so that the function and effectiveness of the structural gene of interest and/or the regulatory sequences associated with the structural gene of interest can be evaluated by conventional analytical methods. In the past, efficiency of transformation of some cell lines, such as soybean tissue culture cells, has been undesirably low, so that gene products were not formed in sufficient amounts to be analyzed quantitatively by simple methods. Several different treatments were tried to increase the level of transient .gene activity. These have included treatment with various plant hormones, use of different cultivars of soybeans, and use of different transformation vectors. Disadvantages with each of these approaches continued to be low transient gene activity and a high degree of variability from experiment to experiment.

Soybean transformation by microparticle bombardment


A method of fabricating a printed wiring board comprising the following steps is provided. A portion of each of two dielectric layers or metal layers bonds to both sides of a carrier plate, respectively. Two build-up wiring structures are respectively formed on the dielectric layers or the metal layers by a build-up process. The portions of the dielectric layers or metal layers bonded to the carrier plate are removed such that the dielectric layers or metal layers and the build-up wiring structures formed thereon are released from the carrier plate to form two printed wiring boards.

1. Field of the Invention
The present invention generally relates to a printed wiring board, and more particularly, to a printed wiring board and method of fabricating the same.
2. Description of Related Art
The common printed wiring board is usually fabricated by lamination or build-up process. In the conventional lamination process, a predetermined number of the single-sided boards or the double-sided boards are provided. Wherein, the single-sided board means that a dielectric layer has a single conductive layer formed thereon, and the double-sided board means that a dielectric layer has two conductive layers formed on its two surfaces thereof respectively. Next, the conductive layers of the single-sided boards or the double-sided boards are patterned. Next, uncured resins are stacked between the single-sided boards or the double-sided boards having the patterned conductive layers to form a lamination structure. Finally, conductive through vias are formed in the lamination structure to electrically connect the patterned conductive layers. Thus, a printed wiring board is fabricated by a lamination process.
It should be noted that the uncured resin is subjected to a high temperature bake process to cure the dielectric layers. Accordingly, if the printed wiring board is fabricated by the lamination process, the structure of the printed wiring board must be symmetrical in thickness and number of layers with respect to the uncured resin in order to prevent the dielectric layer made of resin from warping because it shrinks when cured.
Compared to the above-mentioned lamination process, another conventional lamination process uses—the build-up of B-stage dielectric layers and conductive layers on two sides of a core layer sequentially and symmetrically. Next, the conductive layers are patterned to make via openings. Next, a plurality of openings are formed in the dielectric layers by laser, and then the openings are filled with a conductive material to form a plurality of conductive vias, such that the conductive layers on both sides of the dielectric layer can be electrically connected to each other through the conductive vias. Then, the conductive traces are made by patterning the metal layers.
FIG. 1 is a schematic cross-sectional view showing a conventional build-up printed wiring board. Referring to FIG. 1, a conventional metal patterning process is used to form a conductive layer 12 on both sides of a core layer 10 of the dielectric material. First, a plurality of conductive through vias 14 is formed in the core layer 10 to electrically connect the conductive layers 12. Next, the conductive layers 12 formed on both sides of the core layer 10 are patterned. A B-stage dielectric layer 16 with a copper foil 20 is built up on both sides of the core layer of 10 and 12 by a lamination process. Next, a plurality of blind vias 18 is formed in the top and bottom metal foils 20 and dielectric layers 16, respectively, and then a plating step is used to electrically connect layers 12 and 20 through vias 18.
Next, the two conductive layers 20 on the two dielectric layers 16 are patterned. Finally, the above-mentioned dielectric layers 16, the conductive blind vias 18 and the conductive layers 20 are duplicated to form a build-up printed wiring board 22 according to the required number of the conductive layers.
It should be noted that when the B stage dielectric layer is comprised of a thermosetting resin material, the dielectric layer must be subjected to a high temperature bake process in order to cure the dielectric layer. During the curing step, the B-stage dielectric shrinks and causes a stress in the structure. Accordingly, during the build-up process, the patterned conductive layers and the dielectric layers formed on two sides of the core layer must be symmetrical to avoid the dielectric layers from being warped when they are cured. Therefore, an even number of the patterned conductive layers is required. However, it is desirable for applications such as portable electronics to reduce the thickness of the printed wiring board and to increase the integration thereof. Besides, the core layer serves as a carrier plate for supporting the patterned conductive layers and the dielectric layers in the build-up process. However, the core layer has a definite thickness which, together with the build up layers on both sides, may result in a thickness exceeding the maximal allowable value required by some products.

Printed wiring board and method of fabricating the same


A system and method for using an IP client attached to the Public Internet, acting as a virtual mobile terminal such as a cell phone, to have full access to mobile telephony services offered by a mobile operator using a SIP2 Mobile gateway. The services include a mobile telephone number, capabilities of sending and receiving short messages and mobile intelligent services such as prepaid billing, number translation, and ring back tones.

1. Field of Invention
The present invention relates generally to the field of telephone services. More specifically, the present invention relates to accessing mobile network voice services from an IP client.
2. Discussion of Prior Art
A mobile operator's network also known as a Public Land Mobile Network (PLMN) typically comprises a universal terrestrial radio access network (UTRAN) and a circuit switched wire-line core network as illustrated in FIG. 1. The UTRAN carries the radio signals from the cell phones to the core network and back. The core network determines the location of mobile users and performs the required switching and service delivery functions using circuit switched or packet based core switches to route calls. The Third Generation (also known as 3G) networks describe a packet switched core network as an alternative to traditional Second Generation (2G) circuit switched core networks.
Referring to FIG. 1, the universal radio access network, UTRAN, 506 carries the radio frequency (RF) signals from the wireless cell phone 102 to the switches that form the mobile operator's core network 305. A UTRAN may use Time Division Multiple Access (TDMA) or Code Division Multiple Access (CDMA) for handling RF signals. A UTRAN base station system (BSS) 808 communicates with cell phone 102 using allocated radio frequencies, and using Base Station System Application Part (BSSAP) protocol or other similar protocols, it sends location information about the mobile user 102 to the Mobile Switching Center (MSC) 505, which is a key component of the core network 305. The core network 305 comprises many MSCs and facilities that interconnect them.
There is a functionality embedded within the MSC known as Visitor Location Register (VLR), which retrieves information about the location of mobile user 102, stores it locally, and updates the centralized register known as Home Location Register (HLR) 501 using Mobile Application Part (MAP) protocol or other similar protocols. Doing so, the centralized HLR has up to date knowledge about which VLR/MSC each mobile user is currently attached to while they roam. Protocols such as MAP are specifically defined for GSM networks and considered to be part of SS7 signaling, but there are equivalent protocols in other types of networks, all defined by proper standards bodies (ETSI, ANSI etc.).
If mobile user 103 initiates a phone call to mobile user 102, it first reaches VLR/MSC 505 or the MSC to which mobile user 103's BSS connects to (in this scenario it is the same VLR/MSC as the one user 102 attaches to) so as to obtain location information about user 102. If the location of user 102 is in the local database of the VLR, then that MSC can process the call. Otherwise, it initiates a Mobile Station Roaming Number (MSRN) request using MAP protocol to HLR 501 to learn which MSC the user 102 is attached to. Such a request also allows the HLR to send other information about subscriber's services to the MSC. The HLR stores subscriber service information as well as subscriber location. The subscriber service information is provisioned into the HLR using a provisioning system. If the HLR sends information about the services associated with the caller 103 or called 102 (such as prepaid billing, or number translation), the VLR/MSC sends an Intelligent Network Application Protocol (INAP) request to Service Control Point (SCP) 802 for instructions to handle a call that has associated intelligent or supplementary services. In prior art, the SCP 802 is where subscriber's services are processed. In response to the INAP message, SCP 802 may contact local databases to perform appropriate address translations, or may contact the billing system for a prepaid charging request. For services such as prepaid, SCP 802 maintains the call state during the call in order to deduct appropriate amounts from user 103's prepaid billing account until the call terminates.
The VLR/MSC 505 uses ISDN User Part (ISUP) signaling protocol towards the other switches in the network for call path establishment. The HLR may be provisioned manually or automatically with subscription based services. The SCP may also be configured manually or electronically for processing the calls for service delivery. All these components and service delivery steps are prior art and well understood.
During the last decade, the Internet Engineering Task Force (IETF) has developed protocols to carry voice along with data on IP networks. Recently, millions of people have started using the Internet for voice in addition to data. Although phone calls may originate on a terminal attached to the Internet, because the called party will most likely be attached to a non-IP (legacy) network (mobile or fixed networks), a translation gateway is needed to bridge Internet telephony to legacy telephony both for signaling and bearer translations. This translation gateway is known in prior art as a softswitch.
In the softswitch approach, the calling party subscribes to services of a Voice over IP (VoIP) operator (such as Net2Phone® or Vonage®), who has a private Internet backbone, which is also attached to the public Internet to allow access from the public Internet, and has interconnectivity to other operators network to have access to users on other operator's circuit switched network. The softswitch is most commonly owned by the VoIP operator and has interface with mobile or fixed networks.
In order to contrast the above operations with that of the fixed environment, a VoIP operator's (such as Vonage® or Net2Phone®) network is shown in FIG. 2. The Session Initiation Protocol (SIP) as described in RFC 3261 may be used as a VoIP signaling protocol. In FIG. 2, the VoIP terminals 101 that can make phone calls are referred as "SIP clients". It does not preclude, however, that the client may use another IP telephony protocol.
In prior art, the VoIP Operator's network comprises a fixed access network 302a, a fixed core network 302b and at least one softswitch, which is attached to both the VoIP operator's IP network, and simultaneously, to the circuit switched Public Switched Telephony Network (PSTN). The access network may use dial, fixed wireless, cable, ADSL, private line or other narrowband or broadband technologies depending on VoIP operator's choice. In some cases, the VoIP operator may not have an access network. Meaning they rely on the Internet Service Provider's access network to offer the service. For example, if a cable operator such as Comcast® is the VoIP operator, they use the cable network they own to deliver cable TV service for VoIP, and they use an IP backbone network. Another example VoIP operator is Vonage® who does not own an access network, and simply uses the internet access that an ADSL or Cable Operator such as Comcast® delivers to home. In this scenario, Vonage® provides an access box from Motorola that provides a connection to the internet at home and the telephone on another termination to make phone calls.
The VoIP operator's attachment to the PSTN can be performed via connecting to one of the telephone service provider. Connecting to one provider, in general, provides access to many other operator's network through that provider's interconnectivity agreements with other operators and physical connectivity. The softswitch components are prior art and hence will not be discussed in detail in this application. When SIP client 101 attaches to VoIP operator 302's network and calls a phone client attached to the PSTN 601, the SIP signaling originated in SIP Client 101 is terminated on SIP Proxy server 701 in VoIP operator's network or it may alternatively be embedded with softswitch.
Softswitch performs the appropriate signaling translations between IP to SS7/ISUP telephony signaling, translations between IP voice bearers to circuit switched voice bearers, and other well-known functions such as control of the Media Gateway subcomponent of the softswitch using Media Gateway Control Protocol (MGCP) or other protocols. All these components and protocols are well defined in prior art.
If the called party in this scenario is a mobile terminal, then the routing to the appropriate VLR/MSC is performed simply by the interconnection between the PTSN telephony operator and the PLMN. If the called or calling party has subscription-based services, then SCP 802 provides the needed functionality using either the SIP protocol or the INAP protocol between the Softswitch and the SCP.
From the service delivery perspective, the SIP client is a subscriber of the VoIP operator. Hence, the client has access to only the services that the VoIP operator provides. The SIP client's telephone number is provided by the VoIP operator who has a numbering pool.
The SIP client is attached to a fixed network operator. In the case of a subscriber of a VoIP operator initiating a voice call from his/her PC 101 attached to the public Internet 301 at a hotel lobby or Internet cafe, the SIP client of the PC connects to the VoIP operator's network 302. The SIP protocol requires a "SIP proxy server" 701 to intercept and process the SIP calls for signaling. The SIP client on PC 101 has to find the SIP proxy in the VoIP operator's network 302 to process the call. The SIP client finds the IP address of such a SIP proxy by querying the Domain Name Services (DNS) 702 using its SIP domain name as the handle. The SIP client performs the DNS lookup to receive the IP address corresponding to the SIP domain name of the SIP proxy server 701. Having the IP address, the SIP client can now connect to the SIP proxy server 701 in the VoIP operator's network 302 which can further process the phone call. The SIP proxy routes the call to a signaling gateway 307 which can communicate with the SIP protocol on one hand within the IP network and with the SS7 signaling protocol with the non-IP networks on the other. These are links 405 (SIP) and 407 (SS7) respectively. Doing so, the signaling path can be extended to the circuit switched network to find the called party which is on that network. Once the signaling is completed, the voice calls get routed from the calling party to the called party by first traveling the IP network if the form of RTP packets and then through a media gateway 309 which translates the RTP packets to circuit switched voice traffic and finally through the mobile operator's circuit switched network to reach the called party attached to it. The media gateway 309 is controlled by media gateway controller 306 using protocols such as MGCP (multimedia gateway control protocol) and MEGACO (media gateway control). The totality of components 306, 307, and 309 along with SIP Proxy Server 701 is sometimes referred in prior art a "softswitch".
Unfortunately, none of these solutions have an ability to offer seamless services to the users. Today, users cannot utilize their services in mobile networks from the Internet, and even more importantly they have to carry the burden of maintaining different telephone numbers, accounts and services on different networks. Simply, softswitch brought convergence in the networking layer, but not in the services layer.
Whatever the precise merits, features, and advantages of the above discussed systems, none of them achieves or fulfills the purposes of the present invention.