A computer system includes a first core including a first local cache and a second core including a second local cache. The first core and the second core are coupled through a remote link. A shared cache coupled to the first core and to the second core. The shared cache includes an ownership table that includes a plurality of entries indicating if a cache line is stored solely in the first local cache or solely in the second local cache. The remote link includes a first link between the first core and the shared cache and a second link between the second core and the shared cache.

In today's System-on-Chip (SoC) design, power and data memory access have become critical metrics. In multi-core systems where each core has its own cache, but data is shared among all cores, there is a need to keep the caches coherent. In such systems, multiple copies of the same cache line are often present in more than one local, private cache. When a cache line copy is modified locally, the update must also be applied to all other existing copies of the same cache line. Otherwise, data coherency issues arise. Snoop-based or directory-based cache coherence protocols are the most commonly used protocols to maintain cache coherency.
Snoop-based cache coherence is one approach to the cache coherency problem. This technique allows cores to observe, through a shared bus, the reads and writes of other cores in the system. However, snoop-based cache coherence systems can negatively impact the performance of the system. For example, before writing a block of data (even if the block of data is already available in a core's private cache), a core must broadcast the write information to all other cores to maintain coherence. However, the overhead of the snoop-based protocol increases traffic on the bus, increases power consumption and lowers the overall system performance.
Directory-based cache coherence is another approach to maintain cache coherency while attempting to address performance and scalability issues of snoop-based systems. Directory-based systems exist under multiple variations and protocols to monitor the shared data between local private caches. While a common centralized directory avoids race conditions between core requests, it quickly becomes a performance bottleneck for servicing all the requests. Distributed directories provide faster local access to each core but require more complex protocols and communications for synchronization and update.
A private cache provides fast and deterministic access to its dedicated core. However, private caches require coherency protocols because of cache lines duplications. A shared cache, accessed by many cores, naturally maintains coherency by preventing line duplicates. However, cores suffer from slower accesses and consume more power because of longer distance between cores and centralized memory. Coherency may still be required between multiple shared caches.
Each SoC design tends to have its own cache flavor, optimized for specific applications. A multi-core system without cache memory could potentially exist, but its performance would likely be poor. Systems can also rely on software coherency, but an unacceptable number of CPU cycles are required to handle coherency.
In summary, a multi-layered cache approach is used by most modern multi-core systems and cache coherence management is important when multiple copies of same data could exist in different cache entities of the system. However, coherence management overhead is non-negligible, consumes significant power and resources and slows down the memory accesses.
Therefore, there exists a need to provide an improved cache coherency scheme to support multiple cores and multiple cache layers that obviates or mitigates one or more deficiencies of the prior art.
This background information is provided to reveal information believed by the applicant to be of possible relevance to the present invention. No admission is necessarily intended, nor should be construed, that any of the preceding information constitutes prior art against the present invention.

System and methods for cache coherent system using ownership-based scheme


A base layer of an information storage card is coated with a first coating layer that will glow a first color under longwave ultraviolet light. A second coating is applied onto the first coating. This second coating will glow a second color under ultraviolet light. This second coating can then be printed on using standard printing techniques. An attempt to alter the card by removing the printing will damage the first and second coating in a nonuniform manner. This damage will be seen under longwave ultraviolet light, even if the card has been reprinted.

Most identification cards now being made are printed by dye diffusion, thermal transfer (D2T2) printers on vinyl or polyester cards. One problem with these cards has been the relatively simple ability to tamper with the printing on the card. It is a fairly simple procedure to remove the printed images and overlays by abrasion of the surface of the card. The card can then be reprinted with a new polymer layer using a D2T2 printer. It is exceedingly difficult to detect these alterations.
Color has been used as a security feature to prevent counterfeiting or tampering with various media. For example, U.S. Pat. No. 5,346,258 teaches use of colored "confusion patterns" above and below play indicia on a lottery ticket. Tampering with the ticket damages the confusion pattern.
In U.S. Pat. No. 5,403,039 Borowski, Jr. et al. teach a thermochromic layer over printing on a lottery ticket or the like. A user can observe the presence or absence of a reversible color change in the thermochromic layer. Tampering with the card affects the thermochromic layer which would be visible when a color reversal is attempted.
Presently, no technology adequately addresses the problems with tampering of identification cards.
A primary object of the invention is to develop an identification card that will be highly resistant to tampering. It is a further object of the invention that the detection of any tampering done to the card be detectable in a manner that is both simple and rapid. It is a final object of the invention to be able to effect this detection even if the printing on the surface of the card has been removed and a new layer of printed material added onto the surface of the card.


The invention relates to a process for producing a sliding bearing with a sliding surface, which is made of a copper multicomponent alloy with at least two phase constituents, in which process at least one phase constituent at the sliding surface is dissolved by means of an acid, and at least one further phase constituent is retained in a raised form. The sliding bearing preferably is made of a copper/aluminum multicomponent bronze.

Copper alloys have been proven as materials for bearings for decades. On account of their microstructure and properties, they satisfy the demands imposed on them particularly well. Wrought materials are often used during production and, on account of hot-forming and cold-forming, form a uniform and fine-grained microstructure that is particularly advantageous under sliding stress. The required strength properties can be set by means of microstructural transformation within certain ranges, with the result that the ability to withstand loads and the resistance to wear can be increased.
However, particular demands are imposed on the running surfaces of the sliding partners which are in contact with one another. By using lubricants, a supporting lubricating film is built up by virtue of the adhesion and viscosity of the lubricants, the intention of which is primarily to reduce wear. The surface condition of the running surfaces, in the context of the formation of a lubricating film over the area, has a crucial influence on the service life of a bearing. However, the occurrence of dirt particles has a particularly adverse effect on the service life, whether through abrasion of the bearing surfaces themselves or through introduction between the running surfaces via lubricants.
It is known to produce a targeted surface structuring of the running surface by means of special precision-machining processes. Examples include honing processes, as are used for cylinder liners in internal combustion engines. Machining processes of this type introduce a very fine lubricating pocket system into the liner, with the result that the oil cushion which forms over a lubricant deposit improves the sliding properties and reduces the wear. Furthermore, it is also known to use a laser to structure the surface. In this case, although the shape and position of the individual lubricating pockets can be set in a targeted way, this process is hugely time-consuming and correspondingly expensive as small-scale production.
Moreover, document DE 101 57 316 A1 has disclosed a bearing with a nanoscopically rough bearing surface, and a process for producing a bearing of this type. A bearing surface of this type is intended to improve the bearing properties, in the form of minimizing the formation of particles and reducing the friction. The nanoscopically rough bearing surface is produced by etching, mechanical roughening or by an electrochemical process. In the case of etching, the surface is treated with an optionally heated acid, for example by chromosulfuric acid or sulfuric acid. Suitable materials mentioned for the formation of a nanoscopically rough surface are metal alloys based on iron, titanium or chromium.
Furthermore, document DE 100 47 775 C1 has disclosed copper/aluminum multicomponent bronzes for use as bearing material in engine construction. In the use described, the running surfaces remain untreated, the assumption being that with these high-performance bearing materials tribo-oxidation layers will form after a short running time. These are thin layers which form as a covering layer by means of a chemical reaction as a result of heat and a high contact pressure. In general, these thin layers are desirable, since they reduce the coefficient of friction of the running partners and protect the base material from wear.

Process for producing a sliding bearing with a sliding surface, consisting of a copper multicomponent alloy


A liquid crystal display device according to the present invention includes: a liquid crystal panel 11; a source driver 12 for controlling the gray-scale level by applying a voltage to the liquid crystal panel 11; a DC-DC power supply 13 for driving the source driver 12 by supplying current to the source driver 12; a controller 14 for supplying a signal for controlling the gray-scale level to the source driver 12; and a variation calculator 15 for calculating the amount of change in the signal from the controller 14. In the DC-DC power supply 13, current to be supplied to the source driver 12 changes in accordance with the amount of change in the signal calculated by the variation calculator 15.

The present invention relates to liquid crystal display devices, power supply circuits for use in liquid crystal display devices or other devices, and methods for controlling liquid crystal display devices. In particular, the present invention relates to active-matrix-type liquid crystal display devices.
In recent years, liquid crystal display devices have been widely used as screens of TVs and personal computers, panels of mobile equipment, and others.
FIG. 8 is a diagram schematically showing a configuration of a conventional liquid crystal display device. Hereinafter, an active-matrix-type liquid crystal display device will be described.
As shown in FIG. 8, the conventional liquid crystal display device includes: a liquid crystal panel 101 including pixels (not shown) arranged in a matrix pattern; a source driver 102 for controlling the gray-scale levels of the pixels in the liquid crystal panel 101; and a DC-DC power supply 103 for driving the source driver 102 by supplying current to the source driver 102. Although not shown, a gate driver for switching the pixels in the liquid crystal panel 101, a controller for supplying a control signal to the source driver 102 and other components are also provided.
In the liquid crystal panel 101, liquid crystal is sandwiched between two opposed electrodes. One of the electrodes is connected to a thin film transistor (TFT) for each of the pixels. The gate of the TFT receives a voltage from the gate driver. Control of the voltage applied to the gate allows switching operation to be performed on each of the pixels. The source of the TFT receives a voltage from the source driver 102. Control of the voltage applied to the source allows the gray-scale levels of the pixels to differ from one pixel to another. The source driver 102 receives a signal from the controller and a current from the DC-DC power supply 103. A voltage from the DC-DC power supply 103 may be applied to the drain of the TFT (i.e., common electrode).
In the DC-DC power supply 103, an operational amplifier 104 for amplifying an input voltage is provided. The operational amplifier 104 may be connected to a booster (not shown). The booster is used to boost a reference voltage supplied from an external power supply and to supply the boosted voltage to the operational amplifier 104.
However, the conventional liquid crystal display device has the following drawback.
The DC-DC power supply 103 supplies a constant current Imax to the source driver 102. The amount of this current Imax is sufficient for allowing the source driver 102 to operate at the maximum output. It was believed that the supply of such a sufficient amount of current allows the liquid crystal panel 101 to display a stable image. However, in fact, a large amount of current is constantly generated irrespective of display patterns on the liquid crystal panel 101, resulting in high power consumption in the DC-DC power supply 103 and the source driver 102.
Such a drawback is common to power supplies for supplying voltages to electrodes in the liquid crystal panel 101.

Liquid crystal display device, power supply circuit, and method for controlling liquid crystal display device

Matsushita Electric Industrial Co., Ltd.


A projection television set in which a seamless image may be obtained on a screen. A screen plate of a screen assembly is held under a suspended state by a frame in a state wherein the left and right parts are centered in the frame. A cruciform light-shielding frame is mounted on the frame. A light-shielding plate is swingably mounted on a horizontal light-shielding frame of the frame. The position of the light shielding plate is adjusted in response to the vertical movement of a horizontal joint. Also, the horizontal joint line adjusting mechanism is provided independently of a centering mechanism for a vertical joint line.

The present invention relates to a projection television set having a large size screen formed by joining a plurality of Fresnel lenses. Also, the present invention relates to a projection television set having a seamless screen which is to be projected from a plurality of projectors.
In general, a projection television set is provided within a body casing with a CRT unit, an LCD unit and a projector including a projection lens. The projector is provided with a single RGB unit. A screen assembled by a Fresnel lens and a lenticular sheet is provided in a front face of the projector.
Japanese Patent Application Laid-Open No. Hei-3-73938 discloses a projection television set in which four unity Fresnel lenses are joined together. A reinforcement sheet is used to support the Fresnel lenses with centers of the four Fresnel lenses being fixedly aligned with the reinforcement sheet.
Thus, it is unnecessary to perform a centering operation of the screen center in the former projection television set where a single Fresnel lens corresponds to a single RGB unit. In the latter case, the centering operation of the laterally arranged Fresnel lenses is performed through the reinforcement sheet. Therefore, the reinforcement sheet is needed, resulting in the increased number of the components and in degradation in brightness. In such a case, if the right and left centers would not be aligned well, a seam line of the joint line of the Fresnel lenses and the lenticular sheets would appear on the image, so that the quality of the image would be worse.
On the other hand, a conventional multi-unit projection television set P.sub.o has a structure as shown in FIG. 13 (Japanese Patent Application No. 2-402519). For instance, four projection television units 60 are piled up and down and right and left, so that screens 61, 61, . . . , 61 are formed on the front faces of the four projection television units 60. These screens are each composed of a lenticular sheet 63 and a Fresnel lens 64 which are overlapped on each other. Joints of the adjacent screens 61 are carried out as shown in FIG. 14. Namely, frames 65, 65 are mounted at edges of the overlapped Fresnel lenses 64 and the lenticular sheets 63 and are bonded together. Further, panel plates 67 are mounted on the frames 65. The panel plate 67 and the frames 65 are fixed together by screws 66 to thereby join the adjacent screens 61.
However, the above-described joint structure for screens suffers from a problem such that rays of light projected from adjacent projectors such as CRT units, LCD units and the like are shielded or interrupted by the panel plates 67 and will not reach the joint portions of the frames 65, as a result of which joint lines 62 are formed as shown in FIG. 15 and part of an image m is omitted.


A switch with contacts includes a housing formed by snap-fit connection of an upper cover and a base, an operating lever and a movable contact holder, the operating lever and the moveable contact holder being movably-fit to one other. A stop device with a lock mechanism is provided in the housing, the lock mechanism being disposed between the stop device and the movable contact holder. An unlock mechanism is arranged between the stop device and the operating lever. The movable contact holder has positions at each of its two ends with the movable contact holder located in the positions of the two ends. The stop device and the movable contact holder are locked and stopped by the unlock mechanism.

A conventional contact switch usually includes a housing formed by snap-fit of an upper cover and a base, and an operating lever and a movable contact holder with the operating lever and contact holding being movably-fit to each other. Driven by the operating lever, the switch effects the conversion between the switching-on and switching-off processes by the motion of the movable contact holder inside the housing. Currently available contact switches are unable to initiate the action of returning the switch to the initial off position upon switching-off after switching-on, resulting in serious damage to the contacts and shortened working life of the switches due to slow switching.

On/off switch with contacts for electrical circuits and appliances


An elevator hall enunciator lantern includes an array (FIG. 2, FIGS. 4-8) of dual light, light emitting diodes 12-16, 56, 57 to be energized by a signal 35, 35a indicating the arrival of an up traveling elevator or the signal 36, 36a indicating the arrival of a down traveling elevator to provide a green indication or a red indication, respectively. The array may be configured so that the indication appears as an arrow 21, 22 pointing in the direction of the arriving elevator car. The indication may be scrolled (FIGS. 4-8) in the same direction as the direction of travel of the elevator car so as to provide an additional indication of the direction of travel of the arriving elevator car.

It has long been known to provide a separate light on each floor of a building to indicate the arrival of an elevator traveling in each direction (up, down). All of the floors except the highest and the lowest therefore have two separate lights. Typically, as soon as the elevator is committed to stop at the floor, the light on that floor indicating the direction in which the elevator is traveling is lit, and an audible announcement is sounded (such as a bell or chime). In more modern elevator systems, the lanterns may consist of arrays of light emitting diodes (LEDs); one such being used today having eight LEDs across and seven LEDs high in an orthogonal, co-aligned matrix, within a three or four inch rectangle. In order to provide proper service to such elevator systems, it is necessary to stock two different circuit sets, one for the down direction (typically red) and one for the up direction (typically white or green). In most elevator systems, elevator car position indicators are utilized on the main lobby floors to indicate to waiting passengers where each elevator is. In the more expensive elevator systems (such as may be used in luxury hotels and the like) it is also known to provide elevator car position indicators adjacent to doors on all of the floors. The position indicators originally were clock-like dials having a hand pointing to the floor position of the elevator car; then a series of lights, each one representing a floor and bearing a corresponding number, were utilized as a popular form of position indicator. More recently, position indicators have comprised a single display area within which different numerals are displayed. Although some of these are mechanical, today they are most likely to be electronic, formulated with LEDs and the like. In the highest and lowest floors of the elevator system (terminal floors), only one hall lantern is required, which permits utilizing the area that otherwise would be used for the hall lantern of an opposite direction to be used for a position indicator. This permits providing both the hall lantern and the position indicator in a single, unitary hall fixture. However, on those floors where hall enunciator lanterns are required separately for each direction, the incorporation of the position indicator into the hall lantern is not so easily achieved.

Single, bi-color elevator hall enunciator lantern


An integrated circuit having a device with an adjustable parameter utilizes a two signal control protocol to select the device, change the parameter value with or without saving the parameter value in a non-volatile memory, and to write protect the parameter value in the non-volatile memory.

Integrated circuit devices are becoming smaller and with fewer signal leads for both cost and space considerations. Typically an integrated circuit device may be in an integrated circuit package having five to eight pins. At least two of these pins must be used for power and ground, e.g., VDD and VSS, respectively. This leaves only three to six pins for useful signal and control purposes. When a plurality of integrated circuit devices, either on a single integrated circuit die or on multiple dice, are in an integrated circuit package, more pins may be used but are still limited due to the number of device functions.
Typical integrated circuit devices whose parameter values are increased and decreased are, for example, digital rheostat, digital potentiometer, digital counter, programmable gain amplifier, modulo N-frequency divider, and digital-to-analog converter (DAC). What is commonly required for these incremental/decremental dependent devices is some way to control incrementing and decrementing the parameter values used by the device. Another desirable feature in these devices is storage in a non-volatile memory of the last parameter value used before power is removed from the device or to protect against a corrupting event such as static discharge or radio frequency interference (RFI). Non-volatile memory may be, for example, one time programmable (OTP) electrically programmable read only memory (EPROM), electrically erasable and programmable read only memory (EEPROM), FLASH memory and the like.
A low pin count device must maximize functionality for each pin of the integrated circuit package. As such, a two (2) wire up/down protocol may use, for example, signal control pins of up/down (U/D) and chip select (CS). However, when using non-volatile memory in such a device, write protection is needed so that the possibility of noise on the U/D and/or CS signals will not cause a desired value stored in the non-volatile memory to be unintentionally incremented or decremented. An unintentional change of a desired value stored in the non-volatile memory could result in a catastrophic application failure. In additional, write protection can insure that factory calibration of a value in the non-volatile memory will remain intact even if the U/D and/or CS signals are not static (intentionally or unintentionally). Generally, a write protection function will require an additional signal pin, e.g., WR or WP pin. Thus the write protection function uses a valuable signal pin of a low pin count integrated circuit package.
What is needed is write protection for an integrated circuit device having incrementing and decrementing parameter values that can be stored in non-volatile memory such that only two signal nodes or pins are required for all of these functions, including write protection of the non-volatile memory.

Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory


With the object of enabling a subject to be imaged at an appropriate timing of shooting, an image diagnosing apparatus for shooting an image of the subject in an imaging space has a voice guidance unit which reproduces and outputs to the subject a prescribed voice guidance and a voice output control unit which causes the output timing of the voice guidance outputted from the voice guidance unit to correspond with the timing of shooting the image of the subject.

The present invention relates to image diagnosing apparatuses including radiographic apparatuses such as X-ray photographic apparatuses and X-ray CT (computed tomography) apparatuses and magnetic resonance imaging (MRI) apparatuses. It also relates to an image diagnosing method using such an image diagnosing apparatus.
An X-ray photographic apparatus, which takes X-ray photographs, is a type of non-destructive visual examination device which irradiates a subject with X-rays and visualizes the image shot mainly by printing it on a film to make the internal state of the subject known. And X-ray photographic apparatuses are put to practical use mainly in the field of medical care.
And in an X-ray CT apparatus, its scanning unit irradiates a subject with an X-ray beam while rotating an X-ray source around the subject, moves the subject in the direction of its body axis along with the rotation, and scans the volume of subject. Then, it generates images of sections of the subject on the basis of the data derived by the scanning. X-ray CT apparatuses are used for a wide range of purposes including medical uses and industrial uses.
Image diagnosing apparatuses, such as magnetic resonance imaging apparatuses, are known as apparatuses for shooting slice images of sections of a subject, and are used for a wide range of purposes including medical uses and industrial uses.
For instance, when a slice image is to be shot by using a magnetic resonance imaging apparatus, first a subject is accommodated in a space where a magnetostatic field is formed, and the spinning direction of protons in the subject, which is a living organism, is aligned with the direction of the magnetostatic field to achieve a state in which a magnetization vector is obtained. After that, the magnetization vector of the protons of the subject is varied by irradiating the subject with an electromagnetic wave of the resonance frequency from an RF coil and thereby generating a nuclear magnetic resonance phenomenon. And the magnetic resonance imaging apparatus receives with the RF coil magnetic resonance signals from the protons of the subject returning to the original magnetization vector, and generates a slice image on the basis of the received magnetic resonance signals (see Patent Document 1 for instance).
Every one of the image diagnosing apparatuses described above as examples including X-ray photographic apparatuses, X-ray CT apparatuses and magnetic resonance imaging apparatuses shoots images of the subject in an imaging space. The imaging space in this context means a prescribed area of the subject where X-rays irradiating the subject are transmitted in an X-ray photographic apparatus. In an X-ray CT apparatus, the imaging space means a prescribed area of the subject in which the scanning unit of the X-ray CT apparatus irradiates the subject with an X-ray beam while rotating the beam source around the subject and shifts in the direction of the body axis of the subject along with the rotation. In the magnetic resonance imaging apparatus, the imaging space means a prescribed area of the subject in which a slice image is generated on the basis of magnetic resonance signals received by the RF coil.
When an image of a subject is to be shot by using an image diagnosing apparatus, as the subject is always being moved by respiration or otherwise, the shot image may be blurred or suffer the generation of artifacts. Therefore, when taking an image of a subject with an image diagnosing apparatus, the operator tells the subject "Halt breathing" or "Inhale and then halt breathing". Then, the subject temporarily halts his or her bodily motion by halting respiration in accordance with the operator's instruction, and the image is shot at the right timing.
Further, the image diagnosing apparatus may be provided with an auto-voice function to automatically issue a breathing halt instruction, such as "Halt breathing" or "Inhale and then halt breathing", before shooting an image of the subject and to shoot after that instruction (vocal) thereby to catch the right timing of shooting. To further ensure the right timing of shooting, some X-ray CT apparatus, such as the one described in Patent Document 2, is provided with a respiration sensor which detects the subject's respiration either directly or indirectly, and shoots an image after the respiration sensor detects breathing halt after the breathing halt has been instructed.    [Patent Document 1] Japanese Unexamined Patent Publication No. 2002-165775    [Patent Document 2] Japanese Unexamined Patent Publication No. Hei 05 (1993)-056959
As the subject is enabled to halt his or her respiration in accordance with the breathing halt instruction by equipping an image diagnosing apparatus with an auto-voice function or having its operator giving an instruction directly to the subject, image shooting can be accomplished at the right timing.
Equipping the image diagnosing apparatus with an auto-voice function to give instructions to the subject uniformly determines the voice reproduction speed of the auto-voice function. Thus, the length of time from the start until the end of a voice message of the auto-voice function is fixed.
On the other hand, the timing of image shooting is not necessarily determined uniformly. For instance, when a contrast medium is administered to the subject before image shooting, there is a time lag until the administered contrast medium reaches the imaging space and the right timing of image shooting comes. And this time lag may vary in many ways with the positions of the subject or of the imaging space.
For this reason, the time lag and the length of time from the start until the end of the voice message may offer differ from each other, and even when the subject halts his or her respiration as instructed by the voice message, a lag may occur between the timing of the breathing halt and the timing of image shooting.
Furthermore, even if the length of time from the start until the end of the voice message of the auto-voice function is fixed, the subject may not be always able to halt his or her respiration exactly in accordance with the voice message. For instance, in response to the voice message "Inhale and then halt breathing", some subject may hurriedly inhale and halt breathing while another may slowly inhale a long breadth and halt breathing. This would also invite a lag between the timing of breathing halt and the timing of image shooting. Especially where the subject is high-aged, his or her reaction to the reproducing speed of the voice message may be delayed, often making it difficult to respire in accordance with the voice message.

Image diagnosing apparatus and image diagnosing method

GE Medical Systems Global Technology Company, LLC


A communication system for transmitting and receiving data at high speed can be self-tested at actual operating speed with low cost, and without increasing the chip area. A test signal generation unit generates test parallel data. A transmitter for test purpose converts the parallel data into serial data. A selector selectively supplies the serial data output from the transmitter to a receiver during a test operation. The receiver converts the serial data into parallel data. After that, a detector detects an error in the parallel data output from the receiver. In this case, only the transmitter is disposed in correspondence with receivers. Serial data output from the transmitters is supplied to the receivers through the selector.

1. Field of Invention
The present invention relates to a test circuit and method for a communication system in which serial data is transmitted and received at very high speed.
2. Description of Related Art
A transceiver is an indispensable device for the realization of a high-speed data communication system. The transceiver converts low-speed parallel data into high-speed serial data and then transmits the serial data through a transmission path comprising an optical fiber. Further, the transceiver receives high-speed serial data, detects a point of change in the serial data to generate a recovery clock, and then converts the serial data into low-speed parallel data synchronously with the recovery clock.
FIG. 9 is a schematic diagram showing a configuration of an example of 10GBASE-X PMA (Physical Medium Attachment) (PMA) defined by IEEE P802.3ae.
A PMA 60 includes four transceivers 62. Each transceiver 62 comprises a transmitter unit 64 for converting parallel data into serial data and then transmitting the serial data, and a receiver unit 66 for receiving serial data and then converting the received data into parallel data.
In each transceiver 62, the transmitter unit 64 converts 10-bit wide parallel data transmitted at 312.5 Mbps (megabit/second) into 1-bit wide differential serial data to be transmitted at 3.125 Gbps (gigabit/second), and then transmits the converted data (3.125-Gbps data output). The receiver unit 66 receives 1-bit wide differential serial data at 3.125 Gbps (3.125-Gbps data input) and then converts the received data into 10-bit wide parallel data (parallel output) to be transmitted at 312.5 Mbps synchronously with a recovery clock generated based on the serial data.
Testing is the most important challenge in the implementation of the foregoing transceivers 62 on a semiconductor chip. The reason is as follows: an operation performed at actual operating speed cannot be confirmed in a low-speed function test such as a conventional LSI test. Accordingly, whether a semiconductor chip has been produced in normal fashion cannot be confirmed. In addition, a tester capable of handling a data signal transmitted or received at a high speed of 3.125 Gbps is very expensive, resulting in an increase of the test cost.
In designing the transceiver 62, a Built-In-Self-Test (BIST) circuit for performing a self-test, generally called a loopback test, at actual operating speed is built in each transceiver.
With the PMA 60 shown in FIG. 9, a test signal generation unit 68 for generating test parallel data is arranged near a parallel data input of the transmitter unit 64 in each transceiver 62. In the normal operation, parallel data supplied from the outside of the chip is input to the transmitter unit 64 through a multiplexer 70. In the test operation, test parallel data that is generated by the test signal generation unit 68 is input to the transmitter unit 64 through the multiplexer 70. In the transmitter unit 64, the input parallel data is converted into serial data and is then transmitted.
In the normal operation, serial data supplied from the outside of the chip is input to the receiver unit 66 through a multiplexer 72. In the test operation, serial data output from the corresponding transmitter unit 64 is input to the receiver unit 66 through the multiplexer 72. An error detection unit 74 is disposed near a parallel data output of the receiver unit 66. In the test operation, the error detection unit 74 detects an error in the parallel data converted by the receiver unit 66.
In other words, in the test operation, the test signal generation unit 68 generates test parallel data. The transmitter unit 64 converts the test parallel data into serial data and then transmits the data. The receiver unit 66 receives the serial data output from the transmitter unit 64 through the multiplexer 72 and then converts the serial data into parallel data. The error detection unit 74 detects whether the converted parallel data has included an error.
When the BIST circuit is used, the transmitter unit 64 and the receiver unit 66 can be simultaneously tested at the actual operating speed.
In the implementation of the transceivers 62 on one semiconductor chip, for example, the following arrangement is made in some cases. As shown in FIG. 10, the receiver units 66 are disposed in the left portion of the chip, the transmitter units 64 are arranged in the right portion thereof, and a signal received by each receiver unit 66 is supplied to the corresponding transmitter unit 64 through a user logic 76. The reason is as follows where a system is constructed, for example, having a plurality of chips each including the transceivers 62, the foregoing arrangement with the least waste is obtained in consideration of wiring of data signal lines in board designing.
In order to realize the arrangement shown in FIG. 10, it is necessary to arrange each receiver unit 66 and the corresponding transmitter unit 64 separately from each other. Therefore, when the conventional BIST circuit as shown in FIG. 9 is built in each transceiver, each receiver unit 66 requires a dummy transmitter unit 78 for test purpose and each transmitter unit 64 needs a dummy receiver unit 80 for test purpose. Accordingly, the chip area increases, resulting in an increase in the cost.

Test circuit and test method for communication system


A porous substrate curtain coated with a single coating of a liquid dielectric that is cured into a well adhering film at least 15 microns thick with a uniformity of less than 5 microns. The substrate is cleaned to remove contaminants, heated to remove moisture, curtain coated with a single coating of a viscous heat curable liquid dielectric such as polyimide, and heated to cure the dielectric by increasing the temperature at most 15.degree. C. per minute to a predetermined cure temperature not exceeding 450.degree. C. The invention is well suited for fabricating a dielectric layer in a high density multichip module.

1. Field of the Invention
The invention relates to applying a heat curable liquid dielectric on a substrate to form a cured dielectric film, and more particularly to coating a heat curable liquid dielectric on a substrate and then curing the dielectric by increasing the temperature at most 15.degree. C. per minute until a predetermined cure temperature not exceeding 450.degree. C. is reached, thereby providing from the single coating a cured dielectric film at least 15 microns thick with a uniformity of less than 5 microns.
2. Description of Related Art
Integrated circuit chips can be mounted and interconnected on high density multichip modules or substrates, for instance by tape automated bonding. Once fabricated these substrates typically comprise a top surface with bonding pads or bumps, a dielectric layer with buried electrical conductor lines to interconnect the pads, and a base beneath the dielectric for physical support. As used herein, "substrate" refers generally to any material on which a dielectric layer can be coated.
There are several conventional techniques known for coating polyimide on a substrate including spin coating, meniscus coating, spraying and dipping. Spin coating is the most common technique for depositing thin polyimide films. It is well characterized and automated spin coating --equipment is widely available. For example, a pool of liquid polyimide can be deposited on a substrate and rotated at 2000 rpm. The polyimide is radially spun out and forms a substantially uniform layer above the substrate. There are, however, several drawbacks to spin coating. Spin coating normally tends to waste approximately 80-90% of the polyimide as it is slung off the edge of the substrate. The polyimide has a tendency to bead to a greater thickness at the edge of the substrate (edge bead). Nonuniformities arise across substrates. And difficulties arise with flexible or large area substrates. Furthermore, it may be desirable to have at least 20 microns thick polyimide to reduce the line impedance of thin conductive metal traces to about 50 ohms. Producing a cured polyimide layer 15-25 microns thick by spin coating a single uncured layer typically leaves 5-7 microns of uniformity. Where better uniformity is required, for instance 1-3 microns, it becomes necessary to perform 2 or 3 separate spin coatings. This reduces throughput and increases waste since a soft bake is normally required after each spin coating to increase the viscosity of the wet film before the next coat is spun on. For instance, "Pyralin (Trademark) LX----Polyimide Coating Processing Guidelines" by Du Pont, H-12294 (May 1989) describes a multicoat of Pyralin LX used to make one thick layer. After each coating the Pyralin LX is soft baked for 30 minutes at 100.degree. C. and then for 30 minutes at 175.degree. C. or less before the next coating is applied.
Curtain coating (which may encompass extrusion coating) appears to be a promising alternative to spin coating. Curtain coating can be performed by using a precision fluid dispense system to pump a curtain of liquid polyimide through a narrow precision linear orifice or slit preferably the same width as the width of the substrate. The substrate is passed under this "waterfall" of polyimide at a linear velocity. The linear velocity of the substrate may exceed that of extruded polyimide in order to stretch the polyimide film over the substrate. In either case the deposited layer of wet polyimide film typically is uniform and exhibits little or no edge bead. The polyimide wasted by curtain coating as compared to spin coating can be reduced drastically, e.g. by 50-90%. In addition, unlike spin coating, the entire top surface of the substrate need not be covered with dielectric. The resultant dielectric thickness depends on several parameters, such as the dispense rate, slit thickness, substrate velocity, polyimide viscosity, shrinkage factor of the polyimide during curing, and polyimide temperature.
Initial experiments performed by Applicant to deposit a single coating and apply a constant temperature cure to form a relatively thick (at least 15 microns) cured polyimide layer on porous substrates revealed several difficulties in the final cured polyimide. Runs, streaks, crater-like texture, and separation from the substrate were observed.
Similar problems have been noted in the related art. For instance, "Polymers For Electronic Applications," edited by J. H. Lai, CRC Press, p. 40 (1989) points out that the largest practical film thickness achievable by spin coating is on the order of 15 microns; thicker films, such as required for interlayer dielectrics in integrated circuit packaging applications, are deposited with multiple coatings with a cure temperature of at least 150.degree. C. between coats. Likewise, U.S. Pat. No. 4,395,527 by Berger entitled "Siloxane-Containing Polymers" indicates that a solution of a half-amide solvent can be applied to coat a substrate and then heated to evaporate the solvent and convert the half-amide into the corresponding polyimide. However, the coating should be built up gradually from successive layers of very thin coatings. If a thick coating is applied and heated to effect conversion of the half-amide to the imide, the water formed during the reaction can be converted to steam which tends to produce voids (broken continuity) in the coating. Further, as the imidization proceeds from the surface downward, the bottom of the coating is insulated from the heat and this makes completion of the imidization reaction difficult to achieve, or even to identify. The '527 patent then concludes that it is necessary for the user to engage in a series of coating, heating, and cooling cycles in order to develop an acceptable coating.
In addition, the related art typically describes curing the polyimide at a constant temperature. For example, in "Pyralin (Trademark) LX Polyimide Coatings----Technical Data Sheet For PI-2610D and PI-2611D" by Du Pont, H-12295 (April, 1989) the polyimide is made solid by first applying a soft bake (prebake) for 3 minutes at 140.degree. C., and then a cure for 30 minutes at 350.degree. C.
Therefore the related art does not teach how to fabricate from a single coating cured dielectric film at least 15 microns in thickness with a uniformity of less than 5 microns that adheres well to the substrate.

Coating a heat curable liquid dielectric on a substrate

Microelectronics and Computer Technology Corporation


A print system for transmitting print data from a host PC to a printer by radio communication and performing printing. It is determined on the host PC side whether or not two-way communication by radio communication is possible, and if two-way communication is possible, information indicating that two-way communication is possible is transmitted to the printer. On the printer side, identification information of the host PC which transmitted the information indicating that two-way communication is possible is registered.

Conventionally, in a print system including a host computer (host PC) and a printer, the host PC and the printer are interconnected via a cable, and status information indicating various printer statuses including error information, residual ink amount, battery capacity and the like are relayed to the host PC (for example, Related Art 1: Japanese Patent Application Laid-Open No. 2004-050726).
In this print system, the host PC transmits a status information acquisition command to the printer, and the type of desired status information has been previously registered in the printer. When the status information of the registered type changes, it is updated, and the status information of the type registered by the host PC is read by polling. Further, in recent years, proposed is a print system where all the status information can be arbitrarily transmitted from the printer side to the host PC without transmission of a status information acquisition command.
Today, as one radio data communication system, Bluetooth communication adopting spread spectrum communication in a frequency band of 2.4 GHz is utilized.
In Bluetooth communication, the profiles are determined in correspondence with the respective use cases, and communication control is performed in accordance with each profile. In Hardcopy Cable Replacement Profile (hereinbelow, "HCRP") as one of the profiles, the method related to communication between a host PC and a printer or scanner is defined in detail. In the HCRP profile, communication is performed through the Logical Link Control and Adaptation Protocol (hereinbelow, "L2CAP") layer of the Bluetooth communication. A unique 48-bit Bluetooth device address (hereinbelow, "BD_ADDR") is allocated to a Bluetooth communication device, and upon connection, the BD_ADDR is notified for link connection.
In the HCRP profile, two channels are provided in the L2CAP layer. The host PC transmits communication data on a data channel, and performs various controls on a control channel. In the print system, upon data flow control on the data channel, for example, the number of data bytes receivable by its device (printer) on the control channel is provided as credit to the communication opposite-end device (host PC). The communication opposite-end device transmits communication data through the data channel within a range of the given credit. Further, on the control channel, the device ID of the printer can be received.
Next, a method for acquisition of status information between the host PC and the printer will be described. Note that when the printer and the host PC are interconnected by the HCRP, to display the current status of the printer on the host PC side, the status information can be transmitted from the printer through the data channel. However, there is a device which cannot normally receive printer status information in accordance with specification of protocol stack software.
A printer driver installed in the host PC side determines whether or not the printer status information can be received with the utilized protocol stack. If the printer driver determines that the printer status information can be received, the printer driver transmits a status information command through the data channel to the printer to register desired status information on the printer side. On the other hand, the printer side checks its current status in accordance with the received status information command, and transmits the status including error information, residual ink amount, battery capacity and the like in a predetermined format, based on the registered status information, on the data channel. To notify a user of the printer status, the host PC side displays information on a monitor or the like accompanying the host PC based on the received status information.
Further, when the printer driver determines that the printer status information cannot be received with the protocol stack utilized in the host PC, the printer driver does not transmit the status information command to receive the printer status information.
Note that in a case where data communication is performed using the Bluetooth communication, to prevent occupation of radio communication band, or to prevent electric current consumption, otherwise, due to the specification problem of limitation of simultaneous connection i.e. up to seven devices to one master, link connection and disconnection are performed by one data transmission. In an HCRP print system, link connection and disconnection are performed for one print job. As the status information acquisition command is a sort of print job, upon each transmission of status information acquisition command from the host PC, link connection and disconnection are performed unless the link is already established during printing or the like.
As described above, as some devices cannot perform two-way communication in accordance with a connection opposite-end host PC, when status information is transmitted without discretion from a printer side to such device incapable of two-way communication, a trouble may occur on the communication opposite-end device.
Accordingly, a host PC capable of two-way communication transmits the status information command upon each link connection and performs two-way communication. To always check the printer status and release the printer to be utilized by other devices, it is necessary to prepare a process to establish link connection at predetermined periods, transmit the status information command during the link connection, and receive the status information data.
Further, when the Bluetooth communication is used, as link connection and disconnection are performed by each print job, the printer clears the status type registered upon connection. Accordingly, the host PC transmits the status information acquisition command upon each connection with the printer to obtain the printer status information. For example, even when the host PC monitors the printer status without performing print processing, the host PC transmits the status information acquisition command.
In a printer having plural interfaces in which an interface occupation status is changed in accordance with data communication from a host PC, in a case where data communication from the host PC is performed upon each connection, the interface occupation status is inconveniently temporarily changed.
Further, as in the case of recent cable-connection print systems, the arbitrary transmission of all the status information from the printer side to the host PC without status information acquisition command may be applied to the Bluetooth communication. In this case, it is necessary to operate a driver which always normally receives status information in the host PC. However, the printer is not always connected to such host PC. When application software or driver, which cannot receive status information, operates in a host PC, the host PC transmits data that the printer cannot interpret, and a trouble may occur in the host PC.

Print system and printing method for transmitting print data from a host device to an image forming apparatus by radio communication and performing printing


Aspects of the present disclosure provide techniques for providing a graphical user interface. Embodiments include displaying a text input field. Embodiments include receiving an input of at least a portion of a tag via the text input field. Embodiments include displaying, in response to the input and proximate to the text input field, a graphical representation of an existing tag that relates to the input. The graphical representation includes a type of the existing tag, the existing tag, and a colored section on a right side or a left side of the graphical representation having a color that is associated with the type of the existing tag in the computing application. Embodiments include receiving a selection of the graphical representation and displaying an instance of the graphical representation inside of the text input field.

Software applications often involve management of large amounts of data. In an example, a financial services application may be used to manage large numbers of transaction records, such as for accounting or tax preparation purposes.
Data management can become increasingly difficult as amounts of data maintained by an application increase. Some applications allow data items to be grouped into categories, but categorizing data can be a time-consuming task, particularly with large data sets. Furthermore, as applications are increasingly accessed from mobile devices, reviewing and assigning categories to large amounts of data can be particularly inefficient with the limited screen space available on such devices.
Accordingly, there is a need in the art for improved user interfaces for data categorization.

This patent is subject to a terminal disclaimer.


A motionless parallel head reads an optical disk having an active surface encoded with an arrayed multiplicity of one-dimensional holograms. Each 1-D hologram is a computer-encoded representation of, typically, one 128 pixel slice of an image. A group, typically 128, 1-D holograms are positionally distributed, and positionally shifted or staggered one to the next, radially along the disk's active surface so as to fit a complete radius. Typically 14,000 groups are circumferentially-displaced around a 51/4" Compact Disk (CD), forming a herringbone pattern. During readout the encoded CD is simultaneously illuminated along the entirety of one of its radius lines within which a group of holographic data blocks are fitted. The illuminated group of holographic data blocks are optically transformed in parallel by one or more lenses, and preferably by a Hybrid refractive/diffractive Optical Lens (HOL), so as to two-dimensionally spatially encode the wavefront of the light beam by which the group of holographic data blocks was illuminated. The 2-D spatially-encoded light beam is detectable by an array of light detectors. When the disk is rotated then sucessive groups of holographic data blocks that are fitted along successive radius lines are successively retrieved, group by group, at a typically 1.1 Gbyte/sec rate. Such an optical memory is useable as the secondary storage of a high performance optoelectronic associative memory system.

1. Field of the Invention
The present invention generally concerns the reading of information from optical disks, and particularly concerns the parallel reading of one-dimensional holograms that are radially arrayed upon the surface of an optical disk at a high data transfer bandwidth.
2. Background of the Invention
Current secondary digital data storage systems, or memories, have low transfer rates relative to modern computer Central Processor Unit (CPU) processing speeds. Reference B. Robinson, "Grand challenge to Supercomputing," Electronic Engineering Times, 18 Sep. 1989. For memory intensive applications, this creates a performance bottleneck because the memory forces the CPU to wait for data.
Solid state disk drives, with storage capacities of typically 100 Mbytes, typically provide data transfer bandwidths no better than 10 Mbytes/second. Reference L. Curran, "Wafer scale integration arrives in disk form," Electronic Design, 26 Oct. 1989. Although projected developments in main memory technologies such as Static Random Access Memory (SRAM) and Dynamic Random Access Memory (DRAM) could provide bandwidths of 100 Mbytes/second, the capacity of these memories will likely remain severely limited (e.g., 1-10 Mbytes). Reference H. E. Maes et al. ,"Trends in semiconductor memories," Micro Electronics 20, pp 9-57, 1989; and S. Hunter, et al., "Potentials of two-photon based 3-D memories for high performance computing," Applied Optics 29, pp 2058-2066, May, 1990.
Optical disks are good candidates for secondary storage. They combine a high capacity (900 Mbytes for a 51/4" diameter disk), low cost ($1/Mbyte) and robustness (absence head crashes). There are three limitations for high speed operation of optical disk systems: the tracking, the focusing and the addressing functions. All these functions presently require mechanical motions of the head, which motions slow down the disk operation. Moreover the available disk technology is bit-serial sequential, only allowing data rates of up to, typically, 1 Mbyte/second.
It has been shown that optical disks can be read in parallel. Several different parallel readout systems have been proposed. Reference K. Kubota, et al., "Holographic disk with high data transfer rate," Applied Optics 19, pp 944-951, March, 1980; also D. Psaltis, et al., "Optical memory disk in information processing," Applied Optics 29, pp 2038-2057, May, 1990; and also J. Rilum and A. Tanguay, "Utilization of optical memory disk for optical information processing," in technical digest, OSA annual meeting 1988, paper M15.
It would be desirable if any or all of the mechanical motions, and the mechanisms, that are necessary to implement the tracking, focusing or addressing functions of an optical disk memory system could be eliminated, or at least simplified. Simplification, reduction in cost, improvement in shock or vibration tolerance, increased reliability, and/or improved accuracy (signal to noise, and lack of drop-out) of an optical disk readout system might each be desirable under certain circumstances--even if the disk data transfer rate and/or storage capacity were to remain the same, or potentially even to diminish. Alternatively, if the data transfer rate from an optical disk were to be increased by one or two orders of magnitude (the present invention will be seen to increase the data transfer bandwidth by more than three orders of magnitude), then this would be desirable under certain circumstances--even if some negative impact might result on other factors such as cost or reliability.
If an optical disk read out system that was simpler, environmentally harder, more reliable, and likely cheaper than existing optical disk systems, while offering a greatly enhanced data transfer rate, could be realized, then such a system would be interesting, and would seemingly be desirable. If such a new system could be implemented at low cost and with low risk using standard, presently commercially available components (as the system of the present invention will be seen to be), then such a system would be very interesting, and would seemingly be very desirable.
Moreover, a potentially new optical disk system with a "breakthrough" level of performance increase in its data transfer rate would not merely, by virtue of being faster, (i) contribute to the overall throughput of an existing computer data processing system, or (ii) be more generally usable with faster, "super", computers. Instead, such a new system--coupling the existing large capacities, low costs, and reliability of optical disk with a data transfer rate that is typically two orders of magnitude better than semiconductor memories--might render practical certain long-sought functions, and might make possible wholly new functions.
In this regard, it is particularly noted that an associative memory, or content addressable memory, of a practically valuable size and throughput (measured in bit-operations/second, as opposed to bits/second) has long been sought. Reference, for example, T. Kohonen, Self Organization and Associative Memory, Springer Verlag, 1984. The motionless head optical disk readout system of the present invention, and logical extensions thereof including extensions into a third media dimension, will be seen to be the basis of the OPTOELECTRONIC ASSOCIATIVE MEMORY USING PARALLEL-READOUT OPTICAL DISK STORAGE that is the subject of the companion patent application.
Because the motionless head optical disk readout system of the present invention will be seen to hold so much data (940 Mbytes in the preferred embodiment) and to realize its high data transfer rate (about 1.1 Gbytes/sec. in the preferred embodiment) by reading such data in very large words (16,384 bits/word, or a 128.times.128 pixel bit "image" in the preferred embodiment) at high rates (560,000 words/sec.); because one preferred use of the read words is to contain image data (128.times.128 pixels per word); and because the read out system is optically imaging, each retrieved word is sometimes called an "image". It will be understood by a practitioner of the art of high performance computer memory design that the size of each retrieved "word" from such an optical disk system in accordance with the present invention so greatly transcends the typical "word" widths of some 16, 32 or 64 bits that are commonly used in the CPU's of computers that such a optical memory "word" may, on occasion, be called something else. Namely, the very large word is typically called an "image". Use of the word "image"--such as is in "image processing" or "image recognition"--usefully suggests the advanced uses to which a very high data transfer bandwidth memory may be put. It will therefore further be understood by a practitioner of the art of high performance computer memory design that the word "image" is a term of art meaning a word, typically consisting of very large number of typically binary bits, that is retrieved from a high performance memory during each read cycle. The word "image" does not simply mean a pictorial or optical reproduction, nor, invariably, the data that permits of such a reproduction.

Motionless parallel readout head for an optical disk recorded with arrayed one-dimensional holograms


In a grain-oriented electrical steel sheet including: a steel substrate; a forsterite base film; and an insulating coating, critical damage shear stress τ between the forsterite base film and the steel substrate is 50 MPa or more and 200 MPa or less. Thus, a grain-oriented electrical steel sheet having excellent insulation property, stacking factor, and magnetic property is provided without coating damage even when magnetic domain refining treatment by thermal strain is performed.

Grain-oriented electrical steel sheets that contain Si and whose crystal orientation is (110)[001] orientation have excellent soft magnetic property, and so are widely used as various iron core materials in a commercial frequency domain. An important property required here is iron loss typically expressed as W17/50 (W/kg), that is, a loss in the case of magnetization to 1.7 T at a frequency of 50 Hz. This is because the use of a material with a low W17/50 value can significantly reduce no-load loss (energy loss) in an iron core of a transformer. Hence, the need to develop a material with low iron loss has been increasing every year.
Methods known to be effective in reducing iron loss in a grain-oriented electrical steel sheet include Si content increase, sheet thickness reduction, crystal orientation improvement, application of tension to the steel sheet, smoothing of the steel sheet surface, grain refinement of secondary recrystallized microstructure, and magnetic domain refining. Methods of magnetic domain refining include a heat resistant magnetic domain refining method of forming a groove or embedding a non-magnetic substance in the steel sheet surface, and a non-heat resistant magnetic domain refining method of introducing thermal strain into the steel sheet by a laser or an electron beam.
For example, JP S55-18566 A (PTL 1) proposes a non-heat resistant magnetic domain refining technique of irradiating a steel sheet after final annealing with a laser to introduce a high dislocation density region into the surface layer of the steel sheet.
Magnetic domain refining technology using laser irradiation has since been improved to enhance the iron loss reduction effect by magnetic domain refining (for example, JP S63-083227 A (PTL 2), JP H10-204533 A (PTL 3), and JP H11-279645 A (PTL 4)).
However, the non-heat resistant magnetic domain refining method of introducing linear thermal strain into the steel sheet surface by laser irradiation has a problem of widely damaging an insulating coating around a heat-affected zone and significantly decreasing insulation property when using steel sheets in a stacked state.
In view of this problem, the following techniques of repairing the steel sheet whose insulating coating is damaged by laser irradiation are proposed to improve insulation property: the application of an organic coating in JP S56-105421 A (PTL 5); the application of a semi-organic coating in JP S56-123325 A (PTL 6); and the application of an inorganic coating in JP H04-165022 A (PTL 7).

Grain-oriented electrical steel sheet and method for manufacturing same


A connection system for connecting and disconnecting loads to a belt harness is disclosed. The connection system according to the present disclosure may permit simplified, fast and safe handling under icing conditions, line of sight obstruction and/or with gloves.

Belt harnesses are usually mounted at the body of humans and animals and serve for the load introduction to the body. The harnesses are therefore connected to another object, called load in the following. The load can, for example, be a parachute, a safety rope to protect against falling or a sleigh. Depending on the application, tie rods are also used to keep the load, for example the sleigh, at a distance, which is convenient on steep ground.
Carabiners are usually used as a detachable connection system between the pull rod of a sleigh and the belt harness. Releasing and attaching the carabiner is difficult or even impossible under arctic conditions with gloves on. This is aggravated by ice build-up, which surrounds and blocks the carabiner. Arctic areas under maritime influence mean massive icing tendency for the equipment. In any case, an actuation without eye contact or in the dark without practice is hardly possible.
It is therefore an object of the present disclosure to provide an improved connection system for connecting loads, in particular sleighs, to a belt harness, which allows a simplified, fast and safe handling, especially under icing conditions, line-of-sight obstruction and/or with gloves.

Connection system for connecting loads to a harness


A polypeptide is provided that has a secondary structure characterized by at least three beta-sheet/beta-turn structures, and that is not a naturally occurring fibrous protein. Such polypeptides, illustrated by one modeled on elastin, are useful in prosthesis.

The present invention relates to self-aligning peptides modeled on human elastin and other fibrous proteins. The peptides are useful, for example, as biocompatible material for implantation into humans, or for elastic materials.
Currently available synthetic implant materials for soft tissue prosthesis fall short of optimal biocompatibility. The ideal material would provide appropriate structural support, would be biocompatible, in the sense of causing no immunogenic or thrombogenic response, would mimic the physical properties of the tissue replaced, and would provide a friendly environment for normal cell infiltration and growth.
While tissue can sometimes be borrowed from another part of the patient's body, such as by skin grafting or blood vessel replacement, this approach has several limitations, including the limited availability of appropriate donor tissue. Synthetic materials such as dacron, teflon (Gortex) and polyurethane, as well as metals (such as stainless steel and titanium), often are used for prostheses of soft tissues. While these materials can meet the requirements of strength, durability, and flexibility, as foreign materials they are not maximally biocompatible for long term use.
One approach to dealing with this problem has been to coat non-biological materials with proteins or other natural substances. Another approach has been to use biological materials from animal tissue preparations. For example, animal skin preparations have been used to cover burns, and processed animal blood vessels have been used to provide potential blood vessel replacements for humans.
Elastin, a natural structural protein, has received considerable attention for potential use in prostheses, both in soluble forms for coating non-biological prostheses, and in solid forms to produce biologically-derived prostheses. Elastin has structural properties which make it suitable for use in prosthesis and it provides a biocompatible, non-thrombogenic surface for cell infiltration. It is a durable, extremely stable, and highly insoluble extracellular matrix protein which imparts the properties of extensibility and elastic recoil to tissues in which it is found, including large blood vessels, elastic ligaments, lung parenchyma, and skin.
Large arteries are a good source of elastin. Because human arteries are not available in quantity, however, animal arteries have been the primary source of elastin. Because arterial elastin is a highly insoluble matrix, soluble elastin-derived material is generated by treating the insoluble protein with acid or alkali, producing hydrolyzates such as alpha- and kappa-elastin. These are relatively undefined mixtures of peptides of mixed sizes.
In attempts to develop biocompatible materials, soluble animal elastin materials have been used to coat non-biological prosthetic materials, usually with fixation by chemical cross-linking agents. For example, U.S. Pat. No. 4,960,423 (Smith) is directed to a synthetic vascular prosthesis coated with a water-soluble peptide derived from animal elastin.
U.S. Pat. No. 5,416,074 (Rabaud) is directed to a composition comprising elastin or a solubilized elastin peptide and another connective tissue protein, such as fibrin. The solubilized elastin peptide has a molecular weight of greater than 10,000.
U.S. Pat. No. 4,474,851 (Urry) is directed to an elastomeric composite material comprising an artificial core fiber, such as Dacron, and a polypeptide comprising repeating tetrapeptide or pentapeptide units. The units are derived from units observed to be repeated in the tropoelastin molecule, Val-Pro-Gly-Val-Gly (VPGVG) (SEQ ID NO:6) and Val-Pro-Gly-Gly (VPGG) (SEQ ID NO:7). The polypeptide comprises a series of beta-turns and is proposed to have a beta-coil structure. The polypeptide provides elastomeric properties to the composite material, but has little structural strength or integrity. The artificial core fiber provides these latter properties to the composite material.
U.S. Pat. No. 4,979,959 (Guire) is directed to a method of improving the biocompatibility of solid biomaterials by coating them with biocompatible agents and chemically linking the biocompatible agents to the surface via a photochemical reaction.
Elastin-based materials also have been used to produce solid materials from which prostheses can be manufactured. These include soluble animal elastin co-aggregated with other proteins such as collagen, fibrin, fibronectin and laminin, to produce gel-like materials, and polymerized materials derived from short hydrophobic sequences of human elastin (such as PGVGVA) (SEQ ID NO:5). In some cases, these synthetic peptides also include short alanine-rich sequences containing lysine residues, allowing cross-linking between the elastin-like peptides or to other proteins such as collagen. Both elastin and collagen contain crosslinks derived from lysine. For example, U.S. Pat. No. 5,223,420 (Rabaud) is directed to an elastin-based product comprising an adduct containing elastin and at least one other protein, such as fibrin.
U.S. Pat. No. 4,589,882 (Urry) is directed to an artificial elastomeric copolymer comprising an elastomeric component of repeating units of tetrapeptides and pentapeptides and a crosslinking component which may comprise amino acid residues. The repeating units are derived from elastin. U.S. Pat. No. 4,132,746 (Urry) is directed to a synthetic, insoluble, crosslinked polypentapeptide. The pentapeptide is the VPGVG peptide present in tropoelastin. See also U.S. Pat. No. 4,500,700, U.S. Pat. No. 4,870,055, and U.S. Pat. No. 5,250,516 (all to Urry) for other materials derived from this peptide. The polypeptides described in these patents comprise a series of beta-turns and are proposed to have a beta-coil structure.
Animal arteries also have been stripped of extraneous material, leaving largely a matrix of elastin and collagen in tubular form that can be used for blood vessel replacement. For example, U.S. Pat. No. 4,776,853 (Klement) is directed towards a process for preparing an implantable biological material from suitable donor tissue.
The respective contents of the above-described patents and publications are incorporated by reference herein in their entirety.
The materials discussed above were developed to satisfy the need for prostheses suitable for implantation into humans. These materials are not completely satisfactory, however, and there remains a need for prosthesis which have appropriate mechanical properties and which can be used in contact with blood, tissue fluids and cells without adverse effects.

Self-aligning peptides modeled on human elastin and other fibrous proteins


The present invention provides an apparatus for cooperating with a powered tool having a work imparting component having a longitudinal axis so as to maintain the longitudinal axis at substantially constant angles in the X-Y, Y-Z and Z-X planes, as defined in part by the X, Y and Z axes while the powered tool is caused to move through a volume of space. The apparatus includes: an adjustable arm having two ends; a clamp arrangement (14-16) for fixing the powered tool to one of the two ends; and, a base (1-2) fixable to a work piece, attached to the other of the two ends, for supporting the adjustable arm (4-13) and the clamp arrangement (14-16). The adjustable arm further includes: a first portion (4, 5) having two ends, for enabling vertical displacement of the longitudinal axis relative to the Y axis; a second portion (7, 9 and 10-13) having two ends, for supporting the clamp arrangement (14-16); and, a third portion (6, 8) for movably fixing one end of the first portion to one end of the second portion. The third portion further includes: a first arrangement (8) for horizontal extension and retraction of the second portion relative to the X-Z plane; and, a second arrangement (6) for enabling revolution of the clamp arrangement about the third portion.

Broadly, the instant invention relates to an apparatus for maintaining the axis of the work imparting portion of a powered tool at a substantially constant angle. Specifically, the invention relates to an apparatus for maintaining the axis of the drill bit of a dental drill at a substantially constant angle while the apparatus is affixed to, and operating on, a palatal prosthesis.


A readily replaceable bolt face for a firearm (10) with a movable slide (12) that strips a round from a magazine, extracts the spent round from the firing chamber and then ejects the round from the firearm by means of an ejector. A bolt face insert (32) has an external configuration that is common to a range of calibers, but with a bolt face side (66) designed to fit the rim of a specific caliber or calibers having the same rim dimension. The insert may be replaced to fit a different caliber without replacing the slide. The bolt face insert is provided with a slot (62) for the ejector and a groove (60) to accept an extractor for the specified caliber.

Hand held repeaters are known in the prior art of a semi-automatic or automatic design, having a bolt or movable slide that strips a round from a magazine. The slide or bolt is driven to the rear from its battery position upon firing, extracting the spent round from the firing chamber, which is then ejected from the firearm by means of an ejector. The bolt face or slide face is engineered to encapsulate the base or rim of a specific round, determined by the diameter of the rim for safety and function purposes.
This invention relates in general to the construction of firearms and, in particular, to the construction of the bolt or slide area called the face. Typically, this face area is manufactured as an integral part of the bolt or slide, restricting the use of these major components to a specific caliber or calibers having the same rim dimension. Other components frequently can be used in the manufacture of firearms of the same basic type, the difference being the caliber, magazine capacity, sighting arrangements or other features where the same slide or bolt could be used except for their being restricted to a specific caliber by the bolt or slide face area.
The invention takes into the account the high cost of manufacturing the slide or bolt as a component, the need to decrease inventory cost where other components are utilized in the production of a variety of firearms and the inventory of slides needs to be kept high to accommodate the varying demands, the need of militaries to inventory a variety of caliber firearms for special purposes, the cost of replacing firearms with new ones, should a new caliber be desired as a replacement and the desire of an end user to be able to change calibers for different shooting applications.
Accordingly, one object of the present invention is to provide a simplified firearm construction having a readily interchangeable bolt face.
Another object of the invention is to provide a simplified construction for an interchangeable bolt face insert.
Another object of the invention is to provide an improved firearm construction which reduces the cost of the spare parts inventory.
Another object of the invention is to provide an improved firearm, whose slide or bolt may readily be converted to use a different caliber cartridge.

Firearm with a readily interchangeable bolt face


Disclosed is an apparatus for measuring convergence using a fiber Bragg grating sensor measuring slight deformation, capable of measuring the convergence such as the inclination or the gravitational acceleration of a measurement target including a bridge or a tunnel by measuring the deformation of the fiber Bragg grating sensor when the measurement target is inclined or vibrated, as well as a measurement method using the apparatus. The apparatus includes a main body that is installed on a measurement target; a fixture that is fixedly installed at the front of the main body; a rotator that is horizontally installed apart from the fixture at a predetermined distance and is rotatably installed in the main body using a bearing; an optical fiber that is adhered to upper outer surfaces of the fixture and the rotator so as to maintain a horizontally tensioned state and has optical terminals installed on opposite ends thereof; a fiber Bragg grating sensor that is installed on the optical fiber between the fixture and the rotator; and a bob that is vertically connected with a lower portion of the rotator by a support having a predetermined length. The apparatus is installed on the measurement target after setting a reference value and then calculates a quantity of displacement caused by variation of the ground, so that values of angular displacement and gravitational acceleration displacement are measured.

In general, the tunnels for subway have a possibility to cause deformation due to shocks propagated above the ground or vibrations and noises generated while the subway is operated. Thus, the tunnels are required for periodical measurement of convergence.
In the tunnels, the measurement of convergence is used to measure the behavior of an inner cross section of the tunnel to determine whether or not the tunnel is stable, and mainly includes the measurement of an inclination of the tunnel or gravitational acceleration caused by noises and vibrations.
Conventionally, the tunnel convergence is measured using an electric resistance gauge. However, this measurement has low precision, and is difficult to provide a reliable measurement value due to the influence of electromagnetic waves, particularly, while the subway is operated, so that it is not carried out in real time, and thus is performed after the operation of the subway is completed.
However, considering that the tunnel convergence is considerably subject to the physical influence of operation speed and load of the subway, the fact that the measurement cannot be performed while the subway is operated is regarded as a big problem.

Apparatus and method for measuring convergence using fiber Bragg grating sensor


A seal member is provided in which lip wear is suppressed and resistance to muddy water is increased, as well as a bearing device for a wheel, provided with the seal member. An encoder (63) and an elastic member (65) form a labyrinth section (8) between an outer peripheral surface (61a) of a turned-back section (613) and an inner peripheral surface (64a) of an inner fitting section (641). The labyrinth section (8) extends axially outward and radially outward, and an inner peripheral surface (63c) of the encoder (63) that covers an inner peripheral surface (61c) of the turned-back section (613) is sloped axially inward and radially outward.

Conventionally, a bearing device for a wheel, which rotatably supports a wheel, has been known. The bearing device for a wheel includes an outer member having an outer raceway surface formed thereon, an inner member having an inner raceway surface formed thereon, and a rolling element interposed between respective raceway surfaces of the outer member and the inner member, to form a rolling bearing structure.
Incidentally, in the bearing device for a wheel, an annular space is formed between the outer member and the inner member. When muddy water enters the annular space, the raceways and the rolling element are damaged by sand dust or the like contained in the muddy water, which results in a shorter bearing life. Therefore, such a bearing device for a wheel is provided with a seal member in order to seal the annular space (see Patent Literatures 1 to 3).
A seal member described in Patent Literature 1 includes a slinger and a seal ring. The seal ring has a seal lip formed on an elastic member, and a tip edge of the seal lip is in contact with or close to the slinger. With such a structure, the seal member ensures hermeticity while the slinger and the seal ring are rotatable relative to each other. Note that there are a structure that increases the seal lip and a structure that adds a garter spring to increase resistance to muddy water.
A seal member described in Patent Literature 2 devises a part of shape of an encoder to form a labyrinth section between the encoder and an elastic member forming a seal ring. In addition, the labyrinth section extends in a predetermined direction. This structure is intended to discharge muddy water remaining in the labyrinth section by utilizing a centrifugal force generated by a rotation. However, in such a structure, since the labyrinth section has a short total length, there is a concern that the muddy water may pass through the labyrinth section and enter the inside. In addition, there is also a concern that a seal lip may be caught in sand dust or the like contained in the muddy water and cause lip wear.
The seal member described in Patent Literature 3 provides a turned-back section by bending the slinger to form the labyrinth section between the turned-back section and an elastic member forming a seal ring. Therefore, the labyrinth section is formed relatively long. This structure is intended to enhance a function of collecting muddy water and make it difficult for the muddy water to enter the inside by increasing a total length of the labyrinth section. However, in such a structure, there is a concern that if the muddy water passes through the labyrinth section and enters the inside, the muddy water cannot be drained and accumulates. In addition, there is also a concern that a seal lip may be caught in sand dust or the like contained in the muddy water and cause lip wear.

Seal member, and bearing device for wheel with seal member


A computer system which includes a multimedia input device which generates an audio or video input signal and a processor coupled to the multimedia input device. The system further includes a storage device coupled to the processor and having stored therein a signal processing routine for multiplying and accumulating input values representative of the audio or video input signal. The signal processing routine, when executed by the processor, causes the processor to perform several steps. These steps include performing a packed multiply add on a first set of values packed into a first source and a second set of values packed into a second source each representing input signals to generate a packed intermediate result. The packed intermediate result is added to an accumulator to generate a packed accumulated result in the accumulator. These steps may be iterated with the first set of values and portions of the second set of values to the accumulator to generate the packed accumulated result. Subsequent thereto, the packed accumulated result in the accumulator is unpacked into a first result and a second result and the first result and the second result are added together to generate an accumulated result.

1. Field of the Invention
The invention relates to the field of computer systems. More specifically, the invention relates to the area of systems which execute packed data operations.
2. Background Information
In typical computer systems, processors are implemented to operate on values represented by a large number of bits (e.g., 64) using instructions that produce one result. For example, the execution of an add instruction will add together a first 64-bit value and a second 64-bit value and store the result as a third 64-bit value. However, multimedia applications (e.g., applications targeted at computer supported cooperation (CSC--the integration of teleconferencing with mixed media data manipulation), 2D/3D graphics, image processing, video compression/decompression, recognition algorithms and audio manipulation) require the manipulation of large amounts of data which may be represented in a small number of bits. For example, graphical data typically requires 8 or 16 bits and sound data typically requires 8 or 16 bits. Each of these multimedia applications requires one or more algorithms, each requiring a number of operations. For example, an algorithm may require an add, compare and shift operation.
To improve efficiency of multimedia applications (as well as other applications that have the same characteristics), prior art processors provide packed data formats. A packed data format is one in which the bits typically used to represent a single value are broken into a number of fixed sized data elements, each of which represents a separate value. For example, a 64-bit register may be broken into two 32-bit elements, each of which represents a separate 32-bit value. In addition, these prior art processors provide instructions for separately manipulating each element in these packed data types in parallel. For example, a packed add instruction adds together corresponding data elements from a first packed data and a second packed data. Thus, if a multimedia algorithm requires a loop containing five operations that must be performed on a large number of data elements, it is desirable to pack the data and perform these operations in parallel using packed data instructions. In this manner, these processors can more efficiently process multimedia applications.
However, if the loop of operations contains an operation that cannot be performed by the processor on packed data (i.e., the processor lacks the appropriate instruction), the data will have to be unpacked to perform the operation. Therefore, it is desirable to incorporate in a computer system a set of packed data instructions that provide all the required operations for typical multimedia algorithms. However, due to the limited die area on today's general purpose microprocessors, the number of instructions which may be added is limited. Therefore, it is desirable to invent instructions that provide both versatility (i.e. instructions which may be used in a wide variety of multimedia algorithms) and the greatest performance advantage.
One prior art technique for providing operations for use in multimedia algorithms is to couple a separate digital signal processor (DSP) to an existing general purpose processor (e.g., The Intel.RTM. 486 manufactured by Intel Corporation of Santa Clara, Calif.). Another prior art solution uses dedicated video and/or audio processors. In either instance, the general purpose processor allocates jobs that can be performed (e.g., video processing) to the DSP or special purpose processor. Many DSP's, however, have lacked packed data format support
One prior art DSP includes a multiply-accumulate instruction that adds to an accumulator the results of multiplying together two values. (see Kawakami, Yuichi, et al., "A Single-Chip Digital Signal Processor for Voiceband Applications", IEEE International Solid-State Circuits Conference, 1980, pp. 40-41). An example of the multiply-accumulate operation for this DSP is shown below in Table 1, where the instruction is performed on the data values A.sub.1 and B.sub.1 accessed as Source1 and Source2, respectively.
TABLE 1 ______________________________________ Multiply-Accumulate Source1, Source2 ______________________________________ A.sub.1 Source1 B.sub.1 Source2 A.sub.1 B.sub.1 + Accumulator Result1 ______________________________________
One limitation of this prior art instruction is its limited efficiency--i.e., it only operates on 2 values and an accumulator. For example, to multiply and accumulate two sets of 2 values requires the following 2 instructions performed serially: 1) multiply-accumulate the first value from the first set, the first value from the second set, and an accumulator of zero to generate an intermediate accumulator, 2) multiply-accumulate the second value from the first set, the second value from the second set, and the intermediate accumulator to generate the result.
Another prior art DSP includes a multiply-accumulate instruction that operates on two sets of two values and an accumulator. See, Digital Signal Processor with Parallel Multipliers, U.S. Pat. No. 4,771,470, Sep. 13, 1988 to Ando et al. (referred to herein as "Ando et al."). An example of the multiply-accumulate instruction for this DSP is shown below in Table 2, where the instruction is performed on the data values A.sub.1, A.sub.2, B.sub.1 and B.sub.2 accessed as Sources 1-4, respectively.
TABLE 2 ______________________________________ Source1 Source3 A.sub.1 A.sub.2 Multiply Accumulate Source2 Source4 B.sub.1 B.sub.2 = Result1 A.sub.1 .multidot. B.sub.1 + A.sub.2 .multidot. B.sub.2 ______________________________________ + Accumulator
Using this prior art technique, two sets of 2 values stored in four separate source(s) (e.g., RAM or ROM memory locations) are multiplied and then added to an accumulator in one instruction.
One shortcoming of this prior art DSP is that the multiplication and accumulation of two sets of values in this manner using this implementation is difficult to be performed in a processor which is backward compatible with and supports existing instruction sets. Because the performance of these operations requires the access of four source values stored in four source(s) (registers and/or memory locations), an instruction specifying this operation must be capable of specifying four separate source operands. The addition of such an instruction or set of instructions to an existing processor architecture, such as the Intel Architecture processor (IA.TM., as defined by Intel Corporation of Santa Clara, Calif.; see Microprocessors, Intel Data Books volume 1 and volume 2, 1992 and 1993, available from Intel of Santa Clara, Calif.), is difficult because of compatibility concerns with prior versions of the family of processors. It may prevent such a new processor supporting more than two operands from being backward compatible with the existing versions of software capable of being executed on prior versions of these processors.
This multiply-accumulate instruction also has limited versatility because it always adds to the accumulator. As a result, it is difficult to use the instruction for operations other than those that multiply-accumulate. For example, the multiplication of complex numbers is commonly used in multimedia applications. The multiplication of two complex number (e.g., r.sub.1 i.sub.1 and r.sub.2 i.sub.2) is performed according to the following equation: EQU Real Component=r.sub.1 .multidot.r.sub.2 -i.sub.1 .multidot.i.sub.2 EQU Imaginary Component=r.sub.1 .multidot.i.sub.2 +r.sub.2 .multidot.i.sub.1
This prior art DSP cannot perform the function of multiplying together two complex numbers using one multiply-accumulate instruction.
This limitation of a multiply-accumulate instruction can be more clearly seen when the result of such a calculation is needed in a subsequent multiplication operation rather than an accumulation. For example, if the real component were calculated using this prior art DSP, the accumulator would need to be initialized to zero in order to correctly compute the result. Then the accumulator would again need to be initialized to zero in order to calculate the imaginary component. To perform another complex multiplication on the resulting complex number and a third complex number (e.g., r3, i3), the resulting complex number must be resealed and stored into the acceptable memory format and the accumulator must again be initialized to zero. Then, the complex multiplication can be performed as described above. In each of these operations the ALU, which is devoted to the accumulator, is superfluous hardware and extra instructions are needed to re-initialize this accumulator. These extra instructions for re-initialization would otherwise have been unnecessary.

System for signal processing using multiply-add operations