Image forming apparatus 1 capable of forming dots of types in quantity of α (integer satisfying α≧2) wherein there are provided, target pixel selection means 2 that selects a target pixel, recording rate acquisition means 3 that acquires a recording rate total value of dots in two types among dots of types in quantity of α and acquires a recording rate of a dot on one side among dots in two types, first quantization means 4 that conducts quantization based on the recording rate total value and determines recording of dots in quantity of i (integer satisfying 0≦i≦2) on the target pixel and second quantization means 5 that determines types of dots to be recorded on the target pixel based on i representing the number of dots to be recorded on the target pixel determined by the first quantization means and on the recording rate of the dot on one side.

As a printing apparatus for printing images from a personal computer, there have been a printer employing three types of ink each being different in terms of color such as cyan (C), magenta (M) and yellow (Y), and a printer employing four types colors wherein black (K) ink is added to the aforesaid three types of ink. In these printers, images are formed through on-off operations of each dot having its hue obtained by half-toning.
In recent years, on the other hand, for obtaining output images having higher image quality, there is observed the spread of a printer wherein dots with plural gradation levels for a single hue are formed for printing, by using ink having different concentrations (for example, dark color ink and light color ink) in the same hue or by making a dot diameter of ink to be different each other.
However, even when dots having plural gradation levels with a single hue can be formed as stated above, there is sometimes an occasion where an image is rather worsened if the dots are not arranged properly. For example, for obtaining output images having dark dots (dots having higher concentration per unit area) and light dots (dots having lower concentration per unit area), when halftone processing of binarization is conducted for each dot, and when respective pixel values are summed up afterwards, and those where both are superposed do not show excellent dispersion totally, although dot dispersion for light dots only (see FIG. 19(a) and dot dispersion for dark dots only (see FIG. 19(b) are in the excellent condition, thus, final graininess is worsened considerably (see FIG. 19(c).
Therefore, there have been proposed various methods concerning a method of arrangement of plural types of dots each having a different concentration per unit area (for example, see Patent Documents 1-4). Among them, in Patent Document 1, 100% or more of light dots are dotted, and when the difference of concentration from dark dots becomes small, the dark dots are started to be put in.
In Patent Document 2, an occupancy rate of large dots is calculated from input values to arrange dots and then, 3 level halftone processing of input values is carried out, and any of large dot, small dot and no dot is allotted.
Further, in Patent Document 3, input values are dissolved into the dot rate between dark dots and light dots, and for improving dispersion of dark dots, halftone processing is carried out first for dark dot, and then, halftone processing is carried out with a total value of dark dot and light dot, so that arrangement of dark dots may be determined.
Further, in Patent Document 4, input values are dissolved into the dot occupancy rate between dark dots and light dots, and dark dots are selected from the dot occupancy rate of dark dots by the use of blue noise dither, while, light dots are selected from the total value of the dot occupancy rate between dark dots and light dots further by the use of blue noise dither.
(Patent Document 1) Unexamined Japanese Patent Application Publication No. 2003-80682
(Patent Document 2) Japanese Patent Publication No. 3580150
(Patent Document 3) Japanese Patent Publication No. 3208777
(Patent Document 4) Japanese Patent Publication No. 3292104
However, the aforesaid Patent Document 1 has a problem that an amount of ink cannot be limited, and types of usable sheets are limited.
The Patent Document 2 has a problem that excellent images are not obtained in respective dot dispersions, especially in dispersion of remarkable large dots, and graininess is worsened accordingly.
In the Patent Document 3, granulation feeling is rather increased especially when weight of a dot is considered, because dispersion of light dots is disturbed by dark dots, which is a problem.
In the Patent Document 4, under the condition where the sum of the recording rates for two types of dots exceeds 100%, a dither matrix wherein sizes of threshold values of dither matrix used for judgment of forming of dots of a type on one side are replaced is compared with the recording rate of the type on the other side, thus, on the portion where two types of dots are superposed each other, the two types of dots are super posed on a random basis without being controlled, resulting in deterioration of graininess, which is a problem.
An objective of the invention therefore is to provide an image processing apparatus and an image processing method wherein dot dispersion can be carried out excellently when forming the images on a recording medium by the use of dots in a plurality of types.

Image forming apparatus and image forming method


An advanced repeater with duty cycle adjustment. In accordance with a first embodiment of the present invention, an advanced repeater includes an output stage for driving an output signal line responsive to an input signal and a plurality of active devices for selectably adjusting a duty cycle of the signal. The advanced repeater may further include circuitry for producing a delayed version of the signal.

1. Field of the Invention
Embodiments of the present invention relate to advanced repeaters.
2. Related Art
A vital area of circuit performance is the propagation time of signals, for example synchronization or "clock" signals, across an integrated circuit. Longer wires in integrated circuits resist the propagation of signals due to the resistance and capacitance of the wire. The propagation of signals across a chip can be improved by inserting an amplification circuit, sometimes referred to as buffering or repeater insertion, into the wire.

Advanced repeater with duty cycle adjustment


Electrophotographic printing apparatus is described, particularly useful for printing a plurality of copies from a single latent electrostatic image, in which the toner transfer system includes a multi-layer transfer photoreceptor having an outer dielectric layer, an inner electrically-conductive layer, and an intermediate photoconductive layer forming an interface with the outer dielectric layer. A charging system charges the outer surface of the outer dielectric layer of the transfer photoreceptor with charges of one polarity to facilitate the transfer of the toner image from the recording photoreceptor to the record member, and produces in the interface, between the photoconductive layer and the outer dielectric layer, charges of the opposite polarity to maintain the charges of said one polarity on the outer surface of the transfer photoreceptor. The transfer photoreceptor may also serve to transport the record member and to separate the record member from the recording photoreceptor. In the described apparatus, the recording photoreceptor is also of a multi-layer construction including an outer dielectric layer, an inner electrically-conductive layer, and an intermediate photoconductive layer forming an interface with the outer dielectric layer. The imaging device produces a latent electrostatic image of one polarity on the outer surface of the outer dielectric layer of the recording photoreceptor; and a charging system produces a charge pattern of the opposite polarity in the interface of the recording photoreceptor to maintain the latent electrostatic image on the outer dielectric layer of the recording photoreceptor during the printing of a plurality of copies.

Electrophotography is currently the dominant copying and digital printing technology. The electrophotographic process is usually described as a cyclical process consisting of a number of steps. To generate N number of identical copies from the same original, each of the steps in the conventional process must be repeated N times. The steps to be repeated include at least the even charging of a photoreceptor by a charge corona, the recording of the image to be reproduced (create a latent electrostatic image), the development of the exposed image, and the transfer and fixing of the image on the final image carrier. Also repeated are the steps of erasing the residual charge on the photoreceptor and cleaning its surface, before the next recording cycle may begin.
The cyclical nature of the electrophotographic process limits the ability to create high throughput reproduction equipment, since every increase in speed places a heavy burden on the image recording/scanning system and requires extremely high data supply rates. The photoreceptor also suffers from increased cycling fatigue (caused by repetitive, high-speed charge-discharge processes), mechanical wear and tear (caused by the cleaning system) and other drawbacks.
Some of these drawbacks could be eliminated if there would be a possibility to produce a number of copies from a single exposure (single latent electrostatic image). Latent electrostatic image storage capability would allow to achieve high printing speed and reduced mechanical wear and tear, since there would be no need to clean the photoreceptor after each printing cycle. The fatigue of the photoreceptor would also be reduced since there would be less charge-discharge and exposure cycles. Furthermore, the independence of the recording process from the printing process would allow each of them to perform at optimal speed.
Latent image storage is, however, problematic in conventional xerography, and printing at different than recording speed is practically impossible. Dark decay current, a phenomenon in which the charge deposited on the photoreceptor dissipates due to the dark current which is always present in the photoreceptor, prevents the retention and maintenance of a stabilized electrostatic latent image throughout all of the copying process steps required to produce a number of copies of the same original image. This is further complicated by the exponential nature of the decay, which adversely affects the very first moments of the deposited charge's life. For example, an amorphous Se photoconductor charged to a surface potential of 700v decays to 600 v. in the first ten seconds following the initial charge deposit. The increasing need in high speed copying and printing equipment forces use of more sensitive photo-conductors, such as SeTe, As.sub.2 Se.sub.3, etc., that are characterized by an even faster charge relaxation. This makes them unsuitable for latent charge storage/ reproduction of a plurality of images using conventional electrophotographic processes.
Many attempts have been made to use the conventional process to reproduce a plurality of images. U.S. Pat. No. 4,286,865 to Satomi et al, incorporated by reference herein, discloses a copying apparatus which permits, during the automatic copying of a desired number of copies from the same original document, a determination to be made of the number of repeat uses of the same latent electrostatic image. The timing of the formation of successive latent images of the same original document is controlled in accordance with the total number of copies to be made of the same original document, so that the repeat uses of each respective latent image are approximately equal. The preprogrammed electronic control system supports the reproduction of up to 10 copies from a single exposure with reasonable quality. If the number of copies to be made exceeds ten, the quality deteriorates, due to the reasons described above, to an unacceptable level. In order to prevent this, the recording process must be re-repeated.
It is clear that the capabilities of the method disclosed in U.S. Pat. No. 4,286,865 are limited, since the exposure speed (scanning speed) is equal to the process speed, and both are a function of the sensitivity of the photoreceptor layer, which in order to retain the charge for a least ten successive/repetitive copies, cannot be high. As a result of this, the machine's throughput is limited. Another reason for this, as noted above, is the dark charge decay, which is inversely proportional to the photoreceptors' sensitivity. This makes it practically impossible to ensure the same photoreceptor charge level for the first and the tenth copy.
Other attempts have been made of producing a plurality of copies from a single latent image-charge by storing the charge (latent electrostatic image) on a charge retentive layer. Examples of such prior attempts are described in U.S. Pat. Nos. 4,297,422, 4,297,423, 4,297,423, 4,442,191, 4,898,797 and 5,053,304. In these cases, the charge retentive layer is part of a multilayer dielectric photoreceptor structure intended to enable the retention of the charge on the photoreceptor after the transfer operation is completed. However, insofar as we are aware, the techniques described in the above-mentioned patents, despite the complexity of the solutions introduced, have not reached desired results.
Different processes of exposure enabling the creation of a latent electrostatic image on such photoreceptors are also described in the following publications: Nakamura, IEEE TRANSACTIONS ON ELECTRONIC DEVICES, April 1972, pages 405-412; Mitsui, IEEE TRANSACTIONS ON ELECTRONIC DEVICES, April 1972, pages 396-403; and Mark, PHOTOGRAPHIC SCIENCE AND ENGINEERING, May-June 1974, pages 254-261.
Although the reproduction capabilities of the above methods are better than those using a conventional photoreceptor, the number of copies that may be produced from one exposure remains small, and the above methods have not found commercial use insofar as we are aware.
It should be noted that in the multilayer photoreceptors described above, as well as in those in actual use, the dielectric layers, both outer (Canon process) and inner, are usually very thin (2 to 5 microns). These layers may be manufactured by spraying a material solution or casting the material over a substrate, immersing the substrate in a bath with the desired material, or sputtering.
The production of such multilayer structures is a relatively costly process, and these structures do not possess the mechanical strength and durability required to support production of a large number of copies/prints. Despite these shortcomings, these thin multilayer photoreceptors structures are the only available technology that supports the high-speed latent electrostatic image generation required by digital high-speed printing apparatuses. (See the article "Impact of Photoreceptor Design on Digital Electrophotography" by S. Maitra at al, incorporated by reference herein.)
An absolutely necessary condition for producing a plurality of copies from a single exposure is the ability to preserve/sustain the latent image potential relief on the surface of the photoreceptor throughout the entire print run. This condition may generally be satisfied by implementing a contact based electrostatic image from the photoreceptor to the final carrier transfer. A contact roller system, similar to the one described in the above-mentioned patents, is usually used. Alternatively, a belt transfer system with a variety of implementations, as disclosed in the above-cited U.S. Pat. No. 4,286,865, U.S. Pat. No. 5,455,663, U.S. Pat. No. 5,461,461, U.S. Pat. No. 5,469,248 and others, may be used.
In the course of the printing/copying process, the surface of the transfer member (e.g., drum, belt, etc.) which is in contact with the backside of the paper (record member) is continuously charged to a desired charge level and polarity, either directly, or via a regular corotron/scorotron arrangement. The main disadvantage of such a contact transfer device is that it requires a constant charge supply, which causes high energy loss and, in the case of use of a corotron or scorotron device, emission of ozone into the air. The described devices charge the paper as well, and the removal of the static charge requires the use of special paper charge-neutralization devices provided in practically all existing copying/printing electrophotographic equipment. These drawbacks prevent the assurance of an effectively developed image transfer during the production of a plurality of copies from a single exposure, reduce the reliability of the apparatus, and complicate its use.
An additional problem preventing production of a plurality of copies from a single latent electrostatic image is the separation of a record member from the recording photoreceptor. The presently used electrostatically-assisted copy-separation technology cannot be applied in the process of production of a plurality of copies. The AC corona that is used to create an electrical field adversely effects the stored electrostatic latent image on the recording photoreceptor. The existing mechanical separation means, such as separation fingers or rulers, usually contact the outer surface of the recording photoreceptor. This may damage the outer surface of a photoreceptor and mechanically displace toner particles on the recording member and on the photoreceptor.
It is believed that, primarily because of the foregoing shortcomings, the above-mentioned processes for producing a plurality of copies from a single latent image have not been implemented in existing copying/printing apparatus.
There is therefore an urgent need to provide a better multilayer photoreceptor structure and transfer system for transferring the toner image from the recording photoreceptor to the record member which has advantages in the above respects. There is also a need to provide a paper handling system capable of supporting the production of a plurality of copies from a single latent electrostatic image.

Electrophotographic printing apparatus and method


A multiple-valued memory is capable of storing analog quantities which are distinguishable in a plurality of levels, and includes a plurality of memory cells capable of storing n-valued logic values depending on the stored analog quantities, where n is three or greater. The multiple-valued memory is constructed such that correspondences between the analog quantities to be stored by the memory cells and the logic values to be stored in the memory cells are set so that a Hamming distance between two logic values respectively corresponding to an analog quantity having an i-th level and an analog quantity having a (i+1)-th level is one.

The present invention generally relates to multiple-valued memories and data access methods for the multiple-valued memories and, more particularly, to a multiple-valued memory and a data access method therefor which can improve the reliability of data read from the multiple-valued memory.
In multiple-valued memories such as multiple-valued flash memories which store multiple-valued data in a single memory cell, there are demands to improve the control of a plurality of threshold values which are used to discriminate the multiple-valued logic values read from the multiple-valued memory, and to improve the data storage characteristic of the multiple-valued memory.
In the conventional multiple-valued memory, a voltage read from the multiple-valued memory is compared with a plurality of threshold value voltages, so as to judge the multiple-valued logic value corresponding to the read voltage. For example, in the case of the multiple-valued memory capable of storing octal values, eight kinds of threshold value voltages are prepared i.e., defined in advance, and a judgement is made to determine which one of the binary values "000" through "111" corresponds to the logic value of the voltage read from the multi-valued memory depending on the threshold value voltage closest to the read voltage.
However, if the size of the logic values and the size of the threshold values have a linear relationship in the multiple-valued memory described above, the data value of the octal value may erroneously be judged as being "011" even when the data value "100" is being read. In such a case, the Hamming distance between the actual data value "100" and the erroneously read data value "011" becomes "3". In addition, if the actual data value is a maximum value but the erroneously read data values is a minimum value, the Hamming distance between the actual data value and the erroneously read value becomes "2" or greater. In the case of the octal value, for example, if the actual data value is the maximum value "111" but the erroneously read data value is the minimum value "000", the Hamming distance between the actual data value and the erroneously read value becomes "3".
In order to prevent erroneous reading of the data values, it is necessary to carry out an optimum control of the threshold value voltages. But conventionally, no effective and relatively simple method of controlling the threshold value voltages has been proposed.
Moreover, in order to prevent erroneous reading of the data values, it is also necessary to improve the data storage characteristic of the multiple-valued memory. But conventionally, no effective measures have been proposed to improve the data storage characteristic.
On the other hand, when the Hamming distance between the actual data value and the erroneously read data value is "2" or greater, there is a problem in that it is difficult to detect and correct the data error using the error correction code (ECC). Generally, the detection and correction of the data error using the ECC are possible when the Hamming distance between the actual data value and the erroneously read data value is "1", but the reliability of the data error correction is poor when the Hamming distance is "2" or greater.
Accordingly, in the conventional multiple-valued memory, there are problems in that it is difficult to improve the threshold value control method and the data storage characteristic. Further, since no special consideration is given with respect to the relationship of the threshold values and the corresponding logic values, there is a problem in that the reliability of the data error correction is poor even when the data error detection and correction using the ECC are made.

Multiple-valued memory and data access method for multiple-valued memory


A production method of 2-(5-ethyl-5-hydroxymethyl-1,3-dioxane-2-yl)-2-methylpropane-1-ol (DOG) which includes a step of acetalizing hydroxypivalaldehyde with trimethylolpropane in a solvent in the presence of an acid catalyst. After the acetalization, the reaction product liquid is neutralized and then heated to dissolve the deposited DOG crystals. Then, the reaction product liquid is cooled to recrystallize DOG. DOG produced in such manner has an adequately large particle size. Therefore, DOG is easy to handle and involves little danger of dust explosion.

1. Field of the Invention
The present invention relates to a process of producing 2-(5-ethyl-5-hydroxymethyl-1,3-dioxane-2-yl)-2-methylpropane-1-ol (hereinafter referred to as "dioxane glycol" or "DOG"), which is represented by the following formula I:

2. Description of the Prior Art
DOG is produced, for example, by a process including the acetalization of hydroxypivalaldehyde (hereinafter referred to as "HPA") represented by the following formula II:
with trimethylolpropane (hereinafter referred to as "TMP") represented by the following formula III:
in the presence of an acid catalyst; and the filtration, washing and drying of DOG crystals precipitated in the reaction product liquid (JP 62-59104B).
The particle size of DOG crystals produced by the process of JP 62-59104B is as extremely small as 10 μm or less. Therefore, the solid-liquid separation after the reaction takes a long time, to reduce the efficiency of the solid-liquid separation. In addition, since the wet cake obtained by the solid-liquid separation has a high liquid content, a long time is required for drying, to reduce the efficiency of drying. DOG having a small particle size is easy to form dust, to make the handling thereof difficult. Additionally, since DOG having a small particle size which has been produced by known methods is electrostatically charged quite easily, there is a strong possibility of dust explosion.
However, the documents describing known production methods are completely silent about the increase in the particle size of DOG, and therefore, it has been desired to develop a process of producing DOG having a larger particle size. The particle size of DOG crystals produced by known methods can be increased by a purification such as recrystallization. Such measure is, however, industrially disadvantageous, because not only additional chemicals, apparatuses, etc. are required, but also the number of steps for the production of DOG is increased.
DOG has the following two isomers: trans isomer and cis isomer.
DOG or its derivative composed of a mixture of the trans isomer and cis isomer is not suitable as the raw material for industrial use, because products having poor properties are produced. Therefore, DOG is required to have a high content of the trans isomer (hereinafter referred to as "high trans-isomer purity" or merely "high purity").
However, the documents describing known production methods are completely silent about the isomer purity of DOG. As a result of extensive studies by the inventors, it has been found that DOG produced by known methods has a low trans-isomer purity, although mainly composed of the trans isomer. For example, the highest melting point of DOGs actually disclosed in the working examples of JP 62-59104B is 121.5° C. However, a purified DOG having a trans-isomer purity of 99% or more, which is obtained by the recrystallization from acetone of DOG having such highest melting point, shows a melting point of 125° C. or higher.
As described above, although the purity of DOG produced by known methods can be increased by purification such as recrystallization, such measure is industrially disadvantageous, because not only additional chemicals, apparatuses, etc. are required, but also the number of steps for the production of DOG is increased.


A portable and self-contained device for generating melodies. The electronics and battery are contained within an ergonometrically designed housing. Five switches assemblies are also housed therein with the switch actuators protruding out from the housing and being cooperatively positioned to permit a user to readily actuate them to generate one of up to 32 possible combinations that correspond to the musical notes of at least two octaves. A speaker is also housed inside the housing.

1. Field of the Invention
The present invention relates to a music generator, and more particularly, to the type that is self-contained and portable.
2. Description of the Related Art
Many instruments and devices generate musical notes. Few are portable hand held and self-contained. The present invention permits a user to generate musical tones, separated by half tones, over at least two octaves with five keys. A user can readily convey a melody to others by merely manipulating the device with one hand. The present invention is volumetrically efficient and also provides an ergonometric shape.


An image forming apparatus includes: an image forming section including a light exposure section configured to expose an image bearing member to light to form an electrostatic latent image, the image forming section being configured to form a toner image on the image bearing member, and to form an image on a recording sheet by transferring the toner image onto the recording sheet; an estimation section configured to estimate a density lowering position on the basis of image data of an image formed by the image forming section, the density lowering position being a position where decrease in image density relative to a predetermined image density is caused in the image; and a control section configured to increase a light exposure amount at the density lowering position estimated by the estimation section on the image bearing member to an amount greater than a predetermined light exposure amount.

1. Field of the Invention
The present invention relates to an image forming apparatus and a method of forming an image.
2. Description of Related Art
In an electrophotographic image forming apparatus, a developing device is employed in which the surface of a photoconductor drum is charged, and the charged region is exposed to light in accordance with an image data to form an electrostatic latent image, and the electrostatic latent image thus formed is developed to visualize (develop) the image.
In such a developing device, a two-component a developer containing carrier and toner is used, and the toner is frictionally charged and then absorbed by the electrostatic force of the electrostatic latent image formed on the surface of the photoconductor drum, whereby the electrostatic latent image is developed to form a toner image.
A developing roller of the developing device includes therein a plurality of magnetic poles, and a cylindrical developing sleeve which is rotatably supported on the outside of the developing roller. The developing roller conveys to a development region the carrier on which toner is attached, while holding the carrier on the developing sleeve, so as to perform development.
Incidentally, there has been a problem that, in the case where solid image parts 10 and non-image parts 20 are formed side by side on the leading-edge side of the image in the rotational axis direction of a photoconductor drum and thereafter halftone image 30 having a large area is formed as illustrated in FIG. 1, the image density of halftone image 30 becomes nonuniform under the influence of the image (solid image parts 10) of the previous rotation on the developing roller. This problem is known as uneven image density called "development memory."
Now, the mechanism of causing the development memory is described in detail. When an image partially having a high density part (solid image part 10) is printed, the height of the toner layer attached on the surface of the developing sleeve in the region corresponding to solid image part 10 (hereinafter referred to as "region A") is lower than that in the region corresponding to non-image part 20 (hereinafter referred to as "region B"). To be more specific, on the surface of the developing sleeve, the toner is attached in region B whereas the toner is not attached in region A. As a result, on the surface of the developing sleeve, the potential of the toner layer in region A is lower than in region B. In such case, when halftone image 30 having an uniform image density is printed after a potential difference is caused on the surface of the developing sleeve, the development property of toner on the photoconductor drum differs between region A and region B even when the same developing bias is applied thereto. That is, as illustrated in FIG. 1, under the influence of the image (solid image parts 10) of the previous rotation on the developing roller, portions 40 corresponding to solid image parts 10 undesirably have an image density lower than that of portions 50 corresponding to non-image parts 20 in halftone image 30 printed on recording sheet 60. In order to cancel this image density difference, the potential of the toner layer has to be uniformized by maintaining the state where the toner is uniformly attached on the surface of the developing sleeve or the state where no toner is attached on the surface of the developing sleeve, at the time of developing the electrostatic latent image on the surface of the photoconductor drum.
Japanese Patent Application Laid-Open No. 8-54787 discloses a technique of development in which a sleeve is rotated at least one revolution to remove the sleeve contamination before developing an electrostatic latent image only in the case where electric charge of a high charge amount is generated in developer due to a low humidity and thus the risk of sleeve contamination is raised. According to the technique disclosed in Japanese Patent Application Laid-Open No. 8-54787, when the sleeve rotates, rubbing between the developer attached to the sleeve and the developer in a development section removes the sleeve contamination.
Japanese Patent Application Laid-Open No. 2006-145894 discloses a technique of facilitating uniformization of the amount of the developer and the charge amount of the developer of a developer layer formed on a developer bearing member by limiting the ghost due to the development history on the developer bearing member. The developing device disclosed in Japanese Patent Application Laid-Open No. 2006-145894 includes: a rotatable developer bearing member which faces an image bearing member on which an electrostatic latent image is borne, bears on its surface the developer, and has an arithmetic average roughness Ra of 0.7 [μm] or less; a developer supply member which is disposed separately from the developer bearing member and to which a supply bias for facilitating supply of developer to the developer bearing member is applied; and in addition, a developer collecting member which faces the developer bearing member and applies a voltage to collect the developer remaining on the developer bearing member.
Japanese Patent Application Laid-Open No. 2008-224912 discloses a technique of preventing development memory regardless of the property of the developer to be used in the case of hybrid development. In the technique disclosed in Japanese Patent Application Laid-Open No. 2008-224912, a supply-magnet roller for forming a toner layer on a developing roller is oscillated to increase the scraping force for scraping the toner attached on the surface of the developing roller by a magnetic brush, thereby increasing the efficiency of collecting the toner remaining on the surface of the developing roller.
However, the problem with the technique disclosed in Japanese Patent Application Laid-Open No. 8-54787 is that, rubbing between the developer attached to the sleeve and the developer in the development section results in degradation of the developer, shortening the life of the developer.
In addition, the problem with the technique disclosed in Japanese Patent Application Laid-Open No. 2006-145894 is that, particularly in the case where a toner having a charge amount equal to or greater than 50 [μC/g ]is used, a part where the toner remaining on the surface of the developer bearing member can be completely removed and a part where the toner remaining on the surface of the developer bearing member cannot be completely removed may both be formed. Further, in the case where the toner remaining on the surface of the developer bearing member is not electrostatical and has a strong attaching force, removal of the remaining toner with use of electric field is difficult, and the part where toner can be completely removed and the part where toner cannot be completely removed may both be formed easily. In such case, undesirably, the development history on the developer bearing member cannot be sufficiently limited.
In addition, the problem with the technique disclosed in Japanese Patent Application Laid-Open No. 2008-224912 is that, in the case where the charge amount of the toner attached on the surface of developing roller is greater than 50 [μC/g], the attaching force of the toner attached on the surface of the developing roller is strong, and therefore the toner cannot be sufficiently removed from the surface of the developing roller by only the scraping with the magnetic brush.
Since the techniques according to Japanese Patent Application Laid-Open Nos. 8-54787, 2006-145894 and 2008-224912 have the above described problems, the techniques cannot be used as they are to solve the problem that the development memory occurs due to non-uniform potential in the toner layer on the surface of the developing sleeve.

Image forming apparatus and method of forming an image which can prevent a development memory from occurring


An alternating-current (AC) coupling integrated circuit (IC) suppresses signal errors introduced by a steady-state input signal. The IC includes an operational amplifier, a true direct-current (DC) bias network, a complimentary DC-bias network and first and second feedback elements. The operational amplifier has an inverting input, a non-inverting input and an output. The true DC-bias network has first and second branches that are coupled to one another and the non-inverting input. The complimentary DC-bias network has third and fourth branches that are coupled to one another and the inverting input. First and second feedback elements generate first and second control signals in response to a characteristic of one of the true input signal and the complimentary input signal. The control signals prevent the voltage at the inputs to the operational amplifier from reaching an equivalent, steady-state, DC-bias voltage.

Traditional alternating-current (AC) coupled interconnect circuits are used for distributing clocks or other signals that are characterized by regular switching rates. A conventional interconnect circuit is illustrated in FIG. 1. The conventional interconnect circuit 10 is located on a printed circuit assembly 5 and includes a direct-coupled (DC) blocking capacitor 12 and a DC-bias network 14. The interconnect circuit 10 is inserted between a clock source 6 and an integrated circuit package 8 that uses a clock signal generated by the clock source 6. The interconnect circuit 10 has an input node 11 and an output node 17. The input node 11 is coupled to the clock source 6. The output node 17 is coupled to the integrated circuit package 8. The DC-blocking capacitor 12 is coupled between the input node 11 and the output node 17. The DC-bias network 14 includes a first branch 16 coupled between the output node 17 and a supply voltage, labeled VDD and a second branch 18, coupled between the output node 17 and a second voltage, labeled VSS. In an example embodiment, VDD is 1.0 Volts, VSS is 0.0 Volts and the first branch 16 and the second branch 18 of the DC-bias network 14 each include a resistor with an electrical resistance of R1 Ohms.
FIG. 2 includes a graphical representation of an input signal (i.e., a signal from the clock source 6) and an output signal (i.e., a signal at the IC package) for the interconnect circuit 10 of FIG. 1. FIG. 2 represents time along the horizontal axis and electrical potential in volts along the vertical axis. The input signal is represented by trace 21. The output signal is represented by trace 27. The input signal, as represented by trace 21, is a time-varying and periodic signal that begins at approximately 0.8 V and transitions over a relatively brief duration of time to approximately 1.5 V, where it remains for a longer duration of time or a peak interval before returning to 0.8 V. Trace 21 has a peak-to-peak voltage of approximately 0.7 V and a common-mode or average voltage of approximately 1.15 V. The input signal is symmetric about the common-mode voltage.
The output signal, as represented by trace 27, is a time-varying and periodic signal that is offset in voltage from the input signal. The output signal begins at approximately 0.15 V and transitions over the same relatively short interval, during which the input signal transitioned, until the output signal is approximately 0.85 V. The output signal remains at 0.85 V during a peak interval that corresponds to the peak interval of the input signal before returning to 0.15 V. The output signal, as represented by trace 27, has approximately the same peak-to-peak voltage (i.e., 0.7 V) as that of the input signal. However, the common-mode voltage of the output signal is about 0.5 V, which is approximately 0.6 V lower than the common-mode voltage of the input signal. The common-mode voltage of the output signal is determined by the voltage difference between the supply voltage, or VDD, and the second voltage, or VSS and the resistance values of the resistors in the first branch 16 and the second branch 18 of the DC-bias network 14.
Thus, the DC-blocking capacitor 12 of the conventional interconnect circuit 10 isolates the DC bias of two circuits. Stated another way, the interconnect circuit 10 shifts the common-mode voltage of a time-varying and periodic signal to an integrated circuit bias voltage. As illustrated by the trace 21 and the trace 27, the relative timing, the peak-to-peak voltage and the slew or transition rate remains unchanged by the interconnect circuit 10.
When the input signal fails to transition, such as when a clock signal is halted or interrupted, the DC-bias network 14 will charge/discharge the DC blocking capacitor 12 to the DC-bias voltage (i.e., (VDD−VSS)/2). For clock applications this is an undesirable behavior. When a differential clock signal with two AC-coupled inputs using the interconnect circuit 10 of FIG. 1A, encounters an interruption in the clock signal, such as when the input signal is halted (i.e., when the input signal no longer transitions), the true and complimentary signals at the respective output nodes of the interconnect circuits will exponentially decay and exponentially charge until the true and complimentary output signals reach the DC-bias voltage. As a result, a differential amplifier driven by those output nodes can generate undesired glitches or errors in the presence of electrical noise. In addition, the presence of the interconnect circuits will prevent the clock receiver from receiving suitable true and complimentary signals for some time after the differential clock signals at the input have resumed.
Increasing the time constant of the DC-bias network 14, which is responsible for the exponential decay or exponential charge of the output voltage, is one possibility for suppressing or reducing clock signal errors introduced by the noise induced glitches in a clock receiver. However, this approach requires relatively large circuit elements and only increases the time that the clock receiver will not be susceptible to clock signal glitches induced by a clock halt as the clock cannot be halted indefinitely.
Another possible solution is to introduce a hysteresis response in the clock receiver. However, a hysteresis response will corrupt the duty cycle of the clock signal due to variations in the circuit device manufacturing process, voltage and temperature.

Integrated circuits and methods for enabling high-speed AC-coupled networks to suppress noise during low-frequency operation

Avego Technologies ECBU IP (Singapore) Pte. Ltd.


There is described an assembly having a plurality of screws, a propeller and a related method for adjusting the fluid dynamic pitch of the blades of the propeller. The propeller has at least one blade pivoted rotatably to a cylindrical propeller casing, a hub coupled to an engine and mounted coaxially inside the propeller casing, a kinematic mechanism coupled to the hub and/or to the propeller casing, and to the blade for adjusting the fluid dynamic pitch of the propeller. The hub is rotatable with respect to the cylindrical propeller casing, or vice versa, for at least one non-zero angular interval (α) of operation of the kinematic mechanism for adjusting the fluid dynamic pitch and is also integral with a contact surface movable between disengagement from and engagement with, direct or indirect, at least one relative abutment integral with the cylindrical propeller casing which defines a limit stop of the angular interval (α). The plurality of screws has at least two different screws and the propeller has a seat for complete installation of a screw selected from the plurality of screws, and the limit stop abutment has a region of screw selected from the plurality of screws installed in the seat provided in the propeller.

It is known that positioning of the propeller blades with a correct and suitable angle of incidence with respect to the fluid that strikes the blades, that is, a correct fluid dynamic pitch, makes it possible, also as a function of the conditions of use and of the torque supplied by the motor of the boat to which the propeller is coupled, to maintain a high output and achieve satisfactory performances of the same propeller.
The Italian patent IT 1 052 002, in the name of Massimiliano Bianchi, relates to the production a propeller, particularly for use in sailing boats, in which the drive shaft (or the relative propeller hub) and the propeller casing are mutually coupled by two coplanar teeth orthogonal to the propeller axis itself.
When the propeller is stationary, the blades are arranged in the feathered position, so as to generate minimum resistance, and the teeth of the hub and of the propeller casing are spaced apart so that the subsequent rotation of the drive shaft and consequently of the hub, both in one direction and in the other, determines idle rotation thereof for a given angular interval, which, due to an appropriate kinematic mechanism with pinion and gear wheels, corresponds to a rotation of the blades with respect to the cylindrical casing.
When the hub reaches the position of abutment against the propeller casing, and their relative rotation is prevented, the blades are positioned according to a predetermined fluid dynamic pitch, which will depend on the angle of relative rotation between the hub and the propeller casing, and vice versa.
In this way, the propeller blades can reach a first pitch, and consequently a given angle of incidence, adapted for forward movement of the boat, and a second pitch, adapted for reverse movement of the boat, depending on the direction of rotation of the drive shaft with respect to the propeller casing.
However, with a propeller of the type described above it is not possible to easily modify the fluid dynamic pitch, or the interval of fluid dynamic pitches, of the propeller established in the design phase.
In fact, once the pitch of the blades most suitable for forward movement and most suitable for reverse movement of the boat has been established in the design phase, it is no longer possible for the operator to easily vary this angle of rotation. Modification of the pitch of the propeller in this case can only take place by disassembling the propeller and performing internal operations either replacing the hub or the propeller casing, or subjecting these elements to machining operations.
Only by performing these operations, the relative rotation of the hub with respect to the propeller casing determines positioning of the blades at the pitch desired according to the requirements of installation and use. Naturally, the user of the propeller is not able to disassemble the propeller, or to replace or machine its parts, and therefore must have this performed by a skilled mechanic or send the propeller to the manufacturer.
To overcome these drawbacks, propellers have been developed in which the angle of relative rotation of the hub with respect to the propeller casing, and vice versa, which results in a rotation of the blades about their pivot axis with respect to the propeller casing by means of a specific kinematic mechanism, can be modified by the user by acting on threaded grub screws which are screwed into specific seats provided in the propeller, in such a manner as to project inside the propeller casing to determine a modification of the angle of relative rotation between the hub and the propeller casing.
A propeller of this type is described in the patent DE3901672, in which the hub has a tooth destined to come into contact with two relative stop abutments provided on the cylindrical propeller casing following idle rotation, for an angular interval of rotation between the propeller casing and the hub, which causes the predetermined fluid dynamic pitch of the blades to be reached.
The propeller casing is provided with two threaded seats, screwed inside which are two grub screws destined to project inside the propeller casing and on which the tooth of the hub is destined to reach the position of abutment. Consequently, the ends of the grub screws projecting inside the propeller casing form the aforesaid stop abutments for the tooth of the hub.
Relative rotation of the hub with respect to the propeller casing, and the fluid dynamic pitch of the blades that is set as a consequence, are modified by the user of the boat by screwing or unscrewing the grub screws in such a manner that the portion thereof that projects inside the propeller casing is increased or decreased, obtaining a corresponding modification of the position of abutment with the tooth of the hub, and therefore a consequent modification of the angular interval of rotation of the hub with respect to the propeller casing, and vice versa.
However, this type of propeller has some drawbacks deriving from the fact that adjustment of the pitch of the blades is obtained in a manner that is not accurate and substantially linked to the ability and precision of the user of the boat during screwing or unscrewing of the grub screws in the corresponding threaded seats for a given number of turns, or fractions of turns, suitable to reach the required pitch.
In fact, when the user of the boat wishes to modify the pitch of the blades he or she must act manually on the grub screws, screwing or unscrewing them inside the threaded seats.
Naturally, this adjustment is somewhat imprecise and the user often makes mistakes in adjusting the grub screws, which result in incorrect positioning of the blades at a different fluid dynamic pitch to the one required. In fact, as already stated, the user must perform a clockwise or counter-clockwise rotation of the grub screws for a given number of turns, or fractions of turn.
Added to this is the significant complication caused by the fact that these operations to adjust the grub screws are generally carried out under the surface of the water.
It is clear that a procedure of this kind requires numerous attempts, during which the user is required to go underwater and try various adjustments, unscrewing or screwing the grub screws.
It must also be noted that in the case in which the new fluid dynamic pitch set is not satisfactory in terms of efficiency and performance with respect to the one previously set, the user must try to remember the direction and degree of rotation of the grub screws, trying to return them to the previous position, in order to restore the previously set fluid dynamic pitch.
Therefore, it is necessary to simplify the adjustment operations described above, reducing the number of attempts that the user of the boat must carry out to obtain the required fluid dynamic pitch.
The object of the present invention is therefore to overcome the problems of prior art discussed briefly above, and to provide an assembly and related method for adjusting the fluid dynamic pitch of the blades which is simple to perform and, above all, ensures that the fluid dynamic pitch required is accurately set.
The object of the present invention is also to provide an assembly and a method for adjusting the fluid dynamic pitch thanks to which the user of the boat can position the blades at different fluid dynamic pitches without having to make numerous attempts at adjustment.

Feathering propeller with adjustable abutment


The invention relates to a high-voltage connector, consisting of a plug member and a receptacle member receiving the plug member, the area of the plug member facing the receptacle member and/or the area of the receptacle member facing the plug member being provided with a layer of an elastomer. A particularly high high-voltage strength is achieved in that the elastomer is made to swell by means of a swelling medium. The invention also relates to an X-ray generator comprising such a high-voltage connector and to a method of manufacturing such a high-voltage connector.

The invention relates to a high-voltage connector, consisting of a plug member and a receptacle member for receiving the plug member, the area of the plug member facing the receptacle member and/or the area of the receptacle member facing the plug member being provided with a layer of an elastomer. The invention also relates to an X-ray generator comprising such a high-voltage connector and to a method of manufacturing such a high-voltage connector.
The high-voltage strength of a high-voltage connector consisting of a plug member and a receptacle member is limited by ionization processes in the joint between the facing surfaces of the plug member and the receptacle member. Therefore, these parts must be sufficiently long to preclude the occurrence of such ionization processes.


The number of training signals for channel estimation is reduced. A wireless communication method includes: a step of reading, by an access point apparatus, stored training weights for a station which performs channel estimation; a step of generating, by the access point apparatus, a weight training symbol by multiplying the training weights by a training symbol and transmitting the generated weight training symbol; a step of estimating, by a station apparatus, weight channel information from the received weight training symbol; a step of transmitting, by the station apparatus, the weight channel information to the access point apparatus; a step of calculating, by the access point apparatus, transmission weights using the received weight channel information and the stored training weights; a step of transmitting, by the access point apparatus, a data signal in accordance with the transmission weights; and a step of calculating and storing, by the access point apparatus, new training weights using the weight channel information and the stored training weights.

In recent years, as high-speed wireless access systems using a band of 2.4 GHz or 5 GHz, the spread of systems of the Institute of Electrical and Electronics Engineers (IEEE) 802.11g standard, the IEEE 802.11a standard, and so on has been remarkable. In these systems, a physical layer transmission speed of up to 54 Mbps is achieved using an orthogonal frequency division multiplexing (OFDM) modulation scheme, which is technology used to stabilize the performance in a multipath fading environment.
However, the transmission speed referred to here is a transmission speed on a physical layer. Because the transmission efficiency of a medium access control (MAC) layer is actually about 50% to 70%, an upper limit of an actual throughput is about 30 Mbps and its performance is further degraded if the number of communication partners requiring information increases. On the other hand, in the field of wired local area networks (LANs), the provision of a high-speed link of 100 Mbps is widespread as a result of the spread of fiber to the home (FTTH) using optical fibers in individual homes such as a 100 Base-T interface of Ethernet (registered trademark). A further increase in a transmission speed is also required in the field of the wireless LANs.
As technology therefor, multiple-input multiple-output (MIMO) technology is introduced into IEEE 802.11n as spatial multiplexing transmission technology and up to four-element antennas are optionally supported. Furthermore, in IEEE 802.11 ac, a multiuser (MU)-MIMO communication method is studied and the number of antenna elements to be supported is increased to 8 (Non-Patent Document 1). There is a problem in that the number of pilot signals for channel estimation increases when the number of antenna elements increases.
FIG. 6 illustrates a configuration of a conventional transmission/reception system. In FIG. 6, 1 denotes an access point, 2-1 to 2-i denote a plurality of stations, 11 denotes a data selection/output circuit, 12 and 24-1 to 24-i denote transmission signal generation circuits, 13 and 22-1 to 22-i denote wireless signal transmission/reception circuits, 141 to 14N, 211-1 to 21M-1, and 211-i to 21M-i denote transmit/receive antennas, 15 and 23-1 to 23-i denote reception signal demodulation circuits, 16 denotes a channel information storage circuit, 17 denotes a transmission method determination circuit, and 18 denotes a channel estimation symbol generation circuit. Here, 1≦i≦K, where K is the number of the stations, M, is the number of the transmit/receive antennas of an ith station, and N is the number of the transmit/receive antennas of the access point. In addition, in consideration of an OFDM system, the number of frequency channels (subcarriers) carrying signals is assumed to be F.
At the transmission from the access point 1 to a station 2-i, the access point 1 collects channel information representing information about a propagation environment with the antennas of each station before the access point 1 transmits data. The channel estimation symbol generation circuit 18 generates a training symbol used to estimate the channel information with the antennas of the station and outputs it to the transmission signal generation circuit 12. The transmission signal generation circuit 12 attaches a guard interval, a control signal, and the like. The wireless signal transmission/reception circuit 13 up-converts an output signal of the transmission signal generation circuit 12 into a carrier frequency and performs transmission via the transmit/receive antennas 141 to 14N.
In the station 2-i, the wireless signal transmission/reception circuit 22-i receives a wireless signal via the transmit/receive antenna 21M-i, and the reception signal demodulation circuit 23-i performs synchronization, channel estimation, and demodulation and outputs estimated channel information or channel-related information generated by, for example, compressing the channel information to the transmission signal generation circuit 24-i. The transmission signal generation circuit 24-i generates a transmission signal including the channel information or the channel-related information, and outputs it to the wireless signal transmission/reception circuit 22-i at a predetermined timing. The wireless signal transmission/reception circuit 22-i transmits a signal including the input channel information or the channel-related information via at least one of the transmit/receive antennas 211-i to 21M-i.
In the access point 1, a signal from the station 2-i is input to the wireless signal transmission/reception circuit 13 via at least one of the transmit/receive antennas 141 to 14N. The wireless signal transmission/reception circuit 13 performs conversion into digital data by down-converting the input signal from the station 2-i and outputs it to the reception signal demodulation circuit 15. The reception signal demodulation circuit 15 demodulates a reception signal, extracts channel information included in the reception signal, and outputs it to the channel information storage circuit 16.
When the channel information of the station 2-i serving as a communication partner is stored, the data selection/output circuit 11 outputs information on the determined communication partner to the transmission method determination circuit 17 and outputs data to the transmission signal generation circuit 12. The transmission method determination circuit 17 determines transmission weights from the channel information stored in the channel information storage circuit 16, and outputs a transmission mode including the number of spatial streams, a modulation scheme, and a coding rate as well as the transmission weights to the transmission signal generation circuit 12. The channel estimation symbol generation circuit 18 generates a training symbol used to estimate channel information with the antennas of the station and outputs it to the transmission signal generation circuit 12. In accordance with the transmission mode determined for the station which performs communication, the transmission signal generation circuit 12 modulates and encodes a transmission signal, multiplies the transmission weights, inserts a pilot signal to be used in signal detection and communication information delivery, and outputs to the wireless signal transmission/reception circuit 13. The wireless signal transmission/reception circuit 13 up-converts an input signal into a carrier frequency and transmits via the transmit/receive antennas 141 to 14N.
As a method for selecting the communication partner, a communication partner which saves data to be transmitted in a memory and which is ready to perform transmission may be designated, a communication partner corresponding to the oldest data among a plurality of pieces of saved data may be selected, a communication partner may be selected based on quality of service (QoS) of a user, a combination of users previously determined by a group identifier (ID) may be selected, or a combination of communication partners having a low correlation of channel information may be selected.
Hereinafter, a block diagonalization (BD) directivity control method will be described as an example in which communication with a plurality of communication partners is performed using the spatial multiplexing scheme. In order to acquire channel information for the antennas of the stations 2-1 to 2-K, in the access point 1, the channel estimation symbol generation circuit 18 generates a training symbol used for channel estimation. A configuration example of the training symbol is illustrated in FIG. 7. Rectangular blocks LT (1, 1) to LT (N, N) illustrated in FIG. 7 represent OFDM symbols for the channel estimation, and guard intervals (GIs) are attached thereto. LT (j, k) corresponds to an OFDM symbol to be transmitted from a jth antenna at a kth timing in a training symbol block. LT (j, k) is obtained by performing an inverse Fourier transform on signals using known signals s1 to sF at frequency channels and attaching a GI thereto. A transmission signal matrix X including transmission signals xj, k, n of nth frequency channels of LT (1, 1) to LT (N, N) is represented as follows:
                    [                  Formula                                                              1                ]                                                                                X                n                            =                                                          (                                                                                x                                                  1                          ,                          1                          ,                          n                                                                                x                                                  1                          ,                          2                          ,                          n                                                                                …                                                                                x                                                  1                          ,                          N                          ,                          n                                                                                x                                                  2                          ,                          1                          ,                          n                                                                                x                                                  2                          ,                          2                          ,                          n                                                                                …                                                                                x                                                  2                          ,                          N                          ,                          n                                                                                ⋮                                                              ⋮                                                              ⋱                                                              ⋮                                                                                x                                                  N                          ,                          1                          ,                          n                                                                                x                                                  N                          ,                          2                          ,                          n                                                                                …                                                                                x                                                  N                          ,                          N                          ,                          n                                                                                )                                                                                =                                                                            (                                                                                a                                                      1                            ,                            1                                                                                a                                                      1                            ,                            2                                                                                …                                                                                a                                                      1                            ,                            N                                                                                a                                                      2                            ,                            1                                                                                a                                                      2                            ,                            2                                                                                …                                                                                a                                                      2                            ,                            N                                                                                ⋮                                                                    ⋮                                                                    ⋱                                                                    ⋮                                                                                a                                                      N                            ,                            1                                                                                a                                                      N                            ,                            2                                                                                …                                                                                a                                                      N                            ,                            N                                                                                )                                                                  s                  n                                                                                =                                                          As                n                                                                        (        1        )
Here, xj, k, n represents a transmission signal corresponding to an nth frequency channel of LT (j, k), A is a code matrix for the training symbol and a known matrix is used by transmission and reception ends. If an identity matrix I is used as A, it is possible to transmit sn from each antenna at a different timing. Alternatively, an orthogonal matrix that satisfies AHA=I can be used as A. Here, the superscript H represents an Hermitian transpose (complex conjugate transpose).
In the station 2-i, when a signal from the access point 1 is received, the reception signal demodulation circuit 23-i performs synchronization on the received signal and estimates a channel matrix including propagation coefficients between the access point 1 and the antennas of the station 2-i, which is channel information, from reception signals corresponding to LT (1, 1) to LT (N, N). In a reception signal corresponding to a jth training symbol, a reception signal vector yj, i, n including reception signals yl, j, i, n to yMi, j, i, n received by the receive antennas 211-i to 21M-i on an nth frequency channel is represented as follows:
                    [                  Formula                                                              2                ]                                                                                (                                                                                y                                                  1                          ,                          j                          ,                          i                          ,                          n                                                                                y                                                  2                          ,                          j                          ,                          i                          ,                          n                                                                                ⋮                                                                                y                                                                              M                            i                                                    ,                          j                          ,                          i                          ,                          n                                                                                )                            =                                                          y                                  j                  ,                  i                  ,                  n                                                                                =                                                                                H                                          i                      ,                      n                                                                                (                                                                                x                                                          1                              ,                              j                              ,                              n                                                                                x                                                          2                              ,                              j                              ,                              n                                                                                ⋮                                                                                x                                                          N                              ,                              j                              ,                              n                                                                                )                                                  +                                  n                                      j                    ,                    i                    ,                    n                                                                                (        2        )
Here, Hi, n is a channel matrix ((Mi×N) matrix) representing channel information about the nth frequency channel of the station 2-i. An element of a pth column and a qth row of the channel matrix Hi, n represents a propagation coefficient between a pth transmit antenna of the access point 1 and a qth receive antenna of the station 2-i. nj, i, n represents a thermal noise vector on the transmit/receive antennas 211-i to 21M-i of the nth frequency channel of the station 2-i at a reception timing of the jth training symbol.
Consequently, in the station 2-i, a reception signal matrix Yi, n corresponding to first to Nth training symbols on an nth frequency channel is represented as follows:
[Formula 3]Yi,n=(yl,i,n . . . yN,i,n)=Hi,nXn+Ni,n  (3)Ni, n represents a thermal noise matrix for signals received by the transmit/receive antennas 211-i to 21M-i at reception timings of the first to Nth training symbols on the nth frequency channel of the station 2-i.
Because A and sn are known in the station 2-i, Xn is known and the channel matrix can be obtained from the reception signal matrix Yi, n as follows:
[Formula 4]Hi,n′=Yi,nXn−1=Hi,n+Ni,nXn−1  (4)The station 2-i may directly set the obtained H′i, n as feedback information or it may feed back Li row vectors of H′i, n (Li is the number of channel dimensions necessary to perform transmission to the station 2-i and is an integer greater than or equal to the number of data streams Li′ for the station 2-i).
In addition, singular value decomposition on H′i, n may be performed, Li vectors may be selected from a right singular matrix V(s)i, n ((N×Mi) matrix) corresponding to a signal space obtained as the following equation, and they may be fed back.
[Formula 5]Hi,n′=Ui,nΣi,n(Vi,n(s)Vi,n(n))H  (5)Here, Ui, n is a left singular matrix, Σi, n is an (Mi×N) diagonal matrix in which a singular value is set as a diagonal element and a non-diagonal term is 0, and V(n)i, n((N×(N−Mi)) matrix) represents a collection of vectors that do not correspond to singular values in the right singular matrix. Here, although the number of the antennas N of the access point 1 is assumed to be greater than the number of the antennas Mi of the station 2-i, when the number of the antennas Mi of the station 2-i is greater than the number of the antennas N of the access point 1, all column vectors of the right singular matrix correspond to singular values, and Li vectors of the right singular matrix V(s)i, n((N×N) matrix) may be selected and fed back.
Alternatively, Li vectors among basis vectors obtained by performing a Gram-Schmidt orthogonalization method on row vectors of an Hermitian matrix of H′i, n may be selected and fed back. The basis vectors obtained by the orthogonalization method can also be obtained by QR decomposition, the QR decomposition may be performed as the following equation, and Q(s)i, n corresponding to an (Mi×Mi) triangular matrix Γi, n between the obtained orthogonal matrices (Q(s)i, n and Q(n)i, n) may be fed back.
                    [                  Formula                                                              6                ]                                                                                (                          H                              i                ,                n                            ′                        )                    H                =                              (                                                                                Q                                          i                      ,                      n                                                              (                      s                      )                                                                                Q                                          i                      ,                      n                                                              (                      n                      )                                                                                )                                          (                                                                                Γ                                          i                      ,                      n                                                                                0                                                      )                                              (        6        )            Here, Li is the number of channel dimensions, the feedback of which has been requested from the access point 1 to the station 2-i, and the number of spatial streams L′, in which the access point 1 actually performs transmission to the station 2-i is set to be less than or equal to Li. Q(s)i, n and V(s)i, n are part of a unitary matrix, and these matrices obtained from the channel information are defined as signal space matrices or signal space information.
The stations 2-1 to 2-K inserts, into a transmission signal, information about the Li vectors or information compressed in the form in which the information about the Li vectors is reproducible using a feature of the unitary matrix and the like, and transmit it to the access point 1 via the wireless signal transmission/reception circuit 22-i. The access point 1 acquires, from the stations 2-1 to 2-K, the channel information or signal space information calculated from the channel information and stores it in the channel information storage circuit 16.
In the access point 1, when transmission to the stations 2-1 to 2-K is performed, the transmission method determination circuit 17 acquires fed back information about the Li vectors from the channel information storage circuit 16. An (N×Li) matrix including the Li vectors obtained for an nth frequency channel for the station 2-i is defined as a signal space matrix Gi, n. Gi, n may be a complex conjugate transpose matrix of Li row vectors of an estimated channel matrix, or a reception weight matrix Ri, n for Li data streams may be previously defined in the station 2-i and Gi, n may be set as follows:
[Formula 7]Gi,n=(Ri,nHi,n)H  (7)
Alternatively, it may be set as follows:
                    [                  Formula                                                              8                ]                                                                      G                      i            ,            n                          =                              [                          V                              i                ,                n                                            (                s                )                                      ]                                L            i                                              (        8        )                                [                  Formula                                                              9                ]                                                                      G                      i            ,            n                          =                              [                          Q                              i                ,                n                                            (                s                )                                      ]                                L            i                                              (        9        )            [A]L is a function of obtaining an (N×L) matrix by selecting L column vectors from an (N×M) matrix A. When Li is a number less than or equal to Mi and Gi, n is defined by Equation (7), if Li<Mi, the station 2-i may calculate a reception weight Ri, n for Gi, n in the station 2-i in advance and store it. For the reception weight Ri, n in the station 2-i, it is possible to use a reception weight obtained using a matrix obtained by multiplying Hi, nH from the right of Hi, n an Hermitian matrix of an eigenvector of a matrix obtained by multiplying Hi, nH from the right of Hi, n, and so on. In addition, when V(s)i, n and Q(s)i, n of Equations (8) and (9) are obtained, V(s)i, n and Q(s)i, n calculated using a channel matrix Ri, nH′i, n modified using the reception weight Ri, n instead of H′i, n in Equations (5) and (6) may be used.
Next, a method for determining transmission weights using signal space information will be described with respect to an example of the BD method among multiuser transmission methods. Here, a method for calculating transmission weights for an ith station 2-i when communication is performed for K users (the stations 2-1 to 2-K) will be described. First, a set signal space matrix G+i, n corresponding to stations other than the station 2-i is defined as follows:
                    [                  Formula                                                              10                ]                                                                      G                      i            ,            n                    +                =                  (                                                                      G                                      1                    ,                    n                                    H                                                                                ⋮                                                                                G                                                            i                      -                      1                                        ,                    n                                    H                                                                                G                                                            i                      +                      1                                        ,                    n                                    H                                                                                ⋮                                                                                G                                      K                    ,                    n                                    H                                                              )                                    (        10        )
Singular value decomposition on G+i, j can be represented as follows:
[Formula 11]Gi,n+=Ui,n+Σi,n+(Vi,n(s)+Vi,n(n)+)H  (11)V(s)+i, n is a signal space vector corresponding to an eigenvalue Σ+i, n, and V(n)+i, n is a null space vector that has no eigenvalue or it is a null space vector corresponding to an eigenvalue 0. Here, when communication is performed for a null space represented by V(n)+i, n, no interference is generated with respect to reception weights of communication partners other than the station 2-i. Consequently, when communication is performed using a spatial multiplexing scheme for a plurality of communication partners, weights obtained by performing a linear operation on V(n)+i, n obtained here can be used as transmission weights to be used in the nth frequency channel.
For example, it is possible to set, as the transmission weights, weights obtained by multiplying V(n)+i, n by an Hermitian matrix of a basis vector obtained by performing the orthogonalization method on a row vector of Gi, nHV(n)+i, n obtained by multiplying the Hermitian matrix Gi, nH of the signal space matrix corresponding to the station 2-i by V(n)+i, n or by a right singular vector obtained by performing singular value decomposition on Gi, nHV(n)+i, n. When the matrix obtained from Gi, nHV(n)+i, n is denoted as Di, n, the transmission weights Wi, n are represented by [V(n)+i, nDi, n]L′i.
Although this is an MU-MIMO transmission method based on the BD method, it is possible to calculate Wi, n from a signal space matrix using a zero forcing method, a minimum mean square error (MMSE) method, a successive optimization method, Tomlinson Harashima precoding, dirty paper coding, or the like.
In addition, when the number of users is 1 (K=1), it is possible to set the signal space matrix Gi, n as transmission weights or set a right singular matrix corresponding to a signal space of the signal space matrix Gi, n as transmission weights.
In this manner, transmission weights for each communication partner can be calculated and the obtained transmission weights Wn for an nth frequency channel for K users can be represented as follows:
[Formula 12]Wn=(W1,nW2,n . . . WK,n)  (12)
By performing decoding calculation by the reception end using the transmission weights, interference between users is canceled, the interference has a form that can be eliminated by the reception end, or the interference is reduced to a certain expected value in any MU-MIMO transmission weight determination such as a BD method, a zero forcing method, an MMSE method, a successive optimization method, Tomlinson Harashima precoding, or dirty paper coding (for example, see Non Patent Document 1).

Wireless communication method and access point apparatus

Nippon Telegraph and Telephone Corporation


Techniques for stream-based key management are disclosed. A system obtains a first payload to be published to a first set of one or more subscribers, encrypts the first payload using a symmetric key, to obtain a first payload ciphertext, encrypts the symmetric key using an attribute-based encryption (ABE) policy associated with the first payload, to obtain a key ciphertext, and publishes the first payload ciphertext and the key ciphertext. The system obtains a second payload to be published to a second set of one or more subscribers. Responsive at least to determining that each subscriber in the second set of one more subscribers is in the first set of one or more subscribers and the ABE policy is associated with the second payload, the system encrypts the second payload using the symmetric key, to obtain a second payload ciphertext, and publishes the second payload ciphertext without republishing the key ciphertext.

Ciphertext expansion refers to the size increase (e.g., measured in bytes) of a payload when it is encrypted. The additional size is attributable to the inclusion of information needed to decrypt the payload. For example, attribute-based encryption (ABE) is sometimes used in publish-subscribe systems where the publisher does not know the set of subscribers ahead of time. In such systems, every packet must be encrypted using a secret key, which must itself be encrypted and transmitted along with the payload ciphertext. Other kinds of encryption include other kinds of ciphertext expansion.
Table 1 shows examples of ciphertext expansion when using a typical ABE approach, for different policy sizes (i.e., different numbers of leaf attributes). In Table 1, expansion is measured in bytes. Two sets of examples are provided:                Cyphertext Policy ABE (CP-ABE) as described in Brent Waters, Ciphertext-Policy Attribute-Based Encryption: An Expressive, Efficient, and Provably Secure Realization, Eprint 2008 (CPABEw08); and        Multi-Authority CP-ABE as described in Yannis Rouselakis and Brent Waters. Efficient statically-secure large-universe multi-authority attribute-based encryption. In Rainer Böhme and Tatsuaki Okamoto, editors, Financial Cryptography and Data Security—FC 2015, volume 8975 of Lecture Notes in Computer Science, pages 315-332. Springer, 2015. (MA-CPABErw15).
TABLE 1Ciphertext and signature expansion, 112 bits of securityPolicy size:15102050100CPABEw08323109920694009982919529MA-CPABErw1564332156430128603215064300The examples illustrated in Table 1 show that using a typical ABE approach, ABE ciphertext expansion scales linearly with policy size/complexity, and super-linearly with security level.
The costs of ciphertext expansion can be significant, in terms of network bandwidth utilized, processing needed to encrypt each packet, and/or processing needed to decrypt each packet. In a situation where very limited bandwidth and/or processing capacity is available, ciphertext expansion may be prohibitively expensive.
Approaches described in this section have not necessarily been conceived and/or pursued prior to the filing of this application. Accordingly, unless otherwise indicated, approaches described in this section should not be construed as prior art.


An image signal processing circuit is provided that can narrow the bus width of a bus that outputs data. The circuit is equipped with resistances R1˜R511 that are serially connected between a first power supply potential VT and a second power supply potential VB, comparators C1˜C511 having first inputs in which potentials V1˜V511 on terminal sections of the resistances R1˜R511 are input, respectively, and second inputs in which an analog image signal is input, and an encoder 42 that encodes output signals of the comparators C1˜C511 into unsigned integer numbers of 9-bit width and outputs the same as digital image data.

In recent years, digital still cameras and digital video cameras with over one million pixels have become widely used. These digital still cameras use a plurality of CCD image sensors, an area sensor having CMOS image sensors, and an A/D converter, and digitally convert output signals (analog image signals) of the area sensor by the A/D converter, to obtain digital image data. Further, since digital still cameras in recent years require an A/D conversion speed of about 20 MHz, flash type A/D converters, serial-parallel type A/D converters, pipeline type A/D converters and the like, which can perform A/D conversions at high speeds, are often used.
FIG. 15 shows an example of a conventional circuit (digital image photographing circuit) that images digital pictures. As shown in FIG. 15, the digital image photographing circuit 80 is equipped with an area sensor 81, a CDS circuit 84, and a pipeline type A/D converter 85. Also, the area sensor 81 includes a sensor section 82 and a data accumulation section 83, wherein the sensor section 82 includes image sensors disposed in a matrix configuration.
The image sensors within the sensor section 82 output analog image signals according to the amount of received light to the data accumulation section 83. More specifically, each of the image sensors in the sensor section 82 outputs (Vb) V when it receives the minimum amount of light within the range of its light sensing capability, outputs (Vt) V when it receives the maximum amount of light within the range of its light sensing capability, and linearly outputs a potential between (Vb) V and (Vt) V according to the amount of light received when it receives an amount of light between the two. It is noted that the potential difference between (Vb) V and (Vt) V is about 0.6˜0.8 V.
The data accumulation section 83 amplifies the analog image signal received from the sensor section 82 with a predetermined amplification, records the same as a signal having an amplitude ranging between (VB) V and (VT) V, and serially outputs the same to the CDS circuit 84. It is noted that the potential difference between (VB) V and (VT) V is about 2 V.
The CDS circuit 8 removes noise components from the analog image signals serially output from the data accumulation section 83, and serially outputs the same to the A/D converter 85.
The A/D converter 85 receives the analog image signal from the CDS circuit 84, and outputs an unsigned integer value having a width of 10 bits (digital image data). More specifically, the A/D converter 85 outputs zero (0) when it receives an analog image signal at (VB) V, outputs 1023 when it receives an analog image signal at (VT) V, and linearly outputs a value between 0 and 1023 according to a potential received when the received potential is between the two.
FIG. 16 is a graph showing the relation (A/D conversion characteristic) between analog image signals received and digital image data output by the A/D converter 85. In FIG. 16, values of analog image signals received by the A/D converter 85 are indicated along a transverse axis, and values of digital image data output by the A/D converter 85 along a vertical axis.
In general, a digital image data accuracy to at least about 10 bits to 12 bits is required to secure the gradation of an image, and therefore the width of a bus that connects an output of the A/D converter 85 and an image processing circuit in a succeeding stage needs to be broadened, and a large capacity image memory is required to record digital image data.
Also, there is a trend to increase the number of pixels in area sensors, and therefore faster A/D converters (about 20 MHz˜50 MHz) are in demand for taking in the entire image in a shorter time. As a result, pipeline type A/D converters that take in images at high speeds are required. However, although a pipeline type A/D converter with multiple bits is fast and highly accurate, it is a large circuit, expensive and consumes a lot of power. Also, securing the accuracy of a multiple-bit circuit may be problematic. For these reasons, column type A/D converters, which have a smaller circuit and require a lower power consumption than flash type A/D converters, serial-parallel type A/D converters or pipeline type A/D converters, are also used. FIG. 17 shows an example of a semiconductor device using a column type A/D converter. As indicated in FIG. 17, the semiconductor device 90 is equipped with an area sensor 91 having image sensors disposed in a matrix configuration, and a column type A/D converter 92 that receives analog image signals from the area sensor 91 and outputs digital image data of 10-bit width.
When the column type A/D converter is used, as indicated in FIG. 17, the area sensor and the column type A/D converter can be integrated into a single semiconductor device. However, in order to achieve a highly accurate A/D conversion with a column type A/D converter, the cycle of sweep signals in ramps needs to be made longer, which is problematic because A/D conversion takes a long time.
To reduce the memory capacity necessary for the digital expression of a picture, Japanese laid-open patent publication (Tokkai) Hei 8-294086 (hereafter also referred to as "Reference 1") describes a compression method that compresses a digital input expression in first predetermined bits representing a picture in a digital output expression in second predetermined bits representing the picture. The compression method includes the steps of: (a) determining a logarithmic function for converting a digital input in first predetermined bits into a digital output in second predetermined bits; (b) replacing a part of the logarithmic function with a polynomial function; and (c) compressing the digital input in first predetermined bits into the digital output in second predetermined bits through a processor by using the logarithmic function and the polynomial function to thereby reduce the memory capacity necessary for storing the picture.
However, although the compression method described in Reference 1 can reduce the memory capacity for storing pictures, it needs a much higher accuracy in its A/D converter, and also needs a circuit that includes a large capacity memory called a look-up table. Also, in the compression method described in Reference 1, because a part of the logarithmic function is replaced with a polynomial function, a knee characteristic cannot be realized.
Also, Tokkai Hei 7-162886 (hereafter also referred to as "Reference 2") describes a method for performing a film-like compression on a video signal. The video signal film-like compression method includes the steps of: (a) supplying a video signal to a compression means; and (b) film-like compressing the video signal within the compression means in accordance with a film-like compression function and generating a compressed video signal from the video signal.
However, the video signal film-like compression method described in Reference 2 processes a video signal in a manner to incorporate a film-like compression characteristic into the video signal, and does not narrow the bit width of a digital image or the bus width, or realize a knee characteristic.
In view of the problems described above, it is a first object of the present invention to provide an image signal processing circuit that can narrow the bus width of a bus that outputs digital image data, realize a knee characteristic, record digital image data having a great dynamic range with a small memory, and realize a lower power consumption with a simple and low cost circuit while reserving a dynamic range and accuracy necessary for image data. Furthermore, it is a second object of the present invention to provide a semiconductor device that includes such an image signal processing circuit.

Image signal processing circuit and semiconductor device