An apparatus is described. The apparatus includes a DIMM hub circuit. The DIMM hub circuit includes first bus interface circuitry, control circuitry and second bus interface circuitry. The first bus interface circuitry is to receive header information and payload information from a host. The control circuitry is to process the header information and recognize that the payload is to be passed to a target component that is coupled to the DIMM hub circuit through a second bus that is a same type of bus as the first bus. The second bus interface circuitry to send the payload information over the second bus to the target component, wherein, the payload information is to include embedded header information to be processed by the target component.

System memory designers are often looking for new ways to improve the performance and/or functionality of their design. Unfortunately, increased performance/functionality generally comes at the expense of more components/devices that need to be communicated to, and, the more components/devices that need to be communicated to, the slower the throughput of the overall design. As such, creative architectures are needed in order to achieve improved performance and/or functionality without loss of throughput.

Hub circuit for a DIMM having multiple components that communicate with a host


A system and method for controlling automatic cruise control system is provided. More specifically, a request torque for the automatic cruise control system is calculated based on the target vehicle speed and the inclination angle of a road on which the vehicle travels, and the calculated request torque is distributed into engine torque and motor torque at a predetermined ratio. The engine and a motor are then controlled so that the engine and the motor generate torque at the predetermined ratio, and a speed difference between the traveling vehicle speed and the target vehicle speed are calculated. Additionally, a following motor torque is calculated for following the target vehicle speed based on the calculated speed difference and then is added to the distributed motor torque. The traveling vehicle speed is then controlled to the target vehicle speed based on the summed motor torque.

(a) Field of the Invention
The present invention relates to a system and a method for controlling an automatic cruise control of a hybrid vehicle.
(b) Description of the Related Art
Hybrid vehicles (hybrid electric vehicles) use at least two power sources (e.g., an internal combustion engine and battery power). In an electric hybrid vehicle, power from the engine and an electric motor are used to provide power to the drivetrain.
The hybrid vehicles may include, for example, as shown in FIG. 1, an engine 10, a motor 20, an engine clutch 30 connecting/disconnecting power between the engine 10 and the motor 20, a transmission 40, a differential gear system 50, a battery 60, an integrated starter-generator 70 starting the engine 10 or generating electricity by the output from the engine 10, and wheels 80.
Further, the hybrid vehicles may include an HCU (Hybrid Control Unit) 200 that controls the entire operation of the hybrid vehicle, an ECU (Engine Control Unit) 110 that controls the operation of the engine 10, an MCU (Motor Control Unit) 120 that controls the operation of the motor 20, a TCU (Transmission Control Unit) 140 that controls the operation of the transmission 40, and a BCU (Battery Control Unit) 160 that controls and managing the battery 60.
The BCU 160 is sometimes referred to as a BMS (Battery Management System). The integrated starter-generator 70 is sometimes referred to as an ISG (integrated starter & generator) or an HSG (hybrid starter & generator).
The hybrid vehicles are often operated in a plurality of different modes such as an EV mode (Electric Vehicle mode) that is an electric vehicle mode using only the power from the motor 20, an HEV mode (Hybrid Electric Vehicle mode) using the torque from the engine 10 as the main power source and the torque from the motor 20 as a sub-power source, and an RB mode (Regenerative Braking mode) which collects braking and inertia energy by means of electricity generation from the motor 20. The RB mode charges the battery 60, when the vehicles are braked or driven by the inertia. The hybrid vehicles (like other conventional vehicles) may be equipped with an automatic cruise control system that maintains the traveling vehicle speed of the vehicle at a predetermined target vehicle speed (target vehicle speed) without as the driving having to operate the accelerator pedal or the brake pedal.
FIG. 2 shows a schematic configuration of an automatic cruise control system of a hybrid vehicle according to an exemplary embodiment of the related art. The automatic cruise control system of a hybrid vehicle according to an exemplary embodiment of the related art, in automatic cruise control, calculates driver request toque by means of a speed control unit 5 and performs automatic cruise control by producing an engine torque instruction and a motor torque instruction from the calculated driver request torque and provides instructions to the engine and the motor included in a control target 7. The automatic cruise control system of a hybrid vehicle according to an exemplary embodiment of the related art can rapidly change the engine torque instruction to provide an accurate target vehicle speed, when the request torque rapidly changes.
Accordingly, the automatic cruise control system of a hybrid vehicle according to an exemplary embodiment of the related art opens the engine throttle at a predetermined level and changes the spark timing to cope with the rapidly changed engine torque instruction, which may deteriorate the fuel efficiency. Thus, there is a need for a more fuel efficient automatic cruise control system.
The Description of the Related Art is made to help understanding the background of the present invention and may include matters out of the related art known to those skilled in the art.
The above information disclosed in this Background section is only for is enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.

System and method for controlling auto cruise of hybrid electric vehicle


The present invention provides compounds of formula I:

DNA-topoisomerases are enzymes which are present in the nuclei of cells where they catalyze the breaking and rejoining of DNA strands, which control the topological state of DNA. Recent studies also suggest that topoisomerases are also involved in regulating template supercoiling during RNA transcription. There are two major classes of mammalian topoisomerases. DNA-topoisomerase-1 catalyzes changes in the topological state of duplex DNA by performing transient single-strand breakage-union cycles. In contrast, mammalian topoisomerase II alters the topology of DNA by causing a transient enzyme bridged double-strand break, followed by strand passing and resealing. Mammalian topoisomerase II has been further classified as Type II xcex1 and Type II xcex2. The antitumor activity associated with agents which are topoisomerase poisons is associated with their ability to stabilize the enzyme-DNA cleavable complex. This drug-induced stabilization of the enzyme-DNA cleavable complex effectively converts the enzyme into a cellular poison.
Several antitumor agents in clinical use have potent activity as mammalian topoisomerase II poisons. These include adriamycin, actinomycin D, daunomycin, VP-16, and VM-26 (teniposide or epipodophyllotoxin). In contrast to the number of clinical and experimental drugs which act as topoisomerase II poisons, there are currently only a limited number of agents which have been identified as topoisomerase I poisons. Camptothecin and its structurally-related analogs are among the most extensively studied topoisomerase I poisons. Recently, bi- and terbenzimidazoles (Chen et al., Cancer Res. 1993, 53, 1332-1335; Sun et al., J. Med. Chem. 1995, 38, 3638-3644; Kim et al., J. Med. Chem. 1996, 39, 992-998), certain benzo[c]phenanthridine and protoberberine alkaloids and their synthetic analogs (Makhey et al., Med. Chem. Res. 1995, 5, 1-12; Janin et al., J. Med. Chem 1975, 18, 708-713; Makhey et al., Bioorg. and Med. Chem. 1996, 4, 781-791), as well as the fungal metabolites, bulgarein (Fujii et al., J. Biol. Chem. 1993, 268, 13160-13165) and saintopin (Yamashita et al., Biochemistry 1991, 30, 5838-5845) and indolocarbazoles (Yamashita et al., Biochemistry 1992, 31, 12069-12075) have been identified as topoisomerase I poisons.
The exceptional topoisomerase poisoning observed with coralyne, nitidine, 5,6-dihydro-8-desmethylcoralyne and related analogs prompted several recent studies on those structural features which are associated with their ability to act specifically as poisons of topoisomerase I or topoisomerase II (Gatto et al., Cancer Res. 1996, 56, 2795-2800; Wang et al., Chem. Res. Toxicol. 1996, 9, 75-83; Wang et al., Chem. Res. Toxicol., 1993, 6, 813-818). A common feature associated with all three of these agents is the presence of a 3-phenylisoquinolinium moiety within their structure.
Despite the observation that several of these compounds had similar potency to camptothecin as a topoisomerase I poison or similar potency to VM-26 as a topoisomerase II poison, they possessed only modest cytotoxic activity. The absence of a more direct correlation with their potency as topoisomerase poisons was attributed, in part, to the likelihood that these agents are not likely to be absorbed as effectively into cells as either camptothecin or VM-26. The presence of the quaternary ammonium group most likely impedes cellular uptake. It has been speculated that agents such as coralyne and nitidine may need to undergo hydrolysis to permit effective transport, with subsequent dehydration or cyclodehydration to reform the quaternary ammonium parent compound. This may explain the relatively poor antitumor activity observed in vivo with agents such as coralyne or nitidine.
Presently, a need exists for novel anti-cancer agents, for anti-cancer agents that exhibit improved activity, and for anti-cancer agents that exhibit fewer side-effects or improved selectivity compared to existing agents.
The present invention provides compounds that show inhibitory activity against topoisomerase I and/or topoisomerase II, and compounds that are effective cytotoxic agents against cancer cells, including drug-resistant cancer cells. Accordingly, the invention provides a compound of the invention which is a compound of formula I:
wherein
R1, R2, and R3 are each individually hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, nitro, hydroxy, NRgRh, COORk, ORm, or halo; or R1 and R2 taken together are methylenedioxy and R3 is hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, nitro, hydroxy, NRgRh, COORk, ORm, or halo; or R2 and R3 taken together are methylenedioxy and R1 is hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, nitro, hydroxy, NRgRh, COORk, ORm, or halo;
R4 is oxy, (C1-C6)alkyl, or is absent;
R5 is hydrogen, hydroxy, or (C1-C6)alkyl;
R6, R7 and R8 are each individually hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, nitro, hydroxy, NRgRh, COORk, ORm, or halo; or R6 and R7 taken together are methylenedioxy and R8 is hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, nitro, hydroxy, NRgRh, COORk, ORm, or halo; or R7 and R8 taken together are methylenedioxy and R6 is hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, nitro, hydroxy, NRgRh, C(xe2x95x90O)Rk, COORk, ORm, or halo;
each bond represented by xe2x80x94xe2x80x94xe2x80x94xe2x80x94xe2x80x94 is individually present or absent;
X is C(Ra)(Rb) or NRc;
Y is C(Rd)(Re) or NRf;
if present, Ra and Rb are each independently hydrogen or (C1-C6)alkyl if the bond between the 11- and 12-positions represented by xe2x80x94xe2x80x94xe2x80x94xe2x80x94xe2x80x94 is absent; or Ra is hydrogen or (C1-C6)alkyl and Rb is absent if the bond between the 11- and 12-positions represented by xe2x80x94xe2x80x94xe2x80x94xe2x80x94xe2x80x94 is present;
if present, Rc and Rf are each independently hydrogen or (C1-C6)alkyl if the bond between the 11- and 12-positions represented by xe2x80x94xe2x80x94xe2x80x94xe2x80x94xe2x80x94 is absent; or Rc and Rf are each independently (C1-C6)alkyl or absent if the bond between the 11- and 12-positions represented by xe2x80x94xe2x80x94xe2x80x94xe2x80x94xe2x80x94 is present;
if present, Rd and Re are each independently hydrogen or (C1-C6)alkyl if the bond between the 11- and 12-positions represented by xe2x80x94xe2x80x94xe2x80x94xe2x80x94xe2x80x94 is absent; or Rd is hydrogen or (C1-C6)alkyl and Re is absent if the bond between the 11- and 12-positions represented by xe2x80x94xe2x80x94xe2x80x94xe2x80x94xe2x80x94 is present;
each Rg and Rh is independently hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, (C1-C6)alkanoyl, aryl, aryl(C1-C6)alkyl, aryloxy, or aryl(C1-C6)alkoxy; or Rg and Rh together with the nitrogen to which they are attached are pyrrolidino, piperidino, morpholino, or thiomorpholino;
each Rk is independently hydrogen, or (C1-C6)alkyl; and
each Rm is independently (C1-C6)alkanoyl, aryl, or aryl(C1-C6)alkyl;
wherein any (C1-C6)alkyl, (C3-C6)cycloalkyl, or (C1-C6)alkoxy of R1, R2, R3, R6, R7, R8, or Rk is optionally substituted on carbon with 1, 2, or 3 substituents independently selected from hydroxy, halo, NRnRp, (C3-C6)cycloalkyl, or (C1-C6)alkoxy; wherein each Rn and Rp is independently hydrogen, (C1-C6)alkyl, (C3-C6)cycloalkyl, (C1-C6)alkoxy, or (C1-C6)alkanoyl; or Rn and Rp together with the nitrogen to which they are attached are pyrrolidino, piperidino, morpholino, or thiomorpholino;
wherein any aryl is optionally be substituted with 1, 2, or 3 substituents independently selected from hydroxy, halo, nitro, trifluoromethyl, trifluoromethoxy, carboxy, amino, (C1-C6)alkyl, (C3-C6)cycloalkyl, and (C1-C6)alkoxy;
provided that at least one of R2 and R8 is hydrogen, methyl, nitro, hydroxy, amino, fluoro or chloro; or at least one of R2 and R8 forms part of a methylenedioxy; and
provided that R1-R3 and R6-R8 are not all hydrogen;
or a pharmaceutically acceptable salt thereof.
The invention also provides a pharmaceutical composition comprising a effective amount of a compound of formula I, or a pharmaceutically acceptable salt thereof, in combination with a pharmaceutically acceptable diluent or carrier.
The invention also provides a method of inhibiting cancer cell growth, comprising administering to a mammal afflicted with cancer, an amount of a compound of formula (I), effective to inhibit the growth of said cancer cells.
The invention also provides a method comprising inhibiting cancer cell growth by contacting said cancer cell in vitro or in vivo with an amount of a compound of claim 1, effective to inhibit the growth of said cancer cell.
The invention also provides a compound of formula I for use in medical therapy (preferably for use in treating cancer, e.g. solid tumors), as well as the use of a compound of formula I for the manufacture of a medicament useful for the treatment of cancer, e.g. solid tumors.
The invention also provides processes and novel intermediates disclosed herein which are useful for preparing compounds of the invention. Some of the compounds of formula I are useful to prepare other compounds of formula I.

Abstract: wherein the R substituents and atoms X and Y are as defined in specification. The present invention also provides pharmaceutical compositions and methods of inhibiting cancer cell growth.

Rutgers, The State University of New Jersey


The present disclosure provides a developing device and method. The developing device includes the nozzle for spraying the developing liquid, the machine table for bearing the glass substrate, and the inclination controller for controlling the nozzle and the machine table to be inclined towards a predetermined direction of the machine table at a predetermined angle and keeping the inclined angle within a preset period. The method includes controlling, by the inclination controller, the machine table and the nozzle to be inclined towards a first direction of the machine table at a predetermined angle during the inclination cycle period and keeping the inclined angle within the preset period, and controlling, by the inclination controller, the machine table and the nozzle to be sequentially inclined towards other directions of the machine table at a predetermined angle according to the preset inclination direction sequence and keeping the inclined angle within the preset period.

During the production of a thin film transistor liquid crystal display (TFT-LCD), a photoresist coated on a glass substrate needs to be developed after exposure to obtain a desired pattern.
As shown in FIGS. 1 and 2, in a developing device for an advanced-generation production line, a glass substrate 3 is provided in a developing trough at a certain inclination angle (θ) relative to a machine table 1, with its inclination direction and angle being kept the same. An inclination direction and an inclination angle of a nozzle 2 for spraying a developing liquid are consistent with those of the glass substrate 3. The developing liquid contacted by the glass substrate 3 positioned at an upper portion of an inclination surface (side a-a of the glass substrate 3 in FIG. 1) during the development is new liquid sprayed via the nozzle 2, and has a constant concentration. The concentration of the developing liquid becomes low after reacting with the photoresist and flows toward a lower portion of the inclination surface (side b-b of the glass substrate 3 in FIG. 1), resulting in that the concentration of the developing liquid contacted by the glass substrate 3 at the lower portion of the inclination surface (side b-b of the glass substrate 3 in FIG. 1) is lower than that contacted by the glass substrate at the upper portion. A line width of glass inclination surface at the upper portion (i.e., side a-a) is narrower than that at the lower portion (i.e., side b-b), thereby the line width uniformity of the whole glass substrate is adversely affected; for example, line width m<line width n as shown in FIG. 3.
As shown in FIG. 4, there currently is another developing method in which the development is performed in such a way that the machine table 1 drives glass substrate 3 to rotate, but this method is not applicable to the advanced-generation production line because the glass substrate 3 for the advanced-generation production line has a particularly large size and fragments may be produced during the rotation.
Therefore, for the advanced-generation production, some film layers (such as a black matrix of a color filter substrate and respective film layers of an array substrate) require high line width uniformity, and there is a need to find a developing device, which is capable of providing better line width uniformity, for the development.

BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.


A method and apparatus for providing quality of service parameters for transmissions of multicast streams on a cable network is provided. A cable network headend connects an external network to a hybrid fiber coax or cable network. The cable network headend maintains a table of cable modems with entries associating each cable modem with one or more quality of service parameters. Virtual cable modem entries are created for multicast streams when indications of quality of service for multicast streams are received by the cable network headend. Multicast packets arriving at the cable network headend are processed using the stored quality of service parameters for the corresponding multicast stream. The multicast packets may then be transmitted, queued, or dropped depending on the specified parameters and traffic shaping or policing algorithms.

Broadly speaking, the present invention relates to providing quality of service parameters for data streams. More particularly, the present invention provides a system for implementing quality of service parameters for multicast flows at a cable network headend system. The relevant component in the present invention is the cable network headend, which interprets quality of service parameters in a multicast stream and applies them to packets transmitted onto the cable network.
Quality of service is a qualitative and quantitative set of parameters used to maximize efficiency and specify levels of service in a network. System administrators, service and content providers, among others, can effectively control network usage, reliability, and resources by specifying quality of service parameters. These parameters may include minimum unit delay, maximum unit delay, peak bandwidth, mean bandwidth, minimum bandwidth, latency, priority, jitter, response time, and burst dispersion. Quality of service can also be specified by predefined levels of service. These levels may include controlled delay (where a maximum forwarding delay is set), guaranteed service (where bit rates are predefined), and predictive service (where bit rates are guaranteed for a certain portion of the traffic). Quality of service specifications are particularly important for providing streaming video and audio while still retaining enough bandwidth for other forms of network traffic.
Data Over Cable Service Interface Specification 1.1 (DOCSIS 1.1), includes functionality that allows administrators to provide quality of service for traffic flowing into or out of a cable network and is hereby incorporated by reference for all purposes. The cable modem termination system (CMTS) and its associated routing mechanism connect cable modems to an outside network such as the Internet.
DOCSIS provides an extensive set of quality of service parameters for cable networks. These parameters include not only the ability to specify levels of service, but also provide for the ability to differentiate service for different types of traffic, such as voice or video. Since DOCSIS only provides quality of service parameters on a per cable modem basis however, these parameters are only available for unicast or point-to-point routing. For example, where one client on an external network sends a data file to a client within a cable network, DOCSIS allows the CMTS to determine what quality of service parameters should be associated with the data file packets being transmitted to the cable modem within the cable network.
FIG. 1 shows packet processing capabilities specified in DOCSIS 1.1 at a CMTS 100. A packet 103 arrives from an external network 101 such as the Internet. The CMTS 100 recognizes that the destination of the packet lies within the cable network of the CMTS 100. The CMTS 100 locates the recipient cable modem based on packet information and information stored within the CMTS 100. This packet 103 is introduced with its associated cable modem information into a classifier 109. This classifier 109 categorizes the packet based on a classifier list 111 for that particular cable modem. The classifier list 111 may categorize the packet based on criteria such as IP address, protocol type, or port number. Typically, these criteria are chosen to distinguish between different types of traffic such as telephony, web traffic, video, etc. Once the packet has been classified, the CMTS 100 assigns a flow to the packet based on the flow list 113 associated with the particular cable modem. This flow list 113 specifies groups of quality of service parameters. This packet now associated with a flow 115 has quality of service parameters that govern whether the packet should be transmitted downstream, delayed, or dropped. Various traffic shaping and policing algorithms are used in making this determination.
For many applications, it is necessary for one client to send the same information to multiple clients. Although it is possible to send the information to each of the clients point-to-point, this strategy would be a drain on network resources. For example, a unicast transmission of a data packet to a group of 1000 recipients would require periodic transmission of 1000 packets, even though many of the packets would end up traversing the same links. Broadcast transmission of the same packet to a group of 1000 recipients would work if the number of recipients was not that much smaller than the number of total clients on the network. However, in large networks with numerous subnetworks, broadcasting would be a waste of resources for all of the clients not interested in the information. Multicast transmission would be the ideal solution where a data packet needs to be transmitted to a large number of recipients who comprise a small number of total clients on the network. To send a packet to 1000 recipients, multicast transmission only requires a single packet be delivered, although the packet may be replicated at the forks in a multicast delivery tree.
Multicasting was developed to deal with the inefficiencies inherent in broadcasting or point-to-multipoint messaging. A multicast stream would be placed onto a network at a given time by a video server, for example. Although this multicast stream would reside on the network, it would not be transmitted to an end user until an individual client made a request to receive the video stream. If a cable modem user requested the multicast stream, the CMTS or its associated multicast router would seek out and retrieve the stream on the network and prepare to send the information downstream to the cable modem user.
While DOCSIS provides extensive functionality for specifying quality of service provisions for unicast or point-to-point transmissions, DOCSIS provides little or no functionality for specifying quality of service parameters for a multicast stream intended to be received by a number of clients. This shortcoming is particularly serious because both multicasting and cable are technologies that are capable of bringing true streaming video content to the end user.
DOCSIS 1.1 has no provisions for applying different quality of service parameters to different multicast streams. DOCSIS 1.1 only provides that multicast streams will be transmitted based on the best effort model of delivery. The CMTS under this best effort model of delivery essentially guarantees nothing. The CMTS makes no commitment about specific treatment of packets of a certain flow. A transmitted data stream gets what bandwidth is available. If the CMTS and its associated router are congested at the time the video stream arrives, a substantial portion of the video stream packets may be dropped. The best effort model often is sufficient for traditional data applications such as text and graphics transmissions, FTP, telnet and other uses where timeliness is not of the essence. However, new kinds of applications such as video-on-demand or video teleconferencing are highly sensitive to time delays. The traditional best effort method of increasing packet delay in order to improve fairness and correct delivery is currently incapable of reliably transmitting on-demand high bandwidth streams.
Many video content providers may wish to provide very specific video quality levels for their receivers. Video conferencing may need to specify minimum bandwidth requirements, maximum packet delays, or a host of other requirements. DOCSIS does not provide any of these capabilities for multicast transmissions cable or hybrid fiber coaxial networks. At most, DOCSIS 1.1 supports multicast transmissions using IGMP, but without any quality of service guarantees.

This patent is subject to a terminal disclaimer.

Method and apparatus for applying quality of service to multicast streams transmitted in a cable network


A system and method for coding colors and storing compensation factors used in converting colors from one color space to another color space. A color is converted from a first color space to a second color space using a color space converter. If one or more components of the second color is invalid in the second color space, a constant hue algorithm is used to create a compensated color which is valid in the second colors space. Specifically, a compensation determinator determines a compensation factor which is used in a compensation adjuster along with a constant hue algorithm to create the compensated color triplet. As a result of the constant hue algorithm, one of the color components of the compensated triplet is either zero or saturated. All except two bits of the storage space for the zero or saturated compensated color component are used to store the compensation factor. The other two bits are used to identify whether the color is zero or saturated and to identify the color component used to store the compensation factor. A color coding scheme is employed to identify valid colors from compensated colors and to identify the component used to store the compensation factor. An odd parity (and even, zero parity) is enforced across the LSBs for valid colors, and an even, non-zero parity is enforced across the LSBs for compensated colors. In addition, a value of zero for the LSB of a compensated color component identifies it as the component storing the compensation factor. In another embodiment, two bits of the alpha channel are used to code whether the color is valid, and to identify which color component in the associated triplet contains the compensation factor.

1. Field of the Invention
The present invention relates generally to displaying video and computer images, and more specifically to an improved system and method for coding colors and storing compensation factors used in converting colors of pixels from one color space to another color space and restoring thereto.
2. Related Art
An image to be displayed on a monitor or television screen is represented by a matrix of points referred to as pixels. The pixels are scanned across the monitor or screen both horizontally and vertically. Each pixel has an associated color that is typically represented by a particular set of values of three different components. The three different components used to represent the color define a color space.
The color space is a mathematical representation of a set of colors. Several color spaces are presently used in various different applications. An RGB color space represents color as levels of red (R), green (G), and blue (B). The RGB color space is generally used in color computer graphics. A YUV color space represents color as intensity (Y) and two color difference components (U, V). The YUV color space is generally used in television equipment and was developed to accommodate both black-and-white and color televisions. Other color spaces include CMYK, HSI, and HSV.
Each color space has been developed according to various industry standards. These standards define a valid range of values for each of the respective components referred to as a valid component range. These standards also define equations and coefficients to be used to convert the color of a pixel from one color space to another color space. For example, conversion between the RGB color space and the YUV color space is accomplished with a well established set of equations.
Conversion of the color between various color spaces is necessary as the lines between computer equipment and television equipment become blurred. For example, multimedia systems employing a computer system to display television images must convert the television image into an image displayable on the computer. The multimedia system must convert the television image from the YUV color space to a computer image in the RGB color space.
One problem associated with this conversion is due to the valid component ranges of the components in the respective color spaces. The valid component ranges in a particular color space can be represented as a rectangular cube in three dimensional space. Each color in the particular color space is defined by a set of three points referred to as a triplet, within the rectangular cube. A triplet having each of its components within the valid component range of the color space, and hence, within the cube of the color space, is referred to as a valid triplet. A triplet having one or more components outside the valid component range of the color space, or outside the cube of the color space, is referred to as an invalid triplet.
A cube representing the RGB color space (RGB cube) lies entirely within a cube representing the YUV color space (YUV cube). Thus, every valid RGB triplet corresponds to a valid YUV triplet. The reverse however, is not true. That is, not every valid YUV triplet corresponds to a valid RGB triplet. This is so because some valid YUV triplets lie outside the RGB cube.
One method that conventional systems have used to address invalid RGB triplets is to clip each invalid component to its maximum (or minimum) value. This method produces an undesirable color shift that, in many cases, is readily apparent to the viewer.
Another method that conventional systems have used to address invalid RGB triplets is to choose RGB values that hold luminance and hue constant and reduce saturation until the invalid RGB triplet becomes valid. This method shifts bright colors to white and dark colors to black. As a result, the overall displayed image becomes more black and white. This effect is also readily apparent to the viewer.
A second problem associated with the conversion of a color between color spaces is due to conventional systems attempting to solve the first problem. Once a conventional system has adjusted, or compensated the invalid RGB triplet to be within the valid RGB component range, the original YUV triplet can not be subsequently recovered from the compensated RGB triplet. Thus, in conventional systems, not only is some color information lost during the conversion, but conventional systems do not provide a means for recovering the lost color information.
The above referenced U.S. Patent Application by Masterson el al. addresses both the first and second problems as described above. Specifically, Masterson el al. addresses the first problem by disclosing a system and method that compensates for invalid colors in the second space by using a constant hue algorithm. This constant hue algorithm blends an invalid color in the second color space with a pure grey color resulting in a valid color in the second color space. The blending adjusts the color's saturation and luminance without affecting the color's hue.
Thus, Masterson et al. discloses a system and method for color space conversion that preserves the quality of the original image with respect to the viewer without undesirable hue shifts introduced by conventional systems.
Additionally, Masterson et al. addresses the second problem by disclosing a system and method that allows the original image to be subsequently recovered without any loss of color information. Specifically, Masterson et al. describes a system and method for storing the compensation factor that can be used to restore the original color in the first color space. Further, a method is described that allows for such storage without requiring additional and costly storage devices. More specifically, Masterson et al. discloses that the compensation factor is stored in the alpha channel.
Generally, the alpha channel is used for storing opacity information. Thus, the solution for storing the compensation factor in the alpha channel is beneficial for systems that do not ordinarily use the alpha channel for storing opacity or other information. However, when the alpha channel is being used, another means to store the compensation factor must be provided. This can be problematic because many existing systems do not have such available storage space. In addition, providing such additional storage space is costly. Accordingly what is needed is a means for storing the compensation factor that can be used in existing systems and which does not require additional and costly storage devices.

System and method for coding colors and storing compensation factors used in color space conversion


Ammunition casings are described that include a base, a body coupled to the base, and one or more patterns on the body.

Hunting is a common recreational activity, especially in rural areas. Modern guns eject the spent shells from the rifle or pistol, often automatically or with a minimal effort by the hunter, e.g., pump shotgun. Often, in the excitement of the hunt or while pursuing wounded or fallen game, the exact location of the spent shell casing is difficult to determine. This presents a number of problems. In the case of common brass cartridges, the brass decomposes very slowly and may contain other residual pollutants such as lead. Shotgun shells are often even more difficult to recover and pose a particular problem for livestock, in addition to the problems with residual pollutants. Spent, conventional shotgun shells are hard to see in the camouflage of natural hunting grounds. Even if colored, these shotgun shells are difficult to detect by hunters. If left unrecovered, the shotgun shells become a hazard for livestock, especially cattle because the animals ingest the shell. The shotgun shells and other spent ammunition is a nuisance for landowners and harmful to the environment. This problem leads to fewer landowners who are willing to permit hunting on their property, with a concomitant loss of areas for hunters to hunt in. There is a long felt need to make location of these spent cartridges more efficient. While most of the drawings depict shotgun shells, it should be appreciated that the invention also contemplates the shells of other types of guns: recovering such items reduces pollution and increases the ease of recovery for such activities as reloading.


A non-linearity compensation circuit and a bandgap reference circuit using the same for compensating non-linear effects of a reference voltage are provided. In the non-linearity compensation circuit, the reference voltage is transformed into a temperature independent current. A current mirror mirrors the temperature independent current for biasing a bipolar junction transistor (BJT). Further, two resistors are used for estimating a non-linear voltage, so as to compensate the reference voltage.

1. Field of Invention
The present invention relates to a non-linearity compensation circuit and a bandgap reference circuit using the same, and more particularly, to a non-linearity compensation circuit capable of improving the precision of a bandgap reference voltage and a bandgap reference circuit using the same.
2. Description of Related Art
Digital-to-analog converters (DACs), analog-to-digital converters (ADCs) or regulators need at least one fixed and stable reference voltage. It is preferred that the reference voltage is stably regenerated each time the power source is started. An ideal reference voltage even had better not be influenced by processing differences, changes in the operating temperature, and power source variations.
A bandgap reference circuit can be used to provide the reference voltage. Therefore, bandgap reference circuits play an important role in many electronic systems as they may determine the stability and precision of the entire systems.
FIG. 1 shows a circuit diagram of a conventional bandgap reference circuit. As shown in FIG. 1, the conventional bandgap reference circuit 100 comprises a current mirror composed of metal-oxide-semiconductor (MOS) transistors M101˜M103, operation amplifiers OP101˜OP103, resistors R101, R102, R103A and R103B, and two bipolar junction transistors (BJT) B101˜B102. The connection of various elements can be understood from FIG. 1. The resistors R103A and R103B have the same resistance.
The reference voltage VBG1 can be represented by the following equations.VBG1=0.5*(VNTC1+VPTC1)=0.5*(VBE1A+VPTC1)=0.5*(VBE1A+K1*VT)  (1)VPTC1=IPTAT1*R102=(ΔVBE/R101)*R102  (2)ΔVBE=VT*ln(n)  (3)wherein, VT represents the thermal voltage (the value is KT/q, wherein K is the Boltzmann's constant=1.28×10−23 Joules/Kelvin, T is the absolute temperature, q=1.602×10−29 Coulomb), K1 is a constant, VBE1A represents the base-emitter voltage of the BJT transistor B101, VNTC1 represents a negative temperature coefficient (NTC) voltage, VPTC1 represents a proportional to absolute temperature (PTAT) voltage, IPTAT1 is a PTAT current, and n is the size ratio of the transistor B102 to the transistor B101.
The base-emitter voltage VBE of the BJT transistors can be represented by the following equation.VBE=VG0−(VG0−VBE0)*T/T0−(η−α)*VTln(T/T0)  (4)
In equation (4), T0 represents the reference voltage, T represents the operating temperature, VBE0 represents the base-emitter voltage obtained at the reference temperature T0, VG0 is the silicon bandgap voltage at the absolute temperature of 0, η is the structural coefficient of the BJT transistors (the value is between 2 and 6), and the coefficient α is determined by the type of the biasing current of the BJT transistors. When the biasing current is a PTAT current, α=1, and when the biasing current is a temperature independent current, α=0.
As the biasing current of the transistors B101 and B102 is equal to the PTAT current, α=1. Therefore, the base-emitter voltages VBE1A and VBE1B of the transistors B101 and B102 can be respectively represented by the following equations.VBE1A=VG0−(VG0−VBE0)*T/T0−(η−1)*VTln(T/T0)  (5)VBE1B=VG0−(VG0−VBE0)*T/T0−(η−1)*VTln(T/T0)  (6)
Introduce equations (2)˜(6) into equation (1), the following equation is obtained.
                              V                      BG                                                                          1                          =                              1            2                    ×                      {                                          [                                                      V                                          BG                                                                                0                                                        -                                                            (                                                                        V                                                      BG                                                                                0                                                                          -                                                  V                                                      BE                                                                                0                                                                                )                                                                                T                                              T                        0                                                                              -                                                            (                                              η                        -                        1                                            )                                                                                V                      T                                                            ln                                                              T                                              T                        0                                                                                ]                            +                              [                                                                            R                                                                                102                                                              R                                                                                101                                                        ·                                      V                    T                                    ·                                      ln                                                              (                      n                      )                                                                      ]                                      }                                              (        7        )
In equation (7), if K2=R102/R101*ln(n), K2*VT can be used to compensate the linear term in VBE. (η−1)*VTln(T/T0) (or VTln(T/T0)) is a non-linear term in VBE. Therefore, the compensation effect of the reference voltage VBG1 is limited, and the non-linearity effect still exists.
FIG. 2 shows a concept diagram of compensation of the conventional bandgap reference circuit. FIG. 2 shows that the reference voltage VBG is the sum of K2*VT (proportional to absolute temperature) and VBE (negative temperature dependent). However, in the conventional bandgap reference circuit, VBE has a non-linearity effect. If the non-linearity effect of VBE is not well compensated, the characteristic diagram of the reference diagram presents a curve (non-ideal) phenomenon in the range of operating temperature, as shown in FIG. 3.
FIG. 3 shows that an ideal reference voltage VBG must remain stable in the range of operating temperatures, and be approximately 1.205V. The ideal VBE also must have a fine linear effect. However, the actual VBE has a non-linearity effect.
Therefore, the reference voltage resulting from adding the non-linear VBE and the linear K2*VT also presents the non-linear effect. Thus, the actual reference voltage exhibits quite a large difference in operating temperature range.
FIG. 4 shows a characteristic diagram of reference voltage VGB-temperature of the conventional art under different power source VDD (10.V˜1.5V) when the operating temperature is between −40° C. and 125° C., wherein curves A1˜E1 represent the variation curves of VGB when VDD=1.5V, VDD=1.4V, VDD=1.3V, VDD=1.2V, and VDD=1.1V respectively.
It can be seen from FIG. 4 that the reference voltage obtained in the conventional art still varies much as the conventional art cannot compensate the non-linear term in the reference voltage.
Therefore, a bandgap reference circuit for obtaining a stable reference voltage that does not vary much by compensating the non-linear term is needed.

Non-linearity compensation circuit and bandgap reference circuit using the same


A retractor for use in various types of surgical procedures such as harvesting mammary arteries, coronary bypass surgery, heart valve repairs, mitral valve replacement, partial sternotomies, and other types of surgery includes a toothed crossbar to which a pair of small grips are attached. The first grip is attached to an arm which is removably connected to a first block. The first block is movable along the crossbar, thereby permitting the first grip to be moved toward or away from the second grip. The second grip is attached to an arm which is removably connected to a second block. The second block can be fixed or movably connected to the crossbar. The crossbar includes a hinge that enables the grips to be pivoted relative to each other. Pivoting is accomplished by a pair of vertically extending brackets that are connected to the blocks and which are connected to each other by an adjustable connector. Retractor blades of various types are connected to the adjustable connector or to arm-carried rods by universal clamps. The grips can be removed and replaced with differently configured grips in order to conduct different types of surgical procedures or to conduct surgical procedures on different portions of a patient's body. The retractor according to the invention enables one portion of a patient's body to be both retracted and raised relative to an adjacent portion of the body. Such retraction provides effective access to a surgical site with minimal invasion of the body.

1. Field of the Invention
The invention relates to retractors that are used in various types of surgeries such as cardiovascular surgery and, more particularly, to a retractor that permits such operations to be conducted with minimal trauma to the patient.
2. Description of the Prior Art
In the course of such operative procedures as mitral valve surgery, it is necessary to expose the heart. Such exposure traditionally has been accomplished by performing a sternotomy (cutting an incision completely through the sternum and retracting the sternum). The retraction is accomplished by a retractor that employs parallel grips that engage the edges of the separated sternum. The grips are mounted perpendicularly to a toothed crossbar. One of the grips is fixed to one end of the crossbar, while the other grip is movably mounted to the crossbar by means of a pinion that engages the teeth of the crossbar. Upon rotating the pinion, the movable grip can be moved away from the fixed grip, thereby retracting the sternum so as to expose the heart. A retractor of the type described is shown in U.S. Pat. No. Re. 34,150, issued Dec. 29, 1992 to A. E. Santilli and D. M. Cosgrove III ("the '150 patent"), the disclosure of which is incorporated herein by reference.
After the sternum has been retracted, it is necessary to retract portions of the heart in order to expose diseased or defective parts thereof. Such retraction has been accomplished by attaching a cardiovascular retractor to one of the grips of the sternum retractor. The cardiovascular retractor, in preferred form, includes a horizontal rod to which retractor blades having elongate handles are attached by means of universal clamps. The rod is spaced above the grip a considerable distance in order to permit the blades to have access to the heart at a favorable angle. The blades can be moved so as to engage portions of the heart to be retracted. Thereafter, upon pulling the blades and locking them in place by tightening the universal clamps, the heart can be retracted in any manner desired and maintained in that position as long as necessary.
The blades in the described construction can be moved back and forth, up and down, side to side, and they can be pivoted about the longitudinal axis of the handle. Such versatility enables the device to be used for virtually any type of heart operation where retraction is required. A preferred example of the device in question is disclosed in the '150 patent.
While the retractor disclosed in the '150 patent is effective for retraction of the sternum and subsequent retraction of the heart, unfortunately the operative technique is very invasive. That is, the splitting of the sternum coupled with its retraction is an extremely traumatic procedure. The recovery time from such a procedure can be significant. Further, the patient will experience considerable pain and discomfort during the recovery process. It is possible that the trauma associated with the process can have a negative impact on the patient's recovery from the operation.
Desirably, a retractor would exist that would permit surgical procedures to be performed that are less invasive than are possible with presently available retractors. Preferably, any such retractor would be relatively small and lightweight compared with prior retractors.

Minimally invasive surgical retractor and method of operation


Disclosed is a male penis jelq exercise device of the present invention. A main body part which is furnished with a traction part, having a hollow portion into which the penis is to be inserted, for holding and pulling a side adjacent to the glans, and an elastic traction part which surrounds the penis and extends from the traction part toward the body-side of the penis shaft to come into contact with the body, thereby providing traction force for moving the glans forward; and a traction unit which is furnished with a fastening part coupled to the leg or body, a coupling part hung from the traction part of the main body part and formed as a loop, and an elastic band part connecting the coupling part and the fastening part and providing elastic force for pulling the penis.

In general, a penis is both a sexual organ of a man and a circumferential erectile tissue containing a portion of a urethra, and has a pair of cavernous bodies of the penis forming the outside thereof, one cavernous body of the urethra in the interior thereof, and a glans at a distal end thereof.
Such a penis can achieve the sexual function as a large amount of blood is introduced into the penis by psychological and physical stimuli and the cavernous bodies of the penis are expanded. However, when there is a problem in sexual lives due to the improper blood circulation and length of the penis, erectile dysfunction, and a sexual function disorder cause that hinders smooth expansion of the penis even in the case of psychological and physical stimuli, a normal sexual function can be maintained through internal medicine or surgical operations of the urology.
Further, it is preferable that the shape of the penis is formed in the lengthwise direction thereof, but in the case of a curved penis due to the curving or bending of the penis caused by a wrong sexual life or a wrong posture, a correction device that may correct the shape of the penis rather than a surgical operation is necessary.
However, a product for correction of a penis is not circulated yet. Moreover, the small size of a penis as well as the curved penis may hinder a normal sexual life, causing a psychological contraction, and men are expanding the size of their penises through an auxiliary device or a surgical operation, which cause high costs.
A conventional correction device for treating curving of a penis is disclosed in U.S. Pat. No. 7,276,040 (published on Oct. 2, 2007). The correction device is a device that is provided with fitting members on an end and an opposite end of a penis of a man to support the penis at a fixed angle to correct deflection of the penis by widening the opposite fitting members. The device is a device for only correcting the curved penis, and has no configuration or effect for overcoming a small size of the penis or premature ejaculation.
Further, German Patent No. DE166188 mentions a device for straightening a urethra, curving the penis, and treating a contractible stimulus that causes pains during urination. However, the above-described conventional technology is not provided with a device for overcoming the small size of a penis but simply precisely support the penis according to the size and length of the penis, and is used for the purpose of treatment for the curving of the penis to remove the pains during urination and has a problem of causing inconvenience to the user because it has no correction function before and after the erection of the penis.
The conventional technology has an inconvenience of always wearing two extension members, a glans accommodating member supported by the two extension members, and a base member that supports the extension members, and the everyday life of the user is inconvenient because the location and the direction of the penis are not fixed after the entire configurations are mounted.
It is essential to consistently pull the penis within a predetermined period of time to treat the small size of the glans, the extension and the curving of the penis, and it is not easy to fix or hold the glans for pulling when the size of the glans is small. In particular, because the conventional glans device for pulling cannot fix the entire glans with a uniform holding force, the penis having a small glans may be withdrawn and it is difficult to exercise in a mounting state.
A male sexual function improving traction device is disclosed in Korean Patent Application Publication No. 2016-0123896, and a penis maintaining/fixing method is disclosed in Korean Patent Application Publication No. 2011-0010714.
A penis reinforcing device is disclosed in Korean Utility Model No. 2013-0007398. The disclosed penis reinforcing device has a structure in which a ring forming member is installed in a weight and is mounted on an end of a penis.
However, according to the technical configuration, the action of the user is unnatural because the weight is fixed to the penis, and pains are caused in a mounting part during mounting of the ring forming member because the ring forming member installed in the weight is directly fixed.
According to the correction device for traction of a penis, the blood cannot circulate smoothly because a portion of the penis, which is adjacent to the glans of the penis is bound, fastened and supported, and severe pains are caused because a holding force cannot be adjusted (changed) when the penis is erected in the mounting state. Further, if the binding portion is prolonged during the erection, the penis is withdrawn from the binding portion when the penis is contracted. When the glans portion is bound not to be withdrawn, pains are caused in the binding portion.


An apparatus and method of detecting a defect in an imager die package. The method comprises the steps of exposing the imager die package to light at a first angle, exposing the imager die package to light at a second angle, outputting electrical signals based on the exposures; and determining the level at which a defect is present based on the output electrical signals. An exemplary embodiment of the apparatus comprises a first light source positioned over an imager die package at a first angle, a second light source over the imager die package at a second angle, said first and second angles being different from each other; and a processor for determining a level of defection in the die package.

Integrated circuits, including dies, for example, imager dies such as charge-coupled-devices (CCD) and complementary metal oxide semiconductor (CMOS) dies, have commonly been used in photo-imaging applications.
Imager dies, such as the CMOS imager die, typically contain thousands of pixels in a pixel array to be used in a single chip. Pixels convert light into an electrical signal that can then be stored and recalled by an electrical device such as, for example, a processor. The electrical signals that are stored may be recalled to produce an image on, for example, a computer screen.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630, U.S. Pat. No. 6,376,868, U.S. Pat. No. 6,310,366, U.S. Pat. No. 6,326,652, U.S. Pat. No. 6,204,524, and U.S. Pat. No. 6,333,205, all of which are assigned to Micron Technology, Inc. The disclosures of each of the forgoing patents are hereby incorporated by reference in their entirety.
FIG. 1 illustrates a block diagram of an imager die 110 having a CMOS imager device 108 formed therein. The CMOS imager device 108 has a pixel array 114 that comprises a plurality of pixels arranged in a predetermined number of columns and rows. The pixel cells of each row in pixel array 114 are all turned on at the same time by a row select line (not shown), and the pixel cells of each column are selectively output by respective column select lines (not shown). A plurality of row and column lines are provided for the entire pixel array 114. The row lines are selectively activated in sequence by a row driver 101 in response to a row address decoder 102. The column select lines are selectively activated in sequence for each row activation by a column driver 103 in response to a column address decoder 104. The CMOS imager device 108 is operated by a control circuit 105, which controls the address decoders 102, 104 for selecting the appropriate row and column lines for pixel readout, and row and column driver circuitry 101, 103 to apply driving voltage to the drive transistors of the selected row and column lines.
Output signals typically include a pixel reset signal Vrst, taken from a charge storage node after the pixel is reset, and a pixel image signal Vsig, which is taken from the charge storage node after charges generated by an image are transferred to the node. The Vrst and Vsig signals are read by a sample and hold circuit 106 and are subtracted by a differential amplifier 107, which produces a difference signal (Vrst−Vsig) for each pixel cell that represents the amount of light impinging on the pixels. This difference signal is digitized by an analog-to-digital converter 109. The digitized difference signals are then fed to an image processor 111 to form and output a digital image. In addition, as depicted in FIG. 1, the imager die 110, and, thus, CMOS imager device 108, may be included on a single semiconductor chip.
Imager dies, e.g., imager die 110, are typically packaged and inserted into imaging devices such as, for example, a digital camera. FIG. 2 illustrates a cross-sectional view of one conventional imager die package 100. The illustrated package 100 includes the imager die 110 positioned on a substrate 112. As discussed above, the imager die 110 has an imager device 108 (FIG. 1) having a pixel array 114 formed therein. In the package 100, the imager die 110 typically has a transparent element 116 over the pixel array 114. The transparent element 116 is typically attached to the imager die 110 by an adhesive material 118, or any other material that can support the transparent element 116 over the pixel array 114.
In operation, light radiation enters the transparent element 116 of the imager die package 100. The transparent element 116 filters out IR radiation that can cause color shifts in the pixel array 114. Light radiation is then adsorbed, and image signals are created by the pixel array 114, which converts the photons from light radiation to electrical signals, as discussed above with respect to FIG. 1. Wire bonds 122 conduct electrical output signals from the imager die 110 to wiring on the substrate 112, which, in turn, connects to external circuitry.
In displaying an acquired image, a display structure, for example, a computer screen, will display a complete image only if the complete image is captured by the pixel array 114. For example, if the pixel array 114 were subjected to white light from a light source 130 (FIG. 5), the expected display image would be an all white image. If the pixel array 114 is unable to capture the entire image, however, an incomplete display image 300, illustrated in FIG. 3, will be displayed on a computer screen. The illustrated display image 300 appears to have a completely white surface with a "hole" or defect 124 created by the failure to capture the complete image (in this case, a white light) from the pixel array 114. For the sake of clarity, only a portion of the full image having the defect 124 has been illustrated, and has been magnified for illustrative purposes.
The defect 124 may be a result of two separate and distinct causes. One possible reason for the defect 124 is that the pixel array contains one or more non-functional pixels (i.e., the array is defective). A top-down view of a section 400 of a pixel array having a defective pixel is illustrated in FIG. 4. The illustrated section 400 has a single non-functional pixel 126. The non-functional pixel 126 may receive light, but may not be able to convert the light into an electrical signal that can be stored and recalled as described above with respect to FIG. 1, resulting in a defect 124 (FIG. 3).
Imager die packages having non-functional pixels 126 will likely be segregated into groups by the manufacturer, depending on the number of non-functional pixels each package contains. These groups of packages, can be salvaged and used for various applications, or, if necessary, can be discarded completely. For example, the imager die package 100 (FIG. 1) having the non-functional pixel 126 could be used in applications that do not require the highest resolution, and would likely not be used in high-end applications such as, for example, professional photography equipment. Alternatively, the imager die package 100 could be discarded altogether if it contains a significant number of non-functional pixels.
A second reason for the image defect 124 (FIG. 3) may be related to particulate contamination of the transparent element 116 (FIG. 2). FIG. 5, for example, illustrates a particle 128 present on the transparent element 116. The particle 128 may have resulted from the fabrication processing of the imager die 110. During testing or operation of the imager die package 100, the particle 128 prevents light from the light source 130 from reaching the corresponding pixel (represented by the "X") of pixel array 114, resulting in the defect 124 illustrated in FIG. 3.
Unlike the imager die having a non-functional pixel 126 (FIG. 4), the imager die 110 of FIG. 5 is fully functional. The output of electrical signals by the fully functional pixel array will, nevertheless, result in a display image similar to the display image 300 illustrated in FIG. 3. Because the particle 128 causes the fully functional array to produce a defective output image, the fully functional pixel array will be segregated into the groups of dysfunctional arrays discussed above that may be salvaged and used in low-end applications, or discarded altogether. Discarding fully functional pixel arrays results in lower yield, and increases the overall costs of production.
Accordingly, there is a need and desire for a method and apparatus for testing the quality of an imager die package, and determining the level at which the defect is present.

Method and apparatus for imager die package quality testing


Embodiments of the invention relate to transactional memory execution utilizing virtual memory. A processor includes a local transactional cache and a resource manager. The resource manager responsive to a transactional memory transaction request from a requesting thread determines whether the local transactional cache is capable of accommodating the transactional memory transaction request and, if so, the local transactional caches performs the transactional memory transaction. However, if the local transactional cache is not capable of accommodating the transactional memory transaction request, data for the transactional memory transaction request is overflowed into an application's virtual address space associated with the requesting thread.

1. Field
Embodiments of the invention relate to the field of transactional memory and transactional execution. More particularly, embodiments of the invention relate to enabling transactional memory execution utilizing virtual memory with and without hardware support.
2. Description of Related Art
Transactional memory execution allows applications, programs, modules, etc., and more particularly, application program interfaces (APIs), to access a database file or another type of memory file in an atomic manner. For example, transactional memory may be used a part of a run-time engine for managing persistent, pointer-rich data structures, such as databases, and directory services.
An API may be thought of as a language or message format used by an application, program, module, etc., to communicate with a system program such as an operating system or a database management system (DBMS). APIs may be implemented by writing function calls in a program, which provide the linkage to a specific sub-routine for execution.
Transactional memory makes it easier to write parallel programs and the use of transactional memory allows for different threads to be processed simultaneously thereby gaining extremely high processing efficiencies.
Transactional memory is typically thought of as being derived from database transactions. Generally, a transaction is a group of operations that must satisfy four properties referred to as ACID properties (atomicity, consistency, isolation, and durability). The first ACID property is atomicity. Atomicity requires that a transaction is performed in all-or-nothing manner. The transaction may be aborted either because the program aborts or due to an error. Atomicity requires that either all of the operations of the transaction be performed or none of them be performed. The second ACID property is consistency. Consistency requires that if the database is in a consistent state before the transaction is performed, the database should be left in a consistent state. The third ACID property is isolation. The isolation property states that all transactions performed have to appear to be done in some sort of serial order (i.e. they should be serializable). The last and fourth property required to be under ACID is durability. Durability requires a transaction to survive a machine crash. That is, a transaction has to be written to a stable storage device (e.g. a disk) before it can be committed.
Transactional memory and transactional execution allow a multi-threaded application to be written in a robust and high-performance manner. This becomes more important as computer systems, such as desktops and servers, are increasingly being required to operate in heavily-threaded environments. Particularly, the speculative execution support of modern processors can be utilized to execute blocks of code speculatively to implement these multi-threaded applications efficiently. However, present techniques that implement transactional memory and transactional execution suffer from resource limitations in that they cannot handle arbitrary sized transactions or transactions of arbitrary lengths thereby placing tremendous constraints on both programming and transactional execution.

Transactional memory execution utilizing virtual memory


A lift assist system for cargo door ramps of trucks and trailers which includes one or more torsion arms that are housed in a tubular housing assembly attached at the pivotal axis of the door ramps. The housing assembly includes left and right door hinges and at least one center door hinge. Tubular housing members which house the torsion bars extend between the door hinges.

There are numerous vehicles that are used to haul cargo ranging from commercial fleets of trucks, step vans, panel trucks and the like to do-it-yourself rental trucks that consumers can rent to move or haul various items. In addition there are various types of trailers that are used to haul cargo ranging from semi trailers, to trailers that are used to haul recreational vehicles such as snowmobiles, all terrain vehicles (ATV), person watercraft, motorcycles and the like.
In many instances a ramp is used to load and unload cargo from such vehicles and trailers. Removable ramps are common and are either stored within the cargo compartment of the vehicle or trailed and unload for use and loaded after use. Some vehicles provide for ramps that are stored under the cargo compartment. In other instances, the rear or cargo door of the vehicles and trailers can be pivoted downward and used as a ramp; however, it can be difficult, especially in the case of large, heavy cargo doors, for an individual to lift the cargo door back into its closed position.
Lift assist systems have been developed extensively for pickup truck tailgates as exemplified by U.S. Pat. No. 3,336,070 to Jackson, U.S. Pat. No. 4,143,904 to Cooper et al., U.S. Pat. No. 5,358,301 to Konchan et al., U.S. Pat. No. 5,988,724 to Wolda, U.S. Pat. No. 6,637,796 to Westerdale et al., U.S. Pat. No. 6,769,729 to Bruford et al., U.S. Pat. No. 6,793,263 to Bruford et al., U.S. Pat. No. 6,796,592 to Austin, U.S. Pat. No. 6,846,030 to Koehler et al., U.S. Pat. No. 6,874,837 to Bruford et al., and U.S. Pat. No. 6,905,156 to Miller et al. and U.S. Patent Application Publication Nos. 2004/0178651 to Austin and 2005/0194808 to Austin.
Lift assist systems that have been designed and developed for pickup tailgates are generally not suitable or adaptable for used in conjunction with ramps that are used in conjunction with cargo vehicles and trailers. In this regard, pickup truck tailgates are generally hollow which allows for the lift assist systems to be housed therein, dimensionally constrained only by the cavity within the hollow tailgates. In addition, pickup tailgates are relatively short, perhaps being only about two feet tall so there is not much of a moment arm about the axis of pivot of a tailgate. Also, pickup truck tailgates are only pivoted about 90 degrees between a vertical position and a horizontal position (in which they are supported by various linkage brackets).
The present invention provides for lift assist systems for use with door ramps of trucks and trailers which allows the free end of the door ramps of such vehicles and trailers to move assisted between a vertical position and an inclined position between which positions the door ramps pivots through a obtuse angle of greater than 90 degrees so that the free end of the door ramp rests on the ground.


Circuits and methods to turn-on a power MOSFET switch while limiting rush current delivered to a load are disclosed. In an exemplary embodiment, a sense circuit senses when the power MOSFET is enhanced by a first level and a second level. A control circuit controls application of three drive forces to the gate of the power MOSFET in response to the sense circuit. The first drive force adjusts the voltage applied to the gate at a first rate. The second drive force adjusts the voltage applied to the gate at a second rate less than the first rate. The third drive force adjusts the voltage applied to the gate at a third rate greater than the second rate. The circuit utilizes most of the allotted turn-on time to linearly control the power MOSFET enhancement, providing optimal slew rate control and limiting the rush current delivered to the load.

Many applications deliver power to electrical systems, or loads, through power MOSFET switches. Often, a single power source drives several loads, each with its own power MOSFET switch. If one power MOSFET is switched on quickly, the change in voltage combined with the typically low on-resistance of the power MOSFET can cause a large current surge, called a xe2x80x9crush current,xe2x80x9d to flow through the power MOSFET to the load. The rush current can cause voltage fluctuations and possibly trigger malfunction of the load circuits. In particular, fluctuations in the power source voltage can cause other load circuits to turn off in response to under-voltage lock-out protection schemes. Thus, minimizing the rush current is important for reliable operation of the load circuits.
Most prior art designs focus on incorporating protection circuits in the loads to handle the rush current generated during switching. It is more efficient and more desirable, however, to reduce the generated rush current and prevent a high current from reaching the loads at all. One way to minimize the rush current, is to gradually increase the power delivery capability of the power MOSFET switch over a finite turn-on time.
FIG. 1a is a circuit diagram of a prior art circuit 100 to control power MOSFET rush current. A p-type power MOSFET 105 has a drain labeled VOUT, a source labeled VIN, a gate 130, and a body. As is common in power MOSFETs, the source and body are shorted together to prevent the parasitic bipolar junction transistor inherent in power MOSFET 105 from turning on. A first resistor 115 is coupled between gate 130 and the source of power MOSFET 105. A capacitor 125 is coupled between gate 130 and the drain of power MOSFET 105. The drain of an n-type control MOSFET 110 is coupled to gate 130 of power MOSFET 105. A control signal is applied to a gate, labeled ON/OFF, of control MOSFET 110. A second resistor 120 is coupled between the source of control MOSFET 110 and ground, labeled GND. In circuit 100, a power source (not shown) is applied at VIN, and a load (not shown) is driven by VOUT.
When the control signal is ON, a xe2x80x9chighxe2x80x9d voltage, for example 5V, is applied to the gate of control MOSFET 110, thereby turning control MOSFET 110 on and allowing it to conduct current. When the control signal is OFF, a xe2x80x9clowxe2x80x9d voltage, for example 0V, is applied to the gate of control MOSFET 110, thereby turning control MOSFET 110 off and prohibiting it from conducting current.
In the off state of power MOSFET 105, the control signal applied at the gate of control MOSFET 110 is low (OFF), and control MOSFET 110 is off. Since no current flows through control MOSFET 110, the voltage at gate 130 of power MOSFET 105 is equal to VIN, the power source voltage, which may be, for example, 5V. The voltage across capacitor 125 is |VINxe2x88x92VOUT|.
When the control signal at the gate of control MOSFET 110 is turned ON (high), control MOSFET 110 turns on and begins to conduct current. Current flows along the path from VIN through resistor 115, through control MOSFET 110, and through resistor 120 to GND. The voltage on gate 130 of power MOSFET 105 begins to decrease slowly since it is limited by charging of capacitor 125.
FIG. 1b is a gate voltage vs. time plot for power MOSFET 105 of prior art circuit 100 of FIG. 1a. The plot shows a gate voltage curve 150 at gate 130 of power MOSFET 105 during a finite turn-on time, for example, 1.6 ms. At t=0 ms, the voltage at gate 130 is VIN, i.e. 5V. As shown in the plot, the voltage at gate 130 of power MOSFET 105 decreases slowly in an initial stage 152.
Power MOSFET 105 begins to turn on when the gate 130 to source (VIN) voltage drops below the threshold voltage of power MOSFET 105. For example, if the threshold voltage of power MOSFET 105 is VT=xe2x88x921V, power MOSFET 105 begins toturn when the voltage at gate 130 reaches 4V for VIN=5V which is shortly before t=0.2 ms in FIG. 1b. Initial stage 152 of the voltage decrease at gate 130 is a xe2x80x9cdead timexe2x80x9d in the finite turn-on time since power MOSFET 105 is not conducting.
The voltage on gate 130 of power MOSFET 105 continues to decrease through a middle stage 154 as shown in FIG. 1b. During this time, the on-resistance of power MOSFET 105 decreases nonlinearly. When the gate 130 to source (VIN) voltage reaches twice the threshold voltage of power MOSFET 105, power MOSFET 105 is essentially fully on. This occurs, for example, when the voltage at gate 130 reaches 3V, for VIN=5V and VT=xe2x88x921V, which is near t=0.6 ms in FIG. 1b.
After this point, the voltage at gate 130 decreases through a final stage 156, as shown in FIG. 1b, until the maximum drive on power MOSFET 105 is reached when the voltage at gate 130 is approximately 0V at the end of the finite turn-on time at t=1.6 ms. This is accomplished by having the resistance of resistor 115 be much larger than the resistance of resistor 120. The time to reach maximum drive is approximately t=1 ms in this example. During this time, the on resistance of power MOSFET 105 changes very little and is non-linear. Thus, the load driven by VOUT is supplied with the power source voltage VIN.
FIG. 1c is a current vs. time plot showing the current through power MOSFET 105 of prior art circuit 100 of FIG. 1a. A current curve 180 has two notable features. A rush current 182 flows which is much higher than the level of a final current 186. Rush current 182 supplies the initial current to charge capacitor 125.
When the control signal at the gate of control MOSFET 110 is turned OFF (low), control MOSFET 110 stops conducting current. The voltage at gate 130 of power MOSFET 105 discharges through resistor 115 and capacitor 125.
The goal of prior art circuit 100 is to apply a constant force to gate 130 of power MOSFET 105 in order to control the rush current. Prior art circuit 100, however, has several disadvantages. First, circuit 100 has a fairly large dead time before power MOSFET 105 turns on and begins conducting. Second, circuit 100 requires a fairly large time to reach maximum drive (i.e. when the voltage on gate 130 reaches 0V) after power MOSFET 105 turns on. Third, when control MOSFET 110 is turned on, circuit 100 conducts a large quiescent current thus dissipating high power. Fourth, when control MOSFET 110 is turned off, circuit 100 requires a long time before the voltage at gate 130 rises again to VIN.
The slow rates of change of the voltage on gate 130 to one threshold and then to maximum drive are undesirable, since they do not provide optimal rush current control. Prior art circuits using this constant driving force technique must compromise between turn-on time and driving force, resulting in non-optimal rush current control.
Thus, there is a clear need for a circuit that can optimize the drive force applied to the gate of a power MOSFET switch to minimize rush current delivered to a load through the power MOSFET.
The present invention describes circuits and methods to limit rush current delivered from a power source to a load though a power MOSFET switch. The power MOSFET may be either a p-type power MOSFET or an n-type power MOSFET. In an exemplary circuit arrangement, the power source has a power terminal and a ground terminal. A first terminal of the power MOSFET is coupled to one of the power source terminals. The load is coupled to a second terminal of the power MOSFET.
The circuit arrangement also includes a control circuit including at least three inputs, the first of which is an enable signal, and at least three outputs. The control circuit is adapted to control the drive force applied to the power MOSFET gate, based on the inputs to the control circuit, to control the turn-on of the power MOSFET and to limit the rush current through the power MOSFET.
The circuit arrangement also includes a sense circuit with at least an input coupled to the gate of the power MOSFET, a first output coupled to the second input of the control circuit, and a second output coupled to the third input of the control circuit. The sense circuit is adapted to sense when the power MOSFET has been enhanced by a first level and by a second level.
The circuit arrangement also includes an off circuit with an input coupled to the third output of the control circuit and an output coupled to the gate of the power MOSFET. The off circuit is adapted to turn the power MOSFET off when necessary.
The circuit arrangement also includes a first drive circuit with an input coupled to the first output of the control circuit and an output coupled to the gate of the power MOSFET. The first drive circuit is adapted to adjust the voltage applied to the gate of the power MOSFET at a first rate.
The circuit arrangement also includes a second drive circuit with an output coupled to the gate of the power MOSFET. The second drive circuit is adapted to adjust the voltage applied to the gate of the power MOSFET at a second rate that is less than the first rate.
The circuit arrangement also includes a third drive circuit with an input coupled to the second output of the control circuit and an output coupled to the gate of the power MOSFET. The third drive circuit is adapted to adjust the voltage applied to the gate of the power MOSFET to a maximum level allowable by the power source at a third rate that is greater than the second rate.
In an exemplary method to control the rush current in a power MOSFET switch, the power MOSFET, including a gate terminal, is provided to act as a switch between a power source and a load. In the off-state of an enable signal, the power MOSFET is turned off so that the load is isolated. In the on-state of the enable signal, the enhancement of the power MOSFET is sensed to control the application of three drive forces to the gate terminal of the power MOSFET to turn the power MOSFET on in a finite turn-on time.
A first drive force is applied to the gate terminal of the power MOSFET. The first drive force is adapted to adjust the voltage applied to the gate terminal of the power MOSFET at a first rate until the power MOSFET has been enhanced by a first level. A second drive force is applied to the gate terminal of the power MOSFET. The second drive force is adapted to adjust the voltage applied to the gate terminal of the power MOSFET at a second rate that is less than the first rate, until the power MOSFET has been enhanced by a second level. The second drive force is further adapted to limit the rush current delivered to the load through the power MOSFET. A third drive force is applied to the gate terminal of the power MOSFET. The third drive force is adapted to adjust the voltage applied to the gate terminal of the power MOSFET at a third rate that is greater than the second rate so that the power MOSFET is enhanced by the maximum allowed by the power source.
Thus, the present invention describes circuits and methods to sense the enhancement of the power MOSFET switch and allow application of different drive forces to the power MOSFET gate during different stages of turn-on. Compared to prior art solutions, the turn-on scheme of the present invention best satisfies the requirements of the slew rate control and minimizes the rush current delivered from the power source through the power MOSFET to the load during turn-on.

Multiple-stage control circuit to control rush current in a MOSFET load switch


A system for turning off a synchronous rectifier (SR) based on a primary switch (PS) turn-on detection in a flyback converter having a primary-side and a secondary-side is disclosed. The system comprises the PS on the primary-side, the SR on the secondary-side, a spike detector, and a SR controller. The SR is configured to produce a drain-to-source voltage (VDS). The spike detector is in signal communication with an output capacitor (Cout) on the secondary-side and the spike detector is configured to detect a voltage spike of an output voltage (VOut) across the Cout that is indicative of the PS being turned-on. The SR controller is in signal communication with the SR and the spike detector and the SR controller is configured to turn-off the SR based on the spike detector detecting the voltage spike of the VOut.

Isolated converters such as flyback converters are commonly used in modern power supplies and utilized in both alternating current (AC) to direct current (DC) and DC to DC conversion with galvanic isolation between the input and any outputs of a power supply. In general, a flyback converter with synchronous rectification has a primary-side and secondary-side, where the primary-side of the flyback converter includes a primary-side power switch transistor (generally known as a "PS" transistor) and the secondary-side includes a synchronous rectifier transistor (generally known as an "SR" transistor).
A controller regulates the switching of the PS transistor over successive power cycles to regulate the output voltage (VOut) of the flyback converter. The PS transistor is in series with a primary winding of a transformer so that when the PS transistor is switched on, a primary current builds up magnetic energy in the transformer. An example flyback converter 100 is shown in FIG. 1. The flyback converter 100 includes a transformer 102 that divides the flyback converter 100 into a primary-side circuit 104 and secondary-side circuit 106. The transformer 102 also includes a transformer core 108 and primary-winding 110 and secondary-winding 112. In this example, the transformer 102 is modeled as including the transformer core 108, the primary-winding 110, secondary-winding 112, a magnetizing inductance (LM), a primary-side leakage inductance (Llk-p), and a secondary-side leakage inductance (Llk-s). The primary-side circuit 104 includes a PS transistor, a primary-side controller (PSC) 114, and a sensing resistor (RSense) between a source of the PS transistor and a primary-side ground (GNDP). The secondary-side circuit 106 includes an SR transistor, an output capacitor (Cout), and an SR controller (SRC) 116.
During continuous conduction mode (CCM) operation, there is no dead time between a cycling off of the SR transistor and a cycling on of the PS transistor. A secondary-winding current (ISEC) may thus still be conducting while a primary-winding current (IPRI) begins conducting. This simultaneous on-time for the SR and PS transistors is undesirable as it wastes power and can damage flyback converter 100. This problem may be better appreciated with reference to FIGS. 2A-2E, which illustrate operating waveforms of flyback converter 100 during CCM operation. FIG. 2A illustrates the primary-winding current IPRI waveform. FIG. 2B illustrates the secondary-winding current ISEC waveform. Waveforms for an on-state SPRI for the PS transistor and an on-state SSEC for the SR transistor are shown in FIG. 2C and FIG. 2D, respectively. A drain-to-source voltage VDS waveform for the SR transistor is shown in FIG. 2E.
To detect the switching on of the PS transistor so that the SR transistor may be switched off, it is conventional to determine when the VDS voltage crosses a turn-off threshold voltage. But note that the drain-to-source resistance Rdson while the SR transistor conducts is relatively small. The VDS voltage may thus not cross the turn-off threshold voltage until a relatively-large amount of secondary-winding current ISEC had begun conducting. In particular, it may be seen that during a simultaneous on-time 200 in a first switching cycle and a simultaneous on-time 202 in a second switching cycle, the primary-winding current IPRI increases quickly at a very high slew rate 204. Similarly, the secondary-winding current ISEC decreases quickly also at a very high slew rates 208. It can be shown that this increased slew rate 208 for the secondary-winding current ISEC is a function of the leakage inductances Llk-p and Llk-s being significantly smaller than the magnetizing inductance LM. Unfortunately, the energy associated with this change in the secondary-winding current ISEC is not transferred to a load (not shown). This results in losses for the flyback converter 100. Furthermore, if the SR transistor turns OFF too late, the currents IPRI and/or ISEC may exceed the maximum rating of the components of the flyback converter 100, thereby causing damage.
There is thus a need in the art to determine an improved SR transistor switching timing for CCM operation.

System for turning off a synchronous rectifier based on a primary switch turn-on detection


The anchoring rod for anchoring an article to a base using a compounded mass including a synthetic resin, has a threaded portion at its rear end for fixing the article; a threaded nut engagable on the threaded portion for applying a mounting torque; a head having a shoulder facing toward the rear end, an outer surface tapering towards the front end of the anchoring rod and having a wedge-like tip at the front end; a conical portion connecting the head and the threaded portion and tapering toward the head; and a resilient annular washer bearing on the shoulder of the head.

The invention relates to an anchoring rod used for anchoring an article on a base by drilling a hole in the base, inserting a compounded mass including a synthetic resin and the anchoring rod into the drilled hole.
This type of anchoring rod is known and has a head at a front end inserted in the drilled hole and a threaded portion on a rear end protruding from the hole for fixing the article to the rear end of the anchored anchoring rod.
To anchor an anchoring rod using a compounded mass, first a drilled blind hole is made in the base, the diameter of the hole being somewhat larger than the outer diameter of the anchoring rod. A glass capsule that contains the compounded mass including a synthetic resin, a hardener and additives is then inserted into the drilled hole. The capsule is crushed by insertion of the anchoring rod clamped in a drilling machine and the components of the compounded mass are activated by mixing. Once the compounded mass has hardened, the anchoring rod is firmly bonded and anchored in the drilled hole. The anchoring is based essentially on the adhesive bond between the compounded mass and the wall of the drilled hole. This bond is considerably weakened, however, when a crack runs through the location of the anchor. The compounded mass becomes detached at the wall of the drilled hole because of the drilled hole enlarging as a consequence of the crack so that only negligible holding forces remain.
Therefore DE-OS 35 16 866 describes an anchoring rod for use with synthetic resin which is provided at its front end with a head that is positionable in the vicinity of an undercut in the drilled hole as the anchoring rod is anchored. A positive engagement is thereby achieved in the region of the undercut, which enables tensile forces to be tolerated, even when a crack develops. The pull-out force, however, is largely based on the positive engagement in the undercut, so that in cracked concrete there is a considerable decline in the performance of the anchor. Furthermore, this known process requires a drilled hole with an undercut, the preparation of which requires special drilling tools.
EP-A-O 352 226 describes an anchoring means for anchoring in a cylindrical drilled hole including an anchoring rod provided with an end having an expansible cone. A parting agent is applied to the head and the shank of the anchoring rod which is intended to prevent the compounded mass from adhering to the anchoring rod. When a crack in the base occurs, the mortar compound becomes detached from the anchoring rod so that the bond between the mortar mass and the wall of the drilled hole is maintained. Subsequent slipping of the head of the anchoring rod provided with the expansible cone is intended to compensate for enlargement of the internal bore of the hardened mortar plug. When the anchoring rod is stressed, however, expansion forces are generated by the expansible cone expanding in the direction of the bottom of the drilled hole, which is precisely what is to be avoided in anchorings with composite anchors. Furthermore, there is a danger that the parting layer will be rubbed off or damaged as the composite anchor is driven in so that the desirable effect of subsequent slipping does not occur.

Anchoring rod for anchoring an article to a base using a synthetic resin

fischerwerke Artur Fischer GmbH & Co., KG