A dimension measuring apparatus used for measuring a dimension of a semiconductor device having a first pattern of repeated structure and a second pattern that is linear and formed on the first pattern to extend over the repeated structure. The invention includes a shape information acquisition unit which acquires information on a shape of the first pattern; a width value acquisition unit which acquires a width value of each portion of the second pattern; an analytic area setting unit, which sets a plurality of analytic areas on the second pattern; and a dimension determining unit, which extracts, for each of the set analytic areas, width values of portions included in the analytic area, and uses the extracted width values to determine a dimension of the second pattern at portions overlapping the first pattern.

The present invention relates to a technique of measuring a dimension of a semiconductor device, for example, a dimension of a gate electrode on an activation region.
Recently, the size of a semiconductor device is becoming more miniaturized, and the dimension accuracy is required more strictly so that a gate electrode of 0.1 μm or less should be processed to have the dimensional accuracy of 10% or less. For example, the size of a gate electrode is one of main factors that determine operating characteristics of a semiconductor device, and it is particularly necessary to control the dimension of a gate electrode on an activation region. In manufacturing process, the dimension of a gate electrode varies being affected not only by a gate electrode fabrication process but also by the film thickness of the gate electrode and processes performed before the gate electrode fabrication process, such as a process affecting the dimension of a resist pattern used as a mask at the time of the processing of the gate electrode. As a result, even if a gate electrode is fabricated according to the same fabrication process under the same processing conditions, the finished dimension of the fabricated gate electrode does not become a constant value owing to accumulation of minute variations in those processes. For example, for the target value of 90 nm of a finished dimension of a fabricated gate electrode, there arises variation of the finished dimension in the range of about 10 nm at 3σ. This will cause worsening of dimensional accuracy, and eventually productivity will be lowered. Thus, control of a gate electrode dimension is indispensable technique in manufacturing process of a semiconductor device.
In manufacturing process of a semiconductor device, dimensions of gate electrodes in a wafer are measured. When measuring results miss a control value, the wafer is discarded or subjected to, for example, reprocessing in order to improve the yield and productivity. Recently, introduction of process control using such measured values is promoted. For example, Patent Document 1 shows a method of modifying processing conditions of control processes. In the method disclosed in Patent Document 1, a first process is performed on a semiconductor wafer to acquire integrated measured data relating to the process, and then, at least one error is specified from the integrated measured data, and an adjustment process for a second process is performed in order to compensate the error.
Another example is shown in Patent Document 2. Patent Document 2 includes a step in which a work-piece is processed and a step in which a transistor model is used for outputting feature parameters from measured feature parameters. Further, the method disclosed in the Patent Document 2 uses a step in which the output step is used to predict a wafer electrical test, a step in which a defective process is detected on the basis of the predicted values, and a step in which the defective process is corrected. Further, Patent Document 3 describes a method in which a dimension of an element isolation region is controlled by feed-forward. Patent Document 3 discloses a method in which a model formula for a surface step between an element isolation region and an activation region is generated. The model formula based on data of film thickness measured after Chemical Mechanical Polishing (CMP) is used for controlling the surface step to be constant by controlling the length of time of a cleaning process for removing a buried oxide film.
When such process control is performed, the accuracy of measurement results and improvement of throughput become important factors for the accuracy of the process control.
On the other hand, in recent lithographic techniques, the wavelength of a light source becomes shorter in order to cope with miniaturization of line-width, and, in association with this, resist material is changed. Particularly, as shown in Non-patent Document 1, line-width variation called Line Edge Roughness (LER) is obvious in the case of a resist material adapted for ArF excimer laser having the light source wavelength 193 nm (hereinafter, referred to as ArF resist). The variation of the line-width is about 6 nm at 3σ. Accordingly, in measuring a dimension of line-width, there is a problem that measurements of line-width at different places of the same line lead to different measurements. Thus, there is a problem that dimension measurement accuracy becomes worse in a dimensional inspection process of a semiconductor device manufacturing process using a resist pattern of a large LER. On the other hand, a method that can measure a minute pattern of line-width 0.1 μm or less with high accuracy and at a high speed is required.
Under these conditions, some methods of measuring line-width are proposed. One of them is a line-width measuring method using a Critical Dimension-Scanning Electron Microscope (CD-SEM), which is used most widely today. The characteristic of a CD-SEM is that it uses an electron beam so that it can obtain a high-resolution image even if line-width is 0.1 μm or less and it can measure any measuring object. Further, it is known that generally ArF resist shrinks by irradiation of an electron beam, and the shrinkage depends on the exposure dose. However, the latest model of CD-SEM has a function of automatizing measurement to reduce shrinkage to the minimum for each measuring object and a function (Rectangular Scan) of widening intervals of electron beam scanning to reduce the shrinkage. By changing electron beam scanning intervals, the Rectangular Scan function can obtain an image whose longitudinal magnification and lateral magnification are different from each other. This line-width measuring method using a CD-SEM is relatively fast, and can measure any measuring object with high accuracy. A CD-SEM performs processing in which a thus-obtained image of a wiring pattern is used for detecting many edge points of both ends of wiring on the basis of a contrast profile of the image and defines an average value of distances between edges as a dimension of the wiring. In this measurement, the longer the measured area is, the more the variation in measurements owing to LER can be reduced. Thus, the measuring method using a CD-SEM can measure an object with very high accuracy since it uses an electron beam.
As another method, there is a method using the scatterometry as shown in Non-patent Document 2. This method obtains optical interference waveform from patterns arranged to show a pitch over an area of 50 μm square or more. In this method, line-width is measured by comparing an interference waveform obtained by simulation using a structure model of the measuring object with an actually-obtained interference waveform. As a characteristic of this line-width measuring method using the scatterometry, it can relatively rapidly measure limited patterns such as the above-described ones that have simple structure for simulation and are arranged to show a pitch over an area of 50 μm square or more.
As another method, there is a line-width measuring method using a Critical Dimension-Atomic Force Microscope (CD-AFM) as shown in Non-patent Document 3. To measure a line-width, this method uses a minute probe to perform three-dimensional measurement of a measuring object directly. Since a measuring object is directly measured, the three-dimensional structure of the measuring object can be grasped. Further, its measurement accuracy largely depends on the size of a measuring object and the shape and dimension of the probe. Thus, as described above, there are a plurality of methods for measuring a line-width, and a suitable method is used depending on a purpose of measurement.
A measuring object used for dimension control is usually called a Quality Check (QC) pattern. In many cases, a QC pattern is arranged on a place called a scribe line, which is in a space between product chips and is to be cut by dicing. Further, in many cases, QC patterns are laid out to form a simple line or a plurality of lines/spaces for the sake of convenience of measurement. Actually, however, the performance and yield of a semiconductor device are determined by dimensions of wiring in operating circuit patterns, specifically dimensions of wiring on activation regions. A circuit pattern and a QC pattern are different from each other in complexity of their pattern shapes including lower layers, and thus different in behavior to dimensional variation. Thus, in dimensional control, the performance and yield of an actual semiconductor device can not be controlled sufficiently even if a dimension of a QC pattern is controlled. It is favorable to measure directly the dimension of a gate electrode of a circuit pattern. However, it is difficult to use measurement of a line-width of a specific place in a circuit for dimension control, since preparation of a measurement recipe is complicated and measurement accuracy of an individual point becomes lower because of the above-mentioned LER. Non-patent Document 4 describes a technique that can simply prepare a measurement recipe for dimension measurement in a circuit pattern. This technique uses design data to prepare a measurement recipe, and can measure a target place taking a plurality of layers into consideration. In other words, this technique can measure a line-width on an activation region.
Further, in many cases, a circuit pattern is formed such that activation regions and element isolation regions are arranged periodically. Non-patent Document 5 describes that, when there is such structure in a lower layer, dimensions of gate electrodes vary depending on that structure. This means that a dimension of a gate electrode on an activation region is different from a dimension on an element isolation region. Thus, when there is structure in a lower layer, an average dimension for the whole wiring is different from a dimension on an activation region. Also with respect to a resist pattern that becomes a mask for etching, it is confirmed that there is a phenomenon of variation in dimensions of wiring between on an activation region and on an element isolation region. Thus, as a wiring dimension that affects the performance and yield of a semiconductor device directly, it is necessary to measure a dimension on an activation region.
As described above, methods of measuring a minute measuring object with high accuracy have been proposed as follows.
Patent Document 1: Tokuhyo 2005-510083 (Published Japanese translation of published PCT application);
Patent Document 2: Tokuhyo 2003-531491 (Published Japanese translation of published PCT application);
Patent Document 3: Japanese Un-examined Patent Application Laid-Open No. 2002-151465;
Non-patent Document 1: A. Yamaguchi, et al., Proceedings of SPIE, vol. 5375, pp. 468-476 (2004);
Non-patent Document 2: B. Cheung et al., Proceedings of SPIE, vol. 5752, pp. 30-40 (2005);
Non-patent Document 3: V. A. Ukraintsev, et al., Proceedings of SPIE, vol. 5752, pp. 127-139 (2005);
Non-patent Document 4: C. Tabery, et al., Proceedings of SPIE, vol. 5752, pp. 1424-1434 (2005); and
Non-patent Document 5: M. Kurihara, et al., Proceedings of DPS, pp. 181-182 (2006);
As recent requests for processing accuracy become more rigid, it is more difficult to realize requested processing accuracy by simple improvement of individual processes. Thus, there is a method in which process control is performed so that a dimension as a control object is stabilized to be some standard value. Further, the performance and yield of a semiconductor product is determined not by a wiring dimension of a QC pattern but a wiring dimension of a circuit pattern, particularly on an activation region. Thus, it is necessary to measure a dimension on an activation region with high accuracy and at a high speed and to control the dimension of wiring.
Further, as a method of measuring a dimension of wiring, Non-patent Document 1 describes a method that uses a CD-SEM and an image of an area long in the length-wise direction of wiring. It is expected that this method will reduce variation in measurements owing to LER and be effective in improving measurement accuracy. Since, however, this method calculates, as a line-width, an average value over the whole measurement area, this method is not appropriate for calculation of a dimension only on an activation region. Further, this method employs image recognition in order to specify a target place of measurement, and this becomes one factor causing reduction of throughput of measurement.
As another measuring method, Non-patent Document 2 describes a measuring method using the scatterometry. This method can measure at a high speed. However, this method can measure only an average dimension in an area of 50 μm square, and thus is not sufficient for calculation of a dimension on an activation region.
Further, as another measuring method, Non-patent Document 3 describes a method using an AFM. This method is effective in obtaining a three-dimensional image of a pattern to be measured. However, since it takes a long time for measuring one point and there is no mechanism for extracting a dimension on an activation region, the method is insufficient to be used for an apparatus for inspecting a dimension of wiring in manufacturing process of a semiconductor device.
Further, as another measuring method, Non-patent Document 4 describes a method using a CD-SEM for measuring a dimension of wiring on an activation region. Since this method uses design data, it is possible to measure a dimension of wiring on any activation region in a circuit pattern. Further, to specify a measurement value on an activation region, a pattern layout generated from design data is compared with a pattern obtained from an actual SEM image, and a place to be measured is specified by image recognition. However, this method shows variation in measurements owing to the above-mentioned LER, and thus, measurement accuracy for each point is lower. Further, although it is possible to reduce variation in measurements owing to LER by increasing the number of points to be measured, the length of time required for measuring one point becomes longer since points to be measured are specified by image recognition. Thus, throughput of the method is insufficient to be applied to a wiring dimension inspection process.
In summary, to improve the performance and yield of a semiconductor device, a means of measuring a dimension on an activation region of a circuit pattern is required, and further, a method of managing and controlling the measured dimension is required. The conventional techniques are, however, insufficient to measure a dimension of wiring on an activation region with high accuracy and at a high speed.
Usually, a pattern to be measured at the time of control of dimension exists between semiconductor chips, and a QC pattern positioned at a part to be cut by dicing is measured. A QC pattern has a relatively simple layout for the sake of easiness of measurement. In dimension control, a dimension of such a simple layout is measured to examine whether an abnormal value or the like exists. Further, also in process control, measured data of a QC pattern is used. However, in comparison with a layout of a QC pattern, a layout of an actually-operating circuit pattern has a very complicated shape including not only a gate electrode but also lower layers of element isolation regions and the like. As a result, behavior of a dimension of a circuit pattern and behavior of a dimension of a QC pattern, i.e. behaviors such as variations in a wafer surface or variations between wafers or lots, do not necessarily coincide with each other. It is improvement in device characteristics and improvement in yield that is important in manufacturing of a semiconductor device. Further, those improvements are directly affected not by a dimension of a QC pattern but by a dimension of a circuit pattern. Particularly, it is essential to control accurately a dimension of a gate pattern on an activation region. Further, it is considered to place a circuit pattern on a scribe line to treat the pattern as a QC pattern and to control its dimension. However, a layout of a circuit pattern is complicated and thus it is difficult to measure such a circuit pattern with high accuracy. Further, in the case of measurement of a dimension of a gate electrode over an activation region in a circuit pattern, it is complicated to prepare a measurement recipe for a measuring apparatus, and variation in measurements owing to LER lowers the measurement accuracy. For these two reasons, it is difficult to introduce dimension control of a circuit pattern into an actual production line.
As shown in Non-patent document 4, as a means of measuring a dimension of a gate electrode on an activation region in a circuit pattern, there is a method of preparing a measurement recipe for a measuring apparatus on the basis of design data. This method uses not only a layout of a gate electrode but also design data of lower layers. As a result, it is possible to prepare easily a measurement recipe for measuring a dimension on an activation region at any place in a circuit pattern. However, even if this method is employed, accuracy of measured data of each individual point is lower because of variation owing to LER. It is considered to increase the number of points to be measured and to take an average value of them, to reduce measurement deviation. However, it can not be said that this is a good method since there is a trade-off relationship between the number of points to be measured and the throughput of measurement. As seen from the above, stable production of a semiconductor device needs a method of designing an easily-measurable QC pattern whose behavior is equal to a circuit pattern and a method of measuring a dimension on an activation region of that QC pattern with high accuracy and at a high speed.
The present invention has been made to solve the above problems. An object of the present invention is to provide a technique to measure a specific part of a semiconductor device with high accuracy and at a high speed.

Dimension measuring apparatus and dimension measuring method for semiconductor device


A compact flashlight is provided having a base with an interior recess for permitting reciprocable movement of a disk battery. The base includes a bulb having a first lead that extends along the bottom of the interior recess. A second diverging lead extends from the bulb to an area along an upper side of the recess. The battery overlies the first lead so that electrical contact is made with the bottom portion of the battery. A carrier overlies the battery and includes a boss portion extending into an opening of a cover that encloses the base. Forward thumb pressure on the boss portion moves the battery from a bulb-off to a bulb-on position when the battery comes into electrical contact with the second diverging lead. This results in illumination of the bulb. The carrier is provided with resilient members extending outwardly from the back end of the carrier. The resilient members engage a corresponding detent in the housing and maintain the battery in an off position. Release of thumb pressure allows the resilient members to draw the carrier/battery back into an off position. The flashlight may exist as a self-contained unit or it may be incorporated into a variety of outer housing structures. It has particular applicability for use in thin housings that have a card-like shape.

1. Field of the Invention
The present invention pertains to flashlights and, more particularly, to small compact self-contained flashlights.
2. Description of Related Art
Miniaturizing flashlights makes them more adaptable to variety of applications and more useful as a personal item. However, endeavors to reduce the size of flashlights have not been noteworthy. For example, U.S. Pat. No. 5,158,356 discloses a miniature light assembly in which a user must grab the bulb and pull it outwardly from its housing. This movement draws an angular lead segment into contact with a battery to activate the bulb. Grasping a miniaturized bulb and pulling it outwardly generally requires two hands. Also, it is cumbersome for many people to grasp and pull a small glass bulb.
U.S. Pat. No. 3,717,759 discloses a pocket flashlight wherein a bulb is housed within a reciprocable casing. Instead of pulling out on the bulb, the casing is pushed in to make contact with a battery and activate the bulb. This construction requires multiple housing parts that create a flashlight that is bulky and unnecessarily heavy.
A different structure for activating a pocket flashlight is shown in U.S. Pat. No. 2,714,152. In this patent, the bulb is stationary and the battery is housed within a slidable housing cover member. Pushing forward on the cover member causes the battery electrical end contact to engage the bulb and complete the circuit for illuminating the bulb. This was a popular item but requires a standard AA or AAA sized battery. Thus, it is heavier and larger than necessary.
Another pocket light is shown in U.S. Pat. No. 4,517,627. This light utilizes a housing that is secured to the interior of a purse by a magnetic disk. The battery and bulb are stationary within the housing and activation of the bulb is accomplished through the use of a button which spreads apart the limbs of a U-shaped electric contact. When spread apart, the limbs complete the electrical circuit between the battery and bulb resulting in illumination. The above switch requires multiple mechanical and electrical parts and is not suitable for miniaturization.
To create a flashlight within a card-like housing, U.S. Pat. No. 5,457,613 utilizes layers of conductive foil material that form a circuit between a bulb and battery. The circuit is completed by pressing a spot on the housing sidewall that overlays an interior switch. A resilient foam pad over the switch maintains an electrical coupler in an off position out of contact with an adjacent conductive layer.
A problem with the above is that foil layers are fragile, easily corroded and are poor conductors of electricity. Moreover, depressing a foam pad so that electrical contact can be made is notoriously unreliable. Additionally, it is well known that foam materials harden and crumble over a relatively short period of time.


A sensor device includes at least one first sensor element that generates a first sensor signal based on sensing a varying magnetic field; at least one second sensor element that generates a second sensor signal based on sensing the varying magnetic field; a signal tracking circuit that generates a trigger signal having trigger pulses that are generated based on crossings of the first sensor signal with an adaptive threshold and extracts vibration relevant information using the first sensor signal and the second sensor signal; an output controller that generates an output signal having output pulses that are triggered by the trigger pulses during a non-vibration event and suppress the output pulses during an entire duration of a vibration event; and a vibration detection circuit that detects the vibration event based on the extracted vibration relevant information and indicates the vibration event to the output controller.

Magnetic speed sensors are used in speed sensing for many applications in many industries including in the automotive industry for wheel speed, engine speed, and transmission speed, and the like. In the field of speed sensing, a sinusoidal signal may be generated by a magnetic sensor in response to a rotation of a target object, such as a wheel, camshaft, crankshaft, or the like. The sinusoidal signal may be translated into pulses, which is further translated into a movement detection or a speed output.
One purpose of a transmission speed sensor or a wheel sensor is to assess the speed at which a target object spins (e.g., a gear or a wheel). Information from a speed sensor may generate a speed signal representative of the speed of a target object as well as a direction signal representative of the rotational direction of the movement of the target object. Thus, a speed sensor may generate a speed signal and a direction signal. Based on these signals additional output signals (e.g., pulsed output signals) are generated that provide sensor information to a microcontroller or to an Electronic Control Unit (ECU). Mechanical vibration at the speed sensor can impact the speed signal and/or the direction signal by causing a false or unwanted sinusoidal oscillation in the signal, which in turn causes incorrect information output at the output signals.
With the trend of downsizing and with ongoing development of autonomous driving, the requirements of vibration suppression and 0 Hz capability are today not only needed in transmission applications but also in anti-lock braking system (ABS) sensors. Zero hertz capability provides high sensor sensitivity used for smaller rotational movements that are used for start/stop detection and hill holder detection (i.e., hill slippage detection). The higher the sensor sensitivity, the greater the resolution for detecting smaller movements. On the other hand, using vibration suppression algorithms that are too aggressive (i.e., sensors using too high of a sensitivity) might result in a sensor deadlock which results in no output switching. Magnetic particles, sudden airgap jump, large temperature drift might result in such a deadlock situation of the speed sensor. However, the requirements for vibration suppression and 0 Hz capability in terms of sensor sensitivity are conflicting.
In addition, a conflict exists between the requirement to suppress vibrations and the ability to recover to normal operation after a large signal change due to a particle or a significant airgap change. In both situations, the amplitude dependent hysteresis for extrema, direction, and speed detection might be too big to be able to track a significantly reduced signal. While during a vibration the suppression of the output signal is needed, the loss of the output signal after a large airgap change results in a sensor deadlock. In order to avoid a deadlock, the sensor can be automatically reset after a timeout without events at the output signal. The drawback of this solution is a reduced vibration suppression and the loss of functionality for a signal frequency close to 0 Hz needed for start/stop detection and hill holder detection.
A compromise between the ability to suppress vibrations and the possibility for deadlocks has to be made. The need for a compromise has been a longstanding issue in speed sensing, especially in transmission applications, where vibrations and particles are present in the application.
Therefore, an improved speed sensor capable of suppressing vibrations, prevent deadlocks, and permit 0 Hz capability may be desirable.

Vibration compatible watchdog for speed sensors


The present invention is directed to a method of insulating the stator of an electronically commutated direct current motor, in order to also fulfill high insulation and protection requirements. This method comprises the following steps:. the stator (1) is introduced into a closable form with laterally retractable jaws (21); PA1 the form is closed, wherein it encloses the outer contours of the stator (1) including the printed circuit board (11), with a spacing, at least in regions; PA1 a thermoplastic hot-melt adhesive based on polyamide is injected under pressure into the form; PA1 the form is opened and the extrusion-coated stator (1) is removed.

The invention relates to a method or insulating the stator of an electronically commutated direct current motor, an apparatus for carrying out such a method, and a stator that is manufactured in accordance with this method.
In electric motors that are used in so-called clean rooms, or in a humid or aggressive environment, it is necessary to provide the sensitive parts of the motor, such as the winding and the printed circuit board, with a protective coating. It is therefore known, e.g. from DE 37 37 050 A1, ELASSER/PAPst, published, May 5, 1988, to cast artificial resin around the stator of an electric motor. The object in the present disclosure lies essentially in simplifying the production of the bond or connection between the stator winding and the printed circuit board.
Carrying out a powder coating is also known. The known methods not only require mechanical finishing, but are also not in a position to fulfill the requirements of higher insulation classes (e.g. protection type DIN/VDE 0470 IP-54) German Industrail Norm

Process for insulating the stator of an electronically switched D.C. motor


A planographic printing plate supply unit comprising: carrying rollers rotating while pressing a stacking bundle, in which planographic printing plates and covering papers are stacked alternately, so as to carry the planographic printing plate and covering paper at the top of the stacking bundle, wherein convex portions which are elastically deformed when pressing the stacking bundle and whose contact area with the planographic printing plate is larger after being elastically deformed than before are provided on the outside periphery of the carrying roller.

1. Field of the Invention
The present invention relates to a planographic printing plate supply unit and more particularly, a planographic printing plate supply unit which supplies pairs of planographic printing plates and covering papers one by one from a stacking bundle in which the planographic printing plates and the covering papers are stacked alternately.
2. Description of the Related Art
Generally, an image recording face of a planographic printing plate is covered with a protective covering paper attached thereto and a plurality of these units are stacked in a thickness direction so as to compose a bundle of the planographic printing plates. If an image is recorded on the planographic printing plate with an exposure unit or the like, it is necessary to pick up the planographic printing plates one by one from the bundle and supply then to the exposure unit.
For example, according to an image recording material sheeting unit described in Japanese Patent Application Laid-Open (JP-A) No. 2003-182904, printing plates and covering papers are stacked alternately in a cassette of the sheet transporting portion and a sucker suctions the covering paper and planographic printing plate from above the covering paper and raises them to bring them out of the cassette. After the printing plate and covering paper are taken out, the covering paper is separated from the suctioned printing plate by means of a fan. However, because the structure uses the sucker to supply the printing plate, there are concerns that the structure may become complicated and cost may increase.
Contrary to this, JP-A No. 60-202028 has disclosed a structure in which the covering paper is fed out by a roller and the planographic printing plate is sent out by a vacuum pad. However, according to this configuration, because the planographic printing plates or the covering papers are taken out one by one, a next planographic printing plate cannot be taken out until the covering paper is taken out, thereby taking much time. Further, because the planographic printing plate and the covering paper each need a taking-out mechanism, the quantity of components increases thereby possibly inducing increases in size of the unit and manufacturing costs.
Although conveying a planographic printing plate and a covering paper with a roller as a pair is conceivable, often only a planographic printing plate is carried separately from the covering paper or two pairs of the planographic printing plate and the covering paper are carried simultaneously due to penetration of air into gaps between the planographic printing plates.

Planographic printing plate supply unit including carrying roller with hollow convex portions


A method of fabricating a semiconductor device includes forming an interlayer insulating pattern over a semiconductor substrate. The interlayer insulating pattern defines a plurality of storage node regions. A lining conductive film is formed over the interlayer insulating pattern including the storage node region. A capping insulating film is formed over the lining conductive film. The capping insulating film over the interlayer insulating film and the lining conductive film are selectively etched between two neighboring storage node regions to form a recess exposing the interlayer insulating pattern on the bottom of the recess and the lining conductive film on sidewalls of the recess. The capping insulating film and the lining conductive film is shaped to be planar so that the lining conductive layer is electrically separated from each other to form a respective lower storage electrode. A supporting pattern is formed to fill the recess. The capping insulating film and the interlayer insulating pattern are removed to expose the lower storage node.

As a semiconductor device is smaller and highly integrated, the memory capability is increased. However, the high integration of the device increases a chip area but decreases a cell area. The reduction of the cell area decreases an area of a cell capacitor. As a result, the read-out capability of the cell is reduced, the durability is degraded by soft errors of alpha particles, and a sensing margin of a sense amplifier is decreased. Therefore, a method for securing a sufficient capacitance in a limited cell region has been required.
The capacitance refers to a capacity of charges stored in a capacitor. As the capacitance becomes larger, more information can be stored. The capacitance is represented by Equation 1.
                    C        =                  ɛ                                A            d                                              Equation                                                  1
∈ is a dielectric constant determined by kinds of dielectric films disposed between two electrodes, d is a distance between the two electrodes, and A is an effective surface of the two electrodes. Referring to Equation 1, as ∈ is larger, d is shorter between the two electrodes and A of the two electrodes is increased, the capacitance of the capacitor can be increased. The electrode structure of the capacitor is changed to have a three-dimensional type such as a concave structure and a cylinder structure, thereby increasing the effective area of the electrodes.
FIGS. 1a to 1f are cross-sectional views illustrating a conventional method of fabricating a semiconductor device. A buffer oxide film 110, an etch stop film 115, an interlayer insulating film 130, an amorphous carbon layer 140, a silicon nitride oxide film 150 and an anti-reflection film 160 are sequentially formed over a semiconductor substrate 100 including a storage node contact plug 105. A photoresist pattern 170 is formed over anti-reflection film 160 to define a storage node region. Etch stop film 115 includes a nitride film.
Referring to FIG. 1b, anti-reflection film 160 and amorphous carbon layer 140 are sequentially etched using photoresist pattern 170. Interlayer insulating film 130 is etched using the etched silicon nitride oxide film 150 and the etched amorphous carbon layer 140 as an etching mask to form an interlayer insulating pattern 130a that exposes etch stop film 115. Photoresist pattern 170 and anti-reflection film 160 are removed.
Referring to FIGS. 1c and 1d, etch stop film 115 and buffer oxide film 110 are etched using interlayer insulating pattern 130a as an etching mask to form a storage node region 180 exposing storage node contact plug 105. Since buffer oxide film 110 is removed when etch stop film 115 is etched, an over-etching method may be performed. A conductive film 175 is formed over storage node contact plug 105, buffer oxide film 110, etch stop film 115, interlayer insulating pattern 130a, amorphous carbon layer 140 and silicon nitride oxide film 150. Conductive film 175 includes a titanium nitride film.
Referring to FIGS. 1e and 1f, a planarization process is performed on conductive film 175 until interlayer insulating pattern 130a is exposed. A dip-out process is performed to remove interlayer insulating pattern 130a, thereby forming a lower storage node of the cylinder structure.
However, a leaning phenomenon of the lower storage node during the dip-out process occurs by a surface tension of a wet solution, and the lower storage node is pulled out to cause dropping defects, thereby degrading characteristics of the device.

Semiconductor device and method of fabricating the same


Mounting brackets for dead-end utility lines and mounting bracket systems for dead-end utility lines are described in the present disclosure. Each mounting bracket can include a body with a front face and, a plurality of arms extending from the body with each arm comprises a hook that is configured to receive a dead-end utility line. The mounting brackets are configured to be mounted on a utility pole and to allow a plurality of dead-end utility lines to be mounted to a utility pole with a single mounting bracket.

Generally, owners of utility poles charge for a dead-end utility line to be mounted to the pole. Calculation of the mounting charges is sometimes based on the number of attachments to the utility pole, such as by the number of mounting bolts drilled or screwed into the utility pole, with a separate charge for each bolt. Furthermore, challenges can arise when multiple dead-end utility lines are to be mounted to a utility pole, including increases in labor for securing separate fasteners for each utility line.
Consequently, there is a need for mounting bracket systems for dead-end utility lines that can better address these and other challenges.

Mounting bracket systems for dead-end utility lines


The present invention relates to an organometallic complex as shown in general formula (I), and to a polymer, mixture and formulation comprising same, and to use thereof in an electronic device, in particular the use in an organic luminous diode. By providing a new high performance phosphorescent luminous material, in the present the device structure is optimized such that the device achieves the best performance, realizing a high efficiency, high luminance and high stability OLED device, thereby providing a better material option for full-color display and lighting.

Organic light-emitting diodes (OLEDs) show great potentials in the applications of optoelectronic devices (such as flat-panel displays and lighting) due to the synthetic diversities, relatively low manufacturing costs, and excellent optical and electrical properties of organic semiconductor materials.
In order to improve the luminescence efficiency of the organic light-emitting diodes, various light-emitting material systems based on fluorescent and phosphorescent materials have been developed. The organic light-emitting diodes based on fluorescent materials have high reliability, but their internal electroluminescence quantum efficiency is limited to 25% under electric field excitation, since the probability ratio of the exciton to generate a singlet excited state and a triplet excited state is 1:3. In 1999, Professor Thomson from the University of Southern California and Professor Forrest from the Princeton University successfully prepared green electrophosphorescence devices by incorporating tris(2-phenylpyridine) iridium (Ir(ppy)3) into N,N-dicarbazole biphenyl (CBP), which aroused great interests in phosphorescent complex materials. The introduction of heavy metals improves the molecular spin orbit coupling, shortens the phosphorescence lifetime and enhances the intersystem crossing of molecules, so that phosphorescence can be successfully emitted. Moreover, since the reactions of this kind of complexes are mild, it is easy to alter the structure and the substituent groups of the complexes, to adjust the light-emitting wavelength, to obtain electrophosphorescent materials with excellent properties. So far, the internal quantum efficiency of the phosphorescent OLED is close to 100%. However, most of phosphorescent materials have too broad luminescence spectrum and poor color purity, which are not conducive to high-end display, and the stabilities of such phosphorescent OLEDs need to be further improved.
Therefore, novel high-performance phosphorescent metal complexes are urgently needed to be developed.

Organometallic complex, and polymer, mixture and formulation comprising same, and use thereof in electronic device

GUANGZHOU CHINARAY OPTOELECTRONIC MATERIALS LTD.


The method according to the invention involves limiting the charging of a vehicle alternator by only authorizing progressive augmentation of a current duty cycle (DC) of an excitation signal (7) of the alternator from an initial duty cycle to an expected duty cycle (EpsU) calculated by a control loop (1, 5, 6) of the alternator. According to the invention, a complementary limitation of the charging of the alternator involves limiting the increase of the current duty cycle (DC) according to at least one parameter of the heat engine involving an angular acceleration (mot) and/or a rotation speed (Nmot) of the heat motor. In particular, this complementary limitation can additionally involve limiting the increase of the current duty cycle (DC) according to a negative value of the angular acceleration (mot).

In the motor vehicle industry it is well known to maintain a voltage which is supplied to the on-board electrical network by an alternator of the vehicle at a predetermined set value, independently of the speed of rotation of the engine or the electrical consumption of the equipment, by means of a regulation device known as a "regulator".
This regulator, which is generally incorporated in the alternator, controls an excitation current which is supplied by a battery and circulates in an excitation winding of the alternator.
At present, motor vehicle parts manufacturers have developed very high-performance alternators by implementing electronic power systems controlled by circuits which use digital techniques, based in particular on the use of microprocessors or microcontrollers.
These techniques make possible distinctly better stabilisation of the voltage of the on-board network than the previous bimetals, in response to the activation of substantial electric charges in the vehicle.
However, it can be conceived that an increased requirement for excitation current by the regulation system must not lead to a rapid increase in the torque taken out by the alternator from the thermal engine, which would be liable to stall the thermal engine, particularly when it is idling or is cold, when the vehicle is started.
It is thus known to limit the resistant torque taken out by an alternator from the thermal engine by means of a progressive charging function known as "LRC" (an acronym for "Load Response Control"). Control of the intensity of the excitation current is generally obtained by variation of the duty cycle of an excitation signal of the PWM ("Pulse Width Modulation") type which controls a power switch of the excitation circuit.
In a known manner, and further to detection of a charging requirement, the LRC function authorises only progressive increases of the duty cycle of the excitation signal from the initial value to the value determined by the control loop, by increasing this initial value by using a so-called "progressive charge return" intermediate signal.
Also in a known manner, the excitation signal which actually controls the excitation circuit is derived from the multiplexing of the excitation requirement signal generated by the control loop and the excitation signal produced by the LRC function, under the control of the LRC function.
However, the above-described type of LRC function is simply a systematic open loop action which does not really interact with modification of the on-board voltage or the speed of rotation of the engine.
In these conditions, the electronic control unit of the engine can have problems with stabilising the engine speed during idling.

Method and system for monitoring progressive charging of automobile alternator, and automobile alternator comprising such a system


A mounting device for mounting on a substrate a plate or board-like lighting source may include a frame member for surrounding the plate or board-like lighting source, anchoring formations for anchoring the frame member onto the substrate while permitting movement of the frame member towards and away from the substrate, elastic means for elastically urging the frame member towards the substrate, and one or more locking members mounted on the frame member and radially displaceable with respect to the frame member between: a radially outward position, in which the plate or board-like lighting source can be inserted into the frame member and positioned between the frame member and the substrate, and a radially inward position, in which the locking member(s) abuts/abut against the plate or board-like lighting source located between the frame member and the substrate, elastically urging the plate or board-like lighting source towards the substrate.

In order to mount lighting sources on a substrate such as a PCB (Printed Circuit Board) it is possible to use a fixing system with a screwing action. This solution, however, may result in a non-uniform pressure distribution, so that the thermal interface properties and the heat transfer are not distributed uniformly over the contact surface and may worsen with time.
In order to perform a mechanical and/or thermal connection it has also been proposed using more than a single component or complex structures.

Mounting device for lighting sources and associated method


There is provided a simulator for CPR and defibrillator training, which may perform training and evaluation of CPR and a defibrillator so that when there is a patient in an emergency situation, effective first aid can be provided to the patient. Through the simulator for CPR and defibrillator training, CPR and the use of the defibrillator for emergency medical technicians such as a doctor, a nurse and an emergency medical technician can be systematically and repetitively trained, and a person in charge of training can identify whether or not the education is performed effectively by recording and evaluating a training situation. Also, through the simulator, the education of CPR and defibrillator training is possible so that not only the emergency medical technicians but also general people can perform emergency treatment effectively.

1. Field
The following description relates to a simulator for CPR and defibrillator training, and more particularly, to a simulator including a human body model having various types of actuators and sensors, a simulator control device and a monitoring device having a built-in training procedure program so that a general person, an unskilled person, and emergency medical technicians such as a doctor, a nurse and an emergency medical technician can perform CPR and defibrillator training in the same manner in which CPR and a defibrillator are used on an actual human body.
2. Description of the Related Art
Cardiopulmonary resuscitation (CPR) is an emergency treatment of assisting a person suffering from a heart attack with blood circulation and breathing. A defibrillator is a medical device that generates and delivers an electric shock to revive a person's heart, and may be classified as a manual defibrillator used by emergency medical technicians or an automated external defibrillator (AED) used by general people. CPR and the use of the defibrillator allow a person's blood to be circulated during a heart attack, so that it is possible to delay brain damage and to resuscitate the person from the heart attack. Statistics show that if an acute heart attack patient receives CPR within four minutes, the resuscitation rate can be increased to 50% or higher. As such, it is important to use CPR and the defibrillator as soon as a heart attack patient is discovered, and this necessity has been increasingly recognized.
CPR is performed through basic steps including a consciousness identification step of identifying a patient's state, a help and report step of immediately asking neighbors for help in a loud voice and dialing an emergency number when it is identified that the patient is unconscious, an airway security step of pulling back the patient's head and lifting the patient's chin so as to prevent the patient's airway from being blocked due to tongue muscle relaxation, a pulse identification step of identifying the pulse of the carotid artery, a breast pressure step of applying pressure to the heart of the patient whose heart has stopped, a respiration identification step of observing whether or not the patient's breast goes up and down while identifying the patient's respiration so as to start artificial respiration, an artificial respiration step of inspiring air into the patient's lungs in which the respiration has stopped, and a repetition step of repeatedly providing the breast pressure and artificial respiration to the patient until emergency medical technicians arrive on the spot.
In addition to CPR, the use of the defibrillator, which restores an irregular electrocardiogram signal of a patient's heart to a normal electrocardiogram signal through electric shock treatment, has recently increased. The defibrillator is a medical device that generates and delivers an electric shock to revive a person's heart. The defibrillator determines whether the waveform state of the patient's heart is normal or abnormal and forcibly applies an electric shock to the patient's heart based on the determined result, thereby restoring the abnormal waveform of the patient's heart to the normal waveform. Because a bill for installing the defibrillator in many facilities, etc. has recently been approved, the installation of AEDs easily available for general people is tending to increase, and the AED instructs people on its usage in voice so that anyone can easily use the AED.
According to the related art, there are many products in which CPR training and evaluation are possible but the training and evaluation using the defibrillator are impossible. The products have configurations that do not satisfy main functions of CPR.
In a related art simulator, the function of a pupil reaction test does not exist, or a pupil is manually replaced for each case. The function of pulse generation does not exist either, or a manual pulse generation method of pumping with a hand is used.
Since the related art simulator is configured in such a manner that if the breast of the related art simulator is pressed, one compression spring moves up and down, the related simulator is different from an actual human body. The breast pressure is possible only when pressure is applied vertically to the breast of the related art simulator. However, the breast pressure is possible when pressure is applied vertically or diagonally to the breast of an actual human body. The related art simulator is manufactured in such a manner that the position of the breast pressure is identified with the naked eye or a button switch. However, if the position of the breast pressure is identified with the naked eye, a trainer has difficulty in deciding the exact position of the breast pressure, and may subjectively decide the position of the breast pressure. If the position of the breast pressure is identified with the button switch, the measurement of the breast pressure is possible only at the position of the button switch, and therefore, the decision of accuracy may be inaccurate. The depth of the breast pressure is identified using a photointerrupter method or using a method in which the breast pressure is mechanically stuck when the breast pressure reaches a certain depth. However, when identifying an appropriate depth of the breast pressure recommended in the guidelines of the International CPR Institute or Korean Association of CPR, the mechanical method can measure only the certain depth of the breast pressure. Therefore, when the breast pressure is weak or strong, the decision of the depth of the breast pressure is impossible. The photointerrupter method is a method of detecting a position by passing or blocking light transmitted through holes formed at a certain interval in a plate. In the photointerrupter method, the unit of height becomes an interval between the holes. However, since it is difficult to implement a hole interval of a few millimeters (mm), the measurement accuracy is low, and there is a limitation in improving the measurement accuracy.
In the related art simulator, the detection of a flow rate of air in training for artificial respiration is performed by identifying, with the naked eye, that if air is injected into the related art simulator, a lung-shaped bag expands and the height of the lung-shaped bag increases or by measuring a change in height using a photointerrupter in the same manner as the breast pressure. However, as described above, a trainer has difficulty in detecting an exact flow rate of air, and may subjectively decide the flow rate of air. Therefore, it is difficult to perform training for the flow rate of air in the artificial respiration recommended in the guidelines of the International CPR Institute or Korean Association of CPR.
In the related art simulator, an input/output display device displays a training course in such a manner that LEDs are simply turned on/off. Since there exists no scenario program for training or the reaction of the related art simulator is manually reproduced when the scenario program is executed, the reality of the related art simulator is deficient.

Simulator for CPR and defibrillator training


A facility for maintaining a subscriber history pertaining to the use of a mobile device with an IP-based telecommunications service offered by a service provider. When a connection request is made by a mobile device to access an IP-based telecommunications service, one or more identifiers associated with the requesting mobile device and access point are provided in the request and stored by the facility. In some cases, the identifiers are stored even if the mobile device is unable to, or not authorized to, access the telecommunications service. Additional parameters associated with the request from the mobile device, such as a time stamp and details of a subsequent telecommunications session, are also associated with the stored request. The history of requests to access the IP-based telecommunications service from the mobile device are maintained by the facility and provided to a service support provider.

A variety of technologies enable telecommunication services to be offered using Internet Protocol (IP). Commonly referred to as Voice over IP, or VoIP, such technologies enable telecommunications on any public or private IP network, including the Internet. VoIP technology permits a user to receive IP-based telecommunications services through a variety of devices, including a desktop computer, a notebook computer, an analog handset used in conjunction with a VoIP telephone adapter, a VoIP-enabled handset, or other like device.
Increasingly, mobile devices, such as notebook computers, personal digital assistants (PDAs), wireless handhelds, wireless handsets, or other similar devices, are also being enabled to receive IP-based telecommunications services. Such services are provided by enabling the mobile device to communicate with a wireless router and access any IP-based wireless access network, such as a network based on the IEEE 802.16 (WiMAX), IEEE 802.20 Mobile Broadband Wireless Access (MBWA), Ultra Wideband (UWB), 802.11 wireless fidelity (Wi-Fi), and Bluetooth standards.
Moreover, dual-mode mobile telecommunications devices may be enabled to communicate with any IP-based wireless access network. For instance, Unlicensed Mobile Access (UMA) technology allows wireless service providers to merge cellular networks, such as Global System for Mobile Communications (GSM) networks, and IP-based wireless networks into one seamless service with one mobile device, one user interface, and a common set of network services for both voice and data. UMA technology has recently been accepted into release 6 of the 3rd Generation Partnership Project (3GPP) standard as a General Access Network (GAN).
With UMA solutions, subscribers may move between cellular networks and IP-based wireless networks with seamless voice and data session continuity as transparently as they move between cells within the cellular network. Seamless in-call handover between the IP-based wireless network and cellular network ensures that the user's location and mobility do not affect the services delivered to the user. Services may be identical whether connected over the IP-based wireless network or the cellular network. UMA technology effectively creates a parallel radio access network, the UMA network, which interfaces to the mobile core network using standard mobility-enabled interfaces. The mobile core network remains unchanged. The common mobile core network makes it possible for the service provider to take advantage of full service and operational transparency. For example, the existing service provider Business Support Systems (BSS), service delivery systems, content services, regulatory compliance systems, and Operation Support Systems (OSS) can support the UMA network with little or no change. Service enhancements and technology evolution of the mobile core network apply transparently to both cellular access and UMA.
Although IP-based telecommunications technologies offer substantial benefits to users of the technology, service providers face many obstacles to the widespread use of these technologies. One of the challenges facing any service provider that launches an IP-based telecommunications service is service support. Service support includes customer care operations, service diagnostic operations, and related operations. Service support issues are particularly challenging in an IP-based telecommunications network because the service provider typically does not have end-to-end control of the network used by a subscriber. Instead, any communications between mobile devices used by subscribers and the network systems of the service provider may involve some transit over third-party broadband networks and the Internet. Since the third-party networks and the Internet are not under the control of the service provider, diagnosing service problems is particularly complicated. Performance problems may result from problems in one or more components that make up the service provider network, the third-party network, and/or the Internet. In order to provide subscribers with a high quality of service and diagnose service problems as quickly as possible, it is therefore important that service providers implement a robust service support solution that allows service support representatives to quickly and easily troubleshoot service problems.

This patent is subject to a terminal disclaimer.

Maintenance of subscriber history for service support applications in an IP-based telecommunications system


A window shade arrangement for a motor vehicle is provided that contains a housing in which a winding shaft is rotatably supported. A strip shaped shade element is fixed on the winding shaft. The cover of the window shade housing is formed by a spring housing. A coil spring for tensioning the winding shaft in the wind up direction of the strip shaped shade is seated in the spring housing. The spring housing, the spring seated therein and a coupling shaft form a preassembled unit.

In window shades that are commonly used in modern motor vehicles, a spring drive is used for tensioning the winding shaft of the window shade in the wind up direction of the strip shaped shade. The spring drive is formed by a helical spring that is accommodated in the interior of the winding shaft. This arrangement was predominantly utilized in the past because the winding shaft can be easily utilized as the housing for the spring drive due to its tubular shape. This was based on the notion that the spring drive can be accommodated in a space saving fashion at this location without creating major problems.
The winding shaft needs to carry out approximately 10-15 revolutions between a fully extracted position of the strip shaped shade and a completely retracted position in which the strip shaped shade is largely wound up on the winding shaft. As will be appreciated, these 10-15 revolutions of the winding shaft need to take place within the medium tensioning range of the spring drive in order to achieve a reasonable tension in both end positions. If the 10-15 revolutions were to take place at the beginning of the tensioning range of the spring drive, the tension would be too low in the wound up state. If they were to take place at the end of the tensioning range, the tension would be too high in the fully extracted position of the strip shaped shade. Consequently, the spring drive also needs to be tensioned relative to the completely relieved state of the spring drive by several revolutions, e.g., approximately 5-6 revolutions, when the strip shaped shade is completely wound up. Conversely, the spring drive requires a certain reserve, by which it could theoretically be additionally wound up, at the end of the wind up process. These requirements are associated with a specially designed spring drive in the form of a helical spring.
Another disadvantage resulting from arranging the helical spring within the winding shaft is the spring length required for achieving the above described marginal conditions. The length of the helical spring increases the risk of rattling, i.e., the spring windings hit the interior of the winding shaft because vehicle vibrations cause the helical spring to oscillate transverse to the longitudinal axis of the winding shaft. To prevent the spring windings from hitting the interior of the winding shaft, a common practice is to fill the interior of the winding shaft with a large portion of grease that serves as a damping material.
A coil spring generally has more favorable characteristics. When utilizing a coil spring, it is only necessary to maintain a certain tension at the beginning of the displacement path. The tension only increases in an abrupt manner immediately before the end of the displacement path is reached. Up to this point, the torque of a spring drive with a coil spring increases gradually in a relatively linear fashion.
Tensioning a cargo area cover for a motor vehicle with the aid of a spring drive is taught by DE 36 31 488 A1. This cargo area cover includes a housing defined by two end caps that partially surround the strip shaped cover wound on the winding shaft in a cup like fashion. The caps are provided with corresponding slots in order to extract the strip shaped cover. The wound up cover is exposed in its center region. One of the end caps contains a coil spring that is laterally adjacent the end face of the winding shaft. The inner spring end is anchored on a pin of the winding shaft. The outer spring end is fixed in a cavity of the end cap. The installation of the coil spring is relatively complicated because the cup shaped part of the spring housing is integral with the cup shaped part that represents the housing of the strip shaped cover. The DE 36 31 488 A1 reference does not provide any information as to the connection between the pin and the tubular winding shaft.


The present invention relates to a CT imaging system as well as a method for CT imaging is provided. For CT imaging, in practice a scout scan and a main scan of a human subject may be performed. It has been found that a detector signal, provided by a detector which detects the X-ray radiation during the scout scan, may be used on the one hand for determining a respective scout image and on the other hand to determine the bone mineral density of the human subject. Although the scout scan is usually primarily performed for determining the scout image, it is of advantage, if the detector used for detecting the X-ray radiation during the scout scan is formed and/or configured to detect X-ray radiation of a first energy spectrum and to detect X-ray radiation of a different, second energy spectrum. In this case, the detector can provide more precise information about the scout region of the human subject and resulting therefrom in a more precise determination of the bone mineral density. Thus, while determining the scout image and/or while performing further steps, the bone mineral density may be determined, in particular as a background process step, such that the bone mineral density may be provided for further purpose.

Generally, the abbreviation CT refers to computed tomography. A CT imaging system may relate to a radiograph CT imaging system, such as an X-ray CT imaging system. CT imaging systems are widely used in various medical institutions for two-dimensional and/or three-dimensional imaging of a region of interest of a human subject, such as coronary arteries, a lumber spine, a proximal femur or at least a part of the whole body of the human subject, to assist the clinicians to achieve a medical diagnosis of the human subject.
For the CT imaging, X-ray radiation is used to depict the interior condition and/or structure of the three-dimensional and/or non-transparent parts of the human subject to be examined. For this purpose, the human subject is often passed, at least partly, through the CT imaging system to perform a first scan, which may also be referred to as the scout scan, on the human subject to identify a region of interest of the human subject for a subsequent, second CT scan, which may also be referred to as the main scan. The scout scan provides a projection view along a longitudinal axis of the subject. However, data collected by the scout scan often do not include information sufficient for reconstruction of a three-dimensional image, since the projection data provided by the scout scan is usually collected just along the longitudinal axis of the human subject.
An excessive dose of X-ray radiation may be harmful to a human subject, since it may damage tissue and may have a carcinogenic effect. In terms of the human subject, attempts are therefore being made to reduce the exposure of X-ray radiation.
In order to reduce a repeated and potentially uncoordinated production of X-ray radiations exposed on the human subject to generate respective images, it has been suggested in document US 2014/0086383 A1 to perform an instant switching dual energy scout scan on a region of interest of the human subject by way of instant switching between a high voltage and a low voltage, and to reconstruct a material decomposition image and a mono-energetic image corresponding to a predetermined screening purpose from the collected dual energy projection data. In an example, the high voltage relates to 140 kVp and the low voltage relates to 80 kVp.
The previous explained technique however suffers from the drawback that it results in a relatively expensive CT imaging device and/or method, if an accurate and precise measurement of a bone mineral density is to be performed. In particular, motion artefacts, caused by the switching between the low voltage and the high voltage, often prevent an accurate measurement of the bone mineral density.

CT imaging system and a method for a CT imaging system


A proxy-based, nonlinear editing system and method with improved audio level controls is provided. The system includes a proxy file generator, an audio summary file generator that assigns a single audio level for each proxy file video frame, a web user interface having a visual display, and a digital controller. Whenever a proxy file selected for display on the visual display, the digital processor simultaneously provides a graph of the associated audio summary file. The digital processor serially connects, on the same axes, the audio graphs of proxy files being assembled into an edited product, marks the location of audio “spikes”, and provides the web user interface with controls for adjusting the audio level of all or a portion of the audio graphs.

Nonlinear editing (NLE) systems are well known in the prior art, and are used in the news rooms of television broadcasting stations to assemble video clips for news stories from a variety of different electronic media files. As the name implies, NLE systems enable direct access to any frame in a digital video clip without the need to play or shuttle through adjacent footage to reach it, as was necessary with older videotape editing systems. In operation, all of the raw or source media files associated with a particular news story are imported into a source media repository. This is typically accomplished by connecting the removable memory media of a file-based digital video camera to the memory card reader of a computer. The removable memory media may take the form of solid state electronic memory devices, hard disks, or removable disks, but will hereafter be referred to as memory cards. A user inserts the memory card from the camera into the card reader of a computer and copies the file contents of the memory card into shared local or network file storage which will hereafter be referred to as a repository. The editor reviews the source media files associated with the particular news story on the viewing screen of an editing terminal and performs editing actions which cause the system to generate an Edit Decision List (EDL) which specifies which parts of which clips are connected and in what order. The final clip is created by selective electronic copying and pasting together portions of the source media files stored in the repository. This process may also include the application of various digital effects such as filters, dissolves, fades, or image overlays.
NLE systems obviate the need for the time-consuming act of mechanically cutting and splicing together the originals of the video tape or film negatives. Moreover, because the EDL is executed only by reading the source media files and not writing to them, no portion of the source media files stored in the repository is destroyed or changed as a result of the editing operation. Hence the source media files stored in the repository may be re-edited into as many different versions as desired.
Proxy-based NLE systems are also known in the prior art. Such systems were developed upon the realization that it is not necessary for the editor to view the original high definition, high-bandwidth media file in generating the EDL. Instead, a low-resolution proxy file may be used for such purposes. In operation, the low-resolution proxy file is generated and stored soon after the raw, high-resolution media file is exported into the source media repository of the system. Whereas non-proxy based NLE systems require powerful workstations to perform editing operations on full-size source video files, proxy-based systems can run on relatively inexpensive computers because of the comparatively small size of the proxy files. In proxy-based systems, the computationally intensive work of producing the proxies and the final output is usually done centrally on powerful shared servers. The ability of such proxy media files to be easily and quickly downloaded, uploaded and viewed over local networks or the broader Internet conveniently allows an editor to efficiently generate an EDL from any web-connected location via a laptop or desk top computer.

Nonlinear proxy-based editing system and method having improved audio level controls


In an embodiment, an air conditioning system for managing a server room, which has first and second spaces separated from each other, in which a server is installed between the first and second spaces, and supply air flowed into the first space is heated by heat generation of the server, and flows out as return air via the second space, includes: a cold air generation device; an air supply fan; a first differential pressure gauge; and a control device. The cold air generation device generates supply air satisfying a predetermined condition. The air supply fan flows the generated supply air into the first space. The first differential pressure gauge measures a differential pressure of a static pressure of the second space with respect to a static pressure of the first space.

In recent years, as use of the information technology has been being widespread and advanced in a variety of fields, necessity of a data center that provides a customer with a connection line to a network, maintenance/operation services, and the like has been rising.
In general, in the data center, a heat generation amount therein is large since a large number of servers are installed therein. In order to normally operate these servers, it is necessary to keep the data center under environmental conditions within a predetermined range by appropriately performing air conditioning.
As a technology for cooling an inside of a room in which a large number of computers are installed as in the data center, the following has been proposed. An inside of the data center is composed to be partitioned into two spaces, which are: an air supply-side space (cold area) to the servers; and an air exhaust-side space (hot area) therefrom, a cold air is blown into the cold area by an air supply fan, and airflow is formed so that a warm air warmed as a result that the cold air in the cold area is sucked by fans in the servers can be blown out to the hot area.
With such a configuration, a temperature gradient in such an area of the room inside is reduced, and in addition, variations in an air supply temperature are reduced, whereby air conditioning control with a high energy saving effect and good efficiency can be performed.

Server room managing air conditioning system and air conditioning control method


A circuit for generating equalization pulses for a memory device is disclosed, which prevents formation of a short circuit between a Vdd potential and a Vss potential when two address transition signals are successively generated, and which generates the equalization pulses by using address transition pulses and by reducing the access time of the memory device. The equalization pulse generating circuit includes a NAND circuit section for outputting a NAND logic of address transition signals under address transitions to an equalization pulse generating node, a delay circuit section for delaying an output of the equalization pulse generating node for a certain period of time, so as to generate at least one delayed output signal, and a maintaining circuit section for logically processing the delayed output signal of the delay circuit section and the NAND logic output of the NAND circuit section, so as to maintain the state of the equalization pulse generating node in the same state for a certain period of time.

Recently, memory devices accommodate higher and higher frequency signals, and in this context, it is required that the input and output be driven without noise or delay even if the address transition becomes faster. An I/O line equalization circuit is used almost in every memory device for optimizing the equalization time when an address transition signal is generated to output an equalization pulse.
However, the equalization pulse generator which is used in the conventional memory device is unsuitable in the equalization time for the case where the address transition is fast. Therefore, it became an unstabilizing problem in driving the I/O line.
An address transition pulse generating circuit is used in the conventional memory devices as disclosed in U.S. Pat. No. 4,614,883.
As shown in FIG. 1, the equalization pulse generating circuit is constituted as follows. That is, a Plurality of MOS transistors are connected to address transition signals. Thus, if the address transition signal is shifted, then an EQ signal is formed, so that the I/O lines would be equalized.
FIG. 2 is a timing chart for the equalization pulse generating circuit for the conventional memory devices.
The conventional technique will be described referring to FIGS. 1 and 2.
As shown in FIG. 1, this conventional circuit includes a first NOR circuit section A consisting of five transistors Q(A), Q(B), Q(C), Q(D) and Q(E);
a second NOR circuit section B consisting of inverters INV(A), INV(B), INV(C) and INV(D), NAND gates ND(A) and ND(B), and a NOR gate NOR(A);
a latching section C consisting of two inverters INV(E) and INV(F);
a charging section D consisting of a NAND gate ND(C), an inverter INV(G) and two transistors Q(F) and Q(G);
a delay circuit section E consisting of an inverter INV(H), a delay circuit T and a NOR gate NOR(B); and
an inverter INV(I).
In the first NOR gate circuit section A, the gate of the transistor Q(A) is connected to an inverted chip selecting signal CSD, and the gate of the transistor Q(B) receives an address transition signal ATXO. Further, the gate of the transistor Q(C) receives an address transition signal ATX1, and the gate of the transistor Q(D) receives an address transition signal ATX2, while the gate of the transistor Q(E) receives an address transition signal ATX3. The sources of the transistors Q(A), Q(B), Q(C), Q(D) and Q(E) are all connected to Vss, while the drains of these transistors are connected to a node N1.
In the latching section C, the input terminal of the inverter INV(E) is connected to the node N1, and the output terminal of the inverter INV(E) is connected to the input terminal of the inverter INV(F), while the output terminal of the inverter INV(F) is connected to the node N1 in turn.
In the second NOR circuit section B, the input terminal of the inverter INV(D) is connected to an address transition signal ATXO, while the input terminal of the inverter INV(C) is connected to an address transition signal ATX1. Further, the output terminal of the inverter INV(D) and the output terminal of the inverter INV(C) are connected respectively to the two input terminals of the NAND gate ND(A). The input terminal of the inverter INV(B) is connected to an address transition signal ATX2, while the input terminal of the inverter INV(A) is connected to an address transition signal ATX3. Further, the output terminals of the inverters INV(A) and INV(B) are connected respectively to two input terminals of the NAND gate ND(B). Further, the output terminals of the NAND gates ND(A) and ND(B) are connected respectively to two input terminals of the NOR gate NOR (A), while an output signal INH of the NOR gate NOR(A) is connected to the charging section D.
The input terminal of the inverter INV(I) is connected to the node N1, while the output terminal of the inverter INV(I) generates equalization pulses EQ.
In the delay circuit section E, the input terminal of the inverter INV(H) is connected to the output terminal of the inverter INV(I), and the output terminal of the inverter INV(H) is connected to the input terminal of the delay device T. The chip selecting signal CSD and the output terminal of the delay device T are connected to two input terminals of the NOR gate NOR(B), while the output signal SRE of the NOR gate NOR(B) is connected to the charging section D.
In the charging section D, the output terminal of the NOR gate NOR(A) of the second NOR circuit section B and the output terminal of the NOR gate NOR (B) of the delay circuit section E are connected respectively to two input terminals of the NAND gate ND (C) . The output signal RE of the NAND gate ND(C) is connected to the input terminal of the inverter INV(G) and to the gate of the transistor Q(F). The source of the transistor Q(F) is connected to Vdd, and its drain is connected to the node N1. The output terminal of the inverter INV(G) is connected to the gate of the transistor Q (G), and the drain of the transistor Q(G) is connected to Vdd, while its source is connected to the node N1.
The conventional circuit constituted as described above operates in the following manner.
When the chip selecting signal is enabled in a state where the address transition did not occur, the initial values are as follows.
As shown on the left side of FIG. 2, when a chip selecting signal is generated as the signal CSD being shifted from high to low, the output of the NOR gate NOR(B) becomes high, and therefore, the signal SRE becomes high. Since the four address transition signals are all low, the outputs of the NAND gates ND(A) and ND(B) become low. Consequently, the inputs of the NOR gate NOR(A) become all low, with the result that the output signal INH of the NOR gate NOR(A) becomes high.
The two signals INH and SRE which are inputted into the NAND gate ND(C) are all high, and therefore, the output signal RE of the NAND gate ND(C) becomes low. Therefore, the node N1 comes to have a potential of Vdd.
When the high signal of the node N1 passes through the inverter INV(I), the output signal EQ becomes low. This signal is inverted by the inverter INV(H), and the inverted signal is supplied to the input terminal of the NOR gate NOR(B) after being delayed for a certain time period by the delay device T. Therefore, the signal SRE becomes low again after a certain time period. This low signal is supplied to the input terminal of the NAND gate ND(C), and therefore, the signal RE becomes high.
Therefore, as described above, the initial values become as follows. That is, the node N1 becomes high, the signal EQ becomes low, the signal SRE becomes low, the signal RE becomes high, and the signal INH becomes high.
First, in the case where the address transition signal ATXO is high, the circuit operates in the following manner.
When the address transition signal ATXO becomes high at a position "A", the transistor Q(B) is turned on, with the result that the node N1 comes to have a potential Vss. This signal is inverted by the inverter INV(I), with the result that the output signal EQ becomes high.
The address transition signal ATXO is inverted by the INV(D) so as to become low, and this signal is connected to the input terminal of the NAND gate ND (A). If any one of inputs for a NAND gate is low, then its output becomes high. Therefore, the output of the NAND gate ND (A) becomes high so as to be supplied to the input terminal of the NOR gate NOR(A). If any one of inputs for a NOR gate is high, then its output becomes low, and therefore, the output of the NOR gate NOR(A) becomes low. Thus the signal INH becomes low.
The high signal which is outputted from the inverter INV(I) is inverted by the inverter INV(H) so as to become low, and then, passes through the delay device T. Therefore, the output of the delay device T is maintained in a high state until the signal EQ is inverted and passes through the delay device T. The output of the delay device T becomes low after the elapsing of the delayed time. Therefore, the signal which has passed through the delay device T becomes high at a time "A", and becomes low at a time "B" shown in FIG. 2.
The signal which has passed through the delay device T is inputted into the NOR gate NOR(B) together with the chip selecting inverted low signal CSD. Thus the signal SRE which is an output of the NOR gate NOR(B) is maintained at a low level as much as the delayed time period of the delay device T.
If the signal SRE is low, the input of the NAND gate ND(C) becomes high. This means that the PMOS transistor Q(F) and the NMOS transistor Q(G) are all in a turned-off state, and therefore, the potential of the node N1 becomes low.
Under this condition, the address transition signal ATXO has become low, while the equalization pulse EQ is an inverted signal of the node N1. Therefore, it maintains a high state up to a time "B" at which the signal SRE becomes high.
The signal SRE becomes high at the time "B" after being delayed, while the signal INH becomes high from the moment when the address transition signal ATXO becomes low. Therefore, the two signals which are inputted into the NAND gate ND(C) become high, with the result of the signal RE becoming low.
The transistor Q(F) is turned on by the low signal RE, and the signal RE is inverted by the inverter INV(G). Consequently, the transistor Q(G) is turned on, and the node N1 becomes high.
If the node N1 becomes low, the signal EQ is outputted as inverted, i.e., with a low level.
Next, in the case where address transition signals are generated with a short time interval, the circuit operates in the following manner.
The address transition signal ATXO returns to a low level at the time "B" of FIG. 2. Further, the signal EQ is high, and the address transition signal ATXO is low. Therefore, when the signal SRE becomes high in a state with the signal INH in a high level, the node N1 is shifted to a potential of vdd. If another address transition signal ATX1 becomes high at the time "B", the transistor Q(C) is turned on, so that the node N1 would be connected to a potential of Vss. That is, the node N1 is simultaneously connected to the potential Vdd and the potential Vss, with the result that the power source is short-circuited.
Therefore, the address transition signal ATX1 becomes high, with the result that the signal INH becomes low, and that the signal RE becomes high, thereby turning off the transistors Q(F) and Q(G). Under this condition, until the node N1 is prevented from becoming a Vdd potential, and at the time point when the address transition signal ATX1 becomes high, the node N1 makes a dc current flow from a Vdd potential to a Vss potential during the delayed time.
If the next address transition signal ATX1 is shifted to a high state in a fast manner, the node N1 causes a short-circuit between the power sources. Therefore the conventional equalization pulse generating circuit loses its effectiveness.

Equalization pulse generating circuit for memory device


This semiconductor memory device comprises a semiconductor substrate, a plurality of tunnel insulator films formed on the semiconductor substrate along a first direction and a second direction orthogonal to the first direction with certain spaces in each directions, a plurality of charge accumulation layers formed on the plurality of tunnel insulator films, respectively, a plurality of element isolation regions formed on the semiconductor substrate, the plurality of element isolation regions including a plurality of trenches formed along the first direction between the plurality of tunnel insulator films, a plurality of element isolation films filled in the plurality of trenches, a plurality of inter poly insulator films formed over the plurality of element isolation regions and on the upper surface and side surfaces of the plurality of charge accumulation layer along the second direction in a stripe shape, a plurality of air gaps formed between the plurality of element isolation films filled in the plurality of trenches and the plurality of inter poly insulator films and a plurality of control gate electrodes formed on the plurality of inter poly insulator films.

1. Field of the Invention
The present invention relates to a semiconductor memory device and its fabrication process.
2. Description of the Related Art
In NAND type non-volatile semiconductor memory device, bit lines and word lines are arranged to extend to intersect with each other. Memory cells are formed in each region in which one of the bit lines and one of the word lines intersects each other. A memory cell comprises a tunnel insulator film, a floating gate, inter-poly insulator film, and a control gate laminated in this order. STIs(Shallow Trench Isolation), comprising element isolation trenches and element isolation films, are formed between adjacent memory cells next to word line direction.
Silicon dioxide is one of the materials used for the element isolation film. As the distance between memory cells decrease with the design rule reduction, a parasitic capacitance between neighboring floating gates increases. It causes a cell interference problem between neighboring cells and leads to a mal-functioning of the device.
To reduce the parasitic capacitance and fix this problem, air gaps in STIs are proposed by using a poor coverage silicon oxide film for filling of the element isolation trenches.
With this structure, inter poly insulator films and control gate electrodes do not cover side walls of floating gate electrodes. That causes another problem of reducing a coupling ratio between floating gate electrodes and control gate electrodes.

Semiconductor memory device and manufacturing method thereof


A connector assembly includes a housing with a terminal cavity and a terminal lock adapted to retain an electrical terminal in the terminal cavity. A terminal position assurance is attached to the housing and engages the terminal lock. The connector assembly also includes a protector plate with a protector body having a front plate face and an opposed back plate face. Terminal openings pass through the protector body. A plurality of staged locks are attached to the protector body for relative rotational movement. The staged locks extending beyond the front plate face and also extending beyond the back plate face. The protector plate is movable relative to the housing in a mate direction from a pre-stage position to a pre-lock position. The protector plate is retained in the pre-lock position relative to the housing against further movement in the mate direction by a staged lock.

This invention relates in general to an electrical connector. More specifically, this invention relates to an electrical connector with a protector plate for male electrical terminals.
An electrical connector assembly is typically used to provide simultaneous and reliable connections between multiple electrical terminals. The electrical connector assembly normally includes a first (such as a male) connector assembly and a second (such as a female) connector assembly that support respective pluralities of complementary electrical terminals that are mated when the male and female connector assemblies are mated. An example of such an electrical connector assembly is described in U.S. Pat. No. 10,218,124.
The electrical connector assembly described in the '124 patent is configured to accommodate multiple electrical terminals of various sizes, including multiple relatively small electrical terminals. It is desirable to have an electrical connector assembly that helps protect the electrical terminals from damage during assembly and use of the electrical connector assembly.

Electrical connector assembly with protector plate


A synchronization method by a device is provided in a device-to-device direct communication. The device receives synchronization signals from a plurality of other devices at a current frame, and estimates a synchronization time at a next frame based on the synchronization signals received from the other devices.

(a) Field of the Invention
The present invention generally relates to a synchronization method and apparatus for a device-to-device direct communication.
(b) Description of the Related Art
Conventional wireless communication systems use a master-slave synchronization scheme. In the master-slave synchronization scheme, one device becomes a master and transmits a reference signal, and the other devices adjust reference times based on the reference signal transmitted by the master. In a cellular system, a base station always operates as the master. However, because a direct communication between terminals can be performed under a circumstance where the base station does not exist, the master-slave synchronization scheme is not suitable for the cellular system.
In an ad-hoc network where there is no base station for operating as the master, the terminal senses carriers using a carrier sense multiple access (CSMA) scheme, and performs back-off during a predetermined time. After a timer expires, the terminal becomes the master and transmits a reference signal. In this case, consumption of resources for performing the back-off is inevitable. Furthermore, a terminal between the two master terminals may simultaneously receive two reference signals having the different synchronizations. Then, the terminal may encounter near-far problem increasing the interference.

Synchronization method and apparatus in device-to-device direct communication

ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE


Firearm magazine loader, associated components, and methods of use. The loader can be configured to load rounds of ammunition from a stripper clip into a firearm magazine. A stripper clip ejector can eject stripper clips from the loader. An ammunition transfer tool can be used for loading rounds of ammunition not on a stripper clip into the firearm magazine loader.

Various types of firearms including rifles and handguns are configured to receive a magazine for feeding rounds of ammunition to a firing mechanism of the firearm. There are many types of firearm magazines, some of which are adapted to hold only a few rounds of ammunition, and others of which are adapted to hold tens to hundreds of rounds of ammunition. Loading ammunition into a magazine is conventionally performed by grabbing rounds by hand one at a time and positioning them individually into the magazine. This process can be time consuming, depending on the type and size of the magazine. In addition, this process can be tedious and cause hand fatigue.
There are various types of loaders which may be used to assist in loading ammunition into a magazine. Although existing loaders are an improvement over loading a magazine by hand, additional improvements are needed.


A cloud scraping system using pre-scraped big data includes an information providing server which, when receiving a scraping request from a user terminal, provides the user terminal with response information to the received scraping request, and a big data storage which stores pre-scraped information, wherein when the scraping request is about static information, the information providing server acquires the response information using the pre-scraped information. According to the above cloud scraping system using pre-scraped big data, there is an advantage that it is possible to quickly respond to a scraping request from the user terminal afterwards by pre-scraping and storing static information in the big data storage. Additionally, it is possible to improve the scraping server operation efficiency by making a proper use of a single or multi-processing scraping server based on policy information of a scraping target external institution.

Recently, with the development of Information & Communication Technology (ICT), various scraping techniques are used to acquire information stored in external institutions. Scraping includes screen scraping involving accessing a financial institution server and extracting only necessary data from data displayed on the screen, and data scraping involving accessing a financial institution server and parsing necessary data from information provided by the financial institution and receiving it.
Meanwhile, recently, cloud scraping referring to scraping using a scraping server is widely used. However, because this cloud scraping technology performs scraping for each scraping request from a user, the throughput increases with the increasing number of scraping requests or the increasing types of requested scraping target external institutions.

Apparatus, method and computer program for cloud scraping using pre-scraped big data