An embodiment of the present invention provides an apparatus, comprising a first half cell comprising a circuit with two or more voltage variable capacitors (VVCs) configured in anti-series in which one or more of the two or more VVCs with the same bias voltage orientation as a signal voltage associated with the apparatus assume one capacitance and one or more of the two or more VVCs with the opposite bias voltage orientation as the signal voltage assume another capacitance, and a second half cell connected in parallel to the first half cell, comprising a circuit with two or more VVCs configured in anti series in which one or more of the two or more VVCs with the same bias voltage orientation as a signal voltage associated with the apparatus assume the same values as the anti-oriented VVCs in the first half cell and a one or more VVCs with the opposite bias voltage orientation as a signal voltage assume the same values as the like oriented VVCs in the first half cell.

Voltage Variable Capacitors (VVCs) such as varactor diodes or voltage tunable dielectric capacitors are devices whose capacitance changes as a function of the applied voltage. This makes them useful in circuits such as voltage-controlled oscillators or voltage controlled matching networks where a tuning or bias voltage is applied to bring the VVC to the capacitance required for the circuit to work with a signal voltage, typically a modulated AC signal.
When the amplitude of the AC signal is not much less than the bias voltage, it itself affects the capacitance as it goes through a cycle. The capacitance is no longer constant and so a perfect sine wave applied to the capacitance is no longer a perfect sine wave but contains harmonics. In the presence of more than one sine wave, there are also mixing products while a modulated signal will experience spectral regrowth. Harmonics will be generated in the circuit as shown in FIG. 1, shown generally as 100, where VS 120 is a perfect sinusoidal voltage source and VB 110 is the applied bias voltage.
Rw 130, the impedance of the voltage source, is of the same order of magnitude as the impedance of the VVC at the signal frequency, i.e., 1/(ω·C), where ω is the angular frequency (2×π×frequency in Hz) of the signal voltage and C is the capacitance of the VVC. The DC feed is a means of applying the DC bias voltage VB 110 to the VVC so that it attains the desired capacitance without providing a connection to ground for the signal voltage and thus affecting the AC characteristics of the circuit. The DC feed could be implemented in a number of ways, such as with a resistor Rb that is much greater than 1/(ω·C) but much less than the DC leakage resistance of the VVC, or with an inductor of a value L such that its impedance ω·L is much greater than 1/(ω·C).
Thus, there is a strong need for an invention that would eliminate this non-linear behavior and make the capacitance of the VVC dependent on the bias voltage VB 110 but independent of the AC voltage VS 120.

Low-distortion voltage variable capacitor assemblies


Visual incongruity in search result sets may be reduced at least in part by searching an optimized visually significant subset of a category tree that categorizes a collection of content. The category tree may be optimized at build time at least in part by pruning with respect to visual coherence and by the size of the content collection subset referenced by particular categories. Content collection subset sizes both too large and too small can detract from the visual significance of a particular category. The visually significant subset of the category tree may be further optimized at query time by intersecting the visually significant subset with the query-associated sub-tree(s) and further pruning categories in the visually significant subset that have child categories in the visually significant subset. Searching with respect to the optimized visually significant subset can also improve search efficiency.

It has become possible to conduct computer-assisted searches of large image collections to find a set of images that matches some query image. However, conventional image matching techniques have various shortcomings. For example, some conventional image matching techniques find matches between images that appear incongruous to human eyes. One type of incongruous match occurs when images in a matching set are selected from incongruous categories. For example, a matching set with respect to an image of women's shoes may incorrectly include images of men's shoes, or a matching set with respect to an image of a tennis shoe might include an image of a soccer shoe. Some conventional image matching techniques provide for search restriction by pre-defined category, or with respect to a set of keywords, without reliably, efficiently and/or effectively reducing the occurrence of such incongruous matches.
Same numbers are used throughout the disclosure and figures to reference like components and features, but such repetition of number is for purposes of simplicity of explanation and understanding, and should not be viewed as a limitation on the various embodiments.


An angle adjustable car reading lamp having a housing to deposit a case-like frame covered with are movable light penetrating plate and an upper cap to close an open top of the housing, the housing having a semi-roundly curved conductive plate fixed on an inner side wall bored with small grooves for an elastic conductive plate fixed on the frame to fit in one of the grooves to secure the frame at one of a plurality of adjustable andles when the frame is rotated to the right or the left.

A conventional car reading lamp shown in FIG. 1 comprises a base 1, an upper cap 2 and a lamp plate. The upper cap 2 has a central opening 20, a projection 21 (22) respectively on two opposite side walls defining the central opening 2 to fit in a hole 30 (31) to enable the light plate 3 to swing up or down pivotally with the projections 21, 22 as pivots. So the angle of the lamp plate 3 can be changed. Then the base 1 and the upper cap 2 are combined tightly with screws. However, this conventional car reading light has no means to secure the lamp plate 3 at an angle when the lamp plate 3 rotates to the right or to the left, so the angle of the reading lamp is liable to change because of a bumping or a sudden stop when a car is running.

No. 2-4, Shih Tzyy Kuoo, Shan Shahng Shiang


A system and method for combining RF signals by a series of in-phase combiners. The system uses a series of switched, high efficiency amplifiers which may be selectively operated to obtain a desired output signal, such as an Amplitude Modulated (AM) signal. The output signals of the amplifiers are combined by a series of in-phase combiners. In a high linearity system a feedback loop is used to correct for combiner losses. The RF power normally lost in the combiners is recovered and available to increase the overall combiner efficiency.

The present invention relates to radio frequency (RF) amplifiers and particularly to a system for amplifying high power RF signals and to recovering a portion of the signal power normally lost in prior art signal amplifying and combining systems.
Many current communication systems, whether they are used for transmitting analog data or digital data, employ high power RF amplifiers as part of the signal transmission or transponder sections of the system. Frequently, the information to be communicated by these systems is transmitted through the technique of amplitude modulation, AM. Usually, AM refers to full carrier amplitude modulation containing the information to be transmitted (and received) but it should be understood herein that any modulation system which causes the instantaneous composite amplitude of the waveform to be varied in accordance with the information transmitted may be termed an AM system. Single-sideband signals can also be generated by this system using the well known technique of envelope elimination and restoration (EER). Kahn, L. R.: "Single-Sideband Transmission by Envelope Elimination and Restoration", Proc. IRE, 1952, 40, pp. 803-806.
The AM signal to be broadcast may be generated in many ways. In one way, as disclosed in U.S. Pat. No. 4,580,111 to Swanson, an amplitude modulator generates an amplitude modulated carrier signal by selectively combining varying numbers of other carrier signals. Swanson also discloses a circuit which provides plural carrier signals of like frequency and phase where the number of carrier signals provided is dependent upon the number of digital levels chosen. Swanson uses a combiner made up of a plurality of transformers to combine the plural carrier signals and provide a combined signal which is the desired amplitude modulated carrier signal. Other combiner circuits are also disclosed by Swanson, including: voltage addition combiners, current addition combiners, and transmission line combiners. Various of Swanson's embodiments combine carrier signals which are equal in magnitude, carrier signals which are weighted in a binary progression, and, carrier signals which have been frequency modulated.
In another prior art system, disclosed in U.S. Pat. No. 4,804,931 to Hulick, the amplitude modulator comprises a predetermined number of quadrature power hybrid devices configured as combiners and arranged in cascade so that the output of one combiner becomes one of the inputs of its adjacent combiner. A digital decoder responsive to a digital input signal controlled the inputs ports of the combiners. By selectively enabling the RF signal to the various input ports the combined signal a the output of the last of the cascaded combiners represents the desired output signals, which my be fed to an antenna for transmission. The use of quadrature combiners in systems such as those disclosed by Hulick often are inefficient because of losses in the quadrature combiners. (Theoretically 50 percent of the power is lost at one-quarter power out.) For example, if the amplitude of the two signals appearing at the input ports to the combiners are not the same, the output signal will be less than the sum of the two input signals, the balance being reflected back and/or being absorbed by the resistor at the isolated port (i.e., a dummy or reject load). Such systems often have their best efficiency when all the input ports are loaded, a condition which occurs only at the maximum peak power output.
It is accordingly an object of the present invention to provide a novel digital amplitude modulator with improved power efficiency.
It is a further object of the present invention to provide a novel method and apparatus for combining in-phase RF signals.
It is yet another object of the present invention to provide an RF signal combiner in which the output signal tracks the input signal in a linear fashion.
It is still another object of the present invention to provide an RF signal combiner in which portions of the RF signal normally lost due to input signal mismatches can be recovered and used to reduce combiner power losses.
These and other objects of the present invention will become apparent to those skilled in the art from a review of the following specification in conjunction with the drawing figures when accorded a full range of equivalents.

In-phase combiner and RF recovery system


An endoscope having an insertion section to be inserted into a tubular cavity, an observation lens provided in a distal end of the insertion section, and a rounded distal portion protruding from the distal end of the insertion section in the insertion direction. The observation lens is positioned with its center displaced from the forewardmost tip of the rounded distal portion.

1. Field of the Invention
The present invention relates to an endoscope for medical use.
2. Description of the Related Art
Generally, an endoscope for medical use comprises an insertion section and an operation section. The insertion section is designed to be inserted into a patient's body cavity. The operation section is coupled to the proximal end of the insertion section.
FIGS. 41A and 41B are front and sectional views of the distal portion (a) of the insertion section of the endoscope disclosed in Japanese UM Appln. KOKAI Publication No. 64-36816. As seen from FIGS. 41A and 41B, the distal portion (a) has front (b), in which an illumination window section (c) and an observation window section (e) are provided. The illumination window section (c) incorporates an illumination lens (d). The observation window section (e) incorporates an observation lens (f), a washing nozzle (g), a forceps channel (h) and the like.
As shown in FIG. 41B, the front (b) of the distal portion (a) is rounded. The observation lens (f) is fitted in the outermost part of the front (b). The light emitted through the illumination lens (d) is therefore prevented from reaching the observation lens (f). This eliminates the possibility that the image observed through the endoscope has flare or ghost. Since the front (b) is rounded, the distal portion (a) can be smoothly inserted into a body cavity.
In order to minimize the outside diameter of the distal portion (a), the illumination lens (d), observation lens (f), washing nozzle (g), forceps channel (h) and the like are arranged as close as possible to one another, as is illustrated in FIG. 41A. Consequently, the observation lens (f) is not aligned with the axis (O) of the distal portion (a). The outermost part of the rounded front (b), in which the lens (f) is fitted, is therefore located off the axis (O) namely aligned with the axis (Oe) of the observation lens (f). Consequently, the front (b) has a part (i) which has a radius of curvature less than any other part. This part (i) is more likely to be caught in the wall of a body cavity than any other part as the distal portion (a) is inserted into the body cavity. This would be a bar to smooth insertion of the insertion section.
To achieve smooth insertion of the insertion section, the front (b) of the distal portion (a) may be rounded as shown in FIG. 41D with a large radius (R) of curvature, having no part of a small radius of curvature. The front (b) can be so rounded by aligning the observation lens (f) with the axis (O) of the distal portion (a) as is shown in FIGS. 41C and 41D. If the lens (f) is aligned with the axis (O), however, the other components incorporated in the front (b), i.e., the illumination lens (d), washing nozzle (g), forceps channel (h) and the like, must be located around the observation lens (f) as shown in FIG. 41C. They are spaced apart from the lens (f) which is positioned at the center of the front (b). Consequently, the outer diameter of the distal portion (a) increases as is clearly seen from FIGS. 41A and 41B.


A multicast communication system in which a receiving node which has detected a packet loss can make a retransmission request without applying a high load to a transmitting node, all receiving nodes, and the band of the entire network. The transmitting node transmits an explicit multicast data packet including an address list including a plurality of destination addresses and a bitmap indicating whether the data packet has been delivered to the respective destination addresses, to a plurality of the receiving nodes. The receiving node which has detected the packet loss checks an address list and bitmap of another data packet received and selects a receiving node to which the another data packet has been delivered as a retransmission requester. The receiving node which has detected the packet loss creates a unicast retransmission request packet with the selected receiving node as the destination and transmits it to the selected receiving node.

With the rapid development of networks in recent years, opportunities have increased for one transmitting node to transmit the same packet to a plurality of receiving nodes, as in the case of video conferencing, network gaming, and so forth. In such cases, a transmitting node often performs distribution by means of multicast communication, which enables the same packet to be transmitted efficiently to all receiving nodes. For example, a transmitting node divides receiving nodes comprising packet distribution destinations into groups composed of around ten receiving nodes, and distributes a packet to each group by means of multicast communication.
One communication method that performs multicast communication on a group-by-group basis is an explicit multicast method. With an explicit multicast method, a transmitting node explicitly specifies all receiving nodes by entering the addresses of all the receiving nodes in a group in a packet option header or pilot. A typical explicit multicast method is XCAST (Explicit Multicast) (see Non-patent Document 1).
Generally, when multicast communication is performed to receiving nodes in the same group, all packet relay apparatuses (hereinafter referred to as "routers") in a route must be compatible with multicast communication However, with an explicit multicast method, a transmitting node can distribute a packet to all receiving nodes whose addresses are entered in the packet even if all routers in a route are not compatible with an explicit multicast method. At this time, a bit sequence (hereinafter referred to as "bitmap") in the packet header performs management of whether or not the packet has been distributed for each receiving node.
Here, a packet distribution method in explicit multicast communication will be described separately for a case in which all routers in a route are compatible with an explicit multicast method, and a case in which they are not. A packet is also distributed to all receiving nodes by means of the same kind of distribution method when only some of the routers in a route are compatible with an explicit multicast method.
On receiving a packet from another node, a router that is compatible with an explicit multicast method (hereinafter referred to as "compatible router") searches the unicast route table of the router for all destination addresses entered in the packet option header or pilot to check a transmission interface corresponding to each destination address. Next, the compatible router duplicates the packet a number of times equivalent to the number of transfer destination interfaces, and transmits a packet corresponding to each interface. At this time, the compatible router scans a bitmap in the header for each duplicated packet, and adds a distribution-completed mark to a bit corresponding to a receiving node not included in the transfer destination interfaces. Furthermore, the compatible router rewrites a destination address entered in the IP header as a destination address of a distribution-unperformed receiver. Through repeated packet duplication and transmission by compatible routers in a route in this way, a packet is distributed to all receiving nodes.
Meanwhile, a router that is not compatible with an explicit multicast method (hereinafter referred to as "non-compatible router"), on receiving a packet from another node, does not reference a destination address entered in the packet option header or pilot, but transmits a packet in the same way as in ordinary unicast communication by searching the unicast route table of the router for a destination address entered in the IP header. On receiving a packet, a receiving node scans a bitmap in the header, and checks for the presence of a distribution-unperformed destination address. If there is a distribution-unperformed destination address, the receiving node duplicates a packet in which the IP header destination address has been rewritten as a distribution-unperformed destination address, and transmits this to a router. At this time, the receiving node adds a distribution-completed mark to a bit corresponding to itself contained in the bitmap. By having a receiving node that has received a packet transmit the received packet to a router again in this way, a packet is transferred to all receiving nodes. This kind of distribution is called "daisy-chain distribution".
Using the above approach, a packet can be distributed to all receiving nodes by means of an explicit multicast method even if not all routers in a route are compatible with an explicit multicast method. Therefore, if an explicit multicast method is used, multicast communication can be performed using the Internet without replacing all routers in a route on the Internet with compatible routers.
Generally, in the event of congestion or the like in network communication, a packet traveling on the network may be lost (hereinafter referred to as "packet loss"). If a packet loss occurs in communication in which data must not be lost, such as a file transfer, a receiving node requests the transmitting node to retransmit a packet for which a packet loss occurred. However, in multicast communication, if all receiving nodes detecting a packet loss make a retransmission request to the transmitting node, there is a problem of an increased load on the transmitting node that receives the transmission requests, which affects normal communication. The following two methods whereby a receiving node makes a retransmission request to a node other than the transmitting node have been disclosed as solutions to this problem.
The first method is to provide an intermediate node for retransmission in a network. A receiving node that detects a packet loss makes a retransmission request to an intermediate node using multicast communication. An intermediate node that receives a retransmission request retransmits a packet to the receiving node that made the retransmission request using unicast communication or multicast communication (see Patent Document 1, for example).
The second method is to make a retransmission request without providing an intermediate node in a network. A receiving node that detects a packet loss waits for a random time before making a retransmission request to all receiving nodes by means of multicast communication. A receiving node that receives a retransmission request transmits a retransmission packet by means of multicast communication in accordance with a predetermined probability. If a receiving node receives a retransmission packet from another receiving node before retransmitting a packet itself, it does not transmit a retransmission packet despite receiving a retransmission request. Also, even if a receiving node detects a packet loss, it does not transmit a retransmission packet if a retransmission packet arrives by means of multicast communication during the wait time until transmission of a retransmission request (see Non-patent Document 2, for example).
Receiving nodes using these methods cannot know the IP address of another receiving node participating in multicast communication. Therefore, a receiving node that detects a packet loss transmits a retransmission request packet to another node using multicast communication, not unicast communication.
Through the use of these methods, even if a packet loss occurs in multicast communication, a receiving node can make a retransmission request to another node (intermediate node or receiving node) without imposing a load on the transmitting node.
Patent Document 1: Japanese Patent Application Laid-Open No. 2001-103051
Non-patent Document 1: Y. Imai, M. Shin and Y. Kim, "XCAST6: eXplicit Multicast on IPv6", IEEE/IPSJ SAINT2003 Workshop 4, IPv6 and Applications, Orland, January 2003.
Non-patent Document 2: Sally Floyd, Van Jacobson, Ching-Gung Liu, Steven McCanne and Lixia Zhang, "A Reliable Multicast Framework for Light-weight Sessions and Application Level Framing", IEEE/ACM Transactions on Networking, Vol. 5, No. 6, December 1997.

Communication terminal and retransmission request method


In one aspect, the invention provides a transgenic non-human animal model having germ cells and somatic cells containing an endogenous MMTV-SV40-Spy1A gene sequence introduced into said animal model or an ancestor of said animal model at an embryonic stage, wherein said gene sequence comprises a mouse mammary tumor virus gene (MMTV), a functionally disrupted SV40 gene (SV40) and a human Spy1A gene. In another aspect, the present invention provides a transgenic non-human animal model whose germ cells and somatic cells contain an endogenous Spy1A-pTRE-Tight gene sequence introduced into said animal model or an ancestor of said animal model at an embryonic stage. Preferably, the Spy1A-pTRE-Tight animal model expresses the Spy1A gene and develop cancer, preferably breast cancer, when administered with tetracycline, preferably doxycycline.

Amid all cancers known to afflict the Canadian population, breast cancer (BC) is documented as the second leading cause of cancer deaths among females. Current knowledge of the molecular signatures and biochemical pathways that govern BC initiation and progression is far from comprehensive and requires further expansion in order to identify putative biomarkers that undoubtedly predict the correct therapeutic course of action to take with each patient. Due to the heterogeneous nature of cell types which cooperate to form a functional post-natal mammary gland, the various clinical forms of BC that may arise are currently distinguished based on prognostic criteria such as histological phenotype, steroid and growth factor receptor status, and tumor ability to metastasize to neighbouring lymph nodes. In order to fully understand the various molecular mechanisms underpinning the evolution of mammary tumorigenesis, post-pubertal mammary gland development is often looked upon to highlight critical signaling pathways that possess the inherent capacity to mutate and/or become deregulated in BC. Once maturity is established, the adult virgin mammary organ retains the ability to cycle through four development stages: virgin, pregnancy, lactation, followed by involution and reversion to a virgin-like state. During early pregnancy-induced lobuloalveolar development, elevated expression of prolactin, placental lactogens, and progesterone results in escalated rates of luminal epithelial proliferation, and promotes functional differentiation of alveolar precursor cells into specialized structures proficient in milk release. Parturition-induced lactogenesis functions to nourish neonates through alveolar milk production and secretion of colostrums into enlarged luminal ducts. Neonate weaning initiates extensive luminal alveolar cell death (apoptosis) and epithelial remodelling during involution, a process lasting for several days to allow for reinstatement of the mammary gland to a virgin-like appearance.

MMTV-SV40-Spy1A and Spy1A-pTRE transgenic mouse models


A fuel delivery system comprises a fuel rail having a flow channel therein. The fuel delivery system further comprises a fuel injector cup that includes a base at a first end thereof, an opening at a second end thereof opposite the first end, and an inner cavity disposed between the base and the opening. The first end of the fuel injector cup is configured to be disposed within the flow channel of the fuel rail. The fuel delivery system further comprises a heating element. The fuel rail of the fuel delivery system further includes a port therein that is configured for receiving the heating element. Additionally, the fuel injector cup of the fuel delivery system further includes an aperture therein also configured for receiving the heating element.

Fuel delivery systems for various vehicular applications, such as, for example, fuel-injected engines used in various types of on-road and off-road vehicles, typically include one or more fuel rails having a plurality of fuel injectors and fuel injector cups associated therewith. Some of these applications utilize fuel having a high alcohol content. For example, engines for certain automobiles and light trucks may operate on 100% ethanol fuel.
One downside of using this type of fuel is that in certain conditions (e.g., cold weather) the engine may be difficult to start due to the temperature of the fuel. One attempt at combating the "cold-fuel" problem involves heating the fuel before it is supplied to the fuel injector upon the starting of the engine.
For example, one known system includes a fuel rail having a plurality of outlets and a equal number of fuel injector cups associated with the outlets. When assembled, each fuel injector cup has a fuel injector disposed therein. Fuel from the fuel rail is communicated through the respective outlet to the fuel injector inlet disposed within the injector cup. To heat the fuel in this system, a separate component is affixed to the inner surface of the fuel rail proximate each outlet to create a heating chamber or volume for that particular outlet. A heating element is positioned within the chamber, and the component is configured to allow fuel from the flow channel of the fuel rail to flow into the chamber. Accordingly, the heating element heats the fuel in the chamber, and that fuel is then supplied to the fuel injector disposed within the injector cup corresponding to the respective outlet. Accordingly, a small volume of fuel is heated and supplied to the corresponding fuel injector to improve quick startability.
Such systems are not without their disadvantages, however. For example, in the system described above, the heating-chamber component is an additional component that must be added to the system. As such, the cost increases and the manufacturability of the system becomes more difficult. Additionally, the interface between the heating-chamber component and the inner surface of the fuel must be sealed to avoid the intrusion of cold fuel into the heating chamber. Again, this results in additional components being required, and accordingly, the cost and difficulty of manufacturability increases.
Therefore, there is a need for a fuel delivery system that will minimize and/or eliminate one or more of the above-identified deficiencies.

Fuel delivery system for heating fuel therein


The invention provides methods for treating a subject afflicted with a memory impairment or a cognitive dysfunction. Additional methods for improving memory and memory related functions in healthy subjects are also provided. The Methods include administration of an inhibitor of Na/K-ATPase.

Angelman syndrome (AS) is a human neuropsychiatric disorder associated with symptoms that include autism, mental retardation, motor abnormalities, epilepsy and lack of speech (Lossie et al., 2001; Williams et al., 2006). In most cases, AS is caused by the deletion of small portions on the maternal copy of chromosome 15, which includes the UBE3A gene (Kishino et al., 1997; Knoll et al., 1989; Matsuura et al., 1997; Sutcliffe et al., 1997). This phenomenon that only the maternal copy is expressed and the paternal allele is silenced, is called "imprinting", and in AS it occurs mainly in the brain (Gustin et al., 2010). The UBE3A gene encodes an enzyme termed ubiquitin ligase E3A (also termed E6-AP), which is one of a family of enzymes that covalently attaches polyubiquitin chains to proteins, to signal for their degradation by the 26S proteasome. The prevalence of AS is 1/10,000-1/12,000 births (Petersen et al., 1995; Steffenburg et al., 1996) and it constitutes about ˜2-5% of all children with established developmental delay (Buckley et al., 1998; Jacobsen et al., 1998).
A mouse model of AS with UBE3A deletion has been generated and these mice exhibit susceptibility to epilepsy, impaired motor functioning, and cognitive abnormalities that correlate with neurological alterations observed in humans (Jiang et al., 1998). Like in other cases of autism (Bachevalier, 1994; DeLong, 1992; Dickerson and Eichenbaum, 2010; Sumiyoshi et al., 2011), one of the main brain regions that is implicated in AS in humans and in the mouse model is the hippocampus (Jiang et al., 1998). Hippocampus-dependent long-term memory (LTM) is impaired in these mice, and so is the cellular correlate of synaptic plasticity of hippocampal CA1 long-term potentiation in response to high frequency stimulation (HFS-LTP) (Jiang et al., 1998; van Woerden et al., 2007).
Hippocampal CA1 and CA3 pyramidal cells from AS mouse model exhibit increased expression of alpha1-Na/K-ATPase (a1-NaKA) and two axon initial segment (AIS) related proteins: NaV1.6 and ankyrin-G (Kaphzan et al., 2011).
Prevention of a1-NaKA increased expression in the hippocampus by genetic intervention rescues AS mice behavioral and electrophysiological hippocampal deficits (Kaphzan et al., 2013).

Methods for treating memory impairment and cognitive dysfunction

CARMEL HAIFA UNIVERSITY ECONOMIC CORPORATION LTD.


A frame element (8) for forming a grate, including two spaced-apart side members (12,14) and several plate members (6) arranged one next to the other between the side members in longitudinal direction thereof, between which plate members is provided a gas-venting slot (34). The side members (12,14) are formed by two opposing surfaces of a rigid frame (2), and the plate members (6) are each constructed as individual structural parts releasably connectable to the side members (12,14). The plate members (6) are preferably inserted one after the other into longitudinally extending guideways (18,20) arranged on the frame and are spaced apart by spacing projections (30,32), the spacing being necessary to form a gas-venting slot (34).

Such grates are generally exposed to great wear. This is particularly true for their use during cooling of cement clinkers, which with great weight also have a coarse surface roughness.
A frame element of the type mentioned in the Oberbegriff of claim 1 is already known from EP-0 167 658 B1. This frame element consists of two basic structural parts, of which each has a side member and several plate members connected in one piece at twice the distance of the provided plate member distance to same; the frame element is mounted by connecting two side members with one another in such a manner that the plate members on one side member grip between the plate members on the other side area and are placed into receiving openings constructed on said side area. In order to hold together the frame element formed of the basic structural parts, the basic structural parts are, for example, additionally bolted together on the underside of the frame element.
A disadvantage of the known construction is that when individual plate members and/or side members wear excessively, the entire frame element or at least complete basic structural parts must be replaced, in the latter case with the connection holding together the structural parts having to be disconnected in a complicated manner and having to again be connected after a basic structural part has been replaced. In general still usable, nonworn parts of the frame element are thereby also replaced, which results in high material replacement costs; on the other hand, the disassembling and assembling operations are time-consuming, which results regularly in longer down times for the entire system. This problem is made still more difficult since several frame elements are connected with one another to form a grate and this grate is in turn fastened on a grate carrier so that, for example, the necessity of replacing individual plate members always has the result that also the walls connected thereto must be exchanged and that also their connection to the frame elements adjacent to the walls and to the grate carrier must be disconnected and again connected after the exchange.


Breaching access structure 10S provides easy access to sealed interior 10I containing contents 10C. Access region 12A proximate edge 12E of package 10, provides entrance into the interior and access to the contents. Band seal 14 formed by the upper lamina 14U and lower lamina 14L extends along the access region, enclosing breaching bubble 16. The band seal has inner seal portion 14I between the bubble and the interior, and outer seal portion 14O between the bubble and edge 12E of the package. The bubble is expandable to open the package in response to bursting detonator 18. The detonator is burst by external pressure applied by a user. Opposed pair of peel flaps, upper flap 16U and lower flap 16L, are formed by the opposed laminae of the outer seal along the edge breach as the bubble breaches. These small initial flaps are grasped by the user and manually peeled apart to initiate opening the band seal.

Heretofore, U.S. Pat. No. 6,726,364 to Perell et al teaches a storage package with a band seal formed by opposed laminae enclosing a breaching bubble. The band seal has an inner seal between the bubble and the interior of the package, and an outer seal between the bubble and the edge of the package. The bubble may be expanded by external pressure applied to the bubble by the user. The expansion separates the opposed laminae causing the bubble to breach along the edge. Opposed peel flaps form along the edge breach by the separation of the opposed laminae of the outer seal. These small initial flaps are grasped by the user and manually peeled apart to separate the remainder of the outer seal and the inner seal, and open the package.

Access structure with bursting detonator for opening a sealed package


In a method of manufacturing a semiconductor device, a silicide layer of a refractory metal is formed in a predetermined region of a semiconductor element formed on a silicon semiconductor substrate. In the first film formation step, a first thin film consisting of the refractory metal is formed on the surfaces of the silicon semiconductor substrate and the semiconductor element. In the first heat treatment step, a heat treatment is performed with respect to the silicon semiconductor substrate, the semiconductor element, and the first thin film to form a silicide layer. In the first removal step, the first thin film is removed by etching. In the second film formation step, a second thin film consisting of a refractory metal of the same kind as that of the first thin film is formed. In the second heat treatment step, another heat treatment is performed to make the second thin film contain as a solid solution an oxide of the refractory metal present at the interface with the second thin film, thereby making a layer consisting of the oxide vanish. In the second removal step, the second thin film is removed by etching.

1. FIELD OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of manufacturing a semiconductor device in which a self-align-silicide film of a refractory metal is formed on the diffusion layer and the gate electrode of a MOS transistor.
2. DESCRIPTION OF THE PRIOR ART
Semiconductor elements continue to shrink in line width and increase in density. At present, super-high-integrated semiconductor devices, such as a memory device or a logic device, which are designed by the size standard (design rule) of 0.15 to 0.25 .mu.m are manufactured. With high integration of semiconductor devices, decreases in widths of the gate electrode and the diffusion layer and a decrease in film thickness of each material layer constituting a semiconductor element have become increasingly important.
The decrease in width of the gate electrode or gate electrode interconnection and the decrease in film thickness of the gate electrode layer inevitably increase the resistances of the interconnections, greatly affecting the circuit delay. When conventional polysilicon is used as an electrode material and an interconnection material, the delay time increases to a non-negligible degree due to the increase in interconnection resistance. Therefore, in micropatterned semiconductor elements as described above, a technique of realizing lower-resistance gate electrodes and interconnections using a silicide of a refractory metal has become indispensable. Particularly, a technique of forming a salicide (self-align-silicide) using, e.g., titanium (Ti) as a refractory metal is important in the manufacturing process of a micropatterned MOS (Metal-Oxide-Semiconductor) transistor.
With further high integration of semiconductor devices, in an insulated gate field effect transistor represented by a MOS transistor, the short channel effect of the transistor must be suppressed by suppressing diffusion of the impurity used for forming the diffusion layer. As a result, if the junction surface of the diffusion layer contacts the silicide region layer, the leakage current due to crystal defects increases, and the switch operation of the transistor cannot be performed. Therefore, the film thickness of the silicide layer must be decreased in addition to realization of a shallow-junction diffusion layer.
A conventional method of manufacturing a MOS transistor having a salicide structure will be explained. FIGS. 1A to 1E are sectional views respectively showing the steps in an example (to be referred to the first conventional method hereinafter) of a conventional salicide formation method.
First, as shown in FIG. 1A, an oxide film serving as an element isolation insulating film 102 is formed in a predetermined region on a silicon substrate 101 by well-known LOCOS (LOCal Oxidation of Silicon). After an impurity for a channel stopper is ion-implanted, a gate insulating film 103 is formed by the thermal oxidation method. Subsequently, a polysilicon film having a film thickness of about 150 nm is formed on the entire surface by CVD (Chemical Vapor Deposition). After an impurity such as phosphorus is doped, this polysilicon film is patterned into a desired shape by the lithography technique and the dry etching technique to form a gate electrode 104 on the gate insulating film 103. A silicon oxide film is deposited on the entire surface using the CVD method and subjected to anisotropic dry etching to form a spacer (side wall) 105 on the side surface of the gate electrode 104. Then, an impurity such as arsenic (As) or boron (B) is doped, and a heat treatment is performed at 800.degree. C. to 1,000.degree. C. to form diffusion layers 106. In the case of an n-channel MOS transistor, arsenic-doped diffusion layers are formed, whereas in the case of a p-channel transistor boron-doped diffusion layers are formed. In either case, the diffusion layers on the two sides of the gate electrode 104 serve as the source and drain regions of the MOS transistor, respectively. In the example shown in FIG. 1A, the diffusion layer 106 on the right side of the gate insulating film 103 coincides with the ion-implanted region for the channel stopper.
As shown in FIG. 1B, a titanium film 107 having a film thickness of about 50 nm is formed on the entire surface by the sputtering method or the like. Upon this film formation, when the substrate is unloaded from the film formation unit and exposed to the outer atmosphere, the surface of the titanium film 107 oxidizes to form a titanium oxide film 108 having a thickness of about 5 nm.
The first heat treatment is performed in a nitrogen atmosphere at normal pressure for 30 sec to 60 sec to silicify the titanium film 107. In this heat treatment, a lamp annealer is normally used, and the heat treatment temperature is set at 600.degree. C. to 650.degree. C. The crystal structures of titanium silicide are classified into the C49 structure having a relatively high electrical resistivity, and the C54 structure having a relatively low electrical resistivity. In this case, as shown in FIG. 1C, silicide layers 109 of the C49 structure having a relatively high electrical resistivity are formed on the exposed surface of the gate electrode 104 and the surfaces of the diffusion layers 106, and titanium nitride layers 110 are formed on the uppermost surfaces. In contrast, oxygen-containing titanium layers 111 which contain unreacted oxygen are formed on the element isolation insulating film 102 and the spacer 105 which are formed of silicon oxide films, and titanium nitride layers 110 are formed on the uppermost surfaces. Further, the titanium film 107 reduces the silicon oxide films serving as the element isolation insulating film 102 and the spacer 105 to form titanium oxide films 108 at the interfaces between these silicon oxide films and the oxygen-containing titanium layers 111.
Next, the resultant structure is dipped in an etching solution mixture of an aqueous ammonia solution, pure water, and a hydrogen peroxide solution to remove the oxygen-containing titanium layers 111 containing unreacted oxygen, and the titanium nitride layers 110, as shown in FIG. 1D. Although the titanium film 107 is dissolved by the etching solution of this composition, the titanium nitride layers 110 are not dissolved by this etching solution but removed by the lift-off effect upon elution of the oxygen-containing titanium layers 111.
By the above steps, the silicide layers 109 of the C49 structure are formed in self-alignment only on the gate electrode 104 and the diffusion layers 106 for forming the source and drain regions. The resultant structure is subjected to the second heat treatment in a nitrogen atmosphere at normal pressure for about 60 sec to cause a crystal structure transition. That is, as shown in FIG. 1E, the silicide layers 109 of the C49 structure are converted into silicide layers 112 of the C54 structure having a relatively low electrical resistivity. As a heat treatment unit at this time, a lamp annealer is used, like in the first heat treatment. The process temperature is set at about 850.degree. C. In this manner, a silicide layer of the C54 structure used as the electrode layer of a semiconductor device can be formed in self-alignment.
On the other hand, Japanese Unexamined Patent Publication No. 63-50038 discloses a method characterized by performing the film formation step of a refractory metal film and the heat treatment step "in situ". This method uses an equipment including a sputtering unit, an electrical furnace unit, and a unit for keeping the respective units in vacuum via an exhaust unit, and the step of forming a refractory metal film by sputtering and the silicification step are continuously executed without exposing the structure to the outer atmosphere. According to this method, a heat treatment for silicification can be executed without forming any oxide layer on the surface of the refractory metal film formed by sputtering. Although Japanese Unexamined Patent Publication No. 63-50038 discloses an example using tungsten (W) or molybdenum (Mo) as the refractory metal, a case wherein the technique disclosed in Japanese Unexamined Patent Publication No. 63-50038 is applied to formation of a titanium silicide film will be explained below. FIGS. 2A to 2E are sectional views respectively showing the steps in a salicide formation method (to be referred to as the second conventional method hereinafter).
The respective steps from formation of a MOS transistor to formation of a titanium film by the sputtering method are performed similar to those in the first conventional method described above. That is, as shown in FIG. 2A, a 300 nm-thick element isolation insulating film 102 is formed by the LOCOS method in a predetermined region on a silicon substrate 101 which is of p-type or has a p-well formed therein. Boron for a channel stopper is ion-implanted in the silicon substrate 101 to form a gate insulating film 103 having a film thickness of about 8 nm by the thermal oxidation method. A polysilicon film having a film thickness of about 100 nm is formed on the entire surface by the CVD method. After an impurity such as phosphorus is doped, this polysilicon layer is patterned by the lithography technique and the dry etching technique to form a gate electrode 104. After a silicon oxide film is deposited on the entire surface by the CVD method to have a film thickness of about 100 nm, anisotropic dry etching is performed to form a spacer 105 on the side surface of the gate electrode 104. Thereafter, diffusion layers 106 are formed by ion implantation of an arsenic impurity.
Next, as shown in FIG. 2B, a titanium film 107 having a thickness of about 20 nm is formed on the entire surface by, e.g., the sputtering method using argon gas. The resultant structure is subjected to a heat treatment in a nitrogen atmosphere without being exposed to the outer atmosphere, thereby forming silicide layers 109 of the C49 structure on the silicon exposed surfaces (FIG. 2C). Since the structure is not exposed to the outer atmosphere, no titanium oxide is formed on the surface of the titanium film 107, and heat treatment of the titanium film 107 can be performed. However, similar to the first conventional method described above, titanium oxide films 108 are formed at the interfaces between the element isolation insulating film 102 and the spacer 105, and the titanium film 107 due to reduction by the titanium film 107. For this reason, as shown in FIG. 2D, a titanium nitride layer 110 and the non-silicified titanium film 107 are removed by an aqueous ammonia solution, and a heat treatment is performed to convert the silicide layers 109 of the C49 structure into silicide layers 112 of the C54 structure having a lower resistivity (FIG. 2E).
In either of the above-mentioned conventional methods, in heat treatment upon film formation of the titanium film, titanium oxide films are formed due to reduction by titanium at the interfaces between the titanium film, and the element isolation insulating film and the spacer which are made of silicon oxide films. As will be described in detail later, this titanium oxide film cannot be removed by an etching solution containing an aqueous ammonia solution as a component, and further exhibits semiconductor properties. For this reason, the titanium oxide film causes a leakage current across the gate electrode and the diffusion layer regions and poses a problem in processing.
According to the first conventional method, by a heat treatment in the nitrogen atmosphere, the titanium film on the silicon oxide film has a three-layered structure of a titanium nitride layer, an oxygen-containing titanium layer, and a titanium oxide film. A detailed mechanism of this structure is as follows. That is, in this heat treatment step, the surface oxygen concentration of the titanium film decreases due to reduction by nitrogen, and as the nitride film is formed, oxygen diffuses into the titanium film to form an oxygen-containing titanium layer. The snowplow effect of oxygen due to nitridation by nitrogen (N.sub.2 gas) becomes dominant, while reduction of the titanium oxide film becomes deficient. As a result of this oxygen diffusion, the titanium film on the silicon oxide film has a three-layered structure of a titanium nitride layer, an oxygen-containing titanium layer containing a large amount of oxygen, and a titanium oxide film.
After heat treatment, the titanium film is selectively etched. In selective etching, the oxygen-containing titanium layer remaining on the silicon oxide film is etched by using a solution mixture of ammonia and a hydrogen peroxide solution, thereby removing the titanium nitride layer by the lift-off effect. However, the etching rate of the oxygen-containing titanium layer decreases with an increase in oxygen concentration. The titanium oxide film is not etched by the solution mixture of ammonia and the hydrogen peroxide solution. Although the titanium oxide film may be etched by prolonging the etching time and increasing the solution temperature, since the etching rate of the silicide layer of the C49 structure also increases, the selectivity is not actually improved. As a result, it is difficult to remove the titanium oxide film.
According to the second conventional method, film formation of the titanium film and a heat treatment are continuously performed without exposing the structure to the outer atmosphere. In this case, since oxygen diffusion due to nitridation does not take place, no oxygen-containing titanium layer is formed. However, a titanium oxide film generated due to reduction by titanium still exists, which causes a leakage current.
FIGS. 3A and 3B are graphs of frequency distributions respectively showing the measurement results of the leakage current across the gate electrode and the diffusion layer in a large number of MOS transistors formed by the above-described conventional methods. FIG. 3A shows the result obtained in the MOS transistor according to the first conventional method, and FIG. 3B shows the result obtained in the MOS transistor according to the second conventional method. As is apparent from the two graphs, the frequency of the leakage current in the second method is lower than that in the first method, but in either case a leakage current of 10.sup.-6 A or more flows, which cannot be ignored in relation to the OFF current of the transistor.

Method of manufacturing semiconductor device


Aspects of the present disclosure relate to controlling incoming calls. A call recording corresponding to at least a portion of a call between a receiver and a caller is received. A warning status of the call is verified according to a conversation pattern of the call recording. A warning structure is updated with call information based on the conversation pattern, the warning structure used for controlling future incoming calls.

The present disclosure relates generally to the field of information technology, and in particular to controlling incoming calls.
Calls are commonly used to establish communication between two or more persons in an interactive way with the aid of technology. For example, telephone calls (e.g., voice over internet protocol (VoIP) or landline calls) can be made and received by individuals (operating as callers and receivers, respectively) using corresponding telephones. Telephones can receive calls from caller (telephone) numbers, which can be unknown to the receiver.
Often, calls from unknown caller numbers are unwanted. For example, the unwanted calls can be received from telemarketers, recruiters, political organizations, etc. Moreover, the calls can be received from malicious parties, such as for phishing, scamming, and stalking. These kinds of calls can endanger the receiver.

International Business Machines Corporation


A method and apparatus is disclosed for translating data link layer and network layer frame headers at speeds approximating the reception rate of frames on respective communication links. High-speed header translation is achieved via the use of a dedicated microsequencer which identifies the receive frame encapsulation type and the transmit frame encapsulation type and based on such identification, selects a processing routine which is then executed to translate the frame header. The microsequencer is employed to control the movement of control information and frame header and payload information from an input FIFO, through the dedicated header processor, and to an output FIFO. The headers of the respective frames are translated within the dedicated header processor to facilitate header translation at high speeds. Via use of the presently disclosed header translation apparatus, layer 2 and layer 3 header translations, as well as other header translation functions may be rapidly performed.

The present invention relates to computer network devices and more particularly to a method and apparatus for translating frame headers at speeds approximating frame reception rates in a bridge/router.
Personal computers came into widespread use as standalone devices. Employed in this manner, databases and other information which were resident on one computer were not readily available to other users. To address the need to share information between computers and to share peripherals, such as printers, modems, etc., among a plurality of users, local area networks (LANs) were developed. A number of different types of LANs came into widespread use; notably, 10 megabit Ethernet, 4 megabit token rings compliant with the IEEE 802.5 standard, 16 megabit token ring compliant with the 802.6 and subsequently 100 mb FDDI, 100 megabit ethernet and one gigabit Ethernet. As LAN usage became commonplace, and the installed base of disparate LAN types increased, information sharing between LANs became necessary. Bridges were developed to interconnect LANs of the same type. Bridges are essentially transparent to the network and forward all information received on an input port to all devices coupled to the same network.
Bridges and routers were developed out of a recognized need to move data between a number of separate networks, since in many cases it is not desired to forward all information received at input ports to all output ports. Given the disparate data link layer (layer 2) and network layer (layer 3) protocols, bridges and routers are oftentimes required to translate headers of frames received at one input port prior to forwarding the frame from one or more output ports. Typically, header translations have been performed in software. The translation of frame headers via the use of software routines provides considerable flexibility due to the ease of accommodating changes in existing protocols and additionally, header translations for new protocols, however software translation introduces undesirable delays within a bridge/router which can result in the need to discard frames in the event of buffer storage overflow as a consequence of the inability of the bridge/router to keep up with network traffic. Additionally, software header translation can result in increased costs of the bridge/router as a result of the need to increase buffer storage in an effort to minimize the likelihood of frame discard. Furthermore, network performance employing bridges/routers which perform header translation in software is adversely impacted since discarded frames need to be retransmitted. Finally, at the line speeds of modern networks, header translation delays interposed by software header translation routines are significant.
With the proliferation of networks worldwide, it is expected that more and more types of LANs and networking protocols will be developed. Presently organizations are experiencing the need to utilize multiple networking protocols such as the Internet protocol (IP), IPx, APPLETALK (tm), DECNET(tm) and other protocols. New versions of existing protocols as well as entirely new protocols are likely to develop in the future. Thus, it is likely that the need to perform high speed frame header translation will continue into the foreseeable future.
For the above reasons, it would be desirable to be able to perform header translations in a network device, such as a router, at or near the frame reception rate for the device so as to avoid the aforementioned problems with prior art bridges/routers.

High speed header translation processing


An unauthorized access prevention system that includes a search unit searching the flowing-in path of the unauthorized access to the services by a Web system disclosed by a user's ISP, a determination unit determining the place to implement a countermeasure for protecting the services from the unauthorized access based on the result of the search, and a notification unit notifying, according to a determination that that the countermeasure is implemented in the flow source that makes the unauthorized access flow into the user's communication network, the determination to the flow source.

1. Field of the Invention
The present invention relates to an unauthorized access prevention technology, and more specifically to a technology for executing an unauthorized access prevention service that, for example, an Internet service provider (ISP) provides to its customers, and in particular to a technology to implement an effective countermeasure against unauthorized access that is represented by distributed denial of services.
2. Description of the Related Art
Denial of services (hereinafter abbreviated to "DoS") stands for an attack that makes a system stop operating or incapable of operating by purposely transmitting a processing demand that is beyond a tolerable limit of the system resource, and DoS is characterized in that it is difficult to discriminate a reasonable processing demand from an unreasonable processing demand. An attack made in the form in which many attack sources are distributed in a network is called distributed denial of services (hereinafter abbreviated to "DDoS"). DDoS is explained in full detail, for example, in the following publication.
"Trends in Denial of Service Attack Technology" by Kevin J. Houle and George M. Weaver published from CERT Coordination Center in October, 2001, retrieved on Feb. 17, 2003 by the Internet <URL:http://www.cert.org/archive/pdf/Dos_trends.pdf>
Conventional technologies to prevent DDoS are largely classified into the following two methods, and each of the two methods can be further subdivided as follows.
I. Method that Replaces the Constituents Used in the Present Network
(1) Technology to Prevent DDoS by Expanding IP Packet
This is the technology to make the search of an attacker source and the uniformity of each transmitter source that transmits a processing demand possible by adding return-path information to the IP packet as well as by replacing the present router or firewall by the one that can understand the expanded IP packet.
(2) Technology to Prevent DDoS Without Expanding IP Packet
Included in this technology is, for example, the technology disclosed in Japanese Unexamined Patent Publication No. 2002-164938. This technology is such that the router that receives a packet-filtering program that is propagated in an edge router and is transmitted to each router executes the program and shuts off the traffic from the attacker source, and the router that can receive and execute this program is used in place of a router used for the present network.
II. Method that Uses the Constituents as they are that are Used for the Present Network
Described below are the details of this method with reference to FIG. 1. In a network constitution example shown in FIG. 1, a customer site 1000 operates a Web system 1001, and the customer site 1000 is equipped with a firewall 1002 to prevent unauthorized access to the Web system 1001.
The Web system 1001 is connected to an edge router 2001 via the firewall 1002. The edge router 2001 is managed by an ISP-A 2000 that is an Internet service provider.
An attacker that intends to perform DDoS against the Web system 1001 accesses a POP (point of presence) edge router 3001 managed by an ISP-B 3000 that is an Internet service provider that is logically adjacent to the ISP-A 2000 in the network and attacks the Web system.
A regular user who uses services of this Web system 1001 accesses the POP edge router 4001 managed by the ISP-C 3000 that is an Internet service provider adjacent to the ISP-A 2000 in the network and receives the services provided by the Web system 1001.
(1) Technology to Prevent DDoS by an Attack-Target Customer Site
This is the technology in which a system that employs an unauthorized access detection technology used in an intrusion detection system (hereinafter abbreviated to "IDS") and a packet control (such as filtering and flow-rate control) technology is arranged on the network border between the ISP-A 2000 and the customer site 1000 (in FIG. 1, arranged in the edge router 2001), and when said system detects any DDoS, said system shuts off only a specific unauthorized packet that flows from the ISP-A 2000 to the customer site 1000.
(2) Technology to Prevent DDoS by a Single ISP
This is the technology in which the IDS is arranged on the network border between the ISP-A 2000 and the customer site 1000 (in FIG. 1, arranged in the edge router 2001), a packet control device is arranged on the network border between the ISP-A 2000 and the adjacent ISP (in FIG. 1, arranged in the edge routers 2002 and 2003), and when the IDS detects any unauthorized access, the IDS identifies the flow source of the packet using an IP traceback technology that identifies the upstream flow of an attack packet that pretends to be a transmitter source, and shuts off only an unauthorized packet on the border between the ISP 2000 and the adjacent ISP (in FIG. 1, the edge router 2002).
(3) Technology to Prevent DDoS by Cooperation of a Plurality of ISPs
This is the technology that is realized when the manager of ISP-A 2000 who has identified that the ISP adjacent to the flow source is the ISP-B 3000 based on the technology to prevent DDoS by a single ISP described in the preceding item asks the manager of ISP-B 3000 manually by telephone to take a countermeasure. As a result, this technology has not been established yet at the moment.
Information on the technologies with regard to DDoS is available from the following publication. "Distributed Denial of Service (DDoS) Attacks/Tools" by Dave Dittrich, retrieved on Feb. 17, 2003 on the Internet <URL: http://staff.washington.edu/dittrich/misc/ddos>
It can be said that to prevent DDoS at a place closer to the attack transmitter source located on the path from the attack transmitter source to the attack-target customer site is a more effective countermeasure. This is because if a countermeasure is implemented at a place closer to the attack-target customer site, the attack-target customer site can be protected, but since the DDoS cannot be prevented due to the congestion of networks on the path and the processing delay of the routers, the situation is after all the same as the fact that the service is nullified to the user who uses the service of the site from the Internet.
In the method mentioned in I among the methods described above, DDoS cannot be prevented without replacing the router used in the present network by the router provided with a new protocol, thus entailing expenditure for replacing the router. In addition, there is a problem in that it takes a considerably long time until a new protocol and a router that can handle the new protocol are widely spread.
Furthermore, since the reliability of communications cannot be ensured in the state in which DDoS is occurring, the router cannot receive the program in the technology disclosed in Japanese Unexamined Patent Publication No. 2002-164938 mentioned above, and as a result, the traffic from the attacker source might not be shut off. In the technology disclosed in this publication, on the other hand, the router itself might become an attack target of DDoS. Also, in the technology disclosed in this publication, an action for propagating a program is performed, but this action is not familiar with the way of thinking about a security policy in each organization, so that the employment of this technology is left over, and DDoS might not be prevented cross-sectionally throughout the whole organization.
With regard to the method of II among the methods described above, there are considered to be the following problems.
First of all, in the technology to prevent DDoS by an attack-target customer site, a countermeasure is implemented on the border between the ISP and the attack-target customer site, so that it is not possible to take any effective measure for the congestion of networks in the ISP and the deterioration of the processing capability of the router. Consequently, the influence that the DDoS gives to other customers of the ISP cannot be prevented.
In the example shown in FIG. 1, a countermeasure against the DDoS by an attacker to the Web system 1001 via the ISP-B 3000 is implemented in the edge router 2001, and this method influences the provision of services to a regular user who accesses the Web system 1001 via the ISP-C 4000.
Next, in the technology to prevent DDoS by a single ISP, since a countermeasure is implemented on the border between an ISP and an adjacent ISP, the influence to the network in the user's ISP becomes minimal. However, this technology cannot cope with the congestion of networks and the deterioration of the processing capability of the router, and as a result, it cannot prevent the influence that a regular packet that flows from the adjacent ISP to the user's ISP receives. Moreover, since a countermeasure can be implemented only on the network border that is connected at all times, this technology cannot appropriately prevent the attack received from the transiently-connected network in which a connecting substance changes with a lapse of time.
In the example shown in FIG. 1, as a countermeasure is implemented by the edge router 2002 against DDoS by an attacker to the Web system via the ISP-B 3000, this method little influences the provision of services to a regular user who accesses the Web system 1001 via the ISP-C 4000, but it does influence the provision of services to a regular user who accesses the Web system 1001 via the ISP-B 3000. Moreover, in the case of FIG. 1, when an attacker who attacks the Web system 1001 by connecting the Web system 1001 to the POP edge router 3001 that the ISP-B 3000 manages once cuts off the connection of the Web system 1001 to the POP edge router 3001 and connects the Web system 1001 to the POP edge router 3001 again, the IP address of the attacker source changes, so it is difficult to implement the countermeasure by the edge router 2002 that the ISP-A 2000 manages.
In the case of the technology to prevent DDoS by cooperation of a plurality of ISPs, a countermeasure can be implemented at a place closer to the attack transmitter source, but under the present circumstances, the managers of ISPs must communicate with each other by telephone and cope with problems while respecting both parties' security policy, thereby requiring a tremendous amount of time to work out the countermeasure. In addition, since there is no method for attesting each person in charge at each ISP, problems such as reliability of information in operating the system and pretending to be a person in charge at an ISP arise in this technology. There is another problem in that when the technology to prevent DDoS by cooperation of a plurality of ISPs is employed, the operation history is not recorded.


By embedding a silicon/germanium mixture in a silicon layer of high tensile strain, a moderately high degree of tensile strain may be maintained in the silicon/germanium mixture, thereby enabling increased performance of N-channel transistors on the basis of silicon/germanium material. In other regions, the germanium concentration may be varied to provide different levels of tensile or compressive strain.

1. Field of the Invention
Generally, the present disclosure relates to the formation of integrated circuits, and, more particularly, to the formation of transistors having strained channel regions by using stress-inducing sources, such as globally strained silicon substrates and the like, to enhance charge carrier mobility in the channel region of a MOS transistor.
2. Description of the Related Art
Generally, a plurality of process technologies are currently practiced to fabricate integrated circuits, wherein, for complex circuitry, such as microprocessors, storage chips and the like, CMOS technology is currently one of the most promising approaches due to the superior characteristics in view of operating speed and/or power consumption and/or cost efficiency. During the fabrication of complex integrated circuits using CMOS technology, millions of transistors, i.e., N-channel transistors and P-channel transistors, are formed on a substrate including a crystalline semiconductor layer. A MOS transistor, irrespective of whether an N-channel transistor or a P-channel transistor is considered, comprises so-called PN junctions that are formed by an interface of highly doped drain and source regions with an inversely or weakly doped channel region disposed between the drain region and the source region.
The conductivity of the channel region, i.e., the drive current capability of the conductive channel, is controlled by a gate electrode located close to the channel region and separated therefrom by a thin insulating layer. The conductivity of the channel region, upon formation of a conductive channel due to the application of an appropriate control voltage to the gate electrode, depends on the dopant concentration, the mobility of the majority charge carriers and, for a given extension of the channel region in the transistor width direction, on the distance between the source and drain regions, which is also referred to as channel length. Hence, the conductivity of the channel region is a dominant factor determining the performance of MOS transistors. Thus, the reduction of the channel length, and associated therewith the reduction of the channel resistivity, is an important design criterion for accomplishing an increase in the operating speed of the integrated circuits.
The continuing shrinkage of the transistor dimensions, however, involves a plurality of issues associated therewith, such as reduced controllability of the channel, also referred to short channel effects, and the like, that have to be addressed so as to not unduly offset the advantages obtained by steadily decreasing the channel length of MOS transistors. For instance, the thickness of the gate insulation layer, typically an oxide-based dielectric, has to be reduced when reducing the gate length, wherein a reduced thickness may result in increased leakage currents, thereby posing limitations for oxide-based gate insulation layers at approximately 1-2 nm. Thus, the continuous size reduction of the critical dimensions, i.e., the gate length of the transistors, necessitates the adaptation and possibly the new development of highly complex process techniques, for example, for compensating for short channel effects with oxide-based gate dielectric scaling being pushed to the limits with respect to tolerable leakage currents. It has therefore been proposed to also enhance the channel conductivity of the transistor elements by increasing the charge carrier mobility in the channel region for a given channel length, thereby offering the potential for achieving a performance improvement that is comparable with the advance to a future technology node while avoiding or at least postponing many of the problems encountered with the process adaptations associated with device scaling.
One efficient mechanism for increasing the charge carrier mobility is the modification of the lattice structure in the channel region, for instance by creating tensile or compressive stress in the vicinity of the channel region to produce a corresponding strain in the channel region, which results in a modified mobility for electrons and holes, respectively. For example, creating uniaxial tensile strain in the channel region along the channel length direction for a standard crystallographic orientation increases the mobility of electrons, which, in turn, may directly translate into a corresponding increase in the conductivity. On the other hand, uniaxial compressive strain in the channel region for the same configuration as above may increase the mobility of holes, thereby providing the potential for enhancing the performance of P-type transistors. The introduction of stress or strain engineering into integrated circuit fabrication is an extremely promising approach for further device generations, since, for example, strained silicon may be considered as a "new" type of semiconductor material, which may enable the fabrication of fast powerful semiconductor devices without requiring expensive semiconductor materials, while many of the well-established manufacturing techniques may still be used.
In some approaches, external stress created by, for instance, permanent overlaying layers, spacer elements and the like is used in an attempt to create a desired strain within the channel region. Although a promising approach, the process of creating the strain in the channel region by applying a specified external stress may depend on the efficiency of the stress transfer mechanism for the external stress provided, for instance, by contact layers, spacers and the like, into the channel region to create the desired strain therein. Thus, for different transistor types, differently stressed overlayers have to be provided, which may result in a plurality of additional process steps, wherein, in particular, any additional lithography steps may significantly contribute to the overall production costs. Moreover, the amount of stress-inducing material, and in particular the intrinsic stress thereof, may not be arbitrarily increased without requiring significant design alterations. For example, the degree of tensile stress in corresponding portions of the dielectric layer formed above an N-channel transistor may presently be limited to approximately 1.5 GPa (Giga Pascale), while the amount of tensilely stressed material may have to be reduced in sophisticated transistor geometries including reduced distances of neighboring transistor elements in device areas of high packing density, and thus new developments of respective deposition techniques may be required for further improving performance of N-channel transistors on the basis of stressed overlayers. On the other hand, significantly higher compressive stress levels may be provided for P-channel transistors by presently established techniques, thereby creating an imbalance with respect to enhancing performance of NMOS and PMOS transistors.
In still a further approach, a substantially amorphized region may be formed adjacent to the gate electrode at an intermediate manufacturing stage, which may then be re-crystallized in the presence of a rigid layer formed above the transistor area. During the anneal process for re-crystallizing the lattice, the growth of the crystal will occur under stress conditions created by the overlayer and result in a tensilely strained crystal. After the re-crystallization, the sacrificial stress layer may be removed, wherein, nevertheless, a certain amount of strain may be "conserved" in the re-grown lattice portion. This effect is generally known as stress memorization. Although this mechanism provides a promising technique for enhancing performance of N-channel transistors, a highly controlled application thereof is difficult as the exact mechanism is not yet understood.
In other approaches, a strained silicon base material may be provided by, for instance, growing silicon on a relaxed silicon/germanium (Si/Ge) alloy, which has a greater lattice constant compared to natural silicon, thereby resulting in a biaxial tensile strain in the re-grown silicon material, which may thus enable enhancement of P-channel transistors and N-channel transistors due to the biaxial nature of the strain. A certain imbalance with respect to strain-inducing mechanisms may nevertheless exist, since many efficient strain-inducing mechanisms are available for PMOS transistors, such as embedded strained silicon/germanium material, stressed contact etch stop layers of very high intrinsic compressive stress and the like, and, therefore, respective engineering techniques may be desirable to specifically enhance performance of NMOS transistors.
The present disclosure is directed to various methods and devices that may avoid, or at least reduce, the effects of one or more of the problems identified above.

Tensile strain source using silicon/germanium in globally strained silicon


A hearing prosthesis, including receiver means for receiving a signal representative of a signal over a frequency range; a first filter bank, having a relatively higher resolution, adapted to process said received signal and produce a first set of channel outputs relating to a selected region or regions of said frequency range; and a second filter bank having a relatively lower resolution, adapted to process said received signal and produce a second set of channel outputs relating to at least the rest of said frequency range; combination means to combine the first and second sets of channel outputs, and processing means operative upon the combined outputs so as to produce a set of stimulation signals for said hearing prosthesis.

1. Field of the Invention
The present invention relates generally to signal and speech processing for coding strategies in medical devices, and more particularly, to hearing prostheses such as cochlear implants.
2. Related Art
There are several electrical stimulation devices that use an electrical signal to stimulate nerve, tissue or muscle fibers in a user. Cochlear™ implants and similar hearing devices apply a stimulating signal to the cochlea of the ear to stimulate a percept of hearing. More particularly, these systems include a microphone that receives ambient sounds, a signal processor that converts selected sounds according to a speech coding strategy into corresponding stimulating signals, and an implanted electrode array for delivering stimuli to the recipient. The recipient (also referred to as a patient herein) receives a perception of hearing based on the nerve stimulation.
Although hearing implants have been widely used, there is an on-going need to improve the fidelity of speech and sound percepts which are experienced by the users.


A test apparatus for a semiconductor package comprising an X-ray analyzer acquiring an X-ray image of the semiconductor package and detecting a thickness of the semiconductor package from the X-ray image, and a thermal reaction analyzer applying a voltage to the semiconductor package and detecting a failure position of the semiconductor package using a surface temperature of the semiconductor package and the thickness of the semiconductor package may be provided.

1. Field
Example embodiments relate to test apparatuses for a semiconductor package.
2. Description of the Related Art
A semiconductor package is provided by mounting a semiconductor chip on a package substrate, performing electrical connection using wires, and sealing the package with a sealing resin such as EMC or the like. A test apparatus for a semiconductor package detects failure that occurs due to open or short of signal lines of the package substrate or the semiconductor chip of the semiconductor package.

Test apparatus for semiconductor package


A liquid ejection device with a plurality of liquid ejection heads each having a liquid ejection surface that is elongated in a main scanning direction and is formed with a plurality of liquid ejection ports. Additionally, the device may have a maintenance unit, including a first maintenance tray, a second maintenance tray and a maintenance tray moving mechanism configured to move the first maintenance tray and the second maintenance tray in a predetermined direction. The device may also include a maintenance tray movement control portion configured to control the maintenance tray movement mechanism to move the first maintenance tray and the second maintenance tray wherein the first maintenance tray located at the first non-maintenance position and the second maintenance tray located at the second non-maintenance position at least partially overlap each other.

Inkjet printers are known to include four inkjet heads aligned in a sheet conveying direction and a maintenance unit for performing maintenance on the inkjet heads. In such an inkjet printer, the maintenance unit includes a frame movable in a horizontal direction parallel to the sheet conveying direction, a blade disposed on the frame, a wiping roller, an ink sucking member, and four caps. The four caps are aligned parallel to each other in the sheet conveying direction to cover corresponding nozzle surfaces of the four inkjet heads. The maintenance of the four inkjet heads is performed as described below. When the maintenance unit is located at a purging position, the caps cover the respective nozzle surfaces and a purge operation is performed to eject ink from nozzles to the caps. After that, while the caps are separated from the respective nozzle surfaces and the maintenance unit is located at a retracted position, the ink sucking member, the wiping roller, and the blade face the nozzle surfaces in turn to suck or wipe the ink from the nozzle surfaces.


An ice auger conversion apparatus has an ice auger support and steering mounting member and a winch connected to the ice auger support and steering mounting member. A ring conversion member detachably connects to the winch. A winch drive motor connects to a driven end of the winch. A winch drive socket conversion member connects to a driving end of the winch. One end of a drive conversion adapter member removingly connects to the winch drive socket and another end of the drive conversion adapter member removingly connects to an ice auger shaft member. An ice auger removably connects to the ice auger shaft member. The ice auger support and steering member also has a mounting plate attached to the winch and a steering handle member attached to the mounting plate. A power circuit attaches to the steering handle member to provide power to the winch drive motor. The power circuit has a power circuit actuation switch and a power source. The ice auger has a replaceable blade insert that detachably connects to a distal end of the ice auger shaft member.

1. Field of the Invention
This invention relates generally to an ice auger and more particularly to a power winch, ice auger conversion apparatus. This conversion apparatus allows a power boat or trailer winch to be used to drive an ice auger used to penetrate an ice layer to allow fishing through the ice.
2. Description of the Related Art
Ice augers have been used by fishermen and others to penetrate a layer of ice to either fish or to enter the water below for study. Previously, the augering operations has been a strenuous task. Other related art devices have tried to make the augering operation easier by adapting various motive sources to the auger. depending on the equipment available and the location, these devices have had varying degrees of success.
U.S. Pat. No. 3,705,632 to L. J. Burke on Dec. 12, 1972 for a Portable Electric Ice Auger describes a portable electric ice auger that is connected to the battery of a snowmobile.
U.S. Pat. No. 4,872,518 to A. C. Crippin on Oct. 10, 1989 for a Power Chainsaw--Ice Auger Conversion Apparatus shows a conversion apparatus to adapt a chainsaw to an ice auger by means of a geared drive train.
U.S. Pat. No. 4,971,161 to R. P. Godell on Nov. 20, 1990 for an Ice Auger Conversion Kit describes a kit for adapting a grass trimming machine to provide power to an ice auger by means of a gear train.
U.S. Pat. No. 5,038,870 to L. J. Kuronen on Aug. 13, 1991 for an Ice Auger Cutter shows a hand operated ice auger having an adjustable stop for limiting the rate of penetration of the cutting elements.
Since many ice fishers and others involved around and in the water usually have access to boats and boat trailers, they often have power winches available to them. The present invention thus becomes a valuable option to them. It allows them to utilize a piece of equipment in an entirely novel and useful manner.

Power winch-ice auger conversion apparatus


The present application provides bifunctional compounds of Formula (X):

Ubiquitin-Proteasome Pathway (UPP) is a critical pathway that regulates proteins and degrades misfolded or abnormal proteins. UPP is central to multiple cellular processes, and if defective or imbalanced, leads to pathogenesis of a variety of diseases. The covalent attachment of ubiquitin to specific protein substrates is achieved through the action of E3 ubiquitin ligases. These ligases comprise over 500 different proteins and are categorized into multiple classes defined by the structural element of their E3 functional activity. For example, cereblon (CRBN) interacts with damaged DNA binding protein 1 and forms an E3 ubiquitin ligase complex with Cullin 4 in which the proteins recognized by CRBN are ubiquitinated and degraded by proteasomes. Various immunomodulatory drugs (IMiDs), e.g., thalidomide and lenalidomide, binds to CRBN and modulates CRBN's role in the ubiquitination and degradation of protein factors involved in maintaining regular cellular function.
Bifunctional compounds composed of a target protein-binding moiety and an E3 ubiquitin ligase-binding moiety have been shown to induce proteasome-mediated degradation of selected proteins. These drug-like molecules offer the possibility of temporal control over protein expression, and could be useful as biochemical reagents for the treatment of diseases.
Protein kinases are a class of enzymes that catalyze the transfer of the terminal phosphate of adenosine triphosphate to amino acid residues such as tyrosine, serine, and threonine residues on protein substrates. Protein kinases are a large family of proteins which play a critical role in the regulation of a wide variety of cellular processes and functions. Protein kinases can be broken down into two classes, the protein tyrosine kinases and the serine-threonine kinases. Protein tyrosine kinases (PTKs) are enzymes which phosphorylate tyrosine residues in peptides and proteins and which play a key role in the regulation of cell signaling including cell proliferation and cell differentiation. PTKs include receptor tyrosine kinases (RPTKs) and non-receptor tyrosine kinases. Enhanced activity of PTKs has been implicated in a variety of malignant and nonmalignant proliferative diseases. The serine/threonine kinases, STKs, are the most common of the cytosolic kinases. STKs are enzymes which phosphorylate serine and/or threonine residues in peptides.
The protein kinase families include, for example, kinases such as Abl, Ack, AIE2, Akt, ALK, ALK2, ALK3, AIM1, ARK2, ARK1, AURA, Aurora-A, Aurora-B, Aurora-C, bcr-abl, Blk, BRAF, Brk, BTAK, Btk, c-fms, c-kit, c-met, c-src, CDK1, CDK2, CDK3, CDK4, CDK5, CDK6, CDK7, CDK8, CDK9, CDK10, cRafl, CSK, EGFR, ErbB2, ErbB3, ErbB4, Erk, Fak, Frk, Fes, Fps, FGFR1, FGFR2, FGFR3, FGFR4, FGFR5, Fgr, flt-1, Fps, Frk, Fyn, Hck, IGF-1R, IRR, INS-R, Jak, KDR/FLK-1, Lck, Lyn, MEK, p38, PDGFR, PIK, PKC, PYK2, ros, Src, STK12, STK13, STK15, STK16, Syk, tie, tie2, TRK, VEGF, Yrk, and Zap70. Abnormal protein kinase activity has been related to numerous disorders, including psoriasis, cancers, bone disorders, metabolic disorders, inflammatory disorders, and other diseases.
Compounds which inhibit protein kinases via alternative strategies, such as through degradation of protein kinases, have the potential to be more potent than known inhibitors of protein kinases and are needed. The present application addresses the need.

Degradation of protein kinases by conjugation of protein kinase inhibitors with E3 ligase ligand and methods of use

Abstract: or an enantiomer, diastereomer, or stereoisomer thereof, or pharmaceutically acceptable salt, hydrate, solvate, or prodrug thereof, which act as protein degradation inducing moieties for protein kinases. The present application also relates to methods for the targeted degradation of one or more protein kinases through the use of the bifunctional compounds that link a ubiquitin ligase-binding moiety to a ligand that is capable of binding to one or more protein kinases which can be utilized in the treatment of disorders modulated by protein kinases.


An inner filter for an aquarium has means forming a pump chamber, a filter chamber, a suction opening, and outlet opening, a suction passage which communicates with the pump chamber and the filter chamber and in which water is aspirated through the suction opening, a pressure chamber which communicates with the pump chamber and the outlet opening, a pump wheel, an electric motor having a rotor which drives the pump wheel in the pump chamber and also having a stator and a housing having three releasable and again assembleable segments, the segments including a first segment which accommodates the stator with an electric conductor, a second segment which accommodates the rotor with a bearing axles and bearings and also accommodates the pump wheel, the pump chamber, the filter chamber, the suction passage and the pressure passage, and a third segment which is placeable on the second segment and formed as a cover and has the outlet opening connectable with the pressure passage, the suction opening which is connectable with the filter chamber being provided in the region of one of the third segment and the first segment.

The present invention relates to inner filters for an aquarium with an electric motor operating to circulate water in the aquarium.
An inner filter of this type is disclosed for example in the German document DE-GM 81 26 762.2. It is substantially rod-shaped and has an upper pump head which is closed with a cover and accommodates the complete electric motor with a stator and a rotor as well as their bearing axles and bearings for a pump wheel rotated by the rotor. The pump head is also provided with a pump chamber and a pressure passage. The electric motor with its components is fixedly installed in the pump head. The pump chamber and the pump wheel arranged in it are located under the stator and the rotor. A housing part is arranged under the pump head and has a central suction passage which is coaxial to the rotor and can be defined for example by a pipe provided with openings. At least one filter insert is mounted on the pipe. The housing part which contains the filter insert is provided with openings in its wall for suction of water so that the water can be sucked through the filter insert into the central pipe which forms the suction passage. From there the water is supplied by the pump through the pump chamber into the pump head and from the pump head in the pressure passage located in it. Through the pressure passage the water is guided upwardly until it exits from an upwardly located outlet opening from the pump head. In this inner filter the lower end of the bearing axle is held in a special bottom part which is placed from below and releasably on the pump head and which is located between the pump head and the housing part located under it and containing the filter insert. When it is necessary to clean this known inner filter, it must be removed from the aquarium tank as a whole and then dismounted. For exchanging the filter insert the lower tubular housing part can be withdrawn. When, however, for example the pump wheel, the neighboring region of the rotor, the region of the pump chamber or the pressure passage must be cleaned, then first the bottom-side closure of the pump head must be released and removed. Then the rotor with the bearing axle and the bearings must be disassembled in its individual components so that an assembly problem takes place. Moreover, the individual regions even with the removed rotor with the pump wheel are difficult to access and therefore difficult to clean.


The invention reduces the impact of flowfield forces on objects launched from high speed aircraft during flight. For example, the invention provides a solution for overcoming ejection windblast injuries to pilots and increases the probability of injury-free or low-injury ejection. The gas flow is used to rapidly create a very short duration protective “bubble” in the incoming air flow ahead of the ejecting pilot. The bubble reduces the local flow velocity and aerodynamic forces on the pilot during the injury-critical time period of ejection. The invention also is suitable for reducing the intensity of flowfield forces that act on released military aircraft ordnance, such as bombs and missiles.

1. Technical Field
The present invention relates in general to releasing objects from aircraft during high speed flight and, in particular, to an improved system, method and apparatus for reducing windblast injuries to pilots when they eject from the cockpit of a high speed aircraft.
2. Description of the Related Art
When aircraft pilots are forced to eject from cockpits at very high air speeds, they are subjected to instantaneous and near-lethal aerodynamic forces from the air flowfield coming over the canopy. Snap back neck injuries and facial and/or eye tissue damage are particularly common due to the body trajectory during ejection insertion into the flowfield and the fact that the head, helmet and visor enter the flowfield before the rest of the body. These factors create highly asymmetric and dangerous aerodynamic loading on the pilots body.
At near-transonic speeds, the probability of ejection survival without serious injury or death approaches zero. For some aircraft applications, the ejection requirement is 600 knots indicated airspeed (i.e., nearly Mach 1.0 at an altitude of 20,000 feet). However, the local flowfield over the top of the canopy that impacts the ejecting pilot can approach 650 knots or more (i.e., about Mach 1.06 at 20,000 feet), creating an almost unsurvivable ejection environment for pilots.
Similarly, the same intensity of air flowfield forces act on military aircraft ordnance, such as bombs and missiles, as they are released from aircraft during high speed flight. When the ordnance is released, the flowfields can tend to force the ordnance back toward the aircraft, which can create hazardous conditions for the aircraft and pilot as well as damage the ordnance or affect its mission. Thus, a solution for addressing these issues would be desirable.

System, method and apparatus for windblast reduction during release or ejection from aircraft


A support device includes a base member, a caster assembly coupled to the base member including a caster pivotally coupled to the base member, at least two planar members positioned above the caster and pivotally coupled to one another by at least two opposing hinges, and a shaft positioned between the at least two opposing hinges and extending through the at least two planar members.

Support devices, such as wheelchairs, assistive robots, mechanized walkers, and the like, are conventionally used to assist users in moving from one location to another. For example, wheelchairs can move a user between locations, and assistive robots and mechanized walkers can provide support to a user moving between locations. In some instances, assistive robots and mechanized walkers may be used to carry objects between locations. Conventional support devices can include casters that move along a surface, such as a floor or the ground. As the support devices move around an environment, the casters may contact obstacles, such as curbs or the like. Contact with the obstacles may introduce stress on the casters, which can lead to failure of the caster and/or require that the caster be replaced.

Support devices including collapsible casters