An object of the present invention is to provide: a water-absorbent resin which can sufficiently overcome the problem of the gel blocking, can manifest sufficient absorption capacity without load and sufficient absorption capacity under load and, at the same time, can also exert excellent liquid permeability under load; and a process for producing the same. As a means of achieving this object, a first production process among the processes according to the present invention for producing a water-absorbent resin having a treated surface is a process comprising: a step of mixing a water-absorbent resin having an internal crosslinked structure obtained by polymerizing a monomer containing acrylic acid and/or a salt thereof as a main component, a complex containing a polyvalent metal atom as a central atom and an organic secondary crosslinking agent in the presence of an aqueous liquid; and a step of crosslinking a surface of the water-absorbent resin with the organic secondary crosslinking agent. And a second production process is a process comprising a step of mixing a water-absorbent resin having an internal crosslinked structure and a crosslinked surface obtained by polymerizing a monomer containing acrylic acid and/or a salt thereof as a main component, and a complex containing a polyvalent metal atom as a central atom in the presence of an aqueous liquid.

A. Technical Field
The present invention relates to a water-absorbent resin having a treated surface and a process for producing the same. More particularly, the present invention relates to: a water-absorbent resin having a treated surface, which has a polyvalent metal atom on a surface of the water-absorbent resin; and a process for producing the same.
B. Background Art
As a sanitary material such as a disposable diaper, a sanitary napkin and an incontinent pad, a water-absorbent structure (also referred to as absorbent structure in some cases) containing a hydrophilic fiber such as a pulp and a water-absorbent resin as constituent materials is widely utilized for the purpose of absorbing a body fluid.
In recent years, high functionalization and thinning of these sanitary materials have progressed, and there is a tendency that the amount of a water-absorbent resin to be used per one sanitary material, and the ratio of the water-absorbent resin relative to the whole water-absorbent structure composed of the water-absorbent resin and the hydrophilic fiber are increased. That is, by reducing the hydrophilic fiber having a small bulk density, and using a large amount of a water-absorbent resin which is excellent in water-absorbing property and has a large bulk density, the ratio of the water-absorbent resin in the water-absorbent structure is enhanced, and the thinning of the sanitary material is tried without reducing the water absorption amount.
However, the sanitary material in which the ratio of the hydrophilic fiber is reduced, and the ratio of the water-absorbent resin is increased like this, is preferable from the viewpoint of simple liquid storage, but when distribution and diffusion of a liquid under circumstances of actual use as a diaper are considered, this is rather problematic. For example, the water-absorbent resin becomes a soft gel by much water absorption (moisture absorption), and there is a problem that gel blocking is caused such that diffusibility of a liquid in a sanitary material (liquid permeability of gel under load) and gel handling property are remarkably reduced. In order to avoid such the problem, and maintain absorption performance of the water-absorbent structure (also referred to as water-absorption performance in some cases), the ratio between the hydrophilic fiber and the water-absorbent resin is naturally limited, and a limitation is also generated in the thinning of the sanitary material.
Then, as means for preventing the aforementioned gel blocking, technique of adding a metal compound (in particular, polyvalent metal compound) to a water-absorbent resin is reported. Specifically, there is the technique of adding a powder of a metal compound (metal salt) such as aluminum sulfate to a water-absorbent resin, and then further adding water (e.g. see patent documents 1 and 2 below). However, since in such the technique, the added metal compound is dissolved and is permeated in the interior, even when the problem of the gel blocking is consequently overcome to thus obtain excellent liquid permeability and liquid diffusibility, a sufficient absorption capacity without load or a sufficient absorption capacity under load cannot be manifested, and there is a problem that desired absorption (water absorption) performance cannot be exerted.
Then, as means for overcoming such the problem, a technique of adding the aforementioned metal salt in the once dissolved state not in the form of the powder to the water-absorbent resin and, thereafter, drying to localize the salt near surfaces of the resin is reported (e.g. see patent document 3 below). In this technique, an attention is paid to a specified polyvalent metal atom, and the metal salt (metal compound) is used.
In addition, the water-absorbent resin exhibits a high absorption capacity when contacting with an aqueous liquid and, due to such water absorption property, the resin also absorbs a moisture in the air (moisture absorption), causing blocking phenomenon in which water-absorbent resin particles are aggregated, and flowability as a powder is lost. Regarding this blocking phenomenon (moisture absorption blocking phenomenon), a problem is known that, during the production of the water-absorbent resin, and during the production of the sanitary material such as a disposable diaper and the like using the water-absorbent resin, blocking and adhesion to apparatus are caused midway of a hopper and a line, so that the handling property is greatly deteriorated, and that the stable production cannot be performed. Thus, as a means for overcoming such the blocking phenomenon (moisture absorption blocking phenomenon), an attempt to add an inorganic compound to a water-absorbent resin is known.
For example, there are the following: a method of mixing an inorganic compound into a water-absorbent resin in which a ratio passing through a sieve of a mesh opening size of 300 μm is about 60% by weight (e.g. see patent document 4 below); a water-insoluble water-absorbent resin composition in which water has been imparted to a mixture of a polyvalent metal salt and a water-absorbent resin (e.g. see patent document 1 below); a production process of scattering water containing a polyvalent metal salt to a water-absorbent resin (e.g. see patent document 5 below); an improved water-absorbent resin in which water containing a polyvalent metal salt has been added to a surface of a water-absorbent resin having a particle size of 5 to 500 μm and this has been heat-treated (e.g. see patent document 6 below), an improved water-absorbent resin obtained by adding water with an inorganic salt dissolved therein to a water-absorbent resin having a crosslinked surface(e.g. see patent document 7 below), and a water-absorbing agent in which a polyvalent metal compound has been added to a water-absorbent resin, and a polyvalent metal is localized near a surface of the water-absorbing agent after water absorption (e.g. see patent document 3 below).                [Patent Document 1] JP-A-257235/1986 (Kokai)        [Patent Document 2] JP-A-523289/2001 (Kohyo)        [Patent Document 3] JP-A-096151/2001 (Kokai)        [Patent Document 4] JP-A-523526/2002 (Kohyo)        [Patent Document 5] JP-A-007745/1987 (Kokai)        [Patent Document 6] JP-A-046241/1986 (Kokai)        [Patent Document 7] JP-A-124879/1997 (Kokai)
However, by such the technique, the problem of the gel blocking and the problem regarding the absorption capacity without load and the absorption capacity under load are overcome to a certain extent, but the liquid permeability under load cannot be said to be on a sufficient level, thus being problematic.

Water-absorbent resin having treated surface and process for producing the same


In a vehicle including a plurality of containing portions, namely, a front containing portion provided in an inner cover covering from the rear side a head pipe of a vehicle body frame at its front end and constituting a part of a vehicle body cover which can be locked in a fully closed condition, to facilitate the operation for releasing the lock conditions of the plurality of containing portions. A plurality of lock release operating buttons for respectively releasing the locked conditions of a plurality of containing portions inclusive of a front containing portion is disposed at an inner cover on a lateral side of the front containing portion.

1. Field of the Invention
The present invention relates to a vehicle including a plurality of containing portions which include a front containing portion provided in an inner cover covering from the rear side a head pipe with a vehicle body frame at its front end and including a part of a vehicle body cover which can be locked in a fully closed condition. More particularly to a layout structure for a plurality of lock release operators for respectively releasing the lock conditions of the plurality of containing portions.
The present invention also relates to a containing structure for a vehicle, including an inner cover for covering from the rear side a head pipe of a vehicle body frame at its front end and which constitutes a part of a vehicle body cover, and a containing case mounted to the inner cover in an openable and closable condition.
2. Description of Background Art
A motor scooter type motorcycle wherein an inner cover includes a part of a vehicle body cover for covering a head pipe from the rear side that is provided with a containing portion is known, for example, in Japanese Patent Laid-open No. 2003-285692.
In addition to the containing portion provided in the above-mentioned inner cover, a motorcycle generally includes other containing portion(s) such as, for example, a containing portion provided on the lower side of a rider's seat, and, in the conventional motorcycles, operating portions for releasing the lock conditions of the plurality of containing portions that are individually disposed respectively in the vicinity of the relevant containing portions. However, there are some cases where it is desired to release the lock conditions of the plurality of containing portions. In such cases, since the operating portions for releasing the lock conditions are apart from each other in the conventional motorcycle, the unlocking, lock releasing, operation is intricate to carry out.
A structure wherein a containing case with its rear end along the vehicle body front-rear direction that can be opened is mounted to an inner cover constituting a part of a vehicle body cover for covering a head pipe from the rear side and in which a cover member is capable of closing a rear end opening portion of the containing case and mounted to the inner cover so as to be turnable between a full closure position and a full opening position is disclosed in Japanese Patent Laid-open No. 2001-260968.

Lock release operator layout structure in vehicle


Methods and systems for calibrating transceivers are described. Analog transceiver components create errors, such as gain and offset errors in a receiver or a transmitter portion, which are compensated by adjusting digital signal processing in the computing portion of the transceiver. Errors can be measured in a calibration procedure and determined compensating values stored in a memory device of the transceiver. These values can then be retrieved when the transceiver is initialized for usage during signal processing of signals received by and transmitted by the transceiver.

The present invention is directed generally to radiocommunication systems and, more particularly, to techniques and structures for calibrating transceivers used in radiocommunication systems.
The first cellular mobile radio systems in public use were analog systems used to convey speech or other analog information. These systems comprised multiple radio channels for transmitting analog information between base and mobile stations by transmitting analog-modulated radio signals. More recently, digital systems have been implemented due to, for example, their promise of increased system capacity premised on their greater ability to tolerate interference. For example, in a time division multiple access (TDMA) radiocommunication system, each frequency can support a plurality of time-multiplexed channels, while in code division multiple access (CDMA) signals are encoded to such a degree that a high level of self interference is tolerable. Due to large existing customer bases having analog-only terminal equipment, dual-mode systems which support both analog and digital channels are becoming increasingly popular in certain areas. In the U.S., for example, systems specified by the EIA/TIA IS-54B publication are dual-mode systems.
In an analogous manner, digital signal processing (DSP) has become more prevalent in the radiocommunication industry for a variety of reasons. For example, unlike analog circuits, the operation of digital circuits does not depend on precise values of the digital signals. That is, since binary zeros and ones can be represented by significantly different voltages, the precision at which such voltages are held need not be very great. As a result a digital circuit is much less sensitive to the tolerances of component values and is also fairly independent of temperature, aging and other external parameters. The accuracy of digital circuits is thus much more reliable.
One part of the radiocommunication industry where the prevalence of DSP is having a significant impact is the design of radio transceivers. A transceiver, which is a combined transmitter and receiver, is used for transmitting and receiving signals over an air interface, e.g., between a base station and mobile station in a cellular system. Although the signals being transmitted and received are analog signals, the modulation may be of either analog or digital type, and the information carried by the signal will be digitally processed. Thus, a transceiver that uses digital signal processing techniques in a radiocommunication system is denoted a digital transceiver in this specification, although it may still contain analog parts, such as amplifiers and filters (and sometimes synthesizers and mixers), and regardless of whether the radio signals to be processed by the transceiver use analog or digital modulation.
In FIG. 1 a conventional digital transceiver 10 is shown schematically. Therein, a receive antenna 12 is used to capture signals transmitted over the air interface from, for example, other base stations and mobile stations (not shown). The received signals are input to analog receiver 14. Analog receiver 14 can include, for example, receive filters, downconverters and amplifiers for processing the signals received via antenna 12. However, many functions associated with processing received signals may not be included in block 14 as these functions are now performed using digital signal processing as described below. Accordingly, after being processed by the analog components of receiver 14, the output signal is provided to A/D converter 16 which transforms the analog signal into a digital signal. This allows digital computing part 17 to operate on the received signal and complete the signal processing which was not performed by analog receiver 14. For example, digital computing part 17 can be used to perform demodulation and decoding of the received signal.
On the transmitter side, digital computing part 17 performs various DSP routines which are used to prepare a signal for transmission, e.g., encoding and modulation. The digital signal output from digital computing part 17 is then input to a D/A converter 18 which transforms the digital signal into an analog signal. This analog signal is then received by analog transmitter 19 which includes various analog components that complete the signal processing for transmission by, for example, filtering, frequency upconverting and amplifying the signal before it is coupled to transmitting antenna 20.
Despite the fact that the number of analog components used in digital transceiver 10 have been reduced (i.e., by the substitution of DSP routines which perform signal processing tasks previously performed by additional analog components), the remaining analog parts (i.e., those denoted by blocks 14 and 19 in FIG. 1) continue to suffer from the imperfections described above. These imperfections result in gain and offset errors being introduced into the signals which are output from blocks 14 and 19.
To exemplify how such errors are introduced and how they are compensated according to a conventional solution, a model of an analog receiver will be studied in more detail. Those skilled in the art will appreciate that signals described herein are typically mathematically complex, i.e., with real and imaginary components. Accordingly, complex mathematics (e.g., complex-conjugation) is typically used to describe operations on these signals. However, to simplify this description the complex nature of signal operations is not shown explicitly in the equations and figures presented herein.
As mentioned above, an analog receiver normally suffers from a number of imperfections. Some of these imperfections create signal errors, such as gain errors and offset errors, that can be introduced to the wanted signal. FIG. 2 models how an analog receiver introduces an offset error and a gain error to a wanted signal S.sub.w. Therein, received signals are again captured by antenna 12. In the model of FIG. 2, ideal processing performed by receiver 14 is represented by block 22 which outputs the wanted signal S.sub.w, i.e., block 22 represents the effects of ideal analog components which have none of the imperfections described above. Signal processing blocks 24 and 26 represent the total offset and gain errors introduced onto the wanted signal S.sub.w by imperfections associated with the analog components of receiver 14. More specifically, block 24 represents the introduction of offset errors to the wanted signal and block 26 represents the effects of gain errors introduced by the analog components. The output signal, with introduced errors, is then represented by erroneous signal S.sub.o. Thus, the erroneous signal S.sub.o output by the receiver can be expressed as: EQU S.sub.o =(1+Gain.sub.eps)(S.sub.w +Offset.sub.eps)
where:
S.sub.w =Wanted signal PA0 S.sub.o =Erroneous signal PA0 Offset.sub.eps =Amplitude of the composite offset error PA0 Gain.sub.eps =Amplitude of the composite gain error
In a conventional receiver errors are typically compensated at the stage where they arise, using adjustment potentiometers and other adjustable analog components. FIG. 3 illustrates the principles of conventional calibration. Therein, the same reference numerals are used to denote the elements which were previously described with respect to FIG. 2. However, FIG. 3 also includes an offset compensation factor, Offset.sub.k, and a compensating gain factor, Gain.sub.k.
By adjusting the variable analog components to have values Offset.sub.k =Offset.sub.eps and Gain.sub.k =(1+Gain.sub.eps).sup.-1, the equality S.sub.out =S.sub.w will be achieved, whereby the receiver will be calibrated. The signal S.sub.out will then be fed through the A/D converter 16 to the digital computing part 17 for further processing.
As mentioned above, conventional calibration techniques rely upon the inclusion of adjustable components to compensate for errors introduced by analog components' imperfections. These adjustable components are used to realize the adjustments modelled by Offset.sub.k and Gain.sub.k. A more specific example of conventional calibration which illustrates this usage of adjustable components will now be described in terms of a transmitter portion of a digital transceiver. One example of an analog modulator for modulating analog data onto a carrier is the conventional quadrature modulator illustrated in the block diagram of FIG. 4. Quadrature modulators take advantage of the quadrature phases of sine and cosine waves to modulate twice the information on the radio carrier wave. For example, the even bits in a digital information datastream can be modulated on the cosine wave, and the odd bits in the digital information datastream can be modulated onto the sine wave.
In FIG. 4, the analog quadrature modulator includes an "in-phase" or I modulator 40, a "quadrature" or Q modulator 41, and a phase-splitting network 42 for supplying cosine and sine carrier frequency signals, respectively. Ideally, the signals provided by the network 42 are cos(.omega.t) and sin(.omega.t), where .omega. is the carrier signal's angular frequency. Also shown in FIG. 4 are an I and Q modulation generator 43 for supplying I and Q modulation signals, a combination network 44 for adding the outputs of the I modulator 40 and the Q modulator 41, and trim potentiometers 45, 46 for carrier balance/d.c. offset adjustments for the I and Q signals, respectively. Additional trim potentiometers 47, 48 for amplitude matching the I and Q signals, respectively, are also shown in FIG. 4. The phase-splitting network 42 may also be adjustable, as indicated by the diagonal arrows through trim potentiometers 47 and 48, to achieve as nearly as possible the desired 90.degree. phase difference between the sine and cosine carrier frequency signals.
The block diagram of FIG. 4 shows one exemplary way in which adjustable, analog components have been used to conventionally calibrate an analog device. However, these types of conventional calibration techniques rely upon the adjustment of potentiometers, capacitors and inductors during manufacturing. As will be recognized by those skilled in the art, this calibration process is both costly and unreliable. Moreover, there are certain types of errors which cannot be easily compensated for using these conventional techniques, e.g., in-band filter ripple. In-band filter ripple refers to the variation in the sensitivity of a receiver when tuning to different frequencies or channels within the transceiver's frequency range. This ripple is caused by the presence of band-limiting filters which are used in the receiver to remove strong, out-of-band signals. Unfortunately, in-band ripple can lead to a variety of difficulties, including inaccurate signal strength measurements.


A fuel injection apparatus having a plurality of high pressure fuel injection pumps for supplying fuel to a common rail, of which amounts of fuel discharge can be controlled by a fuel supply amount adjusting device of simple and reliable construction. The fuel supply amount adjusting device is provided to fuel feed passages for feeding fuel to the plunger rooms. The adjusting device includes a spool valve device for varying opening area of each of passages for introducing fuel into each of the plunger rooms by sliding a spool fitted slidably in a spool valve case, a spool drive device for sliding the spool, and a controller for controlling the spool drive device so that the spool is slid to a position at which the opening area coincide with area required depending on engine operating conditions.

1. Field of the Invention
The present invention relates to a fuel injection apparatus and applied to a diesel engine, etc. equipped with an accumulator fuel injection apparatus, the apparatus being composed such that high pressure fuel pumps are provided each of which compresses fuel introduced into a plunger room to high pressure by a plunger fitted in a plunger barrel and reciprocated by means of a fuel cam to supply the compressed fuel to a common rail, and the high pressure fuel accumulated in the common rail is injected periodically at determined injection timing into each of the cylinders of the engine.
2. Description of the Related Art
An accumulator fuel injection equipment used in a diesel engine is provided with a plurality of high pressure fuel injection pumps each of which compresses fuel introduced into a plunger room to high pressure by a plunger fitted in a plunger barrel and reciprocated by means of a fuel cam. The high pressure fuel accumulated in a common rail is supplied to each of fuel injection valves to be injected periodically at determined injection timing into each engine cylinder.
In an accumulator fuel injection apparatus for the diesel engine like this, discharge duration of high pressure fuel from each of the high pressure fuel pumps is controlled by controlling opening/closing of a low pressure side fuel feed passage by means of an electromagnetic valve provided to each of the high pressure fuel pumps as disclosed for example in Japanese Laid-Open Patent Application No. 64-73166 (patent literature 1) and Japanese Laid-Open Patent Application No. 7-217515 (patent literature 2).
According to the art disclosed in the patent literature 1, fuel introduced into a plunger room of each of a plurality of high pressure fuel pumps is compressed to high pressure by a plunger and supplied to a common rail by closing a fuel feed passage to the plunger room by an electromagnetic valve while the plunger is in the up stroke. The electromagnetic valve is then opened when the plunger moved up near to its top dead center and fuel is introduced in the plunger room as the plunger moves down.
The patent literature 2 relates to improvement of the electromagnetic valve of the high pressure fuel pump, in which the electromagnetic valve is increased in responsivity by making it possible to reduce spring force to retain valve body opened; by allowing force to be reduced which exerts on the valve body in direction to close the valve when fuel-back flows through the valve.
In the prior art disclosed in the patent literature noted above, an electromagnetic valve is provided for each of high pressure fuel pumps for pressure feeding fuel to a common rail, and fuel introduced in the plunger room of high pressure fuel pump is compressed to high pressure and discharged to the common rail by closing each electromagnetic valve by a signal form a controller, or high pressure fuel remaining in the plunger room is spilled to a fuel feed passage side by opening the electromagnetic valves by a signal from the controller.
Therefore, as an electromagnetic valve is provided for each of the high pressure fuel pumps and a controller for controlling the electromagnetic valve is provided, devices for controlling fuel discharge and spill become complicated requiring a number of parts and resulting in increased cost. Further, the likelihood of occurrence of a malfunction in the electronic components of the electromagnetic valves and electronic controller for controlling fuel discharge or introduction is higher as compared with a mechanical control device.
Furthermore, as control of fuel discharge and spill is done by electromagnetic valves provided for each of the fuel pumps and a controller in the prior arts, time retard inevitably occurs from the time of detection of engine operation conditions to the time to actuate the electromagnetic valve by means of the controller when starting the engine. Thus, the period of starting the engine may be increased resulting in deteriorated engine startability.


A device and method to convert residual hydrogen present in a fuel cell cooling system into water. An oxygen-bearing fluid is supplied to the cooling system from a source that also has elevated moisture levels to minimize the likelihood that the oxygen-bearing fluid will dry out or otherwise deplete the coolant in the cooling system. One or more valves are included to avoid the formation of adverse pressure gradients that could inhibit the continued supply of the oxygen-bearing fluid to the cooling system.

The present invention relates generally to ways to convert unreacted hydrogen present in a fuel cell coolant into water, and more particularly to ways to reduce the buildup of pressure within a coolant tank so that oxygen used to react with the hydrogen can be introduced into a reaction chamber for the catalytic removal of the hydrogen regardless of the fuel cell power output.
In many fuel cell systems, hydrogen or a hydrogen-rich gas is supplied through a flowpath to the anode side of a fuel cell while oxygen (such as in the form of atmospheric oxygen) is supplied through a separate flowpath to the cathode side of the fuel cell. An appropriate catalyst (for example, platinum) ionizes the hydrogen into a proton and electron on the anode side such that upon subsequent combination of the proton with oxygen and the electrons at the cathode side, electric current is produced with high temperature water vapor as a reaction byproduct.
In one form of fuel cell, called the proton exchange membrane (PEM) fuel cell, an electrolyte in the form of a membrane is sandwiched between two electrode plates that make up the anode and cathode. The membrane may be formed from a perfluorinated polymer containing sulphonic acid, which allows the formation of negatively charged transfer sites that can conduct positively charged ions formed in the anode. In the case of hydrogen fuel as one of the reactants, the positively charged hydrogen ions pass through the membrane to react with oxygen and electrons present on the cathode. This layered structure of membrane sandwiched between two electrode plates is commonly referred to as a membrane electrode assembly (MEA), and forms a single fuel cell. Many such single cells can be combined to form a fuel cell stack, increasing the power output thereof. While the present invention is especially applicable to the PEM fuel cell, it will be appreciated by those skilled in the art that the use of other fuel cell configurations with the present invention is also within the purview of the present disclosure.
The reaction at a fuel cell cathode is exothermic, giving off a significant amount of heat. Accordingly, fuel cells with larger power outputs, such as in automotive applications, where tens (if not hundreds) of kilowatts may be required, are equipped with supplemental (usually liquid-based) cooling systems to prevent damage to the fuel cell components. The coolant can be supplied through various sources, such as a dedicated circuit including a cooling tank. Coolant make-up components may be further included to augment the supply of coolant lost due to leakage, evaporation or the like. In one form of coolant delivery, coolant distribution plates with flow channels can be placed between the various anode and cathode plates to conduct away heat produced by the aforementioned reaction. In addition to cooling, humidification schemes are often necessary to maintain a proper water balance in the fuel cell. One use for such humidification is to keep the membrane from drying out and producing a concomitant reduction in proton conductivity.
The high pressures and closely-spaced relationship between both the reactant and coolant flowpaths means that some fluid crosstalk and related contamination will occur. Thus, excess (unreacted) quantities of hydrogen may build up in the coolant. It is desirable to reduce the presence of this unreacted hydrogen in the coolant. One way to achieve this reduction is to pass the hydrogen-contaminated coolant through a catalytic reaction between the hydrogen and an oxygen-bearing fluid (such as ambient air from an air ventilation flow) to convert the hydrogen into water in a manner similar to that occurring on the fuel cell cathode. Unfortunately, this approach is disadvantageous because the presence of the relatively dry ventilation air that is necessary to sustain the reaction at the catalyst tends to draw away the much-needed humidity (and water) from the cooling system, necessitating coolant make-up. In addition, the buildup of water resulting from the catalytic conversion of the excess hydrogen is problematic because it increases the pressure within a closed cooling system, which tends to hamper further operation of the hydrogen-removing reaction. Furthermore, if the pressure within the cooling system were allowed to consistently remain above that of the cathode or anode loop of the fuel cell, small leakages of cooling fluid (which may contain glycol or related materials) from the coolant system would find their way into the cathode or anode loop, with a potential loss in fuel cell durability. In addition, it is important for service to have access to the open coolant tank. Yet the direct contact of service personnel to hydrogen is undesirable in an open system, as an ignition source could lead to a fire.
Accordingly, there exists a need to ensure thorough removal of unreacted hydrogen from the cooling system of an operating fuel cell. There further exists a need to relieve the pressure buildup in a cooling system so that an oxygen-bearing fluid can be delivered to the catalytic reaction site regardless of the power setting in the fuel cell.

Device and method to release the overpressure of a fuel cell coolant tank


A system to provide a multipoint processing terminal and a multicast bridging terminal to provide mixing, switching, and other processing of media streams under the control of H.323 components. Application Programming Interfaces defined for the multipoint processing terminal provide a multipoint control unit with the capability to change the default behavior of the multipoint processing terminal by allowing the multipoint control unit to control the routing audio and video streams in the multipoint processing terminal and control the media formats in a multipoint conference. Multipoint processing acceleration functionality is provided by providing interfaces to allow hardware accelerated implementations of multipoint processing terminals. The multicast bridging terminals enables clients using one type of control signaling and media streaming to join other conferences using different types of control signaling and media streaming by receiving audio or video data from an incoming media stream and performing any processing necessary to transform the media stream from the incoming stream data format to the outgoing stream data format.

Frequently, situations arise where a meeting between geographically separated parties would be appropriate, but the expenses associated with physical travel are prohibitive to that meeting taking place. The meeting size may exceed available space and gathering all meeting participants in one place is often inefficient. In these situations, industry developed teleconferencing, which provides a convenient, low-cost solution by allowing individuals from various geographic locations to have a meeting over the telephone on the Public Switched Telephone Network (PSTN). While teleconferencing solved some problems, it soon became apparent that teleconferencing is limited to situations where only voice communication is necessary.
In response, industry developed video conferencing systems and data transfer systems on separate networks. These conferencing systems required new and significant hardware, software and programming, and significant communications network connections. For example, stand-alone, "room" systems for audio and video conferencing typically require dedicated hardware at significant expense, in the tens of thousands of dollars, utilizing dedicated video cameras, television or video displays, microphone systems, and the additional video conferencing equipment. These systems also require as many as six (or more) contiguous communication channels. Such communication network capability is also expensive and potentially unnecessary, particularly when the additional channels are not in continuous use. These separate networks have different transport requirements and are expensive to install, maintain, and reconfigure.
As computer technologies advanced, the concept of using voice, data and video over existing IP-based LANs, WANs, intranets, and the Internet emerged. Industry leaders developed IP telephony that enabled multimedia (voice, data, and video) collaboration over a network and it has revolutionized the way society works, entertains, and stays informed. As IP telephony matures and organizations continue to shift from the expensive and inflexible PSTNs to IP-based networks, industry leaders have developed and are developing standards for multimedia communications. The International Telecommunications Union (ITU) is one organization that is developing these standards. One set of ITU standards for multimedia is called H.323.
The H.323 set of standards include standards for data channels, monitoring channels, and control channels. According to the H.323 group of standards, audio and video data streams to be transmitted are encoded (compressed) and packetized in conformance with a real-time transport protocol (RTP) standard. The packets thus generated include both data and header information. The header information includes information whereby synchronization, loss detection, and status detection are facilitated. In order to allow for the exchange of status information between a sender and a receiver, a real-time transport control protocol (RTCP) channel is opened. An H.245 control channel is established to provide control functions. This channel supports the exchange of capability information, the opening and closing of data channels, and other control and indication functions. Within the H.323 standard, video applications may use the H.261, H.262, or H.263 protocols for data transmissions, while audio applications may use the G.711, G.722, G.723.1, G.728, or G.729 protocols. Any class of network which utilizes TCP/IP will generally support H.323 compliant teleconferencing. Examples of such networks include the Internet and many LANs. FIG. 13 illustrates an H.323 inter-network 800.
Four logical entities or components are essential in an H.323 enabled network. These are terminals 802, gateways 806, gatekeepers 808, and multipoint control units (MCU) 810. Terminals, gateways, and MCUs are collectively known as endpoints. An H.323-enabled network can be established with only terminals, but the other components are essential to provide greater practical usefulness of the services. A terminal, or a client, is an endpoint where H.323 data streams and signaling originate and terminate. It may be a multimedia PC with a H.323 compliant stack or a standalone device such as a USB (universal serial bus) IP telephone 818. A terminal must support audio communication 812, 814. Video communication 816 and data 820 communication support is optional.
A gatekeeper 808 ensures reliable, commercially feasible communications. A gatekeeper provides central management and control services. When a gatekeeper exists, all endpoints (terminals, gateways, and MCUs) must be registered with it. Control messages are routed through the gatekeeper. The gatekeeper provides several services to all endpoints in its zone. These services include address translation, admission and access control of endpoints, and may provide bandwidth management, call routing capability, and control of media routing. A gatekeeper can route all calls originating or terminating in its zone, and may control media routing of those calls. A gatekeeper that controls media routing also acts as a multipoint controller (MC). This capability provides numerous advantages. Gatekeepers map LAN aliases to IP addresses and provide address lookups when needed. Gatekeepers also exercise call-control functions to limit the number of H.323 connections and the total bandwidth used by these connections, in an H.323 zone. A gatekeeper can re-route a call to an appropriate gateway based on bandwidth availability.
A gateway 806 is an optional component in a H.323-enabled network. Gateways bridge H.323 conferences to other networks, communications protocols, and multimedia formats and provides data format translation, control signaling translation, audio and video codec translation, and call setup and termination functionality on both networks. Gateways are not required if connections to other networks, such as a PSTN 420, or non-H.323-compliant terminals are not needed.
A multipoint control unit (MCU) 810 enables conferencing between three or more endpoints. It consists of a mandatory multipoint controller (MC) and zero or more multipoint processors (MP). The MCU may be combined into a terminal, gateway, or gatekeeper. In cases where the gatekeeper contains a MC, the MC component of the MCU may act as a slave MC under control of the gatekeeper's MC. The multipoint controller provides a centralized location for media control channels of a multipoint conference setup. Media control signaling is routed through the MC so that endpoints capabilities can be determined and communication parameters negotiated. The MC may be used in a point-to-point call which can later be extended into a multipoint conference. When there is a change in the number of participants in the conference, the MC can determine the distribution topology to use for the audio and video streams depending on the multicast capability of the underlying network, the capabilities of MPs in the network, the capabilities of the terminal endpoints, and the physical topology of the network with respect to the terminal endpoints and MP endpoints of the multipoint conference. The multipoint processor handles the mixing, switching, and processing of the audio, video, and data streams among the conference endpoints. The MCU is necessary in a centralized multipoint conference where each terminal establishes a point-to-point connection with the MCU. The MC component of the MCU determines the capabilities of each terminal and MP component of the MCU sends each terminal a processed media stream. In the decentralized model of multipoint conferencing, a MC ensures communication compatibility, but the media streams are multicast and mixing is performed at each terminal. It should be noted that media distribution in a multipoint conference may be a hybrid of centralized and decentralized distribution modes, media may be distributed through multiple MPs, and distribution may be via multicast network capabilities in some, all, or none of the branches of the conference.
In either type of multipoint conferencing, there are multiple audio and video streams and these streams could be coming from various sources and processing requirements for the streams may be different. For these streams to be seen by all participants, the streams may need to be transcoded to formats that participants are capable of seeing. If this could not be done for a particular participant, that participant could not participate in the conference. In order to allow all potential participants to participate in a conference, the MCU and the gateway has to have the capability to perform the transcoding that may be required. One shortcoming of this is that the MCU or gateway has to be a mammoth service provider to perform the transcoding that may be required. A further drawback is that the MCU or gateway would have to be in complete control of the media for the entire multipoint conference and know exactly what has to be done with the media.
A method is needed whereby the computational resources of specialized terminals are used to transcode data from one format to another or apply signal processing operations to the data in its native format, thereby freeing up resources for the MCUs and gateways.


In a flat-type semiconductor stack formed by alternately stacking flat-type semiconductor devices (1) and heat-radiating elements (2), a projecting pin (7) is provided on a contact surface of at least one flat-type semiconductor device (1) while a positioning recess (8a) and a guide groove (8) are formed in a contact surface of at least one heat-radiating element (2), the guide groove (8) extending directly from the positioning recess (8a) to a side surface of the heat-radiating element (2). The flat-type semiconductor device (1) is aligned with the heat-radiating element (2) by fitting the pin (7) in the guide groove (8) and sliding the pin (7) along the guide groove (8) until the pin (7) stops to slide at the positioning recess (8a).

The present invention pertains generally to semiconductor power converters using flat-type semiconductor devices and, more particularly, relates to flat-type semiconductor stacks formed of alternately stacked flat-type semiconductor devices and heat-radiating elements.
Generally, a flat-type semiconductor stack used in a semiconductor power converter is made by alternately stacking layers of flat-type semiconductor devices, such as gate commutated turn-off thyristors (GCTs), and heat-radiating elements, such as heat sinks, for cooling the flat-type semiconductor devices, and pressurizing the layers in their stacking direction.
As a result of an increase in capacity in recent years, the flat-type semiconductor stacks tend to have larger outside dimensions and produce increased amounts of heat to be absorbed and dissipated, making it necessary to increase the physical size of their heat-radiating elements. Today, the flat-type semiconductor stacks are of greater importance to industrial applications. In this situation, there is a growing demand these days for power converters having a compact structure produced by alternately stacking multiple layers of flat-type semiconductor devices.
In a flat-type semiconductor stack produced by stacking multiple layers of large-sized flat-type semiconductor devices and heat-radiating elements, it is important to accurately match the center of each flat-type semiconductor device when assembling them or replacing any of the flat-type semiconductor devices.
Gate-integrated flat-type semiconductor devices featuring improved performance integrated with gate circuits have become available in recent years. This results in an increase in the weight of the flat-type semiconductor devices and makes it necessary to match their centers more accurately.
FIG. 7 is a side view of a conventional flat-type semiconductor stack showing in particular how its individual elements are stacked. As can be seen from FIG. 7, specific numbers of flat-type semiconductor devices 1 and heat-radiating elements 2 for cooling the flat-type semiconductor devices 1 are alternately stacked, and these devices 1 and elements 2 are pressurized from both ends in their stacking direction.
FIG. 8 is a perspective view showing how the flat-type semiconductor devices 1 and the heat-radiating elements 2 of the flat-type semiconductor stack are aligned.
Referring to FIG. 8, a positioning hole 3a is formed at the center of each contact surface of the flat-type semiconductor device 1, whereas a projecting center pin 3 is fixed to each contact surface of the heat-radiating elements 2 at a position corresponding to the positioning hole 3a. When stacking the flat-type semiconductor devices 1 and the heat-radiating elements 2, they are accurately aligned as each center pin 3 is inserted into the corresponding positioning hole 3a.
When it becomes necessary to replace one flat-type semiconductor device 1 of this flat-type semiconductor stack upon completion of its assembly, the adjacent heat-radiating elements 2 are separated from the flat-type semiconductor device 1, creating gaps wider than the height of the center pins 3 as shown in FIG. 9. Then, the flat-type semiconductor device 1 is lifted and pulled out in a manner that the center pins 3 would not damage the flat-type semiconductor device 1. When fitting a new flat-type semiconductor device 1, it is lifted and positioned such that the center pins 3 of the adjacent heat-radiating elements 2 exactly align with the positioning holes 3a in the flat-type semiconductor device 1 with utmost care not to damage the new flat-type semiconductor device 1 by the center pins 3. Then, the center pins 3 are fitted into the positioning holes 3a until the gaps between the flat-type semiconductor device 1 and the heat-radiating elements 2 are eliminated.
FIG. 10 is an exploded perspective view of a flat-type semiconductor stack including a gate-integrated flat-type semiconductor device 6 formed by mounting a flat-type semiconductor device 1 and a gate circuit 5 on a single substrate 4, wherein the gate-integrated flat-type semiconductor device 6 and heat-radiating elements 2 are aligned using the aforementioned conventional positioning method shown in FIG. 8. In this example of the prior art, the gate-integrated flat-type semiconductor device 6 and the upper heat-radiating element 2 are aligned by inserting a center pin 3 projectingly fixed to a bottom contact surface of the upper heat-radiating element 2 into a positioning hole 3a formed in a top contact surface of the gate-integrated flat-type semiconductor device 6 in the same manner as shown in FIG. 8.
In this flat-type semiconductor stack, another positioning hole 3a is formed in a bottom surface of the substrate 4 (bottom side of the substrate 4 as illustrated in FIG. 10) that is joined to the lower heat-radiating element 2.
Since the flat-type semiconductor devices 1 and the heat-radiating elements 2 are aligned in the aforementioned manner in the conventional flat-type semiconductor stacks, it is necessary to create gaps wider than the height of the center pins 3 between one flat-type semiconductor device 1 to be replaced and its adjacent heat-radiating elements 2. It is therefore necessary to provide sufficient space allowance between the flat-type semiconductor device 1 and the adjacent heat-radiating elements 2 that enables the heat-radiating elements 2 to be moved in their stacking direction for making gaps wider than the height of the center pins 3. This tended to make the construction of the flat-type semiconductor stacks complicated.
Also in the conventional flat-type semiconductor stacks, it is necessary to lift and pull out the flat-type semiconductor device 1 to be replaced, and insert a new flat-type semiconductor device 1. With the size and weight of the flat-type semiconductor devices 1 increasing nowadays, a large force or a dedicated jig is needed for lifting each flat-type semiconductor device 1. Furthermore, there is an increased risk of damaging the flat-type semiconductor device 1 by the center pins 3 when replacing it, resulting in a significant deterioration in reliability of the flat-type semiconductor device 1.
The flat-type semiconductor devices 1 and the heat-radiating elements 2 are positioned by visually aligning the center pins 3 and the positioning holes 3a. As a result of the increase in size of the flat-type semiconductor devices 1, their central positions have become distant from the viewpoint of a worker, and this makes it difficult and time-consuming to carry out position alignment work. In addition, if the gaps between one flat-type semiconductor device 1 and the heat-radiating elements 2 are eliminated before their centers are accurately aligned, the flat-type semiconductor device 1 or the adjacent heat-radiating elements 2 could be damaged, resulting in a deterioration of electrical performance of the flat-type semiconductor device 1 or of heat-dissipating performance of the heat-radiating elements 2.
This invention has been made to provide a solution to the aforementioned problems of the prior art. Specifically, it is an object of the invention to provide a flat-type semiconductor stack which requires reduced space allowance that enables a flat-type semiconductor device and its adjacent heat-radiating element to be moved for making a gap between them, wherein the flat-type semiconductor device and the heat-radiating element can be accurately and easily aligned with reduced risk of physical damages.
According to the invention, a flat-type semiconductor stack, which is formed by alternately stacking flat-type semiconductor devices and heat-radiating elements and pressurizing them in their stacking direction, comprises a position alignment mechanism for aligning contact surfaces of at least one each flat-type semiconductor device and heat-radiating element. The position alignment mechanism achieves alignment of the contact surfaces of the aforesaid one each flat-type semiconductor device and heat-radiating element by allowing the flat-type semiconductor device to slide along the heat-radiating element in a direction perpendicular to the stacking direction and stopping sliding motion of the flat-type semiconductor device at a positioning part.
This construction makes it easy to accurately align the flat-type semiconductor device and the heat-radiating element and to replace the flat-type semiconductor device when the need arises.
In one form of the invention, the position alignment mechanism includes a projecting pin provided on the contact surface of the flat-type semiconductor device or the heat-radiating element, a positioning hole in which the pin is fitted, the positioning hole being formed in the contact surface of the flat-type semiconductor device or the heat-radiating element whichever unprovided with the pin, and a guide groove formed in the same contact surface as the positioning hole, the guide groove extending directly from the positioning hole to a side surface of the flat-type semiconductor device or the heat-radiating element in which the positioning hole is formed.
In this construction, it is possible to accurately align the flat-type semiconductor device and the heat-radiating element by placing the pin in the guide groove and sliding the pin along the guide groove until the pin fits in he positioning hole. This construction also makes it possible to decrease the space allowance that enables the flat type semiconductor device and the heat-radiating element to be moved for making a gap between them and to reduce the risk of damaging them. In addition, the flat-type semiconductor device can be easily replaced in this construction.
In another form of the invention, at least one of the flat-type semiconductor devices is a gate-integrated flat-type semiconductor device formed by mounting a semiconductor element on a substrate together with a gate circuit, herein the position alignment mechanism includes a projecting pin provided on a contact surface of the substrate, a positioning hole in which the pin is fitted, the positioning hole being formed in the contact surface of the heat-radiating element, and a guide groove formed in the contact surface of the heat-radiating element, the guide groove extending directly from the positioning hole to a side surface of the heat-radiating element.
In this construction, it is possible to accurately align the gate-integrated flat-type semiconductor device and the heat-radiating element by placing the pin in the guide groove and sliding the pin along the guide groove until the pin fits in the positioning hole. This construction also makes it possible to decrease the space allowance that enables the gate-integrated flat-type semiconductor device and the heat-radiating element to be moved for making a gap between them and to reduce the risk of damaging them. In addition, the gate-integrated flat-type semiconductor device can be easily replaced in this construction.
In a varied form of the invention, at least one of the flat-type semiconductor devices is a gate-integrated flat-type semiconductor device formed by mounting a semiconductor element on a substrate together with a gate circuit, wherein the position alignment mechanism includes a projecting pin provided on the contact surface of the heat-radiating element, a positioning hole in which the pin is fitted, the positioning hole being formed in the substrate, and a guide groove formed in the substrate, the guide groove extending directly from the positioning hole to a side surface of the substrate.
In the construction, it is possible to accurately align the gate-integrated flat-type semiconductor device and the heat-radiating element by placing the pin in the guide groove and sliding the pin along the guide groove until the pin fits in the positioning hole. This construction also makes it possible to decrease the space allowance that enables the gate-integrated flat-type semiconductor device and the heat-radiating element to be moved for making a gap between them and to reduce the risk of damaging them. In addition, the gate-integrated flat-type semiconductor device can be easily replaced in this construction.
The position alignment mechanism may include a plurality of pins provided on one contact surface and a plurality of positioning holes and guide grooves formed in the opposite contact surface.
This construction makes it possible to avoid angular displacement and align the flat-type semiconductor device (gate-integrated flat-type semiconductor device) and the heat-radiating element more accurately.
In another varied form of the invention, at least one of the flat-type semiconductor devices is a gate-integrated flat-type semiconductor device formed by mounting a semiconductor element on a substrate together with a gate circuit, wherein the position alignment mechanism includes a groove formed in the contact surface of the heat-radiating element that comes in contact with a bottom surface of the substrate, the groove allowing the substrate to be fitted in from its side surface, and an end wall of the groove serving as the positioning part.
In this construction, it is possible to align the gate-integrated flat-type semiconductor device and the heat-radiating element more accurately and easily by sliding the substrate and fitting it in the groove in the heat-radiating element. This construction also makes it possible to decrease the space allowance that enables the gate-integrated flat-type semiconductor device and the heat-radiating element to be moved for making a gap between them and to reduce the risk of damaging them. In addition, the gate-integrated flat-type semiconductor device can be easily replaced in this construction.
In still another form of the invention, at least one of the flat-type semiconductor devices is a gate-integrated flat-type semiconductor device formed by mounting a semiconductor element on a substrate together with a gate circuit, wherein the position alignment mechanism includes a positioning plate for aligning an end portion of the heat-radiating element, the positioning plate being provided on a bottom surface of the substrate.
In this construction, it is possible to align the gate-integrated flat-type semiconductor device and the heat-radiating element more accurately and easily by sliding the substrate and securing the end portion of the heat-radiating element by the positioning plate. This construction also makes it possible to decrease the space allowance that enables the gate-integrated flat-type semiconductor device and the heat-radiating element to be moved for making a gap between them and to reduce the risk of damaging them. In addition, the gate-integrated flat-type semiconductor device can be easily replaced in this construction.
In yet another form of the invention, at least one of the flat-type semiconductor devices is a gate-integrated flat-type semiconductor device formed by mounting a semiconductor element on a substrate together with a gate circuit, wherein the position alignment mechanism includes a plurality of pins which serve as the positioning part for aligning an end portion of the heat-radiating element, the pins being provided on a bottom surface of the substrate.
In this construction, it is possible to align the gate-integrated flat-type semiconductor device and the heat-radiating element more accurately and easily by sliding the substrate and securing the end portion of the heat-radiating element by the multiple pins. This construction also makes it possible to decrease the space allowance that enables the gate-integrated flat-type semiconductor device and the heat-radiating element to be moved for making a gap between them and to reduce the risk of damaging them. In addition, the gate-integrated flat-type semiconductor device can be easily replaced in this construction.
These and other objects, features and advantages of the invention will become more apparent upon reading the following detailed description in conjunction with the accompanying drawings.


An electrically isolated and thermally conductive double-sided pre-packaged IC component, stamped lead members, drain pads, source pads, gate runner, and a MOSFET, IGBT, etc. are positioned between a pair of ceramic substrate members. Layers of solderable copper material are directly bonded to the inner and outer surfaces of the substrate members.

There are numerous types of circuit board components in use today, including those which have been specifically developed for high current and high power applications, such as for electrical vehicles. A current component used in these applications is a TO247 package. These devices utilize metalized ceramic substrates, stamped copper leads or lead frames, wire bonds, or solderable topside integrated circuits (ICs). There are a variety of solderable topside packages for use with discreet power devices and integrated circuits. One of these devices utilizes a plastic material to overmold the TO247 package except for the bottom surface. The plastic overmold protects the internal die and wire bonds or bond straps. The bottom surfaces in most instances are electrically attached and thermally conductive. It is typically left open to provide a thermal and electrical path out of the package. This path also allows the end user to connect the package to a heat sinking mass or an electrical bus.
With these prior devices, a heat sink pad must be added in order to achieve electrical isolation. The pad, however, adds thermal resistance to the assembly, typically on the order of 0.1 to 0.5 degrees per C./watt.

Electrically isolated and thermally conductive double-sided pre-packaged component


The invention relates to a flexible package (1) formed by a wrapped material having a first longitudinal joint (4) comprising two longitudinal edge portions of the wrapped material. The package (1) also has a first and a second transverse joint (5, 6), each comprising a transversal edge portion of the wrapped material. The package (1) comprises a pocket defined by said wrapped material, an openable flap (11) defined by an indication (10) and a label (12) fixed to the openable flap (11) and provided with a tab (14) for opening the package (1) along the indication (10). The package (1) is characterised by a first and a second longitudinal stiffener (3) being formed by said wrapped material and that said label (12) is adhesively fixed to at least one of said first and second longitudinal stiffeners (3). The invention also relates to a method of producing such package.

Flexible packages of the type 'flow pack' are well known. In their simplest form they are formed by wrapping a continuous web of material about its longitudinal axis and then joining the longitudinal edges of the web so that they form a joint extending along the longitudinal axis of the web. The wrapping is made around the intended contents. The thus formed tube is partitioned off to form a closed pocket by means of upper and lower transverse joints. A package of this type can also be made by wrapping the material into a tube which is partitioned off to form a pocket by means of a first transverse joint forming the bottom thereof. The pocket is filled with its contents and closed by means of a second transverse joint forming the top thereof.
One way of opening this type of package is by tearing off a corner or tearing apart one of the trans-verse joints. Such opening is difficult to control, since the material in the worse case scenario is torn in an uncontrolled manner, fully destroying the package. Also, it does not allow for resealing.
Resealable packages of this type using a flap and seal are known. A typical flap, indication and label are disclosed in U.S. Pat. No. 4,874,096. The package is a 'flow-pack' having an arcuate indication which defines the flap. The flap is covered by a resealable label. Further examples of documents describing this type of packages are WO86/06350 and EP 0 193 130.
The typical solution in these prior art resealable packages is to provide a flap in the package wall whose delimitation corresponds to the desired opening. The delimitation consists of an indication, which may be an area of locally thinner material, a perforation or a through slit. A self-adhesive label covers the flap and the indication. The indication, combined with the self-adhesive label, gives the package a controlled opening geometry and an opening that can be easily resealed. This solution however requires the indication to be smaller than the width or length of the package, depending on the orientation of the flap, since the label must cover, not only the indication, but also an area surrounding said indication. This involves problems to be explained below.
In the filled condition the walls of the package will conform to, and more or less follow the geometry of the object. Accordingly, also the indication and the label will conform to the geometry, making the width of the package and the opening seen in a horizontal plane more narrow. Supposing the object is a rectangular parallelepiped, there is a risk when pulling out the object through the opening, that the object will get stuck inside the package since the opening is too small. Even if it is possible to pull out the object, there is a risk that the corners of the object will tear the material and destroy the package. There is also a risk of damaging the object. The latter is especially the case if the object is easily damaged or rigid, e.g. slices of cheese or a printed circuit card.
One way to solve this is to increase the size of the package compensating for the conforming to the contour of the object. However, a larger package means superfluous use of material and a flapping, generally less aesthetic look.
It is admittedly possible for the indication to cover the full, or almost full width or length of the package. However, in that case the label must be applied and folded over from one wall to the other. This is especially the case if the label should cover the full extent of the indication, including any tearing lines that are formed during opening. Such label is hard to apply in high-speed production. There is a risk that the conformation of the side walls to the geometry of the object creates tensions damaging the indication, and it is hard to reseal the package. Further, if the indication is arranged in the longitudinal direction, there is no natural stopping means when tearing the material, unless the longitudinal joint, which generally is applied on the back wall, is repositioned in accordance with the desired shape and orientation of the flap.
Based on the above discussed problems, packages of the 'flow pack' type are generally not used for easily damaged or rigid objects where access to the full width or length is required through the opening. Instead different types of flexible or rigid deep drawn packages are used having a lid-like closure. This type of packages allow an opening to be formed across the full width/length or area of the mouth of the deep drawn package. This is however a type of package being different from the 'flow pack' type.

Flexible package and method of producing the same


A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to interconnect structures containing multiple wiring levels, and is compatible with Dual Damascene Back End of the Line (BEOL) processing.

Device interconnections in Very Large Scale Integrated (VLSI) or Ultra-Large Scale Integrated (ULSI) semiconductor chips incorporate multilevel interconnect wiring structures containing patterns of metal wiring layers called traces. Wiring structures within a given trace or level of wiring are separated by an intralevel dielectric, while the individual wiring levels are separated from each other by layers of an interlevel dielectric. Conductive vias are formed in the interlevel dielectric to provide interlevel contacts between the wiring traces.
By means of their effects on signal propagation delays, the materials and layout of these interconnect structures can substantially impact chip speed, and thus chip performance. Signal propagation delays are due to RC time constants wherein R is the resistance of the on-chip wiring, and C is the effective capacitance between the signal lines and the surrounding conductors in the multilevel interconnection stack. RC time constants are reduced by lowering the specific resistance of the wiring material, and by using interlevel and intralevel dielectrics (ILDs) with lower dielectric constants k.
A preferred metal/dielectric combination for low RC interconnect structures may be Cu metal with a dielectric such as SiO2 (k˜4.0). Due to difficulties in subtractively patterning copper, copper-containing interconnect structures are typically fabricated by a Damascene process. In a Damascene process, metal patterns inset in a layer of dielectric are formed by the steps of 1) etching holes (for vias) or trenches (for wiring) into the interlevel or intralevel dielectric, 2) lining the holes or trenches with one or more adhesion or diffusion barrier layers, 3) overfilling the holes or trenches with a metal wiring material, and 4) removing the metal overfill by a planarizing process such as chemical mechanical polishing (CMP), leaving the metal even or coplanar with the upper surface of the dielectric. The above process may be repeated until the desired number of wiring and via levels have been fabricated.
Fabrication of interconnect structures by Damascene processing can be substantially simplified by using a process variation known as Dual Damascene, in which patterned cavities for the wiring level and its underlying via level are filled in with metal in the same deposition step. This reduces the number of metal polishing steps by a factor of two, at substantial cost savings, but requires that a dual-relief pattern be introduced into the combined via and wiring level dielectric.
Low-k alternatives to the dielectric SiO2 include carbon-based solid materials such as diamond-like carbon (DLC), also known as amorphous hydrogenated carbon (a-C:H), fluorinated DLC (FDLC), SiCO or SiCOH compounds, and organic or inorganic polymer dielectrics. Nanoporous versions of SiO2 and these carbon-based materials have even lower k values, while air gaps have the lowest k values of any material where k˜1.00. The gas in the air gap may comprise air, any gaseous material or vacuum.
Examples of multilayer interconnect structures incorporating air gaps are described in U.S. Pat. No. 5,461,003, by R. H. Havemann and S-P Jeng; U.S. Pat. No. 5,869,880, by A. Grill and K. L. Saenger; and U.S. Pat. No. 5,559,055, by M. S. Chang and R. W. Cheung.
Air gaps can be formed by one of two basic methods. In the first method, described previously by J. G. Fleming et al. in Advanced Metallization and Interconnect Systems for ULSI Applications in 1996 p. 471–7 (1997) and shown in FIGS. 1A–1C herein, the air gap is formed in a structure comprising a cavity 10 between conductive features 20 on substrate 30 as shown in FIG. 1A. Air gaps or keyholes 40 are formed when cavity 10 is partially filled with a poorly conformal layer of dielectric 50 as shown in FIG. 1B. Poorly conformal dielectric 50 may be deposited by a process such as plasma-enhanced chemical vapor deposition (PECVD). FIG. 1C shows the structure of FIG. 1B after planarization by a process such as chemical mechanical polishing.
A second method for forming air gaps utilizes a sacrificial material which is removed after formation of a bridge layer, as illustrated in FIGS. 2A–2C herein and previously described in P. A. Kohl et al., Electrochemical and Solid-State Letters 1 49 (1998). FIG. 2A shows a planar structure comprising substrate 30, conductive features 20, and sacrificial material 60. The structure of FIG. 2A is then capped with a "bridge" layer 70 shown in FIG. 2B, followed by removal of sacrificial material 60 to leave air gap 80 as shown in FIG. 2C. Examples of sacrificial materials and removal methods include poly(methy methacrylate) (PMMA) and parylene (e.g., poly-para-xylylene sold under the trademark "Paralylene") which may be removed by organic solvents, oxygen ashing, and/or low temperature (˜200° C.) oxidation, and norborene-based materials such as BF Goodrich's Unity Sacrificial Polymer™, which may be removed by low temperature (350–400° C.) thermal decomposition into volatiles. In the case of Unity™, the volatiles actually diffuse through the bridge layer. Diffusion through a bridge layer was demonstrated by Kohl et al. for structures comprising SiO2 (500 nm) bridge layers deposited by low temperature PECVD.
Compared to solid dielectrics, air gap dielectrics have lower thermal conductivity, near-zero mechanical strength, and higher permeability to moisture and oxygen. Workable schemes for incorporating air gaps into interconnect structures must take these limitations into account. A particular concern with air gap dielectrics is that they leave metal wiring features more susceptible to the opens and shorts induced by electromigration driven mass transport, since the wiring features are no longer dimensionally constrained by a solid dielectric in which they are embedded. Another concern is that structures with air gaps may not be as uniformly planar as structures built with intrinsically more rigid solid dielectrics. This can be a problem if locally depressed areas are formed by bridge layer sag over unsupported air gaps, since metal over or filling these areas will remain in the structure after CMP and be a source of shorts and/or extra capacitance.
It is thus an object of this invention to provide a multilayer interconnect structure containing air gaps.
It is a more specific object of this invention to provide a stable, high performance multilayer interconnect structure containing air gaps in the plane of one or more buried wiring levels to reduce wiring capacitance.
It is a further object of this invention to provide an air-gap-containing interconnect structure which is resistant to electromigration failure and environmental corrosion.
It is an additional object of this invention to provide a method for forming multilayer interconnect structures containing voids, cavities or air gaps in the plane of one of more buried wiring levels, using Dual Damascene processing and an air gap defined initially by a solid sacrificial material which is subsequently removed by thermal decomposition to form a gas which is out-diffused or released through openings or removed by plasma, O2, microwave radiation or by radiant energy such as by ultra violet light or by a laser at a selected wavelength.

Multilayer interconnect structure containing air gaps and method for making

International Business Machines Corporation


A secondary vibration damping type crystal oscillator circuit is formed as a Colpitts type, in which a crystal unit is connected between base and collector terminals, a first capacitor is connected between emitter and collector terminals, and a second capacitor is connected between emitter and base terminals of a oscillating transistor. A region between the emitter and collector terminals or between the emitter and base terminals includes a reactance parallel circuit, in which an LC series circuit is connected in parallel to the first or second capacitor. The reactance parallel circuit has resonant characteristics that the reactance parallel circuit is made capacitive at an oscillating frequency in principal vibration mode of the crystal unit as an oscillating frequency, and a resonant frequency of the LC series circuit corresponds to the vibrational frequency in secondary vibration mode that is close to the principal vibration mode.

1. Field of the Invention
The invention relates to a technical field of a secondary vibration damping type crystal oscillator circuit which is formed as a Colpitts type oscillator circuit, and in particular, to a crystal oscillator circuit whose crystal unit is formed as an SC-cut crystal element to damp oscillation at a vibrational frequency in B mode.
2. Description of the Related Art
Crystal oscillator circuits have extremely high frequency stability due to their crystal units, to be adopted as sources of generating frequencies for various communication devices. As one of these, there is, for example, a crystal oscillator circuit using an SC-cut crystal unit excellent in stress sensitivity behavior, and this is particularly applied to, for example, a base station or the like whose frequency deviation is set in 1 ppb (parts per billion unit) to be highly-stabilized.
FIGS. 5A and 5B are diagrams of for explanation of one example of related art crystal oscillator circuits. FIGS. 5A and 5B are both high-frequency type crystal oscillator circuit (equivalent circuit) diagrams from which their power supplies, bias resistances, and the like are eliminated.
The crystal oscillator circuit of FIG. 5A has an oscillating resonant circuit 1 and an oscillating amplifier 2 that feedback-amplifies an oscillating frequency dependent on the oscillating resonant circuit 1. The oscillating resonant circuit 1 is a Colpitts type oscillator circuit in general, and is basically composed of a crystal unit 3 functioning as an inductor component and first and second capacitors C1 and C2 serving as dividing (split) capacitors. The oscillating amplifier 2 is composed of, for example, a transistor 2A, and the crystal unit 3 is connected between base and collector terminals, the first capacitor C1 is connected between emitter and collector terminals, and the second capacitor C2 is connected between emitter and base terminals.
For example, with a base potential of the oscillating transistor 2A as a standard, the terminals of the oscillating resonant circuit 1 are connected between the base and collector terminals, and a midpoint (series-connected point) of the first and second capacitors C1 and C2 is connected to the emitter. Then, a voltage between the terminals of the oscillating resonant circuit 1 is set to an oscillation output Vout, and a part of the oscillation output Vout divided by the first and second capacitors C1 and C2 is fed back to the region between the base and emitter terminals to be an input Vi. Thereby, the oscillating transistor 2A amplifies a part (input Vi) of the oscillation output, and these operations are repeated to continue oscillation.
Normally, because its output impedance can be decreased to make coupling with the subsequent stage easy, a common collector is adopted (FIG. 6A). Reference numerals and letters R1 and R2 in the drawing denote base and bias resistances, reference numeral and letter R3 is a load resistance, and reference letter Vcc is a power supply. Note that even in this case, it is a matter of course that the circuit diagram is the same as the oscillator circuit diagram of FIG. 5A described above at a high frequency.
The crystal unit (crystal element) 3 is formed as an SC-cut crystal element which is typical as a so-called double rotation Y cut system in which the Y-axis is rotated twice around the X-axis and the Z-axis of the crystal axes (XYZ). In the SC-cut crystal unit 3, as shown in a reactance characteristics diagram of FIG. 7, C mode as thickness-shear vibration is principal vibration, and normally, secondary vibration in B mode whose displacement direction is perpendicular to the principal vibration is generated. As is clear from an equivalent circuit of crystal unit (not shown), these principal vibration (C mode) and secondary vibration (B mode) both have resonance points (resonant frequencies) f1 and f2 and antiresonance points (antiresonant frequencies) f1′ and f2′.
In this case, the C mode and the B mode come close to each other, and the B mode comes to a higher frequency side by approximately 10% of the C mode, and its resonant level at the resonance point f2 is made the same or greater than that at the resonant point f1, which means that its crystal impedance (CI) is made the same or less than that in C mode. Then, in any case, the regions between the resonance points f1 and f2 and the antiresonance points f1′ and f2′ are considered as inductor regions ΔF1 and ΔF2, and the inductor region ΔF1 in C mode and the first and second capacitors C1 and C2 form the oscillating resonant circuit 1.
Thereby, a resonant frequency is determined on the basis of inductance at the vibrational frequency f1o in the inductor region ΔF1 and a composite capacitance of the first and second capacitors C1 and C2, and the vibrational frequency f1o in the inductor region ΔF1 is an oscillating frequency. However, an oscillating frequency is determined on the basis of the inductance, the composite capacitance, and a serial equivalent capacitance in which all the capacitances at the circuit side including the oscillating transistor 2A when viewed from the crystal unit 3 are added, and the oscillating frequency approximately corresponds to an oscillating frequency fo.
Accordingly, the inductor region ΔF1 (f1-f1′) between the resonance point f1 and the antiresonance point f′ in principal vibration (C mode) is a basic oscillation region in C mode. Then, this is the same as in secondary vibration (in B mode) as well, and the inductor region ΔF2 in B mode is an oscillation region in which oscillation is possible. Note that, in practice, the oscillation regions in the respective modes are narrower than the inductor regions ΔF1 and ΔF2.
On the other hand, as described above, the B mode comes close to the C mode, and its resonant level is made the same or greater than that in C mode, which means that its CI is made the same or less than that in C mode. Accordingly, it is difficult to set a circuit constant or the like in a case of oscillation at only the vibrational frequency f1o in the inductor region ΔF1 in C mode that is principal vibration, which brings about oscillation in B mode (at the vibrational frequency f2o in the inductor region ΔF2).
For this reason, for example, in JP-A-2006-345115, as shown in FIG. 6B, a first LC series circuit 4x composed of an inductor L and a capacitor C is connected between the midpoint of the first and second capacitors C1 and C2 and the emitter, and a second LC series circuit 4y which is the same as the first LC series circuit 4x is connected between the emitter and the ground (collector). Incidentally, even in this case, the circuit diagram is the same as the oscillator circuit diagram of FIG. 5B described above at a high frequency. A voltage applied to the first LC series circuit 4x is approximately corresponded to the vibrational frequency (i.e., oscillating frequency) f1o in the oscillation region ΔF1 in C mode, and a voltage applied to the second LC series circuit 4y is approximately corresponded to the vibrational frequency f2o in the oscillation region ΔF2 in B mode.
Thereby, the first LC series circuit 4x feeds back the oscillating frequency (vibrational frequency) f1o in C mode and frequency components in the vicinity thereof to the base via the midpoint of the first and second capacitors C1 and C2 from the emitter. Then, the first LC series circuit 4x suppresses the frequency domain (components) other than those, to form a sort of passband for C mode. Further, the second LC series circuit 4y forms a region for damping B mode so as to bring frequency components in the oscillation region ΔF2 in B mode from the emitter down to the ground potential to eliminate those from the feedback loop to the base. Accordingly, it is possible to damp oscillation in B mode, which makes certain of oscillation at the vibrational frequency f1o in C mode.
In this case, with respect to the negative resistance characteristics at the circuit side when viewed from the crystal unit 3, as shown in FIG. 8, given that a resistance value is 0 at a frequency fα between the oscillation region ΔF1 in principal vibration (C mode) and the oscillation region ΔF2 in secondary vibration (B mode), the characteristics become negative resistance in the oscillation region ΔF1 in C mode, and become positive resistance in the oscillation region ΔF2 in B mode. Accordingly, the oscillator circuit satisfies its electricity condition that is one of the oscillation conditions, to generate oscillation in C mode. However, the oscillator circuit does not satisfy the electricity condition in B mode, and does not generate oscillation.
Incidentally, JP-A-2000-295037 and JP-A-9-153740 also disclose related art crystal oscillator circuits.
However, in the related crystal oscillator circuits (B mode damping) having the above-described configurations, because the first and second series resonant circuits 4 (x and y) forming a passband for C mode that is principal vibration and a region for damping B mode that is secondary vibration are inserted into the feedback loop, there is a problem that the number of components is increased. Further, in the case of JP-A-2000-295037 as well, a passband for C mode and a region for damping B mode are formed for the same purpose. However, in this case as well, there is the problem that a number of components is increased in the same way.

Secondary vibration damping type crystal oscillator circuit


A communication device is described comprising a first antenna, a second antenna and a third antenna; a first transceiver configured to communicate using at least the first antenna; a second transceiver configured to communicate using at least the second antenna; and a controller configured to determine whether the third antenna is to be used by the first transceiver or the second transceiver based on a selection criterion and configured to control the first transceiver to communicate using the first antenna and the third antenna if the controller has determined that the third antenna is to be used by the first transceiver and to control the second transceiver to communicate using the second antenna and the third antenna if the controller has determined that the third antenna is to be used by the second transceiver.

Today's mobile communication devices (such as smartphones, tablets, notebooks etc.) may support multiple Radio Access Technologies (RATs) like WLAN (Wireless Local Area Network), Bluetooth, GPS (Global Positioning System), GSM (Global System for Mobile Communications), UMTS (Universal Mobile Telecommunication System), LTE (Long Term Evolution) etc. For the reception and transmission of wireless signals using a certain RAT a communication device needs an antenna. For high-data speed or improved reception with technologies like Receive Diversity or Transmit Diversity or MIMO (Multiple Input Multiple Output) even multiple antennas may be needed for a certain RAT, e.g. LTE or WLAN.
However, the available space in a mobile communication device is typically very limited and often not sufficient to place a higher number of antennas. A reduction of the size of the antennas may not be possible or may be undesirable since it may reduce the antennas' performance significantly. Furthermore, each antenna that is incorporated in a mobile communication device generates additional cost during production of the mobile communication device.

Communication device and method for performing radio communication


Disclosed is a method for controlling handoff by a network infrastructure, which includes collecting channel information and transmitting the channel information to a Mobile Terminal (MT) and a method for controlling handoff by a MT, which includes receiving channel information collected by a network infrastructure and making a handoff decision according to the channel information. The present invention also discloses apparatuses for controlling handoff. Applying the present invention, the handoff decision will be made based on both the information collected by the network infrastructure and the information collected by the MT, therefore blind handoff is reduced, the network workloads are balanced and the QoS is assured before and after the handoff.

IEEE 802.11 standards have been developed as the standards for Wireless Local Area Network (WLAN) and are widely supported and applied; meanwhile the demands for a large scale enterprise network, a large community network or even a Metropolitan Area Network (MAN) are brought forward. In a large WLAN, a great number of Access Points (APs) have to be deployed, each of which covers a specified area, to provide a large continuous coverage. Hence it is required that a Mobile Terminal (MT) shall be able to perform a handoff from one AP to another AP while moving around in the continuous coverage and still maintains service continuity. The basic handoff flow of an MT includes the following steps.
1) The MT scans wireless channels. The MT measures indexes of the wireless channels, e.g., the signal intensity, while scanning the wireless channels. Then the MT performs a handoff from one AP to another AP based on the measured indexes. For example, the MT may choose the channel with the best wireless channel quality as the destination AP in the handoff process.
2) The MT initiates a reassociation request. Having received the reassociation request initiated by the MT, the destination AP has to enable the system to delete the association between the MT and the origination AP, which was established before the handoff. Then the destination AP establishes a new association with the MT.
3) The data services of the MT are forwarded by the destination AP after the new association has been established. Meanwhile, the MT continues to scan and measure indexes of other wireless channels to determine whether it is necessary to perform a handoff to a new destination AP, and to determine the new destination AP when a handoff is needed.
Conventionally, the WLAN supports streaming media, voice services as well as common data services. When the MT performs a handoff, it is necessary to minimize the influence on the services caused by the handoff, and basic requirements on handoff include that:
a) the handoff period should be short enough so that the services will not be interrupted;
b) the quality of service (QoS) after the handoff should be better than the QoS before the handoff.
When a WLAN includes multiple APs in the network and an MT performs a handoff from one AP to another AP, there are two ways to perform the access control on the network infrastructure which include a distributive access control and a centralized access control.
As shown in FIG. 1, in a distributive access control which is performed by APs, the handoff of the MT from one AP to another AP is performed via exchanging information between the two APs. The IEEE 802.11f which is recommended by the IEEE P802 Working Group defines a protocol framework for the communication between APs, i.e., Inter-AP Protocol (IAPP), based on which the inter-AP handoff of the MT can be performed. The protocol defines the inter-AP interaction process involved in the association or reassociation of the MT with an AP. Furthermore, a Radius server for IAPP service is added into the infrastructure to ensure a safe communication between APs, which requires the APs to implement Radius protocol after being powered on and to register at the Radius server. An AP can look up the IP addresses of a corresponding AP on the Radius server by using the Basic Service Set Identification (BSSID) of the AP and starts IP layer based communication with the AP with security information from the Radius server. IEEE 802.11f adds extensions to the Radius protocol in order to support the functions.
As shown in FIG. 2, some manufacturers have brought forth a lightweight AP system architecture, i.e., some of the functions of Media Access Control (MAC) on the AP are centralized in a exchange, usually referred to as Wi-Fi exchange or a router, usually referred to as Access Router on an upper layer. The IETF CAPWAP Working Group divides the centralized WLAN into three types of architectures: Remote MAC, SPLIT MAC and Local MAC, in which the Wi-Fi exchange or the Access Router on the upper layer are generally referred to as an Access Controllers (ACs). In the Remote MAC architecture all MAC functions of an AP are transferred to the AC; in the SPLIT MAC architecture the MAC functions which are not sensitive to time are transferred to the AC; and in the Local MAC architecture the MAC functions are still performed by an AP, but managed by an AC. The lightweight AP equals SPLIT MAC architecture and related manufacturers have released a Lightweight AP Protocol (LWAPP) to IETE.
The most prominent advantage of the centralized architecture is that the APs can be managed and controlled in a centralized manner by an AC, especially in the inter-AP handoff process of the MT, in which the APs need not to communicate with each other directly, but to interact with the AC only. In an LWAPP based architecture, the control frames on the MAC layer of the air interface, e.g., the association request and reassociation request, are handled by the AC directly, therefore the access control in the handoff process is performed inside the AC entity.
In either the distribution system or the centralized system, the handoff decision in the WLAN is made by the MT according to the signal intensity collected by the MT, and the MT needs to scan all channels, which requires a long time, hence the conventional handoff scheme in which the MT scans all channels and makes handoff decision without considering other indexes of the channels may result in a low QoS e.g., congestion at an AP which causes a low QoS or even malfunctions including service unavailable or service interruption.

Method and apparatus for controlling handoff


An unloader that includes a pad replacing device provided adjacently to at least one of an upper carrying device and a lower carrying device. Each of the carrying devices includes an endless rotating member and plural unloader pads, the endless rotating member having a plurality of first pad attaching portions at intervals in a rotational direction, on which the unloader pads are detachably attached by sliding the unloader pads in a direction orthogonal to the rotational direction. The pad replacing device includes a pad setting portion and a pad moving portion, the pad setting portion having a second pad attaching portion on which a replacing pad is attached by sliding the replacing pad in the direction orthogonal to the rotational direction. The unloader pad is detached by being pushed by the replacing pad by moving the replacing pad to the unloader pad.

1. Field of the Invention
The present invention relates to an unloader for drawing in a molded product after the molded product is molded by extruding a material such as resin, metal, ceramic or the like by an extrusion device.
2. Description of the Related Art
There is known an unloader, as disclosed in JP-A-5-301268, for drawing in a molded product after the molded product is extruded by an extrusion device
The unloader includes belt conveyors at an interval in an up and down direction. The belt conveyors rotates endless belts by rotating drive drums. A lower face of a molded product is brought into contact with the endless belt of the lower belt conveyor, an upper face of the molded product is brought into contact with the endless belt of the upper belt conveyor, and the molded product is carried by rotating the upper and lower endless belts.