Under one aspect, a system for transmitting an IP-based message from an initiator to a receiver lacking an IP address via a packet-switched (PS) network capable of communicating IP-based messages and a circuit-switched (CS) network capable of communicating non-IP-based messages, includes: a serving node in communication with the PS network and the CS network, the serving node including logic to: receive the IP-based message from the initiator over the PS network; generate a trigger message responsive to the IP-based message, the trigger message including a non-IP-based message including instructions for the receiver to initiate a connection to the PS network; and transmit the trigger message to the receiver via the CS network, and the receiver including logic to initiate a connection to the PS network and to receive the IP-based message responsive to the trigger message. Methods are also disclosed.

1. Field of the Invention
This invention generally relates to wireless networks and to IP Multimedia Subsystem (IMS) networks.
2. Description of Related Art
Current wireless networks support circuit-switched (CS) and packet-switched (PS) connections. In some wireless networks, both types of connections may exist contemporaneously and be available to mobile handsets or user endpoints (UEs). In other wireless networks, a mobile handset may have access to either a CS connection or a PS connection but not both at the same time. Moreover, even if a mobile handset has a PS connection, it may lose packet connectivity due to a policy implemented by a network operator (e.g., in a situation where the operator has a limited number of IP addresses that need to be shared amongst a large number of handsets). In this case, because the mobile handset is no longer assigned an IP address, it is not reachable by addressing schemes based on IP addresses, i.e., it is not IP-accessible. In such situations, IP-based user-to-user signaling schemes such as SIP (Session Initiation Protocol) may become inoperable because one or more user handsets are no longer IP accessible.
CS and PS networks will now be described in greater detail. In a CS network such as PLMN, users' network mobile handsets are connected to Base Transceiver Stations (BTS) through a radio access network. The BTS in turn are connected to a plurality of Base Station Servers (BSC) that in turn are connected to a network of Mobile Switching Centers (MSC). The MSC provide wireless services to the users' handsets, and are also inter-connected with the Public Switched Telephone network (PSTN). This arrangement makes it possible for voice traffic to be carried between mobile handsets and landline telephone sets. The MSC in a wireless network effectively behaves as a switch that supports the mobility and roaming functions of a user's handset.
When a user's handset requests a telephone call or a service, such as voice mail, a prepaid call, or a toll-free call, it generates a "call event" at the MSC. Each call event can potentially "trigger" one or more Trigger Detection Points (TDP) in the MSC. When a call event triggers a particular TDP, the MSC sends a pre-specified message to a Service Control Function (SCF). The message includes, for example, the phone numbers of the calling and called parties, and the nature of the service request. The SCF then "fields" the message, i.e., service logic within the SCF responds appropriately to the message. In WIN/CAMEL implementations, the MSC and SCF communicate using standards-based protocols such as Transaction Capabilities Application Part (TCAP) from the family of protocols commonly referred to as Signaling System 7 (SS7).
For example, consider a "call origination" call event that happens when a user makes a new call request at the MSC. This call event triggers a corresponding TDP, causing the MSC to send a message with event-related information to the SCF, e.g., the calling and called numbers. The SCF then processes the message, e.g., by querying an internal or external database to verify that the calling party is authorized to initiate telephone calls. The SCF then responds back to the MSC with a message that indicates whether the call is "allowed" or "denied."
In a PS network, services are generally supported by IP Multimedia Subsystem (IMS). The IMS architecture manages the network with several control functions, i.e., functional entities. The Breakout Gateway Control Function (BGCF) is an inter-working function that handles legacy circuit-switched traffic. A new function called the Media Gateway Control Function (MGCF) controls the Media Gateway (MGW). The Media Resource Function Processor (MRFP), which is controlled by the Media Resource Control Function (MRFC), performs media processing functions. An IMS session is controlled by a logical function called the Call State Control Function (CSCF). It is logically partitioned into three functional entities, the Proxy, Interrogating and Serving CSCFs. The Proxy Call State Control Function (P-CSCF) is the first contact point for a user's handset. The Interrogating CSCF (I-CSCF) is mainly the contact point within an operator's network for all IMS connections destined to a subscriber of that network operator, or a roaming subscriber currently located within that network operator's service area. The Serving CSCF (S-CSCF) actually handles the session states in the network. "Third party" application servers (AS) provide services to the mobile handset, such as voice mail, via the S-CSCF. The IMS controls packet services among the different functional entities with signaling protocols such as Session Initiation Protocol (SIP), which is an IP-based signaling protocol designed for multimedia communications.
When a mobile handset first powers on, logic residing in the handset initiates a "registration" procedure with the IMS core, first by requesting the radio access network to assign it an IP address. After it receives an IP address, the mobile handset attempts to register as an IP-enabled endpoint with the IMS core, by sending a "register" request to the P-CSCF. Assuming that the handset is registering from a visiting domain, the P-CSCF then uses a Domain Name Server (DNS) to search for the handset's home domain S-CSCF. Once the P-CSCF locates the S-CSCF for the mobile handset, it passes the "register" request to that S-CSCF. The S-CSCF contacts the Home Subscriber Subsystem (HSS), which looks up the mobile handset's profile. This profile contains assorted information about the user, and what services the handset is authorized to use. A logical function in the S-CSCF called the "registrar" then authenticates the mobile handset, e.g., verifies that the handset is legitimate.
The S-CSCF also loads Service Point Triggers (SPT) from the handset's profile. The SPT define the appropriate action for the S-CSCF to take when the handset or an AS requests a transaction. For example, if the handset requests voice mail service, the SPT triggers the S-CSCF to provide the addresses of the voice mail AS for the handset. So long as the handset is powered on, the SPT for that handset are loaded into the S-CSCF, so a service request fires the appropriate trigger in the S-CSCF. The SPT are analogous to the above-described TDP in the CS network. The SPT and TDP both trigger an appropriate response from a controlling server, e.g., the MSC or S-CSCF. However, the TDP are more generally applicable to call requests and call related events such as dialed number, etc., and are not particular to the user's profile. The SPT are specific to the mobile handset, and are stored in the user's profile in the HSS and loaded into the S-CSCF when the handset registers.
If an entity wishes to engage in a transaction with the mobile handset, e.g., to send a message to the handset, the entity utilizes an AS to send a request for the transaction to the S-CSCF. This triggers an SPT in the S-CSCF, which recognizes the request as pertaining to a registered handset and sends the appropriate information to the handset. Other ASs may not know which S-CSCF to contact in order to engage in a transaction with a particular handset. In this case, the AS interrogate a Subscriber Location Function (SLF), which provides information about a handset's S-CSCF to the AS, which then contacts that S-CSCF as described above. If the handset wishes to request a service, it sends the request to the S-CSCF, e.g., using a SIP invite. This triggers an SPT in the S-CSCF, which then directs the service request to a particular Application Server (AS), which then provides the service to the handset. For example, if the user wants to initiate an IMS call, it sends a SIP invite message to the S-CSCF, which may then contact the AS responsible for IMS calls, called the Back-to-Back User Agent (B2BUA), which initiates the IMS call flow.

Systems and method for enabling IP signaling in wireless networks


The present invention relates to an electronic lock. The electronic lock includes a turn piece coupled with a cylinder connecting spindle; an electric motor connected with a first bevel gear; and a dislocation transmission mechanism including a first dislocation member coupled with the turn piece and the cylinder connecting spindle and having an arc opening, and a second dislocation member engaged with the first bevel gear and having a protrusion, in which the protrusion is configured to extend into the arc opening, such that when the protrusion is engaged with either a first engaging portion or a second engaging portion at two ends of the arc opening, the first dislocation member is driven by the second dislocation member, and when the first dislocation member is in motion within a void range defined by the arc opening, the first dislocation member fails to drive the second dislocation member.

In recent years, more and more conventional locks have been redesigned and developed in a concept outside the square of traditional mechanics based structures to integrate with the cutting-edge technologies of electronics, network & communication and software. By a series of sophisticated designs, a variety of actuators, sensors, electronic components, communication modules and microcontroller chips are deployed and implanted into the mechanics based lockset, to form a mechanics-electronics hybrid lock termed as the electronic lock or the smart lock that various electronic components and multiple mechanical structures inside work collaboratively. Such an electronic lock provides not only a variety of operation modes that makes it more convenient to use, but also provides abundant novel functions, as well as is further capable of communicating, integrating and cooperating with peripheral electronic devices nearby to achieve a wider range of applications.
These electronic locks are especially widely applied in environments that highly demands full-time security, such as public and commercial buildings, compound housings and private residences. By the use of electronic locks, it allows users not only to manually operate with traditional keys from the outside, but also to use internal turn pieces to operate from the inside, as well as the use of passwords, electronic or biological identification to allow the electronic locks to determine whether an identification has rights to access or enter or not. In addition, it can record access information of each identification unit in detail in the internal data storage unit, and then provide for users to download data via wired or wireless connection, which is very convenient for use to control.
Although the electronic lock brings lot of conveniences for operations, it accepts users not only to lock or release from the external manually, but also to lock or release from the internal by a turn piece, or to operate locking or releasing by an electric motor disposed inside as long as a combination code, an electronic means, or a biometric identification is verified from the external. However, an issue is raised when a user locks or releases an electronic lock manually, that such a manual operation drives the electric motor inside the electronic lock to revolve reversely, which causes damages to the electric motor and transmission components or reduces the service life thereof.
Hence, there is a need to design and develop a mechanism configured inside the electronic lock to prevent the electric motor from revolving reversely during the period of manual operation, to protect the electric motor and the relevant transmission components, to solve the above deficiencies/issues exiting in the prior art.

Electronic lock having dislocated transmission mechanism inside


Using an alternative communication protocol between a first system and a second system that are otherwise configured to communicate using a FICON protocol includes the first system determining if the alternative communication protocol is handled by the second system, the first system providing encapsulated data by encapsulating FICON data if the alternative communication protocol is handled at the second system, and the first system transmitting the encapsulated data directly to the second system using the alternative communication protocol if the alternative communication protocol is handled at the second system. The alternative communication protocol may be TCP/IP. At least one of the systems is a host computing system, an array storage system, and/or a tape emulation system. At least one of the systems may be a simulation of a host computing system, an array storage system, and/or a tape emulation system.

Host processor systems may store and retrieve data using a storage system containing a plurality of host interface units (I/O modules), disk drives, and disk interface units (disk adapters). The host systems access the storage systems through a plurality of channels provided therewith. Host systems provide data and access control information through the channels to the storage system and the storage system provides data to the host systems also through the channels. The host systems do not address the disk drives of the storage system directly, but rather, access what appears to the host systems as a plurality of logical disk units. The logical disk units may or may not correspond to any one of the actual disk drives. Allowing multiple host systems to access the single storage system allows the host systems to share data stored therein.
Communication between a host processor system and a storage system may be performed using conventional protocols and connections, such as FICON and the zHPF protocol, to exchange data and status information between the host processor system and the storage system. However, in some instances, a FICON communication connection may not be feasible or desirable. For example, it may be more convenient to provide TCP/IP connections when a host simulator and/or a storage system simulator is being used. Note also that, in many instances, FICON communication may not be not available while TCP/IP communication is available. For example, connections to publicly available cloud storage use TCP/IP, not FICON.
Of course, it is possible to revise and adapt existing storage and host systems to transition from FICON to TCP/IP. However, this may not be possible in instances where systems are closed to third party development. Moreover, even in systems that are not closed, the significant development that would be required may be daunting. U.S. Pat. No. 8,898,444 describes an arrangement where a first computing system may access a storage device on a second computing system where instructions are encapsulated and then transmitted via the Internet over a network. However, that arrangement requires the second computing system that is coupled to both the network and the storage system. The second computing system receives the network I/O and then essentially performs the I/O operation to the storage device on behalf of the first computing system. The need for the second computing system adds complexity and delay that would not be present of a direct connection were possible between the first computing system and the storage device.
Accordingly, it is desirable to provide a mechanism that allows direct connections between devices that are otherwise configured to communicate using FICON protocols where the connections use alternative communication mechanisms, such as TCP/IP.


A system of altering an audio signal presented to a user may include an input configured to receive data indicating a status of an environment outside of an audio device, where the audio device is configured to present an audio signal to a user. The system may also include a detection unit configured to detect a condition based on the received data and an audio altering unit configured to direct altering of the audio signal presented to the user based on the detection of the condition.

Personal audio devices, such as headphones, music players, and mobile phones, are becoming more and more popular and are being used during more activities. While using personal audio devices, however, users may become somewhat isolated from their immediate environment because they cannot hear sounds in their immediate environment. A user's isolation from their immediate environment may be increased when the audio device provides active noise canceling that reduces the level of sound presented to the user from the immediate environment and not from the audio device.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described herein may be practiced.


Class D amplifier circuitry comprising: modulator circuitry; and output stage circuitry, wherein the modulator circuitry is configured to: receive an input signal and first and second carrier signals, wherein the second carrier signal is offset in amplitude with respect to the first carrier signal; generate first and second modulated output signals, each of the first and second modulated output signals being based on the input signal and the first and second carrier signals; and generate a plurality of control signals for the output stage circuitry per signal period of the modulated output signals, wherein the plurality of control signals are based on the first and second modulated output signals, and wherein at least one of the plurality of control signals per signal period comprises a signal level transition.

Class D amplifiers are increasingly being used in electronic devices for which power efficiency is important, such as mobile telephones, portable media players, laptop and tablet computers and wireless headphones, earphones and earbuds.
A typical Class D amplifier is shown generally at 100 in FIG. 1, and includes a modulator stage 110 and an output stage 150.
The modulator stage 110 in the illustrated example includes first comparator circuitry 112, second comparator circuitry 114, carrier signal generator circuitry 116 and inverter circuitry 118.
A non-inverting (+) input terminal of the first comparator circuitry 112 is coupled to an input terminal 120 of the modulator stage 110, which receives an input signal Sin. Thus the first comparator circuitry 112 is configured to receive the input signal Sin at its non-inverting input terminal.
An input of the inverter circuitry 118 is coupled to the input terminal 120 so as to receive the input signal Sin. An output of the inverter circuitry 118 is coupled to a non-inverting (+) input terminal of the second comparator 114. Thus the second comparator circuitry 114 is configured to receive, at its non-inverting input terminal, a version Sin of the input signal Sin that has been inverted with respect to a quiescent reference signal (e.g. 0V). The inverted version Sin of the input signal Sin is thus complementary to the input signal Sin.
The carrier signal generator circuitry 116 is configured to generate a cyclical carrier signal Sc which may be, for example, a triangle wave or sawtooth wave voltage signal. The carrier signal Sc typically has a frequency that is several times greater than the bandwidth of the input signal Sin (e.g. audio applications the frequency of the carrier signal Sc may be of the order of 300 kHz), and a peak-to-peak amplitude that is equal to or greater than the peak-to-peak amplitude of the input signal Sin.
An output of the carrier signal generator circuitry 116 is coupled to the inverting (−) inputs of the first and second comparator circuitry 112, 114. Thus the first and second comparator circuitry 112, 114 are configured to receive the carrier signal Sc at their inverting inputs.
The first comparator circuitry 112 is configured to compare the input signal Sin to the carrier signal Sc and to output a first modulated output signal PWM1 based on the comparison. In the illustrated example, if an instantaneous level (e.g. amplitude) of the input signal Sin is equal to or greater than an instantaneous level (e.g. amplitude) of the carrier signal Sc the first modulated output signal PWM1 takes a high (e.g. logic 1) value, whereas if the instantaneous level of the input signal Sin is less than the instantaneous level of the carrier signal Sc the first modulated output signal PWM1 takes a low (e.g. logic 0) value. Thus, the first modulated output signal PWM1 is a pulse width modulated (PWM) signal, in which the width of the pulses represents the input signal Sin.
The second comparator circuitry 114 is similarly configured to compare the inverted version Sin of the input signal Sin to the carrier signal Sc and to output a second PWM modulated output signal PWM2 based on the comparison.
The output stage 150 in the illustrated example is a full-bridge output stage comprising a first half-bridge 160 and a second half-bridge 170, which together provide a differential output voltage Vout for driving a bridge-tied load 180 (e.g. a loudspeaker) that can be coupled between output nodes 162, 172 of the first and second half-bridges 160, 170 respectively.
The first half-bridge 160 comprises a high-side switch 164 coupled in series with a complementary low-side switch 166 between a first supply voltage (VDD) rail 192 and a reference voltage (e.g. ground) rail 194 of the output stage 150. The high-side switch 164 and the low-side switch 168 may be, for example, complementary MOSFET devices.
Control terminals (e.g. gate terminals) of the high-side and low-side switches 164, 166 are coupled to an input node 168 of the first half-bridge 160. The input node 168 is coupled to an output terminal of the first comparator circuitry 112, such that the first modulated output signal PWM1 is received at the control terminals of the high-side and low-side switches 164, 166.
As the high-side switch 164 and the low-side switch 166 are complementary, when the high-side switch 164 is switched on in response to the first modulated signal PWM1 at its control terminal, the low-side switch 166 is switched off, and vice versa. Thus, in operation of the first half-bridge 160, the output node 162 will be at either the first supply voltage (VDD) or the reference voltage (e.g. ground), depending upon whether the high-side switch 164 or the low-side switch 166 is switched on.
Similarly, the second half-bridge 170 comprises a high-side switch 174 coupled in series with a complementary low-side switch 176 between the first supply voltage (VDD) rail 192 and the reference voltage (e.g. ground) rail 194 of the output stage 150. Again, the high-side switch 174 and the low-side switch 176 may be, for example, complementary MOSFET devices.
Control terminals (e.g. gate terminals) of the high-side and low-side switches 174, 176 are coupled to an input node 178 of the second half-bridge 170. The input node 178 is coupled to an output terminal of second comparator circuitry 114, such that the second modulated output signal PWM2 is received at the control terminals of the high-side and low-side switches 174, 176.
Again, as the high-side switch 174 and the low-side switch 176 are complementary, when the high-side switch 174 is switched on in response to the second modulated signal PWM2 at its control terminal, the low-side switch 176 is switched off, and vice versa. Thus, in operation of the second half-bridge 170, the output node 172 will be at either the first supply voltage (VDD) or the reference voltage (e.g. ground), depending upon whether the high-side switch 174 or the low-side switch 176 is switched on.
The operation of the Class D amplifier circuitry 100 will now be described with reference to FIG. 2. The uppermost trace 202 of FIG. 2 shows an example of the first modulated output signal PWM1 output by the first comparator circuitry 112, whilst the middle trace 204 shows an example of the second modulated output signal PWM2 output by the second comparator circuitry 114. As can be seen from these traces, the first and second modulated output signals PWM1, PWM2 are complementary to one another (i.e. when one of the modulated output signals PWM1, PWM2 is high (level 1) the other is low (level 0), as a result of the inverting effect of the inverter circuitry 118.
Because of the complementary nature of the first and second modulated output signals PWM1, PWM2, in the example output stage circuitry 150 of FIG. 1 the high-side switch 174 of the second half-bridge 170 is always switched in anti-phase to the high-side switch 164 of the first half-bridge 160. Thus, when the high-side switch 164 of the first half-bridge 160 is switched on, the high-side switch 174 of the second half-bridge 170 is switched off, and vice versa.
When the high-side switch 164 of the first half-bridge 160 is switched on, the low-side switch 166 is switched off and a low-impedance current path exists between the supply voltage rail 192 and the output node 162 of the first half-bridge 160, such that a voltage equal to (or close to) +VDD develops at the output node 162. The low-side switch 176 of the second half-bridge 170 is switched on (and the high-side switch 174 is switched off), so current can flow from left to right through the load 180 to the reference (ground) supply rail 194. Thus the voltage Vout across the load 180 when the high-side switch 164 of the first output stage 160 is switched on is equal to (or close to) +VDD.
When the high-side switch 174 of the second half-bridge 170 is switched on, the low-side switch 176 is switched off and a low-impedance current path exists between the supply voltage rail 192 and the output node 172 of the second half-bridge 170, such that a voltage equal to (or close to) +VDD develops at the output node 172. The low-side switch 166 of the first half-bridge 160 is switched on (and the high-side switch 164 is switched off), so current can flow from right to left through the load 180 to the reference (ground) supply rail 194. Thus the voltage Vout across the load 180 when the high-side switch 174 of the second output stage 170 is switched on is equal to (or close to) −VDD.
Thus in operation of the Class D amplifier circuitry 100 of FIG. 1, the output voltage Vout across the load can be either +VDD or −VDD, as shown in the lowermost trace 206 of FIG. 2.
The Class D amplifier 100 is relatively power efficient, because the switches of the output stage 150 do not conduct current and thus do not dissipate power when they are switched off, and the voltage drop across them when they are switched on is low, such that power dissipation is low when the switches are switched on. However, the switches of the output stage always switch the output nodes 162, 172 between VDD and 0V, even at low input signal (Sin) levels at which the full supply voltage VDD is not required at the output nodes 162, 172. In such circumstances capacitive (CV2/2) losses in the switches may be unnecessarily high due to the unnecessarily high voltage (VDD) being switched.
FIG. 3 is a schematic representation of an alternative output stage 300 for a Class D amplifier. The output stage 300 is based on the output stage 150 described above with reference to FIG. 1, and so elements that are common to the output stage 150 of FIG. 1 and the output stage 300 of FIG. 3 are denoted by common reference numerals and will not be described again here.
The output stage 300 differs from the output stage 150 in that the switches 164, 166 and 174, 176 are coupled in series between a first supply voltage (VDD1) rail 310 and a reference voltage (e.g. ground) rail 320.
The output stage 300 further differs from the output stage in that its first half-bridge 360 includes a second high-side switch 364, coupled between a second supply voltage (VDD2) rail 330 and the output node 162, and in that its second half-bridge 370 also includes a second high-side switch 374, coupled between the second supply voltage (VDD2) rail 330 and the output node 172. The second supply voltage VDD2 in this example is of smaller magnitude than the first supply voltage VDD1. For example, VDD2 may be equal to VDD1/2.
The input node 168 of the first half-bridge 160 is coupled to an output terminal of the first comparator circuitry 112, such that the first modulated output signal PWM1 can be received at the control terminal of the high-side switch 164 (and at the control terminal of the low-side switch 164, though for clarity the connection between the input node 168 and the control terminal of the low-side switch 164 is not shown). However, in the circuitry 300 of FIG. 3, the first modulated output signal PWM1 is only received at the input node 168 if a parameter (e.g. a signal level, envelope or volume) of the input signal Sin is equal to or greater than a threshold Th.
A control terminal (e.g. a gate terminal) of the second high-side switch 364 is coupled to a second input node 368 of the first half-bridge 360. The second input node 368 is also coupled to the output terminal of the first comparator circuitry 112, such that the first modulated output signal PWM1 can be received at the control terminal of the second high-side switch 364 (and at the control terminal of the low-side switch 164, though for clarity the connection between the second input node 368 and the control terminal of the low-side switch 164 is not shown). The first modulated output signal PWM1 is only received at the second input node 368 if a parameter (e.g. a signal level, envelope or volume) of the input signal Sin is less than the threshold Th.
Thus, when the input signal Sin parameter is equal to or greater than the threshold Th, the output node 162 will be at either the first supply voltage (VDD1) or the reference voltage (e.g. ground), depending upon whether the high-side switch 164 or the low-side switch 166 is switched on. When the input signal Sin parameter is less than the threshold Th, the output node 162 will be at either the second supply voltage (VDD2) or the reference voltage (e.g. ground), depending upon whether the second high-side switch 364 or the low-side switch 166 is switched on.
Similarly, the input node 178 of the second half-bridge 370 is coupled to an output terminal of the second comparator circuitry 114, such that the second modulated output signal PWM2 can be received at the control terminal of the high-side switch 174 (and at the control terminal of the low-side switch 174, though for clarity the connection between the input node 178 and the control terminal of the low-side switch 174 is not shown). However, in the circuitry 300 of FIG. 2, the second modulated output signal PWM2 is only received at the input node 178 if a parameter (e.g. a signal level, envelope or volume) of the input signal Sin is equal to or greater than a threshold Th.
A control terminals (e.g. a gate terminal) of the second high-side switch 374 is coupled to a second input node 378 of the second half-bridge 370. The second input node 378 is also coupled to the output terminal of the second comparator circuitry 114, such that the second modulated output signal PWM2 can be received at the control terminal of the second high-side switch 374 (and at the control terminal of the low-side switch 174, though for clarity the connection between the second input node 378 and the control terminal of the low-side switch 164 is not shown). The second modulated output signal PWM2 is only received at the second input node 378 if a parameter (e.g. a signal level, envelope or volume) of the input signal Sin is less than the threshold Th.
Thus, when the input signal Sin parameter is equal to or greater than the threshold Th, the output node 172 will be at either the first supply voltage (VDD1) or the reference voltage (e.g. ground), depending upon whether the high-side switch 174 or the low-side switch 176 is switched on. When the input signal Sin parameter is less than the threshold Th, the output node 172 will be at either the second supply voltage (VDD2) or the reference voltage (e.g. ground), depending upon whether the second high-side switch 374 or the low-side switch 176 is switched on.
Thus the differential output voltage Vout across the load 180 in the output stage 300 can be either +VDD1, +VDD2, −VDD1 or −VDD2.
However, the output stage 300 can give rise to artefacts in a signal output by the load 180 in response to the output voltage Vout (e.g. audible artefacts, where the load 180 is a loudspeaker or the like) if there is any mismatch between the common mode voltages of the two half-bridges 360, 370, which may arise, for example, due to a difference in the timing of switching the modulated output signals from the high-side switches 164, 174 to the second high-side switches 364, 374.


An authentication system and method for allowing an administrator to host a plurality of service principal names (SPNs) over a common network port of a backend server. The authentication system includes a client computer, a backend server, and a service principal name (SPN) apparatus. The client computer sends an authentication request to the backend server. The backend server performs an authentication procedure in response to a reception of the authentication request from the client computer. The SPN apparatus configures a plurality of service SPNs for the web service application over the common network port.

Kerberos is the name of a computer network authentication protocol, which allows individuals communicating over a network to prove their identity to one another in a secure manner. The kerberos protocol provides strong authentication using secret key cryptography. Web-Services Security (WS-Security) is a specification to secure and authenticate network communications using Simple Object Application Protocol (SOAP). SOAP is a protocol for exchanging Extensible Markup Language (XML)-based messages over computer networks, typically using Hypertext Transfer Protocol/Hypertext Transfer Protocol over Secure Socket Layer (HTTP/HTTPS). SOAP forms the foundation layer of the web services protocol stack providing a basic messaging framework upon which abstract layers can be built.
In order to effectively host multiple web service provider applications using WS-SecurityKerberos, the application provider framework provides a way for security administrators to configure a service principal name (SPN) for an application. Conventional solutions, such as implemented within the NET framework, tie the SPN to the Transfer Control Protocol/Internet Protocol (TCP/IP) port on which the web service application is listening. Hence, conventional solutions use a unique and/or dedicated port for each application which uses a unique SPN. Using a unique port for each application creates additional difficulties when the topology involves a web service gateway or proxy, and/or when the web service providers are clustered. These difficulties might include managing multiple ports, opening multiple ports in the firewall, and exhaustion of port resources.

System and method for hosting multiple kerberos service principal names

International Business Machines Corporation


Provided is a method for recording data to a tape medium in such a manner as to achieve the easy management of mutually related multiple data pieces. First data and second data continuously received as a file from a higher level apparatus are accumulated in multiple buffer segments in the form of multiple successive data sets. A data structure is determined for each of the accumulated data sets. Management information indicating a result of the determination is added to the data sets, and the data sets and the management information thereof are stored into the tape medium.

1. Field of the Invention
The present invention relates to an apparatus for writing data to a tape medium such as a magnetic tape, a method therefor, and the like.
2. Description of the Related Art
In tape drives that write data to a tape medium such a magnetic tape, it is common as described in Patent Documents 1 to 3 and the like that mutually related multiple data pieces are first accumulated in a buffer and then written from the buffer to the tape medium at a predetermined timing. For example, when a tape drive receives, from its higher level apparatus, a data file and a metadata file indicating the content of the data, the tape drive first accumulates these two files in a buffer and then writes them from the buffer to a tape medium at a predetermined timing.

This patent is subject to a terminal disclaimer.

Data recording method for storing first data and second data into a tape medium

INTERNATIONAL BUSINESS MACHINES CORPORATION


A regulator includes an operational amplifier, a programmable offset voltage, and a circuit. The operational amplifier includes a non-inverting input, an inverting input, and an output. The programmable offset voltage is configured to cancel a built-in offset voltage of the regulator based on a code. The circuit is configured to set the code based on a sensed built-in offset voltage of the regulator in response to an offset cancellation calibration mode enable signal.

Memory devices are typically provided as internal, semiconductor, integrated circuit devices in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the memory cells, through programming (which is often referred to as writing) of charge storage structures (e.g., floating gates or charge traps) or other physical phenomena (e.g., phase change or polarization), determine the data value of each cell. Common uses for flash memory include personal computers, tablet computers, digital cameras, digital media players, cellular telephones, solid state drives and removable memory modules, and the uses are growing.
Memory devices may have internal voltage supplies that vary due to random variation and process variation of a reference voltage. This die to die variation may be compensated for by fuse trimming of the reference voltage. Random local threshold voltage (Vt) variation in a regulator may also cause internal supply voltage variation and may also be compensated for by using trimming. Typically, the regulator trimming is performed during probe testing with dedicated test and fuse bits. The trimming may be performed during either CPP (cold temperature probe) or FPP (hot temperature probe). The trimming during probe testing may compensate for die to die reference voltage variations and random local Vt variations for a regulator. Since the probe test is performed at a specific temperature, however, the trimmed internal supply may be most accurate at that specific temperature. If trimming is performed at CPP, the internal voltage supply may be most accurate at the specific cold temperature used for CPP. If the trimming is performed at FPP, the internal voltage supply may be most accurate at the specific hot temperature used for FPP. This method of trimming cannot compensate for local temperature dependent Vt variation. Local Vt variation is systematic but has a small random component dependent on temperature and may change in an unpredictable way based on the temperature. The random local variation at cold temperature may be larger than at hot temperature. As a result, a uniform voltage distribution at a first temperature after trimming may diverge into a normal voltage distribution at a second temperature different from the first temperature. This diverging into a normal voltage distribution may hurt the performance of devices that are sensitive to variations of the internal voltage supply.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative methods for cancelling random built-in offset voltage in voltage regulators.

Regulators with offset voltage cancellation


The present invention pertains to a transfer press which achieves a reduction in the overall length of the press line and, hence, in the total weight, while ensuring high efficiency and safety of preparatory work, such as changing of idle nests, owing to a facility which permits such a preparatory work to be performed externally of the press. To these ends, the transfer press has: an upright (3) disposed between and commonly possessed by adjacent press units (P1, P2); locating means (4A, 2A) for locating adjacent crowns (4, 4) with respect to each other and adjacent beds (2, 2) with respect to each other, respectively; and a tie rod (7) extending through the boundary between the adjacent beds (2, 2) and through the boundary between the adjacent crowns (4, 4), the adjacent crowns (4, 4) and the adjacent beds (2, 2) respectively being tied together through the upright (3).

Hitherto, transfer presses have been designed to have a plurality of working stations in a press main body so that workpieces are successively transferred from one station to the next station by means of a transfer feeder acting between these stations, whereby the workpieces are worked into a final form. In general, the arrangement is such that the first stage, constituted by a drawing press, is followed by second and subsequent stages which are constituted by presses for conducting various additional works, such as trimming, piercing, and so forth.
Transfer presses are also known in which a crown, a slide, and a bed are assembled together to form a press unit having a modular structure, and a plurality of such press units are suitably combined in accordance with the required specifications of the press work (refer to, for example, Japanese Patent Laid-open No. 2-247031). This approach facilitates modification or change of specifications to cope with the diversification of needs, thus offering widened use, as well as a reduction in the cost and an increase in the efficiency of transportation, of transfer presses. A transfer press of the type described is constructed such that successive stages of the press process employ separate crowns, as well as separate beds, and each crown is supported by uprights, wherein one upright is disposed at each side of the connecting surfaces of each of the adjacent crowns and beds. Alternatively, the arrangement is such that, as shown in FIG. 10, a single common upright 53 is disposed on the connecting surfaces of the adjacent crowns 55, 55 and beds 51, 51.
In order to fasten the crowns 55, the upright 53, and the beds 51, a pair of tie rods 56 are inserted into a pair of tie-rod bores extending through these members, and nuts 57 are screwed to and tightened on the upper and lower ends of the tie rods 56, thereby fastening these members. Although not shown, mounting pieces (locating means) are provided on the surfaces of the crowns 55 and the beds 51 at which they are connected to the upright 53, in order to eliminate any positional deviation. In order to minimize the feed stroke for the workpieces, the transfer press of the type described employs an idle station 58 disposed at a position which is at the midpoint of the distance A between the dies of the adjacent stages, i.e., behind each upright 53 which appears at the front side. The idle station has the function of temporarily storing workpieces which are to be fed to the subsequent stage of the process.
In this type of transfer press, a pair of tie rods 56 are received in each upright 53 which is commonly possessed by two adjacent stages of the process, so that the upright inevitably has a large width in the direction of the press line. This inconveniently increases not only the weight but also the feed stroke of the workpiece 60. Consequently, the following problems are encountered:
(1) In order to preserve the feed stroke at a level not greater than a predetermined value, it is necessary to provide each idle station 58 with an idle nest (attachment) 59 for holding the workpieces 60, so that the overall length of the press line is increased. The crowns 55 and the beds 51 of adjacent stages are fastened together by means of a pair of tie rods 56. Consequently, the total weight of the upright 53 and the tie rods 56 is increased and, in addition, the production cost is raised due to the necessity of drilling a pair of elongated bores for receiving the tie rods 56. PA1 (2) Provision of the idle nest 59 between adjacent stages of the process requires a space of a certain length large enough to store the workpieces 60, resulting in a further increase in the feed stroke. Consequently, the above-mentioned distance A between the dies of the adjacent stages and, accordingly, the overall length of the press line are increased. PA1 (3) Preparatory work for changing the idle nests 59 is necessary in accordance with a change in the type of products to be obtained. This, however, requires a troublesome work and poses problems with regard to safety, due to the fact that the idle nests 59 are disposed behind the front uprights 53. PA1 (4) Use of a large number of idle nests 59 enhances the risk of automatic stopping of the press due to, for example, deviation of the position of a workpiece. PA1 (5) In general, the second and subsequent stages perform trimming and piercing, so that reusable sheet materials or intended small articles are generated. It is, however, not easy to take such sheet materials or small articles out of the idle station, because the upright has a large width.
An art as shown in FIG. 9 has been proposed in order to reduce the length of the press line (refer to, for example, Japanese Patent Laid-Open No. 5-177399). In this art, a plurality of beds 51, 52 in the form of segments are arranged end-to-end and a plurality of uprights 53 are provided so as to protrude from these beds 51, 52. These uprights 53 carry segments of support beams 54, which in turn carry crowns 55 of the respective stages arranged in the form of girders spanning these beams 54. The beds 51, 52, the uprights 53, the support beams 54, and the crowns 55 are fastened together by means of tie rods (not shown) which penetrate all or some of these members.
This type of transfer press, however, suffers from a problem in that, since the frames constituted by the support beams 54 in support of the crowns 55 and the bed 52 of the second section are large and heavy, a troublesome work is required to disassemble the whole press into sections of sizes and weights which fall within the limits posed in transportation.


Disclosed is a programmable computing and display device for upgrading a cockpit instrument panel of an aircraft. The programmable computing and display device includes a plurality of processing units; a network backbone that establishes a network among the processing units for the exchange of network data traffic; at least one display to display video graphics to a cockpit crew member; and a modular assembly that retains the processing units, the network backbone and the display.

Aging planes and helicopters are often referred to as "legacy aircraft." For purpose of the description herein, legacy aircraft include airplanes and helicopters that are deployed in the field with existing equipment and this equipment generally has a fixed architecture and fixed functionality. For example, in many field deployed aircraft, the cockpits contain conventional gauges and instruments to display information to the pilot and/or other crew members (e.g., flight and engine gauges and instruments, including, for example, altimeters, airspeed indicators, turn and bank indicators, compasses, vertical speed indicators and gyros, attitude instruments, fuel gauges, engine performance gauges and the like). Although each of these devices is adapted to present valuable information to the flight crew, each has a single purpose and do not have interactive functionality. Some aircraft include a television monitor for viewing images derived from a video signal generated by a camera mounted to the aircraft or a store that is releasable from the aircraft.
It has been found that legacy military aircraft do not have cockpit devices that provide the pilot and/or cockpit crew with suitable graphical displays, data acquisition and processing functionality, and a human-machine interface (HMI) to maximize the mission and/or combat fighting capability of the cockpit crew. One notable feature that is missing from the aircraft is the display of moving maps that can show enemy, friendly and neutral party positions and/or flight plan waypoints. Also missing is integrated networked communication with a command and control facility to update mission information seamlessly with avionics information from the aircraft itself.
Unfortunately, retrofitting aging military aircraft to include enhanced display and operational functionality has presented numerous challenges. These challenges are pronounced when upgrading the cockpit to include enhanced user interactive assemblies. In particular, space in the cockpit is limited by the presence of existing equipment. In addition, the existing wiring leading to the cockpit instrumentation panel has a fixed arrangement and limited data availability at the cockpit instrument panel since computer assisted processing of data and signals, if carried out, is not performed by devices in the cockpit instrument panel. Rather, processors are located in other locations of the aircraft and wires carrying only instrument driver signals are run to the cockpit instrument panels.
In view of the foregoing, the conventional approach to upgrading cockpit instrumentation is to replace a selected instrument panel component(s), the wiring running to the component(s) and the associated signal processing device(s) that is located outside of the instrument panel. As can be appreciated, such an endeavor involves significant overhaul of the aircraft. The aircraft must be taken out of service for an extended period of time. Also, considerable retraining of cockpit personnel may be needed to use the new cockpit instruments.
Accordingly, there exists a need in the art for an improved interactive device that can be efficiently integrated into legacy cockpit instrument panels.


The present disclosure relates to data transmission methods and apparatus. One example method includes sending, by a radio access network device, a first transport block to a terminal device, where the first transport block includes at least two code blocks, the at least two code blocks are divided into at least two different code block sets, and each code block set includes at least one of the at least two code blocks, and receiving, by the radio access network device, first feedback information sent by the terminal device, where the first feedback information includes at least two pieces of feedback information corresponding to the first transport block, and the at least two pieces of feedback information are respectively used to indicate receiving statuses of the at least two code block sets.

In an LTE (Long Term Evolution) system, a downlink and an uplink are respectively based on OFDMA (Orthogonal Frequency Division Multiple Access) and SC-FDMA (Single carrier-Frequency Division Multiple Access). A time-frequency resource is divided into OFDM (orthogonal frequency division multiplexing) symbols or SC-FDMA symbols (an OFDM symbol or an SC-FDMA symbol is alternatively referred to as a time domain symbol) in time domain and subcarriers in frequency domain. A minimal resource granularity at which the time-frequency resource is divided is referred to as an RE (resource element), that is, a time-frequency grid point including one time domain symbol in time domain and one subcarrier in frequency domain. A basic structure of a typical time-frequency resource in the LTE system is a 15 KHz subcarrier spacing, approximately 70 μs duration of a time domain symbol, and 4 μs to 6 μs duration of a cyclic prefix.
In the LTE system, service transmission is based on scheduling of a base station. When an upper layer data packet is scheduled at a physical layer, the upper layer data packet is divided into small data packets in a form of transport blocks (TB). A basic time unit of scheduling generally is one subframe. Duration of one subframe is 1 ms, one subframe generally includes two slots, and one slot generally includes seven time domain symbols. In an LTE evolved system, a shorter scheduling time unit may be further introduced. For example, a scheduling manner in which one slot or even several time domain symbols are used as a unit may be introduced. Generally, a specific scheduling process includes the following steps: A base station transmits a control channel, for example, a PDCCH (physical downlink control channel); UE detects the control channel in a subframe, and receives a transport block on a downlink data channel or sends a transport block on an uplink data channel based on scheduling information carried on the detected control channel. The control channel may carry scheduling information of a downlink data channel (for example, a physical downlink shared channel, PDSCH) or an uplink data channel (for example, a physical uplink shared channel, PUSCH). The scheduling information includes control information such as resource allocation information, a modulation and coding scheme, and a HARQ.
The LTE system supports two duplex modes: FDD (frequency division duplex) and TDD (time division duplex). For an FDD system, downlink transmission and uplink transmission are performed on different subcarriers. For a TDD system, uplink transmission and downlink transmission are performed on a same subcarrier in different times. Specifically, one subcarrier corresponds to a downlink subframe, an uplink subframe, and a special subframe. The special subframe includes three parts: a DwPTS (downlink pilot timeslot), a GP (Guard Period, guard period), and an UpPTS (uplink pilot timeslot). The GP is mainly used for compensation for a downlink-to-uplink component transition time and a propagation delay. The LTE system currently supports seven different TDD uplink and downlink configurations, and for different uplink and downlink configurations, ratios of a quantity of uplink subframes to a quantity of downlink subframes are usually different.
In LTE, a HARQ mechanism is used, and ACK or NACK feedback and HARQ retransmission in the LTE system are performed based on a transport block. Using a downlink as an example, after receiving a transport block carried on a PDSCH, if the UE correctly receives the transport block, the UE feeds back an ACK on an uplink; or if the UE incorrectly receives the transport block, the UE feeds back a NACK on an uplink. If a base station receives the NACK fed back by the UE, the base station subsequently resends, to the UE, the transport block carried in a previous PDSCH transmission, and the UE may perform HARQ combination on receiving information of the transport block on the PDSCH received again and receiving information of the transport block that is previously incorrectly received, to improve receiving performance.
Currently, discussion about a 5G (5th Generation) technology has been started. 5G may be divided into two branches from the perspective of compatibility. One branch is continuous evolution compatible with LTE 4G (4th Generation), and the other branch is new radio NR incompatible with LTE. For the two branches, 5G includes two important technical requirements: mobile broadband continuously enhanced eMBB (Enhanced Mobile Broadband) and ultra-reliable and low latency communications URLLC (ultra-reliable and low latency communications). For the eMBB, 5G needs to reach a data rate higher than that of 4G. Therefore, a larger transport block may be introduced. Considering that an LDPC (low-density parity-check code) having a higher degree of parallelism may be introduced, compared with 4G, one TB in 5G is divided into more CBs (code block). For the URLLC, to meet latency and reliability requirements thereof, a priority of burst transmission of the URLLC needs to be higher than that of the eMBB. Therefore, short-time puncturing may be performed for the URLLC on an eMBB transport block that is being transmitted, and as a result, a few CBs in the eMBB TB cannot be correctly received by eMBB UE due to the puncturing for the URLLC.
Therefore, in a 5G system design, one TB may be divided into more CBs, and puncturing may be performed for a burst URLLC emergency service on an eMBB service that is being transmitted. In a conventional TB-based HARQ feedback and retransmission mechanism, data transmission efficiency is reduced, and system transmission efficiency is affected.


A device for enhancing the effectiveness of a fisherman by translating line vibration to the fisherman wherein a rod holder which has an arm member which transverses the forearm of the user utilizing a semicircular portion and a strap portion and a circular receptacle of split-ring configuration into which the handle or butt end of a fishing rod is inserted. The receptacle has a decreasing inner diameter with inwardly protruding ribs to enhance the fit of the rod handle and accommodate various sizes. The user holds the rod at a location on the handle closer to the tip than the receptacle and this provides a fulcrum at the hand location which allows tip vibration to be translated more effectively to the forearm of the user to increase the user's sensitivity or feel of the action on a lure or bait by the action of a fish or the bottom of the body of water being fished.

Over the years the field of fishing has seen a multitude of products to enchance the effectiveness of the fisherman. These include improvements in fishing rods from the split-bamboo of old to the present graphite designs. Various handle materials from cork to foam have also been used. Improvements in rod ferrules have increased the effectiveness of casting and line flow and improvements in fishing lines have greatly enchanced the user's ability to present baits and lures effectively. Many of these products have attempted to increase the ability of the fisherman to sense or feel the action of an underwater bait or lure which cannot be seen by the user during its use.
The ability to sense or feel a strike or bite by the fisherman and to differentiate it from a snag or bump on the bottom surface is a skill heretofore enchanced only by practice and patience, that is by improving the technique of the user.
Although the improvements from the cane pole of Huck Finn to the present graphite rod marvels have aided in that ability, a device for improving feel or touch has long been desired in the art.
The problem is made ever worse if the present type of rod holders are used since the configuration of such rod holders will reduce the ability of the user to sense or feel the vibration translated from bait or lure, through the line, to the rod and eventually to the user.
These problems and shortfalls are addressed and solved by the present invention which provides a rod holder which enchances the feel or sense of the user thereby increasing his fishing effectiveness while decreasing fishing fatigue caused by prolonged holding of a fishing rod.
It is therefore an object of the present invention to provide a device which enchances the effectiveness of a fisherman.
It is a further object of the present invention to provide a device which aids in the holding of a fishing rod while transmitting vibration caused by a strike or bite to the user in an enhanced fashion.
It is a further object of the present invention to provide a device which allows the fisherman-user to sense or feel the condition of the bottom surface by improving the translation of the vibration at the lure bumping or striking the bottom.
It is a further object of the invention to provide a device which can hold rods of various handle configurations and dimensions.
It is a further object of the present invention to provide a device which enables the user to detect vibrations in the fishing line which might otherwise go completely undetected.
It is a further object of the present invention to provide a device which allows the fisherman to sense or feel light bites of bait or lure by a fish and to differentiate them from bumps or snags of the lure or bait from the bottom.
These and other objects and advantages are achieved by the present invention, a summary of which follows.


A method for text editing includes drawing a staircase object which is recognized by the software and replaced by a machine rendered staircase object. The user places alphanumeric characters adjacent to each step of the staircase object, the font, case, style, color and punctuation indicating the format of the heading of each step. An arrow is drawn from the staircase object to a text object to apply the heading formats. A graphic object such as a bullet may be assigned to any staircase heading and thereafter appear whenever the heading is evoked.

1. Field of the Invention
The present invention relates to methods and devices for editing text displayed on a screen and, more particularly, to methods for editing text displayed on a screen.
2. Description of Related Art
The copending patent applications captioned above describe a graphical user interface for a machine having a screen display. A significant feature of the interface is that it provides the means for hand drawn entry of on-screen objects which may be associated with functions, files, connections, and other objects or actions accessible by the system to carry out the user's desired purpose, whatever it may be. A salient aspect of this interface is the ability to carry out commands and actions corresponding to the hand drawn inputs as they are applied to any on-screen object, including (but not limited to) text presented as text files, ASCII files, word processing files and their equivalent in standard word processing applications.
The hand draw approach utilizes hand drawn objects and various user-definable connects between those objects and various contexts of those objects (among other characteristics) to implement and control text editing functions. Furthermore, these hand drawing techniques increase the speed and familiarity and flexibility of a wide range of typical text editing processes, by replacing them with non-menu driven operations. Also, many of these prior art text editing operations can be utilized only according to set orders or set procedures. These orders and procedures, in many cases, can be eliminated by the present invention, which can be used to edit either typed text, hand printed or written text or voice recognition text or the equivalent of these.
Editing Voice Recognized Text: Using current technology, a computer user may employ a microphone connected to the input of a computer, to simply speak words intended to become text (dictate letters, documents, etc.). Improved voice recognition software and increased processing power have made this technology more commonplace today. As the text is spoken, it is processed by the software in the computer and presented (shown) on a computer screen as familiar text—in whatever font is the default for such a system. Generally, the software provides specific, limited techniques for entering punctuation in the spoken text. However, the most intuitive way to speak text is not to speak the punctuation, the paragraph start and stops and the indents, etc. Such text housekeeping "speak" is not easy and tends to interrupt the train of thought of the speaker. What is preferable is the ability to simply speak naturally (as if talking on the telephone) and then edit the text later.
Regarding editing after voice recognition input of text, it is well known that voice recognition software inevitably misunderstands some words, phrases, and sentence structures. Although it is possible to direct the software to these errors and enter corrections by further voice inputs, this is a laborious task that slows the overall text input process and greatly impedes widespread acceptance of voice recognition software. Many voice recognition software users (and many non-users of computers) cannot operate a typewriter keyboard effectively, either because of disabilities or lack of manual keyboard skills. Clearly there is a need in the prior art for effective text editing that, like voice recognition inputs, does not rely on an alphanumeric keyboard and mouse, as do common word processing applications.
The hand drawing approach to text editing is such a system. It provides an arrangement to very quickly and intuitively edit text that may (after initially speaking or otherwise entering the text) be stored into a computer as one or more large paragraphs, i.e., many pages long. Hand draw editing enables users of spoken text to edit this text into a finished document very easily. This same technique can also be used for text typed on an alphanumeric keyboard, which may be many pages long and may need reordering, cutting and pasting, formatting, and/or other types of correction.
Editing Typed Text: Currently, if one engages the heading software for some of the word processing applications, the software enters an "A", for example, as the heading for a paragraph. When the user hits the return or enter key to drop the cursor down to a new paragraph, the software automatically enters a new heading letter. However, if one desires to type a second paragraph under the "A" heading, and hits the return key to start the second paragraph, the software automatically places the next outline heading "B". It is then necessary to delete this heading, move the tabs on a ruler to adjust the new text to line up under the existing "A" heading and type the second paragraph. Placing headings selectively in text should be more flexible and accommodating to the user's needs for multiple paragraphs under a single heading. Also, current systems of outlining are rigid, not permitting users to define outline possibilities that do not exist in a program or that may not be considered logical types of outlines. Users should be able to create their own outline structures in any manner of their choosing, not according to set protocols or procedures. Finally, the use of color and font types, styles and sizes are generally limited and at best difficult to use. This should be much simpler to do and lend itself more easily to user customization.
Hand printed or script recognition of text: The invention has the same benefit when applied to text resulting from handwriting recognition software as from voice recognition and the typing of text.

Method for formatting text by hand drawn inputs


A server complex including at least one hit server with item cache, used to process read and write operations relating to cached items from clients, and at least one miss server, serving as a link to other servers (e.g., web servers, file system servers, and databases) for receiving requests relayed from the hit server(s) which relate to non-cached items and for responding to same. The hit server is a general-purpose, generic, component, which is independent of concrete applications and is basically responsible for the performance; while a miss server is a highly-customizable component, which is responsible for flexibility, and is application specific. The inventive architecture provides improved performance whereby a server complex achieves exceptionally high throughput rates for local services (i.e., services using items in the local item cache); flexibility, whereby a server complex can support the enforcement of a variety of application-specific policies for item management, authentication, and item consistency; security, whereby a server complex can enable the verification of the source, integrity, and freshness of communications over untrusted links; and, scalability, whereby a server complex is expandable by adding server components and implementing customized item consistency policies.

The present invention relates to client-server environments; and, more particularly to an improved scalable server architecture that can be used to build very large, application-specific, as well as general, servers for serving a large number of clients efficiently.
For the future, it is envisioned that local networks will be serving from thousands to hundred of thousands of resource-poor clients. These networks might be intra-building, intra-organization or even intra-city. Customizable and nevertheless extremely high performing servers will be required. The low cost and variety of future client devices (e.g., PDAs, laptops, pagers, printers, and specialized appliances) will result in a larger number of client devices per user, such that each office employee may have dozens of client devices. So-called xe2x80x9cthin clientsxe2x80x9d will have fast processors, with little or no disk storage, thereby requiring that most of their data and executables be downloaded from the server. Some typical applications for these clients will involve downloading of very large objects, such as graphics and video.
The existence of cheap client hardware having high-resolution graphics and high-quality audio, together with ubiquitous high-bandwidth networks, will probably lead to applications which make increasing demands on network and server performance. For a scenario with 10,000 users and 100,000 thin clients, requirements to the server complex will approximate the following demands: xe2x80x9chandle 20,000 requests in a second with a data bandwidth of 1 GB""s or higher.xe2x80x9d
Such postulated server-complex performance is about two orders of magnitude higher than that which current servers achieve. Improving current systems by evolution will not be sufficient. What is needed is a new server architecture to achieve the aforementioned goals. The basic requirements of the future architecture will be customizability, performance, scalability and security support.
Traditional servers are designed either to run a variety of applications, with abstractions that lead to poor performance; or run specialized applications efficiently, but without the flexibility to run other applications. In xe2x80x9cServer operating systems,xe2x80x9d by Kaashock, et al, in the xe2x80x9cProceedings of the 1996 SIGOOPS European Workshopsxe2x80x9d (1996), a server operating system environment designed to provide abstractions for building specialized, high-performance servers is detailed. While the detailed server operating system enables improvements in server performance and flexibility, further improvement in performance is necessary without reducing the variety of server systems that can be developed.
It is an objective of the present invention, therefore, to provide a new server architecture.
It is another objective of the invention that the new server architecture be customizable, scalable and secure.
The foregoing and other objectives are realized by the present invention wherein a server complex is provided. The server complex includes at least one hit server with item cache, used to process client read and write operations related to cached items, and at least one miss server, serving as a link to other servers (e.g., web servers, file system servers, and databases) from which non-cached items can be obtained. Hit servers receive requests from clients, respond to clients, and send miss signals and coherency-related information to miss servers. Miss servers respond to these signals and control the hit servers.
Characteristic features of the inventive architecture are, first, to separate the hit server components from the miss server components, and second, to enable using multiple hit server and/or miss server components in a server complex. A further characteristic feature is that a hit server is a general-purpose, generic, component, which is independent of concrete applications and is basically responsible for the performance; while a miss server is a highly-customizable component, which is responsible for flexibility, and is intended to be application specific.
The invented server architecture has four major properties including: performance whereby a server complex achieves exceptionally high throughput rates for local services (i.e., services using items in the local item cache); flexibility, whereby a server complex can support the enforcement of a variety of application-specific policies for item management, authentication, and item consistency; security, whereby a server complex can enable the verification of the source, integrity, and freshness of communications over untrusted links; and, scalability, whereby a server complex is readily expandable by adding server components and implementing customized item consistency policies.

Powerful and flexible server architecture

International Business Machines Corporation


The present embodiments generally relate to beverages with enhanced flavors and aromas and method of making same. Some embodiments of the present application are directed to soluble coffee and methods of making soluble coffee with improvements in such qualities as taste and aroma.

1. Field
The present embodiments generally relate to beverages with enhanced qualities such as flavor and aroma and method of making same.
2. Description of the Related Art
Many beverages have a distinct taste and aroma that is difficult to duplicate in a more convenient form. One example of such a beverage is coffee. With regular coffee, water is boiled in a coffee pot in advance, and ground roasted coffee beans are put directly in contact with boiling water (the standard amount is 10 g of ground roasted coffee beans per 100 ml of boiling water) and are boiled in boiling water to effect extraction or are similarly extracted by using a percolator or the like. The obtained extract contains caffeine, tannic acid, saccharides, fats, proteins and various aromatic components and it has a fragrance inherent to coffee and a peculiar complicated flavor inclusive of a bitter taste, an astringent taste and an acid taste.
When roasted coffee beans are ground and then allowed to stand in air, they are readily oxidized which degrades the fragrance and flavors, and when tepid water is used for extraction, the contact time for extraction of roasted coffee beans is usually prolonged. Furthermore, if the boiling time is too long or the extract is allowed to stand for a long time, the fragrance and flavor are degraded. Accordingly, even in case of regular coffee, the method of making coffee is difficult, and it is very difficult to obtain coffee rich in flavor and fragrance.
Coffee extract concentrates and coffee extract powders have heretofore been manufactured on an industrial scale, and instant coffee beverages which can instantly be drunk by dissolving them in hot water or cold water have been prepared and marketed. Ordinarily, these instant coffee beverages are prepared according to a process comprising charging ground roasted coffee beans in an extraction tank, extracting the beans with hot water or boiling water, and subjecting the extract to drying treatments such as spray drying, vacuum drying or freeze drying. Instant coffee beverages prepared according to such conventional processes contain components which cannot ordinarily be drunk, though the amounts of these components differ to some extent according to the extraction conditions like the extraction temperature and time, the concentration conditions and the drying conditions.
Many aromas and flavors associated with coffee are very delicate and complex. With conventional soluble coffee, the delicate coffee flavors and aromas are often degraded or lost during processing and manufacturing methods. Coffee aroma is known to be very unstable. As coffee aroma degrades, it generates unpleasant and non-coffee-like notes that are undesirable. This degradation substantially reduces the perceived quality of the product. For this reason, special attention must be paid to the preparation and storage of flavoring components such as coffee aroma so that desirable aroma components are enhanced or undesirable components are reduced or eliminated.
Furthermore, since the extract is exposed to high temperatures for a relatively long period of time during the preparation, the flavor and fragrance are degraded by cooking, evaporation and oxidative decomposition of aromatic components, and the delicate aroma inherent to coffee is lost. The conventional product usually comes to have an excessive scorching taste. In short, the obtained beverage is far from regular coffee in both the flavor and fragrance. The soluble coffee of the present embodiments overcome these problems in the prior art as well as provide additional advantages.

Method of making beverages with enhanced flavors and aromas


A process for the production of polyisocyanates having a biuret structure, comprising continuously combining organic diisocyanates having aromatically attached isocyanate groups in a mixing chamber with organic diamines having aromatically attached amino groups in a molar ratio of at least 8:1 to form a reaction mixture; and reacting said reaction mixture at a temperature of above 180.degree. C., wherein a residence time of said reaction mixture in the mixing chamber from when said organic diisocyanates and said organic diamines are combined is at most 60 seconds.

It is known to produce polyisocyanates having a biuret structure by directly reacting excess quantities of organic diisocyanates with organic diamines at elevated temperatures. Thus, DE-OS 3,114,638 describes the reaction of excess quantities of a mixture of 80% 2,4- and 20% 2,6-diisocyanatotoluene with alkylphenylenediamines, wherein the reactants are reacted within a period of 3 hours at 100.degree. C. with a zinc acetonyl acetate catalyst. While this approach, i.e., producing biurets with the addition of a catalyst, does indeed require only low temperatures, it would be preferable in practice, where possible, to avoid using a catalyst since, in order to terminate the reaction, the catalyst must then be inactivated with benzoyl chloride.
EP 0,003,505 describes an industrially practicable method for aliphatic isocyanates. In this process, the diamine is introduced into the initially introduced diisocyanate by means of a smooth jet nozzle of defined dimensions using elevated pressures. One disadvantage is that, when the described smooth jet nozzle is used with aromatic isocyanates under the conditions described in the Examples, it is not possible to suppress the formation of solids in the form of precipitated urea. For this reason, in the case of isocyanates, a urea dispersion is first purposefully produced in a preliminary stage at low temperatures of up to 120.degree. C. so that it may subsequently be converted into the biurets by heating.

Process for the production of polyisocyanates having a biuret structure


Interpolating pixel data in scaling pixel data for display can be provided by determining a pixel value at an interpolation location of a display based on filtering pixel data proximate to the interpolation location in a plurality of directions from the interpolation location. Related circuits and computer program products are also disclosed.

It is known to use a "scaler" to increase/decrease the size of a video image by changing a corresponding video signal (formatted for either interlaced or progressive scanning) to provide a scaled video signal that will generate a correspondingly sized (larger/smaller) video image. In contrast, as known by those skilled in the art, a scaler is different from a "deinterlacer" that may change an interlaced formatted video signal to a progressive formatted video signal.
For example, when a video signal of an image is displayed at a 640×480 resolution on a 14-inch monitor, the image may appear relatively clear. However, if the same video signal is provided (at the same resolution) to a 40-inch monitor, the image may be less clear. This situation is caused because the data included in the video signal is spaced apart more on the 40 inch monitor than on the 14 inch monitor.
It is known to create additional data (not included in the original video signal) to be added to the original video signal for display on a higher resolution monitor. The additional data can be created by a process that is referred to as "interpolation" As is known by those skilled in the art, interpolation can be used to create additional data (i.e., interpolated data) that is included between two adjacent pieces of known data. For example, a relatively clear image may be provided to the above 40 inch monitor by creating interpolated data for display when the image size is scaled from 640×480 to 1600×1200. In other words, the number of vertical lines in the displayed image is increased from 480 to 1200 when scaling the image to the 40 inch monitor. Accordingly, the interpolated data can be provided as the pixels which would otherwise be missing from a line of the display if only the original 480 pixels were displayed on the 40 inch monitor.
Linear interpolation using a scaler is discussed, for example, in U.S. Pat. No. 5,793,379, entitled Method and apparatus for scaling images having a plurality of scan lines of pixel data, to Lapidous. As discussed in Lapidous, interpolation data is obtained by filtering existing pixel data using a linear low-pass filter (LPF), weighting the LPF-filtered pixel data, and averaging the result. Additionally, interpolation data, which is close to actual data, can be provided by performing interpolation using a polynomial as discussed, for example, in Multirate Digital Filters, Filter Banks, Polyphase Networks, and Applications by Vaidyanathan, a collection of international learned papers, proc. IEEE, vol. 78, January 1990.

Generating interpolated display data using remote pixel data


In a deceleration control method for a vehicle, by which deceleration control of the vehicle is performed based on a distance between the vehicle had an obstacle including a preceding vehicle ahead of the vehicle, a target deceleration at which the vehicle is to be decelerated is obtained based on the distance; a speed or speed ratio that will apply a deceleration equal to, or less than, the target deceleration to the vehicle is selected as the speed or speed ratio of a transmission of the vehicle during a shift operation; and the deceleration control is executed by an operation of a brake system which applies a braking force to the vehicle and a shift operation which shifts the transmission of the vehicle into a relatively low speed or speed ratio.

1. Field of the Invention
The invention relates to a deceleration control apparatus and method for a vehicle. More particularly, the invention relates to a deceleration control apparatus and method for a vehicle, which controls the deceleration of the vehicle by operation of a brake system which applies braking force to the vehicle and a shift operation that shifts an automatic transmission into a relatively lower speed or speed ratio.
2. Description of the Related Art
Deceleration control is known which performs both a downshift in an automatic transmission and operation of a brake system so that the distance between a host vehicle and a preceding vehicle does not become equal to, or less than, a predetermined value. JP(A) 2001-30792 discloses technology which, when a target deceleration can not be achieved by fully closing the throttle valve and the downshift alone, achieves the target deceleration by fully closing a throttle valve and operating an automatic brake without performing a downshift, which improves riding comfort by avoiding shift shock generated by the downshift. Further, when the target deceleration is higher than a predetermined deceleration, it is regarded as an emergency so the deceleration control simultaneously fully closes the throttle valve, executes a downshift, and operates the automatic brake. (When the deceleration is referred to in this specification, it is understood to be high when the absolute value of the deceleration is large and low when the absolute value of the deceleration is small.)
Patent No. 3123384 discloses a deceleration control by a downshift of a transmission (i.e., downshift deceleration control) which is executed when the distance between vehicles is small. According to this technology, when the distance between vehicles (hereinafter, also referred to as "vehicle-to-vehicle distance") becomes even smaller, a deceleration control by braking the wheels (i.e., braking deceleration control) is executed together with the downshift deceleration control. When this braking deceleration control is started within a predetermined period of time after the downshift deceleration control has started, however, the downshift deceleration control is cancelled by canceling means. As a result, deceleration control is performed by only braking the wheels so no sense of discomfort is imparted to the driver and good running is able to be achieved.
In the deceleration control, there are advantages and disadvantages to both the shift control that shifts the transmission into a lower speed and the brake control that operates the brake system. Shift control is advantageous in that the engine braking force increases steadily. A disadvantage of the shift control, on the other hand, is that response and controllability are poor. In comparison, brake control is advantageous in that it offers good response and controllability. The disadvantage of brake control, however, is that, from the viewpoint of durability and reliability, the brakes can not be continually applied for an extended period of time.
The technology disclosed in JP(A) 2001-30792 only executes a downshift and brake control simultaneously in cases of emergency because doing so adversely effects drivability. The technology disclosed in Patent No. 3123384 cancels the deceleration control by a downshift when the brake control starts.
Neither of the technologies described above simultaneously and actively execute a downshift and brake control, and thus do not incorporate all of the advantages (the good response and controllability of brake control and the steady increase in engine braking force of a downshift) of executing a downshift and brake control simultaneously. In order to take full advantage of the advantages of both shift control and brake control, it is desirable to perform deceleration control that executes shift control and brake control simultaneously, but yet does not impart an unpleasant sensation to the driver.

Deceleration control apparatus and method for a vehicle


A voltage controlled oscillator for wide tuning range of frequency with less phase noise has a bipolar transistor provided with a positive feedback circuit between a base and an emitter of the transistor, an impedance matching circuit coupled with a collector of the transistor and an output terminal, a resistor coupled between the base of the transistor and a control source which provides control voltage for adjusting oscillation frequency of the oscillator. The base of the transistor shows capacitive negative impedance, and an inductive element is coupled with the base of the transistor for oscillation. The emitter of the transistor is grounded for D.C. voltage through an inductor or a transmission line, or coupled with a control voltage.

The present invention concerns a voltage controlled oscillator used in local oscillators and symthesisers of radio equipments for microwave and millimeter-wave frequency systems.
The present invention is used in a personal radio tranceiver such as a gate card or a security card, an AWA (ATM wireless access) radio terminal, and a mobile terminal, in which an oscillator is essential.
A local oscillator is an essential component in a micro-wave transmitter/receiver equipment. There is a tendency to provide a local oscillator in a monolithic micro-wave integrated circuit (MMIC) so that a small sized, low-cost, and high function radio tranceiver is obtained.
A conventional PLL (phase lock loop) local oscillator has high frequency stability and low phase noise close to a carrier frequency because of the use of a crystal oscillator as reference signals. A PLL local oscillator comprises essentially a voltage controlled oscillator, a frequency divider, and a phase frequency comparator. Among them, a voltage controlled oscillator is a key component for defining characteristics of a PLL local oscillator, and therefore, it is desired that it has high frequency stability, high output level, wide frequency vary range, and low phase noise. In particular, a software radio (for instance, a Personal Digital Cellular (PDC) phone in Japan, Global System for Mobile communications (GSM) in Europe, and IS-95 in U.S.A. are handled by a single tranceiver by switching with a software) has been studied so that various frequency bands, various modulation schemes, and various data formats are handled by modifying a software. Therefore, an oscillator which has wide frequency tuning range has been strongly required so that it meets with requests for various frequency bands.
FIG. 25 shows a prior voltage controlled oscillator (I. D. Robertson, "MMIC Design", The Institution of Electrical Engineers, London, UK, p.364,1995, ISBN 0-85296-816-7). In the figure, the numeral 100 is an FET which operates as an oscillation element with a gate terminal 111 grounded through an inductor 121 and coupled with an anode 151 of a varactor 150 which is a voltage controlled variable capacitance element through an inductor 120. A cathode 152 of a varactor diode 150 is coupled with a control voltage input terminal 114 through a resistor 140, and is grounded through a capacitor 130. A source terminal 113 is coupled with an inductor 122 and a capacitor 131. The inductor 122 is grounded through a resistor 141, and the capacitor 131 is directly grounded. A drain terminal 112 is coupled with a drain voltage supply terminal 115 through an inductor 123, and also coupled with an output terminal 110 through an inductor 124 and a capacitor 133. The drain voltage supply terminal 115 is grounded through a capacitor 132. An output matching circuit is composed of inductors 123 and 124, and capacitors 115 and 133.
When said terminal 115 is supplied with drain voltage, the gate of the FET 100 provides capacitive negative impedance, and therefore, a voltage controlled oscillator is obtained by coupling a variable inductance with the gate 111 of the FET. The variable inductance in the prior art is composed of a varactor diode 150 and an inductor 120. Said varactor diode 150 is coupled with a source and a drain of the FET, and controls parallel sum of capacitance C.sub.gs between a gate and a source, and capacitance C.sub.gd between a gate and a drain according to the control voltage. The circuit of FIG. 25 may be integrated on a semiconductor substrate, and provides a reproducible and a low cost circuit.
However, the circuit of FIG. 25 which has a varactor diode for providing a variable reactance has the disadvantage that the control range of the capacitance C.sub.gs between a gate and a source is only around 1:2 or less when it is implemented as a monolithic micro-wave integrated circuit (MMIC) integrated on a semiconductor substrate, and resultant frequency control range is also small.
Another disadvantage of the circuit of FIG. 25 is that it needs more than two active elements, a negative impedance element (FET) and a varactor. This means that the yield rate in production decreases in higher operational frequency. Further, phase noise characteristics is degrades, since low frequency noise component (1/f noise) is up-converted up to oscillation frequency through mixing effect by non-linear characteristics by a plurality of active elements.
FIG. 26 shows another prior voltage controlled oscillator which is shown in JP patent laid open 140836/1994. In the figure, the numeral 200 is a transistor which operates as an oscillation element, with a base terminal 211 grounded through a resistor 208 and coupled through a capacitor 201 with a transmission line 210, the other end of which is grounded through a capacitor 202. Said base terminal 211 is further coupled with a base voltage control terminal 214 and a capacitor 203 through a resistor 207. The other end of the capacitor 203 is grounded. The emitter terminal 213 of the transistor 200 is grounded through a parallel circuit of a resistor 209 and a capacitor 204, and is further coupled with the base terminal 211 through a capacitor 205. The collector terminal 212 of the transistor 200 is connected to a collector voltage control terminal 215, which is grounded through a capacitor 206.
In the circuit of FIG. 26, the resistor 209 provides negative resistance so that the base terminal 211 of the transistor 200 provides capacitive negative impedance. Therefore, when an inductive transmission line 210 is coupled with the base terminal, the circuit of FIG. 26 works as an oscillator. The oscillation frequency of the voltage controlled oscillator depends upon the voltage difference between the base voltage control terminal 214 and the collector voltage control terminal 215 so that the capacitance between the base and the collector is adjusted.
The circuit of FIG. 26 has the advantage as compared with the circuit of FIG. 25 that no varactor diode which is a variable reactance element is necessary, but only one transistor is enough as an active element for providing a frequency controlled oscillator. Therefore, the circuit of FIG. 26 improves the producing yield rate approximate twice as compared with the circuit of FIG. 25, and further decreases non-linear element in a feedback circuit so that phase noise is lowered.
However, the circuit of FIG. 26 has the disadvantage that the control range of the capacitance between the base and the collector is less than 1:2, therefore, large control range of the oscillation frequency is impossible in the circuit of FIG. 26.
The circuit of FIG. 26 is further analyzed for D.C. (direct current) operation. The current in a transistor depends upon the voltage between a base and an emitter. In the case of npn transistor, when voltage is applied to a base, potential barrier of a base-emitter junction is decreased, an electron in an emitter is injected into a base, and if width of a base is sufficiently small, almost all the electrons injected to a base reach a base-collector junction and flows into a collector (current flows from a collector to an emitter). Therefore, voltage between a base and an emitter must be controlled freely so that base current (or emitter current) of a transistor is adjusted.
However, the resistor 209 which operates to provide negative resistance in the voltage controlled oscillator in FIG. 26 restricts the range of the voltage between a base and an emitter. The voltage V.sub.ee applied to the emitter terminal 213 must shift by voltage drop by emitter current I.sub.e in the resistor 209. Even if voltage at the base voltage control terminal 214 is increased so that base current (or emitter current) increases, the voltage between the base and the emitter does not so increase because of the voltage drop in the resistor 209, and therefore, the base current does not increase. To confirm above principle, the considerable circuit model using commercial transistors are calculated. The calculated results is explained in detail in accordance with FIG. 27.
It is assumed that voltage is applied to a base through a resistor of 1 K.OMEGA., and to a collector through an inductor of 1 .mu.H, and collector voltage is fixed to 1 V. A transistor used for calculation is an SSTIC bipolar transistor (C. Yamaguchi, Y. Kobayashi, M. Miyake, K. Ishii, and H. Ichino, "0.5-.mu.m bipolar Transistor Using a New Base Formation Method; SSTIC," in IEEE 1993 Bipolar Circuits and Technology Meeting, 4.2, pp.63-66). The size of an emitter is 0.3 .mu.m.times.120.6 .mu.m. The current-voltage characteristic of a transistor itself is shown in FIG. 28.
An SSTIC bipolar transistor increases exponentially emitter current and base current as the base-emitter voltage increases as is the case of an ordinary transistor.
FIG. 29 shows numerical calculation showing relationship between voltage of a base voltage control terminal, and voltage between a base and an emitter, in the circuit of FIG. 26, where R.sub.1 is resistance of the resistor 209. It should be noted that as the resistance coupled with an emitter increases, the maximum voltage between a base and an emitter decreases, and therefore, base current (and emitter current) flowing in a transistor decreases.
Therefore, the circuit of FIG. 26 can not provide large emitter (or collector) current, and it is difficult to provide large oscillation output. Further, in the circuit of FIG. 26, the resistance of the resistor 209 must be high to provide large negative resistance, and the resistor 209 is essential for oscillation operation. If the resistance of the resistor 209 is zero, no negative resistance is provided, and no oscillation operation is provided.
As described above, the circuit of FIG. 26 has the disadvantage that the control range of the voltage between a base and an emitter is restricted, although the voltage between a collector and a base is controllable arbitrary.

Fully monolithic voltage controlled oscillator with wide tuning range