A source-synchronization interface circuit includes: a sender synchronous-to-asynchronous protocol converter that receives sender data and a sender clock and that has regenerative gain to resolve metastability during phase synchronization of the sender clock and a receiver clock; an asynchronous FIFO buffer with multiple stages that conveys phase information and data from the sender synchronous-to-asynchronous protocol converter to a receiver synchronous-to-asynchronous protocol converter; and a receiver synchronous-to-asynchronous protocol converter that receives the receiver clock and that has regenerative gain to resolve metastability during the phase synchronization. Moreover, the source-synchronization interface circuit includes control logic that initializes the source-synchronization interface circuit by operating the stages in the asynchronous FIFO buffer in a slow mode having a cycle time less than a data-transfer period for a predetermined number of clock cycles, and subsequently operating the stages in a normal mode having a cycle time that is less than that for the slow mode.

Field
The present disclosure relates to the design of a deskew first-in, first-out (FIFO) buffer. More specifically, the present disclosure relates to the design of a FIFO buffer having simplified initialization.
Related Art
Modern ASIC and CPU designs are often partitioned into multiple communicating clock domains. The throughput and latency of the synchronizing blocks that form the interfaces between these clock domains can be critical for overall performance and robust operation. Often, these clocks are generated from the same source and have the same fundamental frequency but an unknown phase offset because of the partitioning of the design. In other cases, the clock frequencies may have known rational ratios. In these cases, mesochronous (matched frequency) implementations can accommodate unknown or large clock skews with the advantage that metastable behavior is excluded after initialization.
In one existing circuit, a single-stage, handshaking first-in, first-out (FIFO) is used as an efficient mesochronous interface. However, it may be difficult to adopt this existing circuit in typical design flows. In particular, the existing circuit may use custom, dynamic logic to implement edge-triggered C-elements. Moreover, the initialization procedure used with the existing circuit may involve continuously sweeping the power supply voltage to the interface. Furthermore, the existing circuit may be limited to a single FIFO stage. While this architecture may be sufficient to accommodate arbitrary phase offsets for a wide variety of applications, it may not be able to tolerate substantial drifts in skew during the operation of the interface.
Hence, what is needed is an interface for use between clock domains without the above-described problems.

Deskew FIFO buffer with simplified initialization


A transceiver transmits first and second signals on first and second transmit radio frequencies. After detecting a received signal, intermodulation distortion caused by transmission of the first and second signals is suppressed, reduced, and/or eliminated using information associated with the first and second transmitted signals. More specifically, the information associated with the first and second transmitted signals is used to calculate or otherwise obtain a correction factor that corresponds to the intermodulation distortion. The correction factor is subtracted from the received signal to suppress the intermodulation distortion.

Distortion is a significant problem in telecommunication systems. While there are several types, distortion generally can be thought of as some modification of a waveform by introducing features not present in the original waveform or by suppressing or modifying features present in the original waveform. The present invention is particularly concerned with intermodulation distortion. Intermodulation is the modulation of components of a complex wave by each other producing waves having frequencies, among others, equal to the sums and differences of those components of the original wave. In other words, intermodulation distortion results from spurious combination-frequency components in the output of a transmission system.
One environment where intermodulation distortion is a problem is in radio base stations used in mobile telecommunications systems. Such base stations typically include plural transmitters and plural receivers, (i.e., plural transceivers), and may employ a duplexer so that transmitter-receiver pairs can share an antenna for both transmitting and receiving radio frequency signals. For example, in the well-known GSM 900 mobile communications system, the transmit band covers 35 MHz and includes a 175 transmit frequencies approximately 200 KHz wide. Unfortunately, transmissions over certain pairs of these 175 transmit frequencies generate significant intermodulation products in the receive band. As a result, frequency planning methods are required in order to avoid using such frequency pairs. Another problem is that unused frequency pairs reduce the capacity of the base station.
These problems are overcome by compensating for intermodulation distortion in a received signal caused by transmission of first and second signals on first and second transmit radio frequencies. In particular, after detecting a received signal, the intermodulation distortion is suppressed, reduced, and/or eliminated using information that is associated with the first and second transmitted signals. The information associated with the first and second transmitted signals is used to calculate or otherwise obtain a correction factor that corresponds to the intermodulation distortion. The correction factor may be subtracted or otherwise removed from the received signal to suppress the intermodulation distortion.
In a preferred, non-limiting, example embodiment, a compensator in the receiver detects (1) the baseband information corresponding to the first and second transmitted signals, (2) the power level at which the first and second signals were transmitted, (3) the frequencies over which the first and second signals were transmitted, and (4) timing information associated with the transmission of those signals. The baseband information, the power level, and the frequency corresponding to each of the signals are used to calculate or retrieve from a lookup table a compensation factor corresponding to the intermodulation distortion. The timing information is used to synchronize that calculation or table lookup for a particular signal. One or more time delays is used to synchronize when the compensation signal is removed from the received signal. Such delays may take into account a first delay associated with a time period for the first signal to be processed and transmitted via an antenna. A second delay may be associated with a time period for the second signal to be processed and transmitted via the antenna. A third delay may be associated with a time period for receiving a signal via the antenna and processing it through the compensator.
There are a number of benefits of the present invention. For example, it may be implemented without changing existing radio hardware. Parameters in the lookup table may be updated adaptively to account for changes due to temperature, aging, and different behaviors of different frequency pairs. Such a flexible software solution is further advantageous because compensation can be made on an as needed basis adaptively tailored to individual sites and/or base stations. Another potential benefit is that IM distortion requirements on hardware units may be relaxed, which allows for less expensive hardware. Moreover, frequency planning, which otherwise would be required when using a duplexer to avoid intermodulation frequency pairs, is not necessary. As a result, the capacity of a transceiver using a duplexer is not reduced as a result of not using those frequency combinations that result in intermodulation distortion.

Method and apparatus for reduced intermodulation distortion in a radio transceiver


In a process for localizing a scintillation event in a gamma camera having a plurality of photomultipliers forming a camera surface, each photomultiplier generating an output signal in response to the scintillation event, wherein a plurality of comparative signal sets are generated from output signals of the photomultiplier corresponding to respective scintillation events of known location, a location-dependent probability function is formed based on a comparison of the outputs of the photomultipliers for a scintillation event of unknown location with the comparative signal sets, and the location of the scintillation event of unknown location is defined as the location corresponding to the maximum of the probability function, the speed with which the localization is accomplished is increased by initially defining a portion of the total gamma camera surface in which there is a high probability that the location of the scintillation event of unknown origin lies, and limiting the investigation for the location of the scintillation event of unknown location to that portion of the camera surface, with increasing precision.

1. Field of the Invention
The present invention relates to processes for the localization of a scintillation event in a gamma camera having a number of photomultipliers arranged over a camera surface, the output signals of which are compared with comparative signal sets which have been generated by comparative scintillation events with location-known origins thereby forming, a location-dependent probability function, with the location of the maximum of the probability function being registered as the location of the scintillation event.
2. Description of the Prior Art
Disintegration quanta of radioisotopes are traced in an examination object using a gamma camera. In such a gamma camera a scintillation crystal, usually consisting of sodium iodide (Nal(T1)) transforms the energy of the absorbed gamma quanta (typically 140 keV for .sup.99 Tc) into light. This scintillation light is distributed via a light guide, such as a glass plate of Pyrex.RTM., over a number of photomultipliers, the electric output signals of which are used for the determination of the absorption locus. In a conventional gamma or Anger camera a localization is undertaken according to the center of gravity principle. The absorption locus is obtained from the sum of the weighted individual signals of the photomultiplier divided by the sum of the signals of all the multipliers. The weighting factor is chosen dependent on the position of the corresponding photomultiplier relative to a coordinate origin on the camera surface. The division by the sum signal makes the localization as independent as possible from fluctuations in the light yield.
The localization according to the center-of-gravity principle is ordinarily realized with analog switching circuits, with the output signals of the photomultipliers being summed according to a weighing represented by resistances. Besides the resistive weighting processes are also known employing a capacitive weighting of the output signals. The sum signal, again, is formed by analog summing. The main disadvantage of this center-of-gravity localization is a correct determination of the absorption locus can be achieved only under certain conditions. For example, if in the border zones of the crystal the symmetry of the signal distribution is disturbed by light reflection on the crystal border, false localizations result. Moreover, for an absorption locus on the border the arrangement of the photomultipliers is weighted on one side toward the crystal interior, which leads to the result that the center-of-gravity localization in the border zone fails altogether. This is in part compensated in conventional gamma camera constructions, wherein the light guides and the photomultipliers overlap the crystal border. The consequence is that in the gamma camera with analog center-of-gravity localization there remains a border not usable for the image generation which, according to experience, has the extent of about 1.5 times the radius of a photomultiplier.
A process which, despite such border effects, permits a localization is described in an article by Milster et al.: "A Full Field Modular Gamma Camera" in the Journal of Nuclear Medicine, Vol. 31, No. 4, 1990, pp. 632-639. By digitization of the output signals of the photomultipliers directly after a pre-amplification, digital and nonlinear localization processes can be used. These processes make it possible to extend the localization directly to the crystal border and thus present possibilities for a modular construction of virtually arbitrary camera geometries.
In digital localization processes, the use of a probability function or a maximum likelihood estimator has proven useful; other processes such minimum average square error have been used with virtually equivalent results.
From the aforementioned Milster et al. article, it is known to employ a maximum likelihood estimator process on the basis of the Poisson model for statistical fluctuations of the output signals of the photomultipliers. For each possible combination of the output signals the most probable locus is entered in a memory in the form of a look-up table. Each position in the look-up table is additionally marked as to whether the value of the likelihood function falls into a certain likelihood window. This known realization of the maximum likelihood estimator process has the advantage that by means of the look-up table the localization can occur very speedily. The disadvantage is that because of the memory capacity requirement for the look-up table, the application is restricted to camera modules with few photomultipliers and a low bit-depth for the corresponding signals. For example, for a camera or measuring surface of 10.times.10 cm.sup.2 with four photomultipliers and a 5-bit representation of the output signals of the photomultipliers, a memory of 2 megabytes is required for the lock-up table. Only slight extensions of the above parameters lead to drastically higher storage requirements. Thus, for 4 photomultipliers with an 8-bit digitalization, 8 gigabytes are needed, while for 8 photomultipliers with a 5-bit digitialization, 2048 gigabytes are required. For still larger modules and/or higher accuracy of the quantization, the storage requirement increases into the immeasurable range.

Method for rapid localization of a scintillation event in a gamma camera using a maximum likelihood estimator


Application of power to a transmitter in a messaging device is preceded by measuring a quality of at least one base station down-link signal received by a receiver in the device, and producing a transmit threshold signal when the measured signal quality corresponds to a substantial likelihood of accurate detection by a base station of an up-link signal to be transmitted from the device. The device transmitter is powered on only if the transmit threshold signal is present over a given interval prior to a transmitter operation. Thus, a relatively low-power battery and small antenna can be used effectively by the device, and its overall size kept at a minimum.

1. Field of the Invention
The present invention relates generally to two-way messaging devices or pagers (hereafter "pagers"), and particularly to a pager whose transmitter is powered only when the pager is in range of a base station receiver.
2. Discussion of the Known Art
Known pager systems use at least one base station for communicating with a number of portable pagers. Pagers and other user equipment assigned to the system are generally referred to as subscriber units (SU's). Over a forward or "down-link" frequency channel, a base station transmits down-link signals containing information destined to individual SU's whose addresses are also encoded in the down-link signals. If so configured, a two-way pager can transmit an acknowledgment signal back to the base station (an "ack-back" signal) to confirm its detection of a down-link signal addressed to it. In addition, the pager may be capable of transmitting other "up-link" signals to a base station, for example, to provide information that allows the pager's location to be established.
It is contemplated that a wireless communication system capable of global coverage for all subscribers, will soon be available. The system, known as "IRIDIUM", is presently specified to include mobile telephony and one-way pager service world-wide using a number of communication satellites in low-earth orbit (LEO). A satellite-based pager service will overcome certain limitations of terrestrial based systems. At present, people traveling with pagers know that paging systems around the world are not usually compatible. The United States (900 MHZ FLEX), South Korea (322 MHZ FLEX), and France (VHF ERMES), all have different paging frequencies and protocols. While several paging service providers have achieved regional and even some international coverage, such services still exclude major portions of the world. The result is that paging subscribers have few options for roaming worldwide and, sometimes, even on a regional basis.
By contrast, a mobile satellite system may operate according to a uniform protocol worldwide. Because a system subscriber may want to receive pages at any time while traveling globally, it is important that the system be capable of determining the subscriber's approximate location on the earth, so that pages destined to the subscriber can be transmitted from a base station (satellite) closest to the subscriber. Thus, a "two-way" or acknowledgment type of pager unit is desirable for use in paging systems extending over large geographic areas, and particularly for use in a global paging system.
A pager may not always be within range of a base station to detect a message sent from the base station. For example, the pager may be inside a building that attenuates signals from the base station below a threshold value needed for accurate pager reception. So-called received signal strength (RSS) circuits have been provided for terrestrial-based paging systems, to alert users when their pagers are out of range from a base station transmitter and that messages transmitted from the base station may not have been detected by their pagers. See, for example, U.S. Pat. No. 5,032,835 (July 1991); U.S. Pat. No. 4,851,820 (July 1989); U.S. Pat. No. 5,049,875 (September 1991); and U.S. Pat. No. 5,289,178 (Feb 1994). All relevant portions of these patents are incorporated by reference herein. Again, with a two-way pager system, if an acknowledgment or location signal from a system pager is not detected by a base station receiver, the system can re-transmit a message periodically until the addressed pager's signal is detected.
Even if a two-way pager receives and accurately detects a message signal addressed to it, power limitations of the pager's transmitter could make it unlikely that a signal radiated from the pager will be detected at a base station. Since it is desirable to use small and readily available batteries, e.g., size "AA" or "AAA" to power a pager, its transmitter radio frequency (RF) power output usually does not exceed 1000 milliwatts. Pager signal field strength is also limited by the size of the pager antenna, which for ease of portability should not exceed the size of the pager itself.
Thus, while base station transmitters can produce strong signals at RF power levels of, e.g., 150 watts allowing pagers located over wide geographic areas to detect them, signals radiated from the pagers have a lesser chance of being detected at a system base station. And, each time a pager transmits a signal, substantial battery power is consumed whether or not the signal is detected adequately at a base station. It would therefore be desirable to avoid wasting pager battery power when it is unlikely that a signal to be radiated from a two-way pager would be detected by a base station. Such a restraint on two-way pager transmitter activation would allow for a lower pager transmitter RF power level, a smaller pager antenna, and a smaller and less expensive overall construction for the pager including its battery components.
Also, if the user is alerted whenever his or her pager's transmitter is unable to signal a base station, he or she can simply move to a more favorable location where the alert ceases. Such an alert feature would also allow the pager transmitter to require only the minimum amount of power to signal a system base station under favorable propagation conditions. That is, the pager transmitter is activated only under a "go" condition when there is a good likelihood that its signal will be detected by a base station, and the transmitter does not waste battery power in a "no go" situation when it is unlikely that the pager's signal will be received.


This disclosure relates to N-(4-(bis(4-(dimethylamino)phenyl)methylene)-8 -(dimethylamino)naphthalen-1(4H)-ylidene)-N-methylmethanaminium, derivatives, and uses related thereto. In certain embodiments, the disclosure relates to compounds of formula I. In certain embodiments, the disclosure relates to methods of treating or preventing Nox related diseases and conditions comprising administering an effective amount of compounds disclosed herein to a subject in need thereof. In certain embodiments, the Nox related disease or condition is cancer.

The invasive nature of glioblastoma (GBM) represents a major clinical challenge contributing to poor outcomes. Invasion of GBM into healthy tissue restricts chemotherapeutic access and complicates surgical resection. Munson et al., report an anti-invasive small molecule, Imipramine Blue (IB), inhibits invasion of glioma. Sci Transl Med 4, 127ra36 (2012). IB inhibits NADPH (reduced form of nicotinamide adenine dinucleotide phosphate) oxidase-mediated reactive oxygen species generation and alters expression of actin regulatory elements.
Klingenberg et al. report the NADPH oxidase inhibitor imipramine-blue in the treatment of burkitt lymphoma. Mol Cancer Ther. 2014, 13(4):833-41.
See also US20040132830A1, US20090176745A1, U.S. Pat. Nos. 8,435,979B2, 8,436,195B2, WO2000030632A1, WO1998057922A1, and WO1997034589A1.
There remains a need for treatment of cancer that does not have the adverse effects generally caused by the non-selectivity of conventional chemotherapeutic agents.
References cited herein are not an admission of prior art.


The invention is directed to a cover which is supported or suspended from a self-supporting, open air framework constructed over a vessel. The cover is sealed to the vessel.

The present invention generally relates to a rigid ceiling supported within a closure structure and, more particularly, is concerned with a rigid ceiling suspended from and sealed within a closure structure for reducing the volume over a vessel.
A variety of gases are released from vessels containing pools of waste, petroleum and other stored liquids and semi-solids. Over time the content of these gases will increase within the internal volume of a closure structure above the surface of the pool. This volume of gases (such as H.sub.2 S or methane) must periodically be cleaned to reduce odors or so that regulated gas contents do not exceed certain prescribed standards. It is therefore desirable that the volume within the closure structure over the pool of waste be kept as small as possible to minimize the volume of gases which must be periodically cleansed and therefore save on cleaning costs.
One type of closure structure which can be used is internally supported. However, it is not desirable to build a closure structure which will require columns or other types of supports which run vertically up from the pool of waste to support the roof of the closure structure. First of all, the pool of waste may require agitation and the pool is easier to agitate when there is no interference from supporting structures. Secondly, supporting structures in contact with the pool create a location which encourages the buildup of waste within the pool. For these reasons it is desirable to build a self-supporting closure structure over the pool of waste.
Domes and vaults are closure structures which can be constructed to be self-supporting over large areas. However, the structure of vaults and domes creates a larger volume within the closure structure than is created by internally supported closure structures.
Prior practices have described ceilings installed within a dome or self-supporting structure. Apparatus has also been described for placing a floating deck within a vessel to prevent vapor losses.
U.S. Pat. No. 1,825,800 to Houseman discloses a frame capable of supporting the weight of a ceiling and a roof covering without the use of intermediate vertical supporting posts. A false ceiling may be suspended from the roof. The ceiling is designed to insulate the inside area of the enclosure from overhead noises.
U.S. Pat. No. 2,341,548 to Heineman described a diaphragm which extends across the top of a container below and spaced from a roof. An upper compartment is completely sealed such that the placement of a liquid in the upper compartment will decrease the temperature variations of the contents of the lower compartment due to absorption of the heat of vaporization during temperature rises and due to the return of this heat, by condensation, as the temperature drops.
U.S. Pat. No. 3,279,606 to Cox discloses a gas dome for anaerobic digesters including a rain shed and a ceiling plate. Trusses extend between the rain shed and ceiling plate. A gas deflector skirt or rim plate may be used to prevent the escape of any gas between the cover and the tank wall. The cover is dome shaped so that sludge gas generated during the digestion of the sludge is directed toward the central gas dome.
The publication entitled "Geodesic-Dome Tank Roof Cuts Water Contamination, Vapor Losses" from the Oil and Gas Journal describes the use of a floating deck within a tank. The floating deck is sealed around the rim to prevent vapor emissions.
None of the prior art patents are designed to fulfill the needs met by the present invention. These inventions are not designed to maintain an airtight seal within a closure structure over and above a deposit of waste. The patent to Houseman is relevant only in that it discloses a ceiling suspended from a roof. The patent to Heineman does not disclose the manner in which the diaphragm will specifically be constructed and how such diaphragm will achieve a seal. Heineman also fails to disclose a manner for maintaining a seal during conditions of distortion of the container. The patent to Cox does not disclose apparatus for suspending a ceiling from the closure structure, the structure of a lightweight ceiling which provides an effective seal and a manner of maintaining a seal around the edge of the ceiling while allowing for motion of the ceiling relative to adjacent structures.
The floating cover art has several disadvantages. Since floating covers are constructed to move independent of the vessel, they are not gas tight around the periphery of the cover. Floating covers also have a short useful service life, require periodic cleaning and act as catch basins for airborne debris and trash. Floating covers also obstruct equipment designed to interact with the substance contained in the vessel.


A neuroprocessing center executes a neuroprocessing using a neurocomputer. The neuroprocessing center is a public facility available for a user having a user terminal and executes the neuroprocessing as requested by the user. The user is given a result of the neuroprocessing. It is unnecessary for a user to have a computer implementing the neural network and anyone can participate in the profits of the neuroprocessing service. Examples of neuroprocessing service achieved by the neural network are graphic pattern generating services, character recognition services, sound synthesizing services, etc. A result of the neuroprocessing is effectively used by the user.

This invention generally relates to the neural networks and, in particular, to a method and system for providing a neuroprocessing service through a neuroprocessing center. The neural networks according to the present invention can be implemented in, for example, a graphic pattern modification system to electronically modify a graphic pattern such as a font of characters or the like.
It has been proposed to use the neural networks to process and control a computer system. As well known in the art, neural networks are typically composed of processing elements and connections. For example, a back propagation neural network is one of the most important and common neural network architecture, which is a hierarchical design consisting of fully interconnected layers of processing nodes. More particularly, the network architecture comprises at least an input layer and an output layer. The network architecture may further comprise an additional layer or N hidden layers between the input layer and the output layer where N represents an integer which is equal to or larger than zero. Each layer consists of one or more nodes which are connected by links with variable weights. The network is trained by initially selecting small random weights and internal thresholds and then presenting all training data repeatedly. Weights are adjusted after every trial using side information specifying the correct result until weights converge to an acceptable value. The neural network is thus trained by data representing input patterns and desired output patterns (teacher patterns) to automatically generate and produce a desired output for an unknown input.
It is conceivable that various processings and controls can be made by using the neural networks and one example thereof is now described.
Many graphic patterns in daily use can be formed by modifying other graphic patterns according to certain rules. A type family in typography is considered as one of the most typical example of such modification of patterns. There are various fonts (a set of characters) in typography, each of which consists of characters, symbols and numbers of one typeface such as Courier, Helvetica, and so on. Fancy letters and black letters are also used frequently in graphical printings. In Japanese, Chinese characters of kanji has its own typefaces such as mincho, gothic or antique. Mincho, one of the most popular and legible typefaces in Japanese, is a style of character having thin horizontal bars and thick vertical bars. Roman in the European typeface resembles Japanese mincho. Each of the horizontal and vertical bars includes an imbricated triangular portion at one end thereof.
In general, fonts are formed manually based on original characters created by a calligrapher or a font designer. To make one font requires laborious work especially in Japanese, due to several thousands of kanji. These fonts are adopted into various electronic devices such as a word processor, a personal computer, a DTP (desk top publishing) device or other basic peripheress. Information relating to the font is generally contained in a font memory (font cartridge), which is generally implemented by a read-only memory (ROM). The font memory is plugged into a printer and the fonts are stored therein in electronic forms. Each character is thus electronically represented by dots or functions for every one font, based on the original characters created by a calligrapher or a font designer. As a result of the electronic manipulation of fonts, fonts differ slightly from manufacturers to manufacture or, even with the same manufacturer. For example, word processing packages using Helvetica 12 point may modify this font electronically so that it appears to be a new font, or even the shape of the imbricated triangular portion of mincho based on a certain rule slightly differs from the manufacturer of the word processor or the like. Such technique results in expensive and time-consuming process for making an additional font because a singular font consists of a large number of characters, symbols and numbers. Accordingly, it has been required to provide a facile method for creating a novel font which is different from those of others. This is also true with alphabets where typefaces are protected under the copyright law and unauthorized copying thereof is forbidden.
Creation of a novel font is additionally advantageous, as follows. A font memory of a word processor generally contains a predetermined font so that different articles written on the same word processor are exactly equal in face. A paper written on a word processor is legible and regularly formed while there appears no individuality of characters.
Recently, many people use a word processor for writing a personal letter in Japan and most of the word processors for personal use are found to be used for writing New Year's greeting cards. Such greeting cards with fixed types make unnecessarily formal impressions and are often not acceptable. Similarly, Christmas cards or other season greetings cards with fixed types are often not acceptable. A special font for each individual is hence the ideal as the exclusive font of characters of a personal word processor. The font is, however, generated manually as mentioned above. This sometimes costs several hundred thousands or several million dollars. Most people cannot afford such a costly font exclusive only to their personal word processors. The present invention accordingly proposes utilizing the neural networks to create a personal font of characters, thereby making inexpensive personal fonts available. The inventor also suggests an approach to other possible applications of the neuroprocessing service.
Though the above-mentioned neural networks can be realized using software for conventional hardware, it is preferable to use a neurocomputer having an exclusive MPU (micro processing unit) called a neurochip. Typical neurochips are disclosed in, for example, Japanese Patent Unexamined Prepublication Nos. 64788/1990, 226382/1990 and 228784/1990. However, most people cannot afford such expensive hardware and thus, it has been desired to provide a neurocomputer for public use.
Accordingly, a primary object of the present invention is to provide a neuroprocessing service which is available for the public, in an effective manner at a reasonable cost.
Another object of the present invention is to provide a method and system for readily creating various fonts of characters.


A retention device for use with a filter apparatus having a main frame and an intermediate frame member, and a plurality of parallel filter elements in a filter zone being spaced one from another at a selected distance and forming a filter screen known as a harp screen, is disclosed. The filter screen is mounted to the main frame. The retention device includes a clamp disposed at an intermediate portion of the filter elements for clamping at least a clamped portion of the filter elements to the intermediate frame member, with the arrangement being such that a neutral region is provided adjacent or within the clamped portion of the filter elements, the neutral region being such that the filter elements may be manipulated within that region, and their relative spacing varied, within that region, without affecting spacing between filter elements outside the neutral region.

At present, filter screens, particularly harp screens, are loaded into vibrating filter machines and tensioned so as to assist in maintaining constant spacing between adjacent filter elements. The screens are formed into a slight arch, which also assists in filtration, however, filtered material tends to gather at edges of the screen. There is no known method of reducing buildup at screen edges; maintaining or improving efficiency of filtration, and/or maintaining screen element spacing at intermediate portions of the screen, without undue adding of tension to the screen elements.
The present invention seeks to ameliorate one or more of the abovementioned disadvantages.


A sectioned pillow having two pillow covers, which are connected by a fabric tether, inner pillows, and a decorative pillow case for each of the tethered inner pillow covers. The tether prevents separation of the two pillows beyond a predetermined maximum distance. The space created between the two pillows provides a cradle for the head in a supine sleeping position. In a prone sleeping position, the space between the two pillows acts as an air channel allowing for the free flow of air to and from the sleeper's nose.

1. Field of the Invention
The present invention relates to pillows. More specifically, the present invention relates to a bipartite bed pillow assembly having mutipositional uses for aiding sleep.
2. Description of the Related Art
Sleeping habits, good and bad, are developed as children. When we are younger, however, our bodies are more recuperative, and do not feel the effects of poor or improper sleeping positions. As we age, our bodies are more susceptible to these effects. For this reason, optimal sleeping positions have been researched. Many people are comfortable lying on their backs, but find that in this position their heads roll, uncomfortably, from side to side often leading to cramped necks in the morning. Others would benefit from sound deadening effects in this position.
A great many people enjoy sleeping on their stomachs, in a prone position. The obvious drawback is that either one's nose is buried in a pillow, or head is turned uncomfortably to one side in order to breathe freely. Once again this leads to neck strains and pains in the morning. This also leads to discomfort during the night which, although the sleeper may be unaware, disturbs sleep. A prone sleeping position allows for alignment of the head, neck, and spine when the head is not turned to one side. Sleeping in such a position is impossible on standard and many therapeutic pillows. A pillow is therefore needed that will allow the sleeper to place his or her head in alignment with the neck and spine while leaving an air passage open to the nose for proper breathing.
Since few people sleep in the same position every day, it is beneficial to have a pillow that may adjust to several different sleeping styles, including the face down prone position. Another advantage sought is aesthetic appeal. Typical therapeutic pillows on the market today are not worthy of being placed atop a modern bed. Funny shapes and awkward materials make most of these pillows unsightly accompaniments in an otherwise pleasant sleeping area.
Pillows and headrests for aiding sleep or rest have been the subject of earlier patents. Some examples of these include U.S. Pat. No. Des. 176,758, which issued to Edmonson on Jan. 31, 1956, disclosing a headrest made of two cushions connected by a sheet of fabric having essentially the same vertical dimension of the cushions.
U.S. Pat. No. 2,765,480, which issued to Mueller on Oct. 9, 1956, discloses an all purpose orthopedic pillow. The inventions includes two cushions separated by a sheet of fabric, having the same width dimension as the cushions.
Another pillow of this type, having a sheet equivalent in length to the cushions is disclosed in U.S. Pat. No. 4,274,673, which issued to Kifferstein on Jun. 23, 1981. That patent discloses a disposable adjustable headrest and pillow. Cushions may be added or removed to either side of the pillow depending upon need.
U.S. Pat. No. 2,577,595, which issued to Tobias on Dec. 4, 1951, discloses an articulated pillow and case. The pillow has a large upper horizontal section, and a lower horizontal section. The pillow further provides an articulating portion that may be rotated ninety degrees to support a shoulder raising the sleeper slightly to one side. A pillow case designed for the pillow is also disclosed.
U.S. Pat. No. 4,042,278, which issued to Jenson on Aug. 16, 1977, discloses a drowsing chair pillow designed to hang over the back of a chair, positioning raised cushions on either side of the head to prevent the head from rocking from side to side.
U.S. Pat. No. 4,550,458, which issued to Fiore on Nov. 5, 1985, discloses a cervical support pillow. The pillow has a generally semicircular cutout portion extending from the top edge to a central portion of the pillow. The pillow is designed to support the neck and head while resting or sleeping in a variety of positions, including a prone position with the face pointing partially downward.
British patent document no. 2527, dated May 18, 1911, discloses a pillow having two horizontal sections connected by a horizontal recessed area travelling the length of the pillow.
Other pillow designs have been the subject of earlier patents, but are less related to the present invention. Among these are U.S. Pat. No. 4,780,920 (angular sleeper's pillow and pillowcase) which issued to White on Nov. 1, 1988; and U.S. Pat. No. 2,667,915 (pillow) which issued to Pfeffer et al. on Nov. 21, 1949.
Despite these previous efforts, there is still a need for a bed pillow that accommodates all sleeping positions, including a face down prone position, while being aesthetically pleasing enough to keep on the bed when not in use.
None of the above inventions and patents, taken either singularly or in combination, is seen to describe the instant invention as claimed. Thus a sectioned pillow solving the aforementioned problems is desired.


The invention provides monodisperse single emulsions which have a mean emulsion particle size within the range of 0.3 to 40 .mu.m and are substantially free of emulsion particles having a particle size smaller than 50% of the mean particle size, double emulsions which have a mean emulsion particle size within the range of 0.3 to 40 .mu.m and whose internal phase concentration is controlled substantially uniformly within the range of 1% to 70%, and methods of producing these emulsions.

Heretofore mechanical means have been used in the production of single emulsions of the o/w (oil-in-water) type and of the w/o (water-in-oil) type, among others. More specifically, emulsions are generally produced by adding an emulsifying agent, such as a surfactant, and a liquid to be dispersed to a continuous phase liquid and stirring or frictionally mixing the resulting mixture by some mechanical means, such as a stirrer, homogenizer or colloid mill, to thereby comminute the dispersed phase. Further, the method of emulsification which comprises irradiating mixed liquids obtained in the above manner with ultrasonic waves to cause cavitation is also used.
However, the use of such mechanical means poses a problem that dispersed phase particles in the emulsion prepared (hereinafter sometimes referred to as emulsion particles) are considerably ununiform in size, so that the emulsion is poor in stability. In particular, when the dispersed phase concentration is high, a large amount of surfactant will be required for the improvement of emulsion stability.
Furthermore, it is difficult, by these known emulsion preparation methods, to suitably adjust the emulsion particle size depending on the intended use. Thus, for instance, while strict emulsion particle size control is very important in manufacturing monodisperse polymer microspheres, monodisperse inorganic microspheres and the like from emulsion particles, the prior art methods which use conventional mechanical means can hardly meet such requirement.
On the other hand, two methods are known for the production of double emulsions of the o/w/o or w/o/w type. One is the one-step emulsification method which utilizes phase inversion from w/o type emulsions to o/w type emulsions or from o/w type emulsions to w/o type emulsions and the other is the two-step emulsification method comprising dispersing with stirring a w/o or o/w type emulsion prepared in advance again in a continuous phase to obtain a w/o/w or o/w/o type emulsion. However, these methods have problems; for example, the yield of double emulsion particles may be low, and disruption of emulsion particles may occur, allowing a substance or substances added to flow out from the internal phase. Further, it is very difficult to obtain, by these methods, double emulsion particles size-controlled in the micron to submicron order, which are most important from the practical viewpoint.

Monodisperse single and double emulsions and method of producing same


A serial communication system includes an integrated circuit having a master serial interface; and a processor having a slave serial interface coupled to the master serial interface through a clock signal line and a data signal line. The slave serial interface is responsive to a read temperature command issued by the master serial interface to return a first temperature value associated with the processor.

1. Field of the Invention
This invention relates to a serial interface for use on integrated circuits, particularly a serial interface for a microprocessor.
2. Description of the Related Art
Microprocessors have traditionally utilized an on-die thermal diode to provide temperature information to an off-chip monitoring device. In traditional implementations, two pins on the microprocessor are utilized to interface the diode to the monitoring device, which determines the temperature of the microprocessor based on the diode. The temperature information is utilized for thermal control, e.g., fan control or other thermal management activities.

Serial interface having a read temperature command


A method, apparatus and computer readable medium for transmitting at least one packet across a network destined for reception by at least one network endpoint. A plurality of packets is processed sequentially from a queue to be sent to at least one network endpoint. At least a first packet from the plurality of packets is transmitted to the network endpoint. The at least first packet transmitted to the network endpoint is determined to not have been acknowledged. A first retry packet associated with the at least first packet is transmitted to the at least one network endpoint. Transmission of packets other than the first retry packet is suspended to the network endpoint. The first retry packet is determined to have been acknowledged by the at least one network endpoint. Transmission of remaining packets in the plurality of packets to the at least one network endpoint is resumed.

Reliable transport protocols are used in networking systems to ensure data is correctly received when errors in the transmission occur. In general, reliable transport protocols assign sequential sequence numbers to packets when the packets are first transmitted. When the packets are received at the destination (either at the next hop, or at their ultimate destination), the receiver transmits an acknowledgement packet back to the originator indicating which sequence number was received. Packets that are not acknowledged are typically re-queued and retransmitted by the originator after a predefined timeout duration occurs. However, in conventional reliable transport systems, when a node detects a timeout (i.e., that an acknowledgement has not been received), it resends all the packets it has queued up for that node. This has the disadvantage of flooding the network with many packets. If the communications difficulties that prevent successful transmission to the endpoint are not resolved, all of the packets will be discarded. The consumption of communications resources by the retransmission of all unsuccessfully communicated packets can adversely affect the operation of unrelated nodes in the network that are not experiencing difficulties since the availability of the shared communications resources will be reduced.
Therefore a need exists to overcome the problems with the prior art as discussed above.

Congestion reducing reliable transport packet retry engine

International Business Machines Corporation


The disclosure provides a process of designing and optimizing supramolecular therapeutics. The disclosure also provides a method for designing and optimizing antibody drug conjugates.

Nature has inspired the design of many engineered materials and devices (Wegst U G K, Bai H, Saiz E, Tomsia A P, Ritchi R O. Bioinspired structural materials. Nature Materials 14, 23-36 doi:10.1038/nmat4089 and Huebsch N, Mooney D. J. Inspiration and application in the evolution of biomaterials. Nature 462, 426-432 (26 Nov. 2009). For example, the nanotopography of gecko feet inspired the development of surgical adhesives (Mandavi et al., A biodegradable and biocompatible gecko-inspired tissue adhesive. Proc Natl Acad Sci USA. 2008; 105(7):2307-12). Similarly, a cephalopod's ability to display vivid colors by selectively contracting muscles to reversibly activate chromatophores recently inspired the development of an electro-mechano-chemically responsive elastomer system that can exhibit a wide variety of fluorescent patterns under the control of electric fields (Wang et al., Cephalopod-inspired design of electro-mechano-chemically responsive elastomers for on-demand fluorescent patterning. Nature Communications. 5, 4899. doi:10.1038/ncomms5899). In the evolution of organisms, an extensively studied system is the Volvocine family including the unicellular Chlamydomonas and the first multicellular organism, Volvox, where simplistically the latter is comprised of about 2000 somatic cells (and a few germ cells) that resemble Chlamydomonas cells routinely arranged in a self-assembling extracellular matrix (David L Kirk. Evolution of multicellularity in the volvocine algae. Current Opinion in Plant Biology 1999, 2. 496-501). The evolution from unicellularity to multicellularity confers complexity of function (David L Kirk. Evolution of multicellularity in the volvocine algae. Current Opinion in Plant Biology 1999, 2. 496-501). In the chemical world, such an evolution is mirrored in the origin of supramolecular structures from molecular subunits (Lehn J M. Toward complex matter: supramolecular chemistry and self-organization. Proc Natl Acad Sci USA. 2002 Apr. 16; 99(8):4763-8). We rationalized the complexity of function thus acquired in a supramolecular system over a molecular subunit could be potentially harnessed in the treatment of cancer and other inflammation-associated diseases.
According to the World Health Organization, mortality due to cancer is expected to increase from 7.6 million in 2008 to 12 million deaths in 2030, making it one of the major killers (Torre et al., Global cancer statistics, 2012. CA Cancer J Clin. 2015 Feb. 4. doi: 10.3322/caac.21262). While emerging approaches such as immunotherapy hold promise in the treatment of cancer, these produce durable response in only a fraction of the cancer patients (Kim et al., Combining targeted therapy and immune checkpoint inhibitors in the treatment of metastatic melanoma. Cancer Biol Med. 2014 December; 11(4):237-46). This necessitates a reliance on small molecule therapeutics or biologics, which are limited by the inability to achieve high concentrations in the tumor without causing systemic toxicity. While nanomedicines and antibody-drug conjugates address these limitations by delivering greater quantities of a therapeutic payload to a tumor, the ability to load enough payload onto the carrier to achieve the desired therapeutic concentrations is a challenge (Basu et al., Nanoparticle-mediated targeting of MAPK signaling predisposes tumor to chemotherapy. Proc Natl Acad Sci USA. 2009 May 12; 106(19):7957-61 and Sengupta S and Kulkarni A. Design principles for clinical efficacy of cancer nanomedicine: a look into the basics. ACS Nano. 2013 Apr. 23; 7(4):2878-82). Interestingly, this challenge can be overcome using supramolecular therapeutics, where molecular subunits self-assemble through supramolecular 'weak' interactions to form large complex structures (Lehn J M. Perspectives in Supramolecular Chemistry—From Molecular Recognition towards Molecular Information Processing and Self-Organization. Angewandte Chemie (Int. Ed.). 29, 1304-1319 (1990)). This evolution in dimensional complexity confers unique functional advantages over the molecular subunits in that they are restricted to systemic circulation, minimizing exposure to normal tissue, while homing into tumors through an EPR (enhanced permeability and retention) effect arising from leaky tumor vasculature (Maeda H, et al., Tumor vascular permeability and the EPR effect in macromolecular therapeutics: a review. J. Cont. Release. 65, 2000, 271-284). However, the current approaches of engineering supramolecular therapeutics rely on a stochastic design of molecular subunits, without much insight into their mechanisms of self-assembly or interactions with additional excipients, which pose a significant barrier to expanding the repertoire of supramolecular therapeutics.

Evaluation and optimization of supramolecular therapeutics


A microservice executing in a distributed computing system may receive a request to delete a target object stored in the distributed computing system. The microservice may identify dependent objects for the target object using information received in the request. The microservice may generate a new object that includes the data from the target object and the data from the one or more dependent objects. The new object may be stored in the distributed computing system, and the target object may be removed from the distributed computing system.

The present disclosure relates generally to the field of computer storage system, and more particularly to performing object deletion using microservices.
Computers store data using various architectures. For example, some computer systems store data using file-level storage, also referred to as file-based storage, using a filesystem. Other computer systems store data as objects in an object storage system. Object storage systems can be operated within a distributed computing environment (e.g., in a cloud-based system) where host devices store their data remotely.

Object deletion in distributed computing environments


The invention provides light emitting diode illumination source having excellent properties as an illumination source such as a flat spectral distribution in the wavelength region from green to red and a sufficient emission intensity in the red region, comprising a light emitting diode having multiple peaks with a half-value width of 20 nm or more within a range from 480 to 700 nm in a spectral distribution, wherein the minimum of the intensities of the valleys between the peaks in the wavelength range from 480 to 700 nm is 65% or more of the maximum peak intensity in the same range, and an illuminator and a backlight for a liquid crystal display using the illumination source.

Light emitting diode devices are improved remarkably in terms of light emitting efficiency and are free from mercury which is a toxic substance, whereby use thereof for illumination instead of conventional fluorescent lamps has energetically been studied in recent years. It is preferred that an illumination source emits a light having a spectral distribution close to that of sunlight. Thus, it is preferred that the illumination source has a flat spectral distribution containing components with every wavelength in the optical region. As white light source using light emitting diode devices, those obtained by a combination of three light emitting diodes for red, green, and blue emission or a combination of a light emitting diode for blue to ultraviolet emission and a photoluminescent material which absorbs the light emission, to thereby emit light from red to green, have been used. Examples of the former include so-called a three-in-one LED light source in which LEDs for red (AlInGaP), green (InGaN) and blue (InGaN) are included in one unit, and examples of the latter include a light source in which an InGaN-based blue LED and a so-called YAG fluorescent material to absorb a blue light to thereby produce a yellow fluorescence are combined.

Light-emitting diode illumination source


A colorimetry device having a light source for irradiating light to a measured object, a cover part provided with a take-out port for taking out light diffused from the measured object, and a placing part on which the measured object is placed, the measured object being put between the cover part and the placing part, so as to effect the color measurement of the measured object. A hinge mechanism is provided, so that when the measured object is placed on the placing part and the cover part is in a closed state, a measurement space dividing section for defining a measurement space between the cover part and the placing part is provided. A measuring light may also be arranged to irradiate the rear face of the measured object.

1. Field of the Invention
The present invention relates to a colorimetry device, and more particularly to a colorimetry device for performing color analysis of a leaf of a plant and the like.
2. Description of the Prior Art
With the progress of the biotechnology, there has been a demand for a colorimetry device for performing color analysis of a leaf of a plant, and the like. As examples of the colorimetry devices, there are well known in the art a device using an integrating sphere (see patent documents 1, 2), and the 0/45 geometry (an measurement geometry in which a measured object is irradiated with measuring light at a right angle (0 degree) so as to enable light diffused therefrom to be detected by a light receiving element arranged at an angle of 45 degrees relative to the irradiation light), and the like. A technique for analyzing a vegetation state of a plant is also disclosed in the patent document 3.
Patent document 1: Japanese Patent Laid-Open No. 8-114503
Patent document 2: Japanese Patent Laid-Open No. 9-218159
Patent document 3: Japanese Patent Laid-Open No. 2002-117402
In a device using the integrating sphere and a device using the 0/45 geometry disclosed in the above described patent documents 1, 2, a leaf of a plant, which is a measured object, needs to be collected and made to be fetched to such devices installed in a study room and a laboratory so as to be measured. However, there is a demand for measuring color of a leaf, etc. in a state that a plant is actually planted in the field (without the leaf being cut off from the plant).
Although the technique for analyzing vegetation state of a plant is disclosed in the patent document 3, the technique is intended for performing color analysis based on a picture taken from the sky, making it impossible to perform color measurement of individual leaves of plants at a site.

Yokohama Electric Communications & Solutions Co., Ltd.


An elastic membrane capable of precisely controlling a polishing profile in a narrow area of a wafer edge portion is disclosed. The elastic membrane includes a contact portion to be brought into contact with a substrate; a first edge circumferential wall extending upwardly from a peripheral edge of the contact portion; and a second edge circumferential wall having a horizontal portion connected to an inner circumferential surface of the first edge circumferential wall. The inner circumferential surface of the first edge circumferential wall includes an upper inner circumferential surface and a lower inner circumferential surface, both of which are perpendicular to the contact portion. The upper inner circumferential surface extends upwardly from the horizontal portion of the second edge circumferential wall, and the lower inner circumferential surface extends downwardly from the horizontal portion.

With a recent trend toward higher integration and higher density in semiconductor devices, circuit interconnects become finer and finer and the number of levels in multilayer interconnect is increasing. In the fabrication process of the multilayer interconnects with finer circuit, as the number of interconnect levels increases, film coverage (or step coverage) of step geometry is lowered in thin film formation because surface steps grow while following surface irregularities on a lower layer. Therefore, in order to fabricate the multilayer interconnects, it is necessary to improve the step coverage and planarize the surface. It is also necessary to planarize semiconductor device surfaces so that irregularity steps formed thereon fall within a depth of focus in optical lithography. This is because finer optical lithography entails shallower depth of focus.
Accordingly, the planarization of the semiconductor device surfaces is becoming more important in the fabrication process of the semiconductor devices. Chemical mechanical polishing (CMP) is the most important technique in the surface planarization. This chemical mechanical polishing is a process of polishing a wafer by bringing the wafer into sliding contact with a polishing surface of a polishing pad while supplying a polishing liquid containing abrasive grains, such as silica (SiO2), onto the polishing surface.
A polishing apparatus for performing CMP has a polishing table that supports the polishing pad thereon, and a substrate holding apparatus, which is called a top ring or a polishing bead, for holding a wafer. When the wafer is polished using such polishing apparatus, the substrate holding apparatus holds the wafer and presses it against the polishing surface of the polishing pad at a predetermined pressure, while the polishing table and the substrate holding apparatus are moved relative to each other to bring the wafer into sliding contact with the polishing surface to thereby polish a surface of the wafer.
During polishing of the wafer, if a relative pressing force applied between the wafer and the polishing surface of the polishing pad is not uniform over the entire surface of the wafer, insufficient polishing or excessive polishing would occur depending on a force applied to each portion of the wafer. Thus, in order to make the pressing force against the wafer uniform, the substrate holding apparatus has a pressure chamber defined by an elastic membrane at a lower part thereof. This pressure chamber is supplied with a fluid, such as air, to press the wafer through the elastic membrane with a fluid pressure.
However, since the above-described polishing pad has elasticity, the pressing force becomes non-uniform in an edge portion (or a peripheral portion) of the wafer during polishing of the wafer. Such non-uniform pressing force would result in so-called "rounded edge" which is excessive polishing that occurs only in the edge portion of the wafer. In order to prevent such rounded edge, a retaining ring for retaining the edge portion of the wafer is provided so as to be vertically movable relative to a top ring body (or carrier head body) and to press the polishing surface of the polishing pad around a circumferential edge of the wafer.
As the types of semiconductor devices have been increasing tremendously in recent years, there is an increasing demand for controlling a polishing profile in the wafer edge portion for each device or each CMP process (e.g., an oxide film polishing process and a metal film polishing process). One of the reasons is that each wafer has a different initial film-thickness distribution because a film-forming process, which is performed prior to the CMP process, varies depending on the type of film. Typically, a wafer is required to have a uniform film-thickness distribution over its entire surface after the CMP process. Therefore, different initial film-thickness distributions necessitate different polishing profiles.
Other reason is that types of polishing pads and polishing liquids, both of which are consumables of the polishing apparatus, are increasing greatly from a viewpoint of costs. Use of different polishing pads or different polishing liquids results in greatly different polishing profiles particularly in the wafer edge portion. In a semiconductor device fabrication, the polishing profile in the wafer edge portion can greatly affect a product yield. Therefore, it is very important to precisely control the polishing profile of the wafer edge portion, particularly in a narrow area of the wafer edge portion in a radial direction.
In order to control the polishing profile of the wafer edge portion, various elastic membranes as disclosed in Japanese laid-open patent publication No. 2013-111679 have been proposed. However, these elastic membranes are suitable for controlling the polishing profile in a relatively wide area of the wafer edge portion.

Elastic membrane, substrate holding apparatus, and polishing apparatus


An intermediate product in the fabrication of a MOSFET, including a silicon carbide wafer having a substrate and a drift layer on said substrate, said drift layer having a plurality of source regions formed adjacent an upper surface thereof; a first oxide layer on said upper surface of said drift layer; a plurality of polysilicon gates above said first oxide layer, said plurality of polysilicon gates including a first gate adjacent a first of said source regions; an oxide layer over said first source region of greater thickness than said first oxide layer; and, an oxide layer over said first gate of substantially greater thickness than said oxide layer over said first source region.

This invention relates generally to semiconductor field effect transistors, and more particularly to field effect transistors having self-aligned source contacts.
The metal oxide semiconductor field effect transistor (MOSFET) is a device used to amplify or switch electronic signals. Power MOSFETs are well known for their ability to carry large currents in the on-state while withstanding large breakdown voltages in the off-state. In such devices, current flow between source and drain regions in a semiconductor substrate is controlled by a voltage applied to a gate electrode that is separated from the semiconductor surface by an insulator, typically silicon dioxide. In an n-type enhancement MOSFET, for example, a positive bias on the gate causes a surface inversion layer—or channel—to form in a p-type region under the gate oxide and thereby creates a conductive path between source and drain. The application of a positive drain voltage then produces current flow between drain and source. Lateral and vertical power MOSFET structures in silicon have been explored over the years, the former type having the drain, gate and source terminals on the same surface of the silicon wafer, the latter type having the source and drain on opposite surfaces of the wafer. Several different types of vertical power MOSFETs have been proposed, including the double-diffused MOSFET (DMOSFET) and the trench-gate or UMOSFET. These and other power MOSFETs are described in a textbook by B. Jayant Baliga entitled Power Semiconductor Devices, PWS Publishing Co. (1996), the disclosure of, which is hereby incorporated herein by reference.
Although silicon has been the material of choice for many semiconductor applications, its fundamental electronic structure and characteristics prevent its utilization beyond certain parameters. Thus, interest in power MOSFET devices has turned from silicon to other materials, including silicon carbide. SiC power switching devices have significant advantages over silicon devices, including faster switching speed, lower specific on-resistance and thus lower power losses. SiC has a breakdown electric field that is an order of magnitude higher than that of silicon, which allows for a thinner drift region and thus a lower drift region resistance.
In power DMOSFETs, an important performance parameter is the specific on-resistance (RON,SP), which is defined as the product of the resistance when the device is in the "on", or highly conducting, state (low VDS), times the area of the device (units are Ω-cm2 or mΩ-cm2). Thus it is important to minimize both the resistance and the area of the device. For DMOSFETs in the blocking voltage regime of below about 600-1800V, a significant component of the total resistance is the resistance of the source contacts. Larger-area source contacts obviously have lower resistance, but increasing the contact area increases the total area of the device, and hence RON,SP. It is important to find ways to reduce the source contact resistance without increasing the area of the device.
In a conventional DMOSFET, the source contact is defined by photolithography, and the source contact must be separated from the edge of the gate by sufficient distance so that the source contact and gate cannot touch even under worst-case misalignment of the source contact mask. In addition, the actual functional area of the source contact is determined by the overlap of the source contact metal and the N+ implant that forms the source region in the semiconductor. Since the N+ implant is defined by a separate mask, relative misalignment of the source contact mask and the N+ implant mask can reduce the functional area of the source contact, thereby increasing source resistance and degrading performance.
It is desired to produce DMOSFETs and related devices wherein misalignments of source contact and gate are reduced or eliminated.

SIC power DMOSFET with self-aligned source contact


A PV device comprises a first mirror comprising a reflectance of higher than 50%; a second mirror interface; and an optical cavity positioned between the first mirror and the second mirror interface and comprising at least one IC stage. Each of the at least one IC stage comprises a conduction band; a valence band; a hole barrier comprising a first band gap; an absorption region coupled to the hole barrier, comprising a second band gap that is less than the first band gap, and configured to absorb photons; and an electron barrier coupled to the absorption region so that the absorption region is positioned between the hole barrier and the electron barrier. The electron barrier comprises a third band gap that is greater than the second band gap. The PV device is configured to operate at a forward bias voltage with a net photon absorption for generating an electric output.

In analogy to conventional PV cells for solar absorption, TPV cells generate electricity from versatile types of heat sources arising from concentrated sunlight, radio isotopes, combustion processes, and waste heat. One of the main differences between TPV and solar PV is the temperature of the heat source. In potential TPV applications, the heat source typically has a temperature in the range of 1,000-2,000 K, which is much lower than the surface temperature (˜5,800 K) of the sun. For a source temperature in this range, theoretical calculations based on the detailed balance theory show that the optimal bandgap Eg of TPV cells is between 0.2 and 0.4 eV. PV cells based on a multistage IC structure with type-II InAs/GaSb SL absorbers can cover this narrow bandgap region for TPV applications.

Resonant cavity enhanced (RCE) interband cascade (IC) photovoltaic (PV) device

The Board of Regents of the University of Oklahoma


Technologies are described for implementing locks to control I/O operations in a storage system. The lock implementations can have reduced resource requirements for memory and processing. Through the utilization of the technologies and concepts presented herein, an I/O process preparing to acquire a write lock can advertise its need for the lock for a pre-determined time before the lock is granted. The time period for advertisement can be specified so that all I/O operations that were initiated before the advertisement are guaranteed to have completed by the time the advertisement period is over. As such, a lock controller may only need to track outstanding I/Os that begin once the advertisement starts. This can reduce the typical requirement to maintain and process a lock structure for every unit of storage in the system at all times.

A virtualized cluster is a cluster of different storage nodes that together expose a single storage device. Input/Output operations ("I/Os") sent to the cluster are internally re-routed to read and write data to the appropriate locations. In this regard, a virtualized cluster of storage nodes can be considered analogous to collection of disks in a Redundant Array of Inexpensive Disks ("RAID") configuration, since a virtualized cluster hides the internal details of the cluster's operation from initiators and presents a unified device instead.
In a virtualized cluster, preserving data integrity often requires providing a locking functionality. With locking protection, concurrent operations are guaranteed not to interfere with one another in ways that may corrupt data within the storage system. For example, when a table-based architecture is used to map I/O operations to physical sectors on a disk, the table must be locked prior to modification so as to avoid data loss. Such data loss may occur because of writes to invalid locations, reads from invalid locations, or overwriting new data with old data. Other data loss scenarios are also possible in the absence of locking.
Generally, two kinds of locks are commonly used. These are read locks and write locks. A traditional mechanism of locking uses a lock structure for each entity that may need to be locked. Such an entity may be a file, block, sector, stripe, etc. For example, a locking entity may be each 1 Gigabyte ("GB") block on a 200 GB disk. In this example, 200 lock structures need to be created and maintained in main memory at all times. Whenever a read lock is requested on a particular gigabyte, the appropriate lock structure is accessed. If there are no outstanding write requests, the read lock is granted and an appropriate variable is incremented in the structure to signal that there is one more outstanding reader on that particular 1 GB storage entity. If there are outstanding writes, the read lock request is queued until all writes have completed.
Similarly, if a write lock is requested on a particular gigabyte, the lock structure is accessed. If there are no outstanding reads or writes, then the write lock is granted and an appropriate variable is incremented in the structure to signal that there is one outstanding write in progress on the 1 GB entity. If there are reads and writes that are outstanding when the write lock is requested, the lock request is placed in a queue, where it will wait for all preceding requests to be completed.
Unfortunately, when using this approach, a lock structure needs to be maintained for every possible entity that may need to be locked, regardless of whether or not there are lock requests on it. This typically places a substantial demand on memory and processing resources. Some implementations attempt to reduce the memory required by the lock system through the use of a collection of lock structures that are accessed through a hash queue or a similar data structure. While this may reduce memory utilization, it can increase complexity and computing requirements. Such an approach can also place a hard limit on the number of outstanding operations that may be performed in a given storage system and thus does not scale well.
It is with respect to these considerations and others that the disclosure made herein is presented.

Implementing I/O locks in storage systems with reduced memory and performance costs


A laser module includes a semiconductor laser that emits laser light within a wavelength range of 350 to 450 nm, and hermetically sealing members, in which the semiconductor is sealed. The amount of organic adhesive utilized within the volume of the sealed sealing members is 1.0 g/ml or less, thereby causing a saturation concentration of outgas components generated from the adhesive to be less than 1000 ppm following a deaerating process. At least one optical component (e.g., a collimating lens) is adhesively fixed to a fixing member (e.g., a collimating lens holder) by inserting an adhesive composition including an alicyclic epoxy compound, a compound having an oxytanyl group, and a catalytic amount of an onium salt photoreaction initiator therebetween at an adhesive thickness of 0.05 μm or greater and 5 μm or less. Thereafter, the adhesive composition is cured by an activated energy beam to fix the optical component to the fixing member.

1. Field of the Invention
The present invention relates to a laser module and a method of manufacture therefor. Particularly, the present invention relates to a laser module in which constituent parts, including a semiconductor laser that emits light within a wavelength range of 350 to 450 nm, are hermetically sealed, and a method of manufacture therefor.
2. Description of the Related Art
Conventional optical modules that irradiate or generate ultraviolet rays having wavelengths of 400 nm or less are known. These optical modules have a problem in that optical loss occurs in the optical components that constitute the optical modules, due to the ultraviolet rays irradiated or generated thereby. The optical loss is thought to occur due to water and oil within the atmosphere being decomposed by the ultraviolet rays, then accumulating on the surfaces of the optical components.
U.S. Pat. No. 6,404,786 discloses an ultraviolet ray irradiating optical system that prevents decreases in output of ultraviolet laser light. The ultraviolet ray irradiating optical system seals optical components within an atmosphere comprising nitrogen at a purity of 99.9% or greater, dried air at a purity of 99.9% or greater, a gas containing water at 0.1% or less, or a gas containing hydrocarbons at 0.1% or less. Thereby, the accumulation of decomposed matter on the optical components, and therefore, decreases in output of ultraviolet light, is prevented.
The present inventors have analyzed the sealed atmospheres of modules that include semiconductor lasers that emit light within a wavelength range of 350 to 450 nm. As a result, it has been found that various compounds are included in the sealed atmospheres, as will be described below. In addition, it has been found that specific organic gas components, generated by solid organic matter which is attached to optical components and mechanical components employed in the modules, are the main causes of deterioration in laser properties.
In conventional laser modules, organic adhesives, such as that disclosed in Japanese Unexamined Patent Publication No. 2001-177166 and epoxy based adhesives such as NOA61 by Noland Co. are employed to fix laser elements and optical systems. Solid organic matter, which is attached to the optical and mechanical components within the modules are introduced from the module production atmosphere. Therefore, organic residue is present, even if cleansing is performed. Organic gas is generated from these solid organic materials, and a certain amount of the gas (so-called "outgas") fills the interior of the sealed module. Further, there are cases in which the outgas contains compounds that include silicon atoms, phosphor atoms, sulfur atoms and the like, depending on the type of organic matter.
Solvents such as isopropyl alcohol (molecular weight: 60.10, boiling point: 82.4° C.) and acetone (molecular weight: 58.08, boiling point: 56.1 to 56.5° C.) are utilized to cleanse parts that constitute the interior of the modules in the sealing step. Organic gas components having low molecular weights and low boiling points are generated by the solvents, and introduced as impurities into the sealing gas, such as dried nitrogen and dried air.
For this reason, organic gas components (hereinafter referred to as "outgas components"), which are generated from the solid organic materials, and organic gas components (hereinafter referred to as "impurity components"), which are introduced during the sealing step, are both present within the sealed atmosphere. As a result of analysis by gas chromatography, illustrated in FIG. 5 and FIG. 6, it can be seen that the distributions of molecular weights and boiling points clearly differ between the two types of components.
FIG. 5 is a graph, in which the volumes of the impurity components and the outgas components are plotted against the molecular weights thereof. The total amount of each of the components, as detected by a GC-MASS (Gas Chromatography/Mass Spectrometer), is designated as 100% in the graph of FIG. 5. FIG. 6 is a graph, in which the volumes of the impurity components and the outgas components are plotted against the boiling points thereof. The total amount of each of the components, as detected by a GC-MASS, is designated as 100% in the graph of FIG. 6 as well.
That is, the molecular weights of the outgas components are distributed within a range greater than or equal to 70, whereas the molecular weights of the impurity components are distributed within a range less than 70. In addition, the boiling points of the outgas components are distributed within a range greater than or equal to 70° C., whereas the boiling points of the impurity components are distributed within a range less than 100° C.
Next, the relationships between the concentration of the two types of organic gases in the sealed atmosphere and the deterioration rates of laser modules were investigated. Note that the laser module employed in the investigation is of the same construction as those which are to be described later, with reference to FIG. 1 through FIG. 4, except for the fact that organic adhesives were utilized therein. The results of the investigation are illustrated in FIG. 7. The deterioration rates are indicated by the amount of increased drive current necessary per hour to drive all elements of the laser modules in the case that each light emitting point thereof are driven at 100 mW.
In the graph of FIG. 7, plotted points ♦ indicate the relationship between the concentration of outgas components and the deterioration rate of the module. Plotted points □ indicate the relationship between the concentration of impurity components and the deterioration rate of the module. The concentrations of the impurity components were adjusted by artificially manipulating the concentration of acetone within the sealed atmosphere.
As can be seen from FIG. 7, the rate of increase in drive current rises drastically when the concentration of the outgas components becomes 1000 ppm or greater, conspicuously accelerating deterioration of the module. The cause of the accelerated deterioration is assumed to be the accumulation of solid matter, generated by photolysis of the outgas components, on light emitting portions and optical components within the module.
On the other hand, no accumulation of solid matter on the light emitting portions or the optical components within the module is observed, even when the concentration of the impurity components becomes 1000 ppm or greater. This is because the impurity components do not solidify at room temperature even if they are photolyzed. Note that even if the impurity component is changed from acetone to isopropyl alcohol, no accumulation of solid matter is observed.

Laser module and method of manufacture thereof


A system, circuit, and method are presented for adjusting a prefetch rate of a prefetch unit from a first rate to a second rate by determining a probability factor associated with a branch instruction. The circuit and method may determine the probability factor based on a type of disparity associated with the branch instruction. The circuit and method may further be adapted to calculate the second rate based on the probability factor. The ability to adjust the prefetch rate of a prefetch unit advantageously decreases the number of memory transactions, thereby decreasing the power consumption of a processing unit.

1. Field of the Invention
This invention relates to microprocessor design, and more particularly to a system, a circuit, and a method for adjusting prefetching rates by determining a probability factor for a type of branch instruction when the branch instruction is encountered in a set of instructions.
2. Description of the Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
Over the years, the use of microprocessors has become increasingly widespread in a variety of applications. Today, microprocessors may be found not only in computers, but also in a vast array of other products such as VCR's, microwave ovens, and automobiles. In some applications, such as microwave ovens, low cost may be the driving factor in the implementation of the microprocessor. On the other hand, other applications may demand the highest performance obtainable. For example, modern telecommunication systems may require very high speed processing of multiple signals representing voice, video, data, etc. Processing of these signals, which have been densely combined to maximize the use of available communication channels, may be rather complex and time consuming. With an increase in consumer demand for wireless communication devices, such real time signal processing requires not only high performance but also demands low cost. To meet the demands of emerging technologies, designers must constantly strive to increase microprocessor performance while maximizing efficiency and minimizing cost.
With respect to performance, greater overall microprocessor speed may be achieved by improving the speed of devices within the microprocessor's circuits as well as architectural development that allow for optimal microprocessor performance and operations. As stated above, microprocessor speed may be extremely important in a variety of applications. As such, designers have evolved a number of speed enhancing techniques and architectural features. Among these techniques and features may be the instruction pipeline, the use of a branch prediction scheme, and the concept of prefetching.
A pipeline consists of a sequence of stages through which instructions pass as they are executed. In a typical microprocessor, each instruction comprises an operator and one or more operands. Thus, execution of an instruction is actually a process requiring a plurality of steps. In a pipelined microprocessor, partial processing of an instruction may be performed at each stage of the pipeline. Likewise, partial processing may be performed concurrently on multiple instructions in all stages of the pipeline. In this manner, instructions advance through the pipeline in assembly line fashion to emerge from the pipeline at a rate of one instruction every clock cycle.
The advantage of the pipeline generally lies in performing each of the steps required in a simultaneous manner. To operate efficiently, however, a pipeline must remain full. For example, the pipeline scheme tends to work best on linear code, where instructions are consecutively fetched and processed. However, if the flow of instructions in a pipeline is disrupted, clock cycles may be wasted while the instructions within the pipeline are prevented from proceeding to the next processing step. In particular, most programs executed by a processor contain at least one non-linear code sequence. Such sequences may include instructions, such as branches, that may cause the processing of instructions (i.e., the program flow) to flow out-of-order and slow down the pipeline. Therefore, it would be advantageous to devise a scheme in which to overcome the effects of executing non-linear code sequences (such as branch instructions) within a pipeline.
Branch instructions may be classified into several different types. A "branch instruction," as described herein, is an instruction that typically diverts program flow from a current instruction to a target address within or outside of the current instruction set. A first type of classification is the direction in which the program flow is diverted by the branch instruction. If program flow is diverted to a target address, which is greater than a source address containing the branch instruction, the branch instruction may be referred to as a "forward branch instruction." Conversely, if the target address is less than the source address, the branch instruction may be referred to as a "backward branch instruction."
A second type of classification is whether a target address is provided along with the branch instruction. In the case of an unconditional branch instruction, the target address is provided and there is no ambiguity as to where the microprocessor should go to fetch the next set of instructions (pointed to by the target address). As such, unconditional branch instructions do not impede performance, since the microprocessor may continue to read instructions from the target address and process the instructions within the pipeline. In some cases, the unconditional branch may be further classified by determining the direction in which program flow is diverted by the branch instruction.
In the case of a conditional branch instruction, however, the target address is not provided and needs to be generated. Unfortunately, the generation of a target address may result in a time penalty, as the generation may stall the pipeline and not allow for other instructions to be processed. Such a time penalty may hinder the performance of the pipeline, and consequentially, the overall performance of the microprocessor.
In an effort to avoid the time penalties associated with conditional branch instructions, a branch prediction scheme may be used to determine the most likely target address. If the prediction is accurate, the microprocessor proceeds at full speed and no performance penalties are assessed. However, if the prediction is inaccurate, the microprocessor must cancel the instructions being executed and take another branch to find the right target address. The process of predicting a target address may result in unnecessary execution of instructions, which the microprocessor may not need; therefore, resulting in an increase of power consumption and a decrease in microprocessor performance. Therefore, a need remains for a more complex prediction scheme.
One example of a more complex prediction scheme is to determine the target address dynamically. For example, a microprocessor can maintain a history table, implemented in hardware, that records the results of previous conditional branch instructions. The results of the previous conditional branch instructions (i.e. the target address) may help the microprocessor to predict the outcome of a conditional branch instruction encountered within a set of instructions. In the dynamic branch prediction scheme, the working assumption is that similar branch instructions may have the same target address. However, one disadvantage of the dynamic branch prediction scheme is that it requires specialized and expensive hardware.
Another advancement in microprocessor technology relates to the concept of prefetching information, where such information may either be data or instructions. FIG. 1, for example, illustrates one embodiment of the prefetch concept. As illustrated in FIG. 1, prefetch unit 106 may request a block of information by transmitting one or more instruction addresses 110, via memory bus 108, to memory controller 116 of memory device 114. In some cases, memory device 114 may be an external memory device having a relatively high order in the memory hierarchy. Memory controller 116 may retrieve the block of information from memory space 118 and may transmit retrieved instructions 112, via memory bus 108, to processing unit 102. A "processing unit," as described herein, is typically a microprocessor, but may alternatively encompass any circuitry adapted to execute instructions. Subsequently, instructions 112 may be written to a storage device lower in the memory hierarchy, such as a lower order level of cache memory device 104. Prefetching may allow the time spent retrieving the block of information to occur concurrently with other actions of processing unit 102. Thus, when the processing unit 102 requests the prefetched information, there may be little or no delay in having to fetch the information from a nearby cache.
As such, prefetching involves a speculative retrieval of information, where the information may be retrieved from a higher-level memory system, such as external memory device 114, and placed into a lower level memory system, such as cache memory device 104. Such a retrieval may be executed under the expectation that the retrieved information may be needed by the processing unit for an anticipated event at some point after the next successive clock cycle.
In some cases, processing unit 102 may include an internal, or on-chip, cache memory device 104, as illustrated in FIG. 1. An internal cache, often called a primary cache, may be built into the circuitry of the processing unit. Processing unit 102 may further include internal prefetch unit 106, which may be coupled to the internal cache memory device via an internal bus. In other cases, however, cache memory device 104 and prefetch unit 106 may be external devices coupled to processing unit 102 via an external bus (not shown). The advantages and disadvantages of including internal versus external devices are well known in the art; thus, only internal devices are illustrated in FIG. 1 for the purpose of simplicity.
Several types of prefetching are known in the art. The most common example of a prefetch may be performed in response to a load operation. A load may occur when the processing unit requests specific information to be retrieved, so that the processing unit may use the retrieved information. In another example, a store operation may prefetch a block of data, so that a portion of the block may be overwritten with current information.
Another form of prefetching may occur for certain instructions, such as a branch instruction. For example, branch instructions may involve a prefetch unit to stop fetching instructions sequentially, and to divert fetching to the instructions within a target address associated with the branch instruction. As noted above, the branch instructions may be unconditional (i.e., where a target address is provided) or conditional (i.e., where a target address is not provided). In either case, the processing unit may need the instructions associated with the target address before the processing unit may continue to fetch the remaining set of instructions sequentially. Therefore, a prefetch operation may be performed so that the instructions of the target address are more readily accessible for processing after the branch instruction is fetched. By prefetching instructions during a time in which the processing unit is occupied with other processing, the speed of the processing unit may be increased by ensuring the availability of subsequent instructions before the processing unit requests the instructions.
Though prefetching, according to the manners described above, provides the benefit of improved microprocessor performance, the present inventor has recognized various drawbacks resulting from techniques, which attempt to use branch prediction and prefetching schemes in a pipelined system. The discussion of such drawbacks is presented below along with various embodiments that reduce the effects of such drawbacks and improve upon the prior art.

System, circuit, and method for adjusting the prefetch instruction rate of a prefetch unit


A lubricating arrangement for an automatic power transmission has a lubricant circuit for communication between a pressurized fluid source and a component of the automatic power transmission to be lubricated. A flow restriction means is disposed within the lubricating circuit. The flow restriction means incorporated in the lubricating arrangement introduces a twin choke construction for providing sufficient magnitude of flow restriction for the lubricating fluid supplied from the pressurized fluid source for preventing excess fluid from flowing through the lubricating circuit which causes a drop of supply pressure and/or flow rate in the pressurized fluid source and blocking of the fluid flow path due to accumulation of foreign matters, such as dust, dirt and so forth. The flow restriction means comprises a first choke and a second choke arranged in tandem fashion across a fluid reservoir provided therebetween.

1. Field of the Invention
The present invention relates generally to an automatic power transmission for an automative power train. More specifically, the invention relates to a lubricant circulating arrangement for an automatic power transmission for circulating lubricating fluid for lubricating components of the automatic power transmission.
2. Description of the Background Art
In general, an automatic power transmission includes a lubricating circuit for circulating pressurized lubricating fluid therethrough for lubricating necessary components. For this purpose, lubricating fluid flowing back via a pressure relief valve or from an oil cooler, is recirculated, as illustrated in Japanese Patent First Publication No. 62-62047, for example. Separately from the above, pressurized lubricant fluid from a pressurized fluid source can be directly used for lubrication. In the latter case, in order to prevent an excess amount of lubricating fluid from flowing through a lubrication circuit, a flow restriction device is provided therein. As a flow restriction device, a choke is generally used for a high flow restriction capacity.
However, when the choke is used in the lubricating circuit, an excess amount of lubricating fluid can flow into the lubricating circuit. Particularly, when the lubricating fluid is at a high temperature and thus has a low viscosity, such tendency is increased. As a result, lack of lubricating fluid pressure or flow rate can be caused in the pressurized fluid source. On the other hand, when excess amount of lubricating fluid is supplied in the lubricating circuit, frictional resistance due to viscosity of the lubricating fluid is increased. Reduction of a possibility of excess flow of the pressurized lubricating fluid can be obtained by utilizing smaller path area choke. However, reduction of the path area of the choke is practically difficult because of difficulty in machining. Furthermore, even when a smaller path area choke is technically possible to manufacture, such smaller path area may increase a possibility of blocking due to foreign matters, such as dust, dirt or so forth, contained in the lubricating fluid.

Lubrication arrangement for automatic power transmission