A hard material-coated wafer that having a distortable substrate and a hard material film deposited thereon by a CVD method is provided. The substrate is substantially flat while in a free-standing state. However, deposition of the hard material film having a Vickers hardness of more than Hv3000 on the substrate causes the substrate to distort into a generally convex-shape. Specifically, the wafer is distorted to the film side with a distortion height H of -150 .mu.m to -2 .mu.m. The resulting wafer can have a total thickness that ranges from 0.1 mm to 2.1 mm; and a diameter that is bigger than 25 mm. Moreover, more than 50% of the film can be polished to a roughness less than Rmax 50 nm and Ra 20 nm.

This application claims the priority of Japanese Patent Application No. 165914/1994 filed Jun. 24, 1994 and No. 133773/1994 filed May 23. The above-mentioned hard materials are favored with excellent physical and chemical properties. However, these materials have not been utilized in various fields for practical uses, since fabrication of wide and inexpensive plates or wafers of the materials has not been accomplished to date. Since the hard materials are provided with several physical and chemical advantages, actual applications of the hard materials to various objects are earnestly desired and have been attempted by applying the technology of silicon semiconductor devices to the hard materials. The object has been produce wide plates (or wafers) of the hard materials.
Technologies have already ripened into a definite level capable of producing films of diamond, c-BN (cubic boron nitride) or diamond-like carbon by vapor phase deposition methods. The vapor phase deposition method makes a hard-material of the material by supplying a material gas to a pertinent substrate heated at a suitable temperature, letting the gas react with the hot substrate and depositing a film of the hard material on the substrate in vapor phase. A film of diamond or c-BN is produced by introducing a material gas including hydrogen gas and hydrocarbon gas, or another material gas including hydrogen gas, boron-containing gas and nitrogen-containing gas in the reaction chamber, supplying the material gas on the heated substrate, synthesizing diamond or c-BN by chemical reaction and depositing the synthesized material as a film on the substrate.
There are some methods for exciting the material gas, including, for example, a hot filament CVD method, a microwave plasma CVD method, a radio wave plasma CVD method or a DC plasma jet CVD method. Some methods are capable of making a wide film of hard materials on a substrate. However, the speed of synthesis is so slow that the methods cannot easily make a thick film at present. In accordance with these methods, a long for deposition is needed to make a considerably thick film on the substrate.
Nevertheless, there are still no pure wafers consisting only of a hard material free from a substrate. In other words, at present, there are no diamond wafers or c-BN wafers in their true meanings, because prior technology has not been able to produce a pure diamond wafer or a pure c-BN wafer.
The application of the hard materials, i.e., diamond, c-BN or diamond-like carbon to electronics technology requires wide area wafers of the hard materials. While surface acoustic wave devices on very small diamond substrates have been produced, larger substrates have not.
However the fact that a new device was fabricated on a quite small diamond substrate, e.g., from 5 mm square to 10 mm square, was rather insignificant from an industrial standpoint, even if the device itself exhibited an excellent performance. Since the small substrate allowed only a small number of devices to be made on it, the productivity was poor. The devices made on the small substrate had little practical significance due to the poor productivity.
What brought about the success of silicon semiconductor devices is the ability to treat a wide area Si wafer by the same wafer processes at the same time and make several equivalent devices in a short time. It has been believed that the same would perhaps hold for the hard materials. If diamond, c-BN or diamond-like carbon is to obtain a practical importance as substrates, the material should be formed into wide, round thin plates (wafers). The advent of the wide wafers will enable manufacturers to apply the technology which has been developed by the silicon semiconductor industry to the hard materials.
In the case of silicon, big single crystals with a wide section can easily be grown by Czochralski methods, and mainly 8-inch wafers are produced for making devices at present. 12-inch wafers also can be produced now for silicon.
However, a diamond or c-BN single crystal cannot be grown by the conventional methods, e.g., Czochralski methods, at present. Thus, it is still not promising to produce homogeneous wafers consisting only of a single material of the hard materials, unlike silicon (Si) or gallium arsenide (GaAs). In fact, it is impossible to make wide, homogeneous diamond wafers or c-BN wafers by conventional methods.
This invention gives up the attempt of making a homogeneous wide wafer consisting only of a single material of diamond, c-BN or diamond-like carbon. Instead of starting from the premise of making a homogeneous bulk single crystal, this invention employs a substrate of a different material than the film for making complex wafers containing a non-hard material substrate and hard material films formed on the substrate. The present invention intends to make a hard material film on a commonplace material, e.g., Si, GaAs or so, which can easily be produced or obtained. The complex wafter having a substrate plus a hard material film provides the possibility of making a wide hard material wafer by employing a wide base wafer as a substrate. The base wafer of non-hard material plays the role of the base mount on which the hard material film is deposited. The film on the base wafer is the principal portion of the wafer which will contribute to the production of semiconductor devices or SAWs.
A homogeneous wafer consisting only of pure diamond or c-BN, made by forming a very thick film on the substrate and eliminating the substrate by etching, is still unpractical, because it takes very long time and very much material to deposit such a thick layer. Further, a large inner stress would break the film when the substrate is etched away. Therefore, the production of a freestanding film remains an unpractical object.
This invention is directed to the complex, non-homogeneous wafer having a non-hard material wafer as the substrate of the wafer. The substrate of the wafer does not cause a problem in application, since almost all the devices make use only of the surface of the wafer. This invention employs a non-homogeneous, complex wafer having a Si or GaAs surface on the bottom and a diamond or c-BN surface on the top. The adoption of the complex wafer can overcome the difficulty of making a wide bulk single crystal of the hard materials, because complex wafers can be made by the thin film-formation technology. The term "hard material wafer" in the present invention is quite different from the ordinary wafers produced by slicing an ingot of bulk single crystal. The wafers proposed by the present invention are different from the silicon wafers or the gallium arsenide wafers in their production methods.
This invention satisfies another requirement of the hard material wafers. As mentioned before, it has been attempted to make surface acoustic wave devices on a diamond substrate of 3 mm square or 5 mm square. Such attempts may have a certain significance from the standpoint of technological research. However, such a small substrate is useless for making devices on the industrial scale. The industrial production requires circularity, constant thickness, flatness, unbentness, and large diameter for substrate wafers.
With regard to the area of a wafer, the application to electronics devices demands that the materials have wide circular or rectangular wafers of at least an inch diameter (25 mm). Wafers of a diameter less than an inch cannot be treated by the wafer processes which have been developed by the silicon semiconductor industries. Furthermore, a two-inch diameter wafer is better than a one-inch diameter wafer. The three-inch diameter wafer is more preferable to the two-inch diameter wafer from the standpoint of industrial production, which desires large, flat and smooth wafers.
Fortunately, progress in the technology of vapor phase synthesis enables the production of a considerably broad film of diamond or c-BN on a suitable substrate. However, the blunt possibility of forming wide thin films does not increase the probability of making wide wafers suitable for the wafer process. Wafers having rugged surfaces are useless. Namely, a smooth surface is one of the requisites for wafers. Flatness or unbentness is another matter of significance. The hard material wafer must be a mirror wafer without bending or bow. Here flatness means a long range regularity of a surface. Bending or bow indicates a long range irregularity of a surface. Smoothness is defined as a short range regularity, and ruggedness or raggedness signifies a short range irregularity with may convex or concave imperfections on a surface.
The wafer must be mirror-smooth and flat in order to make devices on the wafer by photolithography. If the wafer is not flat or not mirror-smooth, exact patterns cannot be drawn on the wafer by an optical means.
Films which have been made by the vapor phase deposition have a lot of micro convexes or concaves on their surfaces. Wavy morphology is sometimes formed on the surface of the film. In other cases, granular convexes distribute on the surface of the film. In general, the films which have been made by vapor phase deposition cannot be used as a substrate wafer due to the ruggedness of the surface.
If a wafer suffers from a rugged surface, the wafer could be converted into a mirror wafer by eliminating the ruggedness out of the surface with a polishing apparatus. The polishing would remove the convexes, concaves or wavy morphology out of the surface and would make a flat, smooth wafer. Actually in the case of silicon wafers, mirror wafers are made by slicing an Si ingot into a lot of as-cut wafers, etching the as-cut wafers and polishing the etched wafers by a polishing apparatus. Can the same treatment make flat, smooth hard-material coated wafers? No, the same treatment does not make smooth wafers. The polishing of the hard materials has presented unexpected problems.
Since the convex or concave imperfection would be removed from the surface of the hardmaterial coated wafer by polishing, the starting film must have a sufficient thickness to allow for a margin of polishing. It takes a long time and much material to produce a thick film of the hard materials. This has obvious economic disadvantages.
Another big problem is the difficulty of polishing of the hard materials. The hard-material film can be to difficult to polish. Diamond and c-BN are the hardest materials which are far more difficult to polish than silicon wafers. Diamond or c-BN is polished by diamond powder as an abrasive. The polishing is sometimes called the "together-polishing", because diamond powder shaves diamond by reducing itself during polishing. Lengthy together-polishing can polish surfaces of diamond crystals. The problem of hardness thus can be solved by practicing together-polishing.
However, there is still a more difficult problem. The thermal expansion coefficients are different between the hard material-coated film and the non-hard material substrate. The complex wafer will have a large inner stress due to the difference between the thermal expansion coefficients of the film and substrate. After the complex wafer is produced in a reaction chamber, and is cooled, the complex wafer will bend due to the release of the inner stress when it is removed from of the reaction chamber.
In one case, the complex wafer bends convexly to the side of the film. In another case, the complex wafer bends concavely to the side of the substrate. In yet another case, the wafer stays flat as a whole. The directions of bending are now defined with regard to the side of the film. The wafer bending is classified by the directions of bending. The bending which defines a convex shape on the surface of the film is called "convex-distortion". The bending which defines a concave shape on the surface of the film is called "concave-distortion". The problem of the distortion is still latent in the case of small plates. No distortion occurs for small complex plates of, e.g., 3 mm square or 5 mm square.
The present invention aims at making complex wafers of 1 inch diameter, 2 inch diameter or still bigger diameters. Large amounts of bending appears in the complex wafer due to the difference of the thermal expansion coefficients or the inner stress of the complex film itself. The broadness of the wafer induces a large distortion. The problem of the distortion is quite serious for the hard material coating wafers. In the case of silicon, large, flat mirror wafers can easily be produced since Si wafers are homogeneous without the complexity of a multilayer structure. However, the distortion causes a significant problem due to the non-homogeneity and complexity in the case of hard material-coated wafers.
The distortion of wafers causes many difficulties. The distortion prevents the photolithograpy from transcribing mask patterns exactly on the resist coating of the wafer. This is a big drawback in itself. To begin with, the distortion of a wafer is a large hindrance for polishing the wafer. A conventional polishing machine cannot polish a bending wafer at all. Polishing converts a rugged wafer into a mirror wafer. If polishing is impossible, no mirror wafer can be produced. If a wafer is not mirror-polished, the photolithography is entirely impotent. Thus, it is impossible to make devices on a rugged wafer. Polishing is a fundamental requirement for wafers.
Diamond is the hardest material; there is no harder material than diamond. Thus, diamond is polished by diamond. Namely, diamond plates are polished by an apparatus using diamond powder.
There are two methods for polishing diamond plates. One method adopts free polishing powder. The other adopts fixed polishing powder. Skife polishing which has been known as a way of the former polishing method uses an iron polishing plate and diamond free polishing powder. The method polishes a diamond plate by the steps of gluing the diamond plate to a holder, pushing the holder on a rotary polishing turn-table (round whetstone), supplying polishing liquid containing diamond powder, revolving the turn-table, rotating the holder and whetting the object diamond plate by the physical action of diamond granules. The method has a drawback of producing a large amount of diamond powder waste since it depends on free diamond powder in polishing. The consumption of diamond powder raises the cost of whetting. Another fault of the method is the slow whetting speed and the poor accuracy of finishing.
Another (fixed powder) method grinds diamond plates with a whetstone on which diamond powder is fixed. There are several kinds of diamond whetstones, which are classified by the manner of fixing diamond granules on the whetstones. The whetstone on which diamond powder is fixed by phenol resin, polyimide resin or so is called a resin-bonded whetstone. Another whetstone on which diamond powder is fixed by bronze, cobalt, tungsten, iron, nickel and so forth is called a metal-bonded whetstone. The whetstone on which diamond powder is fixed by plating of nickel etc. is called an electrodeposition whetstone. These whetstones using fixed diamond powder have an advantage of avoiding the waste of diamond granules.
The fixed granule method polishes the surface of diamond plates by the steps of sticking a diamond plate on a holder, pushing the holder on a rotary whetstone table, revolving the whetstone table, rotating also the holder around own axis and polishing the surface of the diamond by the physical interaction with the fixed diamond granules.
All the methods grind diamond plates or diamond films by the physical contact with the diamond granules. The methods depend on the physical action of the diamond powder. Because of the heightened physical interaction, these methods require imposing a heavy load on the polishing faces. The high pressure of the load enables the diamond powder to scuff, scratch, or scrape the surface of the object diamond plates or films. The heavy load also defaces the diamond granules either being fixed on the whetstone or flowing in the liquid. Without the heavy load, the object diamond can be ground no more, slipping in vain on the whetstone.
It has been suggested to develop a polishing method which dispenses with the heavy load. Japanese Patent Laying Open No. 2-26900 (26900/90) proposes a thermochemical method which polishes diamond by chemical reaction by bringing diamond into contact with a heated flat metal table under the oxidizing atmosphere at a high temperature. This chemical method uses no diamond powder.
FIG. 16 and FIG. 17 demonstrate conventional polishing apparatuses for general purposes. The object plate to be polished is hereinafter called a wafer now.
In FIG. 16, a polishing turn table (1) (rotary grindstone) is a diamond whetstone on which diamond powder is fixed by some means. An object wafer (2) is fixed on the bottom of a holder (3). The holder (3) is fixed to a shaft (4). The surface of the holder (3) is parallel with the face of the polishing turn table (1). An air-pressure cylinder or an oil pressure cylinder (5) is mounted on the top of the shaft (4) for pressing the holder (3) via the shaft (4) to the turn table (1). When the apparatus polishes a soft material, the load is unnecessary. But a heavy load is essential for grinding hard materials, i.e., diamond, c-BN or diamond-like carbon. An arm (6) supports the cylinder (5) and the shaft (4). The arm (6) can displace in a radial direction. The region of the whetstone table (1) which is in contact with the object moves in the radial direction for equalizing the defacement of the turn-table (1). The object wafer contacts the central part and the peripheral part of the polishing turn-table (1). The turn-table is worn out uniformly, maintaining the flatness of its face. The flatness of the turn-table ensures the long life time of the polishing table. In the apparatus of FIG. 16, the holder (3) does not rotate. The hard-material film of the wafer is whetted by the interaction between the revolving turn-table and the film.
When a hard-material having a Vickers hardness higher than Hv3000 is polished, the following problems arise.
One problem is the non-uniform polishing which is originated from the imparallelism of the wafer with the polishing table. The wafer must be kept rigorously in parallel with the grinding table in order to polish the whole surface uniformly. However, it is difficult to maintain the wafer in parallel with the polishing table. When the face of the wafer slants, the hard-material film is polished slantingly. Some parts of the film are thinner than other parts, which may be left unpolished. Therefore, the thickness of the film is not uniform in the whole plane. Such an uneven whetting is undesirable. It is important to obtain a uniformly thick film. In the case of a thin film, if the slanting polishing arises, the polishing starts from a corner which comes in contact with the polishing table at first, and then the other parts are later polished. Before some parts are polished at all, the base wafer is revealed under the film. Such a wafer is useless as a hard-material coated wafer. This problem is called a slanting polishing problem.
The other problem is originated when the wafer has an inherent wavy distortion, a concave distortion or a convex distortion. In the case of soft silicon, the convexes or concaves are entirely eliminated where the object is polished by a thickness larger than the heights of the convexes or concaves. However, such an easy solution does not apply to the hard-material coated wafers. The inherent distortion of wafers causes a serious problem in the case of hard-materials. Polishing diamond is far more difficult than silicon. The speed of polishing is far slower. In an initial stage of polishing, the turn-table comes into localized contact with the most prominent part of the film. The area of the contact is small enough, which allows polishing proceed in a pertinent speed. As the polishing operation progresses, the initially-concave parts come into contact with the polishing table. The increase in contact area reduces the pressure per unit area. Thus, the speed of polishing decreases. Eventually, the polishing ceases substantially. An addition to the load is needed to restore the progress of polishing.
However, the apparatus cannot impose an indefinitely heavy load upon the holder. The amount of the load is restricted within a range that will not cause the wafer to break. The limitation of the load causes a shortage of the pressure per unit area, which leaves unpolished parts or insufficiently-polished parts on the wafer. This is a defect of the static polishing apparatus shown in FIG. 16 which does not rotate the holder.
FIG. 17 indicates a perspective view of another prior apparatus which rotates the holder around its axis. The polishing turn-table (1) is a diamond whetstone. A wafer (2) is fixed to the bottom of a holder (3). The holder (3) is fixed to the shaft(4). Bearings sustain the shaft (4) vertical with respect to an arm (6), allowing the shaft (4) to rotate. An oil pressure cylinder or an air pressure cylinder (5) is mounted on the arm (6) above the shaft (4) for applying a load upon the holder (3) via the shaft (4). The arm (6) holds a motor (7) for driving the shaft (4). The rotation torque is transmitted from the motor (7) via a pulley, a belt and a pulley to the shaft (4). The torque rotates the holder (3) and the wafer (2). The wafer is polished by both the revolution of the turn-table (1) and the rotation of the holder (3).
This apparatus positively rotates the shaft (4) by a motor. However, a simpler example can be built by eliminating the motor and holding the shaft rotatably with bearings. Without the positive driving torque, the holder (3) rotates by itself around its own axis. Namely the line velocities of the contact regions are different between the central region and the peripheral region of the turn-table. The difference of the line velocities rotates the holder (3) in a certain direction at a moderate speed. This is a passive rotation. This rotation also is called "accompanying rotation". The wafer (2) rotates on the turn-table whether the motor positively drives the shaft or the speed difference drives the wafer passively.
The rotation of the wafer equalizes the contact of the wafer on the turn-table. In both cases, the rotation of the wafer can solve the problem of the slanting polishing which is caused by an inclination of the shaft with respect to a normal of the turn-table.
However, the rotation of the wafer cannot solve the other problem of the unpolished parts being left on the wavy distorted, convex-distorted or concave-distorted wafer. If the distorted wafer were polished to the bottom of the convexes, a flat wafer could be obtained. However, the amount of polishing cannot be increased so much in the case of hard materials. An application of a heavy load is restricted in order to avoid breakage of the wafer. The limitation on the load compels the apparatus to terminate polishing far before the wafer is completely polished.
The Inventors found that the prior polishing apparatus cannot polish a hard-material coated wafer with a distortion of a height more than 50 .mu.m perfectly, i.e., to the bottom of the convexes. Instead, wide unpolished parts are left on the wafer. Even for wafers of a distortion height between 20 .mu.m and 40 .mu.m, conventional polishing techniques are likely to leave some parts unpolished or imperfectly polished.
For facilitating an understanding of these problems, three kinds of imperfection of polishing are now clarified by referring to FIG. 21, FIG. 22 and FIG. 23. In FIG. 21 to FIG. 23, left figures indicate sectional views of complex wafers having a base wafer (substrate), and a rugged hard-material film, and right figures show the plan views after polishing. FIG. 21 denotes the case of an even wafer. The height of distortion is less than 5 .mu.m. Unpolished parts remain isolated at random within a circle distanced by 5 .mu.m to 10 .mu.m from the circumference. FIG. 22 indicates the case of a concave-distorted wafer. The height of distortion is, for example, 30 .mu.m. A continual, annular part is left unpolished in the middle region within an annular region extending between 5 .mu.m and 10 .mu.m from the circumference. Namely, the periphery and the central part are polished. FIG. 23 denotes the case of a convex-distorted wafer. The height of distortion is, for example, -20 .mu.m. A continual circumference part is left unwhetted. The polishing starts from the central part, develops to the middle region and then pervades to the periphery. This pattern is simpler and more promising than the other two displayed in FIGS. 21 and 22. These are the types of imperfections of polishing. The inclination polishing explained before by FIG. 16 is not shown here, because it appears in the case of a static holder and it is solved by adopting a rotary holder.
The applicability of the conventional wafer process is indispensable for the exploitation of hard-material coated complex wafers, that is, diamond-coated wafers, diamond-like carbon coated wafers or c-BN coated wafers to the fields of electronics, optics or optoelectronics. For example, the technology of photolithography must be able to be applied to the complex wafers for fine processing. Photolithography requires flatness of the object wafers. The various wafer processes have been highly developed in the silicon semiconductor technology. The hard-material coated complex wafers must cope with the conditions presented by the established wafer processes.
The hard-material coated complex wafer must comply with the requirements involved with the fabrication of semiconductor devices. In general, the fabrication technology demands a diameter of more than 2 inch and a thickness of less than 1 mm of a wafer.
The sizes of electronic devices become smaller year by year. The miniaturization of devices requires the reduction of thickness of wafers. The thinning technique has been established for silicon wafers.
Unlike silicon, wide, homogeneous wafers composed of only a single material cannot be produced pursuant to current technology in the case of hard materials, that is, diamond, diamond-like carbon and c-BN, because of the difficulties involved with making big and long single crystals. However, complex wafers can be produced by coating a pertinent substrate with a film of the hard-material. Instead of homogeneous wafers, two-component, complex wafers will be produced for the hard-materials. The nonhomogeneous wafer consists of a substrate and a hard-material film. The hard-materials are hereinafter represented by diamond for brevity.
Diamond-coated wafers can be made by the known plasma CVD method, the hot filament CVD method and so forth. Various materials can be adopted as the substrates. The most convenient substrate is a silicon wafer, because the technology of making and processing silicon wafers has matured. It is easy to obtain flat silicon wafers at low cost.
A complex wafer can be made by depositing a diamond thin film on the substrate by the above-mentioned methods. The surface of the film is rugged. Then the rugged surface of the diamond-coated wafer must be polished into a smooth and flat surface.
However, diamond is the hardest material among all the materials obtainable at present. There is no material harder than diamond. Thus, diamond is mechanically polished by a polishing machine using diamond powder as whetting medium. In the polishing, high pressure must be applied to the surface of the object diamond. Thus, a diamond wafer must endure strong stress. However, a diamond wafer consists of a substrate wafer and a thin diamond film. The mechanical strength of the wafer is determined by the nature of the substrate. High loads affect mainly the substrate in the long run.
Silicon which is used as a substrate is a fragile material. When a silicon wafer is adopted as a substrate, the complex wafer is likely to break, in particular when the wafer has a big diameter and thin thickness. If another material is used as a substrate, the problem will not be solved, since the material is likely to be broken by the high pressure. This problem of high pressure must be solved in order to make a mirror diamond wafer.
There is still another problem. A strong inner stress arises in the complex wafer having a substrate and a film due to the two layered structure. A diamond is synthesized at a high temperature in vapor phase from the excited material gas. Then the wafer is cooled to room temperature. Thermal stress occurs in the complex wafer due to the differences of thermal expansion between the substrate and the film. In addition, a diamond film has inherently intrinsic stress. The thermal stress and the intrinsic stress distort the complex wafer convexly or concavely to a great extent.
Conventional polishing apparatuses whet a flat object by a flat holder and a flat polishing turn-table. The conventional machines are entirely unsuitable for polishing distorted objects. One alternative is polishing a distorted object by gluing a distorted object in a forcibly flattened state on a flat holder, pushing the object by the holder upon the turn-table, rotating the holder and revolving the turn-table in a conventional machine. However, such a superficial improvement would be in vain. One problem is the high probability of breakage of the wafers. Another problem is the difficulty of whetting the film uniformly. Another difficulty is a large fluctuation of the thickness of the film polished. These problems impede the application of the conventional polishing machines to the two-layered wafers having a substrate and a hard-material film.
One purpose of the present invention is to provide a broad complex wafer having a non-hard material substrate and a hard material film.
Another purpose of the invention is to provide an unbent complex wafer without inner stress.
Another purpose of the invention is to provide a smooth complex wafer without micro convexes or micro concaves.
Another purpose is to provide a method of polishing a complex wafer having a fragile substrate and a hard material film.
Another purpose is to provide a method of polishing a complex wafer without breaking or cracking the wafer.
Another purpose is to provide a method of polishing a complex wafer with distortion.
Another purpose is to provide a method of polishing a complex wafer without leaving unpolished parts.
Another purpose is to provide a method of polishing a complex wafer having a substrate and a hard film with little fluctuation of the thickness of the polished film.
Another purpose of the invention is to provide a method of polishing a hard film of a complex wafer with high efficiency.
Another purpose is to provide a machine for polishing a complex wafer having a non-hard material substrate and a hard material film into a mirror wafer.
Another purpose is to provide a machine for polishing a complex wafer without breaking or cracking the wafer.
Another purpose is to provide a machine for polishing a complex wafer with efficiency.

Hard material-coated wafer, method of making same, polishing apparatus and polishing method of hard material-coated wafer


A branch prediction unit includes a first branch target buffer, a second branch target buffer, and a static predictor. The first branch target buffer is adapted for storing a first plurality of branch history entries. The second branch target buffer is adapted for storing a second plurality of branch history entries. The static predictor is adapted for determining a static branch prediction for an encountered branch instruction. The second branch target buffer is further adapted to allocate a branch history entry based on the static prediction. A method for predicting program branches in a microprocessor includes fetching a program instruction to be executed by the microprocessor. It is determined if an entry corresponding to the program instruction is stored in a first branch target buffer, and if an entry corresponding to the program instruction is stored in a second branch target buffer. It is determined if the program instruction is a branch instruction. A static prediction is determined for the branch instruction. A branch history entry is allocated in the second branch target buffer based on the static prediction if the first and second branch target buffers do not contain entries corresponding to the program instruction.

1. Field of the Invention
The present invention relates generally to branch prediction in a microprocessor system and, more particularly, to a method and apparatus for speculatively buffering branch targets.
2. Description of the Related Art
The performance of a microprocessor is directly related to the amount of time it is busy executing instructions. It achieves maximum performance if it never sits idle waiting on fetches from memory or I/O. The microprocessor has a prefetch unit that has the responsibility of keeping the execution unit as busy as possible by providing a constant flow of instructions. The prefetch unit is responsible for keeping enough instructions on hand so the microprocessor does not stop its execution flow to fetch an instruction from memory. This look-ahead feature can significantly increase performance, because much of the time, the next instruction is already waiting at the first stage of the microprocessor execution pipeline. If instructions are sequentially stored, prefetching almost guarantees that the next instruction will always be ready.
However, instruction sequences are not always stored in memory sequentially. Software contains branches or jumps in instruction flow that cause the microprocessor to jump around to different sections of code depending on the task being executed. The prefetch unit can keep track of the current instruction flow, but it cannot predict the future path of branch instructions.
Performance of the microprocessor is further enhanced by a branch prediction unit that works in concert with the prefetch unit. The branch prediction unit, as its name suggests, attempts to predict whether a branch will be taken. As long as the branch prediction unit predicts correctly, the prefetch unit retrieves instructions to be executed in the required order.
In a microprocessor such as Intel's Pentium Pro microprocessor, the branch prediction unit includes a dynamic predictor, such as a branch target buffer, that stores branch history information based on the instruction address of the branch instruction. The branch target buffer tracks the past behavior of branches through history bits. The branch target buffer can track a branch instruction only after it has been previously seen and an entry has been allocated for the instruction address of the branch. Branch prediction typically occurs in the beginning of the microprocessor pipeline, and branch target buffer allocation typically occurs near the end of the pipeline after the branch is known to be in the correct path of the executing program and the branch is resolved. Therefore, the first time a branch instruction at a certain address is encountered, the branch target buffer does not know that the instruction is indeed a branch because the instruction has not been previously executed and allocated.
A second branch prediction unit, a static predictor, receives information on the decoded instructions and can therefore identify a branch instruction that is not detected by the branch target buffer. The static predictor can identify the type of branch instruction and possibly the branch target address. The static predictor performs a static branch prediction based on a set of rules depending on the type of branch instruction encountered. A branch missing the branch target buffer will be statically predicted by the static predictor. The static predictor is also capable of correcting errors made by the branch target buffer. Because, the branch target buffer tracks branches by instruction address rather than by knowing the actual instruction, process switches and self-modifying code can affect the actual instruction stored at a particular address. Branches that are incorrectly identified by the branch target buffer and branches that are missed by the branch target buffer can be corrected by the static predictor.
Due to the lag between encountering a branch instruction for the first time and allocating the branch in the branch target buffer after it is executed and retired, a particular branch may be encountered and statically predicted multiple times before it is ever allocated in the branch target buffer. In the case of a backward conditional branch, the static predictor will predict the branch as taken, resulting in the instructions following the branch that were fetched prior to the static prediction being flushed from the pipeline. Because the branch instruction is not allocated in the branch target buffer until after the instruction is retired, the static prediction and flush loop may be repeated multiple times before the first occurrence of the branch is allocated, especially for a short loop.
Flush cycles have a significant impact on processor performance. As processors become faster, the impact of flush cycles increases. Faster processors typically require deeper pipelines, thus increasing the lag between encountering a branch instruction and allocating the instruction address in the branch target buffer.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above by providing a novel and nonobvious method and apparatus for speculatively buffering branch targets.

System for speculative branch target prediction having a dynamic prediction history buffer and a static prediction history buffer


The multipurpose ashtray holder may be used as a general purpose ashtray or a holder for stationery products. The multipurpose ashtray holder includes a holder assembly for placement at select locations by the user, an ashtray assembly, and a connector pivotally connecting the holder assembly to the ashtray assembly so as to enable folding of the multipurpose ashtray holder between a closed, non-use state and an open, use state. The holder assembly has a holder body with a plurality of insert holes therein. The insert holes enable quick and safe extinguishing of flammable tobacco products or storage of elongate objects or office supplies. The ashtray assembly includes a tray with a plurality of spaced notches formed thereon. The tray enables collection of ash or office supplies and caps the holder assembly in the closed state.

1. Field of the Invention
The present invention relates to tobacco accessories, and particularly to a multipurpose ashtray holder foldable between use and non-use configurations, to facilitate the disposition of ash and tobacco products in a safe manner, and/or containment of stationery products.
2. Description of the Related Art
Most conventional ashtrays are relatively simple in design and function. These ashtrays usually comprise a tray with a plurality of notches spaced around a peripheral wall of the tray. The user disposes ashes into the collection basin of the tray and the notches hold tobacco products, such as cigarettes and cigars, thereon.
Conventional ashtrays, however, do not have any means of minimizing potential fire injuries to the user and/or fire hazards to the surroundings, that may be created by the burning end of the tobacco product. In most instances, the user simply stubs or taps the burning end of the tobacco product against the surface of the basin to extinguish the tobacco product. This often times requires several taps or even excessive press of the tobacco product into the tray. In case of the former, stray hot or burning ash may be expelled from the tray and thus come into contact with a flammable surface or object, which may lead to an unintentional fire and consequences thereof. In case of the latter, the user could easily burn the fingers or hand during the process.
Apart from the potential dangers, most conventional ashtrays serve a singular purpose, i.e., they are designed for disposing of tobacco products. These ashtrays become unassuming decorative accents of a home or office when not in use.
In light of the above, it would be a benefit in the art of tobacco accessories to provide a device that safely disposes tobacco products and perform additional functions. Thus, a multipurpose ashtray holder solving the aforementioned problems is desired.


A method for processing a black-white silver halide photographic light-sensitive material by an automatic processor comprising the following steps,. a step for preparing a processing solution by dissolving a solid processing composition or a condensed processing solution in a dissolving tank, PA1 a step for supplying said processing solution from said dissolving tank to a processing tank, PA1 a step for supplying part of said processing solution used for processing in said processing tank to said dissolving tank,. wherein said black-white silver halide photographic light-sensitive material is processed with said processing solution in said processing tank and the flow of said processing solution from said processing tank to said dissolving tank is irreversible.

A silver halide photographic light-sensitive material (hereinafter referred to as a "light-sensitive material") employed in graphic arts is generally exposed and then processed employing an automatic processor comprising at least a development section, a fix section, a water wash section or stabilizing bath section and a drying section. Each processing solution in each processing tank of developer, fixer, washing water, stabilizer and so on is replenished depending on the amount of processed light-sensitive material, to compensate the consumed components and make up for the lowering of processing activity caused by the compounds which leach out of processed light-sensitive material and components which are brought in from the preceding processing tank. The amount of the processing solution exceeding the predetermined amount is overflowed as a waste solution.
In recent years, because of reducing environmental load, open sea disposal of photographic processing effluent has been prohibited, and lowering replenishment rate has been rapidly propelled in accordance with reduction of the load of effluent disposal. Therefore, more condensed solution kit of replenisher has been greatly demanded. On the other hand, to avoid the problem to use the condensed solution kit of replenisher, solid processing composition of a granule form or a tablet form has been also more popular.
FIG. 1 illustrates a model of a replenishment system using tablet form replenisher which is conventionally used to process black-white light-sensitive materials.
In FIG. 1, 1 represents a replenishment apparatus and 2 represents a processing tank of an automatic processor.
The adjustment of a replenisher is carried out by introducing the determined amount of water from water works into a dissolving tank 11 of the replenishment apparatus 1 and adding tablet form replenisher into a tablet inlet apparatus 12, thereafter the resultant mixture is mixed, stirred and dissolved. The replenisher adjusted in the dissolving tank 11 is introduced to a replenisher accumulating tank 13. Pump P begins to work by receiving a signal from the automatic processor which informs the processed area of light-sensitive material. The amount of replenisher in accordance with the processed area is calculated from the predetermined amount of replenisher per unit processed area (in this case, 10 ml/10.times.12 inch.sup.2 size). The replenisher is supplied to a processing tank 2 from the replenisher accumulating tank 13 through a replenisher supplying line 14, thereby with the inflow of replenisher from the replenisher accumulating tank 13, the same amount of the outflow of processing solution (tank solution) is overflowed as a waste solution.
In the processing system of silver halide color photographic light-sensitive materials, where controlling the dissolution rate of a tablet form replenisher is relatively easy, direct dissolving method of the tablet form replenisher is mostly employed, wherein the solution circulates between the processing tank and the replenishing tank at all time and the tablet is directly added to the solution in the replenishing tank, whereby in proportion to processing, by the tablet form replenisher gradually being dissolved, processing components and other active additives are supplied, and the same amount of an outflow equivalent to the amount of replenishing water supplied into processing tank is overflowed as a waste solution. Compared with the processed area of color light-sensitive materials, that of black-and-white light-sensitive materials used in X-ray photographic field and graphic arts field are much more larger, to control dissolving rate of the tablet form replenisher by similar dissolving method mentioned above is impossible so that the method as shown in FIG. 1 is employed. The dissolution rate of replenishing tablet depends on the kind of additives contained in the replenishing tablet. As the film size increases, the amount of reprenishing solution in processing one time increases, accordingly, the processing is more affected by the dissolution rate, sequentially, the fluctuation of image density of the processed light-sensitive material increases. Accordingly, in case where the film size is large, the dissolution rate must be strictly controlled, and to control the foregoing dissolution rate is very difficult.

Method for processing black-white silver halide photographic light-sensitive material by an automatic processor


An image brightness correction method is described. First, a pre-flash is fired and a pre-flash image is shot. After a main flash duration is estimated according to the pre-flash image and an automatic exposure time of a camera device, a main flash is fired and a raw image is shot. Then, a brightness gain of the raw image is compensated according to a preset gain threshold, and a digital brightness gain of the image is adjusted to enable the image shot each time to achieve the same brightness gain.

1. Field of the Invention
The present invention relates to an image processing method, and more particularly to an image brightness correction method for adjusting an image to obtain a consistent brightness gain value.
2. Related Art
As camera devices having been increasingly prevailing, they are more and more widely used in various applications. When a camera device is used for shooting an image, the shooting brightness may directly affect the quality and recognizability of the final image. Especially, when the light in the shooting site is inadequate or the exposure time fails to meet the requirement of the safety shutter, a flash lamp is required to compensate the brightness of the shooting environment. Therefore, the brightness of the shot image is compensated by the flash lamp, such that the shot image may not have any unrecognizable area due to the excessively inadequate brightness.
FIG. 1A is a flow chart of a conventional camera device employing a flash lamp to shoot an image. Referring to FIG. 1A, a method for shooting an image by a conventional camera device employing a flash lamp includes the following steps. First, a pre-flash is fired and a pre-flash image is shot (Step S110). An automatic exposure time of the camera device is captured (Step S120). A main flash duration is estimated according to the pre-flash image and the automatic exposure time (Step S130). Then, a main flash is fired according to the main flash duration, and a raw image is shot (Step S140). Finally, an image processing is performed on the raw image, so as to output a preset image file (Step S150). Through the above steps, when capturing an image, the camera device can determine the occasion when a flash lamp is needed for image shooting.
However, the flash lamp of the camera device works at a different level each time. The stability of the flash lamp depends on a capacitance of the flash lamp, and the smaller the capacitance of the flash lamp is, the poorer its discharge stability will be. When the discharge stability is undesirable, the brightness of the image that is shot each time is not uniform. For example, FIG. 1B is a data diagram showing brightness gain values of a conventional camera device when shooting an image through using a flash lamp. Referring to FIG. 1B, the experimental data are brightness gain values of images shot at the same scene and brightness but with different object distances. For example, when the images are shot at 0.3 m, the brightness gain values of images shot in several experiments have a difference of about 30%, that is, (173.35−131.51)/154.134, Though it is possible to compensate the brightness gain value difference of the image shot each time by replacing a flash lamp with a higher stability, the unit prices of components in the flash lamp with a higher stability are much higher, and it still cannot guarantee that the image shot each time achieves the same brightness gain value. In other words, the techniques in the prior art cannot overcome the problem that the output images have non-uniform brightness due to inconsistent flash levels of the flash lamp.


Metal or metal boride films are deposited by CVD using a metal borane cluster compound as a precursor. For a nickel film, NiCl.sub.2 is vaporized in a reactor tube in the presence of B.sub.10 H.sub.14 or another polyborane. For an aluminum film, Al(BH.sub.4).sub.3 is formed by reacting AlCl.sub.3 with NaBH.sub.4, and using the Al(BH.sub.4).sub.3 as a precursor borane cluster compound. The substrate is heated to a selected temperature so that the deposited film has a controlled stoichiometry of metal and boron.

This invention relates to the deposition of main group metals, such as aluminum, or of transition metals, such as nickel, either as a substantially pure metal or in combination with boron. The invention is more particularly directed to processes for deposition of metal films and boron-containing metal films which use a metal borane cluster compound as a precursor. The process of this invention can yield metal boride thin films in which the atomic percentage of boron is selected to a desired level.
The deposition of binary transition metal-main group thin-film materials of controlled stoichiometry is currently an area of intense interest. Numerous techniques have been studied for the preparation of these materials including molecular beam epitaxy (MBE), sputtering, and chemical vapor deposition (CVD). The control of the stoichiometry in multicomponent films prepared by chemical vapor deposition techniques has relied on varying the ratio of individual source components in the vapor phase. These source materials typically deposit at significantly different rates on the substrate at any given temperature, often making the formation of a homogeneous film difficult.
Nickel boride thin films have found a number of important applications, beginning with not only traditional uses such as hard cutting tools and inert coatings to protect sensitive devices from severe environmental conditions. NiB films can also be used in fields such as high-energy optical systems and magnetic materials. In addition, the incorporation of boron in nickel films has been shown greatly to enhance the strength and hardness of the alloy. Relatively strain-free nickel boride thin films have been reported from the pyrolytic CVD of gaseous mixtures of nickel tetracarbonyl, Ni(CO).sub.4, diborane, B.sub.2 H.sub.6, and carbon monoxide in an argon carrier. Nickel tetracarbonyl Ni(CO).sub.4 and diborane B.sub.2 H.sub.6 are relatively expensive and extremely toxic and flammable reagents. An alternative to this method which provides stoichiometric control, and yields strain-free films and conformal materials is therefore highly desirable.
The deposition of thin films of main group materials such as GaAs and Al.sub.x Ga.sub.1-x As using metal-organic epitaxial source materials is a subject of high interest. Research in this field has dealt primarily with the development of new epitaxial techniques and the purification of existent organometallic source materials. While these source compounds have proven adequate in many instances, further developments and improvements in epitaxial processes involving new source materials are yet to be developed which exhibit enhanced chemical properties for depositional processes. Thus far, relatively little emphasis has been placed on this vitally important aspect of epitaxial science.
Until now, metal thin film epitaxy has primarily employed deposition techniques using well-known and, typically, commercially available carbon-based source compounds. There are, however, important problems associated with the epitaxial source materials currently in use. These problems include: (1) severe substrate reactivity and bonding problems, (2) high toxicity (and environmental and occupational concerns), (3) difficulties in handling and manipulation, and (4) undesired co-deposition of carbon and other contaminant elements. In many cases, the films that derive from organometallic precursor compounds contain unacceptably high carbon levels, limiting or degrading the semiconducting properties of the film. Aluminum epitaxial depositions have typically been among the most troublesome in this latter respect. Many of the currently employed aluminum precursor compounds are particularly prone to carbon film contamination problems. With the emergence of ternary structures, such as Al.sub.x Ga.sub.1-x As, as vital electronic materials, the development and practical application of new source materials for the deposition of aluminum is therefore an area of major concern to the electronics industry.
Several organoaluminum precursors have been carefully investigated as CVD source materials. The most intensely studied are trimethylaluminum, Al(CH.sub.3).sub.3 (TMA), triisobutylaluminum, Al(i-C.sub.4 H.sub.9).sub.3 (TiBA) and, most recently, the volatile donor-acceptor complexes of alane, AlH.sub.3 (NR.sub.3).sub.2. The deposited films typically exhibit high carbon contamination and have rough surface morphologies and show significant reactor memory effects.

CVD method for forming metal boride films using metal borane cluster compounds


Provided is a multilayer wiring board, wherein impedance matching can be achieved in a via connection section by means of a configuration, which has a simple structure, and which can be easily processed. In the multilayer wiring board including a ground layer (401) of a layer (1), and a signal line (102) of a layer (2), an elliptical through hole is formed in the ground layer (401), said through hole being at a position facing a part of the signal line (102). The elliptical through hole overlaps the signal line (102) by a length of lambda/36-lambda/2 in the long axis direction, Impedance of the signal line (102) can be adjusted by adjusting the size of the through hole.

As a structure for mutually connecting wiring patterns which are located in desired layers of a board having two or more wiring layers, there is a structure called a through hole or a via (or via hole). Particularly, a structure to connect inner layers of a multilayer board using a hole is called a via.
FIG. 1 is a diagram schematically illustrating a multilayer board including a via. FIG. 1 shows a four-layer structure including layer 1 which is ground layer 11, layer 2 which is signal line 12, layer 3 which is signal line 13, and layer 4 which is ground layer 14. Via 15 connects the signal lines of layer 2 and layer 3. Meanwhile, signal line 12 is connected to, for example, a high-frequency amplifier, and signal line 13 is connected to, for example, an antenna.
Generally, a via is formed of a complicated shape, and impedance mismatching occurs in a connecting part between a signal line having a constant line width and a via. For this reason, it is known that signal transmission characteristics, particularly, at the time of high-frequency driving deteriorate. That is, the reflection and attenuation of a signal occurs in the connecting part between the signal line and the via.
In this respect, PTL 1 proposes a method for improving the electrical characteristics of the via structure. For example, PTL 1 proposes a method for performing pseudo-coaxialization on vias provided in the vertical direction of an insulating board, using a plurality of ground layers lined up on the insulating board located in the vicinity of the vias. In addition, PTL 1 proposes a multilayer board including stacked layers and having a structure in which coaxial via holes spaced apart at regular intervals are formed in the vicinity of the vias by laser processing, and the coaxial via holes are connected to a power supply and ground layer.
Further, as shown in FIG. 2, PTL 1 proposes a multilayer wiring board in which insulating layers each formed using a resin insulating film and wiring layers each formed using a conductor film are alternately stacked one on top of another. This multilayer wiring board includes via holes which are connected to signal transmission wiring and via holes which are independently formed in the vicinity of the vias coaxially on concentric circles separated at a regular interval by the insulating layer without being connected to a signal wiring layer, a power supply and a ground layer, and are buried in the insulating resin layer.

Panasonic Intellectual Property Management Co., Ltd.


A flip flop circuit for a scan test comprises a first latch circuit for latching and outputting data signal D in synchronization with control signal CLK when control signal SC1 is set at one level and latching and outputting scan in data signal SIN in synchronization with control signal SC1 when control signal CLK is set at the other level, and a second latch circuit for latching and outputting an output of the first latch circuit in synchronization with control signal CLK when control signal SC2 is set at one level and latching and outputting an output of the first latch circuit in synchronization with control signal SC2 when control signal CLK is set at the other level. In this way, the area of the circuit is decreased by commonly using one latch circuit for a data signal and a scan in data signal. Also, the skew adjustment is not required during a scan test by operating with two-phase clocks during both scan shift operation and scan normal operation.

1. Field of the Invention
The present invention relates to a scan flip flop circuit for allowing a test of a scan test scheme, which is incorporated in a semiconductor integrated circuit.
2. Description of the Related Art
In recent years, semiconductor integrated circuits tend to have increasingly larger scales. Also, circuits with various functions such as adders, multipliers, RAMs, ROMs or the like have been incorporated in semiconductor integrated circuits.
In such a semiconductor circuit, an input signal is outputted via a number of functional circuits in the semiconductor integrated circuit, so that when malfunction occurs, it is difficult to presume in which functional circuit the malfunction occurs.
Thus, in the semiconductor integrated circuit in which a number of functional circuits are incorporated, for example, all or some of normal flip flops are replaced with scan flip flops and a test of a scan test scheme is performed with predetermined data set up in these scan flip flops to verify the circuit operation. In such a semiconductor integrated circuit, the circuit is operated in synchronization with a system clock for controlling the entire system during a normal operation. In contrast, the scan flip flop inputs, holds and outputs data for a scan test (scan in data) or an output of the functional circuit at the preceding stage to allow the test for the logical operation of each functional circuit during the scan test operation.
This type of circuit for performing the scan test is conventionally known as a scan flip flop circuit (hereinafter referred to as an SFF) and illustrated in FIG. 1.
This circuit comprises three latch circuits of a first through a third latch circuits. First latch circuit 114 is provided with data signal D and control signal CLK at data signal input terminal H01, and control signal input terminal H02, respectively, latches data signal D in synchronization with this control signal CLK, and delivers an output signal from data signal output terminal Q01. To transfer gates 91 and 92 are connected output P01 of inverter 110 and output P02 of inverter 111, respectively.
Second latch circuit 115 is provided with scan in data signal SIN and control signal SC1 at data signal input terminal H03, and control signal input terminal H04, respectively, and latches the scan in data signal SIN in synchronization with this control signal SC1, and delivers a second output signal from data signal output terminal Q03. To transfer gates 93 and 94 are connected both control signal input terminal H04 and output P03 of inverter 112.
Next, third latch circuit 116 consists of transfer gate 95 connected to data output terminal Q01 of first latch circuit 114, transfer gate 96 connected to data output terminal Q03 of second latch circuit 115, and further, transfer gates 97 and 98. Among them, to the transfer gates 95 and 97 are connected both outputs P01 and P02 similar to those used in first latch circuit 114, and to the transfer gates 96 and 98 are connected both control signal input terminal H05 inputted with control signal SC2 and output CB1 of inverter 113. Third latch circuit 116, when control signal SC2 is set up at a low level, latches the output signal of first latch circuit 114 in synchronization with control signal CLK and delivers output signals at data signal output terminals N01 through N03. Also, when control signal CLK is set up at a low level, third latch circuit 116 latches the output signal of second latch circuit 115 in synchronization with control signal SC2 and delivers output signals at data signal output terminals N01 through N03.
As described above, the conventional SFF circuit comprises three latch circuits. When this SFF circuit is assembled on a gate array with a substrate of a predetermined size, one cell is required for two transfer gates, one cell for each of output buffers 102 and 105 of the third latch circuit, and one cell for two inverters for the remaining ones. Thus, the circuit showed in FIG. 1 comprises 12.5 cells, or practically about 13 cells.
Next, the scan test operation of this circuit will hereinafter be described in reference to FIG. 1 and waveforms of the control signals as shown in FIG. 2.
First, a scan shift operation indicates that all sequential circuits are rearranged to form a SFF of register construction and scan in data is inputted from outside to be written to the SFF and the data of the SFF is outputted to the outside.
In second latch circuit 115, control signal SC1 is first inputted at 0 (low level) so that the transfer gate 93 is closed. Control signal SC1 is then changed to 1 (high level), transfer gate 93 is opened to fetch data SIN. Control signal SC1 is then changed to 0, transfer gate 93 is closed to open transfer gate 94 and data SIN is latched.
During this operation, in third latch circuit 116, control signal CLK is equal to 0 so that transfer gate 95 is closed and transfer gate 97 is opened. Also, transfer gate 96 is closed while control signal SC2 is inputted at 0. Then, control signal SC2 is changed to 1 and transfer gate 96 is opened to input the output signal of second latch circuit 115. When control signal SC2 is again changed to 0, transfer gate 96 is closed and transfer gate 98 is opened and then the inputted signal is latched and outputted from the output terminals.
In this way, the conventional SFF operates with the two-phase clocks of the SC1 and the SC2 during the scan shift operation.
Next, a scan normal operation will be described. The scan normal operation indicates that combination circuits of a semiconductor integrated circuit (portions excepting the SFF) are operated using an output value of the SFF and the result is written to the SFF.
In third latch circuit 116, control signal SC2 is inputted at 0 so that transfer gate 96 is closed and transfer gate 98 is opened. While control signal CLK is inputted at 0, transfer gates 91 and 97 are opened and the transfer gates 92 and 95 are closed, and the preceding cycle value is outputted.
Then, when control signal CLK is changed to 1, transfer gates 92 and 95 are opened, transfer gates 91 and 97 are closed, the inputted value is latched in first latch circuit 114, transmitted to third latch circuit 116 and outputted therefrom.
When the control C is changed to 0, transfer gates 91 and 97 are opened and transfer gates 92 and 95 are closed, the inputted value is latched in third latch circuit 116 and outputted therefrom.
In other words, during the scan normal operation, the SFF operates with the one-phase clock of the CLK.
In this way, the conventional circuit operates with the two-phase clocks of the SC1 and the SC2 during the scan shift operation, and operates with the one-phase clock of the CLK during the scan normal operation. It should be noted that the conventional circuit also operates with the one-phase clock of the CLK during a user mode because it operates as a normal flip flop.
When the scan circuit is incorporated in an integrated circuit, the most difficult problem is that the area of the integrated circuit is increased as the scan circuit is incorporated in an ordinary circuit. For example, though an ordinary circuit can be formed using a substrate with a predetermined size, a circuit having an incorporated scan circuit may have to be formed using a substrate greater than that for the ordinary circuit, resulting in an increased cost. The scan circuit is classified roughly into a control circuit, a simultaneous operation control circuit and an SFF, and the SFF has the greatest effect on the area of the circuit among them. Thus, it is important to minimize the area of the SFF.
In addition, when the one-phase clock is used in the scan operation of a circuit, the adjustment of clock skew is required for a normal operation of the circuit. The clock skew is a delay of the clock due to wiring delay and so on. In recent years, the method which utilizes a CTS is widely used for adjusting the clock skew. In the CTS, as described simply, buffers are provided on the way of the clock distribution lines, or the length and the shape of the clock distribution lines are arranged so that the clock skew becomes uniform. The details of the CTS are described in LSI LOGIC LCA 500K, Preliminary Design Manual, Chapter 8. However, even though the use of the CTS causes the skew to be decreased, a number of flip flops may operate at the same time to make it difficult to perform the scan shift operation due to the power noises.
Further, when a user uses a plurality of clocks and the waveforms of the clocks are different one another, the same waveform is inputted to the clock terminals of all the SFFs during the scan normal operation since the one-phase clock is used, and, therefore, the circuit may not operate normally because a data passing through without latching occurs.
In the scan test, the FFs (flip flop) are replaced by the SFFs. Since the replacement is usually done after a design of all of circuits is finished, it is important that a time-delay in the user logical portion is not changed. However, the time-delay is changed in many cases since the SFFs are formed by adding a scan function to the usual FFs, and a readjustment of the time-delay was necessary for the user circuits after the replacement.

Flip flop circuit for scan test with two latch circuits


This present invention provides a novel photoconductive semiconductor switch (PCSS) comprising: a semi-insulating substrate, an anode formed on the upper surface of said semi-insulating substrate, a first n-type doped layer formed on the lower surface of said semi-insulating substrate, a p-type doped layer formed on said first n-type doped layer, a second n-type doped layer formed on said p-type doped layer, a cathode formed on said second n-type doped layer, several recesses facing towards said first n-type doped layer and vertically extending into a part of said first n-type doped layer, an insulating layer formed on said second n-type doped layer and on the walls and the bottoms of said recesses, a gate electrode consisting of two parts, one part of the which formed on said insulating layer on the walls and the bottoms of recesses, and the other part of the which formed on a part of the insulating layer on the second n-type doped layer for electrically connecting the part of the gate electrode on the recesses, wherein the cathode and the gate electrode are electrically isolated.

A photoconductive semiconductor switch (PCSS) triggered with an ultra-short pulsed laser is a type of low-jitter ultra-broadband high-power switch device without potential spurious triggering caused by electro-magnetic interference. There are two operating modes of PCSS which depends on whether there is avalanche multiplication of photon-generated carriers, namely, the linear operating mode and the high-gain operating mode (also called the nonlinear mode or the lock-on mode). A traditional PCSS is composed of an anode, a semi-insulating substrate and a cathode. The semi-insulating substrate is usually obtained by highly compensating a low-resistivity semiconductor crystal with deep-energy-level impurities or defects, such as iron-doped GaN (GaN:Fe) and vanadium-doped SiC (SiC:V). Taking GaN for example, the resistivity of GaN crystal can reach a high level only by doping deep-energy-level Fe impurity with a concentration of more than 1017 cm−3. Thus, the GaN:Fe crystal can be used as the semi-insulating substrate of the traditional PCSS. However, the dark-state resistance of the traditional PCSS is remarkably nonlinear, which is mainly caused by the unavoidable high-concentration deep energy levels. Consequently, the dark-state leakage current of the traditional PCSS will significantly increase with the bias voltage increasing until the traditional PCSS is broken down. The leakage current of the PCSS biased with a dc voltage source restricts the dc withstand voltage capability. Furthermore, since the average drift velocity of the photon-generated carriers is usually proportional to the bias voltage, it also restricts the photocurrent peak of the PCSS
In addition, GaAs PCSS and InP PCSS can operate with the high-gain mode at a high bias voltage. The remarkable advantages of the high-gain operating mode lie in the fact that it can be triggered by a weak laser and the rising edge of the photocurrent pulse is much faster than that of the triggering laser, due to the avalanche multiplication of the photon-generated carriers. Therefore, said PCSS can choose a low-cost portable laser diode as the light source, rather than an expensive heavy pulsed power laser. The disadvantage of said GaAs PCSS and InP PCSS lies in the fact that when the PCSS operates in the high-gain mode, the PCSS is unable to turn off by itself in nanoseconds or even microseconds because the current is "locked on", unless the bias electric field across said semi-insulating substrate can quickly reduce to the level below the threshold electric field for maintaining the high-gain mode. The existing solution to the above-mentioned problems is to use a low-duty-ratio high-voltage pulse source as the bias voltage source of PCSS, such as Marx circuit, which can inhibit the dark-state leakage current of PCSS and force the GaAs PCSS and InP PCSS to quit from the high-gain operating mode. However, since a high-voltage pulse source usually comprises several high-power devices and the impedance matching of the transmission lines between these devices is difficult, this kind of PCSS system is high in cost and poor in portability, especially when a high repetition rate is required.

Insulated-gate photoconductive semiconductor switch

THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS


In a method of producing marking or the like on a surface by means of laser radiation, at least two layers of lacquer of different colors are successively applied to the surface and at least the outer layer which is towards the viewer of the surface is removed by laser radiation in a region-wise manner to expose the second layer therebeneath, thereby producing the marking on the surface. At least the outer layer is applied by a transfer operation from a carrier material, in order thereby to produce a uniform thickness for that layer and thus a highly uniform laser-engraving effect. Also described is the use of embossing foils and more especially hot embossing foils of a particular configuration in such a method.

The invention concerns a method of producing marking on a surface by means of laser radiation.
In this specification the term marking means any suitable kind of marking such as decoration, labelling, addressing, captioning, inscription and the like.
One form of method of producing marking or the like on a surface by means of laser radiation comprises successively applying to the surface at least two differently colored layers of colored lacquer. The first or outer layer lacquer, which is thus remote from the surface and which faces towards a person viewing the article providing that surface, is removed by means of the laser radiation in a region-wise manner to produce the appropriate marking on the surface, by virtue of the differently colored second layer lacquer therebeneath being exposed.
A method of that nature may be used more especially for example when the situation involves providing precise and accurate markings such as decoration or labelling on articles which are individual parts or which are produced only in small numbers. The laser beam which is used to burn away the first or outer layer of colored lacquer can be easily controlled with a very high degree of accuracy, in respect of its path of movement, for example by means of an electronic computer. In that operation it is also possible to vary the thickness of the line which is produced by the laser beam burning away the material of the outer layer of colored lacquer. Suitable equipment for carrying out that method is available and is offered for example by Baasel Lasertech.
A method of producing safety markings on a surface can also be found in EP 0 383 956 Al, in which a colored layer which is covered by an upper laser radiation-absorbent layer is suitably exposed by removal of the upper layer in a region-wise manner, using a laser beam, but there is no information about the mode of applying the layers to the surface in question.
Hitherto, the operating procedure adopted has been such that the surface on which a marking is to be produced, for example the front plate of a piece of equipment, has been provided with two differently colored layers of lacquer, using conventional application procedures. The upper or outer layer of lacquer is then removed and the underneath layer of lacquer which contrasts in color with the outer layer of lacquer is exposed in a configuration corresponding to the desired marking such as a desired decorative or patterning effect, labelling, caption or the like. In that situation however the problem which arises is that the conventionally applied layers of lacquer suffer from variations in thickness, with the result that, when the outer layer of lacquer is burnt away by means of the laser beam, under some circumstances the outer layer may not be completely removed in the regions in which it is relatively thick. If a higher level of laser power is used, it is then admittedly possible to ensure that the outer layer of lacquer is reliably removed, even where it is of relatively greater thickness. In that case however there is then the risk that the underneath layer of lacquer may also be affected to a considerable degree by the laser beam, in regions in which the outer layer of lacquer is relatively thinner, and the effect on the underneath layer of lacquer may be to such a degree that the underneath layer of lacquer is at least seriously damaged or even completely removed. A further danger which arises is that, if the layers of lacquer are of different thicknesses, the line produced by means of the laser beam, in spite of the level of laser power remaining at least substantially constant, may be of different widths or strengths, so that, as will be readily appreciated, the appearance of the correspondingly marked surface is also adversely affected in that way. In order to produce acceptable and useful laser marking or decoration or the like, it was therefore necessary hitherto to apply the outer layer of lacquer, namely that which is to be subsequently removed in a region-wise manner by the laser beam, with a thickness which is as uniform as possible. It will be appreciated however that that resulted in a quite inconsiderable increase in the cost of manufacture of articles requiring a marked surface of that kind so that hitherto laser marking was only used for a few areas, more particularly for example in relation to very expensive or high-quality equipment.

Method of producing marking on a surface by means of laser radiation and use of an embossing foil in such a method


A plasma coating system includes at least one coating station with a first side and a second side defining a pathway with at least one bend. The coating station also includes a first plasma arc that provides a plasma jet directed towards a substrate. The first plasma arc is positioned on either the first side or the second side of the bend.

The present invention relates to a plasma coating system. More specifically, the invention relates to a system that accommodates substrates of different shapes.
In some plasma coating systems, as horizontally oriented substrates advance through a coating station and remain in a horizontal plane, plasma arcs arranged above the substrates direct plasma jets entrained with one or more reagents toward the substrates. Such a configuration cannot accommodate non-planar substrates or provide two-sided coating.
Other plasma coating systems are arranged in a linear manner with the substrates following a fixed linear path through the coating station or coater. The coating station is typically provided with one or more reagent manifolds and plasma arcs that direct plasma jets entrained with reagents at one or both sides of the substrate. As a non-planar substrate passes through the coating station in such systems, the distance between the surface of the substrate and a respective plasma arc varies according to the shape of the substrate. Moreover, the angle of incidence between the plasma jet and the substrate varies as the substrate advances through the coating station.

Plasma coating system for accommodating substrates of different shapes


A formulation for topical application, the formulation comprising a waterborne polyurethane polymer; a thickening agent; a humectant, at least one sunscreen active agent, and an emulsifying agent.

The invention relates to formulations that are applied to the skin to reduce the amount of solar ultraviolet radiation received by the skin. More particularly, the invention relates to formulations containing waterborne polyurethane polymers that impart several beneficial properties to topical formulations, including inter alia, water proofing, reduction in the migration of the formulation across the wearer's skin, and reduction of the penetration of the active ingredients of the formulation into the wearer's stratum corneum.
It is now generally recognized that exposure to solar radiation can have adverse health consequences, sometimes not appearing until several years following the exposure. Of course, the immediately appearing sunburn from an overexposure can itself be a serious acute health problem.
Many products are available to reduce the amount of solar ultraviolet radiation received by the skin during exposure to the sun's rays. Typical product formulations are lotions, creams, ointments or gels containing chemical and/or physical barriers to ultraviolet transmission. These vary considerably in their abilities to protect the skin against the physical and biochemical effects of ultraviolet radiation. Many conventional cosmetic cream and lotion compositions are described, for example, in Sagarin, Cosmetics Science and Technology, 2nd Edition, Volume 1, Wiley Interscience (1972), and Encyclopedia of Chemical Technology, Third Edition, Volume 7.
Earlier sunscreening formulations were designed to protect against sunburn from a limited solar exposure period, while transmitting sufficient radiation to permit skin tanning. However, the current focus is on eliminating as much ultraviolet radiation exposure as possible, it being recognized that skin tanning, while esthetically pleasing to some, is a clear indication of tissue damage from overexposure to solar radiation. It has been recently discovered that any amount of unprotected exposure can potentially cause immune system suppression and lead to future health problems, such as skin carcinomas and other dermatological disorders.
The SPF (Sun Protection Factor) rating system has been developed to provide consumer guidance in selecting suitable sunscreens for any given outdoor activity. In general, the SPF number approximately corresponds to the multiple of time during which the properly applied sunscreen will prevent obvious reddening of the skin, over the exposure time that causes unprotected skin to exhibit reddening. Thus, if an SPF 8 sunscreen formulation has been properly applied, a person should be able to remain in the sun without visible effects for eight times the usual unprotected duration. Of course, the duration of unprotected exposure which produces a visible effect on the skin varies from one individual to another, due to differences in their skin cells. Currently popular are high-SPF "sunblocker" products, having SPF values of at least 30.
Most of the commercially available sunscreen formulations are not well suited for use by those engaged in strenuous outdoor activities, such as construction work, gardening, athletic events and many others, due to the tendency for perspiration from the body to interact with the applied formulation. For example, perspiration, or moisture from other sources, including rain, can cause sunscreen active ingredients and other irritating components of the formulation to enter the eyes and cause discomfort. It is also frequently detrimental, particularly in activities such as tennis which require a reliable grip on equipment, to have an applied sunscreen formulation remain lubricious after application or become lubricious when mixed with perspiration or other moisture.
It is also advantageous to have a suncare formulation that is waterproof. Waterproof formulations allow the user to engage in activities such as swimming while still being protected against ultraviolet radiation. Hydrophobic materials typically serve as waterproofing agents that impart film forming and waterproofing characteristics to an emulsion. However, there is still a need for products having physical attributes that display improved waterproof performance, that have a reduction in migration of the formulation across the formulation wearer's skin, and have a reduction in the penetration of the active ingredients into the formulation wearer's skin.
A sunscreen product that has been available for several years, but which does not exhibit disadvantages such as the foregoing, is sold by Schering-Plough HealthCare Products, Inc., Memphis, Tenn. U.S.A. as COPPERTONE.RTM. SPORT.RTM. SPF 30 lotion. This product contains the active ingredients octyl salicylate, octyl methoxycinnamate and oxybenzone, totaling 17.5 weight percent of the formulation, and is an oil-in-water emulsion formulated with 1.5 weight percent of a fumed silica having a hydrophobic surface treatment. It is thought that the silica serves to immobilize the active agents in the internal phase of the formulation and inhibit their migration under the influence of skin oils and/or external moisture. The product also has a very desirable "dry" feel as it is being applied, quite unlike the very liquid nature of the usual lotion which does not contain particulate ingredients other than those approved for use as sunscreen active ingredients.
Not with standing the foregoing, there still exists a need for a waterproof formulation that exhibits beneficial properties such as a decreased partitioning of the formulation into the wearer's stratum corneum and a reduction in the migration of the sunscreen active agents across the wearers skin upon topical application of the formulation.

Sunscreen formulations containing waterborne polyurethane polymers


A portable telephone terminal 1 has a built-in memory 18, in which either the content of a new call arrived is recorded while continuing prevailing communication or recording of the content of the prevailing communication call is started while answering the new call. After the end of the communication, reproduction of the record in the built-in memory 18 in the portable telephone terminal 1 is made possible immediately or at an appropriate time.

This application claims benefit of Japanese Patent Application No. 2001-029221 filed on Feb. 6, 2001, the contents of which are incorporated by the reference.
The present invention relates to portable telephone communication method and system and, more particularly, to portable telephone communication method and system capable of coping with a plurality of arrived calls at a time.
Portable telephone systems have been rapidly spread owing to their convenience merits, and the number of their sets having been spread is now exceeding the number of installed telephone sets or terminals. Also, the performance of portable telephone systems are becoming higher and higher, and portable telephone sets having new functions which are not provided in the installation type telephone sets have been developed. Prior art concerning installation type telephone sets is disclosed in, for instance, Japanese Patent Laid-Open No. 2000-224340 entitled "Portable Telephone Set with Recording Function" (hereinafter referred to as first prior art), Japanese Patent Laid-Open No. 9-139978 entitled "Voice Signal Transmitting and Receiving System" (hereinafter referred to as second prior art), Japanese Patent Laid-Open No. 10-200962 entitled "Multiple-Call Communication System: (hereinafter referred to as third prior art), Japanese Patent Laid-Open No. 11-150602 entitled "Radio Telephone System" (hereinafter referred to as fourth prior art) and Japanese Patent Laid-Open No. 11-177678 entitled "Message Recording and Reproducing System" (hereinafter referred to as fifth prior art).
The above first prior art concerns portable telephone sets with recording function, in which up and down voices can be sorted out for recording in an external recorder. The second prior art concerns portable telephone sets with recording function capable of hearing not only voice from the opposite side but also recorded voice during communication. The third prior art concerns systems, in which a time division multiplex communication path is established between a base station controller and a plurality of mobile terminals, whereby multiple call communication can be executed via a single mobile terminal. The fourth prior art concerns a radio telephone system, in which each mobile terminal can be simplified for connection with less incomprehensible channels when adding a voice recording function, and the user himself or herself can appropriately select the voice quality or the recording time by compressing the voice data and increasing the voice recording time when preserving more voice data. The fifth prior art concerns a message recording and reproducing system, in which the reproduction of messages having been sent out from recorded callers can be processed for each caller.
As shown above, the spread of the portable telephone, leads to increased occasions of communication between portable telephone sets or from other telephone sets and thus frequent cases of arrival of a new call during communication with a portable telephone set. In such cases of arrived call overlap, it has been inevitable to select either refusing the new call or answering the new call by interrupting the communication of the prevailing call. This means that such operations as interruption of communication and data transfer become necessary with respect to either one of the opposite side users, thus extremely spoiling the convenience of the portable telephone system.


A system and method are disclosed for routing packet traffic. A system that incorporates teachings of the present disclosure may include, for example, a Provider Edge (PE) router having a routing element that routes packet traffic between a plurality of autonomous systems according to one or more Virtual Routing and Forwarding (VRF) tables each having a plurality of Enhanced Interior Gateway Routing Protocol (EIGRP) Autonomous System (AS) numbers. Other embodiments are disclosed.

In traditional enterprise networks that utilize frame-relay, ATM (Asynchronous Transfer Mode), or private lines, enterprise customers have the ability to run multiple Enhanced Interior Gateway Routing Protocol (EIGRP) autonomous systems in their networks. As enterprise customers transition to Multi-Protocol Label Switching (MPLS) Virtual Private Networks (VPNs), the ability to utilize multiple EIGRP autonomous systems in a single Virtual Routing and Forwarding (VRF) table is not possible at the present time. To overcome this shortcoming service providers have created multiple VRF tables, which link the customer sites through the manipulation of route targets, thereby producing an extranet implementation.
A need therefore arises for a system and method for routing packet traffic that overcomes the aforementioned complications in the art.

System and method for routing packet traffic


A tightly-coupled processor complex comprises two or more processors, the complex being asymmetric in that a feature available on one processor is not available on at least one other processor. A work selection mechanism selects one of a set of one or more ready work units, each capable of execution on one or more of the asymmetric processors. A processor set identification function identifies an "indirect idle" set of processors which can participate as hosts in work reassignment to make use of a previously idle processor, and identifies an "indirect bump" set of processors which can participate as hosts in work reassignment to displace a lowest priority work unit previously executing - any work reassignment being initiated by an assigner means and comprising an optimized number of work reassignment steps reassigning work among one of the processor sets to accomplish a related assignment goal (making use of a previously idle processor, or displacing a lowest priority work unit).

There exist in the art many schemes for assigning work to a processor of a multiprocessor computer system where the goal is the highest utilization of the processors. In situations where the features of each processor are identical this problem of assigning work is rather straightforward and simple schemes based solely on the importance of the work (priority) perform well. Additionally, in this symmetric multiprocessor environment, schemes of decentralized assignment (where each processor is responsible for assigning its own work) can perform well. But in the case of asymmetric multiprocessors the assignment of work is much more complex. This complexity is caused by the fact that a given processor may be unable to execute a given work unit because of that work unit's need for a feature not present on the given processor. This situation is further exacerbated when the features required by a work unit dynamically change during execution, or if the processors may have their feature availability changed during operation, or even if the configuration of processors changes during operation. There are schemes, in the prior art, which do consider asymmetric multiprocessors when scheduling work units, but they tend to limit their schemes to only direct assignment. That is, when a processor becomes available for work these schemes will only choose ready work which is capable of executing on the available processor. If there is no ready work that can execute on the available processor, the available processor will remain idle, even though there may be some currently executing work which could be moved (redirected) to the available processor to be replaced by a ready piece of work. There are also some examples in the prior art, (for example U.S. Pat. No. 4,394,727 dated Jul. 19, 1983, Multiprocessor Task Dispatching Apparatus, by Roy L. Hoffman et al, assigned to the assignee of the present invention) where work will be moved on occasion, but only if the work replacing it is of a higher priority, thereby still leaving idle processors much of the time. In the prior art problems involving asymmetric assignments were thought to be too complex to solve efficiently or with adequate performance benefit to warrant the overhead of processing the movement of work between processors.

Method and apparatus for dynamic work reassignment among asymmetric, coupled processors