A method for fabricating a capacitor over a semiconductor substrate is disclosed. The method includes the steps of: forming an insulating layer over the semiconductor substrate; forming a contact opening through the insulating layer to expose a portion of the semiconductor substrate; forming a first polysilicon layer over the insulating layer and filling in the contact opening to electrically contact the semiconductor substrate; patterning the first polysilicon layer to the insulating layer surface, thereby forming a trench for defining a capacitor region; forming a thin polysilicon layer with a rugged surface over the first polysilicon layer and the insulating layer; forming a mask layer over the thin polysilicon layer, wherein the mask layer has a smaller thickness in the trench bottom than in other regions; removing the mask layer in the trench bottom through an anisotropical etch step; removing the uncovered portions of the thin polysilicon layer to expose the insulating layer surface; removing the mask layer, thereby forming a storage electrode consisting of the thin polysilicon layer and the first polysilicon layer; forming a dielectric layer over the storage electrode and the exposed insulating layer; and forming a second polysilicon layer over the dielectric layer.

1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more specifically, to a method for fabricating a capacitor in a dynamic random access memory (DRAM) cell.
2. Description of Related Art
DRAM is an important integrated circuit which has been widely utilized in the electronic information industry. Referring to FIG. 1, a DRAM cell includes a transistor T and a capacitor C. The source of the transistor T is connected to a corresponding bit line BL. The drain of the transistor T is connected to a storage electrode of the capacitor C. The gate is connected to a corresponding word line WL. An opposed electrode of the capacitor C is connected to a constant voltage source. There is a dielectric layer between the storage electrode and the opposed electrode. As known to those skilled in the art, the capacitor C is provided for data storage. Therefore, a large capacitance of the capacitor C is required for preventing data loss and improving the refresh rate.
In a conventional DRAM circuit which has fewer than 1 MB cells, a two-dimensional capacitor structure is utilized for data storage. This capacitor is known as a planar-type capacitor. However, the planar-type capacitor requires a very large base area; otherwise, the capacitance is insufficient. The structure is therefore inapplicable for a highly-integrated DRAM circuit. Accordingly, certain three-dimensional capacitor structures have been developed to satisfy the requirements of the high-integrated DRAM circuit which has, for example, more than 16M cells. Among the three-dimensional structures, a trench-type structure and a stack-type structure are the most popular. However, defects are unavoidably generated in the semiconductor substrate of a trench-type capacitor, thus increasing the leakage current. Moreover, as the aspect ratio of a trench increases, the etching rate of the trench is reduced, thereby affecting the productivity of the trench-type capacitor. Therefore, the trench-type capacitor is commercially not that popular as the stack-type capacitor which is free of the problems mentioned above. Many newly-developed techniques are modifications of the stack-type capacitor for the purpose of reducing device dimensions.
In order to increase the capacitance of a capacitor, the thickness of the dielectric layer should be reduced or the electrode surface area has to be increased. As the dielectric layer has been made as thin as possible, and has reached the physical limitation of about 50 .ANG. below which direct carrier tunneling will occur to affect the performance of the capacitor, efforts have been made to improve the capacitance by expanding the electrode surface area.
Among the modifications to the stack-type capacitor structure, a easy and effective method in which the electrode is formed to have a rugged surface has been developed to increase the surface area. However, since the rugged surface is formed before patterning the electrode, only the top region of the electrode retains the rugged structure. The rest of the rugged surface has been etched after the electrode patterning. The improvement of the surface area and the capacitance is therefore limited.
The steps of a conventional DRAM fabrication method will be described in accompaniment with FIG. 2A through FIG. 2C. Referring to FIG. 2A, the DRAM is fabricated over a semiconductor substrate 10 which is, for example, a silicon substrate. An active region is defined over the semiconductor substrate 10 by a field oxide layer 11. Then a gate oxide layer 12, a polysilicon layer 13 and a insulating layer 14 are successively formed over the substrate 10 and are patterned to be a gate structure. The gate structure is utilized as a mask for ion implantation, thereby forming lightly-doped regions 15a and 15b in the semiconductor substrate 10. Moreover, a spacer 16 is formed on sidewall of the gate structure by depositing and etching back a dielectric layer. The spacer 16 and the gate structure are further utilized as a mask for implanting ions in the semiconductor substrate 10, thereby forming heavily doped regions 17a and 17b. A transistor including a gate, a drain and a source region is therefore formed over the semiconductor substrate 10.
The structure of FIG. 2A is then covered by a first insulating layer 18 which is, for example, a deposited BPSG layer. The first insulating layer 18 is patterned to have a contact opening 19 (shown by dashed line in the figure) in which the source region 17a of the transistor is exposed. The contact opening 19 is filled with a conducting layer which electrically connects the source region 17a and extends over the insulating layer 18. The conducting layer is then patterned to be a bit line 20 of the memory device. Moreover, a second insulating layer 21 such as a BPSG layer is deposited over the first insulating layer 18 and the bit line 20. The second insulating layer 21 and the first insulating layer 18 are then both etched to form another contact opening 22 to expose the drain region 17b of the transistor.
The contact opening 22 is then filled with another conducting layer 23 which can be a doped polysilicon layer. The polysilicon layer 23 electrically contacts the drain region 17b of the transistor and extends over the BPSG layer 21. Then a thin conducting layer 24 with rugged surface is deposited over the conducting layer 23. The thin layer 24 can be a polysilicon layer formed by the low-pressure chemical vapor deposition (LPCVD) method.
Referring to FIG. 2B, the thin conducting layer 24 and the conducing layer 23 are patterned according to the capacitor region by a micro lithography method and etching method, thereby forming a storage electrode 25 which consists of the conducting layer 23a and the thin conducting layer 24a.
Referring to FIG. 2C, a dielectric layer 26 is formed over the storage electrode 25 and the exposed surface of the second insulating layer 21. The dielectric layer 26 can be an oxide layer, a nitride layer, a Ta.sub.2 O.sub.5 layer or a ferroelectric layer. Moreover, another conducting layer such as a CVD polysilicon layer is formed over the dielectric layer 26 and is patterned to be an opposite electrode 27 of the capacitor.
Obviously, the aforementioned fabrication method of a DRAM device forms the thin rugged layer 24 prior to patterning the storage electrode 25 of the capacitor. Therefore, the rugged structure exists merely on the top surface of the storage electrode 25. Since the sidewall of the storage electrode 25 has no rugged structure, the improvement of the capacitance is limited.

Method for fabricating a capactior in a DRAM cell


A method is provided, based on assigned drilling variables, for predicting the area of open region above a bed of cuttings resulting from drilling a high-angle well. The area of the bit used in drilling is compared with the area of the open region and drill pipe to determine a Hole-Cleaning Ratio. Occurrences of sticking of drill pipe or other drilling problems in prior-drilled wells are correlated with Hole Cleaning Ratio in those wells to determine a relationship for predicting risk of drilling problems in wells of interest. Risk factors so determined are used to modify conditions or equipment during drilling or to plan future wells.

1. Field of the Invention
This invention relates to the drilling or boring of wells in the earth. More specifically, a method is provided for analyzing and controlling the effects of accumulation of cuttings in the wellbore when drilling at an angle greater than about 50 degrees to vertical.
2. Description of Related Art
The process of boring or drilling in the earth produces particles of rock which must be removed from the borehole. One of the functions of the drilling fluid used in the drilling process is to carry these "cuttings" from the bit where they are created to the surface of the earth. In vertical or near-vertical wells, the drilling fluid is normally formulated to have viscosity high enough to decrease the settling velocity of cuttings to a value much less than the upward velocity of drilling fluid in the hole, so the cuttings will be efficiently carried from the well. Gel strength of the fluid is also normally formulated to prevent rapid fall of cuttings in the wellbore when fluid circulation is interrupted.
In recent years, there has been a major upswing in the drilling of wells in directions other than vertical. "High-angle" wells are drilled for hydrocarbon production from platforms constructed offshore and from pads built in the arctic. "Horizontal wells," a sub-class of high-angle wells, are drilled at angles near 90 degrees to vertical for a variety of reasons related to hydrocarbon production; they may also be drilled for environmental remediation and other purposes. Some high-angle wells may terminate at a location displaced thousands of feet horizontally from the surface location of the well. There is a very large economic incentive at times to push this horizontal displacement to the maximum distance achievable so that additional hydrocarbons can be recovered from existing surface facilities.
It has been recognized for many years that removal of the cuttings from the wellbore during drilling of high-angle wells poses a special problem. When the cuttings settle by force of gravity to the bottom of the hole, a "bed" of solids is formed along the bottom of the hole. The bed can become especially significant in larger size holes, where fluid velocities are lower. Experience from drilling high-angle wells shows that pipe sticking and related drilling problems are especially frequent in the larger holes (171/2-inch and 121/4-inch holes) drilled at angles above about 40-50 degrees.
Build-up of a bed of cuttings in the high-angle portion of wellbores, or, stated another way, failure to achieve sufficient "hole cleaning," can cause several types of problems. One problem at times may be that the amount of torque required to rotate the drill string increases to limit the ability to drill the well to the target location. Another is that there is difficulty in withdrawing and placing the drill string in the well. In the most unfavorable scenario, the amount of pull required to withdraw the drill string from the well increases to the point that the pipe is stuck in the well. This condition can be very expensive to remedy. A single stuck pipe incident may cost over one million dollars. It is estimated that stuck pipe costs in industry are in the range from 100 to 500 million dollars per year. In attempts to avoid such problems from insufficient hole-cleaning, drilling operators often include such maneuvers as "washing and reaming," wherein the drilling fluid is circulated and the drill string is rotated as the bit is introduced into the wellbore, and "backreaming," wherein the drilling fluid is circulated and the drill string is rotated as the bit is withdrawn from the wellbore. Other operations such as "wiper trips" or "pumping out of the hole" are performed to attempt to control the amount of cuttings accumulated in the wellbore. All these operations require time and can very significantly add to the cost of drilling a high-angle well.
In addition to excessive forces on the drill string, solids accumulation in the wellbore can also cause interference with running casing in the hole after drilling is complete and can cause excessive circulation pressures leading to loss of drilling fluid from the well bore.
Several studies in university and industry laboratories in recent years have been directed to hole-cleaning in high-angle wells. Recent reports have been published, for example, by J. T. Ford et al, SPE 20421, Society of Petroleum Engineers (Richardson, Tex.), 1990, and by T. R. Sifferman and T. E. Becker, SPE 20422, Society of Petroleum Engineers, 1990. There is no general agreement among investigators, however, on the factors which will cause bed height of cuttings in a high-angle well to increase or decrease. No methods are known that calculate the correct height of the bed of cuttings in a high-angle well.
U.S. Pat. No. 4,791,998 is directed to a method of avoiding stuck drilling equipment. The method is based on a statistical analysis of drilling variables in wells drilled in the same area, comparing wells in which sticking was experienced and not experienced, and modifying variables in a drilling well toward those conditions which the mathematical analysis indicates will not cause sticking.
There is a long-felt need for a method to select the most cost-effective values of drilling variables and conditions to drill a high-angle well where cuttings may accumulate in the wellbore. This method should allow a prediction of the height of a bed of cuttings in a well as drilling variables are adjusted. The method should consider, along with bed height, the size and configuration of drilling equipment in the hole and their effect on the likelihood of sticking the drill string in the hole. Such method is needed for planning the material and equipment which will be provided to drill a well and to adjust drilling variables while the well is being drilled. The method should be susceptible to further refinement by hindcasting drilling data from wells previously drilled to determine the relationship between well conditions and frequency of drilling problems. With such relationship, the risk of encountering drilling problems can be assessed and, when necessary, reduced with increasing confidence in wells of interest.

Method of controlling cuttings accumulation in high-angle wells


A method for upgrading an aromatics-containing charge composition boiling in the gasoline boiling range comprises i) contacting the charge composition with a nitrating agent under nitrating conditions to form a product comprising nitrated aromatics; ii) hydrogenating a feed containing the product of i) under conditions sufficient to substantially reduce the nitro group of the nitrated aromatics so as to form a product comprising aromatic amines, water and heavy amines; and iii) removing the water and heavy amines from the product of step ii) to provide a gasoline boiling range product of an octane rating greater than the charge composition.

The demand for gasoline as a motor fuel is one of the major factors which dictates the design and mode of operation of a modern petroleum refinery. The gasoline product from a refinery is derived from several sources within the refinery including, for example, gasoline from the catalytic cracking unit, straight run gasoline, gasoline obtained as a low boiling by-product from various refinery operations, especially catalytic processes such as catalytic dewaxing, and reformate. The octane number of the gasoline from these different sources varies according to the nature of the processing and the octane rating of the final gasoline pool will depend upon the octane ratings of the individual components in the pool as well as the proportions of these components. The increasing use of unleaded gasoline coupled with increasing engine efficiencies in road vehicles has led to a demand for increased gasoline pool octane which, in turn, makes it desirable to increase the octane values of the individual components of the pool. Although there are various ways of achieving this objective, some necessarily involve compromises which may render them less attractive in commercial refinery operation. For example, the octane rating of straight-run naphtha may be improved by reforming over a noble metal/acid catalyst, which converts aliphatic and cycloaliphatic hydrocarbons to higher octane aromatics. However, such treatment can entail a significant yield loss resulting from deleterious side reactions such as cracking and coking. Alternative measures for increasing pool octane are therefore still desirable.
Another trend which is perceptible in the petroleum refining industry is towards the reduction of benzene and other aromatics in the gasoline pool. In the United States, the Clean Air Act specifies various motor fuel content standards and similar measures are being considered in the European Community. Benzene is particularly prevalent in reformer gasoline, being a distinctive product of the reforming process, produced by the dehydrogenation of C.sub.6 cycloparaffins, the dehydrocyclization of straight chain paraffins of appropriate chain length (C.sub.6) and dealkylation of other aromatics. Accordingly, it would be desirable to provide an alternative to reforming of naphtha which would provide the desired increase in octane without increasing aromatics content or decreasing yield. It would also be desirable to treat a reformate prepared under low severity conditions which avoid severe yield losses, by enhancing its octane values without increasing aromatics content.
Aromatic amines possess higher blending octane values than their hydrocarbon analogues so that they are desirable components for the refinery gasoline pool. Amination of aromatic components present in a gasoline boiling range feedstock therefore represents an attractive means for providing a significant improvement in the octane rating of the gasoline pool without increasing its aromatics content. Preparation of aromatic amines by reducing nitro compounds is known in the art. The reduction of nitro compounds with hydrogen can be carried out in vapor or liquid phase over a variety of hydrogenation catalysts. Further information on these hydrogenation processes is found in Kirk-Othmer, Encyclopedia of Chemical Technology, Third Ed., Vol. 2 at pp. 355-376, in an article entitled "Amines by Reduction."

Gasoline upgrading by aromatics amination


Disclosed is an authentication mechanism that enables an information recipient to ascertain that the information comes from the sender it purports to be from. This mechanism integrates a private/public key pair with selection by the sender of a portion of its address. The sender derives its address from its public key, for example, by using a hash of the key. The recipient verifies the association between the address and the sender's private key. The recipient may retrieve the key from an insecure resource and know that it has the correct key because only that key can produce the sender's address in the message. The hash may be made larger than the sender-selectable portion of the address. The recipient may cache public key/address pairs and use the cache to detect brute force attacks and to survive denial of service attacks. The mechanism may be used to optimize security negotiation algorithms.

Authentication is an important issue in many types of network communications. Many messages are meaningful only if the recipient can verify the identity of the sender. In some cases, the recipient associates a particular characteristic with a sender's identity. When a message is received that is known to come from that sender, the recipient refers to the characteristic in deciding what action to take. For example, a company employee associates the characteristic "authority to issue certain orders" with the company's president. Upon receiving the message "Take tomorrow off," the employee treats the message with more respect if the message is known to come from the company president than if it came from an anonymous person. In another example, the recipient associates the characteristic "truth in reporting" with the identity of certain news outlets but not with other news outlets nor with the populace in general. Even if a message is received from a sender for whom the recipient has no pre-established association, the sender's identity may be meaningful in linking multiple messages together. For example, a police department receiving the message "False alarm: I'm not being robbed after all" would presumably accept the message at face value only if it could verify that the sender was indeed the same person who sent the earlier "Help! I'm being robbed!" message.
In network communications, an often used form of identity is the network address used by a device to identify itself on the network. Messages are typically tagged with this form of identity, which can be used by a recipient to address a message in response. However, a nefarious party may easily send a message with a deceptive sender's address. Without an authentication mechanism to verify that the sender's network address as contained in the message is actually the address where the message originated, this form of identity is vulnerable to fraudulent misrepresentation.
Protocols address the problem of fraudulent misrepresentation by implementing authentication services. The recipient of a message uses the authentication services to verify the identity of the sender of the message. The recipient then takes action based on the characteristics associated with the sender's identity. For example, the Internet Engineering Task Force Request for Comments (IETF RFC) 2401 "Security Architecture for the Internet Protocol" describes the use of IPsec authentication in restricting the acceptance of messages to those originating from authenticated senders. Other protocols provide similar authentication services. However, one perceived difficulty in implementing authentication is that some of these authentication services provide their security by means of quite complicated mechanisms. They come at a heavy perceived price in terms of a significant investment in administrative and communicative overhead.
The parent of the present application discloses a unilateral authentication mechanism that provides much of the security of heavyweight authentication mechanisms, but with lower administrative and communicative overhead. The present application discloses implementation options usable with the unilateral authentication mechanism and describes scenarios in which unilateral authentication may be profitably employed.

This patent is subject to a terminal disclaimer.

Methods and systems for unilateral authentication of messages


This disclosure discusses the forming of gate dielectrics in semi conductor devices, and more specifically to forming thin high-k dielectric films on silicon substrates typically using chemical vapor deposition or atomic layer deposition processes. The current invention forms a high-k dielectric film in a single film-forming step using a vapor phase silicon precursor in conjunction with a liquid phase metal precursor, a nitrogen source and an oxygen source for the deposition of a metal silicon oxy nitride (MSiON) film of desired stochiometry. The vapor phase silicon precursor is not coordinated to a metal allowing independent control over feeding of the metal source and the silicon source. Thus, the M/Si ratio can be easily varied over a wide range. Furthermore, the vapor phase silicon precursor, liquid phase metal precursor, nitrogen source and oxygen sources are chlorine free, eliminating the undesirable effects chlorine in the dielectric film and chloride by products in the reaction chamber and exhaust system. Furthermore, the vapor phase silicon precursor, nitrogen source and oxygen sources are carbon free, minimizing the incorporation of carbon in the dielectric film.

Manufacturing of semiconductor devices employs a thin gate dielectric (typically silicon dioxide) between the underlying silicon substrate and the gate electrode. Depositing a thin dielectric film on a silicon substrate forms a gate dielectric. Typical processes for growth of dielectric films include oxidation, chemical vapor deposition and atomic layer deposition processes. As integrated circuit devices shrink, the thickness of the gate dielectric needs to shrink proportionally. However, semiconductor manufacturers have reached the limit to which the thickness of conventional gate dielectric materials can be decreased without compromising the electrical characteristics. Rather than degrading the dielectric properties by using a silicon dioxide dielectric that is only a few atomic layers thick, equivalent dielectric performance can be achieved by substituting the silicon dioxide for a thicker layer of a new material exhibiting a higher dielectric constant. Therefore, new compositions or methods to produce a dielectric film with a higher dielectric constant than silicon dioxide (referred to as "high-k dielectrics") are required. These "high-k dielectrics" must have a low leakage current through the gate dielectric. Thus, it is desirable to develop new compositions and methods of depositing dielectric films with the required higher dielectric properties so that films with more than one or two layers of atoms can be deposited. Due to the requirements for thin dielectric films, having uniform coverage of material that is very high quality is critical to the performance of the gate dielectric.
Of particular interest is the formation of metal silicon oxynitride ("MSiON") films. Forming a MSiON dielectric film typically involves feeding a metal source, a silicon source, an oxygen source and a nitrogen source (collectively referred to herein as the "dielectric precursors") in the proper relative amounts to a deposition device wherein a silicon substrate is held at an elevated temperature. The dielectric precursors are fed to a deposition chamber through a "delivery system." A "delivery system" is the system of measuring and controlling the amounts of the various dielectric precursors being fed to the deposition chamber. Various delivery systems are known to one skilled in the art. Once in the deposition chamber, the dielectric precursors react to deposit a dielectric film on the silicon substrate in a "forming" step. A "forming" step or steps, as used in this application, is the step or steps wherein materials are deposited on the silicon substrate or wherein the molecular composition or structure of the film on the silicon substrate is modified. The "desired final composition" of the dielectric film is the precise chemical composition and atomic structure of the gate dielectric after the last forming step is complete. Compounds of hafnium, such as hafnium oxides, hafnium silicates and hafnium silicon oxy nitrides are currently the most promising high-k gate dielectric choices. The metal source for the forming process is typically a liquid precursor solution containing the desired metal in a solvent. Similarly, the silicon sources available in the art prior to the current invention typically use a liquid precursor containing the desired silicon compound in a solvent.
U.S. Patent Publication No. U.S. 2003/0207549, PAJ Patent Application No. 2000272283, U.S. Pat. No. 6,399,208, and U.S. Patent Publication No. 2003/0207549 disclose information relevant to forming dielectric films. However, these references suffer from one or more of the disadvantages discussed below.
Some gate dielectric-forming processes require multiple forming steps. For instance, a dielectric film may be formed by depositing a metal and silicon on a substrate in a first step followed by a second "post deposition step" wherein the composition or structure of the deposited metal/silicon film is modified to achieve the desired final composition of a MSiON gate dielectric film. An example of a post deposition step is rapid thermal annealing in an environment that is filled of nitrogen or ammonia. Because control of the film composition is important in dielectric film deposition processes, the fewer the steps, the better the control of the process, and the higher the quality (reflected by dielectric constant, density, contamination, composition and other quality control properties) and conformality (the ability of the film to evenly deposit on all surfaces and shapes of substrate) of the dielectric film.
It is known in the art that any silicon sources that contain carbon in the ligands can lead to carbon in the film and result in degraded electrical properties. Furthermore, any chlorine incorporated in dielectric films is undesirable due to its harmful effect on the electrical properties of the film and the stability of the chlorine in the film (the stability makes it hard to remove chlorine from the dielectric film). Also, the presence of chlorine in the silicon or metal source results in the generation of chloride based particulates in the reaction chamber and deposits in the exhaust system. Thus, to achieve the ideal electrical properties and to minimize particulate generation and tool downtime due to exhaust system cleaning, it is desirable to deposit dielectric films from precursors free of carbon or chlorine in the atomic structure.
The physical properties of a MSiON dielectric film are affected by the metal (M) to silicon (Si) ratio, or M/Si. It is desirable to be able to control the M/Si ratio over a broad range. Thus, it is important to be able to vary the metal and silicon feed independently to achieve the broadest possible M/Si ratios. Some processes use a silicon source precursor that also contains some amount of the metal that is to be deposited. The problem encountered is that changes in the metal-containing silicon source precursor feed rate changes the total amount of the metal fed to the process (due to the metal contained in the silicon precursor). This limits the controllability of the deposition process because the silicon feed rate cannot be changed without also affecting the total amount of metal being fed to the deposition chamber. Furthermore, the ratio of M/Si that can be fed is limited by the composition of the metal in the silicon source precursor. Thus a change in desired M/Si ratio can require changing precursor solutions being fed to the process.
Vaporizing silicon precursor streams can also lead to problems with film composition control. Referring to FIG. 2, some processes in the art use a vaporizer to vaporize the liquid silicon source. The vaporized stream is then fed to the deposition chamber. When the metal source and the silicon source are supplied in liquid form, they must both be vaporized before being introduced into the deposition chamber. Vaporizing two different streams can lead to variable feed concentrations and formation of silicon or metal residues in the vaporizer that can adversely affect the conformality of the film composition. Differences in vaporization of the silicon and metal sources can also lead to compositional gradients in the dielectric.
Bubbling a carrier gas through a liquid precursor can also cause quality problems. In some processes, a silicon source is fed by bubbling a carrier gas through a liquid silicon source. A vaporizer is not used in these processes because the vapor pressure of the silicon source is high enough to be transported as a vapor in a mixture with the carrier gas. In these processes, the composition of the stream transporting the silicon source to the deposition chamber can vary with temperature and pressure in the bubbling system. This variability in stream composition leads to variability in the composition of the dielectric film, which is a significant quality control issue.
For the foregoing reasons, it is desirable to form a dielectric film of the final desired composition in a single forming step. Furthermore, the film should be free of any chlorine and contain as little carbon as possible in the molecular structure. It is also desirable to use a silicon source that is free of any deposition metals so the silicon source feed and the metal source feed may be independently controlled. Finally, it is desirable to have a silicon source that is in the vapor phase at process feed conditions to avoid the need to vaporize a liquid silicon source or bubble a carrier gas through a liquid source.

Method for novel deposition of high-k MSiON dielectric films


A rotatable USB female connector is used inside the computer case to connect with a USB male connector. Since the female connector is rotatable, it can be connected to electronic devices with various kinds of USB male connectors. The structure includes a support base, a shaft sheath, and a USB female connector. The support base is fixed on one side of the computer case. The shaft sheath is pivotally installed in the support base and rotatable with respect to the support base. The USB female connector is disposed in the shaft sheath to be connected with a USB male connector for data transmissions.

1. Field of Invention
The invention relates to the structure of a USB female connector and, in particular, to the structure of a rotatable USB female connector.
2. Related Art
Advances in computer technology have made human life much easier. Many computer-related products, such as electronic dictionaries, digital cameras, mobile phones with cameras, and card readers, are very popular in daily life. Due to their limitation in storage capacity, they are often connected to a computer for data transfer between the products and the computer. These data transfers are usually done via USB, infrared, Bluetooth, or network means.
Universal serial bus (USB) is a data transmission standard set by IBM, Intel, Microsoft, NEC, Compaq, DEC, and Northern Telecom for connections between devices with USB connectors, such as pen drives, removable hard drives, digital cameras, mice, keyboards, scanners, and printers. The USB interface has many advantages, such as high speeds, easy connections, plug-and-play (PnP) possible, no need for any external power, supporting many devices, and highly compatible. Therefore, the USB has become a standard port on personal computers.
For the convenience of carrying data, a portable removable disk, called the pen drive, with a smaller volume but larger storage capacity is invented. This kind of pen drives is not portable and small in size, and has the USB interface. It can be plugged and played without any self-supplying power source. It can be used as a means for transmissions between a computer and computer-related products. Since, the pen drive has the characteristics of high transmission speeds and stability, the user therefore does not need to carry a large-volume electronic device. Due to its large memory space, it can be conveniently used as a storage device. In comparison with the conventional hard disk drive, the pen drive is stronger in structure and less fragile. Therefore, using the pen drive as a means for data storage and transmissions can reduce the risk of loss or damages.
Since almost all the current electronic products use the USB as the interface with the computer, the computer mainframe is often equipped with USB female connectors. An example of the conventional USB female connector is shown in FIG. 1A. In general, the notebook case 10 is usually provided with a USB female connector 60 for computer-related products, such as the pen drive 72 to connect. After a USB male connector 70 is plugged into the USB female connector 60, data can be transmitted. In order to win more consumers, the manufacturers often change the appearance of the pen drive 72. Although this can attract some consumers, thick pen drives 72 are likely to encounter some problem in use. Suppose the height from the lower edge of the USB make connector 70 to the lower edge of the case of the pen drive 72 is H and the height from the lower edge of the USB female connector 60 to the lower edge of the computer case 10 is h. If H is greater than h, then when the pen drive 72 is plugged into the USB female connector 60 on the notebook computer case 10, the computer case 10 is pushed up, resulting in inconvenience in use.
Please refer to FIG. 1B for an application of the conventional USB female connector. Some notebook computers have two USB female connectors 60. Since the notebook computers are designed to be more compact, the two USB female connectors 60 are often disposed very close to each other in order to save space. In this case, as one pen drive 72 is inserted into one of the USB female connector 60, only the other USB female connector 60 is left for another pen drive 74. If the widths of the two pen drives 72, 74 are too large, then the second pen drive 74 cannot be inserted into the USB female connector 60, as shown in the drawing. It is thus meaningless to have two USB female connectors 60 on the notebook computer.
The conventional pen drive or card reader with the USB interface is not provided with a rotatable USB male connector. R.O.C. Pat. No. M249179 discloses a portable storage device with a rotatable connector. The device includes a case whose front end is formed with a hole and an electrically connected rotator disposed inside the case hole, the electrically connected rotator using two relatively rotating connecting pieces to transmit electrical signals; an electronic storage device disposed inside the case, the electronic storage device being electrically coupled to one of the connecting pieces of the electrically connected rotator; an electrical connector disposed on the connecting piece opposite to the electrically connector rotator so that the electrical connector and the electronic storage device exchange electrical signals via the electrically connector rotator. This enables the electrical connector to rotate. The design of a rotatable USB male connector is for the convenience of inserting the device into a computer or other related peripheral equipment with a USB female connector. However, the electronic device with a rotatable USB male connector is more expensive. Even though there are other more compact pen drives on the market, it is impractical for users who already have pen drives with larger sizes to purchase compact pen drives simply for fitting the USB female connectors. If the orientation of the USB female connector can be changed, the development of pen drives will be greatly advanced and the users will be less restricted by the inconvenience.

Structure of a rotatable USB female connector


Techniques for controlling engine speed based on alternator duty cycle to increase overall vehicle efficiency involve increasing engine speed only after the alternator duty cycle exceeds a duty cycle threshold that is less than the maximum duty cycle of the alternator. In this manner, quantity and/or degree of engine speed increases are decreased, which increases vehicle efficiency (e.g., increased fuel economy). Moreover, by utilizing a duty cycle threshold that is less than the maximum alternator duty cycle threshold, voltage drops at an electrical system are avoided. These techniques are also applicable to both conventional alternators and smart alternators having on-board diagnostic circuitry.

An engine combusts an air/fuel mixture within cylinders to drive pistons and generate drive torque for propelling a vehicle. An alternator of the vehicle is configured convert mechanical energy generated by the engine into electrical energy for powering components of the engine and/or the vehicle. Examples of these components include a heating, ventilating, and air conditioning (HVAC) system and a power steering system. In one implementation, the alternator includes a rotating magnetic member ("a rotor") that rotates between a set of coil conductors ("a stator"), thereby generating an alternating current.
Because the alternator is powered by the engine, the engine has to compensate for the alternator load. For example, the engine has to increase its speed in order to maintain the desired output of the alternator. Conventional engine control systems increase the engine speed to a predetermined level (e.g., via calibration) to compensate for a worst-case electrical load (e.g., all loads at maximum levels). When the electrical load on the alternator is less than this worst-case load, however, the engine is still running at the predetermined engine speed level and therefore the vehicle as a whole is operating inefficiently. Thus, while such engine control systems work for their intended purpose, there remains a need for improvement in the relevant art.

Techniques for controlling engine speed based on alternator duty cycle to increase vehicle efficiency


Methods and apparatuses for generating an OVSF code are disclosed. A proposed method for generating a current code chip of an OVSF code includes: determining a correlation factor between the current code chip and a preceding code chip of the OVSF code; and generating the current code chip according to the preceding code chip and the correlation factor.

The present invention relates to spread spectrum systems, and more particularly, to methods and apparatuses for generating OVSF (orthogonal variable spreading factor) codes.
In spread spectrum systems, such as CDMA-2000 or UMTS (universal mobile telephone system), OVSF code is usually employed as the spreading code for use in both the spreading operations at the transmitter end and the de-spreading operations at the receiver end. The OVSF codes ensure orthogonality between different data channels in a multi-code transmission. The length of the OVSF code is called the spreading factor (SF). In different transmissions, different spreading factors may be adopted to accomplish the multi-rate transmission.
Please refer to FIG. 1, which shows a simplified structure of a conventional OVSF code tree 100. In FIG. 1, CSF,x denotes the OVSF code with a spreading factor SF=2k, where x is the code index of the OVSF code and k is the layer number. In other words, CSF,x is the x-th OVSF code in the layer k where x=0, 1˜SF−1. The mother codes of a specific OVSF code are the lower layer codes on the path from the specific OVSF code to the root code C1,0, and the descendent codes are those produced from the specific OVSF code. For example, the mother codes of the OVSF code C8,4 are codes C4,2, C2,1 and C1,0, and the descendent codes of the OVSF code C4,3 are codes C8,6, C8,7 and their descendent codes.
Any two OVSF codes at the same layer are orthogonal and any two OVSF codes at different layers are orthogonal except for the case that one of them is the mother code or the descendent code of another one. Two OVSF codes with different spreading factors are therefore not orthogonal when they are on the same branch of the code tree. When a specific OVSF code is assigned, its mother codes and descendent codes cannot be assigned in the same channel since they are not orthogonal to each other.
The OVSF codes are conventionally generated recursively from the code tree 100 as shown in FIG. 1. According to the related art, each of the OVSF codes in the code tree 100 must be held in a memory. This means that a memory of considerable capacity is required in order to hold all of the OVSF codes. In view of the foregoing, an efficient method for generating the required OVSF codes instead of maintaining the whole code tree in the memory is needed.

Method and apparatus for OVSF code generation


An attachable watercraft chair. The attachable watercraft chair includes a chair formed by a back member and a seat member that are pivotally connected. The back member has a first end placed distally to the seat member and a second end placed proximally to the seat member. A first pair of brackets are connected to the back member. The first pair of brackets have suction cups mounted on them. Also, a second pair of brackets are connected to the back member. The second pair of brackets have a support bar that spans across the back member. The attachable watercraft chair can be attached and removed from a watercraft.

The present invention relates to an attachable watercraft chair. Many people enjoy going on watercraft with their family and friends. When people go on watercraft, they may want to enter the water to swim or to cool off. When a person enters the open water, however, they may wish to rest on stable surface. Usually, this means that the person must climb out of the water onto the watercraft in order to sit or rest on a stable surface. Alternatively, flotation devices may be utilized in recreational aquatic activities. These devices, however, are unstable by nature and can drift in currents. This would require the individual to swim back to the watercraft, which can be dangerous if the individual is tired.
Constantly getting in and out of the water can be frustrating and inconvenient, as pulling oneself out of water requires physical exertion. Additionally, it can be uncomfortable to emerge from the water, as a person can be cold when they emerge. Re-entering can also be inconvenient, particularly when the individual has already taken time to adjust to the temperature of the water. As such, there is a defined need in the known art for a device that will allow an individual to rest in the water while engaging in recreational aquatic activities.


A plurality of HDDs 12-1˜12-n connected around a host 10 can be made to directly communicate with each other. For example, an HDD 12-1 makes another HDD to perform long distance seek using this communication line and measures the influence of vibration caused at that time. The measurement result is formed into a transfer function indicating the position change of the head of the relevant HDD against the operation of another HDD. An HDD is actually driven by a current value obtained by correcting the normal driving current of the driving motor of the head by the transfer function.

1. Field of the Invention
The present invention relates to a disk device installed in a server or the like.
2. Description of the Related Art
Today an information processing technology advances and information processing devices are widely used. In such a situation, the large capacity of servers for electronically providing services is promoted and the collective process of lots of information is requested. In order to collectively process lots of information, a hard disk for storing a large amount of data is needed. Therefore, a server in which a plurality of hard disk devices is installed in the same cabinet is widely used.
FIG. 1 shows the conceptual configuration of the conventional server.
As shown in FIG. 1, a server 11 comprises a host 10 for performing a major data process and n hard disk drives (HDD drives-1˜n) for data to be processed by the host 10, already processed data and the like. Conventionally, each hard disk drive is directly connected to the host 10 and information is exchanged between the host 10 and each hard disk drive. In this case, no internal information is bi-directionally communicated/exchanged among the hard disk drives. However, if a plurality of hard disk drives is installed in the same cabinet, vibration caused by the operation of a specific hard disk drive sometimes travels to another hard disk drive. In this case, vibration caused by the seek operation of an adjacent hard disk drive affects the positioning of the head of another hard disk drive.
Conventionally, since a plurality of hard disk drives are independently operated, no internal information cannot be bi-directionally communicated/exchanged among the hard disk drives. When external vibration due to the operation of another hard disk drive is large, writing occurs in the relevant hard disk drive. In this case, there is a possibility that swing writing (a state where the head swings during writing) or distorted writing (a state where the head position deviates from the home position) occurs in the relevant hard disk drive. There is the concept of an autonomous disk, in which an interface or interface controller in its higher-layer exchanges information among hard disk drives. In this case, the response of a hard disk delays by a time taken for information to be exchanged among hard disk drives via the higher layer.

Disk device with bi-directional communication function


According to the breaking detection processing, it is determined that (A) iu of AC current (absolute value) supplied to a motor is less than 0.5 amperes or iv thereof is less 0.5 amperes or iw thereof is less than 0.5 amperes, (B) the angular velocity of the motor is 1 rad/s or more and (C) at least any one of the current instruction values id*, iq* is 5 amperes or more in a step and then, a period in which all these three conditions (A)–(C) are satisfied at the same time is determined in another step. Consequently, it is determined that any one of the power supply lines in the motor is broken and a breaking detection flag is set to ON so as to detect the breaking.

1. Field of the Invention
The present invention relates to a breaking detection method for the power supply line of a motor, which is connected to the motor driven by AC current produced by converting from two phase to three or higher phase, a motor control apparatus and electric power steering mechanism using the same and a computer program thereof.
2. Description of the Related Art
Japanese Patent Application No.HEI11-355585, which is proposed by this inventor also, has disclosed a motor control apparatus for controlling a motor driven by AC current produced by converting from two phase to three or higher phase, for example, to three phase.
In such a motor control apparatus, a current flowing through phase u and phase v of a brushless DC motor is detected by a current detector and after amplified with a predetermined gain, that currents are converted to current detection values iu, iv by an A/D converting circuit and the respective current detection values iu, iv are fetched into a d/q converting portion so as to execute d/q conversion (two-phase conversion). Then, by feeding the current values id, iq obtained thereby back to current instruction values, d-axis current instruction value and q-axis current instruction value, deviations ΔId, ΔIq are obtained and supplied to proportional integration control. With these deviations ΔId, ΔIq, absence/presence of a current flowing through each phase (phase u, phase v, phase w) of the brushless DC motor or absence/presence of a breaking in the power supply line is monitored,
In the meantime, the d/q conversion refers to a method in which while orthogonal coordinates are set with the same direction as magnetic flux of a motor rotator as axis d and a direction perpendicular to this axis d as axis q, AC is calculated as DC by copying the vector of AC current flowing through each phase to that orthogonal coordinates.
However, the conventional motor control apparatus described above monitors which of power supply lines (phase u, phase v, phase w) of AC current is broken or whether or not the current value of each of the current detection values iu, iv, iw becomes zero with the current deviations ΔId, ΔIq on the axis d-q, as shown in FIG. 4(A). For example, because the current detection value iu becomes zero if the power supply line of phase u is broken as shown in FIG. 4(B), the breaking in the power supply line of phase u is detected by the current deviations ΔId, ΔIq obtained by this d/q conversion.
Because usually, this current detection value iu deviates to both polarities of positive and negative as sine wave, the current value becomes almost zero when a rotation angle θ, which crosses zero, is located in the interval of α even if the power supply line is not broken (see FIG. 4). Thus, even if the breaking of the power supply line can be detected when the rotation angle θ of the motor is in the interval of β, the breaking cannot be detected when the rotation angle θ is in the interval of α. That is, there has been produced such a problem that depending upon a detection timing, absence/presence of a breaking of the power supply line cannot be monitored with the current deviations ΔId, ΔIq on the axis d-q alone.

Motor power supply line breaking detection method, motor control apparatus and electric power steering mechanism using the same and computer program thereof


Electronic device, accessory, and method for detecting an accessory are provided. The electronic device includes a connector, a control unit, and an audio processing unit. The connector is configured to connect to an accessory and has an audio contact. The control unit has first and second terminals, which are coupled to the audio contact. The control unit is configured to send a command, which is represented by a first serial digital signal, to the accessory through the first terminal and audio contact when the accessory is electrically connected to the connector, and to receive accessory data, which is represented by a second serial digital signal and generated by the accessory in response to the command, through the second terminal and audio contact. The audio processing unit is coupled between the audio contact and control unit, and configured to receive an audio signal from the accessory through the audio contact.

1. Technical Field
The disclosure relates to an electronic device, an accessory, and a method for detecting an accessory.
2. Description of the Related Art
Accessories, e.g. headsets, microphones and speakers, with or without a remote control function are convenient for users to use electronic devices, such as multimedia players, personal digital assistants (PDA), smart phones, mobile phones and tablet computers, with versatile functionalities, such as listening to music, recording sounds, and receiving a phone call.
The conventional detecting mechanism used by electronic devices for identifying accessories, e.g. different headsets with a microphone and different headsets without a microphone, or for identifying different control functions of an accessory is according to a signal level detected through an audio jack (e.g., by way of analog approach). Different electronic device manufacturers may have their own specifications to define detected voltage levels for the accessories. In some situations, the conventional detecting mechanism used by an electronic device for identifying accessories made by "A" company may make misjudgment if the consumed current of an accessory made by "B" company is the same as that of an accessory made by the "A" company. In addition, conventional detecting mechanism has no extensibility since the tolerance of the consuming current (e.g., for MIC) is too large. The conventional detecting method could only detect four different accessories and support three remote control buttons, e.g., Back button, Play/Stop button and Forward button. Further, since the detection is by way of voltage detection, the electronic device needs at least 0.5 seconds to detect the connection of the accessory.


The invention provides for a powered hand held apparatus for sharpening ice skate blades having an elongated frame with a drive pulley located at one and, and a driven pulley located at the other end. An abrasive grinding belt loops over the pulleys and passes over a convex grinding surface aligned with the pulleys. The pulleys, frame, drive belt, grinding belt and electric motor are contained in a housing having a skate guidance slot such that when a skate is inserted into the slot, the bottom edge of the skate is directed to the abrasive belt at the convex grinding surface.

The usual method for sharpening skate blades involves the use of a motor driven grinding machine. Such machines generally work by subjecting the edge of the ice skate blade to a large rotating grinding wheel at a fixed and constant angle. These grinding machines are large, heavy and not portable. Consequently, such machines are generally not owned and operated by individual skaters, rather they are found in such places as sports equipment stores and ice arenas.
There have been attempts to create manual handheld skate sharpening devices that are compact enough to fit into a bag or a pocket. They are usually operated by pushing the device along the length of the skate blade which subjects the bottom edge of the skate blade to a grinding element. Because of the stationary, or relatively slowly rotating grinding surface, such devices have limited performance capabilities and do not sharpen as well as their powered counterparts. Such devices are often unwieldy to use and impractical for users who lack the strength to move the device along the blade with sufficient force.
Attempts have also been made to design portable or handheld powered skate sharpening devices. Many are adaptable to be affixed to powered tools such as drills. These devices all utilize the power source to rotate a hard grinding element against the skate blade. To facilitate attachment to the power tool, many use an elongated arm that is connected to a drive arbor that rotates the grinding stone. The use of such an elongated arrangement reduces stability and can result in the grinding stone vibrating or bouncing as it moves against the blade edge. This results in reduced sharpening efficiency and can cause the stone to dig into the blade or 'bite' which results in burrs and nicks in the blade.
Further, many of these powered portable sharpening devices apply the grinding stone transversely to the skate blade. This means that scratches and aberrations caused by the stone during the sharpening are perpendicular to the skate blade. This reduces the gliding efficiency of the skate blade.
Another problem with many of the powered portable sharpening devices is that of inadequate stability and insufficient guidance during the application of the grinding stone to the skate edge. When the skate edge is applied to the grinding surface there is significant vibration or chatter, and accordingly there will be a tendency for the skate blade and the sharpener to move. Any such movement will reduce the trueness of the sharpened edge. Ideally, the blade must be subjected to the grinding surface at a constant angle and a constant pressure. Many of the powered portable sharpening devices require the device to be mounted on a fixed horizontal surface such as a table to facilitate steady guidance of the blade onto the grinding surface. Such devices are generally impractical to use in the locker room setting and unduly limit the users ability to place the device in their bag and use it prior to skating. Further, if a fixed horizontal surface is unavailable, the user will be unable to maintain stability and guidance during the sharpening process.
A further problem with the existing powered portable sharpening devices is wear of the grinding elements. As the grinding profile on the element wears it will reduce the ability of the device to deliver a consistent grind profile. Regular replacement of the grinding element is inconvenient and expensive.
There is a need in the art for a powered portable skate-sharpening device that mitigates the disadvantages of the prior art.


A computer system comprises first and second computer boards, each having a processor, onboard memory, an onboard bus, e.g. a processor bus, and a bus-to-bus bridge for interconnecting the onboard bus with an external bus; the boards have remote slave drivers, and communication drivers, comprising communication management functions, and forming communication chains or channels between the remote slave drivers and the onboard memories.

The invention relates to a bus communication architecture, more particularly for distributed and/or multi-computing systems.
Existing input/output busses, e.g. the PCI I/O bus, are basically designed to interconnect a processor board with input/output boards ("devices"), e.g. hard disk controllers. Bus bridges may be used in a number of cases: for example, a system-to-PCI bus bridge may be provided between a processor or system bus within a board and the PCI bus itself; a PCI-to-PCI bus bridge may be used where the number of existing devices is higher than the maximum connection capability of a single PCI bus; various other bus bridges may also be used where connection to another bus operating differently is desired, for example PCI to ISA, or PCI to SCSI.
Generally, a PCI I/O bus provides parallel processing for a plurality of boards, including I/O boards, and one or more processor boards. Where several processor boards are present, one of them may act as a master board.
Communication between the boards may be enabled by providing in each board a memory area which is made accessible from the bus, or, in other words, "exported" on the bus. A communication mechanism is also necessary. An example of such a mechanism has been proposed in: "Compact PCI, Multi-Computing Interface Specification", PICMG 2.14 D0.60, May 12, 2000, PCI Industrial Computer Manufacturers Group (in short "PICMG"). Although interesting, the PICMG approach appears to be much hardware-dependent, and therefore raises certain problems, for example where use on a different bus architecture may be required.

Bus communication architecture, in particular for multicomputing systems


A reader (20) for a magnetic card for an automated teller machine (40) or other self-service financial terminal comprises a magnetic reading head (22), a wave shaper (26), and a data memory (28) to supply card-related data to a central authorization position. A wave shape monitor (30) is preset with a threshold amplitude, and detects the amplitude of analogue signals from the wave shaper; if the signals are readable but below the threshold level, the same magnetic reading head (22) or a different magnetic head (34) is instructed to rewrite the magnetic data on the card.

The invention relates to a magnetic card read operated by a card carrying magnetic data. Such data may be authorization data, e.g. for use with a self-service financial terminal such as an automated teller machine (ATM), or may be data on a magnetic stripe `Smart Card` or electronic purse.
An advantage of such a card is the ease with which magnetic data can be written to the card, usually in a magnetic stripe, but unfortunately the converse is also true, and the data is easy to erase. Such an erasure can occur when the card is placed in close proximity to the magnetic clasp frequently used on handbags and pocket books. The damage may initially be slight, so that the card remains usable, but repeated exposure may cause cumulative damage and eventually the magnetic data will be unreadable. The card will then have to be replaced.


A digital video interface receiver adjusts a transfer function of a phase-locked loop circuit having a programmable charge pump, a programmable phase-locked loop filter, or a programmable gain voltage controlled oscillator. The digital video interface receiver monitors and detects errors in a data stream associated with the phase-locked loop circuit. Moreover, the digital video interface receiver changes the transfer function of the phase-locked loop circuit, in response to the detected errors, by changing parameters associated with the programmable charge pump, the programmable phase-locked loop filter, or the programmable gain voltage controlled oscillator of the phase-locked loop circuit so as to change the transfer function of the phase-locked loop circuit.

A digital video interface is a standard being used for a number of video applications that require high frequency video data transmission from one integrated circuit board to another. The digital video interface standard uses transition minimized differential signals to accomplish this task.
Conventionally, the digital video interface transmitter encodes the data that is sent to a digital video interface receiver to reduce electromagnetic interference. The encoding is done to reduce the occurrence of high frequency transitions that would lead to increased electromagnetic interference levels.
Although the use of a digital video interface transmitter and a digital video interface receiver reduce electromagnetic interference, there is no standard digital video interface transmitter or digital video interface receiver, thereby creating a multitude of different devices that operate differently from the other. Due to these variations in the currently available digital video interface transmitters and/or digital video interface receivers, it has become very difficult to design a system, in particular, a receiver that is compatible (error free) with all the available transmitters.
The digital video interface standard defines an operating bandwidth for the transmitter and receiver to follow. However, there are transmitters that operate at the edge of the standard, possibly falling outside of this bandwidth definition. Transmitters that operate in these regions often create jitter patterns that a receiver operating within the digital video interface standard cannot track. When the receiver cannot track the jitter of the data, errors will occur during the data recovery process.
Generally, a conventional digital video interface transmitter sends three transition minimized differential data signals and a transition minimized differential clock signal to a digital video interface receiver. The conventional digital video interface receiver incorporates a data recovery algorithm to correctly acquire the data. The conventional digital video interface transmitter uses an internally generated phase lock loop (PLL) clock signal to latch out the data. This data along with a clock signal is sent to the conventional digital video interface receiver. The digital video interface receiver creates a clock signal derived from the transmitted clock signal to latch in the data.
Conventionally, two basic clock techniques have been used in conventional digital video interface transmitters to send the clock to the digital video interface receiver. The most common and practical way is to send a clock signal that has been generated by the same phase lock loop which latched out the data (or one that has been divided down from that phase lock loop). This will help to ensure that the clock signal and data are synchronous/coherent and have the same jitter characteristics. An example of such a conventional technique is illustrated in FIG. 1.
As illustrated in FIG. 1, the conventional digital video interface transmitter receives data. The data is then latched out from a latch 10. The data is latched out from the latch 10 in response to a clock signal from a phase lock loop circuit 50. The phase lock loop circuit 50 also creates a clock signal that is transmitter to a digital video interface receiver.
The latched out data, of FIG. 1, has the same jitter characteristics as the phase lock loop circuit 50, and the clock signal that is sent to the receiver also has the same jitter characteristics. As long as the bandwidth of the receiver's phase lock loop circuit 40 can track this jitter, data from the digital video interface transmitter should be latched in correctly by latch 30.
Another conventional way to send the clock signal to the digital video interface receiver is illustrated in FIG. 2. As illustrated in FIG. 2, the conventional digital video interface transmitter transmits the clock signal before it goes through the transmitter's phase lock loop circuit 20
Moreover, as illustrated in FIG. 2, the conventional digital video interface transmitter receives data. The data is then latched out from a latch 10. The data is latched out from the latch 10 in response to a clock signal from a phase lock loop circuit 20. This technique does not ensure that the data and clock signal are synchronous/coherent, causing the data and clock signal to have different jitter patterns and making it more difficult for the conventional digital video interface receiver to acquire the correct data.
For this technique, as illustrated in FIG. 2, to work successfully the conventional digital video interface receiver must understand the properties of the transmitter's phase lock loop circuit 20. The jitter of the data leaving the transmitter is highly based on the transmitter's phase lock loop circuit 20 transfer function.
The problem with this technique can be seen by the illustrations of FIGS. 3 through 5. As illustrated in FIG. 3, the frequency of a typical clock signal utilized by a digital video interface transmitter includes jitter. The frequency of the clock signal is fN. The jitter is represented by the spread of the trace around the frequency of the clock signal (A). The jitter is shown by the arrows. If there was no jitter in the signal, the trace would be a single peak at the frequency of the clock signal, fN, with no spread.
This clock signal is processed by a phase lock loop circuit having a transfer function, H(s), illustrated in FIG. 4. The clock signal is convoluted with the transfer function, H(s), in phase lock loop circuit to produce the signal as illustrated in FIG. 5. The convoluted signal includes an unwanted or unpredictable jitter represented by B. The unwanted or unpredictable jitter is transferred to the data being latched.
If the clock signal of FIG. 3 is transmitted directly to the digital video interface receiver's phase lock loop circuit, this signal will not include information associated with unwanted or unpredictable jitter represented by B of FIG. 5. The received data will have been processed with this unwanted or unpredictable jitter, but the digital video interface receiver's phase lock loop circuit will be unaware of such a situation due to the absence of this information in the transmitted clock signal prior to it being processed by the digital video interface transmitter's phase lock loop circuit.
Thus, the digital video interface receiver's phase lock loop transfer function will be different from the digital video interface transmitter's phase lock loop transfer function, causing unwanted errors, based upon the differences in transfer functions, and loss of data
In an ideal situation, the phase lock loop circuit should have a small amount of jitter, relative to the input clock and its operating frequency. However, for certain digital video interface transmitter designs the phase lock loop design is done such to add unwanted jitter to the latched out data. This dependency will cause each phase lock loop transmitter design to have a slightly different transfer function. If the clock that is sent to the digital video interface receiver does not go through the phase lock loop, the jitter pattern of the data cannot be predicted.
For the digital video interface receiver to be most effective in receiving the correct data, the transfer function on the digital video interface receiver's phase lock loop should match the digital video interface transmitter's phase lock loop transfer function. This will allow the reference clock that goes into the phase lock loop in the digital video interface transmitter to go through the same phase lock loop on the digital video interface receiver, thus creating a matching transfer function.
However, since different manufactures of digital video interface transmitters will have a different phase lock loop architecture, one phase lock loop design for a digital video interface receiver may not be robust enough to track all digital video interface transmitters. If the digital video interface receiver's phase lock loop transfer function is different, unwanted errors may occur based upon the differences in transfer functions. The errors will produce loss of data.
Therefore, it is desirable to provide a digital video interface receiver that is compatible with any digital video interface transmitter. Moreover, it is desirable to provide a phase lock loop design for a digital video interface receiver that is able to track all digital video interface transmitters. Lastly, it is desirable to provide a phase lock loop design for a digital video interface receiver that has an adaptable transfer function so that the phase lock loop design for the digital video interface receiver is able to track all digital video interface transmitters without producing unwanted errors, based upon the differences in transfer functions, and loss of data.

Adaptable phase lock loop transfer function for digital video interface


A static random access memory (SRAM) includes a memory array, a sense amplifier circuit, a replica circuit and a dummy cell. The replica circuit has the same elements as memory cells, and includes plural replica cells which output a signal whose level corresponds to the number of stages provided to a common replica bit line. The dummy cell is connected as a load with the common replica bit line. The source of a drive transistor of the dummy cell is connected with a power source which is at the High level. This suppresses a leak current flowing from a replica bit line to the dummy cell.

1. Field of the Invention
The present invention relates to a semiconductor memory device which generates, by means of a replica circuit comprising a replica cell whose structure is identical to that of a memory cell which is contained in a memory array, a start-up timing signal for a sense amplifier circuit.
2. Background Art
There are a number of methods for a conventional semiconductor memory device to generate a timing signal for a sense amplifier which amplifies data read from a memory cell and ensures that the timing of reading from a memory cell follows changes attributable to a process, a voltage, etc. Among these is a method of generating a timing signal using a replica circuit (See Patent Literature 1 and Patent Literature 2 for instance). This method will now be described.
FIG. 8 is a functional block diagram which shows one example of the structure of a semiconductor memory device which uses a replica circuit. In FIG. 8, the semiconductor memory device comprises a memory control circuit 100, a memory array 102 formed by plural SRAM memory cells 101, a sense amplifier circuit 103 which amplifies and outputs signals transmitted from the memory cells 101 over bit lines BL and NBL, a row decoder 104 which is connected with the memory array 102, a replica circuit 106 comprising replica cells 105, a replica word line 107 which sends a signal to the replica circuit 106, a replica bit line 108 which is connected with the replica cells 105, dummy cells 109 which are connected with the replica bit line 108, and a sense amplifier control circuit 110 which is connected with the replica bit line 108 and sends a sense amplifier control signal SAE to the sense amplifier circuit 103.
As shown in FIG. 8, the memory cells 101 are connected in the row direction respectively with word lines WL0 through WLx which are output signal lines from the row decoder 104, and connected in the column direction with common bit lines BL and NBL.
FIG. 9 is a circuitry diagram of the internal structure of the memory cell 101 which is shown in FIG. 1. In FIG. 9, the memory cell 101 is formed by an N-type transistor NA1 whose gate is connected with the word line WLx and whose source is connected with the bit line BL, an N-type transistor NA2 whose gate is connected with the word line WLx and whose source is connected with the bit line NBL, a P-type transistor PL1 whose source receives a power source voltage VDD and whose drain is connected with the drain of the N-type transistor NA1, an N-type transistor ND1 whose gate is connected with the gate of the P-type transistor PL1, whose drain is connected with the drain of the P-type transistor PL1 and whose source is connected with a ground potential VSS, a P-type transistor PL2 whose gate is connected with the drain of the N-type transistor NA1, whose source receives the power source voltage VDD and whose drain is connected with the drain of the N-type transistor NA2, and an N-type transistor ND2 whose gate is connected with the gate of the P-type transistor PL2, whose drain is connected with the drain of the P-type transistor PL2 and whose source is connected with the ground potential VSS.
The P-type transistor PL1 and the N-type transistor ND1 form a first inverter, while the P-type transistor PL2 and the N-type transistor ND2 form a second inverter. An input terminal and an output terminal of the first inverter are connected respectively with an output terminal and an input terminal of the second inverter, thereby forming a latch circuit.
FIG. 10 is a circuitry diagram which shows the internal structure of the replica cell 105 which is shown in FIG. 8. In FIG. 10, transistors forming the replica cell 105 have the same sizes as the transistors forming the memory cell 101 which is shown in FIG. 9. In the latch circuit included in the replica cell 105, the drain and the source of the P-type transistor PL2 are short-circuited. The output level of the second inverter formed by the P-type transistor PL2 and the N-type transistor ND2 is fixed at the High level. Meanwhile, the gate of the N-type transistor ND1 is connected with a replica word line RWL 107. The reference symbol REPBL denotes a replica bit line and the reference symbol REPNBL denotes a replica bit bar line. The replica bit line REPBL corresponds to the replica bit line 108 which is shown in FIG. 8. The reference symbol WLa denotes a word line.
FIG. 11 is a circuitry diagram of the internal structure of the dummy cell 109 which is shown in FIG. 8. In FIG. 11, transistors forming the dummy cell 109A have the same sizes as the transistors forming the memory cell 101 which is shown in FIG. 9. In addition, the gate of the N-type transistor ND1 is fixed at the Low level. The reference symbol WLb denotes a word line.
An operation of the conventional semiconductor memory device having the structure above will now be described. First, one of the word lines WL0 through WLx which are the output signal lines from the row decoder 104 is selected, whereby data in the memory cell 101 are read to the bit lines BL and NBL. The bit lines BL and NBL and the replica bit line REPBL 108 are pre-charged to the High level and become floating upon selection from among the word lines WL0 through WLx. The multiple bit lines BL and the multiple bit lines NBL are provided, and plural pieces of data are read to the associated bit lines BL and NBL.
At about the same timing as the timing of selecting from among the word lines WL0 through WLx, the replica word line RWL 107 which is an output signal line from the memory control circuit 100 is driven. This makes the transistors of the n replica cells 105 transit the signal level on the replica bit line RBL 108 from the High level to the Low level at a speed which is n times as fast as that of the memory cells 101. The sense amplifier control circuit 110 then detects the signal level on the replica bit line RBL 108 and generates the sense amplifier control signal SAE, and the sense amplifier circuit 103, receiving the sense amplifier control signal SAE, amplifies the data on the bit lines BL and NBL.
Where the power source voltage VDD is 1.2 V for example, if one wishes to start up the sense amplifier circuit 103 while reading of data from each memory cell 101 to the associated bit lines BL and NBL accompanies a potential difference of 100 mV, one may decide that the number n of the replica cells 105 to choose is 6. In other words, the signal level on the replica bit line RBL 108 transmits 600 mV, that is, down to half the power source voltage VDD at any desired timing that the sense amplifier is supposed to start up, i.e., in response to a potential difference of 100 mV between data read to the bit lines BL and NBL. This is beneficial in that it is possible to generate the sense amplifier control signal SAE at simple CMOS gates without using a complicated potential detection circuit.
Patent Literature 1: Japanese Patent Application Laid-Open Gazette No. H9-259589 (page 4, FIG. 7)
Patent Literature 2: Japanese Patent Application Laid-Open Gazette No. 2003-36678 (pages 5-6, FIGS. 5-6)
However, in the structure above of this semiconductor memory device, internal nodes of the dummy cell 109 are not fixed. The potential at the drain of the N-type transistor NA1 shown in FIG. 11 could therefore change to the Low level. When this occurs, due to a leak current, the N-type transistor NA1 shown in FIG. 11 makes the replica bit line RBL 108 more quickly transit from the High level to the Low level. This shortens the time given to the sense amplifier control circuit 110 to detect the transition on the replica bit line RBL 108, making it impossible to obtain the desired timing, or in some situations, the sense amplifier control signal SAE could come too early and cause the sense amplifier circuit 103 to malfunction.
Meanwhile, in the semiconductor memory device according to Patent Literature 2, the status of the dummy cell is fixed such that the side closer to the replica bit line which is driven to the Low level will remain at the High level, for the purpose of preventing a leak current from the dummy cell from quickening the timing at which the replica bit line is driven to the Low level. However, since the opposite side of the dummy cell is fixed to the Low level to this end, there may arise leakage between the dummy cell and the opposite replica bit line to the replica bit line which is driven to the Low level, and hence an unwanted current may flow.

Static random access memory (SRAM) with replica cells and a dummy cell

Matsushita Electric Industrial Co., Ltd.


The present invention relates to a process for reducing the polyphenol oxidase activity in cocoa beans comprising the step of steaming non-fermented, non-roasted raw cocoa beans with water vapor.

Recent studies have shown that polyphenols of cocoa beans may have beneficial effects to human health. Polyphenols can reduce the risk of chronic diseases such as cardiovascular diseases and cancers. Polyphenols and polyphenol-containing natural products such as cocoa beans could therefore be used in functional food or medicine.
Freshly harvested cocoa beans contain high levels of low molecular weight polyphenols that are oxidized into polymeric forms once the natural pod shell is opened. These polymeric polyphenols are no longer available for bio-absorption. Since there is no economically acceptable process that would avoid polyphenol polymerization caused by oxidation, there is a need to explore such processes. Most preferably, such processes would at the same time maintain other properties of natural cocoa beans.
EP 0 806 147 A1 describes a method of removing off-flavor notes from cocoa products. The method disclosed in this reference uses fermented cocoa beans that are steamed at elevated temperatures to produce acid-reduced roasted cocoa.
WO 2006/028360 A1 is directed to a method for preparing cocoa beans, which method comprises the steps of steaming roasted shelled cocoa beans, exposing them to air flow at a temperature ranging from 80-170° C. and treating said shelled cocoa beans with an oil.
JP 61195647 A describes the production of bitter chocolate, the production comprising the collection of raw cocoa beans from cocoa fruits as well as fermenting and drying cocoa beans before steaming, roasting and grinding by conventional procedures.
U.S. Pat. No. 5,395,635 reveals a method of producing white cocoa nibs. To avoid color-formation, cocoa beans of the colorless type are heated in hot water or water vapor containing an acidic, alkaline or alcoholic substance without being subjected to fermentation or after being slightly fermented. Nibs of the beans are thereby prevented from undergoing a color change.
WO 2005/004619 A2 is directed to whole roasted cocoa bean products and aims at providing an efficient manufacturing process for yielding high quality whole cocoa bean powder which has a low microbiological content.
WO 2005/115160 A1 describes a process for producing cocoa polyphenol concentrate comprising the step of blanching unfermented cocoa beans in water at a temperature in the range of from 85-100° C.
However, none of the processes described in the prior art allows to economically reduce the polyphenol oxidase activity in cocoa beans to yield cocoa beans with high polyphenol content and at the same time to maintain other natural characteristics of said cocoa beans such as polyphenol profile.

Cocoa beans with reduced polyphenol oxidase activity and high polyphenol content


A golf training device comprising a body having a cylinder section including a first end and a second end opposite the first end. The cylinder section defines an interior portion extending from the first end to the second end. A flange section is coupled to the cylinder section proximate the second end. An edge is formed on a perimeter of the disc. A receiver is formed in the interior portion proximate the first end of the cylinder section. The receiver is configured to receive an end of a golf club grip. The interior portion is configured to contact the golf club grip in a fixed position. The edge portion configured to contact a forearm such that the forearm and a centerline of the golf club form an alignment angle. The alignment angle orients the golfers hands, wrist and forearms with a centerline of a golf club shaft.

The present disclosure is directed to a golf training aid attachable to the grip end of a golf club shaft.
This invention relates to a training device for improving a golf swing and more particularly, provides a golf swing training device which employs a circular disc shaped guide attached at the grip end of the club maintain the plane of the golfer's swing and provide feedback to the golfer relating to his golf swing. The training device is suitable for training in the proper swing both for so called "woods" or distance clubs, "irons," and "wedges."
The golf swing is a complicated movement to execute properly through the sequences of the backswing, downswing and follow-through. Some of the factors that contribute to an improper golf swing are improper stance or positioning relative to the golf ball to be struck, improper pivoting, and improper positioning of the hands and elbows during the golf swing. An excellent discussion of the difficulties of the golf swing that needs to be corrected in order to achieve a proper golf swing consistently is provided in U.S. Pat. Nos. 4,145,054, 4,170,356, 4,582,325, 4,595,204, 4,693,479 and 4,913,441.
In U.S. Pat. No. 4,693,479, the golf swing training device 14 provides a visual indication of the position of the golf club during the backswing and downswing by sighting on the golf ball and the surface or area immediately surrounding the golf ball. The device 14 employs a light source mounted to the golf grip to provide a light beam that can track the path of the club head during the swing while the golfer, hopefully, keeps his head focused on the ball.
In U.S. Pat. No. 4,913,441, the complex flight of the golf ball hit by a golf club is explained. The correct of the positioning of the swing plane of the golf club along what is referred as "the target line" is essential in order to attain the desired direction and distance of the ball from the golf swing. In this patent, a laser light source is provided in the golf grip which projects a light beam out of the top of the golf grip to track the swing of the training device and provide feedback to the golfer relating to his swing.
In U.S. Pat. Nos. 4,145,054, 4,170,356 and 4,582,325, mechanical implements are attached to the golf club for teaching proper swing of the club.
In U.S. Pat. No. 4,595,204, the training device 21 employs a golf club 25 having a grip or handle over which an extension tube 35 is fitted. The extension tube 35 has a socket into which a centering pin is fitted for proper attachment of the extension tube. The golf club 25 has a club head that is intended to strike a ball on the downswing of the club 25. The length of the extension remains constant regardless of the length of the club 25 which may vary. The club 25 is a hollow plastic member. The free end of the extension tube has no indication means relating to achieving a proper golf swing.
The U.S. Pat. No. 8,485,914 describes a golf-training device configured to prevent the improper movement of the hands and wrists relative to the golf club during a golf swing. The content of this patent is incorporated by reference herein.
The training club embodying the invention overcomes the problems attendant the use of a light source in the golf club and the use of mechanical attachments which are cumber some and subject to distortions and damage during use and/or improper storage thereof. The use of a light source raises problems with respect to breakage when the club strikes the ball an the ground during a golf swing. The requirement for replacement of batteries also is a disadvantage. The devices using a light source tend to be relatively expensive also. Likewise, the use of special mechanical attachments can be expensive.