In all of an in-plane magnetic recording system and a perpendicular magnetic recording system, there is provided a crystallized glass for a disk substrate for information recording medium, etc., which has satisfactory surface properties capable of sufficiently adapting with a lamp loading system for high-density recording, has high strength such that it is able to withstand high-speed rotation and impact, has heat expansion properties and heat resistance in agreement with respective drive members, has a low melting temperature, has excellent productivity and is reduced in the elution amount of an alkali from the raw material, namely excellent in chemical durability. The crystallized glass of the invention is a crystallized glass containing an SiO2 component and an Li2O component; further containing at least one member selected from an SrO component and a BaO component in a total content of more than 3.5% and not more than 15% in terms of % by mass; and containing at least one member selected among lithium disilicate, lithium monosilicate, α-quartz, an α-quartz solid solution and a β-quartz solid solution as a main crystal phase on the oxide basis.

1. Field of the Invention
The present invention relates to a crystallized glass and in particular, to a crystallized glass for information magnetic recording medium substrate. In particular, in substrates for magnetic recording medium to be used in various information magnetic recording units, especially perpendicular magnetic recording media, media for patterned media, discrete track media, etc., the invention provides a crystallized glass having a reduced content of an alkali metal for the purpose of suppressing a lowering of magnetic properties of a recording medium or reducing a defect to be caused due to alkali corrosion, having low viscosity properties adaptive with press molding on a mass production level, having an extremely smooth substrate surface adaptive with a low flying height of a magnetic head, having high Young's modulus and low specific gravity properties and having excellent mechanical properties.
The "information recording medium" as referred to in the invention means an information magnetic recording medium which can be used in, for example, a fixed hard disk, a removal hard disk or a card type hard disk which is used as a hard disk of a personal computer; a hard disk for digital video camera, digital camera or audio; a hard disk for satellite navigation system, a hard disk for cellular phone; or a hard disk for various electron devices.
2. Description of the Related Art
In recent years, for the purposes of conforming with an multimedia application of a personal computer and dealing with large data such as motion videos and voices by a digital video camera or a digital camera, an information magnetic recording unit with large capacity becomes necessary. As a result, in the information magnetic recording medium, in order to increase the areal recording density, there is a tendency that the bit or track density is increased and that the size of a bit cell is reduced. For that reason, a magnetic head must be worked more closely to the disk surface than that which has been adopted so far.
Furthermore, when the recording density exceeds 100 Gb/in2, such a small magnetic domain becomes thermally instable. Therefore, an in-plane recording system reaches a physical limit against a demand of high recording density exceeding 100 Gb/in2.
In order to adapt with this matter, adaptation and mass production of a perpendicular magnetic recording system are being advanced. In this perpendicular magnetic recording system, since the axis of easy magnetization is a perpendicular direction, it is possible to make the bit size extremely small. Also, since the medium has a desired film thickness (from 5 to 10 times that in the in-plane recording system), a reduction of demagnetizing field and an effect due to shape magnetic anisotropy can be desired. Therefore, problems to be caused in high density of the existing magnetic recording system in an in-plane direction, including a reduction of recording energy and thermal instability, can be solved, and as compared with the in-plane magnetic recording system, a remarkable enhancement in recording density can be realized. In view of these matters, in the perpendicular magnetic recording system, it has already become possible on a mass production level to attain a recording density of 100 Gb/in2 or more on a practical use level, and studies regarding the recording density exceeding 300 Gb/in2 are already performed.
In this perpendicular magnetic recording system, since the magnetization is performed in a perpendicular direction to the medium surface, different from existing media having an axis of easy magnetization in the in-plane direction, a medium having an axis of easy magnetization in the perpendicular direction is used. As the recording layer of the perpendicular magnetic recording system which is studied and put into practical use, there are exemplified various alloy films, for example, a barium ferrite film, a Co-γFe2O3 or Co based alloy, an Fe based alloy such as FePt, an Ni based alloy, etc.
Now, in such a magnetic recording medium, in order to achieve refinement and formation in a perpendicular direction of a magnetic crystal particle, it is required to increase the fabrication temperature. Furthermore, according to recent studies, there is the case where annealing is carried out at a high temperature (from about 500 to 900° C.) for the purpose of enhancing the magnetic properties.
In order to adapt with this matter, the substrate is required such that the material shape hardly changes before and after the annealing treatment and that it is excellent in heat resistance. Also, following the high density, in order to make it possible to attain a low flying height of a magnetic head, an extremely smooth surface smoothness is considered to be necessary.
In addition, in order to make it possible to continuously use a magnetic recording medium over a long period of time, basic problems to be caused due to the elution of an alkali from the substrate, such as (a) a lowering in magnetic properties of the recording medium (the alkali component diffuses into the recording medium, thereby lowering magnetic properties of the medium) and (b) deposition of a defect onto the substrate surface (the eluted alkali component diffuses into the surface of the recording medium to become a compound, which is then formed as a foreign matter on the surface), must be solved.
The former phenomenon is described in more detail. First of all, with respect to the alkali elution phenomenon, in case of manufacturing a crystallized glass which requires an alkali component as a constitutional component of a crystal phase, the concentration of the alkali component of a raw glass must be made higher than the stoichiometric amount necessary in the crystal phase, and after the crystallization, the alkali component which has not been consumed remains in the glass matrix phase. According to this, the matters that (i) the remaining alkali component thermally diffuses into the recording medium during the fabrication to form a compound together with the components of the recording medium, thereby lowering magnetic properties of the recording medium; and that (ii) the remaining alkali component diffuses with time into the surface of the recording medium and combines with water or a carbon dioxide gas on the surface to form a hydroxide or a carbonate, and this compound becomes a foreign material on the surface, thereby causing surface deficiency or recording jump occur.
In the light of the above, on these days in which the recording density is tremendously increased, the foregoing problems are one of the factors of disturbing the enhancement of recording density. Accordingly, much more than so far, a substrate with less alkali elution, especially a substrate having a low content of a lithium ion with a smaller ion radius which is a main cause of the generation of alkali corrosion is eagerly demanded.
As an application of the substrate for information recording medium, several crystallized glasses are known. For example, an SiO2—Li2O—P2O5 based crystallized glass disclosed in JP-A-2000-302481 has lithium disilicate (Li2O.2SiO2) and α-quartz as a main crystal phase and is a material exhibiting excellent physical properties as the information magnetic recording medium. However, since the amount of an alkali component is relatively high, a problem of the generation of damaging a magnetic film to be caused due to a lithium ion deposited from an end surface of the substrate after fabrication cannot be connived. Also, the surface roughness of the substrate cannot be reduced (<3 angstroms) so that it cannot be adapted with high-density recording.
An Li2O—Al2O3—SiO2 based crystallized glass disclosed in JP-A-2000-184624 has lithium disilicate (Li2O.2SiO2) as a main crystal phase, has a low Li2O content as from 4% by mass to 8% by mass and is a material exhibiting excellent physical properties as the information magnetic recording medium. However, for the purpose of minimizing the deposition of a lithium ion, the content of the Li2O component is merely made low, and therefore, the viscosity at the time of melting the raw glass becomes high. Thus, it is not suitable for press molding.
An Li2O—Al2O3—SiO2 based crystallized glass disclosed in JP-A-2001-48584 is a crystallized glass for optical filter containing lithium disilicate (Li2O.2SiO2) and at least one member selected among α-quartz, an α-quartz solid solution, α-cristobalite and an α-cristobalite solid solution as a main crystal phase. However, it has a high viscosity at the time of melting the raw glass and is hardly press molded into a thin sheet, and therefore, it is not suitable for an application of information recording medium.


A flexible marker device comprises a marker body having a bottom end and a top end, and a base for supporting the marker body. The base has an aperture in a center portion thereof and a groove extending about the aperture in an upper surface of the base. The bottom end of the marker body is at least partially disposed within the groove. A cured material, preferably polyurethane, is disposed in the groove to thereby secure the marker body to the base.

The present invention relates generally to traffic marker devices or safety cones used to alert or divert vehicles, pedestrians, and the like, and more particularly to a flexible marker safety device which self-positions to its original configuration, deviates from its original configuration due to natural or traffic-caused perturbations, and is restored to its original configuration from a deviated position in the event the aforementioned perturbations abate.
A traffic marker device of the type contemplated herein is disclosed in U.S. Pat. No. 6,766,760 to Garcia, which patent is herein expressly incorporated by reference. The safety cone disclosed in the Garcia '760 patent is highly utilitarian. However, one of the most difficult aspects of manufacturing such a device is the connection between the bottom part 142 of the marker portion 140, which comprises a conically shaped spring, as shown, and the base 110.
In one prior art approach, the base of such a marker device is molded of polyurethane or the like, and injection molded clips are utilized to attach the base end of the marker to a ring molded in the base This is a relatively expensive product, because of the cost of polyurethane, plus the cost of the ring and the three clips, and because it is labor intensive.
What is needed is an improved, inexpensive, and easy to manufacture approach for connecting the body and the base of a flexible marker device of the type disclosed.


A display panel and a testing method are provided. The display panel has a display region and a peripheral circuit region, and includes an active device array substrate, an opposite substrate and a display medium located between the above two substrates. The active device array substrate includes scan lines, data lines, pixel units, a common electrode layer and testing lines. The scan lines and the data lines are intersected to define a plurality of pixel regions in the display region. The pixel units are disposed in the display region respectively, and each pixel unit is electrically connected to the corresponding scan line and the data line. The common electrode layer covers the data lines at least. The testing lines are disposed in the display region, and each testing line which is located between the common electrode layer and the data lines is at least overlapped to the data lines.

1. Technical Field
The invention relates to a panel and a testing method thereof.
2. Related Art
Generally, a display panel is composed of an active device array substrate, an opposite substrate and a display medium layer disposed between the above two substrate.
An electrical testing is generally performed after the manufacturing process of the active device array substrate is completed, so as to ensure that the active device array substrate does not have a defect that influences a display quality during the manufacturing process. Moreover, in case that the defect that influences the display quality is detected, a position of the defect can be further found for repairing, so as to improve a manufacturing yield.
However, when a data line and a common electrode in the active device array substrate are short-circuited, since the common electrodes are electrically connected in an array and distributed on the data lines, the position of the defect cannot be determined for repairing according to a testing result, which increases a cost caused by the deteriorated manufacturing process. Therefore, how to correctly determine the position of the defect in case that the data line and the common electrode are short-circuited is an important problem required to be resolved.

Display panel and testing method thereof


A method for regulating the speed at which an electric vehicle descends a hill includes determining a position of a shift lever and determining if the vehicle accelerator and/or the vehicle brake are depressed. If the vehicle is in either drive or reverse and neither the vehicle accelerator nor the vehicle brake is depressed, a change in the motor speed is determined based on the current motor speed and a reference motor speed. The current braking assist is then adjusted based on the change in the motor speed such that the motor speed, and therefore the speed of the electric vehicle, remains constant as the vehicle descends the hill.

Current systems for regulating the speed of an electric vehicle during hill descent utilize a variety of different methods, such as regenerative braking, to supplement vehicle braking and thereby prevent the vehicle's brakes from overheating and possibly failing. The current braking assist methods generally require driver interaction to actuate and/or control the braking assist provided by the method. For example, the driver may have to activate the braking assist method and set and/or modify the level of braking assist according to terrain and/or road conditions. Further, some braking assist methods may only have one braking assist level which is applied to supplement the vehicle braking. As a result, the braking assist may be incorrectly applied or the level of braking assist may be improperly set for the specific conditions (e.g., too much or too little) which may create dangerous driving situations.
Accordingly, a need exists for a method and system for automatically regulating the speed of an electric vehicle during hill descent.

Methods and systems for regulating hill descent speed of an electric vehicle

Toyota Motor Engineering & Manufacturing North America, Inc.


A differential amplifier (10-1,2) includes an input stage (7) including first (M1) and second (M2) input transistors and first (4A) and second (4B) load devices. Sources of the first and second input transistors are connected together. Drains of the first and second input transistors are coupled by first (12) and second (13) conductors to the first and second load devices, respectively. Common mode feedback circuitry (6A) including first (M3), second (M4), and third (M5) transistors is combined with offset correction circuitry (8) including the second transistor and the third transistor. Sources of the first, second, and third transistors are coupled to a tail current source (11). Drains of the second and third transistors are coupled to the first and second conductors, respectively. A common mode voltage (VOCM) is applied to a gate of the first transistor. Offset trim voltages are applied to gates of the second and third transistors.

The present invention relates generally to integrated circuit differential amplifiers having high speed common mode feedback and also having programmable input offset trim capability, and more particularly to improvements which result in substantially reduced circuit complexity and substantially reduced noise levels.
In the prior art, there are several ways to accomplish input offset compensation, for example by trimming or calibrating load devices of the input stage or by injecting an offset compensation current into the circuit nodes between drains of the input transistors and their corresponding load devices. These input offset compensation techniques require an additional differential input transistor pair and associated tail current source and also require a trim voltage generator circuit, and are characterized by undesirably high noise levels and undesirably high circuit complexity.
"Prior Art" FIG. 1 shows a "conceptual" diagram of a differential amplifier 1 including an input stage 7 which includes input transistor pair 2, associated load devices 4, and a current source 7. Control electrodes of the input transistors in block 2 receive input signals Vin+ and Vin−. Current source 3 provides tail current for the common sources (or common emitters) of the input transistors in block 2. Block 4 includes load devices (e.g., load resistors or current sources) which are connected to drains (or collectors) of the input transistors in block 2. A common mode feedback circuit 6 is coupled to input stage 7 by means of any one of the circuit paths labeled Path A, Path B, or Path C to adjust corresponding common mode feedback points. Offset trim circuit 5 is coupled to input stage 7 by either Path D or Path E. The prior art techniques indicated in FIG. 1 also can be used in "ultra low voltage" differential amplifier designs which do not include tail current source 3. Various implementations of the individual blocks in FIG. 1 are known in the prior art.
The common mode feedback using Path A can be used to control tail current source 3 dynamically to adjust the common mode voltage level that occurs on the conductors connected between input transistor pair 2 and load devices 4. Alternatively, common mode feedback Path B directly adjusts or modulates the impedance of the load circuit in block 4 in order to adjust the common mode voltage level on the conductors connected between the individual load devices in block 4 and the drains (or collectors) of the input transistors in block 2. Alternatively, common mode feedback Path C can be used to adjust the common mode voltage level on the conductors connected between the individual load devices in block 4 and the corresponding input transistors in block 2 by injecting a common mode feedback current directly into those same conductors.
Input offset trim circuit 5 can use Path D in FIG. 1 to modulate the differential impedance of load devices 4 by injecting a constant differential current into the conductors connected between the load devices in block 4 and the drains (or collectors) of the corresponding input transistors in block 2.
Referring to "Prior Art" FIG. 2, offset trim generator circuit 5 of FIG. 1 receives a reference voltage VREF that is applied to the (+) input of a buffer amplifier 20. The output of buffer amplifier 20 is connected by conductor 19 to its (−) input and also to one terminal of a resistor 18, the other terminal of which is connected to the input of a current mirror 21. The output of current mirror 21 flows through an adjustable-resistance or tappable-resistance circuit 17A,B which is connected between VDD and the output of current mirror 21. An upper trim voltage VTRIM+ is produced on a tap point of adjustable-resistance circuit 17A,B, and a lower trim voltage VTRIM− is produced on another tap point of adjustable-resistance circuit 17A,B, or alternatively, on the output conductor 19 of buffer amplifier 20. Trim voltages VTRIM+ and VTRIM− can be used along Path E in FIG. 1, or they can be applied to the inputs of a buffer circuit (not shown) in Path D, in which case the outputs of the buffer circuit can be applied to the nodes between input transistor pair 2 and load devices 4.
Common mode feedback circuit 6 of FIG. 1 can be implemented in various ways, for example as indicated in the article "Fully Differential Operational Amplifiers with Accurate Output Balancing" by M. Banu, J. Khoury, and Y. Tsividis, IEEE Journal of Solid-State Circuits, Volume 23, Number 6, December 1988, pp. 1410-1414. This article discloses several known common mode feedback circuits for differential amplifiers.
The prior art differential amplifiers having both high speed common mode feedback and programmable input offset trim capability require undesirably complex circuitry and an undesirably large amount of integrated circuit chip area, and are characterized by undesirably high noise levels associated with the connections of the common mode feedback circuitry and offset trim generators to the amplifier input stage and by undesirably high power consumption.
Thus, there is an unmet need in the prior art for a differential amplifier having both high speed common mode feedback and programmable input offset trim capability and which has less complex circuitry than the closest prior art.
There also is an unmet need in the prior art for a differential amplifier having both high speed common mode feedback and programmable input offset trim capability and which has lower noise than the closest prior art.
There also is an unmet need in the prior art for a differential amplifier having both high speed common mode feedback and programmable input offset trim capability and which has substantially less complex circuitry and substantially lower noise then the closest prior art.
There also is an unmet need in the prior art for a differential amplifier having both high speed common mode feedback and programmable input offset trim capability and which has lower power dissipation than the closest prior art.
There also is an unmet need in the prior art for a differential amplifier having both high speed common mode feedback and programmable input offset trim capability and which requires less integrated circuit chip area than the closest prior art.

Combination trim and CMFB circuit and method for differential amplifiers


A fabrication method of a TFT includes successively forming four thin films containing a first conductive layer, an insulation layer, a semiconductor layer, and a second conductive layer on a substrate, performing a first PEP process to pattern the four thin films for forming a semiconductor island and a gate electrode with the semiconductor layer and the first conductive layer respectively. Then, a laser ablation process is performed to define a channel pattern in the four thin films and remove a portion of the second conductive layer so that unconnected source electrode and drain electrode are formed with the second conductive layer.

1. Field of the Invention
The present invention relates to a thin-film transistor (TFT) structure and a fabrication method thereof, and more particularly, to a TFT structure and a fabrication method with a laser ablation process.
2. Description of the Prior Art
Due to the continued development in technology, flat displays have been widely used in various information products. Common flat displays comprise liquid crystal displays (LCD), organic light-emitting displays (OLED), and plasma display panels (PDP). Among the various types of flat displays, LCDs are developed maturely. Because TFT-LCDs have qualities of light weight, thinness, low energy requirements, and no radiation, they have been widely used in portable information products, such as notebook computers, personal digital assist (PDA), and mobile phones. Conventionally, the main electric elements of a LCD are thin-film transistors arranged as an array. In operation with appropriate capacitors and conducting pads, the thin-film transistors drive liquid crystal pixels to produce colorful images, and therefore a thin-film transistor is one of the key elements affecting the image quality of a TFT-LCD.
A thin-film transistor comprises a gate electrode, a source electrode, a drain electrode, and a semiconductor layer for forming a channel of the thin-film transistor. A typical fabrication process of a conventional thin-film transistor has to perform five photolithography processes, which means five photomasks is needed for defining the patterns of the thin-film transistor. However, since the costs of photomasks seriously influence the fabrication costs of display panels, a new fabrication process of thin-film transistor array by using four photomasks, including a half-tone mask, has been researched in order to reduce the fabrication costs.
With reference to FIGS. 1-4, FIGS. 1-4 are schematic diagrams of the fabrication process of a thin-film transistor by using four photomasks according to the prior art. As shown in FIG. 1, a first conductive layer and a photoresist layer are formed on the transparent substrate 10 in order. Then, a first photolithography-etching process (PEP) is carried out to form a gate electrode 12 and a wire pattern 14. Thereafter, the photoresist layer is removed. As shown in FIG. 2, an insulation layer 16, a semiconductor layer 18, an ohmic contact layer 20, a second conductive layer 22, and a photoresist layer 24 are sequentially formed on the surface of the transparent substrate 10.
Then, as shown in FIG. 3, a half-tone mask 26 is used to perform a second PEP for patterning the photoresist layer 24, wherein the half-tone region 26a of the half-tone mask 26 corresponds to the predetermined channel region above the gate electrode 12. Accordingly, an etching mask is formed with the photoresist layer 24 above the transparent substrate 10 where is a predetermined semiconductor island area. Referring to FIG. 4, the etching mask is used to perform an etching process for removing portions of the semiconductor layer 18, the ohmic contact layer 20, and the second conductive layer 22 so as to from a semiconductor island 32, a drain electrode 28, and a source electrode 30. Finally, several deposition processes, a third and a fourth photolithography step and several etching processes are carried out to form a passivation layer and a pixel electrode electrically connected to the source electrode 30 on the transparent substrate 10 so that the fabrication of the thin-film transistor and pixel electrode of each pixel or sub-pixel is finished.
As mentioned above, the prior-art fabrication method of thin-film transistors uses the half-tone mask during the second PEP process by taking its half-tone region to define the channel pattern of the thin-film transistor. Because the size of the channel pattern of the thin-film transistor is very detailed and minute, the half-tone mask for defining the channel pattern by its half-tone region has to be very accurate, whose formation cost is very high and is twice as the formation cost of normal photomask. In addition, once a defect of the transference of the channel pattern occurs during the second PEP by using a half-tone mask, it will seriously affect the electric property of the thin-film transistor, which is hard to be repaired. Furthermore, according to the prior-art process of fabricating a thin-film transistor, both of the source and drain patterns cover the semiconductor layer so that photo current is easily induced since most materials of the semiconductor layer are amorphous silicon materials that have photo sensitivity, and photo current affects the electrical performance of the thin-film transistor.
Therefore, how to fabricate thin-film transistors with good qualities by low-cost processes to avoid the photo current problem is still an important issue for the manufactures.

Thin-film transistor and fabrication method thereof


The present invention is directed to sago fluidity starch and the use thereof. Such fluidity starches exhibit exceptionally fast gelling properties, high gel strengths, and exceptional elasticity. These properties allow for significantly reduced processing times, including reduced hold times. Further, the higher gel strength allows for reduced starch levels without loss of final product gel strength integrity or texture.

The present invention relates to sago fluidity starch and the use thereof, particularly for their gelling properties.
It is known that starch can be used to add texture to products by taking advantage of its gelling properties. For example, jelly gum confections which include such candies as gum drops, jelly beans, and fruit slices, use starch to provide their characteristic resilient, relatively firm gel and short texture.
Typically, such gum confections use a fluidity starch or a combination of a high amylose starch and a fluidity starch which are cooked at a moisture content above the final moisture content of the confectionery, and deposited as a thin, hot liquid into a mold generally formed of dry starch. The starch in the mold forms the confectionery pieces and serves to reduce the moisture content of the confectionery to the level of the end product. This starch mold casting process has the disadvantage of long processing time in order to obtain gel strength integrity sufficient for handling and packaging as well as a desirable product texture.
Surprisingly, it has now been discovered that sago fluidity starches exhibit exceptionally fast gelling properties, unexpectedly high gel strengths, and exceptional elasticity.

National Starch and Chemical Investment Holding Corporation


In a plasma processing apparatus, a member for propagating high frequency from a high frequency power supply and/or to which the high frequency is applied. A power feed rod is electromagnetically shielded between a matching unit and a bottom plate of a chamber by a coaxial cylindrical conductor connected to a ground potential. A surface potential system disposed in an appropriate distance from the power feed rod in radius direction is installed in the cylindrical conductor, and measures in a non-contact state the electrostatic surface potential of the power feed rod through electrostatic capacitance and provides a controller with a surface potential detection signal including surface potential measurement value information. The controller performs a required signal processing or operation processing on the basis of the surface potential detection signal from the surface potential system, thereby obtaining the measurement value of the DC potential on the power feed rod.

Generally, in a parallel plate type plasma processing apparatus, a negative DC potential Vdc is generated in an electrode or a high frequency electrode to which a high frequency (RF) for generating a plasma is applied. From this, in a parallel plate type plasma etching apparatus, a high frequency is conventionally applied to a lower electrode or a susceptor on which a substrate to be processed is mounted, in order for ions in a plasma to be vertically drawn onto a surface of the substrate with the force of an electric field by a negative DC potential Vdc on the surface of the susceptor, thereby performing anisotropic etching or reactive ion etching (RIE). Further, such a DC potential Vdc on the high frequency electrode has a correlation with an etching condition, a high frequency discharge state in a processing vessel or the like. For example, if a gas pressure in the processing vessel is lowered, the absolute value of the DC potential Vdc becomes higher. Moreover, if an extraordinary condition occurs in a high frequency discharge system by, e.g., deterioration as a result of the elapse of time, it is reflected in the DC potential Vdc (generally, the absolute value of Vdc is increased). Thus, the DC potential Vdc has been measured to represent a process parameter indicating a variation of plasma processing conditions or a maintenance parameter indicating a repair or replacement timing of a high frequency component or a member.
Conventionally, a voltage sense line is connected to a high frequency electrode or a power feed rod directly coupled therewith, and a DC potential Vdc detected by the voltage sense line is entered as an analog DC voltage to a voltage measurement circuit, thereby obtaining a measurement value of the DC potential Vdc.
In a latest plasma processing apparatus, the power of a high frequency used tends to be increased in order to enhance the efficiency or miniaturization of a plasma processing; and accordingly, a peak-to-peak value of a high frequency voltage being propagated through the power feed rod or the high frequency electrode is increased. For this reason, in a conventional measurement method for introducing a DC potential Vdc into a voltage measurement circuit by putting a voltage sense line in contact with the high frequency electrode or the power feed rod, a high frequency that originally has to be supplied to a high frequency electrode runs off to the ground from a place in which a voltage measurement unit is installed (being leaked or discharged) through a measurement circuit in the unit or a unit housing. Therefore, the measurement unit itself may be damaged or cause to be damaged, and there are problems that could have negative impact on a high frequency discharge in a processing vessel and a characteristic of a plasma generation and, further, a plasma processing quality.


An electrical connector is provided which includes a plug and a socket, and in which the plug is latched to the socket after the plug has been inserted into the socket to maintain the electric contacts of the plug and socket in contact with one another, and which includes an abrasive affixed to at least one of the latching surfaces to increase the pull force required to separate the plug and socket when in a latched condition.

The invention is concerned with electrical connectors and particularly, although not exclusively, with electrical connectors which are used in the trucking industry for interconnecting tractor-trailer jumper cables.
Seven-conductor electrical connectors for tractor-trailer jumper cables have become a standard item in the trucking industry. These connectors are subject to SAE standards, such as SAE Standard J560. The jumper cables themselves are also subject to SAE standards, such as SAE Standard J1067.
Originally the housings of the connectors were constructed of an appropriate metal. However, there has been a trend in recent years to make the connector housings out of plastic. Problems have arisen, however, especially in the case of the plastic housings, in that it has been found that under extreme conditions, there is a tendency for the plug and socket of the electrical connectors to pull apart when in a latched condition. This can create a hazardous condition, since it immediately causes all electric power to the trailer to be disconnected.
An electrical connector, such as referred to above, is disclosed, for example, in
U.S. Pat. No. 4,786,261, which issued Nov. 22, 1988 in the name of the present inventor. Other similar connectors for tractor-trailer use are described, for example, in U.S. Pat. Nos. 4,072,381 and 4,304,457. All of the connectors referred to above include a plug which is connected to appropriate jumper cables, and a socket which is mounted on the tractor cab. After the plug has been plugged into the socket, the plug and socket are latched together by an appropriate latch formed on the cover of the socket.
As mentioned above, although the latching assembly provides an adequate lock between the plug and socket under normal conditions, it has been found that there is a tendency for the plug to pull out from the socket under some conditions. An objective of the present invention is to provide a simple and inexpensive construction which overcomes that problem.


In a die for molding a glass member, a ceramic die for glass molding characterized by having the press surfaces thereof formed of a boron type composite ceramics comprising (A) at least one M.sup.I B ceramic phase having a B.sup.I /B (wherein M.sup.I stands for at least one member selected from the group consisting of Ni, Cr, V, Nb, Ta, Mo, W and Mn) atomic ratio of 1/1 and (B) at least one IV-group diboride ceramic phase selected from the group consisting of TiB.sub.2, ZrB.sub.2, and HfB.sub.2 and/or (Cr, Ni).sub.3 B.sub.4 ceramic phase. This glass molding die excels in durability, ability of mold release, molding accuracy, and productivity and, at the same time, fits the molding of any of a rich variety of species of glass.

In recent years, efforts have been directed to modifying spherical lenses by impartation thereto of an aspheric surface for the purpose of simplifying the construction of an optical system using lenses, lightening the optical system, and enhancing the quality of images to be formed by the optical system. Since aspherical lenses entail a notably high cost for the work of processing subsequent to the step of molding, however, a need is felt for a highly accurate press molding technique which has no use for any extra grinding or abrading work. Since lenses are commodities of rich-variety small-quantity production, the need of a technique capable of molding a varying species of glass, particularly a high softening species of glass containing a rare earth element (molding temperature in the range of from 700.degree. C. to 750.degree. C.), has come to find approval.
As the characteristics which the material for a glass molding die is expected to possess,
a) ideal resistance to oxidation at high temperatures and to chemical reactions at high temperatures and excellent durability,
b) ideal resistance to glass reactions and seizure and an excellent ability of mold release,
c) sparing susceptibility to infliction such as of scratch on die surface, high strength and high rigidity at high temperatures, an ability to allow highly accurate molding,
d) resistance to fracture by thermal shock, and
e) high thermal conductivity enough to allow quick absorption of heat from glass, curtail the pressing time, and consequently enhance the productivity of the molding operation may be cited, for example.
The materials which have been used for the conventional glass molding dies include metallic materials such as stainless steel, various refractory alloy steels, and cast iron, cermets such as cemented carbide having tungsten carbide bound with nickel, and ceramics such as SiC and Si.sub.3 N.sub.4, for example.
None of the materials heretofore used in the conventional glass molding dies has fulfilled all the characteristics enumerated above. Such metallic materials as stainless steel, various refractory alloy steels, and cast iron, for example, are deficient in resistance to oxidation at temperatures exceeding 600.degree. C. Since they suffer surface corrosion at temperatures exceeding 600.degree. C., the molding with a die made of such a metallic material must be carried out as kept swept with N.sub.2 gas. The dies of these metallic materials, therefore, have a problem of deficiency in productivity and durability. To make up for the deficiency in resistance to oxidation, a die made of such a metallic material and coated with platinum has been tied only to betray the disadvantage that it cannot be used for high-temperature molding because it offers poor resistance to glass reactions and succumbs to seizure at temperatures exceeding about 550.degree. C.
The cemented carbide having tungsten carbide (WC) bound with Ni has the disadvantage that the highest working temperature is 600.degree. C. by reason of resistance to oxidation. The ceramics such as SiC and Si.sub.3 N.sub.4 enjoy ideal resistance to oxidation and nevertheless have the disadvantage that they are deficient in thermal conductivity and therefore liable to generate thermal stress and, as a result, exhibit inferior resistance to thermal shock to succumb readily to fracture. Thus, the molding with a die made of such a ceramic substance must consume much time enough to preclude occurrence of a temperature gradient in the mold. The dies of ceramics moreover have a problem of inability to improve productivity because they have a small capacity for absorbing heat from the glass after the molding and necessitate a long time for the molded glass to solidify completely.
Thus, the materials which have been used in the conventional dies are invariably short of fulfilling the characteristics which the glass molding dies are required to possess.


An AC/DC converting circuit and a starting method thereof are provided. An AC detection or a rectified AC voltage detection is disabled when the AC voltage or the rectified AC voltage not up to a start-up voltage is detected, so as to shorten a recovery time of a voltage of a power supply terminal of an AC/DC power conversion controller, and further shorten a starting time of the AC/DC converting circuit.

1. Field of the Invention
The invention relates to an AC/DC converting circuit and a starting method thereof. More particularly, the invention relates to an AC/DC converting circuit that shortens a starting time of the AC/DC converting circuit and a starting method thereof.
2. Description of Related Art
In the conventional techniques, before an AC/DC converting circuit is started, an AC/DC power conversion controller in the AC/DC converting circuit is continuously detecting a voltage value of an inputted AC voltage. As shown in a schematic view illustrating a waveform of an AC voltage and a power source voltage of an AC/DC power conversion controller of FIG. 1, since a power source current needed for the AC/DC power conversion controller to perform an AC voltage detection is greater than a current supplied by an AC voltage source, the power source voltage of the AC/DC power conversion controller dropped down due to an insufficient voltage supply.
When the power source voltage of the AC/DC power conversion controller drops down to a triggered voltage level V1 of a voltage lockout, a voltage detection function of the AC/DC power conversion controller is disabled. At this time, a current needed by the AC/DC power conversion controller is smaller than that supplied by the AC voltage source. Thus, the power source voltage of the AC/DC power conversion controller gradually rises, and then the AC/DC power conversion controller begins to detect the AC voltage after the power source voltage of the AC/DC power conversion controller gradually rises up to a released voltage level V2 of the voltage lockout. Thus, the AC voltage is repeatedly detected until the AC voltage rises up to a start-up voltage, which causes a saw tooth wave change of the power source voltage of the AC/DC power conversion controller as shown in FIG. 1.
In a conventional way of starting an AC/DC converting circuit, a power source voltage of an AC/DC power conversion controller has to oscillate greatly back and forth between the triggered voltage level V1 and the released voltage level V2 of the voltage lockout. Even if the AC voltage rises up to the start-up voltage, a waiting time is still needed for the power source voltage of the AC/DC power conversion controller to rise up to the released voltage level V2 of the voltage lockout in order to start the AC/DC converting circuit. However, a starting speed of the AC/DC converting circuit is thus slowed down.


A low parasitic capacitance Schottky diode including a lightly doped polycrystalline silicon island that is formed on a shallow trench isolation (STI) pad such that the polycrystalline silicon island is entirely isolated from an underlying silicon substrate by the STI pad. The resulting structure reduces leakage and capacitive coupling to the substrate. Silicide contact structures are attached to lightly-doped and heavily-doped regions of the polycrystalline silicon island to form the Schottky junction and Ohmic contact, respectively, and are connected by metal structures to other components formed on the silicon substrate. The STI pad, polycrystalline silicon island, and silicide/metal contacts are formed using a standard CMOS process flow to minimize cost. A bolometer detector is provided by measuring current through the diode in reverse bias. An array of such detectors comprises an infrared or optical image sensor.

Certain integrated circuits (ICs), such those produced to perform radio frequency (RF) and mixed signal (MS) functions, utilize passive components such as diodes, inductors, and capacitors to generate or modify the necessary high frequency signals. These passive components require a high quality factor, but their quality factor is often reduced by capacitive coupling to a resistive substrate. For example, the capacitive and inductive coupling of an inductor to the resistive substrate will reduce the quality factor of an inductor. Also, the substrate may contain noisy currents generated by digital circuits. Via the coupling to the substrate this noise may be injected to the RF or analog circuit through the passive component, thus degrading the circuits performance.
Schottky diodes are utilized in RF and MS ICs, for example, to produce voltage multipliers and RF mixers. However, the operation of Schottky diodes that are made using conventional methods suffers from parasitic capacitance and leakage to the underlying substrate. Such a leakage path can bypass the diode, degrading the diode's rectifying or nonlinear behavior.
What is needed is a method for fabricating Schottky diodes for RF and MS circuits whereby the parasitic capacitance and leakage to the underlying substrate is substantially reduced. What is also needed is a method for producing such Schottky diodes in a standard CMOS processing flow and in a manner that reduces the number of additional processing steps, thus maintaining the lowest production cost possible for such a diode and the circuits incorporating the diode.

Low parasitic capacitance Schottky diode


An electrostatic-image developing toner contains toner particles. The toner particles contain a binder resin, a release agent, and a styrene-(meth)acrylic resin. The binder resin contains a polyester resin. About 70% or more of all release agent is present within about 800 nm from surfaces of the toner particles. The styrene-(meth)acrylic resin is present in an amount of about 5 to about 25 atomic percent of the resin components in the surfaces of the toner particles as determined by X-ray photoelectron spectroscopy (XPS).

(i) Technical Field
The present invention relates to electrostatic-image developing toners, electrostatic image developers, and toner cartridges.
(ii) Related Art
Techniques such as electrophotography for visualization of image information via electrostatic images are currently used in various fields. In electrophotography, an electrostatic image corresponding to image information is formed on a surface of an image carrier (photoreceptor) in charging and exposure steps. The electrostatic image is developed with a developer containing a toner to form a toner image on the surface of the photoreceptor. The toner image is transferred to a recording medium such as paper in a transfer step and is fixed to the surface of the recording medium in a fixing step to form a visible image.

Electrostatic-image developing toner, electrostatic image developer, and toner cartridge


Disclosed herein is a method for manufacturing a semiconductor device that includes forming a gate pattern on a substrate having a stacked structure including a lower silicon layer, an insulating layer, and an upper silicon layer. The method further includes forming spacers on sidewalls of the gate pattern. Still further, the method includes etching the upper silicon layer using the gate pattern as a mask to form a floating body and expose a portion of the insulating layer. The method further includes depositing a conductive layer over the gate pattern and exposed insulating layer, and performing a thermal process on the conductive layer to form a source/drain region in the floating body.

1. Field of the Disclosure
The invention generally relates to a method for fabricating a semiconductor device, and, more particularly, to a method for forming a semiconductor device having a floating body transistor.
2. Brief Description of Related Technology
A semiconductor memory apparatus is configured to store data generated or processed therein. For example, if a request from a data processor, such as a central processing unit (CPU), is received, the semiconductor memory apparatus outputs data to the data processor from unit cells therein or stores data processed by the data processor to the unit cells according to an address transmitted with the request.
The data storage capacity of semiconductor memory apparatuses has increased without a corresponding increase in the size of the semiconductor memory apparatus. The sizes of various components and elements for read or write operations have also been reduced. Unnecessary, duplicate components and elements in the semiconductor memory apparatus, such as transistors or wires, are combined or merged to decrease the area occupied by each component. A reduction of the size of unit cells included in the semiconductor memory apparatus affects improvement of integration because the unit cells occupy one of the largest areas therein.
For example, in a Dynamic Random Access Memory (DRAM) device, a type of volatile memory device configured to retain data while a power source is supplied, the unit cell comprises a transistor and a capacitor. After the data "1" is delivered to the capacitor, charges temporarily stored in a storage node dissipate, i.e., amount of the charges is decreased, as a result of both leakage currents generated at the junction of the storage nodes and instinctive characteristics of the capacitor. As a result, performance of a refresh operation on the unit cells is periodically required to prevent destruction of the data on the DRAM device.
Numerous methods for increasing capacitance (Cs) of the capacitor included in the unit cell have been suggested, which would allow for a larger amount of charges to be stored in the storage node. For example, the typical oxide film used as the insulating film of the capacitor can be replaced with an advanced insulating film, which has a larger dielectric constant, such as, for example, a nitrified oxide film or a high dielectric film. Alternatively, the typical two-dimensional capacitor structure can be replaced with a three-dimensional cylindrical structure or a trench structure, which can increase the surface area of both of the electrodes of the capacitor.
As the design rule is reduced, the area in which a capacitor can be formed is also reduced, and it is difficult to develop suitable insulating film materials for the capacitor. As a result of the reduced capacitor area, a junction resistance value of the storage node and a turn-on resistance value of the transistor in the unit cell are increased, making it difficult to perform normal read and write operations, and deteriorating refresh characteristics.
In order to improve the above-described shortcomings, the unit cell can include a transistor having a floating body, and the capacitor can be eliminated. Data is stored in a floating body of the transistor, rather than a capacitor.
Data is stored in the floating body by reducing a voltage level supplied on the word line to ½ or ⅓ of the voltage level applied to the bit line connected to one active region of the transistor, to thereby generate hot carriers. When the data "1" is delivered, a large amount of hot carriers are generated in a junction region of the bit lines. Then, electrons are sent out into the bit line, while the holes remain in the floating body. When the data "0" is transmitted, hot carriers are not generated in the junction region, and the holes do not remain in the floating body. Storage of holes in the floating body lowers the threshold voltage of the transistor of the unit cell. As a result, the amount of a current flowing through the transistor increases. That is, the amount of the current flowing when the holes are stored in the floating body is larger than that flowing when holes are not stored. As a result, it is possible to distinguish whether the data "1" or "0" is stored in the unit cell.
Although elimination of the capacitor improves integration of the semiconductor memory apparatus, a leakage current that occurs at a source line junction and/or bit line junction makes it difficult to prevent reduction of the amount of holes stored in the floating body. Generally, the active region (i.e., the source and/or drain regions) of the transistor, which is connected to the bit line or the source line, includes a high concentration of impurities to reduce resistance resulting from the junction with the metal lines. However, the amount of leakage current between the active region and the floating body can increase if the active region is doped with a high concentration of impurities. As a result, the amount of holes stored in the floating body can dissipate over time. The amount of the leakage current also increases proportionally to temperature increases. As a result, data stored in the transistor of the unit cell is easily deleted under high temperature conditions.
In order to maximize the cell packing density, it is advantageous to isolate cells in the single active region than to separate unit cells through an isolation film formed by a shallow trench isolation (STI) process performed on a floating body transistor formed over a SOI semiconductor substrate. However, because the distance between the source and drain regions of the transistor having a channel region is decreased to reduce the overall size of the transistor, it is difficult to prevent a short channel effect, such as the punch-through phenomenon. The punch-through phenomenon more frequently occurs in the lower portion of the floating body than in the upper portion of the floating body, because the channel doping concentration increases from the bottom of the gate pattern to the top thereof. Furthermore, it is necessary to maximize the capacity of the body so that the floating body transistor may store more holes in the floating body corresponding to data.
In order to prevent a short channel effect, a local doping region is generally formed in the floating body through an ion-implanting process. However, due to the reduction of the design rule, it is difficult to precisely form the local doping region in an expected region of the floating body through the ion-implanting process. As a result, it is difficult to prevent the short channel effect including the punch-through phenomenon of the floating body transistor, which can degrade the reliability of the semiconductor device.

Method for manufacturing a semiconductor device


A computer-implemented method includes: receiving, by a computing device, transaction information for a transaction, wherein the transaction information identifies one or more items in the transaction; classifying, by the computing device, each of the one or more items; selecting, by the computing device, one or more payment accounts, of a plurality of payment accounts, to use to pay for the one or more items based on the classifying each of the one or more items; and communicating, by the computing device, with one or more payment servers to charge the one or more payment accounts for the one or more items.

The present invention generally relates to transaction processing and, more particularly, to process transactions by selecting multiple different payment accounts for a given transaction based on statistical classification and contextual analysis.
An individual may own multiple different types of payment accounts from which to pay for products and services. For example, an individual may own multiple different credit card accounts, debit card accounts, store charge card accounts, bank accounts, cryptocurrency accounts, etc. When completing a purchase transaction, the individual may select a particular account to use to complete payment of the transaction (e.g., when at a point-of-sale terminal or when entering account details to complete an online transaction).

Transaction processing based on statistical classification and contextual analysis

INTERNATIONAL BUSINESS MACHINES CORPORATION


A golf club divider assembly for use with a golf bag creates a desired plurality of subdivided and axially extending compartments for receiving a plurality of golf clubs. A plurality of elongated divider members are inserted axially within the golf bag and each divider member includes a plurality of either three or four outwardly and axially extending vane portions. A like plurality of sleeve members may be slidably engaged over the divider members to facilitate the creation of the individual club carrying compartments. Axially repositionable golf club head covering assemblies are provided and are secured to upper ends of the divider members in association with each of the club carrying compartments. The covering assemblies are repositionable in a vertical manner to cover an upwardly projecting club head of a golf club and to isolate and protect the golf club from the remaining golf clubs. Vertical repositionability of the club head cover further enables significantly less encumbered access to the clubs both in and out of the club receiving compartment.

1. Field of the Invention
The present invention relates generally to a golf club divider which incorporate vertically movable club head covers individually enabling not only to adjust for differing heights of clubs but also to provide less encumbered access to clubs by repositioning the head covering portions, thus freeing the club heads from surrounding head covers.
2. Description of the Prior Art
Golf club divider assemblies which are either integrally formed within a golf bag or are provided as attachment inserts to the golf bag are fairly well known in the art. The purpose of such divider assemblies in all instances is to conveniently isolate the various golf clubs carried within the bag in an efficient and protective manner.
Copending application U.S. Ser. No. 08/585,400, filed Jan. 11, 1996 discloses a golf club divider assembly for use with a golf bag which includes a plurality of interiorly hollow sleeve shaped subdividing members which are placed within a golf bag. Within each of the sleeve shaped members is axially inserted an elongated subdividing having a plurality of radially extending vane portions which, upon insertion, creates a plurality of individual golf club shaft receiving cavities. With specific reference to FIG. 5 of the '400 application, club head covering means are fixedly secured in an upwardly extending manner from the divider members. With further reference to FIG. 6, planar shaped rigid portions may be slidably secured to vertically extending cord members in a friction fit manner so that the portions may be translatably moved between upper and lower positions along the vertical lengths of the cords to protect club heads of varying heights.
Copending application U.S. Ser. No. 08/694,989, filed Aug. 9, 1996, discloses a golf club divider assembly for use with a golf bag which includes a primary club divider member constructed of a plurality of axially directed vane portions and which subdivides the bag into a first plurality of subdivided cavities. One or more secondary club divider members each include additional vane portions and are insertable separately into the respective first subdivided cavities to form individual club receiving cavities. The overall divider assembly when viewed in cross-section resembles a grid-shaped pattern and VELCRO-supported club head covering members are attached to upper ends of the individual club receiving cavities for individually protecting the upwardly projecting golf club heads.
Finally, U.S. Pat. No. 5,103,974, issued to Antonius, teaches an adjustable golf club holder insert for a golf bag which includes a primary central component formed of telescoping members vertically adjustable with respect to each other so as to accommodate larger clubs (woods) carried within the central component. Additional outwardly radially extending portions or additional peripheral sleeve members may be arranged around the primary central component to accommodate additional smaller clubs. The primary disadvantage of the Antonius device is that it does not provide any form of adjustable head covering means for specifically protecting the head portions of the golf clubs and, primarily, the heads of the golf clubs in an individual manner.

Golf club divider assembly for use with a golf bag having individually adjustable club head covering members


A semiconductor laser control circuit of the invention can modulate a light power level among a plurality of set levels including a first level, a second level lower than the first level, and a third level lower than the first level but higher than the second level. The semiconductor laser control circuit includes: a circuit portion for generating a first signal based on a light power level actually detected by a light detector in a first period in which a light power level of laser radiation is to be modulated among the first level, the second level, and the third level; a circuit portion for generating a second signal based on a light power level actually detected by the light detector in a second period in which a light power level of the laser radiation is to be modulated between the first level and the second level; a circuit portion for generating a third signal based on a light power level actually detected by the light detector in a third period in which the light power level of the laser radiation is to be at the third level; and a signal processor for determining a light power level of the first level and a light power level of the second level by operation, based on the first to third signals. The light power level is adjusted based on an output of the signal processor.

The present invention relates to a semiconductor laser control circuit for adjusting a modulated laser power of each level to a target value when the output modulation of emitted laser radiation is performed among multi-value levels.
Examples of known recording mediums storing optically rewritable information thereon include phase-change storage media and magneto-optical recording media. In writing information onto a phase-change storage medium, an information layer of the medium is irradiated with a focused laser beam, thereby partially heating and fusing the information layer. The highest temperature the information layer can reach due to the heat applied thereto or the cooling process of the layer differs depending on the intensity of the laser radiation incident thereto. Thus, the optical characteristics of the information layer, such as the refractive index thereof, are locally modifiable by modulating the intensity of the laser radiation emitted. More specifically, if the intensity of the laser radiation is higher than a predetermined reference level, part of the information layer of the recording medium that has been irradiated with the radiation is rapidly cooled from an elevated temperature so as to be amorphized. If the intensity of the laser radiation is relatively low on the other hand, the irradiated part of the information layer of the recording medium is gradually cooled from an intermediate to high temperature and therefore crystallized. The amorphized part of the information layer of the recording medium is called a xe2x80x9cmarkxe2x80x9d, while the crystallized part is called a xe2x80x9cspacexe2x80x9d. That is to say, the mark and space have mutually different optical characteristics in terms of their refractive indices, for example. Accordingly, binary data is storable in the information layer of the recording medium by arranging the marks and spaces in a specific pattern. As used herein, the laser radiation for use in information recording will be called xe2x80x9cwrite radiationxe2x80x9d.
In reading out information stored on a phase-change storage medium, the information layer thereof is irradiated with a laser radiation beam with an intensity low enough to not cause any phase change in the information layer and a radiation beam, which is reflected from the information layer, is detected. As used herein, the laser radiation for use in information readout will be called xe2x80x9creadout radiationxe2x80x9d. The mark, or the amorphized part of the information layer of the recording medium, has a relatively low reflectance, while the space, or the crystallized part of the information layer of the recording medium, has a relatively high reflectance. Accordingly, by recognizing the difference in the amount of the radiation reflected from the mark and space, a read signal can be obtained.
Information can be recorded on such a recording medium by a pulse position modulation (PPM) or pulse width modulation (PWM) technique. A recording technique which uses PWM is also called a xe2x80x9cmark edge recordingxe2x80x9d technique.
According to the PPM recording technique, marks are recorded with the space between the marks varied, and information to be written is assigned to positions of the marks. Each of these marks is represented as a pulse with a relatively short, constant pulse width. In contrast, according to the PWM technique, marks of various lengths are recorded with the space between the marks also varied, and information to be written is represented by edge positions of the marks and spaces with a variety of lengths. Generally speaking, the density of the information recorded can be higher with the PWM technique than with the PPM technique.
In performing a PWM recording, longer marks are recorded compared to the PPM recording. If long marks are recorded on a phase-change storage medium, however, the widths of those marks might be non-uniform, because the information layers of media of this type may accumulate and dissipate heat in various manners and their recording sensitivities may be greatly different from each other. It is also known that if the information layer is continuously irradiated with radiation for a long time to record a long mark therein, then the second half of the long mark is likely to increase its width because too much heat is accumulated in that part. To avoid such an unfavorable increase in mark width, a write strategy, by which the radiation is irradiated for recording purposes as a greater number of pulses each with an even short width, was adopted. Methods and apparatuses of this type, that is to say, multi-pulse mark recording methods and apparatuses, are disclosed in U.S. Pat. Nos. 5,490,126 and 5,636,194, for example.
In order to write data onto a recording medium without any error, it is necessary to maintain an intensity of laser radiation with which the recording medium is irradiated at an appropriate level. Such an appropriate level varies depending on the kind of a recording medium. After the recording medium is inserted into a recording/reproducing apparatus, the optimization of the intensity or power level of laser radiation is automatically performed. In order to maintain the power levels of the modulated laser radiation at the target levels, however, it is necessary to always or periodically monitor the power levels of the modulated laser radiation, and to control a laser light source (a semiconductor laser) so that the optical power cannot shift from a target value.
Hereinafter, with reference to FIG. 9 and FIGS. 10(a) to (h), a prior-art semiconductor laser control circuit will be described.
FIG. 9 shows a configuration of a prior-art semiconductor laser control circuit. The control circuit controls a current for driving a semiconductor laser 1, so that laser radiation having a pulse waveform shown in FIG. 10(d) can be emitted from the semiconductor laser 1.
An intensity (power level) of the laser radiation emitted from the semiconductor laser 1 is detected and converted into a current signal by a monitoring light detector 2. The current signal is then converted into a voltage signal by a current-to-voltage converter 3. The voltage signal is input into a peak-power detector 4, a bottom-power detector 5, and a sample-and-hold circuit 6 shown in FIG. 9.
The peak-power detector 4 detects an envelope of a peak-power level in a wave-form of the input voltage signal. The bottom-power detector 5 detects an envelope of a bottom-power level. The sample-and-hold circuit 6 detects a bias-power level of laser radiation.
Outputs of the peak-power detector 4, the bottom-power detector 5, and the sample-and-hold circuit 6 are input into peak-power current controller 7, bottom-power current controller 12, and bias-power current controller 17, respectively.
The peak-power current controller 7 compares the output of the peak-power detector 4 with a predetermined reference peak-power voltage 8, and controls a value of a current flowing out of a peak-power current source 9. The current is supplied to the semiconductor laser 1 via a switch 11 which is opened and closed in accordance with a peak-power modulation signal 10 shown in FIG. 10(a).
The bottom-power current controller 12 compares the output of the bottom-power detector 5 with a predetermined reference peak-power voltage 13, and controls a value of a current flowing out of a bottom-power current source 14. The current is supplied to the semiconductor laser 1 via a switch 16 which is opened and closed in accordance with a bottom-power modulation signal 15 shown in FIG. 10(b).
The bias-power current controller 17 compares the output of the bias-power sample-and-hold circuit 6 with a predetermined reference bias-power voltage 18, and controls a value of a current flowing out of a bias-power current source 19. The current is supplied to the semiconductor laser 1 via a switch 21 which is opened and closed in accordance with a bias-power modulation signal 20 shown in FIG. 10(c).
The semiconductor laser 1 is driven by a combination of currents supplied to the semiconductor laser from the peak-power current source 9, the bottom-power current source 14, and the bias-power current source 19. The semiconductor laser 1 emits laser radiation having a waveform modulated among three levels, as shown in FIG. 10(d).
The above-mentioned control circuit involves a problem in that if a frequency of a modulation signal becomes higher, a peak-power and a bottom-power of modulated light pulses cannot be accurately detected, so that the peak-power and the bottom-power of the light pulses are deviated from their target values. Hereinafter the problem will be described.
In terms of prices, a light detector which can response at extremely high speed is not mounted on an optical head which is used in a usual optical disk recording apparatus. Thus, in the case of a light detector used in a usual optical disk recording apparatus, when a clock frequency of a modulation signal is higher, it becomes difficult to ensure frequency characteristics by which the modulation light pulse waveform in writing can be faithfully detected.
In order to enhance frequency characteristics of the light detector 2, generally, an expensive light detector with superior frequency characteristics is used, and it is necessary to focus and launch laser radiation to be monitored onto and into the light detector. The frequency characteristics of the light detector used in a usual optical disk recording apparatus are, however, not sufficient.
In the case where the frequency characteristics of the light detector 2 are insufficient, the intensity of laser radiation is detected by the light detector 2, and output from the light detector 2 as a signal having a waveform shown in FIG. 10(f). The waveform shown in FIG. 10(f) is that of a voltage signal output from the current-to-voltage converter 3. The signal waveform is substantially the same before and after the current-to-voltage converter 3.
It is understood by the comparison between FIGS. 10(d) and (f) that the output waveform of the light detector 2 does not precisely reproduce the intensity waveform of laser radiation, but has a shape obtained by blunting the intensity waveform of laser radiation.
If peak detection is performed for such an output waveform, the obtained peak-power exhibits a level of FIG. 10(e). On the other hand, if bottom detection is performed for the output waveform, the obtained bottom-power exhibits a level of FIG. 10(g). FIG. 10(e) shows an output of the peak-power detector 4, and FIG. 10(g) shows an output of the bottom-power detector 5.
If the light detector 2 has the frequency characteristics required for faithfully reproducing the waveform shown in FIG. 10(d), a peak detection output at a level 23 and a bottom detection output at a level 24 are obtained. In other words, in the case where the light detector 2 has sufficient frequency characteristics, a level difference between a peak-power and a bottom-power should have a magnitude shown by the reference numeral xe2x80x9c25xe2x80x9d. In actuality, since the frequency characteristics of the light detector 2 are insufficient, it is judged that the level difference has a relatively small magnitude shown by the reference numeral xe2x80x9c26xe2x80x9d.
When a signal having a level of FIG. 10(e) is input into the peak-power current controller 7, it is erroneously recognized that a peak-power which is excessively smaller than the peak-power 23 of the actual light pulse is detected. As a result, since the control is performed so as to increase the peak-power, the peak-power of the modulation light pulse after the power control is larger than the reference peak-power 27, as shown in FIG. 10(h). FIG. 10(h) shows an intensity waveform of laser radiation after a light power level control of laser radiation is performed by the control circuit.
When a signal having a level of FIG. 10(g) is input into the bottom-power current controller 12, it is erroneously recognized that a bottom-power which is larger than the bottom-power 24 of the actual light pulse is detected. As a result, since the control is performed so as to lower the bottom-power, the bottom-power of the modulation light pulse after the power control is smaller than the reference bottom-power 28, as shown in FIG. 10(h).
If the frequency of the modulation signal becomes higher, the frequency characteristics of the light detector are insufficient. As a result, the peak-power level and the bottom-power level of the modulated light pulse waveform cannot be precisely detected. This results in the difficulty in precise control of a semiconductor laser, and there arises a problem in that the fluctuation or error of the peak-power level and the bottom-power level of the laser light is increased.
The invention provides a semiconductor laser control circuit which can precisely control a peak-power and a bottom-power of modulated light pulses to predetermined levels, even if a light detector has insufficient frequency characteristics.
A semiconductor laser control circuit of the invention can modulate a light power level among a plurality of set levels including a first level, a second level lower than the first level, and a third level lower than the first level but higher than the second level, and the semiconductor laser control circuit includes: a first circuit portion for generating a first signal based on a light power level actually detected by a light detector in a first period in which a light power level of laser radiation is to be modulated among the first level, the second level, and the third level; a second circuit portion for generating a second signal based on a light power level actually detected by the light detector in a second period in which a light power level of the laser radiation is to be modulated between the first level and the second level; a third circuit portion for generating a third signal based on a light power level actually detected by the light detector in a third period in which the light power level of the laser radiation is to be at the third level; and a signal processor for determining a light power level of the first level and a light power level of the second level by operation, based on the first to third signals, wherein the light power level is adjusted based on an output of the arithmetic circuit portion.
A semiconductor laser control circuit of the invention can modulate a light power level between a first level and a second level lower than the first level, and the semiconductor laser control circuit includes: a first circuit portion for generating a signal indicating an average value of light intensities actually detected by a light detector in a period in which a light power level is to be modulated between the first level and the second level; a circuit portion for generating a signal indicating a light power level actually detected by the light detector in a period in which the light power level is to be at the second level; and a signal processor for obtaining a light power level of the first level, based on the two signals, wherein a light power level of laser radiation is adjusted based on an output of the arithmetic circuit portion.
A laser light source of the invention includes: the above-described semiconductor laser control circuit; and a semiconductor laser driven by the control circuit.
An apparatus of the invention includes: the above-described semiconductor laser control circuit; a semiconductor laser driven by the control circuit; and an optical system for irradiating a recording medium with laser radiation emitted from the semiconductor laser.

Semiconductor laser control circuit and laser light source

Matsushita Electric Industrial Co., Ltd.


The invention relates to a hard tissue biopsy sampling device, e.g. for bone in humans or animals, comprising a tube shaped casing or sleeve with a distal end provided with a cutting edge and a proximal end. The invention further comprises a needle insertable in the sleeve, the needle extending out of the distal end of the sleeve, and having a tip allowing penetration in the hard tissue. The sleeve exhibits in the vicinity of its distal end a portion having reduced outer diameter. The distal end has a section with reducing diameter, such that the inner diameter of the interior of the device is continuously reduced over at least the major part of the section. In side projection, the cutting edge forms an angle in relation to a perpendicular plane through the cross-section of the device, the angle preferably being 17.degree.-23.degree..

The skeleton is the site for a number of different pathological lesions, e.g. primary and secondary malign tumours, benign tumours, infectious lesions, blood diseases etc. The lesions are often visible on X-ray pictures of the skeleton, but mostly it is not possible to asses the cause of the lesion by means of such X-ray pictures. In order to determine the nature of the lesion with certainty, portions of the bone must be taken out and examined under microscope.
Biopsy sampling in bone is difficult to carry out with the aid of a biopsy needle because the lesion often is delimited by the hard surface layer of the bone, i.e. cortical bone tissue.
Today essentially two methods are in use for taking biopsy samples from bone, namely operative biopsy and percutaneous needle biopsy. An operative ingress in most cases yields a good result, but frequently requires full narcosis, and in addition it is resource demanding and costly. Percutaneous needle biopsy is performed under local anesthesia, and the needle consists commonly of a sampling tube that is either provided with saw-teeth or is highly sharpened, and which is passed through the lesion, whereby a biopsy sample is cut or "punched" out. During insertion a stylet or needle (for the purposes of this application "stylet" and "needle" are regarded as synonymous) is placed in the tube, thereby creating a sharp distal tip of the tube for making the insertion through the softer parts easier. Examples of such needles are disclosed in EP-0 296 421 (the Ostycut needle) and in U.S. Pat No. 3,628,524 (the Jamshidi needle). These documents are incorporated herein by reference.
Existing biopsy needles have the considerable disadvantage that they may not be easily inserted into the bone because of friction between needle and bone. Biopsy needles such as Jamshidi or Ostycut all have a needle tip that can only penetrate thin or soft cortical bone due to the tip not cutting away material like a drill, but instead are to wedge there way in with great feeding force in combination with rotation.
Another disadvantage is that the large friction occurring between needle and cortical bone, makes the manipulation of the needle towards the target difficult, and causes development of heat which the patient may experience as painful. There are also needle types where the distal end of the needle has saw-tooth-shaped teeth. An example of such a needle is disclosed in U.S. Pat. No. 4,306,570 (the Corb needle). However, the drawbacks with saw teeth are that the teeth become clogged by drilling chips when drilling deeper than the height of the teeth. Furthermore the saw teeth must be protected by an outer protective tube during insertion through the soft portions of the body, in order not to cause damage, and this increases the required outer diameter of the needle.
In U.S. Pat. No. 4,543,966 there is disclosed a needle having a tip wherein the inner diameter of the tip is smaller than the inner diameter of the major part of the needle interior. The portion with reduced inner diameter at the tip has a longitudinal extension of 0.5-10 mm. The provision of such reduced inner diameter in the form of a cylindrical front end portion, is said to increase the amount of tissue sample that may be taken out, and also that the outer regions of the sample remains undamaged.
However, the cylindrical portion with reduced diameter causes some problem in that there may occur a stoppage or "jamming" of tissue at the intake opening, because of the friction in the narrow cylindrical portion.


A method is disclosed for making a microelectronic package. A material is applied to a first major surface of a microelectronic element to reduce the heights of protrusions projecting from the first major surface. The microelectronic element is assembled to a microelectronic component. A method of forming protrusions and an assembly incorporating the microelectronic element having protrusions is also disclosed.

Microelectronic elements are typically packaged and assembled with a microelectronic component to facilitate connection to external circuitry. Heat is generated in use, as well as during manufacturing operations such as, for example, bonding. When heat is generated within the assembly, the various parts of the assembly expand and contract according to the coefficient of thermal expansion for the particular part. Incorporating various materials having different coefficients of thermal expansion can create stress on certain components within an assembly.
For example, as disclosed in certain embodiments of U.S. Pat. No. 5,518,964, the disclosure of which is hereby incorporated by reference herein, leads extend between a semiconductor chip and another component and are connected to contacts of the semiconductor chip by bonding material. For example, the semiconductor chip is assembled with a connection component, which may incorporate a dielectric body and leads extending on a lower surface of the dielectric body. The leads have a first end that is connected to the contacts and a second end connected to the dielectric body. A dielectric layer is formed around the leads and around the connection between the leads and the contacts. For example, a curable material is introduced between the chip and the dielectric body. The material is cured to form a dielectric layer surrounding the leads. On the upper surface of the dielectric body, the surface facing away from the leads, the dielectric body has terminals for forming connections with other components. For example, the terminals may ultimately be used to connect to conductive features on an external element, such as a circuit board.
During service, or during any operation in which heat is generated, some materials within the assembly have significantly different coefficients of thermal expansion from other materials in the assembly so that some parts expand and contract by different amounts from other parts of the assembly. The dielectric body of the component may comprise polyimide and the semiconductor chip may comprise silicon. These materials have coefficients of thermal expansion that are significantly different, which means that these parts of the assembly experience differing amounts of expansion and contraction for the same temperature change. The dielectric layer and the leads provide the assembly with flexibility so that the terminals move relative to the contacts on the chip. The dielectric layer and leads compensate for different dimensional changes within the assembly. The larger the dielectric layer in the vertical direction, the more movable the terminals and contacts are with respect to one another in the horizontal direction. However, the larger the dielectric layer, the more stress the leads experience. This is compounded by the presence of bonding material between the contacts and the leads, which interferes with the flexibility of the dielectric layer. For connections that do not add to the vertical height between the lead and the contact, the foregoing effect is minimal. However, some connections incorporate a significant amount of bonding material, which adds to the height of the connection between the leads and contacts, and impacts the reliability of the assembly.
Improvements to reduce stress on the conductive elements of a microelectronic assembly and improve the reliability of such assemblies are desirable.

Microelectronic assemblies having low profile connections


A fiber optic connector insert for a connector may include a housing to be received within a passageway of a connector body, a circuit board extending longitudinally within the housing and having opposing first and second ends, and a first base and first electrically conductive pins carried thereby. The first electrically conductive pins may be coupled to the circuit board adjacent the first end thereof. The fiber optic connector insert may also include an opto-electronic (O/E) converter having a second base and second electrically conductive pins extending outwardly therefrom. The second electrically conductive pins may be coupled to the circuit board adjacent the second end thereof.

Fiber optic cabling is used in various types of air, space, land, and sea-based platforms to provide high-speed data communications for on-board electronic systems, such as radar and mission control computer systems. In a typical fiber optic connector, one portion of the connector is coupled to the housing of the electronic system and extends rearwardly therefrom. A passive mating insert, for example, a Series 801 (1.25 mm/2.5 mm diameter) fiber optic ferrule from the Aeronautical Radio, Incorporated of Annapolis, Md. or an Military Standard 29504 (1.6 mm diameter) fiber optic ferrule (passive mating insert), may be removably positioned into each passageway of the body of the fiber optic connector. The connector body may comprise, for example, a standard Series 600 connector from Aeronautical Radio, Incorporated of Annapolis, Md. (ARINC Series 600 connector).
Such typical fiber optic connectors are passive connectors, and consequently, these connectors merely pass the optical signals through the connector. Passive connectors usually have fiber optic cabling extending therefrom to opto-electronic (O/E) converters within the housing of the electronic system. The O/E converters convert electrical signals to optical signals, and/or optical signals to electrical signals.
When routing each optical fiber from the connector to an appropriate O/E converter within the housing, several difficulties may occur. First, a minimum cable bend radius should be observed within the housing. Second, each time an optical signal passes through a connector interface, the power level of the optical energy is reduced, which subtracts from the overall optical link budget of the electronic system.
In an expanded function electronic system, the optical fiber from the connector may be routed through an optical fiber backplane within the housing, which routes the optical fibers to specific locations on an electrical backplane that is also within the housing. Circuit boards mounting the O/E converters connect through the electrical backplane to the optical fiber backplane. The use of an optical fiber backplane within the housing may add to the cost, weight and complexity of the electronic system, as well as to the overall volume of the system. This added weight may be particularly problematic for connectors which are used in aircraft applications.
A significant advance in the field of active fiber optic connectors is disclosed in U.S. Pat. No. 7,093,985 to Lord et al., assigned to the assignee of this application. The connector is a wall mount connector that comprises a plurality of O/E converters. U.S. Pat. No. 5,596,665 to Kurashima et al. discloses a fiber optic connector having a rectangular housing and includes portions to receive mating plug connector portions, and circuitry within the housing converts optical signals to electrical signals and vice-versa. The fiber optic connector includes reference surfaces and bias members to permit insertion of the fiber optic sleeves.
Another active fiber optic connector is disclosed in U.S. Patent Application No. 2003/0118293 to Canace et al. The fiber optic connector may be mounted to a bulkhead or wall, and includes fingers to provide resilience for leeway in the positioning of the fiber optic connector relative to the wall in the direction of the optical axis of the optical fibers. Flexible circuit boards are also used to mount the components within the housing. This fiber optic connector also has a rectangular housing.
Another fiber optic connector is disclosed in U.S. Pat. No. 5,930,428 to Irwin et al. The fiber optic connector is a line replaceable unit (LRU) that is installed into the chassis of the electronic system. The LRU comprises an O/E converter receiving and transmitting optical signals.
U.S. Pat. No. 5,448,676 to White et al. discloses a fiber optic connector insert. The fiber optic connector insert includes an O/E converter, receives an optical fiber ferrule on one end, and has an electrical contact on the opposing end. To properly secure the optical fiber ferrule in the fiber optic connector insert, the fiber optic connector insert comprises retainer clips to engage a retaining shoulder on the optical connector. This retaining clip and shoulder keep the optical fiber ferrule of the passive optical connector adjacent the O/E converter.
Another fiber optic connector insert is disclosed in U.S. Patent Application No. 2006/0199407 to Demaret et al. The fiber optic connector insert includes an O/E converter and is capable of being positioned in the passageway of a connector body.
Notwithstanding the known active fiber optic connector inserts and connectors, an active fiber optic connector insert that is both readily manufactured and assembled, yet mechanically robust may be desired.

Fiber optic connector, active contact inserts therefor, and associated methods


The spindle position orientation apparatus of a boring machine includes a main spindle attached to a casing and around which a cylindrical cam is fixed, a slider disposed on a guide rod to be movable right and left thereby rotating the cylindrical cam, and a limit switch which is opened and closed by a dog attached to a piston. The piston is disposed in a hydraulic cylinder fixed to the casing, one end of the piston is fixed to the slider and the dog is formed on the other end.

This invention relates to a spindle angular position orientation apparatus of a boring machine and, more particularly, to a spindle position orientation apparatus of a boring machine used for machining parts that are mass-produced, such as automotive components.
The present boring machine is used for drilling holes in mass-produced parts, such as automotive components. For good performance, the rotational orientation of a cutting tool mounted on the main spindle must be always constant when starting to cut new parts that are mounted for machining. A separate motor able to regulate its speed is typically used to so orient the main spindle. But, when this separate motor with regulable speed is used, the price of the boring machine is increased. Additionally, it is difficult to correctly orient the cutting tool to the starting orientation because of electrical errors occurring in the motor and in its controls.

Spindle position orientation apparatus of boring machine


A method of growing carbon nanotubes and a method of manufacturing a field emission device using the same is provided. The method of growing carbon nanotubes includes steps of preparing a substrate, forming a catalyst metal layer on the substrate to promote growing of carbon nanotubes, forming an inactivation layer on the catalyst metal layer to reduce the activity of the catalyst metal layer, and growing carbon nanotubes on a surface of the catalyst metal layer. Because the inactivation layer partially covers the catalyst metal layer, carbon nanotubes are grown on a portion of the catalyst metal layer that is not covered by the inactivation layer. Thus, density of the carbon nanotubes can be controlled. This method for growing carbon nanotubes can be used to make an emitter of a field emission device. The field emission device having carbon nanotube emitter made of this method has superior electron emission characteristics.

1. Field of the Invention
The present invention relates to a method of growing carbon nanotubes and a method of manufacturing a field emission device using the same, and more particularly, to a method of growing carbon nanotubes having a suitable density for making an emitter of a field emission device, and a method of manufacturing a field emission device using the carbon nanotubes by which the field emission device is constructed to have superior electron emission characteristics.
2. Description of the Related Art
Carbon nanotubes have drawn attention as an electron emission source such as an emitter of a field emission device. Methods of forming carbon nanotubes include thermal chemical vapor deposition (CVD), arc discharge, laser ablation, plasma enhanced chemical vapor deposition (PECVD), etc.
In the thermal CVD method, a catalyst metal layer is formed on an electrode formed on a substrate, and carbon nanotubes are vertically grown from the surface of a catalyst metal layer by injecting a carbon containing gas such as methane (CH4), acetylene (C2H2), ethylene (C2H4), ethane (C2H6), carbon monoxide (CO), or carbon dioxide (CO2) together with hydrogen (H2) gas, nitrogen (N2) gas, or argon (Ar) gas into a reactor, which is maintained at a temperature of 500° C. to 900° C. In the PECVD, carbon nanotubes are grown in the similar process of the CVD method.

Method of growing carbon nanotubes and method of manufacturing field emission device using the same


Apparatuses and methods are disclosed for enabling a first user at a first communication device to communicate with a far-end user at a second communication device via a relay service providing translation services for the first user. The communication system may be operable in a plurality of modes, including a tone mode in which an audible tone conveying a message may be transmitted to the second communication device regardless of a format of the character data generated by the first communication device. A text mode may include sending a text signal corresponding to the message being displayed at the relay service regardless of the format of the character data. Switching modes may be responsive to a determination that the far-end user is a live person. Related methods of operating the communication system are also disclosed.

Traditional communication systems, such as standard and cellular telephone systems, enable verbal communications between people at different locations and dual tone multiple frequency (DTMF) communications for transmitting information to machines via tones. Communication systems for hard-of-hearing individuals may also enable non-verbal communications instead of, or in addition to, verbal communications. Some communication systems for hard-of-hearing people enable communications between communication devices for hard-of-hearing people and communication systems for hearing users (e.g., standard telephones, cellular telephones, etc.). For example, a video relay service (VRS) may provide speech to sign language translation services, and sign language to speech translation services for a communication session between a video phone for a first user and a traditional telephone for a hearing user.
Conventionally, the hearing-impaired user communicates with a call assistant (e.g., communicating via sign language), and then the call assistant conveys the messages to the far-end user. The call assistant may act as a translator for both the hearing-impaired user (e.g., communicating via sign language) and the far-end user (communicating via speech communication). If the far-end user is not a live person (e.g., an automated phone menu system), the call assistant may interpret the automated menu options to the hearing-impaired user via sign language. The hearing-impaired user may respond by using sign language to instruct the call assistant which selection to choose. The call assistant then makes the appropriate selection. For example, the call assistant may speak the message from the hearing-impaired user if the automated phone menu system is configured to recognize and interpret voice. Alternatively, the far-end user (e.g., automated phone menu system) may be configured to recognize DTMF signals. Therefore, the call assistant may use a numeric keypad configured to send such DTMF signals to the automated phone system. The inventors have appreciated that, at times, the hearing-impaired person may desire to convey information through the communication device to the far-end user through methods other than by sign language communication, which functionality is not offered by conventional VRS systems.

Apparatuses and methods for operating a communication system in one of a tone mode and a text mode