A voltage reference circuit is provided with: an operational amplifier circuit; first and second resistor elements; first and second diodes; and first and second transistors. The first resistor element and the first diode are connected in series between a first input terminal of the operational amplifier circuit and a reference level node. The second resistor element and the second diode are connected in series between a second input terminal of the operational amplifier circuit and the reference level node. The first transistor is connected between a power supply node and the first input terminal of the operational amplifier circuit and has a control electrode receiving an output of the operational amplifier circuit. The second transistor is connected between the power supply node and the second input terminal of the operational amplifier circuit and has a control electrode receiving the output of the operational amplifier circuit. The value of R12·ln(n11·n22)/(R12·n12·R11) is adjusted to approximately 23.25, where R11 and R12 are resistance values of the first and second resistor elements, n11 is a ratio of an area of a p-n junction of the second diode to an area of a p-n junction of the first diode, and n12 is a ratio of a W/L ratio of the first transistor to a W/L ratio of the second transistor.

1. Field of the Invention
The present invention relates to a voltage reference circuit.
2. Description of the Related Art
A bandgap voltage reference circuit, which is a sort of a voltage reference circuit widely used in LSIs (Large Scale Integrated circuit), is configured to stably generate a constant voltage independent of the environmental temperature by using the characteristics of the p-n junction. FIG. 1 is a circuit diagram showing an exemplary configuration of a conventional bandgap voltage reference circuit. The configuration shown in FIG. 1 is disclosed in Karel E. Kuijk, "A Precision Reference Voltage Source", IEEE J. Solid-State Circuits, vol. SC-8, pp. 222-226, June, 1973.
The voltage reference circuit of FIG. 1 includes a PMOS transistor M31, resistors R31 to R33, p-n junction diodes D31 and D32 and an operational amplifier circuit OA3. In FIG. 1, the symbol "VDD" denotes the power supply voltage, and the symbols "VD31" and "VD32" denote the voltages across the diodes D31 and D32, respectively. In addition, the symbols "I31" and "I32" denote the currents through the diodes D31 and D32, respectively. Moreover, the symbol "VIP" denotes the voltage of the non-inverting input of the operational amplifier circuit OA3 (that is, the voltage of the connection node of the resistor elements R31 and R32), and the symbol "VIM" denotes the voltage of the inverting input of the operational amplifier circuit OA3 (that is, the voltage of the connection node of the resistor element R33 and the diode D32). Furthermore, the symbol "VO" denotes the output voltage of the operational amplifier circuit OA3, and the symbol "VOUT" denotes the output voltage of the bandgap voltage reference circuit, that is, the voltage of the connection node of the PMOS transistor M31 and the resistor elements R32 and R33.
In the following, a description is given of conditions for completely eliminating the variation of the output voltage VO depending on the environmental temperature in the voltage reference circuit of FIG. 1. The ratio of the p-n junction area S31 of the diode D31 to the p-n junction area S32 of the diode D32 is defined as:S31:S32=n31:1  (1)and the reverse saturation currents of the diodes D31 and D32 are defined as Is31 and Is32, respectively. Additionally, the thermal voltage is defined as Vt (=kT/q), where the parameter "k" is the Boltzmann constant, where k=1.38×10−23 [m2kg·s2K], the parameter "T" is the absolute temperature [K], and the parameter "q" is the elementary charge, q=1.60×10−19 [C].
Given that the offset voltage of the operational amplifier circuit OA3 is ideally zero for simplicity, the following Equations (2) to (7) are obtained,
                              VO          =                                    VD                                                                                31                        +                                                            (                                                            R                                                                                31                                        +                                          R                                                                                32                                                        )                                ·                I                                                                                31                                      ,                            (        2        )                                                      I                                                                                31              ·              R                                                                                31                    =                                    VD                                                                                32                        -                          VD                                                                                31                                      ,                            (        3        )                                                      I                                                                                31              ·              R                                                                                32                    =                      I                                                                                32              ·              R                                                                                33                          ,                            (        4        )                                                      VD                                                                          31                    =                      Vt            ·                          ln                                            (                                                      I                                                                                31                                                        Is                                                                                31                                                  )                                                    ,                            (        5        )                                                      VD                                                                          32                    =                      Vt            ·                          ln                                            (                                                      I                                                                                32                                                        Is                                                                                32                                                  )                                                    ,                            (        6        )                                          Is                                                              31                =                  n                                                                          31            ·            Is                                                                        32.                                    (        7        )
By substituting Equations (5) and (6) into Equation (3), the following equation (3′) is obtained:
                                                                                I                                                                                31                    ·                    R                                                                                31                                =                                                                  Vt                  ·                                      {                                                                  ln                                                                          (                                                                                I                                                                                32                                                                                Is                                                                                32                                                                                )                                                                    -                                              ln                                                                          (                                                                                I                                                                                31                                                                                Is                                                                                31                                                                                )                                                                                }                                                              ,                                                                                =                                                Vt                                                                            ·                                      ln                                                              (                                                                                I                                                                                32                                                                                Is                                                                                32                                                                          ·                                                                              Is                                                                                31                                                                                I                                                                                31                                                                                )                                                                      ,                                                                                =                                                                  Vt                  ·                                      ln                                                              (                                              n                                                                                31                          ·                                                                                R                                                                                32                                                                                R                                                                                33                                                                                )                                                                                ,                                                          (                  3          ′                )            It should be noted that the relations of the above-described Equations (4) and (7) are used for obtaining Equation (3′).
By substituting Equation (3′) into Equation (2), the following equation (8) is obtained:
                    VO        =                              VD                                                                          31                    +                                                                      R                                                                                31                                +                                  R                                                                                32                                                            R                                                                                31                                      ·            Vt            ·                                          ln                                                  (                                      n                                                                                31                      ·                                                                        R                                                                                32                                                                          R                                                                                33                                                                                )                                            .                                                          (        8        )
When partially differentiating Equation (8) with respect to the absolute temperature T in the both sides, the following Equation (9) is obtained:
                                                                                ∂                                          ∂                      T                                                                          VO                                =                                                                                ∂                                              ∂                        T                                                                                VD                                                                                31                                    +                                                            ∂                                              ∂                        T                                                                                {                                                                                R                                                                                31                                                        +                                                          R                                                                                32                                                                                R                                                                                31                                                                          ·                        Vt                        ·                                                  ln                                                                                (                                                          n                                                                                31                                ·                                                                                R                                                                                32                                                                                R                                                                                33                                                                                )                                                                                }                                                                                ,                                                                          ≅                                                                                -                    2                                                                                mV                                +                                                                            {                                                                                R                                                                                31                                                        +                                                          R                                                                                32                                                                                R                                                                                31                                                                          ·                                                  ln                                                                                (                                                          n                                                                                31                                ·                                                                                R                                                                                32                                                                                R                                                                                33                                                                                )                                                                                }                                        ·                    0.08                                                                                mV                    .                                                                                (        9        )
Accordingly, the variation of the output voltage VO depending on the environmental temperature is completely eliminated by determining the resistance values of the resistor elements R31 to R33 and the area ratios n31 of the diodes D31 and D32 so that the following Equation (10) is satisfied:
                                                                        -                2                                                                                mV                        +                                                            {                                                                                R                                                                                31                                                +                                                  R                                                                                32                                                                                R                                                                                31                                                              ·                                          ln                                                                    (                                                  n                                                                                31                            ·                                                                                R                                                                                32                                                                                R                                                                                33                                                                                )                                                                              }                                ·                0.086                                                                                mV                                =          0                ,                                                                                R                                                                                31                                +                                  R                                                                                32                                                            R                                                                                31                                      ·                          ln                                            (                                  n                                                                                31                    ·                                                                  R                                                                                32                                                                    R                                                                                33                                                                                )                                              =                                                    2                                                                                mV                                            0.086                                                                                mV                                      ≅                          23.25              .                                                          (        10        )
As is understood from Equation (8), when the resistance values of the resistor elements R31 to R33 and the area ratios n31 of the diodes D31 and D32 are determined so that Equation (10) holds, the output voltage VO is determined to be a constant value that does not vary with respect to the environmental temperature as is given by the following Equation (11):
                                                        VO              =                                                                            VD                                                                                31                                +                                  23.25                  ·                  Vt                                                                                =                                                                            0.6                                                                                V                                +                                  23.25                  ×                  25.85                                                                                mV                                                                                ≅                                                          1.201                                                                                V                  .                                                                                (        11        )            It should be noted that the deviation of Equation (11) is based on the fact that the p-n junction forward voltage of the silicon diode is approximately 0.6V, and the thermal voltage Vt is 25.85 mV at the room temperature (27° C.).
In the circuit configuration of FIG. 1, both of the input voltages VIP and VIM of the operational amplifier circuit OA3 are approximately 0.6V. These voltages are lower than the threshold voltage of the generally-available enhancement NMOS transistor (typically, 0.9 to 1.1V). Accordingly, any of the following Measures #1 and #2 is required for surely operating the voltage reference circuit of FIG. 1:
Measure #1: Use depletion-type MOS transistors as the input stage transistors of the operational amplifier circuit OA3.
Measure #2: Raise the power source voltage VDD and use enhancement-type PMOS transistors as the input stage transistors of the operational amplifier circuit OA3. Specifically, the power source voltage VDD fed to the bandgap voltage reference circuit is adjusted to be higher than the sum of the p-n junction forward voltage and the threshold voltage of the PMOS transistor, which is approximately 1.8V.
However, the above-mentioned two measures are not suitable for actual implementations of the bandgap voltage reference circuit. The use of depletion-type MOS transistors (Measure 1) is not desirable in terms of manufacture process simplicity; the use of depletion-type MOS transistors requires a complicated LSI manufacture process, which leads to an increase in the manufacture cost. An LSI integration process is generally designed to manufacture only enhancement-type MOS transistors, since enhancement-type MOS transistors are most-commonly used in LSIs. Although an integration process can be designed to manufacture both of enhancement-type and depletion-type MOS transistors, such integration process requires increased numbers of masks and process steps, thereby causing disadvantages in the cost and TAT (Turn Around Time).
Meanwhile, to raise the power source voltage VDD (Measure #2) is not desirable in terms of reliability and power consumption. In recent years, dimensions of MOS transistors integrated within an LSI is increasingly refined by the advancement of the semiconductor integration technology, and accordingly a voltage allowed to be applied to a MOS transistor is decreased. The raising of the power source voltage VDD is not favorable, since it causes an increase in the voltages applied to MOS transistors. In addition, the raising of the power source voltage VDD results in an increase of the power consumption. A social need for the power-saving of electronic devices is increased in recent years, and for the purpose of satisfying this need, the raising of the power source voltage VDD in an LSI is not desired.
As far as using the circuit configuration of FIG. 1, it is impossible to address the above-mentioned issue by optimizing constants of respective elements of the bandgap voltage reference circuit (for example, a resistance value) or other measures. This fundamentally results from the fact that the voltage fed to the operational amplifier circuit OA3 is excessively low, approximately 0.6V.
Japanese Laid Open Patent Application No. H11-143563 discloses a configuration of a voltage reference circuit that operates on a low power supply voltage. The voltage reference circuit disclosed in this patent document, which is a sort of a bandgap voltage reference circuit, is configured to detect the difference between bandgap voltages across paired diodes in the bandgap voltage reference circuit by using first and second MOS transistor pairs; and to amplify the detected voltage difference. The detected voltage difference is fed back as an electric current to the paired diodes by a pair of a third MOS transistors. This allows an operation on a low power supply voltage, specifically, at a power supply voltage of approximately 1.5V.
The above-described patent document, however, is silent on specific circuit constants and operation conditions for reducing the temperature coefficient substantially to zero.


An array substrate including a display area and a non-display area, where the non-display area includes a first gate driving circuit, a second gate driving circuit, a first touch driving circuit and a second touch driving circuit. An extension direction of the first gate driving circuit and an extension direction of the second gate driving circuit are perpendicular to an extension direction of gate lines. An extension direction of the first touch driving circuit and an extension direction of the second touch driving circuit are perpendicular to an extension direction of touch driving electrodes. The first touch driving circuit and the first gate driving circuit are disposed in series along a same direction, and the second touch driving circuit and the second gate driving circuit are disposed in series along a same direction.

With rapid development of display technologies, the birth of a touch panel (Touch Panel, TP for short) makes people's life more convenient. An embedded capacitive touchscreen integrates a touch electrode structure in a display screen, has advantages of a simple structure, a light weight, a thin thickness and low cost, increasingly becomes a mainstream technology of a touchscreen, and is increasingly widely applied to various portable intelligent terminals (such as mobile phones).
In an embedded capacitive touchscreen, the embedded capacitive touchscreen may be divided into a hybrid in-cell (Hybrid In-Cell, HIC for short) capacitive touchscreen and a full in-cell (Full In-Cell, FIC for short) capacitive touchscreen.
To make a bezel (a left bezel and a right bezel) narrower, in an FFIC capacitive touchscreen, on an array substrate, a touch driving electrode Tx is made to extend along a vertical direction, a touch driving circuit 10 driving the touch driving electrode Tx is disposed below (as shown in FIG. 1) or above the array substrate, so that only a gate driving circuit 11 is disposed on a side of the left and right bezel, thereby making the bezel narrower. A corresponding touch sensing electrode Rx on a box-aligning substrate extends along a horizontal direction (as shown in FIG. 2). However, because a line width of a leading wire 12 connected to the touch sensing electrode Rx is relatively thin, in production of a leading wire, scratching by a leading wire often occurs, thereby causing a TP ghost hand.
For an FIC capacitive touchscreen, both a touch driving electrode Tx and a touch sensing electrode Rx are located on an array substrate. When the touch driving electrode Tx extend along a horizontal direction, and the touch sensing electrode Rx extend along a vertical direction, because a gate driving circuit 11 and a touch driving circuit 10 are disposed in parallel on a side of a left bezel and a right bezel (as shown in FIG. 3), a bezel cannot be made narrower. When the touch driving electrode Tx is disposed along the vertical direction, and the touch sensing electrode Rx is disposed along the horizontal direction, scratching by a leading wire also occurs.


An image processing system which performs photography of the teeth of a patient while causing a plurality of illumination light LEDs of different wavelengths to emit light by means of a photography device when producing a crown repair or denture of the patient, whereby image data are acquired. The image data are transmitted to a dental filing system constituting a processing device where color reproduction data are determined through computation. In addition, color reproduction data are transmitted to the dental technician's office via a public switched network. A repair material compound ratio calculation database is searched and compound data for a material that matches the hue of the patient's teeth is retrieved, so that a crown repair or denture or the like that very closely matches the color of the patient's teeth can be produced.

1. Field of the Invention
The present invention relates to an image processing system and camera that acquire a spectroscopic spectral image information on an object, and perform highly accurate color reproduction, examination, and judgment and so forth on an image of the object from the acquired image information.
2. Description of the Related Art
In recent years, there has been a growing interest in health and an increased need for whitening due to the pursuit of beauty. Conventionally, diagnoses using skin diagnosis cameras have been provided in dermatology, esthetic salons, and beauty counseling and so forth. In the case of dermatology in particular, counseling that grasps characteristics from an image of skin grooves and hills and so forth is performed as diagnosis of the skin surface. Further, the abovementioned skin diagnosis camera has been proposed by Japanese Patent Application Laid Open No. H8-149352, Japanese Patent Application Laid Open No. H7-322103 and the like.
On the other hand, with respect to restoration of a dental crown in a dental treatment, conventionally a color grade judgment is performed by means of a comparison with the color of the patient's teeth by means of a shade guide when determining the color of the tooth that is to be restored.
Although accurate color reproduction is determined in each field including dermatology and dentistry as mentioned earlier, the system disclosed by Japanese Patent Application No. 2000-152269 as a conventional highly accurate color reproduction system applies a camera that captures an image of an externally illuminated object by means of a multisprectral. In this system, a multiplicity of rotatable spectroscopic filters are used for a highly accurate estimate of the object spectroscopic spectral and multiple band data are acquired as a result of the rotation of the filters to allow high color reproduction to be implemented.
A variety of other techniques have been proposed as techniques for acquiring spectroscopic images.
A device for capturing a multiband image through time division by using a rotating filter that is constituted of a plurality of optical bandpass filters placed in a row on the circumference appears in Japanese Patent Application No. H9-172649, for example.
Furthermore, a device that easily performs multiband photography by using a filter (comb-shaped filter) that multiply divides a spectroscopic wavelength band appears in Japanese Patent Application Laid Open No. 2002-296114.
In addition, Japanese Patent Application Laid Open No. 2003-087806 mentions a constitution of a multisprectral camera that is capable of photographing images of a multiplicity of bands at the same time by integrating a color filter array of six bands or more with a single-panel CCD.
Further, Japanese Patent Application Laid Open No. 2003-023643 mentions a constitution of a multisprectral camera that is capable of photographing images of six bands by means of 3-panel CCDs by using a half mirror and a dichroic mirror.
For the abovementioned dermatology, dentistry and other fields in which accurate color reproduction is sought, a contribution to examination, confirmation and discrimination and the like is required through strict color reproduction of the paint color of an automobile, the paint color of a building, the spectroscopic characterization of a foodstuff, and the dye of a garment, and so forth, for example. Further, these devices are also required to be small and lightweight and handy for the sake of examination operability.


Methods for providing a cable closure enclosing a cable splice include wrapping a flexible wrap including a gel layer and a flexible support layer around the cable splice with the gel layer adjacent the cable splice. The gel layer may have an adhesion-reducing substance applied on at least part of a surface of the gel layer facing away from the flexible support layer and a removable cover layer may be applied to a surface of the gel layer facing away from the flexible support layer on which the adhesion-reducing substance is not applied. The wrap is gathered into overlapping wrinkles around at least one longitudinal end of the cable splice without applying heat, other external energy source or catalytic agent to allow the gel layer to seal the at least one longitudinal end of the cable splice.

Traditionally, cable splice closures would be heat-shrinkable, such that on applying heat, the closure would shrink and closely encapsulate the splice, providing a good seal. However, there is a growing demand for so-called cold applied closures, which can be applied without use of heat or other external energy source.
Several types of cold applied closures have been proposed. Some involve tape which can easily be wrapped around the cable splice. Many closures involve gel or gel-type materials because of their excellent sealing properties, especially when suitably enclosed and compressed against an object to which a seal is desired. Existing hard-shelled closures, disclosed in for example WO-A-9516500, are provided with chambers for containing the gel. Although such an arrangement provides an excellent seal, the predetermined size of a hard-shelled closure requires a range of closures to be provided in order to be able to accommodate cable splices of various shapes and dimensions.


A body-on-frame vehicle includes a left frame rail, a right frame rail, a plate, a plurality of cross-members, a plurality of power storage modules, and a first electric motor. The plate is attached to both frame rails. The plurality of cross-members are attached to both frame rails. Adjacent cross-members cooperate with the plate and frame rails to define compartments. The plurality of power storage modules are disposed within a plurality of the compartments. The first electric motor is supported by a section of the frame rails forward or rearward of the power storage modules.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Electric vehicles typically include a plurality of battery modules electrically coupled together to form a battery pack. The battery pack is typically pre-assembled on a battery support structure that is then mounted as one full battery assembly to the already fabricated vehicle frame. The connections between the battery assembly and the separate vehicle frame can provide pathways for noise, vibration, and harshness (NVH). Complete battery packs can also be very heavy, making assembly difficult and requiring thick, heavy frames and similarly robust mounts to secure the battery assembly to the frame. Furthermore, the mass of the separate battery assembly can add to sheer stresses in the frame.
These issues with typical electric vehicles are addressed by the present disclosure, which provides for a body-on-frame electric vehicle with a battery pack integral to the vehicle's frame.

Body-on-frame electric vehicle with battery pack integral to frame


A method for providing network communication to a wireless device through a plurality of wireless protocol links. A first protocol link from the plurality of wireless protocol links is selected based on some predetermined criteria. A first network connection is established through the first protocol link. A second protocol link from the plurality of wireless protocol links is selected based on the change in status or condition of the first protocol link with respect to the predetermined criteria. A second network connection is established through the second protocol link, and the first network connection through the first protocol link is terminated.

Wireless devices, such as wireless telephones and personal digital assistants, are increasingly used to connect to a network such as the Internet. A wireless device connects to the Internet by establishing a communication link with a base unit that is connected to the Internet. The wireless device will establish a link with a base unit according to some wireless communication protocol, such as Code-Division Multiple Access (CDMA), the "Bluetooth" wireless standard, or one of the 802.11 specifications of the Institute of Electrical and Electronics Engineers (IEEE). Once the wireless link is established with the base unit, the wireless device can communicate over the Internet, such as by sending and receiving packets according to a Transfer Control Protocol/Internet Protocol (TCP/IP) connection.
In order to maintain an established network connection (e.g., TCP/IP connection for the Internet), the wireless device is required to maintain continuous communication with a base unit according to the wireless protocol that was originally used to establish the connection. If the wireless device is moved to a coverage zone of a base unit that operates in accordance with a different protocol, then the network connection is usually broken and a new connection using the different protocol is established. To re-establish a connection within the new coverage zone, the wireless device may need to be re-initialized and re-authenticated according to the different protocol used in the new coverage zone. This handoff process where the existing connection is terminated before the new connection can be re-established is sometimes referred to as a "hard handoff".
For example, FIG. 1 illustrates a "hard handoff" process in a wireless communication system 100 having three wireless communication protocols, CDMA, Bluetooth, and 802.11, within four different coverage zones, Zone A, Zone B, Zone C, and Zone D. Each zone is identified with a respective circle to denote primary area of geographic coverage, with Zone D being the largest circle, encompassing the area representing a CDMA coverage zone for a base station. When a wireless device 102 operating within Zone A with the 802.11 protocol is desired to move to Zone B with the same 802.11 protocol, the wireless device 102 must travel between Zone A and Zone B through Zone D operating with the CDMA protocol. In this case, the network connection made through the 802.11 protocol 104 while in Zone A needs to be terminated, approximately at a location 106, and a new network connection established substantially at the same time, at 108, through the CDMA protocol for wireless communication while the device 102 transits in Zone D. Once the wireless device 102 enters Zone B, the CDMA connection can be terminated at 110 and another new network connection can be established in Zone B, at 112, through the 802.11 protocol. A similar process may be required for the wireless device 102 when it is moving from Zone A (with the 802.11 protocol) to Zone C (with the Bluetooth protocol).
The above-mentioned "hard handoff" process is illustrated in a block diagram 200 in FIG. 2. The wireless device 102 connects to a host 202 through one of several base units 204A, 204B, 204C, 204D that are connected to the Internet. A service provider 206A, 206B, 206C, or 206D corresponding to the respective selected base unit 204A, 204B, 204C, 204D connects the base unit to the Internet. Although four base unit/service provider pairs are illustrated in FIG. 2, it should be understood that a greater or lesser number of base units and service providers might be available to a particular wireless device. Moreover, two or more base units might connect to the Internet through the same provider.
Thus, if the wireless device 102 is currently connected to the host 202 through an 802.11 base unit 204A through a service provider 206A, and it is necessary or desired to connect to the host 202 through another protocol, for example the CDMA base unit 204C, the wireless device 102 will need to terminate its connection to the 802.11 base unit 204A, and initialize and establish a new connection to a CDMA base station 204C and the service provider 206C before the new connection can be made. This adds delay to inter-protocol communications and makes such roaming more complicated. Accordingly, for a wireless device that connects to a host through a network while roaming between coverage zones of various protocols, a protocol transfer process through multiple terminations and re-establishments of a network connection is cumbersome and undesirable.
In view of the foregoing discussion, there is a need for a network connection configuration that allows the wireless device to more efficiently roam between various communication protocols without the repeated terminations and re-establishments of the network connection. The present invention solves this need.


Technologies pertaining to designing microsystems-enabled photovoltaic (MEPV) cells are described herein. A first restriction for a first parameter of an MEPV cell is received. Subsequently, a selection of a second parameter of the MEPV cell is received. Values for a plurality of parameters of the MEPV cell are computed such that the MEPV cell is optimized with respect to the second parameter, wherein the values for the plurality of parameters are computed based at least in part upon the restriction for the first parameter.

As concerns continue to mount with respect to carbon emissions associated with conventional electric power generation systems, continued research has been undertaken with respect to power generation systems that use renewable energy resources to generate electric power, such as solar power systems, wind power systems, geothermal power systems, and the like. With more particularity regarding solar cells, such solar cells are designed to convert at least a portion of available light into electric energy. Solar cells are generally based upon semi-conductor physics, wherein a solar cell comprises a P-N junction photodiode with a light sensitive area. The photovoltaic effect, which causes a solar cell to convert light directly into electric energy, occurs inside a semiconductor material where light knocks off electrons. Because of the structure of the cell, there is an induced field that causes electrons to flow in one direction and collect at the terminals. One common structure of the solar cell is based on a PN junction composed of two layers: a p-type semiconductor and an n-type semiconductor. The interface where the two join is referred to as a junction.
Cost to manufacture solar cells has reached a point where solar energy is beginning to become cost-competitive with conventional fossil-fuel burning systems.


The invention provides new triazolo[4,5-d]pyrimidine compounds, their use as medicaments, compositions containing them and processes for their preparation.

Platelet adhesion and aggregation are initiating events in arterial thrombosis. Although the process of platelet adhesion to the sub-endothelial surface may have an important role to play in the repair of damaged vessel walls, the platelet aggregation that this initiates can precipitate acute thrombotic occlusion of vital vascular beds leading to events with high morbidity such as myocardial infarction and unstable angina. The success of interventions used to prevent or alleviate these conditions, such as thrombolysis and angioplasty is also compromised by platelet mediated occlusion or re-occlusion.
A number of converging pathways lead to platelet aggregation. Whatever the initial stimulus, the final common event is a cross-linking of platelets by binding of fibrinogen to a membrane-binding site, glycoprotein IIb/IIIa (GPIIb/IIIa). The high anti-platelet efficacy of antibodies or antagonists for GPIIb/IIIa is explained by their interference with this final common event. However, this efficacy may also explain the bleeding problems that have been observed with this class of agent. Thrombin can produce platelet aggregation largely independently of other pathways but substantial quantities of thrombin are unlikely to be present without prior activation of platelets by other mechanisms. Thrombin inhibitors such as hirudin are highly effective anti-thrombotic agents, but again may produce excessive bleeding because they function as both anti-platelet and anti-coagulant agents (The TIMI 9a Investigators (1994), Circulation 90, pp. 1624-1630; The Global Use of Strategies to Open Occluded Coronary Arteries (GUSTO) IIa Investigators (1994) Circulation 90, pp. 1631-1637; Neuhaus K. L. et. al. (1994) Circulation 90, pp. 1638-1642).
It has been found that adenosine 5′-diphosphate (ADP) acts as a key mediator of thrombosis. A pivotal role for ADP is supported by the fact that other agents, such as adrenaline and 5-hydroxytryptamine (5HT, serotonin) will only produce aggregation in the presence of ADP. The limited anti-thrombotic efficacy of aspirin may reflect the fact that it blocks only one source of ADP which is that released in a thromboxane-dependent manner following platelet adhesion (see e.g. Antiplatelet Trialists' Collaboration (1994), Br. Med. J. 308, pp. 81-106 and Antiplatelet Trialists' Collaboration (1994), Br. Med. J. 308, pp. 159-168). Aspirin has no effect on aggregation produced by other sources of ADP, such as damaged cells or ADP released under conditions of turbulent blood flow.
ADP-induced platelet aggregation is mediated by the P2T receptor subtype located on the platelet membrane. The P2T receptor (also known as P2YADP or P2YAC) is primarily involved in mediating platelet aggregation/activation and is a G-protein coupled receptor which is as yet uncloned. The pharmacological characteristics of this receptor have been described, for example, in the references by Humphries et al., Br. J. Pharmacology (1994), 113, 1057-1063, and Fagura et al., Br. J. Pharmacology (1998) 124, 157-164. Recently it has been shown that antagonists at this receptor offer significant improvements over other anti-thrombotic agents (see J. Med. Chem. (1999) 42, 213). Accordingly there is a need to find further P2T (P2YADP or P2TAC) antagonists as anti-thrombotic agents.
International Patent Application WO 9905143 discloses generically a series of triazolo[4,5-d]pyrimidine compounds having activity as P2T (P2YADP or P2TAC) antagonists. It has now been found that certain compounds within the scope of International Patent Application WO 9905143 but not specifically disclosed therein exhibit high potency combined with surprisingly high metabolic stability and bioavailibility, such that the predicted therapeutic dose for prolonged inhibition of aggregation in man shows advantage.

This patent is subject to a terminal disclaimer.

Trisubstituted triazolopyrimidines for use in platelet aggregation inhibition


Disclosed herein are methods for forming low melting point glass fibers comprising providing a glass feedstock comprising a low melting point glass and melt-spinning the glass feedstock to produce glass fibers, wherein the glass transition temperature of the glass fibers is less than or equal to about 120% of the glass transition temperature of the glass feedstock. The disclosure also relates to method for forming low melting point glass frit further comprising jet-milling the glass fibers. Low melting point glass frit and fibers produced by the methods described above are also disclosed herein.

Glass frit may be used in sealing and bonding applications, for instance, as a means to hermetically bond glass and/or ceramic materials. Exemplary applications for such hermetic seals include televisions, sensors, optical devices, organic light emitting diode (OLED) displays, and any other devices which may benefit from a hermetic environment for sustained operation, such as 3D inkjet printers, solid-state lighting sources, and photovoltaic structures.
Traditional glass frit may typically be produced by milling or grinding glass cullet to a particle size ranging from about 5 to about 30 microns. The glass particles may then be mixed with inorganic powders having a negative coefficient of thermal expansion (CTE) so as to lower the mismatch of CTE between the substrates to be bonded and the glass frit. Negative CTE powders typically used in the art may include, e.g., β-eucryptite, zirconium vanadate (ZrV2O7), and zirconium tungstate (ZrW2O8). Conventionally, glass frit and negative CTE powders are blended into a paste using an organic solvent, which acts as a binder and adjusts the rheological viscosity of the combined powders for dispensing purposes.
To join two or more substrates, the glass frit paste may be applied to one of the substrates in a pattern, such as by screen printing or controlled syringe dispensing. The thickness of the glass frit paste may vary, for example, from about 5 to about 30 microns. The patterned substrate may then be treated by (a) an organic burn-out step during which the organic vehicle is removed (e.g., heating to about 250° C. for about 30 minutes), and (b) an inorganic glazing step (e.g., heating to about 490° C. for about 10 minutes). The treated patterned substrate may be subsequently assembled with the other substrate by applying sufficient pressure to ensure good substrate contact. The assembled substrates are subsequently heated to a temperature sufficient to bond the substrates, e.g., by infrared laser or any other suitable heating means.
Glass compositions having a glass transition temperature (Tg) of less than about 450° C. are referred to herein as low melting point glass (LMG) compositions. It is often desirable to produce glass frit from LMG compositions for applications which benefit from lower temperature processing.
Vanadium oxide based LMGs tend to have a Tg ranging from about 250° C. to about 450° C. Lead-containing LMGs may have a lower Tg, but these glass compositions are often less favorable for commercial application because they are not considered to be environmentally "green." Previous efforts to mill glass frit from lower melting temperature lead-free materials, such as glass phosphate LMG compositions, resulted in heavily oxidized materials that did not retain their original low melting characteristics. Without wishing to be bound by theory, it is believed that this effect is a result of the LMG's ease of oxidation and the anion (e.g., fluorine) volatility produced by the violent chemical bond breaking events associated with prior art milling processes. For example, when such LMG materials are ball milled in a nitrogen environment, it is observed that these chemically labile glass compositions exhibit oxidation and anion volatility. Certain subsets of these LMG compositions may also exhibit self-passivation resulting in surfaces that are highly refractory.
Due to the various complications described above, conventional attempts to produce LMG frits tend to be limited to particle sizes of greater than 150 microns. Commonly used approaches to produce LMG frit therefore employ either (a) lead-containing glasses or (b) higher Tg glasses that are more resistant to oxidation. Accordingly, it would be advantageous to provide methods for producing glass frit or fibers that have a smaller particle size, are substantially lead-free, and/or that have a Tg of less than 250° C. and/or less than about 120% of the Tg of the LMG composition from which they are formed. The resulting glass frit or fiber compositions can possess low melting temperature properties while also being durable and/or environmentally desirable.


A method and apparatus for reducing the settling time of a switched-capacitor circuit (10) which includes at least one capacitor (20) having at least one terminal connected to a switch. The method comprises the step of clocking the switched-capacitor circuit at a switching clocking frequency. In response to a control signal (51), the at least one terminal of the at least one capacitor (20) is biased to a reference voltage potential.

Switched-capacitor circuits are known. Such circuits are the product of circuit design techniques commonly used to miniaturize (integrate) components. In portable (hand-held) radio communication applications, components such as filters, integrators, differential amplifiers, comparators, summers, etc., are often reduced to integrated circuit (IC) form. When a capacitor is switched, by the switches of a switched-capacitor circuit, between a signal source to be sampled and the load, at a rate many times that of the frequency of the sampled signal, the capacitor will simulate the circuit behavior of a resistor between the source and the load. By combining capacitor(s), switched-capacitor(s), and operational amplifier(s), complex functions such as filtering can be implemented efficiently in IC form.
To reduce the current drain (energy consumption) of a switched-capacitor circuit, it is known to activate (or power-up) the operational amplifier (op-amp) associated with the switched-capacitor circuit only when the circuit function is needed, in the normal mode, and to fully deactivate the op-amp (or power-down) when it is not in use, in the power down or idle mode. This powering-down provides maximized energy savings since the majority of current is drawn by the op-amp when activated.
Referring to FIG. 1, a switched-capacitor circuit, implemented as a first order low-pass filter 10, is shown, as an example, illustrating the settling time problem. Settling time is defined to be the time interval, following the initiation of a specified stimulus to a system, required for a specified variable to enter and remain within a specified narrow band centered on the final value of the variable. The switched-capacitor filter 10 comprises an operational amplifier 16, a pair of switched-capacitors 12 and 14 (that simulate resistors when switched rapidly), and a non-switched feedback capacitor 22.
An input signal, V.sub.in, is coupled to the inverting input of the operational amplifier (Op-amp) 16 by a quadruplet of switches 181-184, collectively referred to as switch or switches 18. Similarly, a quadruplet of switches 191-194, is collectively referred to as switch or switches 19.
As is readily understood in the art, there are at least two phases of switching signals, generated by a multi-phase clock generator circuit, associated with the switches 18 and 19. If only two phases are generated, they are commonly called an EVEN (E) phase and an ODD (O) phase. Typically, these E and O signals are of complementary phases and are generated from a bi-phase non-overlapping clock generator circuit. The switching signals are considered to be non-overlapping when the respective switches they control are never in the closed state simultaneously (E, O=11). That is, the highs or logical ones of the ODD phase clock signal occur within the lows or logical zeros of the EVEN phase clock signal, and the logical highs or ones of the EVEN phase clock signal occur within the logical lows or zeros of the ODD phase clock signal (E, O=01, 00, or 10). Hence, during the EVEN clock phase, all the switches marked "EVEN" are closed simultaneously, then opened followed by a closure of all the switches marked "ODD", during the ODD clock phase. It is thus assured that no two adjacent switches are turned on at the same time.
When the switches 18 are closed for the EVEN phase, the current provided by V.sub.IN charges the capacitor 12. The charge accumulated on the capacitor 12, during the EVEN switching phase, is re-distributed, or discharged, to the capacitors 14 and 22 when the switches 18 and 19 are closed for the ODD phase.
As in a conventional active RC low-pass filter, the positive, or non-inverting, input of the Op-amp 16 is connected to an analog ground potential V.sub.AG. The term "virtual ground" or analog ground (V.sub.AG) is used commonly in analog circuit design to refer to a voltage potential, usually at the middle of the positive and negative power supply potentials, where an analog signal is referenced as zero signal potential.
The Op-amp 16 provides an output signal V.sub.out, a portion of which is fed back to the negative input of the Op-amp 16 by the feedback capacitor 22 and the feedback switched-capacitor 14 (in conjunction with the switches 19). Thus, the switches 181-184 and the switched-capacitor 12 form a switched-capacitor input network 20. Similarly, the switches 191-194 and the switched-capacitor 14 form a switched-capacitor feedback network 30. Hence, each switched-capacitor network forms a switched-capacitor resistive element or an equivalent resistive element, each having input and output terminals. With four switches shown, as connected, in the commonly known parasitic-insensitive configuration, each of the networks 20 and 30 also forms a parasitic-insensitive switched-capacitor network or resistive element.
Switched-capacitor network 20 is inverting the charging process, because the same clock phase is controlling, on both sides of the switched-capacitor, either the switches (182 and 184) connected to the input terminal and V.sub.AG or the switches (181 and 183) connected to V.sub.AG and the output terminal. Conversely, switched-capacitor network 30 is non-inverting the charging process, because the same clock phase is controlling, on both sides of the switched-capacitor, either the switches (192 and 194) both connected to V.sub.AG or the switches (191 and 193) connected to the input and output terminals. Either the inverting or non-inverting charging configuration can be interchanged, and used suitably, anywhere in a switched-capacitor circuit.
A power down (PD) control signal 51 is coupled to a port of the op-amp 16 to selectively turn the op-amp 16 ON, for normal mode operation, and OFF (the output is tri-stated or open circuited), for power down mode operation.
During normal circuit operation (normal mode), the control signal 51 is at a low logic level, which turns the op-amp 16 ON to provide the output voltage V.sub.out. When the control signal PD 51 is at a logic high level, representing a power down mode, the output node 28 of the op-amp is floating and essentially disabled with no power flow through the op-amp 16.
In other words, when the op-amp output is tri-stated, the powered-down configuration of the switched-capacitor circuit would be the same as if the op-amp were simply removed. If the E, O non-overlapping clocks remain switching, the circuit becomes a passive network whose node voltages are topologically dependent. Specifically, the continued switching of the switching capacitors 12 and 14 may convert the charges stored in all the capacitors 12, 14, and 22, into undesirable potentials. These stored voltage potentials may result in an undesired average output voltage V.sub.out.
If the E, O switches 18 and 19 are simply stopped at any of the non-overlapping states (E, O=01 or 10) or the open state (E, O=00), the node voltages will still float to undefined states, due to the presence of leakage currents. When the switched-capacitor circuit 10 is again powered-up by PD=0, node voltages will usually be in these non-V.sub.AG DC states which will only decay to V.sub.AG after circuit-dependent time constants.
For filters with low corner frequencies, these time constants may be as long as several milliseconds. The problem may be compounded if the offset of the input is varying due to preceding circuits also settling. Consequently, there is a significant delay before a powered-up path settles.
In communication applications, such as in a radio, the switched-capacitor filter 10 is implemented as an integrated circuit (IC) for audio filtering of communication signals. Hence, if a speaker type output load is coupled to the output node 28, during a transition to the power up mode, i.e., the PD 51 signal goes from high to low, a large transient output voltage spike may occur. This large transient may be audible and objectionably loud.

Switched-capacitor circuit power down technique


An open-looped cooling system is disclosed. The cooling system typically includes a cylinder head including a first water jacket through which cooling water flows, a cooling water inlet through which the first water jacket communicates with outside, and a first cooling water outlet through which the first water jacket communicates with outside, a cylinder block including a second water jacket through which the cooling water within the first water jacket flows, the second water jacket being configured to communicate with the first water jacket, and a second cooling water outlet through which the second water jacket communicates with outside, and a thermostat configured to control a flow rate of the cooling water flowing out from the second cooling water outlet of the cylinder block based on a temperature of the cooling water.

1. Field of the Invention
The present invention generally relates to a cooling system of an engine for personal watercraft. More particularly, the present invention relates to a cooling system which is capable of inhibiting excess cooling of a cylinder block of an engine.
2. Description of the Related Art
In recent years, water-jet propulsion personal watercraft have been widely used in leisure, sport, rescue activities, and the like. A typical personal watercraft comprises a body including a hull and a deck covering the hull from above, and is equipped with an engine in a space inside the watercraft that is defined by the hull and the deck. The engine is configured to drive a water jet pump configured to propel the watercraft, which pressurizes and accelerates water sucked through a water passage from a water intake generally provided on a hull bottom surface and ejects it rearward from an outlet port. As a result, the personal watercraft is propelled.
In such a personal watercraft, typically, water, for example, sea or lake water that has been pressurized by the water jet pump is partially drawn up from an inside of the water jet pump through a water-drawing hole formed in a pump casing of the water jet pump, for use as cooling water to cool various engine components. The cooling water flows through a cylinder head, a cylinder block, and auxiliary devices such as an exhaust pipe (e.g., exhaust manifold) while cooling these components. Such a cooling system is referred to as an open-looped cooling system (direct cooling system). In the personal watercraft disclosed in Japanese Patent No. 3084781, water is taken in from outside the watercraft for use as cooling water and is supplied to a passage formed in a wall portion of an exhaust manifold, and some of the cooling water flows through a passage formed within a wall portion of a cylinder block and then through a passage formed within a wall portion of a cylinder head while cooling the engine components. After that, the cooling water is discharged outside the watercraft.
Since the exhaust pipe and the cylinder head tend to heat up to relatively high temperatures, they must be sufficiently cooled. On the other hand, if the cylinder block is cooled excessively, then a friction loss may increase between a piston that slides within the cylinder block and an inner wall of the cylinder block, and further, fuel existing within a combustion chamber may not be sufficiently vaporized, and the unvaporized fuel may flow into lubricating oil, leading to dilution of the oil.
In the personal watercraft which employs the above mentioned open-looped cooling system, the water used as cooling water, which is generally sea or lake water, typically has a relatively low temperature, and thus the cylinder block tends to be cooled excessively, if the engine runs at a low engine speed during, for example, an idling state in which heat generation amount is small.
In the cooling system disclosed in the above patent Japanese Patent No. 3084781, a thermostat is equipped to control a flow rate of the cooling water supplied to the engine components to inhibit excess cooling of the engine. In this cooling system, however, since the thermostat is positioned downstream of a point at which the cooling water that has cooled the cylinder head and the cooling water that has cooled the cylinder block gather, the flow rate of the cooling water to be supplied to the cylinder head may be reduced if the thermostat operates to inhibit excess cooling of the cylinder block. As a result, the cylinder head may be undesirably cooled insufficiently.

Cooling system of engine for personal watercraft


An apparatus for preferably automatic handling and/or processing of objects (1), in particular in the field of medical technology, having at least one processing station (3) and one object carrier (2) for bringing the object (1) to the processing station (3), optionally through the processing station (3), and away from the processing station (3), is characterized in that the object carrier (2) has a code; that data concerning the object (1) and/or the handling or processing of the object (1) can be assigned to the code; and that the data can be read or retrieved by way of the code.

Apparatuses of the generic type are known from a wide variety of fields. Very generally, they are apparatuses used for handling and/or processing objects of any kind. The objects are delivered either to a single processing station or to multiple processing stations, usually in a predefined sequence; processed therein; and then lastly transported away from the processing station, in which context different groups of processing stations can be arranged one behind another.
Reference is made, purely by way of example, to EP 0 849 582 A2. This document discloses an apparatus for treating objects, in particular cytological or histological specimens, in which cytological or histological specimens are delivered by way of an object carrier or basket to an automatic stainer, the automatic stainer comprising multiple processing stations. Once the object has been delivered to the automatic stainer, identification of the object or indeed of multiple objects within the automatic stainer is no longer possible. Simultaneous processing of different specimens is therefore not possible with the known apparatus, since there is a risk of mixing up different specimens. With the known apparatus is also not possible simultaneously to run different staining programs with identical or different specimens, since no distinction can be made among the various specimens that are to be differently processed or stained.

Apparatus for preferably automatic handling and/or processing of objects


A grease composition, which comprises (A) a perfluoropolyether base oil, (B) a thickener, and (C) barium sulfate and/or antimony oxide, where 0.1-50% by weight of the component (B) and 1-25% by weight of the component (C) are contained, has a distinguished effect on improvements of abrasion resistance, friction characteristics, load durability, high-temperature durability and corrosion resistance without any deterioration of heat resistance by adding at least one of barium sulfate and antimony oxide, each having an average primary particle size of 0.1-20 μm, as component (C).

Grease is widely used in lubrication of various types of machinery such as automobiles, electric machines, construction machines, production lines, information equipment, industrial machines, machine tools, etc., and also members making up the above-mentioned machinery. As lubricants for use in severe circumstances, for example, at high temperatures or low temperatures, and under high loads, fluorine-based greases comprising a perfluoropolyether base oil, a fluororesin, and various additives have been widely used.
With recent trends of higher speed, smaller sizes, higher performances and lighter weight of machines, various additives are added to these fluorine-based greases to correspond to more and more severe service condition. For example, fluorine-containing organophosphorus compounds are known as fluorine-based additives having improved effects on solvent resistance, chemical resistance, mold releasability, abrasion resistance, friction resistance, etc., and in this connection, the present applicants have so far proposed a lubricating oil composition having distinguished abrasion resistance and rust prevention, based on a perfluoropolyether base oil containing a specific phosphonic acid compound, as a fluorine-based base oil. However, since phosphonic acid group resides only at one terminal of the molecule, the proposed lubricating oil composition is hard to satisfy the recently imposed requirements for higher lubricability and rust prevention at the present time.
Patent Literature 1: JP-A-2003-027079
Besides the fluorine-based additives, solid lubricants such as graphite, molybdenum disulfide, boron nitride, etc. are known to improve the lubricability, and addition of organic molybdenum compounds has been proposed to improve the abrasion resistant characteristics. However, these additives each have their own specific drawbacks. For example, graphite is chemically stable and less expensive, and has a distinguished lubricability, but any satisfactory rust prevention cannot be obtained even by adding it to perfluoropolyether base oil and fluororesin, and furthermore due to the black color peculiar to its nature, the graphite is intentionally not used with the exception of specific applications.
The following Patent Literature 2 discloses a method for forming an oxide film on the rolling surface of a bearing upon admixing a passivating oxide, but there is such a problem that any satisfactory effect cannot be attained unless the oxide film can be thoroughly formed. Furthermore, it is hard to completely satisfy the recently imposed requirements for higher heat resistance, abrasion-resistant characteristics, friction-resistant characteristics, and rust prevention.
Patent Literature 2: Japanese Patent No. 2,878,749


A method and apparatus is provided for implementing combinatorial hypermaps (CHYMAPS) and/or generalized combinatorial maps (G-Maps) based data representations and operations, comprising: mapping term-algebras to tree-based numbers using a fast algorithm and representing a graph of the mapping structure as a CHYMAPS using reversible numeric encoding and decoding; generating a representation of CHYMAPS in a form optimized for sub-map (sub-graph) to map (graph) isomorphism and partial matching with a general matching process; performing operations on the CHYMAPS as operations on respective numerical representations; performing compression and decompression using a three bit self-delimiting binary code; and storing and retrieving codes.

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Search engines, relational database systems, graph representation and most structural data representation and computation systems, have the property that data are stored as integers. Encoding, operating with and, decoding of these integers consumes considerable CPU time. Therefore, substantial effort has been made to reduce costs associated with computation by operating on reduced size or compression and decompression schemes for data.

System and method of combinatorial hypermap based data representations and operations


The present disclosure relates to an apparatus and method for synthetically making an ultra-wide imaging bandwidth in millimeter-wave frequencies, resulting in improved image resolutions to values previously unattained. The synthetic approach sums up a number of available sub-bands (channels) to build an unavailable ultra-wideband system. Each channel contains an antenna unit which is optimized for operation within that specific sub-band. The number and position of the channels can be adjusted to cover any frequency range as required for the specific application.

Millimeter-wave imaging is a relatively mature and low-cost imaging technology. However, it has only been applied in military and commercial settings thus far. Despite the various potential advantages of this technology in the biomedical imaging context, such as high image contrasts and suitable penetration depths, it has not been applied in any such applications.
Millimeter-wave imaging is generally performed using wideband techniques (either in frequency or time domain), wherein the image resolution is directly proportional to the bandwidth of the system. There have been no reports of a millimeter-wave imaging system that has the ability to provide the ultra-wideband operation which would be required for accurate tissue imaging. Due to this limitation, no millimeter-wave imaging system has been developed for the purpose of biomedical imaging.
This invention addresses the low image resolutions achieved using current technology by providing significant improvements in the resolution of acquired images. This improvement is achieved by synthesizing an ultra-wide imaging bandwidth that cannot be realized by any conventional design method.

Synthetic ultra-wideband millimeter-wave imaging for tissue diagnostics

THE TRUSTEES OF THE STEVENS INSTITUTE OF TECHNOLOGY


An encoder having a code strip, a light emitter, a photodetector, and a spacing member is disclosed. The code strip includes an encoding region having a plurality of reflective and absorptive regions on a carrier having an encoding surface. The light emitter generates a light signal that is reflected from one of the reflective regions. The reflected light is measured by the photodetector. The spacing member maintains a fixed distance between the encoding surface and the photodetector when the code strip moves relative to the photodetector in a travel direction. The spacing member is attached to the photodetector and moves relative to the code strip when the code strip moves relative to the photodetector. A mechanism for allowing one of the photodetector and the code strip to move in a direction perpendicular to the travel direction to accommodate alignment errors can also be included.

Encoders provide a measurement of the position of a component in a system relative to some predetermined reference point. Encoders are typically used to provide a closed-loop feedback system to a motor or other actuator. For example, a shaft encoder outputs a digital signal that indicates the position of the rotating shaft relative to some known reference position that is not moving. A linear encoder measures the distance between the present position of a moveable carriage and a reference position that is fixed with respect to the moveable carriage as the moveable carriage moves along a predetermined path.
Optical encoders utilize a light source and a photodetector to measure changes in the relative position of an encoding disk or strip. In a transmissive encoder, the encoding strip includes a series of alternating opaque and transparent bands. The light source is located on one side of the encoding strip, and the photodetector is located on the other side of the encoding disk. The light source and the photodetector are fixed relative to one another, and the encoding strip moves between the light source and the photodetector such that the light reaching the photodetector is interrupted by the opaque regions of the encoding strip. The position of the encoding strip is determined by measuring the transitions between the light and dark regions observed by the photodetector.
In a reflective encoder, the light source and photodetector are located on the same side of the encoding strip, and the encoding pattern consists of alternating reflective and absorbing bands. The light source is positioned such that light from the light source is reflected onto the photodetector when the light is reflected from the reflective bands.
Transmissive encoders have a number of advantages over reflective encoders in terms of tolerance. In a transmissive encoder, the light from the light source is collimated before it reaches the encoding strip, and hence, the light leaving the encoding strip is also collimated. The detection assembly needs only to image this collimated light onto the detector surface. Hence, the only critical distance is that between the imaging lens and the detector. This distance remains constant even if the distance between the code strip and the detector varies during the relative movement of the code strip and the detector.
In a reflective encoder, the distance between the code strip and the detector is critical as either the encoding strip itself or the light source as seen in the reflected light from the encoding strip is imaged into the detector. Hence, if there is an error in the code strip to detector module distance, the image will be out of focus and errors will result.
Unfortunately, transmissive encoders require that the two separate components, the light source and photodetector, be mounted and aligned with one another at the time of assembly of the encoder. This increases the burden on the manufacturer of the final product that incorporates the encoder. Reflective encoders, in contrast, are constructed from a single emitter-detector element that is packaged together with the various optical components for imaging the light source onto the photodetector. Hence, the manufacturer only has to mount and align one component. This reduces the cost of assembly from the manufacturer's point of view. In addition, in many applications involving miniature motors and the like, providing mounting locations on both sides of the code strip poses problems. Hence, if the problems associated with maintaining the correct distance between the code strip and the emitter detector module could be overcome, reflective encoders would be preferred.

Reflective linear encoder having controlled detector to code strip distance

Avago Technologies General IP (Singapore) Pte. Ltd.


An axial elongated main body of a container with flexible material has a filler member of soft and more resilient material filled and fixed in the main body of the container. A penis insertion part is arranged at a substantial central part of the filler member and lubricant agent is coated at the penis insertion part. The penis insertion part has a narrow insertion part and a slack insertion part. The narrow insertion part is provided with a plurality of projections. The massage device so constructed is operated such that a lid, if this is set at the device, is taken off of the device and if the lid is not set at the device, a packaging bag is broken and then lubricant agent is coated on the penis insertion part. Or if the device is coated in advance with lubricant agent, the device may be used as it is.

1. Field of the Invention
This invention relates to a massage device which is preferable in use to apply a massage to male sexual organs.
2. Description of the Related Art
Although in the prior art, there have been well known to provide various kinds of devices or tools for applying a massage to male sexual organs, they are expensive and show an outer appearance to cause its object to be easily recognized at a glance, a shamed feeling is generated at a purchaser on purchasing the device or the device can be bought at a specific site, and so a sufficient distribution of the device is not yet attained.
To the contrary, it has been well requested, on one hand, to provide means for satisfying physical requirements of a male conveniently and safely so as to prevent Aids caused by sexual intercourse with non-specified many persons or to prohibit sexual crimes, and on the other hand, to provide a convenient high performance massage device capable of taking sperms in order to perform a study or treatment with development of modern medical system, and taking and keeping sperms for artificial fertilization for the sake of an accident of a husband or a couple having no child.


Various embodiments of the present disclosure disclose a storage system. The storage system comprises: at least one storage device array enclosure, each of the storage device array enclosure accommodating storage devices, which are arranged in columns and have gaps existing between adjacent storage devices; each storage device array enclosure includes a cap for covering accommodated storage devices; the cap includes vents and windshield bars, such that when the cap is in a closed state, the vents abut against an upper surface of the corresponding storage devices and the windshield bars cover the gaps between adjacent storage devices. The design of the cap in the storage system of the present disclosure can ensure that during the maintenance of the storage devices in the storage device array enclosure, the cooling airflow is capable of passing through the vents of the opened cap and then entering inside of another storage device array enclosure above the maintained storage device array enclosure, so as to effectively improve thermal performance inside the storage device array enclosure.

An existing storage system, such as a disk array cabinet, has advantages including fast data storage speed, large storage capacity and so on. Therefore, the storage system is widely applied within enterprises, so as to perform storage of massive data. The disk array cabinet includes a plurality of disks with small capacity, high stability and low speed. These disks are combined into a large-scale disk array storage system, which improves the efficiency of the entire disk storage system by adding the effects caused by providing data from individual disks. Such a technique is employed during data storage to segment data into a plurality of sections and respectively store them on various disks. The principle of the disk array cabinet is to operate the disk groups in an array manner, cooperating with the design of data dispersive arrangement and enhancing the data security. An external disk array cabinet is often used on a large-scale server and has Hot Swap characteristics. Thermal issues are a challenge faced by the disk array and other storage systems.


A linear module includes a baseplate unit, a table part, a spindle drive device, and a telescoping tube arrangement that encompasses the spindle and that has two tube elements that engage with each other in telescoping fashion in a movement direction, namely a tube element connected to the baseplate unit and a tube element connected to the table part. The tube element connected to the table part is connected to the table part over a portion of its length by at least one bridge piece and the tube element connected to the baseplate unit has at least one slot embodied to accommodate the at least one bridge piece.

The invention relates to a linear module having a baseplate unit, a table part, a spindle drive device equipped with a spindle that is connected in a force-transmitting fashion to a drive unit mounted on the baseplate unit and with a nut that is connected to the table part and engages with the threads of the spindle, and a telescoping tube arrangement that encompasses the spindle and has two tube elements that engage with each other in telescoping fashion in a movement direction, namely a tube element connected to the baseplate unit and a tube element connected to the table part.
A linear module of this kind is known from U.S. Pat. No. 5,676,016. In this linear module, the tube element connected to the table part is fastened to an end plate that is in turn connected to the table part. This has the disadvantage that the tube element connected to the table part, at least in the telescopically extended state, must support its own weight over a relatively long length before it telescopically engages with the tube element connected to the baseplate unit. A more serious disadvantage, however, is that any external force to which the end plate is subjected during operation of the linear module inevitably generates bending moments on the tube element connected to the table part. But the resulting deformations increase the friction, thus hindering the telescoping engagement of the two tube elements, when not causing a tilting of the two tubes.


A solid amorphous electrolyte composition for a thin-film battery. The electrolyte composition includes a lithium phosphorus oxynitride material containing an aluminum ion dopant wherein the atomic ratio of aluminum ion to phosphorus ion (Al/P) in the electrolyte ranges greater than zero up to about 0.5. The composition is represented by the formula:LitPxAlyOuNvSw,where 5x+3y=5, 2u+3v+2w=5+t, t ranges from about 2.9 to about 3.3, x ranges from about 0.94 to about 0.85, y ranges from about 0.094 to about 0.26, u ranges from about 3.2 to about 3.8, v ranges from about 0.13 to about 0.46, and w ranges from zero to about 0.2. Thin film batteries containing such electrolyte films have less tendency to fail prematurely.

Thin-film rechargeable batteries have numerous applications in the field of microelectronics. For example, thin-film batteries provide active or standby power for microelectronic devices and circuits. Active power sources of the thin-film battery type are used, for example, in implantable medical devices, remote sensors, miniature transmitters, smart cards, and MEMS devices. Standby power sources of the thin-film battery type are used, for example, in PCMCIA cards and other types of CMOS-SRAM memory devices.
In a thin-film battery, a chemical reaction takes place between an anode and cathode by interaction of the anode and cathode through an electrolyte. The attractiveness of thin-film batteries over conventional batteries is that the electrolyte is a substantially solid or non-flowable material rather than a liquid. Liquid electrolytes pose leakage problems and are often highly corrosive. Of the solid electrolytes, thin-film batteries typically employ organic and ceramic electrolytes. Solid electrolytes are desirable in cells or batteries where liquid electrolytes may be undesirable, such as in implantable medical devices. Preferred solid electrolytes include materials that are solid at room temperature, electrically insulative and ionically conductive.
Examples of solid electrolytes include metallic salts and vitreous solid compositions. Metallic salt solid electrolytes include, for example, compounds that conform to the formula: AgI-MCN—AgCN, wherein M is potassium, rubidium, cesium or mixtures thereof. Vitreous solid compositions, or glasses, are generally comprised of a network former, a network modifier and, in those cases where the network modifier does not provide a mobile cation, a network dopant. A network former provides a macromolecular network of irregular structure. A network modifier is an ionic compound that becomes incorporated into the macromolecular network of the network former. A network dopant provides mobile cations to the network.
As advances are made in microelectronic devices, new uses for thin-film batteries continue to emerge. Along with the new uses, there is a need for high performance thin-film batteries having improved properties such as higher electrolyte conductivities, more stable electrolytes, and the like. In particular, there is a need for thin film batteries whereby an intrinsic compressive stress of the electrolyte does not result in the formation of hillocks which may cause, for example, fracture of the anode film resulting in battery failure.

Thin film battery and electrolyte therefor