A high frequency amplifier circuit has a bias supplying transistor for supplying a bias current to an amplifying transistor, and first and second temperature compensating transistors for compensating the temperature properties of the base voltage of the bias supplying transistor. The base of the bias supplying transistor and the base of the first temperature compensating transistor are connected by a resistor in order to keep the base voltage of the bias supplying transistor approximately constant without following a change in the base voltage of the first temperature compensating transistor, even in the case where such a change occurs. The temperature compensating transistors, the bias supplying transistor and the resistor are formed in one multi-emitter type transistor.

1. Field of the Invention
The present invention relates to a high frequency amplifier circuit that uses a hetero-junction bipolar transistor (HBT). In addition, the present invention relates to an integrated circuit that is used for the transmitter or receiver part of a mobile communication terminal.
2. Prior Art
In recent years, HBT's have come to be used in place of field effect transistors (FET's) in microwave monolithic integrated circuits that include power amplifiers, low noise amplifier LNA, down converter, in mobile communication terminals such as cellular phones.
The advantages of using HBT's include the following:
1) No negative power supply is required for an amplification and a gain control operation;
2) Excellent distortion properties are provided because of a high linearity in HBTs.
Contrarily, defects include the requirement of a bias circuit in order to compensate for temperature dependency and power supply dependency. How this bias circuit is designed has become an important point for gaining stable properties.
In the following, a high frequency amplifier circuit according to the prior art is described in reference to the drawings.
FIG. 6 is a circuit diagram showing a high frequency amplifier circuit that uses an emitter follower transistor type constant voltage supply bias circuit according to the prior art which is shown in Japanese Unexamined Patent Publication 2002-9558.
In FIG. 6, the emitter of a bias supplying transistor 2 for supplying a bias current to an amplifying transistor 1 is connected via a resistor 3 to the base of amplifying transistor 1 made of, for example, an HBT. This bias supplying transistor 2 provides an emitter follower configuration where the emitter is grounded via a resistor 4. In FIG. 6, the portion surrounded by a broken line is a bias circuit.
In addition, the base of bias supplying transistor 2 is connected to the base of a first temperature compensating transistor 5. Furthermore, the collector of a second temperature compensating transistor 6 and a resistor 7 are connected to the base of first temperature compensating transistor 5. The base of second temperature compensating transistor 6 is connected to the emitter of first temperature compensating transistor 5, and in addition, is grounded via resistor 8.
The emitter of second temperature compensating transistor 6 is grounded. The other end of resistor 7 is connected to a bias voltage supplying terminal 9. The collectors of bias supplying transistor 2 and first temperature compensating transistor 5 are connected to a power supply terminal 10. In addition, an input signal terminal 11 is connected to the base of amplifying transistor 1, and an output signal terminal 12 is connected to the collector. The emitter of amplifying transistor 1 is grounded.
Next, the operation of the high frequency amplifier circuit according to the prior art is described.
A regulated voltage of 2.8 V for example, is supplied to bias voltage supplying terminal 9 by means of a power supply circuit. At this time, a voltage that exceeds the turn-on voltage, approximately 1.3 V, is applied across the base and the emitter of each of bias supplying transistor 2, first temperature compensating transistor 5 and second temperature compensating transistor 6. Therefore, each of transistors 2, 5 and 6 is turned on, and consequently amplifying transistor 1 is driven.
The collector current of amplifying transistor 1 is determined by the emitter current of bias supplying transistor 2, and this emitter current is determined primarily by the resistance value of resistor 7. In addition, in order to cancel a change caused by temperature in the voltages between the bases and the emitters of amplifying transistor 1 and bias supplying transistor 2, first temperature compensating transistor 5 and second temperature compensating transistor 6 are connected in two stages.
Usually, a regulated voltage as described above is provided as the voltage that is applied to bias voltage supplying terminal 9, and therefore, the amount of change in the voltage is comparatively small. For example, the voltage may be 2.8 V+/−5%, that is to say, the amount of change, the difference between 2.66 V and 2.94 V, may be approximately 0.3 V. In the case where a regulated voltage is not supplied for some reason, or in the case where a regulated voltage does not exist within the apparatus, however, bias voltage supplying terminal 9 is directly connected to a battery which is the power supply. Therefore, the amount of change in the voltage becomes large. For example, the voltage may be 3.5 V+/−15%, that is to say, the amount of change, may be approximately 1 V.
FIG. 2 shows an example of the relationship between the voltage (hereinafter referred to as reference voltage) that is applied to bias voltage supplying terminal 9 and the collector current of amplifying transistor 1 in the high frequency amplifier circuit that uses a bias circuit according to the prior art. FIG. 2 shows the results of a case where the applied voltage is swept from 3 V to 4 V in the condition where the bias circuit is designed so as to make the collector current 10 mA when the reference voltage is 3.5 V. In FIG. 2, the broken line indicates the prior art, and the solid line indicates the below described embodiment.
As can be seen from this figure, the collector current fluctuates from 7.2 mA to 12.4 mA when the applied voltage is in a range from 3 V from 4V, and as a result, high frequency properties of the amplifier, such as power gain and distortion characteristics, also fluctuate a great deal.

Matsushita Electric Industrial Co., Ltd.


An interconnection pattern made of an aluminum alloy, such as Alxe2x80x94Cu, on a semiconductor IC, is dry etched in an etching gas containing a chlorine component. A photo resist stripping process is carried out at a location down stream of the etching process using a conventional stripping gas, such as CF4+02, at room temperature. Before the resist-stripped substrate is exposed to open air, the substrate is heated in a vacuum to a temperature above 100xc2x0 C., to remove residual chlorine components.

1. Field of the Invention
This invention relates to a method for stripping a photo resist from a layer made of an aluminum alloy, such as aluminum-copper, formed on a semiconductor substrate.
2. Description of the Related Art
Aluminum or aluminum-silicon alloys containing several percent of silicon have been generally used as interconnection layers on semiconductor devices. However, it is also well known that such interconnection layers may be broken down by electro migration, particularly in semiconductor devices where a very fine interconnection is required, such as 4 xcexcm for a high speed ECL (Emitter Coupled Logic) or 1 xcexcm for MOS (Metal Oxide Semiconductor), to achieve a greater density of integration and accordingly higher density flow of current therethrough. In order to prevent such electro migration of interconnection layers, aluminum-copper alloys containing 2 to 4% copper have come to be used, particularly where high current-density is involved, such as in bipolar devices or high-speed logic circuits. However, aluminum-copper alloys present the problem of the presence therein of residual chlorine components.
When an aluminum or aluminum alloy layer is plasma dry-etched using chlorinated gases, such as gaseous mixtures containing chlorine (referred to hereinafter as Cl2), silicon tetrachloride (referred to hereinafter as SiCl4), or boron tri-chloride (BCl3), the mechanism of the undesirable reaction resulting from residual chlorine is as follows.
Al+Cl*xe2x86x92AlCl3↑, Al2Cl6↑
where C* denotes a chlorine radical produced in the plasma, and ↑ denotes sublimnation. Aluminum (Al) reacts with Cl* to produce AlCl3 or Al2Cl6, which then sublimes, and the aluminum continues to be etched in this manner as long as residual chlorine is present. When the etch-processed substrate is brought out into open air, the AlCl3, etc., which has sublimed and then has again deposited on a surface of the side wall of the aluminum layer or on the photo resist reacts with the water content in the open air, because the AlCl3 is deliquescent. So, hydrochloric acid (HCl) is produced from the AlCl3, etc., according to the following formula:
AlCl3+3H2Oxe2x86x923HCl+(Al(OH)3.
Then, the HCl reacts with the Al to produce AlCl3 again, as follows.
Al+3HClxe2x86x92AlCl3+xc2xdH2O.
Thus, the reactions are continued repeatedly. In other words, the corrosion of the aluminum layer continues indefinitely. In order to prevent this corrosion, one or a combination of the below-described procedures are carried out for aluminum, aluminum-titanium (Alxe2x80x94Ti) alloys or aluminum-silicon (Alxe2x80x94Si) alloys, after the dry etching process.
(1) Stripping the photo resist without exposing the substrate to open air so as to prevent the chlorine deposition on the substrate from reacting with the water content of the open air.
(2) Drying the substrate with a hot nitrogen gas flow at a temperature as high as 100 to 200xc2x0 C., and then washing the substrate with water so as to remove the residual chlorine.
(3) Washing the substrate with water, and then baking the substrate in an oxygen atmosphere at a temperature of approximately 350xc2x0 C. so as to remove the residual chlorine.
(4) Plasma-processing the substrate in a fluorinated gas, such as CF4, SF6 or CHF3, so as to replace the residual chlorine atoms with fluorine atoms produced in the plasma. Thus, a firm aluminum fluoride (AlF or AlF3) layer is formed over the aluminum surface to prevent the chlorine component from reacting with water content in the air.
(5) Plasma-processing the substrate in hydrogen gas, which reacts with the residual chlorine component to produce hydrogen chloride.
By the application of the above-mentioned procedures, residual chlorine component on substrates made of aluminum or aluminum alloys can be removed and, accordingly, corrosion can be prevented. However, when etching aluminum alloys, such as aluminum-copper (Alxe2x80x94Cu) or aluminum-copper-silicon (Alxe2x80x94Cuxe2x80x94Si), the residual chlorine component is in the form of CuxCly or a mixture of Cu, Cl, Al and carbon from the photo resist, and such materials, having much higher sublimation temperatures than aluminum chloride, are difficult to remove. Therefore, such residual chlorine containing components may cause corrosion even when the above-described chlorine-removal procedures are employed.
Therefore, procedures for more effectively removing chlorine residuals have been sought to overcome the above-mentioned problems.
It is an object of the invention to provide a method for forming a pattern of an aluminum-copper alloy on a semiconductor substrate without encountering the corrosion problem caused by chlorine residual on the substrate.
The method according to the invention includes the steps of: forming a layer made of aluminum-copper alloy on a semiconductor substrate; forming a resist pattern on said alloy layer; etching said alloy layer by the use of said resist pattern in a chlorinated gas plasma so as to form an alloy pattern; downstream stripping said resist pattern in an atmosphere containing a reactive species; and heating the thus produced substrate in a vacuum at a temperature higher than 100xc2x0 C., whereby the residual chlorine component is removed. The stripping process and the heating process may be combined; that is to say, they may be carried out concurrently.
The above-mentioned features and advantages of the present invention, together with other objects and advantages, which will become apparent, will be more fully described hereinafter, with reference being made to the accompanying drawings which form a part hereof, wherein like numerals refer to like parts throughout.

Method for stripping a photo resist on an aluminum alloy


An apparatus includes an actuator having an actuation axis, a base having a base plane, a first actuator mount for associating the actuator with the base in a first position, and a second actuator mount for associating the actuator with the base in a second position, and a clamp for associating the golf club head with the base. If the actuator is in the first position, the actuation axis is substantially perpendicular to the base plane, and, if the actuator is in the second position, the actuation axis is oblique relative to the base plane.

It is generally known to those skilled in the art that customizing a golf club to the specific needs of a player tends to improve the player's performance. A golf club may be custom fit in various ways, including adjustment of its lie and loft angles.
To adjust the lie and loft angles of a golf club, technicians commonly use a device that includes a clamp attached to a supporting base for holding the head of the golf club in a fixed position. A manual force is then applied to a bending bar that engages the golf club to perform the requisite adjustments. The supporting base must be heavy and/or permanently anchored down to be able to accommodate the forces applied to the club head via the bending bar, without spatial movement of the entire device. Moreover, the abrupt nature of the applied force creates a risk of damaging the club head. Also, the manual aspect of the process makes accurate adjustment of loft and/or lie angle difficult to achieve for the operator, absent extensive familiarity with the device.
Automated devices for reconfiguring golf club heads are also known. However, these devices are generally bulky, non-portable, and expensive, as they include many complex parts.

Apparatus for adjusting the lie and loft of a golf club head


A transaction facilitation system is disclosed that is configured to affect crediting and debiting of gaming accounts for two or more gaming environments and structured to communicate with an issuing financial institution of a stored value account to affect crediting and debiting of the stored value accounts. The two or more gaming environments can be members of an alliance of gaming environments that are associated with the stored value account. Financial transactions using the stored value account can be used for customer relationship purposes.

Within gaming establishments, such as casinos, gaming devices are typically networked via a central computer. Such configuration allows for the gaming establishment to monitor a player's gameplay for tracking purposes. Gaming devices typically issue paper tickets that are redeemable for cash. These paper tickets can be redeemed either at assisted-service counters (i.e., a casino cage) or through self-service computer systems, sometimes called Ticket-In-Ticket-Out (TITO) machines. Drawbacks of using paper tickets, however, is that the players may very easily lose tickets, tickets can become destroyed or damaged, casinos incur cost from replenishing tickets, and casinos incur cost for maintaining ticket printers. Additionally, the use of tickets requires that operators of casinos ensure that sufficient amounts of cash are available on the gaming floor to accommodate redemptions at both the assisted-service counters and the TITO machines. Players wishing to play a table game at a casino typically first exchange cash for an amount of chips which can then be used for gaming. When the player wants to convert the chips back to the cash, the player typically exchanges their chips for an equivalent amount of cash at a cashier cage at the casino. Thus, in addition to ensure sufficient cash is available for ticket redemptions, operators of casinos must ensure also sufficient amounts of cash are available at the cashier cage to accommodate player exchanging chips for cash. This process for routinely replenishing cash by the casino operator is both costly and burdensome.
Additionally, in many gaming establishments players can register demographic information to obtain a player card, sometimes referred to as a loyalty card. Typical player cards include a unique identifier that enables the casino to centrally track the player's wagering activity. Applying the player's historic activity, the gaming establishment can, for example, develop a targeted marketing campaign including promotions, gifts, and advertisements. A problem with casino loyalty systems, however, is that they do not capture spending player activity that occurs in non-gaming environments, such the player's purchases at a merchant or the player's ATM activity.

Systems and methods for administration of non-wagering account associated with multiple gaming environments


An N-polar III-nitride heterojunction JFET which includes a P-type III-nitride body under the gate electrode thereof.

The present invention relates to III-nitride power semiconductor devices.
The large dielectric breakdown field (>2.2 MV/cm) and the high current density of the two dimensional electron gas (2-DEG) in III-nitride heterojunction semiconductor devices make them attractive for power applications.
One known III-nitride heterojunction power semiconductor device is a high electron mobility transistor (HEMT). A desirable variation of a HEMT is a normally-off HEMT; i.e. a HEMT which does not allow for conduction of current (except for minute leakage current) in the absence of an appropriate voltage to its gate electrode.
FIG. 1 of U.S. patent application Ser. No. 11/537,304 (assigned to the assignee of the present application) illustrates a normally-off III-nitride power semiconductor device, which includes a III-nitride semiconductor stack. The stack so disclosed includes an N-polar GaN layer, an N-polar AlGaN layer, an N-polar GaN layer, and an N-polar AlGaN layer disposed below the gate electrode thereof, which renders the device normally off.
Another method for obtaining a normally off state is to provide a P-type body over the gate region. Such an arrangement is shown in Saito et al., U.S. 7,038,252. Specifically, Saito et al. discloses a number of devices having insulated gates over the P-type body, which is disposed on the barrier layer of the active heterojunction of the device.
The presence of a PN junction in devices proposed by Saito et al. leads to gate leakage.
It is an object of the present invention to provide a normally off III-nitride semiconductor device which does not suffer from the drawbacks of the prior art.
A III-nitride power semiconductor device according to the present invention includes an N-polar III-nitride body having an N-polar face, a III-nitride buffer layer on the N-polar face, a III-nitride heterojunction that includes III-nitride barrier layer, and a III-nitride channel layer, the III-nitride heterojunction including a two-dimensional electron gas (2DEG), a first power electrode disposed over the heterojunction and coupled to the 2DEG, a second power electrode disposed over the heterojunction and coupled to the 2DEG, and a gate arrangement disposed over the heterojunction between the first and the second power electrode and including a P-type III-nitride body, and a gate contact, said P-type III-nitride body being disposed between the heterojunction and the gate contact.
According to one aspect of the present invention the barrier layer is disposed over the buffer layer and the channel layer is disposed over the barrier layer. Consequently, the PN junction is formed at the junction of the P-type III-nitride body and the channel layer resulting in confinement of electrons in the channel layer between the body and the barrier layers. This combination of doping and band gap alignments keeps the carriers from moving into the buffer layer during reverse bias conditions. By using an N-polar configuration, a barrier layer of larger band gap than the channel layer is achieved without the formation of a parasitic 2-dimensional electron gas at the interface between the barrier and the buffer layers.
In the preferred embodiment, the barrier layer is comprised of AlInGaN, and the channel layer is comprised of GaN. AlInGaN can be made with a larger band gap than the conventional material for the barrier layer, namely AlGaN, whereby leakage can be further reduced. That is, InAlGaN allows for a large barrier to electron injection, thereby preventing gate leakage. The P-type III-nitride body may be P-type GaN, or P-type AlInGaN. A device according to the preferred embodiment may further include a substrate, and a transition layer disposed between the substrate and the N-polar III-nitride body. The transition layer may be AlN or an oxide, while the substrate may made of silicon, SiC, sapphire, or a III-nitride material such as GaN.
A device according to the present invention is preferably a JFET. A JFET according to the present invention is more suitable for lower frequency applications (e.g. MHz range) because a PN junction under an insulated gate will result in accumulation and untimely and uncontrollable turning on/off of the device at low frequencies (e.g. MHz) leading to unacceptable circuit performance. In a device according to the preferred embodiment, the frequency dependent effects of an insulator above a p-type body is avoided.
A device according to the present invention may further include spacer field plates each disposed between the gate arrangement and a respective power electrode.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.

Nitrogen polar III-nitride heterojunction JFET


A process for purifying glycerin recovered as a byproduct of biodiesel production comprises heating a glycerin effluent stream containing a low molecular weight alcohol, water and fatty acid esters of the low molecular weight alcohol to cause transesterification of the fatty acid esters to glycerides and additional low molecular weight alcohol. The reaction mixture is sparged with nitrogen to help remove water and low molecular weight alcohol, which drives the transesterification reaction towards glyceride formation. A wash water stream may also be added to the recovered glycerin stream from biodiesel production. Either before or following the transesterification reaction, an oil layer can be separated from the recovered glycerin stream by reducing the pH of the stream to below 7. Following separation of the oil layer and transesterification the glycerin stream is flash distilled to separate glycerin from water, salts, and glycerides.

The main process sources for glycerin production have been high-pressure hydrolysis, transesterification of fats and oils to produce methyl ester and a glycerin byproduct, and saponification. Processing to produce refined glycerin of greater than 99.5% purity depends substantially on the type of impurities in the crude. Both pre-treatment and refining steps are typically necessary. With hydrolysis, the starting crude glycerin is likely to be nearly 85% water, hence multi-stage evaporators constructed of stainless steel are needed just for concentration. Other starting crude materials have high salt content and frequently employ thin-film distillation. A summary containing some common purification processes is provided in Ullman's Encyclopedia of Chemical Technology, Vol. A-12, pages 480–483.
As a result of the continuing rise in the cost of fossil fuels, there has been an increasing interest in biodiesel fuels as a supplement to or replacement for traditional fossil fuel sources. Biodiesel processing involves the production of alkyl esters of long chain fatty acids by reacting the source acid with a low molecular weight alcohol, such as methanol. A traditional process for manufacturing fatty acid alkyl esters involves the transesterification of triglycerides using methanol, in the presence of an alkali catalyst. In addition to the desired fatty acid alkyl esters, this process produces an effluent stream comprising glycerin (glycerol), excess alcohol, water, alkyl esters and a mixture of mono, di and triglycerides resulting from the transesterification step. The rapid worldwide expansion in the production of biodiesel fuel since 2000 is creating a fast growing supply of byproduct crude glycerin. This byproduct crude material may typically be 86–92 percent glycerol (glycerin) with methanol being the primary contaminant. The decanted glycerin is likely to be combined with a wash water stream from the biodiesel purification, and that aqueous stream can be expected to contain significant amount of methanol, glycerol, and sodium or potassium salts. Some common pretreatment steps are depicted in a process flow diagram for a biodiesel process found on page 50, FIG. 3.4, of the study report "Economic Feasibility of Producing Biodiesel in Tennessee".
The methanol needs to be recovered for recycle to the biodiesel process, but water content should be relatively low. Evaporation of the methanol can be accomplished under vacuum conditions and utilizing falling film evaporators, but it is likely to be accompanied by a considerable amount of the water coming from the wash-water stream. Alternatively, as illustrated in the aforementioned flow diagram, the methanol can be separated from the water and glycerin using a distillation column. The column bottoms then undergo a phase separation wherein unwanted fatty matter is skimmed off. The aqueous glycerin stream then undergoes evaporation of much of the water in falling film evaporators in series to obtain about an 80–89 percent glycerin material. All of these pretreatment and recovery steps involve expensive custom-made equipment even before the refining begins. As shown in Ullman's, a practical refining scheme would be a wiped-film evaporator to produce a salt-free vapor stream feed that feeds into a vacuum distillation column. The product glycerin is removed as a side-draw and a recycle glycerin stream is taken off of one overhead condenser with an aqueous stream condensed subsequent to that.
Much of prior literature references on purification of glycerin, such as U.S. Pat. Nos. 2,615,924, 2,741,638, and 2,772,207, are aimed at dilute aqueous solutions such as those resulting from fermentation and hydrolysis. Furthermore, U.S. Pat. No. 2,234,400 describes purification after concentration to 80% comprising one or more steam distillations followed by treatment with activated carbon or the like to effect decolorization. Even then, ester-type impurities are still present.
U.S. Pat. No. 4,655,879 describes an approximately 10-step process comprising alkalizing in the presence of air, evaporating in a thin-film evaporator, redistillation of the residue, rectification in a low-pressure-drop column with reboiling in a falling-film evaporator, main product removal as a liquid sidestream, with carbon treatment for color removal.
In these references, methanol was not present, or not mentioned, as a constituent in the crude feed.
It would therefore be desirable to provide a low cost efficient process for purification of glycerin recovered from fatty acid alkyl ester processes, such as the manufacture of biodiesels. Such a process would also provide an efficient low cost means for recovering alcohol from the process for recycle to biodiesel production. In addition, it is desirable to utilize predominately commonly available equipment such as might be available from idle facilities or surplus equipment previously used for other purposes. The object of this invention is to provide a simple, low-cost process for purifying glycerin byproduct from biodiesel production integrated such as to efficiently recycle methanol and accept wash water from the biodiesel process.


A transmission device includes: a wavelength-variable light source; a wavelength stabilized light source: a wavelength measuring device; a control circuit that controls the wavelength-variable light source; and a reception circuit that receives second reference wavelength light generated based on first reference wavelength light output from the wavelength stabilized light source whose wavelength stability is higher than that of the wavelength-variable light source, the control circuit calibrating the wavelength measuring device by using the second reference wavelength light, the control circuit calibrating the wavelength-variable light source by using the calibrated wavelength measuring device.

In recent years, modulation methods such as Super channel and Nyquist channel, whose frequency utilization efficiency is high, have been put into practical use. In an optical network in which a modulation method whose frequency utilization efficiency is high is used, interference may occur between light signals when wavelengths of the light signals are not appropriately adjusted. In this case, the quality of signals degrades and there is a risk that the bit error rate increases. Therefore, it is desired that the wavelengths of light signals (that is, the optical frequencies) are accurately adjusted in the optical network.
A wavelength selection switch that switches a path of a light signal for each wavelength in optical signal layer is introduced in nodes inside the optical network, so that a request for improving the wavelength accuracy is increased.
Related arts are disclosed in, for example, Japanese Laid-Open Patent Publication No. 62-159929, Japanese Laid-Open Patent Publication No. 09-162849, and Japanese Laid-Open Patent Publication No. 09-252283.
However, in the related arts, the wavelengths used in the optical network may not be accurately adjusted. It is possible to solve this problem by providing an accurate light source to each transmission device in the optical network. However, in this configuration, the cost to build the optical network increases.

Transmission device and optical network system


In a method for operating a passive matrix-addressable ferroelectric or electret memory device, a voltage pulse protocol based on a 1/3 voltage selection rule is used in order to keep disturb voltages at minimum, the voltage pulse protocol comprising cycles for read and write/erase bases on time sequence of voltage pulses with defined parameters. The method comprises a refresh procedure wherein cells for refresh are selected and refresh requests processed by a memory device controller, the refresh requests are monitored and processed in regard of ongoing or scheduled memory operations, and refresh voltage pulses with defined parameters are applied to the memory cells selected for refresh, while simultaneously ensuring that non-selected memory cells are subjected to zero voltage or voltages which do not affect the polarization state of these cells.

The present invention concerns a method for operating a passive-matrix addressable ferroelectric or electret memory device wherein said memory device comprises one or more arrays or matrices with memory cells in the form of a ferroelectric or electret thin-film polarizable material exhibiting hysteresis, particularly a ferroelectric or electret polymer thin film, and a first and second set of respective parallel electrodes, wherein the electrodes of the first set forming word lines (WL) in the device, are provided in substantially orthogonal relationship to the electrodes of the second set forming bit lines (BL) in the device, wherein the electrodes of said first and second set are provided in direct or indirect contact with the thin-film material of the memory cells, whereby a polarization state in individual memory cells can be read, erased or written by applying appropriate voltages to the individual electrodes of respectively said first and second set of electrodes, wherein the method implements a voltage pulse protocol based on a one-third voltage selection rule whereby non-addressed cells are subjected to disturbing voltages across them not exceeding approximately ⅓ of the switching voltage Vs, wherein the voltage pulse protocol comprises a read cycle and a write/erase cycle respectively with time sequences of voltage pulses of predefined amplitudes, polarities and lengths, wherein the read cycle comprises applying a set of voltage differences to electrodes of respectively said first and second set of electrodes in case data are read out from the memory cells, and wherein the write/erase cycle comprises steps for applying another set of voltage differences to electrodes of respectively said first and second set of electrodes.
The relevant device configuration as described above is well known in the prior art, and is generally referred to as a passive matrix-addressed memory. As shown in FIG. 1, it is typically implemented by letting two sets mk(k=1→x), n1(l=1→y) of parallel electrodes cross each other, normally in an orthogonal fashion, in order to create a matrix of cross-points that can be individually accessed electrically by selective excitation of the appropriate electrodes from the edge of the matrix. A layer S of a functional (e.g. storage) medium of ferroelectric or electret material is provided between or over the electrode sets such that the capacitor-like structures 2kl (functioning as memory cells) are formed in the material between or at the crossings of the electrodes m,n. This is shown in detail in FIG. 2, where a cell 2kl is formed in the overlap regions 3 and 4 between electrodes mk and n1, respectively. Selection of individual cells in the matrix is illustrated in FIG. 3. In conformity with standard usage, each horizontal electrode shall henceforth be termed a Word Line (WL), and each vertical electrode a Bit Line (BL). Furthermore, the electrodes employed in the electrical selection of a single cell or a set of cells in the matrix shall be termed an Active Word Line (AWL) and an Active Bit Line (ABL). When applying potential differences between an AWL and an ABL, the ferroelectric or electret material in the selected cell is subjected to an electric field which generates a polarization response generally tracing a hysteresis curve or a portion thereof, (cf. below). By manipulating the direction and the magnitude of the electric field, the memory cell can be left in a desired polarization state corresponding to a certain logic value. The passive addressing of this type of arrangement leads to simplicity of manufacture and a high density of cross-points.
The use of ferroelectrics or electrets as memory materials confers non-volatility upon the memory devices in question, due to their ability to retain a logic state in the absence of applied voltages or currents to the memory device. This attribute of ferroelectrics in particular is known and attempts have been made to exploit it in prior art memory devices. It is based on the fact that these electrically polarizable materials possess at least two equilibrium orientations of the spontaneous polarization vector in the absence of an external electrical field. The spontaneous polarization vector may be switched between these two orientations by an electric field. One of the polarization states is considered to be a logic "1" and the other state a logic "0". Referring to FIG. 4, a material with a hysteresis loop as shown changes its polarization direction upon application of an electric field that exceeds the coercive field EC (the hysteresis loop is shown with the voltage across the cell rather than the field along the abscissa axis for reasons of convenience). A saturation polarization PS is obtained whenever a memory cell is subjected to the nominal switching voltage VS. As the applied voltage is reduced to zero, the polarization will follow the hysteresis curve and end up at the remanence value PR. Depending on the polarity of the applied voltage, this zero field point may be at either the polarization state marked "1" or "0" in the figure, representing the two accessible logic states of the cell.
It should be noted that the shape of the hysteresis curve may depend on the speed at which the ferroelectric or electret material is cycled through the curve, as well as on the properties of the electrodes used to create the ferroelectric cell, and other factors (e.g. temperature). In particular, whereas many materials exhibit a hysteresis curve like the one in FIG. 4 when cycled at low speed, the apparent coercive field may increase and the apparent remanent polarization may become less as the voltage slew rate increases. Conversely, at very low slew rates the apparent coercive field may be strongly reduced or approach zero, especially in pure electrets with no ferroelectric contribution to the polarization. Furthermore, the presence or appearance of low-dielectric constant layers on the electrodes (e.g. due to chemical reactions at the electrode interface contacting the electret or ferroelectric material) shall increase the apparent coercive field. This implies that the terms "Coercive field" or "Coercive voltage" and "Remanent polarization" when employed in the following shall be understood to represent the corresponding quantitites in FIG. 4, as they appear under the specific operative conditions prevailing during applications of the teachings of the present document.
There are certain problems related to the polarizable materials that must be dealt with in order to make commercially viable devices, namely fatigue, imprint and disturb:
Fatigue results from repeated switching of the polarization direction in a given memory cell, whereby the switchable polarization progressively diminishes and ultimately becomes too small to allow proper operation of the memory. This phenomenon is well known and a range of remedies exist in the prior art. The present remedies are, however, generally material-specific and inadequate to provide fatigue resistance in commercially viable devices.
Imprint affects memory cells that are allowed to remain in a given logic state for a period of time. It manifests itself as a change in the switching properties whereby the hysteresis curve shifts so as to increase the coercive field perceived when switching the polarization direction to that opposite to the one where the material has resided during the imprinting period. In other words, the polarization has a tendency to become stuck in the direction where it is allowed to rest for some time.
Disturb is related to loss of polarization in a ferroelectric or electret memory cell which has been prepared in a given polarization state, when the cell is exposed to disturbing voltage pulses with a polarity in the opposite direction (i.e. a direction tending to polarize the cell in a sense opposite to that where it had been prepared). Even when the disturbing voltages are well below those corresponding to the coercive field, repeated exposure may cause the memory material to undergo partial switching leading to a loss of polarization. The extent of the partial switching depends on the material properties but may ultimately degrade the remanent polarization states Pr and −Pr to the extent that erroneous read results result.
Of the three problem areas mentioned above, fatigue and imprint are relevant in all types of ferroelectric or electret memory architectures, i.e. both in devices employing one or more transistors per memory cell (termed active matrix devices below) and in passive matrix devices as referred above. Remedies taught in prior art include strategies for postponing or reducing the onset of fatigue and imprint, as well as methods and apparatus for restoring the memory material in the fatigued and imprinted cells to a pristine or less-affected state. The latter procedures are generally collectively referred to as "refresh".
Before proceeding, it should be emphasized that the present invention concerns a different type of refresh from that which is employed in prior art volatile memories such as different types of DRAMs, where memory cells typically are refreshed every 64 msec. This type of "traditional" memory refresh is performed to compensate for loss of stored charge in capacitors typically containing linear high-epsilon dielectrics, thus ensuring that the stored logic value in each memory cell is maintained. Typically, the whole memory is not refreshed at once since this cause a big surge in power and stall in data requests. To solve this, the refresh is split into one row/block of memory at each time resulting in a refresh period of e.g. 64 msec/number of rows.
In ferroelectric memories of the active matrix type, as opposed to the passive ones, problems like fatigue and imprint dominate and there is a need for refresh, both to retain the volatile polarization at a proper level but also to restore properties of the ferroelectric memory material.
In U.S. Pat. No. 5,550,770 (Kuroda), the memory device consists of arrays of ferroelectric memory cells, exemplified exclusively as containing ceramic ferroelectrics such as BaTiO or PZT, in active-matrix block addressing configurations of the 1T-NC type. In order to permit a simple Vs/2 selection scheme, N is a low number, e.g. N=8. Since it is the write operations that are considered to cause the need of refresh, there is a counter per memory block which is used to memorize the number of completed write operations before a forced refresh is carried out. This is carried out by first performing a destructive read of all cells of the memory block and temporarily storing the data elsewhere. Then all cells of the memory block are exposed to a voltage higher than the write voltage to achieve refresh by re-poling. Finally, the temporarily stored data are written back such that the polarization is switched only for those cells that are not already in the desired polarization state at that time. Beyond the specification that the refresh voltage shall be higher than that used in the standard read/write accesses, Kuroda provides no examples of, or teachings on the appropriate selection of refresh voltage pulse parameters, e.g. pulse shape, duration, degree of overvoltage, polarity shifts, if any, number or waiting periods.
In U.S. Pat. No. 5,777,921(Takata & al.) a device is disclosed with double counters for each memory block or memory cell, one for writing/reading one type of logic data and another for reading/writing the other type of logic data wherein refresh is initiated when either of the counters reach a predetermined value. Depending on which counter initiating the refresh the refresh voltages applied will look different such that the ferroelectric material will undergo a complete hysteresis cycle which is asserted to be a known method to restore the deterioration of the spontaneous electric field, i.e. to remove the imprinting effect. Since attention is paid to data content the refresh can be more efficient in terms of time for one type of logical data and there is no need to temporarily store data elsewhere during refresh. In the case of memory-cell based refresh, or small memory block, the redundancy of allocating cells for unnecessary refresh may be avoided but to the price of more counters.
In EP patent No. 0495572 (Moazzami & al.) a "higher than normal" voltage is used to exercise "the ferroelectric components" periodically to "refresh, or re-establish, the polarization state" and the refresh is further initiated after a predefined number of memory access cycles and/or after a predefined period of time.
In the found prior art no specific attention is paid to the problem of imprint at power up, i.e. after the memory has not been actively used for a period of time. Since such a period may be arbitrarily long there is a risk for substantial imprint, and in cases where the duration of the inactive period is not known a situation of maximum imprint has to be assumed and consequently dealt with.
In ferroelectric memories of the passive matrix type the absence of active elements in each cell facilitates higher integration density, lower power consumption and less complexity than in active matrix based counterparts. However, the problems of fatigue and imprint must be handled, as must the additional detrimental phenomenon of "disturb" referred above: Passive matrix memories lack active elements such as transistors that can connect/disconnect each memory cell from the rest of the matrix network during write/read/erase operations, and in certain operations involving single cell access it is inevitable that non-addressed memory cells are subjected to disturbing voltages. The magnitudes of such disturbing voltages on non-addressed cells depend on the timing and magnitudes of voltages applied to word- and bit-lines connecting to addressed as well as non-addressed cells in the matrix, and prior art literature contains teachings on how to avoid or reduce such complications by the use of voltage pulse protocols, i.e. precisely defined time- and amplitude-relationships between electrical potentials on all bit- and word-lines during operation of passive matrix addressed memory arrays. Examples of pulse protocols containing coordinated sequences of operations, e.g. imposing various sets of voltage pulses, connecting to sense amplifiers, grounding etc. can be found in U.S. Pat. No. 3,002,182 (Andersson), U.S. Pat. No. 4,169,258 (Tannas Jr.) and the published International Patent Application No. WO 02/05287 (Thompson et al.).
Unfortunately, even the most cleverly designed pulse protocols are subject to fundamental limitations, and the basic problem of disturb cannot in general be obviated by this means alone: As shown in the above quoted WO 02/05287, read- or write-related random access to single cells with a voltage Vs shall always imply subjecting non-addressed cells to disturbing voltages comparable to or larger than approximately Vs/3. In the following, protocols that expose non-addressed cells to a maximum disturb voltage of Vs/2 or Vs/3 shall be termed Vs/2 and Vs/3 protocols, respectively. Although Vs/3 is typically well below the voltage required to exceed the coercive field in the memory material in the cells, repeated exposure may lead to gradual loss of polarization and corresponding loss of information content. The disturb problem becomes particularly acute in advanced memory devices where it is sought to gain maximum advantage of the passive matrix addressing concept by using large matrices with typically thousands of crossing word lines and bit lines. This may cause non-addressed cells in the matrix to experience very large numbers of disturbing voltage pulses between each time they are accessed for write, read or erase operations. The net result of this may be that certain cells suffer a loss of polarization to an extent where the magnitude of the polarization switching during a read operation falls below the discrimination threshold between logic "0" and logic "1".
One possibility for minimizing disturb in large passive matrix based memories is to divide each large matrix physically or electrically into a number of segments, wherein each such segment or "sub-matrix" can be seen as a passive matrix of its own. A suitable definition of a passive sub-matrix is that a memory cell being addressed in a certain sub-matrix, e.g. through a read or write operation, shall only give rise to disturb voltages on other memory cells in that same sub-matrix and not in other sub-matrices in the memory. Segmentation has been described to a limited extent in the prior art, with primary focus on reducing the effects of parasitic capacitances and sneak/relaxation currents which slow down and corrupt the electrical response of large passive matrix structures. Examples of segmentation/division are disclosed in the present applicant's pending patent application 20035225.
Exacerbating the problem of disturb in passive matrix addressed devices is the fact that imprint may start developing on very short timescales after the cell has been left in a polarized state, e.g. during a single pulse sequence under a protocol for normal write/read/erase operations. Thus, memory cells that have recently experienced an operation involving polarization reversal at one point in a voltage pulse protocol may retain significant imprint in the pre-reversal direction at a later stage in the same voltage pulse protocol, and consequently be extra prone to disturb. Since both imprint and disturb are typically affected by fatigue, it becomes apparent that successful strategies to handle these phenomena must take into account the strong interrelationships between all of them.

Method for operating a passive matrix-addressable ferroelectric or electret memory device


Systems and methods are provided for instrumenting compiled software to include diagnostic information such that an origin of a call to one or more routines may be more easily identified. For example, a system is provided which unassembles or uncompiles software into a more readily identifiable instructional form, which is then searched to identify various calls to various routines of interest. Portions of the identified calls are then modified with diagnostic information that will identify the call. This diagnostic information and the call are then recorded so that the call may be subsequently traced back to its origin when, for example, an error occurs.

1. Field of the Invention
The present invention generally relates to diagnosing software errors in a computer system. More particularly, the present invention relates to instrumenting compiled software to simplify locating the origin of software errors.
2. Background and Relevant Art
Software errors are responsible for a variety of computer problems ranging in severity from inaccurate or unexpected program behavior and possible program termination to operating system corruption that halts the operating system. From a user's perspective a software error may represent a relatively minor inconvenience that can be addressed by occasionally retrying an operation, restarting an application, or rebooting the computer, or may lead to much more serious problems such as data corruption or loss and unstable computer operation. Of course, minor inconveniences are better tolerated by users, but software developers generally devote a significant amount of time and resources to testing software so that users will have a positive experience when using the software.
Because computer programs and drivers generally contain a significant amount of computer code, locating the source of an error often is the most difficult task in correcting the error. One reason for the difficulty in locating errors is that errors generally are caused in one place, but surface in another. Depending on the nature of an error, the software that caused the error and the software that detects the error may be completely unrelated. As a result, to locate the source of the error, investigation initially focuses on where the error is detected, and then expands to other areas.
While software is in the development stage, the software often includes extensive error checking information and instructions to help in both reproducing and locating the source of software errors. However, much of this error checking information and instructions generally is removed from production versions of software because often much of the information is only useful in a development environment and because it may have a negative impact on resource consumption and software performance. Nevertheless, most production software includes some level of error checking so that information regarding the nature of an error can be reported to the user and/or otherwise recorded for future reference. Usually this information serves at least two purposes: it helps identify the conditions which lead to the problem so that a user can take some form of remedial action, such as identifying a workaround for the problem, and the information may help developers in reproducing and locating the source of the problem so that the error can be corrected.
Software error checking information and instructions typically include instructions to call error reporting and/or logging routines and information that identifies the nature of the error for use in beginning the search to locate and identify the cause of the error. Accordingly, to the extent that the error checking information and instructions are better able to narrow the area to search for an error, it becomes easier to locate and identify the cause of the error. As illustrated in FIGS. 1 and 3, however, some developers may specify ambiguous error checking information, which provides little if any guidance in locating where a software error occurs so that the cause can be identified and corrected. While source code that specifies ambiguous error checking information can be corrected relatively easily at development time, once software has been compiled and is released to end-users, the ambiguities remain unless resolved in future releases.
For example, FIG. 1 illustrates the difficulty in locating a common type of software error related to memory allocations. As an application or driver needs dynamic amounts of memory, the software makes memory allocation requests. In the case of a driver, these allocation requests may be processed by the operating system. Once allocated, the software accesses the allocated memory through a pointer of some sort. Errors often occur, however, when the software writes data beyond the boundaries of the allocated memory, neglects to deallocate the memory, attempts to access the memory through an invalid pointer, such as after the memory has been deallocated or after the memory pointer has been corrupted, and the like.
Because memory allocations frequently lead to software errors, routines for memory allocation may require a tag to be specified so that if a memory related software error occurs, the tag may be used to help locate the source of the error. For example, if memory becomes corrupted, it is likely that the memory was overwritten. The typical culprit for overwriting memory is the software that writes to the memory that immediately precedes the corrupted memory. The tag is intended to help identify that software.
However, as indicated in FIG. 1, driver or application A 100, driver or application B 105, and driver or application C 110, all use tag X 115 when allocating tagged memory locations 120, 121, 122, and 123. In fact, driver or application A 100 uses tag X 115 in tagged memory allocations 120 and 121. Accordingly, if tagged memory allocation 122 were overwritten, tag X would provide no help in locating the software that may have been responsible, since all software uses the same tag value.
FIG. 3 presents an analogous problem for stop codes that halt the operating system. To help locate and identify the cause of an operating system halt, various standard stop codes (SSCs) are defined, labeled SSC 1 320 through SSC X 340. As shown, however, driver or application A 300 uses SSC 1 320 and SSC 3 325, driver or application B 305 uses SSC 5 330, and driver or application C 310 uses SSC 7 335. As a result, when the operating system is halted with a standard stop code that has been used in multiple places, such as SSC 1 320, SSC 3 325, SSC 5 330, SSC 7 325, it may not be possible to determine whether the error was detected in the software that duplicates the use of the standard stop codes or in the operating system itself. Note that the problem illustrated in FIG. 3 is particularly onerous since the duplicate use of standard stop codes in drivers or applications undermines the efforts of the operating system developers who defined standard stop codes to help locate and identify potential errors within the operating system.
Accordingly, there exists a need for methods, systems, and computer program products that instrument compiled software to include diagnostic information so that the origin of calls to compiled routines may be more easily identified and errors within the compiled software may be more easily located.

Instrumenting software for enhanced diagnosability


Methods, systems, and media for selecting candidates for annotation for use in training classifiers are provided. In some embodiments, the method comprises: identifying, for a trained Convolutional Neural Network (CNN), a group of candidate training samples, wherein each candidate training sample includes a plurality of patches; for each patch of the plurality of patches, determining a plurality of probabilities, each probability being a probability that the patch corresponds to a label of a plurality of labels; identifying a subset of the patches in the plurality of patches; for each patch in the subset of the patches, calculating a metric that indicates a variance of the probabilities assigned to each patch; selecting a subset of the candidate training samples based on the metric; labeling candidate training samples in the subset of the candidate training samples by querying an external source; and re-training the CNN using the labeled candidate training samples.

Intense interest in applying classifiers (such as convolutional neural networks (CNNs)) in biomedical image analysis is widespread. For example, CNNs can be used to suggest to an authorized professional whether one or more biomedical images are likely to have one or more given characteristics (which can be represented by one or more of |Y| possible labels) so that the professional can diagnose a medical condition of a patient.
In order for a CNN to perform this function, the CNN needs to be trained using annotated biomedical training images that indicate whether the training images have one or more of the |Y| possible labels. For example, for the CNN to be able to spot a condition in an image, many training images annotated as showing the condition and many training images annotated as not showing the condition can be used to train the CNN. The better trained the CNN is, the less likely the CNN is to misclassify an image.
The success of CNNs for this purpose, however, is impeded by the lack of large annotated datasets in biomedical imaging. Annotating biomedical images is not only tedious and time consuming, but also demanding of costly, specialty-oriented knowledge and skills, which are not easily accessible.
Accordingly, it is desirable to provide new methods, systems, and media for selecting candidates for annotation for use in training classifiers.

ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY


A Firearm Holster Mounting System for Vehicles includes a mounting member which defines a hub for a plurality of overlapping holster mounting straps to secure the holster to the mount and a plurality of frame attachment straps for suspending the mount and holster beneath a vehicle seat. Adjustable length extension straps coupled to the holster mounting straps possess hooks for suspending the central mount to a vehicle seat base frame whereby the firearm is readily accessible from beneath the seat. The adjustable extension straps permit the mount to be laterally moved and secured at various positions beneath the vehicle seat as desired. At least one strap is provided to attach the mount to the seat base frame in a direction transverse that of the overlapping holster mounting straps.

This invention relates generally to accessories for firearms, and more particularly to an adjustable firearm holster mount for securing a firearm holster in the limited confines beneath the seat of a vehicle.
Laws for carrying firearms both on the person and inside a vehicle allow citizens in many states to be in lawful possession of loaded firearms. However, few places within a vehicle are suitable for safely securing the weapon for transit while ensuring that the weapon is readily available for use at a moment's notice.
There are several types of holsters available on the market ranging in shape and size and having different classifications. Some holsters ride on a belt and are primarily used by law enforcement and military. Being exposed, these holsters are not suitable for use with concealed carry permits available in most states in the U.S. A second type of holster is known as "Inside The Waistband," (ITW). This holster is a favorite among concealed carry permit holders since it allows the firearm to be concealed easily. Holster types come in many shapes and sizes to fit different types of handguns and are good for carrying the firearm when walking around. However, when seated in a vehicle, a holster becomes uncomfortable and the firearm inaccessible due to space constraints and use of seat belts.
Most vehicles today have some space underneath the front driver seat. This area is sometimes used for stereo equipment or to store front visors for the windshield. Many citizens choose to keep a firearm inside their automobile for personal protection and concealed carry permit holders frequently choose to have a firearm on their person for protection. In a vehicle the firearm must be stowed or tucked away which risks damage or impairs firearm accessibility due to the many of storage constraints.
Prior storage solutions fail to deal with possible situations requiring rapid tactical deployment of the firearm.
It is an object of the invention to provide a means to safely secure a firearm holster under the seat of a vehicle.
It is another object of the invention to provide an adjustable mechanism to attach the holster to a wide variety of automotive seats and allow for left or right as well as front to back accessibility.
It is another object of the invention to provide a means to quickly retrieve the firearm from the holster and replace the firearm into the holster.
It is another object of the invention to provide an easy means to adjust the position of holster to place the firearm in a convenient position.
It is another object of the invention to provide a way to secure virtually any type of belt loop holster or ITW holster to the central mounting hub and provide a platform to mount any type of handgun.
It is another object of the invention to provide an easy way to install the device into automobiles by means of adjustable straps and easy to install hooks or looping straps that can attach in many different ways.
It is another object of the invention to provide an out of site holster location for the firearm to keep the firearm concealed in the vehicle, while still being readily available.

Firearm holster mounting system for vehicles


The disclosed antenna structures and electronic microsystems are capable of physically disappearing in a controlled, triggerable manner. Some variations provide an on-chip transient antenna comprising a semiconductor substrate containing ion-implanted hydrogen atoms and a conductor network comprising metals bridged by low-melting-temperature metals. Some variations provide an off-chip transient antenna comprising a flexible substrate containing a polymer, nanoporous silicon particles, and an oxidant for silicon, and a conductor network comprising metals bridged by low-melting-temperature metals. Other variations provide a method of introducing physical transience to a semiconductor integrated circuit, comprising thinning a substrate from the back side, implanting hydrogen ions into the thinned substrate to introduce latent structural flaws, depositing a semiconductor integrated circuit or sensor chip, and providing a controllable heating source capable of activating the latent structural flaws. These novel approaches are compatible with existing integrated circuits processing, preserve antenna performance, and use foundry-compatible techniques.

An antenna is an electrical device which converts electric power into radio waves, and vice versa. It is usually used with a radio transmitter or radio receiver. In transmission, a radio transmitter supplies an electric current oscillating at radio frequency to the antenna's terminals, and the antenna radiates the energy from the current as electromagnetic waves. In reception, an antenna intercepts some of the power of an electromagnetic wave in order to produce a tiny voltage at its terminals, applied to a receiver to be amplified. Antennas are essential components of all equipment that use radio. They are used in systems such as radio broadcasting, broadcast television, two-way radio, communications receivers, radar, cell phones, and satellite communications, as well as other devices such as wireless microphones, Bluetooth-enabled devices, and wireless computer networks. Antennas are critical components for military operations.
Modern electronic microsystems can now be made at such low cost that they are increasingly pervasive throughout the battlefield and large numbers can be widely proliferated and used for applications such as distributed remote sensing and communications. However, it is nearly impossible to track and recover every device, resulting in unintended accumulation in the environment as well as subsequent unauthorized use and compromise of technological advantage.
Transient electronics promise a number of revolutionary and meaningful military capabilities of interest including sensors for conventional indoor/outdoor environments (e.g., buildings, transportation, and material), environmental monitoring over large areas, and simplified diagnosis, treatment, and health monitoring in the field. Large-area distributed networks of sensors that can disintegrate into powders independent the natural environment may provide critical data for a specified duration, but no longer. Alternatively, devices that resorb into the body (bioresorbable) could be promising transient electronic implants to aid in continuous health monitoring and treatment in the field. Potential applications and enhanced capabilities are plentiful. The addition of transience as a design variable introduces and may enable new operational strategies.
To date, the challenge of creating fully physically transient electronics including antennas has been addressed primarily through approaches in which the fundamental elements of electronic circuits (actives, passives, etc.) are created from fully physically transient materials and integrated onto transient substrates.
A known approach provides water-soluble devices and substrates (see Hwang et al., Science 337, 1640-1644, 2012). In this approach, transience is achieved through a selection of materials (ultra-thin silicon, magnesium, silk) that trades improved water solubility for degraded electrical performance. While there are scenarios in which such trades are permissible—as in certain in vivo biomedical applications—most military electronics requirements are of a level of performance and complexity out of the reach of even the most sophisticated of transient circuits.
The shortcomings of existing transient electronics solutions are particularly problematic when considered in the context of RF electronics and general-purpose digital logic, for which high operating frequencies and on-off ratios are required. Furthermore, water-soluble materials are at odds with commonly used wafer-processing techniques. This fact, when considered with CMOS foundries' resistance to exotic materials, makes it unlikely that such approaches to transient electronics will be adopted by high-volume manufacturers.
Any solubility-based approach requires either an on-board solvent reservoir, which is easily defeated by removal or deactivation of the release valve; an external supply of the solvent, which cannot be guaranteed in all deployment scenarios; or an on-board means of synthesizing the solvent, which adds complexity to the system design. In any case, these requirements likely restrict the domain of transient electronics technology to low-volume manufacturing and niche applications.
Conventional methods to protect and safeguard military or other intelligence assets involve large-scale combustion or energetic reactions that provide brute-force destruction. While effective in providing a triggered transience, their lack of control on particle size and their potential for detrimental effects on innocent bystanders, handlers, and the environment have severely limited their use.
Most anti-reverse-engineering schemes revolve around protecting a device's software/data and hardware. These schemes fall into two major categories: proactive and reactive. An example of a proactive software scheme is encryption, where a known algorithm and key are used to encode/decode data. An example of a reactive software scheme is the zeroization of data, which repeatedly erases content such that it is physically unrecoverable.
Hardware-based schemes may also be categorized as proactive and reactive. One proactive hardware scheme employs encapsulation or coatings that attempt to prevent probing of the device or silicon die analysis. A reactive hardware protection scheme is overvoltage, which is employed during tamper detection. Overvoltage produces a voltage spike large enough to irreversibly damage the internal circuitry, rendering it nonfunctional. Another less sophisticated, but often used, hardware protection scheme employs explosives or acids to physically destroy the hardware. While reasonably effective, all of the aforementioned protection methods, at best, leave traces behind that could be used to determine vital information and, at worst, endanger the lives of warfighters and threaten the environments in which they are deployed.
Reactive materials for wafer-scale energetics are capable of delivering localized heat, pressure, or shock, which provide a unique capability for protecting sensor and electronic platforms. These materials can generally be classified into four major categories: nanothermites, intermetallics, inkjet-printable secondary, and nanoporous silicon. Nanothermites such as aluminum/copper oxide generate significant heat and pressure. Reaction temperatures can reach upwards of 3000 K while achieving an output energy of 4 kJ/g. Intermetallics like nickel/aluminum have the benefit of generating heat as a byproduct of their exothermic reaction, reaching temperatures of 1600 K. Inkjet deposition of secondary explosives delivers enormous shock waves that can be rapidly transferred to targeted devices. Nanoporous energetic silicon consisting of oxidizer-infused porous silicon can deliver heat, pressure, and shock, making it one of the most versatile reactive materials available.
Among the reactive materials described, nanoporous silicon can be most readily integrated on-chip with MEMS and electronic platforms because the material is fabricated directly from silicon. This monolithic fabrication is done by etching the silicon and converting the device wafer into a silicon fuel that can be infused with an oxidizer. The exothermic reaction can be tailored to achieve a controlled release of energy. While intermetallics can be fabricated using MEMS microfabrication techniques, they can be sensitive and require in-line mixers with ultrasonics and peristaltic pumps. Nanothermites do not readily lend themselves to direct on-chip integration because they are slurry-based materials. While inkjet secondary materials can provide significant, targeted damage, they lack the controlled energy delivery of nanoporous silicon, which can be tuned to deliver precise amounts of targeted energy while residing on-chip.
What are desired are antenna structures and other microsystem components capable of physically disappearing in a controlled, triggerable manner. Transient antennas should maintain designs and performance similar to state-of-art permanent antennas, but with controllable persistence that can be programmed, adjusted in real-time, triggered, and/or be sensitive to the deployment environment.
While there are a wide range of candidate approaches to achieving physical transience (explosives, caustic-chemical-based dissolution, burning, etc.), what are desired are approaches that are fully compatible with existing integrated circuits processing, preserving antenna performance while using foundry-compatible, front-end and post-process techniques.

Transient antennas and transient electronics


A vehicle, particularly a bicycle, including a crank drive that is to be actuated by muscular force and that is disconnectably drive-connected to at least one driven wheel, and also including an electrical auxiliary drive for assisting the crank drive. The vehicle can be driven solely by the auxiliary drive when the drive connection between the crank drive and the wheel is disconnected. In addition, a control device for the auxiliary drive is preferably connected to a sensor which detects the crank rotational speed.

The invention pertains to a vehicle, especially a bicycle, with a muscle-powered crank drive disconnectably drive-connected to at least one drive wheel, and also with an electrical auxiliary drive to assist the crank drive.
Bicycles of this type, which can be ridden like a normal bicycle but for which an electrical auxiliary drive ensures that the force to be expended to push the pedals is kept within limits, are known through prior use. The reduced drive force to be expended by the rider allows higher riding speeds; without appropriate devices for changing the gear ratio, however, such higher speeds are associated with rapid leg movements, which are perceived as unpleasant.

Vehicle, particularly a bicycle, comprising an electrical auxiliary drive


A mechanical arrangement of multiple gears forming a transmission device for variable speed output and direction from a constant input source. The arrangement of multiple gears wherein the control of the output is determined by a selective incremental control input relative the constant input source. Combined arrangements of multiple gears utilize variable orbital paths control to determine variable output.

1. Technical Field
This device relates to gear transmissions that selectively provide a variable output speed and direction from a constant speed power source.
2. Description of Prior Art
Prior art devices of this type have used a variety of different configurations to supply a constant output from a variable speed input source. Such examples are well known within the art and typically use electronics and/or manual sensing means to gage the varying ratios between the actual input and the desired constant output required or vice-a-versa.
Applicant's own prior U.S. Pat. Nos. 5,116,292 and 5,016,493 illustrate the orbital path change to determine variable output. Other mechanical methods of maintaining selected constant output from a variable input can be seen in U.S. Pat. Nos. 4,961,719, and 2,547,453.
Variable output from a constant source can be seen in U.S. Pat. Nos. 4,077,278, 4,109,551, 4,916,975 and foreign patents, Canadian 989644, French 2,638,801 and French 1,323,617.
In U.S. Pat. No. 4,961,719 a variable drive transmission is disclosed using a carrier member mounted on a rotatable crank shaft with a number of spaced pivotally mounted segments that can selectively engage a central sprocket with multiple chain engagement sprockets rotatably secured to each segment.
In U.S. Pat. No. 2,547,453 a variable speed transmission can be seen having a rotatable cage with multiple enclosed cranks. An annular cam is engaged by the cranks from which the selective output can be determined.
In U.S. Pat. No. 4,077,278 is directed towards dividing input rotational force into two rotational components. An output differential combines the divided components rotational force.
In U.S. Pat. No. 4,916,975 a torque converter is illustrated with two differential gears. In put is transferred through each differential gear by planetary shafts which are aligned co-axially to one another.
In the French patent 1,323,617 a gear arrangement having a pair of interconnected differential gear segments.
In Canadian patent 989644 a rotary mesh translating device is shown that uses two differentials with a self-locking rotary coupler.
French patent 2638 801 is directed towards two differential mechanical power converters wherein the cage of the first differential receives input from a motor, converts same to output via interengaged gears to input shaft of the second differential with output from the cage of the second differential determined therefrom.


An integrated circuit containing an analog MOS transistor has an implant mask for a well which blocks well dopants from two diluted regions at edges of the gate, but exposes a channel region to the well dopants. A thermal drive step diffuses the implanted well dopants across the two diluted regions to form a continuous well with lower doping densities in the two diluted regions. Source/drain regions are formed adjacent to and underlapping the gate by implanting source/drain dopants into the substrate adjacent to the gate using the gate as a blocking layer and subsequently annealing the substrate so that the implanted source/drain dopants provide a desired extent of underlap of the source/drain regions under the gate. Drain extension dopants and halo dopants are not implanted into the substrate adjacent to the gate.

Integrated circuits with more and more functionality are needed to make advanced devices. Often multiple types of transistors such as logic MOS transistors, memory MOS transistors, input/output MOS transistors, high voltage MOS transistors and analog MOS transistors are needed on the same integrated circuit.
Analog MOS transistors may operate at higher voltages than logic MOS transistors. To form a reliable higher voltage MOS transistor in an integrated circuit typically requires sufficient overlap between the high voltage gate and high voltage drain diffusion to reduce the peak electric field near the gate corner in order to provide sufficient channel hot carrier CHC) reliability. Sufficient overlap is commonly provided by source/drain extensions which extend under the high voltage gate. Halo implants, which are angled implants of an opposite doping polarity from the source/drain extensions, may be used on logic MOS transistors to combat short channel effects. Halo implants may produce a significant slope in the drain voltage versus drain voltage curve of a MOS transistor, which may not be a problem for logic MOS transistors but may present a serious problem for analog MOS transistors. A slope as close to zero as possible may desirable for analog MOS transistors. Thus, analog MOS transistors may be added to the integrated circuit by adding separate photolithography and implantation steps to form source and drain extensions without halo implants. The additional photolithography and implantation steps undesirably increase the fabrication cost of the integrated circuit.


A valve stem assembly for tire pressure detecting systems has a valve stem, a connector and a tire pressure detector. The valve stem is conductive. The connector is connected coaxially on the valve stem and is conductive and has a connecting section. The connecting section has an adjusting slot and a domical end. The adjusting slot is formed through the connecting section. The tire pressure detector has at least one tab and at least one conducting washer, the at least one tab protrudes from the tire pressure detector, corresponds to and is adjustably mounted on the connecting section. The at least one tab has a tab slot being formed therethrough. A bolt assembly is mounted in the tab slot and the adjusting slot to hold the tire pressure detector on the connector.

1. Field of Invention
The present invention relates to a valve stem, and more particularly to a valve stem assembly for tire pressure detecting systems.
2. Description of the Related Art
Car electronics, such as antilock brake system (ABS), electronic brake distribution (EBD), Electronic Power Steering (EPS), central control system, electric panel, electronic antislip control box, tire pressure monitoring system (TPMS) or the like, have been recently invented and introduced because people care about driving safety. Various TPMSs may be applied for monitoring air pressure inside tires of a vehicle to alert a driver of abnormal tire pressure or to easily check correct tire pressures are set and comprises a tire pressure detector connected to an inner end of a valve stem.
To improve adjustability of a tire pressure detector on the valve stem for rims with different shapes, a conventional tire pressure detector has a pintle and is pivotally mounted on the valve stem using the pintle. The pintle is mounted on the tire pressure detector using fasteners after being mounted through the tire pressure detector and the valve stem. The tire pressure detector is then moveably and rotatably mounted on the valve stem and the tire pressure detector may be easily adapted to fit different rims. Although the tire pressure detector may be installed on valve stems mounted on rims with different shapes, the tire pressure detector is easily broken since the tire pressure detector is not locked in position on the valve stem after installation so is left free to vibrate, bang or knock causing damage.
The present invention provides a valve stem assembly for tire pressure detecting system to obviate or mitigate the shortcoming of the conventional valve stem with the tire pressure detector.

Valve stem assembly for tire pressure detecting systems


A scanning mechanism of one embodiment of the invention is disclosed that includes light-emitting units, an integrating detector, and pulse-width modulated (PWM) drivers. Each light-emitting unit can emit colored light corresponding to a color of a color space. The integrating detector can detect the colored light emitted by the light-emitting units as reflected off a surface by integrating the colored light detected over a period of time. Each PWM driver can turn on a corresponding light-emitting unit at a duty cycle.

Scanning devices, also known as scanners, have become popular peripherals. A scanning device may be used to obtain an electronic version of a non-electronic image. For instance, a home user may scan a hardcopy of a photograph so that the user can email the resulting electronic version of the photo to friends and family. As another example, business users may scan hardcopies of documents so that electronic versions of the documents can be maintained.
Scanning devices typically employ one or more light-emitting units and a detector. The light-emitting units emit light on a portion of the image to be scanned. The detector detects the reflected light from the portion of the image. This process is repeated over the entire image. When the detector has detected reflected light from all the portions of the image, an electronic version of the media can then be constructed.
A color scanning device usually uses light-emitting units corresponding to the colors of a color space, such as red, green, and blue light-emitting units corresponding to the colors red, green, and blue of the red-green-blue (RGB) color space. The light-emitting units separately and successively emit their colored lights onto a portion of the image, which the detector detects. The detected intensities of the individual colors of the color space for the image are then used to construct an electronic version of the image.
Differently colored light-emitting units may have different operating characteristics. For instance, the red, green, and blue light-emitting units may emit light at different intensities. In addition, the scanning device may sense the different colors in the color space differently. Thus, even if the red, green, and blue light-emitting units emit light at equal intensities, the scanning device may sense the different colored light differently, such that the measured intensities are not equal.

Pulse-width modulated drivers for light-emitting units of scanning mechanism

Hewlett-Packard Development Company, L.P.


A slurry composition, including: a polyvinyl acetal resin; a ceramic powder; and an organic solvent. The polyvinyl acetal resin has a degree of polymerization of from 200 to 6000, a content percentage of vinylester unit of from 0.01 to 30 mol %, and a degree of acetalization of from 55 to 83 mol %. The polyvinyl acetal resin has a structural unit of formula (1) in the molecule:

In the case of producing a laminated ceramic capacitor, generally the following production method is employed. Firstly, a binder resin such as a polyvinyl butyral resin, and a plasticizer are added into an organic solvent in which ceramic powders have been dispersed, the resultant is mixed homogeneously by a ball mill or the like to prepare a slurry composition. The prepared slurry composition is casted on a strippable support of polyethylene terephthalate film and the like, and the solvent and the like are removed by heating and the like, and then the resultant is stripped off from the support to obtain a ceramic green sheet.
Next, plural ceramic green sheets on the surfaces of which a conductive paste that becomes an internal electrode has coated by a screen printing or the like, are piled up alternately, and a laminated body thereof is obtained by heating, clamping, and the like, and then the laminated body is cut into a predetermined shape. Subsequently, a treatment in which the binder components and the like contained in the laminated body are pyrolytically decomposed and removed, so-called a delipidation treatment, is performed, and then by performing a step of sintering an external electrode on the end face of the ceramic burned product obtained through firing, a laminated ceramic capacitor is obtained. Therefore, in the case of the above ceramic green sheet, favorable working properties in the preparation of slurry composition and further improvement of the strength capable of withstanding these steps of processes are required.
Recent years, with the diversification and miniaturization of an electronic equipment, in the case of a laminated ceramic capacitor, the capacity enlargement and the miniaturization are required. In response to the above situation, as a ceramic powder used for a ceramic green sheet, a ceramic powder with a minute particle diameter of 0.5 μm or less is used, and an attempt to coat on the strippable support has been conducted so that the above slurry composition can be in a film state around 5 μm or less.
However, when a ceramic powder with a minute particle diameter is used, the packing density and the surface area are increased, and thus the amount of the binder resin to be used is increased. According to this situation, the viscosity of slurry composition is increased, therefore, the coating becomes difficult and the poor dispersion of the ceramic powder itself has been generated. In addition, in the steps of the preparation of a ceramic green sheet, stress such as tension, and bending is loaded, therefore, in order to withstand such a stress, a resin with a high degree of polymerization is used as a binder resin.
In Patent Literature 1 (Japanese Patent Application Laid-Open (JP-A) No. 2006-089354), there is a disclosure that a ceramic green sheet obtained from a slurry composition that contains a polyvinyl acetal resin in which the degree of polymerization exceeds 2400 and is 4500 or less, the content percentage of vinylester unit is 1 to 20 mol %, the degree of acetalization is 55 to 80 mol %; ceramic powders; and an organic solvent, is excellent in mechanical strength.
However, recently a much thinner ceramic green sheet is required, and when the thickness is 2 μm or less in the case that a super thin layer of ceramic green sheet is prepared from a slurry composition containing the above ceramic powders, a problem that a seat attack phenomenon easily occurs is caused.
Herein, the seat attack phenomenon is a phenomenon of generating a defect such as break in a ceramic green sheet by dissolving the binder resin that is contained in the ceramic green sheet due to an organic solvent in a conductive paste when the conductive paste to be an internal electrode layer is printed on the obtained ceramic green sheet. When the seat attack phenomenon occurs, the electrical performance and reliability of the laminated ceramic capacitor are decreased, and the yield is extremely decreased.
In Patent Literature 2 (JP-A No. 2008-133371), there is a disclosure of a polyvinyl acetal resin that is obtained by acetalizing a polyvinyl alcohol resin with a degree of saponification of 80 mol % or more, and a number-average degree of polymerization of 1000 to 4000, and characterized in that the degree of acetalization is 60 to 75 mol %, and the ratio of the moiety acetalized by acetaldehyde and the moiety acetalized by butyraldehyde (mol number of the hydroxyl group disappeared by the acetalization of butyraldehyde/mol number of the hydroxyl group disappeared by the acetalization of acetaldehyde) is 0.1 to 2.
However, the miniaturization of the laminated ceramic capacitor has limitation, and in order to increase the capacity of chip or to miniaturize the size while keeping the capacity, in addition to making the ceramic green sheet thinner, a multi-layered is also required. With such a multi-layered sheet and the miniaturization, the hygroscopicity in the storage of a ceramic green sheet has become a problem. That is, there may be cases that when a binder resin absorbs moisture in the storage of a ceramic green sheet, the dimensional change occurs; and since thin films are laminated into a multi-layered form, when the amount of moisture per layer is large, water evaporates at a stretch and interlayer peeling called delamination occurs in the delipidation. Therefore, the humidity control in the storage of a ceramic green sheet, and the adjustment of delipidation conditions are extremely important.
For example, since the glass transition temperature of the polyvinyl acetal denatured by acetaldehyde becomes high, the mechanical strength can be improved, however, since the hydrophobicity of acetaldehyde is low, the hygroscopicity is also high in an acetal product mixed with butylaldehyde, and the above problem was not satisfied. Further, even in an acetal product denatured by only butylaldehyde, sufficient low hygroscopicity was not satisfied.
As described above, in Patent Literatures 1 and Patent Literatures 2, there is no disclosure of the polyvinyl acetal resin having both the properties that the dimensional change in the storage of a ceramic green sheet is small, and the delamination hardly occurs in the delipidation.

Polyvinyl acetal resin, slurry composition prepared therefrom, ceramic green sheet, and multilayer ceramic capacitor