The invention provides an image outputting apparatus for outputting an image through execution of jobs, a control method for the image outputting apparatus, an image outputting system, and a storage medium product. When a job generated upon an output request is not executable, job information of at least one of other image outputting apparatuses is acquired and the job is transferred to at least one of the other image outputting apparatuses in accordance with the acquired job information.

1. Field of the Invention
The present invention relates to an image outputting apparatus for outputting an image through execution of jobs, a control method for the image outputting apparatus, an image outputting system, and a storage medium product.
2. Description of the Related Art
There is known a digital composite machine having the functions of a copying machine, a printer, an image scanner, etc. An image outputting system is proposed in which a plurality of such image outputting apparatuses are connected to a network to perform distribution processing of image outputs. That type of image outputting system can operate, for example, in an operating mode of distribution processing called demultiplex copy.
Processing procedures of the demultiplex copy will briefly be described below. First, a user sets a document on a platen of a digital composite machine (local printer) capable of reading an image, and selects the demultiplex mode with key-in operation on a console. Then, among other digital composite machines or printers connected to the network, the user selects one image outputting apparatus (remote printer) capable of executing the intended distribution processing, and sets the number of copies, the sheet size, etc. to be outputted from the selected image outputting apparatus (remote printer). When the user enters a start command for image reading in the digital composite machine (local printer), a distribution processing request is sent to both the digital composite machine (local printer) and the selected image outputting apparatus (remote printer) in response to the start command. In accordance with the received distribution processing request, the digital composite machine (local printer) and the selected image outputting apparatus (remote printer) hold jobs that are loaded therein, and execute the jobs successively for outputting images. With such demultiplex copy, an output result can be obtained in a shorter time than the case of copying the same images by a single unit of digital composite machine, and therefore the productivity in image outputting can be improved.
However, when the image outputting apparatus having received the distribution processing request is holding many jobs, that apparatus cannot execute the generated job within an expected time, thus causing the problem that until an output result is obtained, a longer time is taken than the case of selecting another target of the distribution processing.
Further, when performing the demultiplex copy using a plurality of image outputting apparatuses having different outputting speeds, if those image outputting apparatuses include one having a low outputting speed, that one apparatus cannot execute the generated job at an expected outputting speed. This also causes the problem that until an output result is obtained, a longer time is taken than those required by the other selected targets of the distribution processing.
Such a delay in image outputting due to the fact that the job cannot be executed under the expected output conditions is a problem that is not limited to the distribution processing such as the demultiplex copy, but occurs in common to the case of, e.g., remote copy wherein processing of an output is carried out by one remote apparatus. The problem can be coped with, for example, by changing the target of outputting before sending an output request. Hitherto, it has been difficult to determine from the standpoint of job whether an apparatus selected as the target of outputting can accept the output request and can execute the job under the expected output conditions.

Image outputting apparatus, control method for the image outputting apparatus, image outputting system, and storage medium product


Methods and apparatus are described for forward baseband digitalization. A method includes receiving a forward baseband digital optical signal from an optical fiber; transforming the forward baseband digital optical signal to a forward analog electrical signal; transmitting the forward analog electrical signal on an electrical conductor; receiving a reverse analog electrical signal on the electrical conductor; transforming the reverse analog electrical signal to a reverse digital baseband optical signal; and transmitting the reverse digital baseband optical signal. An apparatus includes a forward baseband digital optical signal receiver; a forward circuit coupled to the forward baseband digital optical signal receiver, the forward circuit transforming a forward baseband digital optical signal to a forward analog electrical signal; a forward analog electrical signal transmitter coupled to the forward circuit; a reverse analog electrical signal receiver; a reverse circuit coupled to the reverse analog electrical signal receiver, the reverse circuit transforming a reverse analog electrical signal to a reverse digital baseband optical signal; and a reverse baseband digital transmitter coupled to the reverse circuit.

1. Field of the Invention
An embodiment of the invention relates generally to the field of data networking. More particularly, an embodiment of the invention relates to methods and apparatus for forward baseband digitalization.
2. Discussion of the Related Art
Prior art advanced broadband networks are known to those skilled in the art. For instance, a conventional advanced broadband network typically includes a headend, a number of hubs, and a larger number of nodes through which a still larger number of subscribers are serviced.
A problem with this technology has been related to the difficulty of achieving highly linear transmission over short and long fiber links at affordable cost. The technology commonly referred to as directly modulated 1310 nm analog lasers for 50 to 860 MHz bandwidth is distance limited to 40 km and loss budget limited to 15-18 dB and expensive at high output levels that allow for such distant locations to be reached. The technology commonly referred to as externally modulated 1550 nm optical analog transmitters for 50 to 860 MHz bandwidth is relatively very expensive for all distances and practically not applicable for distances in excess of 100 km. Therefore, what is required is solution that allows for much longer optical links at affordable cost and at the same or better performance.
Another problem with this technology has been that several links cascaded add cumulatively interference levels. Therefore, what is also required is a solution that allows for cascading OEO signal regenerators without signal degradation.
One unsatisfactory approach to overcoming this distance limitations involves, bandwidth splitting and using several separate transmitters to transmit much lower bandwidth, ideally within one frequency octave. However, a disadvantage of this approach is that it increases the cost of the link by the factor of two or higher. Another unsatisfactory approach for overcoming high loss budget with 1550 nm technology is to use optical amplification of the optical signal. However, a disadvantage of this approach is significant cost increase at low gains in loss budget and at measurable performance degradation. Therefore, what is also needed is a solution that meets the above-discussed requirements in a more cost-effective manner.
Heretofore, the requirements of long distance or high loss budget links at affordable cost without performance degradation, referred to above have not been fully met. What is needed is a solution that simultaneously meets all of these requirements.


A hearing protection device is disclosed which incorporates integrated audiometric testing, thereby allowing for testing without removal of safety hearing protection. The hearing protection is typically intended to be worn for the duration of a work shift, and allows for self-testing during the shift. Embodiments of the device may utilize a series of partial test sessions, so that each test session is kept brief so as to not interfere unduly with the work schedule. This may encourage frequent testing, hopefully aiding in early detection of potential hearing loss. Additionally, methods of use are disclosed.

In many industrial settings, workers are routinely exposed to potentially damaging noise environments during their workday. The issue of potential hearing damage often arises in manufacturing and other industrial facilities, but may also arise in military settings, airport settings, and other work environments that involve potentially damaging noise exposure. There is a need to both protect against hearing damage and also to monitor workers' hearing to determine if there has been any significant hearing loss due to environmental noise. Hearing protection and hearing monitoring may work synergistically together to provide improved hearing protection, since the ability to monitor for hearing loss allows for better evaluation of the effectiveness of the hearing protection and allows for corrective action to be taken at an early stage (which may limit permanent hearing loss, possibly by allowing action at the first signs of temporary hearing loss). Examples of corrective action could include modifying and/or supplementing hearing protection, reducing time in the noise environment, and/or removing the worker from the noise environment, by way of non-exclusive example.
To be effective for this purpose, embodiments of the present invention may offer both hearing protection and hearing testing, and may provide regular hearing testing in a way that is not burdensome or time or labor intensive. Rather, it offers a convenient approach that may easily be integrated into the standard workday without any significant disruption to routine. Providing an integrated hearing test within safety hearing protection that workers will wear anyway (for example, for OSHA compliance) may also allow for self-administered audiometric testing that may be run independent of location. The convenience of this type of integrated design makes regular, frequent audiometric testing easier to perform, and by increasing the frequency of such testing, may ultimately result in improved hearing protection.

Hearing protection device with integrated audiometric testing


Provided is a watch capable of performing digital display as well as analog display. The watch can offer digital display without posing disadvantages peculiar to a liquid crystal panel. On the other hand, the watch can reduce the restrictions in design and make the digital display larger and easier to see. The watch includes a light-shielding plate 22 on the rear side of the dial 24. In the light-shielding plate, light-transmitting holes 23 are made piercing from a front of the light-shielding plate to a rear thereof. Thin chip LEDs 17 are inserted in the light-transmitting holes, and mounted on a circuit board 16. The circuit board is placed on the rear side of the light-shielding plate. On the rear side of the circuit board, an analog movement 13 is provided, and an LED drive circuit 33 for driving the LEDs is placed. Thus, the LEDs 17 for digital display are placed on the rear side of the dial. The dial is formed so as to have an optical transmittance such that the digital display with the LEDs can be visually identified through the dial only when the LEDs are ON.

Conventionally, a watch that performs both analog display and digital display has incorporated a liquid crystal panel for digital display, whose power consumption is smaller. With such watch, a liquid crystal panel is placed in a location in a dial where a digital display window is made, or laid out as a discrete structure by the side of an analog display portion or inside a windshield, for instance.
The examples are described in Japanese Unexamined Patent Publications No. 2004-53342 and No. 8-122468, and Japanese Unexamined Utility Model Publication No. 54-172766.


A method and apparatus for providing computer code updates through an integrated circuit card (smart card) interface. The smart card interface within a computer control device determines whether the card that is inserted into the smart card interface is either a memory card or a conventional smart card. Once the smart card interface has detected that the memory card has been inserted, the interface requests data from the card. The interface provides the computer code to the memory of the computer controlled device to update the computer code therein.

1. Field of the Invention
The present invention relates to techniques for updating computer code in computer controlled devices and, more particularly, the invention relates to a method and apparatus for updating computer code in computer controlled devices utilizing an integrated circuit card (smart card) interface.
2. Description of the Background Art
Many consumer electronics devices such as pay TV systems, set top cable television boxes, terrestrial television receivers, satellite television receivers and the like, require periodic software updates to provide signal processing, interactive features, and security improvements to the consumer. Software upgrades for such devices are generally performed by replacing the read only memory chips within the device or connecting a computer to a data port on the device to download the software upgrade into the memory of the device. Such upgrades require a technician to visit the consumer's location and perform the upgrade of the software. Alternatively, the consumer must return the device to the manufacturer, then be provided a replacement device that contains the upgraded software. Such a software upgrade process is time consuming and costly.
Therefore, a need exists in the art for an improved technique for upgrading computer code within a computer controlled device.

Method and apparatus for updating computer code using an integrated circuit interface


In a variable magnification optical system, consisting of a first lens group having a positive refractive power, a second lens group having a negative refractive power, a third lens group having a positive refractive power, and a fourth lens group having a positive refractive power, arranged in order from the object side, in which magnification is changed by moving the second lens group and focusing is performed by moving the fourth lens group, the first lens group consists of a positive lens and a positive cemented lens, arranged in order from the object side, the third lens group includes an aperture stop on the most object side, the fourth lens group consists of a positive lens, a negative lens, and a positive lens, arranged in order from the object side, with at least one surface being an aspherical surface, and the system satisfies given conditional expressions.

1. Technical Field
The present invention relates to a variable magnification optical system capable of maintaining the maximum aperture F-number bright from the wide angle end to the telephoto end, and an imaging apparatus which includes the variable magnification optical system.
2. Background Art
As zoom lenses (variable magnification optical systems) for use with CCTV (Closed-circuit Television) designed to meet the surveillance camera specifications that can be used both in visible region and near infrared region, and allow image capturing even at night as well as during the day, a plurality of four group zoom lenses having positive, negative, positive, and positive refractive powers has been proposed in the past (Japanese Unexamined Patent Publication No. 2011-118372, Japanese Unexamined Patent Publication No. 6(1994)-230317, Japanese Unexamined Patent Publication No. 2011-158630, and the like). The four group zoom lenses having positive, negative, positive, and positive refractive powers have many advantages, including ease of handling along with the simplicity of the lens barrel·magnification change mechanism and such configuration has conventionally been employed frequently.
Note that such zoom lenses may well be used for imaging devices, other than CCTV, such as video cameras, electronic still cameras, and the like, having image sensors, such as CCD (Charge Coupled Device), CMOS (Complementary Metal Oxide Semiconductor) and the like as recording media.

Variable magnification optical system and imaging apparatus


Systems and methods to request and collect evidence elements from one or more evidence systems responsive to a triggering event are disclosed. An evidence request beacon may be generated based at least in part on information associated with the triggering event. The evidence request beacon may be received by one or more evidence systems and may be evaluated to determine if potentially relevant evidence is available from the evidence system. If potentially relevant evidence elements are available from the one or more evidence systems, then the potentially relevant evidence elements may be provided to the requesting system.

Vehicles, such as cars, may have one or more sensors and may have the capability to evaluate signals from those sensors to detect an unusual event, such as a break-in or a road accident. The car may therefore be able to indicate an unusual event to a user/driver of the vehicle.
In certain regions of the world, there may be evidentiary systems, such as video cameras, on or in proximity to roads. These evidentiary systems may be in the form of physical infrastructure, such as cameras on a side of the road. Alternatively, the evidentiary systems may be part of the cars that are on the roads.

Systems and methods for collecting vehicle evidence


In a noise canceling method and an apparatus therefor which notices the colored noise looked macroscopically, positively cancels the dominant noise component in the low frequency band, shifts the S/N value to plus, and can extract the reception signal buried in the low frequency band and having a comparatively high level, a signal in which a time axis, an amplitude, and a phase are specified or a zero-point signal is inserted into a transmission signal by an inserter, a noise component is interpolated by using the specified signal or the zero-point signal by a noise canceler, and an originally transmitted signal is regenerated by subtracting the noise component from the reception signal.

1. Field of the Invention
The present invention relates to a noise canceling method and an apparatus therefor, and in particular to a noise canceling method and an apparatus therefor for faithfully taking out a signal buried in a noise.
Such a noise canceling method and an apparatus therefor has become remarkably necessary in various industrial fields as described in the following.
Power-line carrier modem field which attempts to realize a data transmission at a high speed under circumstances with many noises such as in a power-line carrier;
CATV modem, ADSL modem, VDSL modem, 2.4 G wireless LAN, wireless transmission field, optical transmission field, and the like;
Magnetic disk or optical disk which attempts to realize a high recording density by taking out such a signal as is buried in the noise due to the transmission rate accelerated;
Semiconductor of accelerated multi valued transmission technology;
Voice recognition, image compression, demodulation of bar code scanner, and the like under noisy circumstances.
Hereinafter, the presence of such a noise will be described by taking a power-line carrier modem as an example, while the same applies to the other fields as mentioned above.
In a power system shown in FIG. 20, power in a distribution substation 100 is firstly supplied to a pole transformer 103 through a 6.6 KV high voltage distribution line 102, and is further supplied to a home 105 through a 100 V/200 V low voltage distribution line 104.
Upon performing a power-line carrier communication, an optical fiber (not shown) is set up parallel with the high voltage distribution line 102 between an access node 101 in the distribution substation 100 and a modem set up in the pole transformer. Through the optical fiber, the communication between the modem in the pole transformer 103 and the modem inserted into the convenience outlet connected to an interior distribution line 106 in the home 105 is performed through the 100 V/200 V low voltage distribution line 104.
In this case, as shown in FIGS. 21A–21C, the low voltage distribution line 104 looks like an inductor of 1 μH/m, as shown in FIG. 21B, for a spectrum of a transmission signal TX shown in FIG. 21A, and looks like an inductor of 150 μH if the line length is assumed to be 150 m.
Also, a service wire 107 connected to the low voltage distribution line 104 looks like a capacitor of 75 pF/m, and looks like a capacitor of 0.1125 μF if a 50 m service wire is assumed to be connected to the home 105. Not only the service wire, but also various household electric appliances in the home 105 look like a capacitive load (see FIG. 21B), since the capacitors for canceling the noise are connected to AC 100 V.
Consequently, the portion between the utility pole where the pole transformer 103 is placed and the convenience outlets in the home looks like a low-pass filter (LPF), as shown in FIG. 21B, and a reception signal RX greatly attenuates in a high frequency band, as shown in FIG. 21C. Therefore, when arriving at the terminal side, the high frequency band signal is buried in a noise N in the worst case.
On the other hand, although the loss in the low frequency band is not so large compared with the high frequency band, random noises (white noises) from the household electric appliances such as inverter appliances are extremely large. Therefore, the low frequency band signals are also buried in the noise N as shown in FIG. 21C, and the high-speed data communication can not be put into practice, so that the so has been demanded for a long time.
2. Description of the Related Art
Hereinafter, the prior art technologies for which such solutions have been proposed will be described over three generations.
<1st Generation>
FM modulation method, FSK modulation method, PSK modulation method, and the like said to be resistive to the noise were adopted as a modulation method of a power-line carrier modem. However, since the noise level of the actual power line was high, their practical uses were limited to the applications for a low speed, equal to or less than 1200 bps.
<2nd Generation>
The spread spectrum system was introduced. Since the spread spectrum system was resistive to the noise, it was greatly expected for practical use of the power-line carrier.
However, according to Shannon theory limit, the transmission capacity decreases rapidly when the S/N value is minus or negative (see FIG. 21C) subject to the white noise, and it is theoretically impossible to realize the high-speed transmission. Accordingly, the Shannon limit could not be exceeded, so that the communication of 100 kbps at the maximum could be performed or the communication was disabled in the worst case.
<3rd Generation>
OFDM (Orthogonal Frequency Division Multiplexing) method has appeared. The OFDM method adopts the multi carrier modulation method, and is a technology which avoids the carrier bandwidth with a number of noises without using it. Therefore, a large noise can be avoided, resulting in a prospect of realizing enhanced speed.
However, the inverter built-in rate of the household electric appliances forming the main sources of the noises has been increasing, and the reduction in the high frequency band accompanied with the capacitive load has been also increasing. As a result, although it has been possible to perform a low speed communication depending on circumstances in the prior art technology, it has been impossible to realize a higher speed communication of several Mbps.
Thus, building the inverters in the household electric appliances is a great trend, so that the noise due to the inverters built in the household electric appliances has a tendency to increase more and more hereafter. Also, with the increase of the noise, the capacitive load has a tendency to increase for a noise preventive measure.
Under such circumstances, the idea of avoiding the noise like the solution of the 3rd generation is not enough for the trend. Rather, for the solution of the 4th generation, the attempt of positively facing the noise to cancel the noise, and realize a high-speed data communication is important.
As shown in FIG. 21C, although the noises are little in the high frequency band, the reception signal greatly attenuates by the capacitive load, and becomes lower than the noise level. Although the attenuation of the reception signal is not so large in the low frequency band, the S/N value is still minus due to the noise from the household electric appliances.


A new Osteospermum plant particularly distinguished by its very compact round plant habit, early flowering with white colored ray florets and blue colored disc florets.

The present invention relates to a new and distinct cultivar of Osteospermum plant, botantially known as Osteospermum ecklonis. The new Osteospermum is propagated by cuttings resulting from a cross of a proprietary Osteospermum ecklonis seedling selection as the male, or pollen, parent identified as code number 'C272' with a proprietary Osteospermum ecklonis selection identified as code number 'C298' as the female, or seed, parent. 'C272' has a plant height of 30 cm and a plant width of 20 cm. 'C298' has a plant height of 18 cm and a plant width of 12 cm.
The new Osteospermum was discovered and selected as a single flowering plant within the progeny of the stated cross grown in Enkhuizen, Netherlands in 1998. Neither 'C272' nor 'C298' has been patented. The new Osteospermum plant has been repeatably asexually reproduced by cuttings in Enkhuizen, Netherlands over a period of four years. It has been found to retain its distinctive characteristics through successive propagations, and this novelty appears to be firmly fixed.


The present invention provides a motorcycle including a front wheel, a rear wheel, a frame supported by the front and rear wheels, a crankcase including a first interface portion and a first passageway exposed to the first interface portion, a reservoir located remotely from the crankcase adapted to contain a lubricant, and a transmission case supported by the frame and including a second interface portion and a second passageway exposed to the second interface portion. The second passageway is in fluid communication with the reservoir. The first interface portion is coupled to the second interface portion. The first passageway is in fluid communication with the second passageway. The first and second passageways provide fluid communication between the reservoir and the crankcase through the first and second interface portions.

Lubrication systems in motorcycle engines and transmissions commonly include an oil pan defining an oil reservoir, an oil pump configured to draw oil from the reservoir, an oil return hose to return oil to the reservoir, and an oil feed hose communicating the reservoir and the inlet of the oil pump. The oil pan can be mounted remotely from the engine adjacent and below the transmission. Due to the oil pan's remote positioning from the engine, the lubrication system requires external hoses extending from the oil reservoir to the engine for providing oil to, and receiving oil from, the engine.
Motorcycle engines and transmissions also typically include external vent hoses communicating the crankcase of the engine and the transmission case of the transmission.

Harley-Davidson Motor Company Group, Inc.


The present invention relates, in part, to agents that bind CD8 and their use as therapeutic and diagnostic agents. The present invention further relates to pharmaceutical compositions comprising the CD8 binding agents and their use in the treatment of various diseases, including, for example, cancers.

Activated CD8+ T lymphocytes (also known as cytotoxic T cells or CTLs) represent the main line of defense against a wide gamut of microbial pathogens. Further still, CTLs also play an important role in antitumor immunity. Specifically, these effector cells can curb cancer development through mechanisms including production of interferon (IFN)-γ and cytotoxins, exocytosis of lytic proteins (e.g., perforin, granzymes), and receptor-ligand binding of FAS molecules.
Nevertheless, microbial pathogens and tumor cells have developed various mechanisms to escape immune destruction by CTLs. For example, tumors can evade immune surveillance by crippling CTL functionality via, for instance, production of immune suppressive cytokines and engagement of immune checkpoint inhibition, either by the cancer cells themselves or by non-cancerous cells present in the tumor microenvironment. Cancer cells have also been shown to delete CTLs through apoptosis.
Accordingly, there remains a need for improved immunotherapeutic agents, including, for example, those that can effectively derail tumor evasion and enhance anti-tumor immunity as mediated, for example, by CTLs.


A station control system for and method of controlling the operation of a driverless vehicle. The system includes a vehicle travel path, a plurality of station tags in readable proximity to the travel path, and a vehicle movable along the travel path. Each of the tags are pre-programmed with a unique and arbitrary tag identifier. The vehicle has a tag reader and a controller communicating with the reader with the tag reader is configured to read tag identifiers from the tags. The controller is configured to receive the tag identifiers from the tag reader and access a correlation table having a function command associated with the tag identifier. The method includes the steps of reading the tag identifier associated with one of the plurality of tags, accessing the correlation table to identify a command in the function field associated with the tag identifier, and executing any identified command.

The present invention relates to a station control system for a driverless vehicle and, more particularly, to a system for controlling functional operations to be performed at one or more stations along the path of a driverless vehicle.
There are many known systems for guiding a driverless vehicle, including inertial guidance systems, active or passive wire guidance systems, optical guidance systems, and magnetic guidance systems. Absolute position indicators are commonly disposed along the vehicle guide path to provide periodic absolute position updates to the vehicle guidance system thereby increasing guidance accuracy and ensuring proper positioning of the vehicle. A variety of position indicators are commonly used, including lasers, optics, and floor-disposed position indicators. The floor-disposed position indicators provide the vehicle guidance system with the position of the vehicle in an absolute coordinate system. Such position indicators and the corresponding readers are expensive, require labor-intensive installation, and detailed surveying of their positions once installed. Moreover, absolute position indicators such as those described above are intended to assist in the guidance of the vehicle through absolute positioning updates which is in contrast to the functionality and purpose of the present invention.
In the past, driverless vehicle guidance systems have also used position indicators, such as an array of magnets, to identify when a vehicle is at a predetermined marked location or station along the guide path. In complex guidance systems, a plurality of magnets have been used in unique combinations to identify many different stations. However, the use of magnets as a means for marking predetermined stations along the guide path has several shortcomings. For example, the number of polarity combinations available from such magnets do not provide the statistical variation in unique and arbitrary identifiers that is desirable in complex driverless vehicle applications. Accordingly, there is a desire to provide a simple, flexible, and inexpensive station control system which overcome the shortcomings of the prior art.

Station control system for a driverless vehicle


A transmitter and method to output a stable output signal having low distortion by adjusting a delay time of an amplitude signal path and a phase signal path. In an amplitude phase extracting part, amplitude data and phase data are extracted from a transmit data signal and outputted. The amplitude of the amplitude data is modulated in an amplitude modulating part and an amplitude modulating signal is outputted; the phase of the phase data is modulated and a phase modulating signal is outputted. In a non-linear amplifying part, the phase modulating signal is multiplied by the amplitude modulating signal to output an RF signal with a prescribed gain amplified. A delay part provided in a pre-stage of the amplitude modulating part and a delay part provided in a pre-stage of the phase modulating part, respectively, adjusts the delay time of an amplitude signal path and a phase signal path.

For a power amplifier provided in an output part of the transmitter of a radio communication system, the compatibility of a low distortion and a high efficiency is required. The power amplifier has a classification that a transistor is used as a current source or a switch. The amplifier using the transistor as the current source includes an class A amplifier, an class AB amplifier, a class B amplifier and a class C amplifier. Further, the amplifier using the transistor as the switch includes a class D amplifier, an class E amplifier and an class F amplifier.
As the high frequency power amplifier for amplifying a modulation signal including an envelope variable component, an A class linear amplifier or an class AB linear amplifier has been used to linearly amplify the envelope variable component. However, the power efficiency of the linear amplifier has been disadvantageously lower than that of a class C or an class E non-linear amplifier. Accordingly, when the linear amplifier is used in a portable radio device such as a portable telephone, a portable information terminal, or the like having a battery as a power source, a using time has been inconveniently decreased. Further, in a base station device of a mobile telecommunication system in which a plurality of transmitters using a large quantity of power is installed, the device is undesirably enlarged and the quantity of generated heat is inconveniently increased.
Thus, as a transmitter having a highly efficient transmitting function, an EE & R (Envelope Elimination and Restoration) transmitter is proposed which includes an amplitude phase extracting part, an amplitude modulating part, a phase modulating part and a non-linear amplifying part, inputs a signal of a prescribed envelope level to the non-linear amplifying part and uses the non-linear amplifier having a good efficiency as a high frequency amplifier. Further, a transmitter has been also known in which the non-linearity of an envelope signal of a non-linear amplifier is compensated by a negative feedback to suppress an amplitude distortion.
FIG. 9 is a block diagram showing the structure of the above-described EE & R transmitter as a first existing example. The transmitter of the first existing example includes a transmit data input terminal 111, an amplitude phase extracting part 112, an amplitude modulating part 113, a phase modulating part 114, a non-linear amplifying part 115 and a transmit output terminal 116.
In FIG. 9, assuming that a transmit data signal Si(t) inputted from the transmit data input terminal 111 is expressed bySi(t)=a(t)exp[jø(t)]  (1),amplitude data a(t) and phase data exp[jø(t)] are extracted from the Si(t) by the amplitude phase extracting part 112. The source voltage value of the non-linear amplifying part 115 is set by the amplitude modulating part 113 on the basis of the amplitude data a(t). On the other hand, a signal is generated by modulating carrier wave angular frequency ωc by the phase data exp[jø(t)]in the phase modulating part 114 to be Sc and Sc is inputted to the non-linear amplifying part 115.Sc=exp[ωct+ø(t)]  (2)
A signal is generated by multiplying the source voltage value a(t) of the non-linear amplifying part 115 by the output signal of the phase modulating part 114. An RF signal Srf obtained by amplifying the obtained signal by a gain G of the non-linear amplifying part 115 is outputted to the output of the non-linear amplifying part 115.Srf=Ga(t)Sc=Ga(t)exp[ωct+ø(t)]  (3)
As described above, since the signal inputted to the non-linear amplifying part 115 is the signal of a prescribed envelope level, a non-linear amplifier having a good efficiency as a high frequency amplifier can be used. Thus, the transmitter with a high efficiency can be realized.
In the first existing example, the detail of the amplitude modulating part 113 is not illustrated. However, the amplitude modulating part 113 uses a structure that includes, for instance, a DA (digital-analog) converting part, a pulse width modulating part, a switch and a low-pass filter which are connected in order and in series to input source voltage to the switch. In the amplitude modulating part 113, the amplitude data as a digital value is converted to an analog signal in the DA converting part and the pulse width of the analog signal is modulated in the pulse width modulating part. The switch is switched in accordance with the pulse output of the pulse width modulating part. The output of the switch is smoothed in the low pass filter to be an amplitude modulating signal and is applied as the source voltage of the non-linear amplifying part 115 (for instance, see Non-Patent Document 1).
Further, the phase modulating part 114 employs a structure using a PLL (Phase-Locked Loop). That is, the PLL, whose detail is not illustrated, is provided in which for instance, a phase frequency comparing part, a low-pass filter and a voltage control oscillator are connected in order and in series and a part of the output of the voltage control oscillator is fed back as a feedback signal to the phase frequency comparing part through a frequency divider. Further, an output of a ΔΣ (delta sigma) modulating part is inputted to the above-described frequency divider. In the phase modulating part 114, the frequency of a signal obtained by dividing the frequency of the output of the voltage control oscillator by the frequency divider is compared with a reference frequency in the phase frequency comparing part to output a difference between both the frequencies. The output of the phase frequency comparing part passes through the low-pass filter to become the control voltage of the voltage control oscillator and the output of the voltage control oscillator is locked by a prescribed phase and frequency. In the above-described PLL, the frequency dividing ratio of the frequency divider is changed in accordance with a signal obtained by performing a delta sigma modulation to phase data so that a phase modulation can be applied to the output of the voltage control oscillator (For instance, see Non-Patent Document 2).
FIG. 10 is a block diagram showing the structure of a transmitter having a negative feedback as a second existing or usual example. The transmitter of the second usual example includes a transmit data input terminal 111, an amplitude phase extracting part 112, an amplitude modulating part 113, a phase modulating part 114, a non-linear amplifying part 115, a transmit output terminal 116, a directional coupling part 117, an envelope detecting part 118, an AD (analog digital) converting part 119, an adding part 120 and an amplifying part 121. The same components as those of the transmitter shown in FIG. 9 are designated by the same reference numerals.
Now, an operation of the transmitter of the second existing or usual example will be described below. The transmitter of the second usual example feeds back the envelope component of an RF signal as an output of the non-linear amplifying part 115 in addition to the same operation as that of the transmitter as the first usual example shown in FIG. 9. The output of the non-linear amplifying part 115 is allowed to branch by the directional coupling part 117 and inputted to the envelope detecting part 118 to detect the envelope signal of the RF signal. The detected envelope signal is subjected to an analog digital conversion in the AD converting part 119 and the analog digital converted envelope signal is subtracted from the original amplitude data in the adding part 120, then amplified in the amplifying part 121 and inputted to the amplitude modulating part 113. The non-linearity of the envelope signal of the non-linear amplifying part 115 is compensated by the above-described feedback so that an amplitude distortion can be suppressed (For instance, see Non-Patent Document 3).    (Non-Patent Document 1) Peter B. Keningstopm, "HIGH-LINEARITY RF AMPLIFIER DESIGN" first edition, ARTECH HOUSE, INC., 2000, p 426–443    (Non-Patent Document 2) R. A. Meyers and P. H. Waters, "Synthesizer review for PAN-European digital cellular radio" poc. IEE Colloquium on VLSI Implementations for 2nd Generation Digital Cordless and Mobile Telecommunications Systems, 1990, p. 8/1–8/8    (Non-Patent Document 3) Peter B. Kenington, "HIGH-LINEARITY RF AMPLIFIER DESIGN" first edition, ARTECH HOUSE, INC., 2000, p. 156–161
However, in the transmitter of the first usual example shown in FIG. 9, since an amplitude signal and a phase signal reach the non-linear amplifying part 115 through different paths, an output signal is undesirably distorted due to the difference of delay time between the signal path of an amplitude modulation and the signal path of a phase modulation.
The transmitter of the second usual example shown in FIG. 10 has a structure for reducing an amplitude distortion by a negative feedback loop. To more increase a quantity of decrease of the amplitude distortion, a loop gain needs to be increased. Accordingly, the stability of the negative feedback loop is disadvantageously deteriorated.
The present invention is devised to solve the above-described problems and it is an object of the present invention to provide a transmitter in which power efficiency is good and a stable signal having little distortion can be outputted.

Transmission device and delay time adjustment method thereof

Matsushita Electric Industrial Co., Ltd.


An improved method and apparatus for performing operations (such as Viterbi decode) in digital processors using a reduced number of cycles. In one aspect, the invention comprises efficient methods for performing multiple “butterfly” add-compare-select (ACS) operations using an improved dual butterfly (DVBF) extension instruction added to the instruction set of a user-configured processor. The DVBF extension allows performance of two butterfly operations in a single cycle. In another aspect, an improved path metric addressing scheme is disclosed. An integrated circuit (IC) device incorporating the aforementioned features, and method of designing such IC, are also disclosed.

1. Field of the Invention
The present invention relates generally to the field of data processors, and specifically to an improved data processor and related methods for processing communications data such as, for example, Viterbi decoding.
2. Description of Related Technology
The need for increased efficiency and speed in communications data processing is now ubiquitous. Consumer and other communications applications demand increased performance in a smaller form factor and with less power consumption. This is especially true in consumer wireless handsets, where it is desired to have the most rapid data encoding and decoding possible within the smallest and most power efficient IC, thereby reducing handset size and increasing battery longevity.
Such encoding and decoding processes can be quite complex. The well known Viterbi algorithm is an example of a decoding algorithm used for convolution codes in a memory-less noisy channel. The Viterbi algorithm attempts to estimate the state sequence of the encoder finite state machine (FSM) from the corrupted received data. Since these complex algorithms are run in effect continuously during the communication process, even small gains in efficiency and performance on a per-operation or per-cycle basis can produce large benefits in efficiency and power consumption.
An idealized Viterbi channel encoder/decoder system is shown in FIG. 1. The encoder (FIG. 2) produces a code symbol consisting of two binary bits for every input bit. The code rate (r=k/n) is ½, where k=1 is the input rate and n=2 is the output rate. The number of bits that have an effect upon the output is 3. This parameter is known as the constraint length. The encoder is assumed to be a Mealy type FSM of the kind well known in the art, and so the outputs produced are a function of the current state and the current input.
The encoder's outputs and state transitions can be best visualised with the aid of a state transition diagram, as shown in FIG. 3. The dashed lines 302 represent an input of '0', and vice versa for the solid lines.
An extension of the state diagram is known as a trellis diagram. The trellis displays all the information in a state diagram, and also includes transition in time. The trellis diagram shown in FIG. 4 is for an encoder with code rate=½ and constraint length 3.
The Viterbi encoder will produce a unique set of state transitions for the information bits supplied as shown in FIG. 5. The sequence supplied to this example encoder is 111102 and the state sequence is [S0, S2, S1, S2, S3, S1]. The decoder attempts to determine the FSM's state sequence by finding the path (though the trellis of FIG. 4) that maximise the probability of state sequence the FSM has passed though, given the received data.
As each code symbol is received, it is supplied to all states in a stage (a stage is time slot within the trellis). As can be seen in FIG. 5, each state has two branches leading into it from two separate states. Each state expects a known code symbol to be associated with that branch. Each branch is a terminator for a path though the trellis and each path have an accumulated error metric associated with it.
The code symbols are received by each state (or ACS node). The ACS calculates the branch metric error for each of the branch's expected code symbols and the received code symbols. The branch metric is added to the accumulated error metric for that path and the survivor branch is selected. The survivor is the branch with the lowest total accumulated error. The decisions for each state are stored in the traceback memory. The decision bit stored indicates which branch survived, '0' for upper and '1' for lower.
Traceback can begin after constraint-length×5 code symbols have been processed by the ACS node network. Traceback begins by finding the optimum starting state. The optimum state for hard-decision detection is the state with the smallest total accumulated error. Starting in the optimum state (OP) the next state to be traced-back into is calculated by using the decision bit stored in the OP and from a look-up table of predecessor states for that state. Referring back to FIGS. 2-5, it can be seen that if the OP was state 1 then a decision bit of '0' would lead to state 2. The traceback is continued until the start of the traceback memory. Any code symbols decoded after K*5 can be outputted. The process of the ACS nodes providing decision bits and the traceback memory decoding the output is continued until no more code symbols are available.
A variety of different techniques are known in the prior art for implementing complex algorithms using data processors. These techniques generally fall into one of three categories: (i) "fixed" hardware; (ii) software; and (iii) user-configurable.
So-called 'fixed' architecture processors of the prior art characteristically incorporate special instructions and or hardware to accelerate particular functions. Because the architecture of processors in such cases is largely fixed beforehand, and the details of the end application unknown to the processor designer, the specialized instructions added to accelerate operations are not optimized in terms of performance. Furthermore, hardware implementations such as those present in prior art processors are inflexible, and the logic is typically not used by the device for other "general purpose" computing when not being actively used for coding, thereby making the processor larger in terms of die size, gate count, and power consumption, than it needs to be. Furthermore, no ability to subsequently add extensions to the instruction set architectures (ISAs) of such 'fixed' approaches exists.
Alternatively, software-based implementations have the advantage of flexibility; specifically, it is possible to change the functional operations by simply altering the software program. Decoding in software also has the advantages afforded by the sophisticated compiler and debug tools available to the programmer. Such flexibility and availability of tools, however, comes at the cost of efficiency (e.g., cycle count), since it generally takes many more cycles to implement the software approach than would be needed for a comparable hardware solution.
So-called "user-configurable" extensible data processors, such as for example the ARCtangent™ processor produced by the Assignee hereof, allow the user to customize the processor configuration, so as to optimize one or more attributes of the resulting design. When employing a user-configurable and extensible data processor, the end application is known at the time of design/synthesis, and the user configuring the processor can produce the desired level of functionality and attributes. The user can also configure the processor appropriately so that only the hardware resources required to perform the function are included, resulting in an architecture that is significantly more silicon (and power) efficient than fixed architecture processors. Such configuration can include, for example, the addition of specialized extension instructions (extensions), selection of memory and cache configurations, register sets, ALU configurations, and the like.
The ARCtangent processor is a user-customizable 32-bit RISC core for ASIC, system-on-chip (SoC), and FPGA integration. It is synthesizable, configurable, and extendable, thus allowing developers to modify and extend the architecture to better suit specific applications. It comprises a 32-bit RISC architecture with a four-stage execution pipeline. The instruction set, register file, condition codes, caches, buses, and other architectural features are user-configurable and extendable. It has a 32×32-bit core register file, which can be doubled if required by the application. Additionally, it is possible to use large number of auxiliary registers (up to 2E32). The functional elements of the core of this processor include the arithmetic logic unit (ALU), register file (e.g., 32×32), program counter (PC), instruction fetch (i-fetch) interface logic, as well as various stage latches.
A variety of different approaches to Viterbi decode using digital processors have been put forth in the prior art, the following being exemplary.
United States Patent Application 20020031195A1 to Honary published Mar. 14, 2002 and entitled "Method and apparatus for constellation decoder" discloses a method and apparatus for performing a slicer and Viterbi decoding operations which are optimized for single-instruction/multiple-data (SIMD) type of parallel processor architectures. Some non-regular operations are eliminated and replaced with very regular repeatable tasks that can be efficiently parallelized. A first aspect of the invention provides a pre-slicer scheme where once eight input symbols for a Viterbi decoder are ascertained and their distances calculated, these distances are saved in an array. A second aspect of the invention provides a way of performing the path and branch metric calculations in parallel to minimize processor cycles. A third aspect of the invention provides a method to implement the Viterbi decoder without continually performing a trace back. Instead, the previous states along the maximum likelihood paths for each trellis state are stored. When the path with the shortest distance is later selected, determining the trace back state only requires a memory access.
U.K. Publication No. 2371953 entitled "Viterbi equalizer which compares received data with predicted data based on the channel response estimate to generate path metrics" published Aug. 7, 2002 to Sherratt discloses an equalizer for use in processing received serial data signals sent by a transmitter and which may have been distorted during their transmission. The equalizer includes a trellis generator which receives both the serial data signals and the output of a channel estimator so as to generate the most probable bit sequence sent by the transmitter. The trellis generator operating by allocating to each branch of the trellis entering a particular state an individual branch metric which is based on the space distance between the received signal and the predicted signal received from the predictor for that state so that each branch metric is different from any other branch metric, and operates by calculating the two survivors of each Viterbi butterfly in the trellis at the same time.
Japanese Patent Publication No. 4369124 entitled "Soft Discrimination Viterbi Decode Method" published Dec. 21, 1992 discloses techniques to reduce a bit error rate of an original signal by calculating a margin for taking a bit string and applying soft discrimination Viterbi decoding thereto in the process of phase detection of a received carrier to obtain the bit string in the case of transmission of a convolution code. A soft discrimination Viterbi decoder is provided with a soft discrimination data calculation section to which a memory is built to calculate a soft discrimination data from a phase detected by a demodulation section. A de-interleave memory is connected to an output of the calculation section, and stores the soft discrimination data calculated by the calculation section. A Viterbi algorithm execution section is connected to the memory and a path memory storing an object path in the process of obtaining an optimum path. The data stored in the memory is read by the execution section while the bit sequence rearranged at the transmission is restored. Thus, the execution section uses the read soft discrimination data to obtain an optimum path on a trellis diagram thereby outputting a reproduction signal.
U.S. Pat. No. 5,796,756 to Choi, et al. issued Aug. 18, 1998 and entitled "Survivor memory device in Viterbi decoder using trace deletion method" discloses a memory device in a Viterbi decoder which determines a final survivor path using a trellis diagram and decision vectors, and outputs decoded data corresponding to the determined survivor path. The survivor memory device includes a path existence information generator for receiving a plurality of decision vectors, and for generating first branch path existence information representing whether a branch path exists between each state and the corresponding next states in the trellis diagram. A plurality of units are serially connected with respect to the outputs of the path existence information generator. Each unit comprises a path existence information store for receiving and storing the first branch path existence information, a path removal signal generator for generating corresponding path removal signals when the first branch path existence information corresponding to each current state represents that corresponding branch paths do not exist between each current state and the corresponding next states, and a path existence information updator for receiving the first branch path existence information stored in the path existence information store and the path removal signals generated by the path removal signal generator, and for updating values of second branch path existence information corresponding to each current state to represent that corresponding branch paths do not exist between each current state and the corresponding previous states.
Japanese Patent No. 10075185 entitled "Viterbi Decode Device" and published Mar. 17, 1998 discloses techniques for the Viterbi decoding of multilevel modulated data to which a redundant bit is applied by a convolution code by using a simple Viterbi decoder for binary modulation. Multilevel demodulated data obtained by receiving and demodulating a multilevel modulated signal are inputted and transmitted through circuits for converting the multilevel demodulated data into plural binary soft judgment data, so that data converted into binary data can be decoded by using a QPSK Viterbi decoder which is capable of soft judgment for binary modulation. Thus, the soft judgment of a multilevel modulated signal can be easily attained in digital ground broadcasting or the like, and at the same time, the sharing of a circuit with digital satellite broadcasting can be attained.
U.S. Pat. No. 6,448,910 to Lu issued Sep. 10, 2002 and entitled "Method and apparatus for convolution encoding and Viterbi decoding of data that utilize a configurable processor to configure a plurality of re-configurable processing elements" discloses a method and apparatus for convolution encoding and Viterbi decoding utilizing a flexible, digital signal processing architecture that comprises a core processor and a plurality of re-configurable processing elements arranged in a two-dimensional array. The core processor is operable to configure the re-configurable processing elements to perform data encoding and data decoding functions. A received data input is encoded by configuring one of the re-configurable processing elements to emulate a convolution encoding algorithm and applying the received data input to the convolution encoding algorithm. A received encoded data input is decoded by configuring the plurality of re-configurable processing elements to emulate a Viterbi decoding algorithm wherein the plurality of re-configurable processing elements is configured to accommodate every data state of the convolution encoding algorithm. The core processor initializes the re-configurable processing elements by assigning register values to registers that define parameters such as constraint length and code rate for the convolution encoding algorithm. See also United States Patent Application Publication No. 20020135502 published Sep. 26, 2002.
U.S. Pat. No. 6,424,685 to Messel, et al. issued Jul. 23, 2002 entitled "Polar computation of branch metrics for TCM" discloses a method and apparatus for decoding TCM signals including simplified polar computations and Viterbi decoding. The method includes converting the received signal from Cartesian to polar coordinates in order to provide a reduction in the number and complexity of the associated calculations. The branch metric computation for the Viterbi decoding algorithm is performed using polar samples of the demodulated signal.
U.S. Pat. No. 5,946,361 to Araki, et al. issued Aug. 31, 1999 and entitled "Viterbi decoding method and circuit with accelerated back-tracing and efficient path metric calculation" discloses a Viterbi decoding circuit which stores comparison result bits in a bit-accessible path memory unit. A back-trace is performed by setting a state value in a shift register, then shifting comparison result bits from the path memory unit into the shift register. A certain number of bits at the shift-in end of this register are supplied as read address bits to the path memory unit. The Viterbi decoding circuit has selectors that first select old path metric values and branch metric values, which are added or subtracted to produce candidate path metric values, then select the candidate path metric values, which are subtracted to produce a comparison result bit representing the sign of their difference. These additions and subtractions are performed by the same arithmetic unit.
U.S. Pat. No. 5,802,116 to Baker, et al. issued Sep. 1, 1998 and entitled "Soft decision Viterbi decoding with large constraint lengths" discloses a method and apparatus for obtaining a soft symbol decoded output of a received signal by a two pass Viterbi operation. The technique is applied where the signal is convolutionally encoded with large constraint lengths. During the first pass, the error-correction co-processor (ECCP) is programmed for hard decoded output alone. After all the received symbol sets are hard-bit decoded, a second pass Viterbi operation is performed. Using the previously decoded hard bit to identify the most likely next state at an initial time instant, and initializing the present states at that initial time instant with pre-saved accumulated costs from the first pass Viterbi operation, branch metrics are computed for those state transitions leading to the most likely next state at that time instant. The accumulated cost values of the present states leading to the most likely next state are updated, and the absolute value of their difference is coded as a reliability of the hard decoded output corresponding to that time instant. The combination of the hard decoded output and the reliability obtained from the second pass Viterbi operation results in a soft symbol decoded output. At this point, the symbol set received at this time instant during the first pass Viterbi operation is reloaded into the ECCP which updates the accumulated cost values of all possible next states. These steps are repeated until all desired soft symbols are obtained.
U.S. Pat. No. 5,742,621 to Amon, et al. issued Apr. 21, 1998 and entitled "Method for implementing an add-compare-select butterfly operation in a data processing system and instruction therefor" discloses a parallel data structure and a dedicated Viterbi shift left instruction to minimize the number of clock cycles required for decoding a convolutionally encoded signal in a data processing system in software. Specifically, the data structure and Viterbi shift left instruction ostensibly reduce the number of clock cycles required for performing an add-compare-select butterfly operation. The add-compare-select butterfly operation is included in a DO loop in a plurality of instructions for executing a Viterbi decoding algorithm, and is repeated a predetermined number of times, for choosing the best path through a trellis diagram.
U.S. Pat. No. 5,440,504 to Ishikawa, et al. issued Aug. 8, 1995 and entitled "Arithmetic apparatus for digital signal processor" discloses a digital signal processor arithmetic apparatus capable of performing Viterbi decoding processing at a high speed with minimum addition of hardware and overhead of memory. Pathmetric value and branchmetric value read out from first and second memories on two paths are simultaneously added by an adder at most significant bits and least significant bits thereof. A comparator compares values of the most significant bits and the least significant bits output from the adder to generate a path select signal indicating the value which is path-metrically smaller. The select signal is stored in a shift register on a bit-by-bit basis. Of the values of the most significant bits and the least significant bits of a register storing the output of the adder, the smaller one as decided by the path select signal is written in the memory at eight most significant bits or least significant bits thereof via distributor, a bus and a register.
U.S. Pat. No. 5,432,804 to Diamondstein, et al. issued Jul. 11, 1995 and entitled "Digital processor and Viterbi decoder having shared memory" discloses an integrated circuit with a digital signal processor (DSP) and an error correction co-processor (ECCP) that implements a Viterbi decoding function. The DSP and ECCP share a block of multi-port memory, typically by bus multiplexing a dual-port RAM. When the ECCP possesses the RAM, it inhibits the DSP from accessing that block of the RAM by asserting an EBUSY flag. This technique conserves and optimizes the RAM usage, allowing the DSP and ECCP to be formed on the same integrated circuit chip.
U.S. Pat. No. 5,633,897 to Fettweis, et al. issued May 27, 1997 and entitled "Digital signal processor optimized for decoding a signal encoded in accordance with a Viterbi algorithm" discloses a DSP having two internal data buses with two MAC units each receiving data from its respective data bus. A shifter is interposed between the multiply unit and the ALU and accumulate unit. The improved DSP also has a multiplexer interposed between one of the MAC units and the two data buses. The improved DSP is optimized to decode a received digital signal encoded in accordance with the Viterbi algorithm, wherein the DSP calculates a first pair of binary signals C2n and C2n+1, a Viterbi butterfly based upon a second pair of binary Cn and Cn+m/2, and a transitional signal a, in accordance with: C2n=minimum (Cn+a, Cn+m/2−a); C2n+1=minimum (Cn−a, Cn+m/2+a).
U.S. Pat. No. 5,068,859 to Dolinar, et al issued Nov. 26, 1991 and entitled "Large constraint length high speed Viterbi decoder based on a modular hierarchial decomposition of the deBruijn graph" discloses a method of formulating and packaging decision-making elements into a long constraint length Viterbi decoder which involves formulating the decision-making processors as individual Viterbi butterfly processors that are interconnected in a deBruijn graph configuration. A fully distributed architecture, which achieves high decoding speeds, is made feasible by wiring and partitioning of the state diagram. This partitioning defines universal modules, which can be used to build any size decoder, such that a large number of wires is contained inside each module, and a small number of wires is needed to connect modules. The total system is modular and hierarchical, and it implements a large proportion of the required wiring internally within modules and may include some external wiring to fully complete the deBruijn graph.
U.S. Pat. No. 5,151,904 to Reiner, et al. issued Sep. 29, 1992 and entitled "Reconfigurable, multi-user Viterbi decoder" discloses a decoding system for decoding a digital data stream that has been convolutionally encoded in accordance with a selected constraint length and selected polynomial codes. The system system includes a processor, such as a Viterbi decoder, that is reconfigurable so that it can decode encoded digital data streams for a number of different user channels for which data streams have been convolutionally encoded in accordance with respectively different combinations of selected constraint length and selected polynomial codes. The decoding system includes a Viterbi decoder for processing the encoded data stream in accordance with said selected constraint length and in accordance with said selected polynomial codes to decode the encoded data stream; a RAM for storing data of said selected constraint length and data of said selected polynomial codes in accordance with which said data stream was encoded; and a RAM I/O interface circuit responsive to a user channel identification signal for retrieving said selected constraint length data and said selected polynomial code data from the RAM and configuring the Viterbi decoder in accordance with said selected constraint length and said selected polynomial codes. In order to accommodate concurrent multiple user channels, the RAM stores different sets of combinations of constraint length data and polynomial code data corresponding to different user channels, with said different sets being retrievable from the RAM in response to respectively different user channel identification signals. The polynomial code data and constraint length data in the RAM may be changed from time to time in response to software instructions, as user channel requirements change. The Viterbi decoder processes said encoded data stream over a plurality of decoding cycles and produces intermediate decoding results during different decoding cycles; and the RAM I/O interface circuit stores in the RAM said intermediate decoding results produced for each different user channel during the different decoding cycles.
Despite the foregoing variety of solutions, none are able to perform at least one complete butterfly (two ACS) operations in a single cycle. Furthermore, none of the foregoing solutions permit the designer of the processor to readily add such a high-performance Viterbi decode extension instruction to the ISA during the design phase, the resulting design being optimized according to one or more criteria such as power conservation, clock speed, and die size due to reduced memory overhead and limited hardware requirements to support the extension.

This patent is subject to a terminal disclaimer.

Method and apparatus for implementing decode operations in a data processor


Light from an object is converted by an imaging device into an electric signal carrying an object image. A video signal is generated by a video signal processor based on the electric signal. A human face is detected by a face detector if a human is contained in the image, based on the video signal. An on-screen signal is generated by an on-screen generator for either a first or a second menu window each for use in selection among imaging modes. The first and second windows are used when no face and the face is being detected, respectively. The on-screen signal is supplied to a screen which displays one of the windows. The generator is controlled by a controller based on information, supplied by the detector, indicating whether the face is contained in the image, so that the on-screen signal is generated for the first or the second window.

The present invention relates to an imaging apparatus equipped with multiple imaging modes, such as, imaging modes with preset aperture values and/or shutter speeds for particular scenes or imaging conditions and automatic imaging modes in which aperture values and/or shutter speeds are automatically set in accordance with surrounding brightness.
There are specific types of imaging apparatus, such as a video camera (camcorder) and a digital still camera, equipped with multiple imaging modes, thanks to advanced digital technology.
The imaging modes for such imaging apparatuses offer manual aperture-value and/or shutter-speed settings for particular scenes or imaging conditions, automatic aperture-value and/or shutter-speed settings in accordance with the surrounding brightness, etc.
Camera users can take higher quality images by selecting the best mode among those imaging modes.
Nevertheless, the imaging apparatuses with such multiple imaging modes require multiple procedures in selection of the best mode.
A technique to reduce the number of best-mode selection procedures is disclosed in Japanese Un-examined Patent Publication No. 2003-274268 (Document 1).
A new imaging mode introduced recently for imaging apparatuses is an automatic focusing mode in which a face is recognized when a target is a human, followed by automatic focusing onto the human face, disclosed in Japanese Un-examined Patent Publication No. 2006-145629 (Document 2). Such a human-face recognition technique would be provided for most imaging apparatuses.
In Document 1, the order of imaging modes in an imaging-mode menu window is switched based on the luminance and color of an image taken by an imaging apparatus and the time at the image is taken. Such mode-order switching allows a user to easily select an imaging mode, but requires specific procedures and signal processing circuitry for those conditions such as luminance and color of an image and an imaging time.


A lever device for lifting an object off the ground includes a lever member having a distal end that is positionable immediately adjacent a bottom end of the object. The lever device also includes a grip member that is operable with the lever member to lift the object off the ground. The grip member is adjustable relative to the lever member to accommodate a size of the object being lifted off the ground. The grip member includes a toothed or hooked end that grips an upper surface of the object to be lifted off the ground. The lever device further includes a handle that is graspable by a user to impart a lever force to the grip member and the lever member and thereby lift the object off the ground.

Log cants and log hooks have been used for a century or more for moving logs by rolling the logs with these devices. The original devices most often included a wooden handle and a pivoting, arcing hook on a distal end that was designed to swing into a log and pierce it. The handle was designed to be levered to move the log. At some point, a "T" shaped foot was added to the log cants, which allowed the log cants to lever an end of the log and raise it off the ground, typically between 4 and 12 inches. In the raised position the log could be easily cut with a chainsaw with little risk of the chainsaw's chain contacting the ground, which is beneficial in that the ground does not dull the chain and in that the process is safer since there is no concern for kickback of the chainsaw.
However, several problems exist with these existing devices. For example, the pivoting and arched shape hook of existing log cants is only useable for a certain range of log sizes, such as logs having a diameter of between 4 and 16 inches. Specifically, as the hook pivots, its sharp end is presented to the log at varying angles including many angles that are less than ideal. An ideal angle is one in which the hook functions to pierce into and grip the log surface. This gripping is necessary to enable a user to pivot and pry the log into the air with the handle. If the angle is somewhat negative, which is common as the diameter of the log increases, the hook begins to be presented to the log so that the hook no longer functions to self-engage the log surface and thus, the hook is essentially inoperable and no longer useable. Angles that are nearly perpendicular to a face of the log circumference or that are roughly 20 degrees of positive rake are effective to allow the hook to pierce into and grip the log surface. In some instances, an arch of the hook can bottom out on larger logs, which prevents the hook from even meeting the log and therefore the hook is prevented from gripping and engaging the log.
Another significant problem is that as logs get larger and heavier, they become more difficult to lever and in some instances, the lever force that is required to lift the log may be beyond the capability of the person that is trying to lift the log. In such instances, the log cant is entirely useless. This problem arises mainly due to the "T" shaped foot of existing cants that is spaced a significant distance from the center of gravity of the log, thereby creating a large moment of force at the handle where the user grips the hangle. This problem leads to broken wooden handles, bent metal handles, and the like. This problem also results in potential safety issues, such as strained arms, strained shoulders, strained backs, and the like.

Log lifter with improved leverage and adjustability


An apparatus and method are provided for improving perpendicular magnetic recording media. The present invention provides media, and a method of fabricating media in a cost-effective manner, with a reduced ruthenium (Ru) content interlayer structure, while meeting media performance requirements. A perpendicular magnetic recording medium is provided comprising a non-magnetic substrate having a surface, and a layer stack situated on the substrate surface. The layer stack comprises, in overlying sequence from the substrate surface a magnetically soft underlayer; an amorphous or crystalline, non-magnetic seed layer; an interlayer structure for crystallographically orienting a layer of a perpendicular magnetic recording material situated on the underlayer; and at least one crystallographically oriented, magnetically hard, perpendicular magnetic recording layer situated on the interlayer structure. The interlayer structure is a stacked structure comprising, in overlying sequence: a chromium alloy situated on the seed layer; and an upper interlayer situated on the chromium alloy.

Magnetic storage media, the storage of data on magnetized media, is widely used in various applications, particularly in the computer industry for data storage and retrieval applications, as well as for storage of audio and video signals. Disc drive memory systems store digital information that is recorded on concentric tracks on a magnetic disc medium. At least one disc is rotatably mounted on a spindle, and the information, which can be stored in the form of magnetic transitions within the discs, is accessed using read/write heads or transducers. A drive controller is typically used for controlling the disc drive system based on commands received from a host system. The drive controller controls the disc drive to store and retrieve information from the magnetic discs.
Magnetic thin-film media, wherein a fine grained polycrystalline magnetic alloy layer serves as the active recording medium layer, are generally classified as "longitudinal" or "perpendicular," depending on the orientation of the magnetization of the magnetic domains of the grains of the magnetic material. In longitudinal media (also often referred as "conventional" media), the magnetization in the bits is flipped between lying parallel and anti-parallel to the direction in which the head is moving relative to the disc. Perpendicular magnetic recording media are being developed for higher density recording as compared to longitudinal media. The thin-film perpendicular magnetic recording medium comprises a substrate and a magnetic layer having perpendicular magnetic anisotropy. In perpendicular media, the magnetization of the disc, instead of lying in the discs plane as it does in longitudinal recording, stands on end perpendicular to the plane of the disc. The bits are then represented as regions of upward or downward directed magnetization (corresponding to the 1's and 0's of the digital data).
Referring to the drawings wherein identical reference numerals denote the same elements throughout the various views, FIG. 1 illustrates a perspective view of a typical disc drive data storage system in which the present invention is useful, and also a disc recording medium and a cross section of a disc showing the difference between longitudinal and perpendicular magnetic recording. Although FIG. 1 shows one side of the disc, magnetic recording layers are usually sputter deposited on both sides of the non-magnetic aluminum substrate of FIG. 1. Also, although FIG. 1 shows an aluminum substrate, other embodiments include a substrate made of glass, glass-ceramic, aluminum/NiP, metal alloys, plastic/polymer material, ceramic, glass-polymer, composite materials or other non-magnetic materials.
While perpendicular media technology provides higher areal density capability over longitudinal media, granular perpendicular magnetic recording media is being developed for further extending the areal density as compared to conventional (non-granular) perpendicular magnetic recording, which is limited by the existence of strong lateral exchange coupling between magnetic grains. Granular structure provides better grain isolation through oxide segregation to grain boundary, hence enhancing grain to grain magnetic decoupling and increasing media signal to noise ratio (SNR).
A granular perpendicular magnetic layer contains magnetic columnar grains separated by grain boundaries comprising a dielectric material such as oxides, nitrides or carbides to decouple the magnetic grains. The grain boundaries, having a thickness of about 2 Å to about 30 Å, provide a substantial reduction in the magnetic interaction between the magnetic grains. In contrast to conventional perpendicular media, wherein the longitudinal magnetic layer is typically sputtered at low pressures and high temperatures in the presence of an inert gas, such as argon (Ar), deposition of the granular perpendicular magnetic layer is conducted at relatively high pressures and low temperatures and utilizes a reactive sputtering technique wherein oxygen (O2), CxHy, and/or nitrogen (N2) are introduced in a gas mixture of for example. Ar and O2, Ar and CxHy, Ar and N2, or Ar and O2, CxHy, and N2. Alternatively, oxide, carbide or nitrides may be introduced by utilizing a sputter target comprising oxides, carbides and/or nitrides which is sputtered in the presence of an inert gas (i.e., Ar), or, optionally, may be sputtered in the presence of a sputtering gas comprising O2, CxHy, and/or N2 with or without the presence of an inert gas. The introduction of O2, CxHy, and/or N2 reactive gases, and oxides, carbides, and/or nitrides inside targets provides oxides, carbides, and/or nitrides that migrate into the grain boundaries, thereby providing a granular perpendicular structure having a reduced lateral exchange coupling between grains.

Interlayer comprising chromium-containing alloy


A rotating preparatory abrasion roller finely abrades the surface of a web, which is to be a support of a lithographic plate, in preparatory abrading prior to main graining for graining the surface of the web. The preparatory abrasion roller, which is arranged against one surface of the running web, is pressed into an interval between a pair of supporting rollers, which are arranged at a predetermined interval against the other surface of the web. Consequently, the surface of the web is finely abraded in contact with a relatively large area on the surface of the preparatory abrasion roller in the state wherein the web laps with the part of the preparatory abrasion roller.

1. Field of the Invention
The present invention relates generally to a method for graining the surface of a metal support of a lithographic plate, and more particularly to a preparatory abrading method for the surface of the metal support.
2. Description of Related Art
The surface of a metal web to be a support of a lithographic plate such as a web of aluminum or an alloy of aluminum and zinc is grained so that a fine unevenness called grains can be formed thereon to thereby improve its performance for printing.
Examples of the method for graining the surface of the web are a mechanical graining method using a brush roller (e.g., Japanese Patent Publication No. 50-40047), an electrolytic graining method in which electrolysis is performed in an electrolytic solution, and a chemical graining method in which the web is dipped in a chemical solution.
If, however, the locally-uneven web is grained mechanically, electrolytically or chemically, the uneven part cannot be grained uniformly, which deteriorates the printing performance at the uneven part.
Conventionally, the above-mentioned problem is avoided by preparatory abrasion to the surface of the web with a nonwoven fabric prior to the above-mentioned main graining; however, lateral defects and longitudinal streaks are formed on the web in the conventional preparatory abrasion.

Preparatory abrading method for support of lithographic plate


There are disclosed devices and methods for protecting a user from a sharp tip of a medical needle. In an embodiment, a device includes a central body portion, a medical needle having a sharp tip, a pair of wings in attachment to the central body portion, and a mechanical fastener disposed on at least one of the wings, the mechanical fastener configured to selectively attach the wings together with the medical needle positioned between the wings so as to protect a user from the sharp tip of the medical needle. In another embodiment, a method includes withdrawing a sharp tip of a medical needle from a patient, closing a pair of wings with the medical needle positioned between the wings, and fastening the wings together with the medical needle positioned between the wings so as to protect a user from the sharp tip of the medical needle.

1. Field of the Invention
The present invention relates to a device, system and method for protecting a user from a sharp tip of a medical needle.
2. Description of the Related Art
Generally, Huber needles, subcutaneous needles, and other types of medical needles with sharp tips are inserted by medical workers for medical procedures into patients. These users typically have to carefully maintain the sharp tip during and after removal of the medical needle from the patient until the medical needle is properly disposed of in a biohazard container. As this sharp tip is contaminated with blood or other fluids from the patient, it is considered a significant hazard.
Due to difficulties with the patient, including both physical and mental issues, the carrier portion with the medical needle often is not handled with the degree of care necessary by the user. In contending with various patient issues, a user may become injured by the sharp tip of the needle. FIG. 1 illustrates an example of a device 100 having a sharp tip 102 at the end of a medical needle 104 between a pair of wings 106, 108. Wings 106, 108 are positioned to allow placement of needle 104 into a patient, and to assist with removal of needle 104 from the patient. However, wings 106, 108 provide little, if any, protection to a user from needle 104 during or after removal from the patient.
Various safety devices have been used as an attempt to ameliorate the danger of the medical needle. However, the currently known safety devices are generally not designed to meet clinical protocols and are difficult to use with other devices. Current devices tend to have a profile which will extend away from a patient's body.

Devices and methods for protecting a user from a sharp tip of a medical needle


A memory controller includes a first error detection code generator for generating a first error detection code for data received from a host, a controller to write the data and the first error detection code to nonvolatile memory and to read the data and the first error detection code from the nonvolatile memory, an error detector to perform an error detection based on the data and the first error detection code that are read from the nonvolatile memory, a second error detection code generator to generate a second detection error code based on the data read from the nonvolatile memory, and a mismatch code generator to generate a mismatch code signaling the presence of an error in the data, wherein either the second error detection code or the mismatch code is selected based on the error detection and sent to the host.

Recent advances in semiconductor memory devices, including consumer-oriented data storage devices such as SSD (Solid State Drive), etc. that use nonvolatile semiconductor memory, have highlighted the need for error detection and correction, where the error may be caused by a cosmic ray and the like.
Error checking and correction (ECC) has conventionally been used in NAND flash memory chips. However, with ECC methods, a path from input of data from a host to the generation of the ECC code is not protected. Hence when errors occur as data is transmitted through the unprotected section, they are not detected and the data storage device ends up storing bad data with no error indication.

Memory controller, data storage device, and memory controlling method


An electric fishing reel has a power transmission mechanism for transmitting rotational driving force based on a drive motor and a manual handle to a spool; and a clutch mechanism for switching the power transmission mechanism between a power transmitting state and a power cutoff state. The power transmission mechanism includes a planetary gear mechanism disposed on the drive motor; a first rotor with which the planetary gear mesh; a second rotor which is driven and coupled to the first rotor through a belt; and a clutch actuating member fitted and rotationally locked in the second rotor to be movable in an axial direction and is moved in the axial direction. An engaging portion of the clutch actuating member is capable of switching the power transmission mechanism between a power transmitting state and a power cutoff state by engaging with or disengaging from a retaining portion of the spool.

The present invention relates to an electric fishing reel of a manual/electric compatible type which has a drive motor for rotationally driving a spool supported rotatably on a reel body and which winds and drives a spool by the rotative operation of a manual handle provided on one side of the reel body.
Typically, an electric fishing reel is so constructed as to transmit the rotational driving force of a drive motor provided on a reel body to a spool through a planetary gear mechanism (reduction gear mechanism). Generally, a clutch mechanism for changing over the spool between a fishing line winding state and a fishing line releasing state (spool free state) is disposed in the power transmission route. In addition, the reel body is provided with a manual handle to allow not only the electrically powered driving using the drive motor but the winding drive of the spool by manual operation. The winding driving force applied by the manual handle is adapted to be transmitted to the spool through the clutch mechanism provided in the power transmission route.
In the electric fishing reel, since a planetary gear mechanism having planetary gears is interposed in the power transmission route of the spool, even if the clutch mechanism is switched over (clutch OFF) to the fishing line releasing state (spool free state), some gears of such as the planetary gears are rotated together with the spool in an interlocked manner, so that the rolling frictional resistance due to the meshing of gears is generated, resulting in inferior freely reeling-out performance. Hence, a problem remains that the fishing line with the terminal tackle cannot be reeled out speedily.
Accordingly, to overcome such a problem, JP-A-2002-145 discloses an electric fishing reel in which a drive coupling mechanism of a drive motor is interposed serially in a drive coupling mechanism from the manual handle to the spool, and the coupling between the manual handle coupling mechanism and the spool is cut off to reduce the rolling frictional resistance of the spool.
The clutch mechanism of the electric fishing reel disclosed in the above-described JP-A-2002-145 is adapted to axially move a power transmission gear provided on a spool shaft by operating a switching member (clutch lever) provided on the reel body. Namely, a retaining portion having a noncircular cross section is formed on the spool side of the power transmission gear, and the operation of the switching member causes the power transmission gear to slide in the axial direction, whereby the retaining portion of the power transmission gear is engaged with or disengaged from an engaging portion provided on the spool or a spool shaft integral with the spool, so as to switch between the power transmitting state (fishing line winding state) and the power cutoff state (fishing line reeling-out state).
However, the above-described power transmission gear is in a state of meshing with the gear for transmitting the rotational driving force from the handle side (drive motor side), and is adapted to move the power transmission gear in the axial direction with the gears meshing each other. Therefore, there are problems in that damage is possibly caused to the power transmission gear, and the meshing driving noise becomes large.
In addition, since terminal tackle including a sinker having some weight is attached to a fishing line, the load in the rotating direction on the mutually meshing gears becomes disadvantageously large, so that it becomes difficult to switch the clutch from ON to OFF. Particularly in the meshing between gears, it is desirable to use helical gears whose contact ratio is high, whose meshing performance is excellent, and which produce small meshing driving noise. However, if consideration is given to the ease of disengaging the clutch (ease in axial movement of the power transmission gear), the helical gears cannot be used. In this case, even if helical gears are used, if satisfactory clutch operability is taken into consideration, the helix angle of the tooth trace cannot be made large, so that there is a limit to the improvement of the meshing performance.


Systems and methods are presented for providing collaborative editing. An embodiment collaboratively edits a computer file using a plurality of computers in a network, where the computers are connected using a token ring, each of the computers has a local copy, and a first computer has edited its local copy and performs the method. A token circulating around the token ring is captured, and a location of the edited portion of the local copy of the file is determined. The location is broadcast to the other computers. Conflicts are received from the other computers, and the conflicts from the other computers are reconciled with the edited portion of the local copy of the file to provide reconciled edits to the file. The local copy of the file is updated with the reconciled edits. A data packet with the reconciled edits is created and transmitted around the token ring.

A collaborative editor is a software application that allows several people using different computers to edit a computer file. Collaborative editors include both real-time and non-real-time editors. Real-time collaborative editors allow users to edit the same file at the same time. A challenge encountered in providing real-time collaborative editing is the coordination of edits from remote users. These remote edits may conflict with the user's own local edits and are originally created in versions of the file that never existed locally.
Another challenge with collaborative editors is to reduce or minimize the network traffic attributed to edit updates sent to the other computers involved with the collaborative editing. This is a particular challenge for real-time collaborative editors that broadcast their updates to all the other computers. For example, Nbrain, Inc. has implemented a real-time collaborative editor which uses a broadcast-based update of the files, in which all computers broadcast their changes to all other computers. These broadcasts are collated by each local copy of the real-time collaborative editor and the files are kept synchronized across all the computers. Though this architecture may work for a small number of users, it will not scale well for medium to large number of users because the number of transmissions required by this architecture is an order of n*n where 'n' is the number of computers involved in the real-time collaborative editing. Current real-time collaborative editors are tied to a particular file type for editing (for example, the editors can edit only text files).

Systems and methods for providing collaborative editing