Described are systems and methods that utilize nodes distributed at different geographic locations to detect and track the approximate position, trajectory, and/or predicted path of aerial vehicles operating below a defined altitude (e.g., 500 feet). As nodes detect an aerial vehicle, the node determines a bearing toward the aerial vehicle and provides the bearing to an air-traffic system. The air-traffic system processes bearings received from each node and determines one or more of an approximate position, trajectory, and/or predicted path of the detected aerial vehicle. The approximate position, trajectory, and/or predicted path may be provided to one or more subscribing clients and/or used to alter paths of one or more aerial vehicles.

Many aerial vehicles, such as unmanned aerial vehicles, helicopters, Cessna airplanes, etc., operating at lower altitudes (e.g., below 500 feet) do not transmit any identifying information that can be used to determine the position, trajectory, and/or path of the vehicle, referred to herein as non-reporting aerial vehicles. For controlled airspaces, such as airports, aerial vehicles entering the space are tracked using radar. However, there currently exists no solution to track or locate non-reporting aerial vehicles outside of a controlled airspace.


An oil-in-water emulsion useful as a delivery vehicle of hydrophobic ingredients such as pharmaceutical drugs and cosmetic active agent; wherein the emulsion particles have a net positive charge (i.e. a positive zeta potential).

In recent years, oil-in-water type emulsions, in particularly such in which the droplets are of a submicron size (hereinafter "submicron emulsions") gained increasing importance as vehicles for delivery of hydrophobic drugs. Formulations of submicron emulsions reported in the literature to date were usually based on a combination of lecithins which are mixtures of phospholipids of various compositions obtained from natural sources, non-ionic or ionic surfactants and of oil such as vegetable oil. Lecithins generally comprise phosphatidylcholine as the major component, which is a zwitterion that is neutral over a wide pH range, and negatively charged phospholipids such as phosphatidylethanolamine, phosphatidylserine and phosphatidic acid. As a consequence of their composition, the colloid particles in all emulsions available to date were negatively charged.
In order to increase stability of emulsions it was generally accepted that the charge of the colloid particles, or the so called "zeta potential", should be made as negative as possible, e.g. by the addition of various non-ionic or also negatively charged surfactants. However, negatively charged particles have a tendency of absorption of cations such as sodium and calcium ions which are present in all physiological fluids. Such absorption decreases the net surface charge of the particles and may eventually cause the breakdown of the droplets and the coalesence of small droplets to form larger ones. For the long term stability of such emulsions it was always necessary to prepare them with deionized water. A further problem of such emulsions resides in that the surface of biological membranes is generally negatively charged and there is thus an electrostatic repulsion between such membranes and the negatively charged colloid particles of the emulsion. This is at times a serious drawback for various applications.
Thus, against the very high potential of emulsions, and in particularly submicron emulsions, as drug delivery of vehicles, there are the above noted drawbacks.
European Patent Application 372331 discloses oil-in-water type emulsions, for parenteral administration which contain phospholipids as emulsifiers and being characterized in that they comprise physiologically acceptable concentrations of non-toxic divalent or trivalent metal cations so that the zeta potential is in the range of (+)8-20 millivolts. As disclosed in this patent application, the emulsions are not destabilized by the addition of electrolytes and are useful for making a total nutrient, electrolyte-containing parenteral feeding systems. These nutritional emulsions, however, are not suitable as drug delivery systems of hydrophobic drugs since they are sensitive to the incorporation of drugs to their inner oil phase which causes a phase separation. Furthermore, upon introduction of the emulsions into a physiological fluid, introduction of the emulsions into a physiological fluid, e.g. blood, the concentration of the divalent and the trivalent cations immediately decreases as a result dilution and of the very strong buffering potential of physiological fluids and accordingly the particles are likely to break down. Such breakdown may be of little consequence where the emulsion is used for the purpose of nutrition but it renders such emulsions unsuitable for use as drug delivery vehicles.
It is an object of the present invention to provide novel oil-in-water type emulsions useful as drug delivery vehicles which overcome some of the above noted drawbacks of the prior art.
It is a further object of the present invention to provide novel oil-in-water type emulsions wherein the colloid particles are positively charged as a result of the combined properties of the surface active substances, i.e. without the need to add cations.

Oil-in-water emulsions of positively charged particles

Yisum Research Development Company of the Hebrew University of Jerusalem


A vehicle front section structure includes a front side member that is formed with a front flange at a vehicle front-rear direction front end; a crash box that is joined to the front flange at a rear flange formed at a vehicle front-rear direction rear end; and a coupling member that is joined to a fender apron section at a vehicle rear end. The coupling member includes a joining plate formed at a vehicle front end side joined to the front flange in an interposed state between the front flange and the rear flange, with a front end side of a portion of the coupling member positioned at a vehicle width direction outer side of the front side member angled such that in plan view a rear side is separated further to the vehicle width direction outer side from the front side member than the vehicle front side.

A structure is known in which a vehicle front end of a pipe member fixed to a vehicle rear end of an upper member running along an upper edge of a fender apron is fixed to a lower member in a state passing through a front side frame (see, for example, Japanese Patent Application Laid-Open (JP-A) No. 2009-171032). A structure is also known in which a coupling member is attached to a front end portion of apron reinforcement, and a face portion attached to a front end of the coupling member is fastened between a front side frame and a crash can (see, for example, JP-A No. 2005-231435).


A glide assembly is adapted to be mounted to the free end of a leg of a piece of furniture. The glide assembly includes a body defining an exterior and a bore extending partially through the body to define a hollow interior surface and an open end of the body. An insert is removably mountable about the free end of the leg and adapted to be received through the open end and within the bore of the body so as to fixedly secure the body about the free end of the leg.

1. Field of the Invention
The present invention relates, generally, to a glide that is mountable to a leg of a piece of furniture and, in particular, to a glide assembly fixedly securable about a leg of a chair or desk.
2. Description of the Related Art
The free end of each leg of a piece of furniture often includes a cap, foot, or glide to allow easy sliding of the piece of furniture over the surface on which it is supported, such as a floor. More specifically, the feet of desks or chairs are designed to increase the amount of surface-area contact and reduce the amount of frictional contact between the legs and the floor.
One type of foot commonly employed in the related art generally includes an attachment portion and a gliding portion. The attachment portion is adapted to be securely attached to the free end of a leg, and the gliding portion is operatively connected to the end of the attachment portion opposite the leg. The gliding portion has a flat surface made of a hard, durable material, such as metal or nylon, and adapted to be in operative contact with the floor.
However, this type of foot suffers from the disadvantage that when the chair or desk is moved along the floor, frictional contact between the foot and the floor produces a perceptible noise. In a classroom setting, especially in an elementary school where many relatively young students can be moving or "scooting" their respective chairs and desks at any one time, this noise can be multiplied to a very significant level. Also, this type of foot suffers from the disadvantage that the flat surface collects sand, dirt, and other debris. Furthermore, this type of foot suffers from the disadvantage that the flat surface can produce rust marks on the floor. In addition, a tool is often required to attach/remove this type of foot to/from the leg. Moreover, this type of foot suffers from the disadvantage that the angle at which the flat surface of the gliding portion operatively contacts the floor may be different from chair to chair, for instance, depending upon the relationship of each leg of the chair with the floor. As such, only a portion of the flat surface may actually operatively contact the floor.
To overcome these disadvantages in the related art, educators and maintenance personnel have sometimes employed tennis balls as makeshift glides for the legs of chairs and desks. An open-ended hole is cut in a tennis ball to accommodate the free end of a leg. While ingenious, this approach has been deemed objectionable as unsightly and unprofessional. Also, this type and other similarly shaped types of glide suffer from the disadvantage that they are not fixedly secured to the free end of the leg. As a result, when the chair or desk is moved along the floor, the amount of frictional contact between the glide and the free end may not be sufficient to retain the glide in place about the free end. In fact, as the chair or desk is moved, the glide can slide down the free end of the leg such that the glide can even slide off the leg. Furthermore, in a classroom setting, especially in an elementary school, the relatively young students can manually remove the glides. In either event, at least one missing glide from a chair or desk can cause the respective chair or desk to wobble and, thus, be functionally inferior. In addition, glides of any type made of a hard, durable rubber can grind into and, thus, mar the floor over which the chair or desk is slid.
Thus, there is a need in the related art for a glide that can be fixedly secured to the free end of a leg of a piece of furniture such that it can be retained about the leg when the piece of furniture is moved along a floor while maintaining sufficient contact with the floor. Similarly, there remains a need in the art for a glide that cannot be manually removed from the leg by relatively young students in a classroom setting, especially in an elementary school. There is also a need in the related art for a glide that does not mar the floor or produce a perceptible noise or rust marks on the floor when the piece of furniture is moved along the floor. There is also a need in the related art for a glide that does not require a tool to securely fasten the glide to the leg. There is also a need in the related art for a glide that is not unsightly and unprofessional.


In a method for estimating a parameter based on signals received from redundant sensors, at least a first sensed signal and a second sensed signal are received from at least corresponding first and second redundant sensors. The first sensed signal and the second sensed signal are indicative of the parameter, wherein the first sensed signal has associated therewith a first accuracy, wherein the second sensed signal has associated therewith a second accuracy. At least a reference signal indicative of the parameter is received, wherein the reference signal has associated therewith a reference accuracy. A weighting is determined based on at least the first sensed signal, the second sensed signal, and based on at least one of the first accuracy, the second accuracy, and the reference accuracy.

Many systems employ redundancy to preserve system functionality should a particular component fail. Often however, redundancy by itself is not sufficient, and the system must have the ability to "detect" (e.g., recognize the occurrence of), "isolate" (e.g., identify the source of), and "accommodate" (e.g., respond to, the failure (fault)). For some faults, detection and isolation are one and the same. For example, a processor can fail a memory check, and a servo valve can reveal a short or open via a current check.
Some other categories of faults, however, are more difficult to detect, isolate, and accommodate. For example, modern gas turbine aircraft engines are frequently equipped with a pair of sensors (transducers) for each parameter (e.g., temperature) to be measured. Each sensor produces a signal indicative of the value of the sensed parameter. Due to measurement inaccuracies, the indicated value can deviate from the true (actual) value of the parameter. The amount of this deviation (error) depends in part on the condition, i.e. state or health, of the sensor. If the sensed values for a parameter agree, i.e. are relatively close to one another, then it is generally assumed that both sensors are healthy, and either one may be used as an estimate of the actual value. Alternatively, an estimate may be produced by averaging the two values. However, if the sensed values do not agree, one or both sensors may have failed. To produce the best estimate of the actual value of the parameter, it is desirable to detect and isolate a fault. Some sensor faults can be detected and isolated by comparing each sensor signal to an expected range and an expected rate of change.
Various other approaches for detecting, isolating, and accommodating sensor faults presently exist. One such approach uses knowledge of the most likely failure modes for that type of sensor and attempts to determine whether one sensor is more likely than the other to have failed.
Another approach compares the potential consequences of selecting each one of the sensor magnitudes as the estimate of the actual magnitude, should the selected sensor be the erroneous one. The sensor magnitude having the least hazardous potential consequences is selected, i.e. select "safe". For example, the consequences of picking an erroneously low magnitude engine speed signal may include catastrophically overspeeding the engine. The consequences of picking an erroneously high magnitude signal are usually limited to an engine performance loss due to unnecessarily limiting engine speed. By this logic, the obvious choice for a select "safe" strategy is to choose the high signal.
Yet another approach incorporates a model that provides an analytical third sensor to help detect and isolate sensor faults. For example, real-time engine models are available that are suitable for incorporation in the engine control system's embedded software. (See Kerr, L. J., Nemec T. S., and Gallops G. W., 1992, "Real-time Estimation of Gas Turbine Engine Damage Using a Control Based Kalman Filter Algorithm," Journal of Engineering for Gas Turbines and Power, vol. 114, no. 2, pp. 187–195). The actual value of the parameter may be estimated, for example, by determining the mean or the median of the three sensors.
Additionally, the actual value may be estimated using a parity space method that examines the relative differences between each of the three sensed magnitudes. (See Patton, R. J., and Chen, J., 1992, "Review Of Parity Space Approaches To Fault Diagnosis Applicable To Aerospace Systems," Proc. AIAA Guidance, Navigation And Control Conference, AIAA-92-4538). In a traditional parity space implementation, however, the system compares the relative difference information to a fault threshold and characterizes the health of each sensor as either valid or faulty. Thus, if one sensor disagrees with the others, but the relative differences do not exceed the fault threshold, the sensor is considered valid. On the other hand, if the relative differences become large enough that the fault threshold is exceeded, the sensor is considered faulty. Sensors characterized as valid are used to estimate the actual magnitude of the parameter. Sensors characterized as faulty are not used in the estimation.
U.S. Pat. No. 6,073,262 to Larkin et al. describes an example system that uses fuzzy logic to generate an estimate of a value of a parameter based on three redundant signals, with one of the redundant signals being, for example, an output of a model. The system generates three difference signals corresponding to the differences between each pair of the three redundant signals. Then, the three difference signals are converted to three corresponding "fuzzy" inputs based on a plurality of fuzzy membership functions. Next, each fuzzy logic rule of a plurality of fuzzy logic rules is evaluated, based on the fuzzy inputs, to generate a rule output value. Additionally, for each fuzzy logic rule, a degree of fulfillment of the fuzzy logic rule is generated. Finally, the plurality of rule output values and the plurality of degrees of fulfillment are used to generate an estimate of the value of the parameter.

Method and apparatus for estimating a parameter based on a plurality of redundant signals


A thermoplastic resin composition for casting high-voltage coils containing two kinds of fillers (A) and (B), and products as molded coils and panels obtained by casting and curing the composition.. The composition of the present invention contains 60%-85% by weight, based on the total weight of the composition, of a silica type filler which is an admixture (A) a spherical silica having an average particle diameter of 0.1-0.9 .mu.m and (B) a ground silica having an average particle diameter of 3-9 .mu., the ratio A/(A+B) being 1%-7% by weight.. Products as molded coils and panels prepared by using the composition have good resistance to cracking and resistance to moisture.

1. Field of the Invention
The present invention relates to a thermosetting resin composition for casting high-voltage coils having good moisture resistance, and to coils and panels formed by casting and curing the resin composition. In more particular, it relates to a thermosetting resin composition for casting high-voltage coils which has a low viscosity and good workability at the time of casting, little of voids and, after cured, develops no cracks when subjected to a heat cycle of from -30.degree. C. to 90.degree. C. and does not decrease its strength and electrical performance characteristic to half even after the lapse of 15 years or more in high humidity atmosphere, and to molded coils and panels formed by casting and curing the resin composition.
2. Description of the Related Art
In recent years, many of the high-voltage coils have come to be operated in high humidity atmospheres such as those in tunnels and underground rooms. In the Yamanashi new test line for magnetic levitation system railway, for example, 80% or more of the ground coils are laid in tunnels of humidities of 90% or more and needed to secure the reliability in mechanical strength and electrical characteristics. The same applies also to transformers installed in tunnels for tunnelling work.
In keeping with the above trend, the insulation technology for such high-voltage coils is making marked progress. In particular, the solventless thermosetting resin casting method has rapidly developed, by virtue of its high electrical reliability, good heat dissipation and excellent moisture resistance, in the field of the manufacture of high-voltage coils used in severe conditions, such as those for direct current motors for vehicles, direct current motors for general industries, transformers, ground coils for magnetic levitation system rail-ways, etc.
Requisites for the aforementioned solventless thermosetting resin composition are as follows. (1) It should have a low viscosity so as to permit easy coil casting. In more particular, it should have a viscosity of 50 poises or less at the casting temperature in the case of vacuum or atmospheric pressure casting and a viscosity of 300 poises or less at the casting temperature in the case of pressure gelation casting. (2) It should have a long pot life. (3) It should no evolve volatile matters so that no void is developed in the course of heat curing. (4) It should exhibit goo electrical and mechanical properties when cured. Solventless thermosetting resin compositions for casting which were in general use as satisfying the above requisites are carboxylic acid anhydride-curing epoxy resin compositions having a low viscosity and filled with fused or crystalline silica having good electrical properties.
High-voltage coils operated in tunnels, underground rooms, etc. are exposed to high humidity
atmosphere of 90% or more humidity over a long period while being subjected to a heavy mechanical or electric load. The cured product of the prior carboxylic acid anhydride-curing epoxy resin composition filled with fused or crystalline silica undergoes rapid deterioration of mechanical and electrical properties when it is in a state wetted by absorption of moisture or water. When a heavy load is mechanically or electrically applied in such a state, the system fails.
Molded coils formed by winding a conductor and casting and curing a thermosetting resin composition for casting high-voltage coils are apt to develop cracks in the insulating layer during the manufacture of the coils or when the coils are subjected to a heat cycle unless the thermal expansion coefficient of the cured product of the resin composition is adjusted to (the thermal expansion coefficient of the conductor .+-.0.2).times.10.sup.-5 deg.sup.-1, as described in Japanese Patent Kokai (Laid Open) Nos. 62-224009 and 2-32508. Therefore, it is necessary for avoiding the development of the cracks to match the thermal expansion coefficient of the insulating layer with that of the conductor, which has a low thermal expansion coefficient. It was found that when the proportion of the filler in the carboxylic acid anhydride-curing epoxy resin composition filled with fused or crystalline silica mentioned above was increased in order to lower the thermal expansion coefficient of the insulating layer, the cured product of the resin composition decreased its strength to half in from 1 to 3 years when exposed to high humidity atmosphere while being subjected to a heavy mechanical or electrical load. Therefore, the development of a resin composition for casting high-voltage coils with high moisture resistance has been eagerly desired.
Careful investigations of the cause of the aforementioned poor moisture resistance of the cured product of the carboxylic acid anhydride-curing epoxy resin composition filled with fused or crystalline silica have revealed the following.
(1) Penetration of water occurs mainly from the interface between the filler and the cured resin. Since a large amount of filler is contained, there is a high possibility of the filler particles striking one another, and the paths of water penetration tend to be readily connected. PA1 (2) Since a large amount of filler is contained, the viscosity of the resin composition at the time of casting operation becomes high, which tends to develop voids. Water tends to stay in the voids and cause the deterioration of the resin composition. PA1 (1) The shrinkage in curing is reduced, resulting in a low stress developed in curing. PA1 (2) The thermal expansion coefficient becomes lower and approaches to that of the coil conductor, so that a lower thermal stress is developed. PA1 (3) The heat conductivity is increased and resultantly the heat dissipation is improved and the temperature distribution becomes more uniform. Consequently, the thermal stress is reduced and the temperature rise is reduced. PA1 (4) Since the filler is less expensive than resin itself, the cost can be reduced. Thus, the addition of a filler lowers the cost, reduces the thermal stress developed at the time of coil manufacture and in the heat cycle, and enhances the reliability of the coil. Therefore, the addition of a filler is indispensable. It is needless to say that the filler itself must have a good moisture resistance. PA1 (1) The viscosity is increased to make casting more difficult. PA1 (2) Development of cracks and permeation of water becomes more apt to occur from the interface of the filler and the resin. PA1 (3) The cured resin becomes more rigid and brittle. PA1 (4) Since the filler is heavier than the base resin, sedimentation of the filler takes place during curing, resulting in nonuniformity of the insulating layer. Therefore, fillers must be used in due consideration of these factors. PA1 .alpha..sub.2 : thermal expansion coefficient of matrix resin PA1 .nu..sub.1 : Poisson's ratio of filler PA1 .nu..sub.2 : Poisson's ratio of matrix resin PA1 .gamma.: correction factor for geometry PA1 E.sub.1 : modulus of elasticity of filler PA1 E.sub.2 : modulus of elasticity of matrix resin. PA1 R(Dp): cumulative percentage by weight from the maximum particle diameter to particle diameter Dp, PA1 Dp: particle diameter, PA1 b and n: constants.
If the proportion of the filler added is reduced, the viscosity at the time of casting is lowered to reduce the void formation and, at the same time, the possibility of the filler particles striking one another becomes low. Thus, the improvement of the moisture resistance is possible. In this case, however, another problem arises in that since the thermal expansion coefficient of the insulating layer becomes high, cracks will develop in the insulating layer at the time of coil manufacture or when the coil is subjected to a heat cycle of from -30.degree. C. to 90.degree. C. At the same time, since the heat conductivity becomes low, the heat distribution in the layer becomes not uniform, which tends to develop thermal stress. Further, the heat generated during electricity application can be dissipated with more difficulty and stays inside the layer to raise the temperature, causing the deterioration of the resin composition.
Further, even if a coil which can endure a heat cycle of from -30.degree. C. to 90.degree. C. can be successfully manufactured, the following problem must be solved. In the case of a driving coil for a linear motor car, for example, previously the whole of the coil manufactured was firmly fixed with bolts, spacers and the like or embedded directly into concrete to oppose the electromagnetic force. In such cases, cracks were apt to develop in the coil or concrete owing to the thermal stress caused at the time of heat cycle of -30.degree. C. to 90.degree. C. Further, the fixed parts tended to loosen or undergo creep fracture. Thus, the system was lacking in reliability.
In view of the aforementioned situations, the object of the present invention is to provide a thermosetting resin composition for casting high-voltage coils of good moisture resistance which has a low viscosity and good workability at the time of casting operation and, after curing, gives little of voids in the cured product, develops no cracks even when subjected to a heat cycle of from -30.degree. C. to 90.degree. C. and does not decrease its strength and electric performance characteristic to half even after exposed to high humidity atmosphere of 90% or more humidity over 15 years or more while being subjected to a heavy mechanical or electrical load, and also molded coils and panels formed by casting and curing the resin composition.

Thermosetting resin composition for casting high-voltage coil, and molded coil and panel formed by casting and curing the composition


A phase retarder and a process for producing the same are disclosed. The phase retarder is obtained by shrinking a uniaxially stretched thermoplastic high polymer film in the direction perpendicular to the stretching direction at a lengthwise shrink of at least 2%. The phase retarder has a ratio of a retardation value (R.sub.30) measured on the phase retarder being inclined at a angle of 30.degree. with respect to the orientation axis as an axis of rotation to a retardation value (R.sub.0) measured on the phase retarder being held horizontally, each measured with a polarizing microscope, (R.sub.30 /R.sub.0) of not more than 1.10, and preferably not more than 1.07. A liquid crystal display fitted with the phase retarder exhibits broad viewing angle characteristics while achieving a satisfactory B/W display level.

A phase retarder comprising a uniaxially oriented high polymer film has been used in liquid crystal displays and chiefly in an STN type liquid crystal display in which nematic liquid crystal molecules are twisted at an angle of 180.degree. or more as an optical compensator for improving display quality.
Liquid crystal displays using conventional phase retarders, although providing a relatively satisfactory black-and-white display (hereinafter referred to as "B/W display"), have a disadvantage of a narrow viewing angle.

Phase retarder and process for producing the same


The furring tape is a nominal 1" to 2" wide by 0.005" to 0.100" thick strip of plastic tape with a peel and stick adhesive on one face of the strip. The strip is adhered to drywall to grip staples used to secure ceiling tiles to the drywall.

1. Field of the Invention
The invention is directed to a method of installing panels with a tape structure, particularly for fastening panels, particular ceiling panels to a drywall surface with fastening means, particularly staples.
2. Description of the Prior Art
With drywall surfaces, wood furring strips are normally fastened to the drywall surface by nails that pierce the drywall to contact the studs or joists therebehind. Adhesive can be used to hold the wood furring strips to the drywall or adhesive can be used to directly fasten the ceiling panels to the drywall. When wood furring strips are used, staples normally fasten the ceiling panels to the furring strips.
The furring tape herein eliminates the cutting and nailing of wood furring strips or the mess of placing adhesive to the back of ceiling panels at the job site.

Method of installing panels with furring tape and the resulting paneled surface


A communication terminal having a secondary battery and configured to control charge of the secondary battery, a charge control program, and a charge control method of the communication terminal are provided. The communication terminal includes a first detection unit configured to detect a temperature, a second detection unit configured to detect a transmission power of an electric wave, a charge unit configured to perform intermittent charge to the secondary battery, and a change unit configured to change a duty ratio of the intermittent charge by the charge unit based on the temperature detected by the first detection unit and the transmission power detected by the second detection unit.

1. Field of the Invention
The present invention relates to a communication terminal, a charge control program and a charge control method, and more particularly, to a communication terminal which is operated by a secondary battery, a charge control program and a charge control method of the communication terminal.
2. Description of the Related Art
JP 2005-333794 A describes an example of a communication terminal which is operated by a secondary battery. In this communication terminal, when a wireless unit becomes at a communication state during charge of a battery pack, a mobile communication terminal makes a current value of a charging current smaller, compared to a case where the wireless unit is not at the communication state. At this time, when a temperature is below a threshold, the mobile communication terminal does not change the current value of the charging current even when the communication state is made during the charge.

Communication terminal, charge control program and charge control method


A cab sliding device of an industrial machine, in which a slide base can be inserted into and withdrawn from rails from above the rails, whereby the number of man-hours for assembly can be decreased, and the ease of maintenance can be increased, is provided. For this purpose, in an industrial machine having a cab (11) slidably installed via a slide base (20) on a pair of rails (10) laid on a frame (4), the rails are nearly channel-shaped in cross section, and are provided to have concave space portions (10a) opposed to each other, the slide base has a plurality of rollers (21) annexed to opposite side surface portions thereof, the rollers being rollable inside the concave space portions of the rails, upper surfaces of the rails are provided with openings (12) which permit incoming and outgoing of the roller portions, and the slide base can be inserted into and withdrawn from the rails via the openings from above the rails.

In a heavy duty cargo handling vehicle, such as a reach stacker, a cab is generally installed on a frame so as to be slidable in a lateral direction or a longitudinal direction in order to ensure visibility. In this case, the cab is secured onto a slide base, and a pair of rails of nearly channel-shaped cross section are laid on the frame, with concave space portions of the rails being opposed to each other. A plurality of rollers annexed to opposite side surface portions of the slide base are provided so as to be rollable inside the concave space portions of these rails.

Cab sliding device of industrial machine


An apparatus comprising a latch body and a plurality of locking mechanisms. The latch body has a plurality of channels that extend through the latch body. The plurality of locking mechanisms is housed within the latch body. A locking mechanism in the plurality of locking mechanisms comprises a plate and a spring mechanism. The plate has an opening positioned relative to a corresponding channel in the plurality of channels. The spring mechanism is configured to hold the plate in a locked position within the latch body.

1. Field
The present disclosure relates generally to a latch and, in particular, to a latch for joining panels without using any additional tools. Still more particularly, the present disclosure relates to a latch that allows two panels to be joined and the width of the gap formed between the two panels to be adjusted.
2. Background
Typically, the sidewalls of an aircraft interior are formed by installing panels that are joined together using mechanical fasteners. These panels may be referred to as, for example, "wall panels" or "sidewall panels". With some currently available techniques for joining panels, a bracket having multiple slots is used to join two panels together. Each of these slots has an elongate shape such as, for example, an oval shape. A nut plate is located within each of these slots and is allowed to move freely within the corresponding slot of the bracket. Each of the nut plates is configured to receive the threaded end of a screw.
These screws are used to fasten the panels to the bracket. In particular, each panel may have an attachment feature, such as, for example, without limitation, a loop, configured to receive the threaded end of a screw. When the bracket and the nut plates located in the slots of the bracket are positioned relative to the panels, screws are driven through the loops and into the nut plates to fasten the panels to the bracket. In this manner, the two panels are joined together by the bracket.
However, joining panels using these types of brackets, nut plates, and screws may take more time and/or effort than desired. Additionally, tools may be needed to drive the screws into the nut plates. For example, screwdrivers, screw guns, and/or other types of tools may be needed.
Further, with these types of currently available techniques, the panels may be joined outside of selected tolerances. In particular, the width of the gap formed between the panels after the panels are joined together may be greater than desired. Consequently, the installation of these panels may need to be reworked multiple times to achieve an installation of panels that are within selected tolerances. This reworking may take more time and/or effort than desired. Further, the reworking may be more expensive than desired. Therefore, it would be desirable to have a method and apparatus that takes into account at least some of the issues discussed above, as well as other possible issues.

Latch with a built-in adjustment mechanism


An electronic device includes a display unit configured to display characters, a contact detection unit configured to detect a contact, a tactile sensation providing unit configured to provide a tactile sensation to an object contacting the contact detection unit, and a control unit configured to control such that predetermined characters are displayed as turned characters on the display unit, wherein the control unit, when the contact detection unit detects the contact at a position corresponding to the turned characters displayed on the display unit, controls the tactile sensation providing unit such that a tactile sensation associated with the characters corresponding to the turned characters is provided to the object.

Lately, the electronic devices having the contact detection unit such as a touch sensor have been increasingly used for mobile terminals such as mobile phones. As a method to detect a contact by an operator, there are known variety of types, such as a resistive film type, a capacitive type, an optical type and the like. Those types detect the contact by a contact object such as an operator's finger, a stylus pen and the like.
As the electronic device having the contact detection unit, a touch panel having the contact detection unit and a display unit laminated to each other has been known. In the touch panel, the display unit is disposed on a rear face of the contact detection unit and displays graphical images of characters and images of buttons and the like (hereinafter, referred to as objects). When the operator presses the object displayed on the display unit, the contact detection unit detects a contact at a pushed position. A technique to provide a tactile sensation to the operator in response to pressing with a predetermined pressure load or higher has also been known.
Incidentally, some of the electronic devices display turned characters of authentication information input by the operator in user authentication. In this case, since the characters of the authentication information displayed are turned, the characters are not exposed to people around the operator and advantageous from a security standpoint. It has also been suggested to put a protective film on the display unit for preventing the characters of the authentication information from being exposed to people around the operator (for example, Japanese Patent Laid-Open No. 10-293644).
However, when the turned characters of the authentication information are displayed on the display unit, the operator himself/herself cannot read the characters, either. Therefore, it has been desired to provide an electronic device enabling the operator to confirm whether characters intended by the operator are acknowledged by a control unit.


The present invention provides a foil bearing (1), comprising: a stationary mount member (2) surrounding an outer circumferential surface of a journal (13) of a rotating member via an annular gap (G); and a plurality of centripetal force producing foils (e.g., middle foils 12) arranged in a circumferential direction in the annular gap, where each of the centripetal force producing foils has one end fixed to the stationary mount member, wherein portions of the stationary mount member located between fixed ends of adjoining ones of the centripetal force producing foils are formed with an axially extending slit (4).

It is conventionally known to use a foil bearing as a bearing for a rotating member that rotates at a high speed such as at tens of thousands rpm, in which the foil bearing comprises a plurality of foils (flexible membranes) for forming a bearing surface and supports a journal (or shaft) of the rotating member by means of pressure of a fluid dragged in between the journal and the foils as the rotating member rotates. Some of such foil bearings may comprise a plurality of bump foils as disclosed in U.S. Pat. No. 4,277,113 issued to Heshmat, or may have a plurality of leaf foils as disclosed in U.S. Pat. No. 4,178,046 issued to Silver et al.
In these foil bearings, the bump foils or leaf foils are formed by press-working a flexible thin metallic plate or the like so that they provide a resilient force for urging the journal generally in a direction toward a rotational center. If the foils arranged in the circumferential direction have a uniform rigidity (or stiffness), the center of rigidity coincides with the geometric center of the bearing. In such a case, when the journal is rotating, the rotation center of the journal in an equilibrium state is determined by an amount of deformation of the foils under a weight of the rotating member, and thus, if the rotation is clockwise, the rotation center will be shifted in a lower left direction with respect to the center of the bearing at low rotational speeds.
As the rotational speed of the journal increases, an air force acting upon the journal in an upper left direction becomes larger so that the center of the journal moves clockwise from the lower left shifted position toward the center of rigidity of the foils (or the center of the bearing). When the center of the journal approaches the center of the bearing, the air force acting upon the journal is reduced and the center of the journal moves in the lower left direction again. The process is repeated at a frequency corresponding to the rotational speed to cause a whirling instability of the journal. In case of an air-film foil bearing, a force constraining the journal is relatively small, and thus, the above instability tends to become large particularly at a primary bending resonance point, making it difficult for the rotating member to pass the resonance point safely as the rotation thereof is accelerated.
In order to suppress such an instability and allow the rotating member to pass the primary bending resonance point safely, it is necessary to reduce the amount of deformation of the foils due to the weight of the rotating member, or, to provide the foils with appropriate rigidity and make the foils exert an appropriate damping force. One way for that is to make the center of rigidity of the foils located at a higher position than the geometric center of the bearing by, for example, providing a higher rigidity to the bump foils or leaf foils disposed at lower positions than those disposed at higher positions.
However, it is quite difficult to control with high precision the rigidity or damping characteristics of a number of bump foils or leaf foils which are formed by press-working, and also, change in the rigidity and damping characteristics of the foils requires considerable change in the manufacturing process. Further, arranging the foils such that the foils at various circumferential positions have a suitable rigidity for their positions tends to result in a reduction in the yield of the completed foil bearing which requires quite high precision in various dimensions such as an inner diameter, cylindricity of the inner peripheral surface, etc. Due to these reasons, it has been quite difficult to achieve the center of rigidity of the foil bearing positioned higher than the geometric center of the bearing to reduce the oscillation at the primary bending resonance point and improve the rotation performance of the foil bearing.


A computer and method for directly accessing computer hardware by a virtual system are provided. The computer comprises a hardware platform having a first-type device, a second-type device and a third-type device provided thereon; a virtual machine managing module; a first operating module; a second operating module; wherein the virtual machine managing module comprises a first-type device configuration module for directly configuring the first type device to be used by the main operating system; a second-type device configuration module for directly configuring the second-type device to be used by the guest operating system; and a third-type device configuration module for virtualizing the third-type device on the hardware platform to generate a virtualized third-type device and configuring the virtualized third-type device to be used by the main operating system and the guest operating system, respectively. The present invention considers the distribution and use of the devices as a whole in combination with the use of BIOS in the main board. Therefore, the incompatibility problem between hardware and software of the virtual system can be solved.

Regarding virtual machine technology in the computer field, as shown in FIG. 1, a virtual machine system typically comprises a virtual machine manager (e.g., Hypervisor in Xen) installed on a computer hardware platform and a plurality of operating systems (OSs), one of which being Domain 0, i.e., the Host OS, and the remaining ones being Guest OSs. In a virtual machine environment, hardware devices on the hardware platform can be directly used by Domain 0. For a Guest OS, however, hardware devices used are typically those virtualized for it by the virtual machine manager, which degrades the performance of the Guest OS. In order to enhance the access capability to the hardware devices by a Guest OS, improvements can be made with respect to direct hardware access (DHA) by the Guest OS. However, according to the existing designs for DHA by the Guest OS, only DHA of a certain PCI device is taken into consideration without designing the direct access of software and hardware as a whole. Under such circumstance, there tends to be incompatibility problem for devices in the hardware platform. Further, according to the existing architecture, in designing DHA of a certain hardware PCI device in a hardware platform, consideration is given only to provide a hardware PCI device to a certain Guest OS in a DHA mode. Thus, if it is desired to provide more hardware in the hardware platform to a certain operating system in a DHA mode, separate design for each of the hardware devices is required, and higher requirements are imposed on the operating system of Domain 0. This may cause a lot of trouble in programming and developing.
During implementing the present invention, at least the following problems are found by the inventors.
In terms of hardware, a hardware device can be provided to a particular virtual operating system in a DHA mode. However, there is no corresponding support in terms of software. That is, BIOS remains virtual for the particular virtual operating system, which leads to incompatibility between the hardware device and a plurality of operating systems. On the other hand, it is impossible to provide a plurality of hardware on a hardware platform as a whole only to a particular operating system in a DHA mode.

Computer and method for directly accessing computer hardware by virtual system


The present invention is related to improved modified live PRRS vaccines of European genotype and new PRRSV strains which can be used for the manufacture of such vaccines.

1. Technical Field
The present invention belongs to the field of vaccines against infectious diseases. More particularly, it relates to vaccines against Porcine Reproductive and Respiratory Syndrome (PRRS), a viral disease affecting pigs.
2. Background Information
The Porcine Reproductive and Respiratory Syndrome Virus (PRRSV) is a (+)stranded ssRNA virus belonging to the family of Arteriviridae. The virus exists as two genotypes referred to as "US" and "EU" type which share about 50% sequence homology (Dea S et al. (2000). Arch Virol 145:659-88), and which can be also distinguished by their immunological properties. Most sequencing information on various isolates is based on the structural proteins, namely the envelope protein GP5 which accounts for only ˜4% of the viral genome, while only little is known on the non-structural proteins (nsp).
The nsp2 protein has 1078 amino acids in the EU type prototype Lelystad Virus (LV), and shares only 32% homology with PRRSV-US (Allende R et al. (1999). J Gen Virol 80:307-15). It induces serum antibodies during natural infection (Oleksiewicz M B et al. (2001a). J Virol 75:3277-90, Oleksiewicz M B et al. (2001b). Vet Microbiol 81:109-25), seems to play a crucial role for viral replication (Snijder E J et al. (2001). J Gen Virol 82:985-94, van der Meer Y et al. (1998). J Virol 72:6689-98) and is thought to have species-specific functions (de Vries A A F et al. (1997). Seminars in Virology 8:33-47). The nucleotide sequence coding for the nsp2 amino acid sequence is represented in SEQ ID NO: 2. Length variations in the nsp2 coding region have so far only been described for one US-type isolate (Shen S et al. (2000). Arch Virol 145:871-83) and for EU type strains found in the US (Fang Y et al. Virus Res. 2004 Mar. 15; 100(2):229-35, Ropp S L et al. J Virol. April 2004; 78(7):3684-703.
Isolation of PRRSV and manufacture of vaccines have been described in a number of publications (WO 92/21375, WO 93/06211, WO93/03760, WO 93/07898, WO 96/36356, EP 0 676 467, EP 0 732 340, EP 0 835 930). There is still the need to provide vaccines with improved characteristics, in particular with respect to efficacy and safety.


Disclosed is a method for controlling a light source and optical input device using the same. The light source controlling method includes setting a shutter ON time of an image sensor using a statistical value of an image obtained through the image sensor, and setting a light source ON time in accordance with the shutter ON time and turning on/off the light source and the shutter in response to the set light source ON time and the set shutter ON time.

1. Field of the Invention
The present invention relates to an optical input device and, more particularly, to an optical input device, in which an ON/OFF time of a light source is actively set according to an ON/OFF time of a shutter in the case of collecting light from the light source to obtain an image to detect movement.
2. Description of the Related Art
A human interface device (HID) generally refers to all the devices which support a human to conveniently process an interface with a computer or its peripherals. The HID may be sorted into a keyboard, a mouse, a wireless remote controller, and keypad for a mobile phone, a computer, a digital camera, television, and so forth.
In particular, the invention is directed to an optical input device among the HIDs, which collects light from a light source, obtains an image, calculates movement, and outputs the calculated result.
An optical mouse stands for the optical input device, and is designed so that a light source illuminates light on a subject (workable surface) with which the mouse comes into contact, and then an image sensor reads movement of the reflected light to move a cursor.
The optical mouse of this type has a variety of kinds. The first is a wired optical mouse using power of the computer and PS2/USB (Universal Serial Bus) for transmission of data.
The second is an RF (Radio Frequency) optical mouse using its built-in battery as a power source and an additional RF transmitter for data transmission.
The third is an IR (Infrared) optical mouse using its built-in battery as a power source and including an additional data transmission light source and a transmission module to transmit the data of the optical mouse on the basis of an IR mechanism.
In this manner, the optical mouse applied in the various types is designed, as shown in FIG. 1, so that light 7 emitted from a light source 8 is reflected from a worktable surface 2, and the reflected light 6 passes through a lens 5 to be inputted into an image sensor 3.
The optical mouse 1 obtains an image of the worktable surface 2 using a quantity of light 6 collected in the image sensor 3, and calculates the movement of the optical mouse by comparing the obtained image with an image formed in the previous sample period.
In this case, when the movement is sensed, the optical mouse unconditionally keeps the light source 8 in an on state as in FIG. 2. However, when the movement is not sensed, the optical mouse causes the light source 8 to be turned on/off at constant intervals.
And the optical mouse controls a time when the image sensor is shuttered on as in FIGS. 3A and 3B according to brightness of the worktable surface in order to exactly read an image of the worktable surface. The optical mouse causes a quantity of the light incident on the image sensor 3 to have a constant value at all times by decreasing the time when the image sensor 3 is shuttered on in the bright workable surface and by increasing the time when the image sensor 3 is shuttered on in the dark workable surface.
In FIGS. 3A and 3B, a shutter on period refers to a period where the image sensor 3 reads the image of the worktable surface 2 through the quantity of the incident light, while a shutter OFF period refers to a period where the image sensor 3 does not read the image of the worktable surface 2.
In this manner, the optical mouse according to the prior art turns on the light source without any condition when its movement is sensed.
Therefore, the optical mouse according to the prior art is operated by on operation of the light source even in the period where it is unnecessary to be operated by on operation of the light source, such as the shutter OFF period where the image sensor does not read the image of the worktable surface, thus resulting in undesired waste of electric power and reduction of energy efficiency.
For this reason, when the optical mouse is either the wired optical mouse connected to a device such as a notebook computer sensitive to consumption of the electric power or the IR or RF optical mouse using its built-in battery as a power source, undesired consumption of the electric power is generated, so that there is a trouble of frequently substituting the battery.

Method for controlling light source and optical input device using the same

Abstract: Thus, undesired consumption of electric power of the light source is prevented to increase energy efficiency by actively setting an ON/OFF period of the light source consuming the maximum electric current in the optical input device according to a shutter ON/OFF period. Further, availability of the light source and its electric current is enhanced by controlling the light source for the shutter OFF period and by allowing the light source to be used as a source for the data transmission.


A DC collection system for a PV power plant contains a large number of feeders. When a fault occurs, the fault current rapidly increases, causing electronic devices to block to protect themselves. This blockage presents a challenge to the protection of the DC collection system because of extremely short data windows. To address this challenge, a protection method based on active control of DC/DC converters is disclosed. The fault current control principle is analyzed and derived so that DC/DC converters can provide an injected low-amplitude and controllable post-fault stable current signal. The disclosed protection method is designed based on identifying the direction of the injected signal. Simulation results indicate that the fault section can be accurately identified and that the disclosed protection method performs efficiently against transition resistance and noise.

Integration of PV power generation via a DC system can maximize output efficiency and prevent potential voltage oscillation of the DC system when the DC system is connecting to a weak alternating current (AC) system. The DC system may be a DC boosting and integrating system that may have many PV collection branches. The DC boosting and integrating system is characterized by a significantly short period of fault process owing to blocking control. Within such a short period of data window, existing protection algorithms are deigned based on the instantaneous value of transient current which contains random components. With the influence of various converter controls, the fault characteristics exhibits nonlinearity. This brings challenges to existing protections. Reliable fault section identification should achieve fast fault isolation and system recovery, which is important to ensure efficient and stable PV power integration.

This patent is subject to a terminal disclaimer.

Flexible direct current system of photovoltaic plant having active control-based protection system


A load lift control system for efficiently elevating and lowering a load placed upon a trailer. The load lift control system includes a control unit, an air bladder unit attached to a trailer and inflatable by the control unit and a support unit attached to an upper end of the air bladder unit, wherein the support unit elevates and lowers a load placed upon the support unit when the air bladder unit is inflated and deflated.

1. Field of the Invention
The present invention relates generally to trailers and more specifically it relates to a load lift control system for efficiently elevating and lowering a load placed upon a trailer.
2. Description of the Related Art
Any discussion of the prior art throughout the specification should in no way be considered as an admission that such prior art is widely known or forms part of common general knowledge in the field.
Trailers have been in use for years. Typically, trailers and semi-trailers have a flat bed for hauling products or loads. A forklift or other lifting device is generally used to lift the product away from the floor and remove the product from the trailer. Forklifts generally have two forks that extend from the forklift and under the product to be lifted. These forks are often very heavy, making them somewhat difficult to control accurately.
Since the product generally sits on the floor of the trailer or on a small crate, the forks of the forklift must get very close to the trailer bed. Often times, the operator of the forklift may lower the forks too far and damage the floor of trailer. It is also common for the operator to not lower the forks enough and run into the product with the forks of the forklift, thus damaging the product.
While these devices may be suitable for the particular purpose to which they address, they are not as suitable for efficiently elevating and lowering a load placed upon a trailer. By elevating the product placed upon a trailer, it may be easier to load and unload the product from the trailer. This decreases the likelihood of damaging the floor of the trailer with the forks of the forklift. It may also be easier to tell the exact height of the forks, since they would be closer to eye level.
In these respects, the load lift control system according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in so doing provides an apparatus primarily developed for the purpose of efficiently elevating and lowering a load placed upon a trailer.


A color data transferring circuit, a color data storing circuit, and a block selecting circuit 1020 are provided separately from an input/output buffer circuit, in order to transmit data stored in a color register to a memory cell block. In a block write mode, data applied to a data input/output terminal is stored in the color data storing circuit through color register and the color data transferring circuit. One block selecting gate is selected in response to a block selecting signal from a block decoder, and data stored in each storage element in the color data storing circuit is transmitted to a corresponding memory cell block. Input/output buffer circuit performs normal data writing only through a sense amplifier +I/O block. A semiconductor memory device capable of easily extending the number of bits of block write with a simple circuit configuration is implemented.

1. Field of the Invention
The present invention relates generally to semiconductor memory devices, and, more particularly, to a semiconductor memory device having a block write function of writing data into a plurality of bits on the same row in one memory cycle. The present invention relates more particularly to improvements in a block write scheme in a multiport RAM with a RAM (random access memory) port accessible in a random sequence and a SAM (serial access memory) port accessible only sequentially.
2. Description of the Background Art
Image information is processed digitally in a work station, a personal computer, and the like. In order to display such image information on a display unit, a frame buffer memory referred to as a video RAM is employed. One line of a video RAM corresponds to a horizontal scan line on a screen of a display unit. A frame buffer stores image data of one frame. A general RAM cannot perform writing and reading of data simultaneously. Accordingly, in a case in which a general RAM is used as a video RAM, a CPU (central operation processing unit) cannot access the video RAM in a period of displaying pixel data. The CPU access the video RAM only in a horizontal blanking period. This reduces the data processing speed of the system. Accordingly, a multiport RAM capable of performing outputting of pixel data therefrom to a display unit and being accessed by a CPU simultaneously and asynchronously is widely used as an image processing memory in general.
FIG. 1 is a schematic diagram of a structure of an image processing system employing a multiport RAM. Referring to FIG. 1, the processing system includes a multiport RAM 900 as a video RAM for a frame buffer. Multiport RAM 900 includes a dynamic memory cell array 901 accessible in a random sequence and a serial access register 902 accessible only serially. Generally, the part including dynamic memory cell array 901 is referred to as a RAM port, and the part including serial access register 902 is referred to as a SAM port. Serial access register 902 is capable of storing data of one row in dynamic memory cell array 901.
The image processing system further includes a CPU 910 for accessing multiport RAM 900 in a random sequence and performing required processing, a display device 930 for displaying pixel data provided from serial access resistor 902, and a CRT display controller 920 for generating a control signal for controlling operation of the video RAM.
The multiport RAM 900 transfers pixel data of one row at a time from the RAM port to the SAM port. In the period of serially providing the pixel data of one row to display unit 930, CPU 910 can randomly access the RAM port and execute required processing. Accordingly, if the data transfer from the RAM port to the SAM port is performed in a horizontal blanking period, CPU 910 is capable of randomly reading the contents of dynamic memory cell array 901, performing required processing on the read data, and then writing the processed data into dynamic memory cell array 901 again in the remaining horizontal scan period.
Operation timings of multiport RAM 900 are controlled by CRT display controller 920, and CPU 910 is forbidden to make access during data transfer from the RAM port to the SAM port. If such multiport RAM 900 is employed as a video RAM for a frame buffer, CPU 910 is capable of making access to the multiport RAM in parallel with displaying on display unit 930, so that the processing speed of the system is greatly improved.
FIG. 2 is a diagram illustrating an example of the whole structure of a multiport RAM. The multiport RAM illustrated in FIG. 2 includes a RAM port which is randomly accessible and a SAM port which is only serially accessible, so that it will be described as a dual port RAM in the following description. While inputting/outputting of data is generally performed in a plurality of bits, for example, in four bits or in eight bits in a dual port RAM, a structure in which inputting/outputting of data is performed in one bit is illustrated in FIG. 2.
Referring to FIG. 2, a dual port RAM 100 includes a randomly accessible random access memory cell array 1. Random access memory cell array 1 includes a plurality of memory cells MC arranged in a matrix of rows and columns. Dual port RAM 100 further includes an address buffer circuit 7 receiving an external address A0 - An applied to an address input terminals 20 for generating an internal address, a row decoder 2 responsive to an internal row address from address buffer circuit 7 for selecting a corresponding row in random access memory cell array 1, a column decoder 3 responsive to an internal column address from address buffer circuit 7 for generating a column selecting signal for selecting a column in random access memory cell array 1, a sense amplifier for sensing and amplifying data in memory cells in the selected one row in random access memory cell array 1, and an I/O gate responsive to the column selecting signal from column decoder 3 for connecting the selected column in random access memory cell array 1 to a RAM input/output buffer circuit 4. The sense amplifier and the I/O gate are illustrated as one block 5 in FIG. 2.
In data reading, RAM input/output buffer circuit 4 generates an external read data from data on a common data bus 105 to an external data input/output terminal 22. In data writing, RAM input/output buffer circuit 4 generates onto common data bus 105 an internal write data from an external write data WIOi applied to external data input/output terminal 22.
Dual port RAM 100 further includes a color register 200 for storing data for performing flash write or block write. The transfer of data stored in color register 200 onto common data bus 105 is performed through RAM input/output buffer circuit 4. Flash write and block write will be described later. The part related to inputting/outputting of data through data input/output terminal 22 is referred to as a RAM port.
Dual port RAM 100 further includes a serial memory cell array 11 accessible only serially, a transfer gate 10 for performing data transfer between serial memory cell array 11 and one row in random access memory array 1, a serial selector 12 for sequentially selecting a memory cell in serial memory cell array 11, and a SAM input/output buffer circuit 14 for connecting common data bus 15 and a data input/output terminal 32. In data reading, SAM input/output buffer circuit 14 generates an external read data from data on common data bus 15 and applies it to data input/output terminal 32. In data writing, SAM input/output buffer circuit 14 generates an internal write data from an external write data SIOi applied to data input/output terminal 32 and transmits it to common data bus 15. Serial memory cell array 11 has a capacity capable of storing data of at least one row in random access memory cell array 1.
Dual port RAM 100 further includes, as peripheral circuits, an internal clock generating circuit 8 receiving external control signals *RAS, *CAS, *WB/*WE, *DT/*OE, and DSF applied to an external clock input terminal 21 and generating various internal control signals, a SC buffer circuit 17 receiving a clock signal SC applied to a control signal input terminal 30 and generating an internal clock signal, a SE buffer circuit 18 receiving a control signal *SE applied to an input terminal 31 and generating an internal control signal for activating the SAM port, a QSF buffer circuit 19 responsive to the internal clock signal from SC buffer circuit 17 for applying an external control signal QSF to an output terminal 33, and a signal converting circuit 16 implemented with a counter circuit, for example, responsive to the internal clock signal from SC buffer circuit 17 for converting it to a signal shifting the activation position of serial selector 12 one by one.
Control signal *RAS is a row address strobe signal for giving timing in which address buffer circuit 7 strobes an address A0 - An applied to address input terminals 20 as a row address and controlling operation of row selection circuitry in the RAM port. Control signal *CAS is a column address strobe signal for giving timing in which address buffer circuit 7 strobes address A0 - An applied to address input terminals 20 as a column address and controlling operation of column selection circuitry in the RAM port. Control signal *WB/*WE is a control signal for designating write per bit operation and data write mode. Write per bit operation is an operation mode in which data writing is performed with a predetermined bit masked in a case in which inputting/outputting of data is performed in a plurality of bits in the RAM port.
Control signal *DT/*OE is a control signal for designating a transfer mode for performing data transfer between the RAM port and the SAM port and a data output mode. Control signal DSF is a control signal for designating a flash write mode or a block write mode. The flash write mode is an operation mode in which the data stored in color register 200 is simultaneously written into memory cells on a selected row in random access memory cell array 1. The block write mode will be described in detail in the following. The symbol * given before a signal indicates that the signal is a signal of a negative logic (it is in an active state when it is at a low or "L" level).
External clock signal SC is a clock signal for determining the speed and timing of inputting/outputting of data in the SAM port. Control signal *SE is a control signal for enabling the SAM port. Control signal QSF is a control signal for informing the outside which data register is used in a case in which the memory cell array includes data registers of two systems. Specifically, although serial memory cell array 11 is illustrated having a function corresponding to one row in FIG. 2, it actually includes two independent data registers. The structure of the data registers includes a split buffer scheme in which each of them is implemented with a data register having a storage capacity of 1/2 row and a double buffer scheme in which each of them has a storage capacity of one row. The two independent data registers are brought to an active state by turn. Data is transferred from random access memory cell array 1 through transfer gate 10 to the data register in the active state.
Dual port RAM 100 further includes an address pointer 9 latching the column address from address buffer circuit 7 in response to the control signal from internal clock generating circuit 8 for generating a starting address 6c of serial selector 12. Now, operation will be simply described in the following.
Access to the RAM port is made in the same way as in a normal DRAM (Dynamic Random Access Memory). Specifically, address A0 - An applied to address input terminals 20 is strobed and latched by address buffer circuit 7 at the falling of control signal *RAS, and an internal row address is generated. Row decoder 2 receives the internal row address from address buffer circuit 7, selects a corresponding row in random access memory cell array 1, and making the potential of the selected row (word line) rise to "H" of the active state. Then, a sense amplifier included in a block 5 is activated, and information stored in memory cells MC connected to the selected row is detected, amplified, and latched.
Next, when control signal *CAS falls, address buffer circuit 7 strobes and latches address A0 - An applied to address input terminals 20, generates an internal column address, and applies it to column decoder 3. Column decoder 3 decodes the internal column address and generates a column selecting signal for selecting a corresponding column in memory cell array 1. I/O gate 5 connects the corresponding column to common data bus (hereinafter referred to as a RAM common data bus) 105 in response to the column selecting signal from column decoder 3. In the case of data writing, control signal *WB/*WE attains "L". An input buffer circuit included in RAM input/output buffer circuit 4 is activated in the timing of the later one of the falling of control signal *CAS and the falling of control signal *WB/*WE (if the data input/output terminal is used in common for data output and data input, control signal *CAS generally falls later), and it takes in data WIOi applied to data input/output terminal 22 and generates an internal write data onto RAM common data bus 105. This causes the data to be written into a memory cell MC on the crossing of the row and column selected by row decoder 2 and column decoder 3.
In data reading, control signal *DT/*OE is brought to an active state of "L", an output buffer circuit included in RAM input/output buffer circuit 4 is activated, and it generates an external read data from data on RAM common data bus 105 and transmits it to data input/output terminal 22. Normal operation of writing and reading of data in the RAM port is as described above. Now, operation of the SAM port will be described.
Whether the SAM port is in a data output mode or a data write mode is determined by a transfer cycle carried out immediately before. Specifically, when data is transferred from random access memory cell array 1 through transfer gate 10 to serial memory cell array 11, the SAM port is brought into the data read mode. In the transfer cycle (read transfer cycle), if control signal *DT/*OE is set to "L" of an active state, and control signal *WB/WE is set to "H", and control signal *SE is set to arbitrary state when control signal *RAS is made active of "L" in the normal read cycle in the RAM port, the memory cell data of the one row is transferred through transfer gate 10 activated in response to rising of control signal *DT/*OE to serial memory array 11 after sensing and amplifying of data in memory cells in one row in random access memory cell array 1.
Next, an address which is strobed when control signal *CAS falls to "L" is loaded in address pointer 9. The address 6c loaded in address pointer 9 is applied to serial selector 12 and designates the first selected bit position of serial selector 12. Thereafter, as external clock signal SC changes, the count value of signal converting circuit 16 is incremented one by one, the selected position of serial selector 12 changes accordingly, and data stored in serial memory cell array 11 is sequentially provided as an output through SAM input/output buffer circuit 14. Now, operation in a case in which the SAM port is set to the data write mode will be described.
First, when control signal *RAS is made to fall to "L", control signal *WB/*WE is set to "L", control signal *DT/*OE is set to "L", and control signal *SE is set to "H". Transfer gate 10 is activated in response to rising of control signal *DT/OE, and the contents stored in serial memory cell array 11 are transmitted to a selected row in random access memory cell array 1. At this time, row selecting operation is already performed by row decoder 2 in random access memory cell array 1 in response to control signal *RAS. Next, when control signal *CAS is made to fall to "L", a column address strobed by address buffer circuit 7 is loaded in address pointer 9. The column address 6c from address pointer 9 designates a bit position in memory cell array 11 into which data supplied from SAM input/output buffer circuit 14 is written first.
Data writing into serial memory cell array 11 and data reading therefrom are performed in response to clock signal SC. In this case, it is unnecessary to perform row selecting operation and column selecting operation as in a normal DRAM, so that the access time of the SAM port is a short time in the range of 10 to 30 ns. Therefore, it is possible to perform serial inputting/outputting of data at high speed, and dual port RAMs are widely used in the image processing field requiring high-speed processing of large amount of data.
There is a strong tendency to add various functions to such a dual port RAM for performing various image processing easily and at high speed. Such extended functions are generally designated by combination of the states of externally applied control signals at the fall timing of each of control signals *RAS and *CAS. An example of the timing of the signals on the occasion when the extended functions are designated is illustrated in FIG. 3. It is possible to realize various extended functions by setting the signals which are in the timing indicated by broken lines in FIG. 3 to "H" or "L". Control signal DSF is set to "H" or "L" at the fall timing of control signals *RAS and *CAS, and a desired extended function is selected by combination of control signals *DT/*OE, *WB/*WE, and *SE. For example, loading of data into color register 200 illustrated in FIG. 2 is performed by setting control signals *CAS, *DT/*OE, *WB/*WE to "H" and setting control signal DSF to "H" at the falling of control signal *RAS. Generally, when control signal DSF is set to "H", an extended function is performed.
There is an operation mode referred to as block write in such extended functions. As illustrated in FIG. 4, the block write mode selects a row X in random access memory 1 by row decoder 2 (See FIG. 2), and then selects a column Y by an internal column address which is an internal column address generated from address buffer circuit 7 except for least significant two bits. In row X, four bits M1, M2, M3, and M4 starting at column Y are simultaneously selected, and writing of data stored in color register 200 (see FIG. 2) is performed thereinto. In the block write mode, data can be written into four bits of memory cells in one cycle, so that it is possible to greatly reduce the time required for plotting. If such block write mode is used, it is possible to clear a predetermined window region of a display unit or repaint the color of that part at high speed. Specifically, in the block write mode, one row is divided into a plurality of groups each including four bits, and data can be written simultaneously into one group. A structure for performing the block write is illustrated in detail in FIG. 5.
FIG. 5 is a diagram illustrating a structure of a part related to data writing in a RAM port in a dual port RAM. Referring to FIG. 5, a dynamic random access memory cell array 1 includes memory cell groups MG each including a plurality of columns (normally four columns). Although only one row (word line WL) in memory cell group MG is illustrated in FIG. 5, memory cell group MG includes all rows in memory cell array 1. Memory cell array 1 includes bit lines 102a and 102b connected to memory cells MC in one column. Bit lines 102a and 102b are arranged in a pair, and data complementary to each other are transmitted thereon. A memory cell MC is arranged at crossing of word line WL and one of bit lines 102a and 102b in a pair.
A sense amplifier SA is provided for detecting data on a bit line pair 102a and 102b. Sense amplifier SA is included in a sense amplifier group 5a. Column selecting gates SG which are brought to ON state in response to a block selecting signal BSi are provided for respective bit line pairs 102a and 102b. Block selecting signal BSi is a signal generated by decoding address bits of an internal column address except for least significant two bits, for example, and it is illustrated being generated from column decoder 3 in FIG. 2. The four pairs of bit lines 102a, 102b are connected through column selecting gates SG to different RAM common data buses 105a-105d, respectively.
In a dual port RAM having the block write function, RAM common data bus 105 includes four data bus lines 105a, 105b, 105c, and 105d for writing data simultaneously into four bits of memory cells. Memory cells MC1-MC4 in the memory cell group MG are connected through column selecting gates SG1-SG4 to common data bus lines 105a-105d, respectively. Memory cell MCI is connected through column selecting gate SG1 to common data bus line 105a. Memory cell MC2 is connected through column selecting gate SG2 to common data bus line 105b. In the same way, memory cell MC4 is connected to common data bus line 105d. Memory cell MC3 connected to common data bus line 105c is not illustrated for simplifying the drawing. Column selecting gates SG1-SG4 constitute a group, and they are brought to ON state simultaneously in response to block selecting signal BSi. Column selecting gates SG1-SG4 are included in block 5 illustrated in FIG. 2 and constitute an I/O gate block 5b.
Transfer gate 10 for performing data transfer between the RAM port and the SAM port includes unit transfer gates UT provided corresponding to respective pairs of bit lines 102a and 102b. Unit transfer gate UT includes a transmission gate which is brought to a conductive state in response to a transfer indicating signal DT. Serial memory cell array 11 includes unit registers UR provided corresponding to respective pairs of bit lines 102a and 102b. Unit register UR is implemented with an inverter latch. Unit transfer gate UT in ON state enables data transfer between corresponding bit lines 102a and 102b and a corresponding unit register UR. Selection of a memory cell in serial memory cell array 11 is performed by serial selector 12 (12a, 12b). Serial selector 12 includes a circuit 12b for generating a selection signal according to a pointer from address pointer 9 and a timing signal from converting circuit 16 and a circuit 12a for connecting a corresponding serial memory cell to the SAM common data bus according to a selection signal from circuit 12b. RAM input/output buffer circuit 4 includes a selection circuit 401 for changing over operation between data writing in one bit and data writing in the block write mode, buffer amplifiers 402a to 402d provided to respective RAM common data bus lines 105a to 105d for transmitting written data from selection circuit 401 onto corresponding RAM common data bus lines, and a control circuit 404 for controlling operation of selection circuit 401 and buffer amplifiers 402a to 402d.
Control circuit 404 generates internal write enable signals WEa to WEd for enabling buffer amplifiers 402a to 402d and a control signal for controlling selection operation of selection circuit 401 in response to internal write indicating signal WE, internal column address CA of the least significant two bits, for example, and block write indicating signal BW. Internal write indicating signal WE and block write indicating signal BW are generated from internal clock generating circuit 8 illustrated in FIG. 2. Internal column address CA is generated from address buffer circuit 7 illustrated in FIG. 2.
When block write is instructed under the control of controlling circuit 404, selection circuit 401 transmits data stored in color register 200 to all of buffer amplifiers 402a to 402d. If normal data writing in one bit is instructed, selection circuit 401 transmits written data WIOi applied to common data input/output terminal 22 to a buffer amplifier designated by controlling circuit 404. Buffer amplifiers 402a to 402d are brought to an output enable state when internal write enable signals WEa to WEd are applied, respectively, and they are otherwisely set to an output high impedance state. Color register 200 stores written data WIOi applied to common data input/output terminal 22 in response to a control signal (store instructing signal) .phi. generated on the occasion of the block write mode. Now, the block write mode operation will be described with reference to FIG. 6 and FIG. 7 showing the operation waveforms thereof.
The block write mode operation includes two operation cycles. One is a load color cycle for loading data into color register 200, and the other one is a block write cycle for writing data stored in color register 200 into four bits of memory cells. First, referring to FIG. 6, the load color cycle will be described.
The load color cycle is performed by setting control signal DSF to "H" at the falling edge of control signal *RAS and setting control signal DSF to "L" at the falling edge of control signal *CAS. Control signal DSF corresponds to block write indicating signal BW illustrated in FIG. 5. First, when control signal *RAS falls, control signal DSF is set to "H". Responsively, internal control signal BW is raised to "H", and control circuit 404 determines that the block write mode is set. In response to the falling of control signal *RAS, row selecting operation is performed according to an external row address, and selection of memory cells in one row and amplification of data in the selected memory cells by sense amplifier SA are performed in the RAM port.
Next, control signal DSF is set to "L" at the falling edge of control signal *CAS. Responsively, control circuit 404 determines that data applied to data input/output terminal 22 should not be written into memory cell array 1 and forbids selection operation of selection circuit 401. In addition, control circuit 404 disregards internal write indicating signal WE generated in response to "L" of control signal *CAS and control signal *WB/*WE and sets buffer amplifiers 402a to 402d to an output high impedance state. In memory cell array 1, block selecting operation is performed at the falling edge of control signal *CAS in accordance with a block indicating signal which is an external column address except for the least significant two bits, and block selecting signal BSi rises. In this case, however, RAM common data bus lines 105a-105d are in a floating state, and data on respective pairs of bit lines 102a, 102b are latched by sense amplifier SA.
On the other hand, at the falling edge of control signal *CAS, control signal .phi. rises to "H" in response to control signal *WB/*WE being at "L" and control signal DSF being at "L". Color register 200 is activated in response to control signal .phi. and stores data WIOi applied to RAM data input/output terminal 22. This completes loading of data for the block write into color register 200. Thereafter, all of control signals *RAS, *CAS and control signal *WB/*WE rise to "H", and the load color cycle is completed. At this time, in memory cell array 1, only rewriting a data latched in a sense amplifier into a memory cell is carried out. Now, referring to FIG. 7, the block write cycle will be described.
In the block write cycle, control signal DSF is set to "L" at the falling edge of control signal *RAS. In memory cell array 1, in response to the falling of control signal *RAS, row selecting operation is performed in response to an external address, and one word line WL is selected. Then, sense amplifier SA is activated, and data in memory cells connected to that one row is sensed and amplified. Next, when signal *CAS falls, signal DSF is set to "H". In this case, control signal .phi. is not generated, and color register 200 does not perform data latching. Control circuit 404 generates all of internal write indicating signals WEa - WEd to buffer amplifiers 402a-402d in response to control signal BW and internal write indicating signal WE and also applies a block write indicating controlling signal to selection circuit 401.
Selection circuit 401 transmits data stored in color register 200 to all of buffer amplifiers 402a-402d. Consequently, internal write data corresponding to the data stored in color register 200 is transmitted from buffer amplifiers 402a-402d onto common data bus lines 105a-105d. On the other hand, at the falling edge of control signal *CAS, block selecting signal BSi is generated by column decoder 3, and respective bit lines 102a, 102b in a selected memory cell group MG are connected to corresponding common data bus lines 105a-105d, respectively. Then, the data stored in color register 200 is written into memory cells MC1-MC4 in the selected memory cell group MG. Then each control signal returns to an initial state to complete the block write cycle.
Control circuit 404 controls selection operation of selection circuit 401 according to the timing relationship between control signal (block write indicating signal) BW and internal write indicating signal WE. Specifically, when block write indicating signal BW is generated earlier than external write indicating signal WE, control circuit 404 determines that it is the data load cycle to color register 200 and forbids selection operation of selection circuit 401 as well as generation of internal write enable signals WEa - WEd. In addition, when block mode indicating signal BW is brought to "H" of an active state on the occasion of generation of internal write indicating signal WE, control circuit 404 determines that it is the block write cycle, generates all internal write indicating signals WEi (i=a-d), forbids selection operation of selection circuit 401, and connects color register 200 to all buffer amplifiers 402i (i=a-d).
There is a structure of a memory in which data loading into the color register is set when control signal DSF is at "H" both at the falling edges of control signals *RAS and *CAS in the block write mode operation as described above. When control signal DSF is at "L" both at the falling edges of control signals *RAS and *CAS, a dual port RAM of such a structure performs normal data writing operation in one bit.
Control signal .phi. is not generated when control signal DSF is set to "H" at the falling edge of control signal *CAS, and data latching by color register 200 is forbidden.
By performing the block write mode operation, it is possible to write the same data into four bits of memory cells simultaneously in one memory cycle and perform clearing or repainting of the color of a window region at high speed. However, in order to realize the block write function, it is necessary to provide the same number of RAM common data bus line pairs 105 as the number of columns which are subject to the block write operation. In order to perform block write in 8 bits or 16 bits, 8 pairs or 16 pairs of RAM common data bus lines are necessary, and the chip area is increased.
In addition, a selection circuit is required for making a switching between the block write operation and the normal write operation in one bit. The selection circuit transmits data stored in the color register onto all RAM common data bus line pairs in the block write mode and selects one pair of the plurality of common data bus line pairs and transmits internal write data in the normal write. Accordingly, if the scale (the number of bits) of block write is enlarged, the scale of the selection circuit is also enlarged in accordance with that, and the scale of the RAM input/output buffer circuit is enlarged. In addition, if the number of bits of block write is increased, there is a problem that the structure of the device for performing bus selecting operation in the selection circuit and changing the RAM common data bus lines for the block write mode and for the normal write mode becomes complicated.

Semiconductor memory device having block write function


An information management system implements a method for securing a media agent from unauthorized access, where the method includes configuring a secondary storage computing device to initialize a filter driver at boot time and monitor process calls to a media agent, where the media agent provides read and write operations to a secondary storage device in communication with the secondary storage computing device. The filter driver may detect a process call to the media agent, and determine whether the process call is authorized. In response to a determination that the process call is authorized, the filter driver may allow the process call to request an operation be performed by the media agent, and the media agent may then perform the requested operation. If the filter driver determines that the process call is not authorized, the filter driver may ignore the process call for the requested operation.

Businesses recognize the commercial value of their data and seek reliable, cost-effective ways to protect the information stored on their computer networks while minimizing impact on productivity. A company might back up critical computing systems such as databases, file servers, web servers, virtual machines, and so on as part of a daily, weekly, or monthly maintenance schedule. The company may similarly protect computing systems used by its employees, such as those used by an accounting department, marketing department, engineering department, and so forth. Given the rapidly expanding volume of data under management, companies also continue to seek innovative techniques for managing data growth, for example by migrating data to lower-cost storage over time, reducing redundant data, pruning lower priority data, etc. Enterprises also increasingly view their stored data as a valuable asset and look for solutions that leverage their data. For instance, data analysis capabilities, information management, improved data presentation and access features, and the like, are in increasing demand.
In preserving primary data of one or more client computing devices, a company or organization may back up the primary data of the one or more client computing devices to one or more secondary storage devices. However, the users of the client computing devices may unknowingly introduce nefarious or problematic software into the primary data of their client computing device. Malware, ransomware, viruses, and other various forms of malicious software may find their way into the primary data. Furthermore, these types of malicious software are designed to lay dormant and undetected by the user that inadvertently downloaded or installed them. When the client computing device backs up its primary data, that backup may include the malicious software with it. Should the user require a restoration of the primary data from the (now-infected) backup, the restored primary data will include the malicious software. In addition, depending on the complexity or sophistication of the malicious software, the malicious software may replicate and/or propagate itself throughout the backup architecture of the company or organization, and could potentially disrupt or preclude the company or organization from performing further backup and/or restoration operations. Thus, malicious and nefarious software presents itself as a non-trivial problem in the field of data archival and retrieval.

Media agent hardening against ransomware attacks


A flexible cleaning tool (22) is disclosed. The cleaning tool (22) includes a handle (24) connected to an elongated flexible support member (26) that includes a plurality of discrete, rotatably interconnected segments (40). A cleaning pad (28) encloses the support rod (26).

1. Field of the Invention
The present invention relates to the field of cleaning devices such as hand held dusters and dust mops, bathroom cleaners, toilet cleaners and other cleaning devices. More particularly, the present invention relates to a flexible cleaning device for accommodating the cleaning or dusting of difficult to access surfaces.
2. Discussion of the Related Art
For decades, hand held feather dusters, dust rags and other cleaning implements have been used as cleaning tools for the removal of dust adhering to furniture such as dressers and coffee tables, electrical appliances such as computers, lights, interior walls, lintels and the like. Thus, it is generally well known to remove dust or dirt from floors, furniture, and other household surfaces by rubbing a dust rag, cloth or other cleaning implement against the surface to be cleaned such that the dust or dirt adheres to the cleaning implement.
Despite the existence of numerous dusting or cleaning implements, dusting or cleaning of surfaces in hard to reach and inaccessible areas remains a common problem. Currently, in order to clean behind heavy appliances such as televisions or stereos, a user must physically move the appliance to enable the user to adequately clean behind the desired appliance. Certain fixtures, such as radiators in older homes are immovable and present a significant challenge for cleaning. Likewise, other odd shaped or difficult to reach surfaces such as the inner rim of a toilet seat or the spindle on a staircase provide challenges to cleaning.
While hand held dusters and other cleaning implements are generally well known in the art, numerous drawbacks exist with the current commercially available designs. For example, US Application Pub. No. US 2004/0034956 A1, U.S. Pat. Nos. 6,813,801, 5,953,784 and 6,550,092, hereby expressly incorporated by reference, disclose variations of hand held cleaning devices incorporating a disposable cleaning pad. These devices, while somewhat suitable for the desired application, exhibit notable limitations. For example, none of the above-cited references provide an elongated flexible support arm that allows a user to bend the duster or cleaning device into a variety of shapes. Instead, most prior art hand held dusters or cleaners utilize rigid supports that do not allow a user to shape the duster into unique configurations to enable the user to dust or clean behind hard to reach places. While some prior art devices exhibit a movable joint to enable better storage or shipping, such devices are typically constructed to be flexible only in the one direction, and as such its cleaning capability is restricted by its maneuverability. The duster of the present invention overcomes the disadvantages of the prior art since, inter alia, it is constructed of an elongated rod which is flexible in all directions.
In general, the majority of improvements to hand held dusters and mops have been directed at improving the basic mechanical components of the cleaning device. These improvements have been directed at providing an inexpensive yet robust implement for dry dusting or cleaning. However, notably absent in the prior art is any attempt to provide a hand held cleaning implement that allows for rotational movement to allow for a flexible cleaning device.
Likewise, the cleaning surface of the cleaning implement in many of these devices is relatively small, such that use of these cleaning devices on large surfaces requires considerable effort on the user's part. In addition, most prior art cleaning pads, only include a single cleaning surface. The duster of the present invention overcomes the disadvantages of the prior art since, inter alia, it is constructed of an elongated 360° cleaning surface.

Cleaning tool with cleaning pad having a non-woven fiber bundle on both sides