A container for storing liquids such as ink to be refilled in an used, empty ink cartridge for computer printers being to be formed with at least two holes so as to allow the ink to discharge. A hole is made in the container at its mouth portion and then another hole is opened at the main chamber of the container by a piercing device attached to the container or by revealing an air passage so as to introduce external air into the container so as to pressure out the ink into the ink cartridge.

1. Field of the Invention
The present invention relates to a liquid container and more particularly to a liquid container for dispensing the contents into a separate receptacle.
2. Prior art
Containers for storing liquids therein such as ink, medicine, etc. generally come in two types: a syringe type and a squeeze type. Either type of container needs to receive a pressure from out side to discharge the contents. In other words, in the cyringe type container, a piston is pushed into the container body which is customarily made of a hard material such as grass, etc; and in the squeeze type container, the container body which is generally made of elastic material such as synthetic resins is squeezed by fingers.
In these types of containers, a means for filling and discharging the inside liquid is generally provided at the mouth portion of the container; accordingly, a caution is required so that the inside liquid does not leak out of the container through these filling and discharging means during the transportation and storage.
Recently, it is a common practice of computer users to refill a used, empty ink cartridges for ink-jet printers with refilling ink; and such a refilling ink comes in special ink containers or ink packs. In other words, such ink containers or ink packs are provided at the mouth portion thereof with special ink discharging means that helps a smooth transfer of the ink from the container to the ink cartridge. Thus, since the container has the special discharge means, chances are that the ink leaks out of the container through such special discharging means or through incomplete sealing areas. Thus, a caution is highly required during the transportation and storage of such ink containers; and further, the manufacturing cost of such ink containers tends to be high.
There is another type of container which has a slight similarity to the present invention described later. This container is made of a material that has a rigidity, and the container has two (2) rubber capping members: one for covering the mouth portion and the other for covering the bottom opening. When this container is used, a pipe is pierced into the rubber member of the mouth portion, and then the other rubber member covering the bottom of the container is removed, thus introducing air into the container through the bottom opening, thus letting out the content, such as ink, into an empty ink cartridge. However, since two (2) capping members are used, it is difficult to secure an equally good sealing for both of them; and the same problem arise in this container as the container described above in terms of transportation, storage and manufacturing costs.

Mitsubishi Pencil Corporation of America


Techniques are provided which allow computers with relatively less computational power to perform dynamic conversion of video from inter-frame dependent format to an independent-frame format while playing the video as it is being converted. If the conversion operation is not keeping up with the arrival of the incoming video, the video is spooled within the computer system. The playback and conversion operations proceed as the spooling is performed. Thus, to a viewer of the video, the video may appear to slow, but the playback and conversion operation proceed without losing frames.

Frequently, to reduce the amount of storage and computation required by digital video, the digital video is captured in a format in which the video data is compressed using inter-frame compression. MPEG is an example of a format that uses inter-frame compression.
MPEG is a popular standard that has been developed for digitally storing audio-visual sequences and for supplying the digital data that represents the audio-visual sequences to a client. In the examples hereafter, MPEG is used as an example of an inter-frame compressed format. However, MPEG-1 and MPEG-2 are merely two examples of inter-framed compressed formats with which the techniques described hereafter may be applied. The techniques are not limited to any particular inter-frame compressed digital format.
In the MPEG format, video and audio information are stored in a binary file (an "MPEG file"). The video information within the MPEG file represents a sequence of video frames. This video information may be intermixed with audio information that represents one or more soundtracks. The amount of information used to represent a frame of video within the MPEG file varies greatly from frame to frame based both on the visual content of the frame and the technique used to digitally represent that content.
MPEG employs three general techniques for encoding frames of video. The three techniques produce three types of frame data: Intra-frame ("I-frame") data, Predicted frame ("P-frame") data and Bi-directional ("B-frame") data. I-frame data contains all of the information required to completely recreate a frame. P-frame data contains information that represents the difference between a frame and the frame that corresponds to the previous I-frame data or P-frame data. B-frame data contains information that represents relative movement between preceding I or P-frame data and succeeding I or P-frame data. These digital frame formats are described in detail in the following international standards: ISO/IEC 13818-1, 2, 3 (MPEG-2) and ISO/IEC 11172-1, 2, 3 (MPEG-1). Documents that describe these standards (hereafter referred to as the "MPEG specifications") are available from ISO/IEC Copyright Office Case Postale 56, CH 1211, Genève 20, Switzerland.
As explained above, video frames cannot be created from P and B-frame data alone. To recreate video frames represented in P-frame data, the preceding I or P-frame data is required. Thus, a P-frame can be said to "depend on" the preceding I or P-frame. To recreate video frames represented in B-frame data, the preceding I or P-frame data and the succeeding I or P-frame data are required. Thus, B-frames can be said to depend on the preceding and succeeding I or P-frames.
Inter-frame compressed formats present a problem to video editors, because the removal or editing of one frame may affect or render unintelligible one or more other frames. Therefore, as a preliminary task before editing a video encoded in an inter-frame compressed format, the video is converted to a format in which the inter-frame dependencies are removed. For example, an MPEG encoded video may be converted to a format in which each frame is represented by a JPEG image whose content does not depend on the content of any other frame. Formats in which the inter-frame dependencies have been removed are referred to herein as independent-frame formats. Once in independent-frame format, a video may be edited without worry of creating problems related to dependencies between frames.
While a video is being converted from an inter-frame compressed format to an independent-frame format, it is often desirable to display the video that is being converted. Unfortunately, the overhead associated with converting and playing the video is such that many older computer systems are incapable of keeping up with the incoming video stream. This is particularly true if the video being converted is a high definition video that is being streamed to an older computer over a fast I/O connection. For example, a relatively older computer may not have the computational power necessary to convert an HDV stream, a format based on MPEG-2 transport stream with high definition MPEG-2 video and MPEG-1 layer 2 audio, as it arrives over a FireWire connection from an HDV camera.
As used herein, the term "high definition video" refers to any video format with higher resolution or frame rate than standard definition. For example, a frame dimension of 720×480 at 60 frames per second is high definition because it has a higher frame rate than NTSC. Most common high definition formats are 1280×720 at 60 frames per second and 1920×1080 at 60 fields (30 interlaced frames) per second. HDV is an example of one format that carries high definition video.
The approaches described in this section are approaches that could be pursued, but not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated, it should not be assumed that any of the approaches described in this section qualify as prior art merely by virtue of their inclusion in this section.

Spooling during video format conversions


Embodiments of the disclosure include a method and apparatus for detecting and removing cycle slip. A phase-modulated signal having a plurality of phase-modulated symbols is received at an optical receiver, and, for each phase-modulated symbol, a phase-error estimate of a phase error of the phase-modulated symbol is generated. The presence of a cycle slip is then detected based on the phase-error estimates, and, a phase of each of one or more of the received phase-modulated symbols is adjusted to remove the detected cycle slip without adjusting a local oscillator.

1. Technical Field
The disclosure relates to signal communications, and, more specifically but not exclusively, to correcting phase errors in signal communications.
2. Description of the Related Art
This section introduces aspects that may be helpful to facilitating a better understanding of the invention(s). Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is in the prior art or what is not in the prior art.
In conventional coherent communications systems, the phase of the receiver's local oscillator might not match the phase of the transmitter's local oscillator. If this phase mismatch is not corrected at the receiver, then the receiver might not properly recover data transmitted from the transmitter to the receiver. One method of correcting this phase mismatch is to adjust the receiver's local oscillator such that the phase of the receiver's local oscillator closely or exactly matches that of the transmitter's local oscillator. Such phase match can be accomplished using a phase-locked loop. However, in some systems such as optical systems, phase-locked loops can be complicated, expensive, and unreliable.
Rather than using a phase-locked loop to correct the phase mismatch, digital signal processing can be used downstream of the receiver's local oscillator to estimate and correct phase errors of complex symbols carried in the received signal without adjusting the phase of the receiver's local oscillator. Such digital processing may include both (i) coarse phase-error estimation and (ii) fine phase-error estimation.
In general, coarse phase-error estimation may be performed by estimating the phase errors of pilot symbols that are intermittently embedded in the received signal by the transmitter. The expected phases of the pilot symbols are known a priori by the receiver, and the receiver uses this knowledge to estimate the phase errors of the pilot symbols. The estimated phase errors of the pilot symbols are further used to estimate phase errors of complex data symbols transmitted between the pilot symbols. Techniques for performing the pilot-aided coarse phase-error estimation are known and therefore are not described herein.
The use of pilot symbols in coarse phase-error estimation does not account for phase wandering that exists in-between the intermittent pilot symbols (i.e., among the data symbols). Therefore, fine phase-error estimation may be performed to improve the phase-error estimates of the data symbols between the pilot symbols. One method for performing fine phase-error estimation, known as a blind phase search, is described in Pfau et al., "Hardware-Efficient Coherent Digital Receiver Concept with Feedforward Carrier Recovery for M-QAM Constellations," Journal of Lightwave Technology, Vol. 27, No. 8, pp. 989-999 (Apr. 15, 2009), the teachings of all of which are herein incorporated by reference in their entirety. Another method for performing fine phase-error estimation, known as the Viterbi and Viterbi algorithm is described in Savory, "Digital Coherent Optical Receivers: Algorithms and Subsystems," IEEE Journal of Selected Topics in Quantum Electronics, Vol. 16, No. 5, pp. 1164-1179 (September-October 2010), the teachings of all of which are incorporated herein by reference in their entirety.
After compensating for coarse and fine phase errors, there may be some relatively small residual phase errors in the compensated complex symbols that cause relatively insignificant degradation in the recovered signal quality. In addition to these residual phase errors, there is a possibility of a cycle slip, which may be more detrimental than the small residual phase errors. A cycle slip occurs when a stream of adjacent complex symbols are in error such that each complex symbol in the stream falls into a quadrant (in the case of QPSK and QAM) of the modulation constellation that is different from the quadrant used to generate the complex symbol. If the stream of errors is relatively long, then the errors might not be correctable using forward-error correction which usually has a limited burst-error correction capability.

Detection and removal of cycle slip from received signals


There is provided: a CPU that, in at least one case among a case in which fluctuation of a fixed interval in the acquired parallax amount is greater than a predetermined value, and a case in which the parallax amount reaches a predetermined allowed limit value, or a case in which an object of acquisition of the parallax amount can no longer be detected, judges that there is an abnormality in the parallax amount, and that, in a case that is none of these, judges that there is no abnormality in the parallax amount, and that, when it is judged that there is no abnormality in the parallax amount, carries out first parallax adjustment, and that, when it is judged that there is an abnormality in the parallax amount, switches to control of a second parallax adjustment and carries out parallax adjustment.

There is conventionally proposed a compound-eye image pickup device that has plural image pickup sections and generates a stereoscopic image. The compound-eye image pickup device generates the stereoscopic image on the basis of plural viewpoint images that are generated by the plural image pickup sections respectively, and displays this stereoscopic image on a monitor for stereoscopic display.
The stereoscopic feel of the stereoscopic image that is picked-up at the compound-eye image pickup device depends on distance between the both eyes of the user and the distance from the monitor for stereoscopic display to the user, and therefore, there is the problem that, with regard to the stereoscopic function of the compound-eye image pickup device, differences between individuals are great. Thus, in a compound-eye image pickup device, the parallax of the plural viewpoint images can be adjusted in accordance with operation of the user, and the stereoscopic feel of the stereoscopic image is thereby adjusted.
Thus, in Japanese Patent Application Laid-Open No. 2005-73012 (hereinafter called Patent Document 1), there is disclosed a technique of carrying out parallax amount adjustment that suits the intentions of the user who carried out the parallax amount adjustment initially, regardless of the type of the display that displays the stereoscopic image.
In the technique of Patent Document 1, information relating to adjustment of the parallax amount is created on the basis of a request to change the parallax amount, and this is converted into information of a unit that does not depend on the type of the display, and is recorded. Then, when the recorded information is read-out, information relating to adjustment of the parallax amount is created on the basis of this information, and an image for stereoscopic display is generated on the basis of this information.
Further, in Japanese Patent Application Laid-Open No. 2004-221700 (hereinafter called Patent Document 2), there is disclosed a technique of specifying the parallax that suits the intentions of the user while the stereoscopic image is being displayed.
In the technique of Patent Document 2, the limit parallax of a stereoscopic image that was displayed on a display device is specified in accordance with the instruction of a user, and image processing is carried out so that the appropriate parallax is realized before the stereoscopic image is displayed.
However, when there are problems in the initial stage, e.g., when there are problems with the parallax amount itself that is determined from the plural viewpoint images obtained by the image pickup sections, or when the object of parallax adjustment can no longer be detected, there is the problem that parallax adjustment cannot be carried out appropriately even if the techniques of Patent Documents 1 and 2 are used.
The present invention is proposed in view of these circumstances, and an object thereof is to provide a playback device, a compound-eye image pickup device, a playback method and a non-transitory computer readable medium, that can carry out parallax adjustment appropriately even when there are problems with the parallax amount itself that is determined from plural viewpoint images or when the object of parallax adjustment can no longer be detected.

This patent is subject to a terminal disclaimer.

Playback device, compound-eye image pickup device, playback method and non-transitory computer readable medium


A connector with a heat sink to prevented a card from being damaged due to friction when the card is inserted or removed includes a frame provided with two guide arms and two elastic members, each guide arm containing two chutes, each chute containing an upper and a lower limit zones; a pressurizing-down mechanism connected to the frame, a leading post received in the chute being disposed on each side arm, and a heat sink being provided on top; card insertion driving the pressurizing-down mechanism to move with its leading post in the chute for the heat sink to contact the card to conduct the heat generated from the card; and the elastic member moving the pressurizing-down mechanism into the upper limit zone to remove the card.

According to Mole's Law applied in the manufacturing process of semiconductor, more and more electronic components tend to be made smaller in size thanks to advanced development of technology. With reduced size, waste heat generated by power consumed in the transition of signals becomes critical to the service life of those electronic components. Generally, the higher the temperature rises, the service life of an electronic device gets shorter. How to equip the electronic device with a perfect heat sink to dissipate heat before demanding faster transmission speed on the electronic device is extremely important. Without effective heat dissipation, the electronic device fails to execute long-time operation and prevents reliable operation of the entire system.
As illustrated in FIG. 1 of the accompanying drawings, a card connector taught in Taiwan Patent No. M279910 achieves the purpose of heat dissipation by connecting a heat sink to a card. Wherein, the connector 1 includes a heat sink 2; the heat sinks contacts one side of a card C inserted into a connecting portion 3; and an elastic device 4 to drive the heat sink 2 to advance to the side of the card C. A pressurizing-down rod 5 contains a cam portion 6. The heat sink 2 operates on a first cam surface 7 when the card C is inserted; and operates on a second cam surface 8 when the card C is ejected. This functioning mechanism is provided in conjunction with a PCMCIA card. When the PCMCIA card in inserted, the heat sink 2 lays flushed on a surface of the PCMCIA card. However, the cam portion 6 is only single sided; and the PCMCIA become vulnerable to be damaged since friction takes place between the heat sink 2 surface of the PCMCIA card each time the PCMCIA card inserted into the connector 1. Therefore, the poor design of the prior art prevents effective expansion of its application aspect.


A passive-matrix, thin-film electro-luminescent display system includes a display having a substrate with organic layers and orthogonally arranged electrodes formed thereon. One or more display drivers: (i) receives an input image signal for addressing the light-emitting elements of the display; (ii) decomposes the signal into a low-resolution component signal and a high-resolution component signal, wherein the low-resolution component signal contains one half or less of the number of addressable locations as the high-resolution component signal; and (iii) that provides a drive signal for driving the display wherein the low-resolution component signal and the high-resolution component signal are independently provided to the display to form a combined image.

Numerous technologies for forming flat-panel displays are known in the art. One such technology is the electro-luminescent display, which is formed by coating a thin layer of electro-luminescent material between a pair of electrodes. Displays employing this technology produce light as a function of the current between the two electrodes when the electro-luminescent materials are electrically stimulated. Electro-luminescent displays are primarily classified as active-matrix or passive-matrix displays. Active-matrix displays employ a relatively complex, active circuit at each pixel in the display to control the flow of current through the electro-luminescent material layer(s). The formation of this active circuit at each pixel can be expensive and often the performance of these circuits is somewhat limited. Passive-matrix displays are much simpler in their construction. Each pair of electrodes at each pixel is formed by the intersection of a row and a column electrode. As this type of display does not require the costly formation of active circuits at each pixel site, they are much less expensive to construct.
Referring to FIGS. 13 and 14, a prior-art display is illustrated having electrodes 12 and 16 with an electro-luminescent layer 14 formed between the electrodes 12 and 16 and responsive to a current provided by the electrodes 12 and 16 to produce light. The two electrodes 12 and 16 are typically patterned in orthogonal directions 8 and 6 over a substrate 10 and driven by external row and column drivers (not shown) connected to the electrodes 12 and 16.
While passive-matrix displays can be much less expensive to construct than active-matrix displays, they often suffer from relatively severe operational limitations, for example, resolution and refresh rate limitations, which restrict the commercial application of the passive-matrix displays to small, very low-resolution displays. Because of these limitations, the typical passive-matrix thin-film EL display is less than 2 inches in diagonal and has fewer than 150 lines of light-emitting elements. One of the more severe of these limitations occurs due to the fact that the thin-film EL display is formed from a very thin layer of relatively high-resistance EL material between a pair of metal electrodes. In this configuration, the EL pixel has a very high capacitance and when driving this pixel in a display, enough current must be provided to the pixel to overcome the capacitance before the pixel can emit light. Of course, the larger the pixel, and the thinner the electro-luminescent material, the larger the capacitance and the more energy that is required to overcome this capacitance before light is produced. Therefore, large displays employing thin films of electro-luminescent materials will require significant power to overcome the capacitance of the pixels in the display.
This power issue is further worsened for passive-matrix displays having a relatively higher resolution as these displays are typically addressed by placing a reference voltage on a single row electrode, e.g., second electrode 16 shown in FIGS. 13 and 14, in the display and then providing pixel voltages on each column line, e.g., first electrode 12, simultaneously. In this addressing scheme, a pre-charge current is provided to each pixel to overcome the capacitance of each pixel, current is provided to the EL pixels to produce light, the voltages are then changed to switch the row of pixels into reverse bias, draining the capacitance, and then the next line is addressed. To provide a flicker-free image, this process needs to be completed for each line in the display at a rate around 70 Hz. Therefore, as the number of lines on the display is increased, the amount of power that is dissipated by charging and discharging the capacitance of the light-emitting elements in the display increases. Further, it is necessary to turn on and off a large number of rows of data at the very high rates that occur when the display has a large number of lines (e.g., significantly more than 100 lines) that have to be refreshed at a rate of 70 Hz. Accordingly, it becomes very expensive to construct drivers that are capable of providing high enough currents to perform the required process of pre-charging each pixel, providing current to light each pixel, and then providing sufficient reverse bias in order to perform this refresh process. Therefore, it is not only necessary to reduce the amount of power that is dissipated in pre-charging and reverse biasing each light-emitting element, but to also reduce the peak current that must be provided by the drivers.
Many different solutions for overcoming or avoiding these problems have been suggested. For example, U.S. Pat. No. 6,980,182, issued Dec. 27, 2005 to Nimmer et al, entitled "Display System," suggests patterning an insulating layer over a subset of the rows of the display before depositing the column lines, forming numerous layers of independently addressable row drivers. Different row and column drivers are then used to drive the different rows of the display within each layer of the row drivers. In this way, the amount of current that must be provided by any single driver is reduced as it is divided among two or more drivers. While this does make any single driver for the display less expensive, it requires multiple drivers, which can add significant cost to the overall system.
US Patent Application 2002/0101179, filed Dec. 27, 2001 by Kawashima, entitled "Organic Electroluminescence Driving Circuit, Passive Matrix Organic Electroluminescence Display Device, and Organic Electroluminescence Driving Method," suggests driving the passive-matrix display using two power supplies. The first power supply serves as a "voltage holding" supply. The second of these power supplies is used to provide current to activate the light-emitting elements of the display (i.e., provide current to light each light-emitting element). In such a device, all but the active light-emitting elements are attached to the voltage holding supply. This power supply maintains the charge in the capacitors at or near the threshold of the light-emitting diodes such that the light-emitting elements do not have to be charged or discharged. Besides adding the cost of a second power supply, such displays will often have leakage current near this threshold, and therefore require power to be dissipated even when the display is intended to be dark, which of course also elevates the black level of the display somewhat as the light-emitting elements will produce a small amount of light in response to this leakage current.
A similar approach is employed in U.S. Pat. No. 6,486,607, issued Nov. 26, 2002, by Yeuan, entitled "Circuit and System for Driving Organic Thin-Film Elements," which discusses an electronic circuit that allows the light-emitting elements to be pre-charged via the row line on the cathode while constant current is provided via the column line, attached to the anode. In this way, the light-emitting elements may be pre-charged by a power supply on the row drivers while a power supply on the column drivers is used to provide power to activate the light-emitting elements.
US Patent Application 2005/0219163, filed Apr. 25, 2002 by Smith et al., entitled "Display Driver Circuits for Organic Light-Emitting Diode Displays with Skipping of Blank Lines," discusses constructing a driver that contains a frame buffer and image processing methods that makes it possible to analyze the information before it is displayed. In the approach that is discussed, each row of input data is analyzed to determine if any row is substantially black. If it is, the drivers skip the line while driving the display such that power is not wasted to pre-charge and then reverse bias each of the light-emitting elements within a row of pixels that will not be activated. Unfortunately, this approach will only reduce power under very specific display conditions and is not generally applicable to large graphic displays, which often employ text on white backgrounds; and, therefore, will rarely display a black line.
While each of the previously discussed approaches attempt to avoid the problems of power dissipation due to pre-charging and reverse biasing the light-emitting elements or reducing the current that any single driver is required to provide, each of these approaches apply the same basic drive technique. A different approach to driving a passive matrix display is employed in WO 2006/035248, filed Sep. 30, 2004 by Smith et al., however, which discusses an approach that allows all of the light-emitting elements of a display to be lit simultaneously. In such an approach, the driver employs a frame buffer to store an input image. This input image is then analyzed and a number of orthogonal pairs of matrices are formed and stored, which may be used to approximately describe the content of the image. One of the matrices in each orthogonal pair is then used to provide a signal to the row drivers while the second of the matrices in the same orthogonal pair is used to provide a signal to the column drivers. These row and column driver inputs are then updated to display each of the orthogonal pairs of matrices during each image update cycle. Using this method, pre-charging and reverse biasing of the light-emitting elements are avoided, reducing the overall power required to drive the passive matrix display and decreasing the instantaneous current load that is required from each of the drivers. Unfortunately, the image processing that is required to create the orthogonal pairs of matrices is significant, especially when such processing must be accomplished in real time and at rates of 30 Hz or higher. Further, the drivers must be equipped with significant memory and be capable of driving each row to several drive voltage levels. These features can add significant cost to the drive electronics, which are required to drive the thin-film EL display, significantly increasing the cost of the overall display system.
There is a need; therefore, for a method of controlling and driving passive-matrix displays that enables the use of lower-cost drivers, reduces the power consumption, and improves the resolution of the passive-matrix display.

Passive matrix thin-film electro-luminescent display


The invention provides a spinal disc implant comprising a ring shaped body including a first pair of opposed substantially parallel sides spaced apart by a second pair of opposed sides to define a central bore. A first one of the second pair of sides defines a substantially arcuate curve joining a first end of the first pair of sides. A second one of the second pair of opposed sides substantially linearly joins a second end of the first pair of sides. The upper and lower surfaces of the ring shaped body have a plurality of teeth extending therefrom for engaging adjacent vertebrae. The implant is made of a biocompatible metal such as titanium or an alloy thereof, and the first and second sides tapering from the second end to the first end. The interior space may have a porous hydroxyapatite block shaped to fill the interior space. The porous hydroxyapatite substance helps the prosthesis integrate into the vertebral structure by allowing one grow into the pores.

Many types of vertebral prostheses have been proposed and patented for implantation in the vertebral disc space after surgical removal of a diseases or damaged disc. Such devices fall into several broad categories. One category includes prostheses advocates the use of pliable synthetic materials in an attempt to mimic the compressibility of the natural human spinal disc. For example, U.S. Pat. No. 5,171,281 (Parsons) discusses a disc spacer which purports to possess mechanical properties akin to those of the normal disc by varying the hardness of the elastomeric material in its nucleus and annulus. U.S. Pat. No. 5,192,326 (Bao) illustrates a prosthetic disc formed from a multiplicity of hydrogel beads having a water content of at least 30%. A semi-permeable membrane covers the beads and is said to permit fluids to flow in and out of the prosthetic nucleus. U.S. Pat. No. 5,071,437 (Steffee) has another approach to a pliable implant. That approach involves upper and lower flat rigid plates sandwiching an elastomeric core made from a polyolefin rubber. U.S. Pat. No. 5,002,576 (Fuhrmann) also discusses a variant on the foregoing approach.
Another approach involves attempts to mimic the shape of a natural spinal disc. U.S. Pat. No. 4,714,469 (Kenna) discusses a spinal implant adapted to replace a disc between adjacent vertebrae using a predetermined thickness and profile to match the space between the vertebrae. The implant includes a porous coating on its surface. U.S. Pat. No. 4,759,766 (Buettner-Janz) illustrates a metallic disc endoprosthesis which has two symmetrical, concave end plates with an intermediate spacing piece. Similarly, U.S. Pat. No. 5,314,477 (Oka) discusses a disc prosthesis including two plates separated by a joint composed of a spherical cap and cylindrical base which attempts to ensure connection between the vertebrae.
Some prostheses emphasize mimicking the shape of the space formed by adjacent vertebral bodies. For example, according to the patentee of U.S. Pat. No. 5,320,644 (Baumgartner), he provides a disc prosthesis having a wedge shape having a wedge angle from the ventral to the dorsal side. The patent says the disc has parallel slits arranged at a right angle to its axis which partly overlap one another, forming leaf springs for transmission of forces from one attachment surface to another. U.S. Pat. No. 5,306,309 (Wagner) provides a spinal disc implant having a right rectangular body including two opposed side faces and two opposed transverse faces. According to the patentees, a convexly curved anterior face defines one end of the right rectangular body, and an outwardly curved face of about that of the anterior surface of a human vertebra.
Each of the foregoing prostheses, however, while addressing some problems, presents others. It is therefore a principal object of the invention to provide a disc prosthesis whose design takes into consideration the anatomy and particularly the geometry of the intervertebral space sought to be filled by the prosthetic device. It is an important and further object to provide a spinal disc prothesis which integrates well with the vertebral bone tissue of adjacent vertebral bodies between which the device is inserted.


A data segmentation circuit is disclosed for use in DS3/STS-1 mapping. The data segmentation circuit uses a circular data buffer to store data for mapping. A recirculating barrel shifter is used for extracting data from within the buffer. A counter moves the barrel shifter window zero, one, five, or eight bits to align the barrel shifter output as necessary to extract a next datum for a next payload envelope location. Data stuffing is then performed. Control circuitry for providing throttling and bit stuffiing as required in an STS-1 information payload is disclosed.

Barrel shifters are known electronic circuits. A barrel shifter comprises a buffer and a means for providing a movable window at an output thereof. In a recirculating barrel shifter, the buffer is circular and when the window keeps moving around the circular buffer--its start location incremented between cycles.
Barrel shifters are used for data decompression when variable bit compression schemes are used. Barrel shifters are also used in arithmetic function implementations, circular buffer circuits, parallel processing, control systems, and so forth. The use of barrel shifters in different applications has been included in patent applications since at least as early as Feb. 22, 1982. The use of barrel shifter circuits for encoding and decoding as described in some of the patents below, applies to compression and decompression algorithms where a plurality of bits is compressed into a smaller number of bits and look up tables are necessary to determine a shift amount for each processing cycle.
Examples of U.S. Patents describing circuits or systems using barrel shifters include U.S. Pat. No. 5,650,781 entitled Apparatus for decoding variable length codes; U.S. Pat. No. 5,646,874 entitled Multiplication/multiplication-accumulation method and computing device; U.S. Pat. No. 5,646,873 entitled Barrel shifter device and variable-length decoder; U.S. Pat. No. 5,642,115 entitled Variable length coding system; U.S. Pat. No. 5,634,065 entitled Three input arithmetic logic unit with controllable shifter and mask generator; U.S. Pat. No. 5,621,405 entitled Variable-length decoding apparatus using relative address; U.S. Pat. No. 5,619,200 entitled Code table reduction apparatus for variable length decoder; U.S. Pat. No. 5,619,198 entitled Number format conversion apparatus for signal processing; U.S. Pat. No. 5,604,499 entitled Variable-length decoding apparatus; U.S. Pat. No. 5,600,847 entitled Three input arithmetic logic unit with mask generator; U.S. Pat. No. 5,594,927 entitled Apparatus and method for aligning data transferred via DMA using a barrel shifter and a buffer comprising of byte-wide, individually addressabe FIFO circuits; U.S. Pat. No. 5,590,350 entitled Three input arithmetic logic unit with mask generator; U.S. Pat. No. 5,561,690 entitled High speed variable length code decoding apparatus; U.S. Pat. No. 5,557,734 entitled Cache burst architecture for parallel processing, such as for image processing; U.S. Pat. No. 5,557,563 entitled Data processing method and apparatus including iterative multiplier; U.S. Pat. No. 5,555,202 entitled Low-power, high-performance barrel shifter; U.S. Pat. No. 5,553,010 entitled Data shifting circuit capable of an original data width rotation and a double data width rotation; U.S. Pat. No. 5,542,074 entitled Parallel processor system with highly flexible local control capability, including selective inversion of instruction signal and control of bit shift amount; U.S. Pat. No. 5,532,949 entitled Barrel shifter; U.S. Pat. No. 5,529,071 entitled Increasing dynamic range with a barrel shifter; U.S. Pat. No. 5,526,296 entitled Bit field operating system and method with two barrel shifters for high speed operations; U.S. Pat. No. 5,517,436 entitled Digital signal processor for audio applications; U.S. Pat. No. 5,509,129 entitled Long instruction word controlling plural independent processor operations; U.S. Pat. No. 5,499,382 entitled Circuit and method of bit-packing and bit-unpacking using a barrel shifter; U.S. Pat. No. 5,481,583 entitled Higher order preinterpolator for backprojection; U.S. Pat. No. 5,479,527 entitled Variable length coding system; U.S. Pat. No. 5,477,477 entitled Data shifting circuit by utilizing MOS barrel shifter; U.S. Pat. No. 5,471,628 entitled Multi-function permutation switch for rotating and manipulating an order of bits of an input data byte in either cyclic or non-cyclic mode; U.S. Pat. No. 5,465,223 entitled Barrel shifter; U.S. Pat. No. 5,465,222 entitled Barrel shifter or multiply/divide IC structure; U.S. Pat. No. 5,463,638 entitled Control device for interface control between a test machine and multi-channel electronic circuitry, in particular according to boundary test standard; U.S. Pat. No. 5,457,723 entitled Barrel shifter having CMOS structure integrated on MOS integrated circuits; U.S. Pat. No. 5,450,607 entitled Unified floating point and integer datapath for a RISC processor; U.S. Pat. No. 5,432,512 entitled Apparatus for decoding variable length codes; U.S. Pat. No. 5,420,584 entitled Data converter with barrel shifter; U.S. Pat. No. 5,416,731 entitled Highspeed barrel shifter; U.S. Pat. No. 5,404,138 entitled Apparatus for decoding variable length codes; U.S. Pat. No. 5,343,195 entitled Variable length codeword decoding apparatus; U.S. Pat. No. 5,381,454 entitled Circuit and method of resetting a data compressor/decompressor; U.S. Pat. No. 5,309,156 entitled Variable-length code decoding device; U.S. Pat. No. 5,295,250 entitled Microprocessor having barrel shifter and direct path for directly rewriting output data of barrel shifter to its input; U.S. Pat. No. 5,282,152 entitled Integer-based 18-bit RGB to 5-bit gray scale conversion device and method therefor; U.S. Pat. No. 5,262,971 entitled Bidirectional shifter; U.S. Pat. No. 5,247,627 entitled Digital signal processor with conditional branch decision unit and storage of conditional branch decision results; U.S. Pat. No. 5,245,637 entitled Phase and frequency adjustable digital phase lock logic system; U.S. Pat. No. 5,245,338 entitled High-speed variable-length decoder; U.S. Pat. No. 5,241,490 entitled Fully decoded multistage leading zero detector and normalization apparatus; U.S. Pat. No. 5,237,667 entitled Digital signal processor system having host processor for writing instructions into internal processor memory; U.S. Pat. No. 5,223,832 entitled Serial data transmission circuit; U.S. Pat. No. 5,222,241 entitled Digital signal processor having duplex working registers for switching to standby state during interrupt processing; U.S. Pat. No. 5,220,670 entitled Microprocessor having ability to carry out logical operation on internal bus; U.S. Pat. No. 5,206,940 entitled Address control and generating system for digital signal-processor; U.S. Pat. No. 5,187,678 entitled Priority encoder and floating-point normalization system for IEEE 754 standard; U.S. Pat. No. 5,173,695 entitled High-speed flexible variable-length-code decoder; U.S. Pat. No. 5,161,117 entitled Floating point conversion device and method; U.S. Pat. No. 5,155,698 entitled Barrel shifter circuit having rotation function; U.S. Pat. No. 5,146,220 entitled Data conversion method and apparatus for converting undefined length data to fixed length data; U.S. Pat. No. 5,144,573 entitled Barrel shifter with parity bit generator; U.S. Pat. No. 5,130,941 entitled Dynamic barrel shifter; U.S. Pat. No. 5,130,940 entitled Barrel shifter for data shifting; U.S. Pat. No. 5,081,700 entitled Apparatus for high speed image rotation; U.S. Pat. No. 5,060,242 entitled Non-destructive lossless image coder; U.S. Pat. No. 5,045,993 entitled Digital signal processor; U.S. Pat. No. 5,040,138 entitled Circuit for simultaneous arithmetic calculation and normalization estimation; U.S. Pat. No. 5,031,135 entitled Device for multi-precision and block arithmetic support in digital processors; U.S. Pat. No. 5,029,121 entitled Digital filter processing device; U.S. Pat. No. 5,027,306 entitled Decimation filter as for a sigma-delta analog-to-digital converter; U.S. Pat. No. 4,983,958 entitled Vector selectable coordinate-addressable DRAM array; U.S. Pat. No. 4,980,853 entitled Bit blitter with narrow shift register; U.S. Pat. No. 4,979,175 entitled State metric memory arrangement for a viterbi decoder; U.S. Pat. No. 4,979,139 entitled Arithmetic unit for exponential function; U.S. Pat. No. 4,973,956 entitled Crossbar switch with distributed memory; U.S. Pat. No. 4,962,511 entitled Barrel shifter; U.S. Pat. No. 4,962,500 entitled Data processor including testing structure for a barrel shifter; U.S. Pat. No. 4,958,311 entitled Composite finite impulse response digital filter; U.S. Pat. No. 4,943,941 entitled Floating point processor employing counter controlled shifting; U.S. Pat. No. 4,939,684 entitled Simplified processor for digital filter applications; U.S. Pat. No. 4,914,622 entitled Array-organized bit map with a barrel shifter; U.S. Pat. No. 4,905,178 entitled Fast shifter method and structure; U.S. Pat. No. 4,901,263 entitled Versatile data shifter with sticky bit generation capability; U.S. Pat. No. 4,899,302 entitled Arithmetic unit for inverse trigonometric function; U.S. Pat. No. 4,887,232 entitled Apparatus and method for performing a shift operation in a multiplier array circuit; U.S. Pat. No. 4,862,407 entitled Digital signal processing apparatus; U.S. Pat. No. 4,839,840 entitled Highly responsive barrel shifter; U.S. Pat. No. 4,839,839 entitled Barrel shifter including rotate operation; U.S. Pat. No. 4,831,571 entitled Barrel shifter for rotating data with or without carry; U.S. Pat. No. 4,829,460 entitled Barrel shifter; U.S. Pat. No. 4,827,441 entitled Barrel shifter; U.S. Pat. No. 4,817,047 entitled Processing circuit capable of raising throughput of accumulation; U.S. Pat. No. 4,811,268 entitled Processing circuit capable of raising throughput of accumulation; U.S. Pat. No. 4,807,043 entitled Two-dimensional facsimile encoding apparatus with coding and reference line windowing means and color change detectors; U.S. Pat. No. 4,782,457 entitled Barrel shifter using bit reversers and having automatic normalization; U.S. Pat. No. 4,779,223 entitled Display apparatus having an image memory controller utilizing a barrel shifter and a mask controller preparing data to be written into an image memory; U.S. Pat. No. 4,779,220 entitled Floating-point data rounding and normalizing circuit; U.S. Pat. No. 4,760,544 entitled Arithmetic logic and shift device; U.S. Pat. No. 4,755,810 entitled Frame buffer memory; U.S. Pat. No. 4,747,154 entitled Image data expanding and/or contracting method and apparatus; U.S. Pat. No. 4,740,993 entitled Digital companding circuit; U.S. Pat. No. 4,665,538 entitled Bidirectional barrel shift circuit; U.S. Pat. No. 4,653,019 entitled High speed barrel shifter; U.S. Pat. No. 4,512,018 entitled Shifter circuit; and U.S. Pat. No. 4,488,252 entitled Floating point addition architecture.
In the past, three common approaches to variable bit encoding were used. The earlier of these methods, serial input to serial output, is useful at low communication rates as were common until a few years ago. A hybrid, serial input to parallel output, suffers disadvantages outlined below. The latter, parallel input to parallel output, is useful at higher bit rates and is advantageous over the earlier approach.
Devices incorporating the earlier, and more common, approach provide a serial stream of bits at an output thereof. Data is provided to the encoder device. The data is encoded according to an encoding algorithm and the encoded data is provided to a shift register. The shift register acts as a 1 bit wide FIFO (first in first out memory) and all the bits are shifted toward the output. Each clock cycle, a bit is extracted from the shift register and all the bits are again shifted. New bits provided to the shift register are shifted down until they are adjacent to any previously provided bits that are awaiting extraction.
It is evident that such a device is very suitable for low speed operation. At speeds of kilobits per second, or even several megabits per second, circuit speeds for current semiconductor technology, integrated circuit costs, and noise considerations are easily balanced to provide working circuitry.
In known serial input to parallel output shift registers, a serial bit stream is clocked through a series of serial registers and latched into parallel outputs. The number of parallel bits on the output is dependent on the number of bits shifted serially through the registers before a parallel latch is enabled.
Such a device has certain known shortcomings, for example, in a bit stuffing multiplexer circuit. A bit stuffing multiplexer inputs a signal at one frequency and stuffs (adds) bits into that signal, thus outputting a signal at a higher frequency. Such are useful in multiplexing schemes for interleaving signals of different rates. See, for example, American National Standards for Telecommunications, Digital Hierarchy-Optical Interface Rates and Formats Specification, ANSI T1.105-1988. The multiplexer circuit consists of a buffer, buffer write controller and a buffer read controller. The serial input to parallel output shift register will be located in the write controller and will generate the bit stuffing pattern by outputting gaps in the input signal where stuff data will be located. The read controller will generate the output signal framing pattern by placing additional gaps in the input signal.
The shortcomings of the above mentioned device in the bit stuffing multiplexer example are that (1) the location of the start of the bit stuffing pattern determined by the write controller cannot easily be fixed relative to the framing pattern, and (2) a control signal(s) from the write controller to the read controller must be passed through the buffer. The bit stuffing pattern is generated using a clock on the input side of the buffer, a clock that is asynchronous to the output clock. Therefore, when the circuit is initialized, the bit stuffing pattern will start at random locations relative to the framing pattern if control signals were passed through an additional buffer, but padding control signals through a buffer creates other shortcomings. If the circuit writing the control signals into the buffer fails when a control signal is in the buffer then read control circuit data corruption or framing pattern corruption may result.
With the advent of ATM and higher Ethernet speeds, communications systems now operate at speeds up to several Gigabits per second. At these speeds integrated circuit speed and noise pose significant constraints on shift register implementations. Solutions, when possible, require very costly materials or processes to accomplish a shift register implementation of a high speed communications encoding device.
In U.S. Pat. No. 5,272,703 entitled "N-Bit Parallel Input to Variable-Bit Parallel Output Shift Register" in the name of Peters, a parallel input to parallel output shift register is disclosed in an attempt to overcome the limitations of earlier serial to parallel encoding devices. The circuit disclosed recirculates data bits which are not output during the cycle to the shift register for output during a subsequent cycle. This allows for bit stuffing where the output bit rate is lower than the rate at which bits accumulate within the shift register.
A known disadvantage of the circuit described by Peters is that the shift register implementation is complex and requires high speed integrated circuits for the recirculation circuitry where bits must be recirculated within a single clock cycle; during a single clock cycle, the data is provided to a multiplexer, stabilises at the multiplexer input and at the multiplexer output, stabilises at the shift register input, is clocked into the shift register, and stabilises at the shift register output. When using programmable logic such as that available from Xilinx.RTM. a nominal delay of 10 ns results. For eight bit parallel data, a maximum speed of about 800 Megabits per second results.
It would be advantageous to provide a simpler circuit that is capable of operating at higher speeds implemented using similar integrated circuit technologies.


A method or screen for assessing the potential of a compound to treat a pathological condition, such as arrhythmia, which is manifested by an increased late sodium current in a heart is disclosed. The method employs a mutant sodium channel protein having an amino acid sequence in which one or more amino acids among the ten amino acids occurring at the carboxy end of the S6 segments of D1, D2, D3 or D4 domains of mammalian Nav1 differs from the amino acid in wild-type Nav1 by substitution with tryptophan, phenylalanine, tyrosine or cysteine. Cells transfected with a nucleic acid that encodes a mutant mammalian Nav1 protein, as well as isolated nucleic acids comprising a nucleotide sequence that codes for a mutant mammalian Nav1 protein are disclosed.

Mammalian voltage-gated sodium channels are pore-forming membrane proteins responsible for the initiation and propagation of action potentials in excitable membranes in nerve, skeletal muscle and heart cells. The controlled gating of sodium channels in response to membrane depolarizations is necessary for normal electrical signaling and establishing of intercellular communication. Voltage-gated Na+ ion channels consist of one large α-subunit (about 200 kDa) and one or two smaller β-subunits. The α-subunits are designated "Nav" (Na for sodium channel and v for voltage-gated), followed by a numbering system for the particular isoform. The Na+ channel α-subunit isoforms contain four homologous repeated domains (D1–D4) each with six transmembrane segments (S1–S6). The α-subunit protein alone forms a functional channel when expressed in mammalian expression systems. The four repeated domains are hypothesized to assemble as a pseudotetrameric structure with the permeation pathway situated at the center. FIG. 1 is a cartoon depicting one conceptualization of how the Nav protein arranges itself with respect to the membrane. The cartoon is not accurate; it is an expanded model that does not attempt to depict how the four S6 segments come together to form the sodium channel, but it facilitates an understanding of how the proteins might align with respect to the inside and outside of the excitable membrane. In fact, recent studies suggest that four S6 C-termini may jointly close the voltage-gated cation channel at the cytoplasmic side, probably as an inverted teepee structure.
Several pieces of evidence suggest that S6 segments are involved in Na+ channel gating. First, a number of receptors for various therapeutic drugs and neurotoxins such as local anesthetics (LAs), antiarrhythmics, anticonvulsants, antidepressants, pyrethroid insecticides, batrachotoxin (BTX), and veratridine, are situated at the middle of multiple S6 segments. Upon binding, these ligands exert their pharmacological actions on the Na+ channel, presumably in part via their corresponding S6 receptor. In particular, BTX drastically modifies Na+ channel activation, fast inactivation, and slow inactivation, suggesting that its receptor is linked to these gating processes.
The invention herein described arose from a hypothesis that S6 segments may be structurally geared for channel activation by lateral/rotational movement via a flexible gating hinge, a glycine or serine residue located at the middle of the inner Na+ channel S6 segments. This gating hinge could have two different conformations. One is in its relaxed straight α-helical form, which closes the channel at the S6 C-terminal end, and the other is the bendable α-helical form, which may bend outward at a 30° angle and thus splay open the channel at the S6 constricted C-terminus. After channel activation, S6 segments may then form the docking site for the fast-inactivation gate. A putative Na+ channel inactivation gate has been delineated at the intracellular linker between D3 and D4 by West et al. [Proc. Natl. Acad. Sci. USA 89:10910–10914 (1992)]. This linker could be situated at the C-termini of S6 segments, where the inactivation gate may plug the open channel while it binds to its docking site. This plugging mechanism has recently been demonstrated in voltage-gated K+ channels [Zhou et al., Nature 411:657–661 (2001)]. The foregoing hypothesis is useful because it provides a framework for interpreting the results and making predictions. However, it is important to note that the invention is based on the results, not the hypothesis, and the hypothesis should not be viewed as a limitation on the claimed invention.
There is very close homology among the S6 segments of mammalian Nav proteins so far identified. This homology extends both through species and through isoforms of the Nav protein. As can be seen in the comparison below, the few variations that exist among the amino acids in the amino terminal portion of the S6 segments are very conservative replacements, and the carboxy terminal 11 amino acids of the S6 segments of all four domains are identical for rats and humans for both of the muscle sodium channel proteins Nav1.4 and Nav1.5:
D1S6       1     6     11    16    21    26humanNav1.1 YMIFF VLVIF LGSFY LINLI LAVVA MAY(SEQ ID NO.: 1) Nav1.2 YMIFF VLVIF LGSFY LINLI LAVVA MAY(SEQ ID NO.: 2) Nav1.3 YMIFF VLVIF LGSFY LINLI LAVVA MAY(SEQ ID NO.: 3) Nav1.4 YMIFF VVIIF LGSFY LINLI LAVVA MAY(SEQ ID NO.: 4) Nav1.5 YMIFF MLVIF LGSFY LVNLI LAVVA MAY(SEQ ID NO.: 5) Nav1.8 YMIFF vVvIF LGSFY LVNLI LAVVA MAY(SEQ ID NO.: 6) Nav1.9 YMIFF VVVIF LGSFY LINLI LAVVA MAY(SEQ ID NO.: 7) ratNav1.4 YMIFF VVIIF LGSFY LINLI LAVVA MAY(SEQ ID NO.: 8) Nav1.5 YMIFF MLVIF LGSFY LVNLI LAVVA MAY(SEQ ID NO.: 9) Nav1.6 YMIFF MLVIF VGSFY PVNLI LAVVA MAY(SEQ ID NO.: 10) Nav1.7 YMVFF VVVIF LGSFY LVNLI LAVVA MAY(SEQ ID NO.: 11) Nav1.8 YMVFF MLVIF LGSFY LVNLI LAVVA MAY(SEQ ID NO.: 12) D2S6       1     6     11    16    21    26humanNav1.1 CLTVF MMVMV IGNLV VLNLF LALLL SSF(SEQ ID NO.: 13) Nav1.2 CLTVF MMVMV IGNLV VLNLF LALLL SSF(SEQ ID NO.: 14) Nav1.3 CLIVF MLVMV IGNLV VLNLF LALLL SSF(SEQ ID NO.: 15) Nav1.5 CLLVF LLVMV IGNLV VLNLF LALLL SSF(SEQ ID NO.: 16) ratNav1.4 CLTVF LMVMV IGNLV VLNLF LALLL SSF(SEQ ID NO.: 17) Nav1.5 CLLVF LLVMV IGNLV VLNLF LALLL SSF(SEQ ID NO.: 18) D3S6       1     6     11    16    21    26humanNav1.1 MYLYF VIFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 19) Nav1.2 MYLYF VIFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 20) Nav1.3 MYLYF VIFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 21) Nav1.4 MYLYF VIFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 22) Nav1.5 MYIYF VIFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 23) Nav1.8 MYLYF VIFII GGSFF TLNLF VGVII DNF(SEQ ID NO.: 24) ratNav1.4 MYLYF VIFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 25) Nav1.5 MYIYF VVFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 26) Nav1.7 MYLYF VVFII FGSFF TLNLF IGVII DNF(SEQ ID NO.: 27) Nav1.8 MYIYF VVFII FGGFF TLNLF VGVII DNF(SEQ ID NO.: 28) D4S6       1     6     11    16    21    26humanNav1.1 GIFFF VSYII ISFLV VVNMY IAVIL ENF(SEQ ID NO.: 29) Nav1.2 GIFFF VSYII ISFLV VVNMY IAVIL ENF(SEQ ID NO.: 30) Nav1.3 GIFFF VSYII ISFLV VVNMY IAVIL ENF(SEQ ID NO.: 31) Nav1.4 GICFF CSYII ISFLI VVNMY IAIIL ENF(SEQ ID NO.: 32) Nav1.5 GILFF TTYII ISFLI VVNMY IAIIL ENF(SEQ ID NO.: 33) ratNav1.4 GICFF CSYII ISFLI VVNMY IAIIL ENF(SEQ ID NO.: 34) Nav1.5 GILFF TTYII ISFLI VVNMY IAIIL ENF(SEQ ID NO.: 35)
Except for a single I→V change at position 7 of D3S6, the rat and human Nav1.4 and Nav1.5 sequences are identical for all four S6 segments. Because of the very high degree of conservation (in fact identity) of the 11 amino acids at the carboxy termini of the S6 segments, the person of skill in the art expects that substitution in this region will have the same effect on sodium channel function across mammalian species and across isoforms of the Nav1 protein.
The numbering shown in the charts above is the standard numbering used to identify the 28 amino acids in the S6 segments by their position within that segment. A separate system of numbering that may be applied to those same amino acids derives from their position within the sequence of the whole protein. Because the amino acid sequences of members of the Nav family of proteins vary widely outside the transmembrane regions, the protein sequence residue numbers assigned to the corresponding amino acids in the S6 segments differs among species and among sodium channel protein isoforms within species. Thus, the leucine identified as residue 19 in segment 6 in domain 1 (D1S6) is L407 in human Nav1.5, L408 in rat Nav1.5, L441 in human Nav1.4 and L435 in rat Nav1.4. Similarly, the isoleucine identified as residue 23 in segment 6 in domain 4 (D4S6) is I1770 in human Nav1.5, I11771 in rat Nav1.5, I1581 in human Nav1.4 and I1589 in rat Nav1.4. Unless otherwise noted, amino acids will be identified hereinafter, when referring to the whole protein, according to their position in rNav1.4. Thus A438 refers to the alanine that occurs at position 438 in rNav1.4. The invention, however, is not intended to be limited to polypeptides having sequences derived from the rat; rather, corresponding mammalian sequences, including human are encompassed by the invention.

The Research Foundation of State University of New York


A new method of aluminum plug metallization in the manufacture of an integrated circuit device is described. An insulating layer is provided over the surface of a semiconductor substrate. At least one contact opening is provided through the insulating layer to the semiconductor substrate. A barrier metal layer is deposited over the surface of the insulating layer and within the contact opening. An aluminum layer is sputter deposited over the barrier metal layer and within the contact opening wherein a void is left within the contact opening. The aluminum layer is covered with a dielectric layer wherein the expansion coefficient of the dielectric layer is smaller than the expansion coefficient of the aluminum layer. The aluminum layer is reflowed using rapid thermal annealing wherein the overlying dielectric layer forces the aluminum layer to fill the contact opening completing the metallization in the fabrication of an integrated circuit device.

(1) Field of the Invention
The invention relates to a method of metallization of an integrated circuit device, and more particularly, to an aluminum plug metallization method having low cost, low resistance, and few process steps in the manufacture of an integrated circuit device.
(2) Description of the Prior Art
In the fabrication of integrated circuit devices, metal layers make contact to lower conductive layers of the integrated circuit through vias in an insulating layer. Aluminum or an aluminum alloy is often used as the interconnection metal. However, the sputtering process used to apply the aluminum often results in incomplete filling of the via openings due to poor step coverage. Large aluminum grains tend to form on the surface of the insulating layer within the via openings, causing voids. The metal film cannot be melted using rapid thermal annealing (RTA) or furnace methods because of pollution problems. That is, the metal film will flow and become uncontrollable. It will adhere to the walls of the annealing chamber and cause pollution problems. The traditional hot aluminum sputtering method cannot control the grain size of the aluminum, causing metal line formation problems.
Various methods have been proposed to improve aluminum via filling. U.S. Pat. Nos. 5,356,836 to Chen et al, 5,288,665 to Nulman, and 5,171,412 to Talieh et al teach deposition of aluminum in stages at different temperatures. U.S. Pat. No. 5,512,512 to Isobe teaches reflow of the aluminum and U.S. Pat. No. 5,071,791 to Inoue et al teaches heating the wafer while depositing the aluminum. U.S. Pat. No. 4,756,810 to Lamont, Jr. et al discloses radio frequency (RF) excitation to mobilize deposited aluminum to fill holes. In the paper, "A Novel High Pressure Low Temperature Aluminum Plug Technology For Sub-0.5 .mu.m Contact/Via Geometries," by Dixit et al, IEDM 1994, pp. 5.3.1-5.3.4, the authors disclose a method of pressurizing a chamber with Argon to force previously deposited AlCu into via holes. The paper, "A Novel 0.25 .mu.m Via Plug Process Using Low Temperature CVD Al/TiN" by Dixit et al, IEDM 1995, pp. 10.7.1-10.7.3 discloses copper doping an aluminum plug by depositing an overlayer of AlCu.

Taiwan Semiconductor Manufacturing Company, Ltd.


Disclosed is a sterilization apparatus that can kill or inactivate sterilization target organisms present on a body or in the body without damage to human cells and has high energy efficiency. A sterilization apparatus is configured to irradiate a sterilization target organism on a body or in the body with light and thereby killing or inactivating the sterilization target organism. The sterilization apparatus includes: a light source configured to emit light having wavelengths within a wavelength range of 190 nm to 230 nm and a wavelength range of 230 to 300 nm; a power supply unit configured to supply power to the light source; a control unit configured to control the power supply unit; and an optical filter. The power supply unit is controlled by the control unit so that an irradiation amount of light having a wavelength within the wavelength range of 230 to 300 nm in one light irradiation is not more than 9 mJ/cm2.

Sterilization, disinfection and the like using ultraviolet rays (hereinafter, referred to simply as "UV sterilization") have conventionally been used in various fields including food and medical fields. UV sterilization is performed by applying ultraviolet rays to DNA in cells of sterilization target organisms (such as bacteria). Specifically, ultraviolet rays are made to be absorbed by DNA in cells to destroy the genetic code of DNA and prevent normal proliferation and metabolism of the cells, whereby the sterilization target organisms including the cells are inactivated.
In UV sterilization, the genetic code of DNA in cells is destroyed as described above. Unlike inactivation (such as sterilization and disinfection) of target organisms by chemicals, sterilization target organisms therefore will not acquire resistance to ultraviolet irradiation. Unlike chemical-based sterilization, disinfection, or the like, UV sterilization also has an advantage that no chemical or the like remains on the area where the sterilization target organisms are.
UV sterilization is typically applied to organisms (sterilization target organisms) harmful to a human body that are present other than in/on a human body. Examples include surface sterilization of human body-contacting medical instruments (such as a surgical knife and a dental treatment tool) and the like, liquid sterilization targeted for bacteria in water or a solution and air sterilization for killing bacteria present in the air.
Since UV sterilization is extremely effective, there is a high demand for UV sterilization of harmful organisms present on the surface and the like of a human body. For example, to prevent surgical site infection (SSI) which leads to deteriorated hospital readmission rates and death rates, UV irradiation of surgical sites of a human body is considered to be effective. There are also high expectations for UV sterilization in preventing infectious diseases at the sites of wounds, burns, bedsores and the like and at skin implantation sites, and in disinfecting healthy skin, etc.
However, as described above, UV sterilization is performed by destroying the genetic code of DNA in biological cells. If a human body is irradiated with the ultraviolet rays, normal cells of the human body are also damaged as a matter of course. This results in serious troubles in the human body, including photoaging and the occurrence of skin cancer.
From such a reason, UV sterilization has not been widely used as a technique for killing harmful organisms present on/in a human body.
In view of the circumstances, a sterilization apparatus for selectively killing bacteria, or sterilization target organisms, present in a sterilization target site by ultraviolet irradiation without damage to human cells has been proposed in recent years (see Patent Literature 1).
This sterilization apparatus includes a light source that radiates light at least having a wavelength within the wavelength range of approximately 190 to 230 nm, and an optical filter that cuts off light having a wavelength outside the wavelength range of approximately 190 to 230 nm in the light from the light source.
Since such a sterilization apparatus is capable of selective irradiation with only the light within the wavelength range of approximately 190 to 230 nm, the sterilization and disinfection of sterilization target organisms present in a sterilization target site of the body can be performed while substantially avoiding damage to human cells.


A pair of carabiner mounting members are rigidly mounted or mountable to each top rail of a basket rescue stretcher. The carabiner mounting members are mounted or mountable spaced longitudinally apart along the each top rail. Carabiner mounting member extend at least into the stretcher cavity and define a carabiner receiving opening which lies in a first plane which is perpendicular to a vertical second plane containing the corresponding top rail to which the carabiner mounting member is mounted or mountable and which is inclined relative to a horizontal third plane which contains the pair of top rails on opposite sides of the stretcher so that at least the carabiner mounting members which extend into the stretcher cavity are substantially co-planar with their corresponding tether straps when the stretcher is lifted by the straps.

A basket rescue stretcher of the type utilized by emergency personnel is well known. It generally comprises a sturdy, light-weight, open frame manufactured from stainless steel tubing or like material, comprising both longitudinal and lateral components which are secured by welding or the like, into an integral unit. Common to most rescue stretchers of this type is a sturdy peripheral top rail surrounding the basket stretcher opening, which lends rigidity and strength to the stretcher and also provides a convenient hand-hold for emergency personnel when transporting and injured patient.
Conventional basket rescue stretchers are manufactured from stainless steel components, which are welded together. They generally have a sturdy peripheral top rail of 1-inch diameter, which surrounds the basket stretcher opening and one or more intermediate rails of ½ inch diameter material, spaced from and generally parallel to the top rail. Lateral components, or ribs, are secured by welding to the underside of top rail and to the outside of the intermediate rails. The first intermediate rail is generally spaced 2 inches clear of the top rail.
The top rail is generally the most convenient attachment point for a tether such as ropes or webbing or the like, which enable emergency personnel to either raise or lower the basket rescue stretcher adjacent to a building or an escarpment. Such tethers are commonly secured to the top rail by screwgate carabiners, which are inserted through a pre-formed loop made in the tether and clipped over the peripheral top rail. The tether may be a so-called litter bridle or sling arrangement which may include four equal length ropes or webbing belts connected to a single lifting ring.
Such carabiners are sturdy connection devices, ideally suited to quick connection and release situations. They have a smoothly contoured 'D' shape that will only minimally abrade ropes or harnesses. Carabiners may often have corner radii which are smaller than the radius of the tubular top rail. For example a typical top rail may have a radius of ½ to ⅝ of an inch (1 to 1¼ inch diameter) whereas a carabiner may often radius which is significantly smaller. Thus, the difference in top rail and carabiner diameters prevents the carabiner from properly contacting the underside of the top rail of the basket stretcher as tension is applied. In situations where a "shock load" is placed on the basket stretcher, such as if a loaded stretcher was dropped a short distance and then arrested by the carabiners and connecting tethers, opposite sides of the tubular top rail could be crushed slightly, thereby weakening the rail and perhaps rendering the stretcher unsafe for use.
When the carabiner is clipped over the peripheral top rail of a basket rescue stretcher and tension applied to the connecting tethers, the carabiner will slide along the top rail unless the direction of the tension is close to a right angle with the top rail, or movement of the carabiner is arrested by contact with one of the lateral frame components secured to the top rail. Such movement of the connecting point between tether and stretcher in undesirable since it results in an imbalance of both stretcher and patient and could further endanger the patient.
Further, as tension is applied to the tether straps during suspension of the basket stretcher, the top rail of the basket stretcher prohibits the carabiner from rotating so as to lie in the plane of the tether straps or webbing were the webbing to remain flat, resulting in the carabiner being misaligned generally 90 degrees from such an orientation causing a helical twist in the straps or webbing.
Clipping the carabiner over the top rail of the basket stretcher places a portion of the carabiner in an exposed position outside the periphery of the stretcher. Such an outwardly exposed portion may snag on surface irregularities on the adjacent surface of a building or an escarpment as the basket stretcher is raised or lowered resulting in tipping and jerking of the basket stretcher as it elevates or descends. Further, such contact may result in rapid abrading and deterioration of the carabiner.

Carabiner attachment bracket for a basket rescue stretcher


A wavefront device (FIG. 1A) produces adjustable amplitudes in optical path differences and adjustable axis orientation angles, two substantially identical wave plates (225) have a wavefront profile of at least the third order Zernike polynomial function which are not circularly symmetric, as denoted by Z(i,j) where i>3 and jO. The wave plates are mounted in rotatable mounts (124) with their optical centers substantially aligned with each other.

Before the advent of the wavefront aberrometer, many patients' visual symptoms were collectively referred to as a result of "irregular astigmatism". Increasingly, more opthalmologists and optometrists have begun measuring wavefront errors of patients' eye. A wealth of information is now available, that was not heretofore, from auto-refractor or cornea topography measurements. Use of a wavefront map as a diagnosis tool is also gaining popularity, and vision care professionals use it to explain diagnoses to patients having visual complaints.
It is useful to understand the source of a problem. However, patients are most interested in solutions; such as getting rid of visual complaints, and improving their quality of vision. Currently, laser refractive surgery, such as LASIK, is one possible solution. However, laser surgery is invasive and the tissue healing process following surgery can induce its own set of aberrations, often rendering an attempt to correct the pre-operation errors fruitless. It has been proposed to correct high order aberrations (HOA) with non-invasive devices such as spectacles or contact lenses.
It was proposed in US application 2004/0160576A1, which is hereby incorporated by reference, to identify high order wavefront errors with a patient feedback control process. However, lacking in that disclosure is the basis for a patient to adjust each of the wavefront components. The '160576 application does disclose use of visual acuity as a measure to find an end point. As it was pointed out in the '160576 application, an acuity chart, or Snellen letter chart, is not an ideal target for wavefront optimization. More importantly, no method is presented regarding how a patient may choose which Zernike function to vary among the dozens of Zernike functions, without which the patient would have to go on a random walk, using by trial and error on all or substantially all of the Zernike functions. Without a clear step by step procedure, a patient may not even be able to find an optimal sphere, cylinder and axis, much less the high order Zernike components, wherein the effect of those aberrations on acuity is much smaller. The patient might get totally lost in the process, and it might take hours to come to any final optimized combination, if it ever got there at all.

Subjective wavefront refraction using continuously adjustable wave plates of Zernike function


A semiconductor device includes a semiconductor layer disposed at a substrate and a plurality of active cells disposed at the semiconductor layer. Each active cell includes a trench extending into the semiconductor layer and a body region disposed in the semiconductor layer adjacent to a sidewall of the trench and at a first depth below the surface of the semiconductor layer. The semiconductor device further includes a termination cell disposed at the semiconductor layer adjacent to an edge of the plurality of active cells. The termination cell includes a trench extending into the semiconductor layer, and further includes a body region disposed in the semiconductor layer adjacent to a sidewall of the trench of the termination cell and at a second depth less than the first depth. The body regions of the active cells and of the termination cell have a conductivity type different than that of the semiconductor layer.

Field of the Disclosure
The present disclosure relates generally to semiconductor devices and, more particularly, to trench gate field effect transistors.
Description of the Related Art
Trench gate field effect transistors (FETs) frequently are utilized in high-voltage applications. Such transistors often leverage the reduced surface field (RESURF) effect to achieve a relatively low on resistance (RDSon) while maintaining a relatively high breakdown voltage (BVdss). RESURF-based trench gate architectures employ a one-dimensional or two-dimensional array of cells formed in an active region of an epitaxial layer that overlies a substrate that serves as part of a drain electrode structure. Each cell includes a trench extending into the epitaxial layer, with each trench including a gate electrode structure formed therein. Well regions are formed in the mesa regions of the epitaxial layer between the trenches, and a source electrode is connected to the channel regions via a source contact region. The trench gate design also may employ a termination region at a periphery or one or more edges of the active region so as to provide effective edge termination by spreading out the electric field at the edges of the active region. Conventional trench gate FET designs provide edge termination through the use of field rings or field plates. However, the formation of these structures require a significant number of additional process steps during the fabrication process, thus increasing the cost and complexity of manufacturing semiconductor devices based on these designs.


A soccer court comprises a rectangular playing area approximately the size of a tennis court and preferably covered with artificial turf, an enclosing wall with goal openings in the end walls and goal nets disposed outside of the playing area. The enclosing wall is constructed of a plurality of rigid transparent panels held in place by horizontal and vertical supports. Player entry doors are provided in the enclosing wall. The goal may optionally be configured as an inverted U and/or provided with doors to fully or partially close the goal opening. A backstop net is provided above each end wall to block errant shots on the goals, and the playing area may be bisected to create two substantially square training areas.

Soccer is an increasingly popular sport in the United States, especially among young people. The availability of soccer fields, however, is a problem. This is understandable, since a conventional outdoor soccer field is very large, on the order of 120 yards .times.75 yards, or roughly 9000 square yards, upon which only one game of soccer can be played at a time. It will be appreciated that allocation of such a large space raises issues of use and expense, particularly in urban settings, resulting in few proper soccer facilities there. City dwellers must often travel long distances to play soccer, and have limited opportunities to play once they locate a field. Educational institutions must also balance the allocation of such large spaces to soccer fields against competing athletic uses and building sites.
A conventional soccer game requires 22 players on the field. People who are interested in recreational play are disadvantaged because gathering that many people and coordinating them is often inconvenient. Many people interested in soccer are therefore relegated to constructing makeshift fields of smaller size to accommodate smaller groups, using whatever is at hand for goals, boundary lines, and the like. Much time is also spent chasing loose balls when they are kicked out of bounds. A ball kicked out of bounds can travel a great distance before coming to a stop.
A common training technique for soccer teams is to mark a square in which two or three players practice techniques. Since such squares are usually in the middle of an open field, much chasing around after loose balls is necessary, which is especially disadvantageous because of the waste of time in a scheduled practice session.
Another training technique employed by individuals or small numbers of soccer players is to kick the ball against a kickboard, which can consist of anything from a brick wall to a panel specially designed for such a purpose.
By their size and nature, conventional soccer fields are not portable. Portable soccer playing areas could be advantageously employed in order to accommodate a touring group or provide a demonstration, or to enable more than one community to share the cost of construction of a soccer playing area while also sharing its benefits.


A pipe handling apparatus, for handling drill tubes on a drilling platform, has an upper guide member 100 comprising a retention head mounted on an arm. The arm can extend telescopically so as to position it to allow the retention head to engage a drill tube for placement in and removal from a rack 230.

The framework for supporting a drilling apparatus on an oil rig is known as a derrick or mast 800, as shown in FIG. 1.
Storing and retrieving drill tubes on an oil drilling rig is an extremely dangerous and hazardous task undertaken by a human operative known as a derrickman. The derrickman's operating position varies from one drilling rig to another, however, they often work on a platform 810 towards the top of the derrick or mast 800.
When tripping out of a drill hole (removing) or tripping into a drill hole (installing) the drill tubes, one of the derrickman's tasks is to guide the top of each drill tube (not shown) from a rack 820 towards a lifting apparatus 830 suspended from above, within the derrick or mast 800. This task is often undertaken by the derrickman as he stands towards the top of the derrick or mast 800 on a narrow, cantilevered board 810. Working conditions can be hazardous not least because the board 810 can become slippery during adverse weather conditions.
The challenges associated with these tasks can often result in injury to, or even death of, the derrickman. The lifting apparatus 830 moves at high speeds, and when tripping in the drill tubes, it is the job of the derrickman to position the drill tubes such that they are caught by the lifting apparatus to be installed towards the top of the drill string (a series of drill tubes which extend into the drill hole). Similarly, when tripping out, the derrickman must manually manoeuvre the drill tube from the lifting apparatus 830 back to a storage position in the rack 820.
The individual drill tubes are often large, typically above metres in length, and weigh hundreds of kilograms. The manoeuvring of the drill tubes, especially when returning them to the rack 820, means that it is not uncommon for derrickmen to trap body parts between drill tubes resulting in crush injuries. Additionally, in adverse weather conditions, such as heavy rain and strong winds, it is not uncommon for the derrickman to trip, fall or otherwise become displaced off the board 810, resulting in catastrophic injury.
Accordingly, the present invention aims to provide an apparatus and method for handling drill tubes in which the above-mentioned disadvantages are at least partly overcome.

Method and apparatus for handling drill tubes


Ophthalmic devices and ophthalmic systems including alignment sidewalls and blend zones disposed therethrough are described. An example ophthalmic device may include a first and a second optical element having alignment sidewalls shaped to cooperatively couple. The alignment sidewall may include blend zones disposed in the sidewall shaped to transition the sidewall from a ridge to a surface of an optic zone of the optical element. The alignment sidewalls may define a cavity disposed between two coupled optical elements when the alignment sidewalls are cooperatively coupled into which a liquid crystal may be disposed. A method of assembling an ophthalmic device is described. An example method may include aligning a blend zone of a first optical element with a mating blend zone of a second optical element. The example method may further include cooperatively coupling alignment sidewalls of the first optical element and the second optical element.

Presbyopia may be treated with wearable or implantable lenses that provide accommodation. For example, a lens may provide accommodation through electrical stimulation of liquid crystal material included in the lens. The lenses, either implanted or worn on the surface of the eye similar to a contact lens, may include multiple layers of material to provide the accommodation and associated control.
The multiple layers, however, may complicate fabrication of the lens due to the size of the components that form the multiple layers and alignment requirements. For example, an optical axis of the lens may add an alignment constraint to the fabrication of the lens. Misalignment of optical axes of the multiple layers may result in blurred vision. While many fabrication techniques may be available to provide the desired alignment, additional factors of the lens may not be addressed by such techniques.

Ophthalmic device with blend zones and alignment sidewalls


An emission sampling system includes an exhaust gas probe for sampling exhaust gas. A dilution gas source provides a dilution gas, and a mixing device is in fluid communication with the exhaust gas probe and the dilution gas source to mix the sampled exhaust gas and the dilution gas to form a diluted exhaust gas. A particulate filter is in fluid communication with the mixing device downstream therefrom. A dilution temperature conditioning device is arranged between the dilution gas source and the mixing device for obtaining a desired dilution gas temperature. A temperature sensor is arranged in the sampling system for producing a temperature signal corresponding to a temperature of fluid flowing through the sampling system. A controller is connected to the temperature sensor for processing the temperature signal and determining a filter temperature from the temperature signal. The controller commands the conditioning device in response to the filter temperature.

This invention relates to an emissions sampling system, and more particularly, the invention relates to an active filter temperature control method and apparatus for controlling the temperature of a particulate filter.
Emissions sampling systems are used to measure the products of combustion of a vehicle engine or other power plant to determine compliance with Federal regulations. Particulate matter is a product of combustion measured using a filter that collects the particulate matter during an emissions sampling test. Typically several filters elements are placed in series with a diluted exhaust gas sample stream to capture the particulate matter. The weight of the empty filter prior to the test is subtracted from the weight of the loaded filter subsequent to the test to determine the particulate matter emitted from the tested power plant.
The temperature at the filter sampling point has been found to strongly influence the accuracy of the test. Particulate test regulations are being adopted that require a tight temperature range at the filter, for example 47° C. Plus or minus 5° C. Some European standards may require the filter temperature to be maintained at 25° C. Plus or minus 5° C. The prior art has attempted to control the temperature in the area of the filter in several ways. For example, the filter temperature is raised to achieve a desired temperature by a heat exchange process in which a length of tubing is heated.
Utilizing a mechanical heat exchanged process for either the sample exhaust gas tubing or the diluted exhaust gas tubing requires a certain amount of surface area to achieve proper heat exchange. However, diffusion losses occur as particulate matter collects on the walls of the tubing. Any particulate matter collected on the walls will not be collected by the filter thereby adversely affecting the accuracy of the test. Accordingly, it is important to reduce the surface area as much as possible to prevent diffusion losses.
In another method, the temperature of the dilution gas is chilled to 15° C. Or some other fixed temperature to lower the temperature in the area of the filter. The fixed temperature of the dilution gas is determined based upon a maximum exhaust gas temperature when combined with the chilled dilution gas would achieve the desired temperature in the area of the filter. However, the temperature in the area of the filter is undesirably low and out of range for other exhaust gas temperature conditions.
Another prior art method to control the temperature in area of the filter is to adjust the portion of dilution gas mixed with the sample of the exhaust gas to change the temperature. However, regulations only permit the dilution ratio to be adjusted a very small amount during the test. Since the dilution ratio must remain somewhat fixed during the test, the dilution ratio must be optimized for one specific exhaust gas temperature, which is typically the maximum exhaust gas temperature. Again, the temperature in the area of the filter is too low for other exhaust gas temperatures during the test.
Therefore, what is needed is an active filter temperature control system and method enabling the temperature in the area of the filter to be maintained within a relatively tight range without adversely affecting the accuracy of the test.


A turbine blade for a gas turbine engine. The turbine blade includes an airfoil having a tip cavity. The tip cavity has a floor bounded by a wall. A pocket opening is formed in the wall proximate a trailing edge of the turbine blade. A passageway communicates cooling medium from an internal cooling circuit to a cooling hole formed in part through the floor and in part through the trailing edge.

Gas turbine engines, such as those used for power generation or propulsion, include at least a compressor section, a combustor section, and a turbine section. The turbine section includes a plurality of blades that extend away from, and are radially spaced around, an outer circumferential surface of one or more rotor discs. Hot, pressurized gas passes from the combustor section to the turbine section and drives the rotor discs by applying a force to the plurality of blades.
Thus, the turbine blades are subjected to mechanical and thermal stresses that cause inefficiencies and part degradation. It is an on-going goal to reduce the thermal stresses on the turbine blades to allow the turbine blades to better withstand the operating environment. One method for reducing the thermal stresses is to cool the turbine blades. One method for cooling the turbine blades is to move a cooling medium, such as air, through an internal cooling circuit in the airfoil. As the cooling medium moves through the internal circuit of the airfoil, it cools the exposed surfaces within the internal circuit through convection.
Some portions of the turbine blade are very thin and cannot be effectively cooled with an internal cooling circuit alone. For example, portions of a turbine blade proximate a trailing edge of an airfoil are too thin to form an internal cooling circuit and therefore for a cooling medium to effectively pass through. Other portions of the turbine blade are also difficult to cool because of the movement of the turbine blade and rotor disc and the resultant momentum of the cooling medium. For example, cooling medium expelled into a blade tip of the turbine blade proximal to the trailing edge tends to spill over sidewalls of the blade tip rather than remain on surfaces of the blade tip to cool both of the sidewalls of the blade tip. Accordingly, due to these deficiencies, it would be desirable to add cooling capacity to the turbine blades to further, or more effectively, reduce the thermal load on these, and other, difficult-to-cool portions of the turbine blade.

Doosan Heavy Industries & Construction Co., Ltd.