A failure diagnosis method for a brake system of a vehicle determines whether the failure occurs in a regenerative braking device, a front-wheel friction braking device or a rear-wheel friction braking device. The method may include comparing a driver's required acceleration/deceleration with a current acceleration/deceleration of the vehicle, determining that a failure has occurred in the brake system of the vehicle when the driver's required acceleration/deceleration is different from the current acceleration/deceleration of the vehicle and comparing a driver's required braking torque with a regenerative braking maximum torque, and determining that the failure does not occur in the brake system of the vehicle when the driver's required acceleration/deceleration is substantially equal to the current acceleration/deceleration of the vehicle.

1. Field of Invention
The present invention relates to a failure diagnosis method for a brake system of a vehicle driven using an electric motor. More particularly, the present invention relates to a failure diagnosis method for a brake system of a vehicle, in which, when a failure occurs in the brake system of the vehicle, it is decided whether the failure occurs in any one of a regenerative braking device, a front-wheel friction braking device and a rear-wheel friction braking device, which constitute the brake system.
2. Description of Related Art
As known in the art, a green vehicle such as a hybrid vehicle or electric vehicle driven by an electric motor performs regenerative braking to improve fuel efficiency when a driver stops the vehicle.
In general, a regenerative braking system of the green vehicle converts kinetic energy of the vehicle into electric energy, stores the converted electric energy in a battery, and enables the electric energy stored in the battery to be reused while driving an electric motor, thereby improving the fuel efficiency of the vehicle.
The vehicle performs regenerative braking cooperation control which allows the sum of a regenerative braking torque generated in an electric motor (driving motor) and a friction braking torque generated in a brake during regenerative braking to be equal to a driver's required braking torque.
However, the braking force generated in the vehicle when a failure occurs in a regenerative braking device or friction braking device (i.e., the braking force of the vehicle) does not satisfy the driver's required braking force (does not generate a braking force corresponding to the driver's required braking force). Therefore, the driver feels different when the braking of the vehicle is performed, and the braking distance of the vehicle is increased.
In order to prevent such a situation, a device for detecting a failure of each braking device and compensating for a braking force of the device in which the failure occurs is mounted in the braking device of the vehicle.
Conventionally, there was used a failsafe control method of a braking device, which can satisfy a driver's required braking force by determining a failure of a corresponding braking device, using a signal transmitted from the braking device when a failure occurs in the braking device built in a vehicle, and compensating for a braking force of the braking device in which the failure occurs.
However, in a case where the failure decision signal of the braking device is not used in the conventional fail safe control method, the compensation for the braking force of the braking device in which the failure occurs is not performed, and therefore, a braking force corresponding to the driver's required braking force is not generated.
The information disclosed in this Background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.

Failure diagnosis method for brake system of vehicle

Research & Business Foundation SungKyunKwan University


A system includes one or more memory devices storing instructions, and one or more processors configured to execute the instructions to perform steps of a method for processing a large file. The system may receive record data comprising a plurality of records having an identification value in a common field having a data format. The system may determine a plurality of focus values based on the data format and create a plurality of virtual processing units based on the plurality of focus values. Each of the plurality of virtual processing units may process a sub-group of the plurality of records that corresponds to the focus value associated with the respective virtual processing unit.

Businesses often store, access, use, and provide access to very large data files, such as files containing numerous records relating to customer information, vendor information, or employee information, as part of their business operations. From time to time, large files such as these require processing to implement a global change such as, for example, adding a new field such as a new type of account number or employee ID number to each and every record of the file. Processing such large files by conventional methods, such as processing each record in serial by a single processor, can be extremely time-consuming. The amount of time a single processor would take would be further increased if a processing error occurred, such that the entire file may have to be reprocessed again. To reduce processing time, some businesses rely on parallel processing techniques involving multiple processors operating simultaneously. However, utilizing multiple processors to perform parallel processing requires additional overhead in the form of additional infrastructure that needs to be acquired, setup, and maintained.
Accordingly, there is a need for improved systems and methods to process large files quickly, simply, and efficiently. Embodiments of the present disclosure are directed to this and other considerations.

This patent is subject to a terminal disclaimer.

Systems and methods for expedited large file processing


A sample analyzing system comprising: a first sample analyzer including a first measurement unit for measuring a sample and a first control unit for controlling the first measurement unit; and a second sample analyzer including a second measurement unit for measuring the sample and a second control unit for controlling the second measurement unit; wherein the first control unit is configured to transmit an activation signal for activating the second sample analyzer when a predetermined condition is met for the first sample analyzer; and the second control unit is configured to activate the second sample analyzer when the activation signal is received.

A sample analyzer for analyzing blood or urine such as a blood cell counting device, a blood coagulation measurement device, an immune analyzer, a biochemical analyzer, a urine analyzer, and the like is known.
In a facility such as hospitals, test centers, and the like where a plurality of the same type of sample analyzers are installed, the sample analyzer to be used is switched every day or every week, for example, and when using some of the plurality of installed sample analyzers, the other sample analyzers are not used. In this case, the sample analyzers that are not used are installed for backup, and thus are in a shutdown state. When abnormality occurs in the sample analyzer being used or when there are a large number of samples and a great amount time is required to complete the analysis of all the samples with the sample analyzers being used, the sample analyzer for backup is activated and used for sample analysis.
For example, in the sample analyzer disclosed in Japanese Laid-Open Patent Publication No. 2008-32493, when abnormality occurs in the sample analyzer, the occurrence of abnormality is displayed on a screen of the sample analyzer to notify the user. The user manually activates the backup sample analyzer when confirming the occurrence of abnormality of the sample analyzer or when determining that the sample analysis takes time with only the operating sample analyzer.
When switching the sample analyzer to be used by time, the operator shuts down the sample analyzer being used by hand and activates the sample analyzer that was not being used when a switching time is reached.
However, the operator needs to move to the place where the backup sample analyzer is installed to perform the activating operation in order to activate the backup sample analyzer. The backup sample analyzer may not be installed near the sample analyzer being used, in which case the backup sample analyzer cannot be efficiently activated and the processing may stagnate during such time. If the operator neither notice the abnormality of the device nor notice that a great number of samples is registered beyond the processing performance of the analyzer, the backup sample analyzer may not be activated for a long period of time and the sample processing may stagnate.
When switching the sample analyzer to use by time as well, the operator cannot efficiently carry out the switching operation if the sample analyzer to be used next is not installed near the sample analyzer being used.

Sample analyzing system, sample analyzer, and management method of sample analyzing system


A method and sensor are provided for monitoring the quality of yarn by an electronic cleaner of yarn by means of an optical detector having a sensor with one or two rows of individual optical elements that are rectangular-shaped and have analog outputs. Each of the optical elements has a photodiode and an amplifier of its output signal. The amplifier has a variable amplification, whose size is modified according to the required sensitivity of a respective optical element to light.

CZ 286113 (EP1051595B1) discloses a method for detecting the thickness and/or homogeneity of moving yarn, in which the yarn moves in a radiation flux between a radiation source and a linear CCD detector, whereby each of the elements of the CCD detector is coupled with an evaluation device of the state and/or degree of its irradiation. CCD detectors are used as sensors of radiation, monitoring the yarn to be measured discontinuously always on very short sections of approximately 10 μm in length.
The patent U.S. Pat. No. 6,242,755 B1 describes a method for the contactless measuring of fibrous textile material of indeterminate length, in which the textile material is placed within a radiation range of at least one source of radiation and its shadow is projected by the radiation onto a receiving device comprising a row of sensor cells arranged next to one another, whereby the receiving device is composed of a CCD detector. The diameter of the fibrous textile material is determined on the basis of the number of fully shadowed sensor cells and from partial shadowing of one or two neighbouring sensor cells, the value of the partial shadowing being determined proportionally according to the amount of the partial shadowing to the amount of the fully covered sensor cells.
To date, known yarn cleaners based on linear CCD detectors or CMOS optical detectors and intended for installation on spinning or weft-winding machines, work only with digital values of the number of shadowed optical elements. Even though the patents CZ 286 113 and U.S. Pat. No. 6,242,755 disclose methods of evaluation of the yarn diameter including the influence of partially irradiated optical elements, such detectors have not been realized yet in industrial applications, very probably due to the difficulties and disadvantages that have been overcome by the present invention. Apparently, the processing of analog signals from the individual optical elements of the detectors, if not accompanied by other measures, such as those preventing electromagnetic disturbances, is complicated and does not lead to the desired effect.
U.S. Pat. No. 6,219,135 (EP 1015873 B1) describes a configuration of an optical detector, combining analog and digital optical elements with the purpose of obtaining not only the information about the yarn diameter, but also the information about the surface structure of the yarn. Supposedly, this device is intended for use only as part of laboratory apparatuses. However, if the device is to be used as a measuring device online during the production of yarn, it has a number of shortcomings. A major disadvantage is the fact that it is impossible to set the sensitivity of analog optical elements in dependence on the changing conditions of the environment, such as ambient light and the contamination of the detector and/or the radiation source with dust and other impurities. Another disadvantage is that the alternating-current component of a signal from the analog optical elements defining the surface structure of yarn is modulated at a relatively great direct-current component, which worsens the processing of the signals by the analog-to-digital converter. Another drawback is the fact that the analog signal is carried to be processed outside the detector itself, being exposed to the influences of electromagnetic disturbances which are induced into the analog conductor from the other devices of the machine operating in the vicinity of the detector. Apparently, disturbance-free environment can be realized when using the optical detector in a laboratory, but it can be achieved with difficulty if the device is used directly on production machines.
The disadvantages during the processing of an analog signal were eliminated by a device for the contactless measuring of moving yarn according to the patent CZ 299684, in which a linear optical detector is incorporated into one semiconductor application specific integrated circuit (ASIC) along with at least a part of electronic circuits for the processing and/or evaluation of a signal of the linear optical detector, whereby the electronic circuits for the processing and/or evaluation of a signal of the linear optical detector are integrated along with the linear optical detector on a common semiconductor support and/or mounted in one common case.
The advantage of this arrangement is especially the fact that the initial operations of the processing and/or evaluation of a signal of the detector take place in one integrated circuit, and so the output signal is not influenced by disturbances, nevertheless the solution according to CZ 299 684 is based only on the binary processing of the signals from the individual optical elements when only the irradiation or shadowing of each individual optical element is monitored. The disadvantage of this solution is a purely digital evaluation of the individual optical elements, when, according to a set comparison level, the individual optical elements are divided into irradiated and non-irradiated, the information about the yarn diameter is represented by the sum of the widths of the shadowed optical elements. This device, therefore, does not permit a sufficiently precise evaluation of the surface structure of yarn and, what is more, it is rather difficult to monitor possible contamination of the individual optical elements with dust or other impurities or to monitor changes in the intensity of the light source.

Method for monitoring quality of yarn by electronic yarn cleaner and detector for carrying out the method


Disclosed is a method and a system for measuring customer delivery service. A projected customer delivery date is generated. At least one projected output volume is determined based on the projected customer delivery date. At least one actual output volume is determined, and an accuracy of the projected customer delivery date is determined based on the at least one projected output volume and the at least one actual output volume.

The present disclosure relates in general to semiconductor manufacturing, and more particularly, to a system and method to accurately measure customer delivery service in manufacturing of integrated circuits.
In semiconductor manufacturing technology, customer delivery service may be measured by the accuracy of a customer delivery schedule. To determine the accuracy of the customer delivery schedule, a method based on a committed line item performance may be used. For each line item, this method identifies a delivery date for a volume of semiconductor product. If, for example, 90 percent of the semiconductor product is shipped by the delivery date, the delivery schedule is considered to have been accurate.
However, this method provides only a conservative forecast. Customers need a more accurate projected output date to reduce their inventory and consequent capacity costs. In addition, no lead time is given to the production control department ahead of the confirmation date of delivery, such that product capacity may be adjusted and outsourcing costs may be reduced.
Therefore, a need exists for a method and system for measuring customer delivery service more accurately, such that a better forecast of customer delivery and early communication to the customers and production control may be provided.

Method and system for measuring customer delivery service

Taiwan Semiconductor Manufacturing Company, Ltd.


A method is provided for identifying phrase alignment pairs between a source sentence and a target sentence. Boundaries for a phrase in the source sentence are identified by requiring that a source word be aligned with at least one target word in a target sentence in order to form a boundary for the source phrase. Boundaries for a phrase in the target sentence are identified based on alignments between words in the source phrase and words in the target sentence. The words in the target phrase are examined to determine if any of the words are aligned with source words outside of the source phrase. If they are not aligned with source words outside of the source phrase, the source phrase and target phrase are determined to form an alignment pair and are stored as a phrase alignment pair.

Translation models are used to translate a sentence in a source language into a sentence in a target language. For instance, translation models can be used to translate an English sentence into its French equivalent.
Translation models have been developed that rely on both one-to-many translations, known as word translations, and many-to-many translations, known as phrase translations. In one-to-many translations, one word in a source language is translated into one or more words in a target language. In many-to-many translations, multiple contiguous words in a source language are translated into multiple contiguous words in a target language.
In order to construct a translation model, a bilingual corpus, consisting of source sentences of a first language aligned with target sentences of a second language, is used to identify possible word translations and phrase translations. Word translations are typically identified using a statistical word aligner that identifies alignments between words in the source sentence and words in the target sentence based on a number of factors including the rate of co-occurrence of the source words and target words in aligned sentences of the bilingual corpus.
Phrase alignments have been extracted directly from sentence aligned bilingual corpora using similar statistical techniques. In other systems of the past, phrase alignments are extracted by first extracting word alignments and then using the word alignments to identify phrases. In such systems, a source phrase and a target phrase are said to be aligned when none of the words of the source phrase are aligned with a word in the target sentence that is outside of the target phrase and none of the words in the target phrase are aligned with words in the source sentence outside of the source phrase, and at least one word in the source phrase is aligned to a word in the target phrase.
A naive algorithm that independently compared each possible source phrase with each possible target phrase would have a complexity of at least O(l2m2), where l and m are the lengths of the source and target sentences, respectively.
The discussion above is merely provided for general background information and is not intended to be used as an aid in determining the scope of the claimed subject matter.

Efficient phrase pair extraction from bilingual word alignments


A process of converting an outer layer of an object made of a refractory metal, such as titanium, into a carbide of the refractory metal. A molten metal, such as molten lithium, is placed adjacent the outer surface of the object. The lithium does not react with the titanium, nor is it soluble within the titanium to any significant extent at the temperatures involved. The molten lithium contains elemental carbon, that is, free carbon atoms. At high temperature, the carbon diffuses into the titanium, and reacts with titanium atoms to form titanium carbide in an outer layer. Significantly, no other atoms are present, such as hydrogen or oxygen, which can cause problems, because they are blocked by the molten lithium.

1. Field of the Invention
The invention concerns diffusion of Carbon into a refractory metal, such as Titanium. Although diffusion of Carbon into Iron (another metal) is well-known, that type of process is not applicable to Titanium, for various technical reasons which are described herein.
2. Description of the Related Art
Refractory metals, such as Titanium, have the desirable property of being stable at high temperatures. However, they are considered soft, and are impractical to use in applications where hardness is important, such as in gears.
Coating systems have been developed, wherein a thin, hard, protective layer of material is applied to the surface of a refractory metal. However, the thin coatings are not durable, and are soon worn away. Further, difficulties are encountered in bonding the thin layer to the refractory metal, resulting in occasional disbanding of the thin coating from the refractory material.
In the prior art (U.S. Pat. No. 5,135,782 issued Aug. 4, 1992 to Rostoker et al.), Silicon was applied to a Titanium surface in a process which formed a Titanium Silicide layer.
In that prior art, the alkali metal was used as a flux to liquefy Silicon at a low enough temperature to react with a Titanium surface without deleteriously affecting the base Titanium alloy.
Gas Carburization of a Titanium surface today could only be done with Carbon compound such as Methane (CH4) or Carbon Monoxide (CO) gas. Carbon cannot exist as a pure gas at a temperature less than 4800° C. It must be in compound form in order to be in a gas phase. The problem therein lies that the other elements in the compound react with deleteriously with the Titanium metal substrate.
The problems associated with carburizing with a methane gas compound are illustrated in FIGS. 5 thru 8. It should be noted that the illustrations in these FIGS. attempt to show accurate relative size of the atoms involved. However, the density of gas molecules is shown for illustrative purposes in FIGS. 5 and 6. In reality there may be only one Methane molecule for every 100 surface Titanium atoms. FIG. 5 illustrates the surface of pure Titanium being exposed to methane gas at a reasonably elevated temperature such as 900° C. By definition, a gas phase consists of sparse molecules of the compound moving randomly in space. At elevated temperatures, the gas phase is even sparser and molecules are moving more erratically and even higher speeds than can be illustrated in this image. In this scenario, diffusion will only occur on a limited basis as a Methane molecule impacts the Titanium surface and reacts with the Ti atom. For the reaction to occur, the Hydrogen atoms would disassociate from the Carbon atom of the Methane molecule and the Carbon would bond with a Titanium atom to form a Titanium Carbide molecule. The problem is, as shown in FIG. 6, that the disassociated Hydrogen atoms will now diffuse through the Titanium structure and form Titanium Hydride (TiH2) molecules. In fact, Titanium has a high affinity for Hydrogen. Titanium is known to have a high solubility of elemental Hydrogen and TiH2 is thermodynamically stable. In short, the Titanium will form a stable Titanium Hydride phase before it forms a Carbide phase. The resulting structure on an atomic scale is shown in FIG. 7, where Hydrogen has diffused deep into the Titanium surface forming extensive Titanium Hydride with little Titanium Carbide phase. The TiC molecules are so disperse that the surface will appear as a Titanium Hydride phase with dissolved TiC molecules. FIG. 8 shows an illustration of how a cross-section of the resulting surface would appear, with a thick stable Titanium Hydride phase on the surface and a substrate with extensive dissolve Hydrogen.
The overall problem with this scenario is that Hydrogen is embrittling to Titanium. The resulting material with the structure shown in FIG. 8 would be brittle and fracture easily in any application. This therefore precludes this method from being used to harden a Titanium surface.
To avoid the Hydrogen embrittlement problem a different Gas could be used to Carburize Titanium such as Carbon Monoxide. The problems associated with carburizing with a Carbon Monoxide gas compound are illustrated in FIGS. 9 thru 12. FIG. 9 illustrates the surface of pure Titanium being exposed to Carbon Monoxide gas at a reasonably elevated temperature such as 900° C. In this scenario, diffusion will only occur on a limited basis as a Carbon Monoxide molecule impacts the Titanium surface and reacts with a Ti atom. For the reaction to occur, the Oxygen atom would disassociate from the Carbon atom of the Carbon Monoxide molecule and the Carbon would bond with a Titanium atom to form a Titanium Carbide molecule. The problem is, as shown in FIG. 10, that the disassociated Oxygen atoms will now diffuse through the Titanium structure and form Titanium Oxide (TiO2) molecules. In fact, Titanium has a high affinity for Oxygen. Titanium is known to have a high solubility of elemental Oxygen and TiO2 is thermodynamically stable. In fact, Titanium is known to disassociate Carbon Monoxide absorb only the Oxygen and discard, not even react with the remaining Carbon atoms. The resulting structure on an atomic scale is shown in FIG. 11, where Oxygen has diffused deep into the Titanium surface forming extensive Titanium Oxide with little Titanium Carbide phase. The TiC molecules are so disperse that the surface will appear as a Titanium Oxide phase with dissolved TiC molecules. FIG. 12 shows an illustration of how a cross-section of the resulting surface would appear, with a thick stable Titanium Oxide phase on the surface and a substrate with extensive dissolved Oxygen.
As with Hydrogen, the overall problem with this scenario is that Oxygen is embrittling to Titanium. The resulting material with the structure shown in FIG. 12 would be brittle and fracture easily in any application. This therefore precludes this method from hardening a Titanium surface.
What is needed, therefore, is a system and method for overcoming one or more of the problems of the prior art.

System and method for surface hardening of refractory metals


Interface circuitry for facilitating the installation of a control device is presented. One embodiment includes an interface circuit with first and second terminals that can be coupled interchangeably to a load and the utility hot of an AC power source, thus eliminating the time-consuming requirement that a particular wire be coupled to a particular terminal. The interface circuit also limits the amount of current supplied to the control device during periods of low current demand, thus reducing current and power consumption. An additional feature further facilitates installation of a control device when that device is being installed in a metallic electrical enclosure that is itself coupled to utility return. The device's return terminal is automatically coupled to the power source's utility return upon mounting of the control device in the enclosure.

This invention relates to the electrical installation of control devices. More particularly, this invention relates to interface circuitry for facilitating the installation of a control device in a commercial, industrial, or home electrical environment.
Such electrical environments are typically powered by an alternating current (AC) power source which, by convention, delivers current through a utility hot and a utility return. The current alternates between positive and negative values typically 60 times a second (i.e., 60 hertz). If either the hot or return is electrically disconnected, current will not flow. By convention, the hot conductor is used to switch an electrical load, such as room lighting, on and off, while the utility return is maintained intact. The utility return is made up of two redundant conductors called neutral and equipment ground. These two conductors are by convention electrically coupled at the power source or at the main circuit breaker panel. Throughout the wiring of an AC system, both the hot and utility return conductors are physically adjacent each other for safety reasons.
A third utility path known as an isolated earth ground is sometimes provided. This third path is an isolated conductor between the electrical point of use (e.g., an electrical outlet) and the physical earth ground. The isolated earth ground conductor is not electrically connected to either the utility hot or utility return.
When installing a control device (for example, an occupancy detector) in place of a traditional toggle switch, by convention three conductors are accessible--a hot, a load, and a utility return--requiring three separate connections to be made. In many cases, it is not possible to safely determine the hot from the load. For example, the conductors may not be color coded, or they may be coded incorrectly or contrary to local custom. The possibility of an incorrect installation is thus undesirably high.
To check for an incorrect installation, the device should be tested after it is installed. However, testing can be very time consuming; many control devices, such as the previously mentioned occupancy detector, have built-in time delays. Furthermore, testing at the time of installation may not always be possible, because, for example, the power may be off or particular testing equipment may not be available. It is therefore likely that either the device will not be tested at all or installation costs will be higher. Moreover, if the device fails to function, it could be assumed to be defective when it may only be incorrectly wired, thus resulting in a perfectly good device being wasted. To prevent such waste, the device should therefore be removed, rewired, and retested. However, this activity further increases installation time and costs.
In addition, many known control devices do not advantageously limit the amount of current supplied by the power source during periods of low current demand. For example, current demand in an occupancy detector is at a minimum when the detector monitors an unoccupied area (i.e., the load is off and the detector is essentially in a stand-by mode). Any resulting current undesirably increases power consumption and accordingly the electrical costs of operating the device. Such costs can become significant in applications where hundreds of control devices are deployed, such as, for example, in large industrial complexes. Limiting the current supplied during low demand periods reduces power consumption and results in more economical operation of the device.
In view of the foregoing, it would be desirable to provide interface circuitry that facilitates the installation of a control device by eliminating the need to determine which conductor is the load and which is the hot.
It would also be desirable to provide interface circuitry that reduces the cost of operating a control device by selectively limiting the amount of current supplied to the device by the power source.
It would further be desirable to provide interface circuitry that reduces the number of conductors that must be coupled during installation of a control device.

Interface circuitry for facilitating installation of a control device


A detachable fiber optic connector includes a bottom cover shell having a rear extension, a rear cover covering the rear extension of the bottom cover shell to hold down a fiber optic, and a top cover shell detachably covered on the bottom cover shell to hold down connection modules that are respectively connected to fiber cores of the fiber optic. By means of pressing a retaining block of the rear cover downwardly away from a rear end edge of the top cover shell, the top cover shell can be pushed backwards and then pulled upwards to move coupling flanges thereof along bottom grooves of the bottom cover shell and then out of side grooves of the bottom cover shell, thereby exposing the connection modules and the fiber cores of the fiber optic to the outside for position interchange.

1. Field of the Invention
The present invention relates to a fiber optic connectors and more particularly, to a detachable fiber optic connector, which allows quick interchange of the positions of the connection modules and the fiber cores of the connected fiber optic in the bottom cover shell without any tools.
2. Description of the Related Art
Following fast development of modern technology and arrival of the network era, many different signal transmission techniques have been created and improved to satisfy different application requirements. In recent years, fiber optics are intensively used to replace copper wire as an appropriate means of communication signal transmission. Fiber optics span the long distances between local phone systems as well as providing the backbone for many network systems. Fiber optics use light pulses to transmit information down fiber lines instead of using electronic pulses to transmit information down copper lines.
Further, there are known 6 different types of fiber optic connectors, i.e., VF-45, MT-RJ, LC, SC, FC and ST. SC and LC are most popularly adopted. Among these two popular types of fiber optic connectors, LC type fiber optic connector shows superiority in many aspects, such as shrinking the ferrules to 1.25 mm in diameter with a fiber pitch of 6.25 mm (duplex).
FIG. 8 shows a fiber optic connector according to the prior art. According to this design, the fiber optic connector comprises a housing A, two connection modules B and a fiber optic cable C. The housing A is formed of a top cover shell A1 and a bottom cover shell A2. The top cover shell A1 has mounting hooks A11 and mounting grooves A12. The bottom cover shell A2 has mounting hooks A21 and mounting grooves A22 respectively forced into engagement with the mounting grooves A12 and the mounting hooks A11 of the top cover shell A1, thereby holding down the connection modules B and the fiber optic cable C in between the top cover shell A1 and the bottom cover shell A2.
According to the aforesaid prior art fiber optic connector design, the mounting hooks A21 and the mounting grooves A22 of the bottom cover shell A2 are respectively forced into engagement with the mounting grooves A12 and the mounting hooks A11 of the top cover shell A1. When wishing to interchange the positions of the connection modules B and the fiber cores of the fiber optic cable C, a hand tool must be used to separate the respective mounting hooks A11 or A21 from the respective mounting grooves A22 or A12. However, the mounting hooks A11 or A21 may be broken accidentally when dismounting the top cover shell A1 and the bottom cover shell A2.
Therefore, it is desirable to provide a fiber optic connector that can easily be dismounted.


A thermal head printer with image-invariant printing speeds for printing a substantially light-insensitive thermographic material having a print density-driving power level characteristic, the thermal head printer comprising a transport means, one or more thermal heads each having an array of heating elements, a thermal print head drive system capable of supplying power to each of the printing elements, and a calibration means based on the print density-driving power level characteristic of the thermographic material; a process for calibrating a thermal head printer with image-invariant printing speeds, the thermal head printer comprising one or more thermal heads each having an array of heating elements connected to a power supply capable of supplying a given number of heating element driving power levels from 0 to a maximum driving power level number, corresponding to Pmax, to each heating element for printing a substantially light-insensitive thermographic material by image-wise heating the thermographic material with the heating elements, the process comprising the steps of: (i) putting the printer into a calibration mode; (ii) printing one or more step-wedges of print densities by heating the thermographic material with the heating elements at different DPLN'S; (iii) determining the optical density of each step of the step-wedge(s) of print densities with a densitometer thereby obtaining the dependence of the print density upon DPLN; (iv) deriving from the dependence, or all the dependences of the print density upon DPLN, a single smoothed dependence of the rate of change of print density, D, with DPLN, ΔD/ΔDPLN, as a function of DPLN for the thermographic material; (v) establishing a threshold rate of print density change per DPLN for the specific thermographic material being printed; and (vi) setting up the thermal head printer so that the threshold rate of print density increase per DPLN cannot be undercut; and a process for printing a substantially light-insensitive thermographic material with a thermal head printer comprising one or more thermal heads each having an array of heating elements connected to a power supply capable of supplying a given number of heating element driving power levels from 0 to a maximum driving power level number, corresponding to Pmax, the process comprising the steps of: calibrating the thermal head printer according to the above-described calibration process, transporting the substantially light-insensitive thermographic material past the thermal head, and image-wise heating of the substantially light-insensitive thermographic material by means of the heating elements.

Thermography is an image-forming process including a heating step and hence includes photothermography in which the image-forming process includes image-wise exposure and direct thermal processes in which the image-forming process includes an image-wise heating step.
In direct thermal printing a visible image pattern is produced by image-wise heating of a recording material e.g. image signals can be converted into electric pulses and then via a driver circuit selectively transferred to a thermal head, which consists of microscopic heat resistor elements, thereby converting the electrical energy into heat via the Joule effect. This heat brings about image formation in the substantially light-insensitive thermographic material. In thermal heads, only those regions which produce heat higher than a certain value are effective for printing, and the regions capable of generating sufficient heat for the printing spread in proportion to voltage applied to the heating resistors. If, therefore, higher voltage is applied to the heating resistors, the size of the printing dots increases in proportion.
U.S. Pat. No. 6,462,766 discloses a method and an apparatus for limiting the peak power consumed by a thermal recorder connected to portable battery-powered equipment. The battery-powered equipment is designed with a filter and an electronic circuit breaker. A circuit breaker current sense resistor and an output capacitor form an RC filter and provide a large current reservoir for the thermal recorder which averages the peak current demands seen at the circuit input. The electronic circuit breaker provides a current limit function and will not allow a current greater than a predetermined amperage level to be drawn. The thermal recorder has a CPU which provides pulses to a thermal print head in dependence on data incorporated in a pulse-width limit table. The values in the pulse-width limit table can be substituted for calculated pulse widths that would produce peak currents large enough to trip the circuit breaker.
U.S. Pat. No. 6,234,695 discloses a printer using a power reduction logic based upon reducing the speed of printing when the dot utilization calculation exceeds a particular power level for that printer. There is also provided a method for printing information at a given power supply capacity level, comprising the steps of: examining the a group of rows of dots to be printed; calculating the maximum dot utilization value for the group; selecting a print speed based on the maximum dot utilization value; printing the first row of the group of rows; and repeating above steps until the information is printed.
U.S. Pat. No. 6,503,006 discloses a printer using a power reduction logic based upon reducing the speed of printing when the dot utilization calculation exceeds a particular power level for that printer. There is also provided a method for printing information at a given power supply capacity level, comprising the steps of: examining the a group of rows of dots to be printed; calculating the maximum dot utilization value for the group; selecting a print speed based on the maximum dot utilization value; printing the first row of the group of rows; and repeating above steps until the information is printed.
U.S. Pat. No. 5,528,275 discloses a gradational printing method for performing a gradational printing by energizing a plurality of heat emitting elements arranged on a thermal head correspondingly to respective bits of digital gradation data representing a gray level. In case of this method, the plurality of heat emitting elements are divided into two or more blocks and the blocks are energized correspondingly to different bits of the digital gradation data. Thus, an energizing time, during which a maximum current should be supplied, can be reduced.
EP-A 0 453 714 further discloses a gradation record printer in which an amount of energy applied to a thermal head is controlled in response to a gradation level of an image signal to print an image on a printing medium with gradations, said printer comprising: gradation density detecting means for storing data of standard density patterns with respect to address values corresponding to gradation levels, and for outputting a coincidence signal when data supplied from an outside of said gradation density detection means substantially coincides with said data of standard density patterns; a gradation test print circuit for applying data of different amounts of printing energy to said thermal head sequentially to make a gradation test print on said printing medium; density detecting sensor means for detecting densities of said gradation test print and for applying a detection output from said density detecting sensor means to said gradation density detection means; and a first memory element for storing said data of different amounts of energy with respect to address values corresponding to said gradation levels, in response to said coincidence signal from said gradation density detecting means.
EP-A 1 247 654 discloses that the traditional technique for calibrating a thermal printer is as follows: first, a first calibration page is printed with a limit setting to produce the desired maximum density and a full range of print settings. The next step is to determine whether this is the desired limit setting by visually inspecting the printed page. The normal objective is to find the minimum exposure required to print the full range of desired densities. The lower the limit setting, the more nearly continuous the grey scale in the printed film. The process of printing and adjusting the maximum limit setting is repeated until a desired limit setting is determined. Next, a second calibration page is printed with the limit system setting selected and with a subset of print system settings which cover the full range of print settings. The resulting densities of the printed page are then measured and a print setting to density table created for the full range of print settings. An output lookup table that can be used to set exposure to produce the desired density for any digital image value is created using the print setting to density table. Thereafter the thermal printer prints pages with this output lookup table to produce the desired densities while the same maximum exposure is appropriate.
EP-A 1 247 654 further discloses a method for calibrating a thermal printer comprising a thermal head incorporating a plurality of energisable heating elements, said method comprising the steps of: supplying to said thermal printer a thermographic material m, a plurality of printer data Pi each intended to be recorded as a pixel having a density Di, and default reference values for printing parameters II comprising a value Pref for a reference printing power; printing a calibration pattern for said plurality of printer data Pi, said calibration pattern comprising a multiple step density wedge such that a whole range of a relation Di (Pi) between said printer data Pi and said density Di is covered; measuring a density Dexpi for each patch of said density wedge of said calibration pattern in relation to said plurality of printer data Pi and storing a first set S1=(Pref, Pi, Dexpi) in a first memory M1; calculating, for a desired density Dwantj, a corresponding value Prefnewj for said reference printing power and storing a second set S2=(Dwantj Prefnewj) in a second memory M2; calculating, for said desired density Dwantj, for each printer data Pi a corresponding density Di and storing a third set S3=(Dwantj, Prefnewj, Pi, Di) in a third memory M3.
U.S. Pat. No. 5,711,621 discloses in a printer having a print region is defined by a thermal print head and a rotatable platen adapted to draw a print media therebetween, a method for calibrating the printer comprises the steps of: identifying a type of print media which is selected for use on said printer, wherein said selected type of print media has unknown printer parameter values; printing a series of test labels onto said selected type of print media using a parameter of said printer having a unique value for each individual one of said test labels of said series with identifying information of said unique parameter value being printed thereon; after printing said series of test labels, inspecting said series of test labels to select one of said test labels of said series having a desired level of image quality; and specifying said unique parameter value of said selected one of said test labels for further operation of said printer with said selected type of print media.
US 2001/004284 discloses a calibration pattern printing method for a printer that prints an image in an image recording area on a recording paper, comprising the steps of: printing a calibration pattern in a marginal area on the recording paper outside said image recording area; and cutting said marginal area with said calibration pattern off the recording paper after the image is printed in said image recording area.
Thermographic materials are increasingly being used for graphic arts, medical and other applications which require high maximum print densities. Attaining such high print densities in thermographic materials requires that the heating elements be driven at higher powers and hence to higher temperatures, which increases the probability of premature heating element failure due to overheating and of image faults in the thermographic materials due to overheating. A means is therefore required to avoid such failure of the heating elements due to overheating and to avoid such image faults in the thermographic materials without significant loss in maximum print density and significant loss in image information.

Thermal head printer and process for printing substantially light-insensitive recording materials


A system and method including receiving sets of sensor data associated with sensors configured to monitor one or more systems. Sensor fingerprints are generated for each set of sensor data based on the sensor data. At least one proximity value is computed for each sensor by comparing the fingerprint of that sensor with another fingerprint. Clusters of similar sensors are identified based at least upon the proximity values of the sensors.

The invention relates generally to identifying clusters of similar sensors, and more particularly to identifying clusters of similar sensors based on sensor fingerprints.
Industrial and commercial systems and facilities, such as oil rigs, power plants, manufacturing factories, mining operations, chemical plants, and the like utilize sensors to monitor the operations of the various subsystems that make up the systems. Equipment hierarchies may be used to keep an inventory of the equipment that form the subsystems. System operators may rely on the equipment hierarchies and intensive manual classification to match similar sensors in connection with the maintenance of the systems. Matching sensors by hand is a laborious process that takes time but also relies on the accuracy of the equipment hierarchies.


A process and materials made by the process which includes a bicomponent fiber, made of a nonconductive first component, including a first fiber-forming polymer selected from the group consisting of polyethylene terephthalate, nylon 6, nylon 6,6, cellulose, polypropylene cellulose acetate, polyacrylonitrile and copolymers of polyacrylonitrile; a conductive second component, including carbon particles and a second fiber-forming polymer selected from the group consisting of polyethylene terephthalate, nylon 6, nylon 6,6, cellulose, polypropylene cellulose acetate, polyacrylonitrile and copolymers of polyacrylonitrile; and a conductive third component, including a polymer selected from the group consisting of polypyrrole and polyaniline, said polymer formed in situ and being interspersed among at least a portion of the carbon particles of the second component.

1. Field of Invention
In one broad aspect, the invention relates to fibers, preferably conductive fibers. In another broad aspect, the invention relates to a conductive polymer matrix comprising conductive particles.
2. Description of the Related Art
A variety of materials and methods have been known and used for protection against electrostatic discharge. Antistatic and conductive materials are useful for such applications. As used herein, the term "nonconductive" means material with a surface resistivity greater than 10.sup.11 .OMEGA./square; the term "antistatic" means material with a surface resistivity between 10.sup.4 -10.sup.11 .OMEGA./square; the term "highly conductive" means material with a surface resistivity between 10.sup.0 -10.sup.4 .OMEGA./square; and the term "conductive" broadly means material with a surface resistivity between 10.sup.0 -10.sup.11 .OMEGA./square. The use of organic polymers which are electrically conductive is well known. However, one of the limitations of the conductive organic polymer materials and methods previously utilized has been their lack of stability. The influence of environmental conditions such as temperature, humidity and air oxidation on the stability of conducting polymers is described in Munstedt, H., "Aging of Electrically Conducting Organic Materials", Polymer, Volume 29, Pages 296-302 (February, 1988). In particular, conventional polymer films and surface treated fibers are limited by thermal stability, resistance to chemicals and mechanical abrasion. Therefore, the art has sought materials and methods for making materials with reduced resistivity that are environmentally stable.

Antistatic fibers and methods for making the same


A night vision device has a lens (1) arranged along an optical axis (A) and focusing the low-level light emanating from an object to be observed onto an entry window (2) of a low-light-level amplifier (3). An optical module (6-8) projects the object image available at the exit window (4) of the low-light-level amplifier (3) and represented in a predetermined wavelength range onto at least one receptor, such as a human eye (9). The beam path between the exit window (4) of the low-light-level amplifier (3) and the receptor (9) is determined by reflective optical elements (6, 8), one (8) of which is located along an axis (B) leading to the receptor (9) essentially parallel to the axis (A) of the lens (1) and is essentially reflective for the predetermined wavelength range of the low-light-level amplifier (3) but, if required, essentially transparent for other wavelength ranges.

The invention relates to a night vision device and in particular to a monocular night vision device.
Monocular night vision devices are essentially designed according to the following principle. A, preferably fast, lens focuses the rays emanating from an object to be observed onto an entry window of a low-light-level amplifier. The image of the object is electrically amplified there and, owing to the phosphorescent coating on the exit of the low-light-level amplifier, appears as a bright green image on its exit window. The substantial feature of the low-light-level amplifier in this context is that it is provided with an inverter (image inversion system) which inverts the amplified green image of the object. This green image is projected via an eyepiece into the user""s eye. Equipping the low-light-level amplifier with an inverter is expensive, and the length and the weight of the low-light-level amplifier increase substantially.
On the other hand, instead of by means of an inverter, it is possible to invert the electronically amplified green image of the object by means of a separate optical inverter which then projects the image through an eyepiece into the eye. However, the result is virtually the same because, in the case of conventional inverters formed from lenses, the result is then a long, heavy and relatively expensive (monocular) night vision device.
In contrast, it is the object of the invention to provide a night vision device, in particular a monocular night vision device, which requires neither a low-light-level amplifier with a conventional inverter nor a separate optical system for the image inversion. As a result of these circumstances, it should be possible substantially to reduce length, weight and manufacturing costs of the device.
This can be achieved, according to the invention, by realizing the characterizing features of Claim 1 and those of Claim 10. When it is stated that the optical axis passing through the lens of the device should be xe2x80x9cessentiallyxe2x80x9d parallel to the axis leading to the receptor, small deviations from parallelism may result from a parallax compensation. When it is stated that the beam path between the exit window of the low-light-level amplifier and the receptor is determined by reflective optical elements, this by no means rules out that lenses too, i.e. refractive elements, are concomitantly used, for example for changing the magnification factor.
Advantageous alternative embodiments are described by the features of the dependent Claims.
In the invention, in principle the refractive optical parts between the low-light-level amplifier and the human eye are replaced by reflective ones, which reduces the manufacturing costs for the device according to the invention. With respect to the comfort of wear, too, this represents a not inconsiderable reduction in weight and assembled length. In addition, the achievement according to the invention, comprising reflective optical elements, still has the property of being able to observe the object directly (for example as through sunglasses) and at the same time of seeing its amplified, in general green imagexe2x80x94superposed on the xe2x80x9cdirectxe2x80x9d image.


The efficient removal of parasitic electron charges from the ONO structure of an NROM cell by periodically applying a negative gate refresh voltage in a way that injects holes from the substrate into the ONO structure. Initially, after each erase pulse is generated and an unacceptable erase state is detected, the erase pulse magnitude is incrementally increased to compensate for the increasing parasitic electrons. When a predetermined maximum drain voltage is reached, the negative gate refresh voltage is applied to refresh the ONO structure, and the drain voltage is reset to an initial state. A novel NROM cell uses a P+ doped polysilicon gate or Top Oxide produced with a high-k dielectric (Alumina) to facilitate blocking the injection of gate electrons, and the Bottom Oxide thickness is selectively thinned to increase hole injection.

FIG. 10 is a cross sectional view of a conventional nitride read only memory (NROM) cell 100, which is a type of non-volatile memory (NVM) device that implements a silicon-oxide-nitride-oxide-silicon (SONOS) structure. NROM cell 100 includes p-type substrate 101, N+ source/drain (and diffusion bit line) regions 111 and 112, channel region 113, oxide-nitride-oxide (ONO) structure 120, bit line oxide regions 131 and 132, and an N-type polycrystalline silicon ("polysilicon") control gate 140. ONO structure 120 includes lower (bottom) silicon oxide layer 121, silicon nitride layer 122 and upper silicon oxide layer 123. NROM cell 100 features two-bit per cell storage, with two data bits being stored in two separate charge trapping regions 122L and 122R in nitride layer 122. Thus, data is stored as charges in the ONO structure 120 at the edges of a memory transistor channel 113. NROM cell 100 is described in more detail in U.S. Pat. No. 5,768,192 to Eitan.
Programming NROM cell 100 requires increasing the threshold voltage of the cell. Programming typically involves applying a positive voltage to the gate 140 and a positive voltage to the drain (111 or 112) while the source (112 or 111) is grounded. The channel electrons are accelerated in the lateral field. The electrons eventually achieve sufficient energy to be injected into the silicon nitride layer 122, this being known as hot electron injection. When the drain and the gate voltages are no longer present, the bottom oxide layer 121 and the top oxide layer 123 of the ONO structure 120 prevent electrons from moving to the substrate 101 or the gate 140. An erase operation is performed by injecting holes generated in the drain (111 or 112) into the ONO structure 120 by a band-to-band tunneling mechanism. During erase operations, a positive voltage is applied to the drain (111 or 112) and a negative (or zero) voltage is applied to the gate 140. During read-out operations, the drain current is sensed in the direction "reverse" to the programming current, as indicated at the bottom of FIG. 10.
The major advantage of NROM cell 100 is the local charge trapping in charge trapping regions 122L and 122R, instead of in an entire floating gate structure as in conventional floating gate poly EEPROM cells. This local charge trapping arrangement enables NROM cell 100 to utilize significantly lower charge quantity to influence the cell threshold voltage Vt during read-out operations, in comparison to floating gate poly EEPROM cells. In addition, the local charge trapping arrangement facilitates "two bit operation"—i.e., programming the cell in different directions to store two bits of information in the single cell.
Although conventional NMOS cells provide many advantages over floating gate poly EEPROM cells, they also present unique problems. One problem associated with SONOS NMOS memory cells is that the charge trapping is not perfectly local; that is, some electrons are trapped far from drain edge (see FIG. 11), and these electrons cannot be erased efficiently using the conventional BBT erase process that generates local hole injection only near the drain. Thus, the endurance of NROM cells is limited due to the inability of the standard erase process to erase the parasitic electrons trapped in Bottom Oxide (BOX) and Nitride layers far from the drain edge. In addition, cell endurance is further limited by hot carrier degradation of the BOX layer due to hot carriers creating traps in the BOX layer during cycling, which are filled by the parasitic electrons, thus creating a closed positive feedback degradation loop (i.e., trap creation—electron trapping—erase voltage increases—more holes injected—more trap generation in the BOX layer far from the drain).
It is of great commercial importance to the manufacturers of NROM technology devices to provide NMOS cells that have a program/erase endurance of more than ten million cycles. Such endurance opens new business/marketing perspectives (for example, applications connected with recurrent storage of information, typical for automotive and image processing systems). Thus, there is a need for the manufacturers of NROM technology devices to overcome the parasitic electron trapping problem described above, thereby increasing the program/erase endurance of NROM devices to more than ten million cycles.
Conventional methods that attempt to address the problem of parasitic electrons trapped far from the drain edge are disclosed in U.S. Pat. No. 6,760,270 "Erase of a non-volatile memory" (herein "the Chindalore patent"), "A New Combination-Erase Technique for Erasing Nitride Based (SONOS) Nonvolatile Memories", Chindalore et al., IEEE ELECTRON DEVICE LETTERS, VOL. 24, NO. 4, APRIL 2003 Silicon Devices (herein "the Chindalore article"), U.S. Patent Pub. No. 20050237801 "Operation scheme with charge balancing for charge trapping non-volatile memory" (herein "the Shih patent"), and "A Novel 2-bit/cell Nitride Storage Flash Memory with Greater than 1M P/E-cycle Endurance", Yen-Hao Shih, et.al., IEDM 2004 pg. 881 (herein "the Shih article"). These references generally teach hole injection from the substrate in NROM type device operation.
The approach taught in the Chindalore patent and article includes performing a hole injection procedure before the BBT erase process with the aim of decreasing the damage by BBT holes. This hole injection procedure involves thinning the BOX to 30 angstroms (30 A), and using a Fowler-Nordheim (F-N) erase stage at the beginning of each program/erase cycles. This approach has serious limitations. First, the F-N erase stage helps to discharge main distribution of electrons trapped in the drain region, but does not remove electrons trapped far from the drain. Second, the F-N erase stage strongly increases the erase time of NROM devices. Third, the voltages needed for erase are higher than in conventional NROM processes. Thus, this approach fails to overcome the parasitic electron problem in a manner that yields adequate program/erase endurance.
The approach taught in the Shih patent and article includes increasing the initial threshold voltage (Vt) of the memory cells above 3.5V by uniform F-N injection of electrons from the substrate using a positive gate voltage exceeding 20V. This approach makes a strong initial misbalance of electric fields in the ONO structure. The BOX layer field is initially high, which further allows enhancement by negative voltage at the polysilicon gate, and thus hole injection into the ONO structure. However, this approach also has serious limitations. First, increasing of the initial threshold voltage level assumes occupying of a large number of SiN traps. Thus, further large cycling windows can not be achieved due to the lack of available traps. Second, the readout voltage has to be strongly increased (above 4.5V to 5V), and thus additional high voltage circuitry is needed in design to support this voltage. Third, no protection circuits against plasma charging can be employed (otherwise the initial F-N p-injection is not feasible). Absence of protection makes the technology strongly dependent on Plasma potentials in the back/end of the process flow. The result is strong fluctuations of the initial threshold voltage, thus resulting in serious problems in array operation.
What is needed is an operating method and structure that increases the program/erase cycle endurance of NROM cells while avoiding the problems associated with the conventional approaches described above.

NROM memory device with enhanced endurance


A method for actuating a system on chip (SOC) includes the following steps. First, determine whether the SOC is connected to a computer system via a communication connection. If no, determine whether a non-volatile memory of the SOC has an initial flag signal. If yes, read correction information stored in the non-volatile memory in response to the initial flag signal and set a corresponding first register of the SOC according to the correction information.

1. Field of the Invention
The invention relates in general to a method for actuating a system on chip (SOC), and more particularly to an actuating method of debugging a read only memory (ROM) via a non-volatile memory.
2. Description of the Related Art
A read only memory (ROM) is normally disposed in a conventional SOC for storing setting information. When the system is turned on, the conventional SOC sets a number of registers according to the setting information of the ROM to complete a turn-on operation. However, the conventional SOC has a number of issues as follows.
Owing that the setting information stored in the ROM has to be recorded in the ROM in the manufacturing process of the SOC, the setting information cannot be modified after the SOC has been manufactured. Therefore, if the setting information or program codes of the ROM are found to be defective after the SOC is fabricated, the setting information or program codes can only be modified by remaking the SOC and the defective SOC has to be discarded. As a result, the conventional SOC has a higher manufacturing cost due to the remaking requirement.
Besides, once the specification, product symbol or capacity of peripheral hardware connected to the SOC needs to be temporarily changed due to industrial consideration, the setting information of the ROM of the conventional SOC has to be re-made to modify the setting information recorded in the ROM so as to work with the peripheral hardware having the new specification, product symbol or capacity. Therefore, the conventional SOC has also a drawback of lacking elasticity of being compatible with various kinds of peripheral hardware.

Method for actuating a system on chip (SOC) and computer system medium thereof


A masonry or rock drilling tool suitable for use with a rotary hammer has a drilling head (4, 104) at a forward end of the tool. A forwardly extending cutting plate (6, 106) is fitted or formed on the drilling head (4, 104). First and second opposing axially extending channels (36, 38, 136, 138) are formed on the circumferential periphery of the drilling head. The tool has a clamping shank (2, 102) at a rearward end of the tool suitable for fitment within a tool holder of a rotary hammer. An intermediate helical conveying portion (10, 110) extends between the drilling head and the clamping shank. The intermediate helical conveying portion has at least four helically extending flutes (14a–d, 114a–d) separated by corresponding helically extending webs (12a–d, 112a–d). The first of the axially extending channels extend axially rearwardly from a forward facing face of the drilling head into two of the four flutes. The second of the axially extending channels extend axially rearwardly from the forward facing face of the drilling head into the other two of the four flutes. Conveying properties of the tool are substantially enhanced by having each axially extending channel leading into two of the four flutes.

Masonry drilling tools generally comprise a drill head provided with a carbide cutting plate, and optionally side cutting plates and a single-start or multi-start spiral conveying helix, which adjoins the drill head. At the end of the conveying helix remote from the drill head is generally provided a clamping shank which can be releasably fixed within a tool holder of a rotary hammer. Such masonry drilling tools are generally driven by a rotary hammer which can simultaneously apply a rotational drive to the drilling tool and repeated axial impacts to the rearward end of the drilling tool.
In masonry drilling tools, the primary function of the conveying helix is to convey the drilled hole material, such as dust and chippings, broken away by the carbide cutting plate out of the hole. It is important to the performance of the drilling tool that a large volume of broken material, such as dust and chippings, is conveyed out of the drilled hole because this aids the advancement of the drilling tool into the drilled hole. Good material conveying properties also help to prevent jamming of the drilling tool within the drilled hole, which jamming can damage the drilling tool and the rotary hammer driving the drilling tool. The life of the drilling tool is also improved if it has good material conveying properties. The conveying helix also performs the function of guiding the drilling tool within the drilled hole.
The conveying helix generally comprises one or more discharge grooves or flutes which extend helically around the drilling tool. Each of the flutes is bounded on each side by a corresponding helically extending web. Each web has a conveying surface which faces in the direction of the clamping shank of the tool along which broken material is conveyed. The radially outwardly facing surface of the webs guides the drilling tool within the drilled hole.
There are a number of proposals for improving the conveying properties of the conveying helix, for example WO99/29998, which advocates the use of auxiliary webs and/or flutes in addition to the primary webs and flutes of a drilling tool.
Critical to the conveyance of broken material out of the drilled hole is the conveyance of broken material from the carbide cutting plate at the forward facing face of the drill head, where the broken material is generated to the entrances to the flutes of the conveying helices. For this purpose a plurality of substantially axially extending channels are generally formed around the drill head for transporting broken material from the cutting plate or plates to the entrances to the flutes of the conveying helices. This has been addressed, for example in EP657,617 and DE197 03 994 in which relatively high volume channels are provided for this purpose. Also, DE195 37 900 and DE200 21 710 propose improved designs of such channels.


A naturally occurring zeolite is coated with a special nanophase Fe oxide, thereby forming a nanophase Fe oxide coated zeolite. The composition thus formed can be used for a variety of horticultural and floricultural end applications. When the nanophase Fe oxide coated zeolite is dosed with plant nutrients and is then mixed with a suitable potting compound, the result is a Complete Plant Growth Medium (CPGM). Blending 5% to 25% CPGM by weight with sand, peat, compost, vegetable and flower beds, and native and manufactured soils, provides a number of beneficial properties. Also, CPGM alone can be used for growing indoor plants to avoid plant pests and compost odor.

1. Field of the Invention
The present invention relates to a plant growth medium made from a zeolite coated with nanophase Fe oxide which can be used in a variety of different end applications, e.g., being loaded with a complete spectrum of agronutrients necessary for plant growth, making the medium useful for a variety of floricultural and horticultural applications.
2. Description of the Prior Art
One area in which a horticultural/floricultural adjunct, e.g., a complete plant growth medium of the type under consideration, could be used to advantage is in the area of "urban horticulture." Urban horticulture is the practice of growing ornamental plants, vegetables, fruits, and turf in an urban setting. These plants may be grown in native soil, highly-modified beds (manufactured soil), or containers. Abundant and healthy urban vegetation is an important resource for mitigating the urban heat island phenomena that is becoming increasingly prevalent in large metropolitan areas (Lo, C. P., D. A. Quattrochi, and J. C. Luvall. 1997. "Application of high-resolution thermal infrared remote sensing and GIS to assess the urban heat island effect." J. Remote Sensing. 18:287-304). In terms of food production, urban vegetable gardening can play a small but important role in helping supply cities with a fresh source of food products. Such a "companion food security movement," is touted as promoting urban-rural linkages and has been demonstrated to be an important part of the urban life in fulfilling the food needs, psychological and physiological health, social cohesion, crime prevention, recreation, and life satisfaction, especially of low-income communities (Hynes, H. P. and G. Howe. 1993. International Conference on Urban Horticulture. http://www.actahort.org/books/643/643—21.htm, Aug. 24, 2004). A dimension of the urban horticulture that has not been given adequate attention so far, however, is the availability or lack of availability of a good local support system by the city governments and/or the enhancement of its service capability to the community at large. A suitable plant growth medium, of the type under consideration, could help to address these needs and could be used in urban horticulture to save precious and scarce water resources, as well as avoiding excess fertilizer usage, thereby preventing nitrogen and phosphorous run off into the municipal sewer system.
One use for a plant growth medium of the type under consideration would be for container growing of plants in urban horticulture. There are multiple reasons why it is important to have container grown plants in an urban setting. Homeowners often have limited garden space or have soil that is not well suited for growing horticultural plants. Homes and businesses are often constructed on marginal soils that have unsuitable physical and chemical properties, such as high pH, or high clay contents, making them impermeable and slow to drain. It is often difficult to grow healthy plants in urban soils because the soils contain large amounts of construction debris, such as mortar, bricks, sheetrock, plywood, plastic, and other leftovers from the home building/improvement activities (North Carolina Cooperative Extension Service. 2004. Residential Landscaping. Publication AG-248. http://ipm.ncsu.edu/urban/horticulture/res_landscaping.html, Aug. 24, 2004). Growing plants in containers protects the homeowner from distasteful or unsuccessful modification of the landscape that might discourage potential home buyers in the event that the property goes on sale. In order for cities to mitigate the harmful heat island phenomena, it will become increasingly important that they be able to grow plants in containers so that they can establish cooling vegetative zones in such places as roadsides, parking lots, and rooftops.
Because the plants are grown in containers, one can prepare the container-mix to the exact requirements of a plant for better growth and production (Ohio State University Extension. 2004. "Growing Cucumbers, Peppers, Squash and Tomatoes In Containers." Fact Sheet HYG-1645-94. http://ohioline.osu.edu/hyg-fact/1000/1645.html, accessed Aug. 24, 2004). Accordingly, the mix (soil-mix/potting-mix/container-mix) should be loose and well drained, and should contain a generous amount of organic matter. This is typically achieved by mixing potting soil, perlite, sphagnum moss, and compost in appropriate proportions. Garden soil is generally avoided because it is much heavier than organic blends and it might contain damaging plant pests, but if garden soil is used, as some would prefer, it is important to use appropriate amendments to make sure the final mix has physical characteristics suitable for plant growth.
Despite the above recognized needs, presently available natural and synthetic plant growth mediums have suffered from various deficiencies or disadvantages when considered for use in the urban setting. For example, sphagnum peat moss is a widely used and important component of potting mixes sold in United States horticulture markets. The principal use of peat is to provide the bulky organic component of the growing medium. Sphagnum peat moss is less commonly used as a minor component of amendments for improving soil physical properties.
In 1999, the U.S. consumed on the order of 1.5 million tons of peat as one of the potting mix ingredients. Currently, U.S. imports peat from Canada and Ireland, but due to environmental restriction in these countries these imports may be restricted or even eliminated. Furthermore, peat is biodegradable and has a limited life span.
Another common potting mix ingredient is perlite, a mineral that has negative exchange sites and does not have the ability to retain anions.
A need exists, therefore, for a horticultural/floricultural adjunct, e.g., a complete plant growth medium which is superior to both peat and perlite in that the zeolite component in the mix is non biodegradable, helps buffer the mix, and retains both cationic and anionic plant nutrients.


MPEG encoder 3 generates VOBUs from broadcast waves and writes them to HDD 5. Record controlling unit 10 controls MPEG encoder 3 and HDD 5 to repeatedly perform this writing process for achieving a continuous recording function. Record controlling unit 10 also judges if there are points of time at which, by a broadcast station, (i) a service period is switched to an out-of-service period, and (ii) an out-of-service period is switched to a service period. Record controlling unit 10 suspends the writing to the HDD 5 at a point of time at which a service period is switched to an out-of service period, and resumes the writing to the HDD 5 at a point of time at which an out-of-service period is switched to a service period.

1. Field of the Invention
The present invention relates to recording apparatuses that perform recording process on broadcast programs, particularly to an improvement on continuous recording process.
2. Description of the Background Art
It has started to be considered to equip a recording apparatus capable of recording for long hours with a continuous recording function. "Continuous recording" means to endlessly keep recording broadcast contents by sequentially recording the broadcast contents on a certain channel according to a user's operation, and overwriting the recorded broadcast contents from the start of the recording medium when it gets full.
When a recording apparatus performs continuous recording on a recording medium of a HD (Hard Disk) with a capacity of 52-hour-long contents, there will be broadcast contents of up to 52 hours ago recorded on the recording medium, and the user is able to view the broadcast contents of up to 52 hours ago.
In actuality, the broadcast service is not offered around the clock, and in most cases, the service is suspended during such hours as late at night and early in the morning.
When the recording apparatus keeps performing the recording process through such an out-of-service period with the continuous recording function, the recording medium may be filled with meaningless broadcast contents offered during the out-of-service period. When there are some broadcast programs that have already been recorded on the recording medium, they may be overwritten with such meaningless broadcast contents offered during the out-of-service periods. In other words, the data recorded on the recording medium may partly get erased.
The schedules of out-of-service periods of the broadcast service vary depending on the monthly and weekly broadcast schedules, and it would be very troublesome for the users to have to find out the schedules and change the settings so that no recording should be performed during the out-of-service periods.
Moreover, if a big accident or a natural disaster breaks out late at night or early in the morning, a special news program will be often broadcasted during the normal out-of-service periods. In such a case, out-of-service periods and broadcast service periods come about irregularly. If a user has programmed the recording so that the recording is suspended during the out-of-service periods according to the predetermined broadcast schedule, and the broadcast service happens to be resumed by an irregular schedule, a news program for a natural disaster in the middle of the night, for example, will not be recorded.

Recording apparatus and computer-readable program

Matsushita Electric Industrial Co., Ltd.


Branch prediction logic is enhanced to provide a monitoring function for certain conditions which indicate that the use of separate BHTs and predicted target address cache would provide better results for branch prediction. The branch prediction logic responds to the occurrence of the monitored condition by logically splitting the BHTs and count cache so that half of the address space is allocated to a first thread and the second half is allocated to the next thread. Prediction-generated addresses that belong to the first thread are then directed to the half of the array that is allocated to that thread and prediction-generated addresses that belong to the second thread are directed to the next half of the array that is allocated to the second thread. In order to split the array, the highest order bit in the array is utilized to uniquely identify addresses of the first and the second threads.

1. Technical Field
The present invention relates to data processing and in particular to branch prediction in data processing systems. Still more particularly, the present invention relates to a method and system for efficiently handling simultaneous multi-threaded operations within a branch prediction mechanism of a data processing system.
2. Description of the Related Art
Branch prediction within processing systems is well known in the art. When instructions are initially fetched from cache or memory for execution at the processing units, a prediction mechanism within the processing unit predicts a path that will be taken by branch instructions within the group of fetched instructions. The instructions are address operations and the path is identified by an address, referred to as a target address. When the instruction is actually executed, a check is made whether the predictions were correct.
Specific hardware and/or logic structures within the processor carry out the branch direction prediction and subsequent analysis of whether the path was correctly predicted. Some current systems utilize branch prediction logic that includes 3 branch history tables (BHTs) which store predictors for fetched branches, and a predicted target address cache (referred to hereinafter as a "count cache"), which stores predicted target addresses for some of the fetched branch instructions. One BHT, referred to as the "local predictor," is indexed by partial branch addresses. The prediction direction is associated with the address in the local predictor. The other two BHTs, "global predictor" and "selector," are indexed by a hash of the partial branch address and recent path of execution. The count cache is utilized for certain types of branch instructions whose target addresses cannot be directly computed from information in the branch instruction itself, by associating target addresses with branch institution addresses.
One improvement in data processing that affects how application instructions are executed by the processor and subsequently the reliability of branch prediction is the implementation of simultaneous multi-threading (SMT). With SMT, program applications executing on the processor are executed as one or more threads. Each thread comprises a stream of instructions. At any given time, information from multiple threads may exist in various parts of the machine. For example, with two executing threads, both threads appear to the OS as two separate processors. Each of the two threads has (or appears to the OS to have) its own copy of all the normal architected registers that a program can access and/or modify.
Often, multiple copies of the same application are executed concurrently in order to speed up the overall processing of the application on the system and ensure more efficient utilization of processor resources. When this occurs, each copy provides its own set of threads, and each thread shares similar program/instruction addresses within the memory subsystem. Branch prediction information (written to the BHTs and count cache) are also the same and can be merged. It is also common, however, for the threads executing on the processor to belong to different application and thus have different program/instruction addresses within the memory subsystem. However, the partial addresses of the instruction stored within the BHTs and the count cache may be similar resulting in some conflict at the BHTs and count cache and accuracy problems with branch prediction.
At the processor level, the addresses utilized during processing are typically effective addresses. Each of these effective addresses map to specific real addresses within the physical memory space. When the instructions are initially retrieved from memory, they are assigned an effective address. A common practice is to begin assignment of lower order bits of effective addresses for each application at a particular addresses to ensure that number of effective addresses required for operations within the processor is not excessively large. The lower order bits of effective addresses are thus utilized and re-utilized for each thread, and threads of different applications with different physical addresses are often assigned the same lower order bits of effective addresses. For example, the compiler may always start a program at the same effective address when it begins lading irrespective of whether another thread (of the same or another program) has been assigned the same effective address. Thus, in the multi-threaded environment, different threads from different applications utilizing processor resources may share the same EA's but because they map to different RAs, the threads necessarily provide very different targets and direction predictions and should not be handled in the same manner when completing way prediction.
Typically the part of the instruction address utilized to index into the BHTs and the count cache are lower order bits, which will tend to be unique for each instruction (or group of instructions in a superscalar machine) of a single application. Each BHT provides an array of 1 or 2-bit wide registers to store the predictors, and the count cache provides an array of registers the width of an instruction address. Assuming the number of lower order instructions address bits used to index into the array is x, the possible register address entries per array is 2x to accommodate all possible addresses. The number of low order instruction bits used to index into the count cache need not be the same as the number of bits used to index into the BHTs.
In SMT mode, two threads share the three BHTs and the count cache. When both threads are running the same code, i.e., threads of the same application, there is an advantage to both threads sharing common BHTs and a common count cache and it is thus important that both threads be able to share BHT and count cache entries. However, when each thread is running different code, the current system by which the threads share common BHTs and common count cache may result in faulty predictions because of the overlap in addresses that may be placed within the BHTs and count cache. Within a multiple application environment this sharing of cache lines would cause some amount of thrashing within the branch prediction mechanism. Currently, there is no implementation in which way branch prediction logic can accurately ensure that prediction from within the BHTs and count cache is not faulty due to the sharing of effective address between threads of different program code.
The present invention thus recognizes that it would be desirable to provide a method, processing system, and branch prediction mechanism that substantially, eliminate faulty predictions caused by SMT operations for different program code. A method, processing system and branch prediction mechanism that enables correct way-prediction when threads of different applications share lower order effective address bits but map to different real addresses would be a welcome improvement. The invention further recognizes that it would be beneficial to provide each thread in a SMT processor the protection of its own private BHTs and count cache spaces, inaccessible to the other thread, without substantially increasing hardware or logic costs (i.e., by sharing current hardware in a non-overlapping way). These and other benefits are provided by the invention described herein.

Thread-specific branch prediction by logically splitting branch history tables and predicted target address cache in a simultaneous multithreading processing environment

International Business Machines Corporation


A display device, which defines an attached state or a removed state with respect to an electronic appliance, includes a display section, a driver for driving the display section, a transceiver for transmitting or receiving a signal to/from the electronic appliance, and a system controller for controlling the driver and the transceiver. At least portion of the transceiver and at least portion of the system controller are integrated together with the display section and the driver on the same substrate.

1. Field of the Invention
The present invention relates to a display device and an electronic appliance such as a camera.
2. Description of the Related Art
Various types of flat-panel displays (FPDs) with a shallow physical depth, including liquid crystal displays and organic EL displays, have recently been increasingly popularized. FPDs have now found applications particularly frequently in personal computers, personal digital assistants (PDAs) and cell phones among other things.
Meanwhile, the "intelligence", i.e., the level of digital information processibility, of household electronic appliances has also been raised day after day by recent extensive research and development of digital information processing technologies. As a result, not just TVs and cameras (including digital still cameras and camcorders) but an increasing number of microwave ovens and refrigerators are now equipped with digital information processibility.
Taking these circumstances into account, the "display device" now should be regarded as playing an important role of interfacing human users with numerous types of machines surrounding them as well as the traditional role of outputting or presenting information thereon.
Conventional electronic appliances, however, have their own display devices, none of which is normally removable from its parent appliance or compatible with any other appliance.

Display device, electronic appliance and camera


The specification describes a composite TiN barrier layer structure formed by depositing a first TiN layer by CVD to obtain good step coverage, followed by a second TiN layer formed by PVD to obtain uniform surface morphology for subsequent deposition of an aluminum alloy contact layer. Alternatively, uniform TiN layer morphology is obtained by depositing multiple CVD TiN layers as a series of thin strata, and passivating after each deposition step to fully crystallize each stratum thereby obtaining a uniformly crystallized barrier layer.

A wide variety of metallization approaches for silicon integrated circuits have been used in the past but in current commercial practice a relatively few highly developed and proven systems are considered standard. Nearly all metallization systems use aluminum and aluminum alloys as the predominant interconnect material, but it has been known for some time that aluminum does not form a reliable contact to silicon for substrate connections, or to polysilicon at the gate level interconnect.
An approach to overcome this that has gained wide acceptance is to interpose a barrier layer between the aluminum alloy and the silicon or polysilicon surface. The barrier layer is typically Ti/TiN formed using a cluster tool by sputtering titanium from a titanium target in argon, then introducing nitrogen into the sputtering chamber to produce an overcoating of TiN. Alternatively, the TiN is deposited in a separate chamber of the cluster tool. The titanium layer forms a stable interface and promotes adhesion with silicon, and the TiN layer acts as a barrier between the silicon and the aluminum alloy plug. However, with ever diminishing lithographic design rules the aspect ratio of the windows and the vias shrinks to the point where bottom and sidewall coverage of the Ti/TiN barrier is inadequate. This creates several potential problems. One of the most serious of these is the formation of aluminum spiking in regions where the layers are incomplete or too thin.
To address bottom coverage attempts have been made with collimation techniques for the sputtered beam to fill the bottom of the window or via. While this improves bottom coverage, sidewall coverage is still a problem due to the anisotropic nature of the deposition.
Another approach to non-uniform barrier layer coverage has been to deposit the TiN barrier layer using CVD. See e.g., Sherman, "Titanium Nitride Deposition in a Cold Wall CVD Reactor", Materials Research Society--Proceedings of the 1988 Workshop, pp. 323-329 (1989); Pintchovski et al "LPCVD Titaniun Nitride--Deposition, Properties, and Applications To ULSI", Materials Research Society--Proceedings of the 1988 Workshop, pp. 275-282 (1989); This deposition technique produces conformal coatings, improving both the step coverage (sidewall) and the bottom coverage. Since the quality and coverage of CVD deposited films is superior to sputtered films the thickness of the TiN barrier layer can be substantially reduced, from typically a thousand angstroms for sputtered barriers to 20-400 angstroms for CVD barrier layers.
TiN is typically deposited by CVD using two precursor materials, TiCl.sub.4 or an organic titanium compound, e.g. tetrakis--(dimethylamino) titanium (TDMAT) or tetrakis--(diethylamino) titanium TDEAT. For further details of this process see e.g. Konecni et al, "A Stable Plasma Treated CVD Titanium Nitride Film For Barrier/Glue Layer Applications", 1996 VMIC Conference 1996 ISMIC--106/96/0181(c), pp. 181-183, 1996.
CVD TiN deposited using TiCl.sub.4 has a very high resistivity unless it is deposited at elevated temperatures, typically 500-550.degree. C. Therefore its application may be limited to contact (window) plugs. Moreover, TiN produced using TiCl.sub.4 has a high Cl impurity content. Chlorine is corrosive and at high levels is unacceptable in IC environments. The organic precursors, e.g. TDMAT, are gaining popularity in the field because of the highly conformal nature of the coating, low deposition temperature, and simple processing techniques. However, we have discovered that this technique has several limitations.
CVD-TiN deposited for barrier layers requires a post deposition treatment in N.sub.2 to stabilize the layer (see Konecni et al ref. above). Usually, the treatment is carried out using a plasma in the same chamber. The organic precursors TDMAT and TDEAT leave residual carbon and oxygen. The stabilization treatment assists in removing carbon and replaces the amine groups in the TiN film. However, the film typically undergoes crystallization, with substantial shrinkage e.g. 50%, particularly in the field areas and at the bottom of the window/via where plasma exposure is highest. The sidewalls receive less exposure to the plasma and therefore retain most of the original thickness. In fact, sidewalls show greater than 100% (approx. 110-130%) of the field TiN thickness after plasma treatment. This difference in exposure results in a difference in the morphology of the film between the sidewalls and the bottom. The sidewalls show some crystallization but remain mostly amorphous. The bottom regions, however, have a highly crystalline or nano-crystalline morphology. The sidewall shows a thin layer of crystalline material on an amorphous underlayer while the field and bottom regions show crystalline or nano-crystalline features. Since the degree of transformation varies in a plasma-treated film, depending upon the location in a feature such as a window or via, the crystallographic texture of the treated TiN film will also vary. When Al is deposited on the plasma treated TiN films, because of the varying texture, the Al texture will also vary. Consequently, for illustration, the Al will have a <111> texture at the bottom and the field regions, and non-<111> texture on the sidewalls. The amount of Al <111> texture will also depend on the degree of TiN transformation, plasma treatment parameters, processing parameters, etc.
Since the Al is of varying texture along various regions of the opening, the reliability of the Al plug and film will be suspect, since Al films with <111> texture are reported to have good resistance to electromigration and stress-induced voiding. Therefore, films of varying texture will have questionable reliability.
Moreover, since the plasma exposure at different locations of the opening (contact or via) varies, the grain size of the plasma-treated TiN (hereafter called transformation region) will also vary. The non-uniform variation in grain size, attendant with very small grains and therefore a large number of available diffusion paths per unit area, will allow localized migration of Al and an increased propensity for junction leakage and spiking.

Silicon IC contacts using composite TiN barrier layer