A plant comprising a modified Flowering Locus (FT) polynucleotide expressing a modified polypeptide exhibits altered flowering time, floral numbers and/or increased seed production. Different mutant sequences conferring different phenotypes are disclosed.

Flowering time in photoperiodic flowering plants is a key developmental switch that is affected by environmental signals perceived by the leaves. An important component of the signalling pathway that regulates flowering is the Flowering Locus T (FT) gene. When a plant is induced to flower a phloem-mobile signal termed "florigen" is produced which is transported through the phloem translocation stream to the shoot apical meristem (SAM) where it induces floral development1,2. In Arabidopsis, the mobile florigen has been shown to be encoded by the Flowering Locus T (FT) gene. FT transcribes mRNA specifically in phloem cells but not in the SAM3. Its protein product, however, functions at the shoot apex4-6. Arabidopsis FT is a small globular 23 kd protein consisting of 175-amino acids (aa) with homology to the mammalian phosphatidylethanolamine binding protein (PEBP) or Raf kinase inhibitor protein. FT belongs to a group of six closely related proteins, which includes TFL1 and CENTRORADIALIS (CEN) of Antirrhinum.
There is collective evidence that the Arabidopsis FT protein7,8 and its tomato SFT9, rice Hd3a10 and Cucurbit Cm-FTL½11 orthologs act as a component of the non cell-autonomous flowering signal that is transported through the phloem into the SAM, whilst the role of FT mRNA movement in long-distance florigenic signalling remains unknown12. Once FT is present in the SAM, it interacts with a bZIP transcription factor, FD, encoded by Flowering Locus D to activate floral identity genes such as APETELA 1 and SUPPRESSOR OF OVEREXPRESSION OF CO1. The latter activates LEAFY and induces flowering4,6. Natural genetic variation in genes controlling the expression of the rice FT ortholog Hd3a, and in Hd3a itself, contribute to diversity of flowering time in cultivated rice13. Overexpression of FT in transgenic plants from several species is associated with early flowering. U.S. Pat. No. 6,225,530 describes an isolated polynucleotide encoding an FT polypeptide. Hanzawa et al also describes modified FT and their expression sequence in plants14.
Flowering time and quantity of flowers (and seed) are crucial aspects of crop yield and quality and there is a need in agriculture to create new tools to control the time and amount of flowering and seed production in a wide variety of plant species. As well as enhancing plant productivity by increasing flowering, in certain plant species it is desirable to delay or prevent flowering altogether. The present invention is aimed at addressing these needs. Bioengineering of FT or creating novel FT alleles by TILLING, mutation breeding and selection of FT may provide useful alleles for breeding of novel crops to enhance productivity to meet rapid increase of global demand for food, feed and fuel.
Citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention.

Molecular engineering of a floral inducer for crop improvement


The present invention relates to an image sensor chip package and a method for fabricating the same. In one embodiment of an image sensor chip package, chip pads on a first surface of an image sensor chip are attached to electrode pads of a glass substrate with conductive material. In addition, electrode pads are connected to solder balls via a metal wiring pattern arranged on a second surface of the image sensor chip. As a result, the present invention can provide further miniaturized and thinned image sensor chip packages, reduce fabricating processes, and improve device performance and reliability.

1. Field of the Invention
The present invention relates to an image sensor chip package and a method for fabricating the same. More specifically, the present invention relates to an image sensor chip package having no wire bonds and a fabrication method thereof, thus enabling production of further miniaturized and thinned packages.
2. Description of the Related Art
Conventionally, an image sensor is comprised of a semiconductor device that can transform an optical image into an electric signal. Such an image sensor is used for storage, transmission and display of an image signal. Semiconductor image sensors are generally classified into Charge-Coupled Device (CCD) and Complementary Metal Oxide Semiconductor (CMOS) image sensors. In a CCD image sensor, charges are transmitted in a desired direction by controlling the depth of potential wells. A CMOS image sensor includes one or more transistors and photodiodes as an optical sensor in one pixel.
A CCD image sensor has less susceptibility to noise and higher image qualities in comparison with CMOS image sensors. Accordingly, a CCD image sensor is applicable for high quality image devices such as a digital camera. On the other hand, a CMOS image sensor has low power consumption and low production cost in comparison with a CCD image sensor. In addition, a CMOS image sensor generally incorporates peripheral circuits. This is especially advantageous because CMOS image sensors may be produced by a general semiconductor device (e.g., CMOS) manufacturing technology. A CMOS image sensor is applicable for a camera attached to a personal digital assistant (PDA) or cellular phone. Because of the rapid progress of its manufacturing technology, CMOS image sensors have been used in a variety of applications.
Generally, an image sensor chip package is fabricated or packaged by attaching a transparent substrate to one surface of a chip (on which a sensing element is formed), and attaching a separate substrate to the other surface of the chip. The transparent substrate is generally used for receipt of light and protection of the chip. CLCC (Ceramic Leadless Chip Carrier), PLCC (Plastic Leadless Chip Carrier), COB (Chip on Board) and the like are used for packaging such an image sensor chip.
FIG. 1 shows an image sensor chip package fabricated by the CLCC packaging method. Referring to FIG. 1, a chip 102 is attached to a blank package 100 formed of ceramic material with an adhesive 104. The chip 102 is electrically connected to leads 108 disposed in the package 100 by gold (Au) or aluminum (Al) wires 106. Then, in order to protect the chip 102 and enable a sensing element 110 thereon to receive light, a transparent substrate 120 is attached on the top of the package 100.
Drawbacks of CLCC packages include limited numbers of leads and high cost. In the case of a CLCC chip package, a package is formed of ceramic material, which may limit the number of leads. In addition, due to the high price of ceramic packages, the CLCC chip package is not preferred for highly-integrated chips. In a PLCC chip package, a chip is attached to a blank package with an adhesive, and chip pads are electrically connected to leads inside the package with Au or Al wires. Then, for the protection of the chip and the receipt of a light, a transparent substrate is attached and sealed on the top of the package. A PLCC chip package may be fabricated by a conventional plastic package fabricating method. That is, a chip is attached to a lead frame pad with an adhesive, and then the chip and the lead frame are electrically connected to each other by wires. Further, epoxy molding compound (EMC) envelops the outside of the chip and the lead frame, except the upper surface of the chip. Then, a transparent substrate is attached and sealed on the upper surface of the chip. Finally, the package is completed through a trimming process, forming process and marking process on the lead frame.
However, such a PLCC chip package may develop a micro-gap between the epoxy molding compound and the transparent substrate due to a difference in material properties between the organic material and the inorganic material. In addition, the epoxy molding compound in a PLCC chip package does not block alpha particles, which can result in electrical failures of the image sensor element. As a result, the reliability of the PLCC package may be less than optimal.
Recently, COB packaging technology has been developed as a method for modularizing an image sensor chip package, using an anisotropic conductive film (ACF). ACF has also been also used in manufacturing liquid crystal display (LCD) panels. Korean Patent Laid-Open Publication No. 2003-69321 discloses a method for fabricating an image sensor chip package, which utilizes a Flip Chip Au bumping process and COB packaging technology.
According to the COB packaging technology, a chip is attached on a substrate provided with a predetermined pattern, and an electrode pad on the chip is electrically connected to the predetermined pattern with wires. Then, a transparent substrate is attached on the top of the chip, thus protecting the chip. However, such a COB chip package is modularized using a housing and a lens right after the chip is attached. Therefore, it may result in failures due to contamination of impurities.

Image sensor chip package and method of fabricating the same


A dual-bearing reel spool braking device is configured to brake a spool that is rotatably mounted on a reel body by centrifugal force. The dual-bearing reel spool includes at least one brake shoe, a rotating member and a brake drum. The brake shoe is arranged to apply a braking force to the spool. The rotating member is configured to rotate in conjunction with the spool. The rotating member includes a pivot shaft portion and a fixing portion. The pivot shaft portion pivotally supports the brake shoe and that movably supports the brake shoe in an axial direction of the pivot shaft portion. The fixing portion engages the brake shoe and non-pivotally fixes the brake shoe. The brake drum is arranged to selectively contact the brake shoe.

1. Field of the Invention
The present invention generally relates to a dual-bearing reel spool braking device. More specifically, the present invention relates to a dual-bearing reel spool braking device that applies brakes to a spool that is rotatably mounted on a reel body. Additionally, the present invention relates to a dual-bearing reel that has a spool braking device.
2. Background Information
In a dual-bearing reel that is used for casting, in order to prevent backlash, a braking force is generally applied to the spool. A known spool braking device of this type is a spool braking device that applies brakes the spool using centrifugal force that is generated by the rotation of the spool, in which this braking force is adjustable from the outside of the reel body. However, backlash is generated when the rotational speed of the spool becomes faster than the line delivering speed during casting.
In a conventional spool braking device, a spool braking device that applies a braking force to a spool by pivoting a brake shoe and that has the brake shoe come into contact with the brake drum has been disclosed (refer to Japanese Laid-Open Patent Publication No. 2013-00086).
Specifically, in this spool braking device, the brake shoe pivots in conjunction with the rotation of the spool and comes into contact with the brake drum. More specifically, a bracket is fixed to the spool shaft, and a pin is installed on this bracket. The brake shoe is slidably mounted on this pin. With this, when the spool rotates, the brake shoe slides around the pin and comes into contact with the brake drum due to the centrifugal force. In this way, a braking force is applied to the spool. Additionally, a recess (a switching recess) is installed on the brake shoe, and a protrusion (a switching protrusion) is installed on the bracket. When the brake shoe is made inoperable, the recess of the brake shoe elastically engages with the protrusion of the bracket by sliding the brake shoe. With this, the position of the brake shoe is retained so that the brake shoe will not operate.

Dual-bearing reel spool braking device and dual-bearing reel


A method of determining whether an optical pick-up of an optical device passes through a data track of a storage device during track-seeking based on a radio frequency (RF) signal, a radio frequency zero cross (RFZC) signal radio and a track-seeking signal of the optical device. When the optical pick-up of the optical device passes through a data track of the storage device during track-seeking, a trigger signal is sent to a data phase locked loop of the optical device for frequency and phase adjustment. The method can activate the data phase locked loop of the optical device while the optical device is performing track-seeking.

1. Field of the Invention
The present invention relates to a method of activating a data phase locked loop and an apparatus of operating the same, and more particularly, to a method of activating a data phase locked loop during track-seeking and an apparatus of operating the same.
2. Description of the Prior Art
Small-sized, low-cost and large capacity compact discs capable of storing vast amounts of electronic information, data or video messages have become one of the most important means of storing data in modern society. Common digital optical storage devices include compact discs (CDs), video compact discs (VCDs), or digital versatile discs (DVDs) having various specifications such as DVD-R, DVD-RAM and DVD-RW. An optical device, such as a CD player, uses an optical pick-up to access data stored in a CD. To access the correct data, the optical device is required to seek a corresponding target data track and locate the optical pick-up on the target data track for reading or writing data. Therefore, the ability of performing efficient and accurate track-seeking greatly determines the performance of the optical device and has become a major focus when developing a new optical device.
Optical discs, such as CDs, DVDs and VCDs, include a plurality of continuous tracks for data storage. The continuous tracks, comprising many pits and lands, are formed spirally on the surface of the optical disc. Data is written into the optical disc based on a writing pulse and is embedded on the surface of the optical disc in the form of digital signals. Since a piece of data is usually stored closer to the center of the optical disc, the optical pick-up moves from inner data tracks towards outer data tracks when accessing data stored in the optical disc. However, in applications such as playing songs stored in a CD randomly instead of sequentially, the optical pick-up is often required to move from the current data track to another data track. This action of seeking a target data tack is referred to track-seeking or track-crossing. The optical pick-up does not access data while perform track-seeking. Data is only accessed after the optical pick-up has completed track-seeking and has found the target data track.
Since the inner and outer data tracks of the optical disc have different rotational speeds, the locking time of a data phase locked loop (data PLL) often affects the specification of data access time. The data PLL is an essential part of an optical device and can generate timing pulse signals, based on which the optical device can access data stored in the optical disc. Referring to FIG. 1, a prior art data PLL 10 is described. The data PLL 10 includes a phase detector 13, a frequency detector 14, a charge pump 15, a filter 16, a voltage-controlled oscillator (VCO) 17, and a frequency divider 19. The phase detector 13 and the frequency detector 14 provide the charge pump 15 with an adjusting signal based on phase and frequency differences between an eight-to-fourteen modulation signal EFM measured from the optical disc and a feedback signal EFMCLK. Then, the adjusting signal is processed by the charge pump 15, the filter 16, the VCO 17 and the frequency divider 19 for generating the feedback signal EFMCLK. Finally, the feedback signal EFMCLK is sent to the phase detector 13 and the frequency detector 14 and thereby forms a loop until the frequency and the phase of the feedback signal EFMCLK completely match those of the eight-to-fourteen modulation signal EFM.
Since the pick-up of the optical device is not required to access data during track-seeking, the data PLL 10 remains in a "hold" state, which will be explained later. After the optical device has completed performing track-seeking, the data PLL 10 begins frequency or phase adjustments so that the optical pick-up of the optical device can access data stored in the target data track. Referring to FIG. 2, the operation of the prior art data PLL 10 is described. In FIG. 2, T1-T5 represent data tracks of an optical disc, wherein T1 is a starting data track, T5 is a target data track, T2-T4 are data tracks passed by the optical pick-up when the optical device is performing track-seeking (moving from the data track T1 to the data track T5), RF represents a radio frequency signal of the optical device, TRON represents a track-seeking signal measured from the optical disc, and an arrow indicates the track-seeking direction of the optical device. The track-seeking signal TRON having a low potential indicates that the optical device is performing track-seeking and is not required to access data, while the track-seeking signal TRON having a high potential indicates that the optical device has finished performing track-seeking and is ready for data access. The prior art data PLL 10 determines whether it should perform frequency and phase adjustments based on the potentials of the track-seeking signal TRON: if the track-seeking signal TRON has a low potential, the data PLL 10 remains in the "hold" state in which the frequency and the phase of the signal remains the same as when it is used to access the data track T1 and no adjustment is performed; if the track-seeking signal TRON has a high potential, the data PLL 10 adjusts the frequency and the phase of the signal used to access the target data track T5.
The prior art data PLL 10 performs frequency and phase adjustments after the optical pick-up of the optical device has finished track-seeking and found the target track. The adjustments continue until the phase and the frequency of the feedback signal EFMCLK match those of the eight-to-fourteen modulation signal EFM of the optical disc, and data can then be accessed. Since the data tracks T1 and T5 have different rotational speed, the frequency ranges of signals measured from the data tracks T1 and T5 by the optical pick-up also vary. Therefore, in the prior art optical device, longer time is required for phase and frequency adjustments, resulting in longer data access time and influencing the performance of the optical device.

Method of activating a data phase locked loop during track-seeking and apparatus of operating the same


A process for producing a sheet material similar in appearance to but cheaper and of inferior quality as compared with natural leather. A low-cost, poor-quality imitation leather, consisting of a composite sheet material having a polymer matrix with natural or synthetic fibers, is subjected to the same finish process applied in the tanning industry, which process consists in spraying and drying the exposed surfaces of the composite material, in successive stages, with hot-curing plastic dye resins, which are applied in a water or solvent mixture to which wax, pigments and/or metallized azoic dyes may be added; in hot calendering the material using engraved or smooth cylinders or plates; and, if necessary, in fulling the material in rotary drums.

The present invention relates to a process for producing sheet material similar in appearance to but cheaper than natural leather, by processing any known type of imitation leather consisting of sheet material comprising a polymer matrix in which are embedded natural or synthetic fibers.
A lot of industrial applications, such as interior decorating or upholstering, do not always require high-tech materials. In the case of imitation leather, in particular, the only characteristic often required of the material is that it should look like natural leather. Whereas, for high fashion applications, imitation leather must not only look but also "feel" like natural leather, for interior decorating and other applications ranging from footwear to upholstering, very often the only requirement is that the material should look like natural leather, while at the same time being cheaper than both natural leather and high-tech microfibrous synthetic materials.
U.S. Pat. No. 4,766,014 filed by the present Applicant relates to a chemical process for converting imitation leather with a microporous polymer matrix into a material that, to the naked eye, is undistinguishable from natural leather. Notwithstanding the technical characteristics (abrasion and flame resistance, workability, etc.) of the material, which are superior to even those of natural leather, it is relatively expensive to produce, the best results being obtained by processing the same raw material used for producing imitation leather by the name of "SOFRINA" (registered trade mark) which is one of the best and most expensive currently available on the market. Moreover, the above process requires that the imitation sheet material be of a microporous type, which requires superior quality and, therefore, high-cost raw material.

Process for converting composite imitation leather into sheet material similar in appearance to natural leather


System (201) for mitigating co-site interference includes a co-site filter bank (208) containing filters (2061, 2062, . . . 206n) which can be optionally selectively inserted in an antenna input/output path (2051, 2052, . . . 205n) of two or more transceivers (2041, 2042, . . . 204n). A control system (900) receives information concerning the transceivers. Based on the information, the control system determines whether optional RF filtering should be used to limit RF signals which are communicated to or from the transceivers so as to mitigate co-site interference.

1. Statement of the Technical Field
The inventive arrangements relate to RF systems and more particularly to systems in which multiple transmitters and receivers are located in close physical proximity.
2. Description of the Related Art
When there are multiple RF transmitters and receivers located at the same physical location, there is a significant potential for a transmitter to interfere with a receiver at that location. Such interference is usually caused by strong signals from the transmitter having an adverse affect on the operation of sensitive receiver circuitry. The interference can arise regardless of whether the receiver and transmitter are designed to operate on the same band or a different band. In some instances the occurrence of such interference can be obvious whereas in other instances the effects of the interference can be more subtle. For example, intermodulation products created in certain non-linear receiver components (e.g. mixers) can create problems which are difficult to identify.
Identifying and understanding co-site interference can be a complex process which involves every part of the communication systems involved. For example, the analysis process can require analyzing the transmitter signal, modeling the performance of receive and transmit antennas, receiver front end and characteristics, and RF mixers. All such factors must be considered and any modeling inaccuracies can result in a failure to identify potential interference issues. This creates a co-site frequency interference problem which, for many users, can be difficult to identify, avoid and solve. Consider that a user in such a scenario must not merely analyze the problem to identify potential interference issues, but must also then determine what action is appropriate to alleviate the problems. The expertise and equipment required to accomplish the foregoing is frequently beyond the capabilities of many users.

Co-located frequency management and mitigation


An image reading and recording apparatus provided with an image reading portion for reading the image of a document, and an image recording portion for recording an image on a recording sheet is provided with a first stacking portion for stacking thereon a first sheet which is one of the document and the recording sheet, a first feeding device for feeding the first sheet stacked on the first stacking portion, a second stacking portion for stacking thereon a second sheet which is the other of the document and the recording sheet, a second feeding device having a cut-away portion formed by cutting away a portion of the peripheral surface thereof and for feeding the second sheet stacked on the second stacking portion, and a lower guide member extending from the first stacking portion to the second feeding device for guiding the first sheet fed by the first feeding device, and when the first sheet is to be fed by the first feeding device, the second feeding device is stopped in a state in which the cut-away portion is opposed to the lower guide member so as to form between the cut-away portion and the lower guide member a gap through which the first sheet fed by the first feeding device passes.

1. Field of the Invention
The invention relates to an image reading and recording apparatus integrally provided with an image reading portion for reading the image of a document, and an image recording portion for recording an image on a sheet, and particularly to an image reading and recording apparatus in which a portion of a document transporting path for transporting the document to the image reading portion and a portion of a sheet transporting path for transporting the sheet to the image recording portion are made into a common transporting path.
2. Description of the Related Art
There has heretofore been an image reading and recording apparatus integrally provided with an image reading portion for reading the image of a document and an image recording portion for recording (forming) an image on a sheet which is a recording medium (for example, described in U.S. Pat. No. 5,391,009).
Such an image reading and recording apparatus, as shown, for example, in FIG. 15 of the accompanying drawings, is provided with a scanning station 122 which is an image reading portion for reading the image of a document, a printing station 124 which is a recording portion for recording an image on a sheet, an automatic sheet feeder (ASF) 126 for transporting the sheet to the printing station 124, and an automatic document feeder (ADF) 128 for transporting the document to the scanning station 122.
Also, in this image reading and recording apparatus, a portion of a sheet transporting path and a portion of a document transporting path are made common to each other, and a pickup roller 132 provided on the lower ends of the feeders 126 and 128 is made available for common use. Design is made such that documents stacked on the ADF 128 and sheets stacked on the ASF 126 are picked up by this pickup roller 132 for common use, whereby the downsizing of the apparatus and a reduction in cost are achieved.
Now, in such a conventional image reading and recording apparatus, the ADF 128 is disposed on the ASF 126 in order to make the pickup by the pickup roller 132 good, and make access simpler for the accurate and appropriate loading between two adjustable guides (not shown).
If the ADF 128 is thus disposed on the ASF 126, even if the sheets are set on the ASF 126, when the documents are set on the ADF 128, the documents are picked up always earlier than the sheets. Therefore, when the copying of a plurality of documents set on the ADF 128 is to be effected, the documents are first successively transported to the scanning station 122, whereafter the sheets are transported to the printing station 124.
However, when design is thus made such that the documents are first successively transported to the scanning station 122, whereafter the sheets are transported to the printing station 124, document image data of all pages must be accumulated in memories and therefore, the number of image memories is increased and along therewith, costs are increased.
Also, in the conventional image reading and recording apparatus, it is more difficult to pick up the documents in the ADF 128 which have bent portions of various sizes than to pick up the sheets in the ASF 126 and therefore, the pickup roller 132 is disposed at the widthwise center of the documents so as to be capable of reliably pick up the documents.
However, when the pickup roller 132 is thus disposed at the widthwise center of the documents, there occurs a case where the position of the pickup roller 132 is not disposed at the widthwise center of the sheets, and in such case, there is the possibility of the skew feeding of the sheets occurring during transport. When the ASF 126 is disposed on the ADF 128, conversely there is the possibility of the skew feeding of the documents occurring.


A TN mode or IPS mode LCD device includes lower and upper substrates that face each other and a liquid crystal disposed therebetween. Pixel regions are defined on the substrates. A multi-layer structure of black matrix layers are formed in regions of one of the substrates other than the pixel regions. The first black matrix layer is formed from an opaque metal while the second black matrix layer is formed from resin. The second black matrix layer completely covers the first black matrix layer. The combined multi-layer black matrix structure has an optical density of about 4.5 to 5.

1. Field
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an LCD device and a method for fabricating the same, to improve a contrast ratio of the LCD device by using a black matrix layer of resin.
2. Discussion of the Related Art
Demands for various display devices have increased with development of an information society. Accordingly, much effort have been expended to research and develop various flat display devices such as liquid crystal display (LCD), plasma display panel (PDP), electroluminescent display (ELD), and vacuum fluorescent display (VFD). Some species of flat display devices have already been applied to displays for various equipment.
Among the various flat display devices, liquid crystal display (LCD) devices have been most widely used due to advantageous characteristics of thin profile, lightness in weight, and low power consumption, whereby the LCD devices provide a substitute for a Cathode Ray Tube (CRT). In addition to mobile type LCD devices such as a display for a notebook computer, LCD devices have been developed for computer monitors and televisions to receive and display broadcasting signals.
Despite various technical developments in the LCD technology having applications in different fields, research in enhancing the picture quality of the LCD device has been, in some respects, lacking as compared to other features and advantages of the LCD device. In order to use LCD devices in various fields as a general display, the key to developing LCD devices depends on whether LCD devices can implement a high quality picture, such as high resolution and high luminance with a large-sized screen, while still maintaining lightness in weight, thin profile, and low power consumption.
A general LCD device includes an LCD panel for displaying a picture image, and a driving part for applying a driving signal to the LCD panel. The LCD panel includes first and second glass substrates being bonded to each other at a predetermined interval therebetween, and a liquid crystal layer injected between the first and second glass substrates.
The first glass substrate (TFT array substrate) includes a plurality of gate and data lines, a plurality of pixel electrodes, and a plurality of thin film transistors. The plurality of gate lines are formed on the first glass substrate at fixed intervals, and the plurality of data lines are formed in perpendicular to the plurality of gate lines at fixed intervals. Then, the plurality of pixel electrodes, arranged in a matrix-type configuration, is respectively formed in pixel regions defined by the plurality of gate and data lines crossing each other. The plurality of thin film transistors are switched according to signals of the gate lines for transmitting signals of the data lines to the respective pixel electrodes.
The second glass substrate (color filter substrate) includes a black matrix layer that excludes light from regions except the pixel regions of the first substrate, R(red)/G(green)/B(blue) color filter layer displaying various colors, and a common electrode to obtain the picture image. In case of an In-Plane Switching (IPS) mode LCD device, the common electrode is formed on the first glass substrate.
Next, a predetermined space is maintained between the first and second glass substrates by spacers, and the first and second substrates are bonded to each other by a seal pattern having a liquid crystal injection inlet. At this time, the liquid crystal layer is formed according to a liquid crystal injection method, in which the liquid crystal injection inlet is dipped into a vessel having liquid crystal while maintaining a vacuum state in the predetermined space between the first and second glass substrates. That is, the liquid crystal is injected between the first and second substrates by an osmotic action. Then, the liquid crystal injection inlet is sealed with a sealant.
Meanwhile, the LCD device is driven according to the optical anisotropy and polarizability of liquid crystal material. Liquid crystal molecules are aligned using directional characteristics because the liquid crystal molecules each has long and thin shapes. In this respect, an induced electric field is applied to the liquid crystal for controlling the alignment direction of the liquid crystal molecules. That is, if the alignment direction of the liquid crystal molecules is controlled by the induced electric field, the light is polarized and changed by the optical anisotropy of the liquid crystal, thereby displaying the picture image. In this state, the liquid crystal is classified into positive (+) type liquid crystal having positive dielectric anisotropy and negative (−) type liquid crystal having negative dielectric anisotropy according to electrical characteristics of the liquid crystal. In the positive (+) type liquid crystal, a longitudinal (major) axis of a positive (+) liquid crystal molecule is in parallel to the electric field applied to the liquid crystal. Meanwhile, in the negative (−) type liquid crystal, a longitudinal (major) axis of a negative (−) liquid crystal molecule is perpendicular to the electric field applied to the liquid crystal.
FIG. 1 is an exploded perspective view illustrating a general Twisted Nematic (TN) mode LCD device. As shown in FIG. 1, the TN mode LCD device includes a lower substrate 1 and an upper substrate 2 bonded to each other at a predetermined interval therebetween, and a liquid crystal layer 3 injected between the lower and upper substrates 1 and 2.
More specifically, the lower substrate 1 includes a plurality of gate lines 4, a plurality of data lines 5, a plurality of pixel electrodes 6, and a plurality of thin film transistors T. The plurality of gate lines 4 are formed on the lower substrate 1 in one direction at fixed intervals, and the plurality of data lines 5 are formed in perpendicular to the plurality of gate lines 4 at fixed intervals, thereby defining a plurality of pixel regions P. Then, the plurality of pixel electrodes 6 are respectively formed in the pixel regions P defined by the plurality of gate and data lines 4 and 5 crossing each other, and the plurality of thin film transistors T are respectively formed at crossing portions of the plurality of gate and data lines 4 and 5.
Next, the upper substrate 2 includes a black matrix layer 7 that excludes light from regions except the pixel regions P, R(red)/G(green)/B(blue) color filter layers 8 for displaying various colors, and a common electrode 9 for displaying a picture image.
At this time, the thin film transistor T includes a gate electrode, a gate insulating layer (not shown), an active layer, a source electrode, and a drain electrode. The gate electrode projects from the gate line 4, and the gate insulating layer (not shown) is formed on an entire surface of the lower substrate. Then, the active layer is formed on the gate insulating layer above the gate electrode. The source electrode projects from the data line 5, and the drain electrode is formed in opposite to the source electrode. Also, the aforementioned pixel electrode 6 is formed of transparent conductive metal having great transmittance, such as ITO (Indium-Tin-Oxide).
In the aforementioned LCD device, liquid crystal molecules of the liquid crystal layer 3 on the pixel electrode 6 are aligned with a signal applied from the thin film transistor T, and light transmittance is controlled according to alignment of the liquid crystal, thereby displaying the picture image. In this state, an LCD panel drives the liquid crystal molecules by an electric field perpendicular to the lower and upper substrates. This method obtains great transmittance and high aperture ratio. Also, it is possible to prevent liquid crystal cells from being damaged by static electricity since the common electrode 9 of the upper substrate 2 serves as the ground. However, in case of driving the liquid crystal molecules by the electric field perpendicular to the lower and upper substrates, it is difficult to obtain a wide viewing angle.
In order to overcome these problems, an In-Plane Switching (IPS) mode LCD device has been proposed recently. Hereinafter, a related art IPS mode LCD device will be described with reference to the accompanying drawings. FIG. 2 is a plane view of showing a unit pixel region of an IPS mode LCD device according to the related art. In the related art IPS mode LCD device, as shown in FIG. 2, a gate line 4 and a data line 5 crossing each other are formed on a transparent lower substrate, thereby defining a pixel region. Then, a thin film transistor is formed at a crossing portion of the gate and data lines 4 and 5. Also, a common line 4a is formed in parallel with the gate line 4 in the pixel region.
At this time, the thin film transistor includes a gate electrode of occupying one portion of the gate line 4, a gate insulating layer (not shown) formed on an entire surface of the lower substrate including the gate electrode, an active layer 10 formed on the gate insulating layer above the gate electrode, a source electrode 5a projecting from the data line 5, and a drain electrode 5b formed at a predetermined interval from the source electrode 5a.
Also, a passivation layer (not shown) is formed on the entire surface of the lower substrate including the data line 5, wherein the passivation layer is formed of a silicon nitride layer. Furthermore, contact holes 11a and 11b are formed above the drain electrode 5b and the common line 4a. On the passivation layer of the pixel region, common electrodes 12 and pixel electrodes 13 are alternately formed in parallel at a predetermined interval.
At this time, the plurality of common electrodes 12 are formed within one pixel region in parallel with the data line, wherein each of the common electrodes 12 is connected with the common line 4a by the contact hole 11b. Also, each of the pixel electrodes 13 is connected with the drain electrode 5b of the thin film transistor by the contact hole 11a. The common electrode 12 and the pixel electrode 13 are formed of transparent conductive layers.
Although not shown, an upper substrate is formed opposite to the lower substrate, wherein the upper substrate includes a black matrix layer, color filter layers, and an overcoat layer. The black matrix layer prevents light leakage on remaining portions except the pixel regions, the color filter layers are provided for realizing colors in the respective pixel regions, and the overcoat layer is formed on an entire surface of the upper substrate including the color filter layers.
In the aforementioned LCD device, the upper substrate having the black matrix layer will be described in detail.
FIG. 3 is a plane view of the upper substrate of the LCD device according to the related art. FIG. 4 is a cross sectional view along I-I′ of FIG. 3.
As explained above, on the upper substrate 2, the black matrix layer 22 is formed on the remaining portions except the pixel regions 21. At this time, the black matrix layer 22 may be formed of a light-shielding metal material such as chrome Cr, or an acrylic resin formed by mixing carbon with a metal oxide material.
In the TN mode LCD device of FIG. 1, the black matrix layer 22 may be formed of the light-shielding metal material.
However, in case of the IPS mode LCD device of FIG. 2, if the black matrix layer 22 is formed of the light-shielding layer such as chrome Cr, residual images are generated. That is, in the IPS mode LCD device of FIG. 2, the liquid crystal is driven with the IPS mode electric field formed between the common electrode and the pixel electrode, in parallel with the two substrates. In this state, if the black matrix layer of the conductive metal is formed on the upper substrate, electrons are induced to the black matrix layer, thereby distorting the IPS mode electric field formed between the common electrode and the pixel electrode in parallel.
In order to prevent the distortion of the IPS mode electric field, the black matrix layer is formed of resin.
Generally, the LCD device having a luminance of 400 NIT requires the black matrix layer to have an optical density of 4.5 (or more). In the related art, if the black matrix layer 22 is formed of acrylic resin, the acrylic resin has an optical density OD of 3.0 to 4.0. Accordingly, light leakage is generated, thereby lowering the contrast ratio. Also, if the black matrix layer is formed of the acrylic resin, the black matrix layer is thickly formed to increase the optical density. In this case, step difference may be generated in the color filter layer.
As the luminance increases, this problem becomes more serious. That is, the LCD device for the television monitor has a full white luminance of 400 NIT to 600 NIT. Accordingly, for a high resolution LCD device, if the black matrix layer is formed of acrylic resin, the light leakage becomes serious.

Liquid crystal display device having a second black matrix layer covering surfaces of a first black matrix layer including the sides thereof


In a semiconductor device such as a three-phase one-chip gate driver IC, HVNMOSs configuring two set and reset level shift circuits are disposed on non-opposed surfaces, and it is thereby possible to reduce the amount of electrons flowing into drains of HVNMOSs of another phase due to a negative voltage surge. Also, distances from an opposed surface on the opposite side to the respective drains of the HVNMOSs configuring the two set and reset level shift circuits are made equal to or more than 150 μm, and it is thereby possible to prevent a malfunction of a high side driver circuit of another phase to which no negative surge is applied.

1. Field of the Invention
The present invention relates to a semiconductor device such as a high voltage IC having level shift circuits and a power conversion device such as an inverter using the semiconductor device.
2. Related Art
FIG. 8 is a circuit diagram of a three-phase motor Mo and a three-phase inverter which drives the three-phase motor Mo. The three-phase inverter is configured of a power module and a high voltage IC which controls the power module. The power module is configured of power semiconductor elements which are switching elements Q1 to Q6 and FWDs (Free Wheel Diodes) D1 to D6, and a three-phase full bridge circuit is formed of the power semiconductor elements. The high voltage IC is a three-phase one-chip gate driver ICs 500, 600 shown in FIG. 9.
The three-phase inverter is configured of three U-phase, V-phase, and W-phase half bridge circuits, and each half bridge circuit is configured of the upper-arm power semiconductor elements (Q1 to Q3 and D1 to D3) and lower-arm power semiconductor elements (Q4 to Q6 and D4 to D6). The connection points of the upper-arm power semiconductor elements (Q1 to Q3 and D1 to D3) and lower-arm power semiconductor elements (Q4 to Q6 and D4 to D6), forming midpoints Z between the half bridges, are connected to a VS terminal of a gate driver IC.
Also, the upper-arm power semiconductor elements (Q1 to Q3 and D1 to D3) are connected to a P terminal of the three-phase inverter, and the lower-arm power semiconductor elements (Q4 to Q6 and D4 to D6) are connected to an N terminal of the three-phase inverter. The midpoints Z of the individual phases are connected to the three-phase motor Mo which is an inductance load (L load). The power semiconductor elements are configured of, for example, IGBTs (Insulated Gate Bipolar Transistors), which are main switching elements, and reflux diodes. The P terminal and the N terminal are connected to a main power source Vcc of the three-phase inverter.
Parasitic inductances Lo exist on wires connected to the power semiconductor elements. When the power semiconductor elements configuring the three-phase inverter are switched, in particular, when the upper-arm power semiconductor element (for example, Q1) is turned off, a current I flows from the N terminal to the midpoint Z via D4, and a current I flows from the midpoint Z to the P terminal via D2. The parasitic inductances Lo exist in paths through which the currents I flow.
In particular, due to the effects of the current I flowing via D4 and the corresponding parasitic inductance Lo, the potential of the VS terminal of the three-phase one-chip gate driver IC 500, 600 connected to the power semiconductor element (Q1) oscillates transiently to a negative side with respect to the potential (a common potential (=a GND potential)) of the N terminal of the three-phase inverter. That is, a negative voltage surge lower than the potential of the N terminal is applied to the VS terminal.
FIG. 9 is a main portion layout diagram of the heretofore known three-phase one-chip gate driver ICs 500 and 600, wherein (a) of FIG. 9 is a diagram when U-phase, V-phase, and W-phase high side driver circuits 3, 4, and 5 are disposed in nonparallel, and (b) of FIG. 9 is a diagram when the U-phase, V-phase, and W-phase high side driver circuits 3, 4, and 5 are disposed in parallel.
In the three-phase one-chip gate driver ICs 500 and 600, for example, three n-well regions for forming the high side driver circuits 3, 4, and 5 are formed on a p semiconductor substrate. The n-well regions are formed by ion implanting and subsequently thermally diffusing group 5 impurities such as phosphorus. HVNMOSs (High-voltage n-channel metal-oxide semiconductors: High voltage NMOSs) 28 disposed on the V-phase in (a) of FIG. 9 are disposed on an opposed surface 10 opposite to the W-phase to which the V-phase is connected via an interphase region, and the HVNMOSs 28 disposed on the W-phase in (b) of FIG. 9 are disposed on an opposed surface 10b opposite to the V-phase to which the W-phase is electrically connected via the interphase region. In the three-phase one-chip gate driver IC 500, distances M between n-drain regions 26 of the HVNMOSs 28 configuring set and reset level shift circuits 6a and 7a of the V-phase and the opposed surface 10b of the W-phase are equal to each other. Also, in the three-phase one-chip gate driver IC 600, distances M between the n-drain regions 26 of the HVNMOSs 28 configuring set and reset level shift circuits 6b and 7b of the W-phase and the opposed surface 10 of the V-phase are equal to each other.
FIG. 10 is a configuration diagram of the three-phase one-chip gate driver IC 600 of (b) of FIG. 9, wherein (a) of FIG. 10 is a main portion sectional view taken along the line D-D′ of (b) of FIG. 9, and (b) of FIG. 10 is an enlarged plan view of the vicinity of the n-drain region 26 of (a) of FIG. 9. FIG. 10 shows a flow of electrons 50.
The V-shape high side driver circuit 4 includes an n-well region 29 formed on the front surface layer of the p semiconductor substrate 21, a p-well region 30, formed on the front surface layer of the n-well region 29, to which the VS terminal is connected, an n region 31 to which a VB terminal is connected, and an n-well region 22a forming a high voltage junction termination region 46 (HVJT).
In an interphase region 70, a p-well region 60 formed on the front surface of the p semiconductor substrate 21 is connected to a COM terminal 42 of a ground potential via p-base regions 23, 36, and 37.
The HVNMOS 28 of the W-phase includes an n-well region 22b forming a drift region and an n-source region 24 formed on the p-base region 23. The HVNMOS 28 of the W-phase further includes a gate terminal 43 formed, via a gate insulating film, on the p-base region 23 sandwiched between the n-source region 24 and the n-well region 22b, the n-drain region 26 formed on the n-well region 22b, and a drain terminal 44 connected to the n-drain region 26.
In FIG. 10, when a negative voltage surge is input into the VS terminal 40 of the V-phase, and the n-well region 29 in which the V-phase high side driver circuit 4 is formed undershoots to a negative voltage, electrons 50 are injected into the p-well region 60 from the n-well region 22a (opposed surface 10). The injected electrons 50 flow into the n-drain region 26 of the HVNMOS 28 configuring the level shift circuit 6b of the W-phase. The electrons 50 flows to the W-phase high side driver circuit 5 via a level shift resistor 45b connected to the drain terminal 44. A voltage drop occurs by the electrons 50 flowing into the level shift resistor 45b. Because of this, as the voltage drop becomes higher when the amount of electrons 50 flowing into the n-drain region 26 increases, it causes a malfunction of the W-phase high side driver circuit 5.
pn junction surfaces wherein the n-well region 22a, in which the high voltage junction termination region 46 of the V-phase high side driver circuit 4 is formed, and the n-well region 22b, in which the high voltage junction terminal region of the W-phase high side driver circuit 5 is formed, are opposite to each other via the interphase region are called the opposed surfaces 10 (V-phase side) and 10b (W-phase side), and pn junction surfaces which are not opposite to each other are called non-opposed surfaces 11b (V-phase side) and 12b (W-phase side).
Japanese Patent Application Publication No. JP-A-2010-263116 (also referred to herein as "PTL 1") describes a method of preventing a drop to a negative voltage by inserting a diode between a VS terminal and GND terminal which drop to a negative voltage in order to prevent a high side driver circuit from malfunctioning due to a negative voltage surge input into a high voltage IC.
Also, Japanese Patent Application Publication No. JP-A-2005-176174 (also referred to herein as "PTL 2") describes a method of providing a dummy level shift circuit connected to a malfunction detection circuit in parallel with a level shift circuit. Both of the methods, being such that a malfunction prevention function is provided targeted at a single-phase (half bridge) gate driver IC, are measures taken for the gate driver IC's own phase, but neither of the methods are measures taken for another phase.
As measures to prevent a malfunction of a high side driver circuit when a negative voltage surge is input, a further description will be given of the details of the previously described PTL 1 and PTL 2. It is described in PTL 1 that in a half bridge, a high voltage diode is provided inside the high voltage IC between a common ground node COM (the GND terminal) and a virtual ground node VS (the VS terminal) utilizing a common substrate region. When the virtual ground potential node VS is at a negative potential, the clamping high voltage diode attains a forward bias state. A current is supplied to the virtual ground potential node VS, and the voltage level of the virtual ground potential node VS can be clamped to a voltage level GND-Vf which is lower than the ground voltage of the common ground node COM by its own forward drop voltage (Vf), meaning that it is possible to absorb a negative voltage surge and reduce the undershoot of the virtual ground potential VS.
It is described in PTL 2 that in the half bridge of an L load, an erroneous signal detection circuit is connected in parallel to the level shift circuit, and that the erroneous signal detection circuit is such that the HVNMOS configuring the level shift circuit, being a dummy switching element fixed to off in a normal usage condition, includes two on (set) and off (reset) level shift circuits, and the two level shift circuits have the same configuration. The erroneous signal detection circuit outputs a voltage drop of an erroneous signal detection resistor as an erroneous signal generation signal SD indicating the generation of an erroneous signal in the level shift circuit, the erroneous signal generation signal SD is input into the malfunction prevention circuit via a NOT gate, and the malfunction prevention circuit, in response to the erroneous signal generation signal SD, carries out a predetermined process for preventing the malfunction.
Also, it is not clearly described in Japanese Patent Application Publication No. JP-A-9-55498 whether in a three-phase one-chip gate driver IC, an HVNMOS configuring a level increasing level shift circuit is disposed on an opposed surface of another phase or is disposed on a non-opposed surface (herein, a surface perpendicular to the opposed surface).
In both the heretofore known three-phase one-chip driver ICs 500 and 600 shown in FIGS. 9 and 10, the HVNMOSs 28 configuring the set and reset level shift circuits 6b and 7b are formed on the opposed surface 10b. With this kind of configuration, for example, when a negative voltage surge is applied to the V-phase, a large amount of electrons 50 flows into the n-drain region 26 of the HVNMOS 28 of the W-phase, and a malfunction occurs in the W-phase high side driver circuit.
In the previously described PTLs 1 and 2, it is necessary to form a high voltage diode or a malfunction detection HVNMOS inside the high voltage IC, thus leading to an increase in chip area. For example, as a high voltage junction termination region width (the width of the HVJT) in a 600V-class high voltage IC is on the order of 100 μm, the chip size of a three-phase one-chip gate driver IC is on the order of three times as large as a half bridge one-chip driver IC, thus leading to a significant increase in chip area.
Also, the heretofore known measures to prevent the malfunction due to a negative voltage surge, as they are for the half bridge gate driver IC and are a malfunction suppression or detection function for the half bridge gate driver IC's own phase, are not effective for a malfunction of the high side driver circuit, due to an flow of electrons into another phase which occurs, in the case of the three-phase one-chip gate driver IC, or the like.

Semiconductor device and power conversion device using the same


A system and method of dynamic communications within a virtual environment. The virtual environment provides at least two virtual communities each having an associated cross protocol proxy server and a cross community server that cooperate to allow collaboration between participants within the virtual environment using multiple collaboration technology applications. Ad-hoc log-on of groups of individual participants under one community user name is provided to allow different communication protocols to be used and information to be shared across at least two virtual communities.

Collaboration technologies over computer networks bring individuals together for collaboration relating to specific or ad-hoc topics. As virtual communities have evolved, there are a variety of technical approaches being used to connect individuals in collaborative sessions. These virtual communities increasingly require participation from individuals and groups in collaboration sessions from outside of their localized virtual community.
When combining remote virtual communities, some collaboration discussions in the localized virtual community will need to be kept local, while some collaborative discussions need to be shared with other remote virtual communities.
Traditional collaboration technology maintains a 1:1 relationship between users and presence information. Each client is represented by their individual User ID appearing in a collaboration client user-list.
Virtual communities are evolving to Network Centric Operations that collaborate as communities instead of individuals. The collaborative approach of the present invention enable virtual communities to coordinate activities and take advantage of broad groups of knowledge in finding solutions to immediate challenges.
Network Centric Operations increase the demand for online collaboration. As the demand for online collaboration increases, the number of potential users can quickly become unmanageable.
However, mistakes may be made by participants within a collaborative environment and the wrong conclusions may be reached by participants of conventional Network Centric Operations because participants may be inadvertently left out of group discussions.
Traditional collaboration integration approaches provide the ability to connect individuals using the same collaboration technology to individuals that are part of a intra- or inter-community.
Traditional collaboration integration approaches also provide the ability to connect individuals to individuals using different collaboration technologies to individuals within an intra- or inter-community.
While existing devices suit their intended purpose, there remains a need for a system and method that connects virtual communities using either the same or different collaboration technologies including specific and ad-hoc collaboration.

System and method of communications within a virtual environment


A portable storage device (1) includes a memory device with a USB mating port (20) and a protective cap (30) detachably mated with the USB mating port in a mating direction. The USB mating port has an engagement portion (211). The protective cap includes a case (31) for receiving the USB mating port and a latching member (32) on the case. The latching defines a retaining portion (324) thereon to engage with the engagement portion (211) of the USB mating port. The latching member is movable between a disengaged position and an engaged position in the mating direction to thereby engage/disengage the mating port with/from the cap.

1. Field of the Invention
The present invention generally relates to a portable memory device, and particularly to a portable memory device with a protective cap which can provide the memory device a good protection.
2. Description of Related Art
Please refer to FIG 9, which is a schematic diagram of a conventional portable memory device. The portable memory device includes a case 15, a universal serial bus (USB) interface 13, and a cover 11 detachably connected to the case 15 to cover the USB interface 14.
The case 15 of the above-described conventional portable memory device is internally provided with circuits for storing and transmitting computer data, and is electrically connected to the USB interface 13, such that when the cover 11 is removed from the case 15 to expose the USB interface 13, the USB interface 13 may be directly plugged into a USB connector provided on a computer to function like an externally connected hard disk drive to transmit or store data. When the USB interface 13 is unplugged, the portable memory device can be carried by a user to any other place or be connected to another computer. Therefore, the portable memory device is highly mobile and convenient for use.
The USB interface 13 of the above-described conventional portable memory device is connected to an end of the case 15, and is protected by the cover 11 against uselessness resulted from collision, damage, distortion or deformation of the USB interface 13. During usage, the cover 11 may be taken off from the case 15 and easily lost. Once the cover 11 is lost, the USB interface 13 is no longer suitably protected and tends to become damaged, failed, and unusable.
Hence, how to improve the disadvantage in prior art is the major discussion of the present invention.

Portable memory device with protective cap


A spin-on oil filter comprising a generally tubular body housing a filtering element and a retractable, external handle that can be manually gripped and twisted for filter installation and removal. The handle comprises a pair of spaced apart, elongated legs and an integral grip extending between the legs for grasping by a user. A pair of elongated, spaced apart sleeves diametrically extending from the body frictionally slidably captivate the legs. A stop is disposed on the distal end of each leg to limit displacement of the handle. The arched legs yieldably maintain said handle in either a semipermanent retracted state or a semipermanent deployed state, as they snappingly frictionally react with the surrounding sleeves. The distal and top portions of the legs are arched more that the intermediate portion, so that the handle may relatively easily slide between the semipermanent retracted or deployed states. The preferred embodiment employs round bar stock to form the handle. Its grip is bent in a finger receptive serpentine shape. The sleeves for the preferred embodiment are generally tubular. The handle in the alternative embodiment is a flat, low-profile band flushly nested against the body when retracted. The sleeves are replaced by diametrically opposed, relatively flat sheathes frictionally slidably captivating the legs.

The present invention broadly relates to cartridge type filters. Particularly the present invention is a spin on internal combustion engine oil filter with an extendible handle. Art pertinent to the present invention is found in U.S. Patent Class 210, subclasses 232, 237 and 238.
Generally, an oil filter has a tubular body which houses the filter element. Motor oil enters the filter through a central orifice and after being filtered exits through outlet orifices. These orifices are defined in a plate spanning the bottom of the filter. A peripheral gasket is disposed in a groove in the plate. The gasket mates with a flange associated with an engine to provide a fluid seal.
As those familiar with the art will appreciate, the removal of a used cartridge oil filter from an internal combustion engine is often a bothersome procedure. When installed, an oil filter is only spun on until it is "hand tight." Due to the construction of the oil filters, and the necessity to prevent leaks, they must be properly gasketed. After several engine heating and cooling cycles oil filters can tighten and the gasket can harden. In order to remove an old oil filter, tools such as a filter wrench which provide a contractible loop must be employed to grip and remove the filter. In many cases clearance will not permit use of such a wrench. Oftentimes it is necessary to resort to cruder methods to remove the filter. For example, a screw driver or pry bar may be driven through the body of the filter to provide a lever to remove the filter. Many attempts have been made to alleviate the problems associated with oil filter removal and clearance around the oil filter. Some of these include accessories or tools to be used with an oil filter.
Krauss, U.S. Pat. No. 4,865,727, discloses an oil filter package for removing an old oil filter.
A funnel that doubles as an oil filter removal tool is disclosed in Holman, U.S. Pat. No. 4,867,017.
Another device intended to be attached to an oil filter is disclosed in Sweeney, U.S. Pat. No. 4,964,330. This device provides a plurality of wings on the head of the filter to facilitate the use of a pry bar or gripping by an individual.
Several inventions relate to devices intended to be wrapped around the oil filter and then pulled to spin the filter. Robins, U.S. Pat. No. 4,860,617, discloses a strap wrench that may be wrapped around the filter to facilitate removal. Bundidge, U.S. Pat. No. 4,167,776, discloses a wrapping that is intended to be disposed on an oil filter prior to installation. Pulling these wrappings is intended to rotate the filter facilitating both installation and removal.
Several patents disclose structures disposed on the filter to facilitate removal. Humbert, U.S. Pat. No. 3,473,666, discloses an oil filter with a hexagonal head on its top intended to receive a wrench. Furthermore, the interior of the head defines a star shaped orifice intended to receive a special tool in conjunction with the hex head.
Bosses extending from oil filters are also known in the art. A simple ridge disposed on the top of an oil filter is disclosed in Huang, U.S. Pat. No. 5,000,847. Wings extending from the sides of an oil filter are disclosed in Kemper, U.S. Pat. No. 5,024,760. Atkins, U.S. Pat. No. 4,364,829, discloses an oil filter attachment that mates with ears disposed around the top of an oil filter to aid in removal.
Foust, U.S. Pat. Nos. 4,851,117 and 5,076,918, disclose quick change oil filters. Each of these filters employ a flip-up lever associated with a central elongated shaft coaxially mounted in the filter. The distal end of the shaft is threaded to receive the oil filter flange of an internal combustion engine. The lever is rotated to tighten the filter down onto the flange. Removal is also accomplished by rotation of the lever.
The prior art fails to disclose a straightforward structure which could be integrated into present oil filter designs to facilitate installation and removal. As mentioned above, most close tolerance situations will not allow use of a filter wrench due to the inability of the handle of the wrench to swing. However, most installations provide "head clearance" for the oil filter. In other words, room is provided directly above the oil filter to allow removal and insertion of the filter into the area it is to occupy.
Therefore, it is desirous to provide an oil filter that takes advantage of this head room to facilitate installation and removal. However, it is additionally desirable that any handle associated with the oil filter be of a convertible nature. If the handle can be retracted it would be easier to initially insert the oil filter into the area to be occupied. Additionally, an extensible handle must be securable in a retracted position after installation. This relieves the possibility of noise resulting from engine vibration and to prevent interference with other components. Such a filter would need to aid a user's grip on the handle. This would be necessary since a user's hands will often be oily or the area around the oil filter will be greasy making it difficult to grip the filter or handle. Furthermore, it would be quit helpful if the handle is designed in such a manner that it can be used as an anchor point and fulcrum for a lever to aid in the removal of a stuck oil filter.

Spin on oil filter with extendible handle


A Simulink modeling method for a mechanical hydraulic device of an aeroengine fuel regulator is proposed. The Simulink modeling method can implement high precision simulation of a mechanical hydraulic device of an engine fuel conditioning system, and greatly increase the simulation speed as compared with the existing modeling simulation in AMESim; solve the problem of a double-layered nested algebraic loop occurring when the mechanical hydraulic device is modeled in Simulink, and improve the simulation precision of the system. In addition, because of having certain universality, the resolving method for a double-layered nested algebraic loop can be generalized to resolve other types of algebraic loops. Meanwhile, the parameters of the simulation model provided by the present invention can be conveniently modified, and can provide a reference for modeling simulation of mechanical and hydraulic devices of engine fuel conditioning systems of other types.

The background on which the present invention relies on is MATLAB/Simulink modeling for a mechanical hydraulic device of a certain type of aeroengine fuel conditioning system.
A fuel conditioning system is a core component for automatic control of an engine, and is also a high-risk area. Under the digital demand of the aeroengine fuel conditioning system at present, it is particularly important to build a mathematical model for the fuel conditioning system. The aeroengine fuel conditioning system mainly comprises three parts, i.e. a fuel pump, a mechanical hydraulic device and a fuel dispenser, wherein the mechanical hydraulic device includes a metering valve, a differential pressure valve, an oil return valve and other precision components, and has the disadvantages of complex structure, long design and manufacturing cycles and high costs, so it is necessary to model and simulate the mechanical hydraulic device of the fuel conditioning system to shorten the development cycle and save costs. By means of modeling simulation, on the one hand, the performance of the original scheme can be predicted, the advantages and disadvantages of the scheme can be evaluated, the defects in the system design can be found and corrected early, and the best design scheme can be determined; and on the other hand, the direction of improvement and modification and optimization can be determined, the product development cycle can be shortened, and the danger of field test can be effectively avoided. The built model and the simulation result thereof can not only be used as a reference when testing and debugging the mechanical hydraulic device of the fuel conditioning system, but also provide a reference for the innovative design of the product. The built real-time model can be further used for hardware-in-the-loop simulation of aeroengine control systems. Therefore, it is necessary to study the modeling and simulation of the mechanical hydraulic device of the engine fuel conditioning system.
According to the existing literature, modeling and simulation performed on the mechanical hydraulic device of the engine fuel conditioning system are mainly performed on an AMESim platform. Compared with the MATLAB/Simulink platform, the AMESim platform has the advantage that the mechanical hydraulic device model built thereon is more intuitive, but has the disadvantage that the simulation calculation speed far less than Simulink. Because various components in the mechanical hydraulic device affect each other, modeling in Simulink involves a complex double-layered nested algebraic loop problem. By means of the present invention, the mechanical hydraulic device of the aeroengine fuel conditioning system in MATLAB/Simulink is modeled using an analytical method according the structure and flow continuity of the components and the force balance principle, and is simulated. Meanwhile, the high precision simulation of the system is implemented by resolving the double-layered algebraic loop in the model using the method of inserting high frequency delay in the feedback loop.

Simulink modeling method for mechanical hydraulic device of aeroengine fuel regulator


A data management architecture for a high speed packet switch has a dual key-based content addressable memory (CAM)-based buffer access control mechanism that stores relatively long data packets for delivery to multiple output ports of the switch. The CAM stores multiple address pointer words, each having a key field to identify a data packet, and an address field to identify the address of the location of the packet buffer in which the data packet is stored. During a CAM search, a packet request key is coupled to the key fields of all address pointer words stored in the CAM. The location of the matching key is used to access the key field's companion address field in its address pointer word to access a data packet stored in the packet buffer, and to address fields of all address pointer words stored in the CAM. The CAM outputs a signal that indicates whether or not the buffer address from which the packet has been accessed is free to store new data.

Continuing improvements in speed and bandwidth efficiency of digital signal processing components have enabled telecommunication service providers to supply multiple types of signalling channels from one or more sourcing sites to a switching interface serving a number of destination equipments. Accompanying these improvements has been the need for increased storage and data delivery capacity of the data switching and distribution elements that make up the switching interface. In a high data rate/capacity terrestrial system this has typically been accomplished in a brute force fashion, by using a very large (e.g., room-sized) data buffering subsystem, having separate (maximal capacity) data stores dedicated to each port being serviced. Because of its extraordinarily large size and considerable power requirements, this type of a data storage and distribution subsystem is not only impractical, but effectively impossible to deploy in an airborne or spaceborne environment, where payload power consumption parameters must comply with very limited specifications.

This patent is subject to a terminal disclaimer.

Dual key controlled content addressable memory for accessing packet switch data buffer for multicasting data packets


Disclosed herein is a method of detecting a downhole washout. The method includes, positioning a plurality of sensors along a downhole drillstring, communicatively coupling the plurality of sensors to a processor, and analyzing data sensed by the plurality of sensors with the processor for relationships indicative of a washout.

In the hydrocarbon recovery industry any loss of efficiency can be costly to a well operator. For example, a washout of a drill string or a formation while drilling can allow pumped mud to flow at rates other than the flow rates at which an operator believes they are flowing. Additionally, a washout can cause mud to flow to locations other than where the operator desires it to flow. Such conditions can cause issues during drilling due to a lack of mud flowing through the bit, for example. Methods and systems for detecting washouts as soon as they occur are therefore valuable to well operators.

Downhole washout detection system and method


The present invention discloses a system for imaging inspection of a movable object is provided, comprising: a first detecting unit configured to inspect whether a moving object to be inspected moves into a passage or not; a second detecting unit for inspecting whether a part to be shielded of the moving object passes into the passage or not and generating a passing signal after the first detecting unit inspects that the moving object to be inspected moves into the passage; a scan imaging device for emitting radiating beams for scan inspecting the moving object to be inspected; and a control system for generating a control signal for controlling the emitted radiating beams from the scan imaging device according to the passing signal from the second detecting unit. With the above system thereof, the imaging inspection of the moving object with rapid speed can be undertaken safely and reliably.

A device for inspecting a vehicle using high energy rays is one of typical examples of devices for imaging inspection of a moving object. In a device for vehicle inspection with high energy rays, the vehicle to be inspected dragged by a dragging device runs uniformly, and an accelerator of the device continuously emits high energy rays with constant frequency. The device has a block plate for shielding the rays, and whether the high energy rays irradiate toward the vehicle to be inspected or not is controlled by the block plate. When the block plate is opened, the high energy rays emit toward the object to be inspected, and the object is scanned, imaged and inspected finally.
In the conventional device, the cost thereof is high since the accelerator normally opens. Meanwhile, since the emission of high energy rays is controlled by opening/closing of the mechanical block plate, the response speed is slow, the inspection time is long and the vehicle inspecting efficiency is low.

System for image inspection of movable object and dodging method


A circuit for driving a light-emitting diode (LED) display has multiple driving modes. The circuit has a control unit for outputting a mode-switching signal, a scan driving chip connecting with the control unit for providing a scan signal, a data driving chip connecting with the control unit and the scan driving chip for providing a data signal, a row control interface connecting with the row line, the control unit, the scan driving chip and the data driving chip to receive the mode-switching signal for switching an input end of the row control interface, and a column control interface connecting with the column line, the control unit, the scan driving chip and the data driving chip to receive the mode-switching signal for switching an input end of the column control interface.

With the progress of the information technology, light-emitting diode (LED) displays have become one of the main streams of the electronic products gradually. Recently, most LED displays are often used as, for example, advertisement boards, activity-announcements boards, traffic lights, and outdoor television walls. Via controlling the motion pictures and texts shown on the LED displays, the LED displays can be used for advertising, announcements or traffic warming. Hence, they are very profitable for advertising products, announcements, passing immediate messages and displaying.
Reference is made to FIG. 1, which is a circuit block diagram of a conventional circuit for driving an LED display. The conventional circuits for driving an LED display usually connects a scan driving chip 22 with multiple row lines (R1, R2, R3 . . . Rn) of a display 20 to provide scan signals to the row lines (R1, R2, R3 . . . Rn) and connects a data driving chip 24 with multiple column lines (C1, C2, C3 . . . Cn) of a display 20 to provide data signals to the column lines (C1, C2, C3 . . . Cn). In this way, the display unit 202 can be controlled by the scan driving chip 22 and the data driving chip 24 via a pair of the row and column lines.
Therefore, the conventional circuit for driving the LED display can only use the row lines (R1, R2, R3 . . . Rn) to scan and use the column lines (C1, C2, C3 . . . Cn) to transmit data. In fact, the conventional LED display lacks flexible control for reaching optimum light-emitting efficiency. Hence, the advertisement board, announcement board, traffic light or outdoor television wall made of the conventional LED display can't have the most flexible, economic, power-saving and efficient control for emitting light, either.
Accordingly, the conventional driving circuits of the LED display still have some drawbacks that could be improved. The present invention aims to resolve the drawbacks in the prior art.


Aspects of the disclosure provide an apparatus. The apparatus includes a pick-up unit, such as an optical pick-up unit, a wobble channel and a defect detector. The pick-up unit generates a push-pull signal corresponding to a wobbled track of a storage medium. The wobble channel includes circuits to receive the push-pull signal, obtain a wobble signal from the push-pull signal, and calculate a wobble amplitude metric based on the wobble signal. The defect detector compares the wobble amplitude metric to a threshold to detect wobble defects.

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Generally, a storage medium, such as an optical storage disc, wobbles a recording track to embed timing and address information. The timing and address information assists an optical recording device to record data at appropriate locations of the wobbled recording track. For example, the optical recording device can include an optical pick-up unit coupled with a wobble channel to extract the timing and address information. The optical pick-up unit generates a wobble signal corresponding to the wobbled recording track, and the wobble channel extracts the timing and address information from the wobble signal. Defects in the storage medium can cause disturbances to the timing and address information, and can cause loss of track to the timing and address information.

Method and apparatus for detecting wobble defects in optical recording system


In a dead time control circuit, a delay circuit is connected to an input terminal and adapted to delay signals therethrough by a delay time corresponding to a dead time. A logic circuit has a first input connected via the delay circuit to the input terminal, a second input connected directly to the input terminal, and an output connected to an output terminal. The dead time having adjustable temperature characteristics.

1. Field of the Invention
The present invention relates to a dead time control circuit used in a predriver for driving a half bridge circuit or a push-pull type output buffer for driving a load.
2. Description of the Related Art
In a push-pull type output buffer, two switching elements are connected between a power supply terminal and a ground terminal. When the switching elements are alternately turned ON and OFF to drive a load connected thereto, if the switching elements are simultaneously turned ON, a large penetration current flows through the push-pull type output buffer, so that the switching elements would be broken down.
In order to avoid such a large penetration current, a simultaneous-OFF time or a dead time is introduced between the ON times of the switching elements. Generally, two dead time control circuits each corresponding to one of the switching elements are provided.
A first prior art dead time control circuit is constructed by a delay circuit formed by two inverters connected in series for delaying an input signal and an AND circuit for receiving the input signal via the delay circuit and directly. This will be explained later in detail.
In the above-described first prior art dead time control circuit, however, even when the delay time of the delay circuit fluctuates due to environmental factors such as temperature, power supply voltage, etc., it is impossible to adjust the delay time, i.e., the dead time.
A second prior art dead time control circuit further includes a delay circuit formed by an external resistor and an external capacitor between the inverters of the first prior art dead time control circuit. Therefore, when the delay time fluctuates due to environmental factors, the delay time can be adjusted by the external resistor and the external capacitor. This also will be explained later in detail.
The above-described second prior art dead time control circuit, however, is increased in size and manufacturing cost due to the external resistor and the external capacitor. Also, since the characteristics of the external resistor and the external capacitor per se fluctuate, it is impossible to accurately control the dead time.
A third prior art dead time control circuit further includes two constant current sources connected to one of the inverters of the first prior art dead time control circuit, the constant current source including analogous circuit elements as in the other of the inverters. As a result, the response speed characteristic of one of the inverters is opposite to that of the other, so that the entire delay time of the dead time control circuit becomes stable. This also will be explained later in detail.

Dead time control circuit capable of adjusting temperature characteristics of dead time


A monochromator (1) for a charged particle optics, in particular, for electron microscopy, comprises at least one first deflection element (2, 3) with an electrostatic deflecting field (2′, 3′) for generating a dispersion (4) in the plane (5) of a selection aperture (6) to select charged particles of a desired energy interval (7) and at least one second deflection element (8, 9) with an electrostatic deflecting field (8′, 9′) which eliminates the dispersion (4) of the at least one first deflecting field (2′, 3′). A radiation source (17) comprises such a monochromator (1). High monchromatism without intensity contrasts caused by defects of the slit aperture is thereby achieved in that the deflection elements (2, 3, 8, 9) have a design other than spherically shaped and their electrodes (24, 25) are given a potential (φ+, φ−) such that the charged particles (xα, yβ) which virtually enter the image of the radiation source (17) at different respective angles (α, β) in different sections (x, y), are differently focused such that charged particles (xα, yβ) of one energy are point focused (10, 10′, 10″) exclusively in the plane (5) of the selection aperture (6), since zero-crossings (11, 12) of the deflections (A) of the charged particles (xα, yβ) of the different sections (x, y) only coincide there at the same axial position (z, E).

The invention concerns a monochromator for a charged particle optics, in particular, for electron microscopy, comprising at least one first deflection element with an electrostatic deflecting field for generating a dispersion in the plane of a selection aperture for selecting the charged particles of the desired energy interval and at least one second deflection element with an electrostatic deflecting field which eliminates the dispersion of the at least one first deflecting field.
Chromatic aberration is one of the main factors that limits the resolution in the charged particle optics due to the resulting broadening of the charged particle beam due to the width of the energy spectrum and the chromatic aberration of the lenses. The monochromators are used to limit this chromatic aberration. In electron microscopy e.g., the energy width of 0.2 eV must not be exceeded with an acceleration voltage of 200 kV, in order to obtain a resolution of less than 1 Angstrom. Electron sources with the smallest full width at half maximum are thermally supported field emission cathodes, having an energy full width at half maximum of still 0.6 to 1.0 eV. Investigations have shown that approximately 30% of the electrons deviate by less than 0.1 eV. For certain applications, such as transmission or scanning electron microscopes, small beam currents are sufficient, such that it is possible to filter out approximately 70% of the electrons in order to realize a sufficiently monochromatic electron source with sufficient beam currents. Monochromators can therefore be used.
EP 0 470 299 B1 discloses a monochromator, in which hemispherical capacitors with inner and outer hemispherical electrodes are used as deflection elements, which are connected to different potentials. The deflection elements are arranged mirror-symmetrically with respect to a center plane that contains a selection aperture for selecting out electrons of different energy. Since the deflection elements are designed as hemispherical capacitors, the charged particles which are deflected in different directions with respect to the optical axis, are repeatedly focused to points, since the charged particles are deflected in a spherical field which equally influences the charged particles of all sections through the optical path, such that the generated intermediate images of the radiation source are point-like. Two of these point focusings are thereby formed upstream and downstream of the selection aperture, and one point focusing is formed in the opening of the selection aperture.
With point focusing of this type, only the charged particles of the same energy meet at one point. Due to the different energies of the charged particles, the points of the charged particles of different energies are joined and form one line, which enables shielding of the charged particles with an excessive high or low energy by means of the selection aperture, and permits passage only of the charged particles of the desired energy interval. This energy interval is then reunited downstream of the selection aperture by the downstream deflection elements. The dispersion of the upstream deflection elements is thus again eliminated.
One disadvantage of a monochromator of this construction is that the interaction of the charged particles increases the closer they are brought together. This Boersch effect counteracts the desire to obtain a high monchromatism. The charged particles deflect each other, which causes deceleration and acceleration with an additional dispersion effect, which results in an increase of the virtual source size. A monochromator is constructed in such a fashion that it eliminates the dispersion of the part upstream of the selection aperture in the part downstream of the selection aperture. It can thereby reverse the displacements caused by its deflecting fields, but not those displacements caused by the interaction of the charged particles, which influences the monchromatism and thereby the ability of focusing the beam, which again impairs the resolution of the optics.
In view of the above and similar monochromators with point focusing (stigmatic intermediate images), a monochromator of the above-mentioned type was proposed in the dissertation "Design of a monochromator for electron sources" by Frank Kahl (internet: elib.tudarmstadt.de/diss/000030), in which the deflection elements are designed in such a fashion that the charged particles of an x and a y-section describe different paths and only astigmatic intermediate images are produced in the form of line focuses. The proposed monochromator has been patented (DE 196 33 496B4).
This dissertation presents the previous monochromators in section 3.1 thereof (pages 25 to 27), i.a. the monochromator by Rose (3.1.3) which corresponds to EP 0 470 299 B1. In 10.2.3 (pages 144 to 148), the stigmatic and astigmatic optical paths are compared to determine that stigmatic intermediate images (point focuses) produce a multiple source enlargement compared to astigmatic intermediate images (line focuses).
In view of the latter, an enlargement of the source area by a factor of 7 was stated as the "worst case", the system of Rose, however, states as a "worst case" an enlargement of the source area by a factor of 60 (loc. cit. p. 148).
Since all previous monochromators show the disadvantageous Boersch effect of point focuses (stigmatic intermediate images), the beam current had to be limited to 10 nA (loc. cit. p. 28). This is again disadvantageous, since an increase in resolution requires large illumination currents in connection with a small source energy width. In order to overcome this limitation, it was proposed to allow for astigmatic real intermediate images of the source only (loc. cit. 3.2, page 28), i.e. line focuses. Line focus means that the charged particles of a given energy in the intermediate images of the radiation source are not focused into a point but a line. This line is broadened by the different energies due to dispersion, such that a beam is produced in the focal plane, which has a substantially rectangular cross-section. In order to select a desired energy interval with this focus, the charged particles with differing energies must be selected out and only the line focuses of the desired energy interval are allowed to pass through the aperture. The line focuses require a slit aperture oriented in their direction, whose width determines the selected energy interval (FIG. 8).
This monochromator does avoid the strong Boersch effect of stigmatic intermediate images, but the disadvantage of this monochromator is that unevenness or soiling of the aperture slit also effects the charged particle beam, resulting in scattering and intensity modulations in the final image of the optical system which show up as stripes across the image (FIGS. 8a and 8b). The sensitivity in this regard is sufficiently large that this fault cannot be prevented by mechanical precision and prevention of dirt deposit. In particular, for objects with small intensity contrast such as thin crystals, this causes the intensity contrasts of the object to be superimposed by the intensity contrasts of this defect, which produces stripes in the image that often prevent image evaluation.
It is therefore the underlying purpose of the invention to design a monochromator of the above-mentioned type in such a fashion that a high monchromatism can be achieved without intensity contrasts caused by defects of the aperture.

Monochromator and radiation source with monochromator

CEOS Corrected Electron Optical Systems GmbH


A device, method and system improve the breathable air quality of the environment in the region of a specific part of a body, such as around the mouth and nose area of a person buried in an avalanche. The device includes at least one inlet, at least one pump, at least one power resource, a controller, and at least one outlet. An inlet of the pump is constructed to act as a chamber. A first end of the chamber is connected to the inlet and a second end of the chamber is an opening towards the outside of the device. When the pump is activated, the pump will provide a vacuum in the chamber and suck air from the surroundings into the pump through the second end of the chamber and the chamber.

Snow avalanches in alpine and mountainous areas kill many people and animals each year, and have been the inspiration for development of many rescue and survival technologies. Some of these comprise radio equipment transmitting beacons of distress signals for aiding rescuers quickly to the right spot of the person in trouble. Other comprises floating devices, like airbags, for improving a person's ability to float on top of an avalanche in progress, and thus never become buried. Others again promote equipment comprising oxygen tanks and breading equipment.
The problems in prior techniques are that they are unreliable, for example because many require awareness of the person in need, and specific actions to be taken to make use of the equipment. Other problems relate to lack in sufficient efficiency, or they are too complex to wear/use.

Avalanche survival device comprising a breathing apparatus


A magnetostatic wave device comprising a magnetic garnet single crystalline film having a general formula of R.sub.3-x Ca.sub.x Ma.sub.5-2y+x Zr.sub.y Mb.sub.y-x O.sub.12 wherein R is at least one of Y, La, Bi, Gd, Lu and Sc, and Ma is at least one of Fe, Ga and Al, while Fe is present as an essential component, and Mb is at least one of Mg and Mn, and wherein the conditions of 0.ltoreq.x.ltoreq.1, 0.1.ltoreq.y.ltoreq.1, and x.ltoreq.y are satisfied.

1. Field of the Invention
The present invention relates to a magnetostatic wave device and a material for use in the same.
2. Description of the Related Art
Magnetic garnet single crystals containing Fe has been used as materials for magnetostatic wave devices. In particular, a single crystal of Y.sub.3 Fe.sub.5 O.sub.12 (hereinafter referred to simply as "YIG") has a narrow ferromagnetic half-value width (.DELTA.H), which allows the difference between the input signal and the output signal to be small when the YIG is used in a magnetostatic wave device. As a result, YIG has been widely used.
That type of garnet single crystal is obtained as a film epitaxially grown on a substrate such as Ga.sub.3 Gd.sub.5 O.sub.12 (hereinafter referred to simply as "GGG") by, for example, a liquid phase epitaxial growth process.
A magnetostatic wave device using a YIG single crystal operates at a frequency of about 2 GHz. However, in the case where a magnetostatic wave device is employed in a noise filter used in a broadcast satellite (BS) tuner, the magnetostatic wave device is required to operate at a frequency in the range of from several hundreds MHz to several hundred thousands MHz.
When the magnetostatic forward volume wave (MSFVW) mode is selected in the magnetostatic wave (MSW) mode, the operating frequency of the device is expressed by eq.(1). EQU .omega.=.gamma.(H.sub.ex -N.multidot.4.pi.Ms) (1)
where
.omega.: frequency PA1 .gamma.: gyromagnetic ratio PA1 H.sub.ex : applied magnetic field PA1 N: demagnetization coefficient PA1 4.pi.Ms: saturation magnetization PA1 H.sub.i : internal magnetic field PA1 H.sub.ex : applied magnetic field PA1 N: demagnetization coefficient PA1 4.pi.Ms: saturation magnetization PA1 H.sub.a : anisotropic magnetic field
When the magnetostatic surface wave (MSSW) mode is used, the operating frequency of the device is expressed by eqs.(2) and (3). EQU .omega.=.gamma.{H.sub.i (H.sub.i +4.pi.Ms)}.sup.1/2 (2) EQU H.sub.i =H.sub.ex -N.multidot.4.pi.Ms+H.sub.a ( 3)
where
Accordingly, the external magnetic field or the saturation magnetization needs to be decreased in order to decrease the operating frequency of a magnetostatic wave device.

Magnetostatic wave device and material for the same