A Provided is an electronic device in which: alternating current power from an RF coil which receives an electromagnetic wave and converts the electromagnetic wave into power is rectified by a diode and a first capacitor; the power is stepped up by a charge pump type step-up circuit; the power stepped up by the step-up circuit is stored in a second capacitor by a charging and discharging circuit; and the stored power is supplied from the charging and discharging circuit to an RF transmission circuit.

1. Field of the Invention
The present invention relates to an electronic device, and more particularly, to a technique capable of reducing power wasted in a non-contact IC card, which is carried by a person, used for entrance and exit control, payment, and used as an electronic ticket, or in a sensor network device used for security system, distribution system, or the like, thereby improving energy use efficiency of the entire system.
2. Description of the Related Arts
As shown in FIG. 4, a conventional electronic device includes an RF coil 401 for receiving an magnetic field or a radio wave and generating power, a diode 406 and a capacitor 407 which are used for converting alternating current (AC) of the RF coil 401 into a direct current (DC), and an RF transmission circuit 404 (JP 11-055165 A).
As a point for classifying electronic devices having this configuration, there is a point as to whether or not an electronic device itself has an energy source to perform independent operation. For example, in a case of an application which is represented by an RFID chip and which targets the replacement of a bar code or a case of a railroad ticket gate system using an IC card, the electronic device itself does not have a battery and thus operates on power electromagnetically supplied to the device simultaneously with communication. Since independent operation is impossible in this application, operation area of the device is limited. The device can be used only in an area in which a corresponding reader/writer locates. Accompanying transmission of electric power limits an operating distance from a reader. In many cases, the device is made light in weight and an extremely large number of devices are used in a low-cost application. On the other hand, there is a system in which a device has a battery or an external power source to perform independent operation. Up to now, such system is used in a field of security, distribution, or the like. Such independent systems are so-called sensor network systems for sensing something and generating a notice of a result obtained by the sensing. In a case of a security system, a person or a fire is sensed. In a case of a distribution system, a temperature of a product under transportation, or the like, is sensed. As a case where the sensing is not performed, there is an application in an information transmission, such as remote control of a key in a security system or price display tag in a distribution system, which is gaining great expectation in the sensor network system.
In the conventional electronic device, an electromagnetic wave is transmitted to the sky, so a certain amount of power is necessary for both transmission and reception in radio communication. In the radio communication, only a slight part of transmitted power reaches the RF coil 401 located on a reception side. Therefore, when the received power is amplified by an RF amplifier or the like (not shown in FIG. 4), unnecessary power is consumed. Alternatively, when the power is to be received at one time, it is necessary to increase the size of the RF coil 401. In this case, there is a problem in that a total effective area of the electric device increases. In addition, when the battery or the external power source is used instead of the RF coil 401, the power is consumed even in a standby state (state in which circuits are not operated), so there is a problem in that energy use efficiency is very low.


A storage system having multiple I/O interface ports is configured to detect a failed communication condition at a port. The storage system is configured to then attempt communication using a port configuration of another port that also exhibits a failed communication condition. If communication is established, the port is reconfigured using the configuration of the other port.

The present invention relates to storage systems, and in particular to the automation of storage system settings, including configurations in which the storage system is connected to multiple networks.
Due to recent trends in data consolidation, storage systems in large enterprises and midrange storage systems are being configured with increasingly large numbers of input/output (I/O) ports. Large storage systems can provide on the order to tens of I/O ports. These large numbers of ports provide high connectivity to the many host computers that can be found in most working environments, be they businesses, educational facilities, hospitals, and so on.
A variety of physical connection schemes have been implemented over time. Host computers can be connected directly to an I/O port on the storage system. Some of the I/O ports can be connected to a communication network, allowing host computers that have access on the network to the storage device via the network. Such networks include local area networks (LANs), wide area networks (WANs), and the like. Typically, the storage system is connected to a switching apparatus such as a router, or a gateway, or the like. In addition to physical connection methods (referred to as "wired" connections), technology exists which can provide host devices with connection to a storage system over a "wireless" connection.
In the case of "wired" connections to the storage system, one end of a cable is physically attached to a suitably configured port and the other end connects to a host computer or to a switch that is connected to a communication network.
As typical examples, storage systems can be connected to host computers via SCSI (Small Computer Systems Interface) connections. Physical connection can be made using Ethernet or a Fibre Channel (FC) switch. These interfaces (data communication methods) allow users, such as a system administrator, to locate a host computer at a location that is physically remote from the storage systems.
A consequence of the physical cabling is that numerous connections between the many ports on the storage system to host computers and/or switches can become difficult to manage. It is easy to for cables to be accidentally cross-connected, and difficult to troubleshoot accidental cross-connections. This is a problem looking for a solution.

Reconfiguring logical settings in a storage system


A carrier recovery method and apparatus using multiple stages of carrier frequency recovery are disclosed. A receiver uses multiple frequency generation sources to generate carrier signals used to downconvert a received signal. An analog frequency reference having a wide frequency range and coarse frequency resolution is used in conjunction with a digital frequency reference having a narrow frequency range and fine frequency resolution. The multiple carrier signals are multiplied by a received signal to effect a multi-stage downconversion, resulting in a baseband signal. A frequency tracking module measures the residual frequency error present in the baseband signal. The measured residual frequency error is then used to adjust the frequencies of the carrier signals generated by the multiple frequency generation sources.

1. Field
The disclosed embodiments relate generally to wireless communications, and more specifically to matching the frequency of a received carrier signal in a mobile wireless communication system.
2. Background
As modern-day wireless communication systems become more prevalent, the demand for wireless system capacity increases. In order to support a greater number of subscribers, a wireless service provider can either increase the frequency spectrum used for its systems or find ways to support more subscribers within its already-allocated frequency spectrum. Often unable to acquire additional frequency spectrum, wireless service providers must often look instead for ways to increase capacity without using more spectrum. In other words, wireless service providers must find more efficient ways to use their existing spectrum.
In response to the demand for more efficient use of spectrum, manufacturers of wireless equipment have developed various techniques for increasing the capacity of wireless systems. One way of providing efficient wireless voice and data communications is the use of code division multiple access (CDMA) techniques. Several standards using CDMA techniques have been developed for terrestrial wireless voice and data systems. Examples of such standards include the "TIA/EIA/IS-95 Mobile Station-Base Station Compatibility Standard for Dual-Mode Wideband Spread Spectrum Cellular System", hereinafter referred to as "IS-95," and "TIA/EIA/IS-2000," hereinafter referred to as "cdma2000." Additional standards have been proposed for wireless communication systems that are optimized to provide high-speed wireless data communications. Examples of such standards for high-speed wireless data communications include "TIA/EIA/IS-856," hereinafter referred to as "HDR."
In an HDR system, the rate at which a user terminal can receive data may be limited by the quality of signals that the user terminal receives. In such a system the data rate of signals transmitted to a user terminal is determined based on measurements of received signal quality made at the user terminal. One type of quality measurement used to determine data rate is the carrier-to-interference (C/I) ratio of the received signal. When the power of the received carrier signal is strong compared to the power of interfering signals, then the C/I value is said to be high. When the power of the received carrier signal is weak compared to the interference, then the C/I is said to be low. When the C/I value is high, the user terminal can receive more data within a given period of time. When the C/I value is low, the rate of data sent to the user terminal is reduced in order to maintain an acceptable frame error rate.
Carrier frequency recovery is one aspect of user terminal design that can greatly affect the C/I perceived by the user terminal. Carrier frequency recovery refers to the generation within a user terminal of a reference carrier signal having the same frequency as a carrier signal received from a base station. The user terminal uses the reference carrier signal to demodulate data signals received from a base station. A mismatch between the reference carrier signal and the received carrier signal, called carrier frequency mismatch, decreases the efficiency of the demodulation process. Such decreased efficiency of demodulation is perceived at the user terminal as a decrease in C/I. Carrier frequency mismatch thus decreases the rate at which data can be sent to the user terminal.
In tension with the need for precise carrier frequency recovery is the desire to minimize the hardware cost of the user terminal. The market for user terminal equipment such as wireless phones and modems is very competitive and is often characterized by low profit margins, or even subsidies by service providers. There is therefore a need in the art for techniques that increase the precision of carrier frequency recovery in user terminal equipment without substantially increasing the cost of user terminal hardware.

Method and apparatus for matching receiver carrier frequency


There is provided a head-mounted display comprising an image generator that generates an image, a pair of optical plates to be arranged in front of both eyes of an observer who observes the image, the pair of optical plates causing the image to be displayed, a first frame that holds the pair of optical plates, and a second frame including a to-be-fixed part, in which a fixing part to which the to-be-fixed part is fixed is provided at the central part of the first frame in the horizontal direction.

Some head-mounted displays are equipped with two optical modules, and display images in front of user's right and left eyes. Each of the optical modules includes an image generator that generates an image and an optical plate that causes the image to be displayed, which is, for example, a light guide plate. The right and left optical plates are arranged to form a predetermined convergence angle so that the user can visually recognize the images displayed in front of the right and left eyes without feeling uncomfortable.
Furthermore, some binocular head-mounted displays include a spectacle-shaped frame to be worn on the user's head, and an optical module is attached to the frame. The spectacle-shaped frame includes a front part to be positioned in front of the user's head, and a pair of temples to be worn on the user's ears.
In a head-mounted display including such a spectacle-shaped frame, there has been a possibility that the temples extend to the right and left when the user wears the frame so that the front part is distorted and the optical plate attached to the front part is deformed, thereby changing the convergence angle. When the convergence angle changes due to the deformation of the optical plate, images displayed on the right and left may become inconsistent with each other, which may hinder the visual recognition by the user.
In view of the above, in a head-mounted display disclosed in Patent Document 1, an optical plate is attached to the central part of a front part in the horizontal direction, whereby, even in a case where temples extend to the right and left and the front part is distorted, deformation is less likely to be transmitted to the optical plate.


A watermark processing method including generating watermark parameters for original multimedia data; performing watermark superposition processing on the original multimedia data according to the watermark parameters to obtain first multimedia data; encoding the first multimedia data to obtain a first multimedia code stream and encapsulating the watermark parameters into the first multimedia code stream to obtain a second multimedia code stream; and sending the second multimedia code stream to a terminal device so that the terminal device performs watermark inverse superposition processing on the first multimedia data according to the watermark parameters to obtaining the original multimedia data. The watermark processing method and apparatus prevent unlicensed broadcasting and hotlinking through a watermark and meanwhile do not display the watermark at the terminal device with valid content licensing of the broadcasted content during broadcasting to avoid affecting watch experience of audience.

Transmission of multimedia content on the Internet is vulnerable to unlicensed broadcasting and hot-linking of multimedia data. In order to prevent unlicensed broadcasting and hot-linking, each platform owning a copyright of multimedia content needs to add a watermark to the multimedia content to identify ownership over the copyright of the multimedia content. For instance, a watermark is added in a video.
However, the existence of a watermark affects the viewing experience of the audience. A watermark processing method that not only may avoid affecting the viewing experience of the audience but also may effectively prevent unlicensed broadcasting and hot-linking needs to be provided.


A condensed memory matrix is fabricated by conductively connecting the attachment bumps of a substrate with the attachment bumps of a wafer of DRAM chips and physically bonding the juxtaposed surfaces of the substrate and the wafer with a dielectric curable resin. An array of heat fins is bonded to the inactive surface of the wafer by a thermally conductive curable resin.

1. Field of the Invention
This invention pertains to wafer-scale integration (WSI) and, more particularly, to memory devices. It is specifically directed to a condensed memory matrix (CMM) having application to memory modules, memory cards, hard drives and the like.
2. State of the Art
Wafer-scale integration (WSI) refers generally to a method for maintaining functionally defined and independently testable "chips" (or dies) on a wafer. WSI has always been understood as a method of fabrication rather than a size of fabrication. Currently, while wafers are routinely constructed as discs up to nine (9) inches, more typically, wafers are produced being seven (7) inches in diameter, although the wafer size may vary as manufacturing capabilities vary. Conventionally, selected "good" chips are interconnected through wiring deposited on the wafer, rather than dicing the wafer and interconnecting individual chips by means of single chip packaging or other expedients. Portions of the disc, carrying a requisite number of dies, may be cut from the wafer for use in the construction of a device. The primary goal of WSI has been to increase system density beyond that achievable by maximizing chip size within an ordinary packaging environment. It is also generally understood that increasing density improves system performance and decreases system cost.
To realize increased density, good chip yield on the wafer must be very high. Otherwise, dilution of good chips with bad chips on the wafer will work against density gain. AU of the chips on a wafer must ordinarily be fabricated from the same process for the wafer to be competitive, on either an economic or performance basis, with independently produced single chips. This is understood as meaning that all chips on a wafer must be of the same type (no mixing of DRAM, SRAM, Logic, EPROM, etc. on the same wafer). Wafers with only DRAM chips, especially DRAM chips of small size, find practical application in the construction of a memory.
U.S. Pat. No. 5,214,657 discloses a method for utilizing the good portions of an otherwise defective WSI wafer. Specifically, circuitry is provided to enable dicing of the wafer to salvage discrete memory sections should the wafer as a whole fail testing. Fuses in the wiring laid down on the wafer may selectively be blown to isolate defective dies from the circuits interconnecting the good dies.
Hybrid WSI (HWSI) has been suggested to avoid some of the practical limitations of WSI. HWSI involves mounting tested good chips of any type on a tested good wafer. The wafer provides passive chip interconnections, power distribution and intermediate cooling. The HWSI approach forgoes the economical benefits of conventional WSI and has the disadvantage of making cooling more difficult since the glue required to bond the chips to the wafer causes an additional temperature drop in the cooling path.
There remains a need in the art for further refinements in WSI technology whereby a wafer or a portion of a wafer may be connected to a substrate material, such as a substrate circuit board (SCB). Such a construction would increase system density in a memory device and would provide practical portability for such devices at low cost.


A capacitive transducer having a significantly increased actuation force and improved response time as compared to similar prior art capacitive transducers. In the capacitive transducer of the present invention it is not necessary to balance response time and actuation force or to provide pre-strain to the transducer in a direction of actuation. Additionally, buckling in the capacitive transducer is prevented, or at least substantially reduced, in a simple manner.

Electroactive polymers capable of performing a deflection in response to a voltage is well known technology, like the compliant electrodes described in U.S. Pat. No. 6,376,971, being positioned in contact with a polymer in such a way, that when applying a potential difference between the electrodes, the electric field arising across the polymer thickness contracts the electrodes against each other, thereby deflecting the polymer. Since the electrodes are of a substantially rigid material, they must be made textured in order to make them compliant.
The electrodes are described as having an 'in the plane' or 'out of the plane' compliance. In U.S. Pat. No. 6,376,971 the out of the plane compliant electrodes may be provided by stretching a polymer more than it will normally be able to stretch during actuation, and a layer of stiff material is deposited on the stretched polymer surface. For example, the stiff material may be a polymer that is cured while the electroactive polymer is stretched. After curing, the electroactive polymer is relaxed, and the structure buckles to provide a textured surface. The thickness of the stiff material may be altered to provide texturing on any scale, including submicrometer levels. Alternatively, textured surfaces may be produced by reactive ion etching (RIE). By way of example, RIE may be performed on a pre-strained polymer comprising silicon with an RIE gas comprising 90 percent carbon tetrafluoride and 10 percent oxygen to form a surface with wave troughs and crests of 4 to 5 micrometers in depth. As another alternative, the electrodes may be adhered to a surface of the polymer. Electrodes adhering to the polymer are preferably compliant and conform to the changing shape of the polymer. Textured electrodes may provide compliance in more than one direction. A rough textured electrode may provide compliance in orthogonal planar directions.
Also in U.S. Pat. No. 6,376,971 there is disclosed a planar compliant electrode being structured and providing one-directional compliance, where metal traces are patterned in parallel lines over a charge distribution layer, both of which cover an active area of a polymer. The metal traces and charge distribution layer are applied to opposite surfaces of the polymer. The charge distribution layer facilitates distribution of charge between metal traces and is compliant. As a result, the structured electrode allows deflection in a compliant direction perpendicular to the parallel metal traces. In general, the charge distribution layer has a conductance greater than the electroactive polymer but less than the metal traces.
The polymer may be pre-strained in one or more directions. Pre-strain may be achieved by mechanically stretching a polymer in one or more directions and fixing it to one or more solid members (e.g., rigid plates) while strained. Another technique for maintaining pre-strain includes the use of one or more stiffeners. The stiffeners are long rigid structures placed on a polymer while it is in a pre-strained state, e.g. while it is stretched. The stiffeners maintain the pre-strain along their axis. The stiffeners may be arranged in parallel or according to other configurations in order to achieve directional compliance of the transducer.
Compliant electrodes disclosed in U.S. Pat. No. 6,376,971 may comprise conductive grease, such as carbon grease or silver grease, providing compliance in multiple directions, or the electrodes may comprise carbon fibrils, carbon nanotubes, mixtures of ionically conductive materials or colloidal suspensions. Colloidal suspensions contain submicrometer sized particles, such as graphite, silver and gold, in a liquid vehicle.
The polymer may be a commercially available product such as a commercially available acrylic elastomer film. It may be a film produced by casting, dipping, spin coating or spraying.
Textured electrodes known in the prior art may, alternatively, be patterned photolithographically. In this case, a photoresist is deposited on a pre-strained polymer and patterned using a mask. Plasma etching may remove portions of the electroactive polymer not protected by the mask in a desired pattern. The mask may be subsequently removed by a suitable wet etch. The active surfaces of the polymer may then be covered with the thin layer of gold deposited by sputtering, for example.
A rolled electroactive polymer device is described in U.S. Pat. No. 6,891,317, where it includes a rolled electroactive polymer and at least two electrodes to provide the mechanical/electrical energy conversion. The rolled electroactive polymer device may employ a mechanism, such as a spring, that provides a force to pre-strain the polymer.
Thus, U.S. Pat. No. 6,891,317 discloses a rolled electroactive polymer, e.g. an electroactive polymer with, or without electrodes, wrapped round and round onto itself (e.g. like a poster) or wrapped around another object (e.g. a spring). The polymer may be wound repeatedly and at the very least comprises an outer layer portion of the polymer overlapping at least an inner layer portion of the polymer. For single electroactive polymer layer construction, a rolled electroactive polymer may comprise between about 2 and about 200 layers. In this case, a layer refers to the number of polymer films or sheets encountered in a radial cross-section of a rolled polymer. The spring provides forces that result in both circumferential and axial pre-strain being applied to the polymer.
Rolled electroactive polymers may employ a multilayer structure, where multiple polymer layers are disposed on each other before rolling or winding. For example, a second electroactive polymer layer, without electrodes patterned thereon, may be disposed on an electroactive polymer having electrodes patterned on both surfaces. The electrode immediately between the two polymers services both polymer surfaces in immediate contact. After rolling, the electrode on the bottom surface of the electroded polymer then contacts the top surface of the non-electroded polymer. In this manner, the second electroactive polymer with no electrodes patterned thereon uses the two electrodes on the first electroded polymer.
Other multilayer constructions are possible. For example, a multilayer construction may comprise any even number of polymer layers in which the odd number polymer layers are electroded and the even number polymer layers are not. The upper surface of the top non-electroded polymer then relies on the electrode on the bottom of the stack after rolling. Multilayer constructions having 2, 4, 6, 8, etc., layers are possible using this technique. In some cases, the number of layers used in a multilayer construction may be limited by the dimensions of the roll and thickness of polymer layers. As the roll radius decreases, the number of permissible layers typically decreases as well. Regardless of the number of layers used, the rolled transducer is configured such that a given polarity electrode does not touch an electrode of opposite polarity. Multiple layers may each be individually electroded and every other polymer layer may be flipped before rolling, such that electrodes in contact with each other after rolling are of a similar voltage or polarity.
Producing electroactive polymers, and in particular rolled transducers, using the technique described in U.S. Pat. No. 6,376,971 and U.S. Pat. No. 6,891,317 has the disadvantage that direction of compliance of the corrugated electrodes is very difficult to control.
Furthermore, it is desirable to make the transducer by rolling a web of a dielectric material, e.g. a polymeric web, having electrodes arranged thereon, since reliability of the device is thereby improved, and a larger actuation force is obtained as the number of windings of the rolled structure increases. Thus, if a large actuation force is desired, then a large number of windings should be provided. However, using the prior art techniques described in U.S. Pat. No. 6,376,971 and U.S. Pat. No. 6,891,317, the possible number of winding is limited due to the necessary minimum thickness of the polymeric film.
Finally, in order to obtain the necessary compliance using the prior art technology, it is necessary to use materials having a relatively high electrical resistance for the electrodes. Since a rolled transducer with a large number of windings will implicitly have very long electrodes, the total electrical resistance for the electrodes will be very high. The response time for a transducer of this kind is given by τ=R·C, where R is the total electrical resistance of the electrodes and C is the capacitance of the capacitor. Thus, a high total electrical resistance results in a very long response time for the transducer. Thus, in order to obtain an acceptable response time, the number of windings must be limited, and thereby the actuation force is also limited, i.e. response time and actuation force must be balanced when the transducer is designed.
Thus, traditional designs of electroactive polymer actuators based on the dielectric polymer principle have so far been on four different configurations, i.e. single actuator sheets of limited dimensions, stacks of single actuator sheets of limited dimensions and numbers, rolled single actuator sheets of limited dimensions and very limited number of windings, and rolled stacks of single actuator sheets of limited dimensions and very limited number of windings.
All of the actuator configurations listed above have a common working principle that they have to be operated in a pre-strained mode either by pre-loading with a mass (constant load, typical for vertical displacements) or by pre-loading with a spring or spring-like elements under compression or in a stretched state. Both of these pre-strained configurations aim at compensating for the lack of stiffness of these very soft electroactive material structures in the direction of actuation. Indeed, when electrical energy is supplied to them, it is the mass or the spring that is delivering most of the mechanical work. The electroactive material delivers work only when electrical energy is removed from it, i.e. it is discharged, due to the restitution of potential energy stored in the electroactive material. In the absence of pre-loading, such electroactive actuators tend to bend or buckle, due to tensile stress, rather than exert any substantial axial actuation force when electrical energy is supplied to them.


The encoder transforms the audio signals (x(n),y(n)) from the time domain to audio signal (X(k),Y(k)) in the frequency domain, and determines the cross-correlation function (Ri, Pi) in the frequency domain. A complex coherence value (Qi) is calculated by summing the (complex) cross-correlation function values (Ri, Pi) in the frequency domain. The inter-channel phase difference (IPDi) is estimated by the argument of the complex coherence value (Qi), and the inter-channel coherence (ICi) is estimated by the absolute value of the complex coherence value (Qi).

Within the field of audio coding it is generally desired to encode an audio signal in order to reduce the bit rate without unduly compromising the perceptual quality of the audio signal. The reduced bit rate is advantageous for limiting the bandwidth when communicating the audio signal or the amount of storage required for storing the audio signal.
Parametric descriptions of audio signals have gained interest during the last years, especially in the field of audio coding. It has been shown that transmitting (quantized) parameters which describe audio signals require only a limited transmission capacity to enable to synthesize perceptually substantially equal audio signals at the receiving end.
US2003/0026441 discloses the synthesizing of an auditory scene by applying two or more different sets of one or more spatial parameters (e.g. an inter-ear level difference ILD, or an inter-ear time difference ITD) to two or more different frequency bands of a combined audio signal, wherein each different frequency band is treated as if it corresponds to a single audio source in the auditory scene. In one embodiment, the combined audio signal corresponds to the combination of the left and right audio signals of a binaural signal corresponding to an input auditory scene. The different sets of spatial parameters are applied to reconstruct the input auditory scene. The transmission bandwidth requirements are reduced by reducing to one the number of different audio signals that need to be transmitted to a receiver configured to synthesize/reconstruct the auditory scene.
In the transmitter, a TF transform is applied to corresponding parts of each of the left and right audio signals of the input binaural signal to convert the signals to the frequency domain. An auditory scene analyzer processes the converted left and right audio signals in the frequency domain to generate a set of auditory scene parameters for each one of a plurality of different frequency bands in those converted signals. For each corresponding pair of frequency bands, the analyzer compares the converted left and right audio signals to generate one or more spatial parameters. In particular, for each frequency band, the cross-correlation function between the converted left and right audio signals is estimated. The maximum value of the cross-correlation indicates how much the two signals are correlated. The location in time of the maximum of the cross-correlation corresponds to the ITD. The ILD can be obtained by computing the level difference of the power values of the left and right audio signals.


A failsafe engine mount (19) that includes a first link (45), a second link (47), a third link (53), four upper connection locations (39a), (39b), (39c), (39d) on an upper fitting (31), and four lower connection locations (75a), (75b), (75c), (75d) on a clevis strip (73) of an engine casing (71), is disclosed. The first link (45) connects the first upper connection location (39a) with the first lower connection location (75a). The second link (47) has a first arm (49) that connects the second lower connection location (75b) with the second upper connection location (39b). The second link (47) further includes a second arm (51) that connects the second upper connection location (39b) with the third lower connection location (75c). The third link (53) has a first arm (55) that connects the third upper connection location (39c) with the fourth upper connection location (39d). The third link (53) further includes a second arm (57) arranged to connect the fourth upper connection location (39d) with the fourth lower connection location (75d). The first arm (55) of the third link (53) carries loads during a failure of the second link (47). In an alternative embodiment, the third link includes a peg (155) instead of a first arm. The peg inserts into a hole (159) in the upper fitting. During normal operations, the peg does not contact the hole surfaces. In either embodiment under normal operating conditions, the links work together to carry the vertical and horizontal/torsion loads of the engine. During a failed link operation, the remaining links work together to carry all loads.

Airplane engines are typically mounted below an aircraft wing or near the tail section by an engine mount. Mounts are usually provided for both the forward portion of the engine and the aft portion of the engine, so as to distribute the engine load. Typical engine mounts include several components. One of the components is a generally planar upper fitting that has a mounting platform located along its upper edge that is used to attach the engine mount to a support structure of the aircraft, e.g., a wing strut or tail pylon. Multiple clevises are located on the lower edge of the upper fitting and also along a portion of an engine casing. Multiple links, pinned in the clevises of both the upper fitting and the engine casing, connect the engine to the support structure. Similar engine mounts of this type are used at both the forward and aft portions of the engine.
Engine mounts are designed to handle a variety of loads, during all phases of flight. The loads include vertical loads (the weight of the engine plus maneuver loads), axial loads (caused by the engine's thrust), side loads (caused by wind buffeting, for example), and torsion loads (caused by the rotary operation of the engine, or by the loss of a turbine blade). An engine mount must also accommodate thermal expansion and contraction of the engine relative to the mount. The effect of thermal expansion and contraction is most significant during cruise phase. During cruise, thermal expansion and contraction can cause an appreciable shift in the direction of loads acting on an engine mount.
Almost all airplane engine mounts are designed to be failsafe, i.e., to prevent the engine from separating from the airplane. Failsafe operation is provided by a secondary, or backup, load-carrying system. Two types of secondary systems are common. The first type utilizes components of the thrust reverser (such as the translating cowl) to carry engine loads. The second type utilizes catcher links placed within the engine mount itself. Catcher links are additional links in the engine mount that are typically unloaded during normal operation. Should a primary (i.e., non-catcher) link fail, the catcher links are capable of cooperating with the remaining unfailed links to carry engine loads. Link failures may result from many causes, including failure of pins or clevises; broken, deformed, missing, or mis-installed links; sheared pins; etc.
Between the two types of secondary systems, the thrust reverser system is the more widely used approach. On most airplanes, the use of catcher links is a more efficient solution, because they require relatively much less weight and space. Currently, relatively few catcher link engine mounts are known, and of these, not many describe three-link systems.
U.S. Pat. No. 5,275,357 (hereinafter referred to as "357") describes a three-link system, where the center link is the catcher link. The center link carries no load during normal operations, due to an oversized hole where the center link is attached to the engine casing. U.S. Pat. No. 5,303,880 (hereinafter referred to as "880") is similar to the device of the '357 patent, but with the addition of replaceable bushings. Although the devices disclosed in these two patents have three links, the systems are entirely different than the present invention. The most distinguishing difference is that the links in the '357 and '880 patents provide less horizontal and torsion load carrying capability than in the present invention. This is because the '357 and '880 devices do not have a dedicated horizontal and torsion load carrying member. The operation of the catcher link during a failed first or second link also produces a failure-mode load-couple (i.e., span of engine load contact points) that is smaller than the present invention. While the devices of the '357 and '880 patents appear sufficient, it is beneficial to have as large a span between the engine load contact points as possible during a failed link condition. These systems are also relatively tall, which makes them unusable on certain low-winged aircraft such as the Boeing 737.
U.S. Pat. No. 5,078,342 (hereinafter referred to as "342") also describes a three-link system, where the center link is the catcher link. The center link includes an arm that carries horizontal load during normal operations. A second arm of the catcher link is unloaded during normal operations due to an oversized hole therein. Although the device of the '342 patent has three links, it does not fully accommodate the horizontal and torsion loads during all failed link conditions. In particular, certain link failures are provided with only a torsion stop (i.e., two abutting metal faces), as opposed to an actual catcher link. Torsion stops tend to wear very quickly, and once worn, they are difficult or impossible to repair. Another disadvantage of torsion stops is that during failed link conditions, the torsion stops could shear themselves off due to the axial thermal growth of the engine. In addition, the device of the '342 patent is symmetrical, requiring that the strut and engine be hung normal to the ground in order to limit the engagement of the stops. However, the present invention is not sensitive to angle and can be hung other than normal to the ground (such as normal to the wing). The catcher link in the '342 device also has a failure-mode load-couple disadvantage, as described above regarding devices of the '357 and '880 patents.
Thus, there exists a need for a superior failsafe engine mount that provides link load carrying capability in all directions during normal and failed link operations. The ideal mount should be compact in height to provide greater ground clearance if used with an underwing engine, and compact in width in order to not significantly reduce bifurcation flow. The mount, however, should provide as wide a load-couple as possible during failed link conditions. The mount should not have any loose catcher links which vibrate and wear. The mount should provide adequate vertical and horizontal load bearing capability in the event of a single link failure, should be lightweight, and should allow installation of a vibration isolator if needed. As will be appreciated by the following description, the present invention is directed to providing such a superior failsafe engine mount.


A semiconductor device includes a semiconductor element, a base, a cap, leads, and low-melting glass. The semiconductor element is mounted on the base, and the base consists of high-purity alumina and has a thickness of 0.5 mm or less. The cap is arranged on the base to cover the semiconductor element, consists of translucent alumina, and has a thickness of 0.4 mm or less. The leads extend out of the semiconductor device to be interposed between the base and the cap, and are electrically connected to the semiconductor element. The low-melting glass integrally and hermetically seals the base, the leads, and the cap.

The present invention relates to a semiconductor device having a low-profile structure and mainly used in a memory card, an IC card, or the like.
In recent years, a semiconductor device having a low-profile structure is being strongly demanded to be mounted in a memory card, an IC card, or the like. FIG. 4 shows a conventional semiconductor device of this type. A UVEPROM (an ultraviolet erasable read only memory) semiconductor element 206 is fixed on a black alumina base 202 having a recessed portion 210 with a brazing material 207 such as a glass Ag paste or an Al paste, and the electrodes (not shown) of the semiconductor element 206 are connected to leads 203 through wiring lines 208. The resultant structure is covered with a translucent alumina cap 201, and is hermetically sealed with low-melting glass 204, thereby obtaining a package body having a thickness of 1.3 to 1.5 mm (Japanese Utility Model Laid-Open No. 1-160860). In addition, as another conventional example, there is a semiconductor device in which grooves 209 are formed in the sealing surface of a translucent alumina cap 201 as shown in FIG. 5, or the sealing surface of the translucent cap 201 is roughened. In this example, the contact area between the translucent alumina cap 201 and low-melting glass 204 is increased to improve the bonding strength between the cap and the low-melting glass, thereby improving the package strength (Japanese Utility Model Laid-Open No. 2-96739). As still another conventional example, there is a semiconductor device whose sealing portion is improved. This example is shown in FIG. 6. In this example, a layer consisting of a refractory glass layer 205 is formed at a boundary portion between a translucent alumina cap 201 and low-melting glass 204. The refractory glass 205 is screen-printed on the translucent alumina cap 201, and is sintered at a high temperature. When the glass is treated at a high temperature, since the glass sufficiently conforms to the recessed and projection portions of the surface of a ceramic material, a high bonding strength between the translucent alumina cap 201 and the refractory glass 205 can be obtained. Since the refractory glass 205 and the low-melting glass 204 consist of glass materials, the refractory glass 205 tends to be properly mixed with the low-melting glass 204, and a sufficient bonding strength can be obtained (Japanese Patent Laid-Open No. 4-6857).
As has been described above, a conventional semiconductor device whose package body has a thickness of 1.3 to 1.5 mm and a high bonding strength between the translucent alumina cap 201 and the low-melting glass 204 is known.
When the thickness of a package body is decreased to 1.3 mm or less by using the prior art, three problems, i.e., base cracking, base peeling, and cap cracking are posed.
Since the thin package body has a low mechanical strength not to withstand an external force, these problems are posed. Especially, the pressure (generally, 4 to 6 kgf/cm.sup.2) of a helium gas prior to a hermeticity test uniquely performed for a hermetic sealed package is the largest external force acting on the package and often breaking the package. This phenomenon occurs because of the following reasons. That is, when the package is pressed at a high pressure around the package during the pressurization of helium, as shown in FIG. 7, the central portions of the cap and base are recessed. This deformation causes the bottom portion of the base, the boundary portion between the base and the low-melting glass, the upper portion of the cap, and the boundary portion between the cap and the low-melting glass to generate high stresses, as indicated by arrows A, B, C, and D in FIG. 7, respectively. Base cracking, base peeling, cap cracking, and cap peeling occur at the bottom portion of the base, the boundary portion between the base and the low-melting glass, the upper portion of the cap, and the boundary portion between the cap and the low-melting glass, respectively.
On the other hand, the package strength of the above four portions of the conventional UVEPROM semiconductor device is very low except for the boundary portion between the cap and the low-melting glass upon the above counter measure.
First, the base portion has the following drawbacks:
Since the base portion has a recessed shape, the central portion having a small thickness has a low strength.
Since black alumina serving as the material of the base contains Al.sub.2 O.sub.3 having a low purity of 90 to 92% and contains a glass component such as SiO.sub.2 and MgO having low strength, the glass portion is easily broken first, thereby degrading the strength of the base.
Second, the boundary portion between the base and the low-melting glass has the following drawback:
When the thickness of the base is decreased, the deformation amount of the base is increased to increase a load on the boundary portion. However, since a countermeasure for improving the bonding strength between the base and the low-melting glass is not performed, the strength of the boundary portion between the base and the low-melting glass is degraded.
Third, the cap portion has the following drawback:
Translucent alumina serving as the material of the cap has a large grain size of 10 to 30 .mu.m and an average grain size of 15 .mu.m, and crystal grain intervals of the translucent alumina are wide. For this reason, the cap has many voids, and cracking easily occurs from the voids, thereby degrading the strength of the cap. As described above, the conventional semiconductor device has the drawbacks at the three portions.

Semiconductor device package having a low profile structure and high strength


A multilayer chip capacitor, which reduces ESL generated due to current flowing through external electrodes and assures an improved mechanical strength. The multilayer chip capacitor includes an upper dummy layer and a lower dummy layer; a plurality of internal electrodes interposed between the upper and lower dummy layers; and external electrodes connected to the internal electrodes, wherein the thickness of the lower dummy layer is smaller than the thickness of the upper dummy layer.

1. Field of the Invention
The present invention relates to a multilayer chip capacitor, and more particularly to a multilayer chip capacitor, which has a low equivalent serial inductance (ESL) in a high frequency circuit.
2. Description of the Related Art
Generally, multilayer chip capacitors have a small size, achieve high capacitance, and are easily mounted on a substrate, thus being widely used in various electronic apparatuses. Multilayer chip capacitors are used as capacitive components of high frequency circuits, particularly as decoupling capacitors arranged in power supply circuits of LSI. In order to use a multilayer chip capacitor in a high-frequency circuit, the multilayer chip capacitor must have a low ESL value. The above requirement is increased according to high frequency and high current trends of electronic apparatuses.
U.S. Pat. No. 5,880,925 proposes that respective lead structures of first internal electrodes are located adjacent respective lead structures of second internal electrodes in an interdigitated arrangement to reduce the ESL of the multilayer chip capacitor. The above arrangement is shown in FIG. 1a.
FIG. 1a is an exploded perspective view illustrating shapes of internal electrodes of a conventional multilayer chip capacitor. FIG. 1b is a schematic perspective view of the conventional multilayer chip capacitor manufactured using the internal electrodes of FIG. 1a. FIG. 1c is a sectional view of the multilayer chip capacitor of FIG. 1b as taken along the line X–X′. With reference to FIG. 1a, internal electrodes 14 are formed on a plurality of dielectric layers 11a and 11b made of ceramic. The internal electrodes 14 are divided into first internal electrodes 12 and second internal electrodes 13 having different polarities. Leads 16 of the first internal electrodes 12 and leads 17 of the second internal electrodes 13 are connected to respective ones of external electrodes 18 (in FIG. 1b). The leads 16 of the first internal electrodes 12 are located adjacent the leads 17 of the second internal electrodes 13 in an interdigitated arrangement. Since the polarities of the voltages supplied to the nearby leads differ, the magnetic fluxes generated due to the high frequency currents flowing from the external electrodes are canceled out between theses adjoining leads. Therefore, the ESL is reduced. However, such reduced amount of the ESL does not satisfy the level required for the decoupling capacitors for high frequency circuit.
As shown in FIGS. 1b and 1c, in the conventional multilayer chip capacitor 10, the internal electrodes 14 are located at the central portion of the capacitor main body 20 such that a cross section of a capacitor main body 20 has a lower-upper symmetrical structure with regard to a central line (L). That is, the capacitor main body 20 includes a lower dummy layer 51, an upper dummy layer 52 and an active layer 50 between the lower and the upper dummy layers 51 and 52. The lower and the upper layers 51 and 52 have the same thickness (a). The active layer 50 has a plurality of the internal electrodes 14. As shown in FIG. 1a, the dielectric layers 11a and 11b are interposed between the internal electrodes 14. The dummy layers 51 and 52 correspond to the regions without internal electrodes which substantially contribute to capacitance. On the contrary, the active layer 50 corresponds to the region with internal electrodes which substantially contribute to capacitance. The dummy layers 51 and 52 serve to protect the internal electrodes 14 and to assure a designated thickness of the multilayer chip capacitor 10. The lower and upper dummy layers 51 and 52 are made of the same material as that of the dielectric layers 11a and 11b.
When the internal electrodes 14 are located at the central portion of the capacitor main body 20, a distance (a) from the bottom surface (the surface attached to a pad of a substrate) of the multilayer chip capacitor 10 mounted on a substrate to the lowermost internal electrode 14 is elongated. That is, the thickness (a) of the lower dummy layer 51 is comparatively increased by locating the internal electrodes 14 at the central portion of the capacitor main body 20. When the thickness (a) of the lower dummy layer 51 is increased, the ESL component generated due to current flowing through the external electrodes 18 from the bottom surface is increased. Particularly, in a multilayer chip capacitor with multi-terminals more than 2 terminals, the above ESL component occupies a considerable portion of the overall ESL of the multilayer chip capacitor.
FIG. 1d is a sectional view of the multilayer chip capacitor of FIG. 1b as taken along the line A–A′. FIG. 1e is a schematic view showing a model of the equivalent serial inductance of the mutilayer chip capacitor of FIG. 1d. As shown in FIG. 1e, the conventional mutilayer chip capacitor 10 has the inductance (Lh) in the region H and the inductances (Lv) in the regions V1 and V2. Thus, the total inductance of the multiplayer chip capacitor is Lh+2Lv. Therefore, as the thickness (a) of the lower dummy layer 51 is increase, the ESL of the capacitor is increase.
Additionally, in the conventional multiplayer chip capacitor 10, each of the internal electrodes 14 has four leads, resulting in smaller ESR (equivalent serial resistance). When each of internal electrodes 12 or 13 has four leads as shown in FIG. 1a, the resistances generated from the leads are parallel connected. As a result, the total resistance of the capacitor 10 becomes extremely small. If the ESR is extremely small, it is hard to meet the target impedance and impossible to design power distribution network stably.
In order to prevent the ESR from reducing extremely, U.S. Pat. No. 6,441,459 proposes that each of internal electrodes has one lead to increase to the ESR. However, according to the U.S. Patent, the ESL is increased, and the ESR is not controllable.
In order to solve the problems of the increase in the ESL component, as shown in FIG. 2, a lower dummy layer 51′ and an upper dummy layer 52′ may have a reduced thickness (b′), thus resulting in a thin multilayer chip capacitor. However, when the multilayer chip capacitor is excessively thin, the mechanical strength of the multilayer chip capacitor is decreased. For example, when the multilayer chip capacitor is designed to have a thickness of less than 0.3 mm, the capacitor is easily broken or damaged during the manufacturing process thereof, thus deteriorating a production yield of chip capacitors. Particularly, the above mechanical damage of the capacitor is highly generated when the capacitor main body is polished after sintering or when the manufactured multilayer chip capacitor is mounted on a substrate.


Systems and methods for increasing effective line density of volume compound ultrasound images while maintaining the frame rate, penetration depth, and other image characteristics are provided. The method includes acquiring a first lateral plane at a first elevational position. The first lateral plane includes a first set of receive lines at a first set of lateral positions. The method includes acquiring a second lateral plane at a second elevational position adjacent the first elevational position. The second lateral plane includes a second set of receive lines at a second set of lateral positions laterally offset from the first set of lateral positions. The method includes combining the first lateral plane and the second lateral plane to generate a compound image and presenting the compound image at a display system. The compound image may be a volume compound image in an A-plane generated based on volume compound imaging rendering algorithms.

Ultrasound imaging is a medical imaging technique for imaging organs and soft tissues in a human body. Ultrasound imaging uses real time, non-invasive high frequency sound waves to produce a two-dimensional (2D) image and/or a three-dimensional (3D) image.
Ultrasound volume compound imaging (VCI) involves the acquisition of multiple scan converted B-mode images along an elevational direction and combining the B-mode images using VCI rendering algorithms to generate a volume rendered image. FIG. 1 illustrates an exemplary volume 10 having receive line 14 positions in multiple lateral planes 12 along the elevational direction processed to generate the B-mode images used in VCI, as known in the art. Referring to FIG. 1, each of the lateral planes 12 along an elevational direction includes a plurality of receive lines 14. The receive lines 14 of each lateral plane 12 are laterally aligned causing the partial transparent rendering algorithm to primarily visualize the receive lines 14 of the first lateral plane 12 in the parallel projection rendering view direction.
FIG. 2 illustrates exemplary receive line 24 positions in multiple lateral planes 22 along an elevation direction acquired using multi-line acquisition (MLA) 20, as known in the art. Referring to FIG. 2, four (4) receive lines 24 are acquired for each transmit beam 26. As shown in FIG. 2, each of the lateral planes 22 along an elevational direction includes a plurality of receive lines 24. The receive lines 24 of each lateral plane 22 are laterally aligned. Accordingly, similar to FIG. 1, the application of a partial transparent rendering algorithm will primarily visualize the receive lines 24 of the first lateral plane 22 in the parallel projection rendering view direction.
Conventional VCI acquisitions involve a trade-off between frame rates and line densities. For example, line densities are typically increased by increasing the number of lines, which reduces the frame rate. As another example, frame rates are typically increased by decreasing the number of lines, which reduces the line densities.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present disclosure as set forth in the remainder of the present application with reference to the drawings.

Method and system for increasing effective line density of volume compound ultrasound images


A motion vector detector divides an image of an inputted image signal into a plurality of regions so as to calculate motion vectors at the regions, respectively, a characteristics detector then detects characteristics of the motion vectors, or of calculation data of the motion vectors, so as to detect a state in which a number of points having close correlation exist in the image, a vector control and decision unit then determines, when the characteristics detector has detected the state, some of the motion vectors at one of the regions free from the state so as to select a motion vector of the image signal from the some of the motion vectors by neglecting the remaining motion vectors at the remaining regions in the state, an image stabilizer may then be used to correct sway of an outputted image.

The present invention relates to a motion vector detecting apparatus for detecting an amount of displacement of an image and an image stabilizer for correcting sway of an outputted image, which includes the motion vector detecting apparatus.
A motion vector detecting apparatus is known from, for example, Japanese Patent Laid-Open Publication No. 61-269475. As shown in FIG. 1, the known motion vector detecting apparatus includes a motion vector detector 20 and a motion vector determiner 10. The motion vector detector 20 includes a first latch 1, a representative point memory 2, a second latch 3, a subtracter 4, an address controller 5, an absolute value converter 6, an accumulative adder 7, a correlational retriever 8 and a correlational decision unit 9 for judging validity of correlation in an image.
The known vector detecting apparatus of the above described below arrangement is further described. Initially, a motion vector of an image is described with reference to FIGS. 2a to 2c. FIG. 2a shows an image at a time point and FIG. 2b shows an image subsequent to the image of FIG. 2a by one field or one frame. When the image is displaced in parallel by movement of an image pickup device, etc. as shown in FIGS. 2a and 2b, an amount of parallel displacement of the image is expressed by a vector of the arrow in FIG. 2c and this vector is referred to as a "motion vector".
FIG. 3 shows a representative point and pixcels surrounding the representative point in a so-called representative point matching method of detecting a motion vector of an image. In this method, image data is disposed at a representative point in a field and a motion vector is detected by performing correlational arithmetic operations for determining to which one of the surrounding pixcels the image data is displaced in the next field.
Operation of the known motion vector detecting apparatus employing the correlational arithmetic unit is described with reference to FIG. 1. Image data at respective representative points in a screen are received by the first latch 1 in response to a timing pulse LP1 and are, at a certain timing, written at addresses of the representative point memory 2, which correspond to the representative points, respectively. Subsequently, in the next field or the next frame, correlation, namely absolute values of differences between image data in a motion vector detecting area surrounding each representative point and image data of the representative points of the previous field, which are stored in the representative point memory 2, are obtained and are inputted to the accumulative adder 7. Data representing correlation obtained on the basis of coordinates of each representative point are accumulatively added by the accumulative adder 6. When accumulative addition of the data for all the representative points has been completed, a location having the closest correlational value among accumulative sums stored in the accumulative adder 7 is judged by the correlational retriever 8. Namely, the location (address) having the closest correlational value relative to the corresponding representative point indicates the motion vector.
In the arrangement shown in FIG. 1, correlational arithmetic operation is performed by accumulative addition of the absolute values of the differences. Thus, in the accumulative adder 7, data at points having quite close correlation assume values smaller than those at other points. Furthermore, on the basis of distributions (average value, minimum value, gradient, etc.) of the correlational values in the motion vector detecting area, the correlational decision unit 9 judges whether or not the motion vector obtained by the correlational arithmetic operation is valid. When (1) the average value is small, (2) the minimum value is large and (3) the gradient around the minimum point of the correlational value is small, the correlational decision unit 9 judges that the motion vector obtained by the correlational arithmetic operation is invalid.
The above operation is performed for image signals in each of a plurality of divided regions in a screen. Then, on the basis of the motion vectors obtained from the image signals in the respective regions in the screen and data on judgement of validity of the motion vectors by the correlational decision unit 9, the motion vector determiner 10 determines a motion vector of the image signals of the whole screen.
Since the above described operation is performed for each field (frame), the first latch 1 is provided for storing, while the correlational arithmetic operation is being performed, image data at the representative points for the correlational arithmetic operation in the next field (frame). Meanwhile, when correlation between image data at a representative point and image data surrounding the representative point is obtained, the second latch 3 stores the image data at the representative point.
In the known motion vector detecting apparatus of the above described arrangement, when correlation at respective locations of a subject is remote and only a point of shift of the image through movement of an image pickup device has close correlation, no problem is incurred. However, if a subject has regular correlation, the following problem arises. Namely, in this case, a number of points of the subject have close correlation. Thus, in order to detect the motion vector accurately, a gradient around a minimum value of the correlational values is checked but validity of the correlation cannot be judged by merely comparing the gradient with a constant. Meanwhile, when a camera shooting the subject is swaying, the gradient varies greatly, so that validity of the correlation cannot be judged sufficiently.
Thus, judgement based on the gradient does not necessarily ensure judgement of validity of the correlation positively in many cases. Hence, the motion vectors obtained from the respective regions assume positions, which have close correlation in the image but are irrelevant to the proper motion vectors at the respective regions, and thus, do not represent the proper motion vectors at the respective regions. As a result, if the motion vector of the whole screen is determined by taking, for example, an average of the motion vectors at the respective regions, the motion vector of the whole screen is detected erroneously due to a prospective motion vector obtained by the mere gradient in a region having close correlation in the image, which correlation is different from movement of the whole screen.

Motion vector detecting apparatus and image stabilizer including the same

Matsushita Electric Industrial Co., Ltd.


A suspension board with circuit includes a first layer having electrically conductive properties, a second layer having insulation properties and formed at one side in a thickness direction of the first layer, a third layer having electrically conductive properties and formed at one side in the thickness direction of the second layer, and a fourth layer having insulation properties and formed at one side in the thickness direction of the third layer. The first layer includes an electronic component connecting terminal for being electrically connected to an electronic component. The second layer includes a first opening portion passing through in the thickness direction. The third layer includes a first conductive circuit having a magnetic head, and a second conductive circuit. The fourth layer and the second layer are formed with a second opening portion.

Field of the Invention
The present invention relates to a suspension board with circuit, to be specific, to a suspension board with circuit used in a hard disk drive.
Description of Related Art
As a suspension board with circuit, a suspension board with circuit in which a slider including a magnetic head is provided with respect to a gimbal portion to be mounted on a hard disk drive has been conventionally known.
It has been proposed that an electronic component such as a heat assist device including a laser diode is further mounted in the suspension board with circuit so as to increase the storage capacity of a disk (ref: for example, Japanese Unexamined Patent Publication No. 2013-200934).


Provided are a memory device formed using one or more source materials not containing hydrogen as a constituent element and a method of manufacturing the memory device.

1. Field
Example embodiments relate to a memory device formed using a precursor not containing hydrogen as a constituent element for an interlayer insulating material, and a method of manufacturing the memory device.
2. Description of the Related Art
In general, a conventional semiconductor memory array includes a plurality of memory cells connected in a circuit. An example of a conventional semiconductor memory is a dynamic random access memory (DRAM). In the DRAM, a unit memory cell generally includes a switch and a capacitor. The DRAM is highly integrated and operates at a high speed, however, data stored in the DRAM is deleted when power is turned-off.
By contrast, data stored in a flash memory may be retained even when power is turned-off. Unlike a volatile memory, the flash memory has a non-volatile characteristic, but generally has lower integration and a lower operation speed than the DRAM.
Research is being conducted on non-volatile memory devices including a magnetic random access memory (MRAM), a ferroelectric random access memory (FRAM), a phase-change random access memory (PRAM), a resistance random access memory (RRAM), and the like.
RRAM is a resistive memory. RRAM uses a resistance variation characteristic wherein the RRAM resistance varies according to a voltage of a transition metal oxide. A general resistive memory node includes a switch structure and a memory element formed between a lower electrode and an upper electrode. An insulating material is formed between electrodes and between memory nodes, and the insulating material is generally referred to as an inter-metallic dielectric (IMD) or an inter-layer dielectric (ILD). Conventionally, silicon dioxide (SiO2) is used as the IMD and ILD, wherein the SiO2 is formed from a source material (precursor) including hydrogen by using plasma enhanced chemical vapor deposition (PECVD). An example of a source material is silane (SiH4). However, since the source material including hydrogen is used to form the IMD and ILD, the hydrogen may permeate through the memory element and the switch structure after forming the memory device, thereby deteriorating the characteristics of the memory device.


A device (D) is intended for determining potential interests of users (U1-U3) that are clients of at least one network operator, each user being associated to a profile defining at least his interests. This device (D) comprises i) a tracking means (TM) arranged for analyzing the profile of at least one user (U1) to determine new real interest(s) it contains and for storing an identifier representative of a determined new real interest of this user (U1) in correspondence with a first date at which it has been considered as a new real interest into his profile, and ii) a recommendation means (RM) arranged for analyzing the first dates of a user (U1) to determine a time ordered sequence of interests preceding a determined new real interest, and for comparing this determined user interest sequence to at least one other sequence of interests of at least one other user (U2) to predict at least one potential future interest for this user (U1), to be introduced into his profile.

The present invention relates to the recommendation of content items for users of communication equipments capable of being connected to at least one communication network, and more precisely to personalization of user content recommendations.
One means here by "user profile" a set of data (or metadata) describing the identity of a user, such as socio-demographic data and interests (or preferences or else habits) relative to one or more subjects (television programs, radio programs, news, music, advertising, entertainment, items to buy or use of services, for instance). (Meta)Data describing user interests can be words or expressions or else concepts that most of the time may be found also in the descriptions that are associated to the content items.
Moreover, one means here by "user content recommendations" recommendations (or suggestions) of content items that are proposed to a user based on interests (or preferences or else habits) contained into his profile.
More, one means here by "concept" something defined by one or more words or from one or several taxonomies or ontologies, and therefore associated to a semantic content. It is usually described by a set of at least one property (i.e. a set of descriptors having a type and a value).
One major challenge in the domain of personalization of user content recommendations is to understand the interests of users as properly as possible in order to provide them with content items suited to their respective needs.
As it is known by the man skilled in the art, usual techniques for content recommendation (such as content-based filtering algorithms) do not allow introducing in the user profiles concepts that did not appear in the descriptions of content that have been consumed by the users. Indeed, when a content item is consumed by a user, metadata that describe this content item can be added (according to various heuristics) to the user profile, and then recommendations are generated on the basis of similarities between the user profile and the content metadata. So, content items for which there are no corresponding metadata in a user profile will not be recommended to the user.
These approaches tend to overspecialise the recommendations and do not enable to add enough diversity/discovery in the recommendations. More precisely, these approaches do not allow anticipating user interests: the user must have consumed something described by a concept (or equivalent) to have further recommendations related to that concept. For example, with existing systems if a user liked one book of Victor Hugo, the recommender system will tend to recommend him other books of Victor Hugo, whereas this user (but also many others) may be interested in discovering other writers, just because his (their) taste(s) evolve(s) naturally with time and also because of the influence of the items he (they) has (have) consumed, and of other interests he (they) may have had in the meantime.
Other approaches have been recently proposed to improve the user content recommendations.
A first approach concerns the so-called "collaborative recommenders". Typical collaborative recommenders comprise a core mechanism consisting in finding hidden links between users based on the similarity of their preferences or historic behaviour. Items are recommended to a certain user with respect to the interests he shares with other users or according to opinions, comparatives, and ratings of items given by other users having similar profiles.
So, in this first approach, the comparison between users and items is done globally, without taking into account the temporal dimension, and therefore this approach may be not very relevant when there is a strong dependency between two items. Moreover, even if collaborative recommenders allow to bring some diversity in the recommendations, they are not able to address directly the problem of anticipating the next (or future) user interests. More, collaborative recommenders require a significant number of user ratings in order to be effective (this is the so called "cold-start problem").
A second approach concerns the so-called "frequent pattern mining algorithms". These algorithms enable finding dependencies between the appearance of items in a set of transactions, as described notably in the article of Goethals, B., "Survey on frequent pattern mining", Technical report, Helsinki Institute for Information Technology, 2003. The goal of a frequent pattern mining algorithm is to find a set of frequent and confident association rules of the form "XY", which means: "if the set of items X appears in a transaction, then another set of items Y also appears in that transaction". An association rule is considered as frequent if the ratio between the number of transactions in which X and Y appear together and the total number of transactions satisfies a frequency threshold. Similarly, an association rule is confident if the percentage of transactions where X and Y appear together among all transactions containing X is greater than a confidence threshold.
Even if frequent pattern mining algorithms enable finding relationship between items, they are only concerned with the presence of items in transactions, but they do not consider the moment of appearance of preferences (or items). There exist approaches for frequent temporal pattern mining (for example the one described in the article of Sivaselvan, B. et al, "An efficient frequent temporal pattern mining algorithm," Information Technology Journal, vol. 5, pp. 1043-1047, 2006) which takes into account the order of appearance of items in transactions. However, the temporality is considered in terms of the number of items separating the two frequent sets of items and not in terms of the time elapsed between them.
A third approach concerns the so-called "temporal probabilistic models". Some probabilistic models have been proposed for user interest and interest transition capturing and predicting. They have been notably described in the article of Suzuki, T. et al., "Learning to estimate user interest utilizing the Variational Bayes' estimator", Proceedings of 5th International Conference on Intelligent Systems Design and Applications, Wroclaw, Poland, 94-99, 2005, and in the article of Wang, S. et al, "Mining Interest Navigation Patterns with Hidden Markov Model", Lecture Notes in Computer Science Volume 4027/2006, pp. 470-478, Springer, 2000.
These last models have been conceived for single user interest transition capturing, but not for applying captured interest transition patterns of one user to similar users.

Device for determining potential future interests to be introduced into profile(s) of user(s) of communication equipment(s)


A printed circuit board (PCB) system includes a first printed circuit board (PCB), an integrated circuit (IC) package, and a memory module. The IC package includes i) a package substrate, ii) a main IC chip that is electrically coupled to a top surface of the package substrate, iii) first contact structures that are disposed on a bottom surface of the package substrate and that are electrically coupled to the first PCB, and iv) second contact structures that are disposed on a top surface of the package substrate. The memory module includes i) a second PCB, ii) one or more memory IC chips that are disposed on the second PCB, and iii) third contact structures that are disposed on a bottom surface of the second PCB. An interposer electrically couples the second contact structures of the IC package with the third contact structures of the memory module.

Integrated circuit (IC) packaging involves a semiconductor die (also referred to as an IC chip) of integrated circuits being covered in a housing that prevents physical damage, corrosion and the like, to the IC chip. Additionally, electrical connection points, such as pins or pads, outside of the housing are provided to allow electrical connections with the IC chip within the housing. The IC chip, the housing, and the electrical connection points are sometimes referred to as an IC package.
A ball grid array (BGA) is a surface-mount IC package in which an array of pads, each with an attached solder ball, on a bottom surface of the BGA package allow the BGA package to be electrically connected to a printed circuit board (PCB). The density of solder balls (sometimes measured by the distance between adjacent balls, (pitch size)) on the BGA package has an upper limit. As a result, for larger more complex IC chips with higher numbers of input/output (I/O) connections that require higher numbers of solder balls, the overall size of the BGA package is increased, which increases the cost of the BGA package.


A method for forming a semiconductor device is provided. The method includes providing a substrate having a plurality of protrusions projecting from the substrate; forming a silicon layer over the substrate and each protrusion; performing an anisotropic etching to transfer the silicon layer into a silicon spacer positioned on a side wall of each protrusion; forming an oxide layer over the silicon spacer; and etching the substrate to form a recess on the substrate by using the oxide layer as a mask.

In the recent development, a recessed channel has been provided with the intention of alleviating short channel effects in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). FIG. 1 illustrates the formation of the recessed channel in the MOSFET, in which a patterned mask 110 is lithographically formed on a Si substrate 100, and then an etching step is performed to create the recessed structure on the substrate 100. However, as the device dimension continuously shrinks, the process window becomes more and more narrow or critical, which poses more difficulties while forming the patterned mask by lithography process. Therefore, it would be desirable to provide an improved method to resolve the above-described problem.

Semiconductor devices having recessed structures and methods of forming the same


An adjustment specification specifies the adjustment to be made to a multimedia content, including a time characteristic. The multimedia content is matched within a tolerance to a set of comparable multimedia contents having a characteristic corresponding to the adjustment specification. An embedding model is configured and trained. Using the trained embedding model and the set of comparable multimedia contents, a set of styles is generated. Using a frame adjustment model and a style in the set of styles, a video frame of the multimedia content is adjusted. Using an audio adjustment model and the trained embedding model, an audio portion of the multimedia content is adjusted. The video frame of the multimedia content and the audio portion of the multimedia content are synchronized, producing an adjusted multimedia content adjusted according to the adjustment characteristic.

The present invention relates generally to a method, system, and computer program product for multimedia content adjustment. More particularly, the present invention relates to a method, system, and computer program product for multimedia content adjustment using comparable content.
Multimedia content includes one or more of a still image or video component, an audio component, and a textual component. A text document, audio recording, presentation including a mixture of text and still images, silent movie (including text and video, but not audio), and conventional movie (including audio and video, with text captions) are all non-limiting examples of multimedia content.
Multimedia content has a format characteristic, which describes a format of the multimedia content. The number of pixels, number of colors, and dimensions of a still image, the bit rate of an audio recording, and the number of frames per second are all non-limiting examples of a format characteristic of multimedia content. For example, a television presentation produced in North America in the 1970s might have format characteristics including a 720×480 resolution and a frame rate of 30 frames per second.
Multimedia content also has a time characteristic, which describes a time period associated with the multimedia content. The time characteristic can be in the past. For example, a video and audio presentation explaining the preparation of computer systems for the transition from the years 1999 to 2000 might have a time characteristic of 1999, or a specific data within 1999. The time characteristic can also be in the future. For example, a video and audio presentation previewing next year's baseball season might have a time characteristic of next year, or a specific date next year before the season is to start. Multimedia content can also have more than one time characteristic. For example, an audio presentation produced in 1938 about an invasion of Earth by extraterrestrials on a future date might have two time characteristics: 1938 and the future date. The time characteristic can also be the present. For example, a contemporary drama, produced this year but not otherwise referencing a specific time period, has a time characteristic of the present.
Multimedia content also has a style characteristic, which describes a visual appearance associated with the multimedia content. A color scheme, particular set of textures, hue, and contrast ratio present in video or still images of multimedia content are all non-limiting examples of a style characteristic. For example, a video presentation of a home decorated in the 1970s might have style characteristics of a color scheme using mostly orange and brown color tones and textures including a shag carpet.
Multimedia content often has more than one type of characteristic. For example, a video presentation, produced in the 1970s, of a home decorated in the 1970s, might have a format characteristic of a 1970s television format, a time characteristic of the 1970s, and style characteristics of a color scheme using mostly orange and brown and textures including a shag carpet.

Multimedia content adjustment using comparable content

INTERNATIONAL BUSINESS MACHINES CORPORATION


The present invention relates to an oxide superconductor comprising a composite oxide of RE , Ba and Cu, wherein the superconductor comprises a micro structure comprised of a monocrystalline REBa.sub.2 Cu.sub.3 O.sub.7-x phase (123 phase) and a RE.sub.2 BaCuO.sub.5 phase (211 phase) finely dispersed therein, the 123 phase being formed in a plurality of domains respectively for individual RE compositions and in the order of the 123 phase forming temperatures in respective layers. The present invention relates also to a process for the preparation of an oxide superconductor, characterized by forming a layer from a mixed powder of the RE, Ba and Cu compounds, forming another layer(s) of a mixed powder of RE, Ba and Cu compounds having another RE composition(s) different from the above-mentioned RE composition in the 123 phase forming temperature to form a multi layer structure, putting said plurality of layers on top of one another so that the 123 phase forming temperatures in respective layers continue towards a higher temperature side or a lower temperature side, subjecting the assembly to press molding to form a precursor, putting said precursor on a supporting material with the layer having the highest 123 phase forming temperature being located at the highest position, heating said precursor to a temperature range in a solid liquid coexisting region to bring said precursor into a semi molten state, and either gradually cooling said precursor in a 123 phase temperature range or inoculating the precursor with a seed crystal and gradually cooling the inoculated precursor in the above mentioned temperature range to grow a 123 phase crystal at a growth rate of 5 mm/hr or less.

A YBa.sub.2 Cu.sub.3 O.sub.7-x type (123 phase type) superconductor prepared by a QMG (quench and melt growth) method, that is, a kind of a melt method, apparently has a critical current density (Jc) of 10.sup.4 A/cm.sup.2 or more under conditions of 77K and 1T which suffices for practical use (see "New Superconducting Materials Forum News", No. 10 (1988), p. 15). Studies have been made also on an increase in the size of the QMG material and a combination of RE elements (see "Physica C", 162-164 (1989), pp. 1217-1218 or Preprints of the 50th Symposium of the Japan Society of Applied Physics, Autumn, 1989, 29a-P-10). In these methods, an oxide superconductor material containing Y element alone or various RE elements is unidirectionally grown in a temperature gradient to increase the size of a crystal.
In a polycrystalline structure, a grain boundary acts as a weak link to decrease superconducting properties. The above-mentioned study on the increase in the size of the crystal has been made for the purpose of solving this problem.
The above-mentioned prior art technique, however, can provide only a single crystal material having a size of 0.3 cm.sup.3 at the largest, and it was very difficult to unidirectionally grow the 123 phase structure to form a large single crystal.
That is, the prior art could not solve problems regarding the means for forming a nucleus of a crystal, a method of regulating the growth of a crystal, etc.
An object of the present invention is to provide a material comprising a REBa.sub.2 Cu.sub.3 O.sub.7-x phase in a large-size single crystal form (hereinafter referred to as "123 phase") in an oxide superconductor comprising a composite oxide of at least two elements selected from the group consisting of Y, Sm, Eu, Gd, Dy, Ho, Er, Tm, Yb and Lu (hereinafter referred to as "RE elements"), Ba and Cu.
Another object of the present invention is to provide a material having a structure such that a RE.sub.2 BaCuO.sub.5 phase (hereinafter referred to as "211 phase") having a very small grain diameter is dispersed in a large size 123 phase.

Oxide superconductor and process for preparation thereof


When a lower surface of a liquid ejecting head is formed by a nozzle plate and a cover member, a surface of the nozzle plate and a surface of the cover member are water-repellent surfaces and side surfaces of the nozzle plate and the cover member are relatively hydrophilic surfaces compared to the surfaces and a gap between the nozzle plate and the cover member is filled with a filling material. If at least the side surface of the nozzle plate is covered by the filling material, the nozzle plate can be protected from static electricity. Further, if the side surface of the cover member is filled with the filling material, wiping by a wiper is improved.

1. Technical Field
The present invention relates to a liquid ejecting head that ejects a liquid from a nozzle and a liquid ejecting apparatus and, more particularly, to an ink jet type recording head that ejects an ink as a liquid and an ink jet type recording apparatus.
2. Related Art
An ink jet type recording head that is a representative example of a liquid ejecting head which ejects liquid drops includes a pressure generation chamber that communicates with a nozzle and a piezoelectric actuator which is disposed to face the pressure generation chamber, in which a pressure change is generated in the pressure generation chamber by a displacement of the piezoelectric actuator so that the ink drops are ejected from the nozzle.
Various structures have been proposed as the structure of such ink jet type recording heads. In general, a plurality of members are set by using an adhesive or the like (for example, refer to JP-A-2012-196882).
In the structure of the ink jet type recording head shown in JP-A-2012-196882, a surface of the liquid ejecting head that faces the printing medium is almost covered by a cover member formed of stainless steel with the exception of an almost minimum nozzle plate which is formed from a silicon substrate. The cover member forms an ink flow passage on an inner side surface of the liquid ejecting head.
In JP-A-2004-82699, a surface of a liquid ejecting head that faces a printing medium is provided with a concave portion, and the concave portion is filled with a filling material.
In the structure of the ink jet type recording head shown in JP-A-2012-196882, the nozzle plate that is small in size is exposed to the outside. The nozzle plate is formed of silicon for high precision but is weak in strength since formed of silicon, and may be damaged by wiping during head cleaning and may be damaged by static electricity as well.
Also, in JP-A-2004-82699, the concave portion may not be filled with the filling material without any gap.
These disadvantages are present not only in ink jet type recording heads that eject ink but also in liquid ejecting heads that eject liquid other than ink.

Liquid ejecting head and liquid ejecting apparatus


The invention relates to an injection valve which has a piezo actuator that is functionally connected to a nozzle needle by a hydraulic transmission device. The hydraulic transmission device is connected to a pressure reservoir by a sealing gap so that the pressure differences between the pressure reservoir and a hydraulic chamber of the hydraulic transmission device are compensated in the long term.

Metering valves are used as injection valves, for example in the case of direct injection of petrol or in the case of direct injection of diesel, in order to supply an internal combustion engine of a motor vehicle with a precisely metered quantity of fuel. In the case of modern injection valves, piezoactuators are used for controlling a nozzle needle. Piezoelectric multilayer actuators which are currently available were developed for the common rail injection system and have high blocking forces of up to 2000 Newton with a small extension of up to 60 μm.
For a direct actuation of the nozzle needle in a petrol injection valve, an adjusting path of up to 100 μm with a correspondingly smaller force is necessary. The piezoactuators which are already available therefore do not correspond.
Furthermore, thermal expansions, aging effects in the piezoceramic and pressure-induced expansions, in particular at small deflections of up to 60 μm, have a negative effect on the correct setting of the nozzle needle.

Metering valve with a hydraulic transmission element


Each of transducers of a touch panel device includes a piezoelectric thin film, a plate electrode disposed at one surface of the piezoelectric thin film and a comb-like electrode disposed at the other surface of the piezoelectric thin film. The comb-like electrode has a plurality of comb-like electrode fingers and a linear bus electrode to which one end of each of the plural comb-like electrode fingers is connected. A plurality of wiring electrodes is provided at the outer side of any of the transducers in parallel with the bus electrode of the transducer and is connected to the bus electrode and the plate electrode of any of the transducers. Each of the wiring electrodes includes an electrode base portion formed by printing silver paste containing fine particles on the substrate and an electrode main body formed by printing silver paste containing large particles and fine particles in a mixed manner on the electrode base portion.

1. Field of the Invention
The present invention relates to a touch panel device that determines a touch position of an object by detecting attenuation position of a surface acoustic wave due to a touch of the object. The touch panel device is used as an input device of a personal computer or a personal digital assistant, for example.
2. Description of the Prior Art
As an input device of a personal computer, a mobile computer, a personal digital assistant device (PDA) or the like, the touch panel device is often used in which information can be entered with the touch of a finger or a pen on a display screen of a display device.
There are two types of the touch panel devices. One utilizes a resistance film, and another utilizes a surface acoustic wave (SAW). The resistance film type has a multilayered resistance film in a touch area, which scatters light so that transmittance is low. A touch panel device of the surface acoustic wave type has transducers that are arranged at four sides of the touch area for emitting or receiving the surface acoustic wave. When a finger or the like touches the touch area, the touch position is detected in accordance with the attenuation position of surface acoustic wave. The surface acoustic wave type has an advantage of a high transmittance, a good visibility of the display screen and a high durability against a scratch because the touch area has no resistance film or the like.
The applicant proposed a structure of the surface acoustic wave type touch panel device in Japanese unexamined patent publication 2004-171213. This structure has a single phase transducer (SPT) of an electrode structure in which a piezoelectric thin film is sandwiched between a comb-like electrode and a plate electrode so that only one electrode is disposed on one surface. The structure also has a chevron type electrode structure in which dog-legged comb-like electrodes are arranged in a row.
The touch panel device includes a rectangular transparent substrate and total four transducers. Emitting transducers are disposed at the upper end portion and the lower end portion of the substrate while receiving transducers are disposed at the left end portion and the right end portion. The portion surrounded by the four transducers is the touch area. Each of the transducers has the SPT electrode structure described above and the chevron type electrode structure.
Each of the transducers has one end in the longitudinal direction where a wiring electrode and a connection portion between the comb-like electrode and the plate electrode are disposed closely to each other. An excitation voltage supplied via the wiring electrode is applied to the connection portion so that signal power supply is performed. In addition, a received signal is obtained from the connection portion to the wiring electrode so that signal fetch is performed. The other end of each of the wiring electrodes is drawn as a wire connection portion to one position of the substrate and is connected to a signal process circuit via a flexible cable or the like that is attached to the wire connection portion.
The excitation voltage is applied to the transducers disposed at the upper end and the lower end portions so as to generate surface acoustic waves. The generated surface acoustic wave propagates on the substrate in a diagonal direction and is received by the transducer disposed at the right or the left end portion. When a finger, a pen or the like touches a point in the touch area, the surface acoustic wave is attenuated at the touched point. Therefore, the touched position can be detected by a signal process in accordance with the position where a level of the received signal is attenuated.
In the above-mentioned touch panel device, it is desirable to enlarge the touch area TE and reduce an area for transducers as much as possible. Especially, a small type touch panel device that is used for a PDA or the like is required to have a narrow bezel in which transducers and wiring electrodes are embedded for realizing a compact size of the PDA or the like.
The above-mentioned SPT structure of transducer, in which only one electrode is disposed on each surface of a piezoelectric thin film, has an advantage for reducing its width which corresponds to a width of a bezel portion, to an opposed electrode structure in which two electrodes are disposed on one surface. Therefore, the former has an advantage for reducing a width of a bezel to the latter.
However, wiring electrodes for supplying power to transducers are arranged along the outer rims of the transducers, so the portion for the wiring electrodes should be made in a small width as much as possible. However, in order to reduce the width of the wiring electrode, it is necessary to increase a height of the wiring electrode so as to maintain a cross-sectional area thereof for preventing increase of resistance thereof. It is not good to increase a thickness of the touch panel device for increasing a height of the wiring electrode.

Touch panel device and method for manufacturing touch panel devices