The objective optical system of the present invention includes a first diffraction structure that applies diffraction to the light fluxes of wavelength λ1, wavelength λ2 and wavelength λ3 so that the diffracted lights of the L-th order (L: odd number), M-th order (M: integer) and N-th order (N: integer) each will have the maximum diffraction efficiency, and a first optical path difference-generating structure that substantially provides a phase difference to or two of the light fluxes of wavelength λ1, wavelength λ2 and wavelength λ3.

1. Field of the Invention
The present invention relates to an objective optical system, optical pickup apparatus and optical information recording/reproducing apparatus.
2. Description of the Related Art
In recent years, in an optical pickup apparatus, there has been a growing tendency for adopting a short wavelength laser light source as a laser light source for reproducing the information recorded on an optical disk and for recording the information on an optical disk. For example, there have been efforts made for commercial use of a laser light source having a wavelength of 405 nm such as in a blue-violet semiconductor laser and blue-violet SHG laser for converting the wavelength of an infrared semiconductor laser using the second harmonic wave.
When employing an objective lens having the same numerical aperture (NA) as that of the DVD (Digital Versatile Disk), use of such a blue-violet laser light source allows recording the information of 15-20 GB on an optical disk having a diameter of 12 cm. When the numerical aperture (NA) of the objective lens is increased to 0.85, it permits recording the information of 23-25 GB on the optical disk having a diameter of 12 cm. In the following description of this specification, the optical disk and magnetic optical disk using a blue-violet laser light source will be collectively called the high-density optical disk.
Although, the appropriate recording/reproducing (recording and/or reproducing) of the information is said to be performed using such a high-density optical disk, the value of an optical disk player/recorder as a product cannot be said to be sufficient. In the following description, "recording/reproducing" refers to recording and/or reproducing.
Based on the fact that the DVDs (Digital Versatile Disc) and CDs (Compact Disk) recording a great variety of information are being marketed at present, the mere recording/reproducing of information using a high-density optical disk is not sufficient. For example, the capability of similarly appropriate recording/reproducing of information using the DVDs and CDs owned by a user amounts to raising of the product value of an optical disk player/recorder for a high-density optical disk. Against this backdrop, an optical pickup apparatus mounted on the optical disk player/recorder for a high-density optical disk is preferred to have performances of ensuring the appropriate recording/reproducing of information, while maintaining the compatibility among three types of optical disks—high-density optical disk, DVD and CD.
One of the methods for ensuring appropriate recording/reproducing of information while maintaining the compatibility among the high-density optical disk, DVD and CD is to provide the optical system for high-density optical disk and the optical system for DVD and CD separately so that switching will be made between these two systems in response to the recording density of the optical disk for recording/reproducing of information. This method, however, requires a plurality of optical systems. This is disadvantageous for reduction of physical size and production costs.
Thus, to simplify the configuration of the optical pickup apparatus and to reduce the cost, it is preferred in an optical pickup apparatus having compatibility to provide commonality between the optical system for high-density optical disk and optical system for DVD and CD, and to minimize the number of optical parts constituting the optical pickup apparatus. Simplification of the configuration of the optical pickup apparatus and cost cutting are enhanced by providing commonality of the objective optical system arranged opposite to the optical disk. To get the objective optical system that can be used in common for a plurality of the optical disks, having different wavelengths of light flux, to be used for recording/reproducing, it is necessary to form in an objective optical system a phase structure where spherical aberration depends on wavelength.
In this case, however, the wavelengths of the light flux used in each optical disk and the thicknesses of the protective substrate are different. This makes it difficult to form a satisfactorily aberration-corrected light condensed spot on the surface of the optical disk where information is recorded. Thus, the known art of correcting the aberration is to provide a diffraction structure on the optical surface of the objective lens that is a constituent element of the optical pickup apparatus. (For example, see Patent Document 1: Official Gazette of Japanese Patent Tokkai 2002-298422).
However, the art disclosed in Patent Document 1 for aberration correction is configured in such a structure that a diffraction structure is provided on one surface of the objective lens. It provides a sufficient spherical aberration correcting function for recording/reproducing using two types of the optical disks using different wavelengths and/or having different protective substrate thicknesses. However, the following problem must be solved before a sufficient compatibility is achieved among three types of optical disks.
The wavelengths of the light fluxes used in the high-density optical disk, DVD and CD are λ1=about 400 nm, λ2=about 655 nm and λ3=about 785 nm, respectively. Since λ1:λ3≈1:2, the ratio of the diffraction order providing the maximum diffraction efficiency is λ1:λ3=2:1 in the blazed diffraction structure. (For example, when the order of diffraction providing the maximum diffraction efficiency in relation to the light flux of λ1 is 6, the order of diffraction providing the maximum diffraction efficiency in relation to the light flux of λ3 is 3).
Further, the effect of diffraction is determined by the difference between the value of wavelength of a diffracted light times the diffraction order of the diffracted light and the value of wavelength of an other diffracted light times the diffraction order of the other diffracted light, and by the pitch of the diffraction. Therefore, the value, (λ1×2)−(λ3×1), is reduced when the ratio of the diffraction order of λ1 and λ3 is 2 to 1. Thus, when the diffraction structure is designed with the blazed wavelength as the value close to even number times the wavelength λ1, for example, then there will be a reduced mutual diffraction in the light flux of the wavelength λ1 and that of λ3. This will result in difficult compatibility between the high-density optical disk and CD.
To be more specific, even if the difference between the value of wavelength of a diffracted light times the diffraction order of the diffracted light and the value of wavelength of an other diffracted light times the diffraction order of the other diffracted light is small, it is theoretically possible to achieve compatibility by using a small diffraction. In this case, however, the pitch of the ring-shaped zones of the diffraction structure must be reduced. If the pitch of the ring-shaped zones of the diffraction structure is reduced, it will become difficult to fabricate an optical element such as a lens and there will be a reduction in the amount of the transmitted light of the fabricated optical element. Further, a large aberration will be caused by the variation of the wavelength within the minute range of several nanometers due to the variation in the laser light source output and others. Such problems will be left unsolved.

Objective optical system, optical pickup apparatus and optical information recording/reproducing apparatus with diffraction structure and optical path difference-generating structure


Embodiments of the invention address deficiencies of the art in respect to application sharing and provide a method, system and computer program product for user interface widget unit based application sharing. In a first embodiment, a data processing system for user interface widget unit based application sharing, can include a dynamic widget server communicatively linked to a dynamic widget browser. The dynamic widget browser can include program code enabled to render a user interface including one or more remote dynamic widgets peered to corresponding dynamic widgets for a dynamic view for an application launched by the dynamic widget server.

1. Field of the Invention
The present invention relates to the field of collaborative computing and more particularly to user interface sharing in a collaborative environment.
2. Description of the Related Art
The rapid development of the Internet has led to advanced modes of communication and collaboration. Using the Internet as a backbone, individuals worldwide can converge in cyberspace to share ideas, documents and images in a manner not previously possible through conventional telephony and video conferencing. To facilitate collaboration over the Internet, a substantial collection of technologies and protocols have been assembled to effectively deliver audio, video and data over the single data communications medium of the Internet. These technologies include instant messaging, Internet telephony and application sharing.
In conventional application sharing, an application host can distribute imagery of an application operating in the host to one or more application viewers distributed about the computer communications network. The imagery can include not only the screens rendered in association with the operation of the shared application, but also the visual presentation of mouse pointer movements and the like. Generally, speaking, however, the imagery can include only discrete "snap-shots" of the actual display of the operating application in the host system. In this way, the application viewers can be given the appearance of sharing an application, though each viewer merely views a shadow rendering of only a portion of the operation of the shared application.
Pixel based application sharing technology allows the capturing of a series of images which represent the display of an application. The images can be transmitted across the computer communications network, which when rendered, can provide the illusion of duplicating the display of the application in its host environment. Nevertheless, the underlying technology used to support application sharing in this manner includes substantial limitations in that an entire application user interface or complete desktop user interface must be shared. For example, pixel based solutions like virtual network computing (VNC) provide facilities to share only portions of a user interface. In VNC, the pixels of a screen region are captured and transmitted to a remote station. However, VNC provides mere coarse-grained control over the user interface to be shared, while the user interface gratuity is a screen region, which brings some substantial limitations.
More particularly, pixel-based screen sharing requires more network bandwidth, for example, the size of data representing a fifty (50) by thirty (30) button is approximately one kilobyte. Secondly, it is very hard for the pixel-based screen sharing to understand the content of the user interface to be shared to meet the requirements of advanced operations, for example, to re-arrange the layout of the user interface to be shared to fit the form factor of the remote station, or to remove some of the private information from the user interface before transmitting the information. In consequence, sharing an application in a heterogeneous environment, where the form factors of devices are diverse, network capability is widely different and people have their personal privacy concerns, becomes a great challenge for the traditional pixel-based application sharing technologies.

User interface widget unit sharing for application user interface distribution

International Business Machines Corporation


An illuminated sign or light box includes a face having face material forming a desired face design with at least a portion of the desired face design comprising a light transmitting, substantially non-diffusing window. At least one tubular fluorescent light bulb is positioned behind the face. A substantially specular reflector which serves as a mirror is positioned behind the fluorescent light bulb. The reflector has a predetermined shape and the fluorescent light bulb is positioned such that when the sign or light box is viewed by a viewer from a predetermined viewing region, the viewer either directly sees the fluorescent light bulb or directly sees a substantially specular reflection of the fluorescent light bulb through the light transmitting, substantially non-diffusing window portions of the sign face.

The present invention relates generally to illuminated signs and light boxes. More specifically the invention relates to a backlit illuminated sign which is easily changeable and is as bright or in many instances substantially brighter than neon, even in daylight. This provides a sign that is more flexible than neon and, most important, substantially less expensive to manufacture. Over the years, neon signs have remained a popular choice for window signs, point of purchase signs, and other promotional signs due to their ability to capture customers attention. Throughout this description, the industry accepted term neon is used as a generic term which includes all cold cathode luminous tubes regardless of the specific type of inert gas used to fill the tube. One of the reasons neon signs are so effective is that the luminous tube of the neon sign is typically viewed directly by the observer rather than having a light source located behind a diffusing sign face as is the case for conventional backlit signs. Because the observer is able to look directly at the light source of the neon sign, this type of sign is able to stand out in a wide variety of ambient lighting situations including direct sunlight. Also, neon provides a three dimensional aspect to a sign which is not possible using conventional backlit signs. This three dimensional aspect adds significantly to the appeal of neon signs. However, the typical neon sign has several major drawbacks.
Traditional neon signs are made using glass tubing which is bent by a skilled neon glass bender. This results in several of the major disadvantages of neon signs. First, the bending of the luminous tube which makes up the neon sign is a relatively expensive process due to the labor involved. It has proved to be very difficult to reduce this cost by automating the tube bending process. Second, since conventional neon signs are made up of custom bent luminous tubes, they are not easily changeable in situations where it is desirable to change the design of the face of the sign from time to time. If the design of the neon sign becomes outdated or if the message on the sign needs to be changed, an entirely new and expensive custom bent tube must be produced and the sign must be reassembled by a qualified neon sign servicer in order to make any changes. And third, luminous tubes are only available in certain colors and certain tube diameters. Because of this, the design of the neon sign is limited to these certain colors and limited to designs made up of lengths of these certain diameter bent tubes. This makes it difficult to reproduce design features such as large patches of evenly lighted areas or other design features that can not be reproduced using the linear characteristics of neon tubes.
Another disadvantage of typical neon signs is that they require relatively high voltages to light the neon tube. These high voltages associated with neon signs create more difficult safety concerns compared with other types of signs used to provide small portable signs which are often to be handled by sign owners rather than a qualified sign servicer. The high voltages of neon signs require the use of more expensive components for insulating and properly isolating the high voltages from potential contact with the general public and people handling the signs. Also, the more specialized construction of the neon sign necessitated by the high voltages makes it virtually impossible for the typical sign owner to safely and properly service their own sign. For example, a sign owner may be able to safely replace a burned out fluorescent bulb in a typical backlit sign, however, the owner would not typically be able to safely replace a neon tube in a neon sign.
Another problem with neon signs is that the glass tubing making up a neon sign is extremely fragile making it difficult to manufacture the sign at a central location and ship the sign to the final destination without suffering a significant amount of shipping damage. This problem of transporting neon signs further increases the costs of the sign. To overcome this problem, neon signs are often produced locally to avoid shipping. However, this prevents manufacturers from being able to achieve significant economies of scale.
Over the years, several different approaches have been proposed to overcome the above described problems associated with typical neon signs while still retaining the same attention grabbing characteristics associated with neon signs. U.S. Pat. No. 2,080,679, issued to Ellinn D. Vissing, apparently attempts to overcome the flexibility problems associated with neon signs. Specifically, Vissing describes a neon sign using a grid of zig zagged, parallel running luminous tubes (e.g. neon) which are used in combination with reflectors to backlight a changeable sign face. The sign face is coated with an opaque coating which may then be selectively erased to form a desired design on the face of the sign. This approach addresses the problem of changeability of the sign face but still requires a luminous tube to be bent into the zig zag shape resulting in an expensive sign due to the labor involved. Also, since a luminous tube is used, the sign is limited to the color or colors of the tubes selected for backlighting. Furthermore, the problems described above associated with the high voltage, the servicing of the sign, and the fragile nature of the luminous tube all still remain using this approach.
In another approach currently being utilized which was developed subsequent to the neon tube approach just described, curvilinear grooves having a desired sign face design are etched into two sheets of glass. These sheets of glass are laminated together with the etched grooves adjacent to one another forming a tubular opening within the resulting laminated sheets of glass. The tubular opening within the sheets of glass is vacuum pumped, filled with gas, and sealed in a manner similar to conventional luminous tubes to form the face of a neon sign. This approach allows the process of forming the sheets of glass to be automated using an etching machine to etch the two sheets of glass. Although this reduces the labor involved in forming the sign, this approach remains expensive due the high equipment and tooling costs. Furthermore, this approach still has the problems of not being easily changeable, being limited to certain colors and line shapes for design features, using high voltage, and the difficulties associated with servicing the sign as described above.
Presumably in an attempt to overcome some of the drawbacks described above, still another approach has been commercialized. This approach uses a completely different arrangement in an attempt to provide a sign with the visual impact of a neon sign. In this approach, a conventional fluorescent light bulb backlit sign light box is used. This light box backlights a sign face having an array of color tinted, light channeling pegs supported within the sign face to form a desired sign face design. The light channeling pegs are inserted through openings in the sign face with the back end of each peg exposed to the interior of the light box and the front end of each peg protruding through the front of the sign face. The back end of the light channeling pegs gather light from the light box and direct the light out through the front end of the pegs in a manner similar to fiber optic cable. This tends to give the viewer the impression that each peg is a small light bulb, LED, or other such light source. This approach uses standard fluorescent backlighting and results in a bright sign which therefore eliminates the problems associated with the high voltage used with neon signs. However, the process of inserting all of the required pegs necessary to form a desired sign face design is extremely labor intensive and therefore expensive, and the sign still has the problem of not being easily changeable. Also, this approach limits the sign face design to a design that can be formed using an array of pegs or dots and does not allow for continuous or linear features in the sign face design.
Other approaches using conventional fluorescent light bulb backlit signs have been used to attempt to simulate neon signs. Conventional fluorescent bulb backlit signs typically include one or more fluorescent light bulbs supported within the light box housing. The housing may include reflectors to help spread the light over the face of the sign. The interior of the housing and the reflectors are typically painted white to reflect the light and further aid in more evenly backlighting the sign face. The approaches using conventional fluorescent light bulb backlit signs to simulate neon signs typically include various sign faces coated with various coatings which are meant to fluoresce or glow in a manner similar to a luminous tube. Heretofore, these coatings have been light diffusing coatings since, prior to the present invention, viewing fluorescent light bulbs directly was generally taboo in the sign industry. These signs eliminate the high voltage problems associated with neon signs, provide for a relatively easily changeable sign face, and dramatically reduce the cost of the sign. However, because these coatings and the typical sign face associated with a conventional fluorescent light bulb backlit sign diffuse light, these approaches do not create the brightness and therefore the visual impact associated with directly viewed neon signs.
The present invention provides an arrangement for a fluorescent light bulb backlit sign that results in an illuminated sign which is capable of generally simulating the look of a neon sign and which provides a sign that is even brighter and more visually arresting than traditional neon signs. This sign arrangement provides an easily changeable sign face and allows complete flexibility in selecting colors, shapes, and other design features of the sign face. Because standard fluorescent light bulbs are used, this arrangement provides these advantages at a cost substantially less than that of a comparable neon sign. Also, by using standard fluorescent light bulbs, the servicing and safety problems associated with the high voltage used in neon signs are eliminated. Furthermore, since the fluorescent bulbs may be easily installed and replaced by the eventual sign owner, the fluorescent tubes may be removed from their sockets for shipping and properly packaged dramatically reducing the chances of shipping damage.


The present invention provides a resonance type micro-oscillating member capable of retraining a fluctuation of angular velocity, and specifically provides a micro-oscillating member, which is a nested micro-oscillating member, wherein there exist a reference oscillation mode which is the characteristic oscillation mode of a reference frequency, and an even numbered oscillation mode which is the characteristic oscillation mode of a frequency being approximate even number times the reference frequency.

1. Field of the Invention
The present invention relates to an optical deflector capable of being fabricated by techniques of micromechanics or the like.
2. Description of the Related Background Art
In recent years, development of a microactuator, using techniques of micromechanics has been energetically advanced. Electrostatic driving, piezoelectric driving, electromagnetic driving and the like can be employed as its driving means. A small-sized large-output (i.e., a relatively large deflection angle can be obtained by a relatively small electrical power) microactuator is increasingly required as demands for reduction in its cost, its application to mobile equipment, and the like increase. Particularly, an optical deflector for deflecting a movable mirror supported with a couple of torsion bars has been increasingly developed as a device capable of achieving a relatively simple optical sensor, an image forming apparatus, or the like.
As a method of driving the above-discussed movable mirror, Japanese Examined Patent Application Publication (KOKOKU) No. 60 (1985)-57051 proposes a method of deflecting or displacing a movable mirror 101 about a rotational axis (defined by a couple of torsion bars 104) by an electrostatic force acting between a couple of flat opposed electrodes 103 and the movable mirror 101, as illustrated in FIGS. 1A and 1B. Further, Japanese Patent Application Laid-Open (KOKAI) No. 4 (1992)-343318 proposes a method in which a pair of interdigitated comb electrodes 206 are formed on a movable mirror 201, another pair of interdigitated comb electrodes 207 are provided so as to mesh with the pair of interdigitated comb electrodes 206 with a gap therebetween, and the movable mirror 201 is deflected about a rotational axis (defined by a couple of torsion bars 204) by an electrostatic force acting between the two pairs of interdigitated comb electrodes 206 and 207, as illustrated in FIGS. 2A and 2B.
On the other hand, Japanese Examined Patent Application Publication (KOKOKU) No. 60 (1985)-57052 proposes a so-called moving coil method in which a coil 306 is provided on a movable mirror 301, plural permanent magnets 307 are disposed near the coil 306, and the movable mirror 301 is deflected about a rotational axis (defined by a couple of torsion bars 304) by a magnetic field generated by a current flow through the coil 306 and acting on the permanent magnets 307, as illustrated in FIGS. 3A and 3B. Further, Japanese Patent Application Laid-Open (KOKAI No. 6 (1994)-82711 proposes a so-called moving magnet method in which a permanent magnet 407 is provided on a movable mirror 401, a coil 406, is disposed near the magnet 407, and the movable mirror 401 is deflected about a rotational axis (defined by a couple of torsion bars 404) by a magnetic field generated by a current flow through the coil 406 and acting on the permanent magnet 407, as illustrated in FIGS. 4A and 4B.
Furthermore, Japanese Patent Application Laid-Open (KOKAI) No. 60(1985)-107017 proposes an actuator in which a deflector or a movable mirror, as discussed above, is provided in a rotatable manner about two rotational axes, as illustrated in FIG. 5. In the actuator, a movable mirror 501 is supported by a gimbal 505 (i.e., a movable substrate or frame) using a couple of torsion bars 504. The gimbal 505 is supported by a substrate using another couple of torsion bars 504, and the rotational axis of the movable mirror 501 is perpendicular to that of the gimbal 505. Movable portions (i.e., the movable mirror 501 and the gimbal 505) are driven by electrostatic forces from two pairs of flat opposed electrodes 503, respectively. There is also a disclosure that the movable portions can be driven by magnetic means. In such a structure, resonance frequencies of the movable mirror 501 and the gimbal 505 can be set to predetermined values, respectively, and a two-axis optical deflector capable of forming an image by raster scanning can be achieved.
In the event that the drives about two rotational axes are carried out in an electrostatic manner in the above-discussed actuator having a gimbal structure, two sets of electrodes are disposed for the drives about two rotational axes, respectively. Therefore, the problem of crosstalk between electric fields generated by the two sets of electrodes is likely to occur, irrespective of the type of the electrodes (i.e., flat opposed electrodes, interdigitated comb electrodes, or the like). Similarly, in the event that the drives about two rotational axes are carried out in an electromagnetic manner, two sets of permanent magnets and two sets of electromagnetic coils are disposed for the drives about two rotational axes, respectively. Accordingly, problems of restriction of arrangement of the magnets and crosstalk between magnetic fields generated by the two sets of permanent magnets and electromagnetic coils are likely to occur, irrespective of the type of the electromagnetic driving (i.e., the moving magnet type, the moving coil type, or the like).
Further, in a case where one drive is carried out in an electrostatic manner using the flat opposed electrode, one of power generated for driving the movable portion and the displacement amount of the movable portion must be restricted owing to a structural disadvantage of the flat opposed electrode. In other words, if an inter-electrode distance (a distance between the flat opposed electrodes) is enlarged to achieve a large displacement amount of the movable portion, a driving voltage for achieving a desired displacement angle of the movable portion must be unavoidably increased.


An engineered regenerative biostructure (erb) for implantation into a human body as a bone substitute, which includes an internal microstructure, mesostructure and/or macrostructure to provide improved bone in-growth, and methods for making the erb. Under one aspect of the invention, the biostructure has resorbable and nonresorbable regions. Under another aspect of the invention, the biostructure is constructed of hydroxyapatite, tricalcium phosphate and/or demineralized bone. Under yet another aspect of the invention, the porous biostructure is partially or fully infused with a resorbable, nonresorbable or dissolvable material.

1. Field of the Invention
This invention relates to engineered regenerative biostructures, and more particularly to porous bone augmentation articles with microporosity, mesoporosity and/or macrochannels and other osteoconductive features and other materials.
2. Description of the Related Art
It is currently of great interest to identify and exploit what features of implantable materials are conducive to in-growth of new bone. Bone response to grafting materials depends on a complex interaction between the chemical composition of the material, surface texture, pore size and porosity, implant geometry, and degradation products. Grafting alternatives have included: autogenous or autograft bone (bone harvested from another site within the patient); allografts (bone harvested from a cadaver); and a range of synthetic scaffolds materials. Synthetic scaffolds materials have included: coralline hydroxyapatite; mixtures of hydroxyapatite, tricalcium phosphate, and bovine collagen; human demineralized bone and glycerol; and calcium sulfate pellets. Such compounds are osteoconductive and in some cases resorbable.
Most of the literature on bone in-growth has taught that pore size should be at least 100 microns in order to promote bone in-growth. All of these products have limitations. Human-derived materials depend on availability of suitable donors. Within any given sample, naturally occurring materials and their derivatives have large variations in both porosity and permeability. Degradation products of some classes of material can activate inflammatory responses. Matching porosity and internal architecture to specific tissue response remains an unmet challenge.
PLA and PGA have been used in synthetic bone implants. PLA and PGA were less than ideal for tissue-engineered scaffolds for bone healing applications, especially in areas of low vasculature, where degradation products could not be quickly eliminated from the implant site. PLA and PGA released acidic degradation products, often causing newly formed bone in those areas to be resorbed. Further, microcrystalline particulate debris, created during the resorption/breakdown process, has been implicated in stimulating a significant inflammatory response, especially with long-term implants.
In other applications, hydroxyapatite (HA) has been used in either granular form or block form. Several challenges exist with using HA in this form. It has been difficult to shape blocks of HA. The particulate form of the material has been used to shape or conform to the geometry of a surgical site, thus eliminating the shaping problem, but. The particulates often migrate, resulting in voids and associated vulnerability to inflammation within the surgical site. Furthermore, fully dense HA has produced disappointing results in bone implants largely since it can only become fixed to the bone via surface attachment.

Method and apparatus for engineered regenerative biostructures such as hydroxyapatite substrates for bone healing applications


A memory cell has an access transistor and a capacitor with an electrode disposed within a deep trench. STI oxide covers at least a portion of the electrode, and a liner covers a remaining portion of the electrode. The liner may be a layer of nitride over a layer of oxide. Some of the STI may cover a portion of the liner. In a memory array a pass wordline may be isolated from the electrode by the STI oxide and the liner.

The transistor is a solid state semiconductor device which can be used for amplification, switching, voltage stabilization, signal modulation and many other functions. Generally, a transistor has three terminals, and a voltage applied to a specific one of the terminals controls current flowing between the other two terminals. One type of transistor is known as the field effect transistor (FET).
The terminals of a field effect transistor (FET) are commonly named source, gate and drain. In the FET, a small amount of voltage is applied to the gate (G) in order to control current flowing between the source (S) and drain (D). In FETs, the main current appears in a narrow conducting channel formed near (usually primarily under) the gate. This channel connects electrons from the source terminal to the drain terminal. The channel conductivity can be altered by varying the voltage applied to the gate terminal or by enlarging or constricting the conducting channel and thereby controlling the current flowing between the source and the drain.
FIG. 1A illustrates a FET 100 comprising a p-type substrate (or a p-well in the substrate), and two spaced-apart n-type diffusion areas—one of which will serve as the "source", the other of which will serve as the "drain" of the transistor.
The space between the two diffusion areas is called the "channel". The channel is where current flows, between the source (S) and the drain (D). A schematic symbol for an n-channel MOSFET appears to the left of FIG. 1A.
A thin dielectric layer is disposed on the substrate above the channel, and a "gate" structure (G) is disposed over the dielectric layer, thus also atop the channel. (The dielectric under the gate is also commonly referred to as "gate oxide" or "gate dielectric".)
Electrical connections (not shown) may be made to the source (S), the drain (D), and the gate (G). The substrate may be grounded or biased at a desired voltage depending on applications.
Generally, when there is no voltage applied to the gate, there is no electrical conduction (connection) between the source and the drain. As voltage (of the correct polarity, plus or minus) is applied to the gate, there is a "field effect" in the channel between the source and the drain, and current can flow between the source and the drain. This current flowing in the channel can be controlled by the voltage applied to the gate. In this manner, a small signal (gate voltage) can control a relatively large signal (current flow between the source and the drain).
The FET 100 is exemplary of a MOSFET (metal oxide semiconductor FET) transistor. With the specified "n" and "p" types shown above, an "n-channel MOSFET" can be formed. With opposite polarities (swapping "p" for "n" in the diffusions, and "n" for "p" in the substrate or well), a p-channel FET can be formed. In CMOS (complementary metal oxide semiconductor), both n-channel and p-channel MOS transistors are used, often paired with one another.
While particular n- and p-type dopants are described herein according to NMOS technology, it is to be appreciated that one or more aspects of the present invention are equally applicable to forming a PMOS (generally, simply by reversing the n- and p-type dopants).
An integrated circuit (IC) device may comprise many millions of FETs on a single semiconductor "chip" (or "die"), measuring only a few centimeters on each side. Several chips may be formed simultaneously, on a single "wafer", using conventional semiconductor fabrication processes including deposition, doping, photolithography, and etching.
U.S. Pat. No. 3,387,286 (IBM; 1968) discloses field effect transistor memory. The memory is formed of an array of memory cells controlled for reading and writing by word lines and bit lines which are connected to the cells. Each cell is formed using a single FET and a single capacitor. The gate electrode of the FET is connected to the word line, the source terminal is connected to the bitline, and the drain terminal is connected to one of the (two) electrodes of the capacitor. The other electrode of the capacitor is connected to a reference potential. Information is stored by charging the capacitor through the transistor, and information is read out by discharging the capacitor through the transistor. During a "write" operation, the wordline which is connected to the gate of the transistor is energized to render the transistor conductive between source and drain. If a "zero" is to be stored, the bitline is not energized and the capacitor is not charged. If a "one" is to be stored, the bitline is energized and the capacitor is charged to substantially the potential (voltage) of the bitline signal. During "read" operations, only the wordline is energized and a signal is transmitted to the bit lie if a "one" has been stored previously (the capacitor is charged). Since the charge on the capacitor leaks off, it is necessary to periodically regenerate the information stored in the memory.
Memory Array Architecture Generally
Dynamic random access memory (DRAM) is a type of random access memory that usually stores data as electrical charges in a capacitor structure associated with a transistor. Since capacitors leak charge (generally, a capacitor is only useful for temporarily storing an electrical charge), the information (data) eventually fades unless the capacitor charge is refreshed (read, and re-written) periodically, such as every 64 ms (milliseconds). DRAM is usually arranged in an array of one capacitor and transistor per "cell".
Memory arrays are well known, and comprise a plurality (many, including many millions) of memory cells organized (including physically arranged) in rows (usually represented in drawings as going across the page, horizontally, from left-to-right) and columns (usually represented in drawings as going up and down the page, from top-to-bottom).
FIG. 1B illustrates an array of DRAM cells (labeled "a" through "i") connected to a number of word lines (WL) and bit lines (BL). (Each DRAM cell is shown as comprising a FET and a capacitor.) For example, in the memory cell "e", the FET has its gate connected to WL(n), its source is connected to BL(n), and its drain connected to one terminal of a capacitor. The other terminal of the capacitor is connected to ground. The nine memory cells ("a" through "i") illustrated in FIG. 1B are exemplary of many millions of memory cells that may be resident on a single chip.
The gates of the FETs in memory cells "a", "b" and "c" are all connected to the same word line WL(n−1), the gates of the FETs in memory cells "d", "e" and "f" are all connected to the same word line WL(n), and the gates of the FETs in memory cells "g", "h" and "i" are all connected to the same word line WL(n+1). Thus, a voltage applied to a given word line (WL) can affect many memory cells—namely all the memory cells connected to that word line.
Similarly, the sources of the FETs in memory cells "a", "d" and "g" are all connected to the same bit line BL(n−1), the sources of the FETs in memory cells "b", "e" and "h" are all connected to the same bit line BL(n), and the sources of the FETs in memory cells "c", "f" and "i" are all connected to the same bit line BL(n+1). Thus, a voltage applied to a given bit line (BL) can affect many memory cells—namely all the memory cells connected to that word line.
DRAM (eDRAM)
Generally, the DRAM cells discussed herein comprise a capacitor formed in a deep trench (DT) in a substrate, and an "access transistor" formed on the surface of the substrate adjacent and atop the capacitor. The capacitor ("DT capacitor") generally comprises a first conductive electrode called the "buried plate" which is a heavily doped region of the substrate surrounding the trench, a thin layer of insulating material such as oxide lining the trench, and a second conductive electrode such as a heavily doped polycrystalline plug (or "node") disposed within the trench.
The transistor may comprise a FET having one of its source/drain (S/D) terminals connected to (or an extension of) the second electrode (node) of the capacitor.
In trench DRAM/eDRAM, the pass gate is desirably isolated from the underlying DT poly. In prior art the isolation is achieved by a thin shallow trench isolation (STI) oxide. However, thin STI oxide may be consumed before the pass gate is formed, leading to poor electrical isolation between the pass gate and DT poly. This is illustrated in FIGS. 2, 2A and 2B. In conventional memory arrays, the wordlines may serve as the gates of the cell (access) transistors.
FIG. 2 illustrates a DRAM cell 200 of the prior art, generally comprising an access transistor and an associated cell capacitor. Also shown is a wordline (WL), or "pass gate", passing over the DT capacitor. The DRAM cell is generally formed, as follows.
Beginning with a semiconductor substrate 202, a deep trench (DT) 210 is formed, extending into the substrate 202, from a top (as viewed) surface thereof. The substrate 202 may comprise a SOI substrate having a layer 204 of silicon (SOI) on top of an insulating layer 206 which is atop an underlying silicon substrate 208. The insulating layer 206 typically comprises buried oxide (BOX). The deep trench (DT) 210 is for forming the cell capacitor (or "DT capacitor"), as follows. The trench 210 may have a width of about 50 nm to 200 nm and a depth of 1000 nm to 10000 nm, by way of example.
The cell capacitor generally comprises a first conductor called the "buried plate" which is a heavily doped region 212 of the substrate surrounding the trench 210, a thin layer 214 of insulating material lining the trench 210, and a second conductor 216 such as a heavily doped polycrystalline plug (or "node", "DT poly") disposed within the trench 210. A cell transistor ("access transistor") 220 may comprise a FET having one of its source/drain (S/D) terminals connected to (or an extension of) the second conductor (node) of the capacitor, as follows.
The FET 220 comprises two spaced-apart diffusions, 222 and 224, within the surface of the substrate 202—one of which will serve as the "source" and the other of which will serve as the "drain" (D) of the transistor 220. The space between the two diffusion areas is called the "channel" (and is approximately where the legend "SOI" appears). A thin dielectric layer 226 is disposed on the substrate above the channel, and a "gate" structure (G) 228 is disposed over the dielectric layer 226, thus also atop the channel. (The dielectric under the gate is also commonly referred to as "gate oxide" or "gate dielectric".) The gate 228 may be a portion of an elongate wordline, referred to (for this memory cell) as the "active wordline" (Active WL).
Generally, a plurality of DRAM/eDRAM memory cells in a given row of a memory array may utilize a given wordline as the gates for their access transistors. And the source diffusions of the DRAM/eDRAM memory cells in a given column of a memory array may utilize a given bitline as the sources (S) for their access transistors.
In modern CMOS technology, shallow trench isolation (STI) is commonly used to isolate one (or more) transistors from other transistors, for both logic and memory. As shown in FIG. 2, a shallow trench 232 may be formed, surrounding the access transistor 220 (only one side of the transistor is shown). Note that the trench 232 extends over the DT (node) poly 216, a top portion of which is adjacent the drain (D) of the transistor 220. Therefore, the trench 232 is less deep (thinner) over the DT poly 216 and immediately adjacent the drain (D) of the transistor 220, and may be deeper (thicker) further from the drain (D) of the transistor 220 (and, as shown, over top portion of the DT poly 216 which is distal from (not immediately adjacent to) the drain (D) of the transistor 220.
The STI trench 232 may be filled with an insulating material, such as oxide (STI oxide) 234. Because of the thin/thick trench geometry which has been described, the STI oxide will exhibit a thin portion 234a where it is proximal (adjacent to) the drain (D) of the transistor 220, and a thicker portion where it is distal from (not immediately adjacent to) the drain (D) of the transistor 220. Were the STI to be too thick immediately adjacent to the drain (D) of the transistor 220, this would interfere with the ohmic contact between the drain (D) and the node poly 216.
As mentioned above, a plurality of memory cells may be associated with a given word line (WL). Furthermore, the wordline may form the gates of the access transistors of those memory cells. In this example, the transistor 220 of the memory cell 200 is associated with the "active" wordline, which forms its gate (G). Another wordline, for another plurality of memory cells is shown, and is labelled "Pass WL" 240. And, as can be seen, the Pass WL 240 passes over the STI 234, above the node poly 216. This can create problems as follows.
The dashed-line circled area in FIG. 2 is expanded upon (magnified) in FIGS. 2A and 2B. FIG. 2A illustrates good isolation when thin STI oxide 234a remains over DT poly 216. FIG. 2B illustrates poor isolation when thin STI oxide (234a) is consumed over DT poly 216.
Related Patents and Publications
U.S. Pat. No. 6,998,666 (IBM; 2006), incorporated in it entirety by reference herein, discloses nitrided STI liner oxide for reduced corner device impact on vertical device performance. A method of fabricating an integrated circuit device comprises etching a trench in a substrate and forming a dynamic random access memory (DRAM) cell having a storage capacitor at a lower end and an overlying vertical metal oxide semiconductor field effect transistor (MOSFET) comprising a gate conductor and a boron-doped channel. The method includes forming trenches adjacent the DRAM cell and a silicon-oxy-nitride isolation liner on either side of the DRAM cell, adjacent the gate conductor. Isolation regions are then formed in the trenches on either side of the DRAM cell. Thereafter, the DRAM cell, including the boron-containing channel region adjacent the gate conductor, is subjected to elevated temperatures by thermal processing, for example, forming a support device on the substrate adjacent the isolation regions. The nitride-containing isolation liner reduces segregation of the boron in the channel region, as compared to an essentially nitrogen-free oxide-containing isolation liner. See also Publication No. 2005/0151181.
US Patent Publication No. 2006/0231918 (Popp et al.; 2006), incorporated in its entirety by reference herein, discloses field effect transistor and method for the production thereof. A transistor is provided which advantageously utilizes a part of the area which, in conventional transistors, is provided for the isolation between the transistors. In this case, the channel width can be enlarged in a self-aligned manner without the risk of short circuits. The field-effect transistor according to the invention has the advantage that it is possible to ensure a significant increase in the effective channel width for the forward current ION compared with previously used, conventional transistor structures, without having to accept a reduction of the integration density that can be attained. Thus, by way of example, the forward current ION can be increased by up to 50%, without having to alter the arrangement of the active regions or of the trench isolation.
U.S. Pat. No. 6,960,781 (Currie et al.; 2005), incorporated in its entirety by reference herein, discloses a shallow trench isolation process. A structure including a transistor and a trench structure, with the trench structure inducing only a portion of the strain in a channel region of the transistor.
U.S. Pat. No. 6,744,089 (Wu; 2004) incorporated in its entirety by reference herein, discloses a self-aligned lateral-transistor DRAM cell structure in which a trench structure comprises a trench region and a trench-isolation region being formed in a side portion of the trench region and a self-aligned lateral-transistor structure comprises a merged common-source diffusion region, a self-aligned gate-stack region, and a self-aligned common-drain diffusion region being formed in another side portion of the trench region by using spacer-formation techniques. The unit cell size of the self-aligned lateral-transistor DRAM cell structure can be fabricated to be equal to 6 F2 or smaller. The self-aligned lateral-transistor DRAM cell structure is used to implement two contactless DRAM arrays for high-speed read and write operations.
U.S. Pat. No. 6,509,226 (IBM; 2003), incorporated in its entirety by reference herein, discloses process for protecting array top oxide. Processing of a DRAM device containing vertical MOSFET arrays proceeds through planarization of the array gate conductor (GC) polysilicon of the vertical MOSFET to the top surface of the top oxide. A thin polysilicon layer is deposited over the planarized surface and an active area (M) pad nitride and tetraethyl orthosilicate (TEOS) stack are deposited. The M mask is used to open the pad layer to the silicon surface, and shallow trench isolation (STI) etching is used to form isolation trenches. An active area (AA) oxidation is performed, and the isolation trenches are filled with high density plasma (HDP) oxide and planarized to the top surface of the AA pad nitride. Following isolation trench (IT) planarization, the AA pad nitride is stripped, with the thin silicon layer serving as an etch stop protecting the underlying top oxide. The etch support (ES) nitride liner is deposited, and the ES mask is patterned to open the support areas. The ES nitride, thin polysilicon layer and top oxide are etched from the exposed areas. A sacrificial oxidation is applied along with well implants, support gate oxidation and support gate polysilicon deposition. Using the etch array (EA) mask, the support gate polysilicon is opened in the array. The ES nitride is removed selective to the underlying silicon layer, protecting the top oxide. The gate stack is deposited and patterned and the process continues to completion.
Glossary
Unless otherwise noted, or as may be evident from the context of their usage, any terms, abbreviations, acronyms or scientific symbols and notations used herein are to be given their ordinary meaning in the technical discipline to which the invention most nearly pertains. The following terms, abbreviations and acronyms may be used throughout the descriptions presented herein and should generally be given the following meaning unless contradicted or elaborated upon by other descriptions set forth herein. Some of the terms set forth below may be registered trademarks (®)
Anisotropicliterally, one directional. An example of an anisotropic process issunbathing. Only surfaces of the body exposed to (facing in thedirection of) the sun become tanned. See isotropic.bitThe word "bit" is a shortening of the words "binary digit." A bitrefers to a digit in the binary numeral system (base 2). A given bit iseither a binary "1" or "0". For example, the number 1001011 is 7bits long. The unit is sometimes abbreviated to "b". Terms for largequantities of bits can be formed using the standard range of prefixes,such as kilobit (Kbit), megabit (Mbit) and gigabit (Gbit). A typicalunit of 8 bits is called a Byte.BLshort for bit line. The bit line is a conductor connected to at least oneof the source or drain terminals of a memory cell transistor. InDRAM, the bitline is typically connected to the source of thetransistor, and the drain is connected to one of the electrodes of thememory cell capacitor.CapacitorA capacitor is a two-terminal device (electrical or electroniccomponent) that can store energy in the electric field between a pairof conductive electrodes (called "plates"). The process of storingenergy in the capacitor is known as "charging", and involves electriccharges of equal magnitude, but opposite polarity, building up oneach plate.Cell Well(CW) the cell well is an area in the silicon substrate that is preparedfor functioning as a transistor or memory cell device by doping withan electron acceptor material such as boron or indium (p, electronacceptors or holes) or with an electron donor material such asphosphorous or arsenic (n, electron donors). The depth of a cellwell is defined by the depth of the dopant distribution.CMOSshort for complementary metal oxide semiconductor. CMOSconsists of n-channel and p-channel MOS transistors. Due to verylow power consumption and dissipation as well as minimization ofthe current in "off" state, CMOS is a very effective deviceconfiguration for implementation of digital functions. CMOS is akey device in state-of-the-art silicon microelectronics.CMOS Inverter: A pair of two complementary transistors (ap-channel and an n-channel) with the source of the n-channeltransistor connected to the drain of the p-channel transistor, and thegates connected to each other. The output (drain of the p-channeltransistor) is high whenever the input (gate) is low and the other wayround. The CMOS inverter is the basic building block of CMOSdigital circuits.NMOS: n-channel CMOS.PMOS: p-channel CMOS.CMPshort for chemical-mechanical polishing. CMP is a process, usingboth chemicals and abrasives, comparable to lapping (analogous tosanding), for removing material from a built up structure. Forexample, after depositing and etching a number of elements, the topsurface of the resulting structure may very uneven, needing to besmoothed (or levelled) out, prior to performing a subsequentprocess step. Generally, CMP will level out the high spots, leavinga relatively smooth planar surface.CVDshort for chemical vapor deposition. CVD is a chemical processused to produce high-purity, high-performance solid materials. Theprocess is often used in the semiconductor industry to produce thinfilms. In a typical CVD process, the wafer (substrate) is exposed toone or more volatile precursors, which react and/or decompose onthe substrate surface to produce the desired deposit. CVD is used todeposit materials in various forms, including: monocrystalline,polycrystalline, amorphous, and epitaxial. These materials include:silicon, oxide, nitride and metals, such as are commonly used insemiconductor fabrication.depositionDeposition generally refers to the process of applying a materialover another material (or the substrate). Chemical vapor deposition(CVD) is a common technique for depositing materials. Other"deposition" techniques, such as for applying resist or glass, mayinclude "spin-on", which generally involves providing a stream ofmaterial to the substrate, while the substrate is spinning, resulting ina relatively thin, flat, evenly-distributed coating of the material onthe underlying substrate.Dopantelement introduced into semiconductor to establish either p-type(acceptors) or n-type (donors) conductivity; common dopants insilicon: p-type, boron, B, Indium, In; n-type phosphorous, P,arsenic, As, antimony, Sb. Dopants are of two types - "donors" and"acceptors". N type implants are donors and P type are acceptors.dopingdoping is the process of introducing impurities (dopants) into thesemiconductor substrate, or elements formed on the semiconductorsubstrate, and is often performed with a mask (or previously-formedelements in place) so that only certain areas of the substrate will bedoped. For example, doping is used to form the source and drainregions of an FET. An ion implanter is typically employed for theactual implantation. An inert carrier gas such as nitrogen is usuallyused to bring in the impurity source (dopant).Usually in doping, a dopant, a dosage and an energy levelare specified and/or a resulting doping level may be specified. Adosage may be specified in the number of atoms per cm2 and anenergy level (specified in keV, kilo-electron-volts), resulting in adoping level (concentration in the substrate) of a number of atomsper cm3. The number of atoms is commonly specified inexponential notation, where a number like "3E15" means 3 times 10to the 15th power, or a "3" followed by 15 zeroes(3,000,000,000,000,000). To put things in perspective, there areabout 1E23 (100,000,000,000,000,000,000,000) atoms of hydrogenand oxygen in a cubic centimeter (cm3) of water.An example of doping is implanting with B (boron) with adosage of between about 1E12 and 1E13 atoms/cm2, and an energyof about 40 to 80 keV to produce a doping level of between 1E17and 1E18 atoms/cm3. ("/cm3" may also be written "cm−3")DRAMshort for dynamic random access memory. DRAM is a type ofrandom access memory that stores each bit of data in a separatecapacitor within an integrated circuit. Since real capacitors leakcharge, the information eventually fades unless the capacitor chargeis refreshed periodically. Because of this refresh requirement, it is adynamic memory as opposed to SRAM and other static memory. Itsadvantage over SRAM is its structural simplicity: only onetransistor and a capacitor are required per bit, compared to sixtransistors in SRAM. This allows DRAM to reach very highdensity. Like SRAM, it is in the class of volatile memory devices,since it loses its data when the power supply is removed.eDRAMshort for embedded DRAM. eDRAM is a capacitor-based dynamicrandom access memory usually integrated on the same die or in thesame package as the main ASIC or processor, as opposed to externalDRAM modules and transistor-based SRAM typically used forcaches.etchingetching generally refers to the removal of material from a substrate(or structures formed on the substrate), and is often performed witha mask in place so that material may selectively be removed fromcertain areas of the substrate, while leaving the material unaffected,in other areas of the substrate. There are generally two categories ofetching, (i) wet etch and (ii) dry etch.Wet etch is performed with a solvent (such as an acid)which may be chosen for its ability to selectively dissolve a givenmaterial (such as oxide), while leaving another material (such aspolysilicon) relatively intact. This ability to selectively etch givenmaterials is fundamental to many semiconductor fabricationprocesses. A wet etch will generally etch a homogeneous material(e.g., oxide) isotropically, but a wet etch may also etchsingle-crystal materials (e.g. silicon wafers) anisotropically.Dry etch may be performed using a plasma. Plasmasystems can operate in several modes by adjusting the parameters ofthe plasma. Ordinary plasma etching produces energetic freeradicals, neutrally charged, that react at the surface of the wafer.Since neutral particles attack the wafer from all angles, this processis isotropic. Ion milling, or sputter etching, bombards the waferwith energetic ions of noble gases which approach the waferapproximately from one direction, and therefore this process ishighly anisotropic. Reactive-ion etching (RIE) operates underconditions intermediate between sputter and plasma etching andmay be used to produce deep, narrow features, such as STI trenches.FETshort for field effect transistor. The FET is a transistor that relies onan electric field to control the shape and hence the conductivity ofa "channel" in a semiconductor material. FETs are sometimes usedas voltage-controlled resistors. The terminals of FETs aredesignated source (S), drain (D) and gate (G).isotropicliterally, identical in all directions. An example of an isotropicprocess is dissolving a tablet in water. All exposed surfaces of thetablet are uniformly acted upon. (see "anisotropic")lithographyIn lithography (or "photolithography"), a radiation sensitive "resist"coating is formed over one or more layers which are to be treated insome manner, such as to be selectively doped and/or to have apattern transferred thereto. The resist, which is sometimes referredto as a photoresist, is itself first patterned by exposing it to radiation,where the radiation (selectively) passes through an interveningmask or template containing the pattern. As a result, the exposed orunexposed areas of the resist coating become more or less soluble,depending on the type of photoresist used. A developer is then usedto remove the more soluble areas of the resist leaving a patternedresist. The pattered resist can then serve as a mask for theunderlying layers which can then be selectively treated, such as toreceive dopants and/or to undergo etching, for example.maskThe term "mask" may be given to a layer of material which isapplied over an underlying layer of material, and patterned to haveopenings, so that the underlying layer can be processed where thereare openings. After processing the underlying layer, the mask maybe removed. Common masking materials are photoresist (resist) andnitride. Nitride is usually considered to be a "hard mask".metallizationMetallization refers to formation of metal contacts and interconnectsin the manufacturing of semiconductor devices. This generallyoccurs after the devices are completely formed, and ready to beconnected with one another. A first level or layer of metallization isusually referred to as "M1".MOSshort for metal oxide semiconductor.MOSFETshort for metal oxide semiconductor field-effect transistor.MOSFET is by far the most common field-effect transistor in bothdigital and analog circuits. The MOSFET is composed of a channelof n-type or p-type semiconductor material, and is accordinglycalled an NMOSFET or a PMOSFET. (The 'metal' in the name is ananachronism from early chips where gates were metal; modernchips use polysilicon gates, but are still called MOSFETs).nitridecommonly used to refer to silicon nitride (chemical formula Si3N4).A dielectric material commonly used in integrated circuitmanufacturing. Forms an excellent mask (barrier) against oxidationof silicon (Si). Nitride is commonly used as a hard mask (HM).n-typesemiconductor in which concentration of electrons is higher than theconcentration of "holes". See p-type.oxidecommonly used to refer to silicon dioxide (SiO2). Also known assilica. SiO2 is the most common insulator in semiconductor devicetechnology, particularly in silicon MOS/CMOS where it is used asa gate dielectric (gate oxide); high quality films are obtained bythermal oxidation of silicon. Thermal SiO2 forms a smooth,low-defect interface with Si, and can be also readily deposited byCVD. Oxide may also be used to fill STI trenches, form spacerstructures, and as an inter-level dielectric, for example.plasma etchingPlasma etching refers to dry etching in which semiconductor waferis immersed in plasma containing etching species; chemical etchingreaction is taking place at the same rate in any direction, i.e. etchingis isotropic; can be very selective; used in those applications inwhich directionality (anisotropy) of etching in not required, e.g. inresist stripping.polyshort for polycrystalline silicon (Si). Heavily doped poly Si iscommonly used as a gate contact in silicon MOS and CMOSdevices.p-typesemiconductor in which concentration of "holes" is higher than theconcentration of electrons. See n-type. Examples of p-type siliconinclude silicon doped (enhanced) with boron (B), Indium (In) andthe like.resistshort for photoresist. also abbreviated "PR". Photoresist is oftenused as a masking material in photolithographic processes toreproduce either a positive or a negative image on a structure, priorto etching (removal of material which is not masked). PR is usuallywashed off after having served its purpose as a masking material.RIEshort for Reactive Ion Etching. RIE is a variation of plasma etchingin which during etching, the semiconductor wafer is placed on anRF powered electrode. The plasma is generated under low pressure(vacuum) by an electromagnetic field. It uses chemically reactiveplasma to remove material deposited on wafers. High-energy ionsfrom the plasma attack the wafer surface and react with it. The wafertakes on potential which accelerates etching species extracted fromplasma toward the etched surface. A chemical etching reaction ispreferentially taking place in the direction normal to the surface - inother words, etching is more anisotropic than in plasma etching butis less selective. RIE typically leaves the etched surface damaged.RIE is the most common etching mode in semiconductormanufacturing.SiSilicon, a semiconductor.SOIshort for silicon-on-insulator. Silicon on insulator (SOI) technologyrefers to the use of a layered silicon-insulator-silicon substrate inplace of a conventional silicon substrate in semiconductormanufacturing, especially microelectronics. SOI-based devicesdiffer from conventional silicon-built devices in that the siliconjunction is above an electrical insulator, typically silicon dioxide or(less commonly) sapphire.STIshort for shallow trench isolation. Generally, a trench etched intothe substrate and filled with an insulating material such as oxide, toisolate one region of the substrate from an adjacent region of thesubstrate. One or more transistors of a given polarity may bedisposed within an area isolated by STI.substratetypically a wafer, of semiconductor material such as silicon,germanium, silicon germanium, silicon carbide, and thoseconsisting essentially of III-V compound semiconductors such asGaAs, II-VI compound semiconductors such as ZnSe. A substratemay also comprise an organic semiconductor or a layeredsemiconductor such as, for example, Si/SiGe, a silicon-on-insulatoror a SiGe-on-insulator. A portion or entire semiconductor substratemay be amorphous, polycrystalline, or monocrystalline. In additionto the aforementioned types of semiconductor substrates, thesemiconductor substrate employed in the present invention mayalso comprise a hybrid oriented (HOT) semiconductor substrate inwhich the HOT substrate has surface regions of differentcrystallographic orientation. The semiconductor substrate may bedoped, undoped or contain doped regions and undoped regionstherein. The semiconductor substrate may contain regions with orwithout strain therein, or contain regions of tensile strain andcompressive strain. A substrate is often covered by an oxide layer(sometimes referred to as a "pad oxide layer"). Pad oxide is usuallyrelatively thin, e.g., in the range of about 50 to about 500 Angstroms(5-50 nm), and can be formed, for example, by thermal oxidation ofthe substrate. Pad oxide may also be prepared by other methods. Forexample, silicon dioxide or reactive precursors like silane could bedeposited by chemical vapor deposition (CVD). A nitride layer(sometimes referred to as a "pad nitride layer") may be formed toprotect the pad oxide and the underlying substrate during variousprocessing steps. It usually has a thickness in the range of about 100Angstroms to about 6000 Angstroms (10-600 nm), such as in therange of about 1500 Angstroms to about 3000 Angstroms(150-300 nm). Conventional means can be used to apply the padnitride, such as chemical vapor deposition (CVD).TransistorA transistor is a semiconductor device, commonly used as anamplifier or an electrically controlled switch. The transistor is thefundamental building block of the circuitry in computers, cellularphones, and all other modern electronic devices. Because of its fastresponse and accuracy, the transistor is used in a wide variety ofdigital and analog functions, including amplification, switching,voltage regulation, signal modulation, and oscillators. Transistorsmay be packaged individually or as part of an integrated circuit,some with over a billion transistors in a very small area. See FETUnits of LengthVarious units of length may be used herein, as follows:meter (m)A meter is the SI unit of length, slightly longer than a yard.1 meter = ~39 inches. 1 kilometer(km) = 1000 meters = ~0.6 miles.1,000,000 microns = 1 meter. 1,000 millimeters (mm) = 1meter.100 centimeters (cm) = 1 meter.micron (μm)one millionth of a meter (0.000001 meter); also referred toas a micrometer.mil1/1000 or 0.001 of an inch; 1 mil = 25.4 microns.nanometer (nm)one billionth of a meter (0.000000001 meter).Angstrom ({acute over (Å)})one tenth of a billionth of a meter. 10 {acute over (Å)} = 1 nm.Vshort for voltage. Different voltages may be applied to differentparts of a transistor or memory cell to control its operation, such as:Vbshort for bulk (or substrate) voltageVdshort for drain voltageVgshort for gate voltageVnshort for node voltageVplshort for plate voltageVsshort for source voltageVtshort for threshold voltageSee also KeVwaferIn microelectronics, a wafer is a thin slice of semiconductingmaterial, such as a silicon crystal, upon which microcircuits areconstructed. There are multiple orientation planes in the siliconcrystal that can be used. The planes are defined by the "MillerIndices" methodology. Common orientations classified by the"Miller indices" are (100), (011), (110), and (111).

Providing isolation for wordline passing over deep trench capacitor


A method is provided to automatically select the correct order of backups from selected DUMP files in order to recover and rebuild a complete database in reduced time without requiring the user to search, find and select the correct order of items for the backup.

In the operation of computer systems and networks, the computer data is often "backed-up", that is to say, it is copied to a storage medium other than the central computer's storage disk in order to permit the recovery of the data as the data existed at some point in time. This is done for purposes of diagnosis in the event of system failure or inadvertent loss of data.
It is often a standard practice to automatically back-up data on a daily or other periodic basis and store this data on tape or disk.
There are several ways to back-up data for diagnostic and recovery purposes. One way is considered as (i) physical level back-up. The physical level back-up refers to the data as it is stored at specific locations on some physical media, such as a host computer disk.
Another way is (ii) designated logical level back-up. This refers to the data as seen by the user application programs in files or in database tables. Normally, the operating system of the computer will include a file system that does mapping between the physical level and the logical level. On doing the physical level back-up, this would involve making a raw copy from a computer disk to some other storage medium without going through the file system or some other physical to logical interpreter module. Then on the other hand, the back-up using the logical level would involve using such a thing as an interpreter module or some sort of a file system while doing back-up of physical to logical mapping.
A Database Management System consists of a set of tools used to develop and manage a database. The present system utilizes a DMSII which is a Database Management System available on the Unisys Corporation's ClearPath HMP NX, and the Unisys A-Series systems. A background for the Unisys DMSII systems is available in a publication of the Unisys Corporation, Document 8807 6625 000, entitled "Getting Started With DMSII" and published in September, 1997 by the Unisys Corporation. The DMSII Utilities provide database back-up and recovery capability for the entire database or for partial databases. The background operations of the DMSII utility enhancements are published in a Unisys Corporation publication Document 98037/4 and entitled "DMSII Utility Enhancements" published on Mar. 31, 1999.
Database back-ups can be accomplished for "on-line" and "off-line" bases. The on-line back-up will allow users to update data in the database, whereas the off-line back-up disallows all updates to the database. The back-ups can be done to either tapes or disks or any combination of both types of such media.
Database Management Systems are used by many large and small businesses such as airline reservation systems, financial institutions, retail chains, insurance companies, utility companies and government agencies. The present Database Management System (DMS) in its form as DMSII is used to build database structures for items of data according to some appropriate logical model, such as relational, hierarchical, or network. Further, the Database Management System is used to manage the database structures and keep the structures in some stable order while various application programs may be retrieving or changing the data. The present embodiment of DMSII has a data definition language designated as Data And Structure Definition Language (DASDL).
There are various tasks that are performed in database management and these involve (i) monitoring and optimizing database performance; (ii) the use of database control for monitoring multi-program database access; (iii) the function of the data integrity and safety done by integrity checking and preventing access to the same data by multiple applications occurring at the same time; (iv) the function of defining data structures and the data fields within them, including the function of modifying data structures; (v) data access operations and developing an application program to retrieve data or to change data; (vi) the function of data shareability to provide multi-program access without conflicts and provide database definitions to the application program; (vii) in database and data security, to prevent unauthorized database access; (viii) ensuring independence of application programs from certain data changes and preventing the revision of application programs every time a structure changes; (ix) in database and data recovery, performing the resumption of database operations after an interruption; (x) tracking data changes by keeping a record of every change made to the data; (xi) for data change integrity, ensuring that update changes are applied to, or removed from, the database in their entirety; (xii) providing a recent copy of the database as a reserve by backing-up the database and storing copies of audit files and all other database files; (xiii) providing for database scalability by growing or shrinking the database according to the ongoing needs at the time.
The DMSII provides standard software files that perform services and operations for all the databases connected to the system's Enterprise Server. This enables a viewing of a list of all these files on the user terminal.
In the ordinary course of operations, the application program user will submit changes to data or retrieve data while running a particular application program. Then, changes can be made which add, modify and delete data. A Database Administrator (DBA) keeps the database running smoothly and enforces the rules for data integrity and security. Users access the database through a given application program which itself does not access the data directly. Instead, the program interacts with the DMSII software and the database tailored software, which is directed by the access routines of the Data Management System to provide accesses, retrievals and the storage of data in the physical database file.
In regard to access, an application user will access the data in order to (i) make an inquiry to get a Read of data in the database, or (ii) to provide an update by doing a Write to the database thus, adding, deleting or changing data. The access for either purpose contributes to an operation on the database which is called a "transaction".
A transaction is a sequence of operations grouped by a user program because the operations constitute a single logical change to the database, At the end and finality of the transaction point, the transaction is complete and without error, and it is considered as being committed to the database.
Actual real world data goes into special logical structures that are used by the Data Management System to store data. The database is designed to map categories of data into suitable structures. For example, the real world data would have a character with a structure called a "data set". An example of this would be a particular persons name. Then, real world data that can serve as an index of a whole data set has a structured name called a "set". This, for example, might be the social security number of any employee. Then there is data that can serve as an index of a data set under a certain condition, and this is called a "subset". This might be an employee's work number, for example. Then, there is data about each instance of a particular category. The structure name for this is "data item". An example of this might be the name and address of the category (person). Then, there is data related to the database as a whole, and this involves a structure called "global data item". An example of this might be the total number of employees in a company. Once there has been identification of the real-world data which is to be stored in the database, it is then necessary to define that data in relationship to the data structures of the data management system that holds data. When this data is defined within "structures", then the data management system and the system software programs an application program that can then understand how to make this data accessible for various inquiries and/or changes. This is done with the Data and Structure Definition Language (DASDL).
The Data Management System structures are the building Steps of the Data Management System database. Here, the "data set" has the purpose of storing data pertaining to a data category in a collection of records. A "set" has the purpose of indexing all records in a data set. A "subset" serves the purpose to index some records in a data set according to some given criteria. The "data item" is a structured name which defines a unit of information about a category in a given field (column) of a data set record. A "global data item" serves the purpose of storing a unit of information about the entire database or any of its involved structures. In general discussion about the types of data and the names of data structures, it is often seen that in a relational database, a "data set" is called a "table". A "set" or "subset" is frequently called an "index". A "data item" is often called a "field" or a "column", or is often called by its data name, for example, a project number. "Structures" are made of common file components designated as records and fields.
A record is a group of logically-related data items in a file. Often, a record is called a row. Data items reside in different fields in the records. For example, a record might involve a series of data such as an employee's name, the employee's I.D., the employee's social security number and years of employment. A group of such records would constitute a file.
The operating system which uses the data management system will treat the record as a unit. The system makes data available to users in records and not in individual single items of data. In programming languages, the record is the unit of data that the system reads from or writes to a file in one execution cycle of a Read or Write statement in a program.
If the application program wants to change a data item in a given record, the Data Management System brings a copy of the record from the physical storage over to memory, then enables that data item to be changed, and then writes the changed record back to the file.
A "field" is a consecutive group of bits or bytes within a particular component of a record which will represent a logical piece of data. A field or column is defined by the description of the data item it is to hold. For example, if one field carries the name of an employee, this field in the record could be called the name field.
The "data set" is a physical file, that is to say, a collection of related data records stored on a random-access storage device, such as a disk in which the data resides.
A data set is kept up-to-date in several ways: (i) here, application programs add, change, or delete individual pieces of data or records stored in the data set; (ii) the Database Administrator (DBA) maintains the structure of the data set by keeping the data set within certain maximized limits, by adding, deleting or changing the definition of a data item, creating new sets or subsets, monitoring automatic processes that guard data integrity and creating guard files to enhance the security of the data.
A "set" is a separate stored file that indexes all the records of a single data set. The Data Management System uses sets in order to locate records in a data set. A set has no meaning apart from its related data set. The set structure enables an application program to access all records of a data set in some logical sequence.
A "subset" can be considered identical to a set, except that the subset need not contain a record for every record of the data set. A subset is a file that indexes none, one, several, or all of the records in a data set. The subset structure enables an application program to access only records of a data set that meet a particularly required condition.
For example, an application program may compile a list of people who are "managers". Thus, it is seen that the database designer created the "manager" subset. Thus, in order to retrieve a record of managers, the data management system can use the smaller file, that is, the subset, to quickly point to the corresponding records in the larger file which is the data set. As with the set, the subset must also be kept up-to-date.
A "data item" is an element of data. In the Data Management System, a data item can also be the field (column) in the database record. For example, the social security number could be considered as a data item in the sample data set designated "person". The purpose of the data item is to describe the data to be stored. The data item provides the identity—type, size, location, and attributes—of one element of data for a database entity. When an application submits an update to a data item, the Data Management System will accept the update if it corresponds to the definition of a data item. Otherwise, the change is rejected and reported as an exception. The Database Administrator will add, delete or change the data item definitions. There are a number of data items that are used by the Data Management System. These include the type called "alpha-numeric" which include words and characters, names, addresses, dates and titles. Then, there are data items designated as "numeric" which involve integers and decimals with or without signs. Then, there are data items designated as "real" which involve single precision floating point numbers that occupy one word. An example of this would be, for example, an employee's salary. Then, there are data items which are called "Boolean" which involve TRUE and FALSE values.
The "global data item" is a data item, a group item, or a population item that is not part of any data set but still pertains to the database as a whole. Such global data items are stored in one special record called the "global record" in the DASDL declaration which is outside the structured definitions. Sometimes the global record is placed just before the structured definitions in the DASDL file. The global data item has the purpose of holding permanent information about the database as a whole or about a particular data set. It also acts as a place holder for information that can be derived from the database.
One of the most significant options in DASDL (Data And Structure Definition Language) is that it is possible to define the database as to whether the database is to be audited. The data management system supports both logging changes to a database (auditing the database) or not logging changes (maintaining an unaudited database). There are advantages in auditing a database since this assures the user that if a database failure occurs, there will be a record of database changes with which one can restore the database to a completely integral state and thus avoid loss of information and corruption of information.
The "audit trail" is a log of changes made to the database. This type of audit trail is somewhat similar to the SUMLOG in the host system which is the history of all system activity except for the fact that the audit trail will record the database update activity only and will consist of separate numbered files. Thus the data management system software can use an audit trail to recover the database from an unusable state, provide restart information to user programs, reconstruct portions of the database that had been lost because of hardware errors, back out aborted transactions and roll back the entire database to a user specified point or rebuild the entire database to a user-specified point.
The "audit file" provides a chronological history of all update database transactions. The audit file is a numbered segment of the database audit trail where the data management system assigns each audit file to have an audit file number (AFN) in the range of 1 to 9999.
Access Routines Program: The data management system controls access to database data with a software program called Access Routines which is a collection of specialized routines that enables many users to access the database all at the same time and ensures that the access is controlled so that accesses do not conflict with one another.Control File: Each active data management system database has a control file. The control file contains the time stamps for the database software and files and the access routines since the access routines use time stamps to check the validity of data. A control file also contains the update levels of the database and the structures since the access routines use update levels to check the validity of data. Further, the control file functions to store audit control information, dynamic database parameters plus other information. It further guards the database from interruption while a process that needs exclusive access to the database goes on to complete its task successfully, such as, for example, a halt/load recovery and/or a reorganization. The control file assures that a database that has been interrupted for any reason is not accessed until the integrity of the database is further guaranteed by the successful completion of the recovery process.I/O Operation: An I/O (Input/Output) operation is one in which the system reads data from or writes data to a file on a peripheral device, such as a disk drive. When there is a failure of a read or a write operation, then this is considered to be an I/O error, which must be handled.Backup: The most important preventive maintenance task which can be performed for a database is to back up the database frequently and to keep the backups for some period of time. To "back up" the database, means to use the data management system DMUTILITY program to make a copy of all or part of the database. It should be noted that "back-up" is not the same as recovery. Recovery is the process that uses the backups to restore the database from some sort of failure. This backup will include a check of the physical integrity of all the database's structures being backed up. A complete database includes providing a reserve copy of all the files pertaining to the database. All the files include not only the database files and the control files (which may change from time to time) but also the DASDL source file, the description file, various tailored files, application programs, and audit files. This enables a user to put the database back in operation quickly in case the current database files should become unavailable or damaged.
Here there is involved the concept of "DUMP." A DUMP involves either a copy of stored data in which a change has been made since the previous DUMP of that data or a transfer of all or part of the contents of one section of computer storage to another section or to some other output device. The processes used to make a database are called "backing up" and "Dumping." A backup to tape is called a "Tape DUMP" while a backup to disk is called a "Disk DUMP."
Often the backing up operation for the database is done by increments. An increment is one of the series of regular consecutive additions, for example, if a database is too large to back up on a daily basis, the operator could create a schedule that backed up a certain number of database files (an increment) each day until the entire database was backed up.
The dump of a database is done to tape or disk depending on what type of storage resources are available. Tapes are most frequently used since they are the less expensive resource than disk. When dumping is done to tape, it is necessary to furnish information common to any disk-to-tape process and this information would include the tape name, the cycle number, the version number, workers, the serial number, compression and non-compression, the density, and the SCRATCHPOOL option.
However, when dumping to disk, it is only necessary to specify the file title for the entire dump and the number of DUMP files into which the system should place the DUMP.
One related art method to which the method of the present invention generally relates is described in U.S. Pat. No. 6,411,969 entitled "Enhanced System And Method For Management Of System Database Utilities". This related art method is an enhanced method for developing back-up copies of a source database by providing incremental and accumulate dump commands from various multiple-Users which enable a selection of certain files which are identified independently of time-factor for dumping selectively either onto a separate destination medium of disk or tape. A User can determine the block size of words for blocks of data files to be dumped onto the destination medium, thus significantly reducing the number of I/O operations required.
The present invention differs from the above prior cited art in that the prior invention, focuses on methods that create the incremental and accumulated backups. The method of the present invention differs in that it teaches methods to identify and provide full, incremental and accumulated backups to the database recovery process. The methods taught by the method of the present invention provide optimization of recovery process that is not provided by the prior related art patent.
Another related art method to which the method of the present invention generally relates is described in U.S. Pat. No. 5,974,425 entitled "Method And Apparatus For Reapplying Changes To A Database". This related art method is a method and apparatus for reapplying changes to a database uses a recovery log for recording all changes applied to the database so that the changes may be reapplied to the database during database recovery. Whenever a change is written to a storage device, the recovery log is updated to indicate that the particular change has been written to the storage device. During recovery, the data in the recovery log is sorted by file ID, data block ID, record type and version ID.
The present invention differs from the above prior cited art in that the prior invention, focuses on methods to reapply changes to a database by employing a recovery log. The prior related art method makes no reference to database backups as part of recovery. The method of the present invention differs in that it teaches methods to identify and provide the full, incremental and accumulated backups to the database recovery process in the correct order. The methods taught by the present invention provide optimization of recovery process that is not provided by the prior related art method.

Method for reducing database recovery time