Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.

1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor, and more particularly, to a method of manufacturing a semiconductor device having a high-k dielectric thin layer formed by an interfacial reaction.
The present invention is derived from a project entitled "Future Technology Researches in the Fields of Information and Telecommunications [2200-S]" conducted as an IT R&D program for the Ministry of Information and Communication (Republic of Korea).
2. Discussion of Related Art
In a silicon-based field effect transistor (FET), it is necessary to form a gate with a linewidth of several tens of nm in order to increase integration density. To obtain the gate with a linewidth of several tens of nm, the physical thickness of a conventional gate insulating layer should be reduced to 1 nm or less. In this case, however, the number of electrons tunneling directly through the gate insulating layer increases sharply, thereby increasing a leakage current of the silicon-based FET.
Typically, a gate insulating layer of an FET is formed of SiO2, which is obtained using a thermal oxidation process and known as a very physicochemically stable material. However, as stated above, although it is desired that the thickness of an SiO2 gate insulating layer be reduced to increase the integration density of an FET, when the SiO2 gate insulating layer has a predetermined thickness or less, a leakage current characteristic of the FET deteriorates, thus degrading reliability of the FET. Therefore, it is theoretically calculated that the most appropriate physical thickness of the SiO2 gate insulating layer is about 1.6 nm.
In order to overcome the drawbacks of the foregoing SiO2 gate insulating layer, a high-k dielectric layer has been proposed. Generally speaking, a high-k dielectric material is a material having a higher dielectric constant than the dielectric constant (k=3.9) of SiO2. High-k dielectric materials on which a vast amount of research has recently been conducted include Group IV metal oxides, such as HfO2 and ZrO2, and rare-earth element oxides, such as La2O3, Gd2O3, and Y2O3. The foregoing oxides have high dielectric constants, good thermal stability, and wide band offsets to silicon.
The most typical method of manufacturing a high-k dielectric thin layer is an atomic layer deposition (ALD) method disclosed in Korean Patent Publication No. 10-2005-0072087. A method of manufacturing a high-k dielectric thin layer using an ALD technique involves controlling the thickness of the high-k dielectric thin layer by alternately injecting a precursor and a co-reactant in a pulse type into the surface of a grown layer. However, according to the ALD method, it is very difficult to obtain a precursor appropriate for a high-k dielectric thin layer to be manufactured. Moreover, a large amount of silicon dangling bond is formed at an interface of the high-k dielectric thin layer manufactured using the ALD method, thereby increasing the density of interfacial state.
Also, Korean Patent Publication No. 10-2006-0059847 teaches a method of manufacturing a high-k dielectric layer using a chemical reaction, such as hydrolysis. Specifically, a solid solution with a Perovskite structure based on barium lanthanide poly-titanate may be formed using a chemical reaction, such as hydrolysis. The solid solution may include at least one of BaLn2(Ti1−xMx)4O12, BaLn2(Ti1−xMx)3O10, BaLn2(Ti1−xMx)2O8, and (Ba,Ln) (Ti1−x−yMxTay)O5 (Ln=La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Y; M=Zr, Hf; x, y=0˜1). The foregoing method is relatively simple and enables formation of a high-k dielectric layer in large quantities. However, a chemical reaction required for forming the high-k dielectric layer is inadequate for a typical process of manufacturing a silicon semiconductor device.

Method of manufacturing semiconductor device

Electronics and Telecommunications Research Institute


A semiconductor memory device including a bit-line sense amplifier is not affected by variation in manufacturing process and has a stable driving scheme. The semiconductor memory device includes: a unit memory cell for storing a data; a sense amplification unit including a bit-line sense amplifier (BLSA) for sensing and amplifying a voltage difference of a bit-line pair receiving the data of the unit memory cell; a variation detection unit for detecting a variation of a manufacturing process to output a detecting signal; and a sense amplifier controlling unit for controlling the BLSA to be activated after a predetermined time from an activation of unit memory cell in response to the detecting signal.

The subject matter relates to semiconductor design technology, and more particularly to a semiconductor memory device including a bit-line sense amplifier to be stably driven even in variation of a production fabrication or a manufacturing process.
Where a low driving voltage is used to implement the power of a memory device, various technical supplements have been used to improve an operation of a sense amplifier in the memory device such as a dynamic random access memory (DRAM). One such supplement is an over-driving scheme of the sense amplifier.
In general, if data of a plurality of memory cells are transferred onto bit-lines, wherein the memory cells are connected to a certain word-line activated by a row address, a bit-line sense amplifier senses and amplifies a voltage difference between two corresponding bit-lines of a bit-line pair.
In the above process, since thousands of bit-line sense amplifiers start to operate simultaneously, a driving time of the bit-line sense amplifiers is determined according to whether or not it is possible to supply a sufficient amount of current for driving the bit-line sense amplifiers.
However, since the operating voltage has been lowered according to a trend of decreased power for the memory device, it is difficult to rapidly supply sufficient current. To solve this problem, an over-driving scheme is adopted so as to supply a voltage higher than a normal voltage, i.e., internal core voltage, onto a power line of the bit-line sense amplifier during an initial operating period of the bit-line sense amplifier (immediately after charge sharing between a cell and a bit-line).
A block diagram and an operation of a conventional semiconductor memory device having an over-driving scheme will be described in detail referring to FIGS. 1 and 2.
FIG. 1 is a circuit diagram of a semiconductor memory device having a conventional over-driving scheme.
As shown, the conventional semiconductor memory device includes a unit memory cell 10, a bit-line sense amplifying unit 20, an equalizing signal generating unit 30, an over-driving unit 40, a first driving power supplying unit NM1, a second driving power supplying unit NM2, a driving power line precharging unit 50 and a data reading path unit 60. The unit memory cell 10 stores a data. The bit-line sense amplifying unit 20 senses and amplifies a voltage difference of a bit-line pair BL and BLB where the data of the memory cell 10 is loaded on. The equalizing signal generating unit 30 generates an equalizing signal BLEQ for precharging the bit-line pair BL and BLB and applies the equalizing signal BLEQ to the bit-line sense amplifying unit 20. The over-driving unit 40 connects an external voltage VDD terminal to a normal voltage supply terminal NODE1 in response to an over-driving pulse OVD. The first driving power supplying unit NM1 supplies a voltage at the normal voltage supply terminal NODE1 to a first driving power line RTO of the bit-line sense amplifying unit 20. The second driving power supplying unit NM2 supplies a ground voltage VSS to a second driving power line SB of the bit-line sense amplifying unit 20. The driving power line precharging unit 50 precharges the first driving power line RTO and the second driving power line SB of the bit-line sense amplifying unit 20. The data reading path unit 60 outputs the data loaded on the bit-line pair BL and BLB to a data pad DQ through transfer lines SIO, SIBO, LIO and LIBO in response to a column-selection signal YI.
The equalizing signal generating unit 30 is embodied by employing a PMOS transistor PM1 and an NMOS transistor NM3 the gates of both transistors receiving a pre-equalizing signal BLEQB and the two transistors connected in series between the external voltage VDD and the ground voltage VSS. The PMOS transistor PM1 receives a source voltage VPP as a substrate voltage and the NMOS transistor NM3 receives a source voltage VBB as a substrate voltage.
FIG. 2 is a timing diagram illustrating signal levels while accessing the semiconductor memory device shown in FIG. 1.
First, if an active command and a low address are input, bit-line splitting signals BISH and BISL are deactivated so that only corresponding unit memory cell array is connected to the bit-line sense amplifying unit 20. Further, as the equalizing signal generating unit 30 deactivates the equalizing signal BLEQ, so as to no longer supply a precharging voltage VBLP to the bit-line pair BL and BLB, an input of data is prepared.
Subsequently, if a corresponding word line WL is activated by the active command, the data of the unit memory cell 10 is loaded on the bit-line pair BL and BLB with a fine voltage difference ΔV.
As first and second enable signals SAP and SAN are activated, the first and second driving power supplying units NM1 and NM2 respectively supply the external voltage VDD and the ground voltage VSS to the first and second driving power lines RTO and SB of the bit-line sense amplifying unit 20. At this time, during a startup driving of the bit-line sense amplifying unit 20, the over-driving unit 40 supplies the external voltage VDD to the normal voltage supply terminal NODE1 in response to an activation of the over-driving pulse OVD so that the first driving power supplying unit NM1 supplies sufficient current to the first driving power line RTO, thereby accomplishing an over-driving. Hereafter, if the over-driving pulse OVD is deactivated, the first driving power supplying unit NM1 drives the first driving power line RTO with a normal voltage VCORE loaded on the normal voltage supply terminal NODE1 because the over-driving unit 40 does not supply the external voltage VDD to the normal voltage supply terminal NODE1. Therefore, the bit-line sense amplifying unit 20 is activated by the first and second driving power lines RTO and SB so as to detect a voltage difference of the bit-line pair BL and BLB and amplify it.
The data loaded on the bit-line pair BL and BLB is output to the data pad DQ through the data reading path unit 60 including the transfer lines SIO, SIOB, LIO and LIOB in response to the column-selection signal YI.
The corresponding word line WL is deactivated based on a precharging command. Because the equalizing signal generating unit 30 activates the equalizing signal BLEQ, the bit-line sense amplifying unit 20 precharges the bit-line pair BL and BLB in response to the activation of the equalizing signal BLEQ. In addition, the driving power line precharging unit 50 precharges the first and second driving power lines RTO and SB of the bit-line sense amplifying unit 20.
Further, as the bit-line splitting signals BISH and BISL are activated, adjacent unit memory cells 10 also share the bit-line sense amplifying unit 20 with each other.
For reference, as described with respect to FIG. 1, a time from activating of the word line WL to activating of the bit-line sense amplifying unit 20 is referred to as a 'Sensing Margin Delay'. If the sensing margin delay shortens, the bit-line sense amplifying unit 20 reaches an active state such that the fine voltage difference ΔV input to the bit-line pair BL and BLB is not guaranteed after the word line WL is activated. Accordingly, a data error may occur by detecting and amplifying an erroneous data.
As described above, a conventional controlling unit for guaranteeing the sensing margin delay to drive the bit-line sense amplifying unit 20 will be described in detail.
FIG. 3 is a circuit diagram of a conventional bit-line sense amplifier driving controller of the semiconductor memory device shown in FIG. 1.
As shown, the bit-line driving controller includes a signal input unit 70 and a RC delay unit 80. The signal input unit 70 detects an active pulse ACTB_PULSE and a precharging pulse PCGB_PULSE. The RC delay unit 80 adds a sensing margin delay to an output signal of the signal input unit 70 to output a sense amplifier enable signal BLSA_EN.
Herein, the signal input unit 70 activates the output signal to a logic high level in response to the active pulse ACTB_PULSE, and deactivates the output signal to a logic low level in response to the precharging pulse PCGB_PULSE.
Further, the RC delay unit 80 includes an inverter chain for delaying the output signal of the signal input unit 70 to output the sense amplifier enable signal BLSA_EN. A plurality of inverters provided in the inverter chain includes an active resistor and a capacitor at an output terminal of a respective inverter.
Hereinafter, a driving of the bit-line driving controller shown in FIG. 3 will be described briefly.
If the active pulse ACTB_PULSE is activated, the signal input unit 70 activates and outputs its own output signal with a logic high level. The RC delay unit 80 outputs the sense amplifier enable signal BLSA_EN by adding the RC delay according to the active resistors and the capacitors to the output signal of the signal input unit 70.
Thereafter, if the precharging pulse PCGB_PULSE is inputted, the sense amplifier enable signal BLSA_EN is inactivated since the signal input unit 70 inactivates the output signal to a logic low level.
Accordingly, the first and second enable signals SAP and SAN for supplying a driving power voltage of the bit-line sense amplifier are activated in response to the sense amplifier enable signal BLSA_EN.
As described above, the conventional bit-line driving controller enforces the sensing margin delay through the RC delay unit 80. Particularly, the RC delay unit 80 includes the active resistor embodied in an N+ active resistor in consideration of a layout size and process, voltage and temperature (PVT) fluctuation.
However, because the N+ active resistor is affected by variation in a production fabrication or a manufacturing process, it has problem that the resistance value may be fluctuated widely. If a resistance value of the N+ active resistor becomes high, a row to column delay (tRCD) property degrades, but a data error does not occur. However, if the resistance value becomes too low, the sensing margin delay is decreased. Accordingly, before the fine voltage difference ΔV is sufficiently supplied to the bit-line pair BL and BLB, the bit-line sense amplifier may become active so that erroneous data may be detected and amplified.
Therefore, the sensing margin delay may widely fluctuate based on variation in the manufacturing process, and thus, erroneous data from the memory cell may be detected.

Semiconductor memory device having bit-line sense amplifier


When a user drags a mobile icon, ratings indications are displayed for target icons on which said mobile icon can be dropped.

Some centrally managed computer systems permit a user-administrator to assign computing workloads, e.g., an application and operating system, to hosts, e.g., servers. For example, the managed system can be represented on a workstation display. A mobile icon, representing a workload can be moved from a source icon representing a source host on which the workload is currently running to a target icon representing a host that is to serve as a migration target for the workload. The user can cut-and-paste or drag-and-drop onto a target icon to migrate the workload to the host represented by the target icon.
Hosts can differ in their suitability for hosting a particular workload. One host may not meet the minimum hardware requirements for a workload, another host may meet those requirements but for the fact that it is running other workloads, another host may meet the minimum requirements not but the recommended specifications, another may meet the recommended specifications, etc. Some central management products gather the necessary information to determine the suitability of the various hosts for running a workload. A user can select a workload icon and then select a menu item for migration targets. In response, a separate page appears with a tabular view of the potential target hosts, listing their suitability as drop targets.

Displaying rating indications for drop targets in response to user dragging of mobile icon

Hewlett-Packard Development Company, L.P.


An exhaust system for an engine includes a first muffler having a housing, a first end plate, a second end plate, an inlet pipe extending through at least one of the first end plate and the second end plate, and an outlet pipe extending through at least one of the first end plate and the second end plate. The exhaust system further includes a second muffler having a housing, a first end plate, a second end plate, an inlet pipe extending through at least one of the first end plate and the second end plate, and an outlet pipe extending through at least one of the first end plate and the second end plate. The exhaust system further includes a crossbreed pipe extending through the first end plate of the first muffler and the first end plate of the second muffler.

Mufflers and other such sound attenuating devices have been known and used in exhaust systems of internal combustion engines for many years. In some exhaust systems, dual mufflers are used. Typically in the dual-muffler exhaust system, the exhaust gases produced by the engine are split into two paths with each muffler being disposed in one of the paths. For example, in a V-8 engine, a first muffler may be disposed in an exhaust path associated with half of the combustion chambers of the engine, while a second muffler may be disposed in an exhaust path associated with the other half of the combustion chambers.


The present invention provides a schedule management apparatus for managing and displaying entered schedules. The schedule display control unit displays a schedule in a schedule display frame corresponding to the date of the monthly schedule table. The display switching unit automatically switches, when there are a plurality of schedules, a schedule displayed in the schedule display frame to another schedule at prescribed switching time intervals.

1. Field of the Invention
The present invention relates to a schedule management apparatus and a schedule management method which display a schedule in response to a date frame of a schedule table such as a monthly schedule or a weekly schedule, and a computer-readable recording medium storing a schedule management program. More particularly, the invention relates to a schedule management apparatus and a schedule management method for displaying a case name of schedule in a limited space in a date frame of a schedule table, and a computer-readable recording medium storing a schedule management program.
2. Description of the Related Arts
In an information processing equipment for use by a person or a group such as a portable terminal or a personal computer, it is the conventional practice to use an information management system known as PIM (personal information manager) or PD (personal data assistant). Such an information management system incorporates a schedule table management function for preparing and managing schedule tables. When a monthly schedule is selected in a conventional schedule table management function, a calendar-type monthly schedule table 200 is displayed as shown in FIG. 1. In this monthly schedule table 200, a schedule display showing a time of the day and contents such as "16:00 Business" is conducted in a schedule display frame 204, as in a date frame 202 of, for example, 9/7. The abbreviation "Business NEG" as used here means a "business negotiation". When there are a plurality of schedules within a day, a scroll button 206 is displayed in the date frame 202, and contents of display in the schedule display frame 204 are sequentially displayed through switching by pressing the scroll button 206 with the mouse. There is another schedule display of "13:00 Arrangement" for 9/8. The schedule displays such as "Meeting" for 9/1 and "Meeting" for 9/8 are event displays fixedly displaying details of the schedule: an event display is also a schedule.
In such a conventional schedule management apparatus, however, when a plurality of schedules are set for a day or the contents of schedule cannot fully be displayed within the schedule display frame, it is necessary to press down the scroll button or operate the keyboard for confirmation of the schedule, and this troublesome operation for confirming a schedule has been a problem in the conventional art.

Schedule management apparatus, schedule management method, and computer-readable recording medium storing schedule management program


In an exercise system having a remote communication system adapted to communicate with an exercise device, a method for generating an exercise program includes receiving route information identifying a route traveled by an individual during a real world exercise session, receiving audio information identifying a musical selection listened to by the individual during the real world exercise session, using the route information and the audio information to generate an exercise program. The exercise program includes control signals that cause an exercise device to substantially simulate the topographical characteristics of the route traveled by the individual during the real world exercise session, and audio signals representative of the musical selection listened to by the individual during the real world exercise session so that the musical selection is presented during a performance of the exercise program.

In an attempt to improve their health and physical conditioning, consumers are purchasing exercise devices in record quantities. One common challenge with exercise equipment is motivating the purchaser to use the device on a consistent and ongoing basis. This lack of motivation can be a result of the repetitive nature of the exercises and exercise routines that a user can perform on a specific exercise device as well as the versatility of the exercise devices.
In an effort to maintain the motivation necessary for the user of an exercise device to consistently use the exercise device, some exercise devices simulate the outdoors by creating exercise programs that reflect the terrain of real world locations. For example, U.S. Pat. No. 8,029,415 discloses a system where an individual may identify a street, road, or path that the individual wants to traverse during the exercise session. An exercise program is created that simulates the terrain of the chosen exercise route. For example, an exercise program created for a treadmill may include control signals that increase and decrease tread base inclination levels consistent with the terrain of the chosen exercise route. In addition, images of the chosen exercise route may be presented to the user on display screens.

System and method for simulating real world exercise sessions


A photographing optical lens includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element has positive refractive power. The second lens element, the third lens element, and the fourth lens element have refractive power. The fifth lens element with negative refractive power has an aspheric object-side surface and an aspheric image-side surface being concave in a paraxial region thereof. The sixth lens element with negative refractive power has an aspheric object-side surface being concave in a paraxial region thereof and an aspheric image-side surface being concave in a paraxial region thereof, wherein the image-side surface thereof has at least one inflection point. The photographing optical lens further includes a stop located between an object and the second lens element.

1. Technical Field
The present disclosure relates to a photographing optical lens. More particularly, the present disclosure relates to a compact photographing optical lens applicable to electronic devices.
2. Description of Related Art
In recent years, with the popularity of electronic devices having camera functionalities, the demand of miniaturized optical systems has been increasing. The sensor of a conventional optical system is typically a CCD (Charge-Coupled Device) or a CMOS (Complementary Metal-Oxide-Semiconductor) sensor. As the advanced semiconductor manufacturing technologies have allowed the pixel size of sensors to be reduced and compact optical systems have gradually evolved toward the field of higher megapixels, there is an increasing demand for compact optical systems featuring better image quality.
A conventional optical system employed in a portable electronic product mainly adopts a four-element lens structure or a five-element lens structure. Due to the popularity of mobile terminals with high-end specifications, such as smart phones, tablet personal computers and wearable apparatus, the requirements for high resolution and image quality of present compact optical systems increase significantly. However, the conventional optical systems cannot satisfy these requirements of the compact optical systems.
Other conventional compact optical systems with six-element lens structure are disclosed. However, the refractive power and the surface shape of the lens elements are not favorable for enhancing the diverging ability at the image side and reducing the back focal length of the optical system. Furthermore, the converging intensity at the optical axis cannot be moderated for enhancing the image sharpness. Accordingly, it is not favorable for keeping the optical system compact and enhancing the image quality.

Photographing optical lens, image capturing device and electronic device


A production method for producing a light-emitting device 1 in which a light-emitting layer at least comprised of a n-type substrate bearing layer 3 and a p-type substrate bearing layer 4 is layered on a transparent crystal substrate 2 is provided with a step of forming a transfer layer 5 on at least a part of the transparent crystal substrate 2 or the light-emitting layer 3, 4, which transfer layer 5 is softened or set upon supplying an energy thereto; a step of pressing a mold 6 formed with a minute unevenness structure 61 against the transfer layer 5 to transfer the minute unevenness structure 61 to an outer surface of the transfer layer 5, and a step of forming a minute unevenness structure 21, 34 for preventing multiple reflection based on the minute unevenness structure 51 transferred to the transfer layer 5.

1. Technical Field
The present invention relates to a method for producing a light-emitting device having an improved light extraction efficiency.
2. Background Art
In general, light emitted from an active layer of a light-emitting device cannot be efficiently extracted since being reflected at an interface due to a difference in the refractive indices of the light-emitting layer, a transparent crystal substrate and the outside air.
In view of the above, there has been developed a light-emitting device designed to improve a light extraction efficiency by suppressing the absorption caused by the multiple reflection by forming the outer surface of the light-emitting device to have an unevenness structure. As a method for forming an unevenness structure, there have been adopted a method for forming an uppermost layer into an unevenness surface during the growth and a method for chemically or physically forming an uppermost layer into an unevenness surface after the growth (see Japanese Unexamined Patent Publication No. H06-291368).
There has been also proposed a method for forming an unevenness in a transparent resin layer coating a light-emitting surface of a light-emitting device. The light-emitting device is joined with a transparent substrate via the coating transparent resin layer, and the resin layer is irradiated with a laser beam through the transparent substrate, whereby the resin layer is formed with an unevenness structure by the laser ablation (Japanese Unexamined Patent Publication No. 2002-368289).
There is also known a method for pressing a mold against a resist formed on a surface of a substrate to transfer an unevenness structure to the resist and transferring the unevenness structure to the substrate by dry etching of a low selection ratio using this resist as a mask (Japanese Unexamined Patent Publication No. 2000-232095).
There is further known a method for applying a SOG film to a surface of a substrate, pressing a mold against the SOG film to transfer an unevenness structure, and transferring the unevenness structure to the substrate by RIE (reactive ion etching) using this SOG film as a resist mask (Japanese Unexamined Patent Publication No. 2003-100609).
However, according to the method for forming the outer surface into the unevenness structure during the growth disclosed in Japanese Unexamined Patent Publication No. H06-291368, an improvement in the light extraction efficient is as low as about 10% since a degree of surface roughness is low. On the other hand, according to the method for chemically or physically forming the outer surface into the unevenness structure after the growth disclosed in the same publication, the shape reproducibility of the unevenness structure is poor since the outer surface is merely made rough by etching or grinding. Further, since the unevenness structure is formed by the laser ablation according to the method disclosed in Japanese Unexamined Patent Publication No. 2003-368289, there is a problem of a poor shape reproducibility of the minute unevenness structure. As a processing method having a good shape reproducibility, an unevenness structure may be formed by dry etching after a pattern is formed by optical lithography. However, it is still difficult to form an unevenness structure having a pyramidal shape, a semispherical shape or any arbitrary shape or minute unevenness structure having a size equal to or below a resolution restricted by wavelength.
In Japanese Unexamined Patent Publication No. 2000-232095, an ion milling method according to which the resist and the semiconductor layer are etched substantially at the same speed is adopted as the dry etching of a low selection ratio. Since a surface to be etched has a strong angle dependency according to the ion milling method, this method can be applied to form a rectangular unevenness structure or unevenness structure having a pitch in the range of from several nm to several tens of nm where the angle does not count, but it is difficult to form a minute unevenness structure having a pitch in the range of from several hundreds of nm to several μm, where the angle is not negligible such as those having a pyramidal shape.
Further, a polymer resist made of, e.g., polymethyl-methacrylate (PMMA) is used as the resist. Since such a resist has a low resistance to dry etching if a dry etching method with a chlorine gas is adopted, it is difficult to process the resist to have minute pyramidal or semispherical unevenness structures or process the resist to have about the same selection ratio.
In Japanese Unexamined Patent Publication No. 2002-100609, the depth range of the unevenness structure of about 100 nm is disclosed in an embodiment. In order to transfer an unevenness structure having pitches or depth in the range of about several μm, a pressure which is at least tenfold of the pressure disclosed in the embodiment is actually necessary, wherefore it is difficult to transfer an unevenness structure of several hundreds of nm to several μm to a light-emitting layer or a transparent crystal substrate (sapphire substrate).

Method for producing a light emitting device


A liquid ejection head includes a plurality of pressure chambers having respective ejection ports for ejecting liquid, a common liquid chamber communicating with the plurality of pressure chambers through individual liquid paths for supplying liquid to the respective pressure chambers, and a plurality of energy generating elements provided in the respective pressure chambers. The common liquid chamber has a first surface provided with the liquid paths and a second surface arranged vis-à-vis the first surface. Pressure waves sequentially generated with a time difference propagate from the respective liquid paths and are reflected by the second surface. The second surface has an inclined portion inclined relative to the first surface by a predefined inclination angle such that each pressure wave is returned to the first surface in a time not agreeing with the time difference.

Field of the Invention
The present invention relates to a liquid ejection head having a plurality of ejection ports.
Description of the Related Art
The known liquid ejection methods include the thermal method and the piezoelectric method. The thermal method utilizes electro-thermal conversion elements (heaters) as energy generating elements in order to generate energy necessary for ejecting liquid. The piezoelectric method, on the other hand, utilizes piezoelectric elements (piezos) as energy generating elements. Liquid ejection heads that are based on either of these methods generally include a plurality of liquid ejection ports, a plurality of pressure chambers each of which communicates with the corresponding one of the ejection ports and a common liquid chamber for storing liquid to be supplied to the individual pressure chambers. The energy generating elements are arranged in the respective pressure chambers.
When a liquid ejection head of either of the above-described types is in operation, a pressure wave of liquid appears as the energy generating element in one of the pressure chambers is driven. The pressure wave then propagates to the remaining pressure chambers containing the respective energy generating elements by way of the common liquid chamber. Then, there can be instances where meniscus vibrations take place at the ejection ports of the remaining pressure chambers. As liquid is ejected in a condition where meniscuses are vibrating to a large extent, the ejected liquid droplets can represent variations in terms of volume, moving speed and moving direction depending on the height and the vibration velocity of the meniscuses. As the ejected liquid droplets represent variations in terms of volume, moving speed and moving direction in this way, degraded images can be recorded by the liquid ejection head because such variations entail density variations of recorded images and generation of streaky defective images. Additionally, as the meniscuses rise excessively, the ejection ports forming plane can become broadly wetted to consequently give rise to variations of liquid ejecting direction and a liquid-unejectable state.
Pressure waves as described above can be classified into two groups of pressure waves according to the difference of propagation route. One is a group of pressure waves that directly propagate from the pressure chambers where pressure waves are generated to adjacently located pressure chambers, which are referred to as directly propagating waves. The other is a group of pressure waves that propagate to the common liquid chamber and are subsequently reflected by one of the wall surfaces of the common liquid chamber to propagate to other pressure chambers, which are referred to as wall surface-reflected waves.
The magnitude of meniscus vibrations attributable to directly propagating waves depends on the distance by which pressure chambers are separated from each other. Therefore, the influence of directly propagating waves is small between two pressure chambers that are separated from each other by a large distance. Additionally, the meniscus vibrations generated by directly propagating waves survive only a short period of time after the generation of the directly propagating waves. Thus, liquid ejections by a liquid ejection head can be made to be hardly influenced by directly propagating waves by maximizing the drive time differences of the energy generating elements arranged in the respective pressure chambers that are located close to each other by adopting an energy generating element drive technique referred to as time division drive.
On the other hand, meniscus vibrations attributable to wall surface-reflected waves depend on the reflection behavior of the pressure waves. More specifically, the magnitude and the peak time of meniscus vibrations vary to a large extent depending on the starting points of the wall surface-reflected waves, the distances from the wall surface of the common liquid chamber that reflects pressure waves and the angle of the wall surface. With the above-described time division drive, it is difficult to cause the drive time difference to finely vary as a function of the position of energy generating element because of the characteristics of the drive method. Therefore, it is difficult to realize a drive situation where all the energy generating elements are made be hardly affected by wall surface-reflected waves.
Japanese Patent No. 2962726 and Japanese Patent Application Laid-Open No. H07-156403 disclose techniques for solving the problem of defective liquid ejections attributable to wall surface-reflected waves as described above. With the techniques described in Japanese Patent No. 2962726 and Japanese Patent Application Laid-Open No. H07-156403, it is possible to cause a common liquid chamber to trap air bubbles in the inside thereof and make the trapped air bubbles absorb the pressure fluctuations in the inside of the common liquid chamber by the pressure buffering effect of the air bubbles.
When utilizing the pressure buffering effect of air bubbles by means of the techniques as described in Japanese Patent No. 2962726 and Japanese Patent Application Laid-Open No. H07-156403, it is difficult to maintain the volume of the air bubbles in the common liquid chamber to a constant level for a long period of time. Then, by turn, it is difficult to maintain the pressure buffering effect on a stable basis.
It is therefore the object of the present invention to provide a liquid ejection head that can reliably and stably suppress defective ejections attributable to the pressure waves reflected by one of the wall surfaces of the common liquid chamber of the liquid ejection head.


A probe needle alignment device supports a probe card assembly with probe needles extending upward. A microscope includes a first eyepiece aligned with the probe needles in its field of view. A first video camera is positioned in optical alignment with the first eyepiece to view probe needles through the first eyepiece. An overdriver includes a transparent planar plate movably disposed between the microscope and the probe needles to displace contact tips of the probe needles through an overdrive distance. A mask plate has a plurality of spots located at positions corresponding precisely to positions of contact pads of an integrated circuit to be probe tested. A second video camera includes the spots within its field of view. Video signals produced by the first and second video cameras are combined to simultaneously represent images of the probe needles and the spots on the probe plate are converted to video images and overlapping images of the probe needles and the spots are simultaneously displayed in a virtual reality headset to aid in alignment of contact tips of probe needles with corresponding spots of the mask plate.

The invention relates to an improved method and apparatus for calibrating probe cards to ensure that appropriate overdriven probe needles are in proper alignment with bonding pads of an integrated circuit chip to be "probe tested", and more particularly to an inverted alignment station for performing such calibrating.
In the integrated circuit manufacturing industry each semiconductor wafer may include hundreds of integrated circuit die (i.e., chips), and it is necessary to "probe test" each die before the wafer is cut into the individual integrated circuit die which then are packaged. Such testing often requires most bonding pads to have electrical contact to a tester. To accomplish the probe testing, it is conventional to provide "probe cards" that support a plurality of probe needles, the tips of which must provide electrical contact with corresponding bonding pads of the die under test (DUT). The shank of a probe needle is typically 5 to 10 mils in diameter, and the wafer to be probed is supported on a wafer chuck. Typically, the probe needles are inclined relative to the bonding pads. After alignment of the probe needles with the corresponding bonding pads of the integrated circuit die has been accomplished, the wafer chuck is raised through an approximately 3 mil "over-travel distance" past the point at which the probe tips first contact the pads so that the typically inclined probe needles slide or "scrub" on the aluminum bonding pads of the die to allow good mechanical and electrical contact thereto.
In the course of manufacturing the probe cards, it is necessary to align the probe needles to a "mask" having imprinted thereon "dots" or "targets", the locations of which correspond precisely to the locations of the bonding pads on the die to be probed. As mentioned above, the probe needles are "overdriven" approximately 3 mils during probe testing of an integrated circuit die, so it is necessary to provide the same 3 mils of "overdrive" during "probe needle alignment" with the dots on the mask. Probe needle alignment usually has been performed on a device called an "alignment station". The above mentioned "mask" is located therein with the dots facing upward on a vertically moveable chuck. The probe card to be aligned is mounted securely in the alignment station, with the probe needles pointing downward and as closely aligned as possible with the corresponding dots on the mask. Skilled operators then manipulate suitable tweezers to adjust the probe needles. To accomplish this task, the operator views the needles through a microscope. When the chuck is raised to provide the 3 mil overdrive, the operator identifies needles which need to be bent slightly to be properly aligned with their corresponding dots on the mask. The mask then is lowered so it no longer contacts the needles. The operator then manipulates the tweezers to bend the misaligned needle(s), again raises the chuck to the overdriven position, and re-observes the alignment of the adjusted needles with its corresponding pad on the mask. This procedure is repeated until all needles are properly aligned with the corresponding dots on the mask in the overdriven position. At that point the probe card is ready for use in testing a wafer.
However, the above technique does not allow adequate access to probe needles for the high density, complex probe cards which are needed to test multi-DUT arrays or some of the more complex integrated circuits now being manufactured. Furthermore, the task of aligning probe needles is very taxing to the operators, because of the great precision required in manipulating the tweezers while simultaneously straining to view the needles and tweezers through the microscope. For multi-layer probe needle assemblies, the operator needs to move the upper probe needles out of the way in order to gain access to allow alignment of the lower probe needles. This is very taxing upon the abilities of an operator.
It would be highly desirable to provide an improved probe needle alignment device and system which allows better access for tools such as tweezers to align probe needles with corresponding dots on a mask, allows more accurate alignment of probe needles prior to use, and which also avoids the operator fatigue usually associated with probe needle alignment procedures.

Inverted alignment station and method for calibrating needles of probe card for probe testing of integrated circuits


Apparatus for a multi-screen display including a multiprocessor for processing signals from at least one signal source and for applying processed signals to a plurality of display units arranged in at least two rows so as to form the multi-screen display. The multiprocessor includes vertical scanning format transformation apparatus for transforming a vertical scanning frequency of the output signal of the multiprocessor to be a higher vertical scanning frequency than that of a vertical scanning frequency of the input signal of the multiprocessor so that a ratio of the vertical scanning frequency of the output signal applied to the multi-screen display to the vertical scanning frequency of the input signal is at least two, thereby substantially eliminating discontinuity distortion of a moving pole image displayed as a reproduced picture on the multi-screen display.

The present invention relates to a multi-screen display system wherein a plurality of projector units are distributed in a matrix arrangement.
FIG. 2 shows a general arrangement for a multi-screen display system wherein a signal source 1 supplies a signal to a multiprocessor 2 which provides respective output signals to a multi-screen display 3. The multi-screen display includes two columns and two rows wherein 1-1, 1-2, . . . etc. are the display units of the first row and the first column, the first row and the second column, . . . etc. respectively, and correspond to output signals D.sub.1-1, D.sub.1-2, ... from the multiprocessor. FIG. 3 shows the construction of a display unit including a CRT 4 for projection, a lens 5 for projection, and a screen 6.
FIG. 4 is a block diagram arrangement of a conventional multiprocessor 2 wherein VD.sub.i, HD.sub.i and D.sub.i represent an input vertical synchronous signal, an input horizontal synchronous signal and an input picture signal, respectively. There is provided a phase detector 7, a voltage control oscillator 8 (hereinafter abbreviated as "VCO"), and a programmable counter 9 for generating a horizontal address (X) which form a well-known PLL (Phase Lock Loop). As an example, the vertical/horizontal scanning frequency of the input signal is approximately 60 Hz/32 KHz, the number of total scanning lines is approximately 500 lines, and the oscillation frequency for the VCO is approximately 30 MHz. A programmable counter 10 serves for generating a vertical address (Y) and counts the number of output horizontal synchronous pulses (HD.sub.0) and is reset by the vertical synchronous signal VD.sub.i. An AD converter 11 is coupled to an SP converter for converting serial signals into parallel signals. There is also provided a frame memory 13 wherein M.sub.1-1 is a memory for the first row of the first column, M.sub.1-2 is a memory for the first row of the second column, M.sub.2-1 is a memory for the second row of the first columns and M.sub.2-2 is a memory for the second row of the second column, each being composed of a first memory and a second memory. A line memory 14 is coupled to the frame memory.
FIGS. 5A and 5B show the principle of the operation of the multiprocessor of FIG. 4 wherein a timing chart 15 is shown in FIG. 5A and the abscissa t indicates time marked in a frame unit while the ordinate indicates a memory address. M.sub.1-1, 1 is the first memory for the first row and the first column, M.sub.2-1, 1 is the first memory for the second row and the first column, M.sub.1-1, 2 is the second memory for the first row and the first column, and M.sub.2-1, 2 is the second memory for the second row and the first column, and correspond to the frame memory 13 in FIG. 4. Memories corresponding to the second column are omitted in FIG. 5A. In the figure, for example, W3 indicates that picture signals of the frame 3 are written into the memory. R.sub.3 indicates that picture signals of the frame 3 are read out from the memory. Output signals being read out pass through the line memory 14 in FIG. 4, and are outputted as D.sub.1-1, D.sub.2-1, and are supplied to the multi screen display 3 in FIG. 2. In the prior art, vertical/horizontal scanning frequencies of the multi screen display 3 are approximately 60 Hz/32 kHz like those of the input signals. The total number of the scanning lines for the input signals is approximately 500 and are divided into 250 lines for the upper stage (for the first row) and 250 lines for the lower stage (for the second row) and are written into frame memories M.sub.1-* and M.sub.2-*, respectively, and are read out concurrently at the timing indicated in FIG. 5A. The line memory 14 is used for outputting picture signals corresponding to the same scanning line two times repeatedly.
In the prior art, however, there is a defect that discontinuity interference and inclination distortion of moving pole images take place as indicated in 16 of FIG. 5B wherein the moving pole image is a vertically extending image moving horizontally across the rows of the display screen. In FIG. 5B, a rectangular frame 16-1 is a frame for the whole screen. A discontinuous slanting line 16-2 is a vertical moving pole image. That is, although the original vertical pole is to be moved at the speed v to the right side, a distorted pole is seen as indicated in 16-2 in the figure for the first and second rows. This phenomenon is explained quantitatively below. Making the discontinuity width .DELTA.x, this is equal to approximately v.DELTA.t, where .DELTA.t is a time difference described as indicated in FIG. 5A, and is equal to vertical scanning period of approximately 15 ms. Accordingly, in the case of a body moving at approximately 15 mm/15 ms (1 m/s), the discontinuity of approximately 15 mm has been produced at the link or boundary of the upper/lower rows of the screen (This is referred to as a discontinuity interference). Moreover, in FIG. 5A, since the speed in writing the picture signals into the memory (gradient of the solid lines indicating the writing-in speed) is different from the speed in reading out the signals from the memory (gradient of the dotted lines indicating the reading-out speed), the moving pole which is originally vertical is inclined by an angle .theta.=.DELTA.x/H (where H is a height of screen) (this is denominated as inclination distortion).
FIG. 6A shows a timing chart 17 and FIG. 6B shows a moving pole distortion 18 in the case of four rows and four columns in accordance with the prior art.
FIG. 7 shows a timing chart 19 for an improved example according to the prior art as described in Japanese Patent Application Laid-Open No. 3-114373 having a laid-open date of May 15, 1991, and FIG. 7B shows a moving pole distortion 20 in the case for four rows and four columns wherein four sets of the frame memories 13 in FIG. 4 are used. As is apparent from FIG. 7B, the discontinuity interference at the links of the rows of screens is eliminated, but there is a problem that the inclination distortion remains. Moreover, there is also a problem that many sets of frame memories are required.

Display with vertical scanning format transformation


Scan tests tolerant to indeterminate states generated in an integrated circuit (IC) when employing signature analysis to analyze test outputs. Bits with indeterminate-state are masked when scanning out the bits from the scan chains to force such indeterminate bits to a known logic level. This prevents a signature generator receiving the outputs of a scan test from generating an invalid signature. In an embodiment, masking information is stored in encoded form in a memory. A decoding circuit decodes the masking information and provides mask data under control from a mask controller. Mask data is sent to a masking circuit which also receives corresponding bits from scan-out vectors, with each scan-out vector being generated by a corresponding one of multiple scan chains. The output of the masking circuit may be provided in a compressed form to the signature generator circuit.

1. Field of the Invention
The present invention relates generally to integrated circuits (IC) and more specifically to a method and apparatus for providing tolerance to indeterminate states that may occur at the scan outputs during scan tests of circuits.
2. Related Art
Test apparatus to run diagnostic and or/functional tests are frequently used to test electronic circuits (including circuit boards, etc.). In a common scenario, electronic circuits in integrated form (integrated circuits or ICs) may be subjected to various tests after fabrication to verify compliance with stated functionality and specifications. Thus, integrated circuits containing digital circuitry may be tested by inputting a sequence (or sequences) of digital bit patterns (test vectors) to various digital elements within the IC, and observing (and analyzing) the corresponding outputs.
Scan test techniques are often used to test ICs. When an IC is operated in a test mode, various sequential elements (such as flip-flops) in the IC are connected in a sequence (i.e., the output of one element is connected as an input to the next element) referred to as a "scan chain". Many of such scan chains may be present and operated in parallel in the IC being tested.
In a typical scan test scenario, a number of bits in a particular pattern of zeros and ones ("scan vector") are sequentially (one bit at every clock cycle) loaded (scanned-in) into a scan chain through the first element of the scan chain. Once the scan chains are loaded with the corresponding scan in vector, the functional circuit portions (generally the combinatorial logic) of the IC are evaluated based on the scanned-in bits. The flip-flops (contained in the scan cell) are designed to latch the results of the evaluation, and the bits latched in the scan chains are sequentially scanned out (scan-out) (one bit at every clock cycle) through the last scan cell in each of the scan chains.
In a combinational scan technique, only a single evaluation is performed in the evaluation phase, whereas in a sequential scan technique multiple evaluations may be performed in successive clock cycles (of a test cycle), before starting the scan out operation. The scan-in and scan-out operations are generally referred to as scan operations. In a sequential scan test (where sequential logic is tested) scan chains are generally subjected to one or more test cycles, with one test cycle being determined by one complete scan through the chain.
Signature analysis is often employed to analyze test outputs, particularly when a large number of scan chains are present in a circuit. In an example scenario, the scan chain outputs are compressed and provided to a signature generator (for example, a Multiple Input Signature Register (MISR)). The signature generator generates a test signature representative of the scan chain outputs collected over several test cycles, and provides the same to an external equipment (tester) which analyzes the signature to detect faults. By using such signature analysis techniques, a smaller amount of data can be conveniently examined to determine the presence of defects.
One problem with testing of digital logic in such environments is that some of the outputs may be in an indeterminate (unknown) state. Such indeterminate states may occur, for example, due to one or more uninitialized logic elements in the circuit (IC) that is being tested, or due to timing effects that may occur due to high speed testing.
Such indeterminate states (also called X states) may cause a signature generator (such as an MISR) to enter into an invalid state, consequently rendering the scan chain signature meaningless. One prior testing approach addresses such a problem (of indeterminate states) by not using a signature generator in the test path. However, such an approach denies the various benefits of signature analysis and may not be desirable in several environments.
Accordingly, what is needed is a method and apparatus that is tolerant to indeterminate states that may occur during circuit testing, while meeting one or more of the requirements noted above.
In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.

Scan tests tolerant to indeterminate states when employing signature analysis to analyze test outputs


A method and apparatus for automatically adjusting the flow rate of engine coolant through a heater core in an automobile by automatically determining a temperature difference between the temperature of coolant at a first flow rate before it enters a heater core and a temperature of air exiting the heater core and automatically increasing the flow rate of the coolant to a second flow rate higher than the first flow rate if the temperature difference is greater than a first predetermined temperature difference.

Current climate control systems in automobiles utilize a heater core to heat air that is directed into the cabin of the automobile to provide interior heating. The heater core is typically heated by circulating engine coolant from the engine through the heater core. (Coolant being a term relative to the engine temperature, as the coolant is used to "cool" the engine of the automobile, which is how the coolant obtains the thermal energy used to heat the air passing through the heater core, and thus the coolant is at a high temperature relative to atmospheric temperatures). Typically, the rate of coolant flow through the heater core is governed by various parameters relating to the engine and/or automobile operation and/or coolant pump operation. By way of example, the rate of flow through the heater core may be directly related to engine RPM; the higher the RPM, the higher the coolant flow rate through the heater core. Still further, it may be related to the speed of a coolant pump. Alternatively or in addition to this, the rate of flow of coolant through the heater core may be related to the temperature of the engine. That is, for example, the rate of coolant flow may increase as the temperature of the engine increases. Indeed, in some designs for automobiles, coolant only circulates through the engine (and thus the heater core) when the temperature of the engine has reached a predetermined value. Thus, the rate of flow through the heater core of coolant is variable and controlled by parameters that are not directly related to the required heat output of the heater core. This is sometimes a problem, because by controlling the flow rate of coolant through the heater core solely based on engine parameters, the true need to achieve a minimum circulation rate through the heater core, which may be needed to ensure that the climate control system can provide hot air at an adequate temperature and at an adequate mass flow rate to the cabin, is ignored. Therefore, in some situations, the coolant flow rate may be too low to sufficiently heat the air being directed into the cabin so that the occupants of the cabin will feel comfortable. This is especially the case in situations of extremely cold ambient weather at low engine speeds and/or low coolant pump speeds (and thus low coolant flow rates).
Thus, low coolant flow rate may be a problem because, depending on the ambient temperatures and/or the increase in room temperature that the cabin occupants desire, the heater core may not be able to heat the air being directed into the cabin sufficiently for the occupants to feel comfortable.
One possible solution to the problem of low coolant flow at low engine speeds/low coolant pump speeds might be to simply maintain the flow of coolant through the engine, and thus the heater core, at a higher flow rate. However, this may result in a reduction in fuel efficiency as well as increased wear and tear on automobile components (e.g., a water pump that now must run twice as fast), thus making the automobile less economical, less environmentally friendly and more maintenance intensive.
Therefore, there is a need to better control the flow of coolant through the heater core to better ensure that the heater core is able to provide enough heated air to the cabin of an automobile so that occupants in the cabin feel comfortable, even at extremely cold and low engine/pump speed conditions, in a manner that provides for economical operation of the automobile in both the short and/or long term.

Control of coolant flow rate for vehicle heating

Nissan Technical Center North America, Inc.


An n-type layer of the opposite conduction type composed of n-GaN is formed between a light emitting layer and a p-type cladding layer composed of p-AlGaN. The bandgap of the n-type layer of the opposite conduction type is larger than the bandgap of the light emitting layer and is smaller than the bandgap of the p-type cladding layer.

1. Field of the Invention
The present invention relates to a light emitting device formed of a material having a piezoelectric effect.
2. Description of the Background Art
Semiconductor light emitting devices such as semiconductor laser devices and light emitting diodes using III group nitride semiconductors such as GaN, GaInN, AlGaN, and AlGaInN (hereinafter referred to as nitride based semiconductors) have been expected to be applied as light emitting devices for emitting light in a visible-ultraviolet region.
Out of the applications, extensive development has been proceeding toward practical applications of the semiconductor light emitting devices having a GaInN quantum well layer as a light emitting layer. Such semiconductor light emitting devices have been fabricated on a (0001) surface of a substrate composed of sapphire or silicon carbide (SiC) by MOVPE (Metal Organic Vapor Phase Epitaxy) or MBE (Molecular Beam Epitaxy).
FIG. 42 is a schematic sectional view showing the structure of a conventional GaN based semiconductor light emitting device. The semiconductor light emitting device shown in FIG. 42 is disclosed in JP-A-6-268257.
In FIG. 42, a buffer layer 62 composed of GaN, an n-type contact layer 63 composed of n-GaN, a light emitting layer 64 having a multiple quantum well (MQW) structure, and a p-type cap layer 65 composed of p-GaN are formed in this order on a sapphire substrate 61. The light emitting layer 64 is constructed by alternately stacking a plurality of barrier layers 64a composed of GaInN and a plurality of quantum well layers 64b which differ in composition.
In a method of fabricating such a conventional semiconductor light emitting device, generally used as the sapphire substrate 61 is one having an approximate (0001) surface as its principal plane, to successively form the respective layers from the buffer layer 62 to the p-type cap layer 65 on the sapphire substrate 61. In this case, the respective layers from the n-type contact layer 63 to the p-type cap layer 65 are grown as crystals in a [0001] direction of a nitride based semiconductor.
In a crystal, having no center of symmetry, having a zinc-blende structure, a wurtzite structure, or the like, however, a piezoelectric effect may be generally generated by a strain. In the zinc-blende structure, for example, a piezoelectric effect is the greatest in a strain compressing or extending with respect to a [111] axis. In the wurtzite structure, the piezoelectric effect is the greatest in a strain compressing or extending with respect to a [0001] axis.
In the conventional semiconductor light emitting device, the light emitting layer 64 composed of GaInN has a quantum well structure having a (0001) plane as its principal plane. The lattice constant of a quantum well layer 64b composed of GaInN is larger than the lattice constant of the n-type contact layer 63 composed of n-GaN. Accordingly, a compressive strain is exerted on the quantum well layer 64b in an in-plane direction (a direction parallel to an interface) of a quantum well, and a tensile strain is exerted in a direction of confinement in the quantum well (a direction perpendicular to the interface). As a result, the piezoelectric effect generates a potential gradient in the quantum well layer 64b, so that a potential is low in the [0001] direction, while being high in a [000 1] direction. An energy band in the light emitting layer 64 having a quantum well structure in this case is illustrated in FIG. 43. FIG. 43 illustrates five barrier layers 64a and four quantum well layers 64b.
As shown in FIG. 43, the potential gradient exists in the quantum well layer 64b in the light emitting layer 64. Accordingly, electrons and holes which are injected as current are spatially separated from each other, as shown in FIG. 44. As a result, in the semiconductor light emitting device, luminous efficiency is reduced. Particularly in the semiconductor laser device, threshold current is raised.
When impurities are added to the quantum well layer 64b in the light emitting layer 64, the effect of decreasing the potential gradient by the movement of carriers is produced. When both p-type impurities and n-type impurities are added to the quantum well layer 64b, however, the carriers are compensated for, so that the carrier concentration is lowered. Consequently, the effect of decreasing the potential gradient by the movement of the carriers is reduced. Particularly when the respective concentrations of the p-type impurities and the n-type impurities which are added to the quantum well layer 64b are approximately equal to each other, the effect of decreasing the potential gradient by the movement of the carriers is further lowered.
Such a phenomenon also occurs in a III–V group compound semiconductor (for example, a GaInP based semiconductor, a GaAs based semiconductor, or an InP based semiconductor) other than the zinc-blende structure and the wurtzite structure, a II–VI group semiconductor, and an I–VII group semiconductor. Particularly in the nitride based semiconductor, the piezoelectric effect is great. Accordingly, the potential gradient generated by the piezoelectric effect is increased, so that the drop in luminous efficiency and the rises in threshold current and operating current become significant.

This patent is subject to a terminal disclaimer.


A gurney includes a platform connected to a frame by two pairs of X-connected arms configured to reduce the amount of power required to raise the platform from its lowest position relative to the frame. A voltage doubling circuit is provided to approximately double the voltage applied to the motor to allow the platform to be raised and lowered relatively faster than normal. A rotating shaft in an internally threaded nut moves a cross beam to raise or lower the platform. The nut has interior bearings to reduce the friction between the shaft and the nut. A detent mechanism and a brake structure provide fail-safe locking of the platform at a plurality of heights.

Power-assisted gurneys capable of transporting a patient from either the scene of an accident or from one facility to another facility, are described in U.S. Pat. Nos. 5,495,914, 5,697,471, 5,740,884, 5,887,302 and 5,983,425, all including as a co-inventor the inventor of this disclosure. Each of these patents is hereby incorporated by reference in its entirely. These patents describe various techniques for allowing the power lifting unit to raise or lower the transporter and also describe electronic controls which allow a single operator to operate the transporter. In addition, U.S. Pat. No. 5,983,425 discloses a structure which allows an electric motor to be engaged to assist in raising or lowering the transporter and disengaged to allow the transporter to be raised or lowered manually. U.S. Pat. No. 5,887,302 describes a circuit for controlling an electric motor used to raise or lower the gurney as well as to provide a jog pulse to the electric motor.
A continuing problem associated with battery-operated raisable or lowerable gurneys is the requirement that the battery associated with the drive motor used to raise or lower the gurney have both a long life and be light weight. These two requirements conflict. Thus, there is a need for a more efficient, lighter structure for raising and lowering a battery-powered gurney to extend battery life and to lower the weight of the total gurney.


Aspects of the disclosure provide for controlling an autonomous vehicle to respond to queuing behaviors at pickup or drop-off locations. As an example, a request to pick up or drop off a passenger at a location may be received. The location may be determined to likely have a queue for picking up and dropping off passengers. Based on sensor data received from a perception system, whether a queue exists at the location may be determined. Once it is determined that a queue exists, it may be determined whether to join the queue to avoid inconveniencing other road users. Based on the determination to join the queue, the vehicle may be controlled to join the queue.

Autonomous vehicles, for instance, vehicles that do not require a human driver, can be used to aid in the transport of passengers or items from one location to another. Such vehicles may operate in a fully autonomous mode where passengers may provide some initial input, such as a pickup or drop-off location, and the vehicle maneuvers itself to that location.
When a person (or user) wants to be physically transported between two locations via a vehicle, they may use any number of transportation services. To date, these services typically involve a human driver who is given dispatch instructions to a location to pick up the user. In many cases, the location may have a queue for picking up or dropping off passengers. For example, a human driver would likely know that locations such as airports and train stations typically have a queue for picking up or dropping off passengers. Further, a human driver typically knows from experience the common practices and rules of such queues, and could intuitively respond to queuing behaviors of other vehicles. As such, a human driver may be able to determine how to best reduce inconvenience to other drivers in and around the queue. This is not readily achievable in the case of autonomous vehicles which do not have a human driver.

Queueing into pickup and drop-off locations


A separator includes a rotatable drum having a vertical rotational axis, a disk stack arranged in the drum, an inner gripper and an outer gripper that do not rotate with the drum are configured to discharge mutually-separated liquid phases. A discharge line is assigned to each gripper and is arranged in an associated gripper chamber of the drum. The inner gripper includes an inner gripper shaft and the outer gripper includes an outer gripper shaft both of which shafts protrude axially from the drum. Each associated gripper chamber, with its associated gripper, revolves on different radii with respect to the rotational axis such that a chamber is formed radially between an outer circumference of the inner gripper shaft and an inner circumference of the outer gripper shaft. A fluid is insertable into the chamber through a channel, which fluid is pressable from the chamber into the gripper chambers.

The present disclosure relates to a separator including a rotatable drum having a vertical rotational axis and a disk stack arranged in the drum. Also included are an inner gripper and an outer gripper that do not rotate with the drum and are configured to discharge mutually-separated liquid phases. A discharge line is assigned to each gripper and is arranged in an associated gripper chamber of the drum. The inner gripper includes an inner gripper shaft and the outer gripper includes an outer gripper shaft both of which shafts protrude axially from the drum.
Reference is hereby made to DE 18 02 676, U.S. Pat. No. 4,417,885 and U.S. Pat. No. 5,487,720 concerning the state of the art of separators with a vertical rotational axis and two grippers or peeling discs. It is proposed in DE 18 02 676 to generate changes in flow and pressure intermittently. A tube for the supply of fluid opens into a bottom peeling chamber. An air pressure can further be decreased in the bottom peeling chamber.
A generic separator is further known from DE 10 2004 051 264 A1. A potential absorption of oxygen by the product is problematic where sensitive products such as beer are concerned. Embodiments according to the present disclosure counteract or reduce this disadvantageous effect.
Thus, the present disclosure relates to a separator including a rotatable drum having a vertical rotational axis and including a disk stack arranged in the drum. Also included are an inner gripper and an outer gripper that do not rotate with the drum and are configured to discharge mutually-separated liquid phases. A discharge line is assigned to each gripper and is arranged in an associated gripper chamber of the drum. The inner gripper includes an inner gripper shaft and the outer gripper includes an outer gripper shaft both of which shafts protrude axially from the drum. Each associated gripper chamber with its associated gripper revolves on different radii with respect to the rotational axis such that a first chamber is formed radially between an outer circumference of the inner gripper shaft and an inner circumference of the outer gripper shaft. The first chamber is configured such that a fluid is insertable into the chamber through a channel, which fluid is pressable from the first chamber into the gripper chambers. The present disclosure also relates to a method for clarifying a beverage from a flowable solids phase, the method steps comprising: providing a separator as described above; clarifying the beverage into a lighter phase using the separator; and protecting the lighter phase from oxygen contact by using an inert gas.
Accordingly, the gripper chambers with the two grippers are arranged, for example, in an annular manner coaxially relative to the rotational axis D. They may be further arranged in an axially partially offset manner with respect to each other in relation to the rotational axis D. A similarly annular chamber may be further arranged radially between the outside circumference of the inner gripper shaft and the inner circumference of the outer gripper shaft. In this chamber, a fluid, such as an inert gas, can be introduced through a channel, which gas can be pressed from the annular chamber to the gripper chambers of the rotating system.
An embodiment according to the present disclosure provides a separator with which it is easily possible to conduct an inert gas into the region of the gripper chambers in the processing of an oxygen-sensitive product in order to prevent that the product will come into contact with the oxygen in this region. In the clarification of beer from yeast, for example, the separator is especially suitable for protecting the beer as the lighter phase with the inert gas from contact with oxygen.
Although it is also known from DE 20 2007 009 212 to conduct a gas into the region of a drum head between a gripper for a lighter phase and an overflow for discharging a heavier phase, the gas is used for the purpose of displacing the separation zone in the drum. However, in accordance with an embodiment of the present disclosure, for example, it is enabled, in a constructionally simple way, to conduct an inert gas without any high pressure which could cause a displacement of the separation zone into the region between the two grippers. In accordance with an embodiment of the present disclosure, a construction with two gripper chambers and grippers which are disposed radially in a virtually "concentric" fashion with respect to each other has proved to be advantageous.
Embodiments according to the present disclosure are discussed herein and in the appended claims.
Embodiments according to the present disclosure are also shown in the enclosed drawings.
It is relevant to note that the embodiments according to the present disclosure that are shown and discussed herein are not limited to those that are shown or arranged but they can be arranged in any desired variable manner within the framework of the present disclosure. For example, the terms "above", "below", "front", "back" shall not be understood as limiting, but merely relate to a respectively shown arrangement. When individual components are explained, they can also be provided in multiple configurations. Functional reversals of the illustrated embodiments and methods described herein also are within the scope of the present disclosure.
Other aspects of the present disclosure will become apparent from the following descriptions when considered in conjunction with the accompanying drawings.
Accordingly, FIG. 2 shows a schematic sectional view of a known separator 1 which is designed for continuous operation. The separator 1 comprises a rotatable drum 2 and an integral or multi-part non-rotatable cover 3, which cover 3 may enclose the drum 2 entirely or to a substantial extent.

Apparatus and method for clarifying a beverage from a flowable solids phase


Publicly accessible linking information is to establish a trusted relationship between reciprocally linked entities controlling web resources, such as websites or web logs. A method of establishing a trust relationship between two entities identifying a user-installed link to a second web resource in a first web resource. Next, the method determines when a reciprocal link is made in the second web resource directed to the first web resource and creates a trust relationship between the entities based on the reciprocal link.

One aspect of the Internet communication which has grown significantly of late is web-logs (commonly referred to as "blogs"). Generally, blogs are personal Web sites that contain dated entries in reverse chronological order (most recent first) about a particular topic. Blogs generally function as a journal for one person or a group of contributors. Entries contain the dated entries of the owner or owning entity, commentary by a group, or the public in general, as well as multimedia content and links to other Web sites.
Many blog sites offer an RSS or ATOM syndication feed that provides headlines of their latest entries along with URLs to the content. Hence, blogs can be read in a simple Web-browsing application, or via a feed-reader application.
Many blog applications publish what is known as a "blogroll" on the front page of a blog. A blog roll is literally a list of the blogs that the blog owner reads. For example, on a personal blog, one blogger may have on his blogroll the list of his friend's blog. The blogroll is generally stored in a set of code which can be accessed programmatically, but may be stored in any format.
While some blogs invite feedback and comments from visitors, others are maintained by the discretion of the controlling entity, and can only be read by "authorized parties". An authorization process is used by the controlling entity to establish a trust relationship to allow other entities access to the private portions of the blog.


The present invention relates to a scanning system optimized for lidar that includes a nodding mirror, a rotary electromagnetic drive, a rotary optical encoder, and control circuitry. The rotary electromagnetic drive includes a yoke incorporating a permanent magnet, and an arm having a coil at one end of the arm. The coil is enclosed within the yoke, and an opposite end of the arm is coupled to the nodding mirror, such that movement of the coil within the yoke in response to a current causes the nodding mirror to rotate. The rotary optical encoder produces an output signal in response to rotation of the nodding mirror, which serves as feedback to the control circuitry. The control circuitry adjusts the current provided to the rotary electromagnetic drive in response to the output signal, such that the nodding mirror rotates in a reference scan pattern.

Light detection and ranging (lidar) is a technique for remote imaging, in which the distance of an object is measured using laser light. A typical lidar system includes a rangefinder and a scanning system. The rangefinder, typically, includes a laser with a wavelength in the ultraviolet (UV) to near-infrared (NIR) range, as well as a receiver. The distance to an object can be determined by measuring the time taken for outgoing pulses of laser light to be reflected back into the receiver, or by measuring the phase shift between an outgoing and an incoming modulated beam of laser light. The scanning system, typically, includes a mirror system for scanning the field of view of the lidar system over the area to be imaged by reflecting the outgoing and incoming laser light.
To satisfactorily image static and moving objects by lidar in applications such as autonomous vehicle operation, collision avoidance, and surveillance, accurate scanning at a high repetition rate is necessary. For instance, even for a relatively modest image resolution of 144 lines at a frame rate of 5 Hz, 720 lines per second must be acquired. Therefore, mirror systems that are capable of accurately executing a scan pattern at high angular speeds are desired.
Conventionally, two main types of mirror system are applied in scanning systems for lidar, nodding-mirror systems and polygonal-mirror systems. Nodding-mirror systems include a nodding mirror, which is, typically, a planar mirror that rotates clockwise and counterclockwise through an angular range. Polygonal-mirror systems include a polygonal mirror, which is a faceted mirror shaped as a regular polygon. The polygonal mirror can be rotated clockwise or counterclockwise through 360°.
Nodding-mirror systems offer the advantage that, provided the nodding mirror is large enough, the efficiency of the nodding mirror in collecting the reflected light into the rangefinder, hereafter referred to as collection efficiency, is near-perfect over the entire angular range. In contrast, the collection efficiency is not uniform over all angular positions of the polygonal mirror. As the outgoing light from the rangefinder approaches the edges of the facets of the polygonal mirror, the collection efficiency drops to 50%. Furthermore, owing to manufacturing errors, the dimensions of the polygonal mirror may deviate from those of a regular polygon, leading to image distortion.
However, polygonal-mirror systems offer the advantage that once the polygonal mirror is set in rotation, the angular speed of the polygonal mirror must simply be maintained. In contrast, the rotation of the nodding mirror must be periodically stopped and reversed when the nodding mirror reaches the end of the angular range. Therefore, the angular speed at which the nodding mirror can be rotated through a scan pattern is, typically, lower than that of the polygonal mirror.
In a conventional scan pattern, the nodding mirror is rotated at a constant angular speed in one direction through an angular range and then rotated as fast as possible in the opposite direction to the start of the angular range. During the segment of the scan pattern in which the nodding mirror is returning to the start of the angular range, useful data is not being collected into the rangefinder. To optimally execute such a scan pattern, the nodding mirror should ideally be capable of rotating at high angular speeds and of undergoing rapid angular acceleration.
Nodding-mirror systems with a variety of configurations have been implemented in scanning systems for lidar, but these conventional nodding-mirror system have some important limitations.
Different types of rotary drives have been used to rotate the nodding mirror in such nodding-mirror systems. Nodding-mirror systems including stepper motors are disclosed in U.S. Pat. No. 5,337,189 to Krawczyk, et al. and U.S. Pat. No. 6,650,402 to Sullivan, et al., for example. However, these nodding-mirror systems have the disadvantage that the gear mechanism of the stepper motors introduces backlash, limiting the accuracy and the angular speed of the rotation of the nodding mirror. Nodding-mirror systems including galvanometer motors are disclosed in U.S. Pat. No. 5,006,721 to Cameron, et al., U.S. Pat. No. 7,135,672 to Land, and U.S. Pat. No. 7,215,430 to Kacyra, et al., for example. However, these nodding-mirror systems have the disadvantage that the galvanometer motors provide relatively low torque, limiting the size of the nodding mirror that can be rotated.
Such nodding-mirror systems may also include different types of detectors for ascertaining the angular position of the nodding mirror. Nodding-mirror systems including angular-position sensors are disclosed in U.S. Pat. No. 4,810,088 to Karning, et al. and U.S. Pat. No. 6,262,800 to Minor, for example. Nodding-mirror systems including rotary encoders are disclosed in U.S. Pat. No. 5,231,401 to Kaman, et al., U.S. Pat. No. 6,107,770 to Jackson, et al., and U.S. Pat. No. 7,215,430 to Kacyra, et al., for example. The output signals of such detectors, typically, serve as feedback to control circuitry for controlling the rotary drive. The effectiveness of the closed-loop feedback control is limited by the accuracy and resolution of the detectors.
An object of the present invention is to overcome the shortcomings of the prior art by providing a scanning system optimized for a lidar system. As part of such a scanning system for lidar, an optimized nodding-mirror system is provided that includes a nodding mirror, a rotary electromagnetic drive, a rotary optical encoder, and control circuitry. The rotary electromagnetic drive is lightweight, yet powerful enough to rotate a nodding mirror of the size preferred for lidar systems, at high angular speeds. The absence of mechanical linkages between the stationary yoke of the rotary electromagnetic drive and the moving arm, which is coupled to the nodding mirror, eliminates the possibility of any backlash and allows the direction of torque applied to the nodding mirror to be essentially instantly reversed. The rotary optical encoder of the nodding-mirror system has a high resolution and accuracy. Moreover, the detector of the rotary optical encoder and the encoder disk, which is coupled to the nodding mirror, are free of mechanical linkages, precluding backlash. The use of such a rotary optical encoder allows very accurate closed-loop feedback control of the scan pattern of the nodding mirror through control circuitry.
The unprecedented and advantageous combination of elements in the nodding-mirror system allows a variety of scan patterns to be accurately executed by the nodding mirror. Furthermore, additional mirror systems may be included in certain embodiments of the scanning system to increase the field of view of the lidar system.
An optimized polygonal-mirror system that includes a polygonal mirror, a rotary drive, a rotary encoder, and control circuitry is also provided as part of a scanning system for lidar. Advantageously, the control circuitry of the polygonal-mirror system is configured to modify the output signal of the rotary encoder to increase the resolution of the lidar system or to compensate for manufacturing defects in the polygonal mirror.


A method, apparatus, and system for an architecture for machine learning acceleration is presented. An apparatus includes a plurality of processing elements, each including a tightly-coupled memory, and a memory system coupled to the processing elements. A global synchronization manager is coupled to the plurality of the processing elements and to the memory system. The processing elements do not implement a coherency protocol with respect to the memory system. The processing elements implement direct memory access with respect to the memory system, and the global synchronization manager is configured to synchronize operations of the plurality of processing elements through the TCMs.

Artificial Neural Networks (ANNs) are used to perform an increasing number and variety of tasks, such as, for example, object recognition, speech recognition, speech generation, providing recommendations, and predicting user behavior. Performing these tasks may be referred to as inferencing using an ANN model. To provide useful inferences, an ANN model needs to be designed and trained for the particular task. The ANN design establishes parameters such as the number of layers of the ANN model and the characteristics of each layer. The training of the ANN uses training data, inferencing using the ANN model, feedback based on evaluation of the inference, and backpropagation to adjust the weights of the ANN model in response to the feedback. After numerous training cycles of inferencing and backpropagation, the resultant model may provide satisfactory results in response to new input data. Note that many ANNs have multiple hidden layers between an input layer and an output layer and may consequently be referred to as Deep Neural Networks (DNNs).
To provide a satisfactory user experience, not only do the inference results need to be correct, but they also need to be provided fairly quickly—often within a fraction of a second (response latency within service level agreement). To do this, service providers use large arrays of inference accelerators located "in the cloud"—that is, communicatively coupled to, and located remotely from, a client device.
Client computer devices may include, for example, computers, automobiles, smartphones, smart wearable devices, and internet-of-things (IoT) devices. The so-called cloud may comprise a plurality of interconnected servers located at a data center and may be managed by a cloud provider entity such as, for example, Amazon.com, Inc. of Seattle, Wash. or Facebook, Inc., of Menlo Park, Calif. Each host server comprises a plurality of interconnected inference accelerators, which may be provided by an inference-accelerator provider entity. Each accelerator comprises processor and memory components.
The cloud may support many millions of neural network applications. A neural network application running on a client computer device communicates with the cloud to receive inference acceleration and/or assistance. For example, a speech-translation neural-network application (NNA) may transmit a raw or encoded audio snippet to the cloud for rapid translation and provision of the translation in response to the NNA. A media-recommendation program that recommends, e.g., songs or video—where the media may comprise many millions, or even billions, of options hosted by the cloud provider in the cloud—may communicate with the cloud to have the cloud perform an inference to generate a recommendation for provision to a user of the client computer device.
In the data center context, various heterogenous architectures have been employed to handle machine learning workloads. For example, cloud compute may use server-class central processing units (CPUs) or graphics processing units (GPUs) and may adapt their workloads to those architecture. However, these architectures may not be tailored to the specific characteristics of machine learning algorithms, with the effect that their performance is not as efficient as desired, and/or they consume more power to achieve a given level of performance than would be desirable. As there may be many millions of NNAs accessing the inference accelerators of the cloud at any one time, efficient inference accelerators would be beneficial for reducing power usage and/or reducing inference time.
Thus, it would be desirable to provide an inference-accelerator computing architecture that is scalable to cloud computing and data center application, while providing improved performance per watt when compared to existing server-class CPU and GPU-based solutions.

Method, apparatus, and system for an architecture for machine learning acceleration


An access control system for use with a networked computer system [10] comprises a host [14] of the networked computer system, and a bit stream whereby information is transferred from a source of said bit stream to said host [14], said bit stream bearing a routing label identifying an origin of said bit stream in the computer network. The system further comprises a word integrated with said bit stream, said word including a routing label identifying an origin of said word in the computer network, and an access control module in communication with said host, said access control module operable to make an identification, wherein the identification includes comparing the origin of said bit stream to the origin of said word.

Basic authentication access control systems for use with networked computer systems have fallen into disfavor in years past due to the ability of eavesdroppers to acquire passwords with a packet sniffer during the authorization process and later access the networked system with the stolen password. Specifically, a packet sniffer is a wire-tap device that plugs into computer networks and/or receives wireless transmissions, and eavesdrops on the network traffic. Unlike most other network devices that discard packets not addressed to them, the packet sniffer acts like a router to pick up all packets. Protocol analysis then allows it to decode the seemingly random bits of data, remove the addressing labels, and examine the contents. The persistent existence of sniffing technology has, thus, motivated a move toward access control systems with improved ability to thwart eavesdroppers.
Attempts by others to address the problems related to providing access control systems resistant to eavesdroppers have led to the development of Certificated Authorities (CA), which have become the self-lauded, self-proclaimed standard for client-host access control and authorization procedures. Specifically, a trusted third party acts like a notary using a digital signature to issue a certificate containing a public key stated to have a certain value. The recipient of the certificate decrypts the signature using the CA's public key and the algorithm the CA used to perform the encryption, computes a message digest of the certificate contents using the same algorithm used by the CA, and performs a comparison between the computed message digest and the one accompanying the certificate. A match means that the contents of the certificate have not been tampered with, and that the certificate was indeed signed by the CA. Also, based on the trust placed in the CA, the recipient determines that the public key presented in the certificate really belongs to the person named in the certificate. Unfortunately, CAs do not perform this service free of charge, and use of these authorities introduces increased expense compared to password-based systems.
In addition to increased expense, the identification process required for using these certificates can slow down the authorization process significantly. Secure Sockets Layer (SSL), for example, provides a security "handshake" using public-key cryptography for mutual identification and to uniquely generate and exchange a session key. First, the client challenges the server and transmits its choice of encryption algorithms. Second, the server returns its server certificate with an acknowledgement that it can support the algorithms chosen by the client and generates a random connection identifier. Third, the client verifies the server certificate and generates the master session key for generating client and server communication keys, encrypts the master key with the server public key, and transmits it to the server. Fourth, the server decrypts the master session key with its private server key, uses the session key to create the corresponding server key pairs, encrypts the initial client challenge phrase with the server-write key, and returns the encrypted phrase to the client. Fifth, the server requests that the client present a valid client certificate, sending the new challenge with the server-write key, and the client responds with a phrase consisting of 1) a hash of the server challenge phrase plus the client certificate, and 2) the client certificate. The phrase is digitally signed with the client's private key, and the handshake is complete.
Needless to say, all of these encryption and exchange procedures slow down the authorization process, and the degree to which the process is slowed down can have an enormous effect on speed of a server system that frequently initiates and drops connections, such as a Storage Area Network (SAN). In a SAN, for example, the speed of access of a client's stored data can be primarily dependent on the speed of the access control. In addition, the expense involved in using a trusted third party represents an additional burden. Thus, it remains the task of the present invention to provide an identification confirmation system and method for use with a networked computer system that thwarts eavesdroppers without the expense or sacrifice of speed associated with using a third party.

Access control system and method for a networked computer system