The present invention provides a signal converting apparatus with built-in self test, including a first signal converting circuit, a second signal converting circuit, a comparing apparatus, a control logic apparatus and a voltage divider. The first and the second signal converting circuit take a first and a second reference voltage and are respectively controlled by a first and second set of control signals from the control logic apparatus for the comparing apparatus to generate a comparing result.

1. Field of the Invention
The present invention relates to an analog-to-digital converter with built-in self test, and more particularly, to an analog-to-digital converter performs a mutual test between capacitor arrays to detect if the capacitor array and related circuitry conform to the desired resolution requirement, and then utilizes the capacitor array, which has been completely tested, to detect if a resistor string conforms to another resolution requirement of the analog-to-digital converter.
2. Description of the Prior Art
Regarding the test of integrated linearity error (INL) of a conventional n-bit successive approximation register analog-to-digital converter (SAR ADC), an additional ramp generator is required for the built-in self test purposes, which increases the chip area greatly. However, if an external analog testing station is alternatively employed, the test cost is increased inevitably and the test is very time-consuming.

Signal converting apparatus with built-in self test


The invention relates to a machine comprising a first machining module (1) configured to simultaneously machine at least two crankshafts, a second machining module (2) configured to simultaneously machine at least two crankshafts, and a support structure (3) with at least four crankshaft fixing positions (31, 32, 33, 34) for the machining of such crankshafts. The support structure (3) is located between the machining modules. The fixing positions (31, 32, 33, 34) are arranged in two columns (35, 36) of fixing positions, each of which comprises at least two of the fixing positions (31, 32; 33, 34) located at a different height, and the support structure (3) is rotatably arranged, such that it can perform a rotation of at least 180 degrees.

The ends of crankshafts for automotive vehicles, for example, for passenger cars, are usually machined in machines specifically designed for performing the corresponding operations. For example, the crankshafts can be arranged in a workstation located between two machining modules (each can be configured to simultaneously machine a plurality of crankshafts, generally using a tool for each crankshaft, for example, using a multi-spindle head), such that a first machining module machines one end of the crankshaft (or one end of several crankshafts) and the other machining module simultaneously machines the other end of the crankshaft (or of the crankshafts).
To achieve a high production rate and an efficient use of the machinery, it is desirable for both machining modules to work with a high performance and with a minimum downtime between operations. WO-A-2009/103825 describes an example of how to achieve the reduction of the downtime between operations in a machine for machining crankshafts.
As described in WO-A-2009/103825, it is usual for crankshafts to have two different ends, a first end which will hereinafter be referred to as "flange end" and a second end which will hereinafter be referred to as "post end". Both ends require different machining operations, whereby it is usual for the machining of one of said ends to require more time than the machining of the opposite end; it is usual for the flange end to require a substantially greater machining time than the post end, as explained in WO-A-2009/103825. In the present document, the terms "flange end" and "post end" must not be interpreted in a limiting manner, as if they refer to a specific design of the crankshafts, but rather they are used in a general manner to distinguish between two ends of a crankshaft which require different machining operations.
The solution in WO-A-2009/103825 is based on the use of two workstations, in one of which the crankshafts are arranged in a reverse manner (i.e., "rotated" 180 degrees) with respect to the crankshafts of the other one. In a described embodiment, the workstations are located between two machining module bedplates or guides, on which respective machining modules move. A first machining module can thus machine the flange ends of the crankshafts of the first workstation, to then move laterally to the second workstation to machine the post ends of the crankshafts in the second workstation. In a reverse manner, the second machining module can start by machining the post ends of the crankshafts in the first workstation, to then move to the second workstation to machine the flange ends of the crankshafts located in said second workstation. Therefore, if the time for machining the flange ends requires a time X and the machining of the post ends requires a time Y (which can many times be substantially less than X, for example, a quarter of X), the first machining module can conclude the machining work in both workstations after an approximate time of X+Y (without counting movement times, etc.), and the second machining module can conclude the machining work in both stations after a time Y+X. In other words, the cycle time can be approximately X+Y (without counting movements, delays due to loading and unloading, etc.), and during this time both machining modules can be in full performance, without any of them having to wait for a substantial time for the other one to finish its machining operation. A rather short cycle time and a good exploitation of the machinery are thus achieved.
Nevertheless, and despite the fact that the machine and method described in WO-A-2009/103825 can work satisfactorily from many points of view, they can have several limitations. For example, it may be difficult to perform the loading and unloading in the two workstations from one and the same loading and unloading point or station. Another possible limitation is that in the event of a breakdown in one of the machining modules, the machine does not allow machining both ends of the crankshafts. Another possible limitation is that it may be difficult to perform certain machining operations, which require a determined working angle between the tool-head and the crankshaft (for example, the machining of the keyway or of lightening holes), without using additional machining modules or tool-head changes.

Machine and method for machining ends of crankshafts


There are provided a speaker distance detection apparatus and method using a microphone array, capable of exactly detecting the distance between a speaker and even a small terminal such as a mobile telephone, and a speech input/output apparatus using the method. The speaker distance detection apparatus uses a microphone array composed of a plurality of microphones, previously determines a reference microphone to be a reference among a plurality of microphones, detects differences between a signal level of the reference microphone and signal levels of the other microphones, based on correlations between signals in the respective microphones, and determines the distance from the microphone array to the speaker based on the detected signal level difference.

1. Field of the Invention
The present invention relates to a speaker distance detection apparatus and method capable of detecting at which distance a speaker is uttering a speech by using a microphone array, and a speech input/output apparatus using the speaker distance detection apparatus.
2. Description of the Related Art
With the recent rapid advancement of a computer technique, mobile telephones, portable terminals, and the like as communication equipment are being enhanced in function or decreased in size. In particular, even various kinds of applications using a speech, which used to be difficult to be put into practical use in terms of a computer processing load, are shifting from a commercialization stage to a stage requesting convenience.
Recently, a speech input/output apparatus is also being put into practical use, which is capable of detecting an utterance direction of a speaker who utters a speech by using a plurality of microphones to enhance directivity, thereby making it difficult to pick up environmental noise.
However, particularly, in a mobile telephone, and the like, the recognition precision with respect to a speech input is often influenced by environmental noise. Therefore, in order to enhance the recognition precision, there is no effective way other than inputting a speech with a handset placed close to a face.
Recently, a technique has been developed, in which the distance between a speaker and a mobile telephone is detected by providing an infrared sensor, etc. at the mobile telephone, and estimating the level of recognition precision in accordance with the distance, thereby changing recognition engines, and changing methods for outputting recognition results. Such a technique is disclosed in JP 6(1994)-124097 A, JP 9(1997)-162772 A, JP 2002-111801 A, and the like.
However, the above-mentioned method has the following problems. First, even in the case of detecting the distance between a speaker and a mobile telephone, and using a recognition engine in accordance with the detected distance, in actual, a recognition mode is often switched manually. Therefore, when a speaker utters a speech while frequently placing a handset close to or away from a face, the switching operation itself is cumbersome.
Furthermore, even in the case where a recognition engine is switched automatically, when a speaker utters a speech while frequently placing a handset close to or away from a face, a time difference is necessarily caused between the actual state and the switching of the recognition engine. Consequently, the use mode of the mobile telephone is not matched with the recognition mode, and a speech input/output level becomes inappropriate, which makes it impossible to ensure desired recognition precision.
Furthermore, in order to detect the distance between the speaker and the mobile telephone, it is required to provide other sensor configurations such as an infrared sensor. However, there is a physical constraint on a mobile telephone that is strongly requested to be miniaturized, so that it is actually difficult to provide such a sensor configuration.

Speaker distance detection apparatus using microphone array and speech input/output apparatus


A programmable controller suitable for use in a globally distributed automation network. In addition, a universal management engineering and information system for such a globally distributed automation network is described. It is used in a globally distributed automation network.

A programmable controller is described in Siemens Catalog ST 70, 1995. With a programming unit, a user creates a program for controlling an industrial process, including software function blocks, e.g., in the form of organization blocks, program blocks and entity data blocks. The programmable controller is connected to the programming unit by a bus system over which the programming unit transmits the control program to the programmable controller. Furthermore, an operating and monitoring device which is provided for process management can also be connected to the bus system, making it possible to display process images that incorporate multiple image objects.
It is frequently necessary for software function blocks of a control program to be transmitted from a programmable controller of a manufacturing site or from a software pool of this manufacturing site to a programmable controller of another manufacturing site. In particular, when the manufacturing sites are a great distance apart, e.g., because of globalization of manufacturing activities, these software function blocks are transmitted over the Internet, a global network. This requires servers with suitable communications interfaces which permits the use of the Internet communications protocol as well as the communications protocol of the programmable controller. On the basis of these different protocols and the architecture of the programmable controller, it is impossible to tie in the software function blocks while the control program is running, especially when programmable controllers of different manufacturers are to be supplied with these software function blocks.
An object of the present invention is to create a programmable controller which is suitable for use in a globally distributed automation network.
In addition, a universal management engineering system is created in the form of a programming unit and an operating and monitoring device for a globally distributed automation network and also to create a management engineering and information system in the form of workstations and database servers.

This patent is subject to a terminal disclaimer.


A process id disclosed for upgrading tars, typically those resulting from hydrocarbon refining processes, to products suitable for other uses, such as blending with other hydrocarbons to provide low-sulfur fuel oils or Emission Control Area-acceptable fuels. A low-sulfur hydrocarbon product obtained from the process is also disclosed.

Disposition of steam cracked tar (SCT) has been a long-standing challenge for steam cracking operations. A typical steam cracking process can be expected to generate a few weight percent to 20 wt. % of tar. Decades of research has investigated various options for upgrading tar to more valuable dispositions and to reduce tar yield. For example, tar can be converted to syngas. SCT as boiler fuel is another relatively high value disposition, but the demand for boiler fuel is limited, and so only a small amount of tar can be processed that way. Power/electricity generation has also been considered. The amount of power generated from SCT far exceeds the power need of the cracker, making it necessary to sell electricity into highly-regulated markets. SCT has also been proposed as a carbon black feedstocks (CBFS), but again there is concern whether CBFS economics can support the use of commercial quantities of tar (e.g., more than about 550,000 tonnes per year). Furthermore, CBFS has a low sulfur specification of about 1 wt. %. Since SCT contains a significant amount of the steam cracker feed's sulfur, stringent CBFS sulfur specifications lead to an undesirable limitation on steam cracker feed selection.
Direct blending of tar into fuel oil has also been considered. Unfortunately, SCT-fuel oil compatibility issues typically result in a precipitation of SCT asphaltenes in the blend. Although tar can be blended into the high sulfur fuel oil ("HSFO") pool, typically a large amount of higher-value flux, e.g., gas oil in a flux amount of 40% or more, is needed to sufficiently reduce SCT viscosity for HSFO blending.
Therefore, there are strong business drivers for finding more attractive, and ideally more broadly applicable, SCT dispositions, e.g., those involving SCT hydroprocessing. For example, SCT hydroconversion has been attempted at a typical temperature range from 250° C. to 380° C. The conventional hydroconversion process with SCT encountered significant deactivation of catalysts due to catalyst fouling. As a result, there remains a need for an improved process for hydroconverting SCT, as well as other tars.


An indicator including an indicator product that is adapted to change visual appearance, an indicator scale in near adjacency to the indicator product including substantially all of the visual appearances that the indicator product can display and a binary scale in near adjacency with the indicator product and the indicator scale. A package adapted to contain a product is also disclosed including a container for holding the product with an indicator secured to the container. Associated methods of (i) determining whether a product in a package is acceptable; (ii) packaging a product; and (iii) making an indicator label are also disclosed.

This invention relates to an indicator, an associated package and associated methods.
Indicators useful for telling whether a product (such as a food product) has been exposed to high temperature or undesirably long shelf time or both are known. See, U.S. Pat. No. 3,999,946. Generally, these indicators involve providing a label that changes colors in order to indicate these undesirable occurrences. The label color then is matched to a chart or a table that shows the different possible colors. The color of the label is compared to a complementary color on the chart to see if the product is acceptable.
U.S. Pat. No. 4,538,926 shows a temperature indicator for use with wine in which the indicator is adjacent to a scale having red and violet colors. The scale acts as a thermometer, telling the user whether the environmental temperature is too hot or too cold for the wine.
Despite the availability of these products, there is still a need for an easy to use indicator that gives the consumer a clear acceptable/unacceptable indication of the freshness or suitability of products contained in a package. The indicator should also remove all "guess-work" or judgment from the consumer with regard to whether the product contained in the package is acceptable or not.

Indicator, an associated package and associated methods


A liquid crystal display comprising an upper substrate having the inner surface on which an upper electrode and an upper grating film having surface undulation are laminated; a lower substrate having the inner surface on which a lower electrode and a lower grating film having surface undulation are laminated, the said inner surface of the lower substrate being located facing the inner surface of the upper substrate; and the liquid crystal having dielectric anisotropy which is sealed in the space between the upper substrate and the lower substrate is presented. The liquid crystal display may accomplish wide viewing angles and high contrast ratio.

The liquid crystal display ("LCD") has already been a leader of information display devices and its market occupation ratio is very high. It has advantages of low power consumption and light weight. But it has drawbacks of narrow viewing angles and low speed response in comparison with the cathode ray tube ("CRT"). These drawbacks have not yet been resolved. Among these drawbacks of the LCD, the issue of narrow viewing angles is a particularly fatal problem as the size of the display panel is becoming larger and larger. To solve this problem of narrow viewing angles, the following methods have been introduced.
First, there is the in-plane switching ("IPS") method for driving the liquid crystal by forming electrodes on only one side of the liquid crystal substrate to improve the characteristics of the viewing angles. This method is the one utilizing the configuration of the electrodes. According to this method, the dark state is obtained if no electric field is applied under the condition that the liquid crystal is aligned in parallel to the substrate and the optic axis of the liquid crystal is coincident with one of the polarizers (one of which is perpendicular to the other). The bright state is obtained when the electric field is applied. According to this method, wide viewing angles may be obtained because the change in the average optic axis occurs on a plane that is parallel to the surface of substrate. However, the response time becomes longer than the response time of the LCD in twisted nematic (TN) mode because twisted distortions occurs mostly. Furthermore, the aperture ratio is low in this method because the electrodes are formed on only one side of the substrate. In addition, the production yield is also low because the default in relation to the alignment occurs frequently.
Second, there is a method to obtain wide viewing angles utilizing an alignment structure of the liquid crystal. For example, the structure of an optically self-compensating Pi (π) cell has been introduced. In this structure, the thickness of a liquid crystal cell is determined so that there would be a phase lag of a half wavelength from the light projected vertically to the substrate when the initial director of the liquid crystal is maintained. The liquid crystal is aligned to form an angle of 45° between the direction of liquid crystal molecules projected on the substrate and the optic axis of the polarizer. In this way, the double refraction of the tilted incident light becomes less than that of the vertically incident light. Therefore, the viewing angles are made relatively wider in the off state. However, this method has the difficulty of controlling the alignment properties precisely.
Another example is a method utilizing the reverse TN effect, i.e., the homeotropic to twisted-planar (HTP) transition effect, by applying voltage in an initial state of the vertical alignment. In this method, a chiral dopant and a nematic liquid crystal which has negative dielectric anisotropy are used. According to this method, a high transmissivity is obtained because of the driving mechanism which is reciprocal to that for the general TN. A perfect dark state can be obtained between the two perpendicular polarizers at the off state. Thus, high contrast ratio and superior viewing angles may be obtained in comparison to the general TN. However, symmetric viewing angles still cannot be obtained in the on state.
Third, there is a commonly used method of utilizing an optical compensation film. In this method, the change in double refraction dependent upon the azimuthal angle is compensated by an uniaxial optical compensation film because the TN-LCD has a structurally asymmetric property at the time of driving. However, this method has problems because color dispersion is caused by the wavelength-dependent refraction dispersion of the liquid crystal and because the manufacturing process is complex and the production cost is high.
In addition to the above-mentioned methods, several methods which improve the viewing angle characteristics by inducing the change of the optic axis in different domains of a unit pixel using the multi-domain (MD) alignment are known. For example, the MD-TN (Multi-Domain twisted nematic) method obtains the symmetrical viewing angle dependent upon the azimuthal angle by dividing each pixel into four multi-domains and by causing the direction of the distortion of the nematic liquid crystal to be different in each domain. However, this method also has a shortcoming because the manufacturing process is complex since different rubbing processes of different directions are required for multi-domains and, thus, the production yield is low and the production cost is high. Furthermore, the reproducibility is low because of the defects that arise on a boundary of each domain during the driving.
As a similar method to the MD-TN, the MD-VA (multi-domain vertical alignment) method is known. In this method, the initial aligning direction is maintained to be vertical in each domain of a unit pixel. Thus, the light leakage is very low in the off state and the contrast ratio is high. However, this method has also problems, as with the MD-TN method, because each domain must go through the rubbing process of a different direction for each of the domains. The manufacturing process is complex because several alignment processes should be applied. Furthermore, defects may occur on a boundary of each domain during the driving.
Another method, the a-TN (amorphous twisted-nematic) method, is also known. It is a technique for improving the viewing angles by forming very small domains of arbitrary aligning directions in a unit pixel without rubbing processes. This method has an advantage in that the manufacturing process is very simple. However, it is practically impossible to control sizes of the small domains because the small domains are formed in arbitrary sizes. Further, the reproducibility is low.
The recently proposed ASM (axially symmetric aligned microcell) method obtains the circularly symmetric viewing angles by mixing the liquid crystal with polymer and using the phase separation in each pixel. In this method, it is possible to obtain uniform alignment of the liquid crystal on a large area without rubbing processes. However, there is a problem regarding the reliability of polymer. Furthermore, the precise control of the phase separation is difficult and the manufacturing process is complex. Thus, this method cannot be applied to mass production of LCDs.

Liquid crystal displays with multi-domain effect formed by surface undulations


A power plant having a gas turbine and having a heat recovery steam generator installed downstream of the gas turbine in the direction of flow of an exhaust gas, wherein the heat recovery steam generator includes heating surfaces of a high pressure section, of an intermediate pressure section and of a low pressure section, wherein an exhaust gas recirculation line branches from the heat recovery steam generator downstream of an evaporator in the flow direction of an exhaust gas in the high pressure section and opens again into the heat recovery steam generator upstream of the heating surfaces. A blower is arranged in the exhaust gas recirculation line, with a steam feed opening into the exhaust gas recirculation line downstream of the blower in the direction of flow of a recirculated exhaust gas. A method operates a power plant of this kind.

For low-emission and lifetime-saving start-up of modern gas and steam turbine plants and for other transient processes, the heat recovery steam generator (HRSG) is kept momentarily at certain partial load points for heating up. On the one hand, this prolongs the start-up time of the power plants and thus leads to high fuel consumption with low efficiency of power generation and, on the other hand, the gas turbine is operated at a high emission level (carbon monoxide) for a long time as a result.
The heat recovery steam generator simply requires a certain time (>15 minutes) to reach sufficiently high temperatures in the pressure stages and upstream of any carbon monoxide catalyst located in the plant.
EP 3011144 A2 discloses a solution to the stated problem, in which water/deionized water is injected into the inflow hood of the heat recovery steam generator, wherein an exhaust gas temperature is reduced by the evaporation of the injected water/deionized water. One disadvantage of this system is the additional deionized water/water consumption. Another disadvantage is the significant reduction in the efficiency of the power plant (massive reduction in the exhaust gas enthalpy with a moderate increase in the exhaust gas mass flow) and the increase in the pressure loss on the exhaust gas side.
An alternative solution is to inject cold additional air into the inflow hood of the heat recovery steam generator. The disadvantage of this solution is that all pressure stages of the heat recovery steam generator are affected, which can lead to a possible overload of the medium-pressure and low-pressure sections of the heat recovery steam generator. Another disadvantage, as with the first solution, is the loss of efficiency of the power plant. In addition, the pressure loss on the exhaust gas side will increase and possibly reach the design values.
Methods that work with a reduction of the gas turbine exhaust gas temperature (ATK) lead to massive power and efficiency losses, as well as to a higher CO load during start-up.
In addition to the control of the exhaust gas temperature, the steam temperature control in the heat recovery steam generator by means of an injection cooler in interaction with the exhaust gas temperature is also problematic with regard to power plant efficiency as well as boiler service life.
US 2006/0162315 A1 discloses a power plant in which a portion of the exhaust gas is removed at one point in the heat recovery steam generator and recirculated to its inlet.

Steam injection into the exhaust gas recirculation line of a gas and steam turbine power plant


Method, apparatus, and systems for extracting features from face regions and auxiliary identification regions of images are described. In one aspect, a face region containing at least a portion of a person's face is detected in an input image. An auxiliary identification region outside the face region is identified in the input image. Facial features characterizing the face region are determined. Auxiliary identification features characterizing the auxiliary identification region are calculated. An indexing datum is derived from the facial features and the auxiliary identification features. The indexing datum is stored in association with the input image.

Face recognition techniques oftentimes are used to locate, identify, or verify one or more persons appearing in images in an image collection. In a typical face recognition approach, faces are detected in the images; the detected faces are normalized; features are extracted from the normalized faces; and the identities of persons appearing in the images are identified or verified based on comparisons of the extracted features with features that were extracted from faces in one or more query images or reference images. Many automatic face recognition techniques can achieve modest recognition accuracy rates with respect to frontal images of faces that are accurately registered. When applied to other facial views or to poorly registered facial images, however, these techniques fail to achieve acceptable recognition accuracy rates.
What are needed are systems and methods that are capable of recognizing persons in images even with respect to non-frontal images of faces and poorly registered facial images.

Extracting features from face regions and auxiliary identification regions of images for person recognition and other applications

Hewlett-Packard Development Company, L.P.


A method for enabling recovery from concurrent failure of a plurality of storage devices in a storage array is disclosed. The method stores data on a first plurality of storage devices of the storage array. The first plurality of storage devices may have a number of storage devices equal to a prime number greater then three. Row parity is stored on one or more storage devices of the storage array. A diagonal parity set is computed for the plurality of storage devices. The diagonal parity set is stored on an additional diagonal parity device, the diagonal parity device separate from the first plurality of storage devices.

A storage system typically comprises one or more storage devices into which data may be entered, and from which data may be obtained, as desired. The storage system may be implemented in accordance with a variety of storage architectures including, but not limited to, a network-attached storage environment, a storage area network and a disk assembly directly attached to a client or host computer. The storage devices are typically disk drives, wherein the term "disk" commonly describes a self-contained rotating magnetic media storage device. The term "disk" in this context is synonymous with hard disk drive (HDD) or direct access storage device (DASD).
The disks within a storage system are typically organized as one or more groups, wherein each group is operated as a Redundant Array of Independent (or Inexpensive) Disks (RAID). Most RAID implementations enhance the reliability/integrity of data storage through the redundant writing of data "stripes" across a given number of physical disks in the RAID group, and the appropriate storing of redundant information with respect to the striped data. The redundant information enables recovery of data lost when a storage device fails.
In the operation of a disk array, it is anticipated that a disk can fail. A goal of a high performance storage system is to make the mean time to data loss (MTTDL) as long as possible, preferably much longer than the expected service life of the system. Data can be lost when one or more disks fail, making it impossible to recover data from the device. Typical schemes to avoid loss of data include mirroring, backup and parity protection. Mirroring is an expensive solution in terms of consumption of storage resources, such as disks. Backup does not protect data modified since the backup was created. Parity schemes are common because they provide a redundant encoding of the data that allows for a single erasure (loss of one disk) with the addition of just one disk drive to the system.
Parity protection is used in computer systems to protect against loss of data on a storage device, such as a disk. A parity value may be computed by summing (usually modulo 2) data of a particular word size (usually one bit) across a number of similar disks holding different data and then storing the results on an additional similar disk. That is, parity may be computed on vectors 1-bit wide, composed of bits in corresponding positions on each of the disks. When computed on vectors 1-bit wide, the parity can be either the computed sum or its complement; these are referred to as even and odd parity respectively. Addition and subtraction on 1-bit vectors are both equivalent to exclusive-OR (XOR) logical operations. The data is then protected against the loss of any one of the disks, or of any portion of the data on any one of the disks. If the disk storing the parity is lost, the parity can be regenerated from the data. If one of the data disks is lost, the data can be regenerated by adding the contents of the surviving data disks together and then subtracting the result from the stored parity.
Typically, the disks are divided into parity groups, each of which comprises one or more data disks and a parity disk. A parity set is a set of blocks, including several data blocks and one parity block, where the parity block is the XOR of all the data blocks. A parity group is a set of disks from which one or more parity sets are selected. The disk space is divided into stripes, with each stripe containing one block from each disk. The blocks of a stripe are usually at the same locations on each disk in the parity group. Within a stripe, all but one block are blocks containing data ("data blocks") and one block is a block containing parity ("parity block") computed by the XOR of all the data. If the parity blocks are all stored on one disk, thereby providing a single disk that contains all (and only) parity information, a RAID-4 implementation is provided. If the parity blocks are contained within different disks in each stripe, usually in a rotating pattern, then the implementation is RAID-5. The term "RAID" and its various implementations are well-known and disclosed in A Case for Redundant Arrays of Inexpensive Disks (RAID), by D. A. Patterson, G. A. Gibson and R. H. Katz, Proceedings of the International Conference on Management of Data (SIGMOD), June 1988.
As used herein, the term "encoding" means the computation of a redundancy value over a predetermined subset of data blocks, whereas the term "decoding" means the reconstruction of a data or parity block by the same process as the redundancy computation using a subset of data blocks and redundancy values. If one disk fails in the parity group, the contents of that disk can be decoded (reconstructed) on a spare disk or disks by adding all the contents of the remaining data blocks and subtracting the result from the parity block. Since two's complement addition and subtraction over 1-bit fields are both equivalent to XOR operations, this reconstruction consists of the XOR of all the surviving data and parity blocks. Similarly, if the parity disk is lost, it can be recomputed in the same way from the surviving data.
Parity schemes generally provide protection against a single disk failure within a parity group. These schemes can also protect against multiple disk failures as long as each failure occurs within a different parity group. However, if two disks fail concurrently within a parity group, then an unrecoverable loss of data is suffered. Failure of two disks concurrently within a parity group is a fairly common occurrence, particularly because disks "wear out" and because of environmental factors with respect to the operation of the disks. In this context, the failure of two disks concurrently within a parity group is referred to as a "double failure".
A double failure typically arises as a result of a failure of one disk and a subsequent failure of another disk while attempting to recover from the first failure. The recovery or reconstruction time is dependent upon the level of activity of the storage system. That is, during reconstruction of a failed disk, it is possible that the storage system remain "online" and continue to serve requests (from clients or users) to access (i.e., read and/or write) data. If the storage system is busy serving requests, the elapsed time for reconstruction increases. The reconstruction process time also increases as the size and number of disks in the storage system increases, as all of the surviving disks must be read to reconstruct the lost data. Moreover, the double disk failure rate is proportional to the square of the number of disks in a parity group. However, having small parity groups is expensive, as each parity group requires an entire disk devoted to redundant data.
Another failure mode of disks is media read errors, wherein a single block or sector of a disk cannot be read. The unreadable data can be reconstructed if parity is maintained in the storage array. However, if one disk has already failed, then a media read error on another disk in the array will result in lost data. This is a second form of double failure.
Accordingly, it is desirable to provide a technique that withstands double failures. This would allow construction of larger disk systems with larger parity groups, while ensuring that even if reconstruction after a single disk failure takes a long time (e.g., a number of hours), the system can survive a second failure. Such a technique would further allow relaxation of certain design constraints on the storage system. For example, the storage system could use lower cost disks and still maintain a high MTTDL. Lower cost disks typically have a shorter lifetime, and possibly a higher failure rate during their lifetime, than higher cost disks. Therefore, use of such disks is more acceptable if the system can withstand double disk failures within a parity group.
It can easily be shown that the minimum amount of redundant information required to correct a double failure is two units. Therefore, the minimum number of parity disks that can be added to the data disks is two. This is true whether the parity is distributed across the disks or concentrated on the two additional disks.
A known double failure correcting parity scheme is an EVENODD XOR-based technique that allows a serial reconstruction of lost (failed) disks. EVENODD parity requires exactly two disks worth of redundant data, which is optimal. According to this parity technique, all disk blocks belong to two parity sets, one a typical RAID-4 style XOR computed across all the data disks and the other computed along a set of diagonally adjacent disk blocks. The diagonal parity sets contain blocks from all but one of the data disks. For n data disks, there are n−1 rows of blocks in a stripe. Each block is on one diagonal and there are n diagonals, each n−1 blocks in length. Notably, the EVENODD scheme only works if n is a prime number. The EVENODD technique is disclosed in an article of IEEE Transactions on Computers, Vol. 44, No. 2, titled EVENODD: An Efficient Scheme for Tolerating Double Disk Failures in RAID Architectures, by Blaum et al, Feb., 1995. A variant of EVENODD is disclosed in U.S. Pat. No. 5,579,475, titled Method and Means for Encoding and Rebuilding the Data Contents of up to Two Unavailable DASDs in a DASD Array using Simple Non-Recursive Diagonal and Row Parity, by Blaum et al., issued on Nov. 26, 1996. The above-mentioned article and patent are hereby incorporated by reference as though fully set forth herein.
The EVENODD technique utilizes a total of p+2 disks, where p is a prime number and p disks contain data, with the remaining two disks containing parity information. One of the parity disks contains row parity blocks. Row parity is calculated as the XOR of all the data blocks that are at the same position in each of the data disks. The other parity disk contains diagonal parity blocks. Diagonal parity is constructed from p−1 data blocks that are arranged in a diagonal pattern on the data disks. The blocks are grouped into stripes of p−1 rows. This does not affect the assignment of data blocks to row parity sets. However, diagonals are constructed in a pattern such that all of their blocks are in the same stripe of blocks. This means that most diagonals "wrap around" within the stripe, as they go from disk to disk.
Specifically, in an array of n×(n−1) data blocks, there are exactly n diagonals each of length n−1, if the diagonals "wrap around" at the edges of the array. The key to reconstruction of the EVENODD parity arrangement is that each diagonal parity set contains no information from one of the data disks. However, there is one more diagonal than there are blocks to store the parity blocks for the diagonals. That is, the EVENODD parity arrangement results in a diagonal parity set that does not have an independent parity block. To accommodate this extra "missing" parity block, the EVENODD arrangement XOR's the parity result of one distinguished diagonal into the parity blocks for each of the other diagonals.
FIG. 1 is a schematic block diagram of a prior art disk array 100 that is configured in accordance with the conventional EVENODD parity arrangement. Each data block Dab belongs to parity sets a and b, where the parity block for each parity set is denoted Pa. Note that for one distinguished diagonal (X), there is no corresponding parity block stored. This is where the EVENODD property arises. In order to allow reconstruction from two failures, each data disk must not contribute to at least one diagonal parity set. By employing a rectangular array of n x (n−1) data blocks, the diagonal parity sets have n−1 data block members. Yet, as noted, such an arrangement does not have a location for storing the parity block for all the diagonals. Therefore, the parity of the extra (missing) diagonal parity block (X) is recorded by XOR'ing that diagonal parity into the parity of each of the other diagonal parity blocks. Specifically, the parity of the missing diagonal parity set is XOR'd into each of the diagonal parity blocks P4 through P7 such that those blocks are denoted P4X-P7X.
For reconstruction from the failure of two data disks, the parity of the diagonal that does not have a parity block is initially recomputed by XOR'ing all of the parity blocks. For example, the sum of all the row parities is the sum of all the data blocks. The sum of all the diagonal parities is the sum of all the data blocks minus the sum of the missing diagonal parity block. Therefore, the XOR of all parity blocks is equivalent to the sum of all the blocks (the row parity sum) minus the sum of all the blocks except the missing diagonal, which is just a parity of the missing diagonal. Actually, n−1 copies of the missing diagonal parity are added into the result, one for each diagonal parity block. Since n is a prime number greater than two, n−1 is even, resulting in the XOR of a block with itself an even number of times, which results in a zero block. Accordingly, the sum of the diagonal parity blocks with the additional missing parity added to each is equal to the sum of the diagonal parity blocks without the additional diagonal parity.
Next, the missing diagonal parity is subtracted from each of the diagonal parity blocks. After two data disks fail, there are at least two diagonal parity sets that are missing only one block. The missing blocks from each of those parity sets can be reconstructed, even if one of the sets is the diagonal for which there is not a parity block. Once those blocks are reconstructed, all but one member of two of the row parity sets are available. This allows reconstruction of the missing members of those rows. This reconstruction occurs on other diagonals, which provides enough information to reconstruct the last missing blocks on those diagonals. The pattern of reconstructing alternately using row then diagonal parity continues until all missing blocks have been reconstructed.
Since n is prime, a cycle is not formed in the reconstruction until all diagonals have been encountered, hence all the missing data blocks have been reconstructed. If n were not prime, this would not be the case. If both parity disks are lost, a simple reconstruction of parity from data can be performed. If a data disk and the diagonal parity disk are lost, a simple RAID-4 style reconstruction of the data disk is performed using row parity followed by reconstruction of the diagonal parity disk. If a data disk and the row parity disk are lost, then one diagonal parity may be computed. Since all diagonals have the same parity, the missing block on each diagonal can subsequently be computed.
Since each data block is a member of a diagonal parity set, when two data disks are lost (a double failure), there are two parity sets that have lost only one member. Each disk has a diagonal parity set that is not represented on that disk. Accordingly, for a double failure, there are two parity sets that can be reconstructed. EVENODD also allows reconstruction from failures of both parity disks or from any combination of one data disk and one parity disk failure. The technique also allows reconstruction from any single disk failure.
Although the EVENODD technique is optimal in terms of the amount of parity information, the amount of computation required for both encoding and decoding is only asymptotically optimal. This is because of the extra computation required to add the missing diagonal parity into each of the diagonal parity blocks. That is, the p−1 blocks in a stripe are not enough to hold the p parity blocks generated from the p diagonals. To overcome this, the EVENODD technique requires that the parity of one of the diagonals be XOR'd into the parity blocks of all the other diagonals, thereby increasing computational overhead.
In general, all diagonal parity blocks must be updated for any small write operation to a data block along the diagonal that has no direct parity block. Extra computation is also needed for a large write operation. As used herein, a "large-write" operation involves rewriting of all the blocks of a stripe, whereas a "small-write" operation involves modification of at least one data block and its associated parity.

Row-diagonal parity technique for enabling efficient recovery from double failures in a storage array


A hose 10 of the invention includes an outer hose member 12 composed of a rubber and an inner hose member 14 composed of a resin. A pair of projection ring elements 26 formed on opposite ends of the inner hose member 14 are received in a pair of inner circumferential grooves 24 formed in thick-walled tube elements 18 of the outer hose member 12. The projection ring elements extend the inner circumferential grooves 24 with such dilatation and deformation of the concavity of the inner circumferential grooves 24 enabling the thick-walled tube elements 18 to generate forces acting along the concavity of the inner circumferential grooves 24. Such forces are applied as pressing forces against the projection ring elements 26. The thick wall of the thick-walled tube elements 18 enables the pressing forces to be maintained while the projection ring elements 26 are retained in the inner circumferential grooves 24.

1. Field of the Invention
The present invention relates to a hose, connected to an external member, that provides a fluid flow path and defines an inner-hose flow path connecting with the flow path of the external member, and also to a method of manufacturing such a hose. More specifically, the present invention relates to a novel approach for interconnecting an outer hose member, composed of a rubber, with an inner hose member composed of a resin, as well as to a method of manufacturing the hose.
2. Description of the Prior Art
Recently, use of hose members having high gasoline vapor barrier properties have recently gone into fuel flow path applications, for example, in a vehicle. FIG. 10 shows a conventional fuel hose structure. An inner hose member 200 is substantially concentrically arranged inside an outer hose member 100 composed of a resin. An external member, such as a pipe 300, is connected to an end of the hose structure with that connection being implemented by interposing a separate sealing member 400 between an end portion 201 of the inner hose member 200 and the external member 300. The outer hose member 100 is then clamped about the inner hose member 200 and the sealing member 400 using a clamping ring element 402. Alternatively, the end portion of the outer hose member 100 may be extended along its axis so that a portion can be turned to lie inside the end portion 201 of the inner hose member 200. In this case, the turned end portion of the outer hose member 100 works in place of the separate sealing member 400.
The conventional hose, however, has several problems as discussed below.
First, however, the conventional hose structure is connected to the external member 300 by interposing the separate sealing member 400 between the inner hose member 200 and the external member 300, or turning part of an extended end portion of the outer hose member 100 inside the inner hose member 200, the process of assembly becomes rather complicated and time-consuming. Next, the outer hose member 100 can be secured directly to the external member 300. In such a case, the end portion 201 of the inner hose member 200 does not reach the end portion of the external member 300. Further, such a structure results in relatively loose fit between the inner hose member 200 and the outer hose member 100. Consequently, there are insufficient sealing properties between the outer hose member 100 and the inner hose member 200, and this condition is, thereby, impractical.

Hose structure and method of manufacturing the same


The new hairbrush system employs a handle made of curved rods that collapse into the body of the brush via tracks, turning it into a non-electric hair roller for setting and smoothing hair. The barrel of the brush system has curved bristles that grip hair and curved slits that allow for airflow. The carbon fiber (or equivalent) body provides for a lightweight yet sturdy tool that can effectively be used as a brush (without collapsed handle) when not being used as a roller (with collapsed handle).

The present invention relates, generally, to the field of hairbrushes, and, specifically, to hairbrushes having collapsible, retractable handles that enable use of a single tool for all stages of styling. It is known that hairbrushes are an essential and ubiquitous tool in hair care and styling. It is also known that ceramic brushes and rollers are extremely effective in smoothing and styling hair. However, it has not been possible for personal users and stylists to seamlessly brush, dry and set hair into rollers without interference from projecting handles or the hassle and risk of loss in managing removable handles. The new hairbrush system functions differently in comparison to a standard round brush, round brush with removable handle, or standard curler.
Hairbrushes having removable or repositionable handles exist for personal use, as well as by professionals, and are generally designed to better enable ease of use with one's right or left hand (as disclosed in U.S. patent Ser. No. 12/460,388, Hair Brush With Slideable Brush Head) and are not designed with additional necessary features to enable use of the barrel as a roller.
There also exist various types of "compact" or "compactable" hairbrushes, such as those designed for convenience of transportation in one's purse. These designs generally include a mechanism for bristle retraction (such as that disclosed in U.S. patent Ser. No. 12/419,613, Hair Brush With Retractable Bristles) or for another form of bristle protection (such as that disclosed in U.S. patent Ser. No. 07/425,337). These are unrelated to the present invention and do not serve or attempt to serve the purpose of enabling one to seamlessly brush, dry and set hair into rollers.


Disclosed are embodiments of a system, methods and mechanism for management and translation of mapping between logical sequencer addresses and physical or logical sequencers in a multi-sequencer multithreading system. A mapping manager may manage assignment and mapping of logical sequencer addresses or pages to actual sequencers or frames of the system. Rationing logic associated with the mapping manager may take into account sequencer attributes when such mapping is performed Relocation logic associated with the mapping manager may manage spill and fill of context information to/from a backing store when re-mapping actual sequencers. Sequencers may be allocated singly, or may be allocated as part of partitioned blocks. The mapping manager may also include translation logic that provides an identifier for the mapped sequencer each time a logical sequencer address is used in a user program. Other embodiments are also described and claimed.

1. Technical Field
The present disclosure relates generally to information processing systems and, more specifically, to logical sequencer address translation and management in a multi-sequencer system.
2. Background Art
In order to increase performance of information processing systems, such as those that include microprocessors, both hardware and software techniques have been employed. On the hardware side, microprocessor design approaches to improve microprocessor performance have included increased clock speeds, pipelining, branch prediction, super-scalar execution, out-of-order execution, and caches. Many such approaches have led to increased transistor count, and have even, in some instances, resulted in transistor count increasing at a rate greater than the rate of improved performance.
Rather than seek to increase performance strictly through additional transistors, other performance enhancements involve software techniques. One software approach that has been employed to improve processor performance is known as "multithreading." In software multithreading, an instruction stream may be divided into multiple instruction streams that can be executed concurrently. Alternatively, multiple independent software streams may be executed in concurrently.
In one approach, known as time-slice multithreading or time-multiplex ("TMUX") multithreading, a single processor switches between threads after a fixed period of time. In still another approach, a single processor switches between threads upon occurrence of a trigger event, such as a long latency cache miss. In this latter approach, known as switch-on-event multithreading ("SoEMT"), only one thread, at most, is active at a given time.
Increasingly, multithreading is supported in hardware. For instance, in one approach, processors in a multi-processor system, such as a chip multiprocessor ("CMP") system, may each act on one of the multiple software threads concurrently. In another approach, referred to as simultaneous multithreading ("SMT"), a single physical processor is made to appear as multiple logical processors to operating systems and user programs. For SMT, multiple software threads can be active and execute concurrently on a single processor without switching. That is, each logical processor maintains a complete set of the architecture state, but many other resources of the physical processor, such as caches, execution units, branch predictors, control logic and buses are shared. For SMT, the instructions from multiple software threads thus execute concurrently on each logical processor.
For a system that supports concurrent execution of software threads, such as SMT and/or CMP systems, an operating system application may control scheduling and execution of the software threads on thread execution resource(s). For a system that, instead, allows a user to explicitly control software threads via user-level instructions, such instructions may indicate the name or address of a thread execution resource.


There are provided an ocular lens in which aberrations are favorably corrected across a sufficiently wide angle of view and a lens diameter is suppressed from increasing with a sufficient eye relief attained and without a total length being long, and an optical apparatus including the ocular lens. An ocular lens 3 used for an optical apparatus such as a telescope optical system TS includes: in order from an object side, a first lens group G1 including a first lens component G1A having negative refractive power and having a concave surface facing a viewer's eye side, a second lens component G1B in a meniscus shape having a convex surface facing the object side, and a third lens component G1C having positive refractive power; a second lens group G2 having a lens component having a convex surface facing the viewer's eye side; a third lens group G3 having positive refractive power. An object side focal plane of the third lens group G3 is positioned between the second lens group G2 and the third lens group G3.

An ocular lens is used for further magnifying and observing a real image formed by an objective lens, for example, in a telescope, binoculars, a microscope and the like. Such an ocular lens is required to have a sufficient eye relief (on-axis distance between the lens surface, of the ocular lens, that is closest to the viewer's eye side and the eye point) for comfortable observation, and in the nature of things, to correct aberrations across a wide angle of view favorably. However, it is generally well known that the large apparent field of view of the ocular lens causes the eye relief with sufficient length to be difficult to be secured, and the aberrations of light flux in the periphery of the visual field, in particular, the curvature of field and the astigmatism to deteriorate drastically.
Therefore, for example, an ocular lens is disclosed with a configuration in which a negative lens group is disposed on the object side, a positive lens group is disposed on the viewer's eye side, and a field stop is included therebetween (for example, Patent Literature 1). The ocular lens with this kind of configuration disclosed in Patent Literature 1 secures a long eye relief by disposing the negative lens group on the object side. In addition to this, the negative lens group having strong refractive power is included, and thereby, the Petzval sum can be made small, which allows a condition for favorably correcting the curvature of field to be attained. In this type of ocular lens, when the ratio of the focal length of the negative lens group on the object side to the focal length of the positive lens group on the viewer's eye side is closer to 1:1, the Petzval sum can be smaller, and this is advantageous for correction of the curvature of field and the like.


A system for enhancing a signal regenerated from an encoded audio signal. The system comprises a decoder arranged to receive the encoded audio signal and produce a decoded audio signal, a feature extraction means arranged to receive at least one of the decoded and encoded audio signal and extract at least one feature from at least one of the decoded and encoded audio signal, a mapping means arranged to map the at least one feature to an enhancement signal and operable to generate and output the enhancement signal, whereby the enhancement signal has a frequency band that is within the decoded audio signal frequency band, and a mixing means arranged to receive the decoded audio signal and the enhancement signal and mix the enhancement signal with the decoded audio signal.

In a communication system a communication network is provided, which can link together two communication terminals so that the terminals can send information to each other in a call or other communication event. Information may include speech, text, images or video.
Modern communication systems are based on the transmission of digital signals. Analogue information such as speech is input into an analogue to digital converter at the transmitter of one terminal and converted into a digital signal. The digital signal is then encoded and placed in data packets for transmission over a channel to the receiver of a destination terminal.
The encoding of speech signals is performed by a speech coder. The speech coder compresses the speech for transmission as digital information, and a corresponding decoder at the destination terminal decodes the encoded information to produce a decoded speech signal, whereby the combination of the encoder and decoder results in a decoded speech signal at the destination terminal that (from the perception of the user of the destination terminal) closely resembles the original speech.
Many different types of speech coding are known and optimised for different scenarios and applications. For example, some speech coding techniques are implemented particularly for encoding speech for transmission over low bit-rate channels. Low bit-rate speech coders are useful in many applications, such as voice over internet protocol ("VoIP") systems and mobile/wireless telecommunications.
An example of a low-rate speech coder is a model-based speech coder that produces a sparse signal representation of the original speech. One particular example of such a model-based speech coder is a speech coder that represents the speech signal as a set of sinusoids. A low-rate sinusoidal speech coder can, for example, encode the linear prediction residual of speech frames classified as voiced using only sinusoids. Many other types of low-rate sparse-signal representation speech coders are also known. These types of low-rate coder form a very compact signal representation. However, the sparse representation in the encoded signal does not fully capture the structure of the speech.
A problem with low-rate model-based speech coders, such as the sinusoidal coder, is that the sparse representation tends to result in metallic-sounding artifacts when the signal is transmitted at a low bit-rate. The metallic artifacts can arise due to the incapability of the underlying sparse model to capture the structure of some of the speech sounds given a limited bit-budget.
If the bit-budget (ultimately related to the bandwidth capabilities of the channel) increases, then more information describing the missing parts of the original speech structure can be added to the transmitted information. This additional description alleviates and eventually removes the artifacts, and thus improves the overall quality and naturalness of the decoded speech signal as perceived by the user of the destination terminal. However, this is obviously only possible if the capability to support a higher bit rate exists.
In addition, the decoding system can compress or expand/stretch a speech signal in time, and/or insert or skip whole speech frames in order to compensate for jitter. Jitter is a variation in the packet latency in the received signal. The decoding system can also insert one or more concealment frames into the speech signal, in order to replace one or more frames that have been lost or delayed in the transmission. The stretching of the speech signal and insertion of the concealment frames into the speech signal can, in particular, give rise to metallic artifacts. These problems are, in general, not mitigated by the use of a higher bit rate.
There is therefore a need for a technique to address the aforementioned problems with low-bit rate coders, and coders in general when loss, delay, and/or jitter may occur in the transmission, in order to improve the perceived quality of the signal at the destination.


A first electrode is formed on a semiconductor substrate. A second electrode is formed separately at a predetermined interval from the first electrode, and has at least one opening. An actuator layer is connected to the second electrode, and drives the second electrode.

1. Field of the Invention
The present invention relates to a semiconductor device having, for example, a Micro-Electro-Mechanical Systems (MEMS) element and its manufacturing method.
2. Description of the Related Art
Recently, the MEMS element having a minute movable unit formed by using a semiconductor manufacturing process on a silicon substrate is developed. This MEMS element is applied to, for example, a variable capacitor, an inductor, a switch, a sensor, a gyroscope, a mirror device, etc. As an actuator for constituting the MEMS element, there are, for example, an actuator using a static electricity, and an actuator using a piezoelectric film. A variable capacitor or a relay using these actuators have been developed (refer to, for example, U.S Pat. No. 6,377,438, U.S Pat. No. 6,359,374).
In the variable capacitor using the actuator including, for example, a piezoelectric film, an actuator layer is provided on a lower electrode. An upper electrode is provided on this actuator layer. It is ideal if this upper electrode and the lower electrode are parallel to each other. Further, it is preferable that the upper electrode and the lower electrode are disposed separately at a predetermined interval. However, as will be described below, it is difficult to constitute a variable capacitor of such ideal shape.
The variable capacitor is manufactured as follows. First, an insulating film is deposited on a substrate. A first electrode is formed as the lower electrode on this insulating film. Then, an interlayer insulating film is formed and an opening for exposing the first electrode is formed in this interlayer insulating film. Then, a filling material to become a sacrificial layer is deposited on the whole surface. Then, this filling material is planarized, and the opening is filled with the filling material. As a planarizing method, reactive ion etching (RIE), or a chemical mechanical polishing (CMP) is used. To assure the uniformity of the film thickness, the CMP is preferable. Thereafter, the actuator layer including a piezoelectric film is formed on the interlayer insulating film including the sacrificial layer. Subsequently, a second electrode is formed as the upper electrode on a portion corresponding to the sacrificial layer of the actuator layer. Finally, the sacrificial layer is removed.
However, when the sacrificial layer is planarized by the CMP, a phenomenon called dishing occurs if the opening is a wide pattern. Therefore, the front surface of the sacrificial layer filled in the opening is overetched. Thus, the front surface of the sacrificial layer becomes recessed. When the sacrificial layer is finally etched, the actuator layer is suspended in the opening. The second electrode and the first electrode cannot be arranged in parallel with each other. The mutual interval between the first and second electrodes is narrowed as compared with a designed value. Thus, it becomes difficult to acquire a required capacity. Further, there is another problem that the movable range of the second electrode is reduced.
Furthermore, when dishing arises on the front surface of the sacrificial layer, there is a possibility of a problem arising even in the case of etching the sacrificial layer. That is, when the sacrificial layer is etched, wet etching is frequently used. The actuator layer is suspended in the opening and the interval between the first electrode and the second electrode is narrowed. Then, a phenomenon called sticking due to a surface tension arises at the end of the wet etching. There is another problem that the actuator layer is adhered to the first electrode.


A semiconductor device includes: a first nitride semiconductor layer formed over a substrate; a second nitride semiconductor layer formed over the first nitride semiconductor layer; element isolation regions formed in a part of the second nitride semiconductor layer and the first nitride semiconductor layer; a gate electrode, source electrodes, and a drain electrode formed over the second semiconductor layer and the element isolation regions; and a drain field plate formed in such a manner as to project from upper portions of side surfaces of the drain electrode.

GaN, AlN, and InN which are nitride semiconductors or materials containing a mixed crystal thereof have a wide band gap and have been used for high-power electron devices, short wavelength light emitting devices, or the like. Among the above, as the high-power electron devices, a technique relating to a field effect transistor (FET), particularly, a high electron mobility transistor (HEMT) has been developed. The HEMT employing such nitride semiconductors may realize large current, high voltage, and low on-state resistance operation, and therefore has been used for high-power and high-efficiency amplifiers, high-power switching devices, and the like.
For example, GaN which is a nitride semiconductor has a band gap of 3.4 eV which is larger than the band gap (1.1 eV) of Si and the band gap (1.4 eV) of GaAs and has high breakdown electric field strength. Therefore, GaN is very promising as a material of a semiconductor device for power source with which high-voltage operation and high power are obtained.
Examples of the HEMT described above include a HEMT employing GaN as an electron transit layer and AlGaN as an electron supply layer. In the HEMT employing GaN as an electron transit layer and AlGaN as an electron supply layer, distortion resulting from difference between the grating constant of GaN and the grating constant of AlGaN generates in AlGaN. Due to difference between the piezoelectric polarization and the spontaneous polarization of AlGaN thus generated, a high-concentration two dimensional electron gas (2DEG) is generated in the electron transit layer. Therefore, the HEMT has been expected as a high-efficiency switch element and a high withstand voltage power device for electric vehicles and the like. In recent years, in order to reduce the substrate cost, a technique of growing a HEMT formed of a nitride semiconductor on a low-cost Si substrate has been researched.
However, in the case where the HEMT is formed by growing an electron transit layer and an electron supply layer with nitride semiconductors on a substrate, such as a Si substrate, when the substrate has conductivity, a strong electric field is applied to the nitride semiconductor layers. In this case, the strongest electric field is applied particularly to end portions of a drain electrode due to large potential displacement, and thus breakdown or the like is likely to occur at the drain electrode ends, which results in reduction in reliability.
Therefore, in the semiconductor device including nitride semiconductors formed on a substrate such as a Si substrate, a highly-reliable semiconductor device in which breakdown or the like does not occur at the drain electrode ends has been desired.
The followings are reference documents.
[Document 1] Japanese Laid-open Patent Publication No. 2002-359256 and
[Document 2] Japanese Laid-open Patent Publication No. 10-32349.

Semiconductor device and method for manufacturing semiconductor device


An improved Wilkinson-type power divider/combiner possessing switching capabilities for selectively controlling operative modes of its constituent dividing/combining channels is disclosed. The switchable power divider/combiner includes N first switches connecting N input/output transmission lines to a common junction and N second switches connecting N isolation resistors coupled to the N input/output transmission lines to a common node. The operating mode of the power divider/combiner can be controlled by activating each pair of the first and second switches to a closed or open switch position. The impedance values of the dividing/combining channel transmission lines are adjusted to provide the optimal impedance matching in both N-way and (N-1)-way operating modes. The resulting switchable power divider/combiner is capable of providing efficient power combining and distribution in a low-loss, phase-balanced manner in both N-way and (N-1)-1 way modes. When one of the signal-processing channels in the dividing/combining system fails, the power divider/combiner is switched to the (N-1)-way mode to provide continuing operation of the system without any degradation in the signal characteristics.

1. Field of the Invention
This invention relates generally to the field of power dividers or combiners in RF or microwave frequencies and, in particular, to an N-way power divider/combiner possessing switching capabilities for selectively controlling operative modes of its constituent dividing/combining channels.
2. Description of the Prior Art
RF or microwave power divider/combiners are used in the electronics industry to either divide or combine RF or microwave signals. When operating as a power divider, one input signal is divided into a plurality of output signals, each retaining the same signal characteristics but having a lower power level than the input signal. As a power combiner, a plurality of input signals is combined into a single output signal, with the output signal having the signal characteristics of the sum of the plurality of input signals. Thus, a divider/combiner can operate as either a power divider or a power combiner, depending on the direction of the signals.
In a typical application in RF or microwave systems, a divider/combiner used as a power divider divides an input signal into a plurality of equi-phase, equi-amplitude signal outputs for amplification by power amplifiers and, when used as a power combiner, combines the outputs of several power amplifiers together to attain a useful power output. In such systems, it is usually desired that if one of the individual amplifiers fails, the system can continue to operate with a minimum reduction in the system output power and with a minimum degradation in the signal characteristics. Therefore, it is advantageous that the power divider/combiner exhibits a low overall power loss, is symmetrical in configuration to avoid phase and amplitude imbalances, and provides sufficient isolation and impedance matching between its output ports (or input ports). Furthermore, the characteristics of low loss, electrical symmetry, isolation and impedance matching should be maintained in a normal operating mode as well as in the presence of a failed amplifier in order to prevent the failure of a single amplifier from seriously degrading the performance of the divider/combiner circuitry or the remaining amplifiers.
A low-loss power divider/combiner which utilizes a circular or radial symmetry and provides isolation and impedance matching is described in an article entitled "An N-Way Hybrid Power Divider" by E. J. Wilkinson, IRE Transactions on Microwave Theory and Techniques, vol. MTT-13, pp.116-118, January 1960. FIG. 1 shows a schematic representation of a conventional Wilkinson hybrid power divider. Although the Wilkinson divider in FIG. 1 is depicted in a four-way configuration, its operation will be described, for the purpose of generality, in terms of an N-way device.
In an N-way Wilkinson hybrid divider 10, as shown in FIG. 1, an RF signal fed into an input port 12 with an input impedance Z.sub.0 is divided into N equi-phase, equi-amplitude signals by way of N transmission lines 14 each having an electrical length of one-quarter wavelength (.lambda./4) at the operating frequency. The output end of each transmission line 14 is further coupled to each of N output ports 16 having an output impedance Z.sub.0. Isolation between the N output ports 16 is accomplished by means of N resistors 18 each connected between the output end of each transmission line 14 and a common node 20, and having a resistance R.sub.0. When the characteristic impedance Z of the N transmission lines 14 is set to .sqroot.NZ.sub.0 and R.sub.0 is equal to Z.sub.0, the output ports 16 are optimally matched and isolated. As a result, no power is dissipated in the resistors 18 and 1/N of the input power is delivered to each of the N output ports 16. Likewise, when used as a power combiner, the Wilkinson arrangement can combine N RF input signals of power P.sub.in applied to the previously called N output ports 16 into an output signal of power N.times.P.sub.in if the input signals are in phase and of equal amplitude. However, if the input signals are not equi-phase equi-amplitude, a substantial portion of power is dissipated by the resistors 18 and the power delivered to the previously called input port 12 will be reduced accordingly.
Several modified versions of the Wilkinson divider/combiners are known in the prior art. U.S. Pat. No. 5,410,281, issued to Blum, discloses a high power combiner/divider which provides effective cooling of the isolation resistors by locating the resistors remote from the body of the device using extended transmission lines. Additional Wilkinson-type divider/combiners, including planar radial hybrids and "fork" hybrids, are described in an article, "Planar Electrically Symmetric n-way Hybrid Power Dividers/Combiners" by Adel A. M. Saleh, IEEE Transactions on Microwave Theory and Techniques, vol. MTT-28, pp. 555-563, June 1980. FIG. 2 and FIG. 3 show the schematic representation of a prior art radial hybrid and a fork hybrid, respectively. Several variations of the planar radial/fork hybrids of the Wilkinson-type are also disclosed in U.S. Pat. No. 4,129,839 to Galani, U.S. Pat. No. 5,021,755 to Gustafson, and U.S. Pat. No. 5,455,546 to Frederick et al.
The conventional hybrid power divider/combiners, such as the Wilkinson divider, suffer from several shortcomings. When one of the N signal-processing channels coupled to the divider outputs experiences a failure or malfunctions, such as in an amplifier failure, the conventional hybrid power divider continues to distribute the power to the disabled channel and 1/N of the power is lost through the disabled channel. In a multi-channel divider/combiner network, the failure of an operating channel also introduces a mismatch between output or input impedances of the divider/combiner, which degrades the overall performance characteristics of the network. Another significant disadvantage of the conventional Wilkinson hybrid is that when used as a combiner, if one or more of the power amplifiers in the combiner network fail, any imbalance in the output voltages of the power amplifiers induces voltages across the isolation resistors, further reducing the combiner output power as the power from the remaining operational amplifiers is divided between the isolation resistors and the combiner circuit. For a network combining N power amplifiers, the decrease in power (P.sub.d) resulting from disabling M of the N power amplifiers is given by the equation, P.sub.d (dB)=10 log((N-M)/N).sup.2. Thus, when one of the amplifiers fails in a two-amplifier combining network, the output power of the conventional hybrid combiner drops not by 3 dB, but by 6 dB. Such additional power loss is unacceptable in many applications and results in excessive heat dissipation in isolation resistors, limiting the power handling capabilities of the combiner, especially in high power situations. Although Blum's patent attempts to ameliorate some of the problems arising from the excessive heat dissipation in the resistors, it does not solve any of the more fundamental shortcomings herein described.
The conventional Wilkinson hybrids also present serious packaging problems. In practice, the device is difficult to realize in a planar structure when N is greater than 2 as the resistors need to be connected to a floating common node. For example, in microstrip versions, such Wilkinson hybrids are subject to signal crossover and cross coupling, which adversely affect the isolation characteristics of the circuit. Although the radial or fork hybrids of Galani, Gustafson, and Frederick attempt to solve some of these problems, they still suffer from the impedance mismatching and the inefficient power distribution/combining in a failure mode. Furthermore, the conventional Wilkinson hybrids do not provide enough room for internally accommodating the means for individually controlling the dividing/combining channels, such as RF switches, due to the structural limitations in packaging the resistors and the physical proximity of the transmission lines and the resistors.
What is needed is an improved power divider/combiner which can be operated in a normal operating mode as well as in the presence of a failed channel, which can maintain the impedance lo matching of the circuitry and achieve efficient power combining and distribution even in the failure mode, and which can be easily implemented without the structural and physical limitations of the conventional Wilkinson divider/combiners.


A printer performs a printing operation by driving a cartridge to discharge ink. The ink in the printer is billed according to the amount of actual use of ink. In a service center, the head ID is first input. Then, the head ID is verified against the user ID. The amount of the use of ink is checked. Then, the billing amount for the actual use of ink is determined. The user is requested to pay for the cost.

1. Field of the Invention
The present invention relates to an accounting apparatus and an accounting method for billing for the use of ink in a printer. The invention also relates to a computer-readable program storage medium for storing a program having an accounting function.
2. Description of the Related Art
Hitherto, typical methods for printing out hard copies include an electrophotographic printing method, an ink-jet printing method, a wire-dot printing method, a thermal recording method, and a thermal transfer recording method. Among these methods, the ink-jet printing method is coming into wide use because of the quality of printed characters and photographs, compatibility with various devices, such as computers and digital cameras, printing speed, and quiet operation. In the ink-jet printing method, ink is discharged from fine holes in an ink-discharge head to a recording medium. Printers using this method are less noisy and comparatively small, and thus, their market share is increasing.
Printers using the ink-jet printing method are often used in homes and offices because of their ease of use and general versatility. The amount of ink spent in these environments is smaller than that used for industrial purposes, and thus, the ink is often stored in a small-capacity ink tank installed in the printer.
Basically, there are two types of structures for the ink tank and the discharge head in the printer. In the first type of structure, the ink tank and the discharge head are separately disposed from each other, and a flexible tube is disposed in an ink passage to connect the ink tank and the discharge head. In the second type of structure, the ink tank and the discharge head are integrated into each other, and the ink is directly filled in the discharge head (ink cartridge). In both types of structures, when the ink runs out, printing can no longer be performed. It is thus necessary to refill the ink or to replace the ink cartridge.
In the second type of structure, when one color of ink runs out in an ink cartridge containing a plurality of colors of ink, the whole cartridge must be replaced. Accordingly, the user has to discard the other colors of ink which can still be used, thereby hampering the effective use of the ink.
One measure to solve this problem is to form an ink tank cartridge containing only one color of ink. With this arrangement, however, the user has to prepare a plurality of ink cartridges for the individual colors of ink as a stock.
Additionally, in the ink cartridge integrating the ink tank and the discharge head therein, if the discharge head does not properly function, the whole cartridge must be replaced even though the ink does not run out. In this case, the user has to discard the whole ink cartridge regardless of whether the ink cartridge is still full of one color of ink or a plurality of colors of ink. This also prevents the effective use of the ink.

Accounting apparatus, accounting method, and computer-readable program storage medium for storing program having accounting function


When determining whether or not an image of an original input from an image reading device is a copy-prohibition image, a mounting position, a mounting angle or the like of the original is detected, and it is determined whether or not exact determination can be performed. If an exact determination cannot be performed, a signal instructing to again read an image of the original is output, and the operator is provided with a warning.

1. Field of the Invention
The present invention relates to an image processing apparatus suitable for preventing counterfeiting of copy-prohibited objects, such as paper money, securities and the like.
2. Description of the Related Art
Recently, it has been proposed to mount in a color copier an image recognition processing function or the like for preventing counterfeiting of paper money, securities and the like. That is, when image data to be copied is determined to represent an image for which counterfeiting is to be prevented, normal copy output of the image is prevented, for example, by (1) providing print output by painting the entire image with a certain color, (2) providing print output by superposing a certain symbol or figure on the image, (3) providing print output by changing the color or the image size, or (4) providing no print output.
A copier is basically designed to faithfully copy an object mounted on an original-mount, except for a copy-prohibited object, such as paper money or the like. Accordingly, if an image which resembles paper money (an image other than paper money which can be legally copied) is input, the copier must recognize that the image is not paper money, and perform a copying operation of the original image. Hence, very precise recognition accuracy is requested for determining whether or not an image to be recognized is an image for which counterfeiting is to be prevented.
Recently, the quality of an image obtained by a color scanner or a color printer, which is less expensive than a color copier, is greatly improved, and it becomes possible to perform a counterfeiting operation by connecting such an apparatus to a personal computer, i.e., by combining apparatuses other than a color copier. Accordingly, even in an image processing system using an inexpensive color scanner or color printer, countermeasures for preventing counterfeiting of paper money, securities and the like by mounting an image recognition function or the like have been desired.
Various methods for determining whether or not an original is a copy-prohibited object have been proposed. In one method, a color spectrum distribution of image data obtained by scanning an original is compared with data registered in advance in a ROM (read-only memory), based on each pixel value (a set of R, G and B values corresponding to three color signals) in the image data (for example, by obtaining a sum of the absolute values of difference values between respective pixel values and stored data, or calculating a cross-correlation value between distributions). In another method, an evaluation value is calculated by comparing a synthetic image pattern of a part or the entirety of an original with pattern data registered in advance in a ROM or the like.
Recently, it became possible to incorporate information indicating a copy-prohibited object within an original, serving as a printed matter, using a technique called "digital watermark That is, when printing an original, serving as a copy-prohibited object, a printed matter is obtained from image data (electronic image information) including copy-prohibited-object information generated by embedding second digital information (sub-information) indicating a copy-prohibited object in image data (electronic image information), serving as original first digital information (main information). This copy-prohibited-object information (sub-information) can be extracted from the image data including the copy-prohibited-object information before printing the original. Furthermore, if consistency between conditions when forming the printed matter from the image data (electronic image information) including the copy-prohibited-object information and conditions in reading and extraction processing is obtained, it is also possible to extract the copy-prohibited-object information from electronic image data obtained by reading the printed matter formed from electronic image information including the copy-prohibited-object information by an original-reading device, such as a color scanner or the like. In consideration of these features, application of the technique called "digital watermark" to prevent illegal copying of an original, serving as a printed matter, has been attracting notice.
However, as described above, in order to extract digital-watermark data embedded using the digital watermark technique, it is necessary to obtain consistency between conditions in reading and extraction and how watermark information is embedded in original-image data (i.e., at what position and with what arrangement in the original-image data the watermark information is embedded).
Accordingly, when reading a printed matter (an original), formed from electronic image information having embedded digital-watermark information, by an original-reading device, such as a color scanner or the like, the direction the original is mounted on the surface of an original-mount greatly influences the difficulty in extraction of digital-watermark information.
When recognizing a copy-prohibited object by comparing a color spectrum distribution of image data obtained by scanning an original with data registered in advance in a ROM, or by calculating an evaluation value by comparing a synthetic image pattern of a part or the entirety of the original with pattern data registered in advance in a ROM or the like, if the direction (angle) or the position of the mounted original is not fixed, the total amount of calculation operations for comparison with spectrum data registered in advance or image-pattern data tends to greatly increase in order to deal with various directions and positions.
In an inexpensive color scanner or color printer, it is desirable to prevent counterfeiting of a copy-prohibited object with a cost lower than in the case of using a relatively expensive color copier. For that purpose, it is preferable to recognize a copy-prohibited object by mainly using software instead of mainly using hardware having a large amount of electronic circuits and the like.
On the other hand, when determining a copy-prohibited image requiring precise recognition accuracy mainly by software, the total amount of calculation operations is large, and the processing time required for the recognition and determination tends to be greatly increased.
That is, if the amount of calculation operations for the recognition and determination is reduced, it generally tends to be difficult to determine a copy-prohibited image requiring precise recognition accuracy such that, for example, it becomes difficult to detect a copy-prohibited object, such as paper money or the like, read by intentionally changing reading conditions (such as a mounting angle or a mounting position of an original on a reading surface), or that when an image resembling paper money (an image other than paper money which is legally allowed to be copied) is input, the image is erroneously recognized as a copy-prohibited image and normal image output is not performed, thereby impairing the original function of an image processing system.

Image processing apparatus effective for preventing counterfeiting of a copy-prohibition object