A bit line control circuit is disclosed for implementing a dynamic content addressable memory. The bit line control circuit includes a read circuit 12 and a first write circuit 13 connected to data line pairs DT, /DT, a sense amplifier 14, a bit line discharge circuit 15, a bit line charge circuit 16, a transfer gate circuit 17, and a second write circuit 18. The bit line control circuit is connected to a CAM cell array through bit lines BLa, /BLa. Various operations such as write, read, refresh and match detection and the like necessary in the dynamic associative memory can be implemented under simple timing control by a simple circuit configuration.

1. Field of the Invention
The present invention generally relates to associative memory devices, and more particularly, to an associative memory device having dynamic associative memory cells. The present invention has particular applicability to content addressable memories (CAMs).
2. Description of the Background Art
Retrieval processing of a large amount of data at a high speed has been in greater demand recently. As a functional memory suitable for retrieval processing of a large amount of data, an associative memory called content addressable memory (hereinafter referred to as "CAM") is conventionally known. The CAM detects match between applied retrieval data and stored data to provide an address (referred to as "match address") of the stored data whose match was detected.
Conventionally, a bit serial type CAM, a complete parallel type CAM and the like are known as CAMs. A bit serial type CAM makes comparison of retrieval data with stored data bit by bit. A complete parallel type CAM makes comparison of retrieval data with stored data for all bits in parallel. Therefore, the complete parallel type CAM can carry out a match retrieving operation at the highest speed. In other words, the complete parallel type CAM can operate retrieval processing at a speed which is several hundreds times faster compared to match retrieval processing by conventional software Therefore, the complete parallel type CAM can be applied to various fields such as artificial intelligence, data base system and the like where it is necessary to carry out a match retrieving operation frequently.
However, in order to implement a complete parallel type CAM having practical large storage capacity, some technical problems are left unsolved. One example of the technical problems is that it is difficult to reduce an area occupied by a memory cell on a semiconductor substrate. In other words, since a complete parallel type CAM carries out a match retrieving operation for all bits in parallel between applied retrieval data and stored data, it is necessary for each CAM cell (or each associative memory cell) to include a data storage circuit and a match detecting circuit.
Since a static CAM includes a static latch circuit as a data storage circuit and an EXCLUSIVE NOR circuit as a match detecting circuit, an area occupied by a CAM on a semiconductor substrate is large. Therefore, the storage capacity of a high integration CAM reported so far is at most 20 k bits. In order to reduce the area occupied by the CAM cell on the semiconductor substrate, it is preferable to use a dynamic CAM cell in place of a static CAM cell. The following description is given of a conventionally known dynamic CAM.
A retrieving operation in a CAM will now be described. FIG. 22 is a concept diagram for explaining a retrieving operation in a CAM. For simplicity of description, FIG. 22 shows a CAM cell array 4 of 10-word-by-8-bit configuration. Referring to FIG. 22, the CAM includes the CAM cell array 4, a retrieval data register 2 for applying retrieval data to the CAM cell array 4, a match flag register 5 for retaining a match flag indicative of a retrieval result, and a priority encoder 6.
For example, it is assumed that the memory cell array 4 stores 10-word data shown in FIG. 22. In addition, it is assumed that the retrieval data register 2 applies retrieval data "1011XXXX" to the memory cell array 4. Each "X" indicates that a corresponding bit in the retrieval data is masked. More specifically, less significant four bits of the retrieval data are masked in this example. Therefore, data in the masked less significant four bits don't affect the match detecting result.
Therefore, match is detected between applied retrieval data and each of the third, the sixth and the tenth stored data, and match flags "0" are set in corresponding positions in the match flag register 5, respectively. The match flags are further applied to the priority encoder 6, causing a word of the highest priority of the third, the sixth and the tenth words in this example, that is, the third word having the lowest address in this example to be selected and causing the address "2" thereof to be provided as a match address. It is pointed out that the above-described priority may be determined optionally, although it is predetermined in this example.
FIG. 23 is a schematic diagram of a circuit of a conventional dynamic CAM cell. The circuit shown in FIG. 23 is disclosed in Proceedings of CICC '91, pp. 10-13. Referring to FIG. 23, the dynamic CAM cell includes capacitors 36, 37 for storing data signal electrical charge, NMOS transistors 30, 31 for writing data, NMOS transistors 32, 33 for configuring an EXCLUSIVE NOR circuit, and an NMOS transistor 34 operating as a diode. The data signal electrical charge is stored by the capacitors 36 and 37 and gate capacitance of the transistors 32 and 33. A cell plate voltage Vcp (=Vcc/2) is applied to one electrode of the capacitors 36 and 37. The gates of the transistors 30 and 31 are connected to a word line WL. One electrode of the transistors 30 and 32 is connected to a bit line BL. One electrode of the transistors 31 and 33 is connected to a bit line /BL. One electrode and the gate of the transistor 34 are connected to a match line ML.
FIGS. 24A and 24B are schematic diagrams of circuits for explaining write and read operations in the dynamic CAM cell. FIGS. 25A and 25B are schematic diagrams of circuits for explaining a match detecting operation. Referring to FIGS. 24A, 24B, 25A and 25B, description will be given below of operations of the dynamic CAM cell.
Referring to FIG. 24A, the write operation is carried out as in the following. First, the bit lines BL, /BL are brought to potentials inverted to each other in response to a data signal to be written. Since the word line WL is activated, the potentials of the bit lines BL, /BL are applied to the capacitors 36, 37 through the transistors 30, 31, respectively. The word line WL attains a low level, and the transistors 30 and 31 are turned off, causing the data signal electrical charge to be retained by the capacitors 36 and 37. The potential of the match line ML is maintained at a low level during the write operation.
Referring to FIG. 24B, the read operation is carried out as in the following. First, a bit line pair BL, /BL is discharged, and a high level potential is applied to the match line ML. For example, assuming that the CAM cell stores the data signal shown in FIG. 24B, the transistor 32 is turned on, while the transistor 33 is turned off. Therefore, the bit line BL is caused to be connected to the match line ML through the transistors 32 and 34, resulting in a high level of the potential of the bit line BL. On the other hand, the potential of the bit line /BL is retained at a low level. During the above-described read operation, the word line WL is not activated.
Referring to FIG. 25A, the match detecting operation is carried out as in the following. First, the bit lines BL, /BL and the match line ML are precharged to a high level potential. As one example, it is assumed that data shown in FIG. 25A is stored in the CAM cell, and that retrieval data is applied to the bit lines BL, /BL. More specifically, since match is detected between the stored data and the retrieval data in this case, neither the transistor 32 nor the transistor 33 is turned on, and the potential of the match line ML is remained at a high level.
Conversely, when an inverted retrieval data signal is applied to the bit lines BL, /BL, mismatch is detected between the retrieval data and the stored data. In other words, as shown in FIG. 25B, the transistor 32 is turned on, and the transistor 33 is turned off. Therefore, the match line ML is discharged through the transistors 32 and 34, resulting in attaining a low level. As described above, after applying a retrieval data signal to the bit lines BL, /BL, "match" or "mismatch" may be detected between the retrieval data and the stored data by detecting potential change of the match line ML.
A conventional static CAM cell, not shown, uses a latch circuit for storing data. On the other hand, a dynamic CAM cell includes two capacitors 36 and 37 for storing data as shown in FIG. 23. By using two capacitors 36 and 37 for storing data in place of a latch circuit, the dynamic CAM cell, compared to the static CAM cell, is reduced in the number of necessary elements, and it is, therefore, suitable for high integration of the CAM.
However, a circuit necessary for accessing such a dynamic CAM cell has not been proposed yet, although a circuit of the dynamic CAM cell shown in FIG. 23 has been conventionally known. A different circuit from the static CAM cell using a latch circuit is needed especially because of employment of the two capacitors 36, 37 for storing data.
For example, a periodical refresh operation is needed to prevent stored data from being lost by leakage of electrical charge from the two capacitors 36, 37 which store data signals. Therefore, a refresh circuit which is not provided in the static CAM is needed. However, it has not been known specifically what type of circuit is suitable for the dynamic CAM. In particular, since the dynamic CAM, compared to a general dynamic RAM conventionally known, carried out complicated operations such as a match detecting operation, for example, it was generally difficult to implement a peripheral circuit of the dynamic CAM cell in a simplified circuit configuration.
Enhancement of the yield rate in production which is expected as high integration of the CAM must be taken into consideration. More specifically, although a redundancy circuit for use in a dynamic RAM has been conventionally known, a practical circuit configuration for redundancy use in a dynamic CAM has not been known. Therefore, in order to prevent lowering of the yield rate with high integration of the CAM in the near future, a practical and effective redundancy circuit has been desired.

Dynamic content addressable memory device and a method of operating thereof


The present invention provides a hub/clamp assembly for holding a disk hub in position when the hub is spin in a high speed. The hub/clamp assembly comprises of: a removable disk hub having a shaft for stacking a plurality of storage disks, a flange portion integrally attached to one end of the shaft, and an extension shaft integrally attached to the flange portion opposite to the shaft; wherein the axes of the shaft, the flange portion, and the extension shaft are in alignment; and a hub clamp housing having a housing with side walls and top and bottom surfaces, and a clamp means disposed within the cavity formed within the housing. The present invention also provides a multi-disk servowriter for writing servo information onto multiple storage disks at the same time. The multi-disk servowriter comprises a base with an air spindle shaft providing the spinning power for the servowriter; a removable disk hub having a shaft for stacking a plurality of storage disks, a flange portion integrally attached to one end of the shaft, and an extension shaft integrally attached to the flange portion opposite to the shaft; wherein the axes of the shaft, the flange portion, and the extension shaft are in alignment; and a hub clamp housing having a housing with side walls and top and bottom surfaces, and a clamp means disposed within the cavity formed within the housing.

A magnetic storage disk used in the disk drive takes the form of a flat solid substrate with a central opening. The material used for the substrate can be aluminum, glass, ceramic, plastic, or other composite material depending on the application involved. A thin layer of magnetic material is coated on both surfaces of the substrate, followed by a protective layer.
For data reading from or writing onto the magnetic layer of a magnetic storage disk, a transducer read-write head is positioned over each disk surface. This transducer read-write head is usually supported by an overhanging actuator arm and mounted onto an aerodynamically shaped block that glides at an extremely small distance from the disk surface when the disk is spinning. This extremely small distance to the disk surface is required for the transducer read-write head to read or write data patterns into the magnetic layer of the disk. The actuator arm carrying the read-write head is pivoted about an axis so that the read-write head can be swung in and out of the disk surface as desired.
Storage data are laid down along circular tracks around the disk surface. To enable the read-write head to know where it is positioned, servo data is pre-recorded along circular tracks on the disk. These servo data contain information that is readable by the read-write head and subsequently is interpreted by the servo system firmware to determine which track the head is on, and to keep the head on the desired track.
Writing down the tracks of servo data onto the disk surface is an essential step in the manufacturing of a disk drive. Servo track writing is normally carried out in the manufacturing plant. As the servo tracks serve as the positional and timing references for a read-write head, precise positioning and timing is required when the servo track is laid down on the disk surface.
One scheme for writing the servo data is to carry out the writing process after magnetic disks have been placed inside the enclosure of a disk drive. Part of the drive enclosure is temporary left open to expose the actuator arm carrying the read-write head. Additional fixture with precision positioning feedback is then used to guide the movement of the actuator arm over the disk surface. This additional fixture can take the form of an external actuator arm. In one variation, the external actuator arm is made to physically push the drive actuator arm along. In another variation, an edge sensor is used ensure that the drive actuator arm will move in synchronous with the external actual arm.
In the self-servo writing scheme, the disks are partially servo-written in the disk drive using one of the above-mentioned schemes in the cleanroom. The rest of the servo tracks are then filled in after the disk drives are taken outside the cleanroom. The intention is to optimize the usage of the cleanroom space.
The additional fixture can also take the form of a small sheet scale embedded in the drive actuator arm. Using an external reader, the position of the drive actuator arm can be read from the scale and controlled directly. By using the embedded scale for positioning, no external actuator is required. The drive actuator still maintains its lightweight and the system is less affected by external excitation such as air turbulence and vibrations. The system is also more tolerant of the vertical vibration of the actuator arms. This method of positioning the drive actuator arm does not require a temporary opening in the drive enclosure. The servo track writing can therefore be carried out outside the cleanroom. The only drawback is perhaps the increase in manufacturing cost by having a sheet scale to be included in every disk drive.
Other schemes have been devised to enable the servo writing process to be written outside the cleanroom. One method is to use an optical clock head for servo writing. The optical clock head reads a timing sheet scale attached to the rotation disk or spindle by optical means through a transparent window. Using such a transparent window in the controlling of the drive actuator arm, the disks in the disk drives may be servo written outside the cleanroom.
In another servo-writing scheme, the process is carried out before the disks are placed inside the drive enclosure. The disks are servo-written on dedicated equipment, commonly called media servowriter, in the cleanroom. One advantage of this scheme is that multiple disks can be servo-written at any one time using the same set of hardware. As disk drives nowadays usually only contain one to two disks, in-drive servo-writing schemes described in the previous paragraphs can take up a lot of cleanroom space and time. By servo-writing multiple disks outside the drive, usage of cleanroom space and time can be substantially reduced. Using better performance components, equipment dedicated for servo-writing is capable of writing servo-tracks with higher quality. This becomes especially important as the track density of the disk media increases.
On a media servowriter, the disks are stacked and packed in a hub that is attached to the spinning shaft of an air-bearing spindle motor. During servo-track writing, the rotary motion of the spindle shaft spins the hub with its disk pack. In order to ensure that the hub is tightly and centrally held down to the rotating spindle shaft when the servo track is being written, one approach is to use a clamp that only exerts a radially inward force to hold the hub. The evenly distributed force pushed the hub towards the center of the spindle shaft while at the same time hold the hub tight for rotation. This is to ensure hub is clamped tightly during spinning. Hub and hub clamp are machined with precision and well balance, when spindle rotates at high speed the mechanical vibration is minimal. This will ensure read-write on the disk can be performed smoothly. The quality of the servo tracks written will also be compromised.
Furthermore, the disk hub should be designed such that it can be easily detached from the spindle shaft after the servo-writing process, while the hub clamp responsible for holding the hub to the spindle shaft should be so designed that it allows the disk hub to be easily removed. A removable disk hub allows the disks to be stacked and un-stacked outside the media servowriter equipment, enabling more efficient time usage of the media servowriter.

Removable disk pack hub and clamp for media servowriter


A dual cylinder positive displacement pump is used to move drill cuttings. The pump may include one or more of a self-sealing wear ring member/wear plate member interface, stainless steel pumping cylinders, and a hopper with an inclined surface.

Drill cuttings are the by-product of drilling operations, in particular drilling operations for gas and oil wells. The cuttings include mud, sediment, rock and water as well as various oils, drilling fluids and the like. Because of the hydrocarbon content of drill cuttings, as well as other pollutants, it is desirable to treat the drill cuttings before disposal. Regardless of the mode of treatment and disposal, transport of drill cuttings has presented significant logistical problems, particularly when dealing with drill cuttings produced by offshore oil & gas drilling platforms. Due to the nature of the drill cuttings many types of pumps break down quickly and therefore cannot be used on a commercially viable basis for transporting drill cuttings.

Apparatus for pumping drill cuttings and dual cylinder positive displacement pump for moving drill cuttings and method of use


A testing voltage of 800 to 5000 volts is applied to a measuring electrode constructed of carbon fiber brushes. This testing voltage is regulated to the desired value by means of a control circuit. Sparkover pulses travel through a filter to an output, with the response level of the testing voltage being regulated accordingly. Thus the test is reliable without highly electrically or mechanically stressing the test object.

In order to detect insulation faults in continuous wires or cables, so-called spark testers are employed in which electrodes that are at a relatively high voltage lie loosely against the passing wire or cable while the conductor or conductors of the wire or cable are grounded. Generally loose chains or small wire brushes are employed as electrodes. Both types of electrodes are not fully satisfactory. In the case of chains there results an irregular and unreliable distribution of the voltage state, that is, the corona, at the surface of the insulation. In the case of metal brushes, abrasion produces very pointed and sharp-edged metal pieces that hook themselves into the insulation surface and thus may lead to short circuits. This is particularly the case when testing foamed insulations.
Prior art spark testers often have only one relay which, if there are insulation faults and sparkovers caused thereby between the electrodes and the conductor in the wire or cable, responds to the increased current and actuates a counter. This arrangement also has been found to be disadvantageous because, in order to obtain sufficient sensitivity, it has to operate with relatively high testing voltages. This necessity exists also because, under certain circumstances, considerable fluctuations may occur in the voltage. If tests are made with an alternating voltage, variable capacitances between the testing electrodes and the conductor of the object to be tested may produce considerable voltage fluctuations; be it that the voltage drops too much; be it that resonance causes undesirable excess voltages to occur. In the case of testing with direct voltage, charge transport at the surface of the insulation may produce a variable load and thus undesirable changes in voltage.

Method of detecting insulation faults and spark tester for implementing the method


A fishing board game that is designed to be carried in a fishing tackle box style container. The lower portion of the box holds the board, score pads, instructions and bag limits. The upper portion of the box has a tray similar to those found in regular tackle boxes. The tray has six compartments to hold the playing cards, game tokens and die. The game board covers a wide portion of south-central Alaska. This area provides a wide variety of fishing choices and opportunities. Players move around the board, using a die to count spaces. Spaces include fish-on spaces, fly-in fishing spaces, float trip spaces and chance spaces. Players move around the board, catching fish and attempting to avoid trouble. There are several options for scoring and for the type of fishing that can be performed. At the end of the game, the player with the most points wins.

Sport fishing is a growing activity. People are spending billions of dollars every year to catch fish, both on saltwater and on fresh water lakes and streams. Unfortunately, most people are limited in their access to fishing sites. To aid in their enjoyment of this sport, fishing type board games have been developed. These games attempt to give the player a sense of the pleasure of real fishing.


A backup circuit that can be fabricated by the standard CMOS process and has a small circuit scale. The backup circuit (10) is disposed between a digital circuit (20) including a storage circuit and a power supply terminal (TIN, TGND) for supplying power to the digital circuit. MOS transistors (MOS1, MOS2) connected in series are disposed between the power supply terminal (TIN, TGND) and a backup capacitor (C1). The MOS transistors (MOS1, MOS2) serve as resistors when the power is normally supplied to the power supply terminal, and as diodes each operating with its backward direction defined as the direction from the digital circuit toward the power supply terminal when the power is cut off.

In one known digital circuit, as disclosed in, e.g., JP-A-2001-327101, a backup circuit constituted by a backup capacitor is disposed between a power supply terminal and the digital circuit. When a voltage is supplied from the power supply terminal, the backup capacitor is charged, and when no voltage is supplied upon power cutoff, a voltage is supplied to the digital circuit with electrical charges that have been charged in the backup capacitor, thereby holding information stored in the storage circuit.
Then, to prevent the voltage charged in the backup capacitor from being supplied to the exterior from the power supply terminal, it is known to dispose a diode between the power supply terminal and the backup capacitor. An anode of the diode is connected to the power supply terminal, and a cathode of the diode is connected to one terminal of the backup capacitor. A current is thereby prevented from flowing backward from the backup capacitor toward the power supply terminal when the voltage supplied from the power supply terminal drops.
In the case using the diode, however, some special process, such as the SOI process, is required because the standard CMOS process cannot be used to constitute the diode and the digital circuit on the same LSI chip. Accordingly, when the digital circuit is constituted by using the standard CMOS process, a problem arises in that the diode must be formed as an external device. Another problem with the use of the diode is that the diode causes a voltage drop even during the normal operation.
On the other hand, it is also known to use, instead of a diode, a MOS transistor driven by an oscillator and a charge pump. In this known related art, the oscillator is driven by a voltage supplied from a power supply terminal, and the charge pump is driven by an output of the oscillator. Further, an anode of the MOS transistor is connected to the power supply terminal, and a cathode of the MOS transistor is connected to one terminal of the backup capacitor. An output of the charge pump is supplied to a gate of the MOS transistor. When the voltage supplied from the power supply terminal drops, the oscillator is stopped to reduce the voltage applied from the charge pump to the gate of the MOS transistor, whereby the MOS transistor is turned off to prevent a current from flowing backward from the backup capacitor toward the power supply terminal. Since a backup circuit having such an arrangement can be fabricated by the standard CMOS process, the backup circuit can be integrated on the same semiconductor chip as the digital circuit, and a voltage drop hardly occurs.

Backup circuit for holding information in a storage circuit when power cut-off occurs


The present invention provides an electromagnet device including a horizontal portion of a yoke arranged near one end portion of an iron core, a movable iron piece which pivotably supported on a leading end edge portion of a vertical portion of the yoke which serves as a fulcrum, an end portion of the movable iron piece adapted to be attracted to a magnetic pole portion by a main magnetic circuit, the magnetic pole portion is arranged in the other end portion of the iron core. The main magnetic circuit is formed by applying a voltage to a coil wound around a periphery of the iron core and an auxiliary magnetic circuit formed in parallel with the main magnetic circuit, the auxiliary circuit including a permanent magnet is arranged near the one end portion of the iron core and a magnetic resistance portion, in which a magnetic flux of the permanent magnet is magnetically saturated.

The present invention relates to an electromagnet device.
Conventionally, as an electromagnet device used for a latching type electromagnetic relay, for example, there is an electromagnet device used for "a magnetic retaining relay that attracts and retains a movable iron piece, resisting against a return spring, using residual magnetization of a magnetic circuit which is constructed of an iron core with a coil wound around, an iron core frame, and a movable iron piece, in which the iron core is made of an electromagnetic soft iron material, or a steel material with a carbon content of 0.01% or less, and the iron core frame is made of a semi-hard magnetic material" (refer to Japanese Utility Model Publication No. 1983-157947).
In the electromagnet device, the iron core frame is made of a semi-hard magnetic material. However, for example, when such an electromagnet device is applied to an electromagnetic relay for which a large switching load is required, it is not easy to drive a movable touch piece having a strong spring force. In particular, since a strong retention force is needed to retain the movable iron piece which is in a moved state thereby practical application of such an arrangement is difficult.


A heat insulation door for a refrigerator able to realize 3 dimensional effects and with excellent heat insulation is presented.

Examining the structure of recent doors for a refrigerator, outer surface is all in a 2 dimensional flat surface shape, and filled with foamed heat insulation materials. Structures of doors for a refrigerator are presented in prior publications such as Korea laid-open patent 10-2002-0019170.
Outer surfaces of these structures of doors for a refrigerator are in a shape of a 2 dimensional flat surface and finishing work is done with glass materials. However, normal a refrigerator with 2 dimensional flat surface shaped outer surface doors lack realization of 3 dimensional shapes. To overcome this disadvantage, attempts to have 3 dimensional shapes for the door are active, but there are problems in difficulty in manufacturing with common technologies that use glass finishing materials, and also there are problems of requiring high costs.
And also, even when manufacturing a door for a refrigerator having 3 dimensional shapes, there are problems of what method to use to obtain heat insulation properties.

Heat insulation door for a refrigerator having 3 dimensional shapes

Abstract: A heat insulation door for a refrigerator having 3 dimensional shapes in accordance with the present invention comprises, an outer panel forming an outer surface of a door for a refrigerator that has 3 dimensional shapes, a groove type vacuum heat insulation material located inside the outer surface and having at least one groove, and a foamed vacuum insulation material filled inside, and has excellent 3 dimensional effects superior to printing effects, and has advantages of being able to secure excellent heat insulation properties.


Embodiments disclose a man-machine interaction method, a device, and a graphical user interface. The method includes: displaying, by an electronic device, at least one icon on a display, where at least one shortcut function is preset for a first software program marked by a first icon of the at least one icon; detecting, by the electronic device on a pressure-sensitive surface, first pressure input exerted on the first icon; determining, by the electronic device, information about the at least one shortcut function when determining that the first pressure input meets a first preset condition; continuing, by the electronic device after detecting the first pressure input, to detect second pressure input exerted on the first icon; and activating a default shortcut function of the at least one shortcut function when the electronic device determines that second pressure input meets a second preset condition.

As a pressure recognition technology supported by displays becomes mature gradually, and the displays have characteristics such as convenient use and good experience, an increasing quantity of electronic devices such as a mobile phone and a tablet computer can support the pressure recognition technology. There are diverse user gestures in an actual operation process. For example, user gestures such as long press, tap, and slide all indicate particular user operation behaviors. If a user operation behavior is recognized by detecting a pressure value of a user gesture, great convenience may be brought to a user.
A user needs to preset a user operation path before performing a pressure touch operation on a display. For example, a secondary selection needs to be performed on a small window (a function list interface) that pops up after the pressure touch operation, that is, a touch selection needs to be performed among multiple shortcut functions displayed within the small window, to activate a selected shortcut function. Performing a touch selection in a relatively small window is likely to cause a misoperation, resulting in relatively poor user experience.

Man-machine interaction method, device, and graphical user interface for activating a default shortcut function according to pressure input


A management facility for managing concurrently executable computer processes. The management facility includes a registration mechanism, which enables a plurality of interdependent processes to be considered a part of a topology of logically dependent execution groups, and a termination synchronization mechanism that synchronizes the completion of termination for the processes within the topology. Termination synchronization prevents a process within the topology from completely terminating, even if it has entered normal termination, until all of the processes within the topology have normally terminated. If one of the processes within the topology has abnormally terminated, then notification of this abnormal termination can be propagated to all of the processes within the topology of logically dependent execution groups, since none of them have completely terminated.

This invention relates, in general, to concurrent data processing and, in particular, to managing a set of concurrently executable interdependent computer processes.
Concurrent processing is instrumental in significantly reducing the time it takes to perform a particular job or function, and it is an important aspect in today""s computing environments. However, there has been some reluctance, especially in critical business situations, to accept and use concurrent processing. This reluctance is caused by the potential for corrupt data.
For example, in parallel processing environments, data is transferred between processes and modified along the way (e.g., along the pipeline, which is defined as a set of processes together with the data paths between the processes). Errors in one process may affect the integrity of the data that is produced (e.g., output) or consumed (e.g., accepted) by another process at a later point in time. Since the processes handle data in parallel, they may not know of an error that occurred in a particular stage of execution of another process. Thus, there is a potential for data corruption.
A specific example of when data corruption can arise is when processes within a pipeline start and finish at widely varying times. In this scenario, at the time of error, some processes in the pipeline may be just starting, some may be in the midst of processing, and others may have finished pipeline processing and be in termination phases. These processes may all be handling related data in parallel, so errors in processes in any phase (e.g., initiation, process or termination) may affect other processes, regardless of the phase of execution. If a process is not aware of the error, data corruption can occur.
As another example, processes may continue with non-pipeline related processing after disconnecting from or closing a connection to the pipeline (i.e., closing a connection to a resource (e.g., a pipe) of the pipeline). However, these processes still may be affected by errors that occur during pipeline related processing of other processes. Thus, if these processes are not aware of the errors, their data may be corrupted.
Previously, processes that terminated would not know of errors that occurred during execution of other related processes. This caused potential data corruption, thereby, forestalling the widespread use of concurrent processing. Therefore, a need exists for a facility to ensure data integrity. In particular, a need exists for a facility that will notify each related process, whether terminated or not, of an error that occurred with another related process. A further need exists for a mechanism to build a group of related processes, and to be able to dynamically change the group of processes. A yet further need exists for providing synchronization at termination, such that all of the processes of the related group learn of any errors. A further need exists for a mechanism that allows synchronization at initiation, so that processes will not complete before others have begun, thus, having a potential for corrupt data.
The shortcomings of the prior art are overcome and additional advantages are provided through the provision of a method for managing concurrently executable processes. A plurality of interdependent processes are registered as a topology of one or more logically dependent execution groups, and completion of the plurality of interdependent processes is synchronized. The plurality of interdependent processes is prevented from completing termination until the interdependent processes terminate successfully or until a condition relating to one of the interdependent processes is detected. As one example, the condition is an abnormal termination.
In another aspect of the present invention, a system for managing concurrently executable processes is provided. The system includes means for registering a plurality of interdependent processes as a topology of one or more logically dependent execution groups, and means for synchronizing completion of the interdependent processes. Completion is synchronized such that complete termination of the plurality of interdependent processes is prevented until all of the processes successfully terminate or until a condition relating to one of the processes is detected.
The management facility of the present invention advantageously enables the grouping of interdependent processes and the management of that group of processes. In accordance with the principles of the present invention, no process within the group of processes completely terminates successfully until all of the other processes within the group terminates normally. If an abnormal termination occurs within the group of processes, then since none of the processes has completely terminated, the processes of the group are notified of the abnormal condition, and in one example, are not permitted to terminate successfully. In one embodiment of the invention, either all of the processes within a group terminate successfully or they all fail. This ensures the integrity of the data processed by the group of processes.
In addition to the above, the management facility of the present invention advantageously allows the group of processes to be dynamically changed, so that all of the interdependent processes can be assured of data integrity.
Additional features and advantages are realized through the techniques of the present invention. Other embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed invention.

Method and system for managing concurrently executable computer processes

International Business Machines Corporation


A phase-contrast microscope system includes: an illumination optical system that illuminates a specimen with an illumination light from a light source; an imaging optical system that forms an image of the specimen from a light from the specimen; a first spatial modulation element that is disposed in a position of a pupil of the imaging optical system and changes an amplitude transmittance distribution of the light from the specimen; an image sensor that detects the image of the specimen by the imaging optical system and outputs a picture signal; a calculation section that calculates the amplitude transmittance distribution of the light from the specimen appropriate for observing the specimen on the basis of the output data detected by the image sensor and the amplitude transmittance distribution of the light from the specimen formed by the first spatial modulation element.

1. Field of the Invention
The present invention relates to a microscope system that derives and forms distribution of illumination light appropriate for observation by using phase-contrast.
2. Description of Related Art
In phase-contrast microscopes, a ring diaphragm and a phase ring form the intensity distribution of the illumination light.
Since the distribution of the illumination light has a great effect on an observational image of a specimen such as the phase ring have been subjected to tests to further improve the observation picture of the specimen. For example, in Japanese Unexamined Patent Application Publication No. 2009-237109 1, a modulation section is provided to surround a ring region which is formed in a ring shape of the phase ring, and is formed such that the direction of the transmission axis of the modulation section is different from that of a region other than the modulation section, thereby embodying a phase-contrast microscope capable of continuously changing the contrast.


An indicator tag is provided for visually indicating the remaining effectiveness of a protective chemical treatment agent on a textile article. The tag is made from a fabric dyed with at least one dye to impart to the piece of fabric a predetermined initial color which indicates that the chemical treatment agent on the textile article is effective. The dye has a chromophore which is susceptible to degradation by reagents which would destroy the effectiveness of the chemical treatment agent so that exposure of the indicator tag to such reagents causes the indicator tag to change from its predetermined initial color to another color, thereby indicating that the textile article with which the indicator tag is used has been exposed to reagents which may cause a loss in the effectiveness of the protective chemical treatment agent on the textile article.

This invention relates to an indicator tag for visually indicating the remaining effectiveness of a protective chemical treatment agent on a textile article.
A variety of protective chemical treatments are used to impart a particular desired characteristic to a textile article. Various treatments include flame retardants, antimicrobial agents, antistatic agents and the like. Of particular importance is the application of flame retardants to textile articles. Flame retardants are widely used on textile articles, particularly for fabrics used in various types of wearing apparel, such as children's wearing apparel.
Despite the advantages afforded by the these various protective chemical treatments, the treatments lose their effectiveness under certain conditions. For example, a protective chemical treatment on a textile article may lose its effectiveness gradually by washing away as the article is laundered numerous times. A protective chemical treatment may also lose its effectiveness quickly due to improper handling and laundering of the textile article. For example, exposure of a textile article to an oxidizing agent such as chlorine bleach, may cause immediate loss of the effectiveness of many protective chemical treatment agents.
Many of these protective chemical treatments are not visible to the consumer when applied to a textile article. Because the consumer cannot see the protective treatment on the textile article, he cannot determine when the protective chemical treatment has lost its effectiveness. Therefore, there is a need for indicating a loss of the effectiveness of these protective chemical treatment agents.
U.S. Pat. No. 4,311,479 to Fenn discloses the use of a dye which bonds preferentially to an antimicrobial treatment such that when the dye disappears from the fabric due to washing, there is an indication that the antimicrobial treatment is exhausted. In Fenn, however, the dye is applied as thin stripes or dots or some similar configuration over the entire surface of a substrate impregnated with an antimicrobial agent. Since this affects the overall appearance of the substrate, this restricts significantly the applicability of this treatment.
It would, therefore, be highly desirable to have a simple method of visually indicating the effectiveness of a protective chemical treatment agent without affecting the overall appearance of the substrate thus treated.

Tag for visually indicating loss of a protective agent


An adjustable knuckle/steer arm assembly and method for adjusting a toe curve setting of a vehicle wheel is provided. The adjustable knuckle/steer arm assembly includes a knuckle and a steer arm. The steer arm is pivotally connected to the knuckle at a pivot. One of the knuckle and the steer arm has a slot formed therein and the other has a connector member which engages the slot. The steer arm is angularly adjustable with respect to the knuckle via adjustable engagement of the connector member along the slot to enable the toe curve setting to be adjusted.

Vehicle suspensions typically have a variety of designed-in and/or adjustable settings, including caster, camber, and toe angle. These settings affect vehicle handling characteristics, such as cornering. Due to vehicle suspension geometry, toe angle typically varies with vertical wheel travel. Vertical wheel travel is affected by vehicle maneuvering, acceleration, deceleration, braking, loading, road, and other conditions. Wheel toe angle changes as the vertical wheel travel changes due to these conditions. Toe curve is the relationship between vertical wheel travel and wheel toe angle. It is desirable to be able to quickly and easily adjust toe curve settings for high performance vehicles and for development of suspension settings for all vehicles.

Adjustable toe curve knuckle for a vehicle suspension and method


A system for testing and adjusting threshold voltages in flash EEPROMs is disclosed. The system includes a memory cell array (5) comprising a plurality of cell columns. Each cell column includes a plurality of memory cells (10). Each memory cell (10) has a control gate terminal (14), a drain terminal (12) and a source terminal 11. A control system comprising a wordline decoder (16), a column decoder (19) and a microprocessor (21) applies selected voltages to the respective terminals of the memory cells (10), and selects one of the plurality of cell columns for compaction verification. A detector (30) determines whether any one of the memory cells (10) of the selected cell column has a threshold voltage below a predetermined positive voltage, and supplies an output signal to the control system. The control system increases respective threshold voltages of the memory cells (10) of the selected cell column in response to the output signal of the detector (30).

The use of electrically erasable, programmable read-only memory (EEPROM) devices with floating-gate transistors is well-established. In these devices, each bit is represented by a field-effect transistor (FET) in which a polysilicon floating gate is surrounded by oxide layers which isolate it from both a polysilicon control gate and the substrate. The floating gate may carry a charge to indicate a programmed (logic 1) state, while the absence of a charge indicates an erased (logic 0) state. In the programmed state, the threshold voltage of the FET is higher than in the erased state. This provides a means for detecting the state of a bit or cell.
In some EEPROMs, known as flash EEPROMS, cells may be electrically erased simultaneously in large blocks. One of the problems arising in flash EEPROMs is over-erasure of cells. An over-erased cell has a floating gate with a positive charge, causing the channel under the floating gate to be conductive even with no voltage applied to the control gate. This causes a leakage current which can interfere with the accurate reading of other cells in its column of parallel-connected cells.
One method to prevent over-erasure is to erase the cells with the application of light erasing pulses in steps, checking after each step to determine whether all of the cells have been erased. However, while this method ensures that the threshold voltages of all of the cells will be brought below a certain value, it does not necessarily result in the cells having identical threshold voltages. Instead, because of the variation in the physical characteristics of the cells, a distribution of threshold voltages around a central value results. This distribution may resemble a normal distribution. To achieve uniformity throughout the EEPROM, it is desirable to tighten or compact this distribution, to bring each threshold voltage as close as possible to a central value.
Another problem arising in flash EEPROMs is the limited number of programming-and-erasure cycles to which the cells can be subjected. When a program step is performed for a selected cell after a flash-erase of the array, a high bias voltage on the bitline for the selected cell will cause any other cells with low threshold voltages in the same column as the selected cell to conduct a leakage current. Because of short-channel effects and potential coupling between the bitline and the floating gate, this leakage may occur even if the cells in the same column as the selected cell have positive threshold voltages.
As a result of the leakage current during programming, electrons bombard the high-voltage drain-channel junction, releasing electron-hole pairs underneath the oxide layer that separates the floating gate from the channel. These electron-hole pairs become trapped in the oxide layer, generating interface states or traps and oxide charge. The oxide layer then interacts with the substrate and behaves like a capacitor, shielding the floating gate from the channel. These phenomena cause a gradual degradation in the transconductance of a cell. With reduced transconductance, the cell fails to conduct the expected level of current when turned on, resulting in inaccurate reading of the cell's bit value and, consequently, chip failure.

Method and system for testing and adjusting threshold voltages in flash eeproms


In a liquid cooled multi-cylinder internal combustion engine comprising an engine block having a cooling water space, wherein a cylinder head is mounted on the engine block by cylinder head bolts with a cylinder head gasket disposed therebetween, and the cylinder head includes a water space which is in communication with the engine block water space by passages extending through the gasket and the cylinder head bottom wall, the cylinder head bolts extend through the passages into the engine block in spaced relationship from the walls defining the passages such that cooling water flowing from the engine block cooling water space through the passages to the cylinder head cooling water space, flows along the cylinder head bolts maintaining them at cooling water temperature, and the cylinder head includes in its cooling water space longitudinal ribs extending between the cylinder head bottom and top walls for reinforcing the cylinder head.

The invention relates to a liquid cooled internal combustion engine with an engine block including a cooling water space and a cylinder head mounted on the engine block by cylinder head bolts with a gasket disposed therebetween. The cylinder head includes a cooling water chamber delimited by cylinder head top, bottom, and side walls and for each cylinder intake passages leading to one of the side walls and exhaust passages leading to the opposite side wall. For each cylinder, the cylinderhead has a domed area for receiving a spark plug or a fuel injector, and various openings by way of which the cooling water chamber of the cylinder head is in communication with the cooling water space in the engine block.
In internal combustion engines of this type (see for example, DE AS 1526 328), the cylinder head bolts extend through passages in bolt columns, which are arranged between the cylinder head top wall and the cylinder head bottom wall. They guide the bolts and form a support structure between the cylinder head bottom and the cylinder head top wall to increase the rigidity of the cylinder head. However, after startup of the internal combustion engine, the cylinder head and the engine block heat up substantially faster than the cylinder head bolts. The cylinder head and the engine block are relatively rapidly heated by the cooling water whereas the usually very long cylinder head bolts are heated up only by heat conduction via their contact areas with the cylinder head and via the threaded ends. This leads to a time hysteresis in the temperature curve between the bolts and the surrounding components which results, with the already stretched cylinder head bolts, in a reduction of the bolt forces after repeated startup of the engine. Also, the bolt guide columns form obstacles to the water flow through the cylinder head.
It is the object of the present invention to provide for a more rapid heating of the cylinder head bolts by which the cylinder head is mounted onto the engine block so that any bolt force change is reversible.

Liquid-cooled multi-cylinder internal combustion engine


The present disclosure discloses a thermophilic L-asparaginase mutant and screening and fermentation methods thereof, and belongs to the field of gene engineering, enzyme engineering and fermentation engineering. In Bacillus subtilis 168, a Pyrococcus yayanosii CH1-derived L-asparaginase encoding gene is used as a template, and a mutation library is constructed by an error-prone PCR (epPCR) technology. A mutant strain with improved specific enzyme activity is screened through a high-flux screening method of synchronous cell disruption and enzyme activity measurement. Mutated residues included in a positive mutant are analyzed to construct a composite mutant strain S17G/A90S/R156S/K272A with improved specific enzyme activity and specific enzyme activity of 3108 U/mg. An expression quantity of the composite mutant strain in the Bacillus subtilis 168 is increased through measures of a strong promoter P43 and RBS optimization. Finally, the Bacillus subtilis 168 with a gene of the L-asparaginase composite mutant strain is subjected to enzyme production fermentation in a 5 L fermentation tank through culture medium optimization and pH and feeding coupling strategies. The enzyme activity yield of the L-asparaginase is up to 6453+/−127 U/mL.

L-asparaginase (E.C.22.214.171.124) can catalyze L-asparaginate to be deaminized to generate L-aspartic acid and ammonia. The L-asparaginase is mainly used in the pharmaceutical industry and the food industry. In the pharmaceutical industry, the L-asparaginase is used as one of therapeutic and anticancer drugs due to its inhibition effect on some tumors. L-asparaginase II separated and purified from E. coli, Erwinia chrysanthemi and E. carotovora has been widely applied to treating diseases such as acute lymphoblastic leukemia, lymphatic sarcoma and retothelial sarcoma. In the food industry, the L-asparaginase can reduce the content of the L-asparaginate which is a precursor substance of a cancerogenic substance, namely acrylamide, in food subjected to high-temperature treatment such as frying and baking, thereby reducing generation of the acrylamide from the source.
To obtain L-asparaginase which is more suitable for food and medical treatment, many researchers transform the L-asparaginase by measures of gene engineering, enzyme engineering and the like. Long et al. have found key amino acid residues that affect the activity of the L-asparaginase of Bacillus subtilis. By mutation of these residues, the catalytic efficiency of this enzyme is improved (Enzyme Microb Technol, 82, 15-22). Offman et al. have obtained a mutant strain which is capable of resisting protease hydrolysis and has improved enzyme activity by building a new genetic algorithm and researching the partial flexibility and the molecular dynamics of the L-asparaginase. The two characteristics are both characteristics required by medical L-asparaginase (Blood, 117(5), 1614-21). Kotzia and Labrou have obtained a mutant strain with improved enzyme activity and thermal stability by performing staggered extension hybridization on L-asparaginase genes of E. carotovora and E. chrysanthemi through orthogenesis. A beneficial screening method can simplify a screening process and reduce the workload. Although there are many measures for distinguishing key amino acids and constructing a mutation library, few methods for screening the L-asparaginase have been reported. In the aspect of screening of the L-asparaginase, there is only one method, reported by Gulati et al., for screening the L-asparaginase on a flat plate by taking L-asparaginate as a unique carbon source and taking phenol red as a developing agent (Lett App Microbiol, 24(I), 23-6), but this method is not applicable to screening of intracellular enzymes and thermophilic L-asparaginase.
In the aspect of a research for producing the L-asparaginase by microorganism fermentation, a few to several hundred (U/mL) of L-asparaginase is produced through fermentation of different processes and hosts. Ferrara et al. make Saccharomyces cerevisiae-derived L-asparaginase expressed in Pichia pastoris. Then, when a mycelium biomass is up to 107 g·L−1 under high-density fermentation, an enzyme activity yield is up to 85.6 U/mL (Enzyme and Microbial Technology, 2006, 39(7): 1457-1463). Chityala et al. make P. carotovorum MTCC 1428-derived L-asparaginase expressed in B. subtilis WB800N, a final yield of the enzyme is up to 105 U/mL (Bioprocess and Biosystems Engineering. 2015. 38(11): 2271-2284) by optimizing conditions such as a culturing temperature, a rotating speed, a concentration of an inducer and inducing time and adopting a continuous inducing strategy. Feng et al. make Bacillus subtilis-derived L-asparaginase overexpressed in Bacillus subtilis, and the enzyme activity yield in a 3 L fermentation tank is finally up to 407.6 U/mL (Appl Microbiol Biotechnol, 101(4), 1509-1520) through measures of signal peptide screening, promoter mutation and protein nitrogen end excision, and is the previously reported highest enzyme activity yield of the L-asparaginase expressed in a safe food strain. Amardeep et al. feed through an exponential fed-batch strategy, control a specific growth rate of E. coli thalli, and optimize the adding time of an inducer IPTG. Finally, when OD600 is 90, a yield of 870 U/mL of the L-asparaginase (Applied Microbiology and Biotechnology, 2005, 68(2): 189-197), which is the previously reported highest enzyme activity yield of the L-asparaginase is obtained. There are still rooms for improving the enzyme activity yield and the specific enzyme activity.

Thermophilic L-asparaginase mutant and screening and fermentation methods thereof


A liquid applicator includes a tubular casing, a liquid holding member, and a support member. The support member whose modulus of elasticity is smaller than that of the liquid holding member is provided between a bottom end portion of the liquid holding member and a bottom wall of the casing. The support is formed such that at least a portion of an outer circumferential surface of the support member is in pressing contact with an inner circumferential surface of the casing and that the support member is compressively deformable in an axial direction thereof while being held tightly between the liquid holding member and the bottom wall of the casing. Accordingly, the liquid holding member can be reliably supported in the casing.

This invention relates to liquid applicators including writing instruments such as ball-point pens and paint markers.
In general, the liquid applicators are each provided with a casing for accommodating a liquid holding member such as an ink reservoir. This casing is constructed such that an opening is provided at a lead end thereof while a bottom wall is provided at a bottom end thereof. These liquid applicators require a structure for supporting the liquid holding member in a specified position of the casing.
Japanese Unexamined Utility Model Publication No. 1-80391 discloses a liquid applicator in which a support member is provided between a bottom end of a liquid holding member and a bottom wall of a casing so as to support the liquid holding member. This support member is formed of flexible material such as plastics and has a plurality of support pieces extending outwardly, thereby forming a bell-like shape at a lead end thereof. The support member is pressingly fit into the casing with these support pieces warped radially inward.
Further, Japanese Unexamined Utility Model Publication No. 46-2727 discloses a liquid applicator in which a spring is provided between a bottom end of an ink cartridge serving as a liquid holding member and a bottom wall of a casing so as to support and bias the ink cartridge constantly toward the lead end of the applicator.
The support member disclosed in the former publication is complicated in its shape and accordingly it is difficult to mold the same. Further, this support member makes almost no deformation in an axial direction of the liquid applicator. This makes the assembling of the liquid applicator as a whole difficult even when the axial dimension of support member is only slightly greater than a specified dimension, and also leads to a compressive deformation of the liquid holding member in the case where the liquid holding member is soft, thereby hindering the liquid from flowing in a satisfactory manner. In view of the above, the axial dimension of the support member is forced to be set smaller than the specified dimension, with the result that a clearance is defined between the support member and a bottom face of the liquid holding member. Therefore, these members cannot be properly positioned relative to each other.
On the other hand, the liquid applicator disclosed in the latter publication requires a special means for positioning the spring lest the spring should be displaced in the radial direction of the applicator because there is a clearance between the spring and an inner circumferential surface of the casing. This requirement makes the construction of the liquid applicator complicated.

Liquid application with resilient support


A wireless control is provided for a lamp, such as a fluorescent lamp, controlled by a ballast with a wireless control interface for RF communication. The receiver input and the transmitter output of the control interface module are connected to one or more electrode wires by a coupling capacitor(s) or a Lecher line transformer. During operation the lamp electrodes serve as the lamp antenna.

Lighting control in an office or commercial building has gone through several stages ranging from "on/off"-control of a single lamp or a group of lamps, through dimming of a single lamp or a group of lamps, to advanced control of the lighting in an entire building. In normal lighting systems it is the individual lamp drivers of the luminaires that are controlled. The traditional lamp driver systems are wired control interface systems, such as the standard 1-10 V dimming interface and more recently digital systems, such as the Digital Addressable Lighting Interface (DALI). The interface systems are moving towards wireless interfaces, such as systems implementing the ZigBee standard, a system that uses radio frequencies around 2.4 GHz.
A wireless interface using electromagnetic signals needs an antenna for transmission and reception of control signals. For a lamp driver the situation is, however, complicated by the fact that the application has a metal housing. The housing will isolate an internal antenna from the environment, thereby largely blocking the transmission and reception of the electromagnetic signals. Furthermore the lamp driver itself can be enclosed in a metal housing that further attenuates the electromagnetic signals. In some technological areas this is not a problem. For example, a cellular phone has a plastic housing and the antenna can be located completely inside the application.
In the US patent application 2003/0090889 a ballast with an integrated RF wireless interface is disclosed. For a ballast with an embedded antenna, it is disclosed that in order to get the radiation outside the ballast, a plastic case may be used as a cover for the ballast, or in case of a metal cased ballast, a halfwavelength slot antenna may be used as the cover.

Antenna through the use of lamp electrodes


A profile for making channel letters is disclosed. The profile can have a rule having a top edge, a bottom edge, a first surface, and a protective coating. The top edge and the bottom edge can be separated by a profile height. The first surface can describe an interior surface of a completed channel letter. The profile can also have a first rib bonded to the first surface with an adhesive. The first rib can be disposed parallel to a profile axis and separated from the top edge by a face plate thickness. The first rib can be configured to receive one or more cuts allowing the profile to bend and form the channel letter. The profile can be made by bonding the first rib to the rule using an adhesive.

1. Technological Field
The present disclosure relates to channel letters, and more specifically, to profiles used for generating channel letters.
2. Background
Metal rules used in manufacturing channel letters can be flat metal strips that are cut at one or more edges and flanged to provide structural support. However, flat metal rules are limited in their ability to provide neatly finished channel letters as the resulting channel letter can require a cover that wraps over the un-finished edges of the completed channel letter.

Profiles used in generating channel letters


A method is disclosed for performing a discrete cosine transform on a transform input value wherein the discrete cosine transform has a plurality of predetermined transform coefficients. A number N.sub.1 of shift operations is determined independently of the transform input value in order to provide a set of N.sub.1 of shift operations. A number N.sub.2 of add operations is determined independently of the transform input value in order to provide a set of N.sub.2 add operations. The transform input value is operated upon only by the N.sub.1 shift operations and the N.sub.2 add operations to provide a discrete cosine transform output value without any multiplication. This method may be applied to both forward and inverse discrete cosine transforms. The transform coefficients are simplified coefficients which are provided by truncating and modifying prior art transform coefficients. This simplification is adapted to provide coefficients which require fewer than a predetermined number of shift and add operations in order to determine an approximation of the product which would result from a multiplication by the coefficient. The simplification of the coefficients causes degradation of a video image transformed using the simplified coefficients. Therefore the simplification is constrained to cause an acceptable amount of image degradation.

The two-dimensional discrete cosine transform is a pair of mathematical equations that transforms one N.times.N array of numbers to or from another N.times.N array of numbers. The first array typically represents an N.times.N array of spatially determined pixel values which form the digital image. The second array is an array of discrete cosine transform coefficients which represent the image in the frequency domain. This method of representing the image by the coefficients of its frequency components is a special case of the discrete Fourier transform. The discrete Fourier transform is the discrete version of the classic mathematical Fourier transform wherein any periodic waveform may be expressed as a sum of sine and cosine waves of different frequencies and amplitudes. The discrete cosine transform, like the Fourier transform, is thus a transform which transforms a signal from the time domain into the frequency domain and vice versa.
It is well known in the art to use these discrete cosine transform coefficients for image compression. In combination with other techniques, such as color subsampling, quantization, Huffman coding and run-length coding, the discrete cosine transform can compress a digital color image by a factor of approximately thirty to one with virtually no noticeable image degradation. Because of its usefulness in image compression, the discrete cosine transform is an integral part of several image compression standards used by international standards committees such as the International Standards Organization.
There are two basic discrete cosine transform equations. The first basic equation is the forward discrete cosine transform which transforms the pixel values into the discrete cosine transform coefficients. The second basic equation is the inverse discrete cosine transform which transforms the discrete cosine transform coefficients back into pixel values. Most applications of the discrete cosine transform for images use eight-by-eight arrays wherein N therefore has a value of eight. Assuming then that N has the value of eight when performing the transforms, where p(i,j) are the values of the pixel array and f(u,v) are the values of the discrete cosine transform coefficients, the equations of the discrete cosine transforms are as follows.
The forward discrete cosine transform may be expressed as: ##EQU1##
The inverse discrete cosine transform may be expressed as: ##EQU2##
The forward and reverse discrete cosine transform operations of Equation (1) and Equation (2) may be represented by the diagram shown in prior art FIG. 1. Forward discrete cosine transform 12 of Equation (1) transforms eight-by-eight array 10 of pixel values in the spatial domain to an eight-by-eight array 16 of discrete cosine transform coefficients in the frequency domain. Inverse discrete cosine transform 14 performs the reverse transformation. Discrete cosine transform coefficient array 16 represents the frequency content of the p(i,j) function, separately, in both the horizontal and vertical directions. Since discrete cosine transform 12 operates on two-dimensional array 10, it is referred to as two-dimensional discrete cosine transform 12. In the result of two-dimensional transform 12 the horizontal dimension of coefficient array 16 represents the horizontal frequency and the vertical dimension of coefficient array 16 represents the vertical frequency.
In f(u,v) array 16 or frequency domain array 16, frequencies increase with increasing value of the (u,v) indices. Discrete cosine transform coefficient 17 in the upper left corner of array 16 corresponds to zero frequency in both horizontal and vertical directions, and is referred to as the DC term of frequency domain array 16. From forward discrete cosine transform Equation (1), it can be seen that f(0,0) coefficient 17 is equal to the average of all sixty-four f(i,j) pixel values, multiplied by a scaling factor. It is well known in the art that f(0,0) coefficient 17 or DC term 17 has this characteristic. The other sixty-three (u,v) coefficients within discrete cosine transform coefficient array 16 represent amplitudes of cosine waves of increasing frequency and are therefore AC coefficients.
Referring now to prior art FIGS. 2A-D, there are shown eight-by-eight spatial domain arrays 30, 32, 34, and 36 of pixels and their corresponding frequency domain discrete cosine transform coefficient arrays 38, 40, 42 and 44. Darker squares in spatial domain arrays 30, 32, 34, 36 represent darker pixels. It will be understood that the relative darkness of squares in arrays 30, 32, 34, 36, 38, 40, 42, 44 is represented by the density of stippling. Darker squares in frequency domain arrays 38, 40, 42, 44 represent smaller discrete cosine transform coefficients and lighter squares represent larger coefficients.
The image represented by spatial domain array 30 is thus completely flat since all squares in array 30 are the same level of darkness. Therefore discrete cosine transform array 38, corresponding to spatial domain array 30, contains only a single DC term 38a. All other sixty-three coefficients of discrete cosine transform array 38 are zero and are thus represented as black with the brightest density of stippling.
The image represented by spatial domain array 32 however, has a slowly varying horizontal gradient. Therefore, discrete cosine transform array 40 or frequency domain 40, corresponding to spatial domain array 32, contains not only DC term 40a but also contains a small number of low-frequency horizontal frequency terms 40b,c. The high-frequency horizontal terms and all vertical frequency terms of discrete cosine transform array 40, however, are all zero.
The image represented by spatial domain array 34 contains sharp horizontal edge 34a. Sharp horizontal edge 34a causes all eight vertical frequency bands represented by squares 42a-h of discrete cosine transform coefficient array 42 to indicate energy. Because horizontal edge 34a of spatial domain array 34 is encountered when tracing vertically through the image represented by array 34, and all eight cosine waves represented by squares 42a-h are needed to produce a sharp edge after forward discrete cosine transform 12 is performed. Thus all eight terms 42a-h of corresponding discrete cosine coefficient transform array 42 are non-zero and are indicated as lighter than the remaining squares of array 42 with a lower density of stippling. All fifty six horizontal frequencies of corresponding discrete cosine transform array 42 are zero and are represented as dark squares because the image of spatial domain array 34 is smooth in the horizontal direction.
The image represented by spatial domain array 36 contains a single isolated pixel 36a. This produces energy in all sixty-four discrete cosine transform coefficients of corresponding discrete cosine coefficient transform array 44. This energy is produced in all sixty-four cosine terms of frequency domain array 44 because isolated pixel 36a of spatial domain array 36 produces a sharp transition in both the horizontal and vertical directions. Thus sixty-four cosine terms must be provided to produce a single-pixel two-dimensional impulse function as represented by pixel 36a of spatial domain array 36.
Another important feature of discrete cosine transforms 12, 14 is that they are reversible, information-preserving, transformations. This means that exactly the same image information is present in spatial domain p(i,j) array 10 as in frequency domain f(u,v) array 16. The information in arrays representations 10, 16 is merely represented in different forms. Both array representations 10, 16 contain exactly the same information, and they can be converted from one representation to the other by applying the appropriate discrete cosine transformation 12, 14.
It is this reversible feature of discrete cosine transforms 12, 14 which permits them to be very useful for image compression. Each eight-by-eight p(i,j) array, such as spatial domain arrays 30, 32, 34, and 36, contains values representing an eight-by-eight portion of an image. For image compression arrays 30, 32, 34, and 36 may each be transformed into corresponding eight-by-eight f(u,v) arrays 38, 40, 42, and 44 in the frequency domain using forward discrete cosine transform 12 as set forth as Equation (1). Various compression algorithms may then be applied to f(u,v) arrays 38, 40, 42, and 44. To reconstruct the original images represented by spatial domain arrays 30, 32, 34, and 36, the compression algorithm is reversed to yield f(u,v) arrays 38, 40, 42, and 44. Inverse discrete cosine transform 14, set forth as Equation (2), is then applied to f(u,v) arrays 38, 40, 42, and 44 to provide p(u,v) arrays 30, 32, 34, and 36.
Referring to Equation (2), it can be seen that each p(i,j) is a result of a double summation. For a given i,j,u, and v, all the constants, C(u), C(v), cosval(i,u), and cosval(j,v), may be combined into one constant K(i,j,u,v). The K(i,j,u,v) constant may even include the (1/4) in these constants. Thus Equation (2) becomes: ##EQU3##
Thus straight forward calculation of the inverse discrete cosine transform of Equation (2) requires sixty-four floating-point multiplications per pixel. This is approximately five million multiplications for a modest size three-hundred twenty by two-hundred forty pixel image.
However, there are methods known in the prior art to reduce this computational requirement by several orders of magnitude. One method known in the prior art reduces the computation required to sixteen integer multiplications per pixel. Another prior art method, based upon further mathematical manipulation, can calculate the discrete cosine transforms 12, 14 using only two and three-quarters multiplications per pixel. However, even these methods still require too much computation to perform discrete cosine transforms 12, 14 for many applications.
These prior art methods must allow for the fact that the dynamic range of the f(u,v) values is eight times the range of the p(i,j) values,.+-.1024 versus.+-.128. This is required in order to preserve all the information in the p(i,j) spatial domain values when they are converted to the f(u,v) values of the frequency domain. Additionally, these prior art methods must allow for the fact that both the p(i,j) values of the spatial domain and f(u,v) values of the frequency domain are signed numbers. If forward discrete cosine transform 12 is used on eight-bit pixel values, for example, which have a numerical range of zero to two hundred fifty five, then one hundred twenty eight must subtracted from the pixel values to cause them to have the required range of negative one hundred twenty eight to positive one hundred twenty seven. This subtraction must be performed prior to using forward discrete cosine transform 12. Similarly, after performing inverse discrete cosine transform 14 one hundred twenty eight must be subtracted to return the pixel values to their proper range.
Another known improvement reduces the number of multiplications to sixteen per pixel, as previously described. This improvement was developed by determining that inverse discrete cosine transform Equation (2) may be rewritten as: ##EQU4## Both two-dimensional inverse discrete cosine transform 14 and forward discrete cosine transform 12 are separable transforms. Thus, two-dimensional inverse discrete cosine transform 14 can be separated into two one-dimensional inverse discrete cosine transforms. Each of the one-dimensional transforms is being of the form: ##EQU5##
Equation (5) represents a one-dimensional discrete cosine transform between two eight-element arrays p(i) and f(u). The separability of two-dimensional discrete cosine transforms 12, 14 thus means that they can be calculated as sixteen one-dimensional discrete cosine transforms. One-dimensional inverse discrete cosine transforms are first performed on each of the eight rows of f(u,v) matrix 16 to form a resulting intermediate array (not shown). One-dimensional discrete cosine transforms are then performed on each of the eight columns of the resulting intermediate matrix. The result of these operations is the same p(i,j) coefficient array 10 as computed using inverse discrete cosine transform 14.
According to Equation (5), there are sixty-four multiplications in a one-dimensional discrete cosine transfer. Sixteen one-dimensional discrete cosine transforms are required for two-dimensional discrete cosine transforms 12, 14. Thus a total of sixteen times sixty-four multiplications ar required for two-dimensional discrete cosine transform 12, 14 using this prior art method. Since there are sixty-four pixels this equals sixteen multiplications per pixel. Thus the number of multiplications per pixel is reduced by a factor of four in this prior
Still further improvement in the number of multiplications required may be obtained by considering the sixty four constants used by the one-dimensional discrete cosine transform as set forth in Equation (5). Ignoring the factor (1/2) in Equation (5), as well as the values of C(u), consider only the cosval(i,u) values. From the original equations: ##EQU6## where M=(2i+1)u.
Referring now to Table I, the values of M for all sixty-four constants are set forth,
TABLE I ______________________________________ 0 1 2 3 4 5 6 7 0 3 6 9 12 15 18 21 0 5 10 15 20 25 30 35 0 7 14 21 28 35 42 49 0 9 18 27 36 45 54 63 0 11 22 33 44 55 66 77 0 13 26 39 52 65 78 91 0 15 30 45 60 75 90 105 ______________________________________
Since M=(2i+1)u, the values in row i of Table I are multiples (2i+1). Each of these corresponds to the cosine of M*.pi./16. But the cosine function is periodic and symmetrical in various ways as well. Thus, the cosine of M*.pi./16, for any M, is equal to either the positive or negative cosine of M*.pi./16 with M between zero and seven. For example, cos(35*.pi./16)=cos(3*.pi./16), since the cosine function repeats every thirty-two values of M. Thirty values of M corresponds to 2*p(i). Thus, the array of Table I may be reduced to the cosines set forth in Table II.
TABLE II ______________________________________ 0 1 2 3 4 5 6 7 0 3 6 -7 -4 -1 -2 -5 0 5 -6 -1 -4 7 2 3 0 7 -2 -5 4 3 -6 -1 0 -7 -2 5 4 -3 -6 1 0 -5 -6 1 -4 -7 2 -3 0 -3 -6 7 -4 1 -2 5 0 -1 2 -3 4 -5 6 -7 ______________________________________
Within Table II, a negative sign before a value of M indicates that a constant is -cos(M*.pi./16) rather than cos(M*.pi./16). From the contents of Table II, it can be seen that there is a great deal of redundancy when computing the one-dimensional discrete cosine transform using Equation (1). For example, when computing each p(i) value there is a multiply f(4) by the same constant (M=4) all eight times in the fifth column of Table II. These multiplies differ only by their sign. Similarly, f(0), set forth in the first column of Table II, is always multiplied by M=0 when performing this transform. Additionally, f(2) is multiplied by only two different constants, either by M=2 or by M=6.
Thus in this method all eight p(i) values are calculated at the same time using one calculation. Only the minimum number of multiplications of f(u) values by constants are performed and an overall savings are achieved by reusing these intermediate results. Algorithms of this type are called fast cosine transform algorithms, and are analogous to the well-known fast fourier transform.
Further improvement may be obtained using a method requiring eleven multiplications instead of sixty-four for a one-dimensional discrete cosine transform. Such a method is taught in Loeffler, Ligtenberg, and Moschytz in "Practical Fast 1-D DCT Algorithms With 11 Multiplications," IEEE Transactions, 1989. It can be proven mathematically that eleven multiplications is the minimum possible for a one-dimensional fast cosine transform as taught in the prior art. Using this improvement a two-dimensional discrete cosine transform only requires 11*16/64=2.75 multiplications per pixel.
Thus, many improvements upon basic forward discrete cosine transform 12 and inverse discrete cosine transform 14 are known in the prior art. However, in all of these prior art methods, in spite of the benefits of the improved discrete cosine transforms 12, 14 for image compression, many clock cycles are still required to perform the remaining multiplications. Calculations of prior art forward discrete cosine transform 12 and inverse discrete cosine transform 14 which eliminate some multiplications are still very time consuming because of these remaining multiplications. It will be understood that prior art improved discrete cosine transforms are still very expensive because on most processors a multiply instruction is significantly more time consuming than an add operation or a shift operation. On processors that do not have a hardware multiplier, the difference in the number of cycles is very dramatic. This difference may be as much as a factor of ten or twenty. It will be understood by those skilled in the art that the computational time requirements of inverse discrete cosine transform 14 are very similar to the computational time requirements of forward discrete cosine transform 12.


A reactor assembly including a first core formed of a plurality of stacked E-shaped planar metal laminates welded together, and a second core formed of a plurality of stacked I-shaped planar metal laminates welded together. The first core includes a plurality of legs having bottom surfaces, the plurality of legs including first and second outer legs and a center leg. A bobbin assembly is provided with a plurality of bobbins each having a hollow inner cavity, and wire wound around the bobbin. The plurality of bobbins including first and second outer bobbins and a center bobbin. A U-shaped spring clip includes a pair of clip arms that each extend down through a different one of the inner cavities, and tab apertures that are engaged with matching latching tabs on the second core, such as on a mounting foot secured to the second core.

Electrical reactors are used in various power quality applications on single phase or three electrical grids on a wide range of voltages (e.g. 208V, 230V, 277V, 480V, 600V, 690V). These reactors are often constructed from a magnetic steel core with a conductive coil made of copper or aluminum. In order to mitigate eddy current losses within the reactor core when applied to high harmonic currents, laminated core steel is used for the E-shaped and I-shaped core sections. Laminated core steel is typically comprised of many individual layers or laminations, requiring special handling and stacking of the core pieces prior to being used in the reactor assembly. Motion of the separate lamination pieces from magnetic fields, when the reactor is operated as intended with harmonic currents, cause undesirable noise. And it is important that the E-shaped sections and the I-shaped sections have the same number of laminations. These electrical reactors require specialized manufacturing techniques to make the units more power efficient, less audibly noisy, withstand harsh industrial environmental conditions, and to meet electrical safety standards. To address these requirements, mechanical connectors such as clamps or braces are added to clamp these laminations together to reduce noise, but adding these parts and fasteners increases labor required to assemble the reactor. Alternatively, specialized, time consuming manufacturing techniques are often employed, including a varnish dip immersion followed by an hours-long heat cure treatment process used to sound proof the reactor and to environmentally protect the reactor laminations and coil. This process can take hours to pre-heat the reactor, immerse in varnish, and cure in a high temperature oven. Aside from the queue time required by this process, a significant amount of energy, whether originating from fossil fuels such as natural gas, or in general, electrical power, is required to operate industrial ovens at high temperature for long periods of time.
As such, reactor assemblies with improved features to address the aforementioned drawbacks, as well as other deficiencies in the prior art, are desired.

Bobbin wound electrical reactor assembly


An image sensor includes a photosensitive region that accumulates charge corresponding to received incident light; a transfer gate for transferring charge from the photosensitive region; a voltage supply having an increasing voltage over time; a floating diffusion for receiving the charge from the photosensitive region and converting the charge to a voltage; an amplifier for receiving and amplifying a signal from the floating diffusion; a comparator for comparing a voltage from the amplifier to a reference voltage; and a counter for counting clock cycles between initiation of the increasing voltage until a signal is received from the comparator indicating charge transfer from the photosensitive region to the floating diffusion; wherein a digital signal is generated that represents an unfilled capacity of the photosensitive region.

Presently known CMOS image sensors all have the same or substantially the same structures. They typically include the photosensitive devices, like a photodiode or photogate, in the pixel array to convert the optical signal to charge; a floating diffusion capacitor for converting the charge to a voltage; and a pixel amplifier buffering the floating diffusion capacitance from the large output bus capacitance and sending the electrical signal out of the pixel array. The pixel output signals are stored by a sample/hold circuit array followed by an analog signal processing chain and an analog-to-digital converter.
The drawbacks for this present CMOS image sensor is the high noise, low speed and high power. These problems can be addressed by moving the analog-to-digital conversion to earlier stages and then processing the signal in the digital domain. One such prior art for processing in digital domain in an earlier stage is disclosed in IEEE Journal of Solid-State Circuits, Vol. 36, No. 12, December 2001 (page 2049). This prior art includes a ramped voltage applied to a comparator independently of the pixel. This independence can cause pixel-to-pixel non-uniformities at the output.
Consequently, a need exists for addressing the high noise, low speed and high power of the image sensors having the latter stage analog-to-digital conversion circuits and the pixel-to-pixel non-uniformities of the image sensors having earlier stage analog-to-digital conversion circuits. This pixel-to-pixel non-uniformities is addressed in the present invention in which the transfer gate adjacent the photodiode is ramped, and the reference voltage is from the pixel reset.

This patent is subject to a terminal disclaimer.

Pixel analog-to-digital converter using a ramped transfer gate clock


An axle positioning structure to provide stable positioning and an automatic reposition function includes an axle and a rotary member. The axle has a stem with an axial tangent surface. The rotary member has a non-continuous annular sleeve slightly larger than the outer diameter of the stem. The annular sleeve has a pressing surface on an end corresponding to the axial tangent surface. The pressing surface can be swiveled away from the axial tangent surface and then press on the perimeter of the stem such that the inner diameter of the annular sleeve is expanded to provide a pressing force for the stable positioning. When the pressing surface is swiveled to the middle portion of the axial tangent surface, the pressing surface escapes from the perimeter of the stem so that the annular sleeve provides a returning force to automatically return to the original position.

1. Field of the Invention
The present invention relates to an axle positioning structure to provide stable positioning and automatic reposition adopted for using on two objects that can rotate relative to each other, and particularly for an electronic device that has a rotary cover.
2. Related Art
Many portable electronic devices such as notebook computers, mobile phones and the like have a host and a display screen. The display screen can be swiveled relative to the host. When not in use, the display screen can be folded over the host to reduce the size and protect the display screen. When in use, the display screen can be swiveled to form an angle with the host for viewing and operation. To generate the relative rotation between the display screen and the host, they must be hinged with an axle. There are many axle positioning techniques disclosed in the prior art. Reference can be found in Taiwan patent publication numbers 508040, 523127, 526962, 530864, 566816, 572574, 586635, M256670, M245281, etc.
When the axle is adopted on notebook computers, the display screen is unfolded to form an angle with the host and maintained at that angle when in use. To do that, some conventional axle positioning structures use a spring or pad to provide a stable positioning force (such as Taiwan patent publication numbers 586635 and M245281); some provide the stable positioning force through the surface structure of the axle (such as Taiwan patent publication numbers 526962, 530864, 566816 and 572574). Whether providing the positioning force through a spring, pad or surface structure, the axle positioning structure is too complex. Fabrication and assembly are difficult and the cost is too high. To resolve the problem of complex structure, Taiwan patent publication No. 508040 discloses an "Axle radial urging structure" that has a friction member including an arched portion corresponding to the outer diameter of the axle and an arch centrum. Through different diameters of the friction member, the arch centrum has an inner diameter smaller than the outer diameter of the axle. Hence the axle is squeezed during rotation, providing a positioning force. The axle also has a milling surface fitting with the arch centrum to form an automatic latching. Taiwan patent publication No. 508040, providing a tapered design to generate the positioning force for squeezing, has a structure simpler than most of the prior arts mentioned above. However, the arch centrum has varying diameters. That may increase difficulties in the production. Moreover, if the fit between the arch centrum and the axle is too loose, the positioning force is too weak and the stable positioning becomes ineffective. On the other hand, if the fit is too tight, the positioning force is too strong, and the rotation becomes difficult or automatic latching could become impossible.
Taiwan patent publication No. M256670 discloses an "Axle structure" that is the continuous-in-part of No. 508040. It has a sleeve formed with the same diameter. The sleeve has a slit and a flat surface on the inner wall. Through the slit and the flat surface, a squeezing force can be provided. And through the flat surface and a corresponding milling surface, automatic folding can be achieved. Taiwan patent publication No. M256670 also discloses a simpler structure. But its design of the same diameter still has difficulties during production. The flat surface has to be formed on the inner wall of the sleeve. As the typical axle used on portable electronic devices is about 5 to 6 mm, to fabricate the flat surface on the inner wall of such a small size is quite difficult.


A sound absorber for a blower has a housing having an air inlet opening, an axially arranged air outlet passage, and a substantially spiral-shaped passage which connects the air inlet opening with the air outlet passage, a sound absorption material which forms walls of the substantially spiral-shaped passage, and reflector which at least partially surrounds the air outlet passage and screens the air outlet passage in direction of an air inlet opening.

The present invention relates a sound absorber for blowers.
In blowers there is an especially extensive noise generation, when high flow speeds and a great pressure increase is produced at high rotary speeds. It can be reduced by sound absorbers, which are arranged in the aspiration region.
In stroke piston internal combustion engines carbon monoxide and hydrocarbon compounds are produced in the exhaust gas during a cold start because of the incomplete combustion resulting from the mixture expansion. If fresh air is blown into an exhaust system of a stroke piston internal combustion engine, an exothermic post-oxidation of the hydrocarbon compounds is produced. The contents of the carbon monoxide and hydrocarbon compounds is thereby directly reduced. Additional heat is supplied to the catalysts by the combustion process, which is advantageous for the cold start. The catalysts reaches fast a favorable operational temperature.
During blowing of fresh air into the exhaust system secondary blowers are utilized. The fresh air can be aspirated through an air filter of the stroke piston internal combustion engine. Additional conduits are provided for this purpose and involve substantial expenses. If the fresh air is aspirated from the free atmosphere, for example through a not closed opening, the noise generation from the blower which is produced for the above mentioned reasons must be absorbed or dampened. For this purpose separate sound absorbers are used for the blower.
Such a blower is disclosed for example in the German patent document DE A1 4205489 and shown in this reference in FIGS. 5 and 6. The sound absorber has a housing cup with a flat cup bottom, a cup wall and a housing cover which closes the cup opening. An air inlet opening is formed by a bore hole in the cup wall, and an air outlet passage is formed by a central bore hole. The air inlet opening and the air outlet passage are connected by a spiral passage. The passage is formed by a damping insert of an open-pore, sound absorbing material. The passage from the cup bottom to the housing cover extends in an axial direction of the blower. The passage is limited by the cup bottom and the housing cover.
The noise generation, especially an aspiration noise produced in the region of the aspiration opening of the blower and thereby at the air outlet passage of the sound absorber is not sufficiently dampened.