A high speed and high load operable hydraulic drive cylinder system comprises a principal cylinder (3) with a piston (3a)) defining an upper and a lower chamber (3c, 3d) and a piston rod (3b), and a subsidiary cylinder (2) smaller in pressure receiving area than the principal cylinder and a piston (2a) defining an upper and a lower chamber (2c, 2d) and a piston rod (2b) smaller in diameter than the piston rod (3b). With the cylinders (2, 3) arranged coaxially up/down and the pistons (2a, 3a) interconnected by the piston rod (2b), the system has a fluid feed control so associated with the cylinders (2, 3) as acting to supply pressure fluid into the principal chambers (3c, 3d) to permit the pistons (2a, 3a) jointly to descend rapidly with a difference in pressure receiving area between them (3c, 3d), to supply the fluid into the upper principal chamber (3c) to cause the pistons (2a, 3a) to descend while exerting a pressure, to terminate a supply of the fluid into the principal chambers and the lower subsidiary chamber (2d) to maintain the pistons in a position with a pressure held exerted, to supply the fluid into the lower subsidiary chamber and the lower principal chamber to allow the pistons to ascend slowly, and to supply the fluid into the lower subsidiary chamber to permit the pistons to ascend rapidly. Also disclosed is a method of controlling the system.

There have hitherto been known certain hydraulic cylinder devices of the type described as disclosed, for example, in Japanese Unexamined Utility Model Publication No. Hei 6-39285 and Japanese Unexamined Patent Publication No. Hei 6-155089, in the prior art.
There is disclosed in the former publication above a hydraulic cylinder device or apparatus which, as shown in FIG. 1 of the drawings attached hereto, makes use of a high speed cylinder a that has a smaller pressure receiving area and a pressurizing cylinder b that has a larger pressure receiving area, the two cylinders being arranged coaxially and vertically up and down. The two cylinders a and b have their respective pistons c and d interconnected by a piston rod e and are assembled providing a so-called double rod cylinder configuration in which the upper end portion of the piston rod e is allowed to protrude upwards of the high speed cylinder a.
In the apparatus so constructed, it may be noted that via pipes and valves arranged externally of the two cylinder assembly, a pressure fluid is supplied to the high speed cylinder a to cause the pistons c and d to act rapidly and thereafter is supplied to the pressurizing cylinder b to develop an increased pressing force, thereby meeting with a requirement for a greater or higher load.
It may also be noted that the latter publication above discloses a hydraulic cylinder assembly which, in addition to having a basic construction that is essentially the same as the assembly described, as shown in FIG. 2 of the drawings attached hereto, has an interconnecting rod e that is provided, where the rod joins with the piston d in the pressurizing cylinder b, with a sequence valve f that can be opened and closed by a pilot pressure and used to switch the operation from a high speed into a high pressure mode. With the cylinder assembly so constructed, the apparatus is rendered capable of meeting with the requirements for a high speed (rapid) and a high load (heavy) operation without requiring the above mentioned pipes and valves as arranged externally of the cylinder assembly.
Despite these advantages, however, the prior devices have been found to be much unsatisfactory and inconvenient. Thus, the first mentioned known cylinder apparatus has been found defective in providing a satisfactory "detachment" force and therefore inconvenient, for example, when used as a drive source in a press with a pressing (upper) die and a receiving (lower) die where the latter die may have been caused to "bite" the former die in a pressing operation, because it may be rendered unable to detach the die (upper) that was bit from the die (lower) that bit.
It has also been noted that the second mentioned known cylinder apparatus in which a sequence valve f is provided internally where the piston rod e joins with the piston d in the pressurizing cylinder b is found defective and inconvenient because of its poor outfitting capability.
It should further be noted that neither of these assemblies in which the double rod cylinder configuration is adopted for the upper cylinder as well requiring the entire assembly to be lengthened, would be satisfactory or convenient if adapted, for example, in a press because the press would then have to be sized to be greater in height and larger.
Yet, it should be noted that both the arrangements are not economical or convenient because of the requirement that a single rod e serve commonly as both the piston rod for the high speed cylinder a and the piston rod for the pressurizing cylinder b, that is, be hence of a single given for both the cylinders but unnecessarily enlarged diameter for the high speed cylinder.
With the view to eliminating such inconveniences and deficiencies as encountered in the prior art, it is an object of the present invention to provide a high speed and high load operable hydraulic drive cylinder system which makes it easier to detach a die "that has been bit" from a die "that has bit" as mentioned above, allows a press or the like machine tool for use therewith to be considerably smaller sized and is rendered economical. It is another object of the present invention is to provide a method of controlledly operating a system as described.

High speed and high-load cylinder device and method for controlling the same


A system and method may provide assistance to programmer during programming to detect and predict the existence of errors in code and, in some aspects, predict fixes for erroneous code. In some aspects, the system and method may use artificial intelligence to learn based on edits made by programmers, by observing code changes that cause errors and code changes that fix errors, or based on other data.

Computer programmers spend a large portion of their time debugging code and fixing errors. It is often time consuming for programmers to debug code, even when facing common-place errors. In the current state of the art, the programmer may have to research online or in a local codebase to determine the reasons for an error. It would be desirable to provide better tools to help programmers eliminate errors in their code.


A processor includes an instruction cache and a predecode cache which is not actively maintained coherent with the instruction cache. The processor fetches instruction bytes from the instruction cache and predecode information from the predecode cache. Instructions are provided to a plurality of decode units based on the predecode information, and the decode units decode the instructions and verify that the predecode information corresponds to the instructions. More particularly, each decode unit may verify that a valid instruction was decoded, and that the instruction succeeds a preceding instruction decoded by another decode unit. Additionally, other units involved in the instruction processing pipeline stages prior to decode may verify portions of the predecode information. If the predecode information does not correspond to the fetched instructions, the predecode information may be corrected (either by predecoding the instruction bytes or by updating the predecode information, if the update may be determined without predecoding the instruction bytes). In one particular embodiment, the predecode cache may be a line predictor which stores instruction pointers indexed by a portion of the fetch address. The line predictor may thus experience address aliasing, and predecode information may therefore not correspond to the instruction bytes. However, power may be conserved by not storing and comparing the entire fetch address.

1. Field of the Invention
This invention is related to the field of processors and, more particularly, to predecode mechanisms within processors.
2. Description of the Related Art
Superscalar processors achieve high performance by executing multiple instructions per clock cycle and by choosing the shortest possible clock cycle consistent with the design. As used herein, the term xe2x80x9cclock cyclexe2x80x9d refers to an interval of time accorded to various stages of an instruction processing pipeline within the processor. Storage devices (e.g. registers and arrays) capture their values according to the clock cycle. For example, a storage device may capture a value according to a rising or falling edge of a clock signal defining the clock cycle. The storage device then stores the value until the subsequent rising or falling edge of the clock signal, respectively. The term xe2x80x9cinstruction processing pipelinexe2x80x9d is used herein to refer to the logic circuits employed to process instructions in a pipelined fashion. Although the pipeline may be divided into any number of stages at which portions of instruction processing are performed, instruction processing generally comprises fetching the instruction, decoding the instruction, executing the instruction, and storing the execution results in the destination identified by the instruction.
A popular instruction set architecture is the x86 instruction set architecture. Due to the widespread acceptance of the x86 instruction set architecture in the computer industry, superscalar processors designed in accordance with this architecture are becoming increasingly common. The x86 instruction set architecture specifies a variable byte-length instruction set in which different instructions may occupy differing numbers of bytes. For example, the 80386 and 80486 processors allow a particular instruction to occupy a number of bytes between 1 and 15. The number of bytes occupied depends upon the particular instruction as well as various addressing mode options for the instruction.
Because instructions are variable-length, locating instruction boundaries is complicated. The length of a first instruction must be determined prior to locating a second instruction subsequent to the first instruction within an instruction stream. However, the ability to locate multiple instructions within an instruction stream during a particular clock cycle is crucial to superscalar processor operation. As operating frequencies increase (i.e. as clock cycles shorten), it becomes increasingly difficult to locate multiple instructions simultaneously.
Various predecode schemes have been proposed in which a predecoder generates predecode information corresponding to a set of instruction bytes. The predecode information is stored and is fetched when the corresponding set of instruction bytes is fetched. Generally, the predecode information may be used to locate instructions within the set of instruction bytes and/or to quickly identify other attributes of the instructions being fetched. These other attributes may be used to direct further fetching or to direct additional hardware for accelerating the processing of the fetched instructions. Thus, predecoding may be effective for both fixed length and variable length instruction sets.
Typically, the predecode information is kept coherent with the instruction cache storing the instruction bytes, since the processor typically relies on the predecode information to rapidly and correctly process instructions. The predecode information may be stored in the instruction cache with the instruction bytes (and thus is deleted from the cache when the corresponding instruction bytes are deleted), or may be stored in a separate structure which has storage locations in a one-to-one correspondence with cache storage locations. By maintaining coherency with the instruction cache, the predecode information is never erroneously associated with a different set of instruction bytes.
It is desirable to allow for predecode information storage which is not coherent with the instruction cache. For example, it may be desirable to have fewer storage locations for predecode information than the instruction cache has storage locations for cache lines. Alternatively, it may be desirable to organize the predecode information in a different fashion than cache-line based storage. Accordingly, a processor which employs predecode information but does not actively maintain coherency between the predecode cache and the instruction cache is desired.
The problems outlined above are in large part solved by a processor as described herein. The processor includes an instruction cache and a predecode cache which is not actively maintained coherent with the instruction cache. The processor fetches instruction bytes from the instruction cache and predecode information from the predecode cache. Instructions are provided to a plurality of decode units based on the predecode information, and the decode units decode the instructions and verify that the predecode information corresponds to the instructions. More particularly, each decode unit may verify that a valid instruction was decoded, and that the instruction succeeds a preceding instruction decoded by another decode unit. Additionally, other units involved in the instruction processing pipeline stages prior to decode may verify portions of the predecode information. If the predecode information does not correspond to the fetched instructions, the predecode information may be corrected (either by predecoding the instruction bytes or by updating the predecode information, if the update may be determined without predecoding the instruction bytes). Advantageously, the predecode cache may be designed without attempting to match the instruction cache, and logic for maintaining coherency based on instruction cache updates may not be required.
In one particular embodiment, the predecode cache may be a line predictor which stores instruction pointers indexed by a portion of the fetch address. The line predictor may thus experience address aliasing, and predecode information may therefore not correspond to the instruction bytes. However, power may be conserved by not storing and comparing the entire fetch address.
Broadly speaking, a processor is contemplated. The processor comprises a predecode cache and one or more decode units coupled to receive predecode information from the instruction cache. The predecode cache is configured to store the predecode information, and is further configured to output the predecode information responsive to a fetch address. Each decode unit is further coupled to receive a portion of a plurality of instruction bytes fetched in response to the fetch address, and is configured to decode the portion. The decode units are configured to verify that the predecode information corresponds to the plurality of instruction bytes. Additionally, a computer system is contemplated including the processor and an input/output (I/O) device configured to communicate between the computer system and another computer system to which the I/O device is couplable.
Furthermore, a method is contemplated. Predecode information is fetched from a predecode cache responsive to a fetch address. A plurality of instruction bytes are fetched responsive to the fetch address. The plurality of instruction bytes are decoded. The predecode information is verified as corresponding to the plurality of instruction bytes.

Pipeline elements which verify predecode information


A system comprising an imaging device adapted to capture images of a target object at multiple angles. The system also comprises storage coupled to the imaging device and adapted to store a generic model of the target object. The system further comprises processing logic coupled to the imaging device and adapted to perform an iterative process by which the generic model is modified in accordance with the target object. During each iteration of the iterative process, the processing logic obtains structural and textural information associated with at least one of the captured images and modifies the generic model with the structural and textural information. The processing logic displays the generic model.

In electronic device modeling, images of a target object are captured and reproduced on the device's display in a three-dimensional (3-D) format. For example, "avatars" which resemble an end-user's face are often superimposed on 3-D video game characters. However, existing techniques for capturing images detailed enough to be used in such 3-D applications are financially expensive (due to the need for hardware, such as scanners), and are not user-friendly (because they require extensive interaction with the end-user).


A system and method for searching using a user device associated with a display includes a controller displaying a plurality of search screens on the display device, each of the plurality of search screens perform a content search. The user device also includes a search module generating respective search results from each of the plurality of search screens and a search retention module storing the respective search results in a memory of the user device and retrieving saved search results from the memory corresponding to the previously accessed search screen when a previously accessed search screen is displayed. The controller displays the saved search results.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Satellite television is increasing in popularity due to the ever-increasing amount of programming as well as the quality of programming. Programming includes standard national (CONUS) broadcasts, local or regional station broadcasts, on-demand content and interactive content.
While providing a large amount of content to consumers is desirable, it is also desirable to allow the consumers to easily find programming to view. Currently, a program guide provides a graphical representation of the content or program events available to a user. A program guide is typically a list of programs, times, and channels for the various content. Only a limited amount of guide material may be displayed on the screen at one time. Thus, the program guide, while useful, becomes a slow way of finding desirable content in a large amount of available content.
Searching by key words is another method for providing content results to users. However, because of the volume of materials set top boxes may have significant time associated with a search. Searching takes place by sorting through all the available content entries. This can take a significant amount of time. Many systems use various screens that, when navigated to, obtain search results.
The processing resources within a set top box are also somewhat limited. Therefore, providing a search that generates results more quickly is desirable.

This patent is subject to a terminal disclaimer.

Method and system for using saved search results in menu structure searching for obtaining fast search results


A magneto-resistive element has a lower layer, a tunnel barrier layer, and an upper layer. The lower layer, the tunnel barrier layer, and the upper layer are disposed adjacent to each other and are stacked in this order. A magnetization direction of either of the lower layer and the upper layer is fixed relative to an external magnetic field, and a magnetization direction of the other layer is variable in accordance with the external magnetic field. A crystalline portion and a non-crystalline portion co-exist in a plane that is parallel with a surface of the tunnel barrier layer.

1. Field of the Invention
The present invention relates to a magneto-resistive element and a method for manufacturing the same, particularly to the structure of a TMR element.
2. Description of the Related Art
Conventionally, a GMR (Giant Magneto-Resistive) element using a spin valve (SV) film has widely been used as a magneto-resistive element for a hard disk drive, and, in recent years, a TMR (Tunnel Magneto-Resistive) element is attracting attention as a highly sensitive magneto-resistive element. The TMR element is formed by stacking a lower magnetic layer, a tunnel barrier layer, and an upper magnetic layer in this order. In one embodiment, the lower magnetic layer has a magnetization direction that is fixed relative to the external magnetic field (this layer is also called a pinned layer), and the upper layer has a magnetization direction that is variable in accordance with the external magnetic field (this layer is also called a free layer). When sense current is applied in the direction of the stacking of the layers, electrons flow from the upper layer to the lower layer (or in the inverse direction) beyond the energy barrier that is established by the tunnel barrier layer. This effect is called the tunneling effect. It is known that the resistance to the sense current changes in accordance with the relative angle between the magnetization direction of the upper layer and the magnetization direction of the lower layer. The change in the resistance to the sense current, or MR ratio, can be detected when the magnetization direction of the upper layer changes in accordance with the external magnetic field.
A TMR element detects the magnitude of the external magnetic field in this way, and reads magnetic data in a recording medium. Since the reproduction output of the magneto-resistive element depends on the MR ratio, and since a TMR element exhibits a significantly larger MR ratio than a conventional GMR element, a TMR element is advantageous for providing a high-power magneto-resistive element.
The tunnel barrier layer is usually made of non-magnetic and non-conductive materials, such as alumina, and it is known that a TMR element using magnesium oxide (MgO) as the tunnel barrier also exhibits a large MR ratio. In particular, it is known that MgO having a crystalline structure of {100} orientation exhibits a large MR ratio. Therefore, the MgO layer is typically annealed at a high temperature in order to obtain such a crystalline structure.
In K. Tsunekawa et al, "CoFeB/MgO/CoFeB/Magnetic Tunnel Junctions with High TMR and Low Junction Resistance", Proceedings of INTERMAG 2005, Apr. 4, 2005, an exemplary TMR element that uses MgO as the tunnel barrier layer is disclosed. Similar information is found at http://www.jpo.go.jp/shiryou/index.htm (searched on 27 Jul., 2005) "Other information>standard technology>electricity>2004 fiscal year>MRAM and spin memory technology (Sections 1-2-2-3 to 1-2-2-6)" updated on Mar. 25, 2005 by Japan Patent Office, which discloses a layer arrangement in which the tunnel barrier made of MgO is sandwiched by CoFeB layers. Further, in INTERMAG 2005, held on 4 to 8 Apr., 2005, a study result was reported, in which the MR ratio significantly worsens for a tunnel barrier layer with a thickness that is less than a certain value. According to the report, the reason is that MgO is not crystallized in the initial state of forming MgO layer on the CoFeB layer, and that when the MgO layer reaches a certain thickness, a crystalline portion, which improves the MR ratio, is formed on the CoFeB layer.
As described above, it has been conventionally considered that a tunnel barrier layer in which a crystalline structure is dominant is effective for enhancing the MR ratio of a TMR element having a tunnel barrier layer that is made of MgO. However, the inventors discovered that the MR ratio is not always improved even if the crystalline structure of MgO is dominant. The inventors think that one of the reasons is in-plane stress in the tunnel barrier layer that is caused by other layers which are stacked together with the tunnel barrier layer.
FIG. 1 schematically shows the structure of a tunnel barrier layer. A TMR element, which is also used for a magnetic sensor and a magnetic memory element (MRAM, Magnetic Random Access Memory) in addition to the magneto-resistive element for the hard disk drive, as described above, generally has layers other than the tunnel barrier layer, the upper layer, and the lower layer regardless of the products to which a TMR element is applied. Taking a magnetic head as an example, a write head portion, not shown, is disposed on the upper layer (free layer), and an overcoat layer made of alumina or the like, not shown, is disposed on the write head portion. Various stresses are caused during the formation of these layers. In particular, formation of the overcoat layer generally causes compressive stress, which causes in-plane tensile stress in tunnel barrier layer 108. The tensile stress works to increase the distance between atoms in tunnel barrier layer 108, as indicated by the arrow in FIG. 1.
In general, it is thought that such stresses are caused at the interfaces between layers, and cooperate to generate a complicated stress state. In particular, the accumulation of such stresses and the resultant small cracks in tunnel barrier layer 108 may lead to the disadvantage that a leak path is generated for the sense current to intensively flow and thereby the MR ratio is reduced. Therefore, it is important to prevent in-plane stress in the tunnel barrier layer, as well as to crystallize the tunnel barrier layer, in order to improve the MR ratio.

TMR element having a tunnel barrier which includes crystalline portions and non-crystalline portions


An abrasive grinding wheel having an annular grinding face depending from a substantially circular body includes a tubular inner wall which defines an axial bore configured to convey coolant in a downstream direction therethrough. The inner wall is coupled to a concave body portion terminating at an inner periphery of the annular grinding face. A flange having an outer periphery disposed, in representative embodiments, within about 20 mm of the inner periphery of the grinding face, is superposed with the concave body portion, to define a fluid flow passage between the flange and the concave body portion. The fluid flow passage is in fluid communication with the axial bore and with the grinding face, so that during operable rotation of the grinding wheel, coolant flowing downstream through the bore is conveyed radially outward into the fluid flow passage for delivery to the grinding face.

1. Field of the Invention
This invention relates to abrasive tools, and more particularly to grinding wheels and methods adapted to replace milling operations used for the removal of large quantities of material from the surface of workpieces.
2. Background Information
Components intended for complex, precision assemblies such as automobiles and other industrial products must often be manufactured to stringent quality standards, including tight dimensional tolerances and surface finish requirements. Some of the tightest standards are associated with the manufacture of vehicular components. In the initial finishing step, these components are generally machined by common processes such as fly cutting or high speed milling using milling heads having hardened ceramic inserts, such as silicon nitride, tungsten carbide or polycrystalline diamond (PCD). To help insure that the finished surface is adequately smooth and flat following machining, a multi-step approach is often used, which includes a rough pass and one or more finish passes with precision grinding tools. With new high speed machining centers, coolant is supplied at relatively high pressure and low volume through the spindle (through an axial bore) to the center of the cutting head. Because machine cutting processes are very slow, compared to grinding processes, the nature of the coolant delivery system is not critical to the effectiveness of the cutting operation.
These milling processes have been used to make vehicular engines, transmission components, pump housings, solenoid valves, power steering components and bearing and mating faces for use in automobiles and other vehicles, appliances, machines and other manufactured items. In general, machine tool cutting processes (also known as "machining" or "milling") have been used in any application or operation where the workpiece must have a precision flat, parallel surface. In nearly all of these applications and operations, the milling process must be followed by a grinding process to reduce surface roughness to a finer level than one can achieve with a milling process.
In many operations, the workpieces have had to be further processed, such as with a cup-type face grinding wheel on a conventional grinding machine, to meet these standards. Disadvantageously, this extra grinding step, including the extra tool change and set up, tends to increase the time and expense of workpiece fabrication.
One attempt to reduce the number of discrete fabrication steps has involved equipping the milling machines with grinding wheels in lieu of milling cutters to carry out a surface grinding step in lieu of a face milling step. In this manner, it was anticipated that both the rough and finish milling operations could be eliminated in favor of one or more grinding operations, to therefore eliminate the need for extra tool changes, multiple tool setups, etc. A drawback of this approach, however, is that the relatively high pressure, centrally (i.e., spindle) fed coolant flow provided by the milling machines tends to be incompatible with grinding wheels, which typically rely on lower pressure, peripherally fed coolant flow.
A need therefore exists for an improved tool and/or method for effecting grinding operations using conventional spindle-cooled milling machines.

Coolant delivery system for grinding tools

Saint-Gobain Abrasives Technology Company


A friction roller (10) includes a support roller (11) and an annular elastic ring (15) which it externally fitted to the support roller (11). The support roller (11) is divided into two portions in a thickness direction, that is, a first divided roller (12) and a second divided roller (13). A flange (127) is formed on one side of the first divided roller (12), and a taper face (128) is formed in an outer peripheral face of the first divided roller (12). A knurling portion (129) is formed in the taper face (128). A flange (136) is formed on one side of the second divided roller (13), and a taper face (137) is formed in an outer peripheral face of the second divided roller (13). A knurling portion (138) is formed in the taper face (137). Meanwhile, taper faces (151, 152) expanding outward are formed in an inner peripheral face of the elastic ring (15). The taper faces (151, 152) of the elastic ring (15) are engaged with the taper face (128) of the first divided roller (12) and the taper face (137) of the second divided roller (13).

1. Field of the Invention
The invention relates to a friction roller in a conveyor. More particularly, the invention relates to a friction roller in a conveyor which conveys an object in an assembly line.
2. Description of the Related Art
Japanese Patent Laid-Open Publication No. JP-A-8-207843 discloses an example of a conveyor which conveys an upper automobile body to a welding process in an automobile body assembly line. In this case, a conveyor 31 includes a long frame 32, and multiple friction rollers 33 fitted to a lateral portion of the frame 32 in a longitudinal direction, as shown in FIG. 13. Each of the friction rollers 33 is driven to rotate when a rotation shaft 35 is rotated by a gear mechanism 36 connected to a drive shaft of a motor 34. A jig pallet 37 on which an upper automobile body B is placed is conveyed on the friction rollers 33. According to the Japanese Patent Laid-Open Publication No. JP-A-8-207843, the assembly line is configured such that welding is performed by a welding machine when the automobile body B is conveyed on the conveyor 31 (refer to FIG. 1 and FIG. 2).
The inner peripheral face of the friction roller 33 is rotated when the rotation shaft 35 is rotated by the motor 34, whereby the jig pallet 37 is conveyed.
Also, in another conveyor line, a jig pallet 2 on which an upper automobile body B is placed includes one long rail 3, as shown in FIG. 1. When a friction roller 40 which is in contact with a lateral face portion of the rail 3 is rotated, the rail 3 itself is moved along a proceeding direction, and the automobile body B placed on the rail 3 can be conveyed.
As shown in FIG. 14, in the friction roller 40, an elastic ring 42 is integrally joined, using an adhesive or the like, to an outer peripheral face of a support roller 41 which has a drive shaft fitting hole 41a. When the elastic ring 42 which is in contact with the rail 3 is driven to rotate by the motor, the rail is conveyed through friction.
In addition, other examples of a conventional conveyance roller used in a conveyor or the like are disclosed in Japanese Patent Laid-Open Publication No. JP-A-2001-206528 (refer to FIG. 1), Japanese Utility Model Laid-Open Publication No. JP-A-6-83622 (refer to FIG. 1), Japanese Patent Laid-Open Publication No. JP-A-2000-351438 (refer to FIG. 1), and the like.
However, in the friction roller 40 shown in FIG. 14, the elastic ring 42 is made of urethane rubber. Since the rail 3 of the heavy jig pallet 2 is conveyed by frictional force of the elastic ring 42 which is rotated, the elastic ring 42 itself greatly wears out, and accordingly the friction roller 40 is frequently replaced with a new one.
Since the elastic ring 42 is integrated with the support roller 41 using an adhesive or the like, it is not possible to easily replace only the worn out elastic ring 42 with a new one when replacing the friction roller 40 with a new one. Therefore, the elastic ring 42 is discarded together with the support roller 41. Alternatively, the elastic ring 42 is peeled from the support roller 41 and a new elastic ring 42 is rejoined to the support roller 41 using an adhesive in order to suppress an increase in cost. As a result, cost increases or workability decreases.
The conveyance roller disclosed in the Japanese Patent Laid-Open Publication No. JP-A-2001-206528 is formed by externally fitting an external cylinder to a roller main body. The external cylinder is formed by joining an elastic plate to a cylindrical body using an adhesive. Therefore, when the elastic plate wears out, the external cylinder itself including the cylindrical body is replaced with a new one. In other words, as described above, since peeling the joined elastic plate from the cylindrical body results in a decrease in workability, the external cylinder itself needs to be replaced with a new one, which increases the cost. Also, when the external cylinder is externally fitted to the roller main body, the external cylinder needs to be prevented from dropping off the roller main body using an engagement ring, which results in an increase in cost and a decrease in workability.
A roller disclosed in the Japanese Utility Model Laid-Open Publication No. JP-A-6-83622 is suitably used as a roller for a conveyor for conveying powders or grains which apply a small load. In this case, an elastic ring is directly fitted to a roller or a pulley which is rotated without using the support roller 41, unlike the friction roller 40 shown in FIG. 14. Therefore, the load that the elastic ring receives is small. Accordingly, it is not suitable to use the roller as the friction roller for a conveyor for conveying, for example, an automobile body which applies a large load, since the roller would greatly wear out due to the large load.
In the case of a roller disclosed in the Japanese Patent Laid-Open Publication No. JP-A-2000-351438, an elastic member is fixed to a metallic fitting member by insert molding. Therefore, when the elastic member wears out, the elastic member needs to be discarded together with the metallic fitting member, which results in an increase in cost.


A pairing method for causing lighting devices to store identification information of a radio remote controller serving as a master device is provided. The method includes: transmitting a pairing command including the identification information of the radio remote controller repeatedly on a temporary basis by the radio remote controller; determining, for each of the lighting devices, whether or not the lighting device is in an initial state in which identification information of a master device is not stored in the lighting device, at power on; storing the identification information included in the pairing command, if the paring command is received when it is determined that the lighting device is in the initial state in the determining; and causing the lighting device in which the identification information of the master device is stored to operate according to a radio command including the identification information of the master device.

1. Technical Field
The present disclosure relates to a pairing method, in a lighting system including a plurality of lighting devices and a radio remote controller, for causing the lighting devices to store identification information of a radio remote controller serving as a master device, and to a lighting device and the lighting system.
2. Description of the Related Art
For example, Japanese Unexamined Patent Application Publication No. 2012-89276 discloses a lighting control device which configures pairing using (i) a plurality of lighting devices each identified by identification information (ID) and having a radio wave receiving function and (ii) a radio remote controller having a radio wave transmitting function, by setting ID for identifying a communication partner. The lighting control device performs pairing by setting ID to a specific lighting device using a specific radio remote controller, lowers receiver sensitivity so that ID is not set by an unspecified radio remote controller which is present in the vicinity, and turns off a lamp in order to reduce the effects of noise due to lighting of the lamp. In such a manner, the lighting control device disclosed by Japanese Unexamined Patent Application Publication No. 2012-89276 prevents setting of ID by an unspecified radio remote controller which is present in the vicinity, and furthermore, reduces noise generated by the lamp.
However, it is necessary to lower the receiver sensitivity of the lighting device when configuring the paring. This involves cost increase due to inclusion of a receiver sensitivity adjuster, and an adjustment procedure for lowering the receiver sensitivity. Furthermore, since the lighting device is turned off when configuring the paring, the state of the lighting device is unclear.
An object of the present disclosure is to provide: a pairing method that allows easy pairing with less procedure in a lighting system including a plurality of lighting devices and a radio remote controller; a lighting device; and the lighting system.

Pairing method, lighting device, and lighting system

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.


Disclosed herein are IC structures, packages, and devices that include planar III-N transistors with wrap-around gates and/or one or more wrap-around source/drain (S/D) contacts. An example IC structure includes a support structure (e.g., a substrate) and a planar III-N transistor. The transistor includes a channel stack of a III-N semiconductor material and a polarization material, provided over the support structure, a pair of S/D regions provided in the channel stack, and a gate stack of a gate dielectric material and a gate electrode material provided over a portion of the channel stack between the S/D regions, where the gate stack at least partially wraps around an upper portion of the channel stack.

Solid-state devices that can be used in high frequency and/or high voltage applications are of great importance in modern semiconductor technologies. For example, radio frequency (RF) integrated circuits (RFIC) and power management integrated circuits (PMIC) may be critical functional blocks in system on a chip (SoC) implementations. Such SoC implementations may be found in mobile computing platforms such as smartphones, tablets, laptops, netbooks, and the like. In such implementations, the RFIC and PMIC and RFIC are important factors for power efficiency and form factor, and can be equally or even more important than logic and memory circuits.
Due, in part, to their large band gap and high mobility, III-N material based transistors, such as gallium nitride (GaN) based transistors, may be particularly advantageous for high frequency and high voltage applications.

Planar transistors with wrap-around gates and wrap-around source and drain contacts


A defect detection system and related method take advantage of multilevel detection technique for detecting defects on an integrated circuit. The defect detection system utilizes an analog-to-digital converter for converting an analog sensing signal into an output code having a plurality of bits. The defect detection methods include an open test method and a short test method. The open and short test methods both include a calibrating method and a testing method individually. The calibrating method functions to determine a preset reference voltage for the analog-to-digital converter based on a predetermined code. The testing method makes use of the preset reference voltage and the predetermined code for generating the output code having a plurality of bits. The output code is then utilized to determine whether or not there are open or short defects on the integrated circuit and to classify the defects.

1. Field of the Invention
The present invention relates in general to a defect detection system and method, and more particularly, to a defect detection system and method capable of outputting a multilevel signal for identifying defects.
2. Description of the Prior Art
During the fabrication process, a wafer receives a number of doping, layering, patterning, and metallization steps. Each of these steps must meet exacting physical requirements. However, all steps have some variation from perfect calibration, thereby resulting in some variation on the wafer surface, especially while bringing up a new semiconductor fabrication process. Accordingly, a variety of yield monitors are required to determine the health of the process and to find systematic problems.
Several known conduction line structures, such as poly-crystal lines, diffusion lines, metal lines, and N-type or P-type well lines are subject to being detected for determining whether there are undesirable defects existing. Furthermore, there are electrical-isolated routes, each of which may comprise two adjacent and electrical-isolated conduction lines, subjected to being detected for determining whether there are undesirable defects existing. Once detected, these defects are analyzed in a process called failure analysis. During failure analysis, valuable information regarding problems with fabrication materials, process recipes, ambient air, personnel, and machines can be discovered. Therefore, detection of defects on an integrated circuit is critical to high yields and process control.
Please refer to FIG. 1, which is a schematic diagram showing a prior art defect detection system 100 for identifying defects in an integrated circuit. The defect detection system 100 comprises a sense amplifier 110, a pull-down transistor 115 having a gate furnished with an enable signal Venable, selection transistors 121 and 122, and a selection circuit 190. The gates of the selection transistors 121 and 122 are both electrically connected to the selection circuit 190 for performing a selecting process so as to select a test route 150 as a selected test route for testing. A test input terminal 140 is coupled to the selection transistor 122 for inputting an input voltage Vin.
The sense amplifier 110 has a first terminal for receiving an analog sensing signal Sanalog, a second terminal for receiving a reference voltage Vref, and an output terminal for outputting an output signal Sout. In general, the first terminal of the sense amplifier 110 and the test input terminal 140 are connected to two pluralities of selection transistors having all the gates connected to the selection circuit 190 respectively for selecting a certain test route from a plurality of test routes to be tested as the selected test route for testing.
However, the output signal Sout outputted from the sense amplifier 110 is fundamentally a two-level signal similar to one-bit signal in a digital system, which can be utilized only for identifying whether or not the selected test route has defects. Accordingly, operational flexibility of the defect detection system 100 is quite limited. That is to say, the prior art defect detection system 100 cannot meet requirements when multilevel output signals are preferred under some test situations.

Defect detection system with multilevel output capability and method thereof


To provide a semiconductor device that exhibits a high breakdown voltage, excellent thermal properties, a high latch-up withstanding capability and low on-resistance. The semiconductor device according to the invention, which includes a buried insulator region 5 disposed between an n−-type drift layer 3 and a first n-type region 7 above n−-type drift layer 3, facilitates limiting the emitter hole current, preventing latch-up from occurring, raising neither on-resistance nor on-voltage. The semiconductor device according to the invention, which includes a p-type region 4 disposed between the buried insulator region 5 and n−-type drift layer 3, facilitates depleting n−-type drift layer 3 in the OFF-state of the device. The semiconductor device according to the invention, which includes a second n-type region 6 disposed between the first n-type region 7 and the n−-type drift layer 3, facilitates dissipating the heat caused in the channel region or in the first n-type region 7 to a p+-type collector layer 1a, which is a semiconductor substrate, via the second n-type region 6, n−-type drift layer 3 and an n-type buffer layer 2.

In order to improve the performance of fuel consumption in automobiles and to purify the exhaust gas from the automobiles, engine control has been conducted electronically and the electronic engine control techniques have been advanced. An igniter is a spark plug controller that feeds electric energy to a spark plug through an ignition coil. An IGBT (insulated gate bipolar transistor) is used for the switching device of an ignition system. The IGBT is advantageous, since the driver circuit configuration for driving the IGBT is simple, the IGBT exhibits excellent protection performances against reverse battery connection and the SOA of the IGBT is wide.
For obtaining high reliability and high performances, a one-chip intelligent IGBT which integrates a control circuit, an overheat detection function and a current control function has been put into market. FIG. 59 is a block circuit diagram of a standard ignition system that uses an IGBT. For the circuit configuration shown in FIG. 59, a self-separation process that exhibits excellent cost performances is employed to integrate an IGBT 101, a control IC 102, a surge protection diode 103, a resistor 104 and a clump diode 105 into one chip. In FIG. 59, an ignition coil 106 and a spark plug 107 are also shown.
FIG. 60 is a cross sectional view showing the integrated structure of IGBT 101 and an NMOS transistor in control IC 102 in FIG. 59. A low-voltage lateral NMOS transistor 110 is formed such that NMOS transistor 110 includes a p−-type well region 118 in the surface portion of an n−-type drift layer 113. The source electrode 125b of low-voltage lateral NMOS transistor 110 is connected electrically to the gate electrode 121a of IGBT 101 and to an input terminal 108 connected to control IC 102 in the ignition system. If a negative input signal is fed to the gate terminal of the intelligent IGBT, the parasitic thyristor shown in FIG. 61 is activated, destroying the intelligent IGBT.
FIG. 61 is a cross sectional view schematically showing the parasitic thyristor associated with low-voltage lateral NMOS transistor 110. The parasitic thyristor is formed by a thyristor connection of a PNP transistor and an NPN transistor. The PNP transistor includes an emitter region formed by a p+-type collector layer 111, a base region formed by an n+-type buffer layer 112 and n−-type drift layer 113, and a collector region formed by p−-type well region 118. The NPN transistor includes an emitter region formed by the n+-type source region 123 of low-voltage lateral NMOS transistor 110, a base region formed by p−-type well region 118, and a collector region formed by n+-type buffer layer 112 and n−-type drift layer 113.
Since the PN diode formed by the n+-type source region 123 and the p−-type well region 118 is forwardly biased when a negative input signal is input to the gate terminal (G) of IGBT 101, the parasitic thyristor is activated. To prevent the parasitic thyristor from functioning, it is necessary to apply a protection network formed by Zener diodes 121 and resistors 122 between input terminal 108 and the gate terminal (G) of IGBT 101 and to connect the protection network to the n+-type source region 123 and the p−-type well region 118 of the low-voltage lateral NMOS transistor 110. For securing a high electrostatic discharge (ESD) withstanding capability for the protection network, it is imperative to set the PN-junction width of the Zener diode 121 to be between several mm and several tens mm, resulting in a wide chip area.
If the intelligent IGBT, which integrates IGBT 101, control IC 102, surge protection diode 103, resistor 104 and clump diode 105 into one chip (cf. FIG. 59), is manufactured by the SOI process, the heat generated in the device will be hardly dissipated, causing troubles. The heat generated in the device is hardly dissipated, since the thermal resistivity of the SiO2 layer buried in the chip is about one hundred times higher than that of silicon. Moreover, since the ESD protection devices manufactured on the SOI is weaker than the protection device manufactured on the bulk wafer, it is not preferable to use the intelligent IGBT manufactured on the SOI wafer for automobiles application. Since the SOI wafer is from 5 to 6 times as expensive as the usual bulk wafer, its wide adoption in consumer application has not yet been achieved.
Types of Insulated-gate power semiconductor devices, which have a structure including an oxide film and such an insulator layer buried locally in the device (partial SOI structure), are known to those skilled in the art (cf. the following Patent Documents 1 and 2). FIG. 62 is a cross sectional view of the semiconductor device equivalent to the semiconductor device disclosed in the Patent Document 1. Referring now to FIG. 62, an oxide film 115 is buried locally between n−-type drift layer 113 and an n-type semiconductor layer 117 in the device surface. The n-type semiconductor layer 117 and n−-type drift layer 113 are in contact with each other in the area, therein oxide film 115 is not present.
A p−-type well region 118 formed locally on oxide film 115 is in contact with n−-type drift layer 113 in the area, therein oxide film 115 is not present. However, p−-type well region 118 is not extended below oxide film 115. Besides, a semiconductor apparatus, which includes a vertical insulated gate power transistor with a semiconductor substrate as one of its constituent elements thereof and a lateral insulated gate power transistor in a SOI structure formed on an insulator film covering the semiconductor substrate, is known to those skilled in the art (cf. the following Patent Document 3).    [Patent Document 1] Published Japanese Translation of PCT International Publication for Patent Application 2001-515662    [Patent Document 2] Publication of Unexamined Japanese Patent Application Hei. 9 (1997)-270513    [Patent Document 3] Publication of Unexamined Japanese Patent Application Hei. 9 (1997)-312398

Semiconductor device and the method of manufacturing the same


Methods for forming repeat protein polymers and utilizing the repeat protein polymers to form inorganic structures are provided. The inorganic structures may have features on the nanoscale, and the structures generally do not have the repeat protein polymer incorporated therein.

The present invention relates to biomineralization and more specifically, to the formation of inorganic structures using repeat protein polymers as a template and catalyst for the formation.
The formation of highly ordered inorganic materials on a surface has become increasingly important in a variety of fields such as electronics and photonics. The formation of inorganic materials on a nanometer scale is also becoming increasingly desirable as device sizes are reduced. However, the formation of nanometer scale inorganics generally requires extreme conditions such as high pressure, temperature, or pH. Many biological organisms are able to form inorganic materials under ambient conditions in a process known as biomineralization. The structures of inorganic materials formed by biological organisms are highly controlled from the nanometer scale to the macroscopic scale.
For example, the condensation of tetraethoxysilane (TEOS) in a manufacturing setting may require an extreme pH, high temperature, and/or the use of surfactants. Thus, the need remains in the relevant art for a mode of biomineralization that may be utilized to form desired minerals having highly ordered structures at ambient conditions on a commercially viable scale.

Synthesis of inorganic structures using templation and catalysis by self assembled repeat protein polymers


After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor thin film has substantially no grain boundaries and has such crystallinity as to be considered a single crystal or considered so substantially.

1. Field of the Invention
The present invention relates to a semiconductor thin film formed on a substrate having an insulating surface and a semiconductor device using such a semiconductor thin film as its active layer. In particular, the invention relates to such a semiconductor thin film and semiconductor device in which the semiconductor thin film is made of a material having silicon as the main component.
Further, the invention relates to a semiconductor circuit and an electro-optical device that are constituted of semiconductor devices such as thin-film transistors as well as to an electronic apparatus using such a semiconductor circuit and electro-optical device.
In this specification, the term xe2x80x9csemiconductor devicexe2x80x9d is used as including all of the above-mentioned thin-film transistor, semiconductor circuit, electro-optical device, and electronic apparatus; that is, all of devices and apparatuses that function by utilizing a semiconductor characteristic are called semiconductor devices. Therefore, the semiconductor devices recited in the claims are not limited to single elements such as a thin-film transistor and encompass semiconductor circuits and electro-optical devices that are constructed by integrating such single elements as well as electronic apparatuses using such a semiconductor circuit or electro-optical device as a part.
2. Description of the Related Art
In recent years, the techniques of forming thin-film transistors (TFTs) by using a semiconductor thin film (thickness: tens to hundreds of nanometers) formed on a substrate having an insulating surface have attracted much attention. Thin-film transistors particularly as switching elements of image display devices such as liquid crystal display devices are now being developed at high speed.
For example, in liquid crystal display devices, it is attempted to apply TFTs to every kind of electric circuit such as a pixel matrix circuit in which pixel regions arranged in matrix form are controlled individually, a driver circuit for controlling a pixel matrix circuit, or a logic circuit (an operation circuit, a memory circuit, a clock generator, or the like) for processing an external data signal.
At present, TFTs using an amorphous silicon film as an active layer have been put into practical use. However, TFTs using a crystalline silicon film such as a polysilicon film are necessary for electric circuits, such as a driver circuit and a logic circuit, that are required to operate at even higher speed.
For example, techniques of the present assignee that are disclosed in Japanese Laid-open Patent Publication Nos. Hei. 7-130652 and Hei. 8-78329 are known as methods for forming a crystalline silicon film on a glass substrate. The disclosures of which are incorporated herein by reference. By utilizing a catalyst element for accelerating crystallization of an amorphous silicon film, the techniques of these publications enable formation of a crystalline silicon film having superior crystallinity by a heat treatment of 500xc2x0-600xc2x0 and about 4 hours.
In particular, the technique of the publication No. 8-78329 is such that the above technique is utilized to cause crystal growth in a direction approximately parallel with the substrate surface. The present inventors especially call a resulting crystallized region a xe2x80x9clateral growth region.xe2x80x9d
However, even a driver circuit that is constructed by using such TFTs cannot completely provide required performance. In particular, at present, it is impossible to construct, by using conventional TFTs, high-speed logic circuits that are required to operate at extremely high speed (megahertz to gigahertz).
To improve the crystallinity of a crystalline silicon film having grain boundaries (called a polysilicon film), the inventors have repeated trial and error as exemplified by a semi-amorphous semiconductor (Japanese Laid-open Patent Publication No. Sho. 57-160121 etc.) and a monodomain semiconductor (Japanese Laid-open Patent Publication No. Hei. 8-139019). The disclosures of which are incorporated herein by reference.
The concept common to the semiconductor films described in the above publications is to make grain boundaries substantially harmless. That is, the most important object was to substantially eliminate grain boundaries to thereby enable smooth movement of carriers (electrons or holes).
However, the semiconductor films described in the above publications are still insufficient to allow logic circuits to perform required high-speed operation. That is, to realize a system-on-panel incorporating logic circuits, it is necessary to develop a material that is not known, i.e., an entirely new material.
An object of the present invention is to satisfy the above requirement, that is, to provide a semiconductor thin film capable of realizing a semiconductor device having extremely high performance that allows construction of such a high-speed logic circuit as conventional TFTs cannot provide. Also, another object of the present invention is to provide a semiconductor device using the semiconductor thin film described above.
The invention provides a semiconductor thin film which is a collected body of a plurality of rod-like or flat-rod-like crystals each having silicon as the main component, wherein the main orientation plane approximately coincides with the {110} plane; the concentration, in the semiconductor thin film, of each of carbon and nitrogen is 5xc3x971017 atoms/cm3 or less and the concentration of oxygen is 1xc3x971018 atoms/cm3 or less; and the rod-like or flat-rod-like crystals contact each other while forming rotation angles having absolute values that are within 3xc2x0.
The above semiconductor thin film may be such that an electron beam diffraction pattern of the semiconductor thin film has particular regularity due to {110} orientation, that each of diffraction spots of the electron beam diffraction pattern is approximately circular, and that the ratio of the minor-axis length to the major-axis
The above semiconductor thin film may be such that an electron beam diffraction pattern of the semiconductor thin film has particular regularity due to {110} orientation, that each of diffraction spots of the electron beam diffraction pattern has a spread that is on a circle having its center at the central point of an electron beam irradiation area, and that a tangential line to each of the diffraction spot from the central point of the electron beam irradiation area and a line segment connecting the central point of the electron beam irradiation area and the central point of the diffraction spot form an angle that is within xc2x11.5xc2x0.

Semiconductor thin film and semiconductor device

Semiconductor Energy Laboratory Co., Ltd.


An extension pole having a tool-actuating connection between a lever on the pole handle end and a tool on the pole distal end that remains operational by action of a lever on the pole proximal end through pole adjustment. A quick release mechanism on the pole distal end receives a tool matching that mechanism through which the movement of the lever is communicated to the tool causing the tool to operate in its normal function.

1. Field of the Invention
This invention relates generally to extension poles for tools with an adjustable connection between a pole handle end and an opposite pole accessory end to actuate a tool by action of a trigger pole actuator on the handle end and, more specifically, to an extension pole with a means to receive a selective tool on its distal end that cooperates with a lever on the pole proximal end to actuate the tool.
2. Prior Art
It has long been recognized that extending a user's reach through an extension pole is advantageous. A paint roller mounted on a pole allows one to work beyond one's natural reach. A tree branch cutter or saw on an extension pole allows one to access tree tops otherwise difficult to reach. For tools that require an actuating movement, for example, to squeeze a handle of a cutter to trim a branch, a connection between the pole tool end and the pole handle end is required to communicate movement of a pole actuator on the handle end to the tool on the pole tool end.
In extending one's reach with an extension pole the difficulty introduced is in maintaining the operation of the connection between the pole actuator on the pole handle end and the tool on the pole end to effect the desired function of the tool mounted to the tool end of the pole. Painting tools are fairly common, but the issue goes beyond painting. For example, if plant and shrub shears were mounted to the pole end, the grip of the shears would need to be squeezed together as in a normal operation of shears. In general, the extension pole requires a connection between a lever as a pole actuator on the pole handle end and the tool on the pole tool end to effect a normal operation of the tool, such as squeezing together handles of a pruner or shears.
Because there are a number of tools that could benefit from an extension pole, it would be advantageous to have a pole with a standard quick-release connection for receiving a tool. To be effective the tool would need to have a provision for exercising the tool in its normal manner of operation, such as squeezing together handles, by pulling a component in the tool. The connection then would need to communicate movement of the pole lever to that tool component to achieve remote functioning of the tool.
The primary object of the present invention then is to provide an extension pole having a tool-actuating connection between a lever on the pole handle end and a tool on the pole end. Another object is to provide a quick release mechanism on the pole end for receiving a tool matching that mechanism and through which the movement of the lever is communicated to the tool. It is another object that the mechanism be protected from damage by containing the mechanism internal to the pole.

Extension pole with docking assembly for a matching tool


A method of training language model parameters trains discriminative model parameters in the language model based on a performance measure having discrete values.

The task of language modeling is to estimate the likelihood of a word string. This is fundamental to a wide range of applications such as speech recognition and Asian language text input.
The traditional approach to language modeling uses a parametric model with maximum likelihood estimation (MLE), usually with smoothing methods to deal with data sparseness problems. This approach is optimal under the assumption that the true distribution of data on which the parametric model is based is known. Unfortunately, this assumption rarely holds in realistic applications.
An alternative approach to language modeling is based on the framework of discriminative training, which uses a much weaker assumption that training and test data are generated from the same distribution but the form of the distribution is unknown. Unlike the traditional approach that maximizes a function (i.e. likelihood of training data) that is loosely associated with the error rate, discriminative training methods ideally aim to minimize the same performance measure used to evaluate the language model, namely the error rate on training data.
However, this ideal has not been achieved because the error rate of a given finite set of training samples is usually a set of discrete values that appear as a step function (or piecewise constant function) of model parameters, and thus cannot be easily minimized. To address the problem, previous research has concentrated on the development of a loss function that provides a smooth loss curve that approximates the error rate. Using such loss functions adds theoretically appealing properties, such as convergence and bounded generalization error. However, the minimization of a loss function instead of the error rate means that such systems are optimizing a different performance measure than the performance measure that is used to evaluate the system that a language model is applied in. As a result, training the language model to optimize the loss function does not guarantee that the language model will provide a minimum number of errors in realistic applications.

Discriminative training for language modeling


A solution for determining survival state of a print head. In one aspect, the cleaning behavior of a print head can be used for reflecting health status of the print head, so survival state of a print head can be determined according to cleaning behavior of the print head. Specifically, there is provided a method for determining survival state of a print head, comprising: obtaining cleaning behavior data and cumulative printing amount upon failure occurrence of print head(s) of reference printer(s) as well as cleaning behavior of a print head of a current printer; obtaining printing amount of the current printer; determining survival state of the print head of the current printer according to cleaning behavior data and cumulative printing amount upon failure occurrence of the print head(s) of the reference printer(s) as well as cleaning behavior data and printing amount of the current printer.

Inkjet printers are widely used in various fields, such as advertising, export centers, image processing systems, press, photographic studio, apparel design, etc. These business applications typically impose high requirements on inkjet printers, including demanding inkjet printers to have continuous, downtime-free service capability. A print head is the most expensive but the most fragile component in a printer. In order to ensure the printer's continuous service capability, it is necessary to ensure that the print head, the core component in the printer, can provide continuous service or can be updated in time upon failure. The most common problem confronted with print heads is head clogging, for example ink drying due to long time non-usage. The most straightforward approach in the prior art is to use the uniform lifecycle to calculate lifetimes of different print heads. However, since service conditions of various printers (even different printers of the same model) vary, lifetimes of different print heads also vary considerably. Therefore, survival states of all print heads cannot be predicted using the uniform lifecycle.

Determining survival state of print head

International Business Machines Corporation


A vehicle drive device has an outer rotor type electric motor with a rotor disposed on an outer circumferential side of a stator including a first power transmission path coupling an inside of the rotor and drive wheels; and a second power transmission path coupling an outside of the rotor and the drive wheels, the first power transmission path and the second power transmission path having different gear ratios, one power transmission path of the first power transmission path and the second power transmission path being coupled to the drive wheels to make a gear change.

A vehicle drive device including an electric motor is implemented as represented by an electric automobile. An example thereof is a power transmission device of a motor driven vehicle described in Patent Document 1. The power transmission device of Patent Document 1 includes a transmission 12 capable of shifting between two speed gear stages i.e., a low-speed gear stage and a high-speed gear stage and uses the transmission 12 to change speed of rotation of an electric motor 11.


A printing mechanism having an engaging body that is rotatable between an engaging position, in which it retains a printing roller in a position facing a thermal printing head, and a disengaging position wherein it enables the printing roller to be removed; a reversible drive shaft rotating in one direction rotates the printing roller and rotating in the opposite direction moves the engaging body to the disengaging position, owing to a unidirectional joint that connects the drive shaft to the engaging body only when the drive shaft rotates in an opposite direction.

The invention relates to a printing mechanism, which is in particular insertable into a printing device for dispensing tickets, bills or receipts.
Specifically, but not exclusively, the invention can apply to a printing device that uses rolls of thermal paper.
In particular, the present invention refers to a printing mechanism made as a block that integrates a thermal printing head, a printing roller coupled with said printing head, a motor for rotating said printing roller and the transmitting arrangement for transmitting the motion of said drive shaft to said printing roller to drag the paper interposed between said roller and printing head, in which the integrated block forms a separate unit intended to be inserted into a printing device provided with the electronic control arrangement of the printing head and of the motor.
The prior art already comprises such a printing mechanism made as an integrated block and devoid, in general, of any electronic card that is suitable for controlling the printing head and/or the motor.


Disclosed herein is an appliance for use in an oral cavity, wherein the appliance comprises a polymeric shell that comprises a polymeric mixture, and further wherein the polymeric shell has cavities designed to receive teeth. Disclosed herein too is a method for maintaining or repositioning teeth in the oral cavity comprising placing an appliance in a patient's mouth, wherein the appliance comprises a polymeric shell that comprises a polymeric mixture, and further wherein the polymeric shell has cavities designed to receive teeth.

This disclosure relates to formable sheets for medical applications and methods of manufacture thereof.
Repositioning teeth for aesthetic or other reasons is generally accomplished by wearing devices called "braces". Braces comprise a variety of components such as brackets, archwires, ligatures, and O-rings. Attaching these components to a patient's teeth is a tedious and time-consuming procedure requiring many meetings with the treating orthodontist. This reduces the orthodontist's patient capacity and thus makes orthodontic treatment quite expensive.
The primary force-inducing component in a set of braces is the archwire. The archwire is resilient and is attached to the brackets by way of slots in the brackets. The archwire links the brackets together and exerts forces on them to move the teeth over time. Twisted wires or elastomeric O-rings are generally used to reinforce attachment of the archwire to the brackets. Attachment of the archwire to the brackets is called "ligation" and wires used in this procedure are called "ligatures." The elastomeric O-rings are called "plastics."
After the archwire is in place, periodic meetings with the orthodontist are required, during which the patient's braces will be adjusted by installing a different archwire having different force-inducing properties or by replacing or tightening existing ligatures. These meetings are generally scheduled every three to six weeks.
As detailed above, the application of braces to patient's teeth is a tedious and time consuming process and requires many visits to the orthodontist's office. Further, the use of braces is unsightly, aesthetically unpleasing, uncomfortable, presents a risk of infection, and makes brushing, flossing, and other dental hygiene procedures difficult. For these reasons, it is desirable to provide alternative methods and systems for repositioning the teeth.

Formable sheets for medical applications and methods of manufacture thereof


Provided are a thin film transistor (TFT) panel, a method of fabricating the same, and an organic light emitting display device (OLED) including the same. The TFT panel has a TFT region and a capacitor region. A TFT is formed in the TFT region and a capacitor is formed in the capacitor region. The TFT includes an active layer that includes a source and a drain regions. A gate insulation layer is formed on the active layer, and a gate electrode is formed on the gate insulation layer over the active layer. A source and a drain electrodes are formed over the active layer, and connected to the source and drain regions, respectively. In the TFT region, an interlayer insulation layer is formed between the gate electrode and the source/drain electrodes. In the capacitor region, an interlayer insulation layer is formed between a capacitor lower electrode and a capacitor upper electrode to form a capacitor. The interlayer insulation layers of the TFT region and the capacitor region have different layer structures and have different dielectric constants. Therefore, the capacitor region can have higher capacitance while the TFT region can have lower capacitance to reduce parasitic capacitance.

1. Field of the Invention
The present invention relates to a thin film transistor (TFT) panel, a method of fabricating the same, and an organic light emitting display device (OLED) including the same. More particularly, the present invention relates to a TFT panel having interlayer insulation layers with different dielectric constants in a TFT region and a capacitor region, a method of fabricating the same, and an OLED including the same.
2. Description of the Related Art
In general, an organic light emitting display device (OLED), which is one of flat panel displays, is an emission type display device capable of injecting electrons and holes into an emission layer from an electron injection electrode (cathode) and a hole injection electrode (anode), respectively, to emit light when an exciton, in which the injected electrons are combined with the injected holes, transitions from an excited state to a ground state.
Therefore, unlike liquid crystal displays, there is no need to install a separate light source in the OLED, and it is possible to reduce volume and weight of the display. The OLED can be classified into a passive matrix OLED and an active matrix OLED according to driving mechanism. An active matrix OLED has an active driving element such as a thin film transistor, (TFT), while a passive matrix OLED does not have the active driving element.
While a method of fabricating the passive matrix OLED is simple because of its simple structure, the passive matrix OLED has problems of high power consumption, and has difficulties in realizing a display having a large size screen. In addition, the passive matrix OLED has more interconnections, and therefore reduces the aperture ratio. As a result, the passive matrix OLED is mostly used for small size or lower resolution displays, and an active matrix OLED is used for large size or high resolution displays.
In the case of an active matrix OLED having a TFT panel to drive an organic light emitting diode, the TFT panel includes a TFT and a capacitor. In order to increase the capacitance of the capacitor of the TFT panel, technology to use a high dielectric material for an interlayer insulation layer of the TFT panel has been developed. The high dielectric material, however, increases a parasitic capacitance in the TFT of the TFT panel, and the increased parasitic capacitance of the TFT element degrades the characteristics of the TFT panel, accordingly degrades the quality of the active matrix OLED. Therefore, new technology is necessary to reduce the parasitic capacitance of the TFT of the TFT panel, while maintaining the high capacitance of the capacitor of the TFT panel.

Thin film transistor panel, method of fabricating the same, and organic light emitting display device including the same


The present invention describes compounds produced from an amino acid molecule and a fatty acid molecule. The compounds being in the form of amino-fatty acid compounds being bound by an anhydride linkage, or mixtures thereof made by reacting amino acids or derivatives thereof with an appropriate fatty acid previously reacted with a thionyl halide. The administration of such molecules provides supplemental amino acids with enhanced bioavailability and the additional benefits conferred by the specific fatty acid.

Participation in sports at any level either professional or amateur requires an athlete to strive to bring their bodies to a physical state which is considered optimum for the sport of interest. One of the factors that correlate positively with successful participation in a sport is a high degree of development of the aerobic capacity and/or strength of skeletal muscle. Consequently, it is important that nutrients and other requirements of muscles be readily available and that they be transported to areas where they are needed without obstructions.
Strength and aerobic capacity are both functions of training and of muscle mass. As such, an athlete who can train harder and longer is often considered to be the most effective at participation in the sport of interest. Strenuous exercise is an effective stimulus for protein synthesis. However, muscle requires a large array of nutrients, including amino acids, in order to facilitate this increased level of protein synthesis.
Following periods of strenuous exercise, muscle tissue enters a stage of rapid nitrogen absorption in the form of amino acids and small peptides. This state of increased nitrogen absorption is a result of the body repairing exercise-induced muscle fiber damage as well as the growth and formation of new muscle fibers. It is important that muscles have sufficient levels of nitrogen, in the form of amino acids and small peptides, during this period of repair and growth. When an athlete is participating in a strenuous exercise regime and fails to ingest enough nitrogen, e.g. amino acids, the body often enters a state of negative nitrogen balance. A negative nitrogen balance is a state in which the body requires more nitrogen, to facilitate repair and growth of muscle, than is being ingested. This state causes the body to catabolize muscle in order to obtain the nitrogen required, and thus results in a decrease in muscle mass and/or attenuation of exercise-induced muscle growth. Therefore, it is important that athletes ingest adequate amounts of amino acids in order to minimize the catabolism of muscle in order to obtain the results desired from training.
Although supplementation with amino acids are quite common, the uptake of amino acids by cells is limited or slow since amino acid residues are not soluble or only slightly soluble in nonpolar organic solution, such as the lipid bilayer of cells. As a result amino acids must be transported into cells via transport mechanisms which are specific to the charges that the amino acid bears. It is therefore desirable to provide, for use in individuals, e.g. animals and humans, forms and derivatives of amino acids with improved characteristics that result in increased stability and increased uptake by cells. Furthermore, it would be advantageous to do so in a manner that provides additional functionality as compared to amino acids alone.
Fatty acids are carboxylic acids, often containing a long, unbranched chain of carbon atoms and are either saturated or unsaturated. Saturated fatty acids do not contain double bonds or other functional groups, but contain the maximum number of hydrogen atoms, with the exception of the carboxylic acid group. In contrast, unsaturated fatty acids contain one or more double bonds between adjacent carbon atoms, of the chains, in cis or trans configuration
The human body can produce all but two of the fatty acids it requires, thus, essential fatty acids are fatty acids that must be obtained from food sources due to an inability of the body to synthesize them, yet are required for normal biological function. The fatty acids which are essential to humans are linoleic acid and α-linolenic acid.
Examples of saturated fatty acids include, but are not limited to myristic or tetradecanoic acid, palmitic or hexadecanoic acid, stearic or octadecanoic acid, arachidic or eicosanoic acid, behenic or docosanoic acid, butyric or butanoic acid, caproic or hexanoic acid, caprylic or octanoic acid, capric or decanoic acid, and lauric or dodecanoic acid, wherein the aforementioned comprise from at least 4 carbons to 22 carbons in the chain.
Examples of unsaturated fatty acids include, but are not limited to oleic acid, linoleic acid, linolenic acid, arachidonic acid, palmitoleic acid, eicosapentaenoic acid, docosahexaenoic acid and erucic acid, wherein the aforementioned comprise from at least 4 carbons to 22 carbons in the chain.
Fatty acids are capable of undergoing chemical reactions common to carboxylic acids. Of particular relevance to the present invention are the formation of anhydrides and the formation of esters.

Preparation of amino acid-fatty acid anhydrides

Northern Innovations and Formulations Corp.