A circuit combines the features of fast startup with low current, low frequency response, and low noise. With the use of a novel biasing technique, it is possible to operate the piezoelectric crystal at zero DC voltage bias, both throughout the startup phase and during normal operation, by setting both ends of the piezoelectric crystal to the same voltage potential. In this application, the potential is that of the reference voltage. Not having to charge the piezoelectric crystal capacitance reduces the startup time dramatically.

1. Field of the Invention
The present invention relates to piezoelectric accelerometers, and more particularly, to a signal conditioning circuit incorporating fast startup, low frequency response and micro power operation.
2. Description of the Prior Art
Piezoelectric sensors are used in many applications, including accelerometers and vibration sensors. Because the piezoelectric element (crystal) is an inherently high impedance device, it is often necessary to buffer or condition the signal generated by the piezoelectric element. A piezoelectric amplifier is an electronic circuit that converts the high impedance output of the crystal to a more usable, low impedance signal.
There are two general approaches used to construct piezoelectric amplifiers: transistor designs and op-amp designs. These are respectively depicted in FIGS. 1(a), 2(a), in block diagram form. In FIG. 2(a), the Voltage Reference sets the Bias Output Voltage (BOV) and provides the circuit with a known voltage point. The Piezo Crystal produces electrical output when induced with physical vibration. It has a capacitance that affects gain and the low-pass corner frequency. R1 also affects low-pass corner; R2 affects the high-pass corner: C1 affects both gain and the low-pass corner; and C2 affects both gain and the high-pass corner. The "corner" frequency is defined as the frequency at which the amplifier AC response varies by ±3 dB from nominal.
Because of the high impedance output of the piezoelectric element, the amplifiers in FIGS. 1(a) and 2(a) must have very high input impedance. High input impedance is achieved by using semiconductor devices (transistors or operational amplifiers) with very low input bias currents and by using large values of resistance, often in the gigaohm range, to bias the amplifier. The high resistances coupled with the capacitance of the piezoelectric element results in very large RC (resistor-capacitor) time constants, where the RC product is the charge time, in seconds. See, for instance, U.S. Pat. Nos. 2,857,462, 3,400,284, and 3,452,287.
The negative effects of op-amp saturation are well known within the industry, such as discussed in Tutorial MT-084 by Analog Devices Corporation, Copyright 2009, and Application Report SLOA067 by Texas Instruments Corporation, Section 4.1, Copyright September 2001. Traditional transistor based designs (FIG. 1(a)) have long startup times, as shown in FIG. 1(b), due to the slow charging of the PZT crystal capacitance through a very large value biasing resistor. Traditional op-amp based designs (FIG. 2(a)) have long startup times, as shown in FIG. 2(b), due to both the slow charging of the piezoelectric element through the large value feedback resistor (R2), and a saturation recovery delay due to the slow feedback's inability to close the loop during startup.
Startup time is an important parameter for many low power piezoelectric sensor applications employing battery power or energy harvesting. The startup time of a piezoelectric amplifier is generally defined as the time it takes from power-up to when the analog output signal has stabilized and the low frequency information is valid. The startup time is related to the bias output voltage (BOV) stabilization (or settling) time, since while the BOV is stabilizing, the low frequency information is contaminated.
The design of a vibration sensor that consumes only microamps of current with a high pass response in the sub Hertz range and a high dynamic range places many constraints on the piezoelectric amplifier design that are incompatible with a fast startup time. Piezoelectric amplifier designs traditionally have had the startup time coupled to the capacitance of the piezoelectric element and the high impedance of the amplifier. In prior art, the low frequency response is set by both the capacitance of the piezoelectric crystal and a large resistance. Since the capacitance of the crystal is small, approximately 1 nF, biasing resistor values have to be large, on the order of a few gigaohms, to place high pass corner frequency into sub-Hertz range. At power up, the capacitance of the piezoelectric sensing element along with other circuitry must be charged through this large resistance before the bias output voltage (BOV) can stabilize. In a traditional piezoelectric amplifier, it can take a few seconds for a sensor to startup and for the BOV to stabilize. For some applications, such as low power wireless sensor networks, this startup time is too long. See, for instance, Connection Technology Center Inc. Model AC 102 data sheet (settling time 2.5 seconds). Connection Technology Center Inc. Model AC 131 data sheet (settling time 2 seconds), and PCB® Piezotronics, Inc. Model 608A11 data sheet (settling time 2.0 seconds).
It will be appreciated that existing piezoelectric amplifier designs have the startup time of the amplifier closely coupled to the high-pass corner frequency. Traditional piezoelectric amplifiers achieve fast startup only by sacrificing low frequency response, low noise characteristics and/or micro power operation. In prior art, a low noise characteristic, micro power operation, sub-Hertz low frequency response and fast startup have been mutually exclusive (unattainable). See FIG. 8, which is a data sheet of a Connection Technology Center Inc. Model AC312, having Sub-Hertz response, micro power, low-noise, but slow startup (1 second). This disadvantage is especially great in low power piezoelectric sensor applications employing battery power or energy harvesting. In many of these applications, only microamps of average current is available and duty cycles (percentage of sensor on-time) are well below one percent. In these cases, the sensor and amplifier must be stabile within milliseconds after the "node" powers up. For instance, see "WirelessHART & Internet Protocol Wireless Sensor Networks Achieve Industry's Lowest Power Consumption at Less Than 50 μA per Node," by Linear Technology Corporation, Oct. 16, 2012.

Fast startup, micro power, low noise piezoelectric amplifier with extended low frequency response


The present invention relates to a die casting method in order to obtain aluminum alloy having high quality and excellent mechanical characteristics. Further, the present invention relates to a die casting method to produce such an aluminum alloy casting, wherein primary crystal of molten metal is substantially granulated in a casting sleeve so as to form a semi-molten status, and then filled under pressure into a die cavity and solidified, so that molten metal flow becomes laminar flow, thus making less air mixing, and casting can be made without oxides and solidified matter being filled into die cavity.

In the prior art, die casting method is well known as a casting technology to obtain aluminum alloy castings. This die casting method is a casting method to produce castings by filling molten metal in a casting sleeve into a precise metallic die cavity under pressure. According to this die casting method, there are advantages such as highly precise dimensions of castings, beautiful casting surface, availability of mass production and fully automatic production. For this reason, this method has been conventionally used mainly in the production of metal castings which have melting points below that of aluminum alloy.
However, this die casting method has had a problem that the mechanical strength of castings after casting solidification is apt to be deteriorated owing to:
1 Molten metal poured into the casting sleeve is cooled down rapidly within the inner wall of the casting sleeve, generating solidified debris, which is mixed into molten metal and cast;
2 Air in the casting sleeve is mixed into molten metal, causing blister (a phenomenon where mixed and pressurized gas inflates by thermal load to become blistering);
therefore, it cannot be applied to production of strength parts that require high strength.
In order to solve these problems, there are Special Die Casting Methods which include hot sleeve method where casting sleeve is heated in order to prevent the generation of solidified debris in the inner wall of the casting sleeve as described in the above 1, vertical die casting method which prevents air in casting sleeve as described in the above 2 from being mixed into molten metal, and the like. In addition, there is hot chamber die casting method, which is limited to the casting of zinc alloy or magnesium alloy with relatively low melting temperatures. Therefore, this method can not be applied to wide extent.
However, even in the Special Die Casting Methods mentioned above, when speed for filling the molten metal is high, molten metal in the casting sleeve becomes turbulent and catches gas, and is cooled down in the inner wall of the die cavity together with the gas, causing defect and thus deteriorating mechanical and other characteristics. In order to prevent this problem, it is necessary to make the filling speed extremely low, and in this case, insufficient flow of molten metal is caused. In addition, non-solidified portion is extracted during the development of dendrite, causing segregation at the thick wall portions as shown in FIG. 5, thereby deteriorating the mechanical and other characteristics of the cast.
Apart from the various die casting methods mentioned above, Japan Patent Publication No. H3-47951 discloses a die casting method where dies are fixed to form a cavity having a pouring gate at bottom, to which die arranged at the exit of a cylinder is connected so as to form a drawing to limit the flow of molten metal into the cavity. A port to supply molten metal from exterior is arranged at the center of the direction of central axial line of the cylinder equipped with this die, and a punch is slidably engaged, and a casting apparatus is formed. Molten metal is poured into the cylinder from the supply port, and molten metal is kept until liquid phase and solid phase co-exist, then is pushed and pressed by punch through die and into cavity. According to this die casting method, the following effects are expected:
1: The molten melt can be supplied to cylinder at a temperature only just above melting point, which is relatively lower than the temperature in other methods. Therefore, energy can be saved.
2: Since the temperature of molten metal is low, gas absorption is scarce, and there is no need of degassing process, and products have few gas cavity,
3: Molten metal in a state where liquid phase and solid phase coexist is pushed up by punch, so that it is subjected to plastic working in a semi-molten status while passing through the die to form drawing, while the liquid phase and solid phase are mixed. The punch subjects the solid phase to shear force thereby making the casting structure fine. Thus, products with excellent mechanical characteristics can be obtained.
4: Since the molten metal is processed in a semi-molten state, deformation resistance is less compared with forging method, and equipment costs are reduced.
However, in this die casting method disclosed in Japan Patent Publication No.H3-47951, the structure of semi-molten metal is not granulated in the casting sleeve, so that the difference of solute concentration is large, and it is possible that segregation occurs, as shown in variable density in FIG. 6. Even when the molten metal is filled in die cavity, since its structure refinement is insufficient, there is still much to be improved in its mechanical characteristics.
Further, when the speed to fill the molten metal is fast, molten metal in the casting sleeve becomes turbulent and trap gas, and when this molten metal is cooled down rapidly within the inner wall of the die cavity, mechanical and other characteristics are deteriorated, and castings characteristics become uneven. In order to prevent this problem, it is necessary to make the filling speed extremely low. In this case, insufficient flow of molten metal occurs.
On the other hand, with respect to automobiles, the improvement of fuel efficiency has recently become an extremely important problem from laws and regulations in the United States. From this points of view, automobile parts having light weight are needed. Naturally, automobile parts should be sufficiently strong, and from this viewpoint, when making the weight of the parts light by reducing the thickness of the wall, strengthening of raw material becomes an important subject.
However, since there have been problems as described above in the prior die casting method, aluminum alloy castings produced by this die casting method were too insufficient in strength to be applied for production of high strength parts such as automobile parts and the like.


Cables are constructed with embedded discontinuities in the cable jacket that allow the jacket to be torn to provide access to the cable core. The discontinuities can be longitudinally extending strips of polymer material coextruded in the cable jacket.

In order to terminate the fibers within a cable, the fibers must be accessed within the protective structure that comprises the cable jacket. Access to the cable interior can be difficult if the cable is designed to maximize the protection of the fibers within. In most cases cable access is achieved through extensive use of sharp cutting tools which can be dangerous if handled improperly. In addition to the safety concern regarding cable access, additional time during fiber access and termination increases the cost of installing the cable.

Fiber optic cables with extruded access features for access to a cable cavity


Prior art methods of maintaining coherency among multiple TLBs in a multiprocessor system were time-consuming. One microprocessor halted all other microprocessors in the system, and sent an interrupt to each of the halted microprocessors. Rather than invoking an interrupt handler, the TLB shootdown operation of the present invention provides for a TLB flush transaction communicated between multiple processors on a host bus. One microprocessor issues a TLB flush request on the host bus. The TLB flush request includes a page number. The microprocessors receiving the request invalidate the TLB entry corresponding to the page number.

Computer systems often employ several different memory devices that are accessible to the system microprocessor. As such, the system microprocessor typically includes one or more memory management functions for managing the various memory devices. One memory management function that is implemented within the Pentium AE Pro processor manufactured by Intel Corporation of Santa Clara, Calif., is known as paging. Paging provides a mechanism by which virtual memory addresses may be mapped into physical addresses corresponding to memory blocks, or "pages." A page of memory is set to be a fixed size, such as 4 kilobytes. Each of the pages may be stored in either a quick-access memory device, such as dynamic random access memory ("DRAM"), or on a slower-access mass storage device, such as a magnetic or optical disk.
FIG. 1 illustrates a block diagram of a prior art virtual-to-physical address translation. The virtual address 200 includes three fields that are used to translate the virtual address into a physical address within a page of memory. The directory field 202 is an index that points to an entry 211 within a page table directory 210. The page table directory entry 211 in turn points to a page table 220. Thus, there exists one page table for each entry within the page directory 210.
Once the appropriate page table 220 has been located, the table field 204 of the virtual address is used to index a particular entry 221 within the page table. This page table entry (PTE) 221 points to a page of physical memory 230. Thus, for every PTE within page table 220, there exists a page of physical memory. Using the PTE 221, the microprocessor checks to see if the page 230 is in system memory (e.g., DRAM). If not, the page is retrieved from the system disk and loaded into system memory.
Once the appropriate page of physical memory 230 has been loaded, the offset field 206 of the virtual address is used to index a particular address 231 within the page 230. Thus the physical memory address 231 is translated from the virtual address 200.
As can be appreciated from the above description, address translation may take a large number of bus cycles, degrading system performance. Thus, prior art computer systems improve performance by caching the most recently-accessed PTEs within a translation cache, or translation lookahead buffer (TLB).
FIG. 2 illustrates a block diagram of a virtual-to-physical address translation using a TLB 360. The directory field 302 of the virtual address 300 is used to look up a tag entry 311 within the TLB 360. The tag entry 311 is then compared with the table field 304 of the virtual address 300. If the tag entry 311 and the table field 304 match, the match signal 340 is asserted, indicating that the physical address translation may be performed using the TLB 360.
The physical address entry 321 and valid bit entry 331 are both associated with the tag entry 311 of the TLB 360. So long as the valid bit entry 331 indicates that the physical address 321 is valid, and there is a tag match, then the physical address 321 is used to point to a page of physical memory 350. Once the page 350 is loaded into system memory (if required), then the offset field 306 of the virtual address 300 is used to index the physical address 351 of the data within the page 350.
As was mentioned herein above, each entry of the TLB 360 includes a valid bit, e.g. valid bit 331. The valid bit 331 indicates whether or not the physical address 321 still points to the correct page of system memory 350. One situation in which the TLB entry would be invalid is where a PTE (e.g., entry 221 of FIG. 2) changes due to a modification by an operating system or software routine. In such a case, the physical address 321 within the TLB would no longer point to the correct page of memory.
One way in which an operating system or software routine may invalidate the TLB entry is by asserting the invalidate page (INVPLG) instruction, coupled with an argument that indicates the virtual address of the PTE that was changed. The INVPLG instruction is executed by first checking to see if a physical address stored in the TLB corresponds to the INVPLG argument. If found, the valid bit associated with the TLB entry is deasserted. Typically, the INVPLG instruction is a privileged instruction, such that only the most privileged software routines may assert this instruction.
For computer systems including more than one microprocessor, called "multiprocessor" systems, each microprocessor may include its own TLB. All of the microprocessors, however, may share the same physical memory. As such, the TLBs located within each of the microprocessors must be coherent with each other.
One prior art method of maintaining coherency among several caches is referred to as "snooping." Snooping is typically used to maintain coherency for data caches. Each microprocessor monitors the memory transactions performed by all of the other microprocessors, that is, it "snoops" on the other data caches to see if the memory transaction affected its cache data. While snooping is commonly used to maintain coherency in data caches, it is typically not employed for maintaining TLB coherency.
A common method of maintaining coherency among the TLBs is by performing a TLB "shootdown" operation whenever a page table entry is changed. The shootdown operation ensures that changes to a page table entry get propagated to the other microprocessors' TLBs.
One prior art way of performing a TLB shootdown operation starts with halting all microprocessors in the multiprocessor system. This maintains architectural consistency between all of the microprocessors during the shootdown operation. Once the microprocessors have been halted, a first microprocessor invalidates its own TLB by executing the INVPLG instruction. The first microprocessor then sends an interrupt to the other microprocessors. Upon receiving the interrupt, the other microprocessors invalidate their TLB entries using the INVPLG instruction. The first microprocessor waits for all of the microprocessors to complete the TLB invalidation before bringing them out of the halt state, such that they may continue executing programming instructions.
This prior art method of performing a TLB shootdown operation is time consuming, causing the microprocessors to halt operation for a relatively long time. For example, the software interrupt instruction ("INT"), accompanied with an interrupt vector ("n") is often used to communicate the shootdown to the other microprocessors. The INT instruction operates as a far call instruction. Upon receiving an interrupt instruction, the microprocessor uses the interrupt vector "n" to access a descriptor in an interrupt descriptor table (IDT). The descriptor is then used to access an interrupt gate. The interrupt gate then points to an interrupt handler routine that must be loaded into memory, and executed by the microprocessor. The use of descriptors, gates, and interrupt handlers is time consuming, and therefore degrades performance of the multiprocessor system.
It is therefore desirable to provide for a TLB shootdown operation that reduces an amount of time required to invalidate multiple TLBs. It is further desirable to provide a method of performing a TLB shootdown operation that maintains the consistency of an architectural state of the multiprocessor system while performing the shootdown operation in a reduced amount of time. Moreover, it is desirable to provide a method of performing a TLB shootdown operation without invoking interrupt handler routines.

Method and apparatus for performing TLB shutdown operations in a multiprocessor system without invoking interrup handler routines


This invention relates to a hydroformylation process for producing a 1,6-hexanedial which comprises reacting a butadiene with hydrogen and carbon monoxide in the presence of a catalytic amount of rhodium complexed with certain poly-phosphite ligands to achieve high conversions of the butadiene to the 1,6-hexanedial.

Adipaldehyde is a valuable intermediate which is useful, for example, in the production of e-caprolactone by the Tischenko reaction, in the production of adipic acid by oxidation and in the production of 1,6-hexanediol by hydrogenation. Adipic acid and 1,6-hexanediol are also produced from other intermediates (e.g., adipic acid is also produced from cyclohexanone by oxidation. Adipaldehyde itself is produced by circuitous routes such as by the ozonolysis of cyclohexane. The processes currently used to produce adipaldehyde, e-caprolactone, adipic acid and 1,6-hexanediol have various disadvantages. For example, the oxidation reactions may involve the use of nitric acid which can produce nitrous oxide which is an ozone scavenger and which, therefore, may contribute to the greenhouse effect. Moreover, starting materials currently used to produce adipaldehyde, adipic acid and 1,6-hexanediol are relatively expensive. Accordingly, it would be desirable to produce adipaldehyde from a relatively inexpensive starting material (e.g., butadiene) and by a process (e.g., hydroformylation) which does not have the disadvantages of prior art processes. However, prior art processes for producing adipaldehyde by the hydroformylation of butadiene have not been especially satisfactory. In particular, the selectivity to adipaldehyde in prior butadiene hydroformylation processes has been low. Such prior art hydroformylation processes are described below.
Various publications disclose the hydroformylation of butadiene with rhodium catalysts modified by secondary or tertiary, alkyl/aryl phosphines and phosphites to produce dialdehydes but the selectivity to adipaldehyde is less than 10% with most of the dialdehyde product being branched. The conditions used are typically rather severe such as pressures over 750 bar (i.e., pressures over 11,025 psi). Among such publications are: (1) Tetrahedron Letters, 1969, 32,2721-2723, "Dialdehydes by Hydroformylation of Conjugated Dienes"; (2) Chemike-Zeitung, 1975, 99, 452-458, "Hydroformylation of Conjugated Dienes. II Cobalt Carbonyl and Rhodium Carbonyl Catalyst Systems in Hydroformylation of 1,3-Dienes"; (3) Chemike-Zeitung, 1975, 99,485-492, "Hydroformylation of Conjugated Dienes. III. Reaction Products of a Hydroformylation of Conjugated Dienes with Rhodium Carbonyl/tert-Phosphine Catalyst Systems"; (4) Journal of Molecular Catalysis, 1977,2,211-218, "The Hydroformylation of Conjugated Dienes V. Aliphatic Tertiary Phosphines and P-Substituted Phospholanes as Co-Catalysts of the Rhodium-Catalyzed Hydroformylation of 1,3-Dienes"; and (5) Symp. Rhodium Homogeneous Catalysis, 1978, 87-93. "Diols by Hydroformylation of Conjugated Dienes"; and (6) Journal of Molecular Catalysis, 1980, 8, 329-337, "The Hydroformylation of Conjugated Dienes. VI Tertiary Aryl- and Arylalkylphosphines and Secondary Aryl- and Alkylphosphines as Ligands in the Rhodium Catalyzed Hydroformylation Reaction of Conjugated Dienes to Dialdehydes". Publication (5) above describes conducting the hydroformylation in methanol solvent to form aldehyde acetals but the selectivity to adipaldehyde acetal was still less than 10%.
Other publication describe the hydroformylation of butadiene by rhodium catalysts modified with bidentate (i.e., diphosphorus) phosphine (diphosphine) ligands. No mention of phosphite or bis-phosphite ligands is made in these publications and the major product in each case is a saturated monoaldehyde. These publications are: (a) Journal of Organometallic Chemistry, 1980, 184, C17-C19, "Optically Active Aldehydes via Hydroformylation of 1,3-Dienes with Chiral Diphosphinerhodium Complexes"; (b) European Patent 33/554 A2, "A Process For the Hydroformylation of Conjugated Dienes"; and (c) Journal of Molecular Catalysis, 1985, 31, 345-353, "The Hydroformylation of Butadiene Catalyzed by Rhodium-Diphosphine Complexes". Publication (b) above discloses the use of such catalysts to produce valeraldehyde and to minimize the production of dialdehydes. Publication (c) above discloses that butadiene complexes with rhodium thus blocking its activity in heptene-1 hydroformylation.
European patent application 309,056 discloses the hydroformylation of V-olefins or V,l-diolefins with rhodium catalysts modified by bis(phosphinoalkyl)ether ligands, (R.sub.2 PCH.sub.2 CH.sub.2).sub.2 O. No mention of phosphite or poly-phosphite ligands or of butadiene reactants is made in that patent application.
U.S. Pat. No. 4,507,508 discloses a process for the hydroformylation of butadiene and other conjugated diolefins using a rhodium catalyst modified by a tertiary phosphine or phosphite ligand in the presence of an alcohol and a strong acid. The phosphites have alkyl, aryl, aralkyl or alkaryl groups containing from 10 to 30 carbon atoms and the alcohols contain from 1 to 4 carbon atoms. No mention of bidentate phosphites (bis-phosphites) is made. All the Examples in this patent use triphenylphosphine as the ligand and there is no Example using a phosphite ligand. Selectivities to dialdehydes of up to 80% are achieved, but the nature of the dialdehydes, whether branched or linear, is not specified. Based on other publications showing the use of phosphine ligands (i.e., Chem. Zeit 1975 99 485; ibid. 1975 99 452; J Mol Cat 1980 329; ibid. 1977 2 211; and Tet Lett 1969 32 ibid 2721), the dialdehydes produced in U.S. Pat. No. 4,507,508 were probably branched.
U.S. Pat. No. 3,947,503 discloses a two-step process for the hydroformylation of butadiene. In the first step, butadiene is hydroformylated using a rhodium catalyst modified by a tertiary phosphine or phosphite in the presence of an alkanol or alkanediol to produced an acetal of 3-pentene-1-al. The hydroformylation in the first step is said to occur at 50-600 atmospheres pressure (700-9000 psi). In the second step, the acetal is hydroformylated using a cobalt catalyst modified by a tertiary phosphine to produce dialdehyde acetal. The use of a cobalt catalyst in the second step is stated in the patent to be crucial in order to obtain a linear dialdehyde acetal. The dialdehyde acetal is then hydrogenated to 1,6-hexanediol. Up to 50% isolated yields (based on butadiene) are reported. The patent contains only one Example and in it a phosphine ligand is used. Poly-phosphites are not mentioned in this patent.
U.S. Pat. No. 4,769,498 discloses poly-phosphites and their use as ligands in rhodium-catalyzed olefin hydroformylation. The olefins to be hydroformylated are broadly described in this patent as: "terminally or internally unsaturated and of straight chain, branched chain, or cyclic structure. Such olefins can contain from 2 to 20 carbon atoms and may contain one or more ethylenic unsaturated groups". The patent names several specific mono-olefin reactants and two specific non-conjugated diolefin reactants (i.e., 1,4-hexadiene and 1,7-octadiene). Conjugated diolefins such as butadiene, which often considered special cases in hydroformylation reactions (see Chem. Zeit. 1975 99, 452; ibid. 1975 99 485; and J. Falbe "New Syntheses with Carbon Monoxide" Springer-Verlag NY, 1980, Pages 103-105), are not specifically disclosed in this patent and no Examples showing the hydroformylation of any butadiene are included.
U.S. Pat. No. 4,599,206 discloses the use of diorgano phosphite ligands in the rhodium-catalyzed hydroformylation of olefins. The disclosure of olefins in this patent is similar to the disclosure of olefins in U.S. Pat. No. 4,769,498 discussed above. That is, there is no specific disclosure of the hydroformylation of any butadiene.
U.S. Pat. No. 4,742,178 discloses the low-pressure (15-800 psi) hydroformylation of dienes containing 6 to 10 carbon atoms with a catalyst consisting of rhodium and various chelating diphosphine ligands containing certain biphenyl bridging groups. Examples using other chelating diphosphines are included for comparison. The hydroformylation of 1,7-octadiene to produce 1,10-decanedialdehyde in high conversion and selectivity is disclosed in the Examples and 1,7-octadiene is the only diolefin used in the Examples of this patent. This patent illustrates the relative ease with which non-conjugated dienes can be converted to alkanedials by prior art processes. However, no mention is made of hydroformylation of any butadiene or of catalysts containing mono-phosphites or poly-phosphites.
U.S. Pat. No. 4,808,756 discloses the hydroformylation of V,l-diolefins containing from 6 to 10 carbon atoms or V,l-alkenals containing from 7 to 10 carbon atoms with a catalyst consisting of rhodium and a monodentate sulfonated or carboxylated phosphine in an aqueous solution of sulfolane and extraction of the reaction mixture with an alcohol or hydrocarbon. The Examples show the hydroformylation of 7-octene-1-al, 1,7-octadiene, 1,5-hexadiene, or 1,9-decadiene. There is no disclosure of the hydroformylation of butadienes or of the use of mono-phosphite or poly-phosphite ligands.
U.S. Pat. No. 4,248,802 discloses the hydroformylation of olefins with a catalyst consisting of a rhodium-containing aqueous solution of certain sulfonated triaryl phosphine ligands. Phosphite and poly-phosphite ligands are not disclosed. Example 24 of this patent discloses the hydroformylation of butadiene at 80.degree. and 735 psi for 17 hours to give 75% C.sub.5 aldehydes, with only a trace of C.sub.6 dialdehydes.
Accordingly, it is an object of the present invention to provide a process for producing 1,6-hexanedials (e.g., adipaldehyde) by the hydroformylation of butadienes characterized by improved selectivity for the production of the 1,6-hexanedials.

Hydroformylation process for producing 1,6-hexanedials

Union Carbide Chemicals & Plastics Technology Corporation


The present invention provides an economizer 70 including a plurality of cylindrical heat transfer tubes 71a-71d extending along a crossing direction crossing a flowing direction of combustion gas and disposed at a predetermined disposition interval P along the flowing direction, the combustion gas and fluid flowing in the plurality of heat transfer tubes performing heat exchange, and a swirl preventing section 75 disposed in contact with a downstream side outer circumferential surface 71Aa-71Ad in the flowing direction of each of the plurality of heat transfer tubes 71a-71d and configured to prevent a swirl of the combustion gas from occurring near the downstream side outer circumferential surface 71Aa-71Ad.

There has been known a boiler in which various heat exchangers such as a superheater, a re-heater, and an economizer are set in order from a furnace side (see, for example, Patent Literature 1). The boiler disclosed in Patent Literature 1 is a coal-fired boiler. The boiler generates high-temperature and high-pressure steam through heat exchange between water or steam passing through the insides of the various heat exchangers and combustion gas.

Heat exchanger, boiler, and setting method for heat exchanger


An organic light emitting diode (OLED) display with an improved light efficiency and a method of manufacturing the OLED display are disclosed. The OLED display includes a substrate, an insulation layer on the substrate and having concave portions, first electrodes on the insulation layer, pixel defining layers (PDLs) on the insulation layer and configured to define the first electrodes into pixels, organic light emitting layers on the first electrodes as defined by the pixels, and a second electrode on the organic light emitting layers. Each of the concave portions includes a bottom surface and inclined parts. Each of the first electrodes is on the bottom surface and the inclined parts of one of the concave portions. Embossings are on a part of a surface of the PDLs.

1. Field
Embodiments of the present invention relate to an organic light emitting diode (OLED) display and a method of manufacturing the OLED display, and more particularly to an OLED display with an improved light efficiency and a method of manufacturing the OLED display.
2. Description of the Related Art
An OLED display is a self-light emitting display device for displaying an image with OLEDs for emitting light. Unlike a liquid crystal display, the OLED display requires no separate light resource, so that it is possible to reduce its relative thickness and weight. Further, the OLED display has high quality properties, such as low power consumption, high brightness, and high reaction speed, so it has drawn attention as a next generation display device for a portable electronic device.
The OLED is a diode that generates light when electrons and holes are combined and dissipated while emitting the light. The OLED includes an electrode for injecting holes, an electrode for injecting electrons, and a light emitting layer. The OLED has a lamination structure in which the light emitting layer is interposed between an anode that is the electrode for injecting the holes and a cathode that is the electrode for injecting the electrons.
In particular, the electrons that are injected in the cathode and the holes that are injected in the anode move toward each other by an external electric field and are then combined in the light emitting layer, so that they dissipate while emitting light. The light emitting layer of the OLED is formed of a single molecule organic material or a polymer.

Organic light emitting device and manufacturing method thereof


The invention relates to an apparatus for continuous slag treatment of molten silicon for removal of one a more impurity elements from the silicon, the apparatus comprising a vessel (1) intended to contain molten silicon and liquid slag. The vessel (1) has an upwardly extending overflow (4) for slag connected to an outlet opening (3) for slag is the bottom (2) of the vessel, a open-ended pipe (5) arranged about and at a distance from the overflow (4) such than there is an annulus between the pipe (5) and the overflow (4), which pipe (5) extends upwards to a level above the top of the overflow (4) and downwards to the bottom (2) of the vessel, the pipe (5) having at least one opening (6) at the bottom of the vessel (1) a closeable outlet opening (8,9) for treated silicon in the sidewall of the vessel, means (14) for supply of heat energy to the vessel, means for intermittent supply of solid or molten silicon to vessel and means for continuous of substantially continuous supply of solid or liquid slag to the top of the vessel.

From Norwegian patent No. 180532 it is known a method for removing impurities, particularly boron, from molten silicon by continuous treatment of the silicon with slag. According to Norwegian patent No. 180532 the slag is added continuously or substantially continuously to the molten silicon and the slag is inactivated or removed continuously or substantially continuously as soon as equilibrium is reached between the slag and the molten silicon with respect to the impurity element or elements which are to be removed.
If the slag has a higher density than molten silicon, it is proposed in Norwegian patent No. 180532 to supply the slag to the top of the silicon bath and continuously or substantially continuously withdraw the slag from the bottom of the vessel in which the treatment is carried out.
It has however been found that it is difficult to withdraw the slag continuously or substantially continuously from the bottom of the vessel without withdrawing a substantially amount of silicon together with the slag. Further is has been found that it is difficult to remove all slag from the silicon. The yield of silicon by use of the method disclosed in Norwegian patent No. 180532 will for these reasons be low and the refined silicon can be contaminated with some slag particles.

Apparatus for continuous slag treatment of silicon


A communication device belonging to a first cluster among a plurality of clusters includes a memory, a processor, and a network connection device. The memory stores identification information of another cluster that has information being retrievable by a terminal connecting to the communication device in a summary of data held by the other cluster. The processor performs, upon receiving a combination of identification information of a second cluster that holds retrieval-target data and identification information of the retrieval-target data from the terminal that accessed the summary, a control to request target data identified by the combination. The network connection device forwards the target data to the terminal.

In recent years, expectation has been increasing for digital transformation that creates new services and businesses by circulating and using various digitized data. As a method for circulating data in the cases where data are distributed over a plurality of sites, such as between different companies and organizations, it has been proposed to share digital files using peer-to-peer communication between devices.
As a related art, a system has been proposed in which device information that makes it possible to identify the main node in a network from outside the network is registered in a server providing a directory service, and metadata of contents being disclosed are also registered in the server. In this system, a device outside the network obtains the address of the main node and the meta information from the server and obtains distributed contents via the main node.
A method has also been proposed in which, in order to secure the security of the contents, contents encrypted with an encryption key are transmitted to a client terminal via a relay server. In this method, a cache server or the like can be used when distributing contents and the client terminal decrypts the encrypted contents using a decryption key obtained from a ticket server.
For example, documents such as Japanese Laid-open Patent Publication No. 2006-190205 and Japanese Laid-open Patent Publication No. 2003-179597 have been known.
In a case in which data are circulated between different companies, organizations and the like, the data that are the target of circulation are stored in a manner distributed over different networks. In such cases where data are separated and managed in different networks, no central control is performed for the storage locations of the data in all the networks. For this reason, it is difficult for a user that attempts to retrieve data existing in another network to identify the storage location of the data that is the target of the retrieval. As a result, the circulation of data has not been promoted, and there are many data that have not been fully utilized.

Communication device and communication method


The present invention describes methods for inhibition of angiogenesis in tissues using vitronectin xcex1vxcex23 antagonists, and particularly for inhibiting angiogenesis in inflamed tissues and in tumor tissues and metastases using therapeutic compositions containing xcex1vxcex23 antagonists.

The present invention relates generally to the field of medicine, and relates specifically to methods and compositions for inhibiting angiogenesis of tissues using antagonists of the vitronectin receptor xcex1vxcex23.
Integrins are a class of cellular receptors known to bind extracellular matrix proteins, and therefore mediate cell-cell and cell-extracellular matrix interactions, referred generally to as cell adhesion events. However, although many integrins and the ligands that bind an integrin are described in the literature, the biological function of many of the integrins remains elusive. The integrin receptors constitute a family of proteins with shared structural characteristics of noncovalent heterodimeric glycoprotein complexes formed of xcex1 and xcex2 subunits.
The vitronectin receptor, named for its original characteristic of preferential binding to vitronectin, is now known to refer to three different integrins, designated xcex1vxcex21, xcex1vxcex23 and xcex1vxcex25. Horton, Int. J. Exp. Pathol., 71:741-759 (1990). xcex1vxcex21 binds fibronectin and vitronectin. xcex1vxcex23 binds a large variety of ligands, including fibrin, fibrinogen, laminin, thrombospondin, vitronectin, von Willebrand""s factor, osteospontin and bone sialoprotein I. xcex1vxcex25 binds vitronectin. The specific cell adhesion roles these three integrins play in the many cellular interactions in tissues are still under investigation, but it is clear that there are different integrins with different biological functions.
One important recognition site in the ligand for many integrins is the arginine-glycine-aspartic acid (RGD) tripeptide sequence. RGD is found in all of the ligands identified above for the vitronectin receptor integrins. This RGD recognition site can be mimicked by polypeptides (xe2x80x9cpeptidesxe2x80x9d) that contain the RGD sequence, and such RGD peptides are known inhibitors of integrin function. It is important to note, however, that depending upon the sequence and structure of the RGD peptide, the specificity of the inhibition can be altered to target specific integrins.
For discussions of the RGD recognition site, see Pierschbacher et al., Nature, 309:30-33 (1984), and Pierschbacher et al., Proc. Natl. Acad. Sci., USA, 81:5985-5988 (1984). Various RGD polypeptides of varying integrin specificity have also been described by Grant et al., Cell, 58:933-943 (1989), Cheresh et al., Cell, 58:945-953 (1989), Aumailley et al., FEBS Letts., 291:50-54 (1991), and Pfaff et al., J. Biol. Chem., 269:20233-20238 (1994), and in U.S. Pat. Nos. 4,517,686, 4,578,079, 4,589,881, 4,614,517, 4,661,111, 4,792,525, 4,683,291, 4,879,237, 4,988,621, 5,041,380 and 5,061,693.
Angiogenesis is a process of tissue vascularization that involves the growth of new developing blood vessels into a tissue, and is also referred to as neo-vascularization. The process is mediated by the infiltration of endothelial cells and smooth muscle cells. The process is believed to proceed in any one of three ways: the vessels can sprout from pre-existing vessels, de-novo development of vessels can arise from precursor cells (vasculogenesis), or existing small vessels can enlarge in diameter. Blood et al., Bioch. Biophys. Acta, 1032:89-118 (1990). Vascular endothelial cells are known to contain at least five RGD-dependent integrins, including the vitronectin receptor (xcex1vxcex23 or xcex1vxcex25), the collagen Types I and IV receptor (xcex11xcex21), the laminin receptor (xcex12xcex21), the fibronectin/laminin/collagen receptor (xcex11xcex21) and the fibronectin receptor (xcex15xcex21 ). Davis et al., J. Cell. Biochem., 51:206-218 (1993). The smooth muscle cell is known to contain at least six RGD-dependent integrins, including xcex15xcex21, xcex1vxcex23 and xcex1vxcex25.
Angiogenesis is an important process in neonatal growth, but is also important in wound healing and in the pathogenesis of a large variety of clinical diseases including tissue inflammation, arthritis, tumor growth, diabetic retinopathy, macular degeneration by neovascularization of retina and the like conditions. These clinical manifestations associated with angiogenesis are referred to as angiogenic diseases. Folkman et al., Science, 235:442-447 (1987). Angiogenesis is generally absent in adult or mature tissues, although it does occur in wound healing and in the corpeus leuteum growth cycle. See, for example, Moses et al., Science, 248:1408-1410 (1990).
It has been proposed that inhibition of angiogenesis would be a useful therapy for restricting tumor growth. Inhibition of angiogenesis has been proposed by (1) inhibition of release of xe2x80x9cangiogenic moleculesxe2x80x9d such as bFGF (basic fibroblast growth factor), (2) neutralization of angiogenic molecules, such as by use of anti-xcex2bFGF antibodies, and (3) inhibition of endothelial cell response to angiogenic stimuli. This latter strategy has received attention, and Folkman et al., Cancer Biology, 3:89-96 (1992), have described several endothelial cell response inhibitors, including collagenase inhibitor, basement membrane turnover inhibitors, angiostatic steroids, fungal-derived angiogenesis inhibitors, platelet factor 4, thrombospondin, arthritis drugs such as D-penicillamine and gold thiomalate, vitamin D3 analogs, alpha-interferon, and the like that might be used to inhibit angiogenesis. For additional proposed inhibitors of angiogenesis, see Blood et al., Bioch. Biophys. Acta., 1032:89-118 (1990), Moses et al., Science, 248:1408-1410 (1990), Ingber et al., Lab. Invest., 59:44-51 (1988), and U.S. Pat. Nos. 5,092,885, 5,112,946, 5,192,744, and 5,202,352. None of the inhibitors of angiogenesis described in the foregoing references are targeted at inhibition of xcex1vxcex23.
RGD-containing peptides that inhibit vitronectin receptor xcex1vxcex23 have also been described. Aumailley et al., FEBS Letts., 291:50-54 (1991), Choi et al., J. Vasc. Surg., 19:125-134 (1994), Smith et al., J. Biol. Chem., 265:12267-12271 (1990), and Pfaff et al., J. Biol. Chem., 269:20233-20238 (1994). However, the role of the integrin xcex1vxcex23 in angiogenesis has never been suggested nor identified until the present invention.
For example, Hammes et al., Nature Med., 2:529-53 (1996) confirmed the findings of the present invention. Specifically, the paper shows that cyclic peptides including cyclic RGDfV, the structure and function of the latter of which has been previously described in the priority applications on which the present application is based, inhibited retinal neovascularization in a mouse model of hypoxia-induced retinal neovascularization. In a separate study that also supports the present invention as well as the priority applications, Luna et al., Lab. Invest., 75:563-573 (1996) described two particular cyclic methylated RGD-containing peptides that were partially effective at inhibiting retinal neovascularization in the mouse model of oxygen-induced ischemic retinopathy. In contrast, the peptides of the present invention exhibit almost complete inhibition of neovascularization in the model systems described herein.
Inhibition of cell adhesion in vitro using monoclonal antibodies immunospecific for various integrin xcex1 or xcex2 subunits have implicated xcex1vxcex23 in cell adhesion of a variety of cell types including microvascular endothelial cells. Davis et al., J. Cell. Biol., 51:206-218 (1993). In addition, Nicosia et al., Am. J. Pathol., 138:829-833 (1991), described the use of the RGD peptide GRGDS to in vitro inhibit the formation of xe2x80x9cmicrovesselsxe2x80x9d from rat aorta cultured in collagen gel. However, the inhibition of formation of xe2x80x9cmicrovesselsxe2x80x9d in vitro in collagen gel cultures is not a model for inhibition of angiogenesis in a tissue because it is not shown that the microvessel structures are the same as capillary sprouts or that the formation of the microvessel in collagen gel culture is the same as neovascular growth into an intact tissue, such as arthritic tissue, tumor tissue or disease tissue where inhibition of angiogenesis is desirable.
For angiogenesis to occur, endothelial cells must first degrade and cross the blood vessel basement membrane in a similar manner used by tumor cells during invasion and metastasis formation.
The inventors have previously reported that angiogenesis depends on the interaction between vascular integrins and extracellular matrix proteins. Brooks et al., Science, 264:569-571 (1994). Furthermore, it was reported that programmed cell death (apoptosis) of angiogenic vascular cells is initiated by the interaction, which would be inhibitied by certain antagonists of the vascular integrin xcex1vxcex23. Brooks et al., Cell, 79:1157-1164 (1994). More recently, the inventors have reported that the binding of matrix metalloproteinase-2 (MMP-2) to vitronectin receptor ( can be inhibited using xcex1vxcex25 antagonists, and thereby inhibit the enzymatic function of the proteinase. Brooks et al., Cell, 85:683-693 (1996).
Other than the studies reported here, Applicants are unaware of any other demonstration that angiogenesis could be inhibited in a tissue using inhibitors of cell adhesion. In particular, it has never been previously demonstrated by others that xcex1vxcex23 function is required for angiogenesis in a tissue or that xcex1vxcex23 antagonists can inhibit angiogenesis in a tissue.
The present invention disclosure demonstrates that angiogenesis in tissues requires integrin xcex1vxcex23, and that inhibitors of xcex1vxcex23 can inhibit angiogenesis. The disclosure also demonstrates that antagonists of other integrins, such as xcex1IIbxcex23, or xcex1vxcex21, do not inhibit angiogenesis, presumably because these other integrins are not essential for angiogenesis to occur.
The invention therefore describes methods for inhibiting angiogenesis in a tissue comprising administering to the tissue a composition comprising an angiogenesis-inhibiting amount of an xcex1vxcex23 antagonist.
The tissue to be treated can be any tissue in which inhibition of angiogenesis is desirable, such as diseased tissue where neo-vascularization is occurring. Exemplary tissues include inflamed tissue, solid tumors, metastases, tissues undergoing restenosis, and the like tissues.
An xcex1vxcex23 antagonist for use in the present methods is capable of binding to xcex1vxcex23 and competitively inhibiting the ability of xcex1vxcex23 to bind to a natural ligand. Preferably, the antagonist exhibits specificity for xcex1vxcex23 over other integrins. In a particularly preferred embodiment, the xcex1vxcex23 antagonist inhibits binding of fibrinogen or other RGD-containing ligands to xcex1vxcex23 but does not substantially inhibit binding of fibrinogen to xcex1IIbxcex23. A preferred xcex1vxcex23 antagonist can be a fusion polypeptied, a cyclic or linear polypeptide, a derivatized polypeptide, a monoclonal antibody that immunoreacts with xcex1vxcex23, an organic mimetic of xcex1vxcex23 or functional fragment thereof.

Methods and compositions useful for inhibition of angiogenesis


The invention relates to a sausage collating device and a method for collating sausages to form sausage groups of a predetermined number of sausages with a transport device for transporting spaced sausages and at least one accumulator element for accumulating the sausages, where the at least one accumulator element is for collating and is movable in the direction of transport of the transport device.

In the fully automated processing of single or connected sausage portions, e.g. when supplying packaging device, it is often necessary to collate the individual sausages or e.g. sausages connected in pairs, that are transported transversely to their longitudinal axis spaced apart on a transport belt to form groups of a predetermined number of portions and to further convey them as complete groups, for example, to a packaging machine. This has previously been achieved in that an accumulator pusher moveable transversely to the direction of transport is positioned stationarily upstream of the first portion or in the gap between two portions and stops and accumulates the subsequent portion until the desired number of portions of a group have been accumulated. The group is then again released and transported onward. The accumulator pusher is then repositioned in the gap between the last sausage of the group to be created and the subsequent first sausage of the subsequent next group.
However, it happens again and again in prior art that the round sausages—straight or curved—turn, rub against each other when being pushed and therefore roll on top of each other so that the sausage group no longer has one layer but uncontrolled multiple layers. It also happens when removing the pusher accumulator that the sausages of a sausage group do not remain correctly aligned.
Starting out from there, the present invention is based on the object to provide a sausage collating device and a respective method that allows collating sausages in a reliable and simple manner to form sausage groups.
The sausage collating device according to the invention for collating sausages to form sausage groups having a predetermined number of sausages comprises a transport device for transporting the sausages being spaced from each other. A respective transport device can be, for example, a transport belt. In addition, at least one accumulator element is provided for accumulating the sausages, this means that the sausages are pushed together at the accumulator element by the transport belt such that they are no longer spaced from one another. The at least one accumulator element is advantageously configured such that it is for collating and is movable in the direction of transport T of the transport device, i.e. can move together with the transport device in the direction of transport T. Due to the fact that the accumulating element is movable in the direction of the transport device, the velocity difference between the accumulating element and the transport device can be reduced or eliminated. Large friction between the surface of the conveyor and the sausage surface or the resting surface of the sausage, respectively, can thereby be prevented so that the sausages no longer turn, do not rub against each other and no longer roll over one another when accumulating, so that precise single-layer sausage groups can be produced.
The size of the sausage groups, i.e. the number of sausages per group can also be changed during operation.
Furthermore, the sausages do not after collating need to be accelerated from a standstill to the velocity of the transport device, so that it can be prevented that sausages roll apart. In addition, the advantage arises that the sausages are, after collating and when the sausage group is brought back to the transport device velocity, supported by at least one accumulator element and thereby held in position.
The sausage collating device advantageously comprises at least two individually drivable accumulator elements. Due to the fact that the accumulator elements are individually driven, consecutive accumulator elements, i.e. for example, a first accumulator element in the direction of transport located upstream of the first sausage of a sausage group and an accumulator element that is in the direction of transport located downstream of the last sausage of a sausage group, can be driven at different velocities such that an upstream accumulator element decelerates the sausages and a downstream accumulator element pushes the sausages in the direction of transport. For this purpose, a first drive device may be provided for at least one first accumulator element and a second drive device for at least one second accumulator element. The first and the second accumulator element can each be inserted alternately one after the other between the sausages at the respective sausage group boundaries.
The first and/or the second drive device comprises a revolving conveying member, such as a revolving belt, on which the respective at least one accumulator element is arranged, i.e. is mounted. This means that the sausage collating device according to an example embodiment comprises a belt system comprising at least two belts running parallel, to each of which at least one accumulator element is attached. Also several accumulator elements can in particular be mounted to each one revolving conveying member, in particular, belts. Such a structure is simple and inexpensive to implement.
The at least one accumulator element can according to one example embodiment in its motion during collation run in the direction of transport spaced from the surface of the transport device. The conveying member or belt is, for example, disposed such that it runs parallel to the transport device. If the accumulator element does not contact the surface of the transport device, then no friction loss arises between the accumulator element and the transport device and the accumulator element can move freely in its track.
The transport device is according to an example embodiment configured as an accumulation roller belt between the sausages or sausage groups, respectively, and the transport device can thereby be reduced even more. An accumulation roller belt is a revolving closed chain which is equipped with freely rotatable rollers on which the sausages rest. If the sausages are stopped or slowed down by the accumulator element, then the chain continues moving and the rollers rotate underneath the sausages.
It is advantageous to have the sausage collating device comprise a control device as well as a sensor device, where the sensor device can detect an arriving sausage and can send a corresponding signal to the control device. The positions of the arriving sausages are thereby known as a function of time, since also the transport velocity of the transport device is known.
The control device can therefore calculate the positions of the successively arriving sausages. However, it is also possible that the position is not calculated via the signal generated by the sensor, but that the control device knows these positions from the preceding process steps and calculates and initiates further treatment steps based thereupon. Consequently, a respective accumulator element can engage exactly between the last sausage of a first group and the first sausage of a subsequent group. This means that the drive device can be actuated in dependence of the collating assignment, i.e. in dependence of the sausage caliber, the distance of the sausages and the number of sausages in a sausage group.
The controller is according to the invention configured such that the accumulator elements are each drivable at varying velocity, meaning that—where the accumulator elements are configured as being revolving—the velocity during one revolution is not constant. The velocity of the respective accumulator element can thereby during collation be adapted precisely to the respective process step.
It is advantageous to have the revolving conveying members, in particular belts, run around more than two wheels, in particular, around three wheels, where optionally the length l of the section of the conveying members, in which the accumulator elements can move parallel to the transport device, can be adjusted in that the position of at least two wheels is variable.
If two of the wheels are adjustable, then the active length l can be adjusted without the need to employ a new revolving conveying member, i.e. another belt having a different length. This is particularly advantageous.
Sausages spaced from each other are in a method for collating sausages in groups with a predetermined number of sausages conveyed transverse to their longitudinal direction on a transport device and accumulated with at least one accumulator element. This means that the distance of the spaced sausages is there reduced to zero or the sausages are even somewhat squeezed together. At least one accumulator element is according to the invention for collating at least temporarily moved in the direction of transport.
At least two individually driven accumulator elements are there used to collate the sausages.
A first accumulator element is in the method according to the invention optionally inserted upstream of the first sausage of a sausage group and moves at least temporarily at a velocity of V1<Vtransport device. A subsequent second accumulator element is according to an example embodiment inserted downstream of the last sausage of the sausage group to be created and moves at least temporarily at a velocity V2>Vtransport device, where Vtransport device corresponds to the velocity of the transport device at which the sausages are transported.
This means that the sausages can be accumulated, i.e. be decelerated by a first accumulator element while the sausages can by a subsequent accumulator element be pushed in the direction of transport in such a manner that the distance between the sausages is reduced. If two accumulator elements are used for collating, between which the sausages are located, then the upstream accumulator element does not need to decelerate the sausages that much, so that the velocity difference between the decelerated sausage and the transport velocity of the transport device can be reduced. In addition, the sausages can be held reliably in position between the two accumulator elements.
If the distance between the first and the second accumulator element in the method according to the invention corresponds approximately to the product of sausage caliber and number of sausages per sausage group, then the velocity V1, V2 of the two accumulator elements can be adjusted to the velocity Vtransport device of the transport device, this means that the sausages are held by the two accumulator elements and are simultaneously returned to the same transport velocity. It can thereby be effectively prevented that the sausages roll when accelerated to belt velocity. The sausage group can during this synchronous travel be stabilized and calmed. The sausage group is held together in a compact manner.
Once the sausage group has been created, in particular after the synchronous travel, the first accumulator element, being located in the direction of transport upstream of the first sausage of the group, can be moved at a velocity V1>Vtransport device and thereby be conveyed away from the region through which the sausage groups move. The upstream accumulator element can therefore move away from the sausage group and release the sausage group.
The second subsequent accumulator element located downstream of the last sausage of the sausage group can then be decelerated to a velocity V2<Vtransport device to create a further subsequent sausage group by accumulation. It is even possible that the velocity of the accumulator element is there so greatly reduced such that it is at a standstill before the accumulator element contacts the first sausage of the subsequent sausage group, or is moved against the direction of transport T. However, once the accumulator element contacts the first sausage of the subsequent sausage group, it likewise moves in the direction of transport T in order to keep the velocity difference small between the sausage and the transport device. This means that the second downstream accumulator element for creating the first sausage group can be used as an upstream accumulator element for the subsequent group. This enables a continuous process.

Sausage collating device and method for collating sausages to form sausage groups

Albert Handtmann Maschinenfabrik GmbH & Co. KG


A low profile, high volume window fan has a large air filter mounted horizontally therein. The fan is enclosed in a rectangular box-like frame having a sloped top cover. The front section includes a squirrel cage blower, a front louvered section for directing the flow of air into the room, and a horizontally opening door for controlling the flow of air through the fan from either the outside air or the inside air, and for the insertion of the filter therein. The bottom surface includes an external opening for outside air. A double plenum is provided within the frame with the filter dividing the two plenums. When the door is closed, outside air is forced to flow into the second plenum, being in the bottom of the frame and under the filter and through the filter. When the door is opened, interior air is then filtered and circulated.

1. Field of the Invention
The present invention relates generally to window fans, and, more particularly, to window fans with filters, and in greater particularly, to low profile and high volume window fans with filters.
2. Description of the Prior Art
Not having a good night sleep is probably one of the single most important factors leading to problems the next day. Many of the factors that affect our sleep are not within our control such as external events that still raise our level of anxiety, but even some things that we think that we have control over can still cause great anxiety such as family issues, money issues, work issues, health issues, etc.
Nothing is more stressful to a person trying to sleep than allergies to air borne agents such as pollen, animal dander, etc. These can cause sniffling, running eyes, coughing, etc. A person who suffers from pollen allergy greatly desires air purification in almost all locations in a home, but especially in the bedroom. Having a sleepless night caused by pollen allergy in the spring is very harmful and upsetting and thus having both purified air and fresh air would greatly aid sleep.
Obviously having a whole house air conditioning system with built in filters would offer the best solution, but this is expensive and many homes can not be retrofitted even if it was affordable. A prior solution to this issue is the use of window fans having some form of filters.
This problem is addressed by some of the products on the market. One attempted solution is the use of a filter mounted in the window where the house has a whole house exhaust fan. One such product is sold by Bionaire® as a window mounted air exchange system called EverFresh®. This unit is mounted in the lower open window area and has several unique and changeable filters therein. But this unit blocks the lower half of the window. This unit is thus not low profile, and it is not high volume since the size of the filters are limited to an open area smaller than the bottom half of an open window.
Several patents were found directed at window fans, but these are vertically mounted and substantially block the lower window in a double hung window. Even with the attachment of filters thereon, by hook or crook, a substantial frame would be required to prevent water entrance into the filter area and hold the filter separate from the window fan. See for example, U.S. Pat. No. 6,818,035 that has unique filters mounted within the plenums.
A low profile window fan is shown in U.S. Pat. No. 5,730,651, but it lacks any filters or even the ability to place such thereon. Its construction allows it to both input air and exhaust air at the same time by the use of two squirrel cage blowers operating in different directions.
U.S. Pat. No. 5,660,605 is similar to the above patent, but it does include a pair of filters mounted vertically in slots on the top inside of the fan frame. This patent employs a unique air deflector 36 that is not required in the present invention. Further the size of the filters are limited by the height of the fan and the width. They are vertically mounted as compared to the horizontal mounting of the large filter in the present invention. The above products and patents are incorporated by reference
Accordingly, there is a need for a low profile, high volume window fan having a large filter thereon.

Low profile, high volume, filtered window fan


Web pages may be rendered from a main page data element and a plurality of embedded data elements, which are separately fetched by a browser. Herein is provided a web decoder which includes a learning engine adapted to receive human indications of data elements which are unimportant and accordingly to adjust the web decoder's procedures for determining which data elements are displayed to the user. The learning engine may receive human indications of important data elements and uses both types of indications in its further determinations. Optionally, rule generalizations are performed in a manner which searches for parameters which differentiate between important and unimportant data elements. The rule generalizations optionally concentrate on groups of data elements having at least a predetermined number of parameters having the same values for both important and unimportant data elements, reducing the chances that a generalization rule will find important data elements as unimportant.

Some network communication analysis applications analyze network traffic in order to reconstruct network sessions conducted by certain network users. Such analysis may be performed for various reasons, such as network forensics, employee training, data leakage prevention (DLP) and tool testing. For example, Fox-IT (Delft, The Netherlands) offer a system called FoxReplay Analyst, which reconstructs Internet sessions of target users from intercepted Internet packets. The system is described in a white paper entitled "FoxReplay Analyst," Revision 1.0, November, 2007, which is incorporated herein by reference.

System and method for main page identification in web decoding


An interface cable which allows access to an operational Peripheral Component Interconnect (PCI) bus compatible circuit board is disclosed. A flat flexible cable (30,72) secures a plurality of connectors (50,32,36,38) at substantially equal intervals. The connectors on the flat cable are adapted to receive a connection (62,63,64,66,68) on a first edge of the PCI compatible circuit board (82,90). When the PCI compatible circuit board is plugged into the flat flexible cable, a second edge of the PCI compatible circuit board which is opposite the first edge is free to move laterally, away from neighboring circuit boards in response to a flexing of the flat flexible cable. Open space is created adjacent to the PCI compatible circuit board allowing sufficient access to surfaces of the functioning PCI compatible circuit board for testing purpose.

1. Technical Field
The present invention relates in general to an improved method and system for providing a peripheral component interconnect (PCI) bus utilizing a flat cable. In particular, the present invention relates to an improved method and system for interconnecting PCI compatible printed circuit boards while allowing easy access to the surfaces of those circuit boards during testing and development. Still more particularly, the present invention relates to an improved method and system for providing access to PCI circuit boards during testing while simulating an electrical environment which is virtually identical to actual operating conditions.
2. Description of the Related Art
Modern computers utilize data buses to move data from one area of the computer to another. A modern computer has multiple data buses which interconnect different components of the computer system. Computer buses typically are implemented by a series of copper lines within a printed circuit board generally referred to as "traces."
A computer data bus is essentially a shared highway that interconnects different components of a computer system, including a microprocessor, disk-drive controller, memory, and input/output ports. Buses are characterized by the number of bits of data they can transfer at a single time (e.g., an 8-bit data bus simultaneously transfers 8 bits of data in parallel; a 16-bit data bus simultaneously transfers 16 bits in parallel). The bus is integral to internal data transfer. Bus (computer), Microsoft.RTM. Encarta.RTM. 96 Encyclopedia. .COPYRGT. 1993-1995 Microsoft Corporation. All rights reserved.
Modern personal computers have specialized data buses to maximize operational efficiency. High performance data buses within modern personal computers are specialized for interconnecting transaction intensive sub-systems. Generally, buses coupled directly to the main processor transfer data at a higher rate than peripheral buses. High speed buses require special design considerations to ensure system integrity.
Industry standards for bus architectures have been created by organizations within the computer industry. One such architecture which is gaining popularity is an architecture containing a "PCI bus." The PCI bus specification was derived from provisions introduced by Intel.RTM. Corporation. The Intel.RTM. provisions detail a local bus system for a personal computer. A PCI-compliant circuit cards can operate in a computer built to PCI standards. The PCI specification is continually being reviewed by computer industry committees such as the "PCI Special Interest Group."
An operational PCI local bus requires a PCI controller card to regulate bus utilization. Typically, the PCI controller card is installed in one of the PCI card receiving sockets. The PCI controller can exchange data with the computer's central processor, simultaneously transferring either 32 bits or 64 bits of data, depending on the implementation. A PCI controller additionally allows intelligent PCI-compliant adaptors to perform tasks concurrently with the CPU utilizing a technique called "bus mastering." The PCI specification also allows for multiplexing. Microsoft Press Computer Dictionary 295 (2ed. 1994).
Another bus standard is an industry standard bus. A PCI bus is a higher level or faster bus than the Industry Standard (ISA) bus. An ISA bus is typically utilized to interconnect a keyboard to the computer system, whereas a PCI bus typically interconnects devices requiring faster communication, such as disk drives and communication interfaces.
Due to the high data rate on a PCI bus, the physical interconnection of PCI-compliant circuit boards is critical. Transmission line properties such as interference susceptibility, impedance and length are critical to ensure bus communication integrity.
Computers built to PCI specifications can be upgraded or enhanced by adding PCI-compliant circuit cards. A PCI-compliant circuit board is often referred to as a "PCI card" by those skilled in the art.
Printed circuit boards which are sold to consumers generally have been subjected to extensive development and testing prior to their sale. The development phase of a printed circuit board can be very expensive. Design and production defects which avoid detection due to inadequate test capabilities can substantially add to the cost of a product. Production delays due to insufficient testing resources further add to the cost of a product.
A conventional personal computer contains a "motherboard" which provides internal buses to interconnect a main processor with other sub-systems of the computer. The motherboard is the main circuit board containing the primary components of the computer system.
A PCI circuit board undergoing a thorough development procedure must be electrically connected to an operational computer system. Due to the compactness of motherboards and rigid PCI bus specifications, PCI connectors are typically located close together on a motherboard. Visual access, as well as physical access to electrical signals during operation of PCI compatible circuit boards may be extremely limited.
Access to desired locations on a PCI circuit card during a test which utilizes a motherboard requires that the PCI card be remotely located from the motherboard. Testing typically requires an extension cable or an adaptor cable. For example, extension cables can be plugged into the motherboard and the PCI card, then the PCI card can be placed in a location which provides full access.
Alternately, special devices such as extender circuit boards can be plugged into a PCI card receiving socket to extend a duplicative connector at a location above surrounding PCI cards. An extender card places the board under test above surrounding obstructions and allow access to signals on the PCI card.
Often, initial PCI card design concepts are hand-wired by technicians. Typically, hand wired prototype circuit boards are physically much larger than allowed by the PCI specification. Hence, many conceptual designs will not fit in a conventional motherboard environment due to space constraints.
A commonly utilized development tool is a PCI extender card having right angle connectors. Extender cards with right angles provide access to signals on the top side of the PCI compatible circuit board, however, access to signals on the underside of the PCI card is again limited. Further, only one right angle extender card per system can be attached to the motherboard.
Generally, each party to the development of a PCI card has different requirements. Hence, a large quantity of application specific extender cards or test fixtures are built during the development of a product. Often, an application specific test fixture is useless after completion of the development of a specific PCI card.
Extender cards and test fixtures add to the cost of product development. Additionally, the added transmission line lengths introduced by adaptor cables and/or extender cards can create phenomena which is not present when the PCI card is plugged directly into a motherboard.
More particularly, card extenders or adaptors may degrade the signal quality on the PCI bus. Cables having excessive lengths induce data transfer problems, particularly timing skew and interference.
Currently, in the development of PCI compatible circuit boards, the circuit boards must operate in an electrical environment which is different from the electrical environment found in actual field operation. Often, not all of the design problems and difficulties can be determined utilizing extender cards and/or adaptor cables. Additionally, problems manifest in the development of PCI circuit cards which are a result of the test environment.
It therefore should be obvious that there is a need for a system and method for allowing access to the surface of a PCI compatible circuit board during operational testing. Further, a need exists for a reusable test fixture which accommodates oversized PCI compatible circuit boards. Additionally, it has become apparent that adequate testing of a PCI compatible card requires a test environment which accurately simulates field operating conditions.

International Business Machines Corporation


A first element substrate (20a) including an interlayer insulating layer (15a) provided on a first transparent substrate (10a), a plurality of first transparent electrode (16) extending parallel to each other, each first transparent electrode (16) being provided at a bottom (B) of an associated one of a plurality of grooves (S) in the interlayer insulating layer (15a), and a planarizing layer (17) covering the first transparent electrodes (16), filling the grooves (S), and having a refractive index equal to a refractive index of the interlayer insulating layer (15a), a second element substrate (30a) including a second transparent electrode (21) provided on a second transparent substrate (10b), and a liquid crystal layer (40) provided between the first element substrate (20a) and the second element substrate (30a) are provided.

Optical deflectors using liquid crystal are configured such that incident light is output after the deflection direction of incident light is changed by forming predetermined electric field distribution in a liquid crystal layer provided between a pair of substrates. Here, the optical deflector using liquid crystal includes, for example, a first substrate on which a plurality of transparent electrodes are provided in a striped pattern, a second substrate disposed to face the first substrate and provided with a transparent common electrode, and a homogeneous alignment type liquid crystal layer provided between the first substrate and the second substrate, wherein the common electrode is grounded, and a predetermined voltage is applied to each transparent electrode, so that a spatial refractive index modulation region is induced in the liquid crystal layer, thereby forming a blazed diffraction grating in the liquid crystal layer.
Incidentally, in such an optical deflector having the above-described configuration, a short circuit may be formed, for example, between the transparent electrodes adjacent to each other due to a residue, or the like, resulting from etching in forming the transparent electrodes. When the short circuit is formed, the optical deflector generates unnecessary diffracted light at an angle different from a desired diffraction angle during operation. This may make control of the diffraction angle difficult or may reduce the diffraction efficiency.
For example, Patent Document 1 describes a horizontal electric field type liquid crystal device including an array substrate provided with a common electrode and a conductive auxiliary layer which are formed by forming an interlayer insulating layer etched to form a reverse taper shape between electrodes, and separately forming an indium tin oxide (ITO) film in a self-aligning manner on the interlayer insulating layer.


Application data that includes a plurality of pages of the application is received. Input parameters for each page of the plurality of pages is determined using the application data. A set of pages of the plurality of pages is determined for which all respective input parameters are identified. A set of hyperlinks for the set of pages is generated.

The present disclosure relates to managing navigation within user interfaces (UIs). UIs may include graphical text features and icons and the like that are displayed for a user when the user accesses a program, such as a locally stored program or a remotely stored program accessed as a website or the like. A program may include a plurality of pages that each include different portions of the application. Pages of an application may be organized according to an organizational hierarchy, where one or more "main" pages link to subpages which can be further tunneled into access pages that relate to specific sub-functionalities of the application. In some cases, some complex pages may require one or more data points from a user as inputted by the user at a previous screen to load the relatively complex pages. For example, the user may have to provide a number of user selections at an input page in order to access a page related to metrics of those user selections. In certain examples, a series of pages may each require distinct sets of input parameters that build upon each other, such that pages of a UI may effectively tunnel into a program to provide increasing specialized utility for a user as the application gathers additional information from the user.

International Business Machines Corporation


A dielectric in an integrated circuit is formed by creating oriented cylindrical voids in a conventional dielectric material. Preferably, voids are formed by first forming multiple relatively long, thin carbon nanotubes perpendicular to a surface of an integrated circuit wafer, by depositing a conventional dielectric on the surface to fill the area between the carbon nanotubes, and by then removing the carbon nanotubes to produce voids in place of the carbon nanotubes. A layer of dielectric and voids thus formed can be patterned or otherwise processed using any of various conventional processes. The use of a conventional dielectric material having numerous air voids substantially reduces the dielectric constant, leaving a dielectric structure which is both structurally strong and can be constructed compatibly with conventional processes and materials.

In the latter half of the twentieth century, there began a phenomenon known as the information revolution. While the information revolution is a historical development broader in scope than any one event or machine, no single device has come to represent the information revolution more than the digital electronic computer. The development of computer systems has surely been a revolution. Each year, computer systems become faster, store more data, and provide more applications to their users.
A modern computer system typically comprises a central processing unit (CPU) and supporting hardware necessary to store, retrieve and transfer information, such as communications buses and memory. It also includes hardware necessary to communicate with the outside world, such as input/output controllers or storage controllers, and devices attached thereto such as keyboards, monitors, tape drives, disk drives, communication lines coupled to a network, etc. The CPU is the heart of the system. It executes the instructions which comprise a computer program and directs the operation of the other system components.
From the standpoint of the computer's hardware, most systems operate in fundamentally the same manner. Processors are capable of performing a limited set of very simple operations, such as arithmetic, logical comparisons, and movement of data from one location to another. But each operation is performed very quickly. Programs which direct a computer to perform massive numbers of these simple operations give the illusion that the computer is doing something sophisticated. What is perceived by the user as a new or improved capability of a computer system is made possible by performing essentially the same set of very simple operations, but doing it much faster. Therefore continuing improvements to computer systems require that these systems be made ever faster.
The overall speed of a computer system (also called the throughput) may be crudely measured as the number of operations performed per unit of time. There are numerous ways in which system speed might be improved, but conceptually the simplest and most fundamental of all improvements is to increase the speed at which the basic circuits operate, i.e., to increase the clock speeds of the various components, and particularly the clock speed of the processor(s). E.g., if everything runs twice as fast but otherwise works in exactly the same manner, the system will perform a given task in half the time.
Clock speeds are necessarily limited by various design parameters, and in particular are limited by signal propagation delays. In general, clock speeds can be increased if the length of signal paths is reduced, i.e., by shrinking the size of the logic elements. Early computer processors, which were constructed from many discrete components, were susceptible to significant speed improvements by shrinking component size, reducing discrete component numbers, and eventually, packaging the entire processor as an integrated circuit on a single chip. Modern processor chip designs often include one or more caches on the same integrated circuit chip as the processor, and in some cases include multiple processors on a single integrated circuit chip.
Despite the enormous improvement in speed obtained from integrated circuitry, the demand for ever faster computer systems has continued. With this demand comes a need for even further size reduction in the logic circuitry within an integrated circuit chip.
A typical integrated circuit chip is constructed in multiple layers. Many active and passive elements are formed on a substrate (usually silicon). A dielectric layer is placed over the elements, and multiple conductive layers, each separated by another dielectric layer, are formed over the elements. The conductive layers carry power and ground potentials, as well as numerous signal interconnects running among active elements. Each conductive layer comprises multiple discrete conductors, often running substantially in parallel. Conductive interconnects between conductive layers, or between a conductive layer and an active or passive element, are formed as holes in the dielectric layers, called vias, into which a conductive metal, such as aluminum or copper, is introduced.
The number of active elements in a typical processor dictates a very large number of interconnections. A large number of relatively long, narrow conductors introduces some degree of parasitic capacitance in the integrated circuit, which varies with the individual conductors. As the number of such conductors increases and as processor clock speeds also increase, this parasitic capacitance becomes a significant problem for the designer. I.e., it becomes increasingly difficult to assure that all required signals will propagate the full length of their conductors and cause any required state change in an element at the opposite end within the available clock cycle time.
The problem of parasitic capacitance has long been known by integrated circuit designers, and numerous design approaches have been used to counter its effects. For example, integrated circuits are laid out in such a manner as to reduce signal path lengths. Signal wires are laid out to avoid running wires for long distances next to each other in adjacent conductive layers. Intentional delays are sometimes introduced into certain paths to balance inherent delays of other paths. In some cases, long signal paths are split by clocking a signal into a latch, so that the signal requires multiple cycles to propagate.
One of the fundamental physical parameters influencing the amount of capacitance in signal paths is the dielectric constant (k) of the dielectric material separating conductors. Ideally, the dielectric constant is as low as possible to reduce the amount of capacitance. However, it is not possible to simply select any arbitrary low-k material as a dielectric. Any material selected must provide suitable performance in numerous, demanding ways. For example, it must tolerate high temperatures of numerous processing steps, be extremely stable in operation, be compatible with other materials used as conductors and semiconductors, etc.
Silica or silicon oxide or silicon dioxide (SiO2) has traditionally been the dielectric of choice, and modern semiconductor fabrication techniques have evolved as suitable for use with a silicon oxide dielectric. Silicon oxide has a dielectric constant in the high 3's to 4 range. Various alternative materials (having lower dielectric constants) have been proposed and/or have been the subject of investigation for use in integrated circuits. However, all such materials have their respective drawbacks, such as compatibility with existing processes or semiconductor materials. No single dielectric material has emerged as a clearly superior alternative to conventional silicon oxide.
If a suitable dielectric could be found which both has substantially lower dielectric constant than conventional silicon oxide or similar materials, and is generally suitable as a substitute for silicon oxide, the parasitic capacitance of integrated circuits could be substantially reduced without any other design changes. Such a reduction would enable further clock speed enhancements and/or density of elements within an integrated circuit chip. A need therefore exists for an improved dielectric for use in integrated circuitry.

Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes


Automated systems and methods are provided for establishing or maintaining a personalized trusted social network for a community of users, with little or no input from any given user. To establish the personalized trusted social network, one or more trusted sources are identified for a given user. The identified trusted sources are added to a user profile for the given user. Also, identified are any annotations, bookmarks, or the like that the identified trusted sources have associated with any shared content. These annotations provide access to microcontent items that the identified trusted sources have integrated with the shared content to thereby enhance or enrich its context. One or more profiles are constructed or updated to track the associations between the identified trusted sources and their annotations. The profile information can be applied to enhance and personalize search and browsing experiences for the given user.

The MY WEB 2.0 web service, available from Yahoo! Inc., is an example of a web-scale social search engine that enables users to find, use, share and expand human knowledge. It allows users to save and tag Web objects, allowing for browsing and searching of objects, as well as sharing Web objects within a personalized community or to the public. Further, the MY WEB 2.0 Web service provides scoped searches within a user's trusted social network (e.g., friends and friends of friends). As a consequence, the search results are personalized and spam-filtered by trusted networks.
To experience the full benefits of personalized search results, a user typically must subscribe to the web service and create a profile that lists the names of the user's trusted social network. The user must include an email address or another personal identifier, so that each member of the social network can be accurately identified. Next, a database must be populated with Web objects, or links to Web objects, that the user and the user's network of friends have saved and tagged. This implies that the members of the user's social network must also be subscribers to the web service. After completing this process, the databases for the web service would be ready to enable the user to enjoy the benefits of personalized searches.
However, to complete the above process, the user must expend a considerable amount of time to collect the requisite data about the members of the user's social network. Considerable effort must also be expended to populate the databases with saved and tagged objects. As such, a user, including the members of the user's social network, can be initially discouraged from seeking the advantages of personalized web services.
Therefore, what is need is a system and method that overcome the above-noted shortcomings and provide an efficient and effective means for establishing a social network for sharing, discovery and recovery.

Systems and methods for establishing or maintaining a personalized trusted social network