A method is described for performing model-based optical proximity corrections on a mask layout used in an optical lithography process having a plurality of mask shapes. Model-based optical proximity correction is performed by computing the image intensity on selected evaluation points on the mask layout. The image intensity to be computed includes optical flare and stray light effects due to the interactions between the shapes on the mask layout. The computation of the image intensity involves sub-dividing the mask layout into a plurality of regions, each region at an increasing distance from the evaluation point. The contributions of the optical flare and stray light effects due to mask shapes in each of the regions are then determined. Finally, all the contributions thus obtained are combined to obtain the final computation of the image intensity at the selected point.

This invention relates generally to the field of optical lithography, and more particularly, to a method for incorporating long-range flare effects in an Optical Proximity Correction (OPC) software tool for use in a model-based optical lithography simulation, to provide a fast and accurate correction of the device shapes in a photo-mask.
The optical micro-lithography process in semiconductor fabrication, also known as the photolithography process, consists of duplicating desired circuit patterns onto semiconductor wafers for an overall desired circuit performance. The desired circuit patterns are typically represented as opaque, complete and semi-transparent regions on a template commonly referred to as a photomask. In optical micro-lithography, patterns on the photo-mask template are projected onto the photo-resist coated wafer by way of optical imaging through an exposure system.
The continuous advancement of VLSI chip manufacturing technology to meet Moore's law of shrinking device dimensions in geometric progression has spurred the development of Resolution Enhancement Techniques (RET) and Optical Proximity Correction (OPC) methodologies in optical microlithography. The latter is the method of choice for chip manufacturers for the foreseeable future due to its high volume yield in manufacturing and past history of success. However, the ever shrinking device dimensions combined with the desire to enhance circuit performance in the deep sub-wavelength domain require complex OPC methodologies to ensure the fidelity of mask patterns on the printed wafer.
Current OPC algorithms pre-correct the mask shapes by segmenting the shape edges and shifting the position of the segments by small amounts. In the current state of the art, Model-Based OPC (MBOPC) software emulates the physical and optical effects that are mostly responsible for the non-fidelity of mask shapes printed on the wafer, as will be described hereinafter with reference to FIG. 1. In the correction phase of MBOPC, the mask shapes are iteratively modified so that the shapes printed on the wafer match the desired shape as closely as possible. This method automatically deforms existing mask shapes to achieve the target dimensions on the wafer.
The aforementioned methodology is illustrated in FIG. 1. In the current state of the art, an input mask layout 101 and a target image 105 are provided. The mask shapes are divided into segments 102, where each segment is provided with a self-contained evaluation point. The optical and the resist image are then evaluated at evaluation points 103. The images at each of the evaluation points are then checked against the tolerance of the target image 104. If the image does not remain within tolerance the segment is iteratively moved forward or backward 106 until all segments reside within an accepted tolerance. Eventually, the final corrected mask layout is outputted 107.
The core of the method herein described is a computer simulation program that accurately predicts the printed dimension of the shape on the wafer within the appropriate optical and physical parameters, and the original dimension of the shape on the mask, as illustrated in FIG. 2. The success of the model-based OPC depends on using a highly accurate simulator to predict the lithographic processing effects on selected points on the mask shapes which, ultimately, are printed on the wafer. Based on the simulation, an integrated circuit layout modeler determines the overall printed image on the wafer by interpolating selected simulated points.
Aerial image simulators which compute the images generated by optical projection systems have proven to be a valuable tool for analyzing and improving the state of the art of optical lithography systems for the fabrication of integrated circuits. These simulators have found wide application in advanced mask designs, such as phase shifting mask (PSM) design, optical proximity correction (OPC), and design of projection optics. Modeling aerial images is a crucial component of semiconductor manufacturing. Since present lithographic tools employ partially coherent illumination, such modeling is computationally intensive for all but the most elementary patterns. The aerial image generated by the mask, i.e., the light intensity of an optical projection system image plane, is a critically important parameter in micro-lithography for governing how well a developed photo-resist structure replicates a mask design and which, generally, needs to be computed to an accuracy of better than 1%.
In prior art MBOPC tools, the physical effects simulated include only the diffraction of light in the presence of low order aberrations which limit the accuracy of the predictions. One significant effect not currently included is the scattered light which affects the exposure over long distances on the wafer. Such long-range optical effects are generally referred to as "flare" in the literature. Given the current extremely tight requirements on Across-Chip-Line-Width-Variation (ACLV), flare effects need to be included. Also, in some cases, novel RET methods such as alternating Phase Shifting Masks (Alt-PSM) can exacerbate the problem by requiring dual exposure. The problem is even more pronounced in bright field masks that are used in printing critical levels which control the ultimate performance of the circuit, such as gate and diffusion levels.
Referring now to FIG. 2, there is described how the prior art methodology simulates the image intensity at a given point due to optical effects. The input to this methodology 201 is a mask layout and a pre-defined point 251, and a set of process parameters 202 including the light wavelength λ, source parameters, such as σ1 and σ2, the numerical aperture NA and Zernike parameters defining the lens aberrations. In the next step 203, an interaction region 252 around the point is considered, as are all the mask shapes or portions thereof within the box. The interaction region is a square box having dimensions of a few microns. The size of the box is determined by the computational speed versus accuracy tradeoff. Step 204 computes the SOCS (Sum of Coherent Systems) kernels, which description is given hereinafter. In step 205, the shapes obtained from step 203 are convolved with the kernels obtained in step 204. The kernel values are summed up in step 206 and stored in a discrete two dimensional array. The particular image intensity value is determined in step 207 from the summed values obtained by interpolating the values in the array.
Accuracy is of critical importance to the computation of calibrated optical or resist models. The accuracy in the simulation of wafer shapes is necessary to gain a better understanding and provide an improved evaluation of the OPC methodologies. Through analytical processes, fidelity in the wafer shapes to the "as intended" shapes ultimately achieve a better correction of the mask shapes. An increase in yield at chip manufacturing is a direct consequence for achieving this accuracy.
A significant difficulty when taking into consideration long range effects, such as flare, is the extent of the corrections flare effects required on the mask. In the prior art, optical lens aberrations are modeled by just the 37 lowest order Zernikes and, therefore, only aberrations that deviate light by 1 micron or less are included. The effect of aberrations dies off within that range. The flare effect, on the other hand, extends up to a few mms, thus covering the entire chip area. Current Model-Based OPC (MBOPC) software tools are not equipped to handle such long distance effects.
The limitations of the current methodology are shown in FIG. 3a. Therein are illustrated the extent of the flare kernel and the power spectral density of the flare accounting for the optical energy falling on the exposed mask. These are plotted against the logarithmic distance from the mask opening. The distance is measured in terms of the number of wave cycles/pupil or the distance x/(λ/2 NA), wherein λ is the wavelength of the light and NA, the numerical aperture. The limitations of the current art which are modeled by the 37 Zernike polynomial parameters Z1 through Z37 are shown in 301. On the other hand, the actual extent of the flare is shown in 304. The flare can be modeled by the Power Law F(x)=K/(x−x′)γ, wherein the constant γ ranges from 1 to 3, and depends on the optical system used in the lithographic process. The non-optimal interferometers that are used to measure the extent of flare is shown in 302. The non-optimal interferometer grossly underestimates the energy of the flare. On the other hand, a regular interferometer can be used to find the extent of the flare, as shown in 303. The variation of flare with respect to distance is shown in FIGS. 3b and 3c that illustrate variations of flare across field position.
In current MBOPC tools, interaction regions are of the order of 1 micron. Any increase in size of that region significantly affects the timing and accuracy of the simulation and, consequently, affects the OPC results. As a result, the need for fast and accurate flare modeling is being felt throughout the industry.
It has been shown through experimental data that the effect of flare on the variation of the Critical Dimension (CD) of transistors and other circuit devices can be as high as 6% of the designed dimensions for certain optical lithography process configurations. Therefore, it is imperative that these effects be considered in the simulation tools used by the MBOPC software.
The experimental justification of flare is shown in FIG. 4. Therein, the same mask structure printed on several locations on the wafer is shown having three different neighborhood background transmissions. Measured CDs of different wafer site locations are plotted against different background transmissions. CDs with 6%, 50% and 100% neighborhood background transmissions are shown in 401, 402 and 403, respectively. It is observed that the CD having a 6% neighborhood background transmission shows more pronounced CD variations than the other plots.
In the prior art, the following mathematical treatment in the optical proximity correction engine is commonly used. These approaches are in one form or another, related to the Sum of Coherent System (SOCS) method, which is an algorithm for efficient calculation of the bilinear transform.
Sum of Coherent Systems (SOCS) Method
The image intensity is given by the partially coherent Hopkin's equation (a bilinear transform):I0({right arrow over (r)})=∫∫∫∫d{right arrow over (r)}′dr″h({right arrow over (r)}−{right arrow over (r)}′)h*({right arrow over (r)}−r″)j({right arrow over (r)}′−r″)m({right arrow over (r)}′)m*({right arrow over (r)}″),where,                h is the lens point spread function (PSF);        j is the coherence;        m is the mask; and        IO is the aerial image.
By using the SOCS technique, an optimal nth order coherent approximation to the partially coherent Hopkin's equation can be expressed as
            I      0                  (              r        ->            )        ≅            ∑              k        =        1            n                          λ        k                                                                        (                              m                ⊗                                  ϕ                  k                                            )                                                  (              x              )                                                2            where λk, φk({right arrow over (r)}) represent the eigenvalues and eigenvectors derived from the Mercer expansion of:
            W                    (                                            r              ->                        ′                    ,                      r            ″                          )              =                            h                                (                                          r                ->                            ′                        )                                  h        *                  (                      r            ″                    )                                  j                                (                                                            r                  ->                                ′                            -                              r                ″                                      )                              =                        ∑                      k            =            1                    ∞                                              λ            k                                                        ϕ              k                                                  (                                                r                  ->                                ′                            )                                                                    ϕ              k                                                  (                                                r                  ->                                ″                            )                                            ,suggesting that a partially coherent imaging problem can be optimally approximated by a finite summation of coherent imaging, such as linear convolution.SOCS with Pupil Phase Error
The above calculation assumes an ideal imaging system. However, when a lens aberration is present, such as the pupil phase error and apodization, one must include the pupil function:h({right arrow over (r)})=∫∫P({right arrow over (σ)})exp(i W({right arrow over (σ)}))exp(i2π{right arrow over (r)}·{right arrow over (σ)})d2{right arrow over (σ)}where,                P({right arrow over (σ)}) is the pupil transmission function; and        W({right arrow over (σ)}) is the pupil phase function, which contains both aberration and flare information.
Because of the possible higher spatial frequency in the wavefront function, h({right arrow over (r)}) will have a larger spatial extent. In this case, the number of eigenvalues and eigenvectors required are higher than those of an ideal system. Hence, the kernel support area is extended to take account of the contribution from a distance greater than λ/NA. However, the basic mathematical structure and algorithm remains the same.
Physical Model of Flare
Flare is generally considered to be the undesired image component generated by high frequency phase "ripples" in the wavefront corresponding to the optical process. Flare thus arises when light is forward scattered by appreciable angles due to phase irregularities in the lens. (An additional component of flare arises from a two-fold process of backscatter followed by re-scatter in the forward direction, as will be discussed hereinafter). High frequency wavefront irregularities are often neglected for three reasons. First, the wavefront data is sometimes taken with a low-resolution interferometer. Moreover, it may be reconstructed using an algorithm at an even lower resolution. Second, even when the power spectrum of the wavefront is known or inferred, it is not possible to include the effect of high frequency wavefront components on an image integral that is truncated at a short ROI distance, causing most of the scattered light to be neglected. Finally, it is not straightforward to include these terms in the calculated image. The present invention addresses these problems.
Flare also arises from multiple reflections between the surfaces of the lens elements (including stray reflections from the mask and wafer). The extra path length followed by this kind of stray light usually exceeds the coherence length of the source. As a result, ordinary interferometric instruments will not detect it. Thus, as with wavefront ripple, flare from multiple reflections is not considered in the prior art OPC. The reasons are similar, i.e., stray reflections require extra effort to detect, they are largely generated outside ROI, and their contribution to the image is not handled by conventional algorithms of lithographic image simulation.
Stray reflections are dim, and generally represent an acceptable loss of image intensity. Thus, stray reflections are not particularly deleterious unless they actually illuminate the wafer with stray light. For this to occur, it is usually necessary for two surfaces to participate in the stray light path, one surface to back reflect a small portion of the primary imaging beam, and another to redirect some of the stray reflection forward towards the wafer. In nearly all cases, this light is strongly out of focus, and amounts to a pure background. In contrast, stray image light which is reflected back from the wafer and then forwarded from the underside of the mask remains reasonably well imaged at the wafer itself. For this reason, light in the primary image which is back reflected along this particular path (wafer to mask, and back to the wafer) is usually not counted as stray light (particularly if, as is usually the case, the twice-through beam is weak compared to the direct image). In contrast, light following other stray paths will form a defocused background at the wafer. Such an unpatterned background has a non-negligible impact even at a 1% level.
Nowadays, the reflectivity of the mask and wafer are held well below 100% (typically, an order of magnitude lower), but residual mask and wafer reflectivity are themselves typically an order of magnitude larger than the residual reflectivities of the lens element surfaces (which is highly transmissive). Nonetheless, the cumulative impact of all stray reflection paths which involve two successive stray reflections from lens surfaces are roughly comparable to the cumulative impact of those paths involving only a single lens reflection (together with a single reflection from the mask or wafer). This heightened cumulative impact is simply the result of the large number of lens surfaces (e.g., about 50) that are present in state of the art lithography lenses.
In principle, stray reflections do the most damage if focused or almost focused at the primary image plane, but in practice, this instance (unlikely to begin with) is checked for and avoided by lens designers. Stray reflections thus tend to be defocused for large distances, i.e., distances corresponding to the macroscopic scale of characteristic lens dimensions. As a result, the flare kernel from stray reflections is significantly flat on the scale of lens resolution, or even on the scale of typical flare measurement patterns. This behavior allows the contributions to the flare kernel from stray reflections and wavefront ripple to be distinguished from one another, since the latter falls off quite rapidly at distances larger than the lens resolution, e.g., as the inverse second or third power of distance, while the former falls off only slowly.
This is illustrated by the measurements shown in FIG. 3b, which plots an integrated flare within the total flare kernel of the lithographic lens, as measured by integrating boxes of various sizes. The integrated flare increases rapidly at short distance scales, e.g., far more rapidly within the first 10 microns than it does over the next 100 microns. This rapid variation is the result of a rapidly falling power-law flare component from wavefront ripple. In addition, stray reflections make a comparable contribution to total flare in the lens. However, the contribution of the stray reflection is effectively constant over approximately 500 μm scale of the measurement site.
Another characteristic of flare from stray reflections is that the flare kernel varies across the field, as illustrated in FIG. 3c. At both ends of the scatter distance scales that are plotted (integrated scatter outside 10 microns, and integrated scatter outside 80 microns), the amount of light in the flare kernel varies by roughly a factor of two across the field.
It is generally observed that the flare energy from a wavefront ripple follows approximately the inverse power law relationship given by: F(x)=K/(x−x′)γ. This is shown in FIG. 5. Therein, the extent of flare is plotted for a typical optical process of a numerical aperture (NA) of 0.75 and a pupil size (σ) of 0.3. Under this condition, the power law shows γ=1.85.
Currently there are no tools available for Model-Based Optical Proximity Correction (MBOPC) incorporating flare effects and there are no known patents or publications available to that effect. The present invention satisfies the need for a fast MBOPC which accurately incorporates the effect of flare.

Fast and accurate optical proximity correction engine for incorporating long range flare effects

International Business Machines Coporation


A multi-target dynamic simulation test system for vehicle-mounted millimeter-wave (MMW) radar. The test system includes an antenna turntable, a radar pan-and-tilt head (PTH), a radar echo simulation module, a control module, a signal acquisition module and a display. A test radar is driven by the radar PTH to pan or tilt. The radar PTH and the test radar are both placed in a darkroom module. An antenna is driven by the antenna turntable to pan. The control module sends expected states of the test radar and the antennas to the radar PTH and the antenna turntable, respectively, and sends relative states between host vehicle and virtual targets to the test radar after processing by the radar echo simulation module. The signal acquisition module acquires and stores a detection signal of the test radar, and transmits the detection signal of the test radar to the display for real-time display.

The rapid development of automotive intelligence has made automated driving technology an area of increasing concern. Environmental perception is an indispensable part of automated driving, and environmental perception sensors are developing rapidly. Among them, the millimeter-wave (MMW) radar is insusceptible to light, weather and environment, and thus indispensable for smart cars to perceive the environment. The MMW radar can effectively judge the road conditions and improve the vehicle's early warning ability. Therefore, it is widely used in advanced driving assistance systems such as lane keeping, adaptive cruise, collision warning, blind spot monitoring and lane change assistance. In order to test whether the MMW radar is suitable for complex driving environments and can achieve the required performance, it is necessary to build a MMW radar test system.
At present, there are two types of radar test systems. One is to arrange an actual test site to test, which is expensive. The other is to build a virtual test scenario through simulation, which has low cost and convenient testing. However, both types can only test simple driving scenarios, and are difficult to determine whether the MMW radar can meet the perception requirements in complex driving scenarios.

Multi-target dynamic simulation test system for vehicle-mounted millimeter-wave radar


A system and method is provided for simulating a computer environment and evaluating a user's performance within a simulation which uses the computer environment. The method reads base data which defines a simulated component within a simulated computer environment. Initial condition data may also be read to modify a simulated component. The simulated computer environment is represented by executing one or more simulators to simulate actual software modules. A simulation is presented to a user. The simulation includes a scenario and a set of tasks to be completed. As the user interacts with the simulators, tasks completed by the user are recorded. Finally, the set of completed tasks are evaluated to determine a user's performance within the simulation. The system and method allows a simulation author to automatically define a set of possible tasks for a simulation by performing the desired tasks in the simulated computer environment. The system and method provides a robust evaluation process for simulations. Partial scores, weighted scores, partially weighted scores, and binary scores are provided, as well as rescoring of simulations and simulation-based exam question seeding.

Computers and information technology may be quite complex. From the software and middleware to the hardware and connections for communicating between machines, the technologies such as hardware, protocols, languages, software packages, and software standards involved is large and changes rapidly. Accordingly, companies, governments, associations and other organizations rely on proficient programmers, network administrators, database administrators, and other IT (Information Technology) professionals to keep their computer systems functioning properly and efficiently.
To become and remain employable, these IT professionals must be able to keep up and prove they can provide the services the employer seeks, often before being offered an IT employment position. Due to the high costs and high risks of using unskilled employees, employers are often unwilling to allow employees to learn the necessary skills on the job. In addition, universities and colleges do not teach all of the specific programming languages, hardware devices, or protocols used in the industry. Instead, using a select few, they focus on theory and principles common across the technologies.
Thus, to provide the credentials demanded by employers, the IT industry uses certification exams, particularly in the software industry. This effort is often led by vendors of the different technologies. The certification asserts that the vendor considers the certificate holder competent to use and maintain the IT technology being certified. Novell®, Microsoft® and others offer certification exams such as CNE (Certified NetWare Engineer), MCP (Microsoft Certified Professional), MCSE (Microsoft Certified Systems Engineer), and others.
However, conventional certification exams which use multiple choice and fill-in-the-blank questions are limited in their ability to measure behavioral skills. Some examinees may simply be good at memorizing rules and appropriate answers but lack the skills needed to perform "real world" tasks. Alternatively, the examinees may prepare for the exam by storing the answers in short term memory. Once the exam is over and the examinee has passed, the facts are quickly forgotten.
Essentially, the examinee lacks the kind of knowledge which is best obtained through the experience of applying the concepts and principles in real life situations or in a simulated environment. As competition has increased in the IT field, the certification exams have begun to focus greater proportions of their exams on testing an examinee's knowledge and skill in relation to an IT system rather than their ability to retain and recall technical information. This means the exams are setting objectives for the examinees which conventional test questions fail to adequately meet or measure.
For example, rather than require that an examinee know how to configure a network card. The certification exams are requiring that the examinee demonstrate an ability to configure the network card. This kind of objective is best assessed using a simulation or an actual IT environment.
The certification exams of today are designed to test an examinee's competence in using the particular technology, software, administration tool, or the like. These are the skills the employers want to know an applicant possesses. Crafting an exam question to test an examinee's ability to use the technology is very difficult without conducting a one-on-one assessment much like an actual driving test with a DMV official to receive a driver's license. Generally, due to the number of exams given and the number of examinees, one-on-one assessments are impractical.
To address these limitations, interactive exam questions have been developed which are directed toward an examinee's behavior. The examinee must do something to demonstrate that they could perform a specific task in an actual system, if required to do so. These interactive exam questions provide some realism when compared against standard exam questions. For example, one or more screen shots of a tool, configuration window, or other administrative context may be displayed to provide context for the question. The user may then be asked to identify which parameter is set incorrectly. The user may identify the parameter by dragging and dropping a correct parameter setting to an answer box.
Alternatively, an image of the software window or tool of interest may be displayed and the user may be asked to point to the configuration setting which should be changed to accomplish a desired result. These types of interactive exam questions are referred to as "point-and-shoot" questions because the examinee uses a mouse or other pointer to indicate the field or other user interface control which must be modified to properly answer the question.
Alternatively, a conventional simulation may be used. Conventional simulations include a multi-media presentation of images and user interface controls which allow very limited interaction between the user and the simulation. These simulations may provide an interface which allows an examinee to navigate through a simulated software product to the proper location to resolve a problem described in an exam question. However, these simulations only provide user interface functionality for the menus, windows, and controls necessary to navigate to the proper software window to answer the question and to no other parts of the environment. Because the other menus, controls, and windows do not function, an examinee can find the proper screen or problem context quickly by simply using trial and error, at which point answering the question or performing a task may be trivial. Simulations executed by such simulations are often referred to as "closed" or "dumb" simulations because of the limited functionality and navigation paths.
In contrast, an "open" or "intelligent" simulation is one which realistically simulates a computer environment within which a simulation scenario takes place. The open simulation includes logic, rules, and processing ability which allows changes made by a user in the simulation to have a corresponding effect in the simulation. In addition, the open simulation matches the behavior of the actual components of the computer environment so that a user may take multiple navigation paths. Providing multiple navigation paths and ways to perform a task allows a user to truly "trouble shoot" a problem as will be expected in the actual computer environment. The user is free to investigate the simulated computer environment to solve a problem in a manner similar to real life.
Unfortunately, conventional simulators which provide limited openness in the simulations have other limitations. Generally, the data defining a simulation and/or computer environment is tightly integrated with the executable code of the simulators. Therefore, development and revisions to simulations is very expensive because this must be done by programmers instead of less expensive test item writers. The programmers modify the actual simulators to produce different simulations.
In addition, developing truly "open" simulators which simulate each feature, function, and aspect of an actual system is very time consuming, expensive, and complex. To shorten the development cycle and hold down costs, only certain features and functions of the actual system are simulated. Consequently, conventional simulations which are available provide only limited "openness".
These conventional simulations are often developed using multi-media development tools such as Shockwave or Flash products from Macromedia, of San Francisco, Calif. Generally, these tools provide limited flexibility. Each Shockwave or Flash application is programmed for a specific simulation exam question. The conventional simulation created is proprietary, customized, and specific. The training required to use these multi-media development tools generally limits their use to computer programmers. Any subsequent modifications to a simulation is done by the programmer. Using a programmer to develop or modify a conventional simulation increases simulation production costs.
Furthermore, these conventional simulations generally do not provide functionality for recording an examinee's response and/or interactions with the program. Conventional simulations are designed for presenting information, not monitoring an examinee's responses. Determining whether the examinee correctly resolved a problem presented is often rudimentary or non-existent. Typically, conventional simulations are equipped to provide a binary type of a score. The simulation indicates whether or not the user completed the entire simulation correctly or not.
Since simulations in certification exams are still relatively new, the industry has focused efforts on improving the simulations, and the simulators which present them, instead of evaluation technology for the simulations. However, as simulations become more mainstream, the industry's focus will likely shift to the simulation evaluation process to assist in distinguishing among the most qualified users who have 'passed' the exam. A simple passing score may no longer be sufficient.
Accordingly, what is needed is a system and method that overcomes the problems and disadvantages of the prior art. The system and method should simulate a computer environment, such that a user is provided with a realistic experience in configuring systems, trouble shooting and resolving problems. The system and method should provide a simulated computer environment which allows an author of a simulation to automatically define a set of possible tasks for the simulation by performing the tasks in the simulated computer environment. The system and method should provide a robust evaluation process for simulations. The system and method should provide an evaluation process which allows for partial scores and/or weighted scores to be awarded for performance in a simulation, as well as conventional binary scores. The system and method should provide an evaluation process which allows for re-scoring and simulation exam question seeding to improve the quality of the simulations developed.

System and method for simulating a computer environment and evaluating a user's performance within a simulation


Two or more spatial filters are used in determining velocity based on speckle translation. A light source may be turned on, turned off, or both for a variable amount of time during operation. The velocity may then be determined with trend identification, correlation, recursive frequency estimation, or measurement bandwidth variation. A confidence level may also be calculated for the measured velocity, and the measured velocity reported or used only when the calculated confidence level meets or exceeds a given value.

Navigational devices have been used with computers and other types of computing systems for many years. A computer mouse is one example of a navigation device. With a mechanical computer mouse, a ball rolls over a mouse pad as the mouse is moved. Interior to the mouse are wheels that contact the ball and covert its rotation into electrical signals representing orthogonal components of motion.
Another type of computer mouse is an optical mouse. FIG. 1 is a diagrammatic illustration of a portion of an optical mouse according to the prior art. Mouse 100 includes light source 102 and motion sensor 104. Light source 102 is typically implemented a light-emitting diode, which emits light 106 towards surface 108. Motion detector 104 typically includes a camera that captures images of surface 108. Motion detector 104 also includes a digital signal processor that receives and analyzes a sequence of images. Motion detector 104 determines the speed and distance mouse 100 has moved across surface 108 based on differences in the captured images.
The type and texture of surface 108 can impact how effectively motion detector 104 determines the speed and distance of mouse 100. For example, a rough or patterned surface can make it easier for motion detector 104 to determine the velocity of mouse 100, because differences in the images are more easily discernable. Other types of surfaces, such as glass surfaces, can make it more difficult for motion detector 104 to determine the velocity of mouse 100. Because glass is a transparent material, it typically does not have a sufficient amount of detectable imperfections or patterns that may be used to determine the speed and distance of navigation device 100.

Methods and systems for measuring speckle translation with spatial filters

Avago Technologies General IP (Singapore) Pte. Ltd.


A device for transmitting TDD downlink data in an LTE system includes: a data buffer sequentially loading IP data irregularly delivered from a layer 3 processing unit; a transmission control unit providing instructions for the creation of an ordinary downlink sub-frame PDU queue and a special sub-frame PDU queue at a ratio appropriate to UL/DL configuration information and sequentially delivering the data loaded in the ordinary downlink sub-frame PDU queue and the special sub-frame PDU queue to a layer 1 processing unit in the order prescribed in UL/DL configuration and in the loaded order; and an ordinary downlink sub-frame PDU queue creating unit and a special sub-frame PDU queue creating unit which create the ordinary downlink sub-frame PDU queue and the special sub-frame PDU queue according to the instructions of the transmission control unit and load the data loaded in the data buffer.

As well known, the name long term evolution (LTE) is so-named in the meaning of technology which enhanced the third generation mobile communication in the long term; at the present time it is considered as one of the strong candidates including WiBro Evolution for the fourth generation mobile communication technology.
The LTE is based on the standard 'Release 8' finalized in December 2008 by the 3rd Generation Partnership Project (3GPP) which is a standards organization for 3rd generation mobile wireless communication; the channel bandwidths are from 1.25 to 20 MHz, the maximum transmission speed of a downlink is 100 Mbps for 20 MHz bandwidth, and the maximum transmission speed of an uplink is 50 MHz.
Wireless multiple access and duplexing methods are based on orthogonal frequency division multiplexing (OFDM), and high speed packet data transmission method is based on multiple-input and multiple-output (MIMO). LTE Advanced is an evolved version of an LTE, hereinafter all of these will be referred to as a '3GPP LTE.'
Meanwhile, two types of techniques are provided for separating an uplink from a downlink in an LTE system. The first one is frequency division duplexing (FDD) technique which separates an uplink from a downlink with frequency bands, The second one is time division duplexing (TDD) technique which separates an uplink from a downlink with a time domain.
FIG. 1 is a table defining the lengths of transmission intervals of an uplink and a downlink in a frame structure of a TDD based LTE system. The lengths of transmission intervals of the uplink and the down link in time domain for TDD based LTE system are determined by the signal called 'UL/DL configuration' as illustrated in FIG. 1, according to the values thereof the uplink and the down link are classified into total of 7 types. In FIG. 1, "D" represents a downlink sub-frame, "U" represents an uplink sub-frame, "S" represents a special sub-frame where both downlink data and uplink data are transmitted simultaneously; length of one frame is 10 ms and length of each sub-frame is 1 ms, so there are total 10 sub-frames in a frame. In FIG. 1, for example, in configuration 1, switching from downlink to uplink occurs with 5 ms period, thus in each frame there are 4 downlink sub-frames, 4 uplink sub-frames, and 2 special sub-frames respectively.
FIG. 2 is a typical block diagram of a signal analyzer for an LTE system. As illustrated in FIG. 2, a typical signal analyzer for an LTE system, that is LTE test equipment, is provided with a layer 3 processing unit 100, a layer 2 processing unit 200, and a layer 1 processing unit 300. The layer 3 processing unit 100 is responsible for the processing of Internet Protocal (IP).
Layer 2 processing unit 200 comprises: a packet data convergence protocol (PDCP) which performs IP header compression and decompression, user data transmission, and maintenance of sequence number for radio bearers, and the like; a radio link control (RLC) which is responsible for the processing of hybrid automatic repeat request (HARQ) related to transmission error control; and a media access control (MAC) processing unit which is a sub-layer of data transmission protocol and a part of the data link layer. Finally, layer 1 processing unit 300 is responsible for the processing of physical layer (PHY).
Meanwhile, in a signal analyzer for an LTE system of the prior art, a layer 3 processing unit 100 is usually implemented in a general purpose operating system such as Windows or Linux which is being processed by the CPU; a layer processing unit 200 is implemented with an exclusive firmware which is being processed by the digital signal processor (DSP); and a layer 1 processing unit 300 is implemented with a firmware processed by the DSP or the field programmable gate array (FPGA). However, while the layer 2 processing unit 200 and the layer 1 processing unit 300 can sufficiently handle an event for 1 ms which is corresponding to one sub-frame, the layer 3 processing unit 100 cannot handle an event for 1 ms since it is implemented in a non-real time OS such as Windows or Linux. For this reason, in the layer 2 processing unit 200, the IP data received from the layer 3 processing unit 100 is being buffered and processed every 1 ms for transmitting to the layer 1 processing unit 300. However, according to a TDD downlink data processing technique as described above, the transport block size of the downlink data in the special sub-frame is only maximum 75% of the transport block size of a regular downlink sub-frame, in other words, since there is a difference in the transport block size of the downlink data between the special sub-frame and the downlink sub-frame, data loss problem occurs when the buffered data is transmitted every 1 ms.
To solve this problem, a method is adopted in the prior art, wherein data is being transmitted without allocating downlink data to the special sub-frame (method A), or data is being transmitted after reducing the transport block size of all the downlink sub-frames to the transport block size of the special sub-frame (method B).
However, in case when the above described method A and method B are adopted, there is an efficiency degradation problem owing to lower throughput rate for each UL/DL configuration as shown in the right side of FIG. 1 when compared with a case where data is being transmitted with maximum transport block size of the downlink sub-frame and the special sub-frame

Device and method for transmitting TDD downlink data in an LTE system


A manufacturing method of a mask for deposition including forming a second layer on a side of a first layer, coating a photoresist layer on a side of the second layer, forming a plurality of photoresist patterns which penetrate the photoresist layer according to an exposing and developing process, forming a plurality of pattern grooves in the second layer by etching portions of the second layer, which are exposed through the plurality of photoresist patterns, forming an electro-forming mold by removing the photoresist layer from the second layer, disposing an electrode plate to contact the second layer of the electro-forming mold, performing an electro-forming process of growing a metal layer from the electrode plate in spaces in the corresponding pattern grooves of the second layer of the electro-forming mold, to form a deposition mask, and separating the deposition mask from the electrode plate.

Field
Exemplary embodiments relate to a method of manufacturing a mask for deposition.
Discussion of the Background
Generally, an organic light-emitting display apparatus is one kind of many flat display apparatuses in use today. The organic light-emitting display apparatus is an active light-emitting element that is thin and lightweight with low-voltage driving requirements, and produces wide viewing angles, excellent contrast, and fast response times. Accordingly, the organic light-emitting display apparatus is increasingly being recognized as a next-generation display element.
The active light-emitting element may be classified as either an inorganic light-emitting element or an organic light-emitting element according to a material of a light emission layer included therein. Because the organic light-emitting element has better luminance, response time, and color display characteristics than the inorganic light-emitting element, the development of the organic light-emitting element is actively being performed.
The organic light-emitting display apparatus includes an organic film and/or an organic electrode, which are formed by a vacuum evaporation deposition method. However, because the organic light-emitting display apparatus is currently being developed into a high resolution organic light-emitting display apparatus, a width of an open slit of a mask, which is used in the vacuum evaporation deposition method, becomes narrow, thereby decreasing the distribution of a deposition source in the vacuum evaporation deposition method.
In order to manufacture the high resolution organic light-emitting display apparatus, a shadow effect is reduced or removed. Accordingly, the deposition method is performed in a state that a substrate and a mask closely contact each other, and technologies are being developed to improve the close contact between the substrate and the mask.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concept, and, therefore, it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.

Method of manufacturing mask for deposition


Magnetic thin film structures including a laminate of a layer of nonmagnetic material sandwiched between first and second layers of magnetic material and at least one edge closure layer of magnetic material disposed on a side edge of the laminate with the edge closure layer being in magnetic contact with the first and second layers of magnetic material. The edge closure layer eliminates magnetic edge closure domains and magnetic edge-curling walls in the yoke and poletip regions, or in a fluxguide of a magnetic recording head to substantially eliminate Barkhausen noise and wall network instabilities. Multiple layer laminates are also disclosed having a plurality of nonmagnetic layers each of which are sandwiched between layers of magnetic material and wherein the laminate includes edge closure layers that contact all the magnetic layers. Several methods are disclosed for fabricating the laminate. In one class of technique, the side edges are deposited together with a top layer in a single plating operation. In an another embodiment, the side edge closure layers are separately plated. Another embodiment provides for a layer of antiferromagnetic material deposited between the nonmagnetic layer and one of the magnetic layers to provide additional anisotropy.

1. Field of the Invention
This invention relates to thin film structures for magnetic recording heads and more particularly, to laminated thin film structures and methods for forming such structures.
2. Description of the Prior Art
In conventional thin film inductive recording heads, the soft magnetic films (e.g., NiFe) are deposited using a process which causes the magnetic easy axis to be parallel to the plane of the recording medium. This usually results in triangular magnetic domains formed along left and right edges of the soft film which are called closure domains. The closure domains form in order to minimize the total magnetic energy associated with the film and its surrounding space. Such closure domains lower the total energy despite the fact that the magnetization is directed completely or partially in the hard magnetic axis direction.
When the head is driven by a current loop, or when the head is sensing a magnetic field from the recording medium, the net magnetic induction in the soft film of the head increases in the vertical direction by rotation of the magnetization vector in the central domains, along with alternate growth and shrinkage of closure domains. By convention, a recording head is regarded as lying in a vertical plane above a horizontal recording medium so that the vertical direction is axial to the pole tips and normal to the medium. The presence of the side closure domains causes wall motion to accompany magnetization rotation, thereby limiting permeability and head efficiency. In addition, noise can be created whenever defects interact with the walls or conversion of the domain structure to a new pattern occurs.
When the throat or poletip region of an inductive head, or the flux guide for a magnetoresistive head, is made narrow horizontally, to achieve a narrow recording trackwidth, the closure domains become more significant. In this case, when the head is driven by a current loop or senses an external field, magnetization in the vertical direction increases mainly by horizontal motion of the vertical wall in the center of the poletip. While the mobility of this wall may be sufficient to give adequate head efficiency, large displacements of such a wall may cause the wall to encounter a wall pinning defect, leaving the head domain configuration in a mestastable state. This can result in changes of reading efficiency during operation and wall-motion (Barkhausen) noise for narrow track heads or for perpendicular recording "probe" heads whose throat height to throat width ratio favors vertical wall formation.
To make a high efficiency, low noise, narrow track head, it is desirable to force the magnetization into the horizontal easy axis direction, and to eliminate the side closure domains. One prior art technique for partially accomplishing this is to laminate the soft magnetic films used for the yoke of the head. Instead of depositing one layer, a plurality of magnetic layers are deposited with each pair of magnetic layers being separated by a thin nonmagnetic spacer layer. Each magnetic sublayer may then have its magnetization lie in the easy axis direction, but neighboring layers have their magnetization directed horizontally antiparallel. Flux closure between the layers is through the spacer near the edges and via external fringe fields at the side edges.
Slonczewski, et al., "Micromagnetics of Laminated Permalloy Films", IEEE Trans. on Mag., Vol. 24, No. 3, p. 2045, May 1988, show that in laminated films of the proper dimensions, closure domains are replaced by edge-curling walls. The interior of the film has a magnetization aligned in the easy axis direction which is optimum for transmitting flux by magnetization rotation. However, Herman, et al., "Study of Field-Driven Wall-Configuration Conversions for Laminated Permalloy in the Easy-Axis State", J. Appl. Physics, Vol. 63, No. 8, p. 4036, April 1988, and "Edge-Curling-Wall Discontinuities and Interactions with Bloch Walls in Easy-Axis Permalloy", IEEE Trans. on Mag., Vol. 24, No. 6, p. 3066, November 1988, showed that though a single domain (no wall) state can occur in a laminated film recording head yoke, the most stable state is found to have a single wall in each magnetic layer. This wall can be a source of instability and noise. In addition, the edge-curling walls reduce the active cross-section of the film and can also be a source of noise. Reducing the width of the edge-curling walls demands multiple thin laminations with very thin nonmagnetic spacers which require additional, carefully controlled fabrication steps. Moreover, in addition to extra expense, multiple thin laminations are potentially subject to problems such as spacer pinholes and higher coercivity. C. Tsang, et al., "Magnetics of Nonlaminated, Bilaminated, and Multilaminated Permalloy Stripes", J. Appl. Physics, Vol. 63, No. 8, p. 2938, April 1988 have shown that magneto-resistance measurements of narrow, multiple laminated films show noise and instabilities due to additional complex domain states. Thus, while a simple lamination is adequate to eliminate most noisy domain walls from a wide, about 100 um, yoke of the head, it is very difficult to fabricate narrow, less than 10 um, poletip regions of flux guides with the necessary multiple thin laminations.
In another approach, disclosed in U.S. Pat. No. 4,103,315, the domain walls are minimized by a multiple thin film structure including at least one pair of layers of a ferromagnetic material and an antiferromagnetic material deposited one upon one another, that are exchange coupled to retain a unidirectional bias in the plane of the ferromagnetic material. If multiple pairs of layers are used, a layer of nonmagnetic material is provided to separate the pairs. The successive pairs of layers have their unidirectional bias pointing in opposite directions. However, if the bias is strong, rotational permeability and head efficiency are reduced. If the bias is weak, domain walls are not completely eliminated and the films exhibit Barkhausen noise.

Method of fabricating magnetic thin film structures with edge closure layers

International Business Machines Corporation


A router apparatus connecting a first network and a second network including a storage unit which stores association information associating an address of one of a plurality of second router apparatuses with an address of a corresponding one of a plurality of server apparatuses with an identical address, each of the plurality of second router apparatus connecting the first network to each of a plurality of third networks to which the respective plurality of server apparatuses is connected, a receiving unit which receives a packet transmitted from a terminal apparatus and transferred via the second network, an encapsulating unit which encapsulates the packet received into a packet with a destination address corresponding to the address of the second router apparatus associated with an address of the packet based on the association information, and a transmitting unit which transmits the packet encapsulated by the encapsulating unit to the first network.

An example of a technique related to a wide-area load balancing technique for allocating packets among a plurality of server apparatuses is a wide-area load balancing scheme using a DNS (Domain Name System) specified in IETF (The Internet Engineering Task Force) RFC (Request for Comments) 1034. According to this wide-area load balancing scheme, different IP (Internet Protocol) addresses are assigned to a plurality of servers with the same host name. A terminal accessing the servers has a DNS cache in which the host name is associated with the IP address of one of the servers. When an application operating on the terminal accesses the servers, the host name is specified as a destination, and the terminal is allocated to one of the servers in accordance with the DNS cache.
Another example of a technique related to the wide-area load balancing technique is a wide-area load balancing scheme using NAT (Network Address Translation) specified in IETF RFC 1631. According to this wide-area load balancing scheme, different IP addresses are assigned to servers providing the same service. The IP addresses are referred to as the "actual IP addresses" of the servers. For these servers, a single IP address is visible to the terminal. This IP address is assigned to a NAT apparatus. The IP address visible to the terminal is referred to as a "virtual IP address". The NAT apparatus has a NAT table in which the virtual IP address is associated with a plurality of actual IP addresses. When receiving packets destined for the virtual IP address from a terminal, the NAT apparatus refers to the NAT table to select, for example, a server with the lowest load, and translates the destination address of the packets into the actual IP address of this server.
There is known a related technique in which a plurality of servers is connected to different VLANs, and the load condition of each of the servers is detected. The VID of packets from an information terminal is converted depending on the load condition of each server or the like to switch a server to be connected to the information terminal.
There is known another related technique in which, when a client transmits a request for access to information to a GW, the GW manipulates a DA/SA field in an IP header of an IP packet for encapsulation. The GW thus transfers the request for access to information to a server selected from a group of servers.
Related art is disclosed in Japanese National Publication of International Patent Applications No. 2003-234752 and 10-84385. Related art is also disclosed in IETF RFC 1034 (1987) and IETF RFC 1631 (1994).

Router apparatus, communication system and packet transfer method


A method, apparatus, and program for translating source code programs from COBOL into an object-oriented language and then utilize an “object” that emulates the COBOL's Working-Storage Section. By emulating the Working-Storage Section in an object-oriented program, the object-oriented program source code can closely resemble the original COBOL source code as well as have a very clean syntax. This allows it to be kept in a highly maintainable and readable form after translation.

COBOL is believed to be still one of the most widely used programming languages. It is a high-level programming language designed for business data processing. When COBOL was developed, one of the design goals was to make it as English-like as possible. As a result, COBOL uses structural concepts normally associated with English prose such as section, paragraph and sentence. However, as computer programs have become more complex, today's programming languages have become "object-oriented" to reduce the complexity of the programming process. For example, C++, an object-oriented extension of the C language, has achieved widespread acceptance today.
There is a need to gain the advantages of object-oriented programming that modern software provides yet still not lose the benefits of the large base of legacy COBOL code that has already been written. One method to accomplish this is a source code language translator. However, due to the inherent differences in the data structures of COBOL and object-oriented languages such as C++, the code that is generated by current source code translators is disorganized, hard to read, and difficult to maintain. A number of patents and published applications exist which relate to source code translators, including, U.S. Pat. Nos. 6,002,874, 6,269,474, 6,453,464, 6,467,079, 6,523,171, and 6,526,569; all of which are incorporated herein by reference in their entirety to the extent they are not inconsistent with the explicit teachings of this specification.
COBOL's unique English-like structure can be seen in its organized divisions. Specifically, a typical COBOL program consists of four divisions: Identification Division, Environment Division, Data Division, and Procedure Division. The Identification Division is used mostly for documentation. It contains paragraphs specifying the program name and optionally author, date and other information. The Environment division contains information linking the logical file and device names used in the program with their physical counterparts. The Data Division contains the definitions, data-names for all file, record, group and single data items, and (optionally) initial values for them. All data-names referenced in the program must be defined in this division. All control and logical instructions for the program are contained in the Procedure Division. It normally consists of a series of paragraphs/procedures, each of which performs a logical function. The two divisions we are mainly concerned with here are: (1) the Data Division for data and (2) the Procedure Division for instructions that operate on the data. In object-oriented programs, however, structures which include data and the code operating on that data are combined into "objects". Manipulations of the internal data of the object are carried out by executing member functions of the object.
Specifically, the Procedure Division in a COBOL program contains the statements (instructions) that convert input data into output. Statements are either action statements (those that perform a specific processing action) or control statements (those that determine the sequence in which statements are executed). Statements are organized into named paragraphs/procedures, each of which is designed to perform a specific task. In a COBOL program, execution begins with the first statements in the first paragraph of the Procedure Division. The first paragraph is generally referred to as the "main module". The main module provides the top-level logic flow-of-control for the program as a whole. Program execution should both begin and end in the main module. Other paragraphs are invoked as needed, and may themselves invoke other paragraphs, in a hierarchical fashion.
The Data Division is an important division in a COBOL program. The Data Division defines all input and output data structures, as well as those used internally for data manipulation and program control. There are two sections of the Data Division common to most COBOL programs: the File Section that defines file I/O (input/output) buffer areas and the Working-Storage Section where internal data structures are defined. There is optionally a third section called the Linkage Section which is the same as the Working-Storage Section but specifies the data structures which may be used to pass data from one COBOL program to another.
COBOL data items are references to memory locations that can hold a value that may change during program execution. Every data item must be assigned a name, type, and length in the Data Division. The Working-Storage section is used to define data-names not associated with an input/output buffer area (a file description). These data-names are commonly those required for temporary data storage, calculations and switches for program control. Both group and single items can be defined, each with an associated type and length. In addition, an initial value can optionally be assigned to each single item with a COBOL 'VALUE' clause.
One difficulty of source code translation of COBOL programs arises with respect to references to variables. COBOL provides a consistent way of referencing variables regardless if it's a group variable or single variable. COBOL can access variables with a single data-name, while most modern languages will use a single data-name (or variable name) to access a single variable but will have to use multiple data-names to access a single variable if it exists inside of a group variable (or data structure). Each level of grouping requires another data-name to be specified when accessing the single internal variable. Many source code translators translate variables from COBOL to C on a 'one-for-one' basis and therefore have to compensate for the syntax differences thus losing COBOL's simplicity.
For example, in one-to-one translation, COBOL data structures become C language 'struct's and COBOL 'REDEFINES' become C language 'union's. In addition, when a COBOL data structure of strings is translated into a C language 'struct' data structure, C functions like 'memcpy( )' and 'memset( )' are called upon to access the data because normal strings in C are null-terminated and in COBOL they are not. The resulting code is so different from the original that the ability to read and understand the intention of the initial COBOL programming becomes unduly difficult and may be lost.
In addition, many of the existing 'COBOL to C++' Translators are really 'COBOL to C' Translators. While the output produced can be compiled with a C++ compiler they do not utilize any of the extensions provided by C++. These translators are not really producing C++ code, but are producing C code.
It is a well-known feature of object-oriented languages that classes can be used to create new data types. While some source code translators create or use object classes that emulate individual variable types, they do not use an object class that emulates the entire COBOL's Working-Storage Section and therefore produces code that is much more difficult to read and understand than the original code.
Accordingly, there is a need in the art to create a method for translating COBOL source code to source code of an object-oriented language such as C++ that will result in code with the advantages of being object-oriented and still maintain the readability, structure, and functionality of the original COBOL program.
The present invention is designed to address these needs.

Method, apparatus, and program for source code translation from COBOL to object-oriented code


A visor or cap with an elastic ponytail pull-through. A pair of parallel elastic bands are utilized which exert pressure to hold the visor on the user's head. The bands are simply separated when used as a ponytail pull-through to encircle and grasp the ponytail while also simultaneously holding the visor on the user's head.

The present invention relates generally to headgear. More particularly, the invention pertains to a visor or cap provided with an elastic ponytail pull-through support.
The prior art includes various headgear apparel which accommodate a ponytail. For example, the Leopold U.S. Pat. No. 5,170,509 dated Dec. 15, 1992 teaches a cap with an opening formed in its back portion, allowing a ponytail to extend therethrough. A separate hairband 14 is provided to surround the user's ponytail. The primary disadvantage of Leopold is its rather cumbersome two-part design. The hair band 14 does not assist in holding the cap onto the head of the user. A separate mechanism, such as elastic band 20, must be provided to hold the cap onto the user's head. Secondly, the hairband 14 requires a separate attachment to the back of the cap, shown as 31 in FIG. 3. This results in a somewhat cumbersome mechanism for the user, in that the ponytail must be pulled through the hat opening and the hairband. Additionally, the Leopold design is relatively expensive to manufacture in that the hairband 14 is made as a separate device and is attached to the hat after the hat and hairband are manufactured. Finally, the hairband could easily become separated from the cap and lost after repeated use.
The Landis U.S. Pat. No. 5,615,414 dated Apr. 1, 1997 teaches a plastic, two-piece visor having a hair pull-through. The Landis mechanism includes two pieces, one of which could easily become lost. The specific molded plastic taught by Landis is also relatively expensive and would not "breath," allowing perspiration to build up between the user's skin and the visor.
The Armenta et al U.S. Pat. No. 5,644,799 dated Jul. 8, 1997 teaches an accessory "patch" which the user attaches to a hat. The user cuts a hole in the rear portion of the hat and stitches the patented accessory in place. The accessory has a plurality of radial slots allowing the hair to pass therethrough. This design provides no resilient material extending around the user's hair. The design would not work with a visor.
According to the present invention, a visor or cap is provided with a relatively simple ponytail pull-through made of a pair of parallel elastic bands. The elastic bands with the visor or cap of the present invention form a single, simple, yet attractive, headgear apparel. The elastic bands which form the ponytail pull-through provide two functions simultaneously. First, the elastic bands always apply a gentle tensile force keeping the headgear on the user's head. Secondly, when the elastic bands are separated and the ponytail pulled therethrough, the elastic bands encircle and grasp the ponytail and hold the ponytail in place. In contrast to the prior art, the present invention is relatively simple in design, since it is essentially a one-piece design as opposed to the Leopold two-piece design. The present invention is preferably made of absorbent fabric material, in contrast to the plastic material of the Landis visor. Furthermore, the present invention grasps the ponytail and holds the hair securely in position rather than allowing the ponytail to separate, as is the case with the Armenta et al prior art.
A primary object of the invention is to provide a cap or visor with a simple one-piece design and having a ponytail pull-through.
A further object of the invention is to provide a cap or visor having a ponytail pull-through which performs both the function of holding the cap or visor onto the user's head arid also performing the function of encircling and grasping the ponytail when a ponytail is extended therethrough.
Another object of the invention is to provide a visor having a ponytail pull-through wherein those portions of the visor that contact the user's head are made of absorbent cloth.


Apparatus and methods are provided for switching between a wireless local area network (LAN) and a cellular network for a user equipment's (UE) data communication by passively sensing the load on the wireless LAN. A method is disclosed that includes detecting an access point associated with a wireless LAN and receiving packets that are transmitted by other devices that are using the wireless LAN. The method can further include examining the received packets to estimate a data load of the wireless LAN and selecting between the wireless LAN and a cellular network based on the estimated data load.

Field
The present disclosure relates generally to methods and systems for switching between a wireless local area network (LAN) and a cellular network for a user equipment's (UE) data communication by passively sensing the load on the wireless LAN.
Background Art
Data communications of UEs are increasingly on rise. Video streaming, web browsing, text and multimedia messaging, etc. are examples of UE's data communications that are congesting the cellular air interface and its backhaul. Long Term Evolution (LTE) (which is based on Global System for Mobile communication (GSM)/GSM Evolution (EDGE) and Universal Mobile Telecommunications System (UMTS)/High Speed Packet Access (HSPA) network technologies) is a wireless communications standard that supports high-speed data for a UE. LTE has increased data capacity. However, cellular network operators are encouraging users of UEs to switch (offload) their bandwidth intensive applications to wireless LANs, such as WiFi networks, which can have a direct connection to a core backbone network such as a Public Data Network (PDN).
Cellular networks are evolving to Heterogeneous networks. A Heterogeneous network can include a macrocell (a cell in a cellular network that provides coverage using a cellular base station), a picocell (a small cellular base station covering a small area), a Femttocell (a small, low-power cellular base station, usually used in a home or small business), WiFi hotspots, relays, etc. Heterogeneous networks (HetNet), which connect different access technologies, can improve capacity and/or coverage. Many UEs automatically switch their data communications from a cellular network to a wireless LAN when they detect the wireless LAN. Although wireless LANs, such as WiFi networks, typically provide higher throughput than cellular networks, such as 3G (the 3rd Generation), however, user experience after switching to the wireless LAN can be unpredictable. A user's experience in the wireless LAN is a function of the "user load" on the network. The wireless LAN is a shared medium with limited effective resources per user. Therefore, UE can experience a better data communication on the cellular network, if the wireless LAN that UE has found is serving too many users, or pre-existing users with substantial bandwidth requirements. Conventionally, the switch between the cellular network and the wireless LAN occurs based on signal strength. Also, the user of the UE can manually disable or enable the wireless LAN option on the UE for a more predictable experience and battery life.
The present disclosure will now be described with reference to the accompanying drawings. In the drawings, generally, like reference numbers indicate identical or functionally similar elements. Additionally, generally, the left-most digit(s) of a reference number identifies the drawing in which the reference number first appears.

Mobile device with cellular-WLAN offload using passive load sensing of WLAN


Linkage assemblies for moving tabs on control surfaces of aircraft are disclosed herein. An example aircraft includes a wing including a fixed wing portion and a trailing edge control surface. The trailing edge control surface includes a fore panel rotatably coupled to the fixed wing portion and an aft panel rotatably coupled to the fore panel. The wing also includes a linkage assembly including a rocking lever rotatably coupled to a bottom side of the fore panel, a trailing edge link having a first end rotatably coupled to the fixed wing portion and a second end rotatably coupled to the rocking lever, and an aft panel link having a first end rotatably coupled to the rocking lever and a second end rotatably coupled to a bottom side of the aft panel.

Aircraft commonly employ movable control surfaces along the leading and trailing edges of the wings. The control surfaces can be moved (e.g., in response to pilot command) relative to the fixed sections of the wings to control the lift and attitude of the aircraft. One type of movable control surface is an aileron. An aileron can be moved related to the fixed section of the wing to cause the aircraft to rotate about its longitudinal axis, referred to as roll.


Disclosed are a network traffic classification method and system based on an improved K-means algorithm. The method comprises: judging whether a total number NIC of network traffic data points in an initial clustering center set reaches an expected number k of network traffic clusters, if the k is not reached, calculating candidate metric values of network traffic data points in a high-density network traffic data point set, selecting a network traffic data point having the maximum candidate metric value, adding same into an initial clustering center set, removing the network traffic data point from the high-density network traffic data point set, then repeating the step until the total number NIC of network traffic data points in the initial clustering center set reaches the k, and ending the step. The method and system can ensure high network traffic classification accuracy.

Network traffic classification technology is one of the basic means to analyze network traffic characteristics and enhance network controllability. Early network traffic classification methods are mainly based on ports, but as the complexity of data in the network increases, many protocols no longer follow such rules, and a lot of p2p software has the characteristics of randomness and concurrency in the use of ports, and most of such software uses multiple ports at the same time. In addition, some applications will deliberately disguise ports, for example, using DNS tunnels can bypass ACLs or traffic auditing, so the port-based network traffic classification is no longer reliable.
There is also a network traffic classification method based on packet characteristic identification, some of which only correspond to one application, so that the packets can be distinguished by identifying the characteristic identification. This method is simple and has high accuracy. However, once the protocol is changed, this method has to readjust the characteristic identification, so that the response to the protocol change is not rapid enough. In addition, the recognition of the characteristic identification depends on human labor to a great extent, which will cost a lot of manpower and time.

Network traffic classification method and system based on improved K-means algorithm

NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATINS


An apparatus having processing circuitry configured to receive a selection of a predetermined activity, receive baseline data, and continuously perform tracking of user progress with respect to the predetermined activity as a function of the baseline data. The processing circuitry generates tracking data based on the tracking, continuously generates progress change data as a function of the tracking data, and outputs the progress change data to an external device. The progress change data is processed by the external device to output the progress change data to a display screen as a Graphical User Interface (GUI), a color scheme of the GUI being continuously updated as a function of being redisplayed based on the continuously generated progress change data.

Activity or fitness tracking systems can be used to measure information over time such as distance moved, calorie consumption, heart rate and quality of sleep. This data is then aggregated and can be presented to the user via an alert or when the user logs into the system to view a report. The data can present a historical backdrop of the user's exercise activity and whether or not he or she met certain exercise goals.
Activity or fitness tracking systems can also be used to collect data during a specific activity of the user. For example, the user can use a fitness tracking system while running to monitor pace as it compares to a specific goal. In this instance, the fitness tracking system will display numerical offset data highlighting the difference in time between the current movement data of the user and the specific goal.


A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

The present invention relates to processes for forming backplanes for electro-optic (electronic) displays. This invention also relates to certain improvements in non-linear devices for use in such backplanes and to processes for forming such non-linear devices.
The term "electro-optic" as applied to a material or a display, is used herein in its conventional meaning in the imaging art to refer to a material having first and second display states differing in at least one optical property, the material being changed from its first to its second display state by application of an electric field to the material. Although the optical property is typically color perceptible to the human eye, it may be another optical property, such as optical transmission, reflectance, luminescence or, in the case of displays intended for machine reading, pseudo-color in the sense of a change in reflectance of electromagnetic wavelengths outside the visible range.
The terms "bistable" and "bistability" are used herein in their conventional meaning in the art to refer to displays comprising display elements having first and second display states differing in at least one optical property, and such that after any given element has been driven, by means of an addressing pulse of finite duration, to assume either its first or second display state, after the addressing pulse has terminated, that state will persist for at least several times, for example at least four times, the minimum duration of the addressing pulse required to change the state of the display element. It is shown in published U.S. Patent Application No. 2002/0180687 that some particle-based electrophoretic displays capable of gray scale are stable not only in their extreme black and white states but also in their intermediate gray states, and the same is true of some other types of electro-optic displays. This type of display is properly called "multi-stable" rather than bistable, although for convenience the term "bistable" may be used herein to cover both bistable and multi-stable displays.
Several types of electro-optic displays are known. One type of electro-optic display is a rotating bichromal member type as described, for example, in U.S. Pat. Nos. 5,808,783; 5,777,782; 5,760,761; 6,054,071 6,055,091; 6,097,531; 6,128,124; 6,137,467; and 6,147,791 (although this type of display is often referred to as a "rotating bichromal ball" display, the term "rotating bichromal member" is preferred as more accurate since in some of the patents mentioned above the rotating members are not spherical). Such a display uses a large number of small bodies (typically spherical or cylindrical) which have two or more sections with differing optical characteristics, and an internal dipole. These bodies are suspended within liquid-filled vacuoles within a matrix, the vacuoles being filled with liquid so that the bodies are free to rotate. The appearance of the display is changed to applying an electric field thereto, thus rotating the bodies to various positions and varying which of the sections of the bodies is seen through a viewing surface. This type of electro-optic medium is typically bistable.
Another type of electro-optic display uses an electrochromic medium, for example an electrochromic medium in the form of a nanochromic film comprising an electrode formed at least in part from a semi-conducting metal oxide and a plurality of dye molecules capable of reversible color change attached to the electrode; see, for example O'Regan, B., et al., Nature 1991, 353, 737; and Wood, D., Information Display, 18(3), 24 (March 2002). See also Bach, U., et al., Adv. Mater., 2002, 14(11), 845. Nanochromic films of this type are also described, for example, in U.S. Pat. No. 6,301,038, International Application Publication No. WO 01/27690, and in copending application Ser. No. 10/249,128, filed Mar. 18, 2003 (now U.S. Pat. No. 6,950,220. This type of medium is also typically bistable.
Another type of electro-optic display, which has been the subject of intense research and development for a number of years, is the particle-based electrophoretic display, in which a plurality of charged particles move through a suspending fluid under the influence of an electric field. Electrophoretic displays can have attributes of good brightness and contrast, wide viewing angles, state bistability, and low power consumption when compared with liquid crystal displays. Nevertheless, problems with the long-term image quality of these displays have prevented their widespread usage. For example, particles that make up electrophoretic displays tend to settle, resulting in inadequate service-life for these displays.
Numerous patents and applications assigned to or in the names of the Massachusetts Institute of Technology (MIT) and E Ink Corporation have recently been published describing encapsulated electrophoretic media. Such encapsulated media comprise numerous small capsules, each of which itself comprises an internal phase containing electrophoretically-mobile particles suspended in a liquid suspension medium, and a capsule wall surrounding the internal phase. Typically, the capsules are themselves held within a polymeric binder to form a coherent layer positioned between two electrodes. Encapsulated media of this type are described, for example, in U.S. Pat. Nos. 5,930,026; 5,961,804; 6,017,584; 6,067,185; 6,118,426; 6,120,588; 6,120,839; 6,124,851; 6,130,773; 6,130,774; 6,172,798; 6,177,921; 6,232,950; 6,249,271; 6,252,564; 6,262,706; 6,262,833; 6,300,932; 6,312,304; 6,312,971; 6,323,989; 6,327,072; 6,376,828; 6,377,387; 6,392,785; 6,392,786; 6,413,790; 6,422,687; 6,445,374; 6,445,489; 6,459,418; 6,473,072; 6,480,182; 6,498,114; 6,504,524; 6,506,438; 6,512,354; 6,515,649; 6,518,949; 6,521,489; 6,531,997; 6,535,197; 6,538,801; and 6,545,291; and U.S. Patent Applications Publication Nos. 2002/0019081; 2002/0021270; 2002/0053900; 2002/0060321; 2002/0063661; 2002/0063677; 2002/0090980; 2002/0106847; 2002/0113770; 2002/0130832; 2002/0131147; 2002/0145792; 2002/0154382, 2002/0171910; 2002/0180687; 2002/0180688; 2002/0185378; 2003/0011560; 2003/0011867; 2003/0011868; 2003/0020844; 2003/0025855; 2003/0034949; 2003/0038755; and 2003/0053189; and International Applications Publication Nos. WO 99/67678; WO 00/05704; WO 00/20922; WO 00/26761; WO 00/38000; WO 00/38001; WO 00/36560; WO 00/67110; WO 00/67327; WO 01/07961; and WO 01/08241.
Many of the aforementioned patents and applications recognize that the walls surrounding the discrete microcapsules in an encapsulated electrophoretic medium could be replaced by a continuous phase, thus producing a so-called polymer-dispersed electrophoretic display in which the electrophoretic medium comprises a plurality of discrete droplets of an electrophoretic fluid and a continuous phase-of a polymeric material, and that the discrete droplets of electrophoretic fluid within such a polymer-dispersed electrophoretic display may be regarded as capsules or microcapsules even though no discrete capsule membrane is associated with each individual droplet; see for example, the aforementioned 2002/0131147. Accordingly, for purposes of the present application, such polymer-dispersed electrophoretic media are regarded as sub-species of encapsulated electrophoretic media.
An encapsulated electrophoretic display typically does not suffer from the clustering and settling failure mode of traditional electrophoretic devices and provides further advantages, such as the ability to print or coat the display on a wide variety of flexible and rigid substrates. (Use of the word "printing" is intended to include all forms of printing and coating, including, but without limitation: pre-metered coatings such as patch die coating, slot or extrusion coating, slide or cascade coating, curtain coating; roll coating such as knife over roll coating, forward and reverse roll coating; gravure coating; dip coating; spray coating; meniscus coating; spin coating; brush coating; air knife coating; silk screen printing processes; electrostatic printing processes; thermal printing processes; ink jet printing processes; and other similar techniques.) Thus, the resulting display can be flexible. Further, because the display medium can be printed (using a variety of methods), the display itself can be made inexpensively.
A related type of electrophoretic display is a so-called "microcell electrophoretic display". In a microcell electrophoretic display, the charged particles and the suspending fluid are not encapsulated within microcapsules but instead are retained within a plurality of cavities formed within a carrier medium, typically a polymeric film. See, for example, International Applications Publication No. WO 02/01281, and published U.S. Application No. 2002-0075556, both assigned to Sipix Imaging, Inc.
The aforementioned types of electro-optic displays are bistable and are typically used in a reflective mode, although as described in certain of the aforementioned patents and applications, such displays may be operated in a "shutter mode" in which the electro-optic medium is used to modulate the transmission of light, so that the display operates in a transmissive mode. Liquid crystals, including polymer-dispersed liquid crystals, are, of course, also electro-optic media, but are typically not bistable and operate in a transmissive mode. The backplanes of the present invention may be used with both reflective and transmissive displays, including conventional liquid crystal displays.
Whether a display is reflective or transmissive, and whether or not the electro-optic medium used is bistable, to obtain a high-resolution display, individual pixels of a display must be addressable without interference from adjacent pixels. One way to achieve this objective is to provide an array of non-linear elements, such as transistors or diodes, with at least one non-linear element is associated with each pixel, to produce an "active matrix" display. An addressing or pixel electrode, which addresses one pixel, is connected to an appropriate voltage source through the associated non-linear element. Typically, when the non-linear element is a transistor, the pixel electrode is connected to the drain of the transistor, and this arrangement will be assumed in the following description, although it is essentially arbitrary and the pixel electrode could be connected to the source of the transistor. Conventionally, in high resolution arrays, the pixels are arranged in a two-dimensional array of rows and columns, such that any specific pixel is uniquely defined by the intersection of one specified row and one specified column. The sources of all the transistors in each column are connected to a single column electrode, while the gates of all the transistors in each row are connected to a single row electrode; again the assignment of sources to rows and gates to columns is conventional but essentially arbitrary, and could be reversed if desired. The row electrodes are connected to a row driver, which essentially ensures that at any given moment only one row is selected, i.e., that there is applied to the selected row electrode a voltage such as to ensure that all the transistors in the selected row are conductive, while there is applied to all other rows a voltage such as to ensure that all the transistors in these non-selected rows remain non-conductive. The column electrodes are connected to column drivers, which place upon the various column electrodes voltages selected to drive the pixels in the selected row to their desired optical states. (The aforementioned voltages are relative to a common front electrode which is conventionally provided on the opposed side of the electro-optic medium from the non-linear array and extends across the whole display.) After a pre-selected interval known as the "line address time" the selected row is deselected, the next row is selected, and the voltages on the column drivers are changed to that the next line of the display is written. This process is repeated so that the entire display is written in a row-by-row manner. Thus, in a display with N rows, any given pixel can only be addressed for a fraction 1/N of the time.
Processes for manufacturing active matrix displays are well established. Thin-film transistors, for example, can be fabricated using various deposition and photolithography techniques. A transistor includes a gate electrode, an insulating dielectric layer, a semiconductor layer and source and drain electrodes. Application of a voltage to the gate electrode provides an electric field across the dielectric layer, which dramatically increases the source-to-drain conductivity of the semiconductor layer. This change permits electrical conduction between the source and the drain electrodes. Typically, the gate electrode, the source electrode, and the drain electrode are patterned. In general, the semiconductor layer is also patterned in order to minimize stray conduction (i.e., cross-talk) between neighboring circuit elements.
Liquid crystal displays commonly employ amorphous silicon ("a-Si"), thin-film transistors ("TFT's") as switching devices for display pixels. Such TFT's typically have a bottom-gate configuration. Within one pixel, a thin-film capacitor typically holds a charge transferred by the switching TFT. Electrophoretic displays can use similar TFT's with capacitors, although the function of the capacitors differs somewhat from those in liquid crystal displays; see the aforementioned copending application Ser. No. 09/565,413, and Publications 2002/0106847 and 2002/0060321. Thin-film transistors can be fabricated to provide high performance. Fabrication processes, however, can result in significant cost.
In TFT addressing arrays, pixel electrodes are charged via the TFT's during a line address time. During the line address time, a TFT is switched to a conducting state by changing an applied gate voltage. For example, for an n-type TFT, a gate voltage is switched to a "high" state to switch the TFT into a conducting state.
Many electro-optic materials require application of a drive voltage for a significant switching time (typically of the order of 10−2 to 10−1 seconds) to effect a transition between their two extreme optical states. For high resolution displays containing at least (say) 100 rows and columns, if a reasonable scan rate is to be maintained, the period for which an individual pixel is addressed during a single scan is much less than the switching time of the electro-optic medium, and accordingly much of the switching of a pixel is effected by the voltage which remains on the pixel electrode between successive times of addressing the pixel (i.e., while other rows of the display are being addressed). This remaining voltage gradually decays due to current passing through the electro-optic material of the pixel and any current leakage through the non-linear element. The rate at which this decay occurs can be reduced (and the average voltage applied to the pixel during one complete scan of the display thus increased—this is commonly referred to as "increasing the voltage holding capacity" of the pixel) by connecting the pixel electrode to a capacitor.
At least some of the aforementioned electro-optic media can be made sufficiently flexible to permit their use in flexible displays based upon flexible substrates such as metal or polymeric films. However, manufacturing flexible microelectronic backplanes for such displays presents many challenges. Flexible substrates such as the polyimide-over-steel substrates described in the aforementioned 2002/0019081 will likely require specialized tooling for substrate handling. This is problematic for two reasons. Firstly, the required tooling does not exist. Secondly, a substantial investment by an existing display manufacturer will be required. This investment includes taking an existing glass-fab off-line, retrofitting the equipment, bringing the fab back on-line, and climbing the yield curve again. After retrofitting a fab for flexible substrates, it may not be possible to simultaneously process glass substrates due to the differences in the fixtures required. Thick steel substrates may not require as much specialized tooling for handling; however, display manufacturers may still be hesitant to process steel substrates due to contamination concerns and other issues. In any case, display manufacturers may be unwilling to make the required investment during the early stages of flexible display development.
In one aspect, the present invention allows a flexible display to be manufactured in an existing glass fab with virtually no changes to the facility. The fab could stay on-line and would be able to simultaneously produce flexible and glass backplanes. The invention provides a process in which a microelectronic display is fabricated on a rigid carrier and then released to produce a flexible display.
In another aspect, this invention seeks to reduce one major factor in the cost of preparing active matrix backplanes for electro-optic displays, namely the patterning steps; the present invention seeks to reduce the number of patterning steps needed.
In another aspect, this invention seeks to reduce the cost of diode backplane by replacing photolithography steps with printing.
Finally, this invention relates to improvements in drivers for electro-optic displays using an impulse sensitive electro-optic medium.

Processes for forming backplanes for electro-optic displays