A method for generating a patterned SOI photomask used for embedded DRAMs is described. The method systematically identifies embedded DRAM areas to be excluded from the SOI process and generates the shapes to be printed on the photomask so that the embedded DRAM may be fabricated on bulk silicon. The method includes the steps of: identifying and sorting DRAM array well shapes by common electrical net, resulting in a single array well shape for each electrical net (i.e., embedded DRAM cell). Next, all the n-band contacts touching a given array well shape are collected. These shapes are merged by common electrical net. A shape is then generated which is the smallest enclosing rectangle of the common electrical net of the n-band contact shapes. This represents the patterned SOI shape and defines the bulk areas onto which the embedded DRAM is to be built. Accordingly, the embedded DRAM macro is constructed in bulk areas while the logic is constructed in SOI.

This invention is related to generating a lithographic photomask and, more particularly, to an algorithm for integrating embedded DRAMs with silicon-on-insulator technology by patterning the semiconductor wafer into bulk areas for embedded DRAM processing and silicon-on-insulator areas for logic circuit processing.
As microprocessor designs approach the 0.18 xcexcm node and beyond, the two primary concerns that often arise are: the power consumption of the processor and the amount of on-chip memory (more commonly referred to as cache) that is required. Power consumption and the ensuing heat dissipation of the processor are a key area of interest, specially with regard to battery operated computing devices. A powerful way of reducing power consumption is to use silicon-on-insulator (SOI) wafers as substrates. As SOI wafers incorporate a buried oxide BOX) layer that is positioned underneath the active silicon region, the MOSFET junction capacitance (e.g., of source/drain diffusions) can be reduced significantly, as described, e.g., in U.S. Pat. No. 4,810,664 to Kamins et al. Thus, the voltages needed to drive devices can be lowered due to this capacitance reduction which, in turn, reduces the required power supply voltage (Vdd). The fact that SOI allows the construction of low Vt devices to maintain high logic performance is a clear advantage over that of traditional bulk silicon.
A second advantage that SOI wafers have over conventional bulk silicon wafers is the elimination of junction leakage between n-channel and p-channel devices. Ordinarily, isolated p-channel (for NFETS) and n-channel (for PFETS) xe2x80x9cwellsxe2x80x9d or xe2x80x9ctubsxe2x80x9dxe2x80x94formed by high energy ion implantation are used to isolate devices of opposite polarity. In SOI wafers, these devices are enclosed laterally by shallow trench isolation (STI) and below by the buried oxide layer (BOX). Hence, P or N isolated wells need not to be formed. By reducing or eliminating leakage between N and P type devices, one can also reduce the power necessary to maintain isolation.
The problem of on-chip memory is one that is much more compelling and harder to solve as the memory""s size is projected to grow substantially in future microprocessor designs. In many of today""s microprocessors, on-chip memory is filled exclusively with Static Random Access Memory (SRAM) and take up to 50-70% of the entire microprocessor""s real estate, depending on the amount of cache present on the chip. An SRAM cell is usually configured with a six transistor (6T) layout, typically four n-type Field Effect Transistors (NFETs) and two p-type FETS. The cell (or bit) size of the 6T layout is on the order of 4-6 mm2 for an 0.18 xcexcm logic generation. For subsequent logic generations, such as 0.13 xcexcm and 0.10 xcexcm, the cell size of the SRAM is projected to be of the order of 1 to 2 mm2. As the MPU requirement of on-chip memory increases from several hundred kilobits (Kb) to several tens of megabits (Mb), the size of SRAM memory blocks presents severe manufacturing constraints due to the resultant die size. The incorporation of on-chip SRAM cache is thus limited to the range of 1-10 Mb.
The on-chip memory area crisis can be solved by replacing some, if not all the SRAM caches with a high-performance DRAM cache, hereinafter referred to as an embedded DRAM or eDRAM in short. The eDRAM cell size is approximately 6 to 8 times smaller than an SRAM having the same lithographic dimensions. Thus, it may be advantageous to replace the SRAM cache with an eDRAM cache for the same memory space on a microprocessor chip, making it possible to place more eDRAM memory than SRAM memory. Since the processor has a larger memory space to temporarily store data, the effect on the processor and system is a much improved performance.
The process of combining eDRAM caches on SOI wafers is, however, non-trivial. The major concern with integrating a high-performance DRAM cache in SOI is the effect of the floating body of the DRAM pass transistors. More particularly, since MOS transistors have their terminal entirely on an insulator, the body region under the channel is electrically isolated from the substrate and, hence, it floats with respect to the potential. Due to the fact that the body of the pass transistor is totally enclosed by oxide, the natural accumulation of holes (p-type substrate) acts negatively to the array device by creating forward bias conditions which prevents off-state conditions. This potential leakage concern with SOI on the off-state characteristics of the array device is one of the reasons why SOI wafers are currently not used for DRAMs.
In order to circumvent the deleterious effect of SOI on DRAM array devices, it has been proposed that the SOI wafer be patterned such that bulk and SOI regions be part of the same wafer. This structure is characterized by having the bulk regions reserved for the DRAM cache while the SOI wafers are used for high performance logic circuits. Such a construction providing patterned SOI wafers is also described in the aforementioned U.S. Pat. No. 4,810,664 to Kamins et al., wherein bulk regions underneath transistors also provide BOX isolation underneath the source/drain diffusions.
As will be described hereinafter, the present invention makes use of a hardmask to intentionally shield areas of the silicon substrate from the oxygen implant that is used to form the SOI. (Note: this technique of forming SOI is commonly referred to separation by implantation of oxygen, or SIMOX in short). After implanting the silicon wafer with a high dose of oxygen (xe2x88x92E17/cm2) at high energies (i.e., xe2x88x9250 to 200 KeV), the wafer is annealed at extremely high temperatures (1300xc2x0 C.) to form the BOX layer and regrow single crystal silicon on top of it.
Within the context of the present invention, the BOX is formed underneath the source/drain diffusions only while leaving a bulk region for the body of the device. Herein, the body of the device is in direct contact with the substrate where it can be biased and which allows a path for holes to be xe2x80x9cdrainedxe2x80x9d into the substrate. However, this method has two potential drawbacks. First, the present invention is, most likely, limited to large transistor or gate channels on the order of 0.5 mm or greater. As the oxygen implant is usually performed at a high dose and at high energy, the lateral implantation length (commonly referred to as xe2x80x9cstragglexe2x80x9d) of the oxygen ions will naturally go underneath the hard mask. Due to the fact that the implant is carried out at high energies, the tolerance or control of the oxygen ions progressing laterally underneath the hard mask is extremely hard to control, thus limiting the use of this invention to transistor sizes greater than 0.5 mm. The second drawback of the invention is the alignment of the transistor or gate with the substrate contact created by the pattern SIMOX. If the transistor is misaligned with respect to the substrate contact, depending how far the substrate contact is from the device, one may still be faced with a floating body effect.
A more recent method of forming pattern SOI wafers using SIMOX is described in patent applications Ser. No. 09/197,693, now issued as U.S. Pat. No. 6,353,246, and Ser. No. 09/497,124, now abandoned, respectively filed on Nov. 23, 1998 and Feb. 2, 2000, entitled xe2x80x9cMethod for filtering dislocations in merged SOI/DRAM chipsxe2x80x9d. Therein is described a method of fabricating both SOI and non-SOI devices in a single semiconductor chip. Large areas of the silicon substrate are patterned so that the entire DRAM or eDRAM cache lies in the bulk region of the wafer while areas surrounding the chip lie in SOI. A hardmask process is used to pattern the large bulk areas for the DRAM or eDRAM cache while the majority of the wafer becomes SOI. Because there are bulk regions in a pattern SOI wafer for the eDRAM cache, these areas require isolated wells to be formed. In conventional bulk eDRAM CMOS, three wells are defined: an n-well onto which p-type FETs are built; a p-well onto which n-type FETs are built; and an array well (AW), which is a well with p-doping of a different concentration than the p-well, and which is used for the logic, control, sense amplifier circuits, and the like, along with all other n-type FET circuits on the semiconductor chip. The embedded DRAM array devices are all built in the way well.
In order to electrically isolate the embedded DRAM array well from adjacent wells, a band of n-doped silicon is designed to intersect the edges of the array well. This n-band surrounds the array well in a ring-like manner. Contact to the n-band is made through the n-well at the silicon surface and extends to the deep n-plate below the embedded DRAM array. Through the n-band contact, the n-band can be electrically biased.
To this effect, FIG. 1, shows a cross-section of the physical layout of a conventional embedded DRAM cell. Each cell has a trench storage capacitor. Access to the charge in the storage capacitor is controlled by biasing the NFET transistor gate and diffusion via the gate contact and diffusion contact, which is also referred to as the bit line contact. The storage capacitor is built on p-type substrate wafers. Since the transistor is an NFET, the transistor must also be fabricated onto p-doped silicon, (shown in FIG. 1 as the array well). To separate these two p-type layers, an n-band of n-type silicon is formed so that the transistor can be properly biased. The isolation shown in FIG. 1 is, typically, a shallow trench isolation which is commonly used in semiconductor processes to electrically separate devices.
FIG. 2 shows a top-down physical view of the physical layout of a corner of an embedded DRAM. The contact shown is the bit-line contact. The array well shapes define the boundary of the p-well of the DRAM. The polysilicon gate, along with the bit line contact, controls the access to the charge in the storage capacitor. The n-well shape provides a link to the deep n-type silicon for proper DRAM biasing.
Accordingly, it is an object of the present invention to provide a method for generating a patterned SOI photomask used for embedded DRAMs.
It is another object to provide a method for systematically identifying embedded DRAM areas to be excluded from the SOI process and for generating the shapes to be printed on the photomask so that the eDRAM may be fabricated on bulk silicon.
It is yet another object to provide a method for collecting all the eDRAM array well shapes and all the n-well shapes and respectively merging selected ones of these shapes into single shapes.

Method for patterning a silicon-on-insulator photomask

International Business Machines Corporation


In a semiconductor memory device having word-line-resetting ability regulating transistors each placed between the corresponding one of a large number of word lines and the ground, each of the above word-line-resetting-ability regulating transistors is composed of first and second transistors connected in series. During standby, the gate voltage of the above second transistor is controlled to be at a set low value (e.g., a value of about 1 V, which is higher than the threshold voltage of the above resetting-ability regulating transistors by 0.2 to 0.5 V). During the operation of the semiconductor memory device, the gate voltage of the second transistor is controlled to be at a value (e.g., 3.3 V) lower than a value of a power source for row decoders (e.g., 5 V) and higher than the above set low value when the corresponding word line is selected, while it is controlled to be at the above set low value (1 V) when the corresponding word line is not selected. Consequently, a current resulting from a short circuit between a bit line and a word line and flowing from the bit line to the ground through the short-circuited portion and the word line can be suppressed during standby and an operating current flowing during operation can be suppressed, thereby reducing power consumption.

The present invention relates to a semiconductor memory device of dynamic-sensing type such as a dynamic RAM. More particularly, it relates to an improved semiconductor memory device comprising a word-line-resetting-ability regulating transistor.
With the recent development of electric appliances which have been reduced in size as well as in power consumption, lower-power dynamic RAMs have been in increasing demand. In the field of portable information appliances, there have been particularly great demands on low-power dynamic RAMs in which not only a current flowing during operation but also a current flowing during battery backup are reduced, since the commercial values of the information appliances depend on the duration of their continuous operation with a battery. In such a low-power dynamic RAM, circuitry has been designed to suppress an increase in current flowing during standby (standby current) during which the dynamic RAM is out of operation. The standby current is defined as a constantly flowing current resulting from a short circuit incessantly caused between a word line and a bit line by dust or the like, which has been accidentally included in the dynamic RAM in the fabrication process thereof.
As an example of the conventional semiconductor memory device (dynamic RAM) in which an increase in standby current has been suppressed, there has been known one disclosed in Japanese Laid-Open Patent Publication No. 3-88195.
FIG. 9(a) shows a principal portion of the dynamic RAM. FIG. 10 shows a chip on which a short circuit has been caused between a bit line and a word line by dust or the like, which has been accidentally included in the dynamic RAM in the fabrication process thereof.
In FIGS. 9(a) and 10 are shown: a memory cell MC; a pair of bit lines BL and/BL; and a word line WL. When the potential of the word line WL is high, the charges in the memory cell MC are released onto the bit line BL. In the drawings are also shown: a precharging transistor 50 for supplying & precharged potential to the above bit lines BL and/BL; a sense amplifier 51 for amplifying a potential difference (data) between the pair of bit lines BL and/BL; a column switch 52; data lines 53 along which the data on the pair of bit lines BL and/BL that has been amplified by the above sense amplifier 51 is transmitted via the above column switch 52.
The potential of the above word line WL is controlled to be at a set high value .phi.wn (which is Vpp level logic) by a word-line driver T8. while it is controlled to be at a ground value by a word-line-resetting- ability regulating transistor T10'. The above two transistors T8 and T10' are controlled by a row decoder 54, as shown in FIG. 9(a). The row decoder 54 consists of transistors T1 to T7, T30, and T31. The row decoder 54 controls a gate voltage VGLEAK of the word-line-resetting-ability regulating transistor T10' to be at two different values, one during operation and the other during standby. Specifically, as shown in FIG. 9(b), the gate voltage VGLEAK of the word-line-resetting-ability regulating transistor T10' is controlled to be at a value VPP during operation during which the transistor T30 is ON and to be at a set value VTT during standby during which the transistor T30 is OFF. The above voltage VPP corresponds to a power-source voltage for driving the row decoder 54. The above set voltage VTT is lower than the above power-source voltage VPP.
A description will be given to the operation of the above conventional embodiment in which, even when an access is made to a faulty address at which a short circuit has occurred between a bit line and a word line, a redundant circuit replaces a defective block containing the faulty address with a redundant block such that correct data in the redundant block is accessed.
During standby, all the bit lines BL and/BL are precharged to a bit-line precharged potential via the precharging transistor 50 in preparation for the subsequent operation. 0n the other hand, the word line WL is at the ground potential via the word-line-resetting-ability regulating transistor T10' so as to cut off a transfer gate between the bit line BL and the memory cell MC. In this state with no voltage application, if a short circuit has been caused between a bit line and a word line by the particle of dust R shown in the drawing, the precharged potential is allowed to flow as a standby current from the bit-line precharging transistor 50 to the ground by sequentially passing through the precharged bit line BL, dust R, word line WL, and word-line-resetting-ability regulating transistor T10'. In this path, since the gate voltage VGLEAK of the word-line-resetting-ability regulating transistor 10' is at the set low value VTT (e.g., on the order of 1 V slightly higher than the threshold voltage of the transistor T10'), the word-line-resetting-ability regulating transistor T10' is brought into a high-impedance state, so that the above standby current is limited to a sufficiently small value of about 10 .mu.A or less. In the case of not limiting the gate voltage VGLEAK to the low value VTT, the magnitude of the standby current becomes several hundreds of .mu.A, so that an increase in standby current resulting from a short circuit between a bit line and a word line is effectively suppressed by the word-line-resetting-ability regulating transistor T10' in the high-impedance state.
However, although the standby current resulting from a short circuit can be limited to a small value in the above conventional semiconductor memory device, the present inventors have found that an operating current having a large value flows disadvantageously during operation in the above conventional semiconductor memory device.
Specifically, as described above, the gate voltage VGLEAK of the word-line-resetting-ability regulating transistor T10' receives a chip activate signal (/RAS signal in a dynamic RAM) during operation and shifts to the logical High level of the row decoder circuit (the power-source voltage Vcc or an internal increased power-source voltage Vpp which ensures operation with a low voltage), thereby enhancing the word-line resetting ability of the word-line-resetting-ability regulating transistor T10'. Here, by way of example, a consideration will be given to a 16-Mbit general-purpose dynamic RAM (4 bits.times.4 megawords, 2048 refresh cycles). In this case, the number of actual word lines is 8192 to each one of which the above word-line-resetting-ability regulating transistor T10' is connected. The number of the word-line-resetting-ability regulating transistors T10' differs depending on the structure of the semiconductor integrated circuit. However, since the row decoder is normally disposed at the center of the chip, the number of the word-line-resetting-ability regulating transistors T10' becomes double the number of the word lines. If it is assumed that the word-line-resetting-ability regulating transistor T10' has a channel width of 2 .mu.m and a channel length of 1 .mu.m, the capacitance thereof will reaches 70 pF if calculated on the assumption that the gate oxide film is 14 nm thick. If the current flowing from the short-circuited portion is to be limited to about 10 .mu.A or lower in the word-line-resetting-ability regulating transistor T10' of this size, it is necessary to reduce the gate voltage VGLEAK to about 10 .mu.A or lower, as described above. On the foregoing assumption, if the cycle time during operation is 90 ns and Vpp level is 5 V, the on-chip current from the power source (which does not ensure operation with a low voltage) is calculated to reach 3 mA, since the word-line resetting ability of the word-line-resetting-ability regulating transistor T10' becomes higher than that during standby.
In the case of ensuring operation with a low voltage (e.g., 3.3 V), an internal increased-voltage power source is used as the power source for the above row decoder. The internal increased-voltage power source can be obtained by raising the power-source voltage to the increased voltage Vpp, which is high in potential (e.g., about 5 V), by means of an on-chip charge pump. However, since the efficiency with which the internal increased power-source voltage Vpp is generated is generally as low as about 50%, a power-source current flowing during operation reaches a higher value of about 6 mA.
Thus, in the conventional semiconductor memory device, although the standby current can be limited to the order of 10 .mu.A or lower even when there is an on-chip short circuit between a bit line and a word line, the power-source current during operation is considerably increased to the order of 3 mA or 6 mA, depending on the circuit structure. As a result, with portable appliances using a battery as a power source, the duration of their continuous operation is disadvantageously reduced.
Another problem of the conventional semiconductor memory device lies in a generating circuit of the voltage VGLEAK (equal to the low voltage VTT) applied to the gate of the word-line-resetting-ability regulating transistor T10' during standby.
Specifically, the above low-voltage generating circuit is composed of, e.g., a P-channel transistor and a diode-connected N-channel transistor, which have been connected in series between an external power source and the ground, so that a low voltage of about 1 V can be obtained from an intermediate node of the series circuit. However, since a through current flowing through the series circuit is increased if the above P-channel transistor is composed of a transistor having a low impedance, the P-channel transistor should be composed of a transistor having a high impedance, thereby reducing the above through current flowing through the series circuit to several .mu.A or lower. However, if the low-voltage generating circuit of this structure is used, a battery back-up current (such as a slow refresh current or a self-refresh current) for holding data with a battery cannot be suppressed effectively.
The above problem will be described more specifically. Although slow refreshing and self-refreshing are slightly different from each other in their cycles and operating manners, they refer to basically the same mode with intermittent operating states, in which a standby state lasting for 30 to several 100 .mu.s is followed by a single refreshing operation and then the standby state lasting for 30 to several 100 .mu.s takes place again, thereby holding data with low power. If it is assumed that the above low-voltage generating circuit is a simple series circuit composed of the P-channel transistor having a high impedance and an N-channel MOS transistor having been diode-connected to the ground, the output terminal of tile low-voltage generating circuit is connected to the gate of the word-line-resetting-ability regulating transistor, as described above. so that the voltage of the gate requires a long period of time on the order of several tens of .mu.s to lower from the potential level of the power source for the row decoder to the potential level of the low voltage VTT (about 1 V) immediately after the completion of the chip activate signal. Consequently, a comparatively large number of periods during which the gate potential of the word-line-resettlng-ability regulating transistor is higher than the low-voltage level of VTT are observed in the intermittent mode such as the slow refreshing mode or the self-refreshing mode. As a result, the state in which the word-line-resetting-ability regulating transistor has a low impedance lasts for a comparatively long period of time and hence the standby current resulting from a short circuit between a bit line and a word line is not effectively suppressed, so that a large amount of battery back-up current (slow refresh current or self-refresh current) is disadvantageously consumed.

Power consumption reducing circuit having word-line resetting ability regulating transistors


A multiple target correlation system for unambiguously detecting, locating and determining the orientation of an array of multiple targets or objects. The multiple target correlator provides a means for fabricating a matched filter array or multiple matched filter with multiple targets stored on a single plate and a method for interrogating this multiple target matched filter with multiple scene images thereby providing for the identification of each object or target and determining its location and orientation in coordinates that are user selectable. The multiple target correlator utilizes a multiple matched filter having two matched filters for each particular object or target stored thereon, and each matched filter is positioned at a unique angle. Since there are two matched filters for each object or target, there will be correlation at two different angles, one for each filter, and since the angular difference is unique for that object, then the difference between the matched filter angles will serve as an identification tag for that object. In addition, the angles at which the consecutive correlations occur are noted and utilized to determine the location and orientation of each of the objects.

1. Field of the Invention
The present invention relates to optical processors, and more particularly, to optical target recognizer systems incorporating a multiple target correlator. The multiple target correlator utilizes multiple matched filters, two for each individual target or object, recorded at a predetermined unique angular difference on a single plate and provides a method for interrogating these multiple target matched filters with a particular scene of interest.
2. Discussion of the Prior Art
In today's "high-tech" manufacturing environment, fabrication trends have been toward closer tolerances and higher complexity, thereby leading to highly labor intensive manufacturing processes. The introduction of automated assembly systems, such as robots, into the factory has been slow in coming due to today's lower production rates. A cost effective approach or solution to this problem is the use of flexible manufacturing systems, utilizing robotics, which are capable of working on a variety of assemblies having similar construction. One of the major limitations associated with the use of robotic systems is the identification of the various components used to manufacture a given product. Early robotic vision systems incorporated a main frame computer which would decompose a particular image of each viewed part into a series of lines and arcs which were used to locate and identify the selected part.
To meet the increasing demand placed upon robotic systems, robotic vision subsystems with increased memory and performance were designed. These vision subsystems were designed to be smaller in size and lower in cost while providing higher acquisition and processing rates for higher rates of production. In order to provide this, the vision subsystems incorporated optical target recognizer systems employing optical correlation techniques.
Present optical target recognizer systems can detect, locate and track a specific target for various target orientations. The optical target recognizer system can be designed to accept a real time image of a scene in which a target of interest may or may not be present. The input image is converted into an electrical signal which in turn is input to a spatial light modulator. The spatial light modulator serves to store an image of the real time input and acts like an optical transparency impressing the image onto a laser beam in the form of amplitude and/or phase modulation. The image modulated laser beam is then Fourier transformed and directed to an optical matched filter. The matched filter contains previously recorded Fourier transform holograms of targets of interest. The output of the matched filter is Fourier transformed again to achieve an inverse Fourier transform. The result of this inverse Fourier transforming step results in an autocorrelation signal if there is a match between the input image and the recording on the matched filter, and a cross-correlation signal if there is no match. While this operation for a specific target functions extremely well, it does not provide a means for unambiguously detecting, identifying, locating and determining the orientation of each target in a scene including multiple targets.
Manufacturing processes that require multiple parts require robotic systems that can not only detect the various parts, but also differentiate between the various parts. The basic problem is, given a multiple of input objects and a corresponding multiple of matched filters, how is one to determine which correlation spot (autocorrelation) belongs to which object and how is the orientation of each object to be determined. With the present state of the art, to acquire multiple objects, a series of matched filters and a transport mechanism are needed to eliminate the ambiguity. Alternative methods considered involve the use of multiple recording techniques with holographic or optical tags to differentiate between objects and determine their orientation. As of the present date, there has been little success on how these prior art approaches might be effectively implemented.


A flow ratio controller having: a main channel; branch channels branching from the end of the main channel; control valves respectively provided in the branch channels; a plurality of flow rate meters for measuring the flow rate of the main channel and the flow rate of each of the branch channels; a valve control section for controlling the control valve provided in one branch channel so that the pressure on the upstream side of the control valve is a given target pressure and, only when the upstream-side pressure is near or not less than the target pressure, starting control of the other control valve so that the flow rate ratios of the branch channels are predetermined ratios; and a target pressure setting section for setting the target pressure such that the smaller the flow volume is in the main channel, the lower is the target pressure.

1. Field of the Invention
The present invention relates to flow rate ratio controllers, used in semiconductor manufacturing processes, which branch at a desired ratio a flow of source gases.
2. Description of the Background Art
In the field of the semiconductor manufacturing process in recent years, along with an increase in wafer size, the size of the processing chambers containing the wafers has also been increased. Meanwhile, when films are deposited on semiconductor wafers, the source gases for the deposition preferably have a uniform concentration; however, if the source gases are introduced into one of these larger-sized processing chambers through only one location, the concentration distribution may become partially unbalanced.
For this reason, more recently, processing chambers have been adapted so as to incorporate a plurality of gas inlets, and fed through the respective inlets with source gases at a mass flow ratio that is controlled such that the gas concentration in the chamber is made uniform. In this case, as a device for branching the flow of the source gases at a desired ratio, a flow rate control device is used.
FIG. 5 illustrates an example of a conventional flow rate ratio control device 100X of a two-branch-flow type. In FIG. 5, reference symbol RXM represents a main channel into which gas flows. The main channel RXM is provided with a pressure sensor 4X, and an end thereof is branched into two. In the branched branch channels RX1 and RX2, flow rate meters 21X and 22X, and control valves 31X and 32X are respectively provided in series. Also, a valve control section 5X monitors units of flow rate data outputted from the respective flow rate meters 21X and 22X, and pressure data outputted from the pressure sensor, and on the basis of values from the respective units of data, controls the control valves 31X and 32X such that ratios of mass flow rates of gas flowing through the respective branch channels RX1 and RX2 to the total flow rate (referred to as flow ratios) become equal to given predetermined ratios.
Specifically, the valve control section 5X firstly performs feedback control of the control valve 31X in one of the branch channels RX1 such that the value from the above-described pressure data (also referred to as measured pressure) becomes equal to a predetermined constant target pressure. Then, under the condition that the measured pressure is controlled to be near or not less than the target pressure, the valve control section 5X performs feedback control of the other control valve 32X such that the ratios of the values of the units of flow rate data (measured flow rates) to the total flow rate become equal to the predetermined ratios.
Patent document 1: Japanese Unexamined Patent Publication No. 2005-38239


An implantable device (1) for injecting fluid and/or for tapping fluid, the device having a housing (3) provided with a puncture zone (4) able to be transpierced by a hollow needle (5) for injecting fluid into and/or tapping fluid from a chamber (3A) provided inside the housing (3). The implantable device has a puncture zone (4) made up of at least first and second superposed flexible membranes (6, 7) mounted to be free, at least locally, relative to each other, to allow the membranes, at least locally, to move along each other, so that, once the needle (5) has been removed, the orifice formed by the needle (5) is sliced into first and second sub-orifices (6A, 7A) substantially not coinciding so as to impart a substantially leaktight property to the puncture zone (4).

Known implantable sites are generally in the form of a housing having a bottom from which extend side walls whose free ends define a proximal opening. The bottom and the side walls are made of an uninterrupted and rigid material, such as titanium, in order to prevent the bottom and side walls from being transpierced by a needle. The proximal opening is closed off by a membrane made of an elastomer material forming a "septum," i.e., a puncture zone suitable for being transpierced by a needle for injecting fluid into or tapping fluid from the internal volume of the housing defined by the bottom, by the side walls, and by the membrane.
In order to ensure that the housing is properly leaktight, the membrane made of elastomer is also generally of large thickness, e.g., of thickness greater than 4 mm. The membrane is compressed laterally in uniform manner, e.g., by forced hooping or binding by means of a metal ring, so as to impart self-closure (or self-healing) properties that are sufficient. In other words, once the needle has been removed from the membrane, the membrane, by means of the continuous internal stress to which the membrane is subjected, immediately closes the hole corresponding to the needle passing through the membrane.
Although such prior art sites are generally satisfactory, these sites also suffer from certain non-negligible drawbacks.
Firstly, because of the large thickness of the membrane that is necessary in order to impart appropriate leaktightness to the housing, known implantable sites are voluminous, which can contribute to making these implantable sites uncomfortable for many patients, and in particular in patients of slight build, such as children.
In addition, known devices are generally difficult to manufacture, precisely because of the need to compress the septum-forming membrane. The operation of assembling the membrane, i.e., of inserting the membrane into a ring to compress the membrane, is thus, in general, difficult and poorly reproducible.
Finally, the need to compress the membrane significantly limits the possibilities of shaping the housing. In particular, currently known technology does not make it possible to obtain a site that can be pierced over a curved surface while also offering an excellent level of leaktightness for a large number of piercing operations (e.g., at least one thousand).

Medical implantable site having a multi-layer puncture zone

Compagnie Europeenne d'Etude et de Recherche de Dispositifs pour l'Implantation par Laparoscopie


A CO2 refrigeration system for an ice-playing surface comprises an evaporation stage in which heat is absorbed from an ice-playing surface. CO2 compressors in a compression stage compress CO2 refrigerant subcritically and transcritically. A gas cooling stage has a plurality of heat-reclaim units reclaiming heat from the CO2 refrigerant. A pressure-regulating device is downstream of the gas cooling stage, to control a pressure of the CO2 refrigerant in the gas cooling stage. A reservoir is downstream of the pressure-regulating device for receiving CO2 refrigerant in a liquid state. A controller operates the pressure-regulating device to control the pressure of the CO2 refrigerant in the gas cooling stage as a function of the heat demand of the plurality of heat-reclaim units, the controller causing the pressure of the CO2 refrigerant to reach a transcritical level as a function of a heat demand of the plurality of heat-reclaim units.

With the growing concern for global warming, the use of chlorofluorocarbons (CFCs) and hydrochlorofluorocarbons (HCFCs) as refrigerant has been identified as having a negative impact on the environment. These chemicals have non-negligible ozone-depletion potential and/or global-warming potential.
As alternatives to CFCs and HCFCs, ammonia, hydrocarbons and CO2 are used as refrigerants. Although ammonia and hydrocarbons have negligible ozone-depletion potential and global-warming potential as does CO2, these refrigerants are highly flammable and therefore represent a risk to local safety. On the other hand, CO2 is environmentally benign and locally safe.


There is provided an engine driven arc welder adapted for converting a.c. output of welding generator into d.c. output to allow it to undergo switching control by using a switching circuit to detect an output of the switching circuit to control its ON/OFF period by the detected content to control a welding current. This engine driven arc welder further has a reference signal formation circuit for forming a reference signal such that when a detected voltage across welding terminals is higher than a first predetermined value, it has a first reference value. When the detected voltage is lower than a second predetermined value, the reference signal has a second reference value higher than the first reference value, and when the detected voltage is between the first and second predetermined values, the reference signal has a reference value of drooping characteristic continuously connecting first and second reference values, thus to compare a detected signal at the welding terminal with the reference signal of the reference signal formation circuit to control the switching circuit.

1. Field of the Invention
This invention relates to an engine driven arc welder or welding machine in which the external output characteristic is caused to have constant current characteristic.
2. Description of the Prior Art
Hitherto, in welding work by engine driven arc welders used in outdoor construction works, manual welding is the main current. In view of this, there has been conventionally proposed a system in which power supply of constant current characteristic having high stability of arc is applied to the outdoor engine driven arc welder. The circuit configuration of the conventional system is shown in FIG. 10. In the system of FIG. 10, a chopper circuit for providing general constant current characteristic is constituted. Namely, an output from generator 32 connected to engine 31 is rectified by rectifier 33 and is then smoothed by smoothing capacitor 34 so that it is caused to be power having lower impedance even when high speed operation of transistor is carried out. Switching transistor 35 carries out ON/OFF operation of power thus obtained at higher frequency and by large current. Reactor 36 suppresses sudden increase or decrease of current and smooths output caused to undergo switching by switching transistor 35, thus to stabilize the welding condition. In FIG. 10, reference numerals 37, 38 denote welding terminals, reference numeral 39 denotes a current detector, reference numeral 40 denotes a constant current control section, and reference numeral 41 denotes a transistor drive section for driving switching transistor 35.
However, with such welder of constant current characteristics, in the case where high cellulose covered or coated welding rod for which large short-circuit current is required is used, there was the problem that deposition is apt to take place, giving rise to welding defect.
As a method of increasing current at the time of short-circuit of welding, the apparatus described in Jikkohei No. 4-35007 (Japanese Utility Model Publication No. 35007/1992) has been proposed. In accordance with the apparatus above-mentioned, within current control circuit using thyristor, a detected value of arc current detecting circuit is delivered to current setting circuit to carry out adjustment of detection level to compare the detected value with a reference value at firing circuit via output characteristic switching circuit in order to carry out phase control. The technology of the apparatus contemplates suddenly increasing current at the time of short-circuit. Further, there is proposed, in the Tokkaihei No. 5-185226 (Japanese Patent Application Laid Open No. 185226/1993), the technology in which direct current (d.c.) in d.c. arc welder is converted into high frequency alternate current (a.c.) to carry out constant current welding by means of an output transformer for controlling the high frequency a.c. so that it becomes equal to an output voltage necessary for welding and output side rectifier of diode bridge configuration for rectifying this output to set a welding current to switch over characteristics by the operation of changeover switch based on lowering of voltage due to occurrence of short-circuit during welding.
In the case of the above-mentioned high cellulose system covered welding rod used outdoor, since welding is carried out in the state where the arc length is caused to be very short, there is no complete short-circuited state unless the welder has drooping characteristic. When current is suddenly increased resulting from the voltage being lowered a uniform welding state cannot be provided. This current fluctuation is insufficient.
Particularly, in the engine driven arc welder, unlike the above-mentioned d.c. arc welder, high frequency a.c. inverter, output transformer of high frequency a.c., and the like are not required.
In addition, in the case of the high cellulose system covered welder used in Europe or U.S.A., the above-mentioned problems were further conspicuous.
Moreover, when constant current output characteristic having high arc stability is employed in the engine driven arc welder, in the case where voltage drop of welding cable becomes large in dependency upon choice of operator in the vicinity where maximum current output is set, or in the case where long arc length is adopted in dependency upon kind of covered rods, welding output voltage is increased. For this reason, a generator and semiconductor are used having a capacity capable of providing full output of the maximum output curve in the constant current output characteristic and an engine of large output capable of driving such generator. Alternatively, there is employed the technology described in the Jikkohei No. 3-49802 (Japanese Utility Model Publication No. 49802/1991) as the technology in which slanting portion, which is the overload region of FIG. 6, is not caused to be outputted. In accordance with this technology, since the welder is connected to a commercial power supply, it is possible to prepare load characteristic in a stationary manner, wherein the power supply is also stable. Namely, this welder is designed on the premise of substantially the fixed condition.
However, in the case where the above-mentioned technology is utilized for an engine driven arc welder used at an outdoor location where no commercial power supply is installed, since its output characteristic is always set in a stationary manner, welding output would exceed required engine output unless an engine having margin in output is employed because of lowering of engine output due to change of weather condition, aged deterioration, etc. and unevenness of engine output. As a result, the engine rotation number would become extremely lower, so welding output becomes unstable. This might cause occurrence of welding defect, deterioration of the engine by overload of the engine, production of a great quantity of black smoke and lowering of the life time due to deterioration of cooling efficiency of welding generator.


An improved knife grinder is desinged to have a motor transmission axle which transmits one or two units of wheel axle with its angles which are facing one another and entend slightly upward and outward. A base is fixed onto the vertical bottom surface which extends from the wheel shaft in coordination with the bearing positioning wheel axle, onto the upper end of which an axle bush can be housed. One or two units of glaze wheel is fitted onto the outer edge of the axle bush. While a stripe column is housed onto the position which is corresponding to the axle bush at its interior. Extending outward from the glaze wheel, three layers made of such materials as plastic, foam and grinding cloth are formed. A stair face is set on the upper end of the plastic layer, into which a positioning cover can be housed, and its mutli-angled protrusive column will be housed into the axle bush positioning hole; while the multi-angled groove at the other end will allow the wheel axle to be tightly screwed by a scew nut. By housing onto the upper cover of the machine body outside the grinding wheel, opening grooves are set corresponding to the interior lateral side of the grinding wheel will form a knife resting face separately, and into the opening grroves the lateral surface of various kinds of knife tools can be inserted.

Generally speaking, a grindstone is usually used to sharpen the blades of tools such as a kitchen knife, a fruit knife and knives for other purposes once these knives become blunt. By means of applying the blade of a tool reciprocally on a grindstone, the blade will recover its sharpness. However, besides time and energy consuming, a considerable skill will also be needed to achieve an excellent blade sharpening effect. Otherwise, all one can do is to assign the sharpening work to a tool shop which specialized in the job. Besides the reason that the quality of grinding cannot be easily controlled when it is processed manually, the forementioned defects are also caused by the unavailability of of an electrical tool grinder which is featured for its portability, suitability for household use, energy-saving and rapidity.
In spite of the availability of such similar inventions as those disclosed under U.S. Pat. No. 3,258,878, U.S. Pat. No. 3,800,480, U.S. Pat. No. 2,775,075, U.S. Pat. No. 2,865,141, U.S. Pat. No. 2,860,452, U.S. Pat. No. 4,333,273 and U.K. Patent No. 2,123,323, but viewing from their structures, it can be seen that grinding wheels are being used for the sharpening of tools. Upon grinding, the edge surface of the grinding wheel will keep in contact with the blade of a knife for the grinding process. Due to the fact that it is made of a very hard steel, it can conduct a strong grinding against any tool which is being processed (especially effective against a tool made of steel or any tool which has no blade). However, the following defects can also be easily made:
1. When the hard grinding wheel is pressing against a tool, its hardness contact will produce an extremely strong counter-active force, which makes the tool unable to be held steadily, and thus will easily produce a jumping phenomenon, and will further cause intermittent contacts between the grinding wheel and the tool i.e. the grinding process of the tool will be conducted in an intermittent manner. In this way, the contacting angle and the depth between the blade and the grinding wheel will not be kept consistently. Therefore, the blade which is thus processed will not be even and smooth. That is to say, after grinding the sharpness of the blade is usually unsatisfactory. PA1 2. As the surface of a grinding wheel is rather rough, the iron filings which is produced at the time of grinding will easily be adhered onto the surface of the grinding wheel. Such iron filings makes cleaning impossible. In addition, both the grinding wheel and the tool are of a hard nature. It makes wearing easy for the grinding wheel, which will have to be replaced frequently. However, as the installing of a grinding wheel is quite complicated, that makes replacement uneasy, and the expenses involved will also be very high.
In view of the above defects, with his years of experience in the manufacturing of knife tools, the inventor made up his mind to conduct an active continuous study and research in the said field. After repeated experiments and improvements, he managed to complete a knife-grinder for household use as disclosed under the present invention. And its main object lies in diminishing the size of the knife grinder to enable it be gifted with the features of easy portability and operation, with two grinding wheels which are facing one another and extending slighly outward and having an appropriate angle of elevation being driven by a motor to enable the two grinding wheels for easy replacement when necessary; and also enable two opening grooves to be set outside the grinding wheel and fixed onto the upper cover of the machine body by facing each other at the interior lateral side of the two grinding wheels to form a knife stand, so that a knife can be inserted into either one of the opening grooves according to the shape of the two lateral blades of the tool, to the ultimate effect of allowing it to be operated by everybody, rapidly processed, convenient and energy-saving.

No. 54, Alley 67, Lane 112, Chung Ching Rd.


A heat storage type air conditioner which is free from a difficulty that, when a general cooling and heating circuit and a cold radiating and heat radiating circuit are operated separately or simultaneously, the quantities of refrigerant in those circuits become smaller or larger than required, so that its compressor is damaged or the cooling or heating capacity is lowered. When, in a heat storage type air conditioner, first and second bypass circuits 22 and 23 are closed, a general cooling and heating circuit 18 driven by a compressor 1 and a cold radiating and heat radiating circuit 21 driven by a refrigerant gas pump 13 are made independent of each other, so that a cooling operation or a heating operation is carried out with the aid of a first use-side heat exchanger 4a and a second use-side heat exchanger 4b. Therefore, in the air conditioner, the refrigerant or refrigerating machine oil will never concentrate in any one of the two circuits. In a cold storing operation or a heat storing operation for a heat storage tank 8, the two bypass circuits 22 and 23 are opened, so that the general cooling and heating circuit 18 is communicated with the cold radiating and heat radiating circuit 21. As a result, the refrigerant is led from the general cooling and heating circuit into the heat storage tank 8 to store cold or heat in the heat storing medium 7 therein.

This invention relates to a heat storage type air conditioner which has a heat storage tank containing a heat storing medium, and contributes to suppression of the electric power consumption during the daytime, and to make the periodic electric power consumption uniform in a day.
FIG. 14 is a refrigerant piping circuit diagram showing the arrangement of a conventional heat storage type air conditioner disclosed, for instance, by Japanese Patent Application (OPI) No. 33573/1990 (the term "OPI" as used herein means an "unexamined application"). The air conditioner comprises: a main refrigerant circuit 6 including a compressor 1, a condenser 2, a first pressure reducing mechanism 3, and an evaporator 4, which are connected to one another in the stated order; a heat storage tank 8 containing a heat storing medium 7; a cold storing heat exchanger 9a for performing heat exchange between the heat storing medium 7 in the heat storage tank and the refrigerant; a first bypass circuit 10 allowing the refrigerant to move through the heat exchanger 9a between a liquid pipe 5a provided between the condenser 2 and the first pressure reducing mechanism 3 and a gas pipe 5b; a second pressure reducing mechanism 11 connected to a liquid pipe 10a of the first bypass circuit 10; a second bypass circuit 12 connected in parallel to a gas pipe 10b of the first bypass circuit 10; a refrigerant gas pump 13 connected to the second bypass circuit 12 and adapted to circulate the refrigerant to perform heat exchange between the refrigerant and the heat storing medium 7 contained in the heat storage tank 8; and control means (opening and closing means) 14 for controlling the flow of refrigerant to the second bypassing circuit 12.
The operation of the conventional air conditioner thus organized will be described. The devices 1 through 4 are connected through a refrigerant pipe 5 to one another to allow the flow and circulation of refrigerant, to form the main refrigerant circuit 6, which is adapted to give to the air in the room with the aid of the evaporator 4 the cold which the condenser 2 has obtained from the air outside the room by heat exchange.
On the other hand, the conventional air conditioner includes the heat storage tank 8 containing the heat storing medium 7 which is able to store heat. And the cold storing heat exchanger 9a is provided in the heat storage tank, to perform heat exchange between the heat storing medium 7 in the heat storage tank 8 and the refrigerant.
In an ordinary cooling operation using the compressor (hereinafter referred to as "a general cooling operation", when applicable), the second pressure reducing mechanism 11 is kept closed, and the refrigerant circulates only in the main refrigerant circuit 6. That is, the gas-like refrigerant high in temperature and high in pressure discharged from the compressor circulates as follows: First, the refrigerant is condensed by the condenser 2, and then subjected to adiabatic expansion by the first pressure reducing mechanism 3, as a result of which it is converted into a two-phase (gas and liquid) fluid low in temperature. The fluid flows into the evaporator 4, where it takes heat from its surroundings to cool the latter, and it is evaporated and gasified, to return to the compressor 1.
In a cold storing operation which is performed for storage of cold during night time when the electric power load is small, the first pressure reducing mechanism 3 is kept closed. That is, the gas-like refrigerant discharged from the compressor 1 is condensed by the condenser 2 into a liquid refrigerant. The liquid refrigerant flows to the first bypass circuit 10, and is then subjected to adiabatic expansion by the second pressure reducing mechanism 11, and thereafter evaporated and gasified by the cold storing heat exchanger 9a, so that the cold is stored in the heat storing medium 7 in the heat storage tank 8.
In a cooling operation using the stored cold, in which the cold stored in the heat storage tank 8 during night time is used, for instance, during day time (hereinafter referred to as "a cold radiating operation", when applicable), the refrigerant is processed as follows: That is, when, with the compressor 1 stopped, the refrigerant gas pump 13 is operated, the gas refrigerant at low temperature and at low pressure is pressurized by the pump 13, so that it is moved through the gas pipe 10b of the first bypass circuit 10 to the cold storing heat exchanger 9a, where it gives its heat to the heat storing medium 7, and then condensed and liquified. The refrigerant thus condensed and liquified is subjected to adiabatic expansion by the second pressure reducing mechanism 11, so that it is converted into a two-phase (gas and liquid) fluid. The two-phase fluid flows into the evaporator 4, where it takes heat from its surroundings thereby to cool the latter, and it is evaporated and gasified, to return to the refrigerant gas pump 13.
With the conventional air conditioner, the cold radiating operation and the general cooling operation using the compressor 1 can be performed at the same time. More specifically, the air conditioner may be operated with both the compressor 1 and the pump 13 activated. The refrigerant condensed by the condenser 2 in the main refrigerant circuit 6, and the refrigerant condensed by the heat exchanger 9a in the first bypass circuit 10 meet each other at the liquid pipe 5a of the main refrigerant circuit 6, and both of them are evaporated at the evaporator 4, thus cooling the surrounding.
The simultaneous operation of the compressor 1 and the refrigerant gas pump 3; that is, to perform the general cooling operation and the cold radiating operation at the same time is effective in decreasing the load to the demand for electric power during day time. However, the above-described method, in which the refrigerants condensed by the condenser 2 and the cold storing heat exchanger 9a are met with each other, and evaporated by one and the same evaporator 4, suffers from the following difficulty: That is, depending on variations of environmental conditions such as the temperature of the air in the room and the temperature of the air outside the room, and on variations in load of the cold storing heat exchanger 9a due to variations in temperature of the heat storing medium, the general cooling operation and the cold radiating operation may be unbalanced in the quantities of refrigerant and refrigerating machine oil required therefor. In this case, the air conditioner may operate unsatisfactorily, and may be lowered in cooling capacity. In addition, when the quantity of refrigerant becomes smaller or larger than required as was described above, high pressure may be induced in each of the circuits, or liquid may flow back to the compressor. Furthermore, the refrigerating machine oil may become short, so that the compressor's bearings are seized. That is, the components forming the refrigerant circuit may be damaged directly.
The above-described difficulties may be eliminated by employing a method in which the operating capacities of the compressor and the refrigerant gas pump are adjusted to control the flow rate ratio of the condensed refrigerant in the circuit for the general cooling and heating operation to that in the circuit for the cold radiating operation (the bypass circuit). However, the method is disadvantageous in the following points: That is, the control method is intricate, and accordingly it is necessary to employ control devices relatively high in cost, and in many cases it is necessary to connect a number of transmission lines to the control devices, and in addition it is required to provide mechanisms (such as inverters) for adjusting the capacities of the compressor and the refrigerant gas pump. Thus, the method is not practical in use.
The quantities of refrigerant required for the cold storing operation, the general cooling operation, and the cold radiating operation are different from one another. The quantities of refrigerant required for the cold storing operation and the general cooling operation are relatively small, whereas the quantity of refrigerant for the cold radiating operation is relatively large. Hence, in the cold storing operation, the larger part of the refrigerant in the whole circuit is surplus; and when the current operation mode is switched over to an operation mode in which only the cold radiating operation is carried out, or a combined-operation mode in which the cold radiating operation and the general cooling operation are carried out, a large quantify of refrigerant is required. Therefore, if it is intended to adjust the correct quantity of refrigerant to a correct value for any one of the operation modes, then it is necessary to provide in the circuit a device which is able to temporarily collect the refrigerant and supply it when necessary. However, in the conventional air conditioner, no means for adjusting the quantity of refrigerant suitably according to a given operation mode is provided in the circuit. In view of this adjustment of the quantity of refrigerant, it is rather difficult to put the conventional air conditioner in practical use.
FIG. 15 shows the arrangement of an air conditioner using a heat accumulator effective in storing heat, disclosed by Japanese Patent Application (OPI) No. 52563/1986, which is so designed as to perform a defrosting operation during a heating operation. The air condition comprises a heat pump circuit f including a compressor a, a 4-way valve b, an outside heat exchanger c, a pressure reducing mechanism d, and an inside heat exchanger e, which are connected to one another. In the air conditioner, the discharge side of the compressor a is connected through a defrosting first bypass circuit g to the liquid pipe of the heat pump circuit f, and the liquid pipe of the heat pump circuit f is connected through a second bypass circuit h to the suction side of the compressor a. In addition, a heat accumulator i is provided over both the gas pipe of the heat pump circuit f and the second bypass circuit h, and first and second control valves j and k are connected to the first bypass circuit g and the liquid pipe of the heat pump circuit f, respectively. In an ordinary heating operation, with the first control valve j closed and with the second control valve k opened, the refrigerant is allowed to flow as indicated by the solid arrows so that while the heating operation is being performed, the heat of the high-pressure gas discharged from the compressor a is stored in the heat accumulator i. And, in a defrosting operation, with the first control valve j opened, the gas discharged from the compressor a is sent to the outside heat exchanger c as indicated by the broken arrows to defrost it, and with the second control valve k closed a part of the gas discharged from the compressor is circulated from the inside heat exchanger through the pressure reducing mechanism d to the heat accumulator i, so that it is subjected to heat exchange at the heat accumulator i. Thus, the defrosting operation is carried out while the heating operation is being performed.
The conventional air condition is designed as described above. That is, in the case where the general cooling circuit and the cold radiating circuit are operated in a parallel mode, the refrigerants which are excessively cooled and decreased in pressure in those circuits are met with each other at the evaporator, and therefore the quantities of refrigerant in the circuits and the quantity of refrigerating machine oil are changed depending on variations in environmental condition and on variations of load on the side of the cold storing heat exchanger, as a result of which sometimes it becomes difficult to continue the operations with the circuits. This difficulty may occur in the case, too, where the conventional air conditioner performs the heating operation or the heat storing operation with the refrigerant circulating direction reversed in the refrigerant circuit.
Whenever any one of the operation modes (the cooling operation, the heating operation, the cold storing operation and the heat storing operation) is selected, the quantity of refrigerant required for the operation mode thus selected may be different from the quantity of refrigerant in the corresponding circuit. However, heretofore no means including a control unit for adjusting the quantity of refrigerant in the circuit to the correct value is provided for the conventional air conditioner, and therefore, whenever the operation mode is switched, the quantity of refrigerant in the corresponding circuit may be larger or smaller than required. This difficulty adversely affects particularly the cold storing operation; that is, it may become difficult to continue the cold storing operation. Thus, it is rather difficult to put the conventional air condition in practical use.
In the conventional air conditioner, the defrosting operation is of so-called "hot gas defrosting system" that the gas discharged from the compressor a is sent to the outside heat exchanger c, and is then returned directly (without passing through the pressure reducing mechanism) to the compressor a. Therefore, the amount of heat radiation at the outside heat exchanger c is small with respect to the ability of the compressor a; that is, the air conditioner is low in defrosting efficiency.
Furthermore, if, in the above-described conventional air conditioner, the pressure reducing mechanism d is slightly throttled to take heat from the heat accumulator i during the defrosting operation, then almost all the refrigerant flows from the bypass circuit g to the outside heat exchanger c, but not to the inside heat exchanger e, and therefore it is impossible to increase the heating capacity of the inside heat exchanger.
On the other hand, during the heating operation, the gas discharged from the compressor radiates its heat at the heat accumulator i at all times, and accordingly the heating capacity of the inside heat exchanger e is decreased. Particularly when the temperature of the air outside is low and the room heating load is great, the heating capacity of the inside heat exchanger e is unavoidably decreased.
As is apparent from the above description, the conventional air conditioner cannot sufficiently achieve its one object of performing the defrosting operation while air-conditioning the room smoothly and effectively.

Heat storage type air conditioner, and defrosting method


The invention provides a system structure, method and computer program product for mirroring cache data from a first controller to an alternate controller in a data storage system, where the data storage system is being managed by the controllers in dual active configuration and the first and alternate controllers are also connected to a system drive that includes one or more disk storage devices and the first controller is connected to a first memory, and the alternate controller is connected to a second memory where each controller has an identical memory layout, and a cache line descriptor data structure defined therein and the cache line descriptor data structure is used by each respective controller to track data mirrored by the controller to a memory connected to an alternate controller and the cache line descriptor data structure includes information for reducing the amount of data mirrored to an alternate controller for secondary cache data mirror operations on same originating cache data with respect to a particular cache line and additionally, the cache line descriptor data structure includes information for coalescing multiple cache data mirror operations corresponding to a particular cache line into a single cache mirror operation to the alternate controller.

This invention relates generally to input/output processing structure and method for computer systems having a plurality of processing resources. More particularly, the present invention pertains to cache data mirroring by a controller to an alternate controller in a data storage system that is being managed, by the controllers, in dual active configuration.
Modern computers, particularly computers operating in a server environment, require a large, fault-tolerant data storage system. Hard drives in all computer systems are susceptible to failures caused by temperature variations, head crashes, motor failure, controller failure, and changing voltage conditions. To improve reliability and protect the data in data storage systems, many data storage systems use a redundant array of independent disks (RAID) operated by a disk array controller. Conventional RAID systems typically consist of several individual disk controllers combined with a rack of drives to provide a fault-tolerant data storage system that is directly attached to a host computer. The host computer is then connected to a network of client computers to provide a large, fault-tolerant pool of storage accessible to all network clients. Typically, the disk array controller provides the brains of the data storage system, servicing all host requests, storing data to multiple drives, such as, for example, RAID drives, caching data for fast access, and handling any drive failures without interrupting host requests.
Caching data by a disk array controller into a cache memory increases the performance of data storage and retrieval operations by maintaining a collection of the most recent references made by a host computer. Cache memory can typically be operated in a write-back or write-through mode. In a write-back mode, write data is temporarily stored in the cache and written out to disk at a subsequent time. An advantage of this mode is that it increases the controller""s performance. The RAID controller notifies a host computer that the write operation succeeded (by sending the host computer a completion status) although the write data has not been stored on the disk.
It is desirable for a data storage system to reliably function with any type of failed component, including a failed disk array controller. Failure of a single disk array controller in a data storage system having a single, or multiple independent controllers, renders the tasks that were being performed by the failed controller, and/or those tasks scheduled to be performed by the failed controller, inoperable.
Worse yet, the failure of a single disk array controller in a data storage system having only one controller, renders the entire RAID system inoperable. (Hereinafter, xe2x80x9cdisk array controllerxe2x80x9d is often referred to as xe2x80x9ccontrollerxe2x80x9d to simplify the description, unless otherwise stated.) To circumvent the problem of a single point of failure that all single controller RAID systems exhibit and provide redundancy to a data storage system, dual active controllers were implemented.
A dual active controller configuration typically consists of a first controller and a second controller coupled to one another, so that in the event of a single controller failure, the surviving controller is able to take over the tasks that were being performed by the failed controller, and perform those tasks that were scheduled to be performed by the failed controller.
To take over the tasks of a failed controller, a surviving controller must keep track of both the tasks that its partner controller is working on, and the tasks that its partner controller is scheduled to work on before the failure occurs. To illustrate this, consider, for example, that a controller fails before data stored in its cache (in response to a write request from a host computer) is written onto a system drive. Data in the cache of a failed controller is lost unless a battery backup is used. In this situation, it is desirable for a surviving controller to complete the scheduled task of the failed controller by writing the data that was in the failed controller""s cache onto the system drive.
To accomplish this, a surviving controller in active configuration would need to have a copy, or a mirror of the failed controller""s cache. State-of-the-art data storage systems are limited because there are no known structure or procedures for copying or mirroring a controller""s cache between other different controllers in active configuration. Therefore, what is needed, is a cache mirroring system, apparatus, and method for multi-controller environments.

System, apparatus, and method providing cache data mirroring to a data storage system

International Business Machine Corporation


An example of a system and method implementing a live migration of a guest on a virtual machine of a host server to a target server is provided. For example, a host server may utilize a flow key to encrypt and decrypt communications with a target server. This flow key may be encrypted using a receive master key, which may result in a receive token. The receive token may be sent to the Network Interface Controller of the host server, which will then encrypt the data packet and forward the information to the target server. Multiple sender schemes may be employed on the host server, and various updates may take place on the target server as a result of the new location of the migrating guest from the host server to the target server.

The migration of guests on Virtual Machines (VMs) from a host server to a target server may affect more than the location of the data, but the various external computing devices that interact with the guests and servers as well. Advances in technology have addressed some issues associated with naïve migration, which could effectively pause guest performance until migration is complete. In this regard, brownout and blackout phases may be employed to reduce the pause time of the guest so that the only pause is during the blackout phase to transfer the dirty pages. If encryption is employed among the various servers and computing devices, then each server and computing device may need to know the different encryption and decryption keys associated with the target server.

Managing NIC-encrypted flows for migrating guests or tasks


Superior high water containing oil continuous microemulsions and emulsions for cleaning contain defined amounts of water, one or more ionic surfactants, and one or more organic solvents so that the compositions have a low conductivity and low viscosity.

This invention concerns microemulsions and emulsions, and their use in various applications.
Microemulsions are well known. Typical components of microemulsions include water, an organic solvent, and surfactants. Often, microemulsions are used as cleaning formulations. For example, U.S. Pat. No. 4,909,962 describes a clear, single phase, pre-spotting composition provided in the form of a microemulsion, solution, or gel, this composition characterized as being infinitely dilutable with water without phase separation. Other references describe compositions useful in cleaning applications. In systems described as being oil continuous, the systems have low water contents. While predominately describing water continuous systems, some of the examples in U.S. Pat. No. 4,909,962 exemplify low water containing, oil continuous (water in oil) systems. While such formulations are known in a general sense, much research is dedicated toward finding new microemulsion and emulsion formulations. It is desirable to find new compositions for such purposes which possess high water contents and are oil continuous. Such oil continuous microemulsions are especially suitable to function as cleaning compositions to remove oil or grease.

High water content, low viscosity, oil continuous microemulsions and emulsions, and their use in cleaning applications


In a device for performing measurements on at least partly transparent objects such as optical fibres a radiation beam is directed on the object. The radiation deflected by the object is imaged by means of a lens system (321, 322) on a radiation-sensitive detection system (330). As a result of refraction on interfaces between areas having a different refractive index (311, 312) in the object and between the object and the surroundings (315), dark or light bands corresponding to the projection of the interfaces are produced on the radiation-sensitive detection system (330). Thus measurements can be performed on the internal structure of the object.

The invention relates to a device for performing measurements on an object comprising a core and at least one transparent layer surrounding it, said device comprising a measuring space for accommodating the part of the object to be measured, at least one radiation source unit for supplying a radiation beam with which the object is irradiated and a radiation-sensitive detection system for detecting radiation from the measuring space. The invention also relates to a method of manufacturing a fibre and to a fibre manufactured by means of such a method.

Device for performing measurements on a transparent object, method of manufacturing a fiber and fiber manufactured by means of said method


The invention relates to muteins of the pyrroline-5-carboxylate reductase 1 (PYCR1), to nucleic acid molecules comprising a nucleotide sequence encoding such muteins, to methods of determining in a subject a predisposition of having an age related disorder associated with PYCR1, to methods of identifying a compound capable of modifying the expression of PYCR1, and methods of treating a subject having an age-related disorder associated with PYCR1. The invention further relates to a genetically modified animal and a method of modifying the expression of the PYCR1 gene in an animal.

Wrinkly skin and bone loss are typical features associated with ageing. In some monogenetic diseases, these changes occur prematurely resulting in a progeroid appearance of affected individuals. As a clinical feature wrinkly skin or cutis laxa is used as a common denominator of several overlapping syndromal disorders including autosomal dominant cutis laxa (ADCL; MIM 123700), autosomal recessive cutis laxa type I (ARCL1; MIM 219100), autosomal recessive cutis laxa type II (ARCL2; MIM 219200, also called wrinkly skin syndrome (WSS; MIM 278250)), de Barsy syndrome (DBS; MIM 219150), and gerodermia osteodysplastica (GO, MIM 231070). Diagnosis is often difficult in these conditions due to a broad clinical overlap.

Muteins of the pyrroline-5-carboxylate reductase 1

Agency for Science, Technology and Research


A combined assembly and a method are provided for delivering a mailing attached to an article requiring special services. A form resembling a return postcard acting as a receipt for the delivery employee is integrally attached to an envelope capable of receiving a payment in a compartment of the envelope. The combined form and envelope is attachable to an article and removable therefrom upon delivery. The address receipt section is also provided but may be retained on the article following removal of the envelope and return form.

The present invention generally relates to a combination form and envelope. More specifically, the present invention relates to a combination form required for mailing of an article requiring special services, particularly a mailing requiring cash on delivery (COD), and an associated return envelope.
It is, of course, generally known to provide forms and envelopes for mailing an article requiring special services, such as cash on delivery (COD). However, such known forms and envelopes for completing mailing of the article requiring special services are typically non-integrally related. Therefore, a mail delivery person delivering the article, the post office or other mailing facility requires separately stocking multiple forms and multiple envelopes for completing the special services mailing.
Furthermore, the delivery personnel must be aware of all forms which must be completed in order to successfully complete all of the requirements for the particular mailing. For example, to mail an article requiring cash on delivery, a receipt must be given to the sender, the addressee and the delivery personnel. Further, a check, cash, or money order must be received by the delivery person upon delivery of the article for which the receipt is written. Appropriate labelling and amounts must be entered on the forms, receipts and/or envelopes to identify the amount of money received upon delivery as well as to track the given article with specific amounts of cash and receipts therefor.
The COD mailing can be, therefore, both time-consuming and ineffective to correctly complete the same since stocking of appropriate forms for the delivery person is required and further given the number of steps required to complete the mailing. This is particularly true from an addressee's viewpoint as the process may be unfamiliar. Also, assurance that each form is completed by an appropriate person, returned to an appropriate person and received by an appropriate person are all required to successfully complete the delivery of an article requiring cash on delivery.
A need, therefore, exists for an improved combination form and envelope, particularly for COD mailings, but that is also suitable for other mailing requiring special services.

One-piece special service mailing form and return envelope and a method for assembling same


A steel alloy for pipes, sheet metal or sections for manufacturing bumpers for motor vehicles, wherein the steel alloy contains, in percent by weight, 0.17 to 0.20% carbon, 1.70 to 2.20% manganese, 0.45 to 0.75% chromium, 0.10 to 0.35% molybdenum, 0.03 to 0.05% aluminum, 0.01 to 0.05% titanium, 0.01 to 0.12% vanadium, 0.025 to 0.06% niobium, 0.0001 to 0.10% zirconium, 0.002 to 0.003% Boron, 0.01 to 0.04% nitrogen, up to 0.15% silicon and up to 0.025% phosphorus and up to 0.010% sulfur, wherein the remainder is iron including impurities caused from smelting, and wherein the sum of the alloy components titanium, vanadium and niobium is between 0.16 and 0.25%.

1. Field of the Invention
The present invention relates to a steel alloy for pipes, sheet metal or sections for manufacturing bumpers for motor vehicles.
2. Description of the Related Art
Bumpers are integrated at the front and the rear of a motor vehicle between the plastic shell which closes off the vehicle body and the frame of the motor vehicle. The purpose of the bumpers is to absorb light impacts and collisions without or with only little damage to the vehicle. The manner of operation of a bumper is to convert the kinetic energy resulting from an impact into work of deformation, so that no plastic deformations occur at the body structure, particularly at the side rails or side members of the body.
Consequently, a bumper must have sufficient strength as well as a high elasticity and bending stiffness in order to be able to absorb and conduct away the occurring forces and moments.
Since bumpers are manufactured in large quantities primarily from pipes, sheet metal or sections using the cold deformation method, it is additionally necessary to ensure an economical production where particularly the wear at the deformation tools must be kept low because any occurring wear has a disadvantageous effect on the production costs and causes stoppage and maintenance periods.

Steel alloy for manufacturing bumpers for motor vehicles


A method for allocating emergency speech items in a mobile communication system comprising a network infrastructure (BS), a first subscriber station (MS1) connected to it, and at least one other subscriber station (MS2, MS3), the method comprising maintaining a group call consisting of speech items between the first subscriber station (MS1) and at least one other subscriber station (MS2), transmitting an emergency speech item demand (101) from the first subscriber station (MS1), which is in an emergency, to the network infrastructure (BS), and transmitting an emergency speech item grant message (102) from the network infrastructure to the first subscriber station. The method further comprises transmitting, to the at least one other subscriber station (MS2, MS3), emergency speech item information (103) containing the identifier of the first subscriber station (MS1) and indicating that an emergency speech item has been allocated (102) to the first subscriber station. In response to the emergency speech item information (103), the user of the at least one other subscriber station (MS2, MS3) is informed that an emergency speech item has been allocated (102) to the first subscriber station.

The method of the invention is intended for use particularly in PMR (Private Mobile Radio) networks, or trunking networks, which are typically company networks or public safety and security networks, in which all the channels are allocated to one or more companies or authority organizations. In addition to subscriber numbers, the subscribers in these networks have been assigned group numbers indicating to which group call group or subscriber group the subscriber belongs; thus it is possible to switch calls directed to the members of a certain group to all the subscribers of this group.
A group call is one of the key functions in a PMR network. A group call is used in various activities in which several people participate, particularly when a whole group must continuously be aware of the progress of events. A group call is a call, in which all participants can in turn talk and listen to each other. In group calls the whole group is called by one radio identity code. It is known that many radio telephone systems, particularly systems used by companies and authorities, apply group calls. As regards the radio path, a group call is typically implemented in simplex form as a point-to-multipoint call, in which speech is transmitted from one talking party to many talking parties, and a speech item is allocated to the following talking party according to a predetermined practice.
A call or a group call refers to complete exchange of information between two or more parties. A call may consist of one or more speech items. In a semi-duplex call, these speech items are sequential. A speech item refers generally to all functions relating to complete unidirectional transmission of information during a call.
The invention is applicable in mobile communication systems with either digital or analog radio paths. Analog mobile communication systems are disclosed, for example, in MPT 1327, A Signalling Standard for Trunked Private Land Mobile Radio Systems, January 1988, revised and reprinted November 1991, and MPT 1343, Performance Specification, January 1988, revised and reprinted September 1991, both issued by the Radio-communications Agency, published by the British Department of Trade and Industry.
An example of digital radio telephone or mobile communication systems is the TETRA system (TETRA=Trans-European Trunked Radio). Its implementation is disclosed in the standard prETS 300 392-2, November 1995, Radio Equipment and Systems (RES); (TETRA); Voice plus Data (V+D) Part 2: Air interface, ETSI, 579 pages. In this system, the allocation of speech items is controlled by a switching and management infrastructure (SwMI) through base stations connected to it. When the operation of a switching and management infrastructure and base stations is referred to, only the term `base station` will usually be employed hereafter for reasons of simplicity. The allocation of speech items in point-to-multipoint operation is thus controlled by a base station, which typically grants speech items on the basis of the requests made by mobile stations (MS). In this arrangement, a mobile station cannot transmit speech without a permission given by the base station.
Particularly in security services, a user of a mobile station may get into an emergency or some other situation requiring urgent communication or priority connections. To this end, the user of a mobile station may, when requesting a speech item, define the importance or urgency of the speech item in a speech item demand message, for instance by means of a four-step scale. The highest two values of the scale are defined as pre-emptive, i.e. the base station may force a mobile station transmitting at that moment to stop the transmission and allocate a speech item to the mobile station that requested a more urgent speech item.
The TETRA standard further defines talking party identification (SS-TPI), by means of which the identifier of the talking party, e.g. the subscriber number or a short character sequence, is shown to the other participants in a group call in order to identify the talking party or the talking party's function. This supplementary service is described in the standard prETS 300 392-10-3, September 1994, Radio Equipment and Systems (RES); (TETRA); Voice plus Data (V+D) Part 10: Supplementary services stage 1 Part 10-3 Talking Party Identification, ETSI, 16 pages. The corresponding operation may be implemented as only a part of the complete talking party identification supplementary service: the basic operation of the service, i.e. indicating the identifier, can be used without a subscription agreement or without identifier contents defined directly by the user.
Furthermore, the TETRA standard prETS 300 392-2, November 1995, Radio Equipment and Systems (RES); (TETRA); Voice plus Data (V+D) Part 2: Air interface, ETSI, particularly item 126.96.36.199, U-STATUS, defines a status message service, by means of which a mobile station can send one of predetermined status messages to the other participants in a group call, for example. At present, the standard defines one type of status information, "emergency", in addition to which the user or the network operator may define other types of status information.
In the case of an emergency group call, it may be difficult for other subscribers to distinguish between the speech items of subscribers in an emergency and those of the other subscribers. The subscriber who started the call cannot always be unambiguously considered to be in an emergency; it is also possible that several participants in the call are in an emergency or that the call has been started by another subscriber, whereby the emergency call begins only when the subscriber/subscriber station in the emergency requests an emergency speech item.

Allocating emergency speech items in a mobile communication system