Brake force distribution via a combination of mechanical braking and regenerative braking techniques is described. In an example, a brake system of a vehicle can detect a braking action and can cause a first negative force to be distributed across two or more wheel assemblies associated with the vehicle. A control system of the vehicle can send a command to at least a power system of the vehicle to cause the power system to affect a second negative force on a first wheel assembly and a positive force on a second wheel assembly to cause an uneven distribution of brake force between the first wheel assembly and the second wheel assembly. As a result, a combined net braking force is applied to the front wheels—the wheels with the most grip—and a reduced net braking force to is applied to the rear wheels to prevent rear-wheel lock-up.

Brake force distribution varies an amount of force that is applied to the brake at each wheel of a vehicle based on road conditions, speed, loading, etc. Current techniques for vehicles with hydraulically actuated brakes utilize differences in the static sizing of vehicle components (e.g., calipers and rotors associated with a rear wheel assembly are generally smaller than calipers and rotors associated with a front wheel assembly) and pressure reducing valves that are mechanically and/or electronically controlled to facilitate brake force distribution. An example of mechanically controlling brake force distribution can include a brake proportioning valve for a rear wheel assembly that reduces the hydraulic pressure supplied to the rear brakes in comparison to the front brakes. Examples of electronically controlling brake force distribution can include electronic brake force distribution (EBD) systems and/or electronic stability control (ESC) systems.


A solid state microwave generator is utilized as an excitation source for material/ plasma processes. The invention provides very close precise control of the solid state device's power levels to control the ultimate power output and frequency which control is not readily possible with vacuum tube devices. Utilizing the concepts of the invention the total power generated by the system may be easily varied and, further, the power may be easily monitored and used to control other device parameters such as frequency and the like. Because of the degree of control possible within the overall process system of the invention any measurable physical property of the process such as temperature, power, color (e.g., optical pyrometer), or the like that can be monitored and converted to a control signal can be utilized by the present system to carefully control the overall process conditions. These control features are lacking in currently available vacuum tube microwave devices. It is also probable that the overall cost of the solid state based microwave power generators systems will be far less than that of comparable tube type microwave generators.

Materials and plasma processes continue to put demands on excitation methods. Recently, the high frequency excitation that is in the microwave region 300 MHz to 1,000 GHz has demonstrated the production of unique conditions for materials and plasma processes. For example, plasmas excited by microwaves can exist under conditions not easily achieved by other methods from about 10.sup.-3 Torr to greater than atmospheric pressure. Coupled with magnetic fields, an Electron Cyclotron Resonance (ECR) region can be achieved producing intense plasmas in the range of from 10.sup.-2 to 10.sup.-7 Torr
Microwave power is very useful for generating plasmas for several reasons. It is a very efficient source of power for the free electrons. The time average power absorbed by these electrons is proportional to the electron density and the effective electric field squared. The effective electric field has a maximum value when the frequency of the power source equals the effective electron collision frequency. (Refs. 1 and 2) For gases typically used in plasma processing this electron collision frequency is in the microwave region of the spectrum. Most current plasma processing techniques (etching and deposition) currently use a frequency of 13.56 MHz, e.g., Diode sputtering, Reactive Ion Etching, etc.. For microwave radiation the frequency is a few hundred to several thousand times this. The frequency commonly used in microwave plasma processing is 2.45 GHz. 2.45 GHz is one of the designated Industrial Scientific Medical (ISM) oven heating frequencies. This is the frequency that is used in most commercially available home microwave ovens. Power supplies that operate at this frequency are readily available. They make use of a microwave tube called a magnetron to generate microwave energy. For a given power input, microwaves result in a greater electron density in the plasma than RF plasmas due to the frequency effects. Since the plasmas are almost neutral, this results in a higher ion density. This higher ion density results in higher processing rates, i.e., higher deposition and etching rates.
Another advantage of microwave processing is related to how the power is coupled to the plasma. Although there are many different ways of coupling microwave power to a plasma, (Ref. 3 and the references cited therein) they have one useful feature in common. The metal electrodes of the applicator are usually external to the vacuum system containing the plasma. The microwave power is coupled through a dielectric medium such as fused quartz or sapphire. This results in less contamination of the plasma and the parts being processed by the metal electrodes usually used with lower frequency processes and with reactive plasmas such as oxygen, chlorine, fluorine and the like. In addition to the decreased contamination, there is the elimination of the consumption of the metal electrodes by these reactive species.
Due to higher electron densities, microwave driven plasmas are more efficient sources of radicals that are used in plasma processing. By controlling the plasma conditions, particular species of radical production may be enhanced. In general, high pressure (>10 mt) microwave discharges are good sources (i.e., high density) of radical species. (Ref. 4) Furthermore, in a microwave driven plasma, the temperature (energy) of the neutral gas component of the plasma can be much higher than in the more conventional lower frequency plasmas. Mechanisms, such as viscous heating of the neutral species by the energetic electrons, can result in higher processing reaction rates.
In addition to the denser plasmas that can be o obtained with the higher frequency microwave power, there are resonant phenomena that occur that further enhance the coupling of microwave power to the plasma. Electron cyclotron resonance or ECR as it is called is an example of this enhanced coupling. For ECR the frequency of electron motion around a magnetic field direction (determined by the magnitude and direction of the magnetic field and the electron velocity) is the same as the frequency of the microwave radiation. For 2.45 GHz radiation a magnetic field with a magnitude of 875 Oersteds is needed. When this condition is met, there is an enhancement in the power absorbed by the free electrons of the plasma. With ECR enhancement greater than 10%, ionization is possible (Refs. 5 and 6).
In semiconductor and other plasma processing applications, intense microwave discharges are important in many applications such as deposition, etching, ashing, and ion beam generation. Many commercial systems are available to do microwave processing. Testing has shown that microwave technology has considerable advantage over existing technology. However, most existing microwave processing technology is limited in that it relies on vacuum tube technology, therefore, the limitations are imposed on the processes. Further, most plasma and material processing supplies are based on commercial home oven magnetrons operating at 2.45 GHz and are therefore limited in the applications they can be used in, due to the inherent limitations of tube technology.
Microwave solid material processing per se is becoming increasingly important as a manufacturing processing technique. These processes include heating, curing, sintering, annealing or, in general, any process that directly couples microwaves into a solid or liquid material intending to change the chemical or physical structure of that material. Microwave excitation has several advantages over conventional techniques such as thermal or chemical processing. The microwave process is usually more efficient and faster. End point detection of the microwave process is usually available by monitoring, for example, the forward and reflected power (See for example Ref. 7). These advantages result from the direct coupling of the microwave energy into the chemical bond (usually a dipolar interaction). Because the energy is coupled internal to the system, the processing takes place at a faster rate than in conventional processing. For example, microwave curing of polymers results in lower thermal stress within the material than other techniques due to the direct energy coupling which reduces processing time. Further, as the material cures, it absorbs less energy except in regions still curing.
Microwave processing systems are available commercially. These systems have significant disadvantages that limit their use in some critical applications, again, through the use of oven magnetrons. Lack of microwave electromagnetic field uniformity is one disadvantage. Although some of these systems use resonant applicators or slotted waveguides, most of these systems are little more than multi-moded microwave ovens. In these systems, for regions of low electromagnetic field, the curing will be slower than in regions of high electromagnetic fields. Another important problem that currently available tube type microwave systems have is a lack of process control. In the typical oven type system it is very difficult to tell when a process is completed and to correct for problems in the process, such as overheating.
Two different types of microwave sources, solid state and vacuum tube, are currently known in the art. There are many different types of tube sources of microwave power, e.g., magnetrons, klystrons, gyrotrons, and the like (Ref. 8). Tubes have advantages in that they are capable of operating at higher frequencies and higher power levels. Power output and to a limited extent, frequency, can be adjusted with tube type sources. This can be done with dc bias voltages and magnetic fields. However, with the magnetron source, the most readily available and least expensive of the tube-type sources (for low power levels--less than several kW), the phase cannot be controlled. The other types of tube sources can be used with phase control, but they are very expensive and operate at the higher power levels of several tens of kW and more. Their main disadvantages are that they are large, bulky, very expensive, heavy and require high voltage from the anode to the cathode and high current for a filament. Tubes are also difficult to control and have short lifetimes.
In general all microwave tubes produce microwave power by converting the kinetic energy of an electron beam in a vacuum into electromagnetic energy. Different types of tubes employ different coupling structures to do this. No coupling structure is optimal, each has its advantages and disadvantages.
For example, traveling wave tubes use a helix coupling structure to convert the energy of the electron beam into electromagnetic energy. A klystron uses a series of cavity couplers to do the same thing. A magnetron bends the electron beam into a helix using a magnetic field, then converts the kinetic energy of the electron beam into microwave energy using a series of tuned cavities mounted radially around the center axis.
All of these tubes have similar advantages and disadvantages associated with their use when compared to solid state devices. All of these tubes require a source of electrons. In all microwave tubes, this is provided by a hot filament. To drive the filament, a low voltage high current supply is required. The filament causes problem in that it is very sensitive to vibration, produces large energy losses due to its inefficient nature, contributes to the heating of the tube and limits the lifetime of the tube. In general, filament failure is one of the leading causes of tube failure.
The second requirement of microwave tubes is an electron beam moving at a considerable velocity. This places more requirements on the design and use of the tubes. To accelerate the beam and keep it from spreading, a high potential is required in a high vacuum environment. This required potential, in turn, requires the use of a high voltage, low current supply. These supplies are expensive, bulky and difficult to operate. To prevent scattering of the beam, the tube is designed as a high vacuum chamber. This contributes greatly to the cost and complexity of the microwave tube. Most tubes have getters designed into the filament structure to maintain this vacuum. However, loss of vacuum integrity is the second most common failure mode in microwave tubes.
The third requirement in a microwave tube is a coupling structure to convert the energy in the electron beam into microwave power. As mentioned earlier, these structures vary in different tubes. However, all tubes share common problems with its use. These structures are very complex and difficult to machine. Typical machine tolerance is one ten thousands of an inch. Also microwave absorption in these structures is a big source of heat in these tubes. This requires some method of cooling that adds to the cost, bulk and complexity of the tube and the overall supporting structure.
A noteworthy example of volume production economics is the home microwave oven operating at 2.45 GHz. Because of the millions of tubes produced every year, manufacturing costs have been reduced to about five dollars per tube. These problems have been somewhat alleviated by spreading development and tooling costs over the large number of tubes produced. Through iterative improvements, problems such as cooling, lifetime and size have been addressed. Although, these tubes are reasonably compact and have reasonable lifetime (e.g. 2000 hours or more), their power supplies are still bulky and require high voltage but are easy to obtain. However, the tubes are oscillators and thus operate only at 2.45 GHz. Further, since they are in effect a "diode" device, they oscillate effectively at full power. This means that there is no effective way to control the frequency or power output of these tubes.
It should be noted, in general, that a microwave tube can be built that can match the overall performance characteristics of any solid state device such as bandwidth and output power. However, it will cost approximately a thousand times more, be many times larger and heavier, consume more power, require complicated supply voltages, have limited lifetimes and have minimal controls of power output and other operating parameters such as phase, bandwidth and noise.
Except for military radar and communication applications, all microwave power generators in use currently are based on microwave tube technology. These tubes were developed during World War II and have changed very little functionally since then. These tubes can generate large amounts of power at frequencies up to the tera Hertz range. However, as stated previously, these tubes are heavy, bulky, inefficient, require high voltages and currents, expensive and have short lifetimes. All of these factors are very important in a manufacturing environment.
Because of all of the aforementioned problems with microwave tubes, most existing commercially available microwave supplies use oven magnetrons operating at 2.45 GHz. This limits the equipment and the applications it can be used in.

Solid state microwave powered material and plasma processing systems

International Business Machines Corporation


A semiconductor memory device having a circuit for preventing the operation of a test mode includes a first terminal for receiving an externally applied high voltage exceeding a power supply potential, a second terminal for receiving an externally applied test mode signal and a high voltage detector for detecting that a high voltage signal has been applied through the first terminal. A test mode signal holding circuit is responsive to the high voltage detector and holds the test mode signal applied through the second terminal. A test circuit is responsive to the test mode signal held in the test mode signal holding circuit and performs a test in the semiconductor memory device. A disabling circuit is provided to disable the high voltage detector.

1. Field of the Invention
The present invention generally relates to semiconductor memory devices and, more particularly, to a semiconductor memory device adapted for preventing a test mode operation from undesirably occurring. The present invention has particular applicability to static random access memories (SRAMs).
2. Description of the Background Art
Generally, a pre-shipment test insuring whether manufactured semiconductor integrated circuit devices can achieve desired functions or not is performed on semiconductor integrated circuit devices including a semiconductor memory or the like, before the shipment from the factory. In the pre-shipment test, a semiconductor memory, for example, is operated in an externally designated test mode. That is, some test mode signal is externally applied to the semiconductor memory, leading the semiconductor memory to carry out a test mode operation in response to the applied test mode signal.
In general, the pre-shipment test should be performed only in the manufacturing factories of semiconductor devices. For the user of the semiconductor device, it is not preferable for the shipped semiconductor device to be operated in the test mode for the pre-shipment test. However, depending on the case, the test mode operation may be caused unfavorably. In the following description, the explanation will first be made with a semiconductor memory on the reason for this unfavorable test mode operation being caused.
FIG. 6 is a block diagram of a static random access memory (hereinafter referred to as a "SRAM") showing a background of the present invention. Referring to FIG. 6, a SRAM 101 includes a plurality n of memory blocks BK1 to BKn and a block selector circuit 8 for selecting a memory block to be accessed. One of the memory blocks BK1 to BKn, for example, memory block BK1 includes a memory cell array 11 provided with memory cells arranged in rows and columns (not shown), a bit line loading circuit 171, a multiplexer 21 for selecting a bit line pair to be accessed, a write buffer 31 for data writing and a sense amplifier 41 for data reading. Similar circuit configurations are provided in other memory blocks BK2 to BKn.
The SRAM 101 further includes a row address buffer 51 receiving externally applied row address signals RA, a column address buffer 52 receiving externally applied column address signals CA, a block address buffer 53 receiving externally applied block address signals BA, a row decoder decoding row address signals RA, a column decoder 7 decoding column address signals CA, block selector 8 selecting a block to be accessed by decoding the block address signals BA, a data input buffer 55 receiving an input data signal DI, a data output buffer 56 providing an output data signal DO and a read/write control circuit 54 operating responsive to an externally applied chip selection signal/CS and a write enable signal/WE.
Next, a normal access operation will be described. When memory block BK1 is accessed, for example, the block address signal BA for designating memory block BK1 is applied to block selector circuit 8. Block selector circuit 8 decodes the applied block address signal BA to selectively activate only write buffer 31 and sense amplifier 41. In data reading, row decoder 6 activates one of word lines (not shown) in memory cell array 11 in response to the row address signal RA. Column decoder 7 selects one of the columns in memory cell array 11 in response to the column address signal CA. Therefore, a data signal stored in the memory cell designated by row decoder 6 and column decoder 7 is applied to sense amplifier 41 through multiplexer 21. The data signal amplified by sense amplifier 41 is provided as the output data DO through data output buffer 56.
In data writing, an input data DI is applied to write buffer 31 through input buffer 55. Column decoder 7 selects one of the columns in memory cell array 11 in response to the column address signals CA. Row decoder 6 activates one of the word lines in memory cell array 11 in response to the row address signal RA. Therefore, write buffer 31 writes a data signal in the memory cell designated by row decoder 6 and column decoder 7 through multiplexer 21.
FIG. 7 is a schematic diagram of a peripheral circuit of memory cell array 11 shown in FIG. 6. Referring to FIG. 7, for simplification of representation, only four memory cells 24a to 24d in memory cell array 11 are shown. Memory cells 24a and 24c are connected between bit lines 20a and 20b. Memory cells 24b and 24d are connected between bit lines 21a and 2lb.
Bit line loading circuit 171 includes NMOS transistors 25a, 25b, 26a and 26b each connected between a power supply potential Vcc and the corresponding one of bit lines 20a, 20b, 21a and 2lb, respectively. Multiplexer 21 includes NMOS transistors 27a and 27b connected between an I/O line pair 29a, 29b and bit lines 20a, 20b and also includes NMOS transistors 28b and 28b connected between an I/O line pair 29a, 29b and bit lines 21a, 2lb, respectively. I/O line pair 29a and 29b are connected to the input of sense amplifier 41 and the output of write buffer 31, respectively.
Row decoder 6 selectively activates one of word lines WL0 and WL1 connected to the memory cell to be accessed. Memory cells 24a and 24b connected to word line WL0 constitute one memory cell row. When word line WL0 is activated, the memory cell row including memory cells 24a and 24b is accessed. Column decoder 7 activates one of column selection signals Y0 and Y1 for selecting a memory cell column to be accessed. When the column selection signal Y0 is activated, for example, transistors 27a and 27b are turned on, whereby the memory cell column including memory cells 24a and 24c is accessed.
FIG. 8 is a schematic diagram of a circuit showing one example of the memory cell of FIG. 7. Referring to FIG. 8, this memory cell MC1 (for example, 24a of FIG. 7) includes NMOS transistors 41a and 4lb, resistances 43a and 43b as high resistance loads and NMOS transistors 42a and 42b as access gates.
FIG. 9 is a schematic diagram of a circuit showing another example of the memory cell of FIG. 7. Referring to FIG. 9, this memory cell MC2 includes NMOS transistors 41a and 4lb, PMOS transistors 44a and 44b acting as loads and NMOS transistors 42a and 42 as access gates.
FIG. 10 is a timing chart showing a reading operation of memory cell 24a of FIG. 7. Referring to FIG. 10, an abscissa denotes the passage of time and an ordinate denotes a potential (volt). A line ADi shows a change in input signals of row address buffer 51 column address buffer 52. A line ADo shows a change in output signals of row and column address buffers 51 and 52. A line WL shows a change in word line WL0 connected to memory cell 24a. A line I/O shows a change in the potential of I/O line pair 29a and 29b. A line SAo shows a change in the output voltage of sense amplifier 41. A line Do shows a change in the output voltage of data output buffer 56.
At time t0, the input address signal ADi is changed, whereby the output signal ADo of address buffers 51 and 52 is changed in at time t1. At time t2, a potential of word line WL0 changes, whereby a data signal stored in memory cell 24a is transmitted to bit line pair 20a and 20b. In addition, the column selection signal Y0 provided from the column decoder 7 attains a high level, whereby transistors 27a and 27b are turned on. Consequently, at time t3, potentials of I/O line pair 29a and 29b are changed.
At time t4, sense amplifier 41 is activated responsive to a control signal supplied by read/write control circuit 54, whereby the data signal is amplified by sense amplifier 41. Therefore, at time t5, the output signal Do of data output buffer 56 is changed according to the data read out from memory cell 24a.
In the foregoing pre-shipment test, an accelerated test of a semiconductor device is generally performed. The accelerated test is also performed on the SRAM by applying an environmental stress (temperature, humidity, vibration or the like) and an electric stress (voltage, current or the like) to the SRAM. That is, after the above-described stress is applied to the SRAM, data writing and data reading are performed on that SRAM. Data writing and data reading are repeatedly performed on all of the memory cells in the memory cell array, whereby a match of written data and read data is ensured. When a match of a written data and a read data is not detected, the SRAM is scrapped as defective.
In recent years, the following improvement is effected to shorten the test hour, since it takes very long time to perform the above-described data writing and data reading on each of the memory cells, and to read out a match, respectively.
Referring again to FIG. 6, the SRAM 101 further includes a match detecting circuit 5 connected to receive data signals provided from sense amplifiers 41 to 4n. When a test mode signal TM is externally applied through a spare terminal 57, match detecting circuit 5, write buffers 31 to 3n and sense amplifiers 41 to 4n are enabled. As a result, a common input signal DI can be written in the memory cells of the corresponding address in memory cell arrays 11 to 1n. In addition, data signals read out from the memory cell of the corresponding address in each of memory cell arrays 11 to n can be simultaneously applied to match detecting circuit 5 through sense amplifiers 41 to 4n. A signal showing a match detection result is provided through data output buffer 56 in the test mode.
During the period of the application of the test mode signal TM, the row address signals RA and the column address signals CA are repeatedly applied, the data signal is written in the memory cell of the corresponding address in each of memory cell arrays 11 to 1n, and the stored data signals are read out. In match detecting circuit 5, when a match between the written data and the read data is detected in every address, the SRAM of which is determined as "effective". Thus, since repetition of the data writing and the data reading can be performed in parallel on all of the memory cell arrays 11 to in by using match detecting circuit 5, time required for the test is reduced.
In SRAM 101 shown in FIG. 6, spare terminal 57 is employed to designate the test mode. When the SRAM does not have a spare terminal, a high voltage detecting circuit 59 shown in FIG. 11 is provided.
FIG. 11 is a block diagram of an another example of the SRAM showing the background of the present invention. Referring to FIG. 11, this SRAM 102 includes high voltage detecting circuit 59 connected to the most significant terminal 58 of external terminals receiving the block address signals BA. When a test mode is externally designated, a high voltage signal HV over a power supply potential Vcc is applied through terminal 58. High voltage detecting circuit 59 provides a test mode signal TM in response to the application of the high voltage signal HV. The test mode signal TM is applied to match detecting circuit 5, write buffers 31 to 3n and sense amplifiers 41 to 4n.
Terminal 58 for receiving the most significant bit of the block address signals BA is used to designate a memory block in normal operation. In the test mode, all of the memory blocks are accessed as described above. Therefore, since the designation of the memory block is not required, terminal 58 can be used to externally designate the test mode in the test mode. That is, no problem is caused in the test mode by the application of the high voltage signal HV through terminal 58.
A similar test operation to that of the SRAM 101 shown in FIG. 6, that is a match detecting operation by the match detecting circuit 5 is repeated after the provision of the test mode signal TM from high voltage detecting circuit 59.
FIG. 12 is a block diagram showing yet another example of the SRAM showing the background of the present invention. Referring to FIG. 12, a SRAM 103 includes a high voltage detecting circuit 60 connected to a terminal 62 for receiving a write enable signal/WE, and a test mode signal holding circuit 61 connected to terminal 58 for receiving the most significant bit of the block address signals BA. When the test mode is externally designated, the high voltage signal HV is applied through terminal 62. High voltage detecting circuit 60 provides a holding signal HD in response to the high voltage signal HV. Test mode signal holding circuit 61 holds a test mode signal TM' applied through terminal 58 in response to the application of the holding signal HD. The held signal is provided from test mode signal holding circuit 61 as the test mode signal TM.
In the SRAM 103 of FIG. 12, high voltage detecting circuit 60 and test mode signal holding circuit 61 are employed to externally designate the test mode. After the test mode signal TM' is once held in test mode signal holding circuit 61, the test mode signal TM is continuously applied to match detecting circuit 5, write buffers 31 to 3n and sense amplifiers 41 to 4n. Therefore, a successive application of the high voltage signal HV to terminal 62 is not necessary after the completion of the designation of the test mode. A match detecting operation by match detecting circuit 5 is performed in the same manner as the SRAM 101 of FIG. 6.
FIG. 13 is a schematic diagram of high voltage detecting circuit 60 shown in FIG. 12. Referring to FIG. 13, high voltage detecting circuit 60 includes an inverter 78 for a level determination and NMOS transistors 86, 87 and 88 connected in series between terminal 62 and the input node of inverter 78. Each of transistors 86, 87 and 88 has the corresponding gate connected to the corresponding drain to constitute a diode.
In operation, when a signal not more than the power supply potential Vcc is applied through terminal 62, inverter 78 provides the holding signal HD of a high level. Therefore, test mode signal holding circuit 61, in this case, does not hold the signal TM' applied through terminal 58. When the high voltage signal HV over the power supply potential vcc is applied through terminal 62, inverter 78 provides the holding signal HD of a low level. Test mode signal holding circuit 61 holds the test mode signal TM' applied through terminal 58 in response to the signal HD, whereby the held signal is provided as the test mode signal TM. It should be noted that high voltage detecting circuit 60 shown in FIG. 13 can also be employed as high voltage detecting circuit 59 shown in FIG. 11.
As can be seen from the foregoing description, in SRAM's 102 and 103 shown in FIGS. 11 and 12, terminals 58 and 62 having other purposes are used together to externally designate the test mode. The share of terminals 58 and 62 contributes to the prevention of the increase in the external terminal, however, it may cause the problems set forth as in the following.
Since high voltage detecting circuits 59 and 60 have a circuit configuration shown in FIG. 13, a threshold value for determining the high voltage signal HV can be frequently changed by some reasons caused in the manufacturing of the SRAMs. The potential of the high voltage signal HV should be selected higher for performing the designation of the test mode correctly, however, the supply of such high voltage easily destroys a MOS transistor. Therefore, it is necessary to select the potential of the high voltage signal HV within the range which exceeds the power supply potential Vcc but is not so high. As a result, when a threshold value for determining the high voltage is lowered by some reason caused in the manufacturing process, the designation of the test mode may be recognized despite of being not required by the user. Consequently, the test mode operation in the SRAM is started in such a case, thereby being recognized as a malfunction by the user of the SRAM.

Semiconductor memory device adapted for preventing a test mode operation from undesirably occurring


The present invention relates to a dry vacuum pump which includes multiple-tier cylinders, a gas flow path formed in a cover, and a cooling water flow path for thereby concurrently a heat of cooling rotation friction elements and a high temperature gas. In order to implement the present invention, in a dry vacuum pump, a cooling water inlet is formed in an outer surface of the rear cover, a cooling water outlet is formed in the front cover, and a cooling flow path is formed for guiding the cooling water flown through the cooling water inlet to circulate in each cylinder and intermediate cover, and in addition the cooling water flow path is formed in the inner and outer sides of the gas flow path formed in the rear cover and intermediate cover in a circular shape, and the cooling water flow paths which are formed in the inner and outer sides of the gas flow path are connected by a flow pipe which passes through the gas flow path for thereby concurrently cooling a gas flow path and the portions of a rotary shaft by a cooling water which flows through the cooling water flow path.

1. Field of the Invention
The present invention relates to a dry vacuum pump, and in particular to an improved dry vacuum pump which is capable of increasing a discharging speed of a gas compressed and discharged, adjusting a vacuum degree of a vacuum pump and concurrently cooling a friction element of a vacuum pump and a gas pumped.
2. Description of the Background Art
In a screw type vacuum pump, a pair of screws are installed in the interior of a cylinder. A gas is drawn in from a vacuum facility and is compressed as the screws are engaged and rotated. The compressed gas is discharged to the outside, thereby implementing a vacuum state within the gas pump. In order to quickly obtain a high vacuum state, a plurality of sub-vacuum pumps each having a rotor are continuously installed in such a manner that a compression ratio of the same is gradually increased in the direction of an outlet. In the above vacuum pump, a high temperature heat is generated in a screw and a bearing portion that supports a rotary shaft of a rotor. When the gas is compressed to a high pressure state, since the gas causes the surrounding components to become over-heated, various friction elements which form a vacuum pump are easily degraded and worn-out, so that a durability of the system is decreased.
In order to overcome the above problems, in the conventional vacuum pump, a cooling water flow path is formed outside a gas flow path formed in the interior of the cylinder, so that the temperature of the gas which flows through the gas flow path is cooled by cooling water which circulates through a cooling water flow path.
In the above method, the operation for cooling a high temperature compression gas which flows through the gas flow path is effective. However, since the cooling water flow path is distanced from the portion of the rotary shaft, the portions of the rotary shaft in which a high friction heat is generated due to a high speed rotation member, e.g., such as bearing, are not effectively cooled.
In addition, in the conventional vacuum pump, since the screw has an one-line threaded portion, it is impossible to increase the discharging speed of the gas pumped from the vacuum pump. Since it is impossible to vary the vacuum degree of the vacuum pump based on a pumping situation, it is impossible to implement a desired performance of the vacuum pump in which a high vacuum degree must be obtained during a short pumping time.
Accordingly, it is an object of the present invention to provide a dry vacuum pump that overcomes the problems encountered in a conventional cylindrical pump housing structure.
It is another object of the present invention to provide a dry vacuum pump which is capable of increasing a discharging speed of a gas which is compressed and discharged by forming a threaded portion of a main screw in multiple portions, sequentially installing a plurality of cylinders each having a gas discharging rotor as a sub-vacuum pump in a rear end of a cylinder having a main screw for thereby adjusting a vacuum degree of a vacuum pump and forming a cooling water flow path between shafts which form a vacuum pump for thereby concurrently cooling or offsetting heat generated in a rotation friction element of a vacuum pump and a high temperature gas which is pumped.
To achieve the above object, there is provided a dry vacuum pump comprising a first cylinder and a second cylinder being installed between a front cover and a rear cover in a tier-structure; an intermediate cover being formed between the first and the second cylinders; a main screw being installed in the first cylinder for compressing and discharging a gas of a vacuum facility; a rotor being formed in the second cylinder for drawing, compressing, and discharging the gas compressed by the main screw; a gas flow path being formed between the intermediate cover and the second cylinder for compressing and discharging the gas; a motor housing engaging the front cover; a cooling water inlet being formed within an outer surface of the rear cover of the dry vacuum pump; a cooling water outlet being formed within the front cover; a cooling flow path being formed for guiding the cooling water pumped through the cooling water inlet to circulate in each cylinder and intermediate cover; wherein the cooling water flow path is formed in an inner and an outer side of the gas flow path formed in the rear cover and intermediate cover and in a circular shape; and a flow pipe, wherein the cooling water flow path which is formed in the inner and outer sides of the gas flow path is connected by the flow pipe which passes through the gas flow path for thereby concurrently cooling the gas flow path and portions of a rotary shaft by a cooling water which flows through the cooling water flow path.
In the present invention, a threaded portion of the main screw is formed with multiple threads for thereby increasing a discharging speed of the gas pumped.
In addition, a cooling water circulation hole is formed in an outer portion of the motor housing in a screw shape, and one side of the cooling water circulation hole is connected with the cooling water outlet of the front cover through a connection pipe, and the other side of the cooling water circulation hole is connected with a water pump through a cooling water flow pipe.

Dry vacuum pump with improved gas discharging speed and pump cooling


A thread tensioning device for a sewing machine, which is capable of automatically imparting, without any manual operation, a thread passing therethrough a suitable tension for the ordinary sewing, in accordance with the kind of thread as well as the thickness thereof. The device includes a pair of plate members closely confronted to each other for forming a narrow gap therebetween, being constantly urged by spring force acting at a concentrated point on one of the two members, and either one is provided with, on the inside surface thereof, a plurality of grooves formed perpendicularly to the direction of the thread running, each groove having a sharpened edge between the side surface of the groove facing the thread advancing direction and the thread engaging surface of the plate member for imparting a resistance independent of the spring force to the thread according to the surface condition thereof peculiar to each kind of threads.

In well-known thread tensioning devices in the ordinary sewing machines for imparting tension to the upper thread, the tension imparted to the thread, when the thickness or size of a thread is changed by replacement of threads, is rarely altered automatically. So it is required, for making a beautiful stitching wherein a concatenation is formed almost midway in the direction of the thickness of a work fabric to be sewed, by a well balancing or harmony of tension of an upper thread and a lower thread, to manually operate the thread tensioning device at each replacing of the upper thread for suitably adjusting the tension given to the upper thread. This adjusting operation of the device needs in addition a trial sewing for confirming whether the degree of tension is appropriate, being a time-consuming work even for a skilful operator. For the unskilled operators this adjustment operation is a far troublesome work beyond imagination.
As a device of prior art for eliminating the above-mentioned disadvantages U.S. Pat. No. 4,111,140 applied by the same applicant as this application and another person, as a co-applicant, can be cited. In the device indicated hereabove, a suitable tension can be automatically imparted to a running thread which passes through the device, for forming a good looking stitches in an ordinary sewing operation, in accordance with the thickness of the thread. This prior art is very effective, so far as the simplification problem of an automatical adjustment of the thread tension is concerned. This inventor came across a new problem during his strenuous experiments for realizing the above identified invention into the production line, that is a problem which is concerned to an adjustment of tension in accordance with the variation of the thread kind. In case of changing the kind of threads in the known upper thread tensioning devices of the ordinary sewing machines, it is a well-known fact that the tension given to the thread must be adjusted by all means even when the thickness of the thread is identical. With the device disclosed in the above U.S. Pat. No. 4,111,140 the situation is the same, i.e., an adjustment is needed at the replacement of threads of different kinds, while no adjustment is required at the replacement of threads of different thickness. True simplification or provision of a handy device for thread tensioning can be realized only by solving this problem, that is providing a tensioning device capable of automatical tension adjustment not only for the thread charge between different thickness but also for the thread change between different kind.

Thread tensioning device for a sewing machine


A fiberoptic endoscope scanning system with multiple scanning modes. The first mode is a multifiber scanning along its longitudinal axis and a second scanning mode is a chromatic scan comprising a prism and/or grating at the distal end of the endoscope. The multiple scanning modes result in superior improvement in the image scan. The superior improvement in the clarity of the image scanned.

The transmission of light through thin fibers of which fiber glass or plastics has resulted in a variety of instruments for the visualization of otherwise inaccessible organs and tissues inside the human body. Such instruments are broadly referred to as endoscopes and have been useful in the diagnosis and treatment of, for example, gastro intestinal and respiratory diseases.
Fiberoptic endoscopes were first introduced about thirty years ago. Although they have gained wide acceptance where flexibility is required, medical personnel still prefer to use rod lenses or other alternatives. The reason being that they are annoyed by the fixed mosaic structure of a fiberoptic image. Also in most applications, the resolution of present fiberoptic endoscopes is generally inferior to other alternatives.
It is known in the art to scan with fiberoptics. If a multifiber is rotated, a concentric noise pattern is superimposed on the image. If the multifiber is not moved, a mosaic-like noise pattern is superimposed on the image.
In my issued U.S. Pat. No. 5,074,642, which patent is hereby incorporated by reference in its entirety into this disclosure, a multifiber endoscope was disclosed with much improved resolution for a given diameter and which partially eliminated the fixed pattern noise typical of fiber endoscopes. However, I have found that even with rotational scanning there is still a residual fixed pattern streakiness comprising concentric circles even though the individual fibers themselves are no longer visible. Also, a small area near the axis of rotation has a very pronounced fixed pattern noise.
My issued U.S. Pat. No. 5,133,035, which patent is hereby incorporated by reference in its entirety into this disclosure, embodied a multiple-scanning multifiber assembly which substantially reduced or eliminated the noise inherent in prior art multifiber endoscopes. The multiple scanning comprised either a rotary and a chromatic scan or two rotary scans.
In the present invention, it has been discovered that a clear image is produced without a rotational scan of the multifiber. That is, both the multifiber and the prism and/or grating remain fixed.

Multifiber endoscope with multiple viewing modes to produce an image free of fixed pattern noise


An electrical terminal for making butt contact with a dome shaped contact of an electrical device comprises an elongated base plate that has a contact support at a forward end that is integrally attached to a longitudinal side of the elongated base. A resilient contact tongue is integrally attached to the contact support and extends rearwardly over the elongated base plate in cantilever fashion. The contact tongue is bow shaped in the longitudinal direction and has a curved mid span or apex portion that is arcuate in cross section for butt engaging a dome shaped contact of an electrical device.

This invention relates generally to electrical terminals and more specifically to electrical terminals having a resilient cantilevered contact section or tongue for engaging a contact of an electrical device such as a lamp bulb
U.S. Pat. No. 5,087,213 issued to James M. Drapcho et al Feb. 11, 1992 and assigned to General Motors Corporation discloses a lamp socket having feed terminals 88, 90. Each feed terminal comprises an elongated narrow base plate 96 integrally formed with a pair of laterally spaced upstanding side walls 98 and 100. A resilient cantilevered contact section 102 or tongue is reversely bent from a free end of the base plate 96 and terminates with a foot 104 which engages the base plate adjacent longitudinally spaced pairs of crimp wings 106, 110. The crimp wings 106 are attached to the stripped conductor core end of a feed cable 108 while crimp wings 110 clamp a cable seal 112 having ring type sealing ribs to the insulation jacket of the feed cable 108.
These feed terminals have a major drawback associated with the manner in which the resilient cantilevered contact tongue 102 is provided by being reversely bent from the free end of the base plate 96. This design configuration requires an extremely long blank strip for forming the feed terminal and results in considerable scrap when the feed terminal is stamped out of the blank strip. Another drawback of the contact section is that the curved mid span of apex portion of the contact tongue that engages the solder bead contact of the lamp bulb 14 is flat in cross section. This flat cross section produces low contact forces because it yields as the lamp bulb is seated in the lamp socket. The flat cross section also makes it difficult to seat the lamp bulb properly as it is rotated into position because the solder bead contacts of the lamp bulb scrape on the sharp edges of the flat cross section.
U.S. Pat. No. 4,433,888 issued to James L. Winger Feb. 28, 1984 discloses a printed circuit edgeboard connector having terminals 16 that comprise a resilient contact tongue 45 that is attached to the free end of a base plate by a perpendicular tab that is integrally attached to the respective longitudinal edges of the base plate and the contact tongue. This reduces the length of the blank strip that is needed to form the terminal substantially and likewise reduces the scrap. However, the resilient contact tongue still has a flat cross section and thus produces low contact forces. Moreover the resilient contact tongue is not suitably configured for use in a lamp bulb socket and in this regard is even less desirable than the resilient contact tongue of the Drapcho terminal discussed above Another drawback of the Winger terminal is that the open front end of the terminal and the high position of the contact tongue provide excellent possibilities for the terminals tangling with each other during handling and assembly particularly after the terminals are attached to electric cables which are then handled in large bundles.


An integrated memory structure, and associated processing method, is coupled to receive address data and control data. The memory structure includes a composite memory array having a first array portion and a second array portion which are separately addressable. The first array portion is accessed using at least some of the address data as a first address signal and the second array portion is addressed using at least some of the control data also as a second address signal. The memory structure is presented herein by way of example for a serial palette digital-to-analog (SPD) device, and incorporates indirect color mode, direct color mode, overlay color mode and cursor color mode processing in a single macro. When in direct color mode, access to the memory array is disabled and address data is transferred directly to an output of the memory structure as data out.

The most common display mode used in display systems, such as personal computers or display adapters for such computers, comprises the "indirect color mode." In this operational mode, picture element (or pixel) data contained in a display memory array is accessed to define the primary color intensity values of pixels to be displayed.
In a display system having an all-points addressable (APA) display memory, multiple bits are stored for each pixel of a display field corresponding, for example, to the screen of a display device. When operating in indirect color mode, these bits in the display memory form an index for accessing a location within a look-up table called a palette. The addressable locations in the palette contain display data defining the primary color intensity of a pixel having an index addressing that pixel palette location.
In the case of a display system controlling a color cathode ray tube (CRT), or other display device where colors are generated by mixing the primary colors red, green and blue, the pixel palette entry will contain intensity values for each primary color. If the display device requires analog signals for controlling the physical display processes, the intensity data output from the pixel palette are converted into analog signals by digital-to-analog converters (DACs) for controlling the display device, e.g., in the case of a color CRT, the color guns.
In indirect color mode, it is usual for up to eight bits to be stored for each pixel in a display memory and for these bits to be translated in a look-up table, or pixel palette, into three values which define the intensity of the red, green and blue components of the pixel. Today's standard indirect color mode is for the palette to generate eight bits each for red, green and blue, making 24 bits in all. Where the display memory comprises eight bit planes (i.e., 8 bits-per-pixel), it allows the simultaneous display of up to 256 different colors chosen from 16.8 million possible colors.
In certain other applications, referred to as "direct color mode," a pixel color may be specified directly. Conventionally, in this mode the values stored in the display memory control the display device directly via the DACs. Today's systems typically operate in either an indirect color mode, via pixel palettes, or a direct color mode, via a palette bypass. Additionally, SPD devices often support an overlay palette and a cursor palette for implementing an "overlay color mode" and a "cursor color mode," respectively. Thus, the ultimate display data fed to the DACs comprises 24 pixel data bits, consisting of eight bits for each primary color coming from four potential data sources, i.e., the pixel palettes, palette bypass, overlay palette and cursor palette. A major problem encountered when designing an SPD device is thus the complexity of the multiple display data paths that converge on a final multiplexer en route to the DACs. The problem is greatly magnified because the circuitry involved is typically running at pixel frequencies, e.g., frequencies in excess of 200 MHz, resulting in significant design challenges.
Between any two consecutive latch stages, logic and data flow functions cannot have large path delays because of the very short clock periods involved. This implies that complex logic or data flow operations must be spread over several latched stages in a "pipeline." Since all display data and data flow control must arrive synchronized to correctly generate the required display data, all paths must be the same length and therefore simple paths must be "padded" to match the length of the longest, most complex path. This results in significantly increased cell-counts, with even greater penalties incurred at higher pixel frequencies.
Large cell counts operated at very short clock periods significantly challenges the physical design and layout of the circuit's critical nets. To meet stringent, imposed timing criteria, a major effort must be expended in placement, floor planning and custom wiring stages of the design effort. Further, to ensure success, additional analysis and design interaction is often required, resulting in added design time and increased cell-count.
The present invention addresses these problems by providing an enhanced, memory structure having multiple, distinct memory array portions integrated together in a single macro which, for example, can be designed for an SPD device to accommodate indirect color mode, direct color mode, overlay color mode and cursor color mode processings to significantly improve data path timings and provide a cleaner logic interface compared with standard SPD device implementations.

Memory structure with multiple integrated memory array portions


A method and apparatus for a two-pulse solenoid embossing system implementing an amplitude feedback circuit, i.e., current monitor (48), to provide precise amplitude and timing control over two current pulses (4, 5), and thereby provide precision control over the position and velocity of the embossing system's print elements (64a, 64b). To maintain the current amplitude during the second current pulse (5), the method and apparatus alternatively switches the power on and off to the solenoid coils (55) with a frequency such that a substantially constant current amplitude is maintained in the solenoid coils (55). The embossing system provides an improved solenoid body assembly (61) including a first stack of steel laminations (93), a center block (82) and a second stack of steel laminations (81). A plunger (62) is slidably connected to the solenoid body assembly (61) by shaft (63). Cavities (79) receive dowel pins (71) which are attached to plunger (62). The cavity and dowel pin arrangement (79, 71) prevents the plunger (62) from rotating.

The present invention relates to a method and apparatus for driving and controlling an improved solenoid impact imprinter commonly used to emboss information onto a common credit card.
Automated embossing systems have found wide acceptance in the field. Two such systems are disclosed in (1) U.S. Pat. Nos. Re 27,809 to Drillick and 3,820,454 to Hencley et al. and (2) U.S. Pat. No. 3,820,455.
The present method, apparatus and improved solenoid structure builds on the invention disclosed in the application of Warwick et al., Ser. No. 204,499, hereby incorporated by reference. The Warwick application discloses a solenoid system in which the solenoid coil is energized in two stages, i.e., by a first and second current pulse. In the Warwick disclosure, as in the present invention, the first pulse is intended to bring the print elements into contact or close proximity with the material to be imprinted; the second pulse is intended to imprint the chosen material. Because the print elements are already in contact or in close proximity with the material to be imprinted when the embossing current pulse is applied, the loud impact noise of the printing elements striking the material is eliminated, thus providing an embossing operation with little noise. Using the two pulse method further reduces the velocity of the moving parts which also helps to reduce noise.
In addition to the noise problem, solenoid driven embossing systems generally encounter the problem of providing a solenoid body assembly (1) that limits heating of the solenoid structure due to eddy-current losses in the material used to construct the solenoid body assembly and (2) that enhances the durability and precision of the solenoid embossing structure. The prior art shows the use of magnetic materials such as steel for the solenoid body assembly.
In addition to other novel and patentable features, the present method, apparatus and improved solenoid structure improves on the two pulse method for energizing the solenoid coils. The present invention also provides an improved solenoid system to further enhance the durability and precision of the solenoid embossing system and to reduce eddy-current losses.

Method and apparatus for driving and controlling an improved solenoid impact printer


A system and method for handling information for use on a flight deck network on an aircraft. Information is received from a number of information sources. The number of information sources is not part of the flight deck network. The flight deck network is a certified network. It is determined whether the information is approved to be used on the flight deck network. A manner in which the information is allowed to be used on the flight deck network is also determined. Responsive to a determination that the information is approved to be used on the flight deck network, the information is sent to the flight deck network during operation of the aircraft.

1: Field
The present disclosure relates generally to aircraft flight decks and to handling the information that is used on aircraft flight decks and displayed on aircraft flight deck display systems. More particularly, the present disclosure relates to handling non-essential information from sources outside of the aircraft flight deck network for use on the aircraft flight deck during operation of the aircraft and controlling the manner in which the non-essential information is displayed on the flight deck.
2: Background
A flight deck is the area on an aircraft from which a pilot and other flight crew members control the aircraft. The flight deck is usually located near the front of an aircraft. The flight deck also may be referred to as the cockpit. In addition to a pilot, the flight crew on the flight deck during operation of the aircraft may include, for example, a copilot, a navigator, or other personnel or combinations of personnel.
The flight deck of an aircraft includes the instruments and controls that enable the flight crew to fly the aircraft. For example, the flight deck may include a number of displays. Various types of information may be displayed for use by the flight crew to operate the aircraft. For example, it is desirable that the information displayed on the aircraft flight deck includes information that may be required for use by the flight crew to operate the aircraft safely.
It is desirable that the information used by the flight crew on the aircraft flight deck is handled to ensure safe operation of the aircraft. For example, the information displayed on the aircraft flight deck may be controlled to ensure that the information displayed to the aircraft flight crew is both appropriate and accurate.
Control of the information used on the aircraft flight deck may be provided by separating the aircraft flight deck network from other data processing systems on the aircraft. This separation may be implemented by physical separation of the hardware used to implement the aircraft flight deck network from other data processing system hardware on the aircraft. For example, the aircraft flight deck network may be implemented as a local area network or other grouping of data processing resources that is physically separated from other data processing systems and networks on the aircraft. As another example, software may be used to separate the aircraft flight deck network from other aircraft network data processing systems.
The separation of the flight deck data processing network from the other aircraft network data processing systems allows the information used on the aircraft flight deck to be separated from the information used by other aircraft network data processing systems. For example, the information to be used on the aircraft flight deck may be stored in a database that is only accessible by the aircraft flight deck network during operation of the aircraft. For example, such a database may be part of the flight deck local area network that includes the flight deck display system.
The information used on the aircraft flight deck network may be further controlled by subjecting the flight deck network to a certification process. For example, information to be used on the aircraft flight deck network may be stored on a database that is accessible by the aircraft flight deck network. The flight deck network, including the database and flight deck display system, may be subject to the certification process. The certification process may be performed to verify that the information to be used on the flight deck network satisfies a number of requirements related to the appropriateness and accuracy of the information. Typically, the certification process may be conducted and granted by a regulatory authority. In some cases the certification process may be conducted by another entity.
Changes to the flight deck network, including changes for using information from new information sources or in new formats, typically may require recertification. Processes for certifying the components of the flight deck network may be time-consuming and costly. As a result, changes to the aircraft flight deck network may be delayed due to the time required for the certification process. In other cases, changes to the aircraft flight deck network may be delayed or not undertaken at all, in order to delay or avoid entirely the costs associated with the certification process.
Current methods for handling information used on aircraft flight decks that rely on certification processes and separating the flight deck network from other aircraft network data processing systems form a closed system. The inflexibility of such a system discourages system changes and, thus, may limit the information that is available to be used by the flight crew on the aircraft flight deck.
Accordingly, it would be beneficial to have a method and apparatus that takes into account one or more of the issues discussed above as well as possibly other issues.

Information handling for aircraft flight decks


An ion generator chamber, for an implantation apparatus, having its interior walls surfaces knurled or roughened so that any of the materials used in the chamber cannot deposit onto the interior wall surfaces in a size sufficiently large enough to adversely affect the operation of the chamber, if the deposits peel off the interior walls of the chamber. By limiting the size of any deposits on interior chamber walls, the invention extends the average life of the filaments used in the chamber as well as extending the average time between any necessary cleaning of the inner chamber walls thereby extending the operating life of the chamber.

This invention relates generally to charge particle beam techniques and devices for solid state device fabrication and more particularly to an ion implantation apparatus that uses an ion source chamber having a uniquely formed interior surface and longer life.
Ion implantation tools are well known to the prior art. Such tools have been and are still used in the production of semiconductor integrated circuits and other solid state devices.
Broadly speaking, these ion implantation tools are designed to generate an ion beam, accelerate it, define it and manipulate it so that the generated ions can be implanted beneath the surface of the device, e.g., the semiconductor substrate, against which the ion beam is directed. The implanted ions are thus used to alter the characteristics of the substrate.
As is well known, in such an apparatus, a selected material is introduced into an ion generation chamber or arc chamber preferably in gaseous form. In this ion generation chamber, using known techniques, the gas is energized and formed into a high density plasma from which ions can be extracted. By using suitable electrostatic and/or magnetic forces, ions of the material are extracted from the plasma, accelerated, focused by a so called charged particle optical system and directed against the surface of the solid state device, in a controlled manner, so that the ions in the beam can be controllably implanted into the solid state device where the implanted ions will create selected characteristics or effects.
More particularly, the formation of the plasma in the ion generation chamber is accomplished by introducing the selected elements or compounds, preferably in a heated gaseous form, into the chamber between a heated filament and a reflector plate and in the presence of a magnetic field. In the chamber the electrons, thermionically emitted from the filament, are further energized and cause to oscillate. These oscillating, energized elections when colliding with the gas particles will to ionize the particles and a plasma is formed. Once the plasma is formed, the positive ions can be extracted therefrom, by an extraction electrode, and formed into a beam.
The reflector and interior walls of these ion generation chambers are highly polished and therefore very smooth. Because the chamber walls are at a temperature lower that of the gaseous materials forming the plasma in the critical stages and in equilibrium states, some of the gaseous material, introduced into the chamber as well as material as well as matter sputtered from the filament will condenses and form solid deposits on the relatively cooler chamber walls. Also it should be noted that the deposition rate may be excessive if there is a change in the pressure of the source feed material which is normally in the range of 2 to 5 xcexcTorr. The polished surface of the chamber walls provides a particularly compliant environment for uniform grain growth of the deposited material. This means that such deposits are usually formed as dendrites. More over because these surfaces are highly polished, as these condensates or deposits get larger and thicker, the high temperature, in the chamber, causes the deposits to peel away from the chamber walls as large flakes. These flakes can drastically shorten the life of the chamber. For example, if a sufficiently large enough flake falls onto the coils of the filament it will reduce the amount of emitted electrons and can cause premature failure of the emitter. If the flakes are even larger, they can short circuit the filament or the reflector to the chamber walls causing a complete collapse of the generated plasma in the chamber.
Such early failures not only interrupt the work schedule, with its attendant costs, but also result in a higher scrap rate in the product being produced. As integrated circuits continue to increase in complexity, it becomes increasingly expensive for manufacturers to continue to suffer such premature failures in their ion implantation equipment. To avoid this problem, manufacturers now shorten their production runs and frequently dismantle the chambers to clean the interior chamber walls of these deposits before they can flake off and damage the equipment.
Therefore, there are compelling economic reasons to avoid early failures in the ion generation chamber due to such flakes. This will not only extend the life of the present ion generation chambers but will also extend the length of the production cycle between the necessary chamber cleaning cycles now required.
It thus becomes desirable that means be found to avoid the flaking problems now found in such ion generation chambers.
The present invention is therefore directed to a unique ion generator or arc chamber for use in an ion implantation apparatus in which the inner surface of the chamber walls is treated to prevent any condensates or deposits of the materials used in the chamber from achieving a size sufficient large enough to adversely affect the operation of the chamber, if the deposits peel of the interior walls of the chamber.
The unique ion generation chamber of the present invention accomplishes this desirable result by providing a roughened, serrated or knurled surface on the interior walls that will prevent deposited materials from growing to a size such that any flakes of such deposits that may separate from the interior walls will not adversely affect the operation of the chamber.
By limiting the size of such flakes, the invention extends the average life of the filaments used in the chamber as well as the average time between cleaning of the inner chamber walls. The present invention thus improves the efficiency of the ion implantation apparatus.
Ion generation chambers having smooth interior surfaces, as taught by the prior art, generally have a useful life of between 160 and 190 hours before the filament burns out, or gets shorted. Actual tests run with an ion generation chamber having roughened interior walls, in accordance with the present invention, were found to have useful lives in excess of 400 hours.
The present invention was particularly efficacious when the germanium based gases are used.
The invention is directed toward an ion implantation apparatus or implanter comprising an ion generation or arc chamber having inwardly facing surfaces with two electrodes in the chamber, an inlet for introducing a feed material to be ionized, an outlet for ionizing the feed material within the chamber wherein the inner surfaces of the chamber have roughened, serrated or knurled surfaces to prevent the feed material to forming flakes large enough to cause short circuits in the chamber.
Therefore, it is an object of the present invention to extend the life of filaments in ion generation chambers.
It is a further object of the invention to eliminate unnecessary cleaning of the interior walls of ion generation chambers.
It is a still further object of the invention to improve the output of ion implantation machines.
These objects, features and advantages of the present invention will become further apparent to those skilled in the art from the following detailed description taken in conjunction with the accompanying drawings wherein:


The present invention provides a composition for use in forming a white porcelain enamel coating on aluminized or galvanized steel. The composition according to the present invention includes a solids portion including a glass component and a white pigment. The glass component includes one or more glass frits including by weight from about 30% to 50% P2O5, from about 15% to about 30% Al2O3, from about 8% to about 40% X2O where X=Na and/or K, up to about 30% TiO2, up to about 12% B2O3, up to about 10% K2O, up to about 10% ZnO, up to about 8% SiO2, up to about 7% La2O3, up to about 5% Li2O, and up to about 15% F. The white pigment include TiO2. The present invention also provides a method of forming a white porcelain enamel coating on an aluminized or galvanized steel substrate that includes providing a steel substrate having an aluminized or galvanized surface, providing a composition for use in forming a white porcelain enamel coating as previously described, applying the composition to the aluminized or galvanized surface, and firing the composition to form a white porcelain enamel coating. And, the present invention also provides a section of aluminized or galvanized steel having a white porcelain enamel coating disposed thereon, with the white porcelain enamel coating exhibiting an acid resistance of AA or better according to ISO 2722, a class 1 bond adherence rating according to EN 12209, and an opacity of Lxe2x89xa794 according to the CIE L*a*b* uniform color space, where L*=116 (Y/Y0)xc2xdxe2x88x9216 for Y/Y0) 0.008856.

The present invention concerns a composition for use in forming a white porcelain enamel coating on aluminized or galvanized steel, a method of forming such a coating on a section of aluminized or galvanized steel, and a section of aluminized or galvanized steel having a white porcelain enamel coating disposed thereon.
Only a few compositions are known that are specifically intended for use in forming white porcelain enamel coatings on aluminized or galvanized steel. An example of one such prior art composition for use on aluminized steel is disclosed in EP 0 950 644 A1. Additional compositions are needed that can be used to form white porcelain enamel coating on aluminized steel. Preferably, such porcelain enamel coatings would exhibit surface properties that are similar to the surface properties of conventional white porcelain enamel coatings formed on sheet steel.
The present invention is directed to a composition that can be used to form a white porcelain enamel coating on aluminized or galvanized steel that exhibits excellent opacity and other highly desirable surface properties. The composition according to the present invention comprises a solids portion comprising a glass component and a white pigment. The glass component comprises one or more glass frits comprising by weight from about 30% to 50% P2O5, from about 15% to about 30% Al2O3, from about 8% to about 40% X2O where X=Na and/or K, up to about 30% TiO2, up to about 12% B2O3, up to about 10% ZnO, up to about 8% SiO2, up to about 7% La2O3, up to about 5% Li2O, and up to about 15% F. The white pigment comprises TiO2.
The method according to the present invention comprises providing a steel substrate having an aluminized or galvanized surface providing a composition for use in forming a white porcelain enamel coating as previously described above, applying the composition to the aluminized or galvanized surface, and firing the composition to form a white porcelain enamel coating. Preferably, the aluminized or galvanized surface is cleaned using an alkaline solution prior to the application of the composition. A white porcelain enamel coating formed according to the method of the present invention will typically have a thickness of from about 20 to about 250 microns, with a thickness of from about 40 to about 150 microns being desired. Firing is typically accomplished at a temperature below the point at which the metal coating applied to the steel substrate begins to melt, with the range of typical firing temperatures being from about 500xc2x0 C. to about 700xc2x0 C.
The invention also provides a section of aluminized or galvanized steel having a white porcelain enamel coating disposed thereon. The coating is formed by applying a composition according to the invention to an aluminized or galvanized surface of the section according to the method of the invention. A section of aluminized or galvanized steel having a white porcelain enamel coating according to the invention will exhibit an acid resistance of AA or better according to ISO 2722, a class 1 bond adherence rating according to EN 12209, and an opacity of L*xe2x89xa794 according to the CIE L*a*b* uniform color space, where L*=116 (Y/Y0)⅓xe2x88x9216 for Y/Y0 ) 0.008858.
The foregoing and other features of the invention are hereinafter more fully described and particularly pointed out in the claims, the following description setting forth in detail certain illustrative embodiments of the invention, these being indicative, however, of but a few of the various ways in which the principles of the present invention may be employed.
The composition according to the present invention is particularly well-suited for use in forming white porcelain enamel coatings on aluminized or galvanized steel such as is typically used in automotive, appliance, building material, cookware, and other applications where rust resistance is desired. Throughout the instant specification in the appended claims, the term xe2x80x9caluminized steelxe2x80x9d should be understood to mean steel that has been coated with aluminum or an aluminum alloy. Typically, sheet steel is aluminized using a dipping process, which results in an aluminum or aluminum alloy coating having a thickness of from about 10 to about 100 microns. When the composition according to the present invention is applied to an aluminum alloy surface, it is preferable for the silicon content of the aluminum alloy to be less than about 15% by weight.
Also throughout the instant specification in the appended claims, the term xe2x80x9cgalvanized steelxe2x80x9d should be understood to mean steel that has been coated with zinc or a zinc alloy. Typically, sheet steel is galvanized using a dipping process or an annealing process, which results in a zinc or zinc alloy coating having a thickness of from about 10 to about 100 microns. In the literature, such steel is typically referred to as galvanized, galvannealed, or galvalumed (steel coated with Znxe2x80x94Al alloy).
The composition according to the present invention preferably comprises a solids portion comprising a glass component and a white pigment. The glass component preferably comprises one or more glass frits. The glass frits comprising the glass component preferably provide a compositions by weight as follows:
In addition to the foregoing, it will be appreciated that the glass component can further optionally comprise minor amounts of other materials such as, for example, MoO3, SnO2, CeO2, BaO, MgO, SrO, and Bi2O3.
The glass frit or frits that comprise the glass component may be prepared utilizing conventional glass melting techniques. A conventional ceramic refractory, fused silica, or platinum crucible may be used to prepare the glass frit. Typically, selected oxides are smelted using continuous, rotary, electrical, or induction smelters at about 1100 to about 1300xc2x0 C. for about 25 to about 60 minutes. The molten glass formed in the crucible is then converted to glass frit using water-cooled rollers and milling equipment. It will be appreciated that the step of producing the glass frit is not per se critical and any of the various techniques well-known to those skilled in the art can be employed.
As noted above, the solids portion of the composition according to the invention also comprises a white pigment, which is preferably milled with the glass component. TiO2 is the most preferred white pigment, and the solids portion of the composition according to the invention preferably comprises at least about 15% by weight TiO2. It will be appreciated that other pigments and/or colorants can also be included in the composition to obtain an enamel having a desired coloring.
The solids portion of the composition according to the present invention can further comprise other mill additions such as pH buffers and texture enhancers. Suitable mill additions include, for example, KOH, NaOH, sodium metasilicate, La2O3, LiF, WO3, MoO3, ZnS, H3BO3, sodium silicate, and K2CO3.
Preferably, the glass component comprises at least about 65% by weight of the solids portion of the composition, with the white pigment and any optional mill additions accounting for the balance. More preferably, the glass component comprises about 75% by weight of the solids portion of the composition with the white pigment and any optional mill additions comprising the balance. Although milling fineness is not per se critical, the solids portion of the composition is preferably milled to a fineness of less than about 5 cc being retained from a 50 cc sample on a 400 mesh sieve.
The composition according to the invention can further comprise a vehicle. The presently preferred vehicle is water, but other vehicles commonly used with enamel compositions could be used. The amount of vehicle used will depend in large part upon the application technique being employed.
The composition according to the present invention can be applied using any of the conventional wet application processes, which are well-known. Suitable wet application processes include spray, dipping, flow coating, and electrophoretic deposition. The disclosures of U.S. Pat. Nos. 5,002,903, 4,085,021 and 3,841,986 are incorporated herein by reference for their teachings relative to the electrophoretic application of porcelain enamel coating compositions.
The composition according to the invention can also be applied by dry application techniques. In such circumstances, a suitable organopolysiloxane is added to the composition so that it may be applied by conventional dry application means such as a standard corona discharge gun. The disclosures of U.S. Pat. Nos. 4,110,487 and 3,928,668 are hereby incorporated by reference for their teachings relative to the dry or electrostatic application of porcelain enamel coating compositions.
Preferably, the composition is applied so as to provide a coating thickness of from about 20 to about 250 microns, and more preferably from about 40 to about 150 microns, subsequent to firing. The coating thickness is not critical, and can be varied based upon the particular application or need.
The method of forming a white porcelain enamel coating on an aluminized or galvanized surface of a steel substrate according to the present invention comprises providing a steel substrate having an aluminized or galvanized surface. Preferably, the aluminized or galvanized surface has a thickness of from about 10 to about 100 microns and is cleaned using an alkaline solution prior to the application of the enamel composition. The method according to the present invention also comprises providing an enamel composition as previously described above, applying the composition to the aluminized or galvanized surface, and firing the composition to form a white porcelain enamel coating.
Firing of the composition is typically accomplished at a temperature within the range of from about 500xc2x0 C. to about 700xc2x0 C. Preferably, firing is accomplished at a temperature of from about 570xc2x130xc2x0 C. for about 4 to about 6 minutes. Firing temperature and times are not per se critical to the invention, but firing should be accomplished below the point at which the metal coating applied to the steel substrate begins to melt.
The present invention also provides a section of aluminized or galvanized steel having a white porcelain enamel coating disposed thereon. The white porcelain enamel coating is formed by applying a composition according to the invention as previously described above to an aluminized or galvanized surface of a section of aluminized or galvanized steel and firing the composition. A section of aluminized or galvanized steel having a white porcelain enamel coating disposed thereon according to the invention will exhibit an acid resistance of AA or better according to ISO 2722 and a class 1 bond adherence rating according to EN 12209. Such a section of aluminized or galvanized steel will also exhibit an opacity of L*xe2x89xa794 according to the CIE L*a*b* uniform color space, where L*=116 (Y/Y0)⅓xe2x88x9216 for Y/Y0) 0.008856.
The following examples are intended only to illustrate the invention and should not be construed as imposing limitations upon the claims;

White enamel for aluminized or galvanized steel


Disclosed herein are compositions of tricarbazole triazolophane (tricarb) of Formulas (I), (II) and (III):

1. Technical Field
The present disclosure relates to macrocycle structures having triazole-carbazole units configured to bind large anions.
2. Description of Related Art
Considerable interest exists for removing hazardous chemical ions from the environment, such as large anions. Large anions are hard to bind and present significant environmental hazards. Few examples of charge-neutral chelators exist that can bind larger anions like these with such high affinities. For example, perchlorate (ClO4−) is a large anion by-product of munitions and jet propulsion that is an acute environmental hazard as it accumulates in waterways such as the Colorado River. Perchlorate presents a human health risk as it interferes with thyroid hormone biosynthesis and thus impacts how energy is managed in the body. Current approaches to removing ClO4− make use of ion-exchange resins, either single-use or recyclable, and each has its pros and cons. But, they share issues with the level of ClO4− that can be removed (the actual value of the cleaned water efflux from the ion-exchange beds is sometimes below the limit of detection). There is a need for new reagents to allow detection and removal of ClO4− to lower levels in efflux water.
In certain research and industrial applications with ion-exchange processes, the unwanted removal of sulfate that competes with adsorption sites to lower the ClO4− capacity of the ion-exchange resin. Furthermore, those exchange resins rely upon cationic sites for exchanging anions for ClO4−. Thus, it has not been possible to use neutral organic molecule receptors that are capable of chelating anions like ClO4−. Such organic molecule receptors that are specifically designed for large anions like ClO4− have not been targeted. This situation is likely a result of the long-accepted idea that such anions are only weakly coordinating (M. R. Rosenthal, J. Chem. Ed. 1973, 50, 331-335). Thus, there is a need for new compounds with a variety of chemical sequences to exquisitely tune the properties or usage for binding large anions like ClO4− Furthermore, most anion-capture receptors are molecules that do not organize into thin films, which might offer certain advantages as an absorbant or sensory material.
Shape persistent macrocycles are attractive multifunctional molecules bearing inner cavities to bind guests (such as the aforementioned large anions) and outer surfaces to direct hierarchical self-assembly. While guest recognition has a rich history, the assembly of macrocycles and the supramolecular information that needs to be encoded into their surfaces to direct their self-organization is of ongoing interest. Examples include liquid-crystalline ordering of crown ethers for ion conduction (T. Kato, N. Mizoshita, K. Kishimoto, Angew. Chem. Int. Ed. 2006, 45, 38-68), pore-forming stacks of amido macrocycles for ion transport across membranes (A. J. Helsel, A. L. Brown, K. Yamato, W. Feng, L. Yuan, A. J. Clements, S. V. Harding, G. Szabo, Z. Shao, B. Gong, J. Am. Chem. Soc. 2008, 130, 15784-15785), and organized nanostructures for organic electronics (D. Adam, P. Schuhmacher, J. Simmerer, L. Haussling, K. Siemensmeyer, K. H. Etzbachi, H. Ringsdorf, D. Haarer, Nature 1994, 371, 141-143; A. A. Gorodetsky, C.-Y. Chiu, T. Schiros, M. Palma, M. Cox, Z. Jia, W. Sattler, I. Kymissis, M. Steigerwald, C. Nuckolls, Angew. Chem. Int. Ed. 2010, 49, 7909-7912). The informed design of macrocycles therefore requires parallel consideration of multiple design criteria. These designs also benefit from building blocks that can aid macrocycle synthesis (W. Zhang, J. S. Moore, Angew. Chem. Int. Ed. 2006, 45, 4416-4439).

Macrocycle with repeating triazole-carbazole units

Abstract: wherein R of Formula (I) is selected from a group consisting of alkyl (for example, C6-C18), alkyl-substituted phenyl derivatives, and substituted glycol derivatives, among others, or a combination thereof, and R, R′ and R″ of Formulas (II) and (III) are independently selected from a group consisting of alkyl (for example, C6 to C18), alkyl-substituted phenyl derivatives, and substituted glycol derivatives, or a combination thereof. The disclosure presents examples of thin films composed of the same as well as methods of binding anions from the same.

Indiana University Research & Technology Corporation


A transmitter in a process control system transmits a pressure over a process control loop. The transmitter includes I/O circuitry, compensation circuitry and an absolute pressure sensor. The I/O circuitry transmits information over the process control loop. Compensation circuitry receives a pressure related signal and responsively controls the I/O circuitry to transmit pressure information on the loop. The absolute pressure sensor includes a cavity which deforms as the sensor deflects in response to an applied pressure. A sensor in the cavity provides the pressure related signal to the compensation circuitry in response to the deformation.

The present invention relates to the process control industry. In particular, the invention relates to a pressure sensor in a pressure transmitter.
Pressure transmitters in process applications measure pressure of a process and responsively communicate the information over a two-wire process application loop, for example a 4-20 mA current loop. Pressure sensors in transmitters typically comprise some type of a pressure responsive structure which has a deflectable diaphragm that moves in response to applied pressure. These structures can be used to measure both absolute and differential pressure. As used herein, a differential pressure sensor is a sensor which measures a relatively small pressure differential (such as that generated across an orifice in a flow tube or between two different heights in a fluid filled container) over a relatively wide absolute pressure range. In a typical prior art transmitter, to measure differential pressure, two different pressures are applied to opposing sides of the structure causing a relative deformation in the structure which is measured. Measurement of the deformation, for example, can be by measuring a change in electrical capacitance due to movement of capacitor plates carried on the structure or by change in resistance of a resistive strain gauge.
Highly accurate absolute pressure sensors have been desired. However, it has been difficult to obtain an absolute pressure sensor which can deliver an accurate output over a wide pressure range, from 0.4 psi to 4000 psi for example. It would also be desirable to measure differential pressure with two absolute pressure sensors because this is mechanically much simpler than it is to mechanically couple two pressures to a differential pressure sensor. Additionally, an over-pressure in a such a differential pressure sensor can damage the differential pressure sensor.
However, it has been difficult to obtain absolute pressure sensors with sufficient accuracy to allow differential pressures in the 0.4 psi to 40 psi range to be measured in a device which must withstand static or line pressure extremes of as much as 4000 psia. For example, 0.01% of 4 psid requires 0.00001% of 4000 psia (10.sup.-7 or 0.1 ppm).
Typical known pressure sensors used in process applications have unit-to-unit variations in sensitivity to sensed pressure as well as unit-to-unit variations in undesired responses to extraneous parameters such as temperature. This can be a particular problem when the outputs of two absolute or gauge pressure sensors are combined to provide an output representing differential pressure or when the sensor is used over a large pressure range. Additionally, mechanical stress associated with mounting the sensor to the pressure transmitter results in relatively large errors in pressure measurement.

Capacitive pressure sensor for a pressure transmitted where electric field emanates substantially from back sides of plates


Polarization controlling elements equivalent to quarter and half waveplates are constructed from sequences of variable retarder plates having fixed retardation axes. An endless polarization control algorithm is provided.

The telecommunications industry has been working with polarization adjusters, controllers, and scramblers for many years. Typical uses include: optimizing optical power transmission through polarization dependent components; detecting polarization dependence of a component (by monitoring optical power at the output of the component while methodically scanning all the polarization states at the input of the component); and curtailing polarization dependence of components and detectors (by scanning substantially all possible states of polarization and illuminating components and detectors at a rate faster than the signal sampling rate). Polarization controllers having endless control capabilities, which allow for reset free operation, are also in use in polarization mode dispersion compensators. Heismann teaches such an endless polarization controller in U.S. Pat. No. 5,212,743 issued May 18, 1993 incorporated herein by reference.
Controlling the state of Polarization (SOP) in optical fibers has long been an active research topic with many papers published in the last twenty years: T. Imai, K. Nosu, and H Yamaguchi, "Optical polarisation control utilising an optical heterodyne detection scheme", Electron. Lett., vol. 21, pp. 52-53, January 1985; T. Okoshi, "Polarization-state control schemes for heterodyne or homodyne optical fiber communications", J. Lightwave Technol., vol. 3, pp. 1232-1237, December 1985; R. Noé, H. Heidrich, and D. Hoffmann, "Endless Polarization Control Systems for Coherent Optics", J. Lightwave Technol., vol. 6, pp. 1199-1208, July 1988; W. H. J. Aarts and G. D. Khoe, "New Endless Polarization Control Method Using Three Fiber Squeezers", J. Lightwave Technol., vol. 7, pp. 1033-1043, July 1989; F. Heismann, "Integrated-Optic Polarization Transformer for Reset-Free Endless Polarization Control", IEEE J. Quantum Electron., vol. 25, pp. 1898-1906, August 1989; N. G. Walker and G. R. Walker," Polarization Control for Coherent Communications", J. Lightwave Technol., vol. 8, pp. 438-458, March 1990; and S. H. Rumbaugh, M. D. Jones, and L. W. Casperson, "Polarization Control for Coherent Systems Using Nematic Liquid Crystals", J. Lightwave Technol., vol. 8, pp. 459-465, March 1990, all of which are incorporated herein by reference. Those articles dealt with devices for polarization control, e.g. fiber squeezers, liquid crystals, rotating waveplates, or waveguide devices including electro-optical materials such as LiNbO3, and with algorithms for polarization control. The principal objective of these algorithms was to provide a polarization controller (PC) with unlimited transformation ranges. This property of being able to generate an arbitrary sequence of continuously varying polarization states is referred to as endlessness.
The transducers used as polarization control devices fall into two categories: variable retardation plates (VRP) and rotatable retarders. VRPs introduce an adjustable retardance between two orthogonal polarization components of the optic field; they are generally electrically adjustable retarders. Rotatable waveplates are linear retarders such as quarter wave plates (QWP) and half wave plates (HWP) mounted in rotary stages so their optical axis can be rotated. Devices based on LiNbO3 waveguides can fall into either category with three or more electrodes required to rotate the axis of retardation. The main difference between these two classes of device is that VRPs have a finite retardance range and rotatable waveplates can be endlessly rotated. The retardance range of a VRP is limited by the voltage range of its power supply and the device physics. VRPs such as liquid crystal cells (LC) have a maximum and minimum retardance and electro-optical modulators have practical limits to the maximum voltage. In contrast the optical axis of a waveplate can be endlessly rotated and the orientation angle can be increased or decreased without bound.
PCs based on rotatable waveplates can provide endless polarization transformations. The VRP-based PCs are generally more complex with more elements and elaborate computer-controlled drive algorithms. The lack of suitable low-cost, low-insertion-loss PCs has slowed the development of optical modules for polarization mode dispersion compensation (PMDC). LiNbO3-based PCs are quite expensive for such an application, whereas VRP-based PCs require driving algorithms that are complex for an efficient implementation. The cost and insertion loss of VRP-based PCs are more favourable than those related to LiNbO3-based PCs thereby providing motivation to explore VRP-based PC designs.
More specifically, VRPs are birefringent elements whose birefringence is varied by an externally applied voltage. The effect VRPs have on the SOP, represented as a point on the surface of a Poincaré sphere (M. Born and E. Wolf, Principles of Optics, 6th ed, Cambridge, U.K.: University Press, sixth edition, 1980, pp. 23-36, incorporated herein by reference), can be modeled by a rotation about an axis which is the fast axis of the element (D. S. Kliger, J. W. Lewis, and C. E. Randall, Polarized Light in Optics and Spectroscopy, San Diego, Calif.: Academic Press, 1997, pp. 103-152, incorporated herein by reference). For linearly birefringent VRPs the rotation axis lies on the equator of the sphere and the rotation angle equals the retardance of the device.


An insulated duct, for example for electric cables, comprises first and second co-operable members forming a duct therebetween and toggle clips to secure the first and second members together such that the first and second members are urged towards each other. Each member comprises a base of thermal insulation material and at least one wall portion of thermal insulation material extending from the base of at least one of the members. An external skin is provided on the thermal insulation material, and an internal lining is provided on the thermal insulation material. The thermal insulation material, the external skin and the internal lining of the first member are dimensioned substantially to abut against the thermal insulation material, the external skin and the internal lining respectively of the second member.

Insulated ducts for electric cables, so-called insulated cable trays, are used in situations where it is important that electric cables should not be damaged in the early stages of a fire, for example in conventional and nuclear power stations or in offshore installations. Such insulated ducts are generally installed in a multiple stage process in which the cables are first attached to a cable tray, which tray is then encased in thermal insulation material and subsequently attached to the installation. Such an installation process is both time-consuming and costly.