Reaction of a beta-aminopropionamide with an acrylic acid or its derivative provides an N-substituted acrylamide monomer having cationic substituents attached thereto. The instant reaction occurs under mild processing conditions at a temperature between about 160.degree. C. and 230.degree. C.

This invention generally relates to an improved process for making certain cationic monomers. More particularly, this invention relates to an improved process for preparing N-substituted acrylamide monomers having cationic substituents attached thereto.
Cationic monomers are desired for preparing water-soluble cationic polymers useful in a number of applications, particularly in water treatment. Many cationic monomers are available and a variety of cationic polymers result directly therefrom or by suitable modification of these polymers. In certain applications including water treatment, cationic polymers must be resistant to hydrolysis in order to provide the properties for which their cationic character is chosen. A particularly desirable class of cationic monomers for making such polymers are those described as N-substituted acrylamides having cationic substituents. These monomers and their preparation are currently well known in the art.
In U.S. Pat. No. 3,878,247 issued Apr. 15, 1975 to P. H. Moss and R. M. Gipson, there is described a non-catalytic process for the preparation of N(tertiaryaminoalkyl) acrylamides which comprises subjecting a corresponding betaaminopropionamide to a temperature of about 180.degree.-300.degree. C. and separating the N-(tertiaryaminoalkyl) acrylamide from the reaction product. It also discloses that the corresponding aminopropionamide compounds can be made by reacting at least two moles of a tertiaryaminoalkyl amine with an acrylic acid or ester compound. The process is said to provide the desired compounds in high yields with minimal back-addition or polymerization.
The reference process thermally cracks a betaaminopropionamide to provide one mole of the desired monomer and one mole of tertiaryaminoalkyl amine for each mole of beta-aminopropionamide cracked. Such processing requires extremely harsh reaction conditions to be employed and theoretically restricts the amount of desired product that can be produced in a reaction vessel during a batch reaction to one mole of cationic monomer per mole of beta-aminopropionamide charged, although in actuality somewhat less than this amount is recovered.
An alternative method for producing cationic monomers, such as cationic methacrylamide, known in the art is the thermal decomposition of N-(dialkylaminoalkyl)-2-methylbeta-alanine. As described in U.S. Pat. No. 3,652,671, issued to Barron in 1972, this process proceeds through a rearrangement mechanism by heating the starting materials to between 140.degree.-230.degree. C.
Accordingly, there exists the need for a process which can provide a greater quantity of the desired cationic monomer per reaction given equimolar amounts of beta-aminopropionamide under milder reaction conditions and without the need for the recycling of reaction products. Such a provision would fulfill a long-felt need and constitute a significant advance in the art.

Preparation of N-substituted acrylamide monomers having cationic substituents


In an embodiment, a display module comprises a temperature sensor configured to provide temperature information; a transmission interface, coupled to an external chip of the IC card; a processing module, coupled to the temperature sensor and the transmission interface, comprising: a storage device comprising an application software program; and a processing unit, coupled to the storage device, configured to be capable of executing the application software program to access data from the external chip via the transmission interface, obtaining the temperature information from the temperature sensor, and outputting a control signal according to the temperature information and data; a display driver, coupled to the processing module, configured to be capable of receiving the control signal and generating a driving signal according to the control signal; and a display film capable of displaying images, coupled to the display driver, and configured to be capable of displaying information according to the driving signal.

The approaches described in this section could be pursued, but are not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
An integrated circuit card (IC card) comprises a plastic card having an IC chip. The IC card may comprise a contacting type or a contact-less type. A contacting type IC card comprises metal contacts and a contact-less type comprises an RF transmission interface to allow an external card reader to transfer power and signals such that the card reader can communicate with the IC card.
IC cards include cards and memory cards. A card often comprises a microprocessor and an internal memory. The microprocessor is able to perform data storage operations and data security protection. The microprocessor often has the ability to access data that is stored in the card, and can process data and store the processed data into the internal memory of the IC card. For example, when the IC card is used in a stored-value application to store a balance or amount of money, the microprocessor can increase or reduce the balance after a transaction and store an updated balance in the card. A memory card is mainly utilized for data storage only, without having local processing power. Memory cards are commonly used in telephones, vending machines, etc.
Based on the data transmission mechanism that is used, IC cards may be classified into three types, contact type (based on International Standards Organization standard ISO 7816), contact-less type (ISO 14443 A/B/C), and dual interface type (both ISO7816 and ISO14443 A/B/C). The contact-type IC card may have 6 or 8 metal contacts. An external card reader may communicate with a contact-type IC card using 6 or 8 metallic contacts. The contact-less type IC card often comprises RF energy pick up coils, which allow the IC card to communicate with an external card reader via electromagnetic induction instead of metallic contacts.
Contact type IC cards are popular in the financial sector for applications such as credit cards or ATM bank cards, which comprise a secure IC chip package with a housing and card contacts in one plastic card. Contact-less IC cards are widely used in public transportation, e-purse and access control, etc.
In some applications there is a need to show a message within a contact-type IC card or contact-less type IC card, such as transaction value, balance or credit points etc. In a secure identification card application, some text message (e.g., name or work assignment) may be shown. U.S. Pat. Nos. 6,561,430, 6,454,172, and US published application 20060049263 describe an IC card having an embedded display device.
U.S. Pat. No. 6,454,172 uses a liquid crystal display (LCD) for the IC card display. To house the LCD display in the card form factor, IC card lamination is used, which involves high pressure and high temperature. Thus, the housing or support for the LCD display must be capable of surviving the IC card lamination process. Further, the completed IC card must be flexible. Microcup electrophoretic displays (EPD) from SiPix Imaging, Inc., Fremont, Calif. have better flexibility and durability suitable for an IC card with a display.
The Microcup EPD display is thin. The manufacturing process of the Microcup EPD display is a roll-to-roll process. Techniques for manufacturing Microcup EPD displays are disclosed in U.S. Pat. No. 6,930,818.
Frozen food is normally maintained within a predetermined temperature range during shipping. The food is at risk of spoilage when the food is not maintained in the predetermined temperature range. Therefore, shipping equipment requires a freezing mechanism to be established and also a temperature monitoring mechanism to be established. The freezing and temperature monitoring mechanisms are for checking to determine if the food is being maintained within the above-mentioned temperature range.

Temperature management in an integrated circuit card with electrophoretic display


A multiuser interference canceler which is used in a DS-CDMA (direct sequence-code division multiple access) communication system and is capable of preventing reception quality from being degraded. In a serial multiuser interference canceler which has cascaded blocks each having an interference canceler units (ICUs) for generating interference replica signal, preliminary demodulators for measuring reception quality of the signals of the users in the received signal are provided. If the reception quality of output signals from the preceding block is more degraded than the reception quality measured by the preliminary demodulators, then each of the interference canceler units determines that the reception quality has been degraded by an interference cancellation process in the preceding block, and controls the interference canceler unit in the preceding block to turn off the outputting of the interference replica signal.

1. Field of the Invention
The present invention relates to a DS-CDMA (Direct Sequence-Code Division Multiple Access) system which is one of CDMA communication systems, and more particularly to a multiuser interference canceler, which is used in a DS-CDMA system, for processing a received signal containing spread signals from a plurality of users to remove signals of other users from a signal of each user and thereafter decode the signal of each user.
2. Description of the Related Art
In recent years, CDMA communication systems that are resistant to interference and jamming have attracted much attention as mobile communication systems. In a CDMA communication system, a transmitting station spreads a user signal to be transmitted with a spreading code and transmits the spread user signal, and a receiving station despreads the received user signal with a spreading code which is the same as the spreading code in the transmitting station for thereby obtaining the original user signal.
In the CDMA communication system, a plurality of transmitting stations spread user signals with different orthogonal spreading codes, and a plurality of receiving stations select respective spreading codes for use in despreading the received user signals for thereby specifying the respective user signals. Consequently, a common frequency band can be used to transmit a plurality of the user signals from the transmitting stations to the receiving stations.
However, because not all spreading codes are made orthogonal to each other, the signal of a user may possibly serve as noise with respect to another user, resulting in interference. Therefore, if a plurality of users use a link with a common frequency within one cell, the signals of the users tend to interfere with each other, resulting in a reduction in the bit energy to noise ratio (Eb/No) which is the ratio of the desired reception wave power to interfering wave power. Because the Eb/No determines the quality of communications, it is necessary to attain an Eb/No having at least a certain value in order to obtain a desired quality of communications. Such an Eb/No having at least a certain value is referred to as a required Eb/No.
The number of links that can use a common frequency within one cell is limited to a number that can maintain the required Eb/No. For increasing a system capacity for subscribers, any interference between communication links must be lowered.
One proposed method of reducing any interference within cells, increasing a system capacity for subscribers, or improving the quality of communications in the DS-CDMA communication system is a multiuser interference canceling method which employs a multiuser interference canceler.
The multiuser interference canceling method is a method in which when a received signal containing the signals of a plurality of users is to be demodulated by a spreading code of a certain user, an interference replica component which is the same as a signal component other than the user is generated and subtracted from the received signal to be demodulated in a multiplicity of stages for thereby reducing interference from the other users. There are two types of multiuser interference cancelers, i.e., a serial multiuser interference canceler and a parallel multiuser interference canceler. The principles of the serial multiuser interference canceler are described in Technical Report (RC95-50) of the Institute of Electronics, Information and Communication Engineers, xe2x80x9cSequential channel estimating serial canceler using a pilot symbol in DS-CDMAxe2x80x9d, for example. Japanese laid-open patent publication No. 09-270736 (JP, 09270736, A) entitled xe2x80x9cDC-CDMA multiuser serial interference canceler devicexe2x80x9d discloses a type of serial multiuser interference canceler.
The conventional serial multiuser interference canceler disclosed in the above publication is shown in FIG. 1.
The serial multiuser interference canceler shown in FIG. 1 is designed for three users and comprises first, second, and third stages for effecting an interference cancellation process with an interference replica signal and three decoders 19a-19c. Each of the first, second, and third stages comprises three blocks. Therefore, the serial multiuser interference canceler has a total of nine blocks.
These nine blocks have respective interference canceler units (ICUs) 61a, 61b, 61c, 62a, 62b, 62c, 63a, 63b, 63c. Each of the blocks also has, in addition to the ICU, a delay memory (D) and a subtractor and/or an adder. For example, the first block of the first stage comprises an ICU 61a, a delay memory 3, and a subtractor 4, and the first block of the second stage comprises an ICU 62a, delay memories 5 and 7, an adder 8, and a subtractor 6. Each of the second and third blocks of the first stage is identical in structure to the first block of the first stage. Each of the blocks of the second and third stages, except the third block of the third stage, is identical in structure to the first block of the second stage.
Each of the ICUs 61a, 62a, 63a generates an interference replica signal which is the same as the signal component of the first user. Each of the ICUs 61b, 62b, 63b generates an interference replica signal which is the same as the signal component of the second user. Each of the ICUs 61c, 62c, 63c generates an interference replica signal which is the same as the signal component of the third user.
The arrangement of the ICU 61a, as an example of the ICUs 61a-63c, will be described below with reference to FIG. 2.
The ICU 61a comprises a plurality of despreaders xe2x88x92711-71n, a rake combiner 26, a decision unit 27, and a plurality of respreaders 721-72n. Each of the despreaders 711-71n comprises a pair of multipliers 22 and 25, an integrator 23, and a transmission path estimator 24. A received signal 1 that is supplied to the ICU 61a is multiplied by a spreading code Ca by the multiplier 22, and then integrated by the integrator 23, which produces a correlated value. The transmission path estimator 24 determines a transmission path fading vector "xgr" from the correlated value determined by the integrator 23. The multiplier 45 multiplies the correlated value from the integrator 23 by the inverse "xgr" of the transmission path fading vector "xgr" from the transmission path estimator 24 for thereby performing phase correction for the received signal.
The received signals from paths which have been corrected in phase by the multipliers 25 of the despreaders 711-71n are combined by the rake combiner 26, and the combined signal is decoded into an original symbol sequence by the decision unit 27. Since the rake combiner 26 and the decision unit 27 are of general nature in the CDMA communication system and do not have direct bearing on the operation of the multiuser interference canceler, they will not be described in detail below. However, those skilled in the art will be able to construct the rake combiner 26 and the decision unit 27 with ease.
Each of the respreaders 721-72n comprises a pair of multipliers 28 and 29. In each of the respreaders 721-72n, the multiplier 28 multiplies the original symbol sequence by the transmission path fading vector "xgr" of one of the paths to impart original transmission path characteristics to the original symbol sequence. Thereafter, the original symbol sequence is spread with the spreading code Ca by the multiplier 49. The signals from the respreaders 721-72n are combined into a chip-rate interference replica signal 81a, which is outputted from the ICU 61a.
In FIG. 2, the signal supplied from the rake combiner 26 to the decision unit 27 is branched and outputted to an external circuit. Such a signal branching arrangement is included in only the ICUs 63a, 63b, 63c in the third stage. From the ICUs 63a, 63b, 63c, the signals are supplied to the decoders 19a, 19b, 19c, respectively.
For the sake of brevity, operation of the conventional serial multiuser interference canceler shown in FIG. 1 for demodulating the signal of the first user will be described below. The signals of the other users will be demodulated in the same manner as described below.
The ICU 61a is supplied with the received signal 1, generates a signal which is the same as the signal component of the first user contained in the received signal 1, and outputs the generated signal as an interference replica signal 81a. The delay memory 3 stores the received signal 1 and then outputs the received signal 1 after having delayed it for a certain time. The time for which the delay memory 3 delays the received signal 1 is a time required for the ICU 61a to generate the interference replica signal 81a. The subtractor 4 subtracts the interference replica signal 81a from the received signal 1 outputted from the delay memory 3, and then outputs the differential signal. Therefore, the differential signal outputted by the subtractor 4 contains only the signal of the second user and the signal of the third user.
In the second block of the first stage, the subtractor 4 subtracts the signal of the second user from the signal outputted from the delay memory 3. In the third block of the first stage, the subtractor 4 subtracts the signal of the third user from the signal outputted from the delay memory 3.
Upon completion of the processing in the first stage, therefore, the interference replica signals of all the users have been subtracted from the received signal 1, leaving a residual signal, which is supplied to the first block of the second stage.
In the first block of the second stage, the adder 8 adds the interference replica signal 81a which has been delayed by the delay memory 7 for a certain time, to the residual signal from the first stage. Therefore, the output signal from the adder 8 contains only the signal component of the first user. The ICU 62a is supplied with the output signal from the adder 8, and generates and outputs an interference replica signal 82a. The output signal from the adder 8 is also supplied to the delay memory 5, which delays the signal for a certain time and outputs the delayed signal to the subtractor 6. The subtractor 6 subtracts the interference replica signal 82a from the delayed signal from the delay memory 5.
The signal outputted from the subtractor 6 after the processing in the first block of the second state is a residual signal that does not contain any signals of the users.
The same processing as described above is carried out in the second block of the second stage through the third block of the third stage.
In each of the blocks of the third stage, the ICUs 63a-63c output signals from the rake combiners 26 thereof to the respective decoders 19a-19c. The decoders 19a through 19c finally decode the supplied signals.
The signals handled in the first to third stages of the conventional serial multiuser interference canceler are all chip-rate signals.
The conventional parallel multiuser interference canceler will be described below with reference to FIG. 3. The parallel multiuser interference canceler shown in FIG. 3 is also designed for three users as with the serial multiuser interference canceler shown in FIG. 1. Those parts of the parallel multiuser interference canceler shown in FIG. 3 that are identical to those shown in FIG. 1 are denoted by identical reference numerals.
As shown in FIG. 3, the parallel multiuser interference canceler comprises first, second, and third stages, and three decoders 19a-19c. The first stage comprises a delay memory 51, three ICUs 61a-61c, an adder 57, a subtractor 54, and three adders 58a-58c. The second stage comprises a delay memory 52, three ICUs 62a-62c, an adder 59, a subtractor 55, and three adders 60a-60c. The third stage comprises a delay memory 53, three ICUs 63a-63c, an adder 64, a subtractor 56, and three adders 65a-65c.
In the first stages, the ICUs 61a-61c, which are connected parallel to each other, generate respective interference replica signals 81a-81c which are the same as the signal components of the first to third users. The interference replica signals 81a-81c are combined by the adder 57 into a signal that is subtracted by the subtractor 54 from a received signal 1 that has been delayed for a certain time by the delay memory 51. Therefore, the subtractor 54 outputs a residual signal that is free of the interference replica signals of all the users. The residual signal is then added to the interference replica signals 81a-81c in the first stage by the adders 58a-58c. The interference replica signals 81a-81c to which the residual signal has been added are supplied to the respective ICUs 62a-62c of the second stage.
The second and third stages also perform the same processing operation as the processing operation, described above, of the first stage. The decoders 19a-19c finally decode respective signals supplied from the third stage.
In the above conventional multiuser interference canceler, the interference replica signal is estimated and reproduced from the received signal, and the interference replica signal is subtracted from the received signal. Therefore, the accuracy with which the interference replica signal is reproduced significantly affects the characteristics of the interference canceler. Factors which are responsible for the accuracy with which the interference replica signal is reproduced are the accuracy of the transmission path fading vector "xgr" extracted by the transmission path estimator 24 in each ICU and the error ratio of the hard decision result carried out by the decision unit 27 after the rake combining.
The transmission path fading vector "xgr" represents an estimation of characteristics added on the transmission path of the interfering user, and the hard decision value represents an estimation of the transmitted sequence. Either one of the transmission path fading vector "xgr" and the hard decision value is closely related to the ratio of desired signal power to noise power of the received signal. As the ratio of desired signal power to noise power is deteriorated, the error of the transmission path fading vector "xgr" and the error rate of the hard decision value are rendered poorer. Therefore, the accuracy with which the interference replica signal is reproduced is also reduced. While the ratio of desired signal power to noise power may be expressed as xe2x80x9cSN ratioxe2x80x9d, xe2x80x9cSIRxe2x80x9d, xe2x80x9cEb/Noxe2x80x9d, etc., it will be expressed as xe2x80x9cEb/Noxe2x80x9d herein.
The conventional multiuser interference cancelers have a problem in that since interference replica signals are uniformly reproduced for interference cancellation even when the Eb/No is low, the reception quality is degraded in regions where the Eb/No of the received signal is low.
In the actual environments of mobile communication systems, furthermore, the reception quality is sometimes degraded by time-dependent changes due to fading of individual signals and external noise when the multiuser interference canceler is operated in regions where the Eb/No of the received signal is not significantly low.
Consequently, the conventional multiuser interference cancelers have suffered the following disadvantages:
(1) The reception quality is degraded when interference cancellation is performed in regions where the Eb/No of the received signal is low.
(2) If the received signal suffers time-dependent changes due to fading of individual signals and external noise, then the reception quality may be also degraded when the multiuser interference canceler is operated.
It is an object of the present invention to provide a multiuser interference canceler which is capable of preventing reception quality from being degraded in all operating environments.
According to a first aspect of the present invention, there is provided a DS-CDMA multiuser interference canceler for processing a received signal containing spread signals from a plurality of users to remove signals of other users from a signal of each user and thereafter decode the signal of each user, comprising a first stage comprising a plurality of series-connected blocks having respective first interference canceler units associated respectively with the users, for generating and outputting interference replica signals which are identical to signal components of the users, and respective first subtracting means for subtracting the interference replica signals from the received signal, a plurality of second stages comprising a plurality of series-connected blocks having respective adding means associated respectively with the users, for adding interference replica signals of the users generated in a preceding stage to signals from a preceding block, respective second interference canceler units for generating again interference replica signals which are identical to the signal components of the users from output signals from the adding means, and respective second subtracting means for subtracting the interference replica signals which have been generated again from the output signals from the adding means and outputting differential signals to a next block, a plurality of decoding means for decoding symbols generated in a final one of the second stages, and a plurality of preliminary demodulating means for measuring reception quality of the signals of the users contained in the received signal, each of the first and second interference canceler units comprising means for controlling an interference canceler unit in a preceding block to turn off the outputting of the interference replica signal if the reception quality of output signals from the preceding block is more degraded than the reception quality of the signals of the users which has been measured by the preliminary demodulating means.
In the above DS-CDMA multiuser interference canceler, which is of the serial type, if the reception quality of output signals from the preceding block is more degraded than the reception quality of the signals of the users which has been measured by the preliminary demodulating means, then each of the interference canceler units determines that the reception quality has been degraded by an interference cancellation process in the preceding block, and controls the interference canceler unit in the preceding block to turn off the outputting of the interference replica signal. The DS-CDMA multiuser interference canceler is therefore capable of preventing the reception quality from being degraded by an interference cancellation process.
According to a second aspect of the present invention, there is provided a DS-CDMA multiuser interference canceler for processing a received signal containing spread signals from a plurality of users to remove signals of other users from a signal of each user and thereafter decode the signal of each user, comprising a first stage comprising a plurality of series-connected blocks having respective first interference canceler units associated respectively with the users, for generating and outputting interference replica signals which are identical to signal components of the users, and measuring reception quality of the signals of the users, and respective first subtracting means for subtracting the interference replica signals from the received signal, a plurality of second stages comprising a plurality of series-connected blocks having respective adding means associated respectively with the users, for adding interference replica signals of the users generated in a preceding stage to signals from a preceding block, respective second interference canceler units for generating again interference replica signals which are identical to the signal components of the users from output signals from the adding means and measuring reception quality of the signals of the users, and respective second subtracting means for subtracting the interference replica signals which have been generated again from the output signals from the adding means and outputting differential signals to a next block, a plurality of decoding means for decoding symbols generated in a final one of the second stages, a plurality of preliminary demodulating means for measuring reception quality of the signals of the users contained in the received signal, and cancellation on/off central control means for controlling an interference canceler unit in an either one of the stages preceding the one of the second stages to turn off the outputting of the interference replica signal if the reception quality measured by the second interference canceler units in one of the second stages is more degraded than the reception quality of the users measured by the preliminary demodulating means, until the reception quality measured by all the interference canceler units in said stage becomes better than the reception quality of the users measured by the preliminary demodulating means.
In the above DS-CDMA multiuser interference canceler, which is of the serial type, all the information of the reception quality measured by the interference canceler units is supplied to the cancellation on/off central control means, which makes an appropriate decision to determine an interference canceler unit which is to turn off an interference cancellation process. Therefore, the turning on and off of the interference cancellation process in the interference canceler units in each block can adequately be controlled. The interference canceler unit controlled to turn off the outputting of the interference replica signal should preferably be one of the interference canceler units, whose reception quality is worst, in a stage preceding said stage.
According to a third aspect of the present invention, there is provided a DS-CDMA multiuser interference canceler for processing a received signal containing spread signals from a plurality of users to remove signals of other users from a signal of each user and thereafter decode the signal of each user, comprising a first stage comprising a plurality of first interference canceler units associated respectively with the users, for generating and outputting interference replica signals which are identical to signal components of the users, and measuring reception quality of the signals of the users, first adding means for adding the interference replica signals, and first subtracting means for subtracting an output signal of the first adding means from the received signal, a plurality of second stages comprising a plurality of second adding means associated respectively with the users, for adding interference replica signals of the users generated in a preceding stage to signals from a preceding stage, respective second interference canceler units for generating again interference replica signals which are identical to the signal components of the users from output signals from the second adding means and measuring reception quality of the signals of the users, respective third adding means for adding the interference replica signals generated again by the second interference canceler units, and respective second subtracting means for subtracting output signals of the third adding means from the received signal and outputting differential signals to a next stage, a plurality of decoding means for decoding symbols generated in a final one of the second stages, a plurality of preliminary demodulating means for measuring reception quality of the signals of the users contained in the received signal, and cancellation on/off central control means for controlling an interference canceler unit in an either one of the stages preceding the one of the second stages to turn off the outputting of the interference replica signal if the reception quality measured by the second interference canceler units in one of the second stages is more degraded than the reception quality of the users measured by the preliminary demodulating means, until the reception quality measured by all the interference canceler units in said stage becomes better than the reception quality of the users measured by the preliminary demodulating means.
In the above DS-CDMA multiuser interference canceler, which is of the parallel type, all the information of the reception quality measured by the interference canceler units is supplied to the cancellation on/off central control means, which makes an appropriate decision to determine an interference canceler unit which is to turn off an interference cancellation process. Therefore, the turning on and off of the interference cancellation process in the interference canceler units in each block can adequately be controlled.
Rather than simply turning off the interference cancellation process which is liable to degrade the reception quality, the output level of the interference replica signal may be reduced for making the reception quality more uniform.
The above and other objects, features, and advantages of the present invention will become apparent from the following description based on the accompanying drawings which illustrate examples of preferred embodiments of the present invention.

Multiuser interference canceler for DS-CDMA system


A grading plant with self-cleaning screen for lump materials, the screen (3) being pivotally mounted to a carriage (2) displaceable on horizontal beams (1). The screen has wheels (5) guided in tracks in the beams. Each track has a horizontal portion (11) and a curved downwards directed portion (12). The screen is in a position for discharging when the wheels (5) are in the lowermost part of the downwards directed portion. The motion of the screen (3) is exerted by a moving device consisting of a wire arrangement (7) for the backwards directed movement and a return spring (20) for the return motion, or a double-acting hydraulic cylinder (18) moving the carriage in both directions.

The invention relates to a grading plant comprising a self-cleaning screen for lump materials retaining oversize fractions compared with a predetermined material size, the screen being displaceable by means of a moving device backwards from a horizontal sorting position to a vertical discharging position, and forwards back to the sorting position, the screen being guided in tracks with a horizontal portion and a curved downwards directed portion in connection with the horizontal portion.
Such grading plants are utilized to retain oversize fractions of lump materials which are to be carried through stone crushing plants and used e.g. for levelling on building and construction sites.
The operation of crushing plants may from time to time be stopped for long periods by the jamming of too big blocks between the breaker plates. Removing of such blocks may be very work consuming and take a long time during which the production of the crushing plant will be strongly reduced. Thus, a strong demand exists to provide equipment which can sort out oversize fractions of rocks before the materials are put into the crushing plant, thereby ensuring continuous operation.
At construction sites where lump materials are taken out for later use as filling materials for levelling, road building, etc., it is desireable to be able to carry out a safe construction of such base layers by as far as possible using approximately homogeneous materials ensuring stability. By retaining undesired fractions, this may to a great extent be achieved.
U.S. Pat. Nos. 2,396,954, 2,690,840 and 3,402,816 disclose grading plants with screens pivoted upwards for discharging retained fractions. These patent specifications disclose a screen which may be pivoted about an axis at one end. This means that the distance from the place where the sorted fraction falls down to the place where the retained fraction is discharged is comparatively small. Discharging of the retained fraction demands by certain solutions a high amount of force, depending on the quantity of the fraction which is to be discharged. Discharging is effected by means of engine and mechanical transmissions or hydraulically.
U.S. Pat. No. 1,685,823 discloses a screen which is movable on wheels along a track containing a horizontal portion and a curved portion, whereby the screen is pushed until the wheels are in the curved part, whereby the retained fraction is discharged and a spring is tensioned, which spring thereupon moves the screen back to the starting position. As the entire screen with its relatively large weight is pivoted so that the center of gravity is displaced a considerable vertical distance downwards, a disproportional strong spring is required to absorb sufficient energy as to move the screen back to the correct starting position.
Norwegian Pat. No. 117 159 discloses a screen with two pairs of wheels where the pairs are guided in straight tracks forming an acute angle relative to each other. This solution gives an uncontrolled discharging of the screen, as the motion of the screen towards the discharging position starts when the weight on the protruding part of the screen exceeds a certain value, whereas the returning motion of the screen starts when the weight balance upon discharging of the retained fraction is displaced so much that the center of gravity no longer is located in the protruding part. To start the discharging motion of the screen, the materials preferably have to be put on the protruding part of the screen.
The return motion of the screens according to the two last mentioned patent specifications is not ensured to be executed quite forwards to the sorting position.


A fluid filter including a housing defining a fluid inlet and a fluid outlet and a filter element defining an upstream surface communicating with the fluid inlet and a downstream surface communicating with the fluid outlet, the filter element including at least one group of disk-like elements including at least one element of relatively fine porous material, having disposed on both sides thereof disk elements of a relatively coarse porous material, each of the at least one groups having disposed on both sides thereof a grooved spacer element.

Multiple-disk type filters generally include a housing in which the filter body within the housing is int he form of a stack of centrally-apertured, filter disks.
Back-flushable filters of various types are well known in the art for a great variety of applications. A particularly successful type of backflushable filter employing filter disks is described and claimed in the following parent of applicant: U.S. Pat. No(s). 4,026,806; 4,042,504; 4,045,345; 4,271,018; 4,295,963.


The present invention is a method for producing a light-emitting device whose p contact layer has a p-type conduction and a reduced contact resistance with an electrode. On a p cladding layer, by MOCVD, a first p contact layer of GaN doped with Mg is formed. Subsequently, after lowering the temperature to a growth temperature of a second p contact layer being formed in the subsequent process, which is 700° C., the supply of ammonia is stopped and the carrier gas is switched from hydrogen to nitrogen. Thereby, Mg is activated in the first p contact layer, and the first p contact layer has a p-type conduction. Next, the second p contact layer of InGaN doped with Mg is formed on the first p contact layer by MOCVD using nitrogen as a carrier gas while maintaining the temperature at 700° C. which is the temperature of the previous process.

1. Field of the Invention
The present invention relates to a method for producing a Group III nitride semiconductor light-emitting device, and more particularly to a method for forming a p contact layer.
2. Background Art
In recent years, there has been an expanding demand for general illumination applications of Group III nitride semiconductor light-emitting devices, and high-power light-emitting devices are being developed. Every year, the driving current is increasing with the development of high-power light-emitting devices. Therefore, the power consumption is remarkably increased due to resistance, causing reduction in light emission performance. To avoid this, the resistance of light-emitting devices must be reduced.
Most of Group III nitride semiconductor light-emitting devices currently produced are of a lateral conductive face-up type or flip-chip type. In the face-up type device, an ITO transparent electrode is formed on almost the entire top surface of the p contact layer. In the flip-chip type device, a reflecting electrode of high-reflectivity metal such as Ag or its alloy is formed on almost the entire top surface of the p contact layer. To reduce the resistance of light-emitting devices, the contact resistance between the p contact layer and the electrode may be reduced. Improved light emission performance and uniform light emission distribution can be expected by reducing the contact resistance.
In a known method to reduce the contact resistance between the p contact layer and the electrode, p-InGaN is used as a p contact layer instead of conventionally known p-GaN. InGaN has a smaller work function than GaN, and has a work function closer to that of the electrode material. Thereby, the contact resistance can be reduced. Japanese Patent Application Laid-Open (kokai) No. 2010-62254 discloses a p-type contact layer comprising a p-type first contact layer formed of p-InGaN and a p-type second contact layer formed of p-GaN in this order from and on a p electrode. Such a structure of the p contact layer can reduce the contact resistance between the p contact layer and the electrode. A method is also well known to restrain evaporation of In and improve crystallinity of InGaN by employing nitrogen as a carrier gas when forming InGaN by MOCVD.
To reduce the resistance of the device, p-type activation is required for a Group III nitride semiconductor doped with Mg. This is usually done by thermal treatment in an atmosphere containing no hydrogen.
However, this method may degrade crystallinity. A method disclosed by Japanese Patent Application Laid-Open (kokai) No. 2005-159341 is also suggested. Japanese Patent Application Laid-Open (kokai) No. 2005-159341 discloses a method for p-type activation of a Group III nitride semiconductor without degradation of crystallinity, the method comprising: forming a Group III nitride semiconductor doped with a p-type dopant in a hydrogen or ammonia atmosphere at a temperature of 1000° C. or higher, lowering the temperature by 50° C. or more to maintain at 900° C. or higher, and thereafter stopping the supply of hydrogen or ammonia to replace with an inactive gas such as nitrogen.
Even with the method disclosed by Japanese Patent Application Laid-Open (kokai) No. 2010-62254 or 2005-159341, however, difficulty is encountered in reducing the contact resistance with the electrode while achieving p-type conduction of the p contact layer formed of InGaN. The resistance of the device cannot be sufficiently reduced. Therefore, both the resistance of the p contact layer and the contact resistance with the electrode must be reduced.

Method for producing a group III nitride semiconductor light-emitting device


Light emitting devices are requiring greater switching speeds to achieve greater modulation bandwidths. The problems of intrinsic capacitance associated with conventional semiconductor heterojunction devices are reduced by the reduction of pn junction capacitance as well as the use of a semi-insulating blocking layer and a conductive substrate. Furthermore, a light absorbing layer is disposed on one side of an unetched portion of the semi-insulating material and an active layer disposed on an opposite side of the unetched portion. Also, the interface of the semi-insulating material and the active and absorbing layers are at prescribed angles that reduce back reflections to the absorbing and active layers. This arrangement reduces pumping in the absorbing region and thus reduces the lasing effect, allowing for a stable LED. The angle at the interface is determined by having the structure at a predetermined crystallographic direction and having the semi-insulating material etched to reveal a predetermined crystalline plane.

The invention of the instant application is related to U.S. patent applications Ser. Nos. 08/276,131 (abandoned); 08/572,284; and 08/338,991 (allowed). The advent of heterostructure semiconductor devices has lead to the ease in fabrication and improved characteristics of many types of semiconductor devices. The light emitting diode (LED) the subject of the present invention, is an example of a device that benefits greatly from the use of heterostructure device design. Generally, the heterostructure employed in the fabrication of an LED is a double heterostructure, in which an active region III-V semiconductor (ternary or quaternary) is sandwiched between two oppositely doped III-IV compounds. By choosing appropriate materials of the outer layers, the band gaps are made to be larger than that of the active layer. This procedure, well known to the skilled artisan, produces a device that permits light emission due to recombination in the active region, but prevents the flow of electrons or holes between the active layer and the higher band gap sandwiching layers due to the differences between the conduction band energies and the valence band energies, respectively. An example of this is shown in FIG. 1, which is an energy band diagram of an N-n-P (where N,P are indicative of materials with greater band gaps than the n-doped active region) double semiconductor heterostructure, which shows the discontinuities 2,3 in energy levels of the conduction band energy (E.sub.c) and the valence band energy (E.sub.v) at the depletion regions that create the confinement of electrons and holes in the active region 1 (The Fermi level E.sub.f, is aligned at all three materials). The minority carrier concentration (holes) in the sandwiched region can have a magnitude comparable to the majority carrier concentration in the p-doped region. Accordingly, upon application of a junction forward bias, recombination takes place in and is essentially restricted to the central region, a feature of great advantage in the LED. A further advantage stems from a structure such as that shown, is that the dielectric constant of the higher bandgap layers is lower than that of the central lower bandgap region. Accordingly, the index of refraction of the lower bandgap region is higher than that of the lower bandgap regions, and a natural dielectric slab (assuming a rectangular layer structure) waveguide is formed.
Light emitting devices can be fabricated to emit light from an edge of the active layer, or as stated above, from a surface. The devices can be either light emitting diodes or lasers. For the purposes of clarity of instruction, one particular design will be described in detail. The particular design shows an edge emitting LED on an n-type substrate. However the same principles apply for these light emitting devices on a p-type substrate. Furthermore, the active layer composition for the these devices can be either of conventional bulk material or strained or unstrained quantum well type material. An Edge Emitting Light Emitting Diode (ELED), fabricated by conventional techniques is shown in FIGS. 2-4. Turning first to FIG. 2, a p-type indium phosphide (p-InP) layer 22 is grown on substrate 21. An n-InP cladding layer 23 is grown on the layer 22, and a v-groove is etched as shown with an active region of InGaAsP grown thereafter. Then, a p-cladding layer of InP 24 followed by a p.sup.+ layer of InGaAsP contact 25 or cap layer. Then a metal contact layer 26 is deposited on layer 25. With the exception of the metal contact layer 26, these layers are grown on the substrate epitaxially. In the structure as shown, distinct advantages are realized. First, as with other conventional devices, the natural waveguide is formed by choosing the appropriate cladding and active layers. Also, a buried structure is formed which enables current confinement which results in a lower current threshold level, and reduced operating temperatures. This current confinement comes about by selective junction biasing. To be specific to the example shown, a forward bias at the active/cladding region results in emission through recombination. However, as can be appreciated, application of an electric potential to effect a forward bias from active to cladding will result in a reverse bias in the lateral pn junctions, thus electrically burying the active region and resulting in current confinement. Optical confinement is also effected by the fact that the lateral regions are of lower index of refraction than that of the active region, resulting in a guided optical wave. FIG. 3 shows a p-type substrate of InP 31 having a buried crescent active region of p-GainAsP 33 and cladding layers of n-InP 32 and p-InP 34 respectively. In the particular device shown, there is shown the interface of the cladding and substrate regions at 36 which is angled to reduce reflections thereby reducing the probability of lasing. In a device designed to be an LED, it is undesirable to have a resonant cavity capable of supporting lasing action, and this is one method used to prevent this. The blocking layer is shown as an n InP layer 37, a p In-P layer 38 and an n InP layer 39. Finally, turning to FIG. 4, the basic structure as shown in FIG. 3 is found, however, a thyristor blocking region 47 is shown that separates the active region 43 from an absorption region of material identical to that of the active region. A substrate of p-InP 41, has a layer 46 n-InP 42 grown on top and a layer of p-InP 46 layer grown on top of layer 42. The lower cladding region is shown as p-InP 44, and an upper cladding region of n-InP is shown at 40. Furthermore, a layer of p-InGaAsP 48 is identical to the active layer 43. In purpose and effect, such a structure is designed to absorb any light that is refracted at the interface 46 and propagates through the thyristor blocking layer 47. Potentially, this could effect resonating and thereby result in undesired lasing. The device shown in FIG. 4 also has a dielectric cap of SiO.sub.2 which is supposed to reduce leakage current in the absorption region from the ohmic metal contact for the device which is deposited onto the top surface. The shortcoming of this approach is that there is still current leakage through the heavily doped cap layer of n-InGaAsP. This leakage current will result in electrical pumping of the absorption region of the LED, and accordingly, lasing effects could result. In addition, this leakage current (current flow from the absorption region) reduces the actual current needed to pump the active region. Furthermore, this structure, while effective in DC applications has great shortcomings in the ever increasing switching speeds required for example in communications applications. This is due to intrinsic capacitance between the layers that make up the device. Furthermore, the layer of dielectric which is used to decrease leakage current has the adverse affect of preventing heat dissipation as well as increasing device capacitance. It is desirable to reduce the area of the layers which reduces the capacitance, as well as to increase the ability to dissipate joule heating of the device.
With the desire for higher switching speeds, particularly the desire to reduce the rise and fall times of a digital optical signal, the ill-effects of parasitic capacitance must be reduced. Examples of attempts to curb the ill-effects of parasitic capacitance can be found in related U.S. Pat. Nos. 5,003,358; 5,100,833; 5,194,399 and 5,275,968 to Takahashi, et al. incorporated herein by reference. As is disclosed in the '358 reference, a semi-insulating or insulating substrate has deposited thereon a semi-insulating layer of InP which is etched to accommodate the p and n side electrodes as well as an vertical aperture in which an active layer is grown between p and n type cladding layers. Thereby, a light emitting device is formed in the aperture. Connecting the n-type cladding to the n side electrode is a conducting n-type InP layer which is buried in a groove etched in the semi-insulating layer. This structure having the light emitting device in a relatively small and confined region reduces the intrinsic parasitic capacitance by reducing the area of the p-n junctions of the device, and thereby the capacitance which is directly proportional to the area of the p-n junction. A good understanding of the ill-effects of this parasitic peripheral pn junction capacitance is found by a review of the prior art disclosed in FIG. 5 of the '358 reference. U.S. Pat. No. 5,309,467 to Terakado, the disclosure of which is specifically incorporated herein by reference, discloses a buried stripe semiconductor laser with a semi-insulating layer on either side of the buried mesa structure. This structure enables the operation of a laser with high luminous efficiency at elevated temperatures. This reference teaches the structure to effect lasing. What is desired is an LED which is capable of operating at high frequencies and at elevated temperatures.

Semi-insulating edge emitting light emitting diode


A circuit includes a first driver, a second driver, and one or more monitor modules coupled to the first or second driver to measure slope times of the first or second driver. The circuit further includes a comparator coupled to the one or more monitor modules to compare the slope times of the first and second drivers. The circuit further includes one or more regulators coupled to the comparator and the first or second driver to regulate a slope of the first or second driver, based on output of the comparator, at most once per pulse cycle until the slope of the first or second driver reaches a target slope.

Metal-oxide-semiconductor field-effect transistors ("MOSFETs") are commonly used, alone or in combination with other transistors, as a power switching device. A MOSFET device includes a source region, a drain region, a channel region extending between the source and drain regions, and a gate structure provided adjacent to the channel region. The gate structure includes a conductive gate electrode layer disposed adjacent to and separated from the channel region by a thin dielectric layer.
When a MOSFET device is in the "on" state, a voltage is applied to the gate structure to form a conduction channel region between the source and drain regions, which allows current to flow through the device. In the "off" state, any voltage applied to the gate structure is sufficiently low so that a conduction channel does not form, and thus current flow does not occur. In the off state, the device may support a high voltage between the source region and the drain region.
Switching, or transitioning, from an off state to an on state, or from an on state to an off state, is not instantaneous. Rather, some amount of time is necessary for the voltage or current of the device to reach each state from the other, and controlling such time is difficult to achieve without extra circuit elements, known as trimming, which introduce undesirable complexity and cost into the circuit and products containing the device. Additionally, the trimming components must account for transition time dependency on temperature, topology, and even package stress. Finally, when multiple transistors are used to provide or control an output voltage or current, the voltage or current supplied undesirably fluctuates based on differentials between such times for each transistor. Among other undesirable behavior, such fluctuations cause electromagnetic compatibility ("EMC") emissions, which increases costs (due to the need for shielding) and decreases performance.

Regulating transition slope using differential output

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC


An overshoot reduction circuit within a low dropout voltage regulator eliminates an overshoot at an output terminal resulting from a transient fault condition occurring at an input or output terminal. The overshoot reduction circuit monitors to sense if there is a transient fault condition occurring at the input or output terminal and provides a Miller capacitance at the output terminal of a differential amplifier of the low dropout voltage regulator to prevent the output of the differential amplifier from being discharged to ground during the transient. A control loop circuit balances current within an active load of the differential amplifier to clamp the output of the differential amplifier to its normal operating point. When the transient fault condition ends, the output voltage of the differential amplifier is set such that a pass transistor of the low dropout regulator responds quickly to resume the regulation to reduce or eliminate the overshoot.

As is known in the art, a voltage regulator is a constant voltage source that adjusts its internal resistance to any occurring changes of load resistance to provide a constant voltage at the regulator output. FIG. 1 is a schematic diagram of a low dropout voltage regulator. The load resistance of the voltage regulator as shown is formed by the parallel combination of the equivalent series resistance RESR of the load capacitor CL and the load resistor RL.
In order to regulate the output voltage resulting from any changes is the load resistor RL, the internal resistance of the voltage regulator must be adjusted to maintain the output voltage VOUT at the desired level. To accomplish this, the output voltage is sensed by the voltage divider formed by the series resistors R1 and R2. As is known, the feedback voltage VFB is the product of the output voltage VOUT and the ratio of the resistor R2 and the sum of the series resistors R1 and R2. An error amplifier receives the feedback voltage VFB and compares it with a reference voltage VREF. The output voltage of the error amplifier AERR is an indication of the error between the feedback voltage VFB and the reference voltage VREF that is applied to gate of the PMOS pass transistor PPASS. The drain-to-source voltage (Vds) and the drain-to-source current (Ids) determine the equivalent internal resistance of the low dropout voltage regulator. As is known, the drain-to-source voltage (Vds) and the drain-to-source current (Ids) are determined by the transconductance of the PMOS pass transistor PPASS and the gate-to-source voltage (Vgs) of the PMOS pass transistor PPASS.
The dropout voltage of the low dropout regulator is normally defined the point at which the drain-to-source voltage (Vds) of the PMOS pass transistor PPASS is not changed when the gate-to-source voltage (Vgs) changes and the PMOS pass transistor PPASS is in saturation.
The size of the PMOS pass transistor PPASS is normally very large to provide the necessary current to the load resistance RL. Further the load capacitance CL and the miller capacitance of the PMOS pass transistor PPASS create a zero the right hand plane that may cause instability in the error amplifier AERR and cause oscillation in the output voltage. To alleviate the instabilities, the compensation capacitor CCOMP is placed between the gate and the drain of the PMOS pass transistor PPASS to shift the zero sufficiently high in frequency to not cause the instabilities.
In the existing low dropout regulators, a line transient at the input voltage terminal VIN may cause the low dropout regulator to go deep into dropout. When the transient is removed from the input terminal VIN, the output of the error amplifier AERR is at a voltage level such that the PMOS pass transistor PPASS is deep into triode region of operation. This causes a very large overshoot voltage level to occur at the output terminal VOUT and across the load capacitance CL and the load resistance RL. The very large overshoot voltage level can cause reliability issues for a load device forming the load capacitance CL and the load resistance RL being powered by low dropout regulator.

This patent is subject to a terminal disclaimer.

Circuits and method for controlling transient fault conditions in a low dropout voltage regulator


Systems and methods for measuring and setting grid voltages in an image forming device may include setting a first charging device of a first image forming station to a first voltage level and setting a second charging device of the first image forming station to be off; charging a charge-retentive surface with the first charging device set at the first voltage level; measuring and the charge imparted to the charge-retentive surface by the first charging device; storing the measured charge value. Systems and methods may further include repeating the setting, charging, measuring and storing steps for the first charging device for at least one additional voltage level; and determining at least one parameter of the first charging device based on the stored measured charge values for the first charging device for each voltage level.

1. Field of Invention
This invention relates generally to a dual charging system of an image forming device.
2. Description of Related Art
One method of printing in multiple colors with a color copier, a color digital copier or a color laser printer is to uniformly charge a charge-retentive surface, such as a photoreceptor belt, and subsequently expose portions of the surface to define information to be reproduced in a first color. This information is rendered visible using chargeable toner particles. The charge-retentive surface is then recharged to a uniform potential and subsequently exposed and developed either at the same image forming station or the next image forming station, if more than one station is used, to form additional color layers.
This recharge, expose and develop (REaD) process is repeated to subsequently develop images of different colors to be superimposed on the surface of the charge-retentive surface before the full color image is transferred to a support substrate, such as paper. The different colors are developed on the charge-retentive surface in an image-on-image (IOI) process. Each different image may be formed by using a single exposure device, where each subsequent color image is formed in a subsequent pass of the charge-retentive surface. Alternatively, each different color image may be formed by multiple exposure devices corresponding to each different color image during a single pass of the charge-retentive surface.
Several issues arise that are unique to the REaD image-on-image process for creating multi-color images when attempting to provide optimum conditions for the development of subsequent color images onto previously-developed color images. For example, during a recharge step, it is important to level the voltages among previously toned and un-toned areas of the charge-retentive surface so that subsequent exposure and development steps are performed across a uniformly charged surface. The greater the difference in voltage between those image areas of the charge-retentive surface previously subjected to a development and recharge step, and those bare non-developed or un-toned areas of the charge-retentive surface, the larger the difference in the development potential can be between these areas for the subsequent development of image layers on the previous layers.
Another issue that must be addressed with the REaD image-on-image color image formation process is the residual charge and the resultant voltage drop that exists across the toner layer of a previously-developed area of the charge-retentive surface. Although it may be possible to achieve a uniform voltage by recharging the previously-toned layer to the same voltage level as the neighboring bare areas, the associated residual toner voltage prevents the effective voltage above any previously-developed toned areas from being re-exposed and discharged to the same level as neighboring bare photoreceptor areas which have been exposed and discharged to the actual desired voltage levels. Furthermore, the residual voltage associated with previously-developed toner images reduces the dielectric and effective development field in the toned areas, which tends to hinder attempts to achieve a desired uniform consistency of the developed mass of subsequent toner images.
These problems become increasingly severe as additional color images are subsequently exposed and developed on the charge retentive surface. Color quality of the final reproduced image is severely threatened by the presence of the toner charge and the resultant voltage drop across the toner layer. The change in voltage due to the toned image can be responsible for color shifts, increased moire, increased color shift sensitivity to image misregistration, and toner spreading at the image edges, thus affecting many of the imaging subsystems. Therefore, it is desirable to reduce, or ideally, eliminate, the residual toner voltage of any previously developed toned images and ensure that the potential difference across each toner layer is consistent and ideally minimum.
One way to improve the consistency of charge levels between the bare charge-retentive surface and previously toned areas is to use a dual recharge system, otherwise known as a split recharge system. In a dual recharge system, an AC charging device is coupled with a DC charging device to apply a charge to the charge-retentive surface. The DC and AC charging devices are set to given charge levels that cause the charge-retentive surface to be charged to a corresponding level. Precision adjustments can be made using the AC charging device. However, the ability of charging devices to consistently charge the charge-retentive surface is difficult to determine because it is at least partially dependent upon machine-specific characteristics, including characteristics of the charging devices themselves, and because these parameters vary with time and use of the image forming machine.
Because both charging devices are running during the image forming process, it is also impossible to isolate and measure the charge on the charge-retentive surface resulting from the DC charging device, since the charge resulting from the DC charging device is masked by the charge resulting from the AC charging device. Moreover, the ability of the DC charging device to charge the charge-retentive surface is based on physical parameters within the charging device, such as spacing to the charge-retentive surface and contamination levels, and is characterized by a linear relationship between the applied grid voltage and the charge-retentive surface charge level measured by the voltage sensing device.

Systems and methods for in situ setting charge voltages in a dual recharge system


A voice-operated remote control system which transmits a remote control signal in response to a voice command has a speech recognition circuit for recognizing the voice command. The speech recognition circuit has standard pattern data storage unit for storing a plurality of standard pattern data with respect to each of voice commands. The input voice command is compared with the plural standard pattern data for accurate speech recognition.

The present invention relates to a remote control system for remotely controlling various electronic devices, and more particularly to a remote control system for remotely controlling devices such as AV (audio visual) devices by way of voice commands.
In recent years, various AV devices such as stereo sets, television receivers, cassette tape decks, video tape decks, compact disk players, laser vision disk players, or the like are equipped with remote control systems.
A remote control system has a transmitter which is usually positioned remotely from a controlled AV device. The transmitter, when operated, transmits a remote control signal, such as an infrared remote control signal, which is received by a receiver in the controlled AV device. The received remote control signal is decoded to control the AV device as intended by the remote control signal.
There has recently been developed a voice-operated remote control system which employs voice control commands instead of control commands entered through keys. The voice-operated remote control system has a microphone mounted on a transmitter for converting a voice command into an electric voice signal, and a speech recognition LSI (Large Scale Integration) circuit for generating a remote control signal which corresponds to a voice pattern represented by the voice signal. The remote control signal thus generated is transmitted to a receiver in a controlled AV device.
In conventional voice-operated remote control system, standard pattern data corresponding to voice commands given by the operator are registered in advance. When a voice command is applied for remote control, the input voice command is recognized on the basis of the registered standard pattern data.
The voice sound uttered by the operator may not necessarily be the same at all times. Features of the voice sound of the operator may sometimes vary from those at the time the operator's standard pattern data were registered. If the voice sound features vary, then pattern data of an input voice command do not coincide with the standard pattern data, and the speech recognition rate is lowered.
In order to avoid the above drawback, it is necessary to register the standard pattern data again at a suitable time. However, the process of registering the standard pattern data again is tedious and time-consuming, and makes the remote control system inconvenient to use.


A method and system for operating an inverter, which has a terminal with four conductor connectors for connection of the inverter to three outer conductors and to a neutral conductor of an AC voltage grid is disclosed. The method includes determining a connection configuration of the inverter to the AC voltage grid by actuating switching elements of a bridge circuit of the inverter to generate a zero-phase sequence system having a zero-phase sequence system current, and measuring and evaluating output currents of the inverter with respect to the zero-phase sequence system current. The method also includes identifying a presence of a connection of the neutral conductor to a conductor connector provided for connection to the neutral conductor when the zero-phase sequence system current exceeds a prescribed threshold value and identifying that the neutral conductor is not connected to the conductor connector provided for connection to the neutral conductor otherwise.

Inverters can convert electrical power of an energy generation unit from direct current to alternating current and feed it into an energy supply grid, for example an AC voltage grid, and/or feed it in directly to an electrical load for the operation thereof. Generators, in particular, can be used here as the energy generation unit, said generators generating electrical power from renewable sources, for example photovoltaic or wind generators.
An inverter can be connected to an AC voltage grid in various ways. Particularly at powers from a few kilowatts, inverters can be used that feed into a three-phase AC voltage grid by means of a three-phase output. A three-phase AC voltage grid of this kind has three so-called outer conductors or phases, which are often referred to as L1, L2 and L3. In addition, a neutral conductor (N conductor for short, or simply N) and optionally a protective conductor (PE conductor for short, or simply PE) may be present, wherein N and PE can also be embodied as a combined PEN conductor. A four-conductor grid of this kind is referred to, in particular, as a TN system and is used, in particular, in the low-voltage range, for example in distribution grids.
In contrast to a TN system, a so-called IT system does not have a neutral conductor and thus constitutes a three-conductor grid. IT systems of this kind can be used, in particular, in energy generation installations with a plurality of inverters, which are connected to a superordinate distribution or transmission grid by means of a common grid connection point. In view of the costs for installation, it may be advantageous for an operator of an extensive energy generation installation with a plurality of inverters and a correspondingly large number and lengths of lines between the inverters and the grid connection point to form a 3-conductor grid, for example an IT grid.
The operation of an inverter is dependent on the actual embodiment of the AC voltage grid to which the inverter is connected. For example, a measurement of output voltages that is necessary for regulation of the output currents of the inverter may be done between the outer conductors and a reference-ground potential, wherein the reference-ground potential can be formed by the neutral conductor, when said conductor is present and connected to the inverter. If this is not the case, another potential, for example a ground potential, is to be selected as the reference-ground potential. Furthermore, protective measures such as residual current detection can be designed differently depending on whether a flow of current through a neutral conductor is possible or not. Parameterization of the regulation of the output currents and the generation of output currents with specific properties, for example asymmetrical output currents for stabilizing the AC voltage grid, depend on the presence of a neutral conductor and the connection thereof to the inverter.
Essentially two different types of operational management procedure of an inverter are known, which depend on the specific design of the energy generation installation comprising the inverters, in particular on the specific cabling within the energy generation installation or on the specific connection of the inverter to the AC voltage grid. An inverter, which is intended to be able to be used universally, can comprise, in principle, an output terminal, which is also provided for connection to an N conductor, wherein said connection does not necessarily have to be present and, in particular, is not used when the inverter is intended to feed into a 3-conductor grid without a neutral conductor.
EP 2251702 A1 discloses a wiring test apparatus for testing the wiring of an inverter, in which the inverter is configured for connection to a low-voltage three-phase grid having conductor voltages with respect to a neutral conductor on the grid side, wherein a measuring circuit is provided to measure the conductor voltages. In the case of a missing neutral conductor connection, voltage asymmetry is created on account of an additional element, in particular a capacitor, which is connected on the output side of the inverter between a phase and the neutral conductor, said voltage asymmetry being able to be determined by measuring the conductor voltages. Consequently, a fault message can be output in the event of a missing neutral conductor connection. The additional component generates additional costs and impairs the electromagnetic compatibility of the inverter by virtue of the fact that the properties of an output filter likewise arranged on the output side of the inverter is negatively influenced.
US 2009/0296289 A1 discloses a method for identifying a fault in a converter of a motor controller, wherein the input side of the converter is connected to an AC voltage grid and the output side of the converter has a three-phase connection for a load. An input-side and/or an output-side ground fault can be detected by virtue of the fact that the inverter attempts, based on the actuation thereof, to feed in a zero-phase sequence system current to the AC voltage grid. A fault signal is emitted when a zero-phase sequence system current is detected in the phase conductors connected to the inverter. A connection of the converter to a possible neutral conductor of the AC voltage grid is not disclosed.

Inverter with identification of neutral connection


A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional logic paths within the user logic design and cyclic logic paths within the user logic design, assigning the cyclic logic paths to logic in a first portion of the programmable integrated circuit device that operates at a first data rate, assigning the unidirectional logic paths to logic in a second portion of the programmable integrated circuit device that operates at a second data rate lower than the first data rate, and pipelining the unidirectional data paths in the second portion of the programmable integrated circuit device to compensate for the lower second data rate. A programmable integrated circuit device adapted to carry out such method may have logic regions operating at different rates, including logic regions with programmably selectable data rates.

Early programmable devices were one-time configurable. For example, configuration may have been achieved by "blowing"—i.e., opening—fusible links. Alternatively, the configuration may have been stored in a programmable read-only memory. Those devices generally provided the user with the ability to configure the devices for "sum-of-products" (or "P-TERM") logic operations. Later, such programmable logic devices incorporating erasable programmable read-only memory (EPROM) for configuration became available, allowing the devices to be reconfigured.
Still later, programmable devices incorporating static random access memory (SRAM) elements for configuration became available. These devices, which also can be reconfigured, store their configuration in a nonvolatile memory such as an EPROM, from which the configuration is loaded into the SRAM elements when the device is powered up. These devices generally provide the user with the ability to configure the devices for look-up-table-type logic operations.
While it may have been possible to configure the earliest programmable logic devices manually, simply by determining mentally where various elements should be laid out, it was common even in connection with such earlier devices to provide programming software that allowed a user to lay out logic as desired and then translate that logic into a configuration for the programmable device. With current larger devices, it would be impractical to attempt to lay out the logic without such software.
Some user logic designs would be able to operate at higher clock speeds if the designs could be pipelined. However, certain user logic designs may include portions that are amenable to pipelining as well as portions that are not amenable to pipelining. Configuration software has not heretofore been well-adapted to deal with pipelining in such types of user logic designs.

Heterogeneous programmable device and configuration software adapted therefor


An adsorption process for xenon recovery from a cryogenic liquid or gas stream is described wherein a bed of adsorbent is contacted with the aforementioned xenon containing liquid or gas stream and adsorbs the xenon selectively from this fluid stream. The adsorption bed is operated to at least near full breakthrough with xenon to enable a deep rejection of other stream components, prior to regeneration using the temperature swing method. Operating the adsorption bed to near full breakthrough with xenon, prior to regeneration, enables production of a high purity product from the adsorption bed and further enables oxygen to be used safely as a purge gas, even in cases where hydrocarbons are co-present in the feed stream.

Maintaining the adsorption bed on feed until the Xe concentration at the outlet of the bed is greater than or equal to 90% of the inlet concentration, enables the process to be operated under conditions wherein oxygen can be used safely as a purge fluid for the temperature swing adsorption process. Moreover in this way, the bed can be operated under pressure and temperature conditions where other gases can co-adsorb. This serves to extend the range of process conditions useable for the inventive process, versus those of the prior art.
In U.S. Pat. No. 5,039,500 to Shino et al, as an example, discloses a process for producing high purity xenon with liquid oxygen from a main condenser of an air separation unit. In the process of Shino et al, the liquid oxygen stream, containing xenon, krypton and hydrocarbons is first gasified before being contacted with an adsorbent at a preselected temperature and pressure so as to adsorb on the adsorbent xenon, but not oxygen, krypton or hydrocarbons contained in the oxygen stream. The adsorbent is regenerated using a purge gas and by heating. The basic adsorption process can be augmented by other unit operations to increase the purity of the xenon, including a solid-gas separating column, a catalyst column, a moisture and CO2 removal column and so on. A disadvantage of this process is that the liquid feed stream from the cryogenic plant must be converted to a gas stream prior to being contacted with the adsorbent bed. Moreover from claim 1, the adsorption process must be operated under preselected temperature and pressure conditions such that xenon is adsorbed and the krypton, hydrocarbon and oxygen are not. This places limitations on the operating conditions for the process. From embodiment 1 (column 3, lines 20-48) however, it appears this approach of identifying pressure and temperature conditions, where xenon is adsorbed and oxygen, krypton and hydrocarbons are not, was only partially successful. In this embodiment, a silica gel adsorbent was contacted until Xe breakthrough was achieved with a gasified stream at −170° C. containing 31 ppm xenon, 70 ppm krypton and 38 ppm methane and low concentrations of other hydrocarbons in an oxygen matrix. After the gas was heated to 120° C. to regenerate the adsorbent, the effluent concentrations became 1.4% xenon, 0.14% krypton, 0.066% hydrocarbon and balance oxygen. The fact that the krypton, and hydrocarbons became significantly enriched beyond their feed concentration, in the same way as the xenon, suggests that these components were also adsorbed under the conditions used for the adsorption feed step, in an apparent contradiction with the process as claimed. It is likely therefore that due to this co-adsorption of other components, especially the hydrocarbon components and their enrichment by adsorption, that later embodiments employ a catalyst column to remove these hydrocarbons and a CO2 and moisture removal column thereafter, to remove the products of hydrocarbon combustion over the catalyst. By contrast, in the present adsorption process the feed stream can be liquid or gas phase and during the purging and heating steps, employed to recover the xenon product, the concentration of krypton and hydrocarbons is much less than their concentrations in the feed. In the art of Shino et al, as clarified in embodiment 1, 38 ppm methane and low concentrations of other hydrocarbons in the feed, became 0.066% or 660 ppm during the heating step used to regenerate the adsorbent bed. This is an enrichment of approximately 17 times the concentration of hydrocarbons in the feed.
U.S. Pat. No. 4,874,592 also to Shino et al, discloses an adsorption-desorption process, wherein xenon is concentrated from a vented liquid oxygen stream by successive stages of adsorption and desorption and wherein the hydrocarbons are removed catalytically from the xenon gas stream recovered after the first adsorption stage. From examples 1 and 2 and as shown in FIGS. 1 and 2 of U.S. Pat. No. 4,874,592, the vented rare gas containing stream from a rectifying column, is introduced into a first adsorption column, where a silica gel adsorbent, capable of selectively adsorbing the xenon is allowed to saturate. The product stream from this first adsorption column is collected by reducing the pressure and by heating the column. The product stream contained a mixture of xenon, krypton and hydrocarbons in enriched concentrations above the feed composition. A catalyst unit operation and subsequent carbon dioxide and water removal column were used for hydrocarbon removal, prior to a second adsorption column, employed to increase the purity of the rare gas products still further. As clarified in Example 1 of this patent, venting the liquid oxygen stream generates a gaseous oxygen feed stream to the adsorption system. As described above, the adsorption process of the present invention is compatible with either a liquid or a gas feed and therefore the step of venting the liquid oxygen is not required. Moreover, the present process is operated such that enrichment of the hydrocarbons beyond their concentration in the feed stream is avoided, and therefore a step of catalytic oxidation, as described in the prior art is not required.
U.S. Pat. No. 6,658,894 to Golden et al, discloses a process of recovering at least one of xenon or krypton from and oxygen-containing gas stream by selectively adsorbing the xenon and/or krypton using a zeolite of type X exchanged with Li and Ag. According to Example 7, which showcases the key steps in the process of Golden et al, a liquid oxygen stream containing 17 ppm xenon, 95 ppm methane, and 10 ppm nitrous oxide was passed through a silica gel bed wherein the nitrous oxide was removed. The nitrous oxide free effluent was vaporized to 113 K and a portion of this gas stream was sent to a bed containing the type X zeolite exchanged with lithium and silver. The breakthrough of methane was detected after 190 minutes on stream, whereas after 1400 minutes on stream, no breakthrough of xenon had occurred. At this point, the feed step was stopped and regeneration was started using a nitrogen purge gas at 113 K. From the data in FIG. 4 of the Golden et al patent, the methane concentration during desorption increased to a maximum of between 8000-9000 ppm. The xenon product was collected by further warming the adsorption bed. Key features of the art of Golden et al are:                Use of the type X zeolite exchanged with both Li and Ag.        Operation of the adsorption process to the point where breakthrough of xenon was not observed.        Desorption under nitrogen, wherein the methane concentration at the outlet significantly exceeds the methane concentration in the feed stream (95 ppm versus 8000 to 9000 ppm).
In the process of the present invention, the methane levels during desorption do not show this enrichment behavior observed in the data presented in Golden et al. Moreover, the present process can be operated in a liquid phase and a Li and Ag type X zeolite is not required.
U.S. Pat. No. 3,971,640 to Golovko discloses an adsorption process for recovering a krypton-xenon concentrate from an air stream. In the process of Golovko, a gaseous air stream at 90-110K containing admixtures of krypton, xenon and hydrocarbons is passed through an adsorbent having pore-openings from 5-150 Å, during which time the krypton, xenon, nitrogen, oxygen and hydrocarbons are adsorbed. The feed step is ended when krypton is detected at the outlet of the adsorber. At this point, a staged temperature desorption wherein the temperature is raised firstly from 90-110 K to 250-280 K wherein xenon, krypton, oxygen, nitrogen and hydrocarbons are desorbed from the adsorbent and thereafter the bed is heated further from 250-280 K to 500-650 K with the desorbed products at this point discarded to atmosphere. Unlike the process of Golovko et al, during the desorption step of the process of the invention, substantially only xenon and oxygen are desorbed with any additional components, such as hydrocarbons, are desorbed at concentrations significantly less than their concentration in the feed stream. From example 2 in Golovko, hydrocarbon levels of 2% were measured during desorption which again suggests significant adsorption and concentration of these hydrocarbons by adsorption which does not take place in our process. Moreover in the present process, the use of staged desorption temperatures up to 500-650 K is not required.

Cryogenic adsorption process for xenon recovery


The present invention relates to Pseudomonas sp. YS-180 having a capability of producing a docosahexaenoic acid and a method for the production of DHA using such a microorganism. Pseudomonas sp. YS-180 was isolated and identified from the intestine of fishes by investigating the morphological, culturing, and physiological characteristics of a strain excellent in a DHA-producing capability. By TLC and GC, Pseudomonas sp. YS-180 according to the present invention was confirmed that it produced the greatest amount of DHA when it was shaking-cultured in a culture containing glucose 2% (w/v), a yeast extract 2% (w/v), and sea water 20%(v/v). Optimal conditions for producing DHA were a pH of 6.0, and a temperature of 20.degree. C. Under these conditions a DHA production was 96.7 mg/L, and a biomass growth was 7.8 g/L.

1. Field of the Invention
The present invention relates in general to Pseudomonas sp. YS-180 having a capability of producing docosahexaenoic acid (hereinafter called "DHA") and a method for the production of DHA using such a microorganism. More particularly, the present invention relates to a method comprising screening, from intestines of fish, a microbial strain, Pseudomonas sp. YS-180, that effectively produces DHA, as one of its unsaturated fatty acids, investigating the morphological, culturing and physiological characteristics of the screened strain to isolate and identify, and establish optimal conditions for the production of DHA.
2. Description of the Prior Art
DHA is an unsaturated fatty acid that has been of keen interest since an epidemiologic survey employing Eskimos as subjects of the survey at the 1970's. This is associated with phospholipids, such as phosphatidyl ethanolanine (PE) and phosphatidyl serin (PS), present in the grey matter of the human frontal lobe, while having inherent physiological functions connected with the brain and retina. In addition, DHA is highlighted as a health food due to various efficacies, such as anti-trombus, antihypersensitive, anti-arrhythmic, and anti-camcer properties. However, DHA is not easy to synthesize chemically, and thus, it is currently obtained from natural material. Till now, such a highly unsaturated fatty acid has been industrially extracted from oils of fishes having a blue back, such as mackerel, saury, bluefin tuna, horse mackerel, and herring.
Fish oil fatty acids often originate from marine microorganisms, such as algae and vegetable plankton, which are ingested by such fish. However, it is problematic in that DHA extracted from the fish oil is unsuitable for the use as foods and medical supplies when the fish is contaminated with an environmental pollution material. Another problem is that it is difficult for DHA to be produced in a stable way. Additionally, another problem is that DHA has an offensive fish odor. Consequently some researchers have predicted that, in addition to being present in fish oil, DHA-producing strains could be also present in the intestine of the fishes having the blue back. Therefore, bacteria isolated from an intestine of a variety of fishes and marine animals were cultured and examined for a DHA-producing capability. As a result, many kinds of DHA-producing strains wvere isolated. Marine microorganisms reported producing EPA and DHA, simultaneously include Isochrysis galbana, Dinoflagellate sp. and Crypthecodinium cohnii of Chrysophyceas genus.
There are current investigations to produce EPA and DHA from bacteria or algae in large quantities using biotechnology. Examples ofthese studies include Watanabe et al., "a fatty acid composition of an EPA product from marine bacteria", J. Mar. Biotechnol., 4, 104-112, 1996; Baumann et al., "a possibility to produce EPA from novel microorganisms of the South Pole", Int. J. System, Bacteriol., 47, 1040-1047, 1997 Bico et al., "fatty acids from marine plants", Phytochemistry, 34, 1521-1533, 1993; PCT publication WO 91/11918 (1991) concerning a DHA production; Yamajaki, "a production and use of EPA by marine bacteria", Bio Industry., 6, 491-501, 1989; and Kazo et al. "Composition of fatty acids and lipids of a novel DHA product" Lipids. 32, 9 p. 975-978, 1997. However, these studies are only basic investigations concerning the production of DHA and EPA from microorganisms.

Method for producing docosahexaenoic acid (DHA) using Pseudomonas sp. ys-180


In a digital optical switch which is based on the mode-selectivity principle, made up of a passive section (A) containing a first optical wave guide (1) and a second optical wave guide (2) and a switching section (B) containing a third optical wave guide (3) and a fourth optical wave guide (4), both the required asymmetry and the bringing of the optical wave guides within or outside each other's interaction region are achieved with the aid of curves (K.sub.1, K.sub.2) in respective walls of the optical wave guides. In the switching section (B) said asymmetry is reversible. Use is made of the effect that a curved wall results, in general, in a reduction of the propagation constant in the optical wave guide. Suitable curves are of circular-arc shape and sinusoidal. The switching section (B) may furthermore incorporate a short intermediate section (s-u) in which the optical wave guides (12, 13) run straight at a small mutual angle (.PHI.) in the event that the reversible asymmetry is in the first instance too small with a particular choice of material. The invention makes possible much shorter switches which have a greater packing density.

1. Field of the Invention
The invention is in the field of integrated optics. More particularly it refers to a digital optical switch based on the mode-selectivity principle.
2. Prior art
A digital electro-optical switch is disclosed by references [1] and [2] (see below). The switching action is obtained in said known switch with the aid of so-called mode selectivity. Mode selectivity is the phenomenon that a light mode which is propagated in an optical wave guide, from a point where more than one mode can be propagated, only that mode is excited and propagated whose propagation velocity is best suited to the propagation velocity of said light mode. To be able to generate only one particular mode simultaneously in the switch, a certain asymmetry is required at the input. This known digital electro-optical switch, which is produced on a lithium niobate substrate, possesses said asymmetry in two optical wave guiding input channels of different width, while the output is formed by two optical wave guiding output channels of identical width. The input channels converge at an angle, which has to be less than 0.1.degree., up to a point within their interaction region, while the output channels diverge again at the same angle up to a point outside their interaction region. As a result of a switching voltage applied over electrodes placed in the vicinity of said interaction region and the output channels, the light propagation therein can be influenced electro-optically, in this case, can be switched. This implies that each mode generated in the interaction region can be guided to one of two outputs. A good switching action which is sufficiently polarisation- and wavelength-independent and has a low crosstalk can indeed thereby be obtained. However, a disadvantage is that said digital switch takes up a fairly large space as a component in a matrix of switches owing to its relatively large length as a consequence of the very acute angle (.ltoreq.0.1.degree.) between the straight input channels. Said acute angle also imposes high requirements on the lithography during the production of the component.