The invention provides a method for executing instructions. The method includes dispatching and executing a first and second plurality of instructions in a portion of a pipeline without first determining whether stages of the portion of the pipeline are ready. The method further includes determining if an execution problem is encountered and replaying the first plurality of instructions in response to determining that the first plurality of instructions encountered an execution problem. The invention also provides a processor pipeline. The processor pipeline includes a front end to fetch a plurality of instructions for execution and a back end to execute the plurality of instructions fetched by the front end. The back end includes a retirement stage to determine if an instruction had an execution problem. The back end is non-stallable. The processor pipeline also includes a channel to send an indication that the instruction encountered an execution problem from the retirement stage to a replay point of the pipeline from which the instruction may be re-executed.

1. Field of the Invention
This invention relates generally to pipelined processors, and more particularly, to a replay mechanism for a processor pipeline.
2 Description of the Related Art
Computers and many other types of machines are engineered around a "processor" that executes programmed instructions stored in the machine's memory. One may categorize computers and processors by the complexity of their instruction sets, such as reduced instruction set computers ("RISC") and complex instruction set computers ("CISC"). An architecture is a categorization defining the interface between the processor's hardware and the processor's instruction set.
A first aspect of a processor's architecture is whether it executes instructions sequentially or out of order. Historically, processors executed one instruction at a time or in the same sequential order that code for the instructions was presented to the processor. This architecture is the "sequential programming model." An out of order architecture executes instructions in an order different from the order in which the code is presented to the processor, i.e., non-sequentially.
The sequential nature of software code creates "data dependencies" and "control dependencies." A data dependency occurs when a later instruction manipulates an operand x, and the data at x is a result from an earlier instruction. The later instruction has a data dependency on the operand of the earlier instruction. A control dependency occurs when an instruction can generate two alternative branches of instructions only one of which will be executed. Typically, the branch choice depends on a condition. The various architectures respect these data and control dependencies.
A second aspect of a processor's architecture is whether instruction processing is "pipelined." In pipelined processing, the processor fetches instructions from memory and feeds them into one end of the pipeline. The pipeline has several "stages," each stage performing some function necessary or desirable to process the instruction before passing the instruction to the next stage. For instance, one stage might fetch an instruction, the next stage might decode the instruction, and the next stage might execute the decoded instruction. Each stage typically moves the instruction closer to completion.
A pipeline may offer an advantage in that one part of the pipeline is working on a first instruction while a second part of the pipeline is working on a second instruction. Thus, more than one instruction can be processed at a time potentially increasing the effective rate at which instructions are processed.
Some pipelines process instructions "speculatively." Speculative execution means that instructions are fetched and executed before resolving pertinent control and/or data dependencies. Speculative execution predicts how data and/or control dependencies will be resolved, executes instructions based on the predictions, and then verifies that the predictions were correct before retiring the instruction and results therefrom.
The verification step can be a challenge to pipeline design. At the end of the pipeline, the results from executed instructions are temporarily stored in a register until all data and control dependencies have been actually resolved. The pipeline then checks whether any mispredictions or other problems occurred, i.e., both generally referred to as exceptions. In the absence of execution problems, the executed instructions are "retired" and results are stored to architectural registers, an operation referred to as "commitment to an architectural state." If execution problems occur, the processor performs a correction routine.
Execution problems are problems that can result in:
(1) executing an instruction that should not have been executed; PA1 (2) not executing an instruction that should have been executed; or PA1 (3) executing an instruction with incorrect data. To process the instruction stream correctly, the effects of execution problems on subsequent execution of instructions must also be corrected.
Many prior art pipelined processors "stall" the pipeline upon detecting an exception. In stallable instruction pipelines, a number of latches or registers govern progress through the stages of the pipeline. A pipeline controller generates a signal to enable or disable the latches or registers. During a stall, the latches or registers are disabled so that the instructions are not transferred to the next stage. After an exception that caused the stall and its effects are repaired, the pipeline controller re-enables the latches or registers and transfers between pipeline stages resume.
To operate a stallable pipeline, the pipeline controller needs to receive status signals from the stages of the pipeline, determine whether to stall from the received signals, and then broadcast a signal to stall or proceed. Since each of these steps takes time, implementing the ability to stall may limit the operating frequency of the pipeline.
Some processor pipelines "replay" in addition to stalling. Replay is the re-execution of instructions upon detecting an exception. If an exception is detected, speculative results are ignored, e.g., the architectural state is not updated and instructions are not retired. The processor corrects the problem and re-executes the instructions.
One processor employing replay is the Alpha 21164 microprocessor, commercially available from Digital Equipment Corporation. The Alpha 21164 stalls only the first three stages of the pipeline. If a problem occurs after the third stage, the Alpha 21164 replays the entire pipeline after the repairing problem. The Alpha 21164 therefore combines expensive stalling with complex decision-making circuitry necessary to determine when to replay. The Alpha 21164 replays the entire pipeline line even though the problem may be localized. Replaying the entire pipeline may be inefficient if there are several parallel execution units, e.g., a superscalar processor, and the problem was localized to one of the parallel execution units.
The demand for faster processors continually outstrips present technology. The demand pressures all aspects of processor architecture to become faster in the sense of higher instruction throughput. Current techniques for handling exceptions in pipelines processing can substantially reduce instruction throughput.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.


A system and method for monitoring a first wire rope and a second wire rope is provided. The first and second wire ropes each include a contact portion that contacts a sheave, a first end portion, and a monitored portion that extends between the contact portion and the first end portion. The sheave electrically connects the contact portions of the first and second wire ropes. The system includes a controller that is electrically connected to each of the first and second wire ropes to form a circuit with the monitored portions of the first and second wire ropes. The controller selectively applies a signal to the monitored portions of the first and second wire ropes and determines an electrical characteristic thereof. The controller uses the determined electrical characteristic to determine a condition of the first and second wire ropes.

1. Technical Field
Aspects of the present invention relate to systems and methods for monitoring wire ropes, and more particularly relates to systems and methods for monitoring wire ropes that aid in hoisting an object, and contact an electrically connecting sheave.
2. Background Information
Hoisting systems (e.g., elevator systems, crane systems) often include a rope or a belt that aid in hoisting an object (e.g., an elevator car) and a counterweight. A sheave that is driven by a machine may move the rope or belt to cause movement of the hoisted object and the counterweight. Traditionally, wire ropes were used. More recently, belts have been used. One example of a belt is a coated steel belt having a plurality of steel cords encased in a polyurethane jacket. There is a need to monitor the rope or belt over time; e.g., to determine if the rope or belt is experiencing wear or other damage that may cause weakening. Aspects of the present invention involve systems and methods for monitoring wire ropes.

System and method for monitoring wire ropes


The present invention relates to Fc-OB fusion protein compositions, methods of preparation of such compositions and uses thereof. In particular, the present invention relates to a genetic or chemical fusion protein comprising the Fc immunoglobulin region, derivative or analog fused to the N-terminal portion of the OB protein, derivative or analog.

Although the molecular basis for obesity is largely unknown, the identification of the "OB gene" and protein encoded ("OB protein" or "leptin") has shed some light on mechanisms the body uses to regulate body fat deposition. See, PCT publication, WO 96/05309 (Dec. 22, 1996), Friedman et al.; Zhang et al., Nature 372: 425-432 (1994); see also, the Correction at Nature 374: 479 (1995). The OB protein is active in vivo in both ob/ob mutant mice (mice obese due to a defect in the production of the OB gene product) as well as in normal, wild type mice. The biological activity manifests itself in, among other things, weight loss. See generally, Barrinaga, "Obese" Protein Slims Mice, Science 269: 475-456 (1995). The OB protein, derivatives and use thereof as modulators for the control of weight and adiposity of animals, including mammals and humans, has been disclosed in greater detail in PCT publication WO 96/05309 (Dec. 22, 1996), hereby incorporated by reference, including figures.
The other biological effects of OB protein are not well characterized. It is known, for instance, that in ob/ob mutant mice, administration of OB protein results in a decrease in serum insulin levels, and serum glucose levels. It is also known that administration of OB protein results in a decrease in body fat. This was observed in both ob/ob mutant mice, as well as non-obese normal mice. Pelleymounter et al., Science 269: 540-543 (1995); Halaas et al., Science 269: 543-546 (1995). See also, Campfield et al., Science 269: 546-549 (1995) (Peripheral and central administration of microgram doses of OB protein reduced food intake and body weight of ob/ob and diet-induced obese mice but not in db/db obese mice.) In none of these reports have toxicity's been observed, even at the highest doses.
Despite the promise of clinical application of the OB protein, the mode of action of the OB protein in vivo is not clearly elucidated. Information on the OB receptor, shows high affinity binding of the OB protein detected in the rat hypothalamus, which indicates OB receptor location. Stephens et al., Nature 377: 530-532. The db/db mouse displays the identical phenotype as the ob/ob mouse, i.e., extreme obesity and Type II diabetes; this phenotype is thought to be due to a defective OB receptor, particularly since db/db mice fail to respond to OB protein administration. See Stephens et al., supra.
With the advances in recombinant DNA technologies, the availability of recombinant proteins for therapeutic use has engendered advances in protein formulation and chemical modification. One goal of such modification is protein protection and decreased degradation. Fusion proteins and chemical attachment may effectively block a proteolytic enzyme from physical contact with the protein backbone itself, and thus prevent degradation. Additional advantages include, under certain circumstances, increasing the stability, circulation time, and the biological activity of the therapeutic protein. A review article describing protein modification and fusion proteins is Francis, Focus on Growth Factors 3:4-10 (May 1992) (published by Mediscript, Mountview Court, Friern Barnet Lane, London N20, OLD, UK).
One such modification is the use of the Fc region of immunoglobulins. Antibodies comprise two functionally independent parts, a variable domain known as "Fab", which binds antigen, and a constant domain, known as "Fc" which provides the link to effector functions such as complement or phagocytic cells. The Fc portion of an immunoglobulin has a long plasma half-life, whereas the Fab is short-lived. Capon, et al., Nature 337: 525-531 (1989).
Therapeutic protein products have been constructed using the Fc domain to provide longer half-life or to incorporate functions such as Fc receptor binding, protein A binding, complement fixation and placental transfer which all reside in the Fc proteins of immunoglobulins. Id. For example, the Fc region of an IgG1 antibody has been fused to the N-terminal end of CD30-L, a molecule which binds CD30 receptors expressed on Hodgkin's Disease tumor cells, anaplastic lymphoma cells, T-cell leukemia cells and other malignant cell types. See, U.S. Pat. No. 5,480,981. IL-10, an antiinflammatory and antirejection agent has been fused to murine Fcγ2a in order to increase the cytokine's short circulating half-life. Zheng, X. et al., The Journal of Immunology, 154: 5590-5600 (1995). Studies have also evaluated the use of tumor necrosis factor receptor linked with the Fc protein of human IgG1 to treat patients with septic shock. Fisher, C. et al., N. Engl. J. Med., 334: 1697-1702 (1996); Van Zee, K. et al., The Journal of Immunology, 156: 2221-2230 (1996). Fc has also been fused with CD4 receptor to produce a therapeutic protein for treatment of AIDS. See, Capon et al., Nature, 337:525-531 (1989). In addition, the N-terminus of interleukin 2 has also been fused to the Fc portion of IgG1 or IgG3 to overcome the short half life of interleukin 2 and its systemic toxicity. See, Harvill et al., Immunotechnology, 1: 95-105 (1995).
Due to the identification of the OB protein as a promising therapeutic protein, there exists a need to develop OB analog compositions for clinical application in conjunction with or in place of OB protein administration. Such development would include OB analog compositions where protein formulations and chemical modifications achieve decreased protein degradation, increased stability and circulation time. The present invention provides such compositions.

This patent is subject to a terminal disclaimer.

OB fusion protein compositions and methods


A method and a system for generating queue based applications dependencies in virtual machines are provided. The method includes the following steps. At least one transmitting message transmitted via at least one enterprise service bus by a plurality of application programs is intercepted. The at least one transmitting message includes at least one request message. The at least one request message is obtained by filtering the at least one transmitting message. A client and a server of each of the at least one request message are obtained. A checksum of each of the at least one request message is calculated to obtain a message identification of each of the at least one request message. The client, the server and the message identification of each of the at least one request message are recorded in a dependencies table.

Enterprise services are usually composed of several service servers. Along with the development of internet and the virtual machine technology, more user applications are performed at a virtual data center (VDC) by the cloud computing technology. The end-user can ask the virtual data center for performing the remote application.
Moreover, distributed application becomes more useful and more complex. The performance degradation or failure of any single service and element will affect the quality of the enterprise services and the customer satisfaction. Due to the requirement of load balance and high availability, the dependency of the application programs in the distributed system always changes. It is very difficult to find out the root cause without an accurate dependencies information. Therefore, how to effectively find out the dependency of the application programs becomes an important issue.
Moreover, many enterprises provide services via queue based applications. Some of them use the enterprise service bus (ESB) to transmit message.
Now, queue based applications are widely used in virtual machine environment. Enterprises need a systematic, low cost and simple method for trouble-shooting.

Method and system for generating queue based applications dependencies in virtual machines

INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE


By adding melamine cyanurate, polyoxymethylene is stabilized against acid attack, wherein in particular as little as under 3 parts of MCA per 100 parts of POM are effective. The weight loss of a stabilized POM under the action of acid may be less than 3% of that of an unstabilized POM. The product is useful in products which are exposed to acidic agents such as irrigation systems, dishwashers, sanitary installations.

Polyoxymethylene (polyacetal) is an extraordinary material from which the most varied articles may be produced, in particular by injection molding. An advantageous feature is, in particular, its chemical resistance against many organic solvents and also bases. Since the introduction of polyacetals onto the market, attempts have been made to reduce the acid lability arising from their chemical structure. Unless protective measures are taken, the repeating acetal structure in the polymer chain has unstable semi-acetal terminal groups from which polymer degradation proceeds. In order to stabilize the polymer, its terminal groups may be protected by esterification or etherification, as described in H. Cherdron, L. Hohr, W. Kern, Makromol. Chem., 52, 48 et seq. (1962). Another method is to incorporate comonomers which form a stable terminal group on degradation of the polymer chain. This makes polyoxymethylene (POM) fit for everyday use, but the acid lability remains, since (c.f. V. V. Pchelintsev, A. Yu. Sokolov, G. E. Zaikov, Polym. Degradation and Stability, 21(4), 285 (1988)) acid catalyzed hydrolytic decomposition of POM may take place at any location on the polymer such that stabilized terminal groups or comonomer units do not provide sufficient protection. It is known from German patent DE 11 93 240 that high proportions of a urethane scavenge the formaldehyde arising from acidolysis An example of this is a molded article with 40% POM. In this way, the odor problems or hazard to health caused by liberated formaldehyde are reduced, but the POM is still degraded. Moreover, a product with 40% POM / 60% TPU no longer has a POM matrix so that the advantageous properties of ROM (e.g. stiffness) are lost. German patent DE 12 35 585 describes the acylation of POM with carbodiimide. This considerably reduces acidolytic degradation of the polymers by free acetic acid. The carbodiimide is, in particular, intended to provide stabilization for the transient acid conditions during esterification. Investigations have, however, shown that the products produced in this manner are also unsuitable for use under acidic conditions.
It is furthermore known, for example from German patent DE 25 40 207, to add basic substances, such as salts for example, to the POM to provide protection from the acidic conditions arising during production and processing. The basic substances act to neutralize acidic components in the polymer and so only those salts whose acidic portion does not itself attack the POM are suitable. Thus, for example, a small quantity of sodium carbonate may be added to a polyoxymethylene. The products so obtained are also unsuitable for use under acidic conditions.

Polyoxymethylene having improved acid stability


A method for refreshing PCRAM cells programmed to a low resistance state and entire arrays of PCRAM cells uses a simple refresh scheme which does not require separate control and application of discrete refresh voltages to the PCRAM cells in an array. Specifically, the array structure of a PCRAM device is constructed to allow leakage current to flow through each programmed cell in the array to refresh the programmed state. In one embodiment, the leakage current flows across the access device between the anode of the memory element and the bit line to which the cell is connected, for each memory cell in the array which has been programmed to the low resistance state. In another embodiment, the leakage current flows to the programmed cells through a doped substrate or doped regions of a substrate on which each cell is formed. An entire array is refreshed simultaneously by forming each memory element in the array to have one common anode formed as a single cell plate for the array. Only PCRAM cells in the array written to the low resistance state are refreshed by the controlled leakage current, whereas cells in the high resistance state are not affected by the refresh operation.

Microprocessor-controlled integrated circuits are used in a wide variety of applications. Such applications include, for example, personal computers, vehicle control systems, telephone networks, and a host of consumer products. As is well known, microprocessors are essentially generic devices that perform specific functions under the control of a software program. This program is stored in one or more memory devices that are coupled to the microprocessor. Not only does the microprocessor access memory devices to retrieve the program instructions, but it also stores and retrieves data created during execution of the program in one or more memory devices.
There are a variety of different memory devices available for use in microprocessor-based systems. The type of memory device chosen for a specific function within a microprocessor-based system depends largely upon what features of the memory are best suited to perform the particular function. For instance, random access memories such as dynamic random access memories (DRAMs) and static random access memories (SRAMs) are used to temporarily store program information and data "actively" being used by the microprocessor. The data stored in random access memories may be read, erased, and rewritten many times during the execution of a program or function. Read only memories (ROMs), "write once read many" devices (WORMs) and electrically erasable programmable read only memories (EEPROMs), and flash memories on the other hand, are used as long term memory devices which permanently store information about the microprocesor system or store software programs or instructions for performing specific functions until erased or deleted by a user, for example.
Random access memories tend to provide greater storage capability and programming options and cycles than read only memories, but they must be continually powered in order to retain their content. Most random access memories store data in the form of charged and discharged capacitors contained in an array of memory cells. Such memory cells, however, are volatile in that the stored charges will dissipate after a relatively short period of time because of the natural tendency of an electrical charge to distribute itself into a lower energy state. For this reason, most random access memories such as DRAMs must be refreshed, that is, the stored value must be rewritten to the cells, about every 100 milliseconds in order to retain the stored data in the memory cells. Even SRAMs, which do not require refreshing, will only retain stored data as long as power is supplied to the memory device. When the power supply to the memory device is turned off, the data is lost.
Read only memories presently used in microprocessor devices are non-volatile, that is, capable of retaining stored information even when power to the memory device is turned off. Some read only memory devices are constructed so that once programmed with data, they cannot be reprogrammed. The read only memories that can be reprogrammed have complex structures which are difficult to manufacture, occupy a large amount of space and consume large quantities of power. For these reasons, read only memories are unsuitable for use in portable devices and/or as substitutes for the frequently accessed random access memories, i.e., memories capable of 1014 programming cycles or more.
Efforts have been underway to create a commercially viable memory device that is both randomly accessed and nonvolatile. To this end, various implementations of such nonvolatile random access memory devices are presently being developed which store data in a plurality of memory cells by structurally or chemically changing the resistance across the memory cells in response to predetermined voltages respectively applied to the memory cells. Examples of such variable resistance memory devices include memories using variable resistance polymers, perovskite, doped amorphous silicon or doped chalcogenide glass.
In a variable resistance memory cell, a first value may be written thereto by applying a voltage having a predetermined level to the memory cell, which changes the electrical resistance through the memory cell relative to the condition of the memory cell prior to the application of the voltage. A second value, or the default value, may be written to or restored in the memory cell by applying a second voltage to the memory cell, to thereby change the resistance through the memory cell back to the original level. The second voltage is in the negative direction of the first voltage and may or may not have the same magnitude as the first voltage. Each resistance state is stable, so that the memory cells are capable of retaining their stored values without being frequently refreshed. In this regard, since the variable resistance materials can be "programmed" to any of the stable resistance values, such variable resistance memory cells are known as programmable conductor random access memory (PCRAM) cells.
The value of the PCRAM cell is read or "accessed" by applying a read voltage to determine the resistance level across the cell. The magnitude of the read voltage is lower than the magnitude of the voltage required to change the resistance of the PCRAM cell. In a binary PCRAM cell, upon determining the resistance level of the PCRAM cell, the detected resistance level is compared with a reference resistance level. Generally, if the detected resistance level is greater than the reference level, the memory cell is determined to be in the "off" state, or storing, for example, a value of "0." On the other hand, if the detected resistance level is less than the reference level, the memory cell is determined to be in the "on" state, or storing, for example, a value of "1."
FIG. 1 generally shows a basic composition of a PCRAM cell 10 constructed over a substrate 12, having a variable resistance material 16 formed between two electrodes 14, 18. One type of variable resistance material may be amorphous silicon doped with V, Co, Ni, Pd, Fe and Mn as disclosed in U.S. Pat. No. 5,541,869 to Rose et al. Another type of variable resistance material may include perovskite materials such as Pr1−xCaxMnO3 (PCMO), La1−xCaxMnO3 (LCMO), LaSrMnO3 (LSMO), GdBaCoxOy (GBCO) as disclosed in U.S. Pat. No. 6,473,332 to Ignatiev et al. Still another type of variable resistance material may be a doped chalcogenide glass of the formula AxBy, where "B" is selected from among S, Se and Te and mixtures thereof, and where "A" includes at least one element from Group IIIA (B, Al, Ga, In, Tl), Group IVA (C, Si, Ge, Sn, Pb), Group VA (N, P, As, Sb, Bi), or Group VIIA (F, Cl, Br, I, At) of the periodic table, and with the dopant being selected from among the noble metals and transition metals, including Ag, Au, Pt, Cu, Cd, Ir, Ru, Co, Cr, Mn or Ni, as disclosed in U.S. Published Application Nos. 2003/0045054 and 2003/0047765 to Campbell et al. and Campbell, respectively. Yet another type of variable resistance material includes a carbon-polymer film comprising carbon black particulates or graphite, for example, mixed into a plastic polymer, such as that disclosed in U.S. Pat. No. 6,072,716 to Jacobson et al. The material used to form the electrodes 14, 18 can be selected from a variety of conductive materials, such as tungsten, nickel, tantalum, titanium, titanium nitride, aluminum, platinum, or silver, among others.
In FIG. 2, a PCRAM cell 100 is shown to include an access device 102, a programmable conductor memory element 104, and a cell plate 110. The access device 102 is a transistor having a gate 102a coupled to a word line 106 and one terminal (source) 102b coupled to a bit line 108. The other terminal (drain) 102c of the access device 102 is coupled to one end of the programmable conductor memory element 104, while the other end of the programmable conductor memory element 104 is coupled to the cell plate 110. The cell plate 110 may span and be coupled to several other PCRAM cells, and may form the anode of all the memory elements 104 in an array of PCRAM cells. The cell plate 110 is also coupled to a potential source 112.
A representative diagram of the physical structure of the memory cell 100 is shown in FIG. 3. In particular, an n-doped substrate 126 includes a p-doped region 124. Two n-wells 120, 122 are formed in the p-doped region 124. Access device 102 is formed on the surface of the substrate 126 between the two n-wells 120, 122, so that the two n-wells 120, 122 serve as the source 102b and drain 102c, respectively, of the access device 102. Word line 106 is formed as a conductive strip extending into the page across the top of access device 102. Bit line 108 is connected directly to the n-well 120 forming the source 102b of the access device 102. Programmable conductor memory element 104 is formed on the substrate with its cathode 114 in contact with n-well 122 and the cell plate 110 (only a portion of which is shown) as its anode. The cell plate 110 of memory element 104 is connected to a potential source 112.
In the conventional operating scheme, when the memory element 104 is idle, the voltage across the anode 110 and the cathode 114 is 0 V. In order to perform any access operations including programming the programmable conductor memory element 104 to the low resistance state, erasing a programmed memory element (i.e., returning the memory element to the high resistance state), or reading the value stored in memory element 104, the word line 106 must be activated by applying a threshold voltage VG. The activated word line which closes the gate 102a of the access device 102 so that an n-channel is formed in the substrate 126 under the gate structure of access device 102 and across the gap between the two n-wells 120, 122 to activate the device 102. Upon activating the access device 102, the memory element 104 can be programmed to the low resistance state by applying a write (positive) voltage having at least the magnitude of a threshold voltage VT across the memory element 104.
Application of the write voltage may be achieved by raising the potential at the cell plate 110 (anode) relative to the access device drain 102b by applying or raising the voltage at the potential source 112, lowering the potential of the bit line 108, or a combination of both. To erase a programmed memory element 104, a negative voltage having a magnitude of at least a threshold erase voltage is applied between the anode and the cathode of the memory element 104, such that the potential at the potential source 112 is lower than the potential of the bit line 108.
The value stored in the memory element 104 can be read by applying a positive voltage, either by raising the potential at the anode or lowering the potential of the bit line 108 or both, which is less than the voltage level required to program the memory element to the low resistance state.
In a bistable PCRAM cell, the programmable conductor memory element 104 stores, for example, a binary 0 when in a high resistance state, and a binary 1 when in the low resistance state. The memory element 104 is ideally programmed to the low resistance state, e.g., to store a binary 1, by applying a positive voltage having a magnitude at least that of a threshold write voltage, and can be restored to the high resistance state, e.g., to store a binary 0, by applying a negative voltage having a magnitude of at least a threshold erase voltage. Of course, the values "0" and "1" relative to the high and low resistance state, respectively, are user-defined, and thus could be reversed, with the high resistance state representing the value "1" and the low resistance state representing the value "0." The memory element can be nondestructively read by applying a reading voltage having a magnitude of less than the threshold write voltage.
As with volatile RAMs, PCRAMs are arranged as an array of memory cells and are written, erased, and read using a controller. FIG. 4 illustrates a memory device 200 comprising an array of memory cells arranged by tiling a plurality of memory cells 100a-100f together so that the memory cells along any given bit line 108a, 108b do not share a common word line 106a-106c. Conversely, the memory cells 100a-100f along any word line 106a-106c do not share a common bit line 108a-108b. In this manner, each memory cell is uniquely identified by the combined selection of the word line to which the gate of the memory cell access device is connected, and the bit line to which the drain of the memory cell access device is connected.
Each word line 106a-106c is connected to a word line driver 202a-202c via a respective transistor 204a-204c for selecting the respective word line for an access operation. The gates of the transistors 204a-204c are used to selectively couple/decouple the word lines 106a-106c to/from the word line drivers 202a-202c. Similarly, each bit line 108a-108b is coupled to a driver 206a-206b via selector gates 208a-208b. The current and/or resistance of a selected memory cell 100a-100f is measured by sensor amplifiers 210a-210b connected respectively to the bit lines 108a-108b.
For simplicity, FIG. 4 illustrates a memory array having only two rows of memory cells 100 on two bit lines 108a-108b and three columns of memory cells 100 on three word lines 106a-106c. However, it should be understood that in practical applications, memory devices would have significantly more cells in an array. For example, an actual memory device may include several million cells 100 arranged in a number of subarrays.
While the overall operating scheme of the memory device 200 may be similar regardless of the type of variable resistance material used in the memory elements, much research of late has focused on memory devices using memory elements having doped chalcogenide materials as the variable resistance material. More specifically, memory cells having a variable resistance material formed of germanium-selenide glass having a stoichiometry of GexSe100−x, with x ranging from about 20 to about 43, have been shown to be particularly promising for providing a viable commercial alternative to traditional DRAMs.
Generally, a chalcogenide PCRAM cell having such stoichiometry has an initial and "off" state resistance of over 100 K Ω (e.g., 1 M Ω). To perform a write operation on a chalcogenide memory cell in its normal high resistive state, a voltage having at least a threshold potential is applied to the electrode serving as the anode, with the cathode held at the reference potential or ground. Upon applying the threshold level voltage, i.e., a write voltage, the resistance across the memory cell changes to a level dramatically reduced from the resistance in its normal state, to a resistance less than 100 K Ω (e.g., 20 K Ω), whereupon the cell is considered to be in the "on" state.
The PCRAM cell retains this new lower level of resistivity until the resistivity is changed by another qualifying voltage level applied to one of the electrodes of the cell. For example, the memory cell is returned to the high resistance state by applying an erase voltage thereto in the negative direction of the voltage applied in the write operation (to achieve the lower resistance state). The erase voltage may or may not be the same magnitude as the write voltage, but is at least of the same order of magnitude.
Although it is not clearly understood what change or changes are induced in the doped chalcogenide material by the application of the threshold potential to result in the stable low resistant state, it is believed that the metal ions incorporated into the chalcogenide material somehow become aligned into a low resistance conductive configuration between the electrodes once the applied voltage reaches the threshold level. At least two theories exist as to the precise nature of the alignment.
In one theory, the metal ions within the chalcogenide material begin to plate on the cathode and progress through the chalcogenide material toward the anode upon the application of the threshold voltage level of a write operation. The metal ions continue to agglomerate until a conductive dendrite or filament is extended between the electrodes to thereby interconnect the top and bottom electrodes to create an electrical short circuit. Upon application of the negative threshold voltage, the dendrite recedes from the anode as the metal ions return to solution in the chalcogenide material or return to the source layer.
In a second theory, when an initial write signal having a threshold positive voltage level is applied to the memory cell, at least one conductive channel is formed in the chalcogenide material, and the metal ions are caused to agglomerate along the channels(s), thereby lowering the electrical resistance across the cell. Upon application of an erase signal having a negative threshold voltage level to the cell, the conductive channel(s) remain in place, but the metal ions are caused to move away from the conductive channel(s), thereby raising the electrical resistance across the cell. Subsequent write signals cause the metal ions to re-agglomerate along the channel(s). The resistance through the cell in the write and erase states is thus determined by the amount of metal ions agglomerated along the channel(s).
When written to the low resistance state, chalcogenide PCRAM cells can retain this state for several hours, days, even weeks. In this regard, such PCRAM devices are relatively non-volatile as compared to DRAM devices. However, while chalcogenide PCRAM cells in the high resistance state are completely non-volatile, PCRAM cells written to the low resistance state will gradually lose their conductivity across the chalcogenide glass layer and drift towards the high resistance state after an extended period of time. In particular, it has been found that such chalcogenide PCRAM devices which are written according to high speed algorithms, i.e., using write voltages each having a pulse width of less than 100 ns, have a tendency to gradually lose their low resistance characteristic over time, e.g., a week. It is desirable to use such high speed algorithms to write PCRAM devices to accommodate the demands of current operating speeds in state-of-the-art processors. Accordingly, PCRAM memory devices operated using high speed algorithms should be intermittently refreshed to maintain optimal operation of the PCRAM memory devices.
Refresh operations are well known in DRAM devices. Specifically, in DRAM devices memory cells must be refreshed frequently, e.g., every 100 milliseconds, and regardless of the value stored in each cell. Additionally, DRAM cells are refreshed with every read operation. PCRAM cells, on the other hand, only require refreshing on a much more sporadic basis, e.g., once every several days to once per week. Moreover, only PCRAM cells written to the low resistance state need periodic refreshing, since PCRAM cells in the high resistance state are not at risk of losing their stored values. One feature resulting from these characteristics of PCRAM devices is that PCRAM devices do not require the dedicated circuitry necessary in DRAM devices to perform the refresh operations.
U.S. application Ser. No. 09/941,648, co-assigned to the assignee of the present invention, and the entire disclosure of which is hereby incorporated by reference, discloses a system and method for refreshing PCRAM memory cells by applying a positive voltage in the form of a sweep voltage, a pulse voltage, or a step voltage to the cells. The refresh voltages are applied at a magnitude less than that capable of writing a cell to the low resistance state, so that cells in the high resistance state are not affected by the refresh voltages.

Method of refreshing a PCRAM memory device


Disclosed herein are surface treatments for soft silicone gel materials such as silicone intraocular lenses.

Soft gel materials are used in various medical device applications, especially in ophthalmologic devices such as intraocular lenses (IOLs) and contact lenses. However, soft materials may exhibit surface tackiness, making the devices difficult to handle and clean. Such materials can also be easily damaged during solvent extraction processes. Methods to prevent or minimize the tackiness of soft gel silicone materials are needed. However, such treatments must not change the optical and mechanical properties of the materials, especially when the materials are used in devices for ophthalmic applications.


A method for determining the productivity of a well site includes extracting a core with sponge coring techniques and measuring the parameters of the core. The parameters measured are porosity, permeability and percent mobile oil. A core factor is calculated which is the square root of the product of permeability and porosity and indicates the space available in the core for oil production. The core factor is multiplied by the percent mobile oil to provide a Production Index. The Production Index indicates the capacity of a given oil well to produce oil. With the Production Index data, perforations are selectively placed in various areas along the longitudinal axis of a well casing (38) to selectively allow communication between the interior of the well casing and a formation of interest. In this manner, only areas having high oil mobility are communicated within a given region of the formation of interest.

In order to maximize production of a given drilling operation, it is first necessary to determine whether a given region passed through during the drilling process has a high quantity of oil and/or gas contained therein. This region is termed the "formation of interest." Secondly, it is necessary to efficiently extract the oil and/or gas therefrom. One problem that is incurred in efficiently extracting oil and/or gas from a well that is determined to be productive is the mixing of salt water with the oil and/or gas. The presence of high levels of salt water in the formation requires additional steps for removal thereof in addition to the increased energy requirements to pump the water.
To determine the potential of a given well, a core sample is normally taken from the formation of interest. This extracted core is analyzed to determine various properties thereof such as porosity, permeability and oil saturation. From these properties, a determination can be made as to whether this particular region will produce a sufficient amount of oil and/or gas to warrant a pumping operation. If the determination is made that the well has a high probability of being productive, a well casing is then lowered into the well to provide a conduit for retracting fluids therefrom. After the well casing has been lowered, a special device is lowered into the well that carries an explosive charge for selected perforation of the casing. This apparatus is lowered to a predetermined depth and then discharged to perforate the well casing at that depth resulting in perforations along a selected segment that are spaced in predetermined depth increments. If pressure in the formation is of sufficient magnitude, the oil and/or gas will flow freely to the surface for extraction thereof. However, if this pressure is not sufficient, a pump must be installed for extraction purposes.
The first problem of determining whether the formation of interest will have a high production rate is to determine the amount of oil present in each foot-acre. This determination has been simplified with sponge coring techniques disclosed in U.S. Pat. No. 4,312,414, issued to Arthur Park, one of the present Applicants. Sponge coring enables a drilling company to determine a more accurate profile of the characteristics of a given core sample along its longitudinal axis at the various depths and the amount of oil contained within the pore space of the sample core. From this information, conventional techniques are then applied to determining where the perforations are to be placed. It is quite important to place these perforations at the correct points along the formation of interest in order to maximize the production. Although oil and/or gas may be contained in a given region, the flow of oil from this point may be impeded due to undesirable characteristics of a formation, and the undesirable characteristics may exist at certain portions of a given region.
In order to maximize production levels, there exists a need for an improved method of determining the predicted productivity of a potential well and placing the perforations in the well casing as a function of the data derived from present day coring techniques such as sponge coring.

Method for determining the placement of perforations in a well casing


A jet condenser injects steam from a steam generator into a mixing tube, where it combines with coolant water from a heat exchanger. The steam completely condenses Upon mixing with the water because the ratio of the mass flow rate of water to that of steam is relatively high at any given combination of temperatures and pressures. The mixture of coolant water and condensate then enters a divergent tube. This action enhances dynamic natural convection in the condenser loop, which provides the forces that move the water through the loop. A small portion of the water is returned to the steam generator; the remainder is diverted to the heat exchanger. The mass flow of the steam in the jet condenser is equal to that of the condensate returned to the steam generator, thereby maintaining a constant coolant water inventory. During an accident, radioactive fission products would be retained within the closed jet condenser loop.

The present invention relates generally to nuclear reactor safety systems and, more specifically, to such systems that operate in a passive manner to remove decay heat.
Cooling systems are of vital importance in nuclear reactors. In a pressurized water reactor (PWR), coolant water circulates through the reactor vessel containing the nuclear fuel and then through the primary side of a heat exchanger, which produces steam in a secondary loop for powering turbines. In a boiling water reactor (BWR), water in the reactor vessel is converted into steam that is used directly to drive a turbine.
In the event of an accident, the reactor may need to be shut down. To initiate shutdown, control rods are inserted into the core. However, the reactor continues to produce decay heat after the control rods have been inserted. The removal of decay heat is the essential safety function in a nuclear reactor after shutdown. If the cooling systems are damaged, the reactor may accumulate excess heat that could fail the fuel elements in the reactor vessel, leading to a release of radioactive materials. Passive cooling systems reduce the probability of fuel damage because of their high reliability and independence from electric power.
Heat removal systems, commonly known as "safety condensers" or "isolation condensers," can remove the decay heat in a passive manner. Such systems use natural convection to condense the steam in a heat exchanger. This form of convection is the same as that which creates ocean currents, weather patterns, and flames, and is commonly known as hydrostatic natural convection or aerostatic natural convection. In general, static natural convection is caused by pressure differences created by heating a fluid under the influence of gravity.
One disadvantage of the use of static natural convection for passive heat removal in nuclear reactors is that the condenser must be located at an elevation above the steam source. Thus, such systems impose serious physical design constraints that add to the cost of the reactor. Furthermore, any non-condensible gases that enter the system can accumulate in the condenser, reducing heat transfer and eventually blocking hydrostatic convection. It is known that hydrogen may enter the system when heat released during an accident causes water to react with metal, and nitrogen may enter the system when emergency coolant from nitrogen-pressurized tanks is injected into the reactor vessel in the event of a malfunction of the primary cooling system. Steam traps with float-actuated valves cannot be used to remove non-condensible gases from the current condensers because they cannot separate the gases from the steam under the transient conditions of an accident.
In the event of damage to the primary cooling loops, emergency systems may be used to add coolant, as disclosed in U.S. Pat. Nos. 4,444,246 and 4,280,796, both issued to the inventor of the present invention. The system described in the above-referenced patents is passive, i.e., it operates without mechanical pumps and emergency power supplies. When coolant water is initially added to a hot reactor vessel, the resulting eruption of steam can cause steam binding, which prevents the flow of coolant water into the vessel. The above-referenced patents describe a system for alleviating the steam binding problem by using a condenser loop to quickly remove the excess steam. The system is not designed for long-term decay heat removal. In that system, a jet pump condenses the excess steam and returns the condensate to the vessel. Such a jet pump is a well-known device that injects steam through a nozzle at sonic or supersonic velocity into water in a mixing tube. The steam condenses rapidly, and the resulting compression shock creates suction to draw additional water into the mixing area.
Because jet pumps for steam binding alleviation applications involve rapid responses to an emergency, such as adding coolant water and condensing steam, these jet pumps are designed to condense the maximum amount of steam in the shortest period of time, Thus, these jet pump designs have design parameters including steam nozzle areas that are large relative to the water intake area to provide a large amount of steam relative to water. For long-term decay heat removal, however, the same design parameters would inhibit efficient removal of heat from a loop containing a heat exchanger through which the jet pump circulates water because the loop temperature fluctuates substantially with transient changes in steam pressure and temperature during the accident. Heat removal efficiency is maximized when the temperature of the loop remains high relative to that of the heat sink in which the heat exchanger is placed. Thus, if a long-term decay heat removal system were to use such a jet pump, after prolonged heat removal the heat sink temperature would 'exceed levels at which heat removal is efficient, and the steam would cease to completely condense.
A high steam pressure head is required to power a jet pump such as that described in the above-referenced 'patents, and such pressures exist only for a short duration after emergency cooling water has been dumped into the reactor vessel. The steam-binding alleviation system described in the above-referenced patents is not designed for long-term heat removal because it is only required during refilling of the reactor vessel; refilling takes only minutes, but decay heat must be removed for hours or even days.
An economical passive heat removal system that can continue to operate efficiently throughout the range of temperatures and pressures generated in a reactor during an accident or after shutdown would be highly desirable. Such a system should be economical and retrofittable to existing reactor designs. It would also be desirable for such a system to remove non-condensible gases. These problems and deficiencies are clearly felt in the art and are solved by the present invention in the manner described below.

Passive decay heat removal and internal depressurization system for nuclear reactors


Apparatus for precasting concrete products wherein dry mix is deposited in casting cavities defined by mating upper and base form sections, vibrated and/or pressure compacted, and the upper form section removed immediately for curing of a free standing green cast product. A single upper form section cooperates with a number of base sections and the latter are used to transport the green cast products for curing. Automatically separable base section parts are also employed for the transport of cured products. Forms are adapted for fork lift handling and include high intensity vibrators, sight openings for ascertaining a cavity full condition, closure plates for fill openings, pressure applying and finishing devices, and sectionalized construction for various size products. Casting machine includes mix delivery apparatus and form handling apparatus for upper and base form sections for automated casting and transfer of green cast products for curing.

"Dry mix" or "no slump" concrete having a relatively low moisture content has been used in the manufacture of concrete pipe in rotary packerhead machines and the like for some time and satisfactory pipe has been thus produced at comparatively high rates of production. Other types of precast concrete products, however, have been conventionally produced employing a "wet mix" casting process. In a wet mix process, the moisture content of the mix is substantially higher than in a dry mix process, and the conventional practice includes the deposition of mix in forms and the subsequent curing of the cast products with the forms in place. Curing may continue for a period of twelve to sixteen hours to reach approximately one fourth the full strength of the concrete and the forms are then stripped from the cast product and the product subsequently aged for a period of fourteen to twenty eight days to reach full strength. While the wet mix casting process has proven generally satisfactory for low volume production, severe drawbacks are encountered in adapting the process to a high volume production operation. The process is inherently slow and a large number of expensive forms are required.
It is the general object of the present invention to provide apparatus for the precasting of concrete products in a "dry mix" process which process and apparatus are particularly well adapted to high volume and low cost production.
A further object of the invention resides in the provision of apparatus as mentioned wherein dry mix is deposited in a casting cavity and vibrated and/or subjected to external pressure whereby to eliminate voids and to compact the mix and to thereby form a green cast product having sufficient initial structural integrity for self support, the product being thus adapted to immediate curing in a free standing condition with its form removed.
A still further object of the invention resides in the provision of apparatus as set forth wherein separable forms of a specific design are provided permitting the use of a single upper form section with a plurality of base form sections and thus effecting substantial savings in the cost of forms.
A still further object of the invention resides in the provision of apparatus as set forth wherein immediate removal of an upper form section upon completion of casting effects substantial reduction in curing time and thereby enhances high volume and low cost manufacture of concrete products.
A still further object of the invention resides in the provision apparatus as set forth wherein sectional form construction with upper and base sections permits the use of the base sections for the post casting transfer of green cast products and the post curing transfer of cured products.
Still another object of the invention resides in the provision of apparatus as set forth wherein forms are provided with sight openings for visually ascertaining the completion of form filling operations, with closure means for filling and thereafter compacting mix in a casting cavity, and with pressure applying and finishing means for compacting dry mix in the cavity.
Still another object of the invention resides in the provision of apparatus as set forth wherein forms are constructed in separable sections so as to provide various sizes of cast products with major portions of the forms usable throughout a range of product sizes.


The present invention provides an inexpensive and easily produced method for refurbishing transmission pump assemblies. The method of converting a transmission pump assembly from a first configuration to a second configuration comprises the steps of: a) providing a first configuration transmission pump assembly comprising a pump body and a pump cover, wherein the pump body and the pump cover each have a plurality of fluid passageways formed between worm tracks on at least one side thereof; b) removing a portion of the worm tracks from both the pump body and the pump cover; c) providing at least one insert; d) attaching the at least one insert into a predetermined position; and e) machining the pump cover and pump body to the second configuration.

The invention relates generally to a method of converting the configuration of a transmission pump into a later model year configuration transmission pump assembly. More specifically the invention relates to a method of converting a 1984-1994 General Motors 700 R4 transmission pump assembly into a 1995 or later configuration General Motors transmission pump assembly allowing a low cost replacement transmission pump.
An automotive transmission multiplies engine torque or reduces engine rpm to match varying operating conditions in a manner optimizing engine power and torque. An automatic transmission generally comprises a torque converter, automatic transmission shafts, planetary gearsets providing different gear ratios, planetary holding members or clutches, transmission fluid pump, transmission shafts, hydraulic valves, shift linkage, converter housing, transmission case, transmission fluid pan, and an extension housing.
The automatic transmission is generally operated by a hydraulic fluid circuit. Pressure is developed by the transmission fluid pump, sometimes called an oil pump or front pump. The pump draws fluid from the transmission fluid pan and creates hydraulic pressure, which is then directed to other parts of the transmission to fill the torque converter, operate the holding member band and clutch assemblies, control shifting, lubricate the moving parts of the transmission, and circulate the fluid to and from an oil cooler for heat transfer. The pump is driven by the engine typically through driving lugs on the torque converter. When the engine is running, the pump produces power to operate the hydraulic system.
General Motors introduced a second generation transmission pump on its model 700 R4 transmission assembly in model year 1984 that remained basically unchanged through model year 1994. The 700 R4, (also designated 4L60E) utilizes a C-Vane type transmission oil pump comprising a pump body, a pump vane assembly, and a pump cover assembly. The 700 R4 transmission has been modified several times over the years. Some of these changes directly affected the compatibility of the transmission pumps between different model years.
When a transmission pump fails and needs to be replaced, the vehicle owner typically has a new or remanufactured transmission pump installed. New transmission pumps direct from the original equipment manufacturer (OEM) can be quite expensive. Significant cost savings can be obtained by using a remanufactured part. For example, a salvaged and remanufactured transmission pump from a 1984 model year 700-R4 transmission could be used for the same transmission for 1984-1994 model years. As these are older cars and cover over ten years of production, the number of salvageable transmission pumps are plentiful and comparatively low cost. However due to later model year changes in the transmission, the same pump could not be used for the same transmission of a 1995 model year. The limited number of salvaged transmission pumps from a transmission pump having a run of one or two years makes it virtually impossible to get a remanufactured part, thereby forcing the consumer to pay for a new OEM transmission pump.
Therefore, there remains a need in the art for a method of converting an older version of the transmission pump into a configuration compatible with later model year transmission pumps.
An object of the present invention is to provide an inexpensive and easily produced method for refurbishing transmission pump assemblies for later model year transmissions. These and other advantages are provided by a method of changing the configuration of a transmission pump assembly from a first configuration to a second configuration, the method comprising the following steps: a) providing a first configuration transmission pump assembly comprising a pump body and a pump cover, wherein the pump body and the pump cover each have a plurality of fluid passageways formed between worm tracks on at least one side thereof; b) removing a portion of the worm tracks from both the pump body and the pump cover; c) providing at least one insert; d) attaching the at least one insert into a predetermined position; and e) machining the pump cover and pump body to the second configuration.

Method for converting the configuration of a transmission pump assembly


The rotary cathode X-ray tube equipment of the present invention is constructed so as to permit radiation of X-ray from all directions with respect to the whole circumference of a subject, and is used for x-ray CT. The equipment of the invention is constructed to prevent an X-ray radiation window 40 of a low strength from being influenced by atmospheric deformations of a vacuum vessel 1 or by machining and assembling errors, for example by using a joint portion disposed between the X-ray radiation window and an inner ring and having both a surface perpendicular to a rotational axis of a rotary member and a cylindrical surface parallel to the rotational axis, a face seal formed on the surface of the joint portion perpendicular to the rotational axis, and an axial seal formed on the cylindrical surface of the joint portion parallel to the rotational axis.

1. Field of the Invention
The present invention relates to rotary cathode X-ray tube equipment for X-ray CT which is constructed so as to permit X-ray irradiation from all directions with respect to the entire circumference of a subject.
2. Description of the Prior Art
FIG. 1 is a sectional view of a conventional arrangement for rotary cathode X-ray tube equipment which is disclosed, for example, in Japanese Patent Laid Open No. 115738/83. In the same figure, a vacuum vessel 1 is installed on the floor through a support base 2. The vacuum vessel 1 is in the form of a ring provided centrally with a subject insertion hole 4 for passing a subject 3 therethrough. The interior of the vacuum vessel 1 is maintained in high vacuum by means of a vacuum pump 5. An anode target 6 and a cathode portion 7 are disposed at a predetermined spacing within the vacuum vessel 1, the cathode portion 7 being connected to brushes 8 and 9. Between the brushes 8, 9 and the cathode portion 7 is provided a shielding plate 75 so that dust resulting from wear of the brushes 8 and 9 is prevented from moving toward the cathode portion 7, to which is applied a high voltage level of about -70 kV.
The anode target 6 is for generating X-ray under the impingement thereon of an electron beam emitted from the cathode portion 7. It is formed in a ring shape and is rotatable about a rotational axis a. More specifically, the anode target 6 is fixed to a target rotor 11 through a support member 10. The target rotor 11 is supported in a non-contact state by means of a magnet 12 which is for magnetic levitation, and is given a rotating torque by a drive means (not shown) so as to rotate around the rotational axis a. In operation, a high voltage level of about +70 kV is applied from the exterior to the target rotor 11 through a brush 13.
A touch-down bearing 14 is disposed near the target rotor 11, for supporting the target rotor 11 when the power source for the magnetic levitation magnet 12 has turned off or when it has become impossible to control the magnet 12 properly. During normal rotation of the target rotor 11, the touch-down bearing 14 does not contact the same rotor.
On the other hand, the cathode portion 7 is ring-shaped and serves as a charged particle generating mechanism. It is fixed to a cathode-portion rotor 15. The cathode-portion rotor 15 is supported in a non-contact state by means of a magnet 16 which is for magnetic levitation and which is located inside the rotor 15, and is given a rotating torque by a drive means (not shown) so as to rotate about the rotational axis a in the direction opposite to the target rotor 11. Consequently, the cathode portion 7 rotates in the direction opposite to the anode target 6. Further, an X-ray radiation window 17 is provided, and near the window 17 are disposed a collimator 18 and a ring-like detector 19 which is coaxial with the rotational axis a.
In the vicinity of they cathode-portion rotor 15 there is provided a touch-down bearing 20 which has the same function as the touch-down bearing 14. Between the brush 13 and the anode target 6 there is disposed a shielding plate 76 to prevent dust resulting from wear of the brush 13 from reaching the anode target 6. The numerals 21 and 22 each denote a brush for placing a cathode-side rotor 23 and an anode-side rotor 24 at earth potential. Numerals 77 to 81 each denote an electrical insulator for insulation of a high voltage. Between the anode-side rotor 24 and the anode target 6 there is provided an insulating material 82, and between the cathode-side rotor 23 and the cathode portion 7 there is provided an insulating material 83.
The following description is now provided about the operation of the conventional rotary cathode X-ray tube equipment shown in FIG. 1. First, an electron been emitted from the cathode portion 7 impinges on a focal point 25 of the anode target 6. An X-ray 26 generated from the focal point 25 passes through the X-ray radiation window 17, then passes through the subject 3 and thereafter enters the ring-shaped detector 19. An output of the detector 19 is transmitted to a computer (not shown) for image reconstruction by means of a data collection circuit (not shown) and is converted to a coaxial tomograph of the subject 3 in accordance with a predetermined reconstruction program.
In conventional rotary cathode X-ray tube equipment constructed as above, since the magnetic levitation magnets 12 and 16 are disposed outside the vacuum vessel 1, the gap between each of the magnets 12, 16 and the object attracted thereby becomes large. Therefore, it is necessary for the magnets 12 and 16 to be strong. That is, the size, weight and power consumption of the rotary cathode X-ray tube equipment are increased.


A polarization compensated imaging spectrometer and method are set forth which include a compensating mirror. The mirror is selected to have a surface coating and angle of incidence to impart polarization into the reflected electromagnetic radiation which substantially compensates for polarization imparted by the spectrometer disperser.

Imaging spectrometers are adapted to form pictures of a scene in different wavelength bands. For example a visual scene image may be formed at a slit which passes a segment of the image scene for dispersal into its various electromagnetic radiation component wavelengths, i.e. spectral bands. The energy of each of the dispersed spectral bands is typically detected by a two-dimensional detector array. One dimension of the array determines spatial information whereas the orthogonal dimension detects spectral energy information. As the spectrometer is scanned in a direction normal to the slit the entire image scene is serially scanned and the energies of the spectral bands as well as spacial details are detected by the detector. At the detector array the received energy of the bands is dispersed over the array which converts intensity into digitized signals which are, in turn, processed by the overall spectrometer imaging system.
Grating type dispersers as well as prisms have been used to disperse the image segment into component wavelengths for detection. Particularly where gratings are used, a significant degree of polarization sensitivity is imparted into the dispersed, spectral bands. This imparted polarization sensitivity varies with wavelength and is typically greatest at shorter wavelengths. For visible and near visible light, the degree of polarization sensitivity imparted by a grating at wavelengths of approximately 400 nm is on the order of between 2-2.5% for a grating frequency of about 40 grooves per millimeter. The polarization sensitivity is affected by the coating material ruled onto the grating plus any other protective coatings, angle of incidence and grating frequency (number of lines/mm).
Where the energy of the received image is to be measured and compared in the frequencies of the bands for purposes of quantitatively assessing the scene, the grating imparted polarization affects the accuracy of the spectrometer for polarized scene, particularly at the shorter wavelengths. For example, for satellite based oceanographic study, electromagnetic radiation as visible and near visible light reflected from the oceans is polarized to a degree. Measurement of reflected scene energy would therefore be affected by the disperser (e.g., grating) induced polarization, depending upon the orientation of the spectrometer and its dispenser relative to the scene polarization. If the disperser, for example, is disposed such that its imparted polarization is parallel to the scene polarization, band and resultant signals intensities at the array would be greater than if the disperser was positioned such that its imported polarization was in a plane perpendicular to the scene polarization, particularly at shorter wavelengths. Accordingly, the ability to accurately measure scene energies including any scene imparted polarizations is affected by the disperser imparted polarization.
There is, therefore, a need for a device and method to compensate and substantially correct for polarization which is imparted by the spectrometer disperser so that the spectrometer band signal intensities are not as sensitive to the relative orientation of the disperser to any scene polarization. More particularly there is a need for a simple device and method for substantially compensating for diffraction grating imparted polarization for an imaging spectrometer.

Polarization compensated imaging spectrometer


An improved safety stirrup (10) which prevents significant rearward shifting of the stirrup body (24), thereby reducing the possibility that a rider's foot (F) can pass completely through the stirrup body (24) and present a safety hazard. The safety stirrup body (24) includes an upper suspension shaft (26) having a pair of spaced, descending stirrup legs (28, 30) and a lowermost footpad (32); the shaft (26) is pivotally received within a looped stirrup strap (14). Significant rearward pivoting of the body (24) is prevented by provision of a plurality of upright, elongated, forwardly canted cam members (38-42) extending upwardly from the shaft (26). The cam members (38-42) are co-operable with the looped strap (14) for inhibiting rearward pivoting of the body (24).

1. Field of the Invention
The present invention is broadly concerned with an improved stirrup construction which is designed to inhibit rearward rotation of the stirrup to thus prevent inadvertent passage of a rider's foot completely through the stirrup and consequent injury to the rider. More particularly, the invention pertains to a safety stirrup having an upper, forwardly canted cam arrangement which is co-operable with the stirrup strap for preventing undue rearward rotation of the stirrup.
2. Description of the Prior Art
A common accident among horsemen results when the rider's foot passes forwardly through a stirrup, and can lead to an extreme danger to the rider of being dragged by the horse if the rider falls from the saddle while his foot is so entangled with the stirrup. This type of mishap is especially common with western-type saddles making use of stirrups having suspension shafts or tubes pivotally supported by small, looped leather straps which buckle around these shafts. Such stirrup arrangements allow the stirrup bodies to swing front-to-rear in an arc sometimes exceeding 180 degrees. This relatively unrestricted rearward stirrup rotation is a prime cause of accidents where the rider's foot passes completely through a stirrup.
A number of safety stirrups have been proposed in the past in an attempt to provide stirrup assemblies which prevent or at least ameliorate rider accidents. For example, U.S. Pat. No. 4,969,316 describes a cantilever stirrup designed to give way if a rider falls, thus preventing entanglement between the stirrup and the rider's foot. However, this patent does not provide any means for preventing or limiting rearward pivoting of the stirrup itself.
U.S. Pat. Nos. 367,696, 1,074,481, 215,942, 23,572, 107,448 and 4,281,503 describe other types of specialized stirrup constructions seeking to provide enhanced rider safety. Here again though, these patents do not address the problem of unrestricted, front-to-rear pivoting of stirrups.


A thermochromic laminate member comprises a thin transparent iridescent film laminated on a thermochromic layer 2, and exhibits rainbow-color pattern. The thermochromic layer shows reversible change between a first colored state and a second colored state by a temperature change.

1. Field of the Invention
The present invention relates to a thermochromic chromic laminate member showing iridescent pattern and a toy utilizing the same.
2. Related Background Art
Thermochromic materials showing color changes between a colored state and a colorless state or a first colored state and a second colored state by a temperature change, and coloring articles utilizing such thermochromic material have already been well known, as disclosed in the U.S. Pat. Nos. 4,028,118 and 5,085,607, and have widely been utilized in various fields such as temperature detection, toys utilizing the advantage or unexpectedness of color change, and teaching aids.

Thermochromic laminate member and toy utilizing the same


A method for transmitting flight parameters of a lead aircraft to an intruder aircraft. Transmission includes a collision avoidance system connected to which is a flight parameter transmission authorization system having a database including coordinates defining a volume of confidence smaller than the monitoring volume. The flight parameter transmission authorization system of the lead aircraft authorizes, only for an intruder aircraft identified as flying within the volume of confidence, transmission of at least one flight parameter of the lead aircraft, such that this intruder aircraft is able to calculate the position of centers of wake vortices generated by the lead aircraft or the flow strength of the wake vortices. Exchanging flight parameters of the lead aircraft only with intruder aircraft flying within the volume of confidence with limited dimensions makes it possible not to exceed the maximum capacity of the bandwidth of the automated communication.

An aircraft in flight generates two wake vortices in its wake. Starting from the wings, the vortices tend first of all to move closer to one another, and then to maintain a more or less constant distance from one another while at the same time losing altitude with respect to the altitude at which they were generated.
The formation of wake vortices behind an aircraft is well known and documented, and the position of the centers of the vortices generated by an aircraft is acquired in particular by calculating their descent speed. This depends on flight parameters of the aircraft, such as mass, altitude, roll angle, aerodynamic configuration, size, air density at the flight point, speed, etc.
It is beneficial for an aircraft, termed intruder aircraft, to be able to precisely calculate the positions of the vortices generated in the wake by an aircraft, termed lead aircraft, in order:                to fly in formation behind the lead aircraft while drawing maximum benefit from the updraughts in the vortices in order to reduce its fuel consumption; or        to avoid being subjected to turbulence caused by the vortices.
For an intruder aircraft flying in formation behind a lead aircraft, it is additionally beneficial to calculate the flow strength of the wake vortices generated by the lead aircraft, so as to position itself effectively in the updraughts of the vortices. The flow strength is also able to be calculated through knowledge of the flight parameters of the lead aircraft, such as mass, size, air density at the flight point, speed, etc.
In a known manner, aircraft that are close to one another communicate data between one another in an automated manner, in particular via an active collision avoidance device of TCAS (Traffic Collision Avoidance System) type. Such a system fitted on an aircraft is able to monitor up to forty-five other aircraft flying within a monitoring volume of the TCAS and, as a result, the bandwidth of the automated data communications between the aircraft has to be restricted such that only the altitude, necessary for predicting a risk of collision, is exchanged. As a result, on account of the bandwidth restriction, the flight parameters necessary for calculating the descent speed of the centers of the vortices generated by the lead aircraft or for calculating the flow strength of the wake vortices are not able to be transmitted to the intruder aircraft.

Method for transmitting flight parameters of a lead aircraft to an intruder aircraft


Disclosed is an input/output (IO) device for transmitting a data bit signal. In one embodiment, the IO device includes an IO device input node for receiving an input data bit signal, an IO device output node, and a common ground node. The IO device also includes a first driver having first and second n-channel FETs coupled together, first and second p-channel FETs coupled together, a plurality of third n-channel or p-channel FETs each having a drain coupled to the IO device input node, and a plurality of first capacitors coupled between the common ground node and respective sources of the plurality of third n-channel or p-channel FETs. The drains of the first p-channel FET and the second n-channel FET are coupled to the IO device output node, while the gate of the first n-channel FET is coupled to the IO device input node.

FIG. 1 illustrates in block diagram form a microprocessor 10 coupled to memory device 12 via a data bus 14. Although not shown, data bus 14 includes a plurality of conductive lines, each one of which is capable of transmitting a data bit signal between memory device 12 and microprocessor 10.
Microprocessor 10 includes a plurality of input/output (IO) devices (not shown in FIG. 1) coupled to respective conductive lines of data bus 14. IO devices transmit or receive data bit signals. FIG. 2 is a schematic diagram of a driver 16 contained in one of the IO devices of microprocessor 10. Driver 16 drives one of the conductive lines of data bus 14 in response to receiving an input data bit signal.
Driver 16 includes a p-channel field effect transistor 20, an n-channel field effect transistor 22, an input node 24, and an output node 26. Although not shown, output node 26 is coupled to a conductive line of data bus 14. P-channel field effect transistors will be referred to as p-channel FETs, and n-channel field effect transistors will be referred to as n-channel FETs. N-channel and p-channel FETs include a gate, a drain, and a source designated g, d, and s, respectively. The gates of FETs 20 and 22 are coupled to input node 24. The drains of FETs 20 and 22 are coupled to output node 26. The source of FET 20 is coupled to Vdd, while the source of FET 22 is coupled to Vcg. Vdd is a supply voltage provided from a source external to microprocessor 12, while Vcg is common ground.
In operation, input node 24 receives an input data bit signal Din directly or indirectly from the core of microprocessor 10. Although not shown, Din is typically provided to input node 24 by a signal inverting circuit. The input data bit signal Din varies between two voltage levels Vdd or Vcg representing a binary one or a binary zero, respectively. In response to receiving Din, driver 16 chargers or discharges output node 26 and the conductive line of data bus 14 coupled thereto. When driver 16 receives Din equal to Vcg, driver 16 charges output node 26 to Vdd. When driver 16 receives Din equal to Vdd, driver 16 discharges output node 26 to Vcg. In this manner, driver 16 generates an output data bit signal Dout at output node 26 that varies between Vdd and Vcg in response to receiving input data bit signal Din that varies between Vdd and Vcg.
P-channel or n-channel FETs are often referred to as electronic switches. A p-channel FET is active or xe2x80x9cswitched onxe2x80x9d when its gate voltage Vg is a threshold voltage Vt or more below its source voltage Vs. In other words, a p-channel FET is active when Vg less than Vsxe2x88x92Vt. When active, a p-channel FET provides a very low impedance path between its source and drain such that current can flow therebetween. When its gate voltage Vg is greater than a threshold voltage Vt below its source voltage Vs the p-channel FET is inactive. In other words, a p-channel FET is inactive when Vg greater than Vsxe2x88x92Vt. When inactive, essentially no current can flow between the p-channel FET""s source and drain. In FIG. 2, p-channel FET 20 is active when the voltage of Din is Vcg and inactive when Din is Vdd.
An n-channel FET is active or xe2x80x9cswitched onxe2x80x9d when its gate voltage Vg is a threshold voltage Vt or more above its source voltage Vs. In other words, an n-channel FET is active when Vg greater than Vs+Vt. When active, an n-channel FET provides a very low impedance path between its source and drain such that current can flow therebetween. An n-channel FET is inactive when Vg less than Vs+Vt. When inactive, essentially no current can flow between the n-channel FET""s source and drain. In FIG. 2, n-channel FET 22 is active when the voltage of Din is Vdd and inactive when Din is Vcg.
N-channel or p-channel FET operation is subject to limitations. More particularly, the voltage Vgd between the gate and the drain of the devices or the voltage Vgs between the gate and source of the devices should not exceed a gate oxide voltage limit Vlimit. If Vgs or Vgd exceeds Vlimit in either a p-channel or n-channel FET, damage can occur to the FET that renders it permanently inoperable.
Vlimit (also known as gate oxide integrity) depends on failure in time (FIT) rate, the gate area of the FET, and/or the distance between the source and drain of the FET. The FIT rate requirement is provided by a system design specification. For p-channel and n-channel FETs manufactured using a 0.18 micron process, Vlimit may vary between 1.4-1.8 volts depending on how the p-channel FETs are operated. The Vlimit for p-channel and n-channel FETs of a particular size and used in a particular manner, can be determined based on experimental results.
The sizes of FETs, including the distance between sources and drains thereof, in microprocessors continue to reduce as semiconductor manufacturing technology advances. As FETs continue to reduce in size, so does their Vlimit.
As noted above, driver 16 operates to charge or discharge output node 26, and thus the conductive line of data bus 14 and the memory device 12 coupled thereto, in accordance with the input data bit signal Din. Characteristics of driver 16 are subject to variations in operational parameters such as temperature and/or magnitude of supply voltage Vdd. For example, an increase in operating temperature of driver 16 may increase its output impedance and potentially reduce driver 16""s drive strength or ability to fully charge or discharge output node 26 within a predetermined amount of time.
Notwithstanding variations in operational parameters, which are dynamic in nature, the actual output impedance of driver 16 may not match the expected impedance of driver 16 due to unexpected and permanent variations in the physical structure of FETs 20 and 22. More particularly, microprocessors including their drivers are manufactured on silicon wafers using complex equipment and processes. Once completed, the microprocessors are severed from the silicon wafer and individually packaged for subsequent use. A single wafer, depending on its size, is capable of producing several microprocessors. In theory, each of these microprocessors should be identical to each other in physical structure. In practice, slight physical variations exist between these microprocessors. For example, due to variations in the fabrication process, the doping density in the source or drain regions of FETs 20 and 22 of driver 16, or the length or width of gates of FETs 20 and 22 of driver 16, may unexpectedly vary from microprocessor to microprocessor. These physical variations in the FETs are static in nature and may unexpectedly increase or decrease the output impedance of driver 16.
Generally, the output impedance of driver 16 can be represented as its output voltage V divided by its output current I. As noted above, the output impedance of driver 16 may vary with, for example, temperature and/or magnitude of Vdd. FIG. 4 illustrates IV curves that plot the output voltage V of driver 16 versus the output current I of driver 16. Each IV curve corresponds to driver 16 operating at different temperatures and/or magnitudes of Vdd. The IV curves of FIG. 4 were drawn with the presumption that no load is applied to output node 26.
As can be seen from FIG. 4, each of the IV curves are non-linear which means that the output impedance of driver 16 varies with its output voltage. The IV curves of FIG. 4 also show that output impedance of driver 16 varies with temperature and/or magnitude of Vdd for a given output voltage V. The impedance of the conductive line and the memory device 12 coupled to output node 26, however, is static or substantially static. As a consequence, a mismatch generally occurs between the output impedance of driver 16 and the combined impedance of the conductive line and memory device 12. This mismatch of impedances may degrade or limit the ability of driver 16 to transmit data bit signals to memory device 12 for storage therein.
As noted above, driver 16 charges or discharges output node 26, and thus the conductive line of data bus 14 and the memory device 12 coupled thereto, in accordance with the input data bit signal Din. A timing specification for data bus 14 may require driver 16 to fully charge or discharge output node 26 during predefined timing windows in order to properly transmit data bit signals to memory device 12. Microprocessor 10 including its drivers 16 should be designed to meet the timing requirements of data bus 14. The design should take into account expected transmission delays of driver 16 and other circuitry coupled to input node 24. Unfortunately, the actual transmission delays of driver 16 and other circuitry coupled to input node 24 do not always equal the expected transmission delays due to variations of microprocessor temperature and/or the magnitude of supply voltage Vdd. These variations may inhibit the ability of driver 16 to fully charge or discharge node 26 during the timing windows required by the specification of bus 14. To illustrate, an increase in temperature beyond that which is expected, may slow the driver 16""s ability to fully charge or discharge output node 26 such that driver 16 cannot charge or discharge output node 26 to Vdd or Vcg, respectively, during predefined timing windows.
Notwithstanding variations in temperature and magnitude of supply voltage Vdd, the actual ability of driver 16 to fully charge or discharge output node 26 during predefined timing windows may also be affected by unexpected variations in the physical structure of FETs of microprocessor 10 including FETs 20 and 22. These physical variations in the FETs may unexpectedly increase or decrease the ability of driver 16 to charge or discharge output node 26 during predefined timing windows.
Disclosed is an input/output (IO) device for transmitting a data bit signal. In one embodiment, the IO device includes an IO device input node for receiving an input data bit signal, an IO device output node, and a common ground node. The IO device also includes a first driver having first and second n-channel FETs coupled together, first and second p-channel FETs coupled together, a plurality of third n-channel FETs each having a drain coupled to the IO device input node, and a plurality of first capacitors coupled between the common ground node and respective sources of the plurality of third n-channel FETs. The drains of the first p-channel FET and the second n-channel FET are coupled to the IO device output node, while the gate of the first n-channel FET is coupled to the IO device input node.
In another embodiment, the IO device includes a plurality of fourth n-channel FETs each having a drain coupled to the IO device input node, and a plurality of second capacitors coupled between the common ground and respective sources of the plurality of fourth n-channel FETs. In this embodiment, IO device also includes a first code generation circuit for generating a first code, and a second code generation circuit for generating a second code. The first and second codes are defined by a plurality of first code bit signals and a plurality of second code bit signals, respectively. Each of the plurality of third n-channel FETs includes a gate that receives a respective first code bit signal from the first code generation circuit, while each of the plurality of forth n-channel FETs includes a gate coupled that receives a respective second code bit signal from the second code generation circuit.

Input/output device having dynamic delay


A method to deliver spark during a start for an internal combustion engine is described. The method provides individual cylinder spark angle control based on the number of fueled cylinder events. The method offers improved engine emissions while maintaining engine speed run-up performance.

Engine starting control has a significant impact on engine emissions and engine speed run-up. Spark placement, relative to piston position, influences both torque and emissions. Torque is necessary to accelerate an engine from cranking speed up to idle speed. Further, low starting emissions are desirable when catalysts are cold and their efficiency is low. In general, advancing spark increases engine torque while retarding spark reduces emissions. Therefore, it is important to provide consistent well-placed spark timing to ensure engine speed run-up with reduced emissions.
One method to adjust spark while an engine is cold is described in U.S. Pat. No. 6,135,087. This method provides spark advance based on coolant temperature and engine speed. Further, the amount of spark advance accounts for engine position and time from the start-to-run transfer. More particularly, the method initially determines whether the desired spark advance is before top dead center and whether the throttle is open. If so, the method uses engine speed and coolant temperature to determine a spark advance multiplier. Thereafter, the current engine position pulse is loaded and an engine position multiplier is interpolated and applied to the spark advance multiplier value. Next, the time since the start-to-run is loaded and a start-to-run multiplier is interpolated and applied to the spark advance multiplier value. Finally, the spark is advanced via the spark advance multiplier value as adjusted by the engine position pulse multiplier and the time since start-to-run transfer multiplier. Upon engine operation reaching an after top dead center condition or when the throttle is closed, the method is exited and the engine is returned to normal spark control.
The inventors herein have recognized several disadvantages of this approach. Namely, the approach changes spark advance based on engine position, thereby resulting in inconsistent spark placement during the engine start. In other words, when an engine is turned off, it generally stops at a random position. In general, key-off removes power from the engine controller and sensors so that engine position data is lost. Consequently, the engine controller monitors several signals during a start to reestablish engine position. Thus, engine position is changing while the engine controller monitors cam and crank signals, attempting to determine engine position. The number of cylinder events before engine position can be established will vary from start to start depending on where the engine has stopped and on the complexity of the engine position monitoring system.
Therefore, if spark based on position is delivered without regard to synchronization between the engine controller and the engine, or without regard to fuel delivery, the angle at which spark is delivered may vary from start to start.
As an example, a fueled cylinder receiving spark may receive spark at an angle intended for the next or prior fueled cylinder. As such, engine position based spark as presented in the prior art, may deliver less than optimal spark.
Furthermore, the method functions only when base spark advance is after top dead center (ATDC) and if the throttle is open. Therefore, the above-mentioned approach does not optimally deliver spark during start where the throttle is closed and retarded spark is used to lower emissions.
Another method to adjust spark when and engine is cold is described in U.S. Pat. No. 5,483,946 owned by the assignee of the present invention. The method describes retarding ignition timing from a nominal value during a period following engine start and returning the ignition timing to the nominal value by termination of the period, where the period is based on time.
The inventors herein have also recognized that while this approach works well during cold engine operation, it can be inaccurate during start because the method adjusts spark in relation to time. Spark based on time delivers a spark advance that is a function of time since the timer is started. However, there is not a one to one relationship between engine position and time due to variability in engine stopping location as discussed above. Further, engine position is a mechanical dimension; time is a continuum, which lacks spatial dimensions.


Systems and methods for tool assisted piece assembly are generally discussed herein. A system for tool assisted piece assembly may include a container, assembly pieces in the container, and at least one tool. The container may include a transparent portion configured to allow a user to see inside the container and an opening in the container. The at least one tool may be configured to allow a user manipulate the assembly pieces inside the enclosed container with the tool.

There are several toys and assistive tools, such instruments can help children and adults to improve their hand-eye coordination and hone their motor skills or logical thinking. Though there are many such available items, there are few, if any, aids, toys, tools, or the like that are engaging, fun, safe, and include levels of increasing complexity. In some examples, a 52 card deck of standard playing cards may be used to teach children and people with disabilities to improve their motor skills and to steady their hand motor skills.
In other cases, several building blocks or shapes of varying dimensions can help children build a small assembly or structure either purely out of the person's imagination or with some external guidance, such as a user's manual or building instructions. In the case of building blocks, the smaller they are the better they may promote fine motor skill and dexterity training. However, the smaller the blocks the easier it can be to lose the blocks. In addition, smaller blocks may potentially create a choking hazard, such as for younger people. This may lead to an unsafe environment and a concern for the person using the assembly blocks. Larger blocks may tend to get lost or misplaced gradually and take up more space than smaller assembly blocks.

Tool assisted piece assembly in enclosed container