A method of detecting the smoke of a forest fire using the spatiotemporal Bag-of-Features (BoF) of the smoke and a random forest is provided. In the method, whenever each frame of a video sequence is input, a difference between the input frame and a previous frame is detected, and the input frame is set as a key frame if the difference exceeds a predetermined first threshold value. One or more moving blocks are detected in the set key frame. One or more candidate smoke blocks are extracted from the moving blocks using a smoke color model. BoF representations are generated from the detected candidate smoke blocks. Whether smoke of the candidate smoke blocks is actual smoke is determined by performing random forest learning on the generated BoF representation.

Among various natural disasters, such as storms, drought, floods, landslides and tsunamis (seismic sea waves), forest fires rank high as a natural disaster that causes huge losses of both life and property and generates ecological problems. Accordingly, an early warning of a forest fire is crucial for a reduction in the possible loss of both life and property. Recently, thanks to the rapid advancement of information technology, automatic forest fire detection has become a new research field.
A conventional method for detecting a forest fire is to detect a fire or smoke with the naked eye. Currently, in order to overcome the problems of the conventional method, Infrared (IR) sensors and a Light Detection And Ranging (LIDAR) system are used. They detect a forest fire by detecting the heat flux of flame light and measuring laser light generated by back scattering via smoke particles. However, this optical sensor-based forest fire detection method is problematic in that many erroneous warnings are issued because of atmospheric conditions or the reflection of light, and in that there is a large distance between a sensor and the starting point of a fire. Recently, a forest fire detection method using a Charge-Coupled Device (CCD) camera has been widely used because of the advantages in which equipment and management costs are low, a single camera can cover a wide range, the response time for the detection of a fire and smoke is short, and an administrator can detect a fire and also monitor the states of flame and smoke without visiting a corresponding location. However, this method still has the problems of an illuminance environment, variations in the color of smoke, and low-quality outdoor space images.
In general, the detection of a forest fire may be divided into two categories: smoke detection and flame detection. Since, during the development of a forest fire, smoke is generated prior to flame, it is particularly important to rapidly and accurately detect smoke in order to issue an early warning of a forest fire. Currently, various methods for detecting smoke have been researched.
Töreyin and Cetin proposed a part-based smoke detection algorithm using four sub-algorithms (see B. U. Töreyin and A. E. Cetin, "Wildfire Detection using LMS based Active Learning," IEEE International Conference on Acoustics, Speech and Signal Processing, 1461-1464, 2009). That is, in this algorithm, four sub-algorithms, including (a) a sub-algorithm for detecting a slow-moving video object, (b) a sub-algorithm for detecting a gray region, (c) a sub-algorithm for detecting a rising object, and (d) a sub-algorithm for removing a shadow, separately detect the presence of smoke, and the determinations of the sub-algorithms are combined with each other by an adaptive weighted majority algorithm.
Ham et al. proposed an algorithm for detecting the smoke of a forest fire using Fuzzy Finite Automata (FFA) and visual features (see S. J. Ham, B. C. Ko, and J. Y. Nam, "Vision based Forest Smoke Detection using Analyzing of Temporal Patterns of Smoke and their Probability Models," Image Processing: Machine Vision Applications IV, 7877:1-6, 2011).
However, the above proposed methods are problematic in that they confuse a moving object, such as a moving cloud or a swaying tree, with smoke, thus frequently resulting in the case in which they cannot accurately detect actual smoke and thus provide false information.
The above information is presented as background information only to assist with an understanding of the present disclosure. No determination has been made, and no assertion is made, as to whether any of the above might be applicable as prior art with regard to the present disclosure.

Method of detecting smoke of forest fire using spatiotemporal BoF of smoke and random forest

Industry Academic Cooperation Foundation Keimyung University


A retention clip includes a base with a plurality of instrument engagement elements at a top of the base. A bottom of the base is configured to be secured to another object. The retention clip may have a size that enables it to be secured to and that enables it to secure other instruments to a portable object. As an example, the retention clip may be configured to secure a plurality of writing instruments to a hard hat, a tool box, a measuring tape or the like.

Conventionally, individuals have carried writing instruments around by holding them in their hands, placing the writing instruments behind their ears, putting the writing instruments in their pockets or in a bag or another container, such as a brief case, a shoulder bag, a backpack, a purse, a tool box or the like.
When an individual carries a writing instrument in his or her hand, his or her hand is not free to perform other activities. While many individuals can deftly hold pens or pencils behind their ears, some cannot. Moreover, ears are typically not adapted to hold multiple writing instruments.
Placement of writing instruments in the pockets of shirts, jackets, coats or pants can be convenient, but occasionally results in pencil or ink marks on an individual's clothing. Writing instruments, when kept in pants pockets, can also tear holes into the pockets, puncture the individual keeping the writing instrument(s) in his or her pocket(s) and/or damage the writing instrument(s).
Storage of writing instruments in bags often limits their accessibility and consumes an individual's time. Typically, the bag must be opened and the writing instrument located before it can be withdrawn from the bag and used by the individual. Once the individual is done using the writing instrument, he or she must replace the writing instrument in the bag and close the bag.

Retention clip for securing instruments of different sizes and/or configurations to other objects


A control method includes detecting an operational command to a first memory unit, interrupting an operational status of a second memory unit, asserting the operational command corresponding to the first memory unit, and recovering the operational status of the second memory unit. The first memory unit and the second memory unit correspond to the same channel.

Technical Field
The present disclosure relates to a memory device. More particularly, the present disclosure relates to a memory controller and a control method thereof.
Description of Related Art
Flash memory devices have been widely utilized. In general, a memory device is configured to a have a memory controller for controlling multiple flash memory dies of multiple channels.
Generally speaking, the memory controller is required to assert another access command corresponding to a flash memory die after a current access command on the flash memory die is ended. Moreover, at any specific point in time, the memory controller is only able to make one of the multiple flash memory dies in the same channel transmit data. In some approaches, the memory controller is configured to make the flash memory dies in the same channel enter a busy status at the same time. However, due to the limitation of the memory controller discussed above, and with the increase in data throughput of a processor coupled to the memory device, it is difficult to make the flash memory dies in the same channel enter the busy status at the same time. As a result, the data transmission efficiency is reduced.

Memory device, memory controller, and control method thereof


When one-video program data (layer-coded data) of a plurality of layers is transmitted in a single channel, a video signal is layer-coded in an MPEG system, the layer-coded ES (Elementary Stream) data is converted to a PES (Packetized Elementary Stream) for each layer, and the PES is then converted to a RTP (Real-Time Protocol) packet, which is then converted to a UDP (User Datagram Protocol). An identifier is then annexed to a UDP packet data for each layer to form an IP (Internet Protocol) packet.

1. Field of the Invention
The present invention relates to compressed coded data transmitting systems, and more particularly to an apparatus for packetizing layer-coded video data and for transmitting it.
2. Description of the Related Art
In the transmission of video data, a system is known which divides coded data which contains DCT (Discreet Cosine Transform) components into low and high frequency component data and packetizes them individual-ly in a H.261 encoding system which is an international standard for video conference, as described in JP-A-10-23418 laid-open on Jan. 23, 1998. In this invention, if data to be transmitted comprises low frequency components, a flag indicative of high priority is annexed to a packet for transmitting the data whereas if the data contains high frequency components, a flag indicative of low priority is annexed to the data for transmitting purposes. A gateway (which is a packet video speed converter capable of converting a video stream speed) disposed on a network discards the packets to which the flag indicative of low priority is annexed (high frequency component data) when the network becomes congested, alleviate the congested state of the network to thereby prevent a deterioration in the video quality.
For example, "Encoding, Transmitting, and Controlling System in Video Multicast", The Journal of the Institute of Image Information and Television Engineers, Vol. 52, No. 6, pp. 863–870 (1998-6) describes a layet-coded data transmission controlling system in which layer-coded video data is transmitted from a sever to a client in a multi-channel system using an IP address, transmit/receive code port numbers, etc. In this system, a total of six kinds of encoded data of low and high frequency components of respective I, P and B frame data, which an MPEG encoding system (Generic Coding of Moving Pictures and Associated Audio: Video, ISO/IEC 13818-2) which is an international standard prescribes for layering the video data, are transmitted from the sever to the client, using a plurality of channels. In order to reproduce the P frame data among the I, P and B frame data which the MPEG encoding system prescribes, the I frame data is required. In order to reproduce the B frame data, the I and P frame data are required. As a result, the respective decreasing significances are placed on the I, P and B frames in this order. The low frequency components of each frame which represent its basic contour are important compared to its high frequency components which represent the details of the frame. There are a total of six leveled significances, inclusive of those of the I, P and B frame structures. By transmitting those six leveled data, using a plurality of channels, only data for a layer which the client requests can be transmitted.
JP-A-6-339137 laid-open on Dec. 6, 1994 describes on its front page that "an image signal is packetized in packet assembling section 13 for each layer and is transmitted from transmitting section 14."
JP-A-3-22780 laid-open on Jan. 31, 1991 describes on page 4, lower right column, line 18—page 5, upper left column, line 2 that "a first group of packets are formed of those image signal components, loss of which will cause a small extent of degradation of image quality and a second group of packets are formed of those image signal components, loss of which will cause a large extent of degradation of image quality, and a high priority is given to the second group of packets so that discard of the second group of packets is hardly effected."
JP-A-2-58938 laid-open on Feb. 28, 1990 describes in its claim that "means for layer-structuring the coded information into basic blocks for decoding and into additional blocks for interpolating them and thereafter packetizing the resulting information for transmission".
JP-A-2-86241 laid-open on Mar. 27, 1990 describes in its claim that "coded information is layer-structured into those portions which will exert small influence on the image quality and into those portions which will exert large influence on the image quality, and several blocks are formed into a packet for each portion".
JP-A-6-125361 laid-open on May 6, 1994 discloses a speech packet communication system intended to suppress degradation of speech quality when a packet is discarded.
JP-A-4-83488 laid-open on Mar. 17, 1992 discloses use of the layer-coding technique and the burst error correction technique in an ATM image signal transmission.


A wheel monitoring system comprising a wheel, a bearing mechanically coupled to the wheel, an axle mechanically coupled to the bearing, and a wheel speed transducer (WST) disposed in the axle. The WST may be configured to detect vibrations. A method of monitoring a bearing is also provided and may comprise measuring a vibration of the bearing, comparing the vibration of the bearing to a predetermined vibration, and estimating a remaining useful life of the bearing.

Aircraft wheels may use tapered roller bearings to enable wheels to roll smoothly. The typical wheel bearing may have a life span that is shorter than the life of the aircraft. Thus, bearings may be replaced from time to time. Visual inspections may be performed to evaluate whether a bearing may be ready for replacement. However, complete replacement of the bearing may cause slight damage to the wheel as a portion of the bearing may be press fit into the wheel. Thus, after a limited number of bearing replacement, the damage to the wheel may dictate that the wheel be replaced as well.
One obstacle to preventative bearing maintenance is human error and consistency. Visual inspection quality may vary by the inspector or process used. Additionally, some replacement bearings may be misaligned upon reassembly. If misalignment goes undetected, a bearing failure may result. Bearings may fail due to corrosion, spalling, misalignment, foreign materials, handling damage, brinelling, lubrication, or excessive load. If bearing failure does occur, it also may result in permanent damage to the wheel or axle. In some instances, wheels may detach from the axle and aircraft. In the field, undetected wheel-bearing failures frequently dictate a high-cost replacement of the wheel and axle.

Systems and methods for detecting wheel bearing wear with mounted accelerometers


An exterior heat exchanger is provided with first to fourth paths. The flow rate of the air being blown by an exterior blower to pass through the first path closer to a refrigerant inlet of the exterior heat exchanger is set to be higher than that of the air being blown by the exterior blower to pass through the fourth path closer to a refrigerant outlet of the exterior heat exchanger.

The present disclosure relates to a vehicle air conditioner including a heat pump device which performs heating and defrosting modes of operation.
A vehicle air conditioner with a heat pump device has been mounted on a car and other kinds of vehicles (see, for example, Japanese Unexamined Patent Publication No. 2010-111222). The heat pump device includes a compressor, an interior heat exchanger, an expansion valve, and an exterior heat exchanger. An interior fan to blow air toward the interior heat exchanger is provided inside the vehicle cabin, and an exterior fan to blow air toward the exterior heat exchanger is provided outside the vehicle cabin.
During heating, the interior heat exchanger functions as a radiator, and the exterior heat exchanger functions as a heat absorber. If frost is formed on the exterior heat exchanger during heating, the operation modes are switched into a defrosting operation mode to supply a high-temperature refrigerant to the exterior heat exchanger. According to Japanese Unexamined Patent Publication No. 2010-111222, the exterior fan is stopped during the defrosting mode of operation, and when the defrosting mode of operation ends, the airflow rate of the exterior fan is maximized to blow off the water deposited on the exterior heat exchanger.
In general, the exterior heat exchanger is rarely frosted uniformly, if ever, and in most cases, has a region that frosts easily during heating and a region that does not frost easily during heating. Furthermore, depending on the configuration and operating state of the heat pump device, sometimes more heat may be dissipated, and frost may be formed more easily, in a region closer to a refrigerant outlet of the exterior heat exchanger than in a region closer to a refrigerant inlet thereof.
Once the exterior heat exchanger is frosted albeit just partially, the frost tends to grow from there and eventually cover the exterior heat exchanger entirely. That is why if the formation of frost on such an easily frostable region can be delayed as much as possible, the heating performance capacity is improvable.
In view of the foregoing background, it is therefore an object of the present disclosure to improve the heating capacity, and eventually increase the occupant's comfortableness, by delaying the formation of frost on such a region closer to the refrigerant outlet of the exterior heat exchanger as much as possible if the region closer to the refrigerant outlet tends to frost more easily during heating operation than another region closer to the refrigerant inlet of the exterior heat exchanger.


A cationic dispersion which includes at least one pigment, water, and at least one quaternary salt of a styrene maleimide imide resin in an amount effective to disperse the organic pigment. A method for preparing the cationic dispersion includes (i) mixing, at 500 to 10,000 rpm, at least one pigment; water; and either (a) at least one a quaternary salt of a styrene maleimide imide resin or (b) at least one styrene maleimide imide resin in combination with at least one weak acid, thereby forming a dispersion premix; (ii) milling the dispersion premix in a mixer filled with ceramic, metal or glass beads for a period of time sufficient to reduce pigment agglomerates to primary particles, thereby forming a non-standardized dispersion; and (iii) standardizing the dispersion against a color standard by adding water. The resulting cationic dispersion exhibits good alkali resistance and lightfastness, and can be used to integrally color concrete and other building materials.

1. Field of the Invention
This invention relates to a method for coloring building materials such as concrete, asphalt, plaster, mortar and cement mortar. More particularly, this invention relates to a method for coloring building materials using a cationic dispersion which contains at least one pigment, water, and at least one dispersing agent comprising a quaternary ammonium salt of a styrene maleimide imide copolymer.
2. Description of the Prior Art
It is desirable to color exposed concrete surfaces for both aesthetic and functional reasons. Colored concrete buildings do not present an environment as sterile and cold as white concrete. In addition, light colors can be used in sunny climates to help reduce glare while darker colors may be used to increase a building's heat storage capacity in cooler climates.
Coloring the exposed surface by painting or by coating the surface with some other decorative layer is known. U.S. Pat. Nos. 2,549,516; 3,929,692 and 4,134,956 disclose compositions for covering exposed concrete surfaces. However, painting or application of a coating layer is an additional step in construction which adds cost and complexity to a construction project. Moreover, an exterior painted surface may require repainting in a relatively short period of time.
Another approach is to add a color additive to the building material, thereby eliminating the extra step associated with painting the building surface. However, any color additive must be uniformly dispersed throughout the building material. This can be difficult given the low intensity mixing and short mixing times customary in the building materials industry. Moreover, the additive must not adversely affect the desirable properties of the building material, such as the strength or setting behavior of concrete or reduce the compressive strength or abrasion resistance of asphalt. See ASTM C 979-82 "Standard Specification for Pigments for Integrally Colored Concrete," which contains some of the industry association standards for coloring concrete.
Inorganic pigments are typically used as color additives for building materials and typically include iron oxides (natural and synthetic), chromium oxide, cobalt blue, and titanium dioxide. However, these inorganic pigments offer a limited range of colors and brightness.
Organic pigments have not been used to color building materials as it is believed they lack sufficient alkali resistance and lightfastness. In 1981 the American Society for Testing and Materials (ASTM) in a report entitled "Pigments for Integrally Colored Concrete," discussed the test results of various inorganic and organic pigments for lightfastness, alkali resistance, water wettability and curing stability. All of the organic pigments tested, including phthalocyanine green, failed to meet the lightfastness testing standards.
Dry pigment powders have been used to color concrete compositions because they are highly dispersible. However, these powders have poor processing properties, and typically cake together and form lumps upon storage. They also tend to form dust.
The use of free flowing granules or beads to overcome the processing problems and dust associated with dry pigment powders has been suggested. These granules may be produced by spray drying aqueous dispersions, as proposed by U.S. Pat. Nos. 4,946,505; 5,484,481; 5,853,476; and 5,882,395. However, the evaporation of the aqueous dispersion requires expensive equipment and significant energy expenditures which can make the use of such granules economically unattractive.
Another approach is to modify the particle's surface to improve its dispersibility in aqueous solution. U.S. Pat. No. 5,401,313 discloses a pigment particle whose surface is coated with an electric charge modifying agent and a dispersion promoting agent. The dispersion promoting agent is selected from stearates, acetates, alkylphenols, cellulosics, waxes, lignins, acrylics, epoxies, urethanes, ethylenes, styrenes, propylenes and polymers having functions groups of alcohols, glycols, aldehydes, amides and carboxylic acids, and is preferably sodium lignosulfonate for cementitious application systems. The surface-modified particle may be produced in powder, dispersion or granular form, with bead granules having a particle size of 25 to 250 microns being preferred.
Styrene maleimide imide resins and their quaternary salts are known. "Technical Information-Styrene Maleimide Resins SMA X 1000 I, X 2000 I, X 3000 I, X 4000 I," Elf Atochem Brochure (1998) suggests their use in paper sizing, as a cationic dispersing resin for pigments and particles in acidic and cationic formulations, as cationic polymeric surfactants, and as cationic modifiers for waterbased coatings, inks and varnishes. However, there is no disclosure or suggestion concerning the use of these resins to disperse pigments in building materials.
An object of the invention is to provide a method for coloring concrete using an aqueous pigment dispersion.
A feature of the method of the present invention is the use of a cationic dispersion containing at least one pigment, water, and at least one dispersing agent comprising a quaternary salt of a styrene maleimide imide resin to color building materials such as concrete.
An advantage of the present invention is the ability to color building materials such as concrete with bright organic pigments that do not suffer from poor alkali resistance and/or poor lightfastness.
Another advantage of the present invention is that it permits the ready removal of graffiti or other surface defacement from a concrete surface without impairing its surface appearance.

This patent is subject to a terminal disclaimer.

Method for coloring building materials using a cationic pigment dispersion


A cylinder liner for an internal combustion engine may include a hollow cylindrical body. The body may include an internal surface having a longitudinal/axial length. The internal surface may be divided into at least two portions along the longitudinal/axial length. The at least two portions may respectively include a specific value of roughness and a predefined length.

Cylinder liners for use in internal combustion engines are static components composing the structure of the engine block, providing to the assembly a closed system for the gases in expansion and promoting the thermal exchange of the heat generated in the combustion with water (wet cylinder liner) or air (dry cylinder liner) circulating around the same.
Among the objectives of the different types of liners are emphasised the maintenance of the sealing of the combustion chamber, the realisation of the thermal exchange of the heat generated within the combustion chamber with the cooling medium (water or air) and the possibility of the reutilisation of the engine block.
In the functioning thereof, an internal combustion engine admits a mixture of air/fuel into the cylinder, entering into spontaneous combustion following being compressed (Diesel engines) or by means of an ignition spark created within the combustion chamber during the compression of the mixture (alcohol and/or petrol engines).
The combustion of the gases in expansion will occur within a closed system such that part of the energy generated impels a piston of the engine downwards and, in this manner, successively, moves the crankshaft, consequently transforming the energy into movement. Thus the cylinder liners act in the functioning of the engine providing the system with the closed condition necessary to the process of energy conversion.
The growing demands in relation to internal combustion engines call for continuous enhancements in relation to the diverse components thereof and the working surfaces thereof. A precise relationship between the cylinder liners, the pistons and the piston rings leads to the improvement of the performance of the engine.
Usually, the cylinder liners for use in internal combustion engines are produced in cast iron with the addition of alloying elements to improve the mechanical and thermal properties thereof. As well as the addition of alloying elements, the liners of cast iron also require optimised working surfaces, contributing to the reduction in the consumption of oil and the recirculation of the gases, producing less particles due to the wear and permitting shorter running in times and, thus, a longer working life.
Consequently, to achieve the optimisation of the working surface of the cylinder liners honing processes are usually carried out, a machining method wherein the tool realises reciprocating and rotating movements, ensuring the cylindricity of the liner and the uniformity of the surface thereof. A honing process properly realised ensures positive effects on the wear of the piston ring, on the emission of particles, on the consumption of oil and on the friction.
Diverse techniques have been developed having the objective of obtaining better conditions of operation of the cylinder liners through varied honing processes.
A first development is revealed in the German document DE102006057111, of the present applicant, relating to a cylinder liner wherein the roughness varies along the direction of displacement of the piston in the interior thereof. More specifically, the portion near the end of the maximum travel of the piston in the direction of the head possesses a region having a first roughness, and the central region of the liner, in terms of the travel of the piston, presents a second roughness, wherein in the intermediate portion of the working surface of the liner the value of roughness is greater than that of the extremities. The focus of the said document resides solely in the specifications of values of roughness of the liner and the distribution of said roughness along the length within the interior of the liner is not specified.
The patent document DE102009010791 reveals a cylinder liner provided with a higher value of roughness at the extremities in relation to the value of roughness in the central region. However, the process utilised for the obtainment of such structures leads to the emergence of recesses having greater and lesser depth (the depth varies considerably therebetween), diminishing the potential efficacy of this solution as pockets of accumulation of lubricating oil. Again, the focus of this document resides solely in the specifications of values of roughness of the liner.
The patent document DE19605588 relates to a cylinder liner the internal surface whereof presents greater values of roughness at the extremities in relation to the second portion. But in order for this result to be achieved the honing process was utilised with certain technical parameters to treat the surface of the extremity regions, utilising different parameters in the central region. In the same manner, the focus of this document resides solely in the specifications of values of roughness of the liner.
Finally, the patent document FR2884889 relates to a cylinder liner the sliding surface whereof presents three values of roughness, being (i) a first value S1, lowest (least rough) in the portion of the extremity facing the head, in the second portion and in the portion of the opposite extremity, (ii) a second value of roughness S2 of medium roughness applied between the extremity of the portion facing the head and the second portion and, finally, (iii) a third greater value of roughness S3 applied between the second portion and the portion of the extremity opposed to that facing the head. In this case also the focus resides solely in the specifications of values of roughness of the liner.
In this manner it may be observed that in the state of the art there exist diverse technologies applied to the processes of honing for cylinder liners, having the particular objective of specifications of values of roughness along the length of displacement of the piston within the interior thereof.
However, documents are not found demonstrating, in addition to the magnitude of the values of roughness, the ratio of length in terms of variation of the roughnesses obtained in different defined portions of the working surface of the liners.
Having a view to reducing wear through friction and scuffing during the operation of the engine, a cylinder liner for an internal combustion engine is presented provided with a hollow cylindrical body comprising an internal working surface provided with a longitudinal/axial length and divided into at least two portions along the longitudinal length thereof, each of said portions comprising a specific value of roughness and a predefined length over an established interval.

Cylinder liner for an internal combustion engine


A disk array storage system and error recovery method wherein recovery from disk errors is achieved using automated selective power cycling. Initially, identification is made of a faulty disk drive in the array that exhibits an error condition in which the drive fails to perform a requested operation. The faulty disk drive is selectively power cycled while power to other disk drives in the array is maintained. Following the power cycling sequence, the requested operation is retried.

1. Field of the Invention
The present invention relates to disk array storage systems, and particularly RAID systems. More particularly, the invention concerns error recovery in disk array storage systems in response to disk error conditions.
2. Description of the Prior Art
Disk array storage systems store data across multiple disk storage devices (disk drives) arranged to form one or more disk drive array groups. A common type of disk array storage system is the RAID (Redundant Array of Independent Disks) system. In such apparatus, a host computer connects to a RAID controller that manages one or more RAID intelligent disk enclosures, each containing a control processor and an array of disk drives mounted in individual device slots.
A disk error condition will result from a failure of one of the RAID disks to respond to the RAID controller's attempts to implement some action, such as a disk selection operation, or a command transfer or data/control transfer operation. Usually, there is an indication of a persistent error despite command or phase retries. A disk error condition may likewise manifest itself as a failure to continue an operation that has started.
The conventional approach to correcting a disk error condition in a RAID system is to issue a device or bus reset command if no response is received to a disk command within a pre-defined time limit, or after multiple command retries have failed. Following the reset attempt, the failed command is reissued. If the command again fails, the reset recovery action may be retried one or more times up to some specified retry limit. At that point, if there is still no response, the RAID controller marks the drive as "dead," which means the drive is placed in offline status with further accesses being prohibited.
If a disk drive marked dead is a member of a redundant RAID array, the higher level logical drive associated with the faulty physical drive is still accessible. However, array performance is degraded due to the need to reconstruct data for the faulty drive when requested by the host. If the faulty drive is part of a non-redundant RAID array, the associated logical drive must be marked offline, making data access impossible.
Disk drive manufacturers receiving drives for repair that have been marked dead in a RAID system often find them quite operable. This condition is known as NTF (No Trouble Found). The drive manufacturers often complain to their customers about the mis-killings by RAID controllers. The RAID controller manufacturers, on the other hand, may defend their actions by referring to certain posted user-accessible events that indicate reasons for killing the disk drives.
What the RAID controllers actually failed to do in these disputed cases is to try to power cycle the disk drive and then retry the failing operation before killing the drive. On the other hand, disk drive manufacturers invariably try to power up the returned dead disk drive before diagnosing the problem. Certain transient or non-recurring disk drive ASIC errors, including a possible microprocessor hang, can be cleared if the unit is first powered off and then powered back on, causing the drive firmware to be reloaded from the media and the hardware to be restarted from scratch.
In a conventional RAID system enclosure, power cycling a single faulty disk drive may mean powering down the entire multi-disk drive enclosure and powering it back on. Alternatively, the faulty drive may need to be manually removed from its device slot and then be re-inserted into the slot, thereby simulating a disk drive power cycle. Neither of these manual actions is practical. The former action is particularly undesirable insofar as it involves taking multiple disk drives down at the same time. The latter action requires operator retraining insofar as RAID system operators are trained only to remove disk drives for the purpose of substituting in a new disk drive.
It is possible to retrain RAID system operators to manually remove a faulty disk drive and then re-insert it into the device slot. This action would simulate a disk drive power cycle and presumably clear the disk error condition. Then, in the case of a redundant RAID array housed in an intelligent enclosure, an auto rebuild operation would take place if no standby rebuild has already occurred. Alternatively, the re-inserted disk drive would become a new standby drive for a future rebuild. In the case of a non-redundant array in a RAID enclosure, a user-initiated data restoration would have to take place before the associated logical drive can be placed back in operation.
Although the foregoing manual action may correct the disk error condition, there are a number of associated problems. First, human operator intervention is required. Second, it is not practical to assume that the human operator is located where the problem is at the time a disk error condition arises. Third, and perhaps most importantly, the faulty disk drive is first marked "dead" before the operator intervention occurs. This means in a redundant RAID system that a data regeneration operation has already taken place, and that a physical rebuild operation must be implemented following the human intervention. In a non-redundant RAID system, logical drive operation will have already been terminated and a user-required data restore may have taken place.
Accordingly, a need exists for a disk array storage system in which disk error conditions can be resolved in a manner that avoids the foregoing disadvantages. What is particularly required is a disk error recovery procedure wherein a faulty disk drive can be tested for transient or non-recurring software, firmware or hardware errors that normal resets will not resolve. Preferably, such error recovery will be preformed prior to the faulty disk drive being marked as dead and taken offline.

Selective automated power cycling of faulty disk in intelligent disk array enclosure for error recovery

International Business Machines Corporation


A semiconductor device includes a substrate and a first active layer disposed over the substrate. The semiconductor device also includes a second active layer disposed on the first active layer such that a lateral conductive channel arises between the first active layer and the second active layer. a source, gate and drain contact are disposed over the second active layer. A conductive charge distribution structure is disposed over the second active layer between the gate and drain contacts. The conductive charge distribution structure is capacitively coupled to the gate contact.

This invention is related to semiconductor devices. In particular, the invention is related to high voltage heterostructure field effect transistors (HFETs) that operate as power switches.
High voltage semiconductor switches are key components in electronic circuits for power conversion. Examples of these applications include power supplies for electronic equipment, drives for electric motors, and inverters for solar cells.
A power switch has an on state that allows the device to conduct current, and an off state that prevents the device from conducting current. When in the on state, a power switch may conduct tens or hundreds of amperes while the voltage across the switch is less than one volt. When in the off state, the power switch typically must withstand hundreds or thousands of volts while conducting substantially zero current. The voltage that the device can withstand in the off state while conducting no more than a given small value of current is sometimes referred to as the breakdown voltage.
It is usually desirable that the transition between the two states be as fast as possible because during the transition there may be relatively high current in the switch at the same time there is relatively high voltage across the switch. The presence of relatively high current and high voltage at the same time represents a loss of energy that at best is undesirable and at worst could destroy the switch.
High voltage HFETs are attractive for use as power switches primarily because they can change states substantially faster than other semiconductor switches that conduct the same currents at similar voltages. The materials used in the construction of HFETs also allow them to operate at higher temperatures than transistors that use traditional silicon-based technology.
A major problem with the fabrication of HFETs for power switches is that existing techniques produce devices with breakdown voltages that are substantially below the values that are theoretically possible. In addition, it is difficult to predict how the application of known techniques such as the use of field plates influences the breakdown voltage. As such, the design of devices for specific characteristics is difficult and time-consuming, requiring the application of cut-and-try methods to fabricate and test hardware rather than the use of computer modeling.
A solution is required that will allow power HFETs to be designed in less time for desired performance with predictable breakdown voltage.

Switching device with charge distribution structure


A radio communication system for carrying out communications among a plurality of radio communication apparatus pertaining to the radio communication system through a radio network connecting the radio communication apparatus with each other wherein, each of the radio communication apparatus includes an access setting unit configured to prescribe a super frame period within a predetermined time and setting a reserved period within the super frame as a period for making an access to the radio network, and the access setting unit selects either a first reservation setting method not contending with reservation setting done by another radio communication apparatus, or a second reservation setting method possibly contending with reservation setting done by another radio communication apparatus.

1. Field of the Invention
The present invention relates to a radio communication system, a radio communication apparatus and a computer program. More particularly, the present invention relates to a radio communication system for making a PCA (Prioritized Channel Access) in a band reserved in advance, a radio communication apparatus employed in the system and a computer program implementing functions of the apparatus.
2. Description of the Related Art
In recent years, as a method of constructing a small-scale network for carrying out radio communications, there is generally adopted a method of using a radio communication system conforming to methods according to IEEE802.11 as a radio LAN (Local Area Network). In addition, attention is recently being focused on a radio communication method using a UWB (Ultra Wide Band) communication system. As a radio communication method using the UWB communication system, there was considered a method of carrying out high-speed radio communications by using a PAN (Personal Area Network), which is a network having a range narrower than that of a radio LAN.
As one of access control methods of the PAN (Personal Area Network) in the UWB communication system, there was considered a method of defining a distributed MAC (Media Access Control). In the distributed MAC, there was defined a method for carrying out a communication in a stable manner by using a DRP (Distributed Reservation Protocol). This defined method is a method for providing a time slot known as a MAS (Media Access Slot) in a predetermined super frame period, reserving the MAS and setting utilization of the MAS.
In addition, in accordance with the DRP (Distributed Reservation Protocol), a communication apparatus for carrying out a communication is capable of utilizing media by exclusively occupying the media. Thus, the method can be defined as a method capable of carrying out a communication in a stable manner.
In the distributed MAC (Media. Access Control), on the other hand, there has also been prescribed a communication method based on the PCA (Prioritized Channel Access) technique as a method for carrying out a communication without making a reservation by using the DRP (Distributed Reservation Protocol). With the communication method, a communication can be carried out with ease by using a period, for which reservation using the DRP is not set.
In addition, Japanese Patent Laid-open No. 2004-153558 (Patent Document 1) discloses a method of setting CP_Min_Duration so as to assure a possible minimum communication in a CP (Contention Period) for any communication such as inspection of a web besides reserved communications such as transmissions of images.

Radio communication system, radio communication apparatus and method


A method of removing impurities from low grade silicon is provided comprising adding a zirconium compound to the low grade silicon for adsorbing the impurities.

Silicon is widely used in making photovoltaic solar cells, which convert light into electricity. Silicon commonly exists in nature in the form of silica or silicon dioxide (SiO.sub.2). Quartzite, which is composed largely of silica, is widely used as the starting material for obtaining the silicon used in making solar cells. Silicon can be produced from quartzite through well-known processes like the submerged arc process. In the submerged arc process, a carbon-based reducing agent is reacted with the quartzite to produce silicon along with by-products. The silicon produced by the submerged arc process and other processes typically includes impurities like boron, phosphorus, iron, calcium and aluminum.
Silicon can be classified according to its level of purity. Low grade silicon like metallurgical grade silicon is less pure than a higher grade silicon. It is well known that solar cells made from a high grade silicon can be significantly more efficient than solar cells made from a lower grade silicon. Consequently, high grades of silicon are preferred for use in making solar cells. Low grade silicon like metallurgical grade silicon should, therefore, be purified before it is used as solar cell material. The following table compares approximate levels of significant impurities in metallurgical grade silicon and solar grade silicon, a higher grade silicon that can be used for producing efficient solar cells.
______________________________________ Metallurgical Solar Grade Type Grade Silicon Silicon Impurity (parts per million) (parts per million) ______________________________________ Boron 10-20 less than 1 Phosphorus 10-20 less than 1 Iron 800-3000 less than 10 Aluminum 800-3000 less than 10 Calcium 20-1000 less than 10 ______________________________________
Unfortunately, purification of metallurgical grade silicon by conventional methods is difficult and expensive. Thus, a need has arisen for a method of purifying silicon that is effective and inexpensive relative to conventional methods. An object of this invention is to provide such a method for converting low grade silicon into a higher grade silicon that can be used for making efficient solar cells.
"Low grade" silicon is defined as silicon having impurity levels greater than the impurity levels permitted in "solar grade" silicon.


A crude oil transportation system uses a dynamically positionable floating crude oil storage and offloading vessel and a dynamically positionable shuttle tanker. The dynamically positionable floating crude oil storage and offloading vessel is a self-contained unit including a flexible transfer hose for connecting to the production platform and a flexible discharge hose for connection to the dynamically positionable shuttle tanker.

1. Field
The present invention pertains to a transportation system which enables the use of a dynamically positioned Floating Storage and Offloading vessel (FSO) with shuttle tankers for moving crude oil onshore from an offshore crude oil production system such as a tension leg platform, a semi submersible platform, a spar, or a compliant movable platform such as those located; for example, in the Gulf of Mexico.
2. Background
The production of hydrocarbons, particularly crude oil from wells which tap into subsea reservoirs, such as those located in the Gulf of Mexico, is facilitated by multiple large offshore production systems located near one or more subsea wells in an oil field. These production systems are typically used for the initial removal of contaminants from the crude oil extracted from subsea reservoirs. Once the first round of contaminants has been extracted, the crude oil is transported from the offshore production system to onshore refineries or storage facilities through a network of pipelines laid on the sea bottom. However, as new wells are being drilled into reservoirs located in deeper and deeper water and in regions where the sea bottom includes rough or uneven terrain such as steep cliffs and deep canyons, the use of pipelines laid directly onto the sea bottom becomes increasingly complex and prohibitively expensive. Accordingly, there is a need in the art for a system which will enable the economical transport of crude oil produced by offshore production systems located in deep water to onshore refineries or storage facilities.


A repeatedly bendable power storage device. A highly reliable power storage device. A long-life power storage device. A repeatedly bendable electronic device. A flexible electronic device. The power storage device includes a film, a positive electrode, and a negative electrode. The film includes a plurality of projections. A difference between the maximum height and the minimum height of a surface of the film is greater than or equal to 0.15 mm and less than 0.8 mm. The modulus of rigidity of the film is less than 6.5×109 N. The film includes a metal layer. The thickness of the metal layer is greater than or equal to 5 μm and less than or equal to 200 μm. The positive electrode and the negative electrode are surrounded by the film.

1. Field of the Invention
The present invention relates to an object, a method, or a manufacturing method. The present invention relates to a process, a machine, manufacture, or a composition of matter. In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, a manufacturing method thereof, or an evaluation method thereof. In particular, one embodiment of the present invention relates to a power storage device, a manufacturing method thereof, and an evaluation method thereof.
Note that a power storage device in this specification refers to every element and/or device having a function of storing electric power.
2. Description of the Related Art
In recent years, a variety of power storage devices, for example, secondary batteries such as lithium-ion secondary batteries, lithium-ion capacitors, and air cells have been actively developed. In particular, demand for lithium-ion secondary batteries with a high output and a high energy density has rapidly grown with the development of the semiconductor industry, for electronic devices, for example, portable information terminals such as mobile phones, smartphones, and laptop computers, portable music players, and digital cameras; medical equipment; next-generation clean energy vehicles such as hybrid electric vehicles (HEVs), electric vehicles (EVs), and plug-in hybrid electric vehicles (PHEVs); and the like. The lithium-ion secondary batteries are essential as rechargeable energy supply sources for today's information society. Patent Document 1 discloses an example of incorporating a power storage device in an electronic device.
Electronic devices used while being worn on human bodies have recently been proposed and are referred to as wearable displays and the like. To improve the convenience, it is necessary that such electronic devices can be repeatedly attached to and detached from human bodies.

Power storage device, battery management unit, and electronic device

Semiconductor Energy Laboratory Co., Ltd.


A new cultivar of Andromeda named ‘Blue Lagoon’, characterized by its grayish blue foliage, its freely branched habit, its pink flowers in spring, and its hardiness at least to U.S.D.A. Zone 5.

The present invention relates to a new and distinct cultivar of Andromeda polifolia known as Andromeda 'Blue Lagoon' and will be referred to hereafter by its cultivar name, 'Blue Lagoon'.
The inventor discovered 'Blue Lagoon' as a naturally occurring branch mutation of Andromeda polifolia 'Blue Ice' (not patented) in March 2006 in the Inventor's nursery in Boskoop, the Netherland.
Asexual reproduction of the new cultivar was first accomplished by the Inventor using semi-ripe stem cuttings in Boskoop, the Netherland in March 2006. It has been determined that the characteristics of this cultivar are stable and are reproduced true to type in successive generations.


A two piece blind fastener for securing a plurality of workpieces including a hollow sleeve having a straight shank with an enlarged sleeve head at one end and a pin having an enlarged pin head; the pin has a pin stop shoulder and a lock groove located near the pin stop shoulder; the pin head is adapted to engage the sleeve to form a bulb type blind head in response to a relative axial force applied between the pin and sleeve; the pin stop shoulder is adapted to engage a sleeve stop shoulder to direct the material of the sleeve stop shoulder substantially radially inwardly into the lock groove to lock the pin and sleeve together and to finally form a stop surface on the sleeve for stopping axial movement of the pin through the sleeve; in addition the pin has an expander portion adapted to expand the sleeve shank radially outwardly to fill the openings of the workpieces and with the expander portion having a grooved section with alternate relief grooves and expander segments with the relief grooves receiving excess material of the sleeve after hole fill and to thereby also assist in locking the pin and sleeve together.

The present invention relates to blind fasteners and more particularly to blind fasteners including a pin and a sleeve and having a mechanical lock structure for locking the pin and sleeve together and providing a hole fill of the openings of workpieces being secured together.
In many blind fastener applications it is desirable that the pin and sleeve be mechanically locked together to inhibit loosening, separation and/or loss of the pin through vibration, etc. Examples of such blind fasteners can be seen in the U.S. Pat. No. 4,863,325 for Two Piece Blind Fastener With Lock Spindle Construction Issued on Sep. 5, 1989 to Smith, U.S. Pat. No. 4,046,053 for Blind Rivet issued on Sep. 6, 1977 to Alvi et al, U.S. Pat. No. 3,288,016 for Blind Two-Piece Fastener issued on Nov. 29, 1966 to Reynolds, and U.S. Pat. No. 2,538,623 for Rivet Assembly issued on Jan. 16, 1951 to Keating.
It is also desirable in many applications to fill the workpiece openings. This is frequently done by radially expanding and compressing the shank of the sleeve against the surface of the workpiece openings by an expander portion of the pin. Various forms of such structures are also shown in the patents noted above.


A process for fabricating an integrated circuit sensor/actuator is described. High aspect ratio deep silicon beams are formed by a process of deep trench etch and silicon undercut release etch by using oxide spacers to protect the silicon beam sidewalls during release etch. An oxide layer is then formed, followed by deposition of a controlled thickness of polysilicon which is then thermally oxidized. The polysilicon layer inside the trenches gets fully oxidized resulting in void-free trench isolation. This process creates a silicon island or beam on three sides leaving the third side for interfacing with the sensor/actuator beams. The sensor/actuator is formed by a similar process of deep trench etch and release etch process on the same substrate. These suspended beams of the sensors and actuators are bridged with the silicon islands from the fourth side. The above process finally results in suspended silicon beams connected to electrically isolated silicon islands.

The invention relates to the general field of MEMS with particular reference to filling deep trenches with oxide and with the formation of silicon beams.
The fabrication of MicroElectro Mechanical Systems (MEMS) on silicon substrates often necessitates electrical isolation between various suspended. mechanical structures that need to be electrically actuated. In a previous patent (U.S. Pat. No. 5,930,595), we disclosed a deep trench isolation process for sensors and actuators application. The isolation between microstructure and surrounding silicon was realized by oxide filled trenches. That process is suitable for deep trench isolation of up to 10-12 microns. However for higher sensitivity, there is a need for much deeper trenches (40-45 microns). This makes it necessary to have a deeper trench isolation process.
The principal limitation imposed by the process described in U.S. Pat. No. 5,930,595 is illustrated in FIG. 1a. Seen there is silicon body 12 in which deep trenches 104 have been formed. Through use of a release etch, the trench bottoms were widened to form expanded regions 103 which penetrated one another, thereby connecting all trenches and forming silicon islands 110 (FIG. 1b).
The filling of the trenches is illustrated in FIG. 1b. First the trench walls were lined with thermal oxide layer 106. Then filling was completed with the deposition of an oxide layer (TEOS) by means of LPCVD (low pressure chemical vapor deposition). This resulted in the formation of voids such as 109, whose presence is undesirable because of potential reliability problems. The void formation problem increases in severity with increasing trench depth.
A routine search of the prior art was performed. The following references of interest were found:
In U.S. Pat. No. 6,051,866, Shaw et al. show a sensor-process with initial steps similar to the present invention. Muenzel et al in U.S. Pat. No. 5,723,353 teach another sensor isolation system. Sakai et al. (U.S. Pat. No. 5,549,785) also describe an isolation process. Sparks et al. in U.S. Pat. No. 5,427,975, teach a method for filling trenches with polysilicon but said polysilicon is not oxidizable, being inserted in order to make electrical connections. In U.S. Pat. No. 5,426,070, Shaw et al. discuss the formation of beams in a silicon body by using trenches followed by a release etch step. These trenches do not get filled with oxide. MacDonald et al. (U.S. Pat. No. 5,393,375) show a similar beam formation process.
It has been an object of the present invention to provide a process for filling a deep trench in a silicon body with silicon oxide.
A further object of the invention has been that said filling process be free of void formation within the filler oxide.
A still further object has been to apply said process to the formation of embedded silicon beams that are surrounded by silicon oxide.
Another object of the invention has been to apply said process to the formation of silicon beams that are partly cantilever and partly embedded in silicon oxide.
These objects have been achieved by means of a process of deep trench etch and silicon undercut release etch by using oxide spacers to protect the silicon beam sidewalls during release etch. An oxide layer is then formed followed by deposition of a pre-determined thickness of polysilicon which is then thermally oxidized. The polysilicon layer inside the trenches gets fully oxidized resulting in void-free trench isolation. This process creates a silicon island on three sides leaving the third side for interfacing with the sensor/actuator beams. The sensor/actuator is formed by a similar process of deep trench etch and release etch process on the same substrate. These suspended beams of the sensors and actuators are bridged with the silicon islands from the fourth side. The above process finally results in suspended silicon beams connected to electrically isolated silicon islands called anchors.

High aspect ratio trench isolation process for surface micromachined sensors and actuators


A stepper includes a base frame, two swing arms, two hydraulic cylinders and an adjustment assembly. Each of the swing arms is mounted pivotally on the base frame at one end and carries a pedal on the other end. Each of the hydraulic cylinders is mounted pivotally on one of the pedals at one end and on the base frame at the other end. The adjustment assembly is disposed on the base frame and permits adjustments in the angular displacement of the pedals.

1. Field Of The Invention
This invention relates to a stepper, more particularly to a variable resistance stepper which can be adjusted by changing the angular displacement of the pedals.
2. Description Of The Related Art
A conventional stepper is shown in FIG. 1. The amount of resistance produced against two lever arms (1) of the stepper is controlled by a driving belt (not shown). The main drawback of the conventional stepper shown in FIG. 1 is that the amount of resistance produced against the two lever arms (1) is fixed and is difficult to adjust. Furthermore, the driving belt is easily broken, thereby resulting in accidents.
U.S. Pat. No. 4,563,001 discloses an exercise device, the amount of resistance produced against the two lever arms of which is adjusted by moving two brackets on each lever arm of the exercise device forward or backward, individually or in combination. The drawback of this exercise device is that adjustments are time consuming and cannot be accurately effected.

No. 14, Alley 5, Lane 22, Kao-Cheng Wu St.


An applicator constructed such that when the user clicks a rear end of an inner barrel, a valve mechanism is actuated by moving the inner barrel relative to an outer barrel, whereby an application liquid is supplied to an applying element arranged at a front end part of the outer barrel, and that when a valve seat member and a valve rod member move relatively to each other, the valve mechanism can take a first state in which a piston portion on the front side of the valve rod member comes into sliding contact with a front-side liquid-tight portion inside the valve seat member, a second state in which both of the piston portion on the front side of the valve rod member and piston portion on the rear side of valve rod member do not come in sliding contact with the corresponding liquid-tight portions inside the valve seat member, and a third state in which the piston portion on the rear side of the valve rod member comes into sliding contact with the rear-side liquid-tight portion.

The applicator is to apply an application liquid such as ink, cosmetic or the like that is directly stored in the liquid container, to a target object by means of an applying element.
Conventionally, as an applicator of this kind there is a configuration that includes a valve mechanism that selects whether the liquid is supplied or not supplied from the liquid storing space to the applying element by means of a valve member.
The valve mechanism of this kind functions to eject the application liquid as the valve member opens, but has the problem that the application liquid drips down from the applying element or becomes starved due to a surplus or shortage of the application liquid to be fed to the applying element depending on the length of the click operating time when the valve member is opened or the like and/or the differential pressure between the external air and the interior of the liquid container.
In the prior art example, namely the valve mechanisms disclosed in Japanese Utility Model Application Laid-open SHO 63-176580 (patent document 1) and Japanese Utility Model Application Laid-open HEI 05-33872 and its whole description (see patent document 2), the inter space of the outer sleeve is isolated by the piston portion arranged at the front end of the valve rod and the rectifying sleeve provided at a position near the rear end inside the outer sleeve so that an approximately fixed amount of fluid in the isolated inner space can be ejected when the valve is opened, whereby the amount of the fluid to be fed to the applying element is adjusted to be suitable.
Though in the above prior art, the application liquid will not be supplied excessively due to volume expansion of the air inside the storage space, air displacement performance becomes poor depending on the viscosity of the application liquid. Hence, the prior art has the problem that a fixed amount of application liquid can be fed but cannot be supplied smoothly.
Patent Document 1:
Japanese Utility Model Application Laid-open SHO 63-176580
Patent Document 2:
Japanese Utility Model Application Laid-open HEI 05-33872


A time-to-digital converter arrangement has a ring oscillator with a plurality of inverting elements and a first and a second counter coupled to the ring oscillator. The first counter is configured to increment a first counter value if a positive edge transition is present at one of the inverting elements. The second counter is configured to increment a second counter value if a negative edge transition is present at the one of the inverting elements. A storage element stores the first and the second counter value and logical states of the plurality of inverting elements. A decoder coupled to the storage element selects one of the first and the second counter value as a valid value based on an evaluation of the stored logical states, and outputs a total counter value based on the valid value and the stored logical states.

The present disclosure relates to a time-to-digital converter and to a time-to-digital conversion method.
A time-to-digital converter (TDC) is a device used to measure a time interval and convert it into digital output. It allows measurements of very short times at high resolution. A problem with time-to-digital converters is the asynchronous nature of the physical effects that are measured. Each measurement has to be collected for further processing.
A time-to-digital converter is used in time-of-flight cameras, for example, to measure the time an emitted light signal like a laser pulse needs to travel to a reflecting object and back to the camera. A major drawback is that the average distance to all objects in a scene is only detected as a single number.
A well-known technique to implement a TDC uses a ring oscillator and a counter that is being driven by this ring oscillator, in particular by a clock edge progressing through the ring oscillator. A downside of this design is that by the time that the counter is being updated on the output, said edge has already progressed, so there is an inherent uncertainty for a counter value of the counter.

Time-to-digital converter and conversion method


A source region and a drain region are formed in a semiconductor layer, a thin insulating layer of SiO.sub.2 is formed on the semiconductor layer, and a gate electrode is formed thereover. Al metal forms ohmic contacts with the source and drain regions to provide a source electrode and a drain electrode, respectively. Al diffused in the drain region remains within the drain region, and the drain region and the substrate region form a p-n junction. Al diffused in the source region traverses the source region and reaches the substrate region to form an ohmic contact between the source region and the substrate region.

The present invention relates to a metal oxide semiconductor field-effect transistor (to be referred to as a MOSFET for brevity hereinafter) which is improved in operation speed and packing density.
A MOSFET is known in which a semiconductor region is formed on an insulating substrate, an n- or p-type impurity is diffused to a high concentration in the semiconductor region to form a source region and a drain region, and a thin insulation film is covered thereover to form a gate electrode. Although such a transistor is applicable to various purposes, it is frequently used as an integrated circuit. The performance which is generally required of such an integrated circuit includes high operation speed, high packing density and so on.
In a conventional MOSFET 20 as shown in FIG. 1, on an insulating substrate 22 of monocrystalline sapphire is formed a substrate 24 of Si in which is diffused a p-type impurity, for example B, to a concentration of 10.sup.15 atoms/cm.sup.3. A source region 26 and a drain region 28, in both of which is diffused an n-type impurity, for example P, to a concentration of 10.sup.18 atoms/cm.sup.3, are formed in the Si substrate. Metal wirings of, for example Al, are coupled to the source region 26 and the drain region 28 providing a source electrode 34 and a drain electrode 36. The metal constituting these electrodes forms ohmic contacts with the source region 26 and the drain region 28, but part of the aluminum is diffused in the source and drain regions to form diffusion layers 30 and 32. A gate electrode 40 is formed on the substrate region 25 through a thin insulating layer 38 consisting of SiO.sub.2, for example.
With such a conventional structure, high speed operation of the circuit is obstructed by the so-called charge pumping effect. Since the substrate region 25 is electrically coupled to the source region 26 and the drain region 28 only through the p-n junction, the substrate region 25 is kept at a negative potential by capacitive coupling with the gate electrode when the potential at the gate electrode abruptly changes in the negative potential. Then, the substrate region 25 and the source region 26, and the substrate 25 and the drain region 28 are kept reversely biased. When the potential of the gate electorde 40 changes in the positive direction, the potential of the substrate region 25 also changes in the positive direction. However, the p-n junction between the substrate region 25 and the source region 26 and that between the substrate region 25 and the drain region 28 are forwardly biased so that forward current flows and the potential at the substrate region 25 does not greatly shift in the positive direction. Thus, the substrate region 25 is kept at a negative potential on the average, and raises the threshold voltage of the MOSFET by the substrate bias effect or the body effect. When the threshold voltage becomes higher, the conductance of the MOSFET becomes small so that high speed operation of the circuit is obstructed. Especially with a MOSFET in which the substrate bias is not constant, i.e., a MOSFET of an SOS (silicon on sapphire) structure, the operation speed is disadvantageously easy to change due to fluctuations of the substrate bias. When the MOSFET is used as a transfer gate, it is frequently the case that a negative voltage compared with that of the source and drain regions is applied to the gate electrode under the condition that an inversion layer is not formed. Accordingly, the capacitive coupling between the gate electrode and the substrate region tends to be strong. Thus, as has been described, the threshold voltage increases by the substrate bias effect so that high speed operation of the element tends to be obstructed. Of course, when an inversion layer is formed, screening effects are obtained between the gate electrode and the substrate region so that the capacitive coupling between the gate electrode and the substrate region becomes weak, thereby reducing the above-described defects.

Metal oxide semiconductor field-effect transistor with metal source region


A method of forming fine patterns in a semiconductor device through a double photo lithography process. A layer to be etched and a hard mask layer are sequentially formed on a semiconductor substrate. A first photo resist pattern is formed on the hard mask layer. A first hard mask layer pattern is formed by etching the hard mask layer using the first photo resist pattern. After the first photo resist pattern is removed, a second photo resist pattern is formed on the resultant structure. A second hard mask layer pattern is formed by etching the first hard mask layer pattern using the second photo resist pattern. The layer to be etched is then etched using the second hard mask layer pattern after the second photo resist pattern has been removed, resulting in patterns have line edges without rounding.

1. Field of the Invention
The present invention relates to a method of forming fine patterns in a semiconductor device, and more particularly, to a method of forming fine patterns which can prevent distal ends of the lines (i.e, line edges) of the fine pattern from being rounded off.
2. Description of the Related Art
The various patterns in a semiconductor device are formed by a sequence or series of various photolithography techniques. The photolithography techniques generally include steps of: (a) forming a photo resist layer on an insulating or conductive layer; (b) irradiating the photo resist layer with X-ray or ultraviolet light through a pre-defined pattern to alter the solubility thereof; (c) forming a photo resist pattern by removing portions having a higher solubility by developing the exposed photo resist layer after exposing predetermined portions of the photo resist layer to the designated light source; and (d) and forming various patterns such as electrical wirings or electrodes by etching the exposed portions of the layer where the pattern is formed.
FIGS. 1A and 1B are plan views illustrating a method of forming patterns in a semiconductor device according to a conventional lithography process. FIG. 1A is a plan view partially showing the photo mask for forming an island type rectangular pattern on a semiconductor substrate. A light masking (or shielding) layer pattern 12 is formed on a transparent mask substrate 10, with the light masking layer pattern 12 having a rectangular shaped island type pattern.
With the conventional method of forming a pattern, a photo resist pattern is formed by exposing the photo mask to light to change the solubility of the photo resist layer, and then developing this photo resist layer that is coated on a wafer (i.e., a semiconductor substrate) to create the pattern. However, during the exposure process, the line edges or distal ends 12a of the light masking layer pattern experience a three-dimensional optical diffraction phenomenon. As shown in FIG. 1B, the 3-D optical diffraction causes the line edges or distal ends 12a to be rounded, such that the rectangular photo resist pattern 22 fails to form the desired rectangular pattern on the semiconductor substrate 20.
This 3-D phenomenon is called the optical proximity effect, and periodic grain type patterns, such line/space patterns (xe2x80x9cL/S patternsxe2x80x9d) are only affected slightly by the optical proximity effect. However, the operation of island patterns, such as a capacitor electrode of dynamic random access memory (DRAM) or a gate electrode of static random access memory (SRAM), are seriously affected by the rounding of the distal ends or line edges of the pattern due to the optical proximity effect.
In particular, the rounding becomes more serious as the design rule decreases since the size of the pattern is reduced and the processing margin greatly decreases. For example, in case of a gate electrode of a SRAM device, the rounding of the line edges is about 70 nm when the extension is about 100 nm with respect to an active region of an underlying layer. Therefore, the processing margin deteriorates and leakage current increases since the overlap margin is only about 30 nm, which is insufficient for the active region of the gate electrode.
In an effort to prevent the rounding of line edges of the pattern, a phase shift mask (PSM) which shifts the phase of the incident light is utilized. Also, a feed type light proximity compensation method may be employed. In this method, a subsidiary pattern having a bar shape is formed at the portion of the light masking layer pattern of the photo mask where the rounding occurs.
In case of the phase shift mask, since the light passing through the phase shift layer has a phase opposed to that of the light passing over others regions of the phase shift mask, the contrast of the pattern image can be increased by utilizing the diffraction phenomenon of the light, but the rounding of the line edges of the pattern cannot be completely eliminated.
As for the feed type light proximity compensation method, the overlap margin can be increased slightly by enhancing the rounding of about 30 to 40 nm when it is applied to the pattern under a 0.15 xcexcm design rule, however, the improvement of the rounding may be limited in case where pattern has a 0.12 xcexcm design rule.
Therefore, several methods of forming the pattern through a double exposure process using two photo masks are used to try and improve the rounding of the line edges of the pattern.
FIGS. 2A to 2D are cross-sectional views and plan views illustrating a method of forming fine patterns in a semiconductor device by the conventional double exposing process disclosed in Korean Patent Laid-Open Publication No. 1999-015462 (Korean Patent Application No. 1997-037588).
FIG. 2A is a cross-sectional view of a photo resist layer 54 on a semiconductor substrate 50 having a layer 52 to be etched thereon for forming a pattern. FIG. 2B is a plan view of the photo resist layer 54 being exposed through a first photo mask having longitudinally extending patterns 54a formed thereon. FIG. 2C is a plan view of the photo resist layer 54 being exposed through a second photo mask having laterally extending patterns 54b formed thereon. FIG. 2D is a cross-sectional view taken along the line of 2xe2x80x942 in FIG. 2C showing the resulting photo resist pattern 54c formed by developing the photo resist pattern 54. Thereafter, the desired pattern is formed on the semiconductor substrate 50 after etching the layer to be etched 52 by using the photo resist pattern 54c as an etching mask.
While the conventional double exposing method can prevent the optical diffraction phenomenon, the rounding of the pattern is still generated during the double exposure process since the latent image is overlapped in the region where the first exposed pattern 54a and the second exposed pattern 54b intersect each other.
It is therefore a first objective of the present invention to provide a method of forming fine patterns in a semiconductor device, which can prevent the rounding of the line edges of the pattern.
It is a second objective of the present invention to provide a method of simultaneously forming fine patterns comprising a line/space pattern and an island type pattern in a semiconductor device, which can prevent the rounding of the line edges of fine pattern.
To accomplish the first objective of the present invention, one preferred embodiment of the present invention provides a method of forming fine patterns as follows. First, a layer to be etched for forming a main pattern is formed on a semiconductor substrate and then a hard mask layer is formed on the layer to be etched. A first hard mask layer pattern, defining a first peripheral portion of the main pattern in a first direction, is formed by patterning the hard mask layer. Then a second hard mask layer pattern, defining the first and a second peripheral portion of the main pattern in the first and second directions, is formed by patterning the first hard mask layer pattern, the second hard mask layer pattern being identical to the main pattern. Thereafter, the main pattern is formed by etching the layer to be etched using the second hard mask layer pattern.
The first hard mask layer pattern is formed by forming a first photo resist pattern on the hard mask layer to define the first peripheral portion of the main pattern in the first direction and by etching the hard mask layer by using the first photo resist pattern.
The second hard mask layer pattern is formed by forming a second photo resist pattern on the resultant structure, including the first hard mask layer pattern, to define the second peripheral portion of the main pattern in the second direction and by etching the first hard mask layer pattern by using the second photo resist pattern. Preferably, the hard mask layer is composed of a material having an etching selectivity higher than that of the layer to be etched during etching process.
Also, to accomplish the first objective of the present invention, another preferred embodiment of the present invention provides a method of forming fine patterns in a semiconductor device wherein a layer to be etched is formed on a semiconductor substrate for forming a main pattern. Then, a hard mask layer is formed on the layer to be etched and then a first photo resist layer is coated on the hard mask layer. A first photo resist pattern is formed through exposing and developing the first photo resist layer by using a first photo mask having a first light masking layer pattern extending in a first direction. A first hard mask layer pattern is formed by etching the hard mask layer using the first photo resist pattern. After removing the first photo resist pattern, a second photo resist layer is coated on the resultant structure including the first hard mask layer pattern. A second photo resist pattern is formed through exposing and developing the second photo resist layer by using a second photo mask having a second light masking layer pattern extending in a second direction perpendicular to the first direction. A second hard mask layer pattern identical to the main pattern is formed by etching the first hard mask layer pattern using the second photo resist pattern. After removing the photo resist pattern, the main pattern is formed by etching the layer to be etched using the second hard mask layer pattern.
To achieve the second objective of the present invention, still another preferred embodiment of the present invention provides a method of simultaneously forming fine patterns comprising a line/space pattern and an island type pattern in a semiconductor device. In this method, a layer to be etched is formed on a semiconductor substrate for forming a main fine pattern. A hard mask layer is formed on the layer to be etched and a first photo resist pattern is formed on the hard mask layer, the first photo resist pattern being patterned to form the line/space pattern in a first region where the line/space pattern is formed and extending along a first direction into a second region where the island pattern is formed. Then, a first hard mask layer pattern is formed by etching the hard mask layer using the first photo resist pattern. After removing the first photo resist pattern, a second photo resist pattern is formed on the resultant structure including the first hard mask layer pattern, the second photo resist pattern being patterned to form the line/space pattern in the first region and extending into the second region along a second direction perpendicular to the first direction. Thereafter, a second hard mask layer pattern identical to the main fine pattern is formed by etching the first hard mask layer pattern using the second photo resist pattern. After removing the second photo resist pattern, the main fine pattern is formed by etching the layer to be etched using the second hard mask layer pattern.
According to the present invention, after the first hard mask layer pattern is formed by primarily etching the hard mask layer through the first lithography process, the second hard mask layer pattern is formed by secondarily etching the hard mask layer through the second lithography process. Therefore, the portion of the pattern where the rounding is generated can be cut twice by the double lithography processes, however, the first and second latent images cannot be overlapped since the second photo resist pattern is formed after the first photo resist pattern is removed.

Method of forming fine patterns on semiconductor device


A method for distinguishing an arc from a luminous gas at least containing metal vapor includes sensing light in a monitoring region and determining a first intensity Iλ1 of the sensed light at a first wavelength λ1 and a second intensity Iλ2 of the sensed light at a second, greater wavelength λ2. The ratio Iλ1/Iλ2 between the first intensity Iλ1 and the second intensity Iλ2 is determined. The sensed light is associated with an arc if said ratio Iλ1/Iλ2 is greater than a specifiable first threshold value and/or with a luminous gas at least containing metal vapor if said ratio Iλ1/Iλ2 is less than a specifiable second threshold value.

Such a method and such a device are generally known in the art and are, for example, used in electrical systems to protect people and/or the system itself, for instance, from the destructive effects of an arc caused by a short circuit or to mitigate its effects at the very least. For example, animals or even dropped tools and (damp) dirt can reduce the insulation or spark gap between two conductors having different voltage potentials such that an arc is formed. The very high currents resulting in some cases can lead to powerful explosions due to the air heating up in a very short space of time.
Electrical systems are therefore often monitored to prevent such an arc occurring, and in many cases this is achieved by measuring the current flowing through the electrical conductors and detecting the extremely intensive light resulting from an arc. If both criteria are fulfilled, an alarm signal or a switching signal is issued to close a switch between said conductors having different voltage potentials. On the one hand, this causes the arc to be extinguished quickly; on the other hand, it also causes very high currents to occur in the supply lines, which trip a higher-level circuit breaker, which ultimately isolates the danger area from the network. Of course, said switching signal can also be used to directly open a switch or a plurality of switches in the supply lines leading to the arc.
In principle, there are a number of publications on this subject in the prior art. For example, U.S. Pat. No. 6,229,680 B1 discloses a system for optical arc detection in which the light received by a measurement point is split and passed through two different band-pass filters. If the difference between the electrical signal resulting from the received light and the electrical signal resulting from a background light exceeds a threshold value, an arc detection signal is issued.
EP 1 538 722 A2 also discloses a system for arc detection in which the light received by a measurement point is combined with a modulated reference light source and then split and passed through two band-pass filters. If a first electrical signal, which represents light at a first wavelength, exceeds a second electrical signal that represents light at a second wavelength excluding the modulated reference light, an alarm is issued.
CH 676174 A also discloses the use of a band-pass filter to limit the light received by a measurement point to an arc wavelength range.
Furthermore, DE 10 2010 016 036 A1 discloses a color sensor comprising a red filter, a green filter and a blue filter for detecting an arc.
Finally, GB 2477970 A discloses an optical fiber having a fluorescent material which transforms light in a wavelength range that is characteristic of an arc into light that has a different wavelength. This transformed light is then passed to an optical sensor.
As a general rule, it is difficult to detect a dangerous, short-circuiting arc with any degree of certainty using methods in the prior art. This is because, in electrical systems, arcing can occur even during normal operation, for example in the form of switching arcs when disconnecting a live switching contact. The arc in a switching device itself is admittedly not directly visible, although luminous gas can be emitted by the switching device, said gas containing at least metal vapor which originates from the burning switching contacts, or arc deflectors or arc splitters, in the switching device. In addition, the gas may also contain other constituents, for example evaporated plastics from the housing of the switching device.
This luminous gas may erroneously be interpreted as dangerous arcing, leading to an electrical system which is actually working normally being shut down unnecessarily. In the prior art, this kind of malfunction can in particular be observed if a phase-to-earth short circuit (without arcing or with arcing outside the switch cabinet) causes a very high measurable current in the supply line and also causes an associated circuit breaker to trip. The luminous gases emitted by the circuit breaker seem to fulfil the two conditions (high current and bright light) mentioned at the outset for a dangerous arc.

Method for distinguishing an arc from a luminous gas containing at least metal vapor


A refrigerator including a freezer compartment is provided with a Stirling cycle refrigeration system including a displacer located within the freezer compartment and an external compressor which is fluidly coupled to the displacer. An electronic controller is provided to adjust a time phase relationship between the compressor and the displacer to establish a first phase condition for cooling of the freezer compartment and a second phase condition for establishing a defrost cycle for the refrigerator. The electronic controller is responsive to operator control inputs and sensor inputs. The phase relationship between the compressor and displacer is changed by substantially 180.degree. from the first phase condition to the second phase condition.

1. Field of the Invention
The present invention pertains to the art of refrigerators and, more particularly, a refrigerator assembly incorporating a Stirling cycle refrigeration system, the operating phase of which can be electronically controlled to effect both cooling and defrosting of a freezer compartment of the refrigerator.
2. Discussion of the Prior Art
The Stirling cycle is a known type of efficient refrigeration cycle. Such a cycle functions by directing a working fluid through four repetitive operations, i.e., a heat addition operation at constant temperature, a constant volume heat rejection operation, a constant temperature heat rejection operation and a heat addition operation at constant volume. It has been previously proposed to utilize a Stirling cycle in a refrigeration system, particularly a heat pump system. However, it has also been proposed in the art to utilize a Stirling cycle for use in a refrigerator. Such a Stirling cycle arrangement would incorporate an expander having an associated expansion space piston and a pulsator which has an associated compression space piston. In a conventional Stirling cycle refrigeration system, the phase relationship between the expansion piston and the compression piston is determined by a mechanical coupling between the pistons. However, particularly in view of the desire to adjust the degree of refrigeration, it has also been proposed to electronically control the time phase relationship between the expansion and compression pistons in order to alter the cooling capacity of the overall system. That is, the phase relationship can be altered, such as by changing the driving frequency for the expander and compressor, in order to actually reduce the maximum cooling capacity.
Despite these advances, the use of Stirling cycle refrigeration systems has not been widely accepted, in part due to the fact that the electronic controls proposed for such Stirling cycle systems do not provide for all of the cycles incorporated in more conventional refrigeration systems. For instance, the prior art dealing with Stirling cycle refrigeration systems have not addressed providing an automatic defrosting operation. For this and other reasons, there exists a need in the art for an improved refrigerator incorporating a Stirling cycle refrigeration system which can be electronically controlled to perform multiple operations, including both cooling and defrost operations, automatically. In addition, there is need in the art for a compact Stirling cycle system for use in a refrigerator.

Refrigerator incorporating stirling cycle cooling and defrosting system


An approach to communication of a quantized value includes communicating one or more parameters characterizing a distribution of the values, and then repeatedly quantizing values according to the distribution and communicating the transmitted values. In some examples, the quantizing of the values is according to a maximum-entropy codebook determined from the distribution (or from the parameters characterizing the distribution). In one application, a network communication method communicates link state values among nodes of the network using this approach to communication of quantized values. For example, link state information is distributed among nodes of the network by distributing parameters characterizing distributions of the link state values for particular links, and quantizing the link state values according to codebooks determined from the parameters. In some examples, the parameters characterizing the distributions are distributed less frequently than the quantized values.

This invention relates to entropy-based quantization, including maximum-entropy quantization, and more particularly to use of such quantization to communicate link state in a communication network, and yet more particularly to communication of link state for the purpose of relay-based communication in the network.
In a wireless mobile network, relaying is a viable technique for maintaining high performance communication among different parties. As an example, in a heterogeneous network two users may communicate via an intermediate node rather than or in addition to communicating directly to improve transmission rate and coverage. In an ad hoc setting, relaying can be applied among all users [Dressler et al., 2014]. A third user can act as a relay for two active users, such as in emergency message dissemination [Bi et al., 2010]. Relaying can also be applied in other scenarios such as infrastructure-aided, cellular, and vehicular networks. By employing two-way relaying, both the rate and reliability can be increased [Haija and Vu, 2015] [Pinals and Vu, 2014].
One approach to relaying uses a decode-and-forward (DF) strategy. With DF, the effects of the noise are removed completely at the relay by decoding the message before re-encoding it to transmit to the destination [Cover and El Gamal, 1979]. The composite DF transmission technique (e.g., as developed in [Pinals and Vu, 2014]) combines two transmission techniques such that the resulting scheme can be tailored to the link state of the system in order to achieve the best rate using minimum relay transmit power.
The state of a link in a radio network may be affected by Rayleigh fading. Given that links between users fade randomly, the transmission scheme preferably is adapted to the link state in order to obtain the best rate performance. To employ the composite relaying scheme in fading, the link states are distributed among the nodes, and by necessity must be quantized for transmission. Conventional quantization approaches, which have been a well studied topic in data compression [Max, 1960], [Lloyd, 1982] and have been applied in communication, may be applied to the communication of link state via codebook design for limited feedback [Love et al., 2008]. Conventionally, scalar quantizers are designed to be optimal in the sense that they minimize the expected distortion, such as the Lloyd-Max algorithm [Max, 1960] [Lloyd, 1982].

Maximum entropy quantization of link state


A heat dissipating system includes a wind tunnel, a first electronic element, and a second electronic element. The wind tunnel defines a top air inlet channel and a separated bottom, and a top air discharging channel and a separated bottom air discharging channel. Air entering the bottom air inlet channel dissipates heat produced by the first electronic element to the top air discharging channel, to flow out of the wind tunnel. Air entering the top air inlet channel flows to the bottom air discharging channel to dissipate heat produced by the second electronic element, this arrangement avoids heated air from one element being exhausted onto another element.

Electronic devices include a chassis and electronic elements on the chassis. A wind tunnel covers a first electronic element, for example, a central processing unit. Air at an air inlet of the tunnel is guided to an air outlet to dissipate heat produced by the first electronic element. The heat produced by the first electronic element may be dissipated onto a second electronic element at the air outlet of the tunnel, resulting in higher temperature of the second electronic element. This is not optimal.

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