Architectures and techniques are presented that provide an improved mechanism for a subscriber entity to report to a network provider a network issue that affects the performance of an application that uses a service provided by the network provider. The improved mechanism can enable fine granularity with respect to the network issue by identifying the issue on a per-session basis. In response to feedback data that is reported by the subscriber entity, the network provider can perform self-healing or other upgrade techniques to rapidly remedy the network issue.

Providers of network services continually seek ways to improve the experiences of customers. Even today, it is not uncommon, in some networks, for a network provider to be unaware of a network issue (e.g., an outage, poor service, . . . ) until a customer calls in to report the issue. A recent trend in the quest to improve subscriber experiences has seen significant focus on so-called self-healing networks. Typically, a self-healing network is one that can self-detect a network issue and then, potentially automatically, seek a remedy to the network issue. Self-healing networks tend to rely extensively on machine learning techniques both to detect and remedy network issues.

Subscriber feedback mechanism for real-time network service upgrade


An electronic device. The device comprises circuitry for capturing data representing an image and circuitry for detecting a wireless signal associated with an object. The device also comprises circuitry, responsive to the detecting circuitry, for storing image data from said circuitry for capturing and associating and storing, with same image data, additional data included in the wireless signal.

The present embodiments relate to a device with image capturing ability and are more particularly directed to the device responding to the capture of image content having an associated wireless identification.
Content capture functionality exists in many forms, including by ways of examples portable electronic devices, photocopiers, facsimile machines, cameras (still and video), and other electronic devices. A cellular telephone is an example of such a portable electronic device that often includes, in addition to its telephony operability, content capture functionality. Further, some of these electronic devices are referred to as multimedia devices, typically portable and capable of various functions, including the capture of both audio and visual content with the ability to later provide that content in an output format to a user or to transmit the captured content elsewhere. A personal digital assistant ("PDA") is an example of such a multimedia device and is sometimes alternatively referred to as a palmtop, handheld computer, or pocket computer. These devices are handheld and may provide various functions, including image capture for either still or video images; further, numerous other functions may be included with such devices, including sound recording and playing, computational and data storage retrieval operations, telephone, facsimile, networking (e.g., internet and/or email communications), and presentation of captured or input content. Further, PDA and cellular telephone functionality also may be combined in a single device.
While the image content capture functions of the above-described devices serve many useful and desirable functions, certain of these functions also pose various problems given the proliferation of these devices, the portability of some of these devices, and the accuracy with which they may capture content. For example various content may be of a nature whereby its owner or the person having control over it does not want the content captured by one of these devices for reasons that may be technical, legal, private, personal choice, or a combination thereof. In all events, per the preferred embodiments, it is desired that if such content is captured, there is the ability to alert someone else that a user of the device has so captured the content, preferably without alerting the device user. The preferred embodiments are directed to such an endeavor, as demonstrated below.

Image capture reporting based on content-associated wireless identification


There is provided a torque detecting device for providing a highly accurate torque signal, and an electric power steering device using the torque detecting device. A torque sensor is provided with a first coil pair and a second coil pair, which detect a relative displacement between an input shaft and an output shaft by corresponding the relative displacement to a change in impedance. Magnetization signal generating units supply exciting currents with different magnetization frequencies to the first coil pair and a second coil pair, respectively. The magnetization frequency difference is set to 3.5 kHz or higher. Moreover, low-pass filters for intercepting passage of a frequency equivalent to the magnetization frequency difference are deployed in signal processing circuits respectively.

An electric power steering device generally determines an assist force based on a steering torque detected by a torque sensor to drive and control an electric motor. An abnormality of this torque sensor greatly influences steering auxiliary control. Therefore, it is desirable to establish a duplex torque sensor system such that even if an abnormality occurs on one system of the system, the same function of the system may be continued by switching to the other system.
However, the region in which detection of a torque is carried out mainly around a torsion bar, but it lacks space. Therefore, in order to build the duplex system, two systems have to be arranged at almost coaxially adjacent positions.
Meanwhile, as a conventional torque sensor, coil type torque sensors are widely used, which reflects the torque exerted on a revolving shaft in impedance change of the coil, for detecting the impedance change. However, when such two systems of coil type torque sensors are arranged in almost coaxially adjacent positions, as described above, magnetic coupling may generate mutual interfering between the two systems. As a result, a low-precise torque signal will be generated during regular use thereof.
There is a technology disclosed in Patent Document 1, as an example for reducing the influence of generated magnetic flux interference by use of two or more coil pairs to. According to this technology, mutually different magnetization frequencies of exciting current supplied to two sets of coil pairs, respectively, and a low-pass filter for blocking passage of frequencies corresponding to the difference between the magnetization frequencies is used to reduce an AM modulated noise oscillating at a beat (beat tone) frequency developed due to the magnetization frequency difference.

Torque detecting device and electric power steering device


The present invention relates to a method for programming a memory cell having a determined transconductance curve. The programming of the memory cell comprises a series of programming cycles each comprising a step of verifying the state of the memory cell. According to the present invention, the verify step comprises a first read of the memory cell with a first read voltage greater than a reference threshold voltage, and a second read of the memory cell with a second read voltage lower than or equal to the reference threshold voltage. The memory cell is considered not to be in the programmed state if first- and second-read currents flowing through the memory cell are above determined thresholds, and programming voltage pulses are applied to the memory cell while the latter is not in the programmed state. Application in particular to the programming of Flash memory cells.

1. Field of the Invention
The present invention relates to electrically erasable and programmable memories integrated onto silicon chips, and more particularly to programming memory cells in such memories.
2. Description of the Related Art
Electrically erasable and programmable memories, particularly Flash memories, are generally designed to execute a programming operation in several cycles. Each cycle comprises, for each memory cell that is to be programmed, a step of verifying the state of the memory cell and a step of programming the memory cell. The programming step is performed if the memory cell is seen as not being in the programmed state during the verify step.
An example implementation of the verification step is shown in FIG. 1A. FIG. 1A represents a Flash-type memory cell formed by an NMOS-type floating-gate transistor CFGT. The memory cell is arranged in a memory array (not represented) comprising a plurality of memory cells arranged in lines and columns, such that the drain D of the transistor CFGT is linked to a bit line BL, its source S is linked to a source line SL, and its control gate G is linked to a word line WL. The verify step is performed by a sense amplifier SA linked to the bit line BL. The sense amplifier SA applies a determined drain-source voltage to the transistor CFGT, generally a voltage on the order of 1V, while a read voltage Vy1 is applied to the control gate G. The amplifier SA compares the drain-source current Ids flowing through the transistor with a reference current Iref1. If the current Ids is lower than Iref1, the memory cell is considered to be in a programmed state. If the current Ids is greater than Iref1, the memory cell is considered to be in an erased state.
The voltage Vy1 is greater than a reference voltage VTref that represents the minimum threshold voltage targeted for a floating-gate transistor to be considered to be in the programmed state. The reference current Iref1 corresponds to the current flowing through a floating-gate transistor having the threshold voltage VTref, when the latter receives the voltage Vy1 at its control gate.
An example of implementation of the programming step is shown in FIG. 1B. A pulse of a programming voltage Vpp, generally on the order of 5 to 10V, is applied between the drain and the source of the transistor CFGT, while a voltage Vgp is applied to its control gate. A current passes through the channel of the transistor CFGT and negative electric charges are injected and trapped in the floating gate (FG) of the transistor. The threshold voltage VT of the transistor increases by a determined increment. After one or more programming voltage Vpp pulses, each preceded by a verify step, the threshold voltage VT of the transistor reaches, in principle, a value at least equal to the reference voltage VTref.
Thus, the statistical distribution of the threshold voltages of a plurality of memory cells within a same memory array must, in principle, conform to a curve DS1 represented in FIG. 2, and the threshold voltages must be between the reference voltage VTref, on the order of 6V for example, and a maximum voltage VTmax, on the order of 9V for example, the voltage Vy1 being on the order of 6.5V for example. FIG. 2 further represents a curve DS2 showing the statistical distribution of the threshold voltages of memory cells in the erased state, which is between 0.5V and 2.5V for example. A read voltage Vread, representing the gate voltage applied to the memory cells during a normal read of the memory array, is also represented. The voltage Vread is different from the read-verify voltage Vy1 and is between the two distribution curves DS1, DS2, for example in the vicinity of 4.5V.

Method for programming memory cells including transconductance degradation detection


The object of the invention is to provide a high-quality pharmaceutical preparation in the field of PGE.sub.1 -containing fat emulsions, which is more stable bacteriologically, thermally, and against aging than any preparation hereto fore available.. The invention, thus, relates to a PGE.sub.1 -containing lyophilized composition derived from a fat emulsion comprising PGE.sub.1, an oil component, an emulsifier, and water having a pH controlled within the neutral region. Stated differently, the invention relates to a PGE.sub.1 -containing lyophilized composition characterized by comprising PGE.sub.1, an oil component, an emulsifier and designed to give a fat emulsion having a pH within the neutral region upon reconstitution with distilled water of pH 7.0.

PGE.sub.1, a substance having potent vasodilative and platelet aggregation inhibitory activities, is known to be a drug useful for the treatment of certain diseases such as chronic obstructive arterial diseases [thromboarteritis obliterans (TAO), arteriosclerosis obliterans (ASO)]. Nonetheless, because PGE.sub.1 is inactivated rapidly in the pulmonary circulation, continuous arterial therapy which calls for an extraordinary skill, intravenous drip injection, or massive administration has been attempted clinically but these therapeutic modalities unavoidably entail adverse reactions such as vascular pain, venotitis, and systemic hypotension.
Recently, for overcoming the above disadvantage of PGE.sub.1 and exploiting the outstanding efficacy of the drug, many explorations have been made for formulating PGE.sub.1 into fat emulsions (Japanese Kokai Tokkyo Koho S58-222014, Kokai Tokkyo Koho H4-69340, Kokai Tokkyo Koho H4-338333, Kokai Tokkyo Koho H4-338334, Kokai Tokkyo Koho H4-338335, etc.). Actually, the PGE.sub.1 fat emulsion-described in Japanese Kokai Tokkyo Koho S58-222014 is commercially available today.
The above commercial PGE.sub.1 fat emulsion is a useful PGE.sub.1 preparation, for PGE.sub.1 entrapped in emulsion vehicles is inactivated in the lungs only to a limited extent and this advantage coupled with the vascular lesion-targeting effect of the emulsion due to the characteristic distribution of its fine vesicles in the body produces a potent and lasting vasodilative effect at a low dose, not to speak of a reduced risk for local ADRs, for example mitigated irritancy. It is reported that this fat emulsion contains approximately 20% of decomposition products of PGE.sub.1 even immediately following its manufacture and that the PGE.sub.1 content declines at a rate of about 2.5% per month even when stored at 5.degree. C. [Kazuo Mizuguchi et al., The Clinical Report, 26, 1647-1653 (1992)], thus being not impeccable in quality and stability.
As a means for insuring a sufficient stability of PGE.sub.1 in a fat emulsion, lyophilization of such a PGE.sub.1 -containing fat emulsion was contemplated and actually much study has been undertaken for implementing a lyophilized fat emulsion (PCT WO92/07552, Japanese Kokai Tokkyo Koho H5-43450, Japanese Kokai Tokkyo Koho H6-157294, etc.). However, none of the efforts have borne fruit.
Meanwhile, each drug has a definite pH range in which it is stable and barring an extraordinary circumstance, pharmaceutical products are conventionally formulated within the pH range in which the active substance is stable for insuring a reasonable shelf-life. In the case of PGE.sub.1, it is known to be stable in the weakly acidic region (Pharmaceutical Research, Vol. 5, No. 8, 482-487 (1988); Pharmaceutical Research, Vol. 6, No. 3, 210-215 (1989)), and the above-mentioned fat emulsion available on the market has also been adjusted to a weakly acidic region (pH 4.5-6.0).

PGE.sub.1 -containing-freeze dried preparation and process for the production thereof


An interleaver which allows the use of consecutive groups of codewords within a frame, where the maximum size of each codeword is constrained to be equal to or less than a certain maximum size. In accordance with required performance standards, i.e., the specification of a maximum number of data errors that the system is supposed to withstand, the interleaver is capable of limiting the number of errors which occur within a specific codeword to be less than the maximum number of errors that can be corrected by the particular coding scheme. The interleaver is able to achieve this result even for codewords of uneven length. The interleaver attempts to divide the total number of symbols to be transmitted in a frame into equal size codewords. If the codeword size cannot be made equal, then unequal size codewords are used, however, the difference in size between codewords cannot be greater than one symbol. The R dimension of the interleaver memory is then generally determined based on the largest codeword size, except with certain modifications. Based on whether the codeword lengths are even, odd or a mix of even odd, a variable number of "dummy" symbols is inserted into the codewords to maintain the R and C dimensions of the interleaver memory such that R and C do not have any common multiple factors. A de-interleaver may also be realized by essentially performing the reverse process as the interleaver.

Digital data communications systems are commonly used to transmit and/or receive data between remote transmitting and receiving locations. A central facet of any data communications system is the reliability and integrity of the data which is being communicated. Ideally, the data which is being transmitted from the transmitting location should be identical to the data which is being received at the receiving location. Practically however, the data which is received at the receiving location has oftentimes been corrupted with respect to the original data that was transmitted from the transmitting location. Such data communication errors may be attributed in part to one or more of the transmission equipment, the transmission medium or the receiving equipment. With respect to the transmission medium, these types of data errors are usually attributed to the less than ideal conditions associated with the particular transmission medium.
To overcome these problems, data communications systems often rely on error detection and error correction schemes, to detect the occurrence of a data error and to correct a data error, respectively. One simple form of error detection is the use of a parity bit associated with each block of data to indicate whether the particular block contains an odd or even number of 1 bits. However, this is a very simple scheme which has numerous disadvantages. It is a simple type of error detection scheme which is capable of accurately detecting up to one bit error per data block. Moreover, the use of a parity bit cannot detect the occurrence of two bit errors in a data block, since this is not even detected as a parity violation. Additionally, the use of a parity bit only detects errors; it cannot correct errors. Any time that an error is detected, the receiving location typically requests retransmission of the particular data block from the transmitting location.
One type of error correction scheme commonly used in data communications systems is the use of redundant data transmissions and a voting circuit at the receiving location. In such a system, the data being transmitted is repeated a number of times, such as five. At the receiving location, all five data blocks are received and processed by a voting circuit which compares the five received versions of each data bit and determines the bit to be a 1 or 0 based on the voting consensus. Although such a system is capable of detecting and correcting data errors, it does so at a great cost in terms of the effective data throughput or transmission rate. This is due to the fact that each data block must be repeated a number of times.
The above-mentioned correction/detection schemes are examples of binary block codes. Specifically, an (n,k,d) binary block code is a set of 2.sup.k binary codewords of block length n and minimum distance d (i.e., coding distance). The transmitted data is partitioned into binary blocks of length k, then each block is mapped into a binary codeword of length n, which is then modulated and transmitted through the channel. This block code is capable of correcting up to t=(d-1)/2 errors within each codeword. As mentioned above, there are cases where channel errors occur in non-frequent bursts, the length of which exceeds the error correction capability of the code. These cases are handled by interleaving the data stream before it is modulated and transmitted through the channel. Functionally, an interleaver is a memory device which is used to rearrange and separate the codewords or frames which are to be transmitted. The terms codeword and frame are used interchangeably herein where a frame includes only one codeword. Instead of transmitting a succession of complete codewords, the interleaver allows the transmission of a portion (such as a byte) of a first codeword, followed by a portion of a second codeword, and so on. Henceforth, these portions will be referred to as either symbols or codeword symbols. In this way, if an error burst occurs during transmission, the error burst will not be localized to one particular frame. Rather, the errors will be spread across several codewords. If the errors were completely within one codeword, they may exceed the number of errors which the system can inherently correct for by the use of a block code. By spreading the data errors across several blocks, the number of errors within each block may be reduced to the point where the system is capable of correcting the data errors.
In a simple interleaver, data is written into the memory in columns and then read out in rows for subsequent transmission. At the receiver end, the received data is written into a de-interleaver in rows and then read out in columns. The interleaver rearranges the data within the codewords, and the de-interleaver essentially performs the reverse process to reconstruct the codewords for subsequent use. In this type of interleaver, all the data write operations are carried out as a group, and then the data read operations are carried out as a group. This type of interleaving, referred to as block interleaving, introduces latency of one block at the transmitter and one block at the receiver, due to the fact that a complete block has to be written before it can be read.
Another type of interleaver, referred to as a convolutional interleaver, has been introduced (J. S. Ramsey, "Realization of Optimum Interleavers", IEEE Trans. on Information Theory, Vol. IT-16, No. 3, pp. 338-345, May, 1970, the contents of which are incorporated herein by reference) as a means of reducing the latency incurred in block interleaving by one-half. In the convolutional interleaver, the individual read and write operations are alternated instead of being carried out all at once as a group of write operations followed by a group of read operations. Additionally, in the convolutional interleaver, the read operation following a write operation begins at the next memory location following where the write operation left off. This aspect of convolutional interleavers will be described in more detail with reference to FIG. 1 which shows the memory structure of a convolutional interleaver. As shown in FIG. 1, a convolutional interleaver memory 10 is configured to have R rows, numbered 1 through R, and C columns, numbered 1 through C. A codeword of frame which enters the interleaver is spread and reordered at the interleaver output. The size of R is often chosen to correspond to the number of symbols in a codeword or frame which is to be transmitted, while the size of C determines the interleaving depth which is the number of codeword frames over which a transmitted codeword at the interleaver input is spread by the interleaving process at the interleaver output. The memory locations of interleaver memory 10 are labelled for reference purposes as: (1,1) for the upper left memory location; (R,1) for the lower left memory location; (1,C) for the upper right memory location; and (R,C) for the lower right memory location. The selection of the specific dimensions R and C for any particular application is constrained such that R and C cannot have a common multiple factor (except for 1, of course). In a given application where R and C do have a common multiple factor, P. T. Tong, T. N. Zogakis and J. M. Cioffi, "Revised FEC and Interleaving Recommendations for DMT ADSL", ANSI T1E1.4/93-117, May 10, 1993, the contents of which are incorporated herein by reference, propose the addition of a "dummy" symbol, that is not actually transmitted, to the beginning of each codeword frame at the interleaver input. This artificially increases the R dimension, such that R and C do not have any common multiple factors. These "dummy" symbols are used primarily to maintain proper memory pointers and addresses, as discussed in detail below, and are extracted prior to data transmission so as not to consume a portion of the usable bandwidth of the system. Similar "dummy" symbols are used in the de-interleaver.
For example, in the case where R=151, C=10 and the codewords are thus 151 symbols long, the first operation performed by the interleaver is to write the first codeword into the interleaver memory 10 starting at location (1,1) and continuing to location (151,1). Next, a read operation is performed starting at the next memory location following the last symbol of the previously written codeword. In general, "wrap around" techniques are used to determine the next memory location for subsequent operations, as well as when the end of a column is reached. The wrap around may be either within the same column, or to the next column. Thus, in the case of wrap around within the same column, after the first write operation described above, the first read operation is performed beginning at location (1,1). If wrap around to the next column were used, the read operation would start at location (2,1). The description given herein will be in terms of wrap around within the same column; the principles of operation are equally applicable to wrap around to the next column. Alternatively, these write/read operations may be performed on a sub-codeword basis, such as a symbol, i.e., after each symbol is written, a symbol is read.
Beginning at location (1,1), the read operation is performed in rows. Since there are 10 symbols per row and the read operation will read 151 symbols, this corresponds to the first 15 full rows and the first symbol in row 16, i.e., locations (1,1) through (16,1). Because at this stage only the first column has valid data written into it, most of the data read out from the interleaver memory will be "garbage". Next, a write operation is performed beginning at the next location following the last read operation. Since the last read operation was at location (16,1), the write operation begins at location (16,2) and continues until the end of column 2 is reached (i.e., location (151,2)). At this point, a wrap around is performed to the top of the same column, i.e., location (1,2) and the write operation continues until location (15,2). Thus, the second block of data is written into the second column of the interleaver memory 10; however, the starting point is not the top of the column, but rather the 16th symbol of the column.
Next, a read operation is performed starting at the next location after the last write operation. Since the last write operation was at location (15,2), the read operation begins at location (16,2) and continues reading in rows, through location (31,2). This is followed by a write operation beginning at location (31,3) and continuing through location (30,3). The process is repeated until the interleaver memory 10 has been filled with valid data. It is thus apparent that the convolutional interleaver staggers the starting symbol for each column of data in the interleaver memory.
Data errors which occur during transmission typically affect a contiguous group of data symbols being transmitted. This can be viewed conceptually as the corruption of one or more consecutive rows of data in the interleaver memory. It will be recalled that data is read out from the interleaver memory in rows for subsequent transmission. The deleterious effects of data transmission errors are reduced in the first place by the operation of the interleaver. Instead of transmitting a succession of complete codewords, the interleaver transmits a series of symbols, one from each codeword. In this way, the effects of an error burst which lasts for a certain period of time, will be spread across several codewords. Thus, for example, if 20 consecutive symbol errors occur, they will not all be concentrated in one codeword, and instead may be manifested as one errored symbol in each of 20 codewords. By spreading the errors out over many codewords, the number of errored symbols in any given block will hopefully be reduced to a level that can be corrected by the inherent error correction capabilities of the particular coding scheme being used. In the above example, if a coding scheme which can correct up to four errored symbols per codeword is used, such a coding scheme will be overwhelmed if an interleaver is not used and 20 symbol errors occur in the same block. If instead, an interleaver is used, then the number of errors in each codeword may be reduced to four or less, within the error correction capabilities of the code.
Oftentimes it is desirable to group several "codewords" of data into a single frame. This is typically the case in certain transmission schemes where the frame rate is fixed, but it is desired to increase the overall number of codeword symbols being transmitted per frame. Typically, the size of the codewords cannot be increased beyond a certain maximum size. Thus, one approach that has evolved is to combine several codewords into a single frame. However, the combination of several codewords into a single frame presents certain problems when used with an interleaver. The straightforward approach to combining codewords in an interleaver is to simply write the complete codewords, one after the other, into the columns of the interleaver memory. However, in the case where smaller codewords are used, their error correcting capability is correspondingly reduced. Thus, since each codeword occupies a contiguous section of a column, if the rows affected by the data errors all occur within that section of the column, again, the error correcting capability of the code will be overwhelmed.
One solution to the above problem is to interleave the individual codewords in a frame before the frame data is input to the main interleaver described above. Essentially, this is a two level interleaving process. Thus, for example, if there are two codewords per frame, then the interleaver memory for each column would be filled with alternate symbols from the two codewords; if there are three codewords per frame, then the interleaver memory will be filled with a symbol from each of the three codewords in turn, so that the individual codewords will be spread out over every third symbol in the column. In this way, a burst of data errors occurring in a series of contiguous rows will be evenly spread over the alternated codewords within a column. However, this approach is disadvantageous in that a larger memory is needed to store the parallel codewords. Additional processing is also required to perform the alternating process.

Multiple codeword interleaver method and apparatus


The described techniques enable a skid communicator tool to quickly change network settings to those required by a particular skid or network in a process control environment with which a user of the tool wishes to establish communication. These techniques are helpful because skids and networks in process control environments often require different network settings for any device attempting to communicate with the skids or network, and a user often must manually load these network settings every time she wants to communicate with a different network or skid. By contrast, the techniques enable the skid communicator tool to seamlessly connect to, disconnect from, and reconnect to any of the skids or other networks requiring different network settings with minimal input from the user, thus enabling a user to easily move through and interact with different areas, units, or equipment of the process control environment.

Process control systems, such as distributed or scalable process control systems like those used in power generation, chemical, petroleum, or other processes, typically include one or more controllers communicatively coupled to each other, to at least one host or operator workstation via a process control network, and to one or more field devices via analog, digital or combined analog/digital buses. The field devices, which may be valves, valve positioners, switches, and transmitters (e.g., temperature, pressure and flow rate sensors), perform functions within the process or plant such as opening or closing valves, switching devices on and off and measuring process parameters. The controller receives signals indicative of process or plant measurements made by the field devices (or other information pertaining to the field devices), uses this information to implement a control routine, and then generates control signals which are sent over the buses to the field devices to control the operation of the process or plant. Information from the field devices and the controller is typically made available to one or more applications executed by the operator workstation to enable an operator to perform any desired function with respect to the process or plant, such as viewing the current state of the plant, modifying the operation of the plant, etc.
The process controllers, which are typically located within the process plant environment, receive signals indicative of process measurements or process variables made by or associated with the field devices (or other information pertaining to the field devices) and execute controller applications. The controller applications implement control modules that make process control decisions, generate control signals based on the received information, and coordinate with the control modules or blocks in the field devices such as HART® and Fieldbus field devices. The control modules in the process controllers send the control signals over the communication lines or signal paths to the field devices, to thereby control the operation of the process.
Information from the field devices and the process controllers is typically made available via the process control network to one or more other hardware devices, such as operator workstations, maintenance workstations, personal computers, handheld devices, data historians, report generators, centralized databases, etc. The information communicated over the network enables an operator or a maintenance person to perform desired functions with respect to the process. For example, the information allows an operator to change settings of the process control routine, modify the operation of the control modules within the process controllers or the smart field devices, view the current state of the process or status of particular devices within the process plant, view alarms generated by field devices and process controllers, simulate the operation of the process for the purpose of training personnel or testing the process control software, diagnose problems or hardware failures within the process plant, etc.
The field devices usually communicate with the hardware devices over the process control network, which may be an Ethernet-configured LAN. The network relays the process parameters, network information, and other process control data through various network devices and to various entities in the process control system. The network devices typically facilitate the flow of data through the network by controlling its routing, frame rate, timeout, and other network parameters, but generally do not change the process data itself.
Some process plants include modular process skids ("skids") that may be integrated into the process control system to varying degrees. A skid may be thought of as a "system in a box" that acts as a self-contained process or sub-process. Each skid generally includes a controller such as a programmable logic controller ("PLC"). The PLC generally includes one or more processors, one or more memory or storage components, and specialized input/output (I/O) modules. Note, some important characteristics distinguish a PLC from a general-purpose computer. Most importantly, a PLC is typically more reliable, designed for a mean time between failures measured in years. Second, a PLC can be placed in an industrial environment with its substantial amount of electrical noise, vibration, extreme temperatures, and humidity. Third, PLCs are easily maintained by plant technicians.

Quick connection techniques for skid communicator tool


A rotatory resectoscope is disclosed with a novel mechanism for endoscopic resection. Resection is performed by a rotary motion instead of the conventional linear motion. A novel resection loop and working element for controlling the movement of the resection loop allow the resection loop to move in clockwise and counterclockwise rotation. Embodiments include both monopolar and bipolar diathermy resectoscopes.

A resectoscope is an endoscopic instrument. One exemplary use of a resectoscope is to resect prostate or bladder lesions into small pieces of tissue under direct optical vision. A resectoscope's cutting mechanism uses electrical current that passes through a metal wire loop at the tip of the resectoscope. Resectoscopes were initially developed by Maximilian Stern (1877-1946), who performed the first transurethral resection of the prostate (TURP) in history in 1926. For many years up to the present day, transurethral resection has remained the standard surgical option for prostatic enlargement and for biopsy or resection of bladder tumors.
The mechanical aspect of the cutting action of a resectoscope is by moving the cutting loop against the tissue in a linear motion following the longitudinal axis of the resectoscope. This mechanical actuation is generally the same whether a resectoscope is monopolar or bipolar. Consistent with the linear mode of mechanical actuation, the maximum size of the cutting loop must be less than the internal diameter of the resectoscope sheath so the loop can be introduced and removed from the resectoscope sheath. As the resectoscope is introduced through the urethra, the external diameter cannot exceed certain limits.
FIGS. 10A, 10B, and 10C depict a conventional resectoscope 900 consistent with the preceding paragraph. The resectoscope 900 includes an electrode assembly 940 (FIG. 10C) of which a distal electrode tip 943 is visible, a sheath 902, a telescope tube 903, a spring-loaded link 904, a connector 905 to which a light source may be connected, and handles 906 and 907. The electrode assembly 940 comprises a support body 941, a spring clip 942, and a distal electrode tip 943. The spring clip 942 is configured to secure the electrode assembly 940 to the telescope tube 903. The spring clip 942 is semi-cylindrical in shape and fixedly connected to the support body 941. The spring clip 942 may be snapped on to the telescope 903 or, in the alternative, the telescope 903 may be passed through the spring clip 942. The resectoscope 900 is actuated with a linear motion parallel to the longitudinal axis of the resectoscope, as indicated by the arrows 921 in FIG. 10B. The dotted lines 922 show a linearly extended position of the distal electrode tip 943. The distal electrode tip 943 is configured as a loop which is extendable and retractable from the sheath 902 to perform tissue cutting operations. The loop is semi-circular and sized smaller than the diameter of the sheath 902.


A semiconductor device that reduces the parasitic capacitance between a conductive trace and a substrate, and a method of fabricating the same. The semiconductor device includes a substrate, an insulator layer disposed upon the substrate, a conductive trace disposed upon the insulator layer, and an element disposed between the substrate and the conductive trace. A first capacitance exists between the conductive trace and the substrate and a second capacitance results between the conductive trace and the substrate due to the presence of the element. The second capacitance is in series with the first capacitance, thereby reducing an effective capacitance between the conductive trace and the substrate.

1. Field of the Invention
The present invention is related to semiconductor devices and integrated circuits. More specifically, the present invention relates to Very Large Scale Integration (VLSI) systems.
2. Background Art
In VLSI applications the parasitic capacitance of the signal lines to the substrate reduces the signal bandwidth and signal speed due to the filtering effect. The parasitic capacitance arises from an electrical coupling between the signal line and the substrate. The equation for the parasitic capacitance is given by:C=eA/d,  Eq. 1where e is the dielectric constant of an insulator disposed between the signal lines and the substrate, d is the spacing between the signal lines and the substrate, and A is the area of the signal lines. The signal width times the signal length is the area of the signal lines. If, for example, the insulator is a field oxide, the dielectric constant, e, is about 3.9 and the thickness of the field oxide insulator, d, is about 0.3 μm.
The above equation suggests that the parasitic capacitance can be reduced by adjusting the parameters that appear on the right side of the equal symbol (e.g., e, A and d). For example, reducing the area, A, reduces the parasitic capacitance, but at the cost of proportionally increasing the parasitic resistance, which in turn decreases the signal speed. For a given VLSI process, adjusting the thickness, d, and the dielectric constant, e, is not a viable option. This is because for a fixed VLSI fabrication process, such as a standard complementary metal oxide semiconductor (CMOS) process, the thickness and dielectric constant of the insulator disposed between the signal lines and substrate remain constant. Accordingly, it is difficult to reduce the parasitic capacitance without changing the process material or flow.
Therefore, what is needed is a device and method that reduces the parasitic capacitance without changing the process material or flow.

Design and layout techniques for low parasitic capacitance in analog circuit applications


A method for applying a pattern, such as a logo, onto the outer skin of an aircraft element includes the following steps: a) applying a coat of paint onto the aircraft element; b) applying a top coat (base coat) onto the coat of paint; c) applying a first coat of transparent varnish (clear coat) onto the base coat; d) applying the pattern onto the first coat of transparent varnish; and e) applying a second coat of transparent varnish (clear coat) onto the pattern.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Traditionally, the outer elements of an aircraft are covered with a series of coats of specific paints and varnishes.
More specifically, these elements are successively covered with a coat of primer, an intermediate coat of paint, a base coat, and a coat of transparent varnish, also called "clear coat".
Typically, when one wishes to affix a pattern such as a logo on the concerned aircraft element (fuselage, nacelle, bypass, for example), it is placed on the base coat, and covered with the transparent clear coat.
One recurring problem that has been observed is a certain incompatibility between the logo and the base coat, leading to smudges on the periphery of the pattern to be affixed.
To clean these smudges, it is necessary to use degreasing products such as isopropyl alcohol, but then these products are chemically incompatible with the clear coat.
Efforts have been made to reduce the risk of the appearance of smudges by allowing the base coat to dry longer.
However, despite longer drying times (up to 72 hours), the aforementioned smudging problem has continued to appear.

Method for applying a pattern, such as a logo, onto the outer skin of an aircraft element


The present invention provides a method to derive hepatic stem cells from stem cells derived from non-liver tissue. In one embodiment of the invention, hepatic stem cells are derived from adipose stem cells. The invention also provides a method of enhancing hepatic cytokine production (e.g., HGF) from ASCs, which may be useful in the regeneration of liver tissue when transplanted in vivo. Tissue culture conditions, including media conditions, are provided.

The present invention relates generally to the field of cell based therapies. More specifically, the present invention relates to the derivation of hepatic stem cells from stem cells derived from non-liver tissue.
Liver failure secondary to hepatitis, hepatotoxin exposure, and cirrhosis threatens the lives of thousands in the United States alone. Estimates of yearly direct healthcare costs for liver disease in the U.S. range from $60 billion to over $100 billion. An additional $20-40 billion in disability is paid annually to these patients and their families by the Social Security Administration. Unfortunately, at this time, liver transplantation is the only therapeutic option available to patients other than palliative measures.
However, because of the shortage of donor organs, less than a third of all patients on waiting lists for livers will actually receive one. According to the United Network of Organ Sharing (UNOS), 15,700 patients await liver transplantation in the United States currently, but only 4,000 to 5,000 transplantable donor livers are available annually. Since, with few exceptions, one donor organ helps only one recipient, over the past decade an increasing gap has grown between available donors and waiting transplant candidates. Therefore, novel therapies are needed.
Stem cell therapies present an alternative therapeutic option for those requiring whole or partial reconstitution of liver function. In many ways, liver cell therapies are a desirable alternative to whole organ transplantation, because one liver can be used to treat multiple patients and because the surgical procedures involved in cell therapies are safer, easier, and less costly for the patient. Stem cell transplantation offers a treatment modality that safely and effectively improves biochemical function within the failing liver.
Thus, there is a need for methods to derive hepatic stem cells from non-liver tissue.

Adipose derived adult stem cells in hepatic regeneration

BOARD OF SUPERVISORS OF LOUISIANA STATE UNIVERSITY AND AGRICULTURAL AND MECHANICAL COLLEGE


Aspects of the subject matter described herein relate to adaptive retention for backup data. In aspects, space may be needed on a backup storage in order to store additional backup data. In response, an indication that space is needed provided to a retention manager. The retention manager attempts to prune data on the backup storage to free up space on the backup storage. Before deleting a version on the backup storage, the retention manager determines whether deletion conditions are met. The retention manager may apply one or more retention policies in its efforts to free space. The retention manager may manage and free the space such that versions of files already stored are preserved for the longest possible time.

Many people who have experience with computers recognize the value of backing up data that resides on the computer. Unfortunately, the complexity of backup solutions hinders users from creating and maintaining sufficient backup sets. Furthermore, as a user creates more and more versions of files, backup sets may grow to a point that they no longer fit on a target backup device. In addition, when multiple users share a computer, one user may consume a substantially larger portion of the target backup device.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one exemplary technology area where some embodiments described herein may be practiced.


A system and method are provided for incorporating a client-side tracking system in conjunction with a tracking server to track URL usage. The method includes implementing the client-side tracking system for preserving a target URL upon tracking. The method additionally includes providing a failsafe mechanism for directing a client to the target URL from the client-side tracking system upon detection of tracking server failure by the client-side tracking system. The client-side tracking system includes an event detection mechanism for detecting occurrence of one of a tracking server URL logging event and a tracking server timeout event. The client-side tracking system additionally incorporates tracking information including a stored target hyperlink reference accessible to the client-side tracking system for directing the client to the selected URL upon detection of an event by the event detection mechanism.

Businesses today that use commercial web sites to convey information have an interest in tracking statistics regarding visitor activity. Commercial web sites today often aim to track usage as measured by the number of users viewing specific pieces of content.
In order to track usage, mining data out of web logs on a web server is not a viable solution. The act of logging every single interaction on a web site would be cost prohibitive and slow down web site performance. Furthermore, such a technique would provide more information than necessary. Businesses typically are not interested in recording every user action on a web site and are generally satisfied with a count of user visits through each link.
Typically, commercial web sites implement tracking servers to track URL usage from a partner server having one or more links to the commercial web site. Generally, tracking information is encoded into a URL. The tracking information may include such information as the data link selected from the partner web site to initiate the content request and the rendered content page from which the content request originated. Software in the tracking server logs information and redirects the user browser to the location of the link that the user wanted to reach. When a user clicks on a link in a partner web site, after tracking, the user receives a completely random looking string of numbers and letters that has no relevance to the user's selected destination
For example, services are available through which participating web sites can each set up their own namespace on a tracking server, complete with all the URLs to which they expect their users to be redirected, and then begin using URLs that point to a single address.
While tracking servers may be able to keep an accurate count, the current technique for using tracking servers creates several implementation difficulties. First, if the tracking server is down or otherwise inaccessible, all the links on the web site being tracked will become unusable even though the web site being tracked is healthy. Even if the user selects a link to a different page on the same web site he is currently visiting, if the tracking server is not operating properly, the user will be unable to access the page. If something blocks the user from getting to the tracking server such as network latency or network outage, the user will be unable to visit the location referenced by the target URL. The web site operator will probably be unaware of the outage unless users call product support.
Secondly, after tracking, all of the links will have lost their context. In other words, a URL that used to point to "http://entertainment.msn.com/movies" may now point to "http://g.msn.com/ent.345/?ps=123&cm=321&ce=5". The tracking URL is typically a nonsensical combination of letters and/or numbers that provides no contextual information about the destination and bears little relation to the target URL content, thus causing confusion to the user. If this resultant tracking link is copied and saved or sent to a friend, it is not possible to infer what property this link accesses. In addition to user confusion, the tracking URL has little meaning to search index systems that also rely on URL content for indexing. If a web site is indexed by a web search index system such as Google, the algorithms of the web search index system apply weight to context that can be inferred from a URL. Accordingly, if ten external partner web sites point to one page on a target web site and all of the external web sites have information in the URL that allows the heuristics of the web search index system to determine context, then that one page that has those ten links referencing it is going to rank much higher in search results than other pages. For instance if user implements a browser to search for Barry Manilow, a web site operator having a page pertaining to Barry Manilow would want the user to be able to access the page. Accordingly, the web site owner would want his or her Barry Manilow page to be referenced by a URL that will promote high-ranking search results. Because of the emphasis that many contemporary search algorithms apply to the URL of a given page being indexed, it has become increasingly important to provide clues as to the content of a web page within its destination URL.
A further implementation difficulty with existing tracking servers includes the necessity for registering each URL with the tracking server. Each web site that uses a tracking server for tracking often must pre-disclose or register URLs in a namespace on the tracking server.
A solution is needed that allows contextually relevant URLs to be maintained during tracking procedures to enable web sites to participate fully in web search engines and to enable users to discern target web site content from the URL. A solution is additionally needed for allowing user link usage even when a tracking server outage has occurred. Furthermore, a solution is needed that eliminates any existing requirement to pre-disclose or register each URL with a tracking server.

System and method for tracking URL usage


The present invention relates to functional organic particles having functional nanoparticles dispersed in an organic polymeric matrix, wherein the distribution of the functional nanoparticles is increased in the direction toward increasing the particle diameter from the center of the functional organic particles, and to a method for preparing the same.

Conductive organic particles, as an example of the functional organic particles, have conventionally been prepared by a method comprising spreading a metal such as platinum on the surface of the fine organic particles synthesized by emulsion polymerization or dispersion polymerization in a post-treatment process. This conventional method has an advantage that a uniform and thin conductive film can be formed on the surface of the fine organic particle. However, it has disadvantages that it is difficult to select a polymerizable or spreadable raw material for, and the cost of the spreadable raw materials is high, thus it being difficult to provide massive production thereof.
In order to overcome the disadvantages, Korean Patent Laid-open publication No. 2003-0049007 describes a method which comprises mixing a nano-sized silver colloidal solution, a monomer, an emulsifier, an initiator, and the like, and then subjecting the mixture to emulsion polymerization, dispersion polymerization, microemulsion polymerization, or the like, so as to capsule the silver particles with a resin composition.
However, the capsule prepared by this method has the silver particles irregularly dispersed in the inside of the polymeric resin, and thus the silver particles deeply embedded in the polymeric resin do not play their roles. Therefore, the fact that a large amount of the silver particles should be added to obtain a sufficient effect poses a problem.

Method for preparing functional organic particle


A drum core for a wire-wound component having a pair of flange parts provided on both ends of an axis core around which a winding wire is wound, with tapered surfaces of roughly conical shape formed on their facing inner surfaces in such a way that the interval of the inner surfaces increases toward the outer sides of the flange parts. The flange parts have roughly a rectangular shape and the sides along which their long side faces contact the tapered surfaces have the curved shapes that convex roughly at the center. The curved shapes make the height of the corners of the flange parts from the reference surface lower than the height of the convex parts of the curved shapes from the reference surface, and the loads received by the wire during winding are reduced as a result.

Field of the Invention
The present invention relates to a core for a wire-wound component constituted by a winding wire-wound around an axis core having flange parts on both ends, its manufacturing method, and a wire-wound component, and more specifically to a prevention of damage of winding wire and adjustment of wire winding position.
Description of the Related Art
Traditionally a drum core for a wound inductor of low-height shape having a pair of square flange parts on both ends of its axis core is subject to wire damage when the ridgelines on the inner sides of the corners of the flange corners contact the winding wire when winding. Accordingly, there has been a need to improve the reliability of the product by facilitating position adjustment at the time of winding. To address this problem, a wire-wound coil component is disclosed in Patent Literature 1 mentioned below, for example, wherein the winding core has a tapered part at both ends of the winding core in such a way that the wire-wound part becomes thicker toward each end, while the coil winding wire is made of a square wire having a square section shape, so that when the coil winding wire is wound around the tapered part in a manner causing the tapered part of the winding core to make surface contact, strength of the winding core can be increased without decreasing the number of windings of the coil winding wire and consequently winding of the coil winding wire becomes easy. Also, Patent Literature 2 mentioned below discloses a surface mount choke coil utilizing a drum core having an enlargement area, wherein, specifically, a tapered part is formed on the surface of at least one of the upper flange part and lower flange part provided on both ends of the winding core, where said surface is facing the other flange part, so that when the outer periphery surface of the coil conductor wound around the winding core moves away in the radius direction, the interval between the facing flange parts becomes larger.

Core for wire-wound component and manufacturing method thereof and wire-wound component made therewith


The invention concerns an asynchronous receiver for digital transmission and recording systems. The receiver comprises a sampling rate converter (SRC) for timing recovery, preceded by a digital adaptive equalizer operating at the sampling rate 1/Ts, asynchronous to the data rate 1/T. An equalizer adaptation method using zero-forcing (ZF) techniques is described for adapting equalizer taps asynchronously to the data rate via a control loop. To this end, the control loop comprises temporal interpolation means performing time-base conversion for converting signals from the synchronous domain (1/T) to the asynchronous domain (1/Ts) and spatial conversion means to convert T-spaced signals into Ts-spaced signals.

The U.S. Pat. No. 5,999,355 describes an asynchronous receiver such as the one mentioned in the opening paragraph. In accordance with the cited patent, the equalizer is a tapped delay line (Finite Impulse Response filter) with a tap spacing of Ts seconds, and control of the equalizer is based on the classical LMS (Least Mean Square) algorithm. That is to say, updates of the equalizer tap values are produced by correlating the tap sequences with a suitable error sequence. Classical LMS techniques normally apply to synchronous receivers wherein error and tap sequences have the same sampling rate and are phase synchronous. The asynchronous receiver described in the cited patent thus comprises at least two provisions in order that error and tap sequences have the same sampling rate and are phase synchronous. The latter condition implies that any latency in the error sequence should be matched by delaying the tap sequences accordingly. The aforementioned two provisions include an inverse sampling rate conversion (ISRC) for converting the synchronous error sequence at the data rate 1/T into an equivalent error sequence of sampling rate 1/Ts, and delay means to provide delayed versions of the equalizer tap sequences to match the "round-trip" delay arising in the formation of the equivalent error sequence from the equalizer output. This "round-trip" delay is not accurately known a priori because both SRC and inverse SRC introduce a time-varying delay. The matching delay represents the expected or average value of the "round-trip" delay. Discrepancies between the "round-trip" and matching delays tend to cause the adaptation scheme to converge to an erroneous solution. Furthermore, since the matching delay needs not be an integer number of symbol intervals Ts, implementation of the matching delay may require some form of interpolation. This adds to the complexity of the system. The inverse SRC also adds to this complexity so that overall complexity of the adaptation-related circuitry is considerably larger than in synchronous LMS-based adaptation.


Electronic equipment includes a pressed body as either a housing or a display, a pressure-sensitive sensor, a support configured to support the pressure-sensitive sensor such that the pressure-sensitive sensor is opposed to the pressed body, and a filler provided between the pressed body and the pressure-sensitive sensor. The filler has a thickness that changes with distance between the pressed body and the pressure-sensitive sensor.

Recent years have seen proposals of electronic equipment having a sensor in a film form on an inner side face of a housing or a rear face of a display and capable of detecting a pressure with which the housing or the display is pressed. Referring to PTL 1, providing a projecting portion on a sensing face of the sensor to provide improved pressing pressure sensitivity to such electronic equipment is described.

Input apparatus and electronic equipment


Embodiments of the present disclosure provide a method and apparatus for managing memory. Embodiments of the present disclosure, is related to a method and apparatus for managing memory, comprising: monitoring usage status of memory in a first computer device so as to determine available addresses; mapping at least one part of the available addresses to externally accessible shared addresses; and managing the shared addresses on the basis of a memory table so that the at least one part of the available addresses are accessible to a second computer device via the shared addresses, wherein the memory is connected to a dual in-line memory module interface of the first computer device.

With the development of computer hardware techniques, there have been advancements made in various types of communication interfaces and storage media, and these techniques provide a hardware basis for achieving higher-speed memory access. With the development of computer software techniques and high-speed network techniques, resource sharing can be achieved across a plurality of computer devices. Increasing the efficiency of resource sharing has become a focus of attention.
Memory resources can be shared between a plurality of computer devices. There may be levels of memory on the basis of difference in access speed. For example, a computer device may have multiple levels of memory, such as cache, internal memory and hard disk. Since these memories have different hardware features and access speed, their sharing policies also differ.
Sharing of memory devices like hard disks has been achieved. However, due to limitations of memory's access speed and transmission efficiency between the memory and the central processing unit (CPU) of a computer device, efficiently sharing memory between a plurality of computer devices poses a challenge. Various embodiments of the present disclosure focuses on how to achieve memory sharing, and thus reference made to the memory throughout the context of the present disclosure refers to the memory in a computer device.
In an existing cluster environment typically each computer device (e.g. server) in the cluster has its own memory. Since the memory size is a critical factor affecting the computer device's data processing capability, to cause the computer device to have higher data processing capability, usually a large-capacity memory is configured in the computer device. While running a different application, the computer device often requires support of different amounts of memory, and therefore needs for memory vary considerably between the peak value and the valley value.
When the computer device executes a large application, shortage of memory resources might occur; when the computer device is lightly loaded, however, a number of memory resources may be free. The memory (e.g. Random Access Memory (RAM)) is still at a high price, so it is desired to share memory between a plurality of computer devices so as to increase the utilization efficiency of memory and further reduce the cost.


A pulsed ion multifunctional detector used for both high performance liquid chromatograph and ion chromatograph, and experiment chromatograms attached also show that the detector has excellent multipurpose function in liquid chromatograph. The casing of the instrument is provided with a sample solution inlet, a sample solution outlet, a power supply socket, a liquid crystal display, an operation keyboard and a detection signal output interface. In the casing is provided a detection electromechanical member, which includes a central controller, a detection cell, a preposed subtracting module, a polarity transformation module, a noise processing module and an output amplifier module. The pulsed ion multifunctional detector can sensitively and accurately measure ion current of sample ionized directly in the detection cell, and subtract baseline background generated by various mobile phases and automatically eliminate dynamic noise and drift of the instrument.

Field of Invention
The present invention relates to an innovative analyzing and detecting instrument, and particularly to a pulsed ion multifunctional detector for both high performance liquid chromatograph and ion chromatograph, and having excellent multipurpose function in liquid chromatograph.
Description of Related Arts
Liquid chromatograph is an instrument for detecting and analyzing a sample qualitatively and quantificationally, and is widely used in food, medicine, water quality, beverage, biochemical and health products to detect and analyze the component of the sample. At present, liquid chromatograph mainly has high performance liquid chromatograph, ion chromatograph, capillary chromatograph, gel chromatograph and the like, wherein the high performance liquid chromatograph (HPLC) and the ion chromatograph (IC) are most widely used.
Liquid chromatograph and ion chromatograph mainly include a high pressure infusion pump, a high pressure sampling system, a chromatographic column, a detector and a data processing system. Developers and users all know that during the analyzing and detecting process, firstly various mobile phases should be mixed, stirred and degassed, then the sample is prepared into a sample solution, and entered into the high pressure sampling system and delivered into the chromatographic column through the high pressure infusion pump. Since each component of the sample solution has different partition coefficient in two phases, after several times of absorption-desorption partition process, the sample can be separated, as per different time passing the chromatographic column, into individual component, which flowed out in turn from the chromatograph column and entered directly into the detector. In the detector, the concentration of the individual component of the sample is converted to voltage signal output. The data processing system is connected with a computer and performs data processing on the output electric signals, and shows the analysis result of the individual component of the sample in the form of spectrogram. From the above content, the detector is one of the most core components of the whole chromatograph. The technical performance of the detector directly decides the technical performance of the whole chromatograph and is an important prerequisite of the accurately qualitative and quantitative analysis of the sample.
In the prior art, the detector of the high performance liquid chromatograph only has self-detection function. It can only be used in the detection of the liquid chromatograph, rather than the detection of the ion chromatograph. For example, the common ultraviolet absorption detector has no ultraviolet absorption of the ion chromatographic sample, thus it can not be applied to the ion chromatograph. Similarly, the detector of the ion chromatograph is also difficult to be applied to the high performance liquid chromatograph. Take the common conductivity detector for the detection of the ion chromatograph as an example, the sensitivity of which is far below various detectors in the liquid chromatograph and is unable to subtract large scale baseline background of the mobile phase. Moreover, it is required to add expensive ion exchange column and also expensive additional inhibiting column in the detector and difficult to adapt to the variation of various allocation proportions of multiple mobile phases in the liquid chromatograph. As another example, the ion detector of DIONEX Company of America used for the ion chromatograph, has complicated structure due to indirect ionization and has high cost and price. As another example, an electrochemical detector of the ion chromatograph, the stability and the sensitivity of which is influenced by the chemical reaction of electrodes over time, and the electrodes of which are often need to be cleaned, and thus the detector is not convenient to use. In addition, none of those detectors is applied to the high performance liquid chromatograph. Thereby the detectors in the present liquid chromatographs have poor universality and are unable to achieve the function of multipurpose. Also, the technical difficulty that the sensitivity and the stability of the detector are conflicted with each other is difficult to overcome.

Pulsed ion multifunctional detector for both high performance liquid chromatograph and ion chromatograph


The invention relates to a system and methodology for facilitating managing product life cycle. A component that determines relevance of components to a product; an analyzing component that determines, infers or predicts obsolescence, level of risk to EOL of a subset of the components. A substitution component that identifies replacement components and suppliers for the subset of components. A cost analysis component that determines material/components cost savings, and redesign cost implementation and/or redesign cost avoidance. A viability component that measures reliability of a component. A transition component that identifies components that require updating or replacement. A profitability component that determines the expected revenue derived from a component over its projected remaining life.

In 1998, electronic component manufacturers discontinued 34,000 parts. In years 2001 and 2002, that number rose to 55,000 and 120,000 parts respectively according to PCNalert, a company that tracks supply base end-of-life notices. With recent market trends this rapidly growing rate may decline; however, the average yearly EOL level is expected to remain markedly high.
Companies that maintain large product portfolios, for example, can utilize over 25,000 semiconductor, passive, and magnetic components, which can be sourced by more than 300 manufacturers. Many of these products consist of 10-20 different suppliers providing some 20 to 50 different electronic components. Also, a majority of these products have a minimum life of 10 years, with many customers keeping them in service for decades, especially within the industrial, automotive, telecommunications, and military market sectors. Further, a sampling of 23,000 components utilized by some 10,000 products lead to the determination that approximately 54% of such components were beyond their mature phase of life, with some 34% declining in use, or identified for phase out. Moreover, a survey of Fortune 500 companies, conducted by CSM Strategies, reported that users of these types of components experienced, on average, a 3% per year rate of EOL for their active bill of materials (BOM)—this places a significant percentage of components at risk to EOL.
An aggregation of the aforementioned factors, present a problem of not "if", but "when" will a given product be affected by end-of-life events. Conventional mitigation of an EOL occurrence does nothing to anticipate or elevate within a near horizon, the probable occurrences of the next event on the same product. Consequently, product changes driven by these events are typically disjoint, which places an increasing burden on already constrained development and continuation engineering resources. Such demand leads to accelerated inventory costs due to bridge buys needed to maintain product shipments until resources can be implemented. This ultimately results in decreased revenue, increased risk to new product development, and customer dissatisfaction.
The burden on constrained development and continuation engineering resources can be further mitigated with the subject invention through use of viability assessment tools used in conjunction with planning and prioritization tools. Since the impact of components at risk to EOL requires strategic considerations during planning processes and project prioritization the use of viability assessment and analysis can facilitate the planning and prioritization stages during a product life cycle. Viability assessment has been defined in an IEEE transaction paper as the measure of the Producibility, Supportability, and Evolvability of a product. The underlying premise of viability assessment is that the economic well-being of a company is inextricably linked to the sustainability of products. Currently there is no connection between viability assessment and obsolescence risk and no way to measure the viability of a product. Companies today are forced to chose between various projects that are competing for resource bandwidth and funding, and require a consistent set of and methodology for determining viability factors to be considered during planning processes and to assist with project prioritization. Therefore, to improve viability, planning must be conducted on a proactive basis to increase productivity and efficiency as a metric to assist in viability product management.

Systems and methods for automatically determining and/or inferring component end of life (EOL)


Computational grids have traditionally not scaled effectively due to administrative hurdles to resource and user participation. Most production grids are essentially multi-site supercomputer centers, rather than truly open and heterogeneous sets of resources that can join and leave dynamically, and that can provide support for an equally dynamic set of users. Large-scale grids containing individual resources with more autonomy about when and how they join and leave will require self-organizing grid middleware services that do not require centralized administrative control. Dynamic discovery of high-performance variable-size clusters of grid nodes provides an effective solution for implementation of grids. A brute force approach to the problem of identifying these “ad-hoc clusters” would require excessive overhead in terms of both message exchange and computation. Therefore, a scalable solution is provided that uses a delay-based overlay structure to organize nodes based on their proximity to one another, using a small number of delay experiments. This overlay can then be used to provide a variable-size set of promising candidate nodes than can then be used as a cluster, or tested further to improve the selection. Simulation results show that this approach results in effective clustering with acceptable overhead.

Although a number of computational grids have begun to appear, truly large-scale "open" grids have not yet emerged or been successfully deployed. Current production grids comprise tens, rather than hundreds or thousands, of sites [1, 3]. The primary reason is that existing grids require resources to be organized in a structured and carefully managed way, one that requires significant administrative overhead to add and manage resources. This overhead is a significant barrier to participation, and results in grids comprising only large clusters and specialized resources; manually adding individual resources—especially if those resources are only intermittently available—becomes infeasible and unworthy of the effort required to do so.
An alternative model for constructing grids [4] lowers the barrier for resource and user participation by reducing various administrative requirements. In this Self-Organizing Grids (SOGs) model, resource owners would directly and dynamically add their resources to the grid. These resources may include conventional clusters that permanently participate in the grid, or that are donated by providers during off-peak hours. In addition, users may provide individual resources in much the same way that they add them to peer-to-peer networks and public resource computing projects such as SETI@home [2]. The grid would then consist of the currently participating resources. SOGs might contain different tiers of resources, ranging from always connected large clusters, to individual PCs in homes, down to small-scale sensors and embedded devices. Thus, SOGs represent the intersection of peer-to-peer computing, grid computing, and autonomic computing, and can potentially offer the desirable characteristics of each of these models.
Constructing grid services that can operate in, let alone take advantage of, such an environment requires overcoming a number of challenges and requires different algorithms and designs [4]. One of the primary challenges, namely how to automatically discover efficient clusters within SOGs, to enable effective scheduling of applications to resources in the grid has not been adequately addressed in the prior art.
A candidate collection of SOG nodes may not necessarily be a physical cluster of co-located machines under a single administrative domain connected by a high-speed network; but the nodes' proximity to one another—in terms of network connection performance characteristics—may allow them to serve as an ad hoc cluster to support some applications. A brute force approach to the problem of discovering ad hoc clusters would periodically test network performance characteristics between all pairs of resources in the grid. Clearly, this approach is not feasible for a large scale system; more scalable approaches are needed.
The need for clustering arises in P2P environments, where it has received significant research attention [8, 13, 5, 9]. In P2P environments, clusters are needed for scalability of document search and exchange. Clusters are created and maintained in a large and dynamic network, where neither the node characteristics nor the network topology and properties (such as bandwidth and delay of edges) are known a priori. To improve performance, cluster nodes must be close enough to one another, and must typically fulfill additional requirements such as load balancing, fault tolerance and semantic proximity. Some of these properties are also desirable for SOGs. However, the emphasis on proximity is much more important to SOGs, since the computational nature of grid applications may require close coupling. Further, to allow flexible application mapping, variable size clusters must be extractable; in contrast, the emphasis in P2P networks is usually on finding clusters of a single size.
Clustering in SOGs is more complicated than classical dominating set and center problems from graph theory, which are themselves known to be NP-complete. Simple strategies such as off-line decisions with global knowledge do not work because of the large scale and dynamic nature of the environment. Further, the importance of cluster performance (because of its intended use), along with the requirement to create variable size clusters, suggest the need for different solutions. An optimal solution that measures the quality of connections between all pairs of nodes, and that then attempts to extract the optimal partition of a given size, requires O(n2) overhead in the number of messages to measure the connections, and an NP-complete optimal clustering solution. Further, the dynamic nature of the problem in terms of the network graph and processor and network loads requires lighter weight heuristic solutions.
To support general large-scale parallel processing applications, SOGs must self-organize in a way that allows effective scheduling of offered load to available resources. When an application request is made for a set of nodes, SOGs should be able to dynamically extract a set of resources to match the request. Since these resources are often added separately and possibly by multiple providers, SOGs should be able to identify and track relationships between nodes. In addition, to support effective scheduling, the state of resources in the grid must be tracked at appropriate granularity and with appropriate frequency.
An important initial question is "What represents an effective cluster?" Clearly, the capabilities of the individual nodes are important. However, the influence of communication often has a defining effect on the performance of parallel applications in a computational cluster. Moreover, it is straightforward to filter node selection based on node capabilities, but it is much more challenging to do so based on communication performance, which is a function of two or more nodes.
Highways [8] presents a basic solution for creating clusters through a beacon-based distributed network coordinate system. Such an approach is frequently used as the basis for other P2P clustering systems. Beacons define a multidimensional space with the coordinates of each node being the minimum hop-count from each beacon (computed by a distance vector approach or a periodic beacon flood). Distances between nodes are measured as Cartesian distances between coordinates. Highways serves as the basis for several other clustering approaches. Shortcomings include the fact that the distance in the multi-dimensional space may not correspond to communication performance, that markers must be provided and maintained, and need to centrally derive the desired node clustering.
Agrawal and Casanova [5] describe a pro-active algorithm for clustering in P2P networks. They use distance maps (multi-dimensional coordinate space) to obtain the coordinates of each peer, and then use a marker space (not the same concept as in Highway) as the cluster leader by using the K-means clustering algorithm. The algorithm chooses the first marker (leader) randomly, then repeatedly finds a host of distance at least D from all current markers, and adds it into the marker set. Nodes nearest to the same marker are clustered together, and are split if the diameter becomes too large. This strategy results in message flooding and its associated high overhead.
Zheng et. al. [13] present T-closure and hierarchical node clustering algorithms. The T-closure algorithm is a controlled depth-first search for the shortest paths, based on link delay. Each node learns all shortest paths starting from itself, with distance not larger than T. The hierarchical clustering algorithm uses nomination to select a supernode within some specified distance. These two strategies require high overhead and do not support node departure.
Xu and Subhlok describe automatic clustering of grid nodes [9] by separating the clustering problem into two different cases. Their approach uses multi-dimensional virtual coordinates to cluster inter-domain nodes, and uses n2 direct measures to cluster intra-domain nodes. This strategy can classify existing nodes into clusters according to physical location, but cannot extract variable sized clusters according to user requirements.

Automatic clustering for self-organizing grids

The Research Foundation of State University of New York


A pipe well; a ground water outlet pipe inserted into the pipe well; a submerged pump installed at the ground water outlet pipe; a heat exchanger in which the ground water is circulated and terrestrial heat of the ground water is heat-exchanged; a collection pipe collects the ground water circulated through the heat exchanger into the pipe well; a connection pipe which connects the submerged pump and the heat exchanger; an auto temperature bypass apparatus which is installed at the connection pipe to automatically bypass the ground water from the connection pipe when a temperature of the ground water arrives at a predetermined value; a discharge pipe through which the ground water bypassed is discharged; and a ground water restoration hole adjacent to the pipe well in which the discharge pipe is inserted to fill up the ground water nearby.

1. Field of the Invention
The present invention relates to a ground water restoration type terrestrial heat exchanger using an auto temperature bypass apparatus; and, more particularly, to a ground water restoration type terrestrial heat exchanger using an auto temperature bypass apparatus, which uses terrestrial heat while preventing a depletion of ground water.
2. Description of Related Art
The ground water restoration type terrestrial heat exchanger is an apparatus which heat-exchanges terrestrial heat from ground water and uses the heat in air-conditioning.
In a conventional ground water restoration type terrestrial heat exchanger, the ground water in a pipe well is pumped up and circulated through the heat exchanger and then collected into the pipe well or consumed.
In case of collecting the circulated ground water into the pipe well, a temperature of the ground water circulated through the heat exchanger is changed, and thus it causes a change in a temperature of the ground water in the pipe well. As described above, if the temperature of the ground water in the pipe well is changed, the performance of the heat exchanger is deteriorated. Therefore, there is a problem that the heat exchanger should be operated at a predetermined regular time intervals. In other words, the predetermined time is required in that the temperature of the ground water in the pipe well returns to its original temperature. Especially, in case of circulating a large quantity of the ground water, much retuning time to the original temperature of the ground water is needed, and thus an operation efficiency of the heat exchanger is deteriorated.
In case of consuming the ground water, since the temperature of the ground water is not changed, it is possible to continuously operate the heat exchanger, but it is apprehended that the ground water is depleted.

Ground water restoration type terrestrial heat exchanger using auto temperature bypass apparatus

Korea Institute of Geoscience and Mineral Resources (KIGAM)


A Powder feeding system for feeding powder in a feed tank via a valve for powder downstream of the feed tank and through a powder delivery pipe, the Powder feeding system including: a powder fluidizing portion provided in the feed tank and configured to introduce fluidizing gas for fluidizing the powder; and a powder refluidizing portion provided between the powder fluidizing portion and the valve for powder and configured to introduce refluidizing gas for refluidizing the powder.

Combustion furnaces for burning pulverized fuel such as pulverized coal fed from Powder supply apparatus is known as combustion furnaces used in blast furnace facilities, thermal power plants, and the like. In such a combustion furnace, pulverized fuel is sprayed thereinto together with air and burnt therein. Such a burning method using pulverized coal is widely used because coal itself is highly combustible.
A gas-carried Powder supply apparatus that conveys pulverized fuel with carrier gas is known as a Powder supply apparatus for supplying pulverized fuel to the combustion furnace. In such a Powder supply apparatus, pulverized fuel in a feed tank is fed to a powder delivery pipe and conveyed by the carrier gas therein. The supply rate of the pulverized fuel into the powder delivery pipe may be controlled according to the aperture of a valve for powder provided near an outlet in a bottom portion of a feed tank.
In addition, in order to allow powder to be easily fed from the feed tank to outside thereof, a Powder supply apparatus in which fluidizing gas is introduced into a feed tank and powder in the feed tank is fluidized by the fluidizing gas is known.
In a Powder supply apparatus disclosed in Patent Document 1 listed below, fluidizing gas is introduced into a feed tank as mentioned above and fluidized powder is fed from the feed tank. The supply rate of the fluidized powder is controlled according to the aperture of a valve for powder as described above.

Powder supply apparatus and powder supply method


The new cultivar maintains a controlled growth habit and is very heat tolerant. The petals are medium pink at the edges and white in the middle with a dark burgundy eye.

The present invention comprises a new and distinct cultivar of Pelargonium.times.domesticum known by the name `Debutante` (Breeder No. 92-26-3). The new cultivar was discovered in an organized, scientifically designed breeding program at the Department of Horticulture, The Pennsylvania State University, University Park, Pa. on Mar. 26, 1992. The breeding program was designed to create new Regal Pelargonium cultivars with clear, bright flower colors, excellent propagation characteristics, compact growth habit, predictable and consistent flowering response and good postharvest quality. The new cultivar is a selection from the crossing of the commercial cultivar `Allure`, U.S. Plant Pat. No. 7,467, and the commercial cultivar `Fantasy`, U.S. Plant Pat. No. 7,538. The new cultivar was first asexually reproduced by cuttings at The Pennsylvania State University and subsequently at Oglevee, Ltd., 152 Oglevee Lane, Connellsville, Pa. Trials were conducted over three years in the greenhouse plus garden trials. It has been found to retain its distinct characteristics through successive propagations.
The new cultivar exhibits a medium pink flower color distinct from the parentage and has better heat resistance than the parentage. The foliage and growth habit are intermediate between those of the parent plants.
The new cultivar, when grown in a glass greenhouse in Connellsville, Pa. using full light, 60.degree. F. night temperature, 68.degree. F. day temperature, and grown in a soilless media with constant fertilizer of 150-200 parts per million nitrogen and potassium, has a response time of fourteen weeks from a rooted cutting to a flowering plant in a 6 inch pot.

Regal Pelargonium plant named `Debutante`


Described are systems and methods for detecting objects using calibrated imaging devices and obfuscating, in real-time or near real time, portions of the video data to protect the privacy of operators represented in the video data. For example, a position of an operator within a fulfillment center may be determined or tracked in video data and the pixels representative of that operator may be obfuscated using pixilation and/or other techniques so that a reviewing agent that is viewing the video data cannot determine the identity of the operator. Such obfuscation may be performed in real-time or near real-time using automated processing. In addition, only portions of the video data may be obfuscated so that events (e.g., item picks, item place) and/or other objects represented in the video data are still viewable to the reviewing agent.

Today, the use of imaging devices such as digital video cameras for monitoring operations is widespread. For example, digital video cameras are often used to monitor the arrivals or departures of goods or the performance of services in materials handling facilities such as warehouses, fulfillment centers, retail establishments or other like facilities, as well as the travels of persons or objects in locations such as airports, stadiums or other dense environments, or the flow of traffic on one or more sidewalks, roadways or highways. Video cameras are also frequently installed in financial settings such as banks or casinos, where money changes hands in large amounts, at high rates of speed, or between large numbers of people.
While videoing facilities for monitoring is helpful, it presents privacy concerns for individuals at those facilities. Generated video data is often monitored by security and/or other human personnel for a variety of reasons. Currently, such video data may be viewed, and persons or other objects represented in the video data may be identified from the video data. While personnel that are authorized to monitor the video data may be instructed to not store the video data, comment on persons or objects represented in the videos, etc., there remains a risk that the privacy or identity of persons represented in the image data may be exposed.


An ionizing system includes a channel having an inlet disposed in a first pressure region and an outlet disposed in a second pressure region, a pressure of the first pressure region being greater than a pressure of the second pressure region. A heater is coupled to the channel and configured to heat the channel. A device is configured to introduce an analyte into the channel where the analyte is ionized.

Mass spectrometry is an analytical technique used to determine the elemental composition of a sample or molecule and is used in a wide variety of applications including trace gas analysis, pharmocokinetics, and protein characterization, to name a few. Mass spectrometry techniques typically include the ionizing of chemical compounds to generate charged molecules or molecule fragments in order to measure the mass-to-charge ratios. Ion mobility spectrometry measures the drift times of ions which is influenced by the size (shape) and charge of the ions.
Various methods have been developed to ionize samples or molecules. For example, electrospray ionization ("ESI") produces charged droplets of the solvent/analyte from a liquid stream passing through a capillary onto which a high electric field is applied relative to a counter electrode. The charged droplets are desolvated (evaporation of the solvent, but not the charge) until the Raleigh limit is reached in which the charge repulsion of like charges exceeds the surface tension of the liquid. Under these conditions so called "Taylor cones" are formed in which smaller droplets are expelled from the parent droplet and carry a higher ratio of charge to mass than the parent droplet. These prodigy droplets can undergo this same process until eventually ions are expelled from the droplet due the high-repulsive field (ion evaporation mechanism) or the analyte ions remain after all the solvent evaporates.
Another ionization process called sonic spray ionization ("SSI") has also been developed. In SSI, a high velocity of a nebulizing gas is used to produce charged droplets instead of an electric field as used in ESI.
However, these conventional methods of ionizing a solution with an analyte require an electric field or a high velocity gas, which increase the complexity and cost of the spectrometry system. The above methods also involve producing ions at or near atmospheric pressure and transferring them through a channel to a lower pressure for mass analysis, which is an inefficient process.
An ionization method is matrix assisted laser desorption/ionization ("MALDI"). In MALDI, a laser ablates analyte that is incorporated into a matrix (small molecule that absorbs radiation from the laser) which produces mostly singly charged ions that are mass analyzed. More recently, an ionization method called laserspray ionization ("LSI") was discovered that produces ions of very similar charge states as ESI, but by laser ablation of a solid matrix/analyte mixture. This method is similar to MALDI in that laser ablation of a matrix initiates the process, but is similar to ESI in that multiply charged ions are observed.

System and method for ionization of molecules for mass spectrometry and ion mobility spectrometry

University of the Sciences in Philadelphia