A hydration system includes fuel cell fluid flow plate(s) and injection port(s). Each plate has flow channel(s) with respective inlet(s) for receiving respective portion(s) of a given stream of reactant fluid for a fuel cell. Each injection port injects a portion of liquid water directly into its respective flow channel in order to mix its respective portion of liquid water with the corresponding portion of the stream. This serves to hydrate at least corresponding part(s) of a given membrane of the corresponding fuel cell(s). The hydration system may be augmented by a metering system including flow regulator(s). Each flow regulator meters an injecting at inlet(s) of each plate of respective portions of liquid into respective portion(s) of a given stream of fluid by corresponding injection port(s).

A Proton Exchange Membrane ("PEM") fuel cell converts the chemical energy of fuels such as hydrogen and oxidizers such as air/oxygen directly into electrical energy. The PEM is a solid polymer electrolyte that permits the passage of protons (H.sup.+ ions) from the "anode" side of a fuel cell to the "cathode" side of the fuel cell while preventing passage therethrough of the hydrogen and air/oxygen gases. Some artisans consider the acronym "PEM" to represent "Polymer Electrolyte Membrane." The direction, from anode to cathode, of flow of protons serves as the basis for labeling an "anode" side and a "cathode" side of every layer in the fuel cell, and in the fuel cell assembly or stack.
For instance, the PEM can be made using a polymer such as the material manufactured by E. I. Du Pont De Nemours Company and sold under the trademark NAFION.RTM.. Further, an active electrolyte such as sulfonic acid groups is included in this polymer. Also, the PEM is available as a product manufactured by W.L. Gore & Associates (Elkton, Md.) and sold under the trademark GORE-SELECT.RTM.. Moreover, a catalyst such as platinum which facilitates chemical reactions is applied to each side of the PEM. This unit is commonly referred to as a membrane electrode assembly ("MEA"). The MEA is available as a product manufactured by W.L. Gore & Associates and sold under the trade designation PRIMEA 5510-HS.
An individual fuel cell generally has multiple, transversely extending layers assembled in a longitudinal direction. In the fuel cell assembly or stack, all layers that extend to the periphery of the fuel cells have holes therethrough for alignment and formation of fluid manifolds. Further, gaskets seal these holes and cooperate with the longitudinal extents of the Layers for completion of the fluid manifolds. As is well-known in the art, some of the fluid manifolds distribute fuel (e.g., hydrogen) and oxidizer (e.g., air/oxygen) to, and remove unused fuel and oxidizer as well as product water from, fluid flow plates of each fuel cell. Furthermore, other fluid manifolds circulate water for cooling.
As is well-known in the art, the PEM can work more effectively if it is wet. Conversely, once any area of the PEM dries out, the fuel cell does not generate any product water in that area because the electrochemical reaction there stops. Undesirably, this drying out can progressively march across the PEM until the fuel cell fails completely.
Traditionally, attempts have been made to introduce water into the PEM by raising the humidity of the incoming reactant gases. That is, the fuel and oxidizer gases are often humidified with water vapor before entering the fluid manifolds in order to convey water vapor for humidification of the PEM of the fuel cell.
However, problems can result from the use of water vapor in humidification of the reactant gases. For example, significant quantities of heat are required in order to saturate the reactant gas stream at a temperature close to the temperature of the fuel cell. In particular, one cannot just employ waste heat from a cell cooling circuit, because the temperature will necessarily be lower than the cell temperature. Furthermore, temperature variations within the reactant gas manifolds and fuel cell plate channels can undesirably lead to condensation of the vapor and poor distribution of the reactant gas and vapor/water.
Moreover, vapor distribution is unpredictable. So, despite the introduction of water vapor into the gas stream at the inlet of a longitudinal fluid manifold, drying out of the PEMs can still occur. These drying problems of the fuel cell assembly can become severe at high power levels.
Deleterious effects can also result from turns in the flow path of a stream which is a mixture of water droplets and reactant gas. After the stream goes around a given curve, separation of the water from the reactant gas occurs. Anytime the stream changes direction and/or velocity, the various settling rates yield separation. Therefore, by the time the stream reaches the end of such a flow path, most of the liquid will have settled out. Similar problems and unpredictability can result in any unconstrained flow of water mixed with reactant gas.
Naturally, fuel cells within the same assembly or stack can have varying efficiencies. In particular, some fuel cells generate more heat than others. A fuel cell running hot will require more water in order to function. If a fuel cell assembly delivers inadequate moisture to a given fuel cell, then the PEM of that fuel cell begins to dry out, which causes it to run hotter still since the remaining fuel cells in the assembly continue to force high current therethrough. When the PEM of a fuel cell completely dries out, that fuel cell begins to dry out any adjacent fuel cells. Accordingly, it is desirable to deliver water to all the fuel cells in the stack.
Additional problems stem from height variations in different areas of an individual fuel cell and the fuel cell assembly. For example, one can consider a fuel cell assembly that is angled and sloping upward from its entry end of a longitudinal reactant fluid supply manifold. There, the mere injection of water at the entry of the manifold into the fuel cell assembly would undesirably result in fuel cells on the low end receiving all water and no gas ("PEM flooding"), and fuel cells on the high end receiving all gas and no water ("PEM starvation").
In one prior art attempt to address some of the problems outlined above, a system is designed so various waters cool the fuel cells in a stack and hydrate their respective PEMs. A hydrogen gas stream is delivered to each anode plate. Injection ports from a water line mix liquid water into a given hydrogen gas stream before it arrives at an anode plate. The number of injection ports determines the amount of water injected into the gas stream, which thereafter flows to the anode plate. Nevertheless, there is no guarantee that every flow channel of the anode plate will obtain from the humidified gas stream adequate water for hydration of its part of the PEM. Furthermore, the possibility of uneven delivery of water among flow channels represents a potential waste in the system. Such a design is disclosed in U.S. Pat. No. 4,769,297 to Reiser et al. (entitled "Solid Polymer Electrolyte Fuel Cell Stack Water Management System," issued Sep. 6, 1988, and assigned to International Fuel Cells Corporation).
Thus, a need exists for ensuring effective, efficient, and continuous supply of water to all active areas of a membrane of an individual fuel cell. A further need exists for ensuring all active areas of each membrane in a working section of a fuel cell assembly effectively and efficiently receive adequate water.

Fuel cell membrane hydration and fluid metering


The present invention discloses a data driving method, the method including receiving data corresponding to a plurality of pixels. Received data are converted into data voltages of an analog type to be output to a plurality of data lines. One of a first data voltage and a last data voltage of the data voltages is output to a dummy data line adjacent to the data lines.

Field of the Invention
The present invention relates to a method of driving data, a data drive circuit for performing the method, and a display apparatus having the data drive circuit.
Discussion of the Background
A liquid crystal display (LCD) apparatus may include an LCD panel, a printed circuit board (PCB) including a drive chip driving the LCD panel, source tape carrier packages (TCPs) including source drive chips, and gate TCPs including gate drive chips. The TCPs electrically connect the LCD panel with the PCB.
A gate-integrated circuit-less (GIL) structure, in which the gate TCPs have been removed and the gate drive circuit is directly formed on the LCD panel, has been developed and applied in the LCD apparatus as a solution for reducing the size and manufacturing costs thereof.
Additionally, a structure in which different color pixels are connected to one source line for reducing the number of source drive chips, that is, a horizontal pixel structure, may be employed. The horizontal pixel structure may be formed, in which a long side of the structure is formed in the horizontal direction of each of red, green, and blue pixels and a short side of the structure is formed in the vertical direction of each of red, green, and blue pixels.
When the horizontal pixel structure is employed, the red, green, and blue pixels may be connected to the same source line so that the pixels are respectively driven while dividing a horizontal period (1H) into 1/3H, thereby reducing the number of the source lines by 1/3.
A column inversion driving method may be used, in which different polarity data voltages are applied to adjacent source lines to compensate for a reduced charging time in the horizontal pixel structure and reduce power consumption. In addition, a different structure may be used, in which pixels are alternately connected in the column to adjacent source lines for acquiring a dot inversion effect through the column inversion driving method.

Method for driving data, data drive circuit for performing the method, and display apparatus having the data drive circuit


Apparatus and method are disclosed for converting an internal combustion engine from a normal engine operation (20) to an engine braking operation (10). The engine includes exhaust valve train components comprising at least one exhaust valve (300) and at least one cam (230) for cyclically opening and closing the at least one exhaust valve (300). The apparatus comprises actuation means (100) having at least one component integrated into at least one of the exhaust valve train components, such as a rocker arm (210) or a valve bridge (400). The actuation means (100) has an inoperative position and an operative position. In the inoperative position, the actuation means (100) is retracted and the small braking cam lobes (232 & 233) are skipped to generate a main valve lift profile (220m) for the normal engine operation (20). In the operative position, the actuation means (100) is extended to form a mechanical linkage so that the motion from all the cam lobes (220, 232 & 233) is transmitted to the at least one exhaust valve (300) for the engine braking operation (10). The apparatus further comprises control means (50) for moving the actuation means (100) between the inoperative position and the operative position to achieve the conversion between the normal engine operation (20) and the engine braking operation (10). The apparatus also includes valve lash adjusting mechanism, oil retraining means (350), and engine brake reset means (150).

1. Field of Invention
The present invention relates generally to the braking of an internal combustion engine, specifically to engine braking apparatus integrated in the engine exhaust valve train.
2. Prior Art
It is well known in the art to employ an internal combustion engine as brake means by, in effect, converting the engine temporarily into a compressor. It is also well known that such conversion may be carried out by cutting off the fuel and opening the exhaust valve(s) at or near the end of the compression stroke of the engine piston. By allowing compressed gas (typically, air) to be released, energy absorbed by the engine to compress the gas during the compression stroke is not returned to the engine piston during the subsequent expansion or "power" stroke, but dissipated through the exhaust and radiator systems of the engine. The net result is an effective braking of the engine.
An engine brake is desirable for an internal combustion engine, particularly for a compression ignition type engine, also known as a diesel engine. Such engine offers substantially no braking when it is rotated through the drive shaft by the inertia and mass of a forward moving vehicle. As vehicle technology has advanced, its hauling capacity has increased, while at the same time rolling and wind resistances have decreased. Accordingly, there is a heightened braking need for a diesel-powered vehicle. While the normal drum or disc type wheel brakes of the vehicle are capable of absorbing a large amount of energy over a short period of time, their repeated use, for example, when operating in hilly terrain, could cause brake overheating and failure. The use of an engine brake will substantially reduce the use of the wheel brakes, minimize their wear, and obviate the danger of accidents resulting from brake failure.
There is also a desire to use an engine brake when shifting gears in the gearbox of the vehicle. This is apt to be an even more important aspect in commercial vehicles such as trucks and buses that are ever more frequently equipped with automatic or semi-automatic gearboxes. Such gearboxes can be likened to conventional manual gearboxes, with the difference being that the shifting of gears is carried out by means of a control device, instead of manually by the driver. In order to reduce loss of driving power of the engine during up-shift, it is an advantage if the engine speed can be matched to the new gear ratio as soon as possible. It is known to selectively introduce an engine brake during an up-shift when certain operating parameters are obtained, in order to achieve a rapid decrease of engine speed during the gear shifting process. In this way, it is alleged that wear on the engine brake system is decreased since the introduction of the engine brake only takes place during a small part of the total amount of the up-shift process.
There are different types of engine brakes. Typically, an engine braking operation is achieved by adding an auxiliary engine valve event called an engine braking event to the normal engine valve event. Depending on how the engine valve event is produced, an engine brake can be defined as:                (a) Type I engine brake—the engine braking event is produced by importing motions from a neighboring cam, which generates the so called Jake brake;        (b) Type II engine brake—the engine braking event is produced by altering existing cam profile, which generates a lost motion type engine brake;        (c) Type III engine brake—the engine braking event is produced by using a dedicated cam for engine braking, which generates a dedicated cam (rocker) brake;        (d) Type IV engine brake—the engine braking event is produced by modifying the existing engine valve lift, which normally generates a bleeder type engine brake;        (e) Type V engine brake—the engine braking event is produced by using a dedicated valve train for engine braking, which generates a dedicated valve (the fifth valve) engine brake.
The engine brake can also be divided into two big categories, i.e., the compression release engine brake (CREB) and the bleeder type engine brake (BTEB). Here, the focus is the compression release engine brakes.
Conventional compression release engine brakes open the exhaust valve(s) at or near the end of the compression stroke of the engine piston (also known as top dead center or TDC). They typically include hydraulic circuits for transmitting a mechanical input to the exhaust valve(s) to be opened. Such hydraulic circuits typically include a master piston that is reciprocated in a master piston bore by a mechanical input from the engine. Hydraulic fluid in the circuit transmits the master piston motion to a slave piston in the circuit, which in turn, reciprocates in a slave piston bore in response to the flow of hydraulic fluid in the circuit. The slave piston acts either directly or indirectly on the exhaust valve(s) to be opened during the engine braking.
An example of a prior art CREB is provided by the disclosure of Cummins, U.S. Pat. No. 3,220,392, which is hereby incorporated by reference. Engine braking systems based on the patent have enjoyed great commercial success. However, the prior art engine braking system is a bolt-on accessory that fits above the overhead. In order to provide space for mounting the braking system, a spacer may be positioned between the cylinder head and the valve cover that is bolted to the spacer. This arrangement may add unnecessary height, weight, and costs to the engine. Many of the above-noted problems result from viewing the braking system as an accessory to the engine rather than as part of the engine itself.
As the market for compression release-type engine brakes (CREB) has developed and matured, there is a need for design systems that reduce the weight, size and cost of such retarding systems, and improve the inter-relation of various ancillary equipments, such as the turbocharger and the exhaust brake with the retarding system. In addition, the market for compression release engine brakes has moved from the after-market, to original equipment manufacturers. Engine manufacturers have shown an increased willingness to make design modifications to their engines that would increase the performance and reliability and broaden the operating parameters of the compression release-type engine brake.
(a) Earlier Integrated Rocker Brake
One possible solution is to integrate components of the braking system with the rest of the engine components. One attempt at integrating parts of the compression braking system is found in U.S. Pat. No. 3,367,312 to Jonson, which discloses an engine braking system including a rocker arm having a plunger, or piston, positioned in a cylinder integrally formed in one end of the rocker arm wherein the plunger can be locked in an outer position by hydraulic pressure to permit braking system operation. Jonson also discloses a spring for biasing the plunger outward from the cylinder into continuous contact with the exhaust valve to permit the cam-actuated rocker lever to operate the exhaust valve in both the power and braking modes. A control valve is used to control the flow of pressurized fluid to the rocker arm cylinder so as to permit selective switching between braking operation and normal power operation.
However, the control valve unit of Jonson's compression braking system is positioned separately from the rocker arm assembly, resulting in unnecessarily long fluid delivery passages and a longer response time. This also leads to an unnecessarily large amount of oil that must be compressed before activation of the braking system can occur, resulting in large compliance and less control over the timing of the compression braking. Moreover, the control valve is a manually operated rotary type valve requiring actuation by the driver often resulting in unreliable and inefficient braking operation. Also, rotary valves are subject to undesirable fluid leakage between the rotary valve member and its associated cylindrical bore.
(b) Integrated Rocker Brake with Two-Valve Opening for Engine Braking
Another integrated engine braking system for commercial vehicles is known from U.S. Pat. No. 5,564,385 ("the '385 patent") in which a stroke-limited hydraulic piston is arranged at the operating end of a rocker arm for taking up valve play in the valve mechanism of the engine. A pressure regulating valve is utilized for supplying pressurized oil to the hydraulic piston for taking up valve play in the rocker arm. The oil is supplied to the rocker arm by means of a canal, which is provided with an exhaust in the shape of a very narrow hole through which oil can flow, and in this way be made to affect the valve body to, depending on operation, be positioned in any of the predetermined positions. For this purpose, the control valve is also provided with an adjustable magnet valve arranged for drainage of oil that has been fed through the narrow hole.
Although the engine brake system disclosed in the '385 patent has enjoyed considerable commercial success, it has some drawbacks. One of the drawbacks is that it includes a small and carefully defined hole for the transport of oil, which causes a high sensitivity to clogging and tolerances. In addition, this previously known valve causes a relatively slow coupling and de-coupling, which is particularly noticeable in connection with gear shifting. Also, the design is sensitive to external disturbances, for example in the form of temperature changes and pollution such as, for example, dirt particles or coatings.
Another drawback is related to the hydraulic actuation of the engine brake system, which inherits with high compliance. High compliance leads to large valve lift deflection, which leads to increased valve load. And increased valve load leads back to higher compliance. In order to reduce hydraulic compliance, the hydraulic piston must be designed with a large diameter. The large diameter hydraulic piston takes a long time to attain its extended position. Therefore the system taught by the '385 patent is not suitable for use in reducing engine speed at an up-shift.
Another problem with such prior art engine brakes is that the normal operation of the exhaust valve is affected during brake operation. Clearance between the cam follower and camshaft is effectively reduced during brake operation. This means that the first lobe on the camshaft opens the exhaust valve further than normal for the exhaust stroke during engine brake operation. In some cases it is necessary to provide recesses in the pistons so that the exhaust valves do not strike the pistons when the brake is operational. These recesses, and the abnormally extended exhaust valves, interfere with optimal engine design from the point of view of other considerations such as emission controls.
An additional disadvantage of the know arrangement is that it does not have an easy way or a proper lash adjusting means to set the valve lash.
(c) Integrated Rocker Brake with One-Valve Opening for Engine Braking
Instead of opening two exhaust valves during engine braking, U.S. Pat. No. 6,234,143 ("the '143 patent") discloses an integrated rocker brake with one-valve opening for engine braking. An engine brake actuator is disposed in the rocker arm between the pivot point and the distal end. The rocker arm and the valve bridge of the engine are so arranged that the hydraulic or braking piston of the brake actuator is able to actuate on the inner valve near the pivot point of the rocker arm. By actuating only one exhaust valve, the engine braking load is greatly reduced.
The integrated engine brake system, however, has the following drawbacks. First, after the braking valve is lifted by the brake piston, the valve bridge is tilted and the followed normal valve actuation on both the braking valve and non-braking valve by the rocker arm is asymmetric or unbalanced. Large side load could be experienced on both valve stems or on the valve bridge guide if the bridge is guided. Second, the brake system can only fit on a particular type of engines that have the "parallel" arrangement of the rocker arm and the valve bridge.
(d) Integrated Rocker Brake with Reset Valve
U.S. Pat. No. 6,253,730 ("the '730 patent") discloses an integrated rocker brake with a reset valve trying to avoid the asymmetric loading on the valves or the valve bridge caused by the engine braking operation as disclosed by the '143 patent. The reset valve will reset or retract the hydraulic piston in the rocker arm before the braking valve reaches its peak braking lift so that the braking valve will return back to its seat before the main valve lift event starts, and the rocker arm can act on the leveled valve bridge and open both the braking valve and the non-braking valve without any asymmetric loading.
However, resetting the braking valve lift around the compression TDC is very problematic. First, the duration and magnitude of the valve lift for engine braking is very small and even smaller for resetting. Second, the resetting happens at around the peak engine braking load and causes high pressure or large load on the reset valve. The timing for the resetting is critical. If the resetting happens too soon, there will be too much braking valve lift loss (lower lift and earlier closing) and lower braking performance. If the resetting happens too late, the braking valve will not be able to close before the main valve event starts and cause asymmetric loading. Therefore, the integrated rocker engine brake according to the '730 patent may not work well at high engine speeds when the reset duration and height is extremely small and the braking load or pressure on the reset valve is very high.
It is clear from the above description that the prior-art engine brake systems have one or more of the following drawbacks:
(a) The system can only be installed on a particular type of engines.
(b) The system has slow response (on & off) time.
(c) The system is hydraulically driven and has large compliance resulting in high braking load.
(d) The system causes asymmetric loading on valves or valve bridge guide.
(e) The system has too many parts, high complexity, and not work well at high engine speeds.
(f) The system has no easy way to set lash for engine braking valves.
(g) The system is not reliable and sensitive to external disturbances.
(h) The system affects normal engine performance (efficiency and emission).

Integrated engine brake with mechanical linkage


A voltage pump circuit for precharging/pumping a charge to/from a pumping capacitor separately employs a voltage generator for independently supplying a well-bias voltage to a PMOS transfer transistor which transfers a charge of a precharged capacitor to produce reference voltage. The voltage of the voltage generator is applied to a well of the PMOS transfer transistor to body bias the PMOS transfer transistor and, thus, ruggedize its threshold voltage transistor. Here, the well-bias voltage equals or exceeds the reference voltage while being approximately twice a power source voltage. The well-bias voltage generator includes a non-overlap control circuit for receiving a pulse signal as an input to generate two pulse signals having different points of changing into high and low states, a second pumping capacitor, first, second and third bootstrap capacitors, a precharge circuit for precharging the voltage on the second pumping capacitor and first and second bootstrap capacitors for a predetermined period, a first step control circuit for controlling a first-step transistor, a second step control circuit for controlling a second-step transistor and a pumping control circuit for controlling a third-step transistor, which are provided for precharging the voltage to the third bootstrap capacitor, and a transfer transistor having a gate connected to the reference voltage of the third bootstrap capacitor for transferring the well-bias voltage.

The present invention relates to a voltage pump circuit having an independent well-bias voltage, and more particularly to a pump circuit, wherein, in a pump circuit using a PMOS transistor as a transfer transistor, well-bias is applied to the transfer transistor with an independent voltage to allow for a stable pumping operation.
A conventional voltage pump circuit was disclosed in a thesis entitled: "Application of a High Voltage Pumped Supply for Low-power DRAM", R. C. Foss et al., 1992 Symposium on VLSI Circuits Digest of Technical Papers, pages 106-107, 1992.
One example of the conventional voltage pump circuit is illustrated in FIG. 1, which includes a level shifter 10 for controlling a gate of a transfer transistor MP4 with voltages of a ground voltage Vss and a boosted voltage Vpp, and a non-overlap circuit 20 for blocking an overlapping of a pumping time and a charge transfer time. In addition, a voltage pumping section 30, for pumping the voltage while precharging/pumping a charge to/from a pumping capacitor, is provided.
Level shifter 10 is formed such that a gate of PMOS transistor MP1 is supplied indirectly with boosted voltage Vpp via a drain of PMOS transistor MP2. The boosted voltage Vpp is directly connected to a source of a PMOS transistor MP2. A gate of PMOS transistor MP2 is indirectly supplied with boosted voltage Vpp via the drain of the transistor MP1. The source of the PMOS transistor MP1 is directly connected to Vpp. The drain of PMOS transistor MP1 is also indirectly connected to ground potential Vss via two NMOS transistors MN1 and MN2, and a drain of PMOS transistor MP2 is also indirectly connected to ground potential Vss via two NMOS transistors MN3 and MN4. Gates of NMOS transistors MN2 and MN3 are supplied with an internal power source Vint. A gate of NMOS transistor MN1 is connected to an input pulse OSC via an inverter INV1. Input pulse OSC is directly connected to a gate of NMOS transistor MN4.
By this construction, when input pulse OSC is high, the boosted voltage level Vpp is obtained at the drain of PMOS transistor MP1, and the ground potential Vss is obtained at the drain of PMOS transistor MP2. If input pulse OSC is low, the ground potential Vss is obtained at the drain of PMOS transistor MP1, and the boosted voltage level Vpp is obtained at the drain of PMOS transistor MP2.
Non-overlap circuit 20 includes a NAND gate, a NOR gate and an inverter INV2 such that either one of two inputs of the NAND gate is connected with pulse input OSC, and the other input is connected with the drain of PMOS transistor MP1 of level shifter 10. Then, either one of two inputs of the NOR gate is connected with pulse input OSC, and the other input is connected to the drain of PMOS transistor MP2 of level shifter 10 via inverter INV2.
Voltage pumping section 30 includes a pumping capacitor C1, and a PMOS transistor MP3 having a drain connected to a first electrode of pumping capacitor C1 at node A, a source connected to power source Vdd and a gate connected to an output of the NAND gate of non-overlap circuit 20 at a node C. Also, a PMOS transistor MP4, having a drain connected to a second electrode of pumping capacitor C1 at a node B, a source connected to boosted voltage Vpp and a gate connected to a drain of PMOS transistor MP2 of level shifter 10, is provided. An NMOS transistor MN7 has a drain connected to the second electrode of pumping capacitor C1 at the node B, a source connected to power source Vdd, a gate connected to the output of the NAND gate of non-overlap circuit 20 at the node C. In addition to these, an NMOS transistor MN5 has a drain connected to the first electrode of pumping capacitor C1 at the node A, a gate connected to internal power source Vint, and a source connected to a drain of an NMOS transistor MN6. The NMOS transistor MN6 also has a source connected to ground potential Vss and a gate connected to an output of the NOR gate of non-overlap circuit 20 at a node D.
As shown in timing charts of FIG. 2, an operation the conventional pump circuit is classified into two steps of precharging the pumping capacitor C1 and pumping (or discharging) the precharged pumping capacitor.
First, in the precharge step, when the OSC signal is in the "low" state, both a node C being the output terminal of the NAND gate and a node D being the output terminal of the NOR gate go to the "high" state. Thus, NMOS transistors MN5, MN6 and MN7 are turned on to allow a node A to be the Vss level and a node B is charged to Vdd-V.sub.T which is low, i.e., less than V.sub.T of NMOS transistor MN7.
After the precharge is performed as described above, the pumping step is performed successively. When the OSC signal goes to the "high" state, and node C (being the output terminal of the NAND gate) and node D (being the output terminal of the NOR gate) go to the "low" state. Thus, NMOS transistors MN6 and MN7 are turned off, so that node A is in the floating state and instantaneously goes to the Vdd level together with the turning on of the PMOS transistor MP3. Consequently, the level of node B is raised by an amount Vdd to be 2 Vdd-V.sub.T. The NMOS transistor MN4 is turned on to apply the Vss level to the gate of PMOS transistor MP4 which, in turn, is turned on to raise the voltage of node B to the Vpp node.
While the pumping capacitor repeats the precharge and pumping via the above-described operation, the operation of raising the charge from the low potential level to the high potential level is continuously carried out.
In almost all semiconductor memory devices, a redundancy decoder is provided for using an additional cell when a word line is shorted out to the ground voltage Vss, thereby repairing the semiconductor chip. However, when such a word line (which had been shorted out to the Vss) has been inspected during an initial test of such a repaired chip using the foregoing conventional pump circuit, the Vpp level is lower than Vdd-V.sub.T. Consequently, a PN junction is forward-biased in the transfer transistor MP4, so that the transfer transistor MP4 cannot be operated as a transistor. The shorted-out state of the PN junction of the transfer transistor MP4 is continued, making it impossible to recover to normal operation.
Therefore, the shorted-out state of the PN junction of the transfer transistor MP4 causes electric power to be greatly dissipated and the Vpp level to not recover. Consequently, the semiconductor chip must be treated as being defective, thereby degrading production yield.

Voltage pump circuit having an independent well-bias voltage


The subject invention relates to systems and methods that facilitate automatic version level updates of driver components in the context of an operating system framework. In one aspect, an automated computer versioning system is provided. The system includes a version library supplying various components of an operating system framework, wherein the version library defines revision levels and interfaces for the components of the operating system framework. A loader automatically distributes the interfaces in order to facilitate functional interactions with the operating system framework, whereby such distribution of the interfaces is based in part on a change in the revision levels.

Operating system platforms have enabled the rapid growth of various technologies that are developed on such systems. Many of these platforms along with running many differing applications for developing the technologies also have become much easier to use when adding components such as hardware devices and associated drivers to the systems. For instance, in one area, some systems allow hardware or software components to be installed on the respective platforms, whereby these components in essence can be plugged into the system with a high degree of confidence that they will also cooperate with the system and other devices/components that have been previously installed. One common name for such technology is referred to as Plug and Play technology which enables devices or components to be easily integrated within an existing system.
Plug and Play technology generally relates to when a computer system automatically recognizes new devices and determines what driver software, resource settings, and so forth the device needs with very little or no interaction from the user. This technology also will typically only load a driver if it is needed since the hardware is currently detected as present. A driver is a software component that resides in between the operating system and the hardware and allows the operating system to communicate with the hardware. In some operating systems, "drivers" are software modules that can be inserted into an operating system kernel, allowing for support of specific hardware or for extension of the operating system or both. Generally, drivers run in a fully trusted mode, whereby any failure in these components can cause machine services to fail, or a full system crash. Thus, any successful effort to make drivers more resilient or fault tolerant usually causes greater system reliability and consequently customer satisfaction to increase.
One of the barriers to greater driver resilience is that a driver typically has to respond to many "events" generated by the operating system which may require the driver to initiate operations which can fail. For example, these events may be file handle creation, device insertion, power being turned off, statistics gathering, and so forth. Most of the time, the exact action that a driver should take in response to an internal failure is poorly defined. This is partly due to the operating system not always being designed to handle every conceivable set of failures, partly due to external documentation not covering every situation and partly due to certain failures that involve a large amount of judgment on the part of the driver designer. Furthermore, drivers are often constructed internally as large "state machines" wherein a response to an event can depend largely on which events have occurred in the past. After a failure occurs, the driver designer often has to immediately turn around and handle new events, even though the failure probably implies that new events are likely to fail as well.
In many situations, when bugs are discovered (or new features added) in drivers and their associated operating system components, software revisions are routinely sent out overtime to correct such problems. In many cases, the revisions can be downloaded over the Internet with a few "mouse clicks." Currently, the drivers and operating system components exist in a tightly-coupled relationship. In other words, if a bug were discovered in the operating system components with no fault to the driver, and a revision were to be required of the operating system, then in many cases, both the operating system and the driver would need to be updated. This type of arrangement is highly inefficient however. While the drivers may be perfectly operational and bug free, they should not have to necessarily be upgraded merely due to problems that have been detected in other portions of the system. Conversely, if a particular driver problem is discovered, new revisions propagated to the driver should have minimal impact on the rest of the system.

Versioning support for drivers frameworks


An article carrier formed from a rectangular sheet made of flexible, foldable material folded along a midline of the longer sides of the sheet forming first and second sides having inner and outer faces, a plurality of cooperating adjustable length fasteners attached to juxtaposed surfaces at spaced apart locations on each of the three free edges of the sides of the carrier such that when the adjustable fasteners are joined together, a carrying space is formed between the sides of the carrier. A plurality of article carriers are arrayed across the outer surface of one of the sides and adapted to fit and transport articles of various sizes and shapes, and a pair of handles are attached along the shorter edge of the rectangular sheet used to form the carrier. The carrier also has a plurality of external attachments for securing and carrying bulky articles and an internal pocket.

The present invention generally relates to a carrier configured and adapted to contain one or more folding chairs, an extendable umbrella or chair umbrella, and a multiplicity of pockets for carrying refreshments or foodstuffs, periodicals, and items of apparel, as well as number of utility loops for suspending bulkier articles along the exterior of the carrier. The invention is a combination mat and carrier which may be converted from its carrier mode and extended to be spread on the ground creating a surface upon which a person can lie or sit.
There are a number of combination tote bags and lounge sets or mats which covert from a carrier or tote to a mat providing a surface upon which one can lie. One example of such combination is U.S. Pat. No. 4,197,891 Comollo! for a "Combination Beach Mat and Shoulder Bag", which bag is convertible into a mat by unfolding the flexible material to assume the shape of a larger rectangular mat. When in the folded bag mode, the combination is capable of retaining and carrying articles of clothing to be worn on the beach.
Another example is the combination of a beach mat and tote bag is described in U.S. Pat. No. 5,110,219 Lopes! which describes a single rectangular sheet folded in half with connecting straps at the distal opposing edges of the folded rectangular sheet for creating the tote. When the sheet is to be unfolded, the connecting straps and side zippers of the tote are disengaged and the rectangular flexible material can be laid flat on the ground. Another example of a combination convertible bag and mat is described in U.S. Pat. No. 4,991,245 Franco! which describes a rectangular sheet of flexible material convertible to a tote bag for carrying articles by folding portions of the rectangular sheet over and upon one another forming interior article-holding compartments.
A yet further example of a beach bag or tote which is convertible for alternate use is shown in U.S. Pat. No. 4,180,112 Bovet! where the tote bag can be opened to provide a shield against sun or wind. The bag is opened and a stiffening or reinforcing member is positioned so that the bag resembles an open book in an upright position so as to provide the described shield. None of these patents contemplate a carrier capable of transporting one or more folding chairs in combination with carrying an umbrella and other articles necessary for the recreational activity, whether such activity be sitting on a beach at an ocean or a lake, or around a swimming pool.
It is, therefore, an object of the present invention to provide a combination carrier having sufficient flexibility to accommodate one or more folding chairs, an umbrella, and numerous other articles to be placed in pockets or attached through utility loops to the carrier so that the multiplicity of items can be transported from one location to another location by a single individual.
Other objects will appear hereinafter.


A gating module for gating an image intensifier tube. The gating module includes a frequency generator generating a base signal having a base frequency. A modulator spread-spectrum modulates the base frequency of the base signal to generate a modulated signal. A gating circuit coupled to the modulator generates a gating signal in response to the modulated signal.

Night vision devices enable a user to view a scene with little or no visible ambient light. Law enforcement and military personnel often use night vision devices during night time surveillance and maneuvers. Night vision devices typically employ an image intensifier tube that amplifies light in order to provide an enhanced image to the user.
Gated night vision devices, however, are susceptible to interference associated with oscillatory ambient light, which causes bright flashes of light that interfere with the viewed image. Some systems attempt to avoid the interference by determining the frequency of the ambient light and then using a gating frequency that avoids the interference. A disadvantage of these systems is that interference may occur if the frequency of the ambient light changes. Additionally, these systems may experience interference if the ambient light includes multiple frequencies or does not follow a regular pattern. Consequently, avoiding interference has posed challenges for the design of gated night vision devices and other gated sensors.
Gating the cathode of image tubes combined with periodic scene brightness variations can produce intermodulation products, which fall within the band that is detectable by the human eye. Since it is not possible to predict the frequency of scene brightness variations, such as line frequency flicker at 50, 60, 100, 120 hz, or computer monitor flicker at frequencies between 15 hz and several hundred khz, intermodulation products can be generated in the visible range.
Furthermore, gating at a fixed frequency may produce a gating signal, which occurs at a frequency that is a mechanical resonant frequency of image tube elements. This makes the image tube assembly produce an audible sound. Audible emissions from a night vision system are undesirable.

Method and system for spread spectrum gating


A soft aperture allows gradual attenuation of a light beam dependent upon its location away from the center of a diffractive optical element. Such an optical element may be provided by decreasing a number of phase levels, increasing a number of phase levels, increasing a density of metal patches or diffractive gratings, or decreasing a blaze height and/or duty cycle, all radially from the center. Alternatively, the soft aperture may be defined by a photolithographic process. Such a soft aperture is particularly useful in aiding circularizing of an elliptical light beam. The soft aperture may be used alone or integrated with other optical elements.

1. Field of the Invention
The present invention is directed to using diffractive optics to correct input light beams. In particular, the present invention is directed to diffractive optics which form a soft aperture to aid in circularizing a non-circular input beam as well as integration of the soft aperture diffractive optics with a refractive and/or further diffractive element used to collimate and correct an input beam forming a single element.
2. Description of Related Art
Laser diodes are compact, efficient, inexpensive and capable of mass production. This has lead to an increasing number of applications for which laser diodes are used. However, the active region of the laser diodes is quite small and asymmetric. This results in a small and asymmetric beam waist. Consequently, the beam divergence is severe and asymmetric.
Failure to correct the ellipticity of the beam is sometimes unimportant, but many applications require collimated outputs with low optical aberrations. If the beam is to be collimated for a particular application, the far field beam divergence will be different in the two directions. Thus, the ellipticity of the beam must be corrected by a subsequent optical system. Astigmatism is a further property of laser diodes which presents an additional potential disadvantage in many applications. This astigmatism is also corrected most advantageously by a subsequent optical system.
There have been numerous design solutions for collimating and correcting wavefronts of diode lasers. One such solution includes using conventional cylindrical lenses to collimate each axis independently. However, the performance of such cylindrical lenses is degraded for more asymmetric beams, since skew rays cannot be corrected, and is hard to align.
Another configuration is shown, for example, in U.S. Pat. No. 5,229,883 to Jackson et al. As can be seen in FIGS. 2 and 3 of Jackson et al., a cylindrical lens 22 is used in conjunction with a binary optical element 28. The binary optical element 28 is designed such that each ray of light from the diverging input light source will travel the same optical path length or vary from the optical path length by a discrete multiple of the wavelength of the light traveling from its source to its exit from the front surface of the binary optical element. While the low horizontal divergence may typically be collimated with cylindrical optical elements with few resulting aberrations, collimation of the fast vertical divergence requires optical elements with increased optical power at a much lower f number which generally results in increased optical aberrations with the collimated output.
The cylindrical lens 22 is used to collimate the laser diode's output in the fast axis. Binary optics 28 include a substrate on which a binary optical diffraction pattern is etched. The binary optic diffraction pattern is typically an eight phase level structure which corrects for optical path differences inherent in the divergent light. The binary optical element collimates the slow axis divergence and corrects for skew ray aberration of rays not in either the fast or slow axis. These additional corrections are inherent in a binary optical element whose diffraction pattern is chosen so as to have each optical ray travel in equal optical path lengths or an optical path length that varies from that equal optical path length by integer multiple of the wavelength of light traveling therethrough.
In order to provide proper correction of the beam output from the laser diode 10, the cylindrical lens 22 and the diffractive optical element 28 in the Jackson et al. configuration must be both properly positioned along the optical axis, but also rotationally aligned with one another. This rotation alignment is crucial, since the different axes are treated differently. This rotational alignment can be difficult and sensitive, requiring expensive continuous rotational alignment.
When two elements, both providing optical power, need to be aligned, often active alignment is required. Active alignment is performed by turning on a beam and continuously adjusting the optical elements until a desired beam is achieved. Such active alignment is difficult and expensive. When optical power is provided by both elements, optimal alignment of a single element alone may not provide satisfactory alignment with the other optical element to provide the optimum results for the system as a whole.


A surfactant for separating bitumen from sand includes an aqueous solution of hydrogen peroxide contacted with low rank coal. The low rank coal is preferably lignite. The surfactant may be used to clean bitumen, heavy oil and/or tar from sand, shale or clay at low concentrations and with mild agitation.

The present invention relates to surfactants for separating hydrocarbons from solids. In particular, it relates to a surfactant derived from low-rank coal and hydrogen peroxide for separating bitumen from sand.
It is known to use hot water in order to separate particulate matter such as clay, sand or silt from oil and tar. However, a significant amount of oil and tar remains bound to the particulate matter after hot water treatment. Hydrogen peroxide is a known surfactant for removing oil and tar from sand, silt or clay. However, it may not be satisfactory in all cases and is often ineffective. Therefore there is a need in the art for a surfactant comprising hydrogen peroxide which may be more effective.


A method for etching a substrate includes performing, in a plasma chamber, a first etch of a substrate material using a plasma etch process. The first etch forms features to a first depth in the material. Following the first etch, the method includes performing, in the plasma chamber without removing the substrate from the chamber, an atomic layer passivation (ALP) process to deposit a conformal film of passivation over the mask and the features formed during the first etch. The ALP process uses a vapor from a liquid precursor to form passivation over the features and the mask. The method further includes performing, in the plasma chamber, a second etch of the material using the plasma etch process. The conformal film of passivation is configured to protect the mask and sidewalls of the features during the second etch. A plasma processing system also is described.

In semiconductor fabrication, for high-aspect ratio plasma etches, plasma-based passivation in the form of, for example, flashes and etch byproduct re-deposition has been used to maintain side wall profile and to avoid lateral etch into the device region. These plasma-based passivation techniques are not only aspect ratio dependent, which results in loading between isolated and dense features, but also material dependent, which results in loading between different materials. Plasma-based passivation, e.g., an O2 flash, also consumes material on the target feature through oxidation and thereby causes critical dimension (CD) loss.
In current semiconductor fabrication processes, etch and atomic layer deposition (ALD) processes are carried out in separate platforms. Transporting wafers from one chamber to another chamber can be problematic because it entails vacuum breaks and increases the likelihood of unwanted particles coming into contact with the wafers. Moreover, the cleaning process, which is typically a dilute HF acid clean, has an impact on the mask and thereby negatively impacts performance. The use of separate chambers also has an adverse impact on throughput.
It is in this context that embodiments arise.

Integrated atomic layer passivation in TCP etch chamber and in-situ etch-ALP method


One aspect of the present invention is a method for the wireless transmission of information from one or more antennas to one or more separate users. The method comprises processing information to produce transmission vectors that minimize simultaneous interference between separate user channels and adjusting the radiation patterns to minimize total system radiation power for users specified capacities. In another aspect, the present invention includes apparatus and methods for providing multiple users of a network with information in such a manner that only the user that the signals are intended for receives the information.

Operators of cable communication systems have implemented a range of digital services, including digital video programming on various pay plans and broadband Internet access. Until recently, telephony was less pervasive on these systems, but is now being provided on some of these systems at an increasing rate. Cable operators have typically provided these digital services on modern hybrid fiber-coax (HFC) systems that typically provide relatively high capacity, interactive digital communication and fairly good system reliability. In these systems, however, virtually all server functions are concentrated in the cable headend.
The cable drop, from a tap to a subscriber's residence, remains a vulnerable and trouble-prone element, offering an opportunity for service improvement and maintenance cost reduction if it could be replaced with a more reliable, but still economical wireless alternative. Furthermore, there are additional service opportunities, not yet addressed, in the mobility needs of subscribers and others, including wireless delivery of entertainment services that have so far been largely confined to cables, and providing Wireless internet service provider (WISP) and micro-cellular mobile services, e.g., cellular telephony. Furthermore, reliance on an all-packet architecture may make a cable system part of the rapidly developing multimedia Internet with its, thus far, unparalleled potential for new media applications.
Outdoor WISP architectures, for example, Ricochet's relayed wireless access service in the 900 MHz band and Virginia Tech's "local neighborhood" LMDS in the 28 GHz band, are typically considered among the precedents for the concept of combining some kind of wireless drop with a wired access network. However, these systems do not address enhancements of existing cable distribution systems that may now take advantage of relatively inexpensive IEEE 802.11 wireless LAN (WLAN) technology in the unlicensed bands, provided appropriate spectral management techniques are used.
Although specific antenna architectures might be employed to create directivity between a specific access-user antenna-pair, economic considerations typically dictate that all access antennas are selected from a small set of designs and that all users' antennas are also chosen from a small set of choices. Furthermore, access antennas typically must be placed where convenient along the access line and users are usually distributed non-uniformly near the access line and at varying distances from it. All of this points to the fact that usually there will be interference between the channels serving different individual users, unless means are taken to eliminate it. Even if sub-channels of different users of the system are separated by other means of multiplexing, the need for privacy dictates the elimination of coupling between separate users' channels. The wireless channels to different users might be separated, to some extent, by using different frequency bands for different users, or by using time division or packet division multiplexing. But these methods do not use the systems capabilities efficiently and flexibly and they require relatively expensive processing equipment on the users' premises.
Of utility then are systems, apparatus and methods that allow bilateral and flexible subscriber access to an information transport system.

This patent is subject to a terminal disclaimer.

Flexible transport system including support for bilateral user access


Systems and methods receive link fragments and component fragments for assembly into a template. The component fragments comprise editable portions of a document. The link fragments comprise references to other component fragments. A further aspect of the systems and methods includes assembling multiple templates into a formset. The templates included in the formset may be dynamically selected at runtime. Conflicts between references in the templates that make up the formset are resolved and a new form may be created.

From the very beginning of written expression, documents have been an important part of many business, political and personal transactions. Technology advances have led to improved methods of document processing. For example, the application of computer systems to document processing has made document creation, editing, management and distribution easier than ever before. For example, a forms package may be electronically created, edited, and distributed.
In current systems, a document package is typically assembled using preexisting documents. That is, a user may select one or more completed documents for insertion into a set of forms that make up the document package. Such document packages are common in the insurance, financial services and other industries that require documents upon the occurrence of various events. Because the same documents may be used in different packages, current systems allow for efficient use of documents by allowing users to create document packages that reuse the same document in multiple packages.

Systems and methods for assembling form fragments and templates into a form package


An arrangement of a control system and a mobile control module, via which the control system can be remote-controlled. The control system can be supplied with sensor data via signal inputs, and a processing unit of the control system can calculate from the sensor data and from stored lifting device-specific data information characteristic for the current lifting load situation the allowability of work processes on the lifting device, and optionally in the given current lifting load situation. The control system can transmit the information characteristic for the current lifting load situation and/or the allowability of work processes on the lifting device to the mobile control module via a transmitting and receiving module, to the mobile control module in a wireless and/or cable-bound manner. From the information, a processing unit of the mobile control module calculates graphic data for a display via a display unit.

The present invention relates to load lifting control arrangement consisting of a controller to be arranged on a hydraulic lifting device and a mobile control module, and a hydraulic lifting device with such a load lifting control arrangement.
The calculation of the current lifting load situation is effected with reference to the current geometry of the lifting device and to the supporting state of the lifting device in the stationary controller. From the thus-calculated data, information is determined which is characteristic of the current lifting load situation and/or the allowability of work processes on the lifting device in the given current lifting load situation. This information is transmitted to the mobile control module wirelessly or via cables.
The quantity of data to be transmitted under basic operation of the real-time requirement, i.e. a data transfer without time delay, is problematic. If the delay is too great, the result can be that the situation displayed on the mobile control module differs from the actually existing situation on the lifting device. For example, a movement on the mobile control module can still be displayed as allowed although the controller of the lifting device already prohibits this movement.
As remote operation of the controller through the mobile control module is a security-relevant process, it is not possible to use any arbitrary electronic hardware in the mobile control module.

Arrangement of a controller and a mobile control module


An integrated circuit comprising a memory cell array capable of simultaneously performing data read and write operations is provided. The integrated circuit to which inputs and outputs (IOs) are separately provided and to which a write address and a read address are simultaneously input during one period of a clock signal comprises a plurality of memory blocks, the memory blocks comprising a plurality of sub-memory blocks, a plurality of data memory blocks corresponding to the memory blocks, and a tag memory controlling unit, which writes data to the memory blocks or reads data from the memory blocks in response to the write address or the read address, wherein access to the same sub-memory block is not simultaneously performed when the write address and the read address are the same.

1. Technical Field
The present invention relates to an integrated circuit (IC), and more particularly, to an IC that has a memory cell array capable of simultaneously performing a data read operation and a data write operation.
2. Discussion of the Related Art
General synchronous random access memories (SRAMs) can transmit either read data or write data during each period of a clock signal. A double data rate (DDR) RAM increases a data transmission rate of an SRAM by transmitting data at both a rising edge and a falling edge of a clock signal. However, in a conventional memory device such as an SRAM, data input and output are performed via one input and output (I/O) pin. When using a common I/O pin, data that is input and output cannot be independently controlled. Thus, input and output frequencies of the data (e.g., bandwidth) are limited.
As the bandwidth of memory devices becomes important, memory devices using separate I/Os have been manufactured. In such memory devices, an input pin and an output pin are positioned separately on the memory device so data that is input and output can be independently controlled. A memory device that has separate input and output pins can receive, for example, a read command, a read address, a write command, a write address, and can write data within one period of a clock signal, thus increasing its operating frequency.
However, when a memory device having separate I/Os receives a read command, a read address, a write command, a write address, and writes data within one period of a clock signal, memory cell accesses are performed twice, resulting in a data read operation and a data write operation being performed within one period of a clock signal. Thus, because the activation of a word line for data reading and writing is performed twice within one period of a clock signal, the clock frequency is limited by the activation time of a word line.
FIG. 1 is a timing diagram illustrating an operation of a memory device having separate I/Os. Because the relationship between an address and a word line or the latency of input and output data vary according to the structure of the memory device, such a relationship or latency is not discussed.
Referring to FIG. 1, a write address WADD and a read address RADD are input within one period of a clock signal CLK. Addresses A0, A2, A4, and A6 input at a rising edge of the clock signal CLK are read addresses RADDs, and addresses A1, A3, A5, and A7 input at a falling edge of the clock signal CLK are write addresses WADDs. A read selection signal RES is used to select the read addresses RADDs, and a write selection signal WES is used to select the write address WADDs, respectively. A word line WL having a word line pulse AWLO for data reading and a word line pulse AWL1 for data writing is activated within one period of the clock signal CLK. Thus, one period of the clock signal CLK cannot be shorter than the activation time of the word line WL.

Integrated circuit having a memory cell array capable of simultaneously performing a data read operation and a data write operation


An ink jet recording sheet having a porous ink receiving layer is disclosed. The porous ink receiving layer contains a compound which has a plural number of non-aromatic carbon-carbon unsaturated bonds in a molecule, inorganic particles and a hydrophilic binder. An image forming method employing the ink jet recording sheet and a water-base ink is also disclosed.

In recent years, image quality of ink jet recording materials has been rapidly improved to approach photographic image quality. Particularly, to achieve image quality comparable to photographic image quality via ink jet recording, improvement also with respect to an ink jet recording sheet (hereinafter, also simply referred to as a recording sheet) has also progressed, and a porous-type recording sheet, in which a tiny pore layer comprised of inorganic particles and a hydrophilic polymer is provided on a very smooth support, is becoming a recording medium resulting in the nearest photographic image quality, since it exhibits high gloss, vivid coloration, as well as excellent ink absorbability and drying characteristics. Particularly, when a non-water absorbing support is utilized, cockle after printing, so-called "wrinkles", which are often observed with a water absorbing support, are not generated and a very smooth surface is maintained to result in a higher quality print.
Ink jet recording is generally classified into one which utilizes water-based ink using water and a water-soluble solvent as an ink solvent and one which utilizes a non-water based oil solvent, and each of these comprises a type which utilizes a dye as a colorant and a type which utilizes a pigment, which require an exclusive sheet suitable for each type to result in high quality images. As for ink, water-based ink with less environmental load and greater safety aspects has prevailed.
Among water-based inks, pigment ink exhibits high image durability, however, it is tends to vary gloss image-wise, rarely resulting in print quality similar to photographic images; on the other hand, in case of utilizing water-soluble dye ink, a color print comparable to a photographic image having high image visibility as well as uniform surface gloss can be obtained relatively easily.
However, in contrast to the water-soluble dye which provides images of high quality, it has been a problem in that image stability is poor compared to a pigment ink and exhibits significant fading by sunlight or even room-light, and also fading by such an oxidizing gas such as ozone present in ambient air. Particularly, a porous-type recording sheet provided with a tiny pore layer is sensitive to ambient oxidizing gas because the contact area between a dye and the air in a room is increased, and improvement has been desired.
In order to overcome such deterioration due to storage, many proposals have been made such as various kinds of anti-oxidants as anti-fading agents being added.
For example, an ink jet recording sheet including various kinds of compounds as anti-oxidants is described in JP-A Nos. 57-87989, 57-74192 and 60-72785; an ink jet recording sheet in which an UV absorbent is incorporated in JP-A No. 57-74193; addition of a hydrazine series in JP-A No. 61-154989; addition of a hindered amine type anti-oxidant in JP-A No. 61-146591; addition of a nitrogen containing. heterocyclic mercapto type compound in JP-A No. 61-177279; addition of a thioether type anti-oxidant in JP-A Nos. 1-115677 and 1-35479; addition of a hindered phenol type anti-oxidant having a specific structure in JP-A No. 1-36480; addition of a hindered phenol type anti-oxidant and a hindered amine type anti-oxidant in combination in JP-A No. 3-13376; addition of an ascorbic acid series in JP-A Nos. 7-195824 and 8-150773; addition of zinc sulfate in JP-A No. 7-149037; incorporation of a thiocyanate series in JP-A No. 7-314882; addition of a thiourea derivative in JP-A No. 7-314882; incorporation of a saccharide in JP-A Nos. 7-276790 and 8-108617; addition of a phosphoric acid type anti-oxidant in JP-A No. 8-118791; addition of such as a nitrite, a sulfite and a thiosulfite in JP-A No. 8-300807; and addition of a hydroxyl amine derivative in JP-A No. 9-267544.
However, in an ink jet recording sheet provided with tiny pores, the effect can hardly be said to be sufficient, and there is a problem in that ink absorbability of a porous layer is decreased when a large amount of such various anti-fading agents are added to achieve a sufficient anti-fading effect.
Further, in the case of utilizing water-soluble dye ink, problems such as disadvantages of generated bleeding and of poor water resistance exist, due to high hydrophilic characteristics. That is to say, dyes tend to bleed when stored under high humidity over a long duration after recording or if water drops are accidentally dripped onto a printed surface. To overcome this problem, it is a general practice that a dye fixing substance such as a cationic substance is added to the pore layer. For example, preferably utilized has been a method in which a cation polymer is utilized and which combined with an anionic ink dye to firmly immobilize the dye. Such cationic polymers include a polymer having a quaternary ammonium group, such as described, for example, in "Technologies and Materials for Ink jet Printer" (published by CMC Co., Ltd., July 1998) and the literature in paragraph [0008] of JP-A No. 9-193532. Further, a method, in which a water-soluble polyvalent metal ion is added into an ink jet recording sheet in advance on which dyes are immobilized by coagulating adhesion at the time of ink jet recording, is also proposed. Some reduction of bleeding and improvement of water-resistance are observed by use of a cationic polymer or a polyvalent metal ion, however, it is often the case that the effect cannot be exhibited sufficiently even with addition of aforementioned anti-fading agents having negligible diffusibility in an ink absorbing layer, because dye is unevenly distributed in an ink absorbing layer by bonding with a cationic polymer or a polyvalent metal ion.
On the other hand, it is known that resin having an unsaturated bond in a molecule such as butadiene rubber can be utilized in an ink jet recording sheet. For example, a method effectively utilizing resin mainly to absorb a solvent of oil-soluble ink is disclosed (refer to, for example, patent literature 1-6). Further, a utilization method, in which an absorbability of water-based ink is improved by sulfonation of a dien-type polymer or of a hydrogenation adduct thereof to be made hydrophilic, is disclosed, however, it has not been known heretofore that storage stability can be improved by use of a compound having an unsaturated bond in a tiny pore ink absorbing layer.

Ink jet recording sheet and image forming method


A computing system translates two-dimensional (2D) graphical input by a user who is selecting one or more 2D images in a three-dimensional (3D) scene of 3D models created by model 3D objects. The computing system comprises a viewport module, a retrieve module, set ray module and, a hit detection module. The viewport module defines 2D boundaries of the 3D scene and a view point location in 3D space for viewing the 3D scene. The retrieve module retrievies a selection point location in 2D space for the 2D graphical input. The set ray module sets a pick ray in 3D space based on the view point location and the selection point location. The hit detection module detects a hit by the pick ray on a 3D model in the 3D scene. In this computing system there is a method of processing a hierarchy of computer program visual objects for detecting a hit by 2D input on 2D and 3D images displayed by a computing system. The method begins by traversing branches of a first tree hierarchy of visual objects to leaf objects. Next the method detects whether the next unprocessed leaf object is a visual 2D object with 2D geometry or a model 3D object with 3D geometry. Lastly the method calls a 2D process to detect a hit on the 2D geometry of a visual object if a visual 2D object is detected and calls the 3D process to detect a hit on the 3D geometry of a visual object if a model 3D object is detected.

The limits of the traditional model of accessing graphics on computer systems are being reached, in part because memory and bus speeds have not kept up with the advancements in main processors and/or graphics processors. In general, the current model for preparing a frame using bitmaps requires too much data processing to keep up with the hardware refresh rate when complex graphics effects are desired. As a result, when complex graphics effects are attempted with conventional graphics models, instead of completing the changes that result in the perceived visual effects in time for the next frame, the changes may be added over different frames, causing results that are visually undesirable.
Further, this problem is aggravated by the introduction of three-dimensional (3D) graphics into the two-dimensional (2D) compositing system to display a mixed scene with 2D images and 3D scenes. One of the problems with such a mixed system is how to translate a user's 2D mechanical input with a mouse, pen or other pointing device into a computer input when the user is pointing at a 2D view of a 3D scene on a computer display screen. What is needed is a graphics generation and compositing system that can translate the user input into computer input for 3D scenes as well as the standard 2D images.
It is with respect to these considerations and others that the present invention has been made.

Translating two-dimensional user input on three-dimensional scene


An improved method and apparatus for monitoring the concentration of contaminants, including volatile organic compounds, in groundwater is provided comprising a semipermeable membrane defining an inner chamber. The chamber is carried within a mesh protective sleeve of cover to prevent abrasion or puncture of the chamber. The membrane is permeable to contaminants but impermeable to a reference fluid, which is distilled water. The method of sampling comprises placing the semipermeable membrane chamber, which contains the reference fluid, in contact with contaminated groundwater, thereby allowing contaminants to diffuse through the semipermeable membrane.

This invention relates generally to a liquid sampling device, and more particularly to an improved method and apparatus for monitoring the concentration of contaminants, including volatile organic compounds, in groundwater. Various devices exist for sampling a liquid. A known type of passive, multi-layer sampling device which is used to extract groundwater samples is comprised of a rod (or connector rods) with apertures at specific intervals to accommodate dialysis cells.
U.S. Pat. No. 5,454,275 to Kabis discloses a groundwater sampler which makes use of pressure differentials that result during sampling. U.S. Pat. No. 5,147,561 to Burge et al. teaches a sampling device containing a stripping chamber for stripping a groundwater sample of its volatile components at or near the point of collection. U.S. Pat. No. 4,078,433 to McCabe, Jr. et al. discloses a liquid sampling device comprising a length of pipe having a cap screwed onto each end thereof. The upper cap has an aperture for admitting the liquid to be sampled into the pipe. Despite the prior art devices, there is a need for improvement in the art of groundwater sampling. The use of thin semipermeable membrane materials in water sampling devices presents certain problems due to the very sensitive nature of the membrane. Such membrane are easily damaged in the course of use during placement in a well and removal.

Passive water sampler and method of sampling


A semiconductor memory device uses a wave pipeline system which can reduce a power consumption by reducing a current for charging a data bus between a memory core part and an output circuit. A single line data bus transmits read data output from the memory core part. A data bus drive circuit outputs the read read data to send to the single data bus. Each of a plurality of data latch circuits has a data input terminal connected to the data bus. A data input control circuit inputs the read data which is serially transmitted on the data bus to the data latch circuits in parallel in response to an operation of the data bus drive circuit. A data output control circuit outputs the latched read data in an order of latching by sequentially selecting outputs of the data latch circuits.

1. Field of the Invention
The present invention generally relates to a semiconductor memory device and, more particularly, to a semiconductor memory device using a wave pipeline system which controls latency of data output by providing a data latch circuit near an output circuit.
Recently, in relation to an increase in processing speed of microprocessors, high-speed processing is required also for semiconductor memory devices. Thus, development of a semiconductor memory device having a pipeline technique is popular.
The pipeline technique effectively increases a processing speed by dividing a series of processes performed by a device so that a second process designated by a first instruction and a first process designated by a second instruction are initiated after a first process designated by the first instruction has been completed. The series of processes includes, in a case of a memory device, an input process of address data, a decoding process of the address data, a reading process of data from a cell, a transfer process of the data to an output circuit and an output process of the data.
Normally, in the pipeline technique, a plurality of processes which are to be serially processed are divided into a plurality of groups. Thus, process time for each group is equalized. The pipeline technique is achieved by providing a latch circuit on an output side of a process circuit which processes the divided processes. However, there are many cases, in a semiconductor memory device, where it is difficult to provide a latch circuit to a position where the process time is equalized.
Accordingly, in a semiconductor memory device, a pipe is formed by utilizing transmission delay of a logic circuit and a data latch circuit is provided near an output circuit so as to control latency of output of data. That is, a pipeline system, which is referred to as a wave pipeline, is used for controlling a timing of output of data based upon which clock the data is output after input of a read command.
2. Description of the Related Art
FIG. 1 is a circuit diagram of a part of a conventional synchronous dynamic random access memory (synchronous DRAM).
In FIG. 1, the synchronous DRAM comprises a memory core part 1, a NAND circuit 2, a shift register 3, a shift register 4, and a plurality of output circuit parts 5-n (n=0, 1, 2, . . . , 7), each including a plurality of data latch circuit 6-0 to 6-3 and a data output buffer 7.
The memory core part 1 includes a memory cell area in which a plurality of memory cells are arranged. Data buses RDn and /RDn (n=0, 1, 2, . . . , 7) are connected to the memory core part 1 so as to transfer read data from the memory core part 1. The data buses RDn and /RDn are complementarily driven.
The NAND circuit 2 monitors the data buses RD0 and /RD0 so as to produce a data bus status shift monitoring signal iCLK which indicates a shift in a status of the data buses RD0 and /RD0.
The shift register 3 changes an input pointer signal pi0 to a high logic level at a predetermined time period after a read command is input. Hereinafter, the high logic level is referred to as H-level, and a low logic level is referred to as L-level. For example, when a burst length is set to 4, the shift register 3 turns input pointer signals pi1, pi2 and pi3 to the H-level, sequentially one by one, by using the data bus status shift monitoring signal iCLK as a count-up clock.
The shift register 4 turns output pointer signals po0, po1, po2 and po3 to the H-level sequentially one by one each time an external clock signal CLK is raised when the burst length is set to 4 and when an output enable signal OE, which controls a data output operation, is at an H-level.
The output circuit parts 5-n are coupled to the respective data buses RDn and /RDn. The output circuit parts 5-n have the same circuit structure.
In the output circuit part 5-0, the data latch circuit 6-0 latches the data on the data buses RDO and /RDO when the input pointer signal pi0 is changed to the H-level. The data latch circuit 6-0 outputs the latched data when the output pointer signal po0 is changed to the H-level.
The data latch circuit 6-1 latches the data on the data buses RD0 and /RD0 when the input pointer signal pi1 is changed to the H-level. The data latch circuit 6-1 outputs the latched data when the output pointer signal po1 is changed to the H-level.
The data latch circuit 6-2 latches the data on the data buses RD0 and /RD0 when the input pointer signal pi2 is changed to the H-level. The data latch circuit 6-2 outputs the latched data when the output pointer signal po2 is changed to the H-level.
The data latch circuit 6-3 latches the data on the data buses RD0 and /RD0 when the input pointer signal pi3 is changed to the H-level. The data latch circuit 6-3 outputs the latched data when the output pointer signal po3 is changed to the H-level.
The data output buffer 7 latches the sequentially output data from the data latch circuits 6-0 to 6-3, and outputs output data DQ0 to a pad 8.
FIG. 2 is a timing chart of the synchronous DRAM shown in FIG. 1 when the burst length is set to 4. Waveform A in FIG. 2 indicates the external clock CLK. Waveform B in FIG. 2 indicates the output enable signal OE. Waveform C in FIG. 2 indicates a potential of the data buses RD0 and /RD0. Waveform D in FIG. 2 indicates the data bus status shift monitoring signal iCLK. Waveform E in FIG. 2 indicates the input pointer signals pi0, pi1, pi2 and pi3. Waveform F in FIG. 2 indicates a potential of nodes L0, /L0, L1, /L1, L2, /L2, L3, /L3 (shown in FIG. 3) of the data latch circuits 6-0, 6-1, 6-2 and 6-3. Waveform G in FIG. 2 indicates output pointer signals po0, po1, po2 and po3. Waveform H in FIG. 2 indicates the output data DQ0 output to the pad 8.
As mentioned above, in the synchronous DRAM shown in FIG. 1, the input pointer signal pi0 is changed to the H-level (pi0=H-level) when a read command is input. It should be noted that before the read data is output from the memory core part 1 to the data buses RD0, /RD0, RD1, /RD1 . . . , RD7 and /RD7, the data buses are precharged at the H-level by a data bus precharge circuit (not shown in the figure). FIG. 2 shows a case where data "logic 0", "logic 1", "logic 0" and "logic 1" are sequentially output to the data buses RD0 and /RD0.
When the data "logic 0" is output to the data buses RD0 and /RD0, the data bus RD0 is changed to the low level (RD0=L-level) and the data bus /RD0 is changed to the high level (/RD0=H-level). On the other hand, when the data "logic 1" is output to the data buses RD0 and /RD0, the data bus RD0 is changed to the high level (RD0=H-level) and the data bus /RD0 is changed to the low level (/RD0=L-level).
Accordingly, when the data buses RD0 and /RD0 are driven as shown by waveform C in FIG. 2, the data bus status shift monitoring signal iCLK output from the NAND circuit 2 changes as shown by waveform D in FIG. 2. The input pointer signals pi0, pi1, pi2 and pi3 change as shown by waveform E in FIG. 2.
As a result, the read data D0, D1, D2 and D3 which are sequentially output to the data buses RD0 and /RD0 are sequentially latched by the data latch circuits 6-0, 6-1, 6-2 and 6-3.
On the other hand, when the read command is input, the output enable signal OE is changed to the H-level as shown in waveform B in FIG. 2. Thus, the shift register 4 is changed to an active state. Thereafter, the output pointer signals po0, po1, po2 and po3 are changed to the H-level sequentially one by one as shown in waveform G in FIG. 2 each time the external clock CLK is raised.
As a result, the read data D0, D1, D2 and D3 which are sequentially latched by the data latch circuit 6-0, 6-1, 6-2 and 6-3 are transferred to the data output buffer in the latched order. Thus, the data D0, D1, D2 and D3 are sequentially output as the output data DQ0 to the pad 8.
In the conventional synchronous DRAM shown in FIG. 1, the wave pipeline operation is performed as mentioned above. Since the data buses RDn and /RDn transmit data by being complementarily driven by pulses, the data buses RDn and /RDn must be precharged so as to prepare for the transmission of data in the next cycle.
However, as the capacity of the synchronous DRAM is increased, the length of the data buses RD0, /RD0, RD1, /RD1, ..., RD7 and /RD7 tends to be increased. Thus, the charge and discharge current for the complementary pulse drive of the data buses RD0, /RD0, RD1, /RD1, . . . , RD7 and /RD7 is considerably increased. Accordingly, if the number of bits is increased such as 16 bits, 32 bits or 64 bits, the current for driving the data buses becomes a problem.
When the data buses are pulse driven, a current l(1) consumed by a pair of data buses is represented by the following representation, where VCC is a power source voltage, C is a capacitance of the wire corresponding to the data buses and tCLK is a cycle time of the clock. EQU l(1)=C.times.VCC/tCLK
Accordingly, if the number of input bits is 32, for example, the current l(32) consumed by the entire data buses is represented by the following representation. EQU l(32)=1(1).times.32=32.times.C.times.VCC/tCLK
For example, when the power source voltage VCC is 3 V (i.e., volts), the capacitance C is 3 pF (i.e., picofarads), and the cycle time tCLK is 6 ns (i.e., nanoseconds), the current l(32) reaches as high as 48 mA.

Semiconductor memory device having a single line data bus and latch circuits for improved pipeline operations


Disclosed is a slidable duct assembly for conducting air from a fixed component to a component that is movable with respect to the fixed component by conducting air from a fixed supply of air, associated with the fixed component, to an air delivery member, movable along with the movable component. The duct assembly contains at least two metallic telescoping, tubular conduit sections for rotatably interconnecting the air supply to the air delivery member, and a pair of electrically-conductible, spaced-apart slide bearings positioned between the inner surface and the outer surface of each adjacent conduit section to electrically bond the duct assembly.

1. Field of the Invention
This invention relates to the mechanical arts. In particular, it relates to a slidable duct assembly for use in aircraft anti-icing conduit systems.
2. Discussion of the Related Art
As is well-known, jet aircraft engines provide the thrust needed to propel jet aircraft. Additionally, by redirecting a portion of the compressed, bleed air produced by the engines through a conduit system, the air can be used for a variety of other purposes. These other purposes include pressurizing, heating, and cooling the aircraft's cabin, and removing moisture from its front windows. To be effective, the conduit system must not only minimize the escape of the bleed air, but it must withstand the elevated temperatures, often in excess of 650.degree. F., of the bleed air produced by today's jet aircraft.
Another important use for the bleed air is to de-ice the aircraft wings' leading edges, wing slats and elevons. For example, to de-ice the movable slats located on the leading edge of the aircraft wings, hot, compressed, bleed air is transferred through conduit sections from a supply duct running lengthwise in the wings' leading edge to a spray duct running lengthwise in the wings' slats. The spray duct has openings to deliver the bleed air to the interior surface of the slats.
Special considerations are involved in the anti-icing conduit systems used to de-ice movable portions of the aircraft, such as wing slats and elevons, that must undergo a wide range of motions as they are extended and then retracted. In order to track the movement of these components, the conduit system must contain at least two slidable and rotatable conduit sections. Conventional duct assemblies are formed from metallic, tubular, telescoping conduit sections. To maintain the air pressure within the assembly, each conduit section is sealed with an elastomeric seal. It is a drawback of such seals, that they become unstable, if the telescoping conduit sections extend and retract relatively long distances. To overcome this drawback, slide bearings must be provided to give the necessary stability to the duct assembly and to extend the seals' lives.
It is a further drawback of such duct assemblies that the seals electrically insulate the metallic, telescoping conduit sections. This creates the danger of arcing due to static buildup or lightning, thus creating a possible ignition source in the area of the aircraft's fuel storage and distribution systems. Attempts have been made to overcome this problem by the use of flexible wire or cable loops to attach the movable components to the fixed components and provide electrical bonding. A difficulty with the use of flexible wire or cable loops, however, is they can interfere with the extension and retraction of the movable components. Furthermore, they are subject to premature failure because of fatigue.
Accordingly, there has existed a definite need for an improved slidable duct assembly which minimizes the escape of compressed air and is stable at high temperatures, while telescoping over relatively long distances. There has existed a still further need for a slidable duct assembly that is electrically bonded without the use of cumbersome and failure-prone wires or cable loops. The present invention satisfies these and other needs and provides further related advantages.

Slidable duct assembly for aircraft anti-icing conduit systems


A vehicle having instrumentation indicative of parameters associated with the operation of the vehicle, which instrumentation includes variable intensity light emitting elements whereby the instrumentation will be appropriately displayed to the vehicle operator. A light sensing control system is provided for sensing varying light level conditions and generating corresponding electrical signals indicative of the varying light levels. The control system is responsive to the electrical signals and effective to vary the intensity of the light emitting elements over a range as a function of the varying light levels so that the instrumentation will remain visible to the vehicle operator, but not at a distracting brightness to the vehicle operator, during variable light level conditions. Another feature of the invention is the provision of a control for adjusting the intensity of the light emitting elements independently of glare causing light levels.

The invention disclosed herein is related to the technology disclosed in U.S. Pat. No. 4,917,477, which is owned by the assignee of the present invention, and the aforesaid U.S. patent is to be considered incorporated herein by reference.
Recent advances in electronic technology, particularly the packaging of modules into smaller spaces, has the automobile manufacturers requesting more information type modules to be oriented at various and convenient locations inside the vehicle. It is oftentimes desirable by the automobile manufacturer to have the aforesaid information modules, such as an automatic calibrating compass, clock, temperature and other type modules oriented in locations other than the instrument panel on the dashboard, such as in overhead consoles and the like. Such locations of the information type modules will then provide more space for other modules in either the instrument panel on the dashboard or even in the overhead console. One such location for information type modules is the rearview mirror because it allows for easier viewing of the display without the driver removing his/her eyes from the road. One known unlighted display on an externally mounted rearview mirror is disclosed in U.S. Pat. No. 1,528,082. There, nevertheless, exists problems associated with locating lighted information type modules in a rearview mirror environment. Primarily there would be substantial additional cost to the automobile manufacturer because they would have to run additional wires from the instrument panel on the dashboard to enable the light intensity of the light emitting elements of lighted type information type modules to be controlled so as to render the intensity thereof reduced during nighttime driving, for example, and render them non-distractive to the vehicle driver. Further, if such lighted information type modules are embodied in the rearview mirror environment, the provision of electrochromic layer transmissive attenuation, as described in the aforementioned U.S. Pat. No. 4,917,477, will diminish the light intensity of the light emitting elements during glare conditions. Thus, heretofore, the rearview mirror environment was not deemed to be an appropriate environment for lighted information type modules, especially in mirror constructions embodying electrochromic layer transmissive attenuation capabilities.
Another factor to be considered in orienting a lighted information type display in a rearview mirror environment is that a vacuum fluorescent lighting element would create a problem in safety, namely, the intensity of the vacuum fluorescent display would be distracting to the driver. That is, the readout value of the lighted information type display must be visible through the electrochromic layer as well as be comprehended by the driver. Yet, the display should not be too bright in order to distract the driver's attention from viewing the road forward and rearward. The amount of distraction will increase during nighttime driving because the ratio of light changing from day to night light condition is approximately one million to one, and the display intensity will be immensely brighter to the driver's eyes during the night condition, especially if there is no compensation for the intensity of the information displayed in the rearview mirror setting.
Accordingly, it is an object of this invention to provide a light sensing control system for controlling the intensity of the light emitting elements of the vehicle instrumentation visible to the vehicle operator over a range as a function of light levels so that as the light levels vary, the intensity of the light emitting elements will also vary whereby the instrumentation will remain visible at all times to the vehicle operator, but not at an intensity that would be considered distracting to the vehicle operator during variable light conditions.
Another object of the invention is to provide an improved electro-optic rearview mirror incorporating improved control circuitry whereby the luminance of a light emitting display embodied in the mirror varies with respect to the light transmittance of the electro-optics.
Another object of the invention is to provide an improved electro-optic rearview mirror incorporating improved control circuitry whereby the luminance of a vacuum fluorescent display embodied in the mirror varies inversely with respect to glare light levels impinging on the mirror.
Another object of the invention is to provide an improved electro-optic rearview mirror incorporating improved control circuitry whereby the luminance of a light emitting display embodied in the mirror varies directly with respect to ambient light levels.
Another object of the invention is to provide an improved electro-optic rearview mirror incorporating improved control circuitry whereby the luminance of a light emitting display embodied in the mirror varies inversely with respect to the levels of glare light impinging on the mirror and whereby the luminance of the display may be modified independently of the glare light levels impinging on the mirror.
It is a further object of this invention to provide an ambient light sensing control for varying the intensity of light emitting elements on instrumentation mounted on a rearview mirror assembly of a vehicle.
It is a further object of this invention to provide a light sensing control, as aforesaid, wherein electrochromic means is mounted in front of the light emitting elements of the vehicle instrumentation system so that the light absorption characteristic of the electrochromic means can effect a varying of the intensity of the light emitting elements visible therethrough to the vehicle operator.

Automatic electrochromic control of light level of vacuum fluorescent display