A mold-clamping control method for an injection molding machine includes the steps of detecting a value of a monitor item in a monitor region predetermined in relation to a mold closing operation during the course of a mold clamping step; differentiating the detected value in order to obtain a differential detection value; and performing emergency processing when the differential detection value exceeds a threshold value. The monitor item may be torque or velocity of a servomotor for performing a mold closing operation.

1. Field of the Invention
The present invention relates to a mold-clamping control method for an injection molding machine, which method is favorably used in detecting a foreign object that is caught between a movable mold and a stationary mold during the course of a mold clamping step.
2. Description of the Related Art
Conventionally, in the field of an injection molding machine designed such that reciprocating motion produced by a drive unit composed of a servomotor and a ball-screw mechanism is transmitted to a movable platen via a toggle link mechanism, there has been known a foreign-object detection method for detecting a foreign object (e.g., a molded product) that is caught between a movable mold and a stationary mold upon movement of the movable platen in a mold closing direction (see, for example, Japanese Patent Application Laid-Open (kokai) No. 2002-172670).
The patent publication discloses a foreign-object detection method for an injection molding machine, including the steps of detecting a physical value related to a mold closing action in a monitor region during the course of a mold clamping step; and performing emergency processing associated with detection of a foreign object when a deviation between the detected physical value and a predetermined theoretical value is in excess of a threshold value. In the foreign-object detection method, a trial mold clamping operation is performed to thereby detect a maximum value of the deviation; and the maximum value is added to a preset reference value to thereby determine a threshold value to be used for foreign object detection.
In the above-mentioned foreign-object detection method (mold-clamping control method), the maximum deviation between the detected physical value and the preset theoretical value is added to the reference value to thereby determine the threshold value. Thus, the method can promptly and readily determine a fixed threshold value with high accuracy and high reliability.
However, the magnitude of a physical value related to a mold closing operation in a monitor region usually varies depending on, for example, dimensional errors and wear of mechanisms, lubrication and adjustment for maintenance, and uneven rotation of a servomotor. In the case of an automatic 24-hour operation, the magnitude of a physical value varies (Shifts) depending on an hour of the day because of, for example, temperature variations (temperature drift) between day and night. Thus, when the threshold value is fixed, erroneous detection may arise as a result of variations in a physical value caused by a disturbance. Such a conventional method may cause unnecessary suspension of operation, thus involving unnecessary inspection by an operator, delay in a production schedule, and a failure to provide high consistency and high reliability in terms of mold-clamping control.

Mold-clamping control method for injection molding machine


An acidic bleaching solution formed from the admixture of a first aqueous solution containing a chlorine deactivating agent and a second aqueous solution containing a hypochlorite salt is disclosed. Also disclosed is a bleaching system for forming the acidic bleaching solution, as well as a method of preparing the acidic bleaching solution. The acidic bleaching solution advantageously generates little or no chlorine gas while being a particularly effective cleaner for removing soapscum, limescale, mold and mildew from treated surfaces.

1. Field of the Invention
This invention relates to an acidic bleaching solution that generates little or no chlorine gas during use and which is particularly effective as a cleaner for removing soapscum, limescale, mold and mildew from treated surfaces. The invention also relates to a bleaching system for forming the acidic bleaching solution and a method of preparing the acidic bleaching solution.
2. Related Background Art
Bleach/sulfamic acid cleaning compositions have long been known. For example, UK Patent Application GB 932,750 discloses a powdered cleansing composition containing alkali metal monopersulfate salts and alkali metal chlorides in combination with a nitrogen-containing chlorine-hypochlorite acceptor such as sulfamic acid. The chlorine generated upon the addition of water to the composition is said to be tied up by the nitrogen-containing chlorine-hypochlorite acceptor so as to reduce or eliminate the expected chlorine odor.
A sanitizing composition which is said to have an improved shelf life in the dry state is described in UK Patent Application GB 2078522. The composition comprises sodium or calcium hypochlorite, an acid source which desirably includes sulfamic acid in combination with another non-reducing acid such as malic acid or succinic acid and a surfactant. The acid content of the composition is said to enhance the ability of the composition to sanitize surfaces with lime scale or milk stone. This composition, however, has been reported to evolve chlorine gas when stored in damp conditions or when prepared in concentrated aqueous solutions.
U.S. Pat. No. 4,822,512 reportedly overcomes this problem through the use of a low level of water-soluble inorganic halide in the composition, such as sodium chloride. In particular, a water-soluble biocidal composition is described as (a) 0.01 to 5 parts by weight of a water-soluble inorganic halide, (b) 25 to 60 parts by weight of an oxidizing agent which, in aqueous solution, reacts with halide to generate hypothalite ions, (c) 3 to 8 parts by weight of sulfamic acid, (d) 0 to 20 parts by weight of an anhydrous non-reducing organic acid such as malic acid or succinic acid and (e) 10 to 30 parts by weight of an anhydrous alkali metal phosphate. The pH of a 1% by weight aqueous solution of this composition is between about 1.2 and 5.5. The aforementioned compositions, however, are directed to dry or powder compositions and thus do not contemplate the problems associated with aqueous liquid bleach solutions.
In particular, it is well known that the addition of an aqueous hypochlorite solution to an acidic cleaning solution will generally result in the evolution of potentially dangerous amounts of chlorine gas. A number of compositions have been proposed in an attempt to overcome this problem. U.S. Pat. No. 3,749,672 is directed to buffered aqueous solutions having a pH between 4 and 11 which are prepared by adding a hypochlorite such as sodium hypochlorite to certain N-hydrogen compounds such as sulfamic acid. In particular, it is said that stable bleaching compositions under acid conditions (e.g. pH of about 4.0 to 6.9) may be obtained when there is an excess of sulfamate (e.g., a mole ratio less than 2:1 of hypochlorite to sulfamate). However, the presence of the excess sulfamate is likely to result in a hypochlorite-sulfamate complex which will decrease the bleaching kinetics or efficiency of the composition.
U.S. Pat. No. 5,503,768 describes a halogen scavanger constituted by an aromatic ring and at least one group which contains a lone-pair-containing hetero atom adjacent to the aromatic ring. The electron donating aromatic compound, i.e., the halogen scavenger, can be added to an acid cleaner which when mixed with an oxidizing agent such as sodium hypochlorite prior to use suppresses the release of halogen gas. It is reported that it is desirable to add the electron donating aromatic compound to the acid cleaner in an approximately equal molar amount to the halogen estimated to be released upon the mixture of the acid cleaner with the oxidizing agent.
There continues, however, to be a need for acidic bleaching compositions that do not result in the substantial generation of potentially hazardous chlorine gas when a hypochlorite solution is mixed with an acidic solution. Such acidic bleaching compositions, i.e., low chlorine gas generation, that have excellent bleaching efficacy are particularly desirable.

Acidic bleaching solution, method of preparation and a bleaching system for forming the same


A suction cleaner includes a base unit (1) and a body unit (2) mounted on the base unit. The base unit (1) incorporates a downwardly-facing suction opening (1a) and the body unit (2) houses a dust-collection receptacle. The body unit (2) is provided with a pipe (7) for delivering dust-laden air from the base unit (1) to the dust-collection receptacle. The pipe (7) is made of a transparent material and is detachably mounted on the cleaner.

This invention relates to a suction cleaner, and in particular to an upright suction cleaner.
An upright suction cleaner typically includes a base unit, a rigid upright body mounted on the base unit, and a handle. The base unit includes ground wheels or rollers, a suction opening confronting the floor to be cleaned, and a rotary beater disposed in the suction opening for beating the region of the floor confronting the suction opening. The rigid upright body houses a dust bag and a motor/fan unit. In use, the fain draws dust-laden air through the suction opening, and delivers it to the dust bag via a pipe positioned in the upright body.
A problem with this type of cleaner is that dirt tends to clog in the pipe leading from the base unit to the dust bag, and this leads to reduced pick-up of dirt and hence reduced cleaning efficiency. Once the pipe is clogged with dirt, it is necessary to dismantle the machine to clear the clog.


Since it is difficult to emit a stable and reliable modulated lightwave signal by means of IQ modulators used for QAM format, a method for controlling an optical transmitter according to an exemplary aspect of the invention includes the steps of (a) keeping an optical amplitude of a continuous wave light output from the optical transmitter constant, (b) making operating point values in optical modulation converge to predetermined values during step (a), and (c) modulating the continuous wave light with multiple amplitudes and phase levels around the operating point values converged in step (b).

One way to cope with the increasing demand for transmission of information on optical fiber links and to optimize the investment in optical fiber links is to use more efficiently the bandwidth available in one link in order to increase its capacity. A Wavelength Division Multiplexing (WDM) technology enables to increase the number of transmitted channels by adding more transmitters and receivers using different wavelengths. However, the characteristics in WDM system are limited by the bandwidth of the amplifiers inside the link and the wavelength dependency on active or passive components inside the link. Therefore, the practical usage of WDM system is limited to the S band (Short band), C band (Conventional band), or L band (Long band) in the optical spectrum.
Another way to increase the capacity of a link is to increase the Spectral Efficiency (SE) by using more efficient modulation formats for the transmitted information. This can be used in conjunction with WDM. Optical communication systems with transmission rates up to 10 Gb/s mainly utilizes On Off Keying (OOK) for modulation, where the information is coded on two amplitude levels of the lightwave signal. Besides, higher capacity systems utilize the modulation scheme based on Quadrature Phase Shift Keying (QPSK), which codes the information on four phase levels. Therefore, two binary bits can be coded per transmitted symbol. This is illustrated in the non patent literature 1 (NPL1). In this manner, the necessary bandwidth of the optical spectrum required to transmit information is used more efficiently.
The other way to increase even more the spectral efficiency in a channel, and therefore the link capacity, is to use Quadrature Amplitude Modulation (QAM), where symbols are coded on phase and amplitude levels, and are organized as a combination of multi-level amplitudes in quadrature phase. An example of QAM system is disclosed in the non patent literature 2 (NPL2). In NPL2, the modulation format is 16QAM, where the information is coded into 16 levels, that is, 4 binary bits per symbol. This enables to increase the spectral efficiency as compared to QPSK. Furthermore, in the non patent literature 3 (NPL3), the use of 512QAM is disclosed, where the information is coded into 512 levels, that is, 9 binary bits per symbol, and the spectral efficiency increases even more as compared to 16QAM. Therefore QAM format is an efficient way to increase link capacity.
As illustrated by NPL2 and NPL3, there is a trade off between the achievable Spectral Efficiency (SE) and the achievable transmission distance. Therefore, depending on the distance on the fiber link with signal being transmitted, it is advantageous to be able to select the index of QAM format, i.e. the number of modulated symbols on the constellation or in other words power-of-two of the number of binary bits coded on one symbol, to optimize this trade-off. The use of a transmitter, which can emit light modulated at different QAM index depending on its setting, is an economically effective way to optimize this trade off.
QAM format can be performed with an optical IQ modulator, sometimes called Cartesian modulator, vector modulator, Dual Parallel modulator or nested modulator depending on the sources. In an IQ modulator, the electric signals drive two independent Mach-Zehnder devices, which can be called children Mach-Zehnder Modulators (MZM). The children MZM modulate the phase and amplitude of the same optical carrier wave. The phase in one of their outputs is relatively delayed by 90 degrees before being recombined. The phase delay between the outputs of the children MZM can be called an angle of quadrature and is ideally 90 degrees, modulo 180 degrees. These IQ modulators are used in NPL2 and NPL3 for QAM format and also used in NPL1 for QPSK modulation. These IQ modulators offer an efficient and proven way to perform QAM format.
However, it is known that there is a drift of DC (Direct Current) bias in IQ modulator due to variation of the temperature or ageing of the device. There are three types of affected biases, that is, the DC biases of each of the two children MZM and DC bias used to set the angle at quadrature. This is already known about QPSK modulation and also known about QAM format if it uses a modulator having the same structure. Drifts in biases result in incorrectly setting the modulator, which causes a degradation of the transmitted signal, and therefore a degradation of the received signal quality or in worst cases the impossibility to decode the received signal. This trouble is likely to be revealed in the characterization tests of the modulator at the production stage or at the assembly stage of the transmitter in which it is used, and at each time the modulator is first used for modulation of data, that is, at each start-up or reset operation. The same trouble is also likely to occur during the operation of the modulator. These troubles are solved for OOK, Phase Shift Keying (PSK) modulation and QPSK by using Auto Bias Control (ABC) circuits, which controls the biases of the modulators and to compensate for the DC bias change. In this manner, ABC technology can manage the drift of DC bias both at start-up or reset, and during operation.
The non patent literature 4 (NPL4) discloses a scheme which can be used for ABC to control the 90 degree phase between the outputs of the Mach-Zehnder devices. It is based on minimizing the RF power spectrum of the modulated signal. The underlying principle is that the interferences between I and Q data components enhance the RF power spectrum, and therefore that the angle of quadrature can be controlled by minimizing the RF power spectrum. This scheme in conjunction with known methods used to control the DC biases of children MZM enables to control the DC biases of an IQ modulator for QPSK modulation.
In the patent literature 1 (PTL1), the same principle as that of NPL4 is used and moreover, a dither frequency is added to control the angle of quadrature by controlling monitored spectral components relative to the dither frequency. In addition, it also explicates ABC circuits based on dithering for the control of the DC bias of the Mach-Zehnder devices. In the same way as for NPL4, such a method is effective for QPSK. It enables to compensate for the bias changes during operation and before the start-up of the modulator for QPSK.

Optical transmitter and method for controlling the same


A clock generator suitable for use with memory devices enables generation of memory clock signals having odd or even division ratios, an optional phase shift and a 50% duty cycle. First and second clock gate circuits receive a base clock signal and an inverted version thereof, respectively, and are both gated by the output of two comparators that are set when a value of a down counter receiving the base clock signal reaches a predetermined value. The clock gate circuits each include a multiplexer and D-type flip-flop. The output from either flip-flop, or both their outputs ‘ORed’ together, may be used as a memory clock depending on the desired division ratio and phase shift. The generator is particularly suitable for DDR memory applications that require both edges of the clock signal are evenly placed for launching data on both rising and falling edges.

The present invention relates generally to a clock signal generator and, more particularly, to the generation of clock signals for memory devices or for synchronous interfaces such as communications interfaces.
In a system where a memory controller is connected to one or more memory devices (such as dual data rate (DDR) or static random access (SRAM) memory) via an interface, the memory controller generates a clock signal for the memory interface. All other interface signals (such as addresses, data and command signals) that are sent from the memory controller over the interface to the memory device(s) are synchronous with this clock signal.
The memory devices require specific and precise timing at their data, address and clock inputs. As typical memory boards have dense routing in terms of numerous wires, providing suitable and exact timing of the data and address signals, as well as the corresponding clock signals, places a high requirement on the memory interface. If the memory interface fails to meet the requirements, the timing at the inputs to the memory devices may be different from the timing at the corresponding outputs of the controlling devices, which may impair the overall performance of the memory systems.
In order to satisfy the timing requirements, conventional solutions shift the phase of the clock signals. Some known solutions employ phase locked loops (PLL) with phase mixers or delay locked loops (DLL) to optimize the phase relationship of a clock signal with regard to a data signal. However, PLLs and DLLs consume a considerable amount of silicon area and power and are time-consuming to characterize. Further, PLLs and DLLs are frequency band dependent and so cannot be used outside a specified frequency range. Other known solutions use shift registers to achieve a phase shift. However, when different clock division ratios are required, this necessitates increasing the number of flip-flops and therefore, silicon area and power requirements. Another known arrangement employs a clock divider counter value, comparator and a combination of latches and logic gates to phase shift a divided base clock signal. However, this arrangement cannot generate a clock signal with a 50% duty cycle nor can it be used for dual data rate interfaces which require that both edges of the clock signal are evenly placed for launching data on both rising and falling edges of the clock.
Thus it would be advantageous to provide an apparatus for generating a clock signal that mitigated at least some of the above-mentioned disadvantages of the known systems.


A sensor system detects the occurrence of two-phase flow by comparing records of fluidelastic force coefficients, which are characteristically different for single-phase and two-phase flows. A baseline of measurements is obtained for a single phase flow, and a baseline of measurements is obtained for a two-phase flow. Measurements of the amplitude and phase of the fluidelastic forces are recorded, and the corresponding fluidelastic force coefficients computed. The fluidelastic force coefficients can be determined for any flow, and compared to the baselines to determine whether the flow is a single-phase or two-phase flow.

1. Field of the Disclosure
The present disclosure relates to flow regimes in pipes. In particular, the present disclosure relates to sensor systems for detecting flow regimes in pipes.
2. Description of the Related Art
The "background" description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description which may not otherwise qualify as prior art at the time of filing, are neither expressly or impliedly admitted as prior art against the present invention.
In power generation industries, such as the oil industry, flows in pipes and containers are carefully monitored, often with continuous online measurements of the flow patterns in pipe systems such as oil and gas pipelines, flow in boiler and reactor pipes; etc. In particular, local changes from single-phase flow to two-phase flow and flow pattern changes within two-phase flow are frequently monitored in areas such as pipe bends or in vertical segments of the pipe system where gravitational effects can modify the flow regime. A liquid in a two-phase flow is a mixture of two phases of a component, with different densities, at a certain ratio. This respective distribution or a ratio of a liquid to a vapor phase for example, is an important characteristic of two-phase flow. Similarly to the transition between laminar and turbulent flows in pipes, the transition between single-phase and two-phase flow, and flow regime changes can affect the performance of a pipe system. Accordingly, predicting the onset of two-phase flow or changes in the two-phase flow, i.e. changes in the ratio between the two fluids, are used to maximize system performance. Heat transfer models used in the industry to predict in-tube boiling and condensation are based on local flow patterns. Two-phase flow may develop during part of a steam cycle, wherein a mixture of gas and liquid may exist due to evaporation and condensation of steam. The ability to predict the occurrence of two-phase flow and to accurately determine its pattern is key to modeling phenomena such as evaporation and condensation. Accordingly, it is important to be able to accurately determine and model a transition from single-phase flow to a two-phase flow pattern, as well as transitions from one type of two-phase flow pattern to another.
Assessing whether a flow in a pipe system is a single phase flow or a two-phase flow is challenging. Depending on the nature of the flow, a different model may need to be used as an input, to provide an accurate heat transfer model for example. Furthermore, two-phase flow includes a variety of flow regimes, which require changes to a modeling scheme to obtain better accuracy in reproducing flow patterns.
Current techniques for measuring the two-phase flow include using Venturi pressure drop, Coriolis, electromagnetic, and cross-correlation flow meters, gamma-densitometry tomography, and electrical-impedance tomography. Empirical calibration is the prime methodology adopted by such techniques, while the detailed fluidelastic analysis has played a minimal role in instrument design and operation. Literature related to two-phase flow measurements also describes the use of time-of-flight pressure measurements, ultrasound wave trains, a flowmeter in a closed conduit, echoes of acoustic energy, speed of sound measurements and a Helmholtz resonator.
A phenomenon of cross-flow-induced vibrations is common to both the single-phase and two-phase flows. A cross-flow over a body induces fluidelastic coupling forces that cause a tube immersed in the flow to vibrate due to several fluid-structure interaction mechanisms; e.g. vortex shedding, fluidelastic whirling, turbulent buffeting, etc. For example, a cross-flow over a cylindrical body generates a Karman vortex sheet in the wake region of the body. Periodic shedding of these vortices from the surface of the body induces periodic pressure variations on the body which in turn give rise to flow-induced vibrations. Such vibrations frequently exist in direction both transverse and parallel to the cross-flow direction.
The characteristics of the cross-flow-induced vibrations are quite different for single-phase and two-phase flows due to different fluid-structure interactions. In two-phase flow, the presence of air bubbles give rise to random excitations of the cylinder; thus resulting in larger vibration amplitudes than in single-phase flows. Accordingly, the main difference between single-phase and two-phase flows is the variable buffeting force in the two-phase intermittent flow regime.

Two-phase flow sensor using cross-flow-induced vibrations

King Fahd University of Petroleum and Minerals

King Abdulaziz City for Science and Technology


A system and method for providing warnings and directives based upon gunfire detection is described herein. Specifically, gunfire detection system can comprise a memory that stores an application, and a one or more zone plans, wherein said zone plan comprises directives relating to a one or more output devices spanning across a monitored area comprising a one or more zones. The gunfire detection system can further comprise a processor that, at the direction of said application, determines whether gunfire has occurred and a location associated with said gunfire, and implements one of said zone plans based on said location.

This disclosure relates to a system and method for providing warnings and directives based upon gunfire detection.
During recent years, gun crimes occurring on school campuses, in office buildings, and other areas of mass aggregation, have increased. Since 2000, there have been over sixty campus shootings, including the shooting at Virginia Tech where 32 students lost their lives. One problem a campus may face during a shooting is its size. While a gunshot can be loud, some campuses can be of a size that gunfire could not be heard on all portions of the campus. Further, while some students may hear the noise, they may believe the noise to be some other sound such as firecrackers or construction. Aside from communicating that a shooting has occurred, campuses also face the problem of directing students where to go or what to do in the event of a shooting. Such chaos resulting from students moving without direction (such as fleeing) could prohibit first responders from reaching the scene in time, or allow individuals to move into the line of fire.
As such, it would be useful to have a system and method for providing warnings and directives based upon gunfire detection.

System and method for providing warning and directives based upon gunfire detection


A semiconductor integrated circuit device formed with a single semiconductor substrate has, in one embodiment, an input buffer for receiving an input signal, memory blocks each producing an output signal responsive to the input signal and an output data selecting circuit for selectively transferring an output of one or more of the memory blocks. The input buffer, memory blocks and output data selecting circuit are arranged on the single semiconductor substrate in an order of progress of signal processing operations to be performed in the semiconductor integrated circuit device.

The present invention relates to a semiconductor integrated circuit device, and in particular to a technique which is especially effective in application to ASIC (application specific integrated circuits) memories comprising a plurality of bipolar transistor RAMs (random access memories) as basic constituents, for example. Bipolar transistor RAMs (hereafter referred to as bipolar RAMs) comprising bipolar transistor memory cells and cascade-connected ECL (emitter coupled logic) gate circuits (custom gates) as basic constituents are known. Further, there are also known ASIC memories comprising a combination of such bipolar RAMs and predetermined logic blocks.
Bipolar RAMs are described in JP-A-58-60487 published on Apr. 9, 1983, for example.
A semiconductor memory device comprising a plurality of RAM blocks and logic circuit blocks disposed near the RAM blocks is disclosed in U.S. Pat. No. 5,023,835 issued Jun. 11, 1991 and assigned to the same assignee as the present application and, which is a continuation application of U.S. patent application Ser. No. 13,550 filed on Nov. 2, 1987 and now abandoned.
In advance of the present invention, the present inventors developed an ASIC memory device as shown in FIG. 1. In FIG. 1, the ASIC memory device comprises six random access memories RAM0 to RAM5 comprising bipolar RAMs formed on one semiconductor substrate SUB, an input buffer IB1 for receiving a read selecting signal RS0-RS5 and a write selecting signal WS0-WS5 and generating an internal read selecting signal rs0-rs5 and an input write selecting signal ws0-ws5, an internal buffer IB2 for receiving an address signal A0-Ai and generating an internal address signal a0-ai, an input buffer IB3 for receiving a write data signal WD0-WDn and generating an internal write signal Wd0-Wdn, and an output data selecting circuit DSL for selectively outputting an output signal rd00-rd0n, rd10-rd1n, . . . , rd50-rd5n as a memory output signal RD0-RDn responsive to the internal read selecting signal rs0-rs5. On the substrate SUB, the input buffers IB1-IB3 are disposed nearly halfway between a side of the substrate where the input signals RS0-RS5, WS0-WS5, A0-Ai and WD0-WDn, and received and another side of the substrate where the memory output signal RD0-RDn is outputted, i.e., the input buffers IB1-IB3 are disposed nearly in the center of the arrangement of the random access memories RAM0-RAM5. The random access memory RAM0 RAM5 is started by the internal address signal a0-ai to start a predetermined read operation. Further, a corresponding internal write selecting signal ws0-ws5 is alternatively set at a high level to execute a predetermined write operation. In this ASIC memory device, the above described input buffers IB1-IB3 are disposed in the center of the random access memories RAM0-RAM5 as described above. Therefore, variations in propagation delay time taken for the input signals such as the address signal A0-Ai to reach respective random access memories are limited. The overall access time of the ASIC memory device is thus shortened equivalently.
As the performance of the digital system comprising an ASIC memory device is raised and an increase in storage capacity and a higher speed are demanded upon the ASIC memory device, it has been made clear that the following problems occur in the above described ASIC memory device. That is to say, in the above described ASIC memory, the input buffers IB1-IB3 for transferring the input signals such as the read selecting signal, the write selecting signal, the address signal and the write data signal are disposed in the center of the random access memories RAM0-RAM5 as described before. In the central portion of the ASIC memory device, therefore, an area having concentrated signal conductors is generated, and layout design for the memory device becomes complicated. Further, since respective signals are transferred via signal conductors which are not necessarily disposed in order of progress of signal processing operations, the overall signal conductor length of the ASIC memory device is increased and the propagation delay time is also increased. Further, there still remain variations in propagation delay time taken for input signals to reach respective random access memories. On the other hand, variations in propagation delay time taken for output signals of respective random access memories to reach the output data selecting circuit DSL tend to, on the contrary, increase because of the above described arrangement of the input buffers.
As shown in FIG. 2, access time t.sub.AC of this ASIC memory device is equivalent to the sum of the maximum value t.sub.ADX of address signal propagation delay time taken for the address signal to reach the random access memory RAM0-RAM5, the maximum value t.sub.RAX of RAM access time elapsing from the time when the internal address signal a0-ai is inputted to the random access memory RAM0-RAM5 until the time when the signal read out from the RAM0-RAM5 becomes valid, and the maximum value t.sub.ODX of output data propagation delay time taken for the output signal of the random access memory RAM0-RAM5 propagating to the output terminal of the output data selecting circuit DSL. Since variations still remain in the propagation delay time of respective signals and the overall delay time value is increased as described before, shortening of the access time t.sub.AC of the ASIC memory device is limited. As a result, enhancement in performance of a digital system comprising an ASIC memory device is limited.

Semiconductor integrated circuit device having various blocks specifically arranged on a single semiconductor substrate for high speed operation


An integrated semiconductor memory includes a clock generator circuit driven by an external clock signal and a control circuit driven by the external clock signal. The clock generator circuit generates an internal clock signal with a first level if the external clock signal level lies above a sensitivity level of the clock generator circuit for at least the duration of a sensitivity time of the clock generator circuit, and generates the internal clock signal with a second level if the external clock signal level lies below the sensitivity level for at least the duration of the sensitivity time of the clock generator circuit. The control circuit controls the clock generator circuit such that the control circuit selects the sensitivity time of the clock generator circuit in response to characteristics of the external clock signal.

In integrated semiconductor memories, for example DRAM (Dynamic Random Access Memory) semiconductor memories, memory operations are generally triggered upon rising and falling edges of clock signals. For this purpose, the integrated semiconductor memory is driven with an external clock signal by a memory controller. The external clock signal is fed to a clock generator circuit in the semiconductor memory. The clock generator circuit generates, from the clock signals fed to it externally, an internal clock signal having a higher frequency and phase stability than the external clock signal.
FIG. 4 shows an integrated semiconductor memory 100 having a clock generator circuit 10 for generating an internal clock signal Cint. The integrated semiconductor memory has a clock terminal T100a for application of an external clock signal Cext and a clock terminal T100b for application of a reference signal Vref. The external clock signal Cext and the reference signal Vref are fed to the clock generator circuit 10 via input terminals E10a and E10b connected to the clock terminals T100a and T100b. After evaluation of the two signals, the clock generator circuit 10 generates the internal clock signal Cint at an output terminal A10, said internal clock signal being fed to a control circuit 20. The control circuit 20 is connected to a control terminal S100 of the integrated semiconductor memory via an input terminal E20. For the purpose of storing data and for the purpose of reading out data, the control circuit 20 is driven with external control signals at the control terminal S100. In this case, the external control signals are read in and evaluated by the control circuit 20 synchronously with respect to rising and falling edges of the internal clock signal Cint. The integrated semiconductor memory furthermore has an address register 30, which, on the input side, is connected to an address terminal A100 for application of address signals AS. The address signals AS are buffer-stored in the address register 30 and fed to the control circuit 20.
For a read and write access, the control circuit 20 evaluates the address signals AS upon rising and falling clock edges of the internal clock signal Cint and drives memory cells SZ associated with the addresses in a memory cell array 40. Two memory cells SZ, designed as DRAM memory cells, are illustrated by way of example in the memory cell array 40. The DRAM memory cells SZ have a storage capacitor SC that can be conductively connected to a bit line BL via a selection transistor AT. In order to read out a data value from the memory cell or in order to write a data value to the memory cell, the selection transistor is turned on by means of a signal on a word line WL that is generated by the control circuit 20. In the event of a read access, the memory information is read out via the bit line BL at a data terminal DIO. In the event of a write access, a data value to be written in is applied to the data terminal DIO and written to the memory cell via the bit line BL.
FIG. 5 illustrates the functioning of the clock generator circuit 10. The diagrams in each case show the profile of a voltage amplitude U of external and internal clock signals against a time t.
The first diagram of FIG. 5 shows the profile of an external clock signal Cext1. In this case, the voltage amplitude fluctuates between a high first clock signal level PE1 and a low second clock signal level PE2 during a pulse duration TD.
The second diagram of FIG. 5 shows the profile of the internal clock signal Cint generated by the clock generator circuit 10 in the case of driving with the external clock signal Cext1 of the first diagram of FIG. 5. In this case, the voltage amplitude of the internal clock signal fluctuates between a first high level PI1 and a second low level PI2. If the voltage amplitude of the external clock signal Cext1 exceeds a sensitivity level Vref of the clock generator circuit 10, the clock generator circuit 10 generates the internal clock signal with the high level PI1. If, by contrast, the voltage amplitude of the external clock signal Cext1 falls below the sensitivity level Vref (crossing point), the clock generator circuit 10 generates the internal clock signal with the low level PI2.
A sensitivity time TE of the clock generator circuit 10 is furthermore depicted in the first diagram of FIG. 5. In this case, the sensitivity time TE is the time for which the voltage amplitude of the external clock signal must be present at least at the clock generator circuit 10 in order that the clock generator circuit 10 can generate the first or second level of the internal clock signal Cint. A change in the amplitude of the external clock signal above or below the value of the reference signal is thus interpreted by the clock generator circuit 10 as a change between the two levels of the internal clock signal PI1 and PI2 only when the external clock signal assumes an amplitude value above or below the reference signal Vref at least for the time period of the sensitivity time TE.
The third diagram of FIG. 5 shows an external clock signal Cext2 having a lower signal/noise ratio than the external clock signal Cext1. The fourth diagram of FIG. 5 shows the profile of the internal clock signal Cint if the clock generator circuit 10 is driven by the noisy signal level of the external clock signal Cext2 of diagram 3. The internal clock signal Cint exhibits a plurality of changes between the high and low level of the internal clock signal PI1 and PI2 in particular at the rising and falling edges F1 and F2 of the external clock signal Cext2. These high-frequency changes in the internal clock signal arise by virtue of the fact that the signal amplitude of the noisy external clock signal Cext2, in the region of the rising and falling edges, repeatedly lies above and below the level of the reference signal Vref. The input noise (jitter) of the external clock signal thereby leads to an uncontrolled switching behavior of the internal chip logic.
FIG. 6 shows an embodiment of the clock generator circuit 10 corresponding to the prior art. The clock generator circuit is designed as a differential amplifier connected between a terminal V10a for application of a supply voltage VDD and a terminal V10b for application of a reference voltage VSS. The differential amplifier has a first input transistor 13, which is connected by its control terminal to the input terminal E10a of the clock generator circuit, and a second input transistor 14, which is connected by its control terminal to the input terminal E10b of the clock generator circuit.
In contrast to the simplified embodiment of the clock generator circuit of FIG. 4, the differential amplifier in FIG. 6 is driven by a first external clock signal CLK and an external clock signal /CLK complementary thereto. Such driving is generally used in a computer application if the integrated semiconductor memory is driven by a memory controller, for example. The clock generator circuit generates a low to high or high to low level transition if the profile of the amplitude of the first external clock signal CLK intersects the profile of the amplitude of the second external clock signal /CLK (crossing point). A current source 17b generates a current I at a common terminal GS of the input transistors 13 and 14. Furthermore, the input transistors 13 and 14 are connected via an active load comprising the transistors 15 and 16, which are connected up as a current mirror, to the terminal V10a for application of the supply voltage VD. On the output side, the differential amplifier generates an output signal DS, which is fed to a latch 18. The latch comprises two feedback inverters 19a and 19b connected to the output terminal A10 of the clock generator circuit 10. The inverter 19a generates the high or low level of the internal clock signal Cint on the output side. It is generally designed as an amplifier having a high gain, whereas the inverter 19b is designed as an amplifier having a low gain. The feedback via the inverter 19b acts as a positive feedback. The positive feedback prevents the changeover of the differential amplifier in the event of momentary amplitude fluctuations of the input clock signal CLK.
The circuit described makes it possible to significantly reduce the generation of undesired clock signal transitions of the internal clock signal on account of a noisy external input clock signal. However, the disadvantage of this solution to the problem lies in the positive feedback, which leads to a reduced sensitivity of the differential amplifier with regard to level fluctuations of the external clock signal at its input terminals E10a and E10b. In the case of weak external clock signals having a low high level or a high low level, the high-low or low-high transitions of the external clock signal are no longer identified by the differential amplifier. Furthermore, the frequency of the internal clock signal which can be generated by means of the differential amplifier 10 is limited by the intensity of the feedback. The clock generator circuit is thereby slowed down.
It is also disadvantageous that the so-called duty cycle of the clock generator circuit, which characterizes the ratio of high/low times becomes highly process-dependent as a result of the positive feedback. Changes in the saturation current of the p-channel and/or n-channel transistors of the inverters 19a and 19b cause the feedback of the high and low levels to have different intensities in the case of the positive feedback. The duty cycle for weak or very high-frequency external clock signals is considerably impaired as a result.
The process dependence of the feedback also has a problematic effect in particular when the differential amplifier 10, as shown in FIG. 4, is driven at its second input transistor 14 by a constant reference signal Vref rather than by the complementary external clock signal /CLK. Integrated semiconductor memories are driven by a constant level of a reference signal at one of the clock terminals by test systems for test purposes, in particular.

Integrated semiconductor memory with clock generation


A tank assembly for a 3D printing system may include a membrane assembly that is releasably secured to a bottom rim of a tank sidewall of the tank assembly. The securing mechanism may include one or more of a friction-fit coupling and a magnetic coupling. The membrane assembly may include a frame, a radiation-transparent flexible membrane and a membrane securing member. A peripheral portion of the flexible membrane may be secured within a groove of the frame by the membrane securing member. The tank sidewall may include one or more components for supplying fresh resin to the tank assembly and one or more components for draining used resin from the tank assembly.

3D printing is becoming ever more widespread, allowing three-dimensional objects to be fabricated (often in a short amount of time) in any facility (i.e., room, garage, laboratory, etc.). Typically, cross-sections of a three-dimensional object are modelled and saved into a digital format, and the three-dimensional object is fabricated layer by layer using the cross-sectional models.

Tank assembly and components thereof for a 3D printing system


An emission control catalyst that exhibits improved CO and HC reduction performance includes a supported platinum-based catalyst, and a supported palladium-gold catalyst. The two catalysts are coated onto different layers, zones, or monoliths of the substrate for the emission control catalyst such that the platinum-based catalyst encounters the exhaust stream before the palladium-gold catalyst. Zeolite may be added to the emission control catalyst as a hydrocarbon absorbing component to boost the oxidation activity of the palladium-gold catalyst.

1. Field of the Invention
Embodiments of the present invention generally relate to supported catalysts containing precious group metals and, and more particularly, to engine exhaust catalysts containing palladium and gold, and methods of production thereof.
2. Description of the Related Art
Many industrial products such as fuels, lubricants, polymers, fibers, drugs, and other chemicals would not be manufacturable without the use of catalysts. Catalysts are also essential for the reduction of pollutants, particularly air pollutants created during the production of energy and by automobiles. Many industrial catalysts are composed of a high surface area support material upon which chemically active metal nanoparticles (i.e., nanometer sized metal particles) are dispersed. The support materials are generally inert, ceramic type materials having surface areas on the order of hundreds of square meters/gram. This high specific surface area usually requires a complex internal pore system. The metal nanoparticles are deposited on the support and dispersed throughout this internal pore system, and are generally between 1 and 100 nanometers in size.
Processes for making supported catalysts go back many years. One such process for making platinum catalysts, for example, involves the contacting of a support material such as alumina with a metal salt solution such as hexachloroplatinic acid in water. The metal salt solution "impregnates" or fills the pores of the support during this process. Following the impregnation, the support containing the metal salt solution would be dried, causing the metal salt to precipitate within the pores. The support containing the precipitated metal salt would then be calcined (typically in air) and, if necessary, exposed to a reducing gas environment (e.g., hydrogen or carbon monoxide) for further reduction to form metal particles. Another process for making supported catalysts involves the steps of contacting a support material with a metal salt solution and reducing the metal ions to metal particles in situ using suitable reducing agents.
Supported catalysts are quite useful in removing pollutants from vehicle exhausts. Vehicle exhausts contain harmful pollutants, such as carbon monoxide (CO), unburned hydrocarbons (HC), and nitrogen oxides (NOx), that contribute to the "smog-effect" that have plagued major metropolitan areas across the globe. Catalytic converters containing supported catalysts and particulate filters have been used to remove such harmful pollutants from the vehicle exhaust. While pollution from vehicle exhaust has decreased over the years from the use of catalytic converters and particulate filters, research into improved supported catalysts has been continuing as requirements for vehicle emission control have become more stringent and as vehicle manufacturers seek to use less amounts of precious metal in the supported catalysts to reduce the total cost of emission control.
The prior art teaches the use of supported catalysts containing palladium and gold as good partial oxidation catalysts. As such, they have been used extensively in the production of vinyl acetate in the vapor phase by reaction of ethylene, acetic acid and oxygen. See, e.g., U.S. Pat. No. 6,022,823. As for vehicle emission control applications, U.S. Pat. No. 6,763,309 speculates that palladium-gold might be a good bimetallic candidate for increasing the rate of NO decomposition. The disclosure, however, is based on a mathematical model and is not supported by experimental data. There is also no teaching in this patent that a palladium-gold system will be effective in treating vehicle emissions that include CO and HC.

This patent is subject to a terminal disclaimer.

Engine exhaust catalysts containing palladium-gold


The disclosed invention provides a distributed directional aperture (DDA) system that is installed in a vertical lift aircraft that comprises a fuselage and a rotor system including rotary wings rotatably coupled to the fuselage. The DDA system provides capability to receive and/or transmit signals in one or more frequency bands, and provides communications, signals intelligence (SIGNINT), positional sensing, jamming, and offensive cyber on the vertical lift aircraft. The DDA system of the vertical lift aircraft includes a sensor and emitter array subsystem that includes a plurality of sensors and emitters distributed in the rotary wings, a beamformer subsystem that processes the sensor signals and emitter signals, and a telemetry subsystem that conveys signals between the sensor and emitter array subsystem and the beamformer subsystem.

Apertures are commonly known to be used to receive and transmit energy for various purposes, including cooperative communications, uncooperative signal intercept, uncooperative signal interference, and positional sensing. Apertures encompass systems that consist of a single sensing or emission element and provide substantially omnidirectional performance. Apertures also encompass systems that consist of many elements and are collectively used to transmit or receive energy in a restricted direction, thereby increasing the quality of the reception or transmission. The techniques for restricting energy sensing or emission to a limited direction are commonly known as beamforming. Directional apertures have been an implementation challenge at higher frequencies due to processing and data transfer speed limitations.
Most commonly-used apertures consist of a single antenna that receives and transmits signals omnidirectionally. Each such aperture is dedicated to a single, unalterable purpose, is connected to a specific electronic system, and is sensitive to a limited range of signal characteristics. As a result of these "stovepipes", many entities are burdened with an excess number of apertures. The excess number of apertures, and the corresponding stovepiped telemetry, has a negative effect on the platform's structure, aerodynamics, and radar observability. In addition, the omnidirectional aperture reception characteristics limit received signal quality, while the omnidirectional transmission characteristics may provide an opportunity for interception by an adversary.
For these reasons, vertical lift aircraft, such as helicopters, are particularly challenged for aperture placement due to the fuselage shape. It is difficult to look up through the moving rotor blades and there are no fixed wings which are convenient aperture mounting points for fixed wing aircraft.

Distributed directional aperture system for rotor wing


The H2LAU20 polypeptides and polynucleotides and methods for producing such polypeptides by recombinant techniques are disclosed. Also disclosed are methods for utilizing H2LAU20 polypeptides and polynucleotides in therapy, and diagnostic assays for such.

The drug discovery process is currently undergoing a fundamental revolution as it embraces `functional genomics`, that is, high throughput genome- or gene-based biology. This approach is rapidly superseding earlier approaches based on `positional cloning`. A phenotype, that is a biological function or genetic disease, would be identified and this would then be tracked back to the responsible gene, based on its genetic map position.
Functional genomics relies heavily on the various tools of bioinformatics to identify gene sequences of potential interest from the many molecular biology databases now available. There is a continuing need to identify and characterise further genes and their related polypeptides/proteins, as targets for drug discovery.
A number of polypeptide growth factors and hormones mediate their cellular effects through a signal transduction pathway. Transduction of signals from the cell surface receptors for these ligands to intracellular effectors frequently involves phosphorylation or dephosphorylation of specific protein substrates by regulatory protein serine/threonine kinases (PSTK) and phosphatases. Serine/threonine phosphorylation is a major mediator of signal transduction in multicellular organisms. Receptor-bound, membrane-bound and intracellular PSTKs regulate cell proliferation, cell differentiation and signalling processes in many cell types.
Aberrant protein serine/threonine kinase activity has been implicated or is suspected in a number of pathologies such as rheumatoid arthritis, psoriasis, septic shock, bone loss, many cancers and other proliferative diseases. Accordingly, serine/threonine kinases and the signal transduction pathways which they are part of are potential targets for drug design.
A subset of PSTKs are involved in regulation of cell cycling. These are the cyclin-dependent kinases or CDKs (Peter and Herskowitz, Cell 1994: 79, 181-184). CDKs are activated by binding to regulatory proteins called cyclins and control passage of the cell through specific cell cycle checkpoints. For example, CDK2 complexed with cyclin E allows cells to progress through the G1 to S phase transition. The complexes of CDKs and cyclins are subject to inhibition by low molecular weight proteins such as p16 (Serrano et al, Nature 1993: 366, 704), which binds to and inhibits CDK4. Deletions or mutations in p16 have been implicated in a variety of tumors (Kamb et al, Science 1994: 264, 436-440). Therefore, the proliferative state of cells and diseases associated with this state are dependent on the activity of CDKs and their associated regulatory molecules. In diseases such as cancer where inhibition of proliferation is desired, compounds that inhibit CDKs may be useful therapeutic agents. Conversely, activators of CDKs may be useful where enhancement of proliferation is needed, such as in the treatment of immunodeficiency.
Frequently, in diseases such as osteoporosis and osteoarthritis, patients have established lesions of bone or cartilage, respectively. Treatment of such lesions requires an agent that will stimulate new bone or cartilage formation to replace that lost to the disease; therefore, there is a need for drugs that increase the number of osteoblasts or chondrocytes, the cells responsible for bone or cartilage formation, respectively. Similarly, replacement of heart or skeletal muscle depleted by diseases such as myocardial infarction or HIV-associated cachexia requires drugs that stimulate proliferation of cardiac myocytes or skeletal myoblasts. The present invention describes a novel human clone, H2LAU20, which shares homology with predicted PSTK's from S. pombe, D. melanogaster, C. elegans, and S. cerevisiae and has motifs associated with other known protein kinases. Inhibitors of H2LAU20 are expected to regulate proliferation of cell growth.


Prior to data transmission, a protocol for performing mutual authentication and sharing a plurality of encryption keys is executed between a CPU 12 on the side of a data transmission apparatus 10 and a CPU 22 on the side of a data receiving apparatus 20. The data transmission apparatus 10 causes the CPU 12 to encrypt data requiring the assurance of a transmission band by a first encryption key and to transmit the data in a first transmission mode via an input/output interface 16, and also to encrypt related data relating to the data by a second encryption key and to transmit the related data in a second transmission mode via the input/output interface 16. The data receiving apparatus 20 causes the CPU 22 to decode, by a first encryption key, the data requiring the assurance of a transmission band received in the first transmission mode via an input/output interface 24, and also to decode, by a second encryption key, the related data received in the second transmission mode via the input/output interface 24.

Recently, for example, systems in which a plurality of AV apparatuses are connected via a digital interface at homes for transmitting and recording digital data such as music information, video information or the like are becoming popular.
For example, in an apparatus such as a video camera, a DVD player or the like having an interface of the IEEE (Institute of Electrical and Electronics Engineers) 1394 high-performance serial bus (hereinafter simply referred to as the IEEE 1394 serial bus), since data can be recorded with high fidelity, it is necessary to prevent data from being illegally copied.
For example, a key is stored indicating whether or not recording of movie information onto a magneto-optical disc apparatus is permitted, and by using this key, authentication is performed as to whether the magneto-optical disc apparatus is an authorized apparatus, that is, an apparatus which has received a license from the copyright holder. Thus, recording of the movie information onto only a magneto-optical disc apparatus which is authenticated as an authorized unit is permitted. In such a case, it is necessary to perform authentication of the counterpart apparatus between an apparatus on the side which transmits movie information (hereinafter referred to as a source) and an apparatus on the side which receives the transmission (hereinafter referred to as a sink).
For the purpose of protecting copyright in such a system, various authentication methods have been proposed. For an authentication protocol used for these authentication methods, an encryption algorithm is often used.
Meanwhile, when transmitting music data between apparatuses, for example, if transmission is stopped during the transmission of the music data or if the quantity of data which can be transmitted is extremely reduced, it becomes impossible for the receiving side to obtain data required for playback and the music might be interrupted. Therefore, it is necessary to transmit music data in a state where a band of a certain extent is secured.
On the other hand, when transmitting information which is not music data itself but is related to music data, for example, lyrics, a photograph of an artist or the like, the real-time property is not required in comparison with the case of transmitting the music data itself. Therefore, it is possible to transmit the information by using a transmission method in which a transmission band is not secured. In general, it is often desired to use the transmission method in which a transmission band is not secured, because the band of the entire transmission line is not used.

Information processing system, information processing method, and information processing device


A plate and facing assembly (10), including a plate (12) and a facing (14) mounted on the plate. The facing (14) defines a substantially circular outer groove (20) and a substantially circular inner groove (22) spaced from the outer groove. The facing (14) defines a waved groove (24) between the outer and inner grooves (20, 22). The outer, inner and waved grooves (20, 22, 24) are interconnected by a plurality of flow grooves (28, 30, 32) defined by the facing (14). The grooves (20, 22, 24) interact to channel the flow of fluid.

The present invention relates generally to a plate and facing assembly. More specifically, the invention is directed to a clutch plate and friction material facing assembly in which the friction material facing defines a plurality of grooves for fluid flow.
Plate and facing assemblies are known in the art. These types of assemblies usually include facings that define spaced concentric circular grooves. The grooves provide channels for the flow of, for example, automatic transmission fluid (ATF). It has been found that these prior art assemblies wear quickly and often produce shudder during use.
There is a need for a plate and facing assembly that is durable and shudder resistant. The present invention satisfies this need.


An image processing device including a storage section, a parallel processing controller, a sequential processing controller, and a selection section which selectively operates the two control sections. The parallel processing controller connects one or more of the image processing modules such that first buffer modules are connected at least one of preceding and following each image processing module, to formulate a first image processing section, and controls such that individual image processing modules perform image processing in parallel with one another. The first buffer modules perform exclusive access control. The sequential processing controller connects one or more of the image processing modules such that second buffer modules are connected at least one of preceding and following each image processing module, to formulate a second image processing section, and controls such that the individual image processing modules perform image processing sequentially. The second buffer modules do not perform exclusive access control.

1. Technical Field
The present invention relates to an image processing device and method, and a storage medium storing a program, and more particularly relates to an image processing device which is provided with an image processing section formed by connecting individual modules in a pipeline form or a directed acyclic graph form, such that buffer modules are connected at least one of preceding and following image processing modules, and an image processing method and a storage medium storing an image processing program, which are for causing a computer to function as the image processing device.
2. Related Art
In an image processing device which carries out image processing on inputted image data, a DTP (desktop publishing) system which is capable of handling images, a printing system which records an image represented by inputted image data on a recording material, or the like, various kinds of image processing are carried out on the inputted image data, such as magnification/reduction, rotation, affine transformations, color conversions, filter processing, image synthesis and so forth. In such devices and systems, in cases in which categories of inputted image data and contents (details), sequencing, parameters and the like of image processing to be applied to the image data are fixed, the image processing can be carried out by specifically designed hardware. However, in a case in which different kinds of image data with, for example, different color spaces, bit counts per pixel or the like are to be inputted and/or the contents, sequencing and parameters and the like of the image processing are to be variously altered, a structure in which the image processing to be executed can be more flexibly altered is needed.
For execution of image processing, as processing systems for a case in which plural image processing modules are combined to formulate an image processing section and carry out desired image processing, a parallel processing system and a sequential processing system can be considered. The parallel processing system carries out image processing at the individual image processing modules in parallel, and the sequential processing system carries out image processing continually at single image processing modules and arranges a sequence of image processing modules which are to carry out the image processing. Of these systems, the parallel processing system is capable of a higher processing speed than the sequential processing system in an operating environment in which resources such as, for example, memory and the like are comparatively plentiful. On the other hand, the sequential processing system operates stably in an operating environment in which resources such as memory and the like are comparatively scarce. Because these processing methods have characteristics which differ from one another in this manner, it is desirable to be able to switch between the processing systems in consideration of various factors, such as configuration of the processing device, operation environment, interaction with other application programs that are being executed at the same time, and the like.
Enabling switching between parallel processing and sequential processing can be realized by, for example, respectively preparing a program for parallel processing and a program for sequential processing. However, in such a case, a workload of development of a program for causing a computer to function as an image processing device will increase. In particular, of the above-mentioned programs, for programs which functions as image processing modules, changes and additions, such as improvements of previous algorithms, additions of image processing modules which perform new image processes and the like, are performed with a comparatively high frequency. However, the respective preparation of a program for parallel processing and a program for sequential processing as programs of an image processing module leads to a very large increase in the workload of program development.
Making a program which is common for parallel processing and for sequential processing can be considered. However, parallel processing and sequential processing differ in that exclusive access control is not required for sequential processing but is necessary for parallel processing. Consequently, when a single common program is made for parallel processing and for sequential processing, unnecessary exclusive access control is applied to the sequential processing, and hence problems arise with reductions in processing speed, wasteful usage of resources and the like. Furthermore, with the parallel processing system, individual image processing modules may be operated as separate threads, and it is possible to rearrange execution priorities of the threads. However, in a case in which a program is a single common program for parallel processing and for sequential processing, it is difficult to perform control of execution priorities as described above during parallel processing.

Image processing device and method and storage medium storing program


A scratch resistant coating for the window of an infra red sensor comprises a layer of zirconium oxynitride or hafnium oxynitride. The formula of the coating is M.sub.1-(y+z) O.sub.y N.sub.z where y and z are both in the range 0.1 to 0.4. The coating and the window are both transmissive in the infra red and visible ranges of the spectrum.

This invention relates to coatings for infra-red transparent materials and applies particularly, but not exclusively, to coatings for multispectral window materials.
Infra-red (IR) radiation means radiation which is in the wavelength range in the region of approximately 1 .mu.m to approximately 14 .mu.m This includes a first IR radiation range of 3 .mu.m to 5 .mu.m and a second IR radiation range of 8 to 14 .mu.m. Radiation in the range 5 .mu.m to 8 .mu.m is largely absorbed by the atmosphere. Measured IR radiation can be used to determine a value of temperature of a body or to observe objects particularly when visible light levels are low.
IR detectors are usually relatively fragile and need to be protested from their environment, for example atmospheric conditions and physical contact. Therefore they are placed behind windows or domes which are made of materials transparent to the radiation that is being detected. Since many IR window materials are inherently soft and have poor scratch reistance, they suffer from erosion. Airborne systems suffer from rain, sand and insect damage inflicted at high velocities. In land based systems a combination of sand and window wipers can cause scratches.
It is known to protect IR windows by coating them with a hard protective coating. Known protective coatings for IR windows include diamond-like carbon (which is disclosed in British Patent GB 2082562 B) and boron phosphide (which is disclosed in British Patent GB 2223510 B).
However, a disadvantage of the use of such coatings is that they do not transmit radiation at visible wavelengths. The term visible refers to wavelengths approximately between 300 nm and 1000 nm (1 .mu.m). Since sensor systems may comprise detectors to detect visible radiation in addition to IR and it is convenient to locate both kinds of detector behind the same window, a hard multi-wavelength coating material is needed.


This combined container-syringe comprising a glass cylinder which can be pre-filled with a drug, an cylindrical tip provided at an exterior portion of an anterior end of the syringe, and a finger grip provided at an exterior portion of an posterior end of the syringe, and a drug is pre-filled therein and sealed by a stopper. Furthermore, an impact absorption part is provided around the exterior portion of the cylindrical tip and a diameter of the impact absorption part is greater than an outer diameter of a fitting part to the cylinder of the cylindrical tip.

1. Field of the Invention
The present invention relates to a combined container-syringe which can be pre-filled with a drug, stored, and immediately used after removal from the package at the time of usage. Priority is claimed on Japanese Patent Application No. 2005-012579 filed on Jan. 20, 2005, the content of which is incorporated herein by reference.
2. Description of the Related Art
A combined container-syringe comprising a glass cylinder, a cylindrical tip fitted at an anterior end of the glass cylinder, a finger grip provided at a posterior end of the glass cylinder, and a drug pre-filled and sealed in the cylinder by a stopper, is well known. This kind of syringe is disclosed by Japanese Unexamined Patent Application, First Publication Nos. H08-141081 and H08-141091, for example. However, in this combined container-syringe comprising the glass cylinder pre-filled with a drug and packaged by pharmaceutical companies, when impactive stress is applied onto an exterior of the syringe pre-filled with the drug and packaged during a distribution process from the pharmaceutical companies to medical institutions or at the time of usage, tiny crack may be formed rarely on the anterior end of the cylinder where the cylindrical tip is fitted. Such accidents cannot be occurred by ordinary handling because the combined container-syringe has enough strength against the stress applied onto the exterior of syringe and packaging for combined container-syringe has enough protection properties against the stress during distribution processes. However, when the packaged syringe is dropped from unexpected height, or impact is applied to the syringe which is taken out from the packaging, the tiny crack may be rarely occurred on the anterior end portion of the cylinder where the cylindrical tip is fitted.


A low viscosity wellbore polymer fluid gelling system comprising an aqueous medium and a water-in-water emulsion comprising a plurality of polymers or oligomers, including at least one removable polymer or oligomer, and at least one gelling polymer or oligomer, wherein said fluid has a low viscosity when injected, and the gelling polymer forms a gel downhole which has a storage modulus of at least about 60 Pa after the removable polymer is removed from the fluid. A method of isolating at least one zone of a subterranean formation penetrated by a wellbore includes the steps of preparing a water-in-water emulsion comprising a plurality of polymers or oligomers including at least one removable polymer or oligomer, and at least one gellable polymer or oligomer; and combining the water-in-water emulsion with an aqueous medium to prepare a low viscosity polymer fluid.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
This invention relates to fluids used in treating a subterranean formation. In particular, the invention relates to the use of water-in-water emulsions which are low viscosity pumpable liquids on the surface, but which form stiff gels downhole useful for isolation of a zone or zones in subterranean formations.
Various types of fluids are used in operations related to the development and completion of wells that penetrate subterranean formations, and to the production of gaseous and liquid hydrocarbons from natural reservoirs into such wells. These operations include perforating subterranean formations, fracturing subterranean formations, modifying the permeability of subterranean formations, or controlling the production of sand or water from subterranean formations. The fluids employed in these oilfield operations are known as drilling fluids, completion fluids, work-over fluids, packer fluids, fracturing fluids, stimulation fluids, conformance or permeability control fluids, consolidation fluids, and the like. Stimulation operations are generally performed in portions of the wells which have been lined with casings, and typically the purpose of such stimulation is to increase production rates or capacity of hydrocarbons from the formation.
Frequently, multiple desired stimulation locations exist in a formation. Sealing devices, such as packers or plugs are usually employed to permit each location to be separately stimulated. This is desirable so that the stimulation operation for each location may be designed for that location, for example, by designing specific flow rates and pressures into the formation. These devices, as well as the casing and cement in the wellbore, prevent loss of stimulation fluids at the location. However, such devices are bulky, expensive, and can be otherwise undesirable. Further, some portions of the well are not cased and cement lined. Conventional sealing devices are not easily used in such areas of the wellbore, and the sealing devices which exist for such use, tend to be less reliable, i.e., inflatable packers.
While various systems have been attempted to seal zones of the wellbore using chemicals such as foams, or gels, such materials have been difficult at best to place into the wellbore, because of the high viscosity of such materials or handling and mixing requirements. High viscosity materials cannot be easily pumped, and many two-part resin systems involve hazardous chemicals such as isocyanate compounds. Many conventional systems are based on crosslinking chemistry, but these have not been wholly satisfactory in form or delivery.
It would be desirable to have a gel system which is low viscosity and pumpable at the surface, and does not require handling or mixing of hazardous materials. This need is met at least in part by the following invention.

Aqueous two-phase emulsion gel systems for zone isolation


A method of producing liquid fuel and/or chemicals from a carbonaceous material entails combusting a conditioned syngas in pulse combustion heat exchangers of a steam reformer to help convert carbonaceous material into first reactor product gas which includes carbon monoxide, hydrogen, carbon dioxide and other gases. A portion of the first reactor product gas is transferred to a hydrogen reformer into which additional conditioned syngas is added and a reaction carried out to produce an improved syngas. The improved syngas is then subject to one or more gas clean-up steps to form a new conditioned syngas. A portion of the new conditioned syngas is recycled to be used as the conditioned syngas in the pulse combustion heat exchangers and in the hydrocarbon reformer. A system for carrying out the method include, a steam reformer, a hydrocarbon reformer, first and second gas-cleanup systems, a synthesis system and an upgrading system.

In recent years, there has been a shift towards innovative energy and environmental technologies to moderate climate change, reduce greenhouse gas emissions, reduce air and water pollution, promote economic development, expand energy supply options, increase energy security, decrease dependence on imported oil, and strengthen rural economies.
One of these technologies entails conversion of a carbonaceous feedstock into a product gas which can then be converted into liquid fuels, hydrocarbons and other useful compounds. Carbonaceous feedstock along with one or more gaseous or liquid reactants are introduced into a pressurized reactor where they undergo one or more thermochemical reactions to produce the product gas. Ideally, the carbonaceous feedstock is introduced into the reactor such that: feedstock throughput is high, the feedstock has high surface area to promote thermochemical reactions, the feedstock is distributed within the reactor, and the pressure of the reactor is maintained, even as the carbonaceous feedstock is continuously being introduced into the reactor.
A liquid fuels production system should be able to produce liquid fuels from large quantities of carbonaceous materials. However, processing large quantities of carbonaceous materials requires having sufficient throughput in each of a number of serially connected systems. These include feeder systems, gas production systems, gas clean-up systems, synthesis systems and gas upgrading systems. The capacities of the various systems should be selected so that they collectively cooperate to meet up-time and fuel production requirements while also maximizing the return on investment (ROI).

System and method for liquid fuel production from carbonaceous materials using recycled conditioned syngas


A body stretching apparatus includes two handgrip placement straps which are connected to a foot support device. Handgrips are installed onto the handgrip placement strap which are held in place by clips. Adjustable clips allow the handgrip placement straps to be adjusted to proper length. In operation, an operator sits on the floor in a "pike" position, grasping the hand grips in stages to stretch the legs and lower back. The individual handgrips are color-coded or otherwise marked with indicia to indicate different levels of stretching ability. The handgrips are conically shaped to make it easier for the operator to grip. In one embodiment, a back support and back strap helps to position the operator's upper body to prevent injury to the operator's lower back. In another embodiment, adjustable slides on the back strap shorten a distance between clasps on the ends of said back strap.

1. Field of the Invention
The present invention relates generally to exercise equipment and relates specifically to a body stretching apparatus.
2. Prior Art
Fitness enthusiasts, runners, gymnasts, athletes, and low back pain sufferers are encouraged to stretch to increase flexibility and reduce injuries. The hamstring muscles and muscles in the lower back area are especially important to keep flexible because these muscle groups tend to tighten as we get older and can cause lower back pain and other injuries. People who have suffered a back injury or stroke, find stretching exercises therapeutic in rehabilitating the back injury or in treating neurologically-induced muscle tightness.
One of the most common ways to stretch these muscle groups is by sitting on the floor, with legs straight in front, reaching toward the toes, in a "pike" position. This maneuver is difficult and uncomfortable for most people. The ideal stretch requires stretching slowly and gradually, holding each stretch for 10-30 seconds. This allows muscle fibers to stretch to their maximum. Many people overstretch the muscles by bouncing. This can cause tears in the muscle fibers and ligaments, causing very painful injuries. It has been documented in exercise physiology that "static" stretching (slow, gradual, in stages) is much more effective than "ballistic" (bouncing) stretching. Improper stretching technique may be particularly hazardous to persons rehabilitating a back injury.
In the past, various types of leg stretching apparatus have been used. However, many apply to martial arts training and ballet in which flexibility is enhanced by stretching in the "split" position, which primarily stretches the inner thigh muscles.
U.S. Pat. No. 4,277,062 to Mark Lawrence discloses a leg stretching apparatus utilizing a cable-pulley system in which the legs are stretched into a "split" position, stretching the inner thigh muscles.
U.S. Pat. No. 4,456,247 to Ted Ehrenfried relates to an apparatus that utilizes a hand cranking device that also stretches the legs into a "split" position.
While the Lawrence and Ehrenfried devices are good for martial arts training or ballet, the present invention is practical for any age group whether athletic or non-athletic.
U.S. Pat. No. 5,004,228 ('228 patent) to Scott Powers discloses a leg stretching apparatus having two handgrip placement straps which are connected to a foot support member.
The device disclosed by the '228 patent is subject to a number of improvements. First, the device does not have an immediately apparent indicator of a user's flexibility level. Second, although the handgrips the '228 patent discloses are adequate for most purposes, the handgrips are not ideally shaped for users with gripping limitations, such as stroke and arthritis patients, accident victims, and children. A third problem is that persons with back injuries may aggravate the injury by positioning their pelvis or back in an inappropriate position in performing a stretching exercise. This type of injury aggravation may occur when the operator of the leg stretching apparatus fails to keep his lower back "in" instead of "out." When the lower back is positioned "out," the back is rounded and the operator stretches in the lower back. Ideally, the stretching should be done in the area of the hamstring muscles.
Another known method for stretching is the "towel" stretch. The towel is wrapped around the feet and the operator grasps the ends of the towel to stretch similar to the present invention. However, there are several disadvantages: there are no handgrips to hold, it is harder to stretch in even stages, and there are no means to measure the improvement in flexibility.


A process and a device are provided for mounting ball and socket joints with at least one connecting piece. A first ball and socket joint housing part (3a) is fed to a mounting device, a ball pivot (1), surrounded by a bearing shell (2), is inserted into the first ball and socket joint housing (3a). A second housing part (3b) closing the ball and socket joint is positioned at the first ball and socket joint housing part (3a). A connecting piece (4) is placed at the ball and socket joint housing (3a, 3b), and the housing parts (3a, 3b) are joined together and to the connecting piece (4) in a non-positive and positive-locking manner and/or connected via a corresponding connection (5).

Such processes are usually used in manufacturing plants of outside vendors of the automobile industry, e.g., during the mounting of suspension arms. Only ball and socket joints may be considered for use for the articulated mounting of suspension arms in vehicles because of the forces and movements occurring. A ball and socket joint comprises here at least one one-part or multi-part ball and socket joint housing, a one-part or multipart bearing shell, and a ball pivot, wherein the ball pivot is mounted in the bearing shell, which is in turn surrounded by the housing. The ball pivot must be accommodated in the housing or in the bearing shell such that no movements are possible in the axial direction of the ball pivot. This is achieved in practice by an oversize of the ball pivot diameter in relation to the ball pivot opening of the ball and socket joint housing.
A process for manufacturing a ball and socket joint has been known from the German patent application DE 38 26 987. A bearing shell is prepared according to DE 38 26 987 by original shaping around a ball pivot introduced into a housing designed as a mold and the housing is subsequently closed by means of a deformation process. This is followed in practice by the joining with a connecting piece in a separate step. A connecting piece is defined in the sense of the present invention especially as a suspension arm of a motor vehicle.
The drawback arising in the prior-art process is that time, e.g., set-up time, and costs, e.g., transportation costs, are needlessly involved due to a plurality of steps. Furthermore, close tolerances must be maintained, because the different manufacturing processes are not coordinated due to the separate manufacturing sites and it is therefore necessary to maintain the tolerance of the most accurate manufacturing process, even though a greater tolerance would suffice in other manufacturing processes.

Process and device for mounting ball and socket joints with at least one connecting piece


The present invention relates to a compound of formula (I) or a tautomer thereof, wherein R1, R2, R3, R4 and R5, have the same meaning as that defined in the claims and the description. The present invention also relates to compositions, in particular pharmaceuticals, comprising such compounds, and to uses of such compounds and compositions for the prevention and/or treatment of epilepsy and/or neurodegenerative diseases.

Epilepsy is a neurological disorder in which affected patients are predisposed to generate epileptic seizures which can vary from uncontrolled jerking movement to as subtle as a momentary loss of awareness. Epilepsy has a prevalence of about 1% and is independent of socio-economic status, age or gender. The underlying causes of epilepsy (epileptogenesis) are heterogeneous and include both genetic and non-genetic risk factors (such as stroke or infection).
One mechanism underlying this disorder involves increased Voltage-gated calcium channels (VGCC) activity resulting in increased neurotransmitter release, Ca2+ dyshomeostasis and neuronal hyperactivity, which may underlie at least in part epileptic seizures, TAU-phosphorylation and subsequent neuronal degeneration and neuronal death.
TAU is an intracellular protein with the ability to bind and consequently stabilize and define microtubule structure and function. Apart from this physiological function TAU also plays a direct role in disorders characterized by insoluble aggregates or polymers of tau which are formed by self-polymerization of tau monomers. The precise molecular mechanisms involved in TAU aggregation is not known but it appears to involve (partial) denaturation or misfolding of TAU in conformations with a high propensity to self-organize into higher order structures.
An important aspect of the TAU aggregation is its inherent cytotoxicity which reduces cellular integrity or even triggers cell death. One important aspect of toxic TAU aggregation in disease is hyper-phosphorylation of certain amino acid residues of the TAU protein. The hyper-phosphorylation of TAU appears to facilitate the cytotoxic aggregation process. Some of the kinases involved directly or indirectly in hyper-phosphorylation of TAU are mitogen-activated kinases ERK1 and/or ERK2. Intracellular Ca2+ is an important trigger for activation of ERK1 and/or ERK2 activity and in this way Ca2+ may enhance toxic TAU aggregation.
Although at present a host of therapeutic options exist still for epilepsy about 30% of the patient population is resistant to treatment, illustrating a large medical need. Moreover, current AEDs (anti-epileptic drugs) have side effects such as impaired cognitive performance which has a large negative impact on the quality of life of treated patients. Finally, current treatments are merely symptomatic and do not delay or stop epileptogenesis or neuronal degeneration after a primary insult.
Thus there is a need in the art for designing improved, more potent drugs for therapeutic treatments that target the underlying molecular mechanism epilepsy in particular treatments that lower neuronal hyperactivity with neuroprotective properties and/or without impairing cognitive performance.

Compounds for the treatment of epilepsy, neurodegenerative disorders and other CNS disorders


A circuit of an operational amplifier includes an operational main circuit, a plurality of current sources, and at least one clamp circuit. The current sources are configured to connect the operational main circuit to a high voltage source or a ground voltage source. The clamp circuit is connected between the operational main circuit and at least one of the current sources. Here, a transistor device connected to the clamp circuit has a crossing-voltage endurance level which is lower than a preset crossing-voltage endurance level of the operational main circuit.

1. Technical Field
The disclosure is directed to a circuit of an operational amplifier. More particularly, the disclosure is directed to a circuit of an operational amplifier which is capable of reducing an area occupied by devices and may be stably and instantly operated at a preset crossing voltage.
2. Description of Related Art
In order to allow a normal operational amplifier to be operated on the condition that a preset crossing voltage is given, the entire circuitry may be designed to have transistors having the same crossing-voltage endurance level. The transistors having the high crossing-voltage endurance levels often occupy significant area; accordingly, the entire operational amplifier also occupies large area, and the resultant manufacturing costs are relatively high.
A conventional operational amplifier during operation is connected between a high voltage source VDD and a ground voltage source VSS. To ensure that each transistor in use may endure the crossing voltage Vds and that the device properties remain unchanged during the operation of each transistor, all of the transistors use the same kind of devices (i.e., a transistor device A) having a preset bias endurance level. Here, the bias endurance level of the transistor device A is restricted to X volts. Note that the value of X is not necessarily a fixed voltage value; instead, the value of X serves to indicate the devices having the high preset crossing-voltage endurance level from the other devices.
According to the operational principle of the operational amplifier, the crossing voltage of each transistor may not be the same while the operational amplifier is in operation, and not all of the transistors endure the voltage crossing over the high voltage source VDD and the ground voltage source VSS. In this case, if the transistor device A is applied to design the transistors, the excessive area occupied by the transistors may be considered as a waste.
Accordingly, how to reduce the area in use of the operational amplifier and simultaneously guarantee the stable and constant operation of the operational amplifier having the preset crossing-voltage level are taken into account in the field pertinent to circuit design.


An arrangement of semiconductor devices to monitor semiconductor defects. There is a first semiconductor device arranged in proximity to a second semiconductor device, the second semiconductor device having a plurality of temperature sensing devices at locations in the second semiconductor device; a plurality of through silicon vias extending between the first semiconductor device and the second semiconductor device to electrically connect the first semiconductor device to the second semiconductor device; and a testing program to cause the plurality of temperature sensing devices in the second semiconductor device to sense the temperature at a plurality of corresponding locations in the first semiconductor device such that a predetermined rise in temperature at one location of the plurality of temperature sensing devices in the second semiconductor device is indicative of a defect in the corresponding location in the first semiconductor device. Methods of monitoring defects are also disclosed.

The present exemplary embodiments relate to the monitoring of defects in a semiconductor device and, more particularly relate to an arrangement wherein one semiconductor device can monitor the defects in an adjacent semiconductor device.
Latent defects are a class of semiconductor process defects that do not fail at time zero product testing, but either change state or cause fail in other structures over time. This defect class can be a strong contributor to Failure In Time (FIT) fails.
There does not currently exist a process to directly detect this latent defect class that does not incur excessive overhead in context of process cost as measured through cycle time or yield. Current best of breed methods attempt to screen these defects based on secondary characteristics such as excessive product leakage.

Semiconductor device defect monitoring using a plurality of temperature sensing devices in an adjacent semiconductor device


A container having cushioning means for protecting the contents of the container against shock damage, the cushioning means comprising one or a plurality of enclosed volumes or cells housing a fluid which may be a gas such as air and defined by an at least partly resilient envelope which forms part of the structure of the container.

The present invention relates generally to containers, and particularly to a container for portable shock-sensitive equipment. In one particular embodiment the container of the invention may be formed as a carrying case for electronic or electrical equipment. The present invention finds particular, although not exclusive, application as a carrying case for a computer.
The popularity of so-called lap top or notebook type of portable computers has increased greatly recently, and many people find it a great convenience to be able to carry a small, portable computer from one work place to another, or between their place of work and home. This allows them greater freedom and flexibility in organising their working life. Computers, however, are relatively shock-sensitive items of high value which must be treated with care in order to preserve their functionality. Such shocks and impacts would at least damage or distort their casing, and at worst cause internal damage possibly resulting in malfunction or even total breakdown of the computer.
Specialist luggage in the form of carrying cases for computers is available on the market, and this very often incorporates padded or lined wall structures which serve at least to some extent to absorb impacts or shocks encountered during travelling, for example should the user drop it or have it knocked from their grasp. Although known padded bags or cases are able to absorb the minor impacts from jostling crowds and occasional striking against adjacent objects such as tables or chairs as the bag or case is carried from place to place, larger impacts, especially should the computer be dropped, are not fully absorbed and these can still result in distortion of the casing and/or internal damage to the computer.