In a method for the coating of substrates made of plastic, with a light-reflecting layer, preferably an aluminum layer, and another layer placed between the substrate and the light-reflecting layer, the additional layer, which has a high barrier effect to substances which migrate or evolve gases from the plastic, is a highly crosslinked hydrocarbon layer, a silicon dioxide, silicon nitride, or silicon oxynitride layer, with a thickness of at least 15 nm, wherein the carbon content of the barrier layer is  less than 15%.

The present invention concerns a method for the coating of substrates made of plastic with a light-reflecting layer, preferably an aluminum layer and with another layer placed between the substrate and the light-reflecting layer.
The reflecting capacity of reflectors, which are produced on plastic substrates by applying thin metal layers in a vacuum, is frequently affected unsatisfactorily by production and usage conditions. This can have various origins, which frequently are to be found in the characteristics of the surface of the plastic:
On the one hand, the roughness of the plastic surface can be too high. The light is diffusely scattered by this, partially at the expense of the desired reflection. This effect can be reinforced even more unfavorably by the method for the application of the metal layer. Thus, it is known that in the thermal vaporization of metal layers, particle layers are formed, as a rule, whose particle size, and thus roughness, increases with the thickness of the layer. For this reason, there is an optimal layer thickness for the reflecting capacity of metal layers that are applied by vaporization; this thickness ensures a coating which is still sufficient (optically dense) with a minimum particle size. This effect manifests itself, in a particularly undesirable manner, on molded articles. Often very different layer thicknesses are found on them, so that on certain surfaces, a sufficiently thick, and therefore optically dense, and thus completely reflecting layer has not yet been formed. In comparison on other layers, the reflecting capacity is diminished by a particle size which has progressed to an excessively large magnitude. This effect is particularly reinforced with an oblique incidence of the vapor particles on the surface e coated, since protruding peaks are preferably coated and areas of the surface which lie behind them are blocked, and therefore a greatly diminished layer growth takes place there. This problem can be reduced, but not solved, by moving, such as, the molded articles during vapor deposition.
On the other hand, the reflecting capacity of the metal layer depends on its purity. The more the layer is contaminated, for example, by oxide fractions, the more its reflecting capacity declines. In this respect, aluminum layers, which are by far most frequently used in technology, are particularly sensitive, since aluminum vapor is especially reactive. This is particularly troublesome because the contaminated aluminum layers also manifest themselves by a more or less pronounced yellow or brown shade. The important thing therefore is to keep reactive foreign gases away from the metal vapor to the greatest extent possible during the vacuum coating. One common measure for this is to maintain the surfaces as clean as possible in a vacuum. However, this is not sufficient if gases or vapors exit from the plastic material during the coating. These are particularly disadvantageous because they appear precisely at the point where the metal layer is being formed so that with a particularly high probability, they contribute to the contamination of the layer. The problem appears, above all, with plastics which have a strong gas evolution, such as polyamide or BMC (bulk molded compound), and particularly if the plastic was not prelacquered before the vacuum coating.
Finally, an optically satisfactory metal layer can clearly lose reflecting capacity in the course of use, in particular, at elevated temperatures, as may occur in a headlight, if substances from the plastic material migrate and spread in the form of vapors in the headlight. The vapors can condense on colder surfaces of the headlight in the form of a dull, unattractive coating. These coating have a particularly disturbing effect on the reflector, a contemplated border region, and the transparent headlight lens or covering pane. In these cases, the optical appearance of the headlight and frequently also the light efficiency is disturbed in a sensitive manner. This phenomenon is very disturbing, particularly with plastics which have a strong evolution of gas, such as B.C. materials.
To increase the reflecting capacity, therefore, headlight reflectors are frequently provided with a lacquer layer prior to the metal coating. This lacquer layer is supposed to compensate for the roughness of the surface and in the case of plastic parts, suppress the migration and desorption of substances from the plastic material during the metal coating and later operations.
Thus, DE 37 31 686 proposes the application of a polymer layer, with the aid of a plasma, on a previously applied lacquer layer, so as to improve the adhesion, the corrosion resistance, and the reflecting capacity of the subsequently produced metal layer.
A method is also known, in accordance with EP 0 136 450, for the production of a mirror layer, in particular, for headlight reflectors, wherein a layer of aluminum is sputtered on a preferably thermally curable lacquer layer, in particular, synthetic resin-powder layer foundation, in an evacuatable recipient. The sputtering of the aluminum layer takes place after an evacuation to pressures of 8xc3x9710xe2x88x923 Pa to 3xc3x9710xe2x88x922 Pa with inert gas sputter pressures between 6xc3x9710xe2x88x922 Pa and 1 Pa with coating rates of ca. 5 nm/sec, using a magnetron, preferably a planar magnetron.
It is therefore an object of the present invention to improve the process for forming reflecting surfaces on plastic substrates.
The above and other objects of the present invention can be achieved by applying an intermediate layer with as high as possible a barrier effect toward substances which can migrate and evolve gases from plastic material, onto unlacquered plastics, as reflector or border blanks, before the metal coating by means of a vacuum method, preferably a plasma-aided coating method. Among these substances, that can migrate and evolve gases from plastic material is water. As a rule, however, organic substances, such as the residues of unreacted monomers, for example, acrylonitrile from ABS, or styrene (from B.C.), may also emerge, depending on the plastic material.
Highly crosslinked hydrocarbon layers, silicon dioxide-, silicon nitride-, or silicon oxynitride layers are suitable as the intermediate layer according to the invention. For the barrier effect of the latter layers, it is essential that the carbon content not be selected too high if the layers (as preferred) are produced using silicon-organic compounds. The carbon content should be  less than 15%, preferably  less than 8%. It became evident that such barrier layers not only clearly reduce the migration of turbidity-causing substances from the plastic during the use of the headlight, but rather also enhance the reflecting capacity of the metal layers, in particular, the aluminum layers, produced therefrom. In this respect, the application of the intermediate layer in a large layer thickness, so as to compensate for the roughness of the plastic surface, is, surprisingly, not required. A thickness of 15 nm can be sufficient for an intermediate layer, depending on the plastic material, produced with plasma-CVD or remote plasma-CVD methods.
For layers produced according to this method, a thickness of 30 nm to 60 nm has proved to be particularly good.
The present invention will now be described in further detail.
One variant of the method of the invention resides in another production method of the layer, namely, condensing a radically polymerizable monomer on the plastic parts, under a vacuum, from the gas phase, and subsequently thoroughly polymerizing with the aid of a plasma. This method step (plasma-induced polymerization) includes of the following steps:
First, the part to be coated is tempered to room temperature or preferably a temperature below that and then it is immediately introduced into a vacuum chamber with heated walls. The vacuum chamber is thereupon typically evacuated to 1 Pa. Then, a short plasma pretreatment follows, according to the state of the art, most advantageously, with the goal of increasing the surface energy of the plastic part. To this end, for example, a noble gas, oxygen, nitrogen, air, or another oxygen- or nitrogen-containing gas or gas mixture is allowed m and a plasma is ignited with an equilibrium pressure of preferably 10 Pa to 100 Pa. One has to take care here that the part to be coated is not inadmissibly heated by the plasma treatment.
Subsequently, at least one vaporous monomer is let into the vacuum chamber. This condenses, preferably on the coldest surfaces; that is, on the surface of the part to be coated. With a sufficient level of surface energy of the part to be coated, a closed, smooth monomer film is produced on the surface, which is subsequently polymerized to a solid, dense layer with a thickness of a few nm to xcexcm by the effect of plasma produced in the immediate vicinity. The advantage of this embodiment of the invention is that the intermediate layer, which is liquid at first, under the condition that its surface energy is lower than that of the plastic surface underneath, forms a smooth surface which compensates for any roughness of the plastic surface.
Regardless of the embodiment according to which the intermediate layer, in accordance with the invention, is formed, it is preferred that the subsequently applied metal layer be applied by means of cathode sputtering. It has become evident that in this case, the light efficiency of headlights is particularly high. This can be attributed to, among other things, the fact that the surface of the metal layers produced by means of cathode sputtering is smoother than the common ones at present and, on the other hand, to the fact that three-dimensional parts can be coated more uniformly by sputtering. This results in it being possible to maintain the layer thickness optimal for the reflecting capacity over the surface to be coated.
For the protection of the metal layer from corrosion (for example, aluminum) and also for protection from damage due to wiping, a protective layer is applied to the metal layer immediately after its production, in accordance with the state of the art. In this respect, a siloxane, such as hexamethyldisiloxane, is produced from the gas phase on the part to be coated, with the aid of a plasma.
For the further suppression of the formation of a condensed product, if necessary, a cover layer with a surface energy of  greater than 48 mN/m, preferably  greater than 62 mN/m, can be finally applied by means of plasma-CVD or remote plasma-CVD. The result of this is that, for example, with the longer operation of a headlight, produced in accordance with the invention, exiting vapors do not form optically disturbing drops, but rather a closed film, which is not noticeable optically, upon condensation on colder surfaces of the reflector or a border.
The method in accordance with the invention for the production of reflecting coatings on plastic parts is preferably used in a vacuum unit with a lock and several vacuum chambers, separated from one another, in which the plastic parts are coated, one after the other, with the various layers, according to the methods described above, wherein at least one of these vacuum chambers is equipped with a sputtering device and at least one other with a vacuum chamber, with a device for performance of plasma-CVD, remote plasma-CVD, or plasma-induced polymerization. Such units are well know in the art.
After passing the lock, the parts are pretreated in a first chamber with a short, noncoating plasma and subsequently, provided with the intermediate layer. In the following chamber, a reflecting metal layer (for example, of aluminum) is subsequently applied. In the next vacuum chamber, the protective layer and if necessary, immediately following this, the cover layer are applied. Then, the coated parts are conveyed to the atmosphere via a lock.
The reflecting capacity of reflecting layers on plastic parts is improved and the usage time of the coated parts is substantially increased by the aforementioned features. Moreover, it is possible to provide even problematic plastic parts, which have stronger gas evolution and/or a rougher surface, with a reflecting layer, without a prior lacquering; the plastic parts then meet high quality requirements (for example, for motor vehicle front headlights or fog lamps).
The savings in the lacquering finally leads to a massive savings in costs.
The invention permits the most varied embodiment possibilities; one of these is described in more detail below.

Method for the coating of substrates made of plastic


A combination shopping cart and basket includes a basket member having a pair of opposing gripping members to assist a user in lifting the device. The basket member is dimensioned to be received within a vehicle's trunk. A handle is attached to the top edge of the basket and is pivotable between an outwardly extending position to function as a shopping cart handle and horizontal position, superimposed on the basket member allowing the basket to be stored within the trunk. The basket member is mounted on a wheel assembly and includes a brake assembly to assist a user in stopping the device.

The present invention relates to a low profile shopping cart which may be conveniently transported in the trunk of a vehicle. Once groceries are purchased and loaded into the cart, the cart and its contents may be simultaneously loaded into a vehicle and subsequently transported from the vehicle to a user's kitchen.


An electronic system and method includes a controller to control a switching power converter in at least two different modes of operation, a normal mode and an error reduction mode. The controller controls an amount of charge pushed (i.e. delivered) by the switching power converter to a load to reduce a charge quantization error. The charge quantization error represents an amount of charge pushed to the load beyond a target charge amount. The controller determines an amount of charge to be pushed to the load. Based on the amount of charge to be pushed to the load, the controller generates a current control signal that controls a current control switch in the switching power converter. Determination of the control signal depends on whether the controller is operating in normal mode or error reduction mode. The controller attempts to reduce the charge quantization error to avoid power fluctuations.

1. Field of the invention
The present invention relates in general to the field of electronics, and more specifically to quantization error reduction in constant output current control drivers.
2. Description of the Related Art
Many electronic systems utilize switching power converters to efficiently convert power from one source into power useable by a device (referred to herein as a "load"). Some facilities, such as homes and buildings, include light source dimming circuits (referred to herein as a "dimmer"). Dimmers control the power delivered to a load, such as a lamp having one or more light sources. Dimming saves energy and, in a lighting installation, also allows a user to adjust the intensity of the light source to a desired level.
A switching power converter is controlled by a controller. For systems that are not intended for use with dimmers, the controller provides power factor correction for displacement and distortion so that the phases of an alternating current (AC) supply voltage and an average input current to the switching power converter are approximately in-phase (power factor displacement) and the current shape follows the shape attic supply voltage (power factor distortion). For systems that include dimmers and constant current loads, the controller controls the switching power converter to provide a constant, average input current to the load without regard to power factor correction.
FIG. 1 depicts an electronic system 100 that converts power from voltage supply 102 into power usable by load 104. Load 104 is a constant current load that includes, for example, one or more light emitting diodes (LEDs). A controller 106 controls the power conversion process. Voltage source 102 can be any type of voltage source such as a public utility supplying a 60 Hz/110 V input voltage VIN in North America or a 50 Hz/220 V input voltage VIN in Europe or the People's Republic of China. The dimmer 103 phase cuts the supply voltage VSUPPLY, and the full-bridge rectifier 105 rectifies the phase-cut supply voltage to generate a rectified phase-cut input voltage VIN to the flyback-type switching power converter 110. In at least one embodiment, the dimmer 103 is a triac-based dimmer.
The controller 106 provides a pulse width modulated (PWM) control signal CS0 to current control switch 108 in a flyback-type, switching power converter 110 to control the conversion of input voltage VIN into a primary-side voltage VP and secondary voltage VS. When the switch 108 is non-conductive, i.e. "off", the primary voltage VP is N times the secondary voltage VS, i.e. VP=N·VS, and "N" is a ratio of turns in the primary-winding 114 to the turns in the secondary-winding 118. The switch 108 is, for example, a field effect transistor (FET). When control signal CS0 causes switch 108 to conduct, a primary-side current iIN flows into a primary-winding 114 of transformer 116 to energize the primary-winding 114. When switch 108 conducts, the diode 120 is reverse biased, and the secondary-side current iS is zero. When control signal CS0 opens switch 108, the primary voltage VP and secondary voltage VS reverse the indicated polarities, and diode 120 is forward biased. When diode 120 is forward biased, the secondary side current iS flows through the diode 120 to charge capacitor 122 so that an approximately constant current and direct current (DC) voltage VLD is provided to the load 104.

Quantization error reduction in constant output current control drivers


The present invention relates to an occupant protection system and, more particularly, to an apparatus and method for detecting a vehicle rollover event using and enhanced sensor input architecture that uses both a roll over sensor and an electronic stability control system.

To detect a vehicle rollover event, a vehicle may be equipped with one or more sensors that detect vehicle dynamics. The sensors are connected to a controller that evaluates the sensor signals and controls actuation of one or more actuatable devices in response to a determined occurrence of a vehicle rollover event.
U.S. Pat. No. 6,600,414, to Foo et al. discloses an apparatus and method for detecting a vehicle rollover event using both a discriminating and a safing function.
U.S. Pat. No. 6,433,681 to Foo et al., discloses an apparatus and method for detecting vehicle rollover event having a roll-rate switched threshold.

Apparatus and method for detecting vehicle rollover using enhanced sensor inputs and processing architecture


A seat slider device may include: a lower rail attached to a body of a vehicle; and an upper rail attached to a seat and slidable with respect to the lower rail. The upper rail may include: a roller or a slider piece being in contact with a bottom plate of the lower rail; and a protrusion supporting the roller or the slider piece. The protrusion may be integrated with the upper rail.

A seat slider device configured to slide a seat includes a lower rail attached to a body of a vehicle and an upper rail attached to a lower portion of the seat. The upper rail is slidable with respect to the lower rail. A roller is attached to the upper rail, and the roller is in contact with a bottom plate of the lower rail. An example of such a seat slider device is disclosed in Japanese Patent Application Publication No. 2018-47777. Due to rotation of the roller, the upper rail smoothly slides.


Low-order reference potentials including high-order reference potentials (VRT, VRB, VC0 to VC6) generated from a ladder resistor and potentials (V(i, j) (i=0 to 7, j=0 to 6)) are applied to potential lines, respectively, to be transmitted by various switches to analog bus lines (FR0a to FR14a) or analog bus lines (FR0b FR14b). The low-order reference potentials are applied to the analog bus lines (FR0b to FR14b) when it is judged that a sample signal potential falls in voltage zones (Z0 to Z3) as a result of comparison with the high-order reference potentials and are applied to the analog bus lines (FR0a to FR14a) when it is judged that the sample signal potential falls in voltage zones (Z4 to Z7). This provides for reduction in the number of switches connected to each analog bus line and in parasitic capacitance, so that a settling time of the low-order reference potentials is shortened. High-speed operation of a series-parallel A-D converter is achieved.

1. Field of the Invention
The present invention relates to an analog-to-digital converter and more particularly to a series-parallel A-D converter.
2. Description of the Background Art
FIG. 15 is a diagram of a conventional series-parallel A-D converter disclosed by Andrew G. F. Dingwall in "An 8-MHz CMOS Subranging 8-Bit A/D Converter", IEEE Journal of Solid States Circuits, vol. SC-20, NO. 6, pp. 1138-1143, December 1985. For the purpose of simplication, high-order (coarse) resolution of the A-D converter is three bits long, low-order (fine) resolution thereof is three bits long, and redundancy for error correction is one bit long. Referring to FIG. 15, a reference potential generating circuit 1 outputs high-order reference potentials for 3-bit high-order conversion to high-order reference potential output lines CR0 to CR6 and outputs low-order reference potentials for 4-bit low-order conversion (including the error correction bit) to analog bus lines FR0 to FR14 as a function of high and low potential references VRT and VRB applied respectively to terminals 2 and 3 and a control signal 32 inputted to a signal line 4.
High-order voltage comparators CC0 to CC6 compare the potential of an analog signal to be converted (hereinafter referred to as a "sample signal") which is inputted to a terminal 5 with the high-order reference potentials to give the result to a high-order encoder 6. The high-order encoder 6 gives the control signal 32 and a 3-bit high-order A-D conversion result 33 to the signal line 4 and an error correction circuit 7, respectively.
Low-order voltage comparators FC0 to FC14 compare the sample signal potential with the low-order reference potentials to give the result to a low-order encoder 8. The low-order encoder 8 gives a 3-bit low-order A-D conversion result to a terminal 9 and gives an error detection signal 34 to the error correction circuit 7 through a signal line 10, respectively.
The error correction circuit 7 corrects errors of the high-order A-D conversion result 33 as a function of the error detection signal 34 to give a corrected 3-bit high-order A-D conversion result 35 to a terminal 11.
A structure of the reference potential generating circuit 1 to be used for the series-parallel A-D converter is shown in FIG. 16. The reference potential generating circuit 1 used for 6-bit A-D conversion includes 2.sup.6 resistors r connected in series between the terminals 2 and 3 and having the same resistance to form a ladder resistor. The ladder resistor is divided into 2.sup.3 resistor groups R0 to R7 each including 2.sup.3 adjacent resistors connected in series. The connecting points of the eight resistor groups R0 to R7 are connected to the high-order voltage comparators CC0 to CC6 through the high-order reference potential output lines CR0 to CR6. The high-order reference potential output lines CR0 to CR6 are connected to the connecting points CRl (1=0 to 7) of the resistor groups Rl and R(l+1). Potentials VCl at the connecting points CRl, the potentials VRT, VRB at the terminals 2, 3 and divided potentials V(l,m) (l=0 to 7, m=0 to 6) in the resistor groups R0 to R7 serve as the reference potentials and are inputted to a switch matrix 12. Fifteen potentials having adjacent levels among the reference potentials are applied to the analog bus lines FR0 to FR14 by the control to be described later to be inputted to the voltage comparators FC0 to FC14 as the low-order reference potentials.
An arrangement of the switch matrix 12 is shown in FIG. 17. The horizontal lines of FIG. 17 represent potential lines connected to the points connecting the 2.sup.6 resistors and to the terminals 2, 3, and potentials of 65 levels are applied to the potential lines. The higher potentials of the 65 levels are applied to the upper lines of FIG. 17. The potentials of 65 levels are classified into eight voltage zones Z0 to Z7. That is, the voltage zone Z0 includes the low-order reference potentials satisfying: EQU VRB<V(0,i)<V(0,i+1)<VC0 (i=0, 1, . . . , 5) (1).
The voltage zones Zj (j=1, 2, . . . , 6) include the low-order reference potentials satisfying: EQU VC(j-1)<V(j,i)<V(j,i+1)<VCj (i=0, 1, . . . , 5) (2).
The voltage zone Z7 includes the low-order reference potentials satisfying: EQU VC6<V(7,i)<V(7,i+1)<VRT (i=0, 1, . . . , 5) (3).
The potentials VCj thus belong to both the zones Zj and Z(j+1). Relation between the potential lines to which the potentials V(j, i) are applied and the zones Zj is shown in detail in FIG. 18 where VC(j-1) when j=1 indicates VRB and VCj when j=6 indicates VRT.
The vertical lines of FIG. 17 represent the analog bus lines FR0 to FR14 to which fifteen out of 65 levels of potentials are applied by switch groups to be classified in the manner as described below. The application is performed by eight switch groups which perform different operations depending on the result of the high-order A-D conversion provided by the control signal 32 of FIG. 15. The switch groups indicated by [0], [1], [2], [3], [4], [5], [6], [7] turn on when the potential of the sample signal falls in the voltage zones Z0, Z1, Z2, Z3, Z4, Z5, Z6, Z7 as a result of the high-order A-D conversion, respectively.
The series-parallel A-D converter operates in two stages. In the first stage, the sample signal potential is compared with the high-order reference potentials applied to the high-order reference potential output lines CR0 to CR6 in the high-order voltage comparators CC0 to CC6 (FIG. 15), respectively. The comparison result is converted to the high-order A-D conversion result 33 composed of 3-bit binary codes through the high-order encoder 6.
In the second stage, the control signal 32 outputted from the high-order encoder 6 is inputted to the reference potential generating circuit 1 through the signal line 4. If the sample signal potential falls, for example, in the voltage zone Z3 as a result of the high-order A-D conversion, only the switches indicated by [3] should be turned on. However, contradictions are sometimes caused between the high-order and low-order A-D conversion results. The low-order reference potentials are determined in the voltage zones including and wider than the voltage zone Z3 so that the error correction is enabled to be made against the contradictions in the error correction circuit 7. In this example, an allowance of .+-.4LSB is added to the voltage zone Z3 to determine the low-order reference potentials. Since the high-order reference potential VC3 belongs to both the voltage zones Z3 and Z4, the bus line FR11 connected through the switches disposed therein is counted twice. The LSB is a voltage corresponding to one bit of the A-D converter and is equal to a potential difference across the resistor r in this case. The switches also turn on which are indicated by [3] and disposed on the four bus lines FR11 to FR14 (corresponding to potentials higher than the maximum of the voltage zone Z3) and the four bus lines FR0 to FR3 (corresponding to potentials lower than the minimum of the voltage zone Z3).
The operating speed of the series-parallel A-D converter largely depends on a settling time of the low-order reference potentials outputted from the reference potential generating circuit 1 to the analog bus lines FR0 to FR14. Since the low-order reference potentials are applied to the low-order voltage comparators FC0 to FC14 through the analog bus lines FR0 to FR14 having a large parasitic capacitance, the settling time thereof prevents the high-speed operation of the A-D converter. In the conventional A-D converter for totaling six bits composed of three bits for high-order conversion and three bits for low-order conversion, if 1-bit high-order redundancy is provided, the number of analog bus lines is: EQU (2.sup.3 -1)+2.sup.3 =15 (4)
The number of switches per bus line is at least eight (respective one switch indicated by [0], [1], [2], [3], [4], [5], [6], [7]). Letting the parasitic capacitance of the switches and wires per analog bus line be 1 pF, the total capacitance of fifteen analog bus lines is 15 pF. This means that the capacitance of 15 pF is added to each section of the ladder resistor corresponding to the respective eight voltage zones in accordance with the high-order A-D conversion result. This capacitance exponentially increases as the number of switches increases with the increase in the number of bits of the A-D conversion.
This causes the level of the low-order reference potentials to vary largely transiently when the switches are opened and closed, so that it takes time to settle the level on the original level. The settling time is shortened by reducing the impedance of the ladder resistor. However, for reduction in the impedance of the resistor, it is necessary to increase the cross-sectional area thereof, resulting in a large layout area unpreferably. The analog bus lines accordingly need long wires, accompanied by large wiring capacitance. Thus such attempt is not so effective.
Another factor that prolongs the settling time of the low-order reference potentials is large variation in sample signal level. Which one of the eight resistor groups R0 to R7 outputs the low-order reference potentials depends on the sample signal level. In extreme case, the switches indicated by [7] turn on in response to a first sample signal and the switches indicated by [0] turn on in response to the next sample signal. In this case, the potentials in the voltage zone Z7 nearest to the terminal 2 which have the highest level among the eight voltage zones are applied to the analog bus lines FR0 to FR14 in response to the first sample signal. The potentials in the voltage zone Z0 nearest to the terminal 3 which have the lowest level are applied thereto in response to the next sample signal. Since the potential difference between the terminals 2 and 3 is equal to the maximum amplitude of the sample signal detected by the A-D converter, a potential variation approximate to the maximum amplitude takes place in response to the sample signals in the analog bus lines FR0 to FR14 under the foregoing conditions. This is not so significant a problem since the analog bus lines FR0 to FR14 are connected to the connecting points of the resistors adjacent the terminals 2, 3 having the low impedance in response to the two sample signals. However, the settling time of the low-order reference potentials grows long when the potential variation of the analog bus lines FR0 to FR14 is large and the second sample signal potential falls in the voltage zone having a large impedance of the ladder resistor, e.g., in such a case that the switches indicated by [7] or [0] turn on in response to the first sample signal and the switches indicated by [3] or [4] turn on in response to the second sample signal.
As above described, since the analog bus lines have the large parasitic capacitance and, in particular, the low-order reference potentials to be applied to the analog bus lines largely vary in accordance with the sample signal level, the conventional series-parallel A-D converter is disadvantageous in that the low-order reference potentials outputted from the reference potential generating circuit take a long settling time which prevents the high-speed operation thereof.


A method and apparatus provide multichannel signal limiting to prevent any channel signal within a multichannel signal from exceeding defined limits, while still preserving the gain and/or amplitude relationships among the individual channel signals. A limiter is configured to calculate a limiting factor as the value needed to prevent a limit violation on the worst-case one of the channel signals, and then commonly apply that limiting factor to the gain control of all channel signals. Thus, the limiter may generate an actual gain value for each channel signal as the product of that channel signal's desired gain value and the current value of the limiting factor. Notably, in multichannel audio signal applications, coordinating gain control across the individual audio channels by use of the commonly applied limiting factor prevents undesirable spatial shifting of the soundstage, e.g., shifting of the stereo image.

The present invention generally relates to signal limiters used to prevent clipping or saturation, or to control the characteristics of a signal around some maximum amplitude, and particularly relates to multichannel limiters.
Signal limiting represents a common safeguarding function that is employed in a wide variety of applications, in the analog, digital and acoustic domains. Signal limiting in its simplest form comprises limiting a given signal's amplitude at some maximum permissible value. Hard limiting, for example, imposes a hard limit on the peak signal amplitude permitted, with the hard limit typically set at the value needed to prevent over-driving one or more circuits in the signal path into saturation. Hard limiting may occur inherently, such as when the value of a signal exceeds the full-scale measurement range available for measuring the signal.
In any case, hard limiting typically "clips" a given waveform at the limit, which changes the waveform shape, forfeits signal information, and introduces signal non-linearity. Soft limiting represents a more sophisticated approach to limiting. Soft limiting preserves the shape of the signal, while still limiting its peak amplitude. In other words, soft limiting preserves the linearity of the signal by fractionally scaling it—i.e., attenuating the signal by some gain factor less than unity—rather than simply capping its peak values. Not surprisingly, then, soft limiting represents the preferred approach in applications where the non-linearity that would be introduced by hard limiting is objectionable. Audio signal limiting is one such application.
For example, soft limiting can be used on a stereo signal to prevent either channel signal from exceeding some defined magnitude limit. Soft limiting in audio applications prevents undesirable non-linearity in the audio signal, which would result in audible distortions. The magnitude limits may be defined by one or more digital or analog circuit elements in the audio signal path, or by the loudspeakers being used to generate the audible output, for example.
Regardless of the underlying reason for imposing magnitude limits, the application of limiting control to a multichannel signal can be problematic. For example, only a subset of the channel signals comprising a multichannel audio signal may require limiting at any given time, or different ones of the channel signals may require differing amounts of soft limiting to prevent clipping. In either case, the conventional approach to limiting control applies to each channel whatever soft scaling value is needed to prevent that channel signal's amplitude from exceeding the limits defined for that channel.
In other words, different limiting values potentially are applied to different ones of the channel signals comprising the multichannel signal, meaning that the relative amplitude relationships that existed among the channel signals before limiting is altered by the limiting operation. With multichannel audio signals, altering the relative amplitudes among the channel signals causes unintended and oftentimes undesirable effects. For example, the stereo or multichannel "image" being produced by the loudspeakers may noticeably shift around as a function of limiting control. Other types of deleterious effects may arise in other multichannel signal limiting applications.

Method and apparatus for multichannel signal limiting


A machine for determining dynamically a residual unbalance in a workpiece having a conical surface is provided with a plurality of support elements, such as roller elements, that communicate with the workpiece at the conical surface thereof. The roller elements are arranged circumferentially equidistant about the workpiece and may have cylindrical or conical configurations. Further support elements, such as roller elements, can be applied against an annular surface of the workpiece, such as on a flange portion thereof. At least one of the support rollers that communicates with the conical surface is arranged to rotate about an adjustable axis of rotation that can be oriented with respect to the workpiece to achieve good rotative communication therebetween. The rollers are arranged to rotate at different speeds from the workpiece, whereby an unbalance signal associated with the workpiece can readily be isolated from a composite signal having unbalance information related to a residual unbalance of the workpiece combined with residual unbalances of the rollers.

1. Field of the Invention
This invention relates generally to balancing arrangements, and more particularly, to a holder arrangement for supporting an article to be subjected to a balancing procedure.
2. Description of the Related Art
Tool holders of the type that are generally used in balancing equipment are of standard sizes, illustratively CAT T-30, T-35, T-40, and T-50. Conventional balancing arrangements of reasonable costs generally conform to the standards of ISO balance grade G-2.5. However, since the spindle speeds of machining equipment have steadily increased, there is a need to achieve balance to ISO G-1.0. Conventional balancing arrangements generally are unable to achieve the higher levels of balancing accuracy required by the ISO G-1.0 standard, partly as a result of the conical configuration of the mounting surface of the tool holder. In some known tooling arrangements, the included angle of the mounting surface of the tool holder has a slope of 3.5 inches per 12 inches. In order to balance to ISO G-1.0 standards, the tool holder must spin true to its conical surface and the mass center must be adjusted to within 10 micro-inches of the spinning access.
In known arrangements, tool holders are balanced by placing same into a mating conical hole in an adapter. Alternatively, the tool holder is placed directly in the shaft of the spindle, occasionally with a drawbar mechanism to set the taper tightly. When the tool holder is operated with its axis of rotation oriented vertically, the tool holder is dropped a short distance, so as to seat the taper. Gravity is sufficient to insure that the tool holder does not rise up. However, it is a problem with this known arrangement that the cost of a precision spindle, limits to the accuracy of centering the tool holder resulting from mismatch with the conical surface, and interference signals resulting from the additional suspended and spinning weight significantly limit the precision of the balance that is achieved.
It is, therefore, an object of this invention to provide an arrangement for supporting rotatively a workpiece having a conical surface. It is another object of this invention to provide an arrangement that supports a conical workpiece rotatively without chattering or binding.
It is also an object of this invention to provide an arrangement for supporting rotatively a conical workpiece wherein all points of contact with the workpiece have the same surface velocity.
It is a further object of this invention to provide an arrangement for supporting rotatively a workpiece to be balanced, having a conical surface wherein contribution to an unbalance signal by the supporting structure can easily be identified and separated from the unbalance signal component associated with the workpiece.
It is additionally an object of this invention to provide an arrangement for supporting a conical workpiece that facilitates measurement of static and dynamic unbalance of the workpiece.
It is yet a further object of this invention to provide an arrangement for supporting rotatively a workpiece having a conical surface wherein the workpiece can readily be driven to rotate at a balancing speed.
It is also another object of this invention to provide an arrangement for supporting rotatively a workpiece having a conical surface, the arrangement employing a non-rotating support element.
It is yet another object of this invention to provide an arrangement for supporting rotatively a workpiece having a conical surface for centering same, in combination with a second surface of the workpiece, which may be a substantially perpendicular flange face, for squaring the workpiece.

Conical tool holder for precision balancer


The present invention provides a catalyst system for vehicle exhaust gas purification devices which exhibit excellent capacity of removing nitrogen oxide emissions from internal combustion engine exhaust gases when they are brought into contact with the catalyst even when hydrocarbon concentration in exhaust gases varies, exhaust gas purification device using the same and method for purification of exhaust gases.

1. Field of the Invention
The present invention relates to a catalyst system for vehicle exhaust gas purification devices, exhaust gas purification device using the same and method for purification of exhaust gases, more specifically a catalyst system for vehicle exhaust gas purification devices which exhibit excellent capacity of removing nitrogen oxide emissions from vehicle exhaust gases when they are brought into contact with the catalyst even when hydrocarbon concentration in exhaust gases varies, exhaust gas purification device using the same and method for purification of exhaust gases.
2. Description of the Prior Art
Exhaust gases discharged from combustion devices, e.g., vehicle internal combustion engines or the like and boilers, contain hazardous substances, e.g., hydrocarbons (HC), carbon monoxide (CO) and nitrogen oxides (NOx), and various techniques have been proposed for purification of these hazardous substances. As one of these techniques, one which has been studied disposes a catalyst in an exhaust gas passage to purify hazardous components of exhaust gases.
In particular, such a catalytic technique, when applied to purification of exhaust gases discharged from vehicles, is required to efficiently purify these hazardous gases (CO, HC and NOx) while flexibly coping with rapidly changing concentrations of these gases, ranging from several ppm to several %.
In the catalytic exhaust gas purification techniques, oxygen present in exhaust gases plays important roles for promotion of CO and HC oxidation and NOx reduction. It is however difficult for a vehicle to keep constant engine combustion conditions, because of changing driving conditions resulting from changing traffic conditions, with the result that oxygen concentration changes every second. Therefore, purification of hazardous gases by using oxygen will have a deteriorated purification efficiency, when oxygen concentration drops.
In order to cope with these situations, the catalyst is incorporated with an oxygen storage/release component (hereinafter sometimes referred to as OSC), which releases oxygen which it stores into exhaust gases containing oxygen at an insufficient concentration, to improve hazardous gas purification capacity.
CeO2 powder has been used for an OSC, because of its high oxygen storage/release capacity, and demonstrating an effect of improving exhaust gas purification efficiency. Extensive studies have been made on improvement of oxygen storage capacity and release characteristics of CeO2-base powders, e.g., CeO2/ZrO2-base powder, and also on exhaust gas purification catalysts which are incorporated with an OSC as a promoter.
It is discussed that a cerium/zirconium-base compound oxide of specific atomic composition is effective as an oxygen storage/release component for adjusting exhaust gas purification catalyst functions of oxidation of HC and CO and reduction of NOx.
An exhaust gas purification catalyst mounted in a vehicle is disposed under a floor, at which temperature is relatively low, or immediately below the engine where it is exposed to higher temperature of exhaust gases immediately after being discharged from the engine. Exhaust gases, which are at high temperature immediately after being discharged from an engine, lose temperature when they reach the underfloor area. These conditions are not favorable for exhaust gas purification, because many exhaust gas purification catalysts generally exhibit a high activity at above a certain temperature. Nevertheless, however, a catalyst disposed under a vehicle floor is required to exhibit purification capacity even under decreased temperature conditions.
On the other hand, the one disposed immediately under an engine may have the exhaust gas purification catalyst components sintered when exposed to exhaust gases which may be at above 1000° C. Therefore, such a catalyst is required to have a stable exhaust gas purification capacity even under severe high-temperature conditions by suppressing sintering of the components.
One type of these catalysts simultaneously performs oxidation of CO and HC and reduction of NOx for purification of exhaust gases. Such a catalyst is known as a three-way catalyst (TWC) (a device in which a TWC is mounted is hereinafter sometimes referred to as a TWC device). The TWCs generally have a structure with a structural carrier of cordierite, which is coated with a slurry comprising a base material for a porous carrier (e.g., of alumina) impregnated with a noble metal, e.g., platinum, rhodium, palladium or the like.
Such a TWC removes a reducing component such as CO, HC or the like by oxidation with oxygen in exhaust gases and NOx by reduction. As discussed above, however, oxygen concentration in exhaust gases changes every second, and catalysts exhibiting a purification capacity under these conditions are in demand. Therefore, an exhaust gas purification catalyst is incorporated with cerium oxide, cerium/zirconium-base compound oxide (Patent Document 1) as an oxygen storage/release material to improve its hazardous component purification capacity by releasing oxygen which it stores into exhaust gases to increase oxygen content of exhaust gases containing oxygen at an insufficient concentration. Incorporation of an oxygen storage/release material is mainly intended to reduce extent of oxygen concentration changes.
However, the markets are demanding OSC materials capable of release oxygen in a lower temperature range, having a higher oxygen storage/release capacity and securing a longer service life of the catalysts in which they are incorporated to cope with the exhaust gas regulations, which are becoming more and more stringent. At the same time, exhaust gas purification catalysts are required to be more resistant to temperature. Under these situations, the inventors of the present invention have developed an OSC material exhibiting an excellent performance even at a high temperature, and proposed a cerium/zirconium-base compound oxide which is not sintered at a high temperature of 1000° C. or higher (Patent Document 2).
In some cases, catalysts exhibiting different functions in accordance with exhaust gas components to be purified are disposed at different places in a vehicle exhaust gas passage to constitute a vehicle exhaust gas purification device.
Two or more types of TWC themselves are frequently disposed in an exhaust gas passage also in a gasoline engine. For example, Patent Document 3 discloses a device which purifies exhaust gases in two stages, with a more heat-resistant catalyst in the first stage where it is exposed to exhaust gases of higher temperature, and a common TWC in the lower-temperature second stage to completely oxidize HC, which is partly oxidized in the first stage. Patent Document 4 discloses a device working also in two stages with a TWC in the first stage and composite catalyst of HC adsorbent and TWC in the second stage, in an attempt to greatly improve rate of purification of HC in exhaust gases.
When a catalyst is disposed in an exhaust gas passage of limited space and shape, similar catalysts are disposed in two or more places to provide an active area sufficient for exhaust gas purification. For example, Patent Document 4 discloses a TWC device with two or more catalysts to purify exhaust gases.
It is accepted that a conventional TWC can adequately purify three components of HC, CO and NOx only in a narrow theoretical air/fuel ratio range around 14.6 (the range is referred to as a window). However, a vehicle must work under varying conditions resulting from varying driving conditions, discussed earlier, and under lean conditions to improve mileage, in order to cope with heightened interests in environmental problems in these days, where the lean condition may result from a fuel cut condition, under which supply of fuel to a combustion chamber is temporarily suspended, and also from a lean-burning condition. At a high theoretical air/fuel ratio, NOx is produced more and difficult for a conventional TWC to purify.
Vehicles of improved fuel economy have been demanded also viewed from depletion trends of oil resources and global warming, and lean-combustion engines have been attracting more attention also for gasoline engines. In lean combustion, an exhaust gas atmosphere created by a vehicle being driven is slanted to an oxygen-rich state (sometimes referred to as lean atmosphere) from that associated with combustion at the theoretical air/fuel ratio (sometimes referred to as stoichiometric condition). A conventional TWC, when it works in a lean atmosphere, involves a problem of insufficient NOx purification, because NOx is produced more in such an atmosphere of higher oxygen concentration. Therefore, catalysts which can purify NOx even in a lean atmosphere have been studied (refer, e.g., to Patent Document 5).
More recently, however, vehicles have been demanded to have still improved fuel economy, and driven under lean atmospheres and fuel-cut conditions more frequently. At the same time, upsurge of environmental awareness has been requiring still deeper purification of NOx, and further improvements of NOx purification capacity of TWCs, in particular    Patent Document 1: JP-B 6-75675    Patent Document 2: WO2006/030763    Patent Document 3: JP-A 11-123331    Patent Document 4: JP-A 7-144119    Patent Document 5: JP-A-10-192713

Catalyst system for vehicle exhaust gas purification devices, exhaust gas purification device using the same, and method for purification of exhaust gases

Abstract: The catalyst system for vehicle exhaust gas purification devices comprises two or more exhaust gas purification catalysts including two different exhaust gas purification catalysts (first and second catalysts), each supported on an inorganic structural carrier and disposed in an exhaust gas passage, wherein the first catalyst is located on the upstream side in the exhaust gas passage, and the second downstream-side catalyst contains a cerium/zirconium-base compound oxide (A), prepared by melting a starting mixture at its melting point or higher, the molten mixture being then cooled to produce an ingot and crushed.


A method of designing a semiconductor integrated circuit having a plurality of transistors calculates a leak current corresponding to a sum of a gate leak and a channel leak at each node in the semiconductor integrated circuit, estimates a voltage drop value due to the calculated leak current, determines whether or not the voltage drop value exceeds a threshold value for each node, and inserts a buffer to a node determined that the voltage drop value exceeds the threshold value.

1. Field of the Invention
The present invention relates to a method of designing a semiconductor integrated circuit and an apparatus for designing the same.
2. Related Art
With improvement of integration due to advancement of miniaturization technology of transistors, a gate insulating film is becoming thinner and thinner. As the gate insulating film becomes thinner, there may arise a problem that a current flowing from a gate to a substrate, a source or a drain increases. If such a problem occurs, voltages at nodes in the circuit differ from desirable voltages, which cause a malfunction of the circuit or an increase of a leak current.

Method of designing semiconductor integrated circuit and apparatus for designing the same


An embodiment may include a storage processor that may be comprised, at least in part, in a host. The host may include at least one host central processing unit (CPU) to execute at least one host operating system (OS). The storage processor may execute at least one operation in isolation from interference from and control by the at least one host CPU and the at least one host OS. The at least one operation may facilitate, at least in part: (1) prevention, at least in part, of unauthorized access to storage, (2) prevention, at least in part, of execution by the at least one host CPU of at least one unauthorized instruction, (3) detection, at least in part, of the at least one unauthorized instruction, and/or (4) remediation, at least in part, of at least one condition associated, at least in part, with the at least unauthorized instruction.

In one convention system, a host central processing unit (CPU) in a host executes an anti-malware software program that is (ideally) intended to detect the presence of malicious program code in the host and/or arriving at the host from a network, and to prevent and counteract the deleterious effects of such malicious program code on the host. In actual implementation, however, such anti-malware software suffers from significant disadvantages and drawbacks that may prevent the software from achieving these ideally intended results.
For example, when, in the course of attempting to perform its above duties, such software interacts with a device in the host, there can be little to no confidence that the software actually is interacting with that device, and not with a malicious program executing in the host that is attempting to spoof the anti-malware software (e.g., by exploiting a "man in the middle" attack strategy). This may result in the malicious program being able to carry out its activities without being detected or counteracted by the anti-malware software. Additionally, for these and/or other reasons, the anti-malware software may be incapable of detecting and preventing unauthorized access by the malicious program to the host device.
Also, anti-malware software typically saves critical malware detection and recovery information in a password-protected, storage partition. Unfortunately, a malicious program may be able to snoop the provision of the password by the anti-malware software. This may permit the malicious program to be able to access the partition and to modify the information stored in partition. This may permit the malicious program to be able to change (and/or to prevent the effective updating of) the information in such a way as to prevent the anti-malware software from being able to detect and/or remedy the malicious program. Additionally, such anti-malware software typically is incapable of detecting and/or remedying presence of such a malicious program in a host protected area (HPA, e.g., compatible and/or in compliance with American National Standards Institute (ANSI), Information Technology—AT Attachment 8—ATA/ATAPI Command Set (ATA8-ACS), INCITS 452-2009 and/or other versions of this ANSI standard) in storage.
Additionally, some malicious programs are so tenacious and destructive that only certain specialized techniques are able to remove them, while still permitting recovery the user data, without substantial risk of continued infection. For example, one common technique to remove such malicious programs involves performing a complete wipe of host storage, and to reinstall the host operating system from a known uninfected recovery disk. Unfortunately, as a direct consequence of this technique, user data in the host storage is erased. Also unfortunately, depending upon the particular malicious program involved, it is possible that the malicious program may remain in the storage and may be reactivated at a future time. Further unfortunately, depending upon the number of operating system updates that have occurred since the time when the recovery disk was produced, the recovery disk may not contain program code that is capable of detecting or remedying the particular malicious program present in the host.
Although the following Detailed Description will proceed with reference being made to illustrative embodiments, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art. Accordingly, it is intended that the claimed subject matter be viewed broadly.

Unauthorized access and/or instruction prevention, detection, and/or remediation, at least in part, by storage processor


The present disclosure provide synthetic methods for the synthesis of N-substituted vinylidene and alkene compounds in addition to compounds formed from such methods.

Compounds containing vinylidene and alkene functional groups find many applications such as in the development of pharmaceuticals or in polymer manufacture. For example, vinylidene chloride or fluoride are monomer precursors for the widely used plastics polyvinylidene chloride and fluoride, respectively. Due to their wide applicability in the manufacture of various products, there is a clear need for simple and reliable methods for the synthesis of vinylidene-containing compounds.

Methods for synthesizing vinylidenes and alkenes

The Board of Trustees of The University of Alabama


A flat (horizontal) press-fit busbar terminal structure for use in junction boxes, power distribution boxes, and the like at vehicle wiring junctions. Instead of the usual vertical busbar terminal extending through one or more insulation plate layers to be connected to the vertical terminals of a pluggable component, flat press-fit terminals are fastened in horizontal, essentially flush fashion to the surfaces of the flat insulation plates, with horizontally disposed terminal ends for receiving pluggable component terminals therethrough in perpendicular fashion. The flat terminals of the invention greatly reduce the overall height of the junction box, PDB, etc., thereby allowing the vertical component terminals to be used in place of peripheral jumper connections to interconnect one or more layers of busbar terminals.

The present invention is in the field of vehicle junction box busbar terminals.
Current press-fit busbar terminals in vehicle junction boxes are provided as vertical arms, adapted to receive mating terminals from components plugged into the junction box, such as mini-fuses, relays, and the like. The vertical arrangement of the press-fit terminals allows the vertically oriented component terminals to be mated in an axial press-fit. However, junction boxes are becoming increasingly crowded, with more components required for more complex vehicle systems. The vertical press-fit terminals and their associated covering structure tend to give the junction box an overall height which is undesirably large for current vehicle packaging requirements.
The upper ends of other types of vertical terminals often require the addition of female-female terminal adapters housed in xe2x80x9cpedestalxe2x80x9d structure to provide adequate electrical and mechanical connection with the component terminals. These adapters and their pedestals further increase height, as well as cost and complexity.
Junction boxes typically contain several stacked layers of busbars and insulation plates, resembling a sandwich. Busbars on lower-level insulation plates penetrate through slots in upper layers of insulation plates into uppermost structure such as a relay pedestal in order to receive a component plugged into the junction box. It is often necessary to provide xe2x80x9cjumperxe2x80x9d connections between different layers of busbars and insulation plates, achieved by providing electrical connections between busbar ends protruding from the edge of the busbar/insulation plate sandwich. These jumper connections add further complexity to the junction box and are relatively expensive.
Another problem with current press-fit busbar terminals is that they inherently waste metal. Only the terminal end of the vertical leg portion actually makes electrical connection; the remainder simply gives the terminal end enough height to reach the connection.
The present invention is a flat (horizontal) press-fit busbar terminal that lies flat against an associated insulation plate in a junction box. The terminal end of the busbar is slotted to receive the blade-like male terminals of junction box components such as micro-relays, mini-fuses, iso-relays, and the like in a press-through friction fit. The terminal end is accordingly located over a slot-like blade receiving aperture in the insulation plate. The vertical component terminal itself can function as a layer-to-layer xe2x80x9cjumperxe2x80x9d passing through the terminal ends of two or more inventive flat terminals on stacked insulation plate layers.
The invention greatly reduces the overall height of the junction box by eliminating the need for protruding plastic structures such as relay pedestals from the inner terminal cover. The amount of busbar material is also reduced by using the vertical connector from the electrical component as the extension needed to reach a particular electrical connection on a particular insulation plate layer.
Several different possible embodiments of flat press-fit terminals are illustrated, although it has been discovered that the basic two-fingered slotted terminal in common vertical use can be used in flat (horizontal) fashion in the present invention and still provide connection with the vertical component terminals in a simple press-fit insertion.
These and other features and advantages of the invention will become apparent upon further reading of the specification in light of the accompanying drawings.


The present invention is directed toward, a data sink/data source data transmission device and data terminal device for a circuit-switched and packet-switched network, the ability to eliminate the logical separation between applications, which are based on the circuit-switched network (e.g., PSTN, ISDN), and applications, which are based on the packet-switched network, (e.g., Internet). To this end, a data transmission device for transmitting and receiving data into/from the circuit-switched network includes controllable switchover parts. This data transmission device is or can be assigned to a universally useable unit for automatically processing data and for transmitting and receiving data to/from the packet-switched network and is assigned or can be assigned to the at least one data terminal device for transmitting and receiving data into/from the circuit-switched network. The switch-over parts can be controlled in such a manner that the data terminal device which, in a first operating mode is connected to the circuit-switched device, can be switched from the first operating mode into a second operating mode, during which the data terminal device is connected to the packet-switched network via the data transmission device and the data processing device, and from the second operating mode into the first operating mode.

Publications on the subject of "Home Networking" or the "Connected Home" or "Telephony and Control" talk about the networking of devices in the private field, such as, for example, TVs, personal computers and other devices in everyday life. In this connection, the telephone, fixed network telephone or cordless telephone, serves as the gateway to the circuit-switched network (voice network). Here, access to the packet-switched network (data network)—(e.g., Internet access) is insignificant, and can be effected in various ways.
The connection between the packet-switched and circuit-switched network, as shown in FIG. 1, only exists to the extent that devices, such as a personal computer which is connected to the packet-switched network, (e.g., the Internet), via an Ethernet, Digital Subscriber Line (DSL) or cable link, for the purpose of transmitting data in packets and, for example, a cordless base station which is connected to the circuit-switched network via an ISDN/PSTN network termination for the purpose of speech transmission, request that a connection be established (control), or to configure the device with the help of a cordless mobile module (configuration). In doing this, parts of the cordless base station or the telephone functionality are transferred to the personal computer. The control and configuration also can, of course, be effected in the opposite direction.
What is critical, however, is that no voice data is processed in the packet-switched network or data network, as applicable, but instead there is always a logical link between the voice terminal device, the cordless mobile module, and the switching center, the cordless base station. That is, there is no logical link between the circuit-switched voice network and the packet-switched data network (e.g., the Internet) in relation to voice data. The benefits of voice services in the packet-switched data network (such as, for example, Internet telephony, voice messages) are currently not utilized via a cordless mobile module registered with the cordless base station.
Accordingly, the present invention a data sink/data source, data transmission device and data terminal device for a circuit-switched and packet-switched network which eliminates the logical separation between applications which are based on a circuit-switched network, (e.g., PSTN, ISDN), and applications based on a packet-switched network, (e.g., the Internet).

Data sink/data source, data transmission device and data terminal device for a circuit-switched and packet-switched network


As aspartame-sweetened, acidic beverage mix is formulated wherein at least 20% of the aspartame is in bulk (i.e., needle-shaped crystalline particles) form and least 35% of the aspartame is coated onto acid particles. The beverage mix is well suited for powdered, sugar-free, ice tea mixes, particularly fruit-flavored mixes.

As a means for overcoming the problems associated with bulk aspartame a process has been developed to produce a product containing aspartame in combination with citric and/or malic acid. According to this process, aspartame is added to a granulation/mixer, wetted by spraying a measured amount of water and then mixed. Granular citric and/or malic acid is then added and mixed with the wetted aspartame. The mixture is then heated and mixed within a carefully selected temperature range to coat aspartame on the acid particles, and the resulting product is dried. Such a process and product is more fully described in U.S. Pat. No. 5,114,726 of the NutraSweet Company which is hereby incorporated by reference. A suitable material which shall hereafter be referred to as "aspartame-coated acid" is commercially-available from The NutraSweet Company, Deerfield, Ill. under the trademark NUTRASWEET.COPYRGT..

Aspartame-sweetened, acidic, powered beverage mix


The present invention supplies desired DC output power to a first LED load and a second LED load whose color temperature is different from that of the first LED load, includes a switching element, ripple current reducers series-connected to the respective LED loads and for reducing current ripples flowing through the LED loads, and a control circuit for controlling the DC output power so that it has a predetermined value, by performing on-off control of the switching element based on a feedback voltage at a connecting point between each of the LED loads and a corresponding one of the ripple current reducers. Each ripple current reducer has feedback-type constant current control circuits for performing control for varying impedance, and the present invention also includes color controllers for performing color control by maintaining a total LED current value of the first and second LED loads at a certain value.

Technical Field
The present invention relates to an LED driving device and an LED lighting apparatus using the same.
Background Art
Light-emitting diode (LED) elements are beginning to be used as a light source for backlight for a liquid crystal display device or a luminaire such as a street light. In particular, an LED lighting apparatus of a fluorescent-tube or bulb type using white LED elements is under development as a luminaire replacing an incandescent bulb or a fluorescent tube. An LED driving device constituting such an LED lighting apparatus is required to supply a predetermined amount of power to the LED elements with high precision.
The LED driving device also performs color control operation for obtaining various colors by using several emission colors. In this case, the color control operation is often controlled by a microcomputer or the like.
FIG. 1 is a circuit diagram showing a circuit configuration of an example of a conventional LED driving device described in Japanese Patent Application Publication No. 2010-282757. A conventional LED lighting device 100 shown in FIG. 1 includes a commercial power source 102, a power-source switch 103, a microcomputer power source 104, a rectifying circuit 111, a DC power source circuit 112, a power-source synchronizing circuit 113, a microcomputer 114, a non-volatile memory 115, a white LED lighting circuit 121, a red LED lighting circuit 122, and MOSFETs (switching elements) 131.
The white LED lighting circuit 121 having series-connected white LEDs and the red LEDs lighting circuit 122 having series-connected red LEDs are connected to an output side of the DC power source circuit 112. Each of the white LED lighting circuit 121 and the red LED lighting circuit 122 has the MOSFET 131 connected to its LEDs in series.
The rectifying circuit 111 is a diode bridge circuit and is configured to rectify an AC voltage of the commercial power source 102 into a DC voltage and output the DC voltage to the DC power source circuit 112. Based on control by the microcomputer 114, the DC power source circuit 112 converts the DC voltage from the rectifying circuit 111 into a predetermined DC voltage and supplies it to the white LED lighting circuit 121 and the red LED lighting circuit 122.
The microcomputer 114 controls on and off of the MOSFETs 131 to control the brightness of the white LEDs and the red LEDs. The microcomputer 114 is configured to detect a temporary-stop control in which the power-source switch 103 is switched off and then switched on again within a predetermined period of time. Upon detection of the temporary-stop control, the microcomputer 114 performs brightness control by lighting at least one group of the white LEDs and the red LEDs at an illuminance different from that used before the power-source switch 103 is switched off.
FIG. 2 is a diagram showing a circuit configuration of another example of a conventional LED driving device described in Japanese Patent Application Publication No. 2012-155900. A conventional luminaire 10 shown in FIG. 2 includes multiple light sources 45 to 48 (LEDs of first to fourth colors) each configured to emit light of a color different from those emitted by the other light sources and a light-source lighting circuit 37 configured to control the brightness of the light from the multiple light sources 45 to 48 by mixing their colors until turning them off. By its brightness control operation, after one of the light sources 45 and 46, e.g., the light source 45, reaches a lower limit of brightness control, the light-source lighting circuit 37 turns off both of the light sources 45 and 46 when the other one, namely the light source 46, reaches a lower limit of brightness control.
In addition, a microcomputer peripheral circuit unit 50 controls first to fourth circuit blocks 41 to 44 to light the multiple light sources 45 to 48.
However, the LED driving devices described in Japanese Patent Application Publication Nos. 2010-282757 and 2012-155900 have complicated circuit configurations since the color control operation is controlled by the microcomputer.
Moreover, even in a case where only two colors, such as a daylight color and a warm color, are subjected to the color control, the circuit configuration is still complicated due to the use of the microcomputer.
An objective of the present invention is to provide an LED driving device and an LED lighting apparatus which are inexpensive and capable of color control operation with a simple circuit having no microcomputer.

LED driving device and LED lighting apparatus


A fin-FET device and a method for fabrication thereof both employ a bulk semiconductor substrate. A fin and an adjoining trough are formed within the bulk semiconductor substrate. The trough is partially backfilled with a deposited dielectric layer to form an exposed fin region and an unexposed fin region. A gate dielectric layer is formed upon the exposed fin region and a gate electrode is formed upon the gate dielectric layer. By employing a bulk semiconductor substrate the fin-FET device is fabricated cost effectively.

1. Field of the Invention
The invention relates generally to methods for fabricating fin-FET devices within semiconductor products. More particularly, the invention relates to methods for efficiently fabricating fin-FET devices within semiconductor products.
2. Description of the Related Art
Semiconductor products typically employ field effect transistor (FET) devices as switching elements for electrical signal processing functions or electrical signal storage functions. FET devices are quite common, but as they are scaled to smaller dimensions performance difficulties are often encountered. The performance difficulties often derive from short channel effects with FET devices of diminished channel width.
In an effort to alleviate short channel effects within FET devices of diminished channel width, the use of FET devices formed employing a channel having a fin shape has been proposed. Such FET devices are known as fin-FET devices. fin-FET devices are generally fabricated employing silicon-on-insulator (SOI) semiconductor substrates. A silicon fin is defined within the silicon layer of the silicon-on-insulator (SOI) semiconductor substrate and the fin is isolated from adjacent fins by the buried insulator layer within the silicon-on-insulator (SOI) semiconductor substrate.
Although a fin-FET device may be readily fabricated employing such a silicon-on-insulator (SOI) semiconductor substrate, the use of silicon-on-insulator (SOI) semiconductor substrates, rather than bulk semiconductor substrates, generally adds considerable additional cost when fabricating a fin-FET device.
It is thus desirable to provide a method for fabricating a fin-FET device while employing a bulk semiconductor substrate. The invention is directed towards the foregoing object.

FIN-FET device structure formed employing bulk semiconductor substrate

Taiwan Semiconductor Manufacturing Co, Ltd


There is provided a method of manufacturing a silicon carbide semiconductor device including the steps of: in a semiconductor stacked substrate including a first conductivity type silicon carbide crystal substrate, a first conductivity type silicon carbide crystal layer, a second conductivity type silicon carbide crystal layer, and a first conductivity type semiconductor region, forming a trench extending through the first conductivity type semiconductor region and the second conductivity type silicon carbide crystal layer into the first conductivity type silicon carbide crystal layer defined as a bottom surface; forming a silicon film on at least a part of the trench; heating the semiconductor stacked substrate having the silicon film formed to a temperature that is not less than the melting temperature of the silicon film; removing the heated silicon film; forming a gate insulating film on a surface exposed after the silicon film is removed; and forming a gate electrode layer on a surface of the gate insulating film.

For example, a trench-gate power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) that achieves low on-resistance and high breakdown voltage has been proposed as a conventional silicon carbide semiconductor device (see Patent Document 1 (Japanese Patent Laying-Open No. 9-199724) and Patent Document 2 (Japanese Patent Laying-Open No. 10-247732), for example).
As shown in FIG. 16, for example, this conventional trench-gate power MOSFET is formed of a semiconductor stacked substrate 4 including an n+-type silicon carbide crystal substrate 1, an n−-type silicon carbide crystal layer 2 formed on n+-type silicon carbide crystal substrate 1, a p-type silicon carbide crystal layer 3 formed on n−-type silicon carbide crystal layer 2, and an n+-type source region 5 and a p+-type region 6 formed in a surface of p-type silicon carbide crystal layer 3. A hexagonal silicon carbide crystal is used as a silicon carbide crystal and an upper surface (a principal surface) of semiconductor stacked substrate 4 is a carbon surface of a substantial (0001−) surface.
In this conventional trench-gate power MOSFET, a trench 7 extending from a surface of semiconductor stacked substrate 4 through n+-type source region 5 and p-type silicon carbide crystal layer 3 into n−-type silicon carbide crystal layer 2 is formed. This trench 7 has side surfaces 7a perpendicular to a surface of n−-type silicon carbide crystal layer 2 and a bottom surface 7b parallel to the surface of n−-type silicon carbide crystal layer 2.
A thin film semiconductor layer 8 made from an n-type silicon carbide crystal is epitaxially grown on side surfaces 7a of trench 7, and a gate insulating film 9 is formed on a surface of thin film semiconductor layer 8. A gate electrode layer 10 is formed inside gate insulating film 9. An interlayer insulating film 11 is formed on gate electrode layer 10, and a source electrode layer 12 is formed on n+-type source region 5 and p-type silicon carbide crystal layer 3 as well as on interlayer insulating film 11. A drain electrode layer 13 is formed on a surface of n+-type silicon carbide crystal substrate 1 (a lower surface of semiconductor stacked substrate 4).
In the conventional silicon carbide semiconductor device having such a configuration, the application of an electric field to gate insulating film 9 by the application of a voltage to gate electrode layer 10 causes a storage type channel to be induced at thin film semiconductor layer 8, so that a current flows between source electrode layer 12 and drain electrode layer 13.    Patent Document 1: Japanese Patent Laying-Open No. 9-199724    Patent Document 2: Japanese Patent Laying-Open No. 10-247732

Method of manufacturing silicon carbide semiconductor device


A method for operating a maximum power point tracking (MPPT) controller including a switching circuit adapted to transfer power between an input port and an output port includes the steps of: (a) in a first operating mode of the MPPT controller, causing a first switching device of the switching circuit to operate at a fixed duty cycle; and (b) in a second operating mode of the MPPT controller, causing a control switching device of the switching circuit to repeatedly switch between its conductive and non-conductive states to maximize an amount of power extracted from a photovoltaic device electrically coupled to the input port.

Photovoltaic cells produce a voltage that varies with current, cell operating condition, cell physics, cell defects, and cell illumination. One mathematical model for a photovoltaic cell, as illustrated in FIG. 1, models output current as:
                    I        =                              I            L                    -                                    I              0                                                  {                                                exp                                                        [                                                                  q                                                                          (                                                      V                            +                                                          IR                              S                                                                                )                                                                                n                                                                                k                                                                                T                                                              ]                                                  -                1                            }                                -                                    V              +                              IR                S                                                    R              SH                                                          EQN        .                                          1            Where
IL=photogenerated current
RS=series resistance
RSH=shunt resistance
I0=reverse saturation current
n=diode ideality factor (1 for an ideal diode)
q=elementary charge
k=Boltzmann's constant
T=absolute temperature
I=output current at cell terminals
V=voltage at cell terminals
For silicon at 25° C., kT/q=0.0259 Volts.
Typical cell output voltages are low and depend on the band gap of the material used to manufacture the cell. Cell output voltages may be merely half a volt for silicon cells, far below the voltage needed to charge batteries or drive most other loads. Because of these low voltages, cells are typically connected together in series to form a module, or an array, having an output voltage much higher than that produced by a single cell. Additionally, two or more strings of multiple photovoltaic cells are sometimes electrically coupled in parallel to increase capacity.
Real-world photovoltaic cells often have one or more microscopic defects. These cell defects may cause mismatches of series resistance RS, shunt resistance RSH, and photogenerated current IL from cell to cell in a module. Further, cell illumination may vary from cell to cell in a system of photovoltaic cells, and may vary even from cell to cell in a module, for reasons including shadows cast by trees, bird droppings shadowing portions of a cell or module, dust, dirt, and other effects. These mismatches in illumination may vary from day to day and with time of day—a shadow may shift across a module during a day, and rain may wash away dust or dirt shadowing a cell.
From EQN. 1, output voltage is greatest at zero output current, and output voltage V falls off nonlinearly with increasing output current I. FIG. 2 illustrates the effect of increasing current drawn from a photovoltaic device at constant illumination. As current I is increased under constant illumination, voltage V falls off slowly, but as current I is increased to an output current near the photocurrent IL, output voltage V falls off sharply. Similarly, cell power, the product of current and voltage, increases as current I increases, until falling voltage V overcomes the effect of increasing current, whereupon further increases in current I drawn from the cell cause power P to decrease rapidly. For a given illumination, each cell, module, and array of cells and modules therefore has a maximum power point (MPP) representing the voltage and current combination at which output power from the device is maximized. The MPP of a cell, module, or array will change as temperature and illumination, and hence photo-generated current IL, changes. The MPP of a cell, module, or array may also be affected by factors such as shadowing and/or aging of the cell, module, or array.
Maximum Power Point Tracking (MPPT) controllers for operating a photovoltaic device at or near its maximum power point have been proposed. These controllers typically determine an MPP voltage and current for a photovoltaic device connected to their input, and adjust their effective impedance to maintain the photovoltaic device at the MPP.
Photovoltaic devices are typically subjected to one or more production line tests. For example, a photovoltaic device is often characterized using a "flash test," where the device is exposed to light of known intensity, such as a "1 sun" (1,000 watts per square meter) light source, while sweeping a load across the device from open circuit to short circuit, or vice versa. Voltage and current data is recorded during the load sweep, and device open circuit voltage (Voc), short circuit current (Isc), and maximum power point (Pmp) are determined from the recorded data. These device characteristics are used, for instance, to ensure device quality and/or to bin devices according to Voc, Isc, and/or Pmp.
As another example, photovoltaic devices are often subject to "electroluminescence" (EL) testing at one or more times during device production. EL testing includes forcing a test current through the photovoltaic device in a direction opposite to that which current normally flows through the device, thereby causing the device to emit infrared light. The infrared light is imaged to detect device imperfections, such as device cracks, thereby helping ensure device quality.
A photovoltaic device may also be subject to reverse current, which is current flowing through the device in a direction opposite to that of normal operation. For example, consider a scenario where first and second strings of photovoltaic devices are electrically coupled in parallel, and each string includes multiple series-coupled photovoltaic devices. Forward current will flow through both strings if the strings have identical current-voltage characteristics, where a string's current-voltage characteristic depends on both its physical properties and its operating conditions. For example, consider a situation where the first string is exposed to strong sunlight and the second string is mostly shaded. This illumination difference will cause the first string to produce a larger photo-generated current than the second string, such that the strings have different current-voltage characteristics, potentially resulting in a reverse current flowing through the second string.

Systems and methods for controlling maximum power point tracking controllers


A system for adjusting at least one spacer of a bearing assembly includes a force-transmitting member and a preload regulator. The force-transmitting member is configured to operatively receive a force and to transmit the force to an adjustable spacer. The preload regulator includes a first portion and a second portion movable relative to each other with the first portion being movable in response to the force and the second portion being received by and stationary relative to the bearing assembly. The preload regulator further includes a controller coupled to the first portion and the second portion with the controller being configured to detect an electrical contact between the first portion and the second portion.

Anti-friction bearings may serve to decrease friction between, for example, a stator and a rotor. For instance, such bearings may allow relative rotation between a housing and a spindle extending through the housing. The housing may comprise, for example, a hub. The spindle may comprise a shaft, axle, or the like. The bearings may comprise roller bearings, for example, tapered roller bearings. In one example, the tapered roller bearings may be employed in wheel hub and axle assemblies. In another example, the tapered roller bearings may be employed in devices such as motors, pumps, or speed reducers.
A typical tapered roller bearing may include a cone having an inner race for mounting on a spindle, a cup having an outer race for mounting in a housing, and a plurality of roller elements within a roller cage positioned between the inner and outer races. Commonly, a pair of such tapered roller bearings may be mounted on a spindle for rotation relative to or within a housing. Cooperating bearings, such as a pair of tapered roller bearings, may be included in a bearing assembly, for instance, of a motor, pump, speed reducer, or transmission assembly. In one example of "direct mounting" of the tapered roller bearings, the cups may be located in the bearing assembly axially outward relative to the cones. With exemplary "indirect mounting" of the tapered roller bearings, the cups may be located in the bearing assembly axially inward relative to the cones, as will be understood by those skilled in the art.
In order to properly secure bearings for operation, it is usually necessary to retain the bearings tightly under a predetermined axial tolerance or load on the spindle, for example, so that the bearings can maintain a proper running clearance of the roller elements under the influence of the combined axial and radial forces which the bearings are designed to support. Manufacturers of such assemblies often carefully measure the space between the bearing inner races, and provide a spacer of precisely the correct dimension and load requirements to fit therebetween. The spacer is typically made of ground steel tubing to a length tolerance of plus or minus one half of one thousandths of an inch. If the bearings are not maintained at a proper tolerance and/or load the bearings may not roll properly or may prematurely wear, particularly if the bearings are maintained at too high of a load, or may, if maintained under too low of a load, have excessive play causing failure of the bearings.
An exemplary configuration for an adjustable spacer is disclosed in U.S. Pat. No. 5,549,397 to John E. Rode (entitled "Adapter Sleeve and an Adjustable Spacer with Radial Extension Useable Thereon," issued Aug. 27, 1996, and assigned to Temper Corporation), which is hereby incorporated herein by reference in its entirety. One approach to assembling or preloading a bearing arrangement is disclosed in U.S. Pat. No. 4,214,465 to Rode. The preloading or adjustment incorporates use of a deformable spacer which is assembled with the bearings using a hydraulic ram assembly.
Thus, a need exists for improving ease, accuracy, performance, repeatability and/or control of adjustment to an adjustable spacer of a bearing assembly. A need also exists for decreasing the degree of operator judgment and/or skill required (e.g., by introducing automation and/or indicators, such as for mass production situations and/or arrangements) to properly adjust the spacer. An additional need exists for decreasing dimensional measurements required to properly prepare a bearing assembly and/or a spacer thereof. Another need exists for the adjustable spacer to allow a desired adjustment to be provided for the bearing assembly. Thus, a need exists for a system improving ease, accuracy, and control of adjustment, fitting, assembling, or tailoring of workpieces, e.g. bearing assemblies and spacers thereof.

Bearing assembly spacer adjustable system and method for adjusting a spacer


An optomechanical switch comprised of light or laser movable liquid crystal is disclosed. The optomechanical switch consists of a plate of light movable liquid crystal rotatably disposed with respect to a substrate. When activated with a light or laser source, the light movable liquid crystal is rotated angularly to create transmissive and reflective states of transmission for the optical beam.

Recently, the unique behavior of liquid crystal elastomers have been examined. Among the remarkable properties of these liquid crystal elastomers is that some of the liquid crystal materials have the property of changing their shape by up to 400%. Other developments have shown some liquid crystal elastomers can be considered laser or light movable liquid crystals. This opto-mechanical effect can be controllable and reversible and reproducible. All variables are important criteria for developing commercially viable applications taking advantage of the unique properties of these liquid crystal elastomers.
Properly designed liquid crystalline elastomers can exhibit very strong opto-mechanical or photo-mechanical effects. The phenomena is discussed more extensively by H. Finkelman, et al. "A New Opto-Mechanical Effect in Solids," Physical Review Letters, Vol. 87, No. 1, 015501-1 (Jul. 2, 2001), which is herein fully incorporated by reference.
It has been shown that the proper design of the liquid crystal elastomer materials depends on the nematic order of those crystals which are molecular shaped materials which can be oriented in certain ways based on electric currents. Specifically, twisted nematic liquid crystals can be oriented by electrical currents.
For purposes of this specification, a properly designed liquid crystal elastomer which exhibits the photomechanical effect will be called a Light Moveable Liquid Crystal ("LMLC'). The LMLC is approximately several micrometers in size. The LMLC is a nematic elastomer which can change its shape by 400%.
To illustrate the unique properties of the LMLC, attention is directed to FIG. 1, which illustrates a single LMLC and its effect after application of a light or laser source. Referring to FIG. 1, there is shown a LMLC 1, after application of laser or light source 5, and the movement of the LMLC when light or laser is incident upon its surface. The LMLC 1 physically bends when it absorbs light and is seen to be "moving."
FIG. 2 illustrates that the LMLC 1 can be rotated depending upon the angle of incidence of the light source. The LMLC may be arranged to move in circular or elliptical fashion. Based on the angle of incidence of the laser beam, LMLC will gain angular momentum, causing circular or elliptical motion.
Various uses for actual commercial devices employing LMLCs have been suggested, but none have been fully disclosed. Specifically, the invention disclosed proposes an optomechanical switch which can be used in conjunction with free space optics or with waveguides.
Such commercially viable applications of such light or laser movable liquid crystal ("LMLC") have not heretofore been developed.

This patent is subject to a terminal disclaimer.

Optomechanical switch using laser or light movable liquid crystal


A pillar grid array package (PGA) includes a substrate, a chip disposed on top of the substrate, and a plurality of stud bumps disposed on bottom of the substrate. The stud bumps are formed in an array and each has a flattened top to electrically connect to a printed circuit board, PCB, by an anisotropic conductive paste to achieve a thin package and to avoid substrate warpage problems of a ball grid array (BGA) during high-temperature reflow processes.

The well-known ball grid array package (BGA) is to place solder balls on a substrate in an array for mounting on a printed circuit board (PCB) by surface mount technology, SMT, to achieve the maximum pin counts within the minimum footprint.
As shown in FIG. 1, a conventional BGA package 100 includes a substrate 110, a chip 120 and a plurality of solder balls 140. The chip 120 is disposed on the top surface 111 of the substrate 110 wherein the chip 120 is a bumped chip with a plurality of bumps 122 disposed on the active surface 121 of the chip 120. Then the chip 120 is flipped and electrically connected to the substrate 110 by means of the bumps 122. A plurality of solder balls 140 arranging in an array are disposed on the bottom surface 112 of the substrate 110 to electrically connect to the SMT surface 11 of the PCB 10. Normally, an underfill 130 is disposed between the chip 120 and the substrate 110 to encapsulate the bumps 122.
When the BGA package 100 is attached to the PCB 10 by SMT, in order to electrically connect the solder balls 140 to the connecting pads of the PCB, a high-temperature reflow process is necessary. However, during the reflow process, the substrate 110 can be easily warpaged due to the high reflowing temperature. Normally, the maximum stress is concentrated on parts of the solder balls 140 close to the edges of the substrate 110. The solder balls 140 can be easily broken leading to electrically open. In order to increase the bonding strength of the solder balls 140, larger solder balls are preferred but will easily cause bridging during SMT processes.