A gathering and picking device comprising a first gathering element that is arranged on a first side of a picking gap and a second gathering element that is arranged on a second side of a picking gap opposite the first gathering element. Both gathering elements are rotated about a predominantly vertical axes and are provided with carrier elements that grasp standing plants. The carrier elements introduce the standing plants into the picking gap and convey the standing plants over at least part of the length of the picking gap.

U.S. Pat. No. 5,916,113 A describes a corn harvesting attachment that can be attached to a self-propelled harvesting machine, wherein a series of conveying elements with approximately vertical axes of rotation are arranged along both sides of the picking gap. The conveying elements are provided with conveying fingers that are oriented radially with respect to the axis of rotation and convey the plants along the picking gap. With respect to the conveying direction, the conveying elements are arranged, offset relative to one another, on both sides of the picking gap such that the plants are conveyed due to their alternating interaction with the conveying elements on both sides. At the inlet end of the picking gap, a conveying element is provided only on one side, wherein said conveying element is only able to laterally convey the plants into the picking gap a short distance. This means that this conveying element conveys the plants almost exclusively rearward. A conveying element is not provided on the opposite side of the inlet end, so that the plants are introduced into the picking gap only by the stalk dividers and the rounded inlet side of the stripping plate that defines the picking gap. Only a small operating width of the individual gathering and picking units can be achieved in this fashion.
DE 197 34 747 A describes a corn harvesting attachment that cuts plants standing in a field independently of the rows planted and picks the ears off the corn plants. This attachment comprises a cutting mechanism for grasping and cutting the plants independently of the crop rows, wherein the cutting mechanism comprises a rotating drum with recesses on the outer circumference to accommodate the plant stalks and a rotating cutting disk arranged underneath the drum. The plants are conveyed to conventional picking units arranged downstream of the cutting mechanism. The separated ears of the plants are then additionally conveyed by means of two chain conveyors arranged above the picking gap. In one embodiment, two adjacent cutting mechanisms feed the plants to a picking unit arranged between the cutting mechanisms. One disadvantage of this device can be seen in the relatively long structural length caused by the use of the cutting mechanisms and the picking units arranged downstream from them. This also results in a high total weight and a center of gravity of that is relatively forward.
DE 100 28 887 A describes another corn harvesting attachment, in which a gathering element rotates about an approximately vertical axis and is provided with radially oriented carrier elements grasps the stalks of plants standing in a field and conveys the plants along the picking gap of a picking device. Use of a rotating gathering element permits the operating width to be increased in comparison with conventional pickers that operate with gathering chains, since plants that stand laterally adjacent to the picking gap are also drawn in. Because the gathering element also conveys the plants through the picking gap, the structural length is reduced in comparison with the embodiment described in DE 197 34 747 A. In order to prevent possible conveying problems during the introduction of plants into the picking gap, DE 100 28 887 A proposes to arrange another conveying element that introduces the plants into the picking gap and is realized in the form of a screw conveyor or a chain conveyor on the side situated opposite to the gathering element. However, conveying problems can still arise under certain harvesting conditions.


A sliding window assembly includes a window frame and a window cooperable with the window frame and displaceable on the window frame between an open position and a closed position. Operating components of the assembly include a counterbalance connected between the window frame and the window and an optional motor that drives a cable connected to the window. The counterbalance is biased to assist the motor in displacing the window relative to the window frame toward the open position.

The invention relates generally to a door/window for a boat and, more particularly, to a sliding door assembly for a boat.
A powered door assembly is a desirable feature for a boat windshield including a pass-through. A boat passenger can press a button on either side of the door/window to activate a motor that opens or closes the door assembly. Challenges in the design relate to positioning the drive components, accommodating the weight of the door, providing for a safety release, enabling component access for repair or replacement if necessary, etc.


An apparatus (100) is provided for powering an in-battery electronic application module (118) without the use of an external on/off switch. A battery pack (102) is electrically coupled to a radio (104) via three interface contacts: power (108), ground (112) and single-wire serial data port (110). Circuitry is included within the battery pack (102) to sense and monitor data activity on the single-wire serial data port (110) generated as the radio (104) is turned on. Based on the level and timing (200) of the data activity present on the single-wire serial port (110), the electronic application module (118) can automatically be turned on (208), remain on (210) and turned off (212).

Portable battery powered communication devices, such as radios and cellular telephones, continue to provide additional features to the consumer. To this end, designers have had to integrate and miniaturize an increasing number of circuits and features within the device. Recently, designers have even started incorporating radio features, in the form of application specific modules, within the battery pack. These application specific modules are manually turned on and off via an on/off switch. The on/off switch is not typically available to the end-consumer but is usually set at the factory or by a service shop.
The ability to upgrade a portable radio without taking the radio to a service shop for programming and without additional interface hardware is highly desirable. Adding radio functionality to the battery pack poses several challenges, one being that the radio electronics located in the battery pack must be turned off when the radio is turned off, so as not to drain the battery cell(s). While an additional contact can be used to provide this on/off capability, older existing radios can not be retrofitted and newer radios require a larger interface connector thereby increasing parts count and cost.
Accordingly, it would be desirable to have a battery pack with a simplified on/off control of an in-battery application module.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.

Apparatus for control of in-battery module


A system and method for filling voids between optical signals during switching in an optical telecommunications system. The optical switch includes a void filling and scheduling software program resident in memory and executable by a processor. The memory also includes the wavelength, position in time, duration for each void between previously scheduled optical data packets. As a new optical data packet arrives at the optical switch, the void filling and scheduling software program will calculate the available delay for each delay line as measured from the arrival time of the new optical signal and schedule the new optical signal within a particular void if (1) one of the available delays falls within the position in time of one of the voids and (2) if the duration of the new optical signal measured from the particular available delay fits within the duration of that void. If the new optical data packet will not fit within any of the existing voids, the void filling and scheduling software program will use a conventional scheduling routing to schedule the new optical data packet on an output fiber.

The present invention relates generally to telecommunications systems and methods, and more particularly, to optical telecommunications systems and methods, and even more particularly to optical fiber-delay line buffers that incorporate a void filling procedure to minimize gaps in optical transmissions, for use with fixed and variable length synchronous and asynchronous optical data packets.
Telecommunications providers have increasingly moved to optical fiber based networks. Fiber optics telecommunications networks require optical signal processing means, including optical switches or optical routers, at the nodes of the optical network to orient incoming optical signals and select the appropriate output channel. These optical switches or routers are designed to prevent packets of data from colliding because more than one packet has arrived at an output at the same time. Optical switches include buffers to aid in processing the optical data packets through the optical switch.
Conventional optical switching systems exist that are designed to prevent optical data packets from colliding during processing. However, these optical switching systems have failed to address all potential optical data packet configurations, including both synchronous (i.e., time-slotted) and asynchronous, and fixed or variable length optical data packets. This presents a significant limitation because present internet protocol (IP) traffic is asynchronous, variable length traffic. One prior art system discloses an optical switch architecture-specific switching operation that performs collision-free switching on synchronous, fixed length data packets. However, this system is limited to a particular architecture optical switch that does not accommodate variable length, asynchronous optical data packets. Furthermore, this prior art system does not fill the voids or gaps associated with optical data packet transport. Another prior art system also discloses a method of switching optical data packets, however the method is limited to fixed length optical data packets and does not accommodate wave division multiplexing (WDM). Not using WDM transmission causes a significant degradation in overall system performance. Furthermore, this prior art system also fails to disclose a method of filling voids that occur in optical transport systems.
The present invention provides an improved system and method for buffering optical transmissions that substantially eliminates or reduces disadvantages and problems associated with previously developed optical buffering systems and methods for use in fiber optic data packet transmission systems.
More specifically, the present invention provides a system and method for filling voids between optical signals during switching in an optical telecommunications system. The optical switch includes an optical buffer with a series of output fibers, where each output fiber includes a number of wavelengths, and a series of delay lines for inducing unique delays into incoming optical signals. The optical switch also include a void filling and scheduling software program resident in memory and executable by a processor. The memory also includes the wavelength, position in time, duration for each void between previously scheduled optical data packets. As a new optical data packet arrives at the optical switch, the void filling and scheduling software program will calculate the available delay for each delay line as measured from the arrival time of the new optical signal and will schedule the new optical signal within a particular void if (1) one of the available delays falls within the position in time of one of the voids and (2) the duration of the new optical signal measured from the particular available delay fits within the duration of that void.
If the new optical data packet will not fit within any of the existing voids (either because no delay coincides with the existing voids or because the space in a coincident void is not large enough to accommodate the new optical data packet), the void filling and scheduling software program will use a conventional scheduling routine to schedule the new optical data packet on an output fiber. If a new void is created during the conventional scheduling, the program can store this void in memory and attempt to fill the new void along with the previously unfilled voids as new data packets arrive.
The present invention provides an important technical advantage by filling the time gaps between optical data packets that inherently result during optical switching of optical data packets for non-uniform buffers used in conjunction with synchronous traffic and for asynchronous traffic regardless of whether the buffers are uniform or non-uniform.
The present invention provides another technical advantage by providing an improved optical buffer that can perform void filling for optical data packet that are asynchronous or synchronous, variable length or fixed length.
The present invention provides still another technical advantage by providing an improved optical buffer that can perform void filling for non-uniform buffers that virtually appear larger than equivalent uniform buffers. This increases the system performance for the same hardware, while also filling gaps between optical signals that arise.
The present invention provides another technical advantage by providing an optical buffer that is independent of the optical switch architecture and can provide the buffering for fixed/variable length optical data packets, synchronous/asynchronous optical data traffic mode for various optical switches.
The present invention provides yet another technical advantage by providing a void filling buffer and method of buffering that work equally well for both standard and wave division multiplexing optical transmission systems.
The present invention provides still another technical advantage by improving the performance of fiber delay line optical buffers under asynchronous, variable length traffic without increasing the buffer depth or size.

Optical fiber-delay line buffers with void filling


A core component is shaped to compensate for varying widths and depths of the shell or framing of a building or structural member. The component includes two major surfaces defining respective front and rear sides of the component, and the rear side of the component is preferably the mirror image of the front side. The core component is preferably pre-formed and provided in a space or void on the interior of building or structural members, e.g., two prefabricated molded doorskins. The core component is preferably made from a composite soft board material. Processes for the production of a core component and a building member such as a composite door product are also disclosed.

1. Field of the Invention
The invention relates generally to the production of man-made composite structural and building products. More particularly, the invention relates to the production of a cellulosic core component which can be utilized, for example, in an interior space or void formed by the shell or framework of a building product, e.g., composite doorskins.
2. Brief Description of Related Technology
Man-made boards, such as fiberboard, can be embossed or molded to have three-dimensional shapes and various design and structural features found in natural wood. Types of useful man-man boards are referred to by the following terms, for example: (a) fiberboards such as hardboard (e.g., low-density hardboard), soft board, and medium-density fiberboard and (b) chipboards such as particleboard, medium-density particleboard, and oriented strandboard ("OSB"). Composites of these boards are also useful. Such boards, particularly hardboard, have found widespread use in the manufacture of doorskins, which can be glued together or laminated to form a shell which supports or encloses a structure or a frame.
Commonly, doorskins (also referred to as door faces) are molded from a planar cellulosic mat to include one or more interior depressions or contours, such as one or more square or rectangular depressions which do not extend to the outer edge or periphery of the doorskin product. Doorskins often require inclined molded walls having a plurality of contours that include varied curved and planar surfaces. Where the depressions or contours are included on a doorskin product, this can serve to replicate a more expensive natural wood paneled door. For example, doors having two, three, four, five, and six panel designs are commonly produced. The exterior or visible surfaces of the fiberboard also can be embossed with a design that represents a wood grain pattern found in a natural piece of wood.
The principal processes for the manufacture of wood composites such as doorskins and other structural or building products include (a) wet felted/wet pressed or "wet" processes, (b) dry felted/dry pressed or "dry" processes, and (c) wet felted/dry pressed or "wet-dry" processes.
Generally in a wet process, cellulosic fillers or fibers (e.g., woody material which is subjected to fiberization to form wood fibers) are blended in a vessel with large amounts of water to form a slurry. The slurry preferably has sufficient water content to suspend a majority of the wood fibers and preferably has a water content of at least ninety percent by weight ("weight percent") of the wood fibers. The slurry is deposited along with a synthetic resin binder, such as a phenol-formaldehyde resin, onto a water-pervious support member, such as a fine screen or a Fourdrinier wire, where much of the water is removed to leave a wet mat of cellulosic material having, for example, a moisture content of about fifty weight percent, based on the dry weight of the fibers. The wet mat is transferred from the pervious support member to a press and consolidated under heat and pressure to form the molded wood composite.
A wet-dry forming process can also be used to produce cellulosic composites. Preferably, a wet-dry process begins by blending cellulosic or wood fiber raw material in a vessel with large amounts of water having a pH of less than seven to form a slurry. This slurry is then blended with the resin binder. As in the wet process described above, the blend is then deposited onto a water-pervious support member, where a large percentage of the water is removed, thereby leaving a wet mat of cellulosic material having a water content of about fifty weight percent, for example. This wet mat is then transferred to an evaporation zone where much of the remaining water is removed by evaporation. The dried mat preferably has a moisture content of less than about thirty weight percent. The dried mat is then transferred to a press and consolidated under heat and pressure to form the wood composite which may be, for example, a flat board, a doorskin, or any other desired shape depending on the intended use of the product.
In a dry process, the cellulosic fibers are generally conveyed in a gaseous stream or by mechanical means rather than a liquid stream. For example, the cellulosic fibers may be first coated with a thermosetting resin binder, such as a phenol-formaldehyde resin. The fibers are then randomly formed into a mat by air blowing the resin-coated fibers onto a support member. The mat may optionally be subjected to pre-press drying. The mat, typically having a moisture content of less than about thirty weight percent and preferably less than about ten weight percent, is then pressed under heat and pressure to cure the thermosetting resin and to compress the mat into an integral consolidated structure.
The fiber mats formed by the above-described methods can be pressed into a pre-selected decorative shape, typically at a thickness of about one-eighth of an inch. As stated above, in the case of a composite door product, the decorative shape generally includes one or more panels and/or other contours in the doorskin, as described above. Two doorskin pieces are typically joined together with an adhesive binder, which is placed at least at the contact points along the periphery of the door assembly formed by the doorskins. Because the doorskin pieces are contoured, an open, interior space of varying dimensions is formed by the doorskin assembly.
Doorskin pieces are often not used alone, but in conjunction with some other material(s) to add support to the final door product. The doorskin pieces often utilize wood framing at or near the perimeter of the assembled doorskin. It is known to use rails and stiles, which, when attached together, can provide additional structural support for the door. Rails can be generally described as horizontally-oriented beams which provide support for the door. Stiles, on the other hand, can be generally described as longitudinal or vertically-oriented beams which provide support for the door. In addition, a lock block is optionally utilized to provide further support for a door handle and/or a locking mechanism (e.g., a so-called "dead bolt") at the periphery of the door. The lock block is preferably secured to a stile and/or a rail.
However, although the structure of a man-made composite door product is supported with rails and stiles, often the door still will not perform as well as a natural solid wood door because the interior spaces defined by the doorskins will be substantially hollow or empty. The hollow spaces or voids cause the door to be lighter than is generally preferred. Further, it is often found that the sound insulation provided by such doors may not be satisfactory. Thus, it is often desirable to use a core material (e.g., core pieces or components) to fill these hollow spaces.
In the past, core materials made of corrugated cardboard and/or paper have been used. However, it has sometimes found that the sound insulation provided by doors using such core materials may not be satisfactory.
A suitable core material should also provide the door product with a desirable weight, for example the weight of a similarly-styled natural solid wood door. A typical, thirty-inch wide solid pine door weighs approximately forty-two pounds. Known core materials and components have the disadvantage, for example, that they often fall far short of the desired weight. In addition, some alternatives to doorskins having a core material (e.g., full thickness particleboard doors) produce a door that is too heavy and/or difficult to manufacture. In addition, a core material should provide the door with a relatively even weight distribution.
The core material should also have characteristics (e.g., size and shape) that allow placement and attachment within the interior spaces formed by the doorskin assembly. As described above, doorskins, particularly for paneled doors, are commonly molded to include one or more interior depressions (i.e., on the surface at some distance from the periphery), such as one or more square or rectangular depressions that do not extend to an outer edge of the doorskin. These surface depressions create varying depths (measured from the front face to the back face of the door) of the interior void formed by a pair of assembled doorskins. When placing a core material or component on the interior of the doorskin assembly, it is therefore necessary to compensate for the varying depth of the interior void.
Another problem with known core components is that different styles of door (e.g., two-, three-, four-, five-, and six-panel models) will have different patterns of hollow spaces or voids. Thus, a door manufacturer has generally been required to have readily available various sizes and patterns of core components for the different models of doorskins it wishes to use. This is undesirable because such a system requires (a) various different machinery (e.g., dies) to make the varying types of core materials and (b) the stocking of multiple sizes of the produced core materials. Such necessities make the manufacturing process more complicated and expensive. It would therefore be desirable to have a single core component design which could be used for multiple designs of doors.

Method of producing core component, and product thereof


A cell array of a flash memory device includes a memory cell transistor connected to a word line, a first selection transistor for controlling a first connection between the memory cell transistor and a bit line in response to a selection signal, and a second selection transistor for controlling a second connection between the memory cell transistor and a common source line in response to the selection signal.

1. Field of the Invention
The present invention relates to a semiconductor memory device and, more particularly, to a flash memory device capable of performing high speed read and write operations.
2. Description of the Related Art
In general, a flash memory having eXecution In Place (XIP) functionality may be used for a portable device, for example, that requires memory having a small size or a short boot time. The XIP functionality enables programs to be executed directly from the flash memory. Codes stored in an XIP flash memory may be executed within the flash memory without first having to transfer the execute codes into random access memory (RAM). The XIP functionality enables the same execution of many application programs, while reducing the required RAM capacity.
Historically, typical NAND flash memories were not able to provide XIP functionality, so NOR flash memories were used as XIP memories. Recently, though, NAND flash memories capable of supporting XIP functionality have been developed. NAND flash memories may be desirable over NOR flash memories as XIP memories due to their low cost and high density.
A metal strapping technique has been used to reduce resistance of a signal line, e.g., formed of polysilicon, having a relatively large resistance. A signal line formed by the metal strapping technique may reduce the resistance using a metal conductor and a contact formed on the signal line, improving a signal transfer speed of the semiconductor device. A reduction in signal line resistance may enable a corresponding reduction in power. Also, a signal line (e.g., a common source line) formed by the metal strapping technique reduces coupling effect to increase operating reliability.
FIG. 1 is a circuit diagram showing a structure of a conventional XIP flash memory. Referring to FIG. 1, the XIP flash memory includes memory cell units 10, 20, 30 and 40, each of which has two selection transistors ST<n> and GT<n> and one cell transistor MC<n>. For convenience of description, the cell structure of the XIP flash memory will be described referring to only one memory cell unit, the memory cell unit 10, as an example.
The selection transistors ST<0> and GT<0> of the memory cell unit 10 respectively correspond to the string selection transistor SST and the ground selection transistor GST of a typical NAND flash memory. However, the memory cell unit 10 of the XIP flash memory may include only one cell transistor MC<0>, where a typical NAND flash memory may include multiple cell transistors connected in series between the string selection transistor and the ground selection transistor. The memory cell unit 10 is supplied with selection signals through the selection signal lines SSL<0> and GSL<0> and with a word line voltage through a word line WL<0>. The lines SSL<0>, WL<0> and GSL<0> are selectively connected to the memory cell unit 10 via high voltage switches PG<0>, PG<1> and PG<2>, respectively, which are switched on under the control of an X-decoder (not shown).
As illustrated in FIG. 1, three high-voltage switches are used to transfer control signals to each of the memory cell units 10, 20, 30 and 40. Also, the memory cell units 10 and 20 share a bit line BL<0> and a common source line CSL, and the memory cell units 30 and 40 share a bit line BL<1> and the common source line CSL.
FIG. 2 is a diagram showing a cross-section taken along a dashed line A-A′ in FIG. 1. FIG. 2 shows a schematic cross-section of the memory cells when a metal strapping technique is applied to word lines in an XIP flash memory. Referring to FIG. 2, in general, the control gates of selection transistors ST<0>, ST<2>, GT<0> and GT<2> are respectively connected to corresponding metal strapping lines MS1, MS3, MS5 and MS7 via contacts, and the control gates of the cell transistors MC<0> and MC<2> are respectively connected to corresponding metal strapping lines MS2 and MS6 via contacts. A common source line CSL formed on a diffusion layer in a P-type substrate is connected to a metal strapping line MS4.
In this configuration, seven metal strapping lines MS1 to MS7 are required for two memory cell units sharing the common source line and a bit line. The metal strapping lines of the XIP flash memory increase the chip size. Also, although the metal strapping lines have lower resistance than polysilicon lines, it is difficult to form the metal strapping lines and to reduce their corresponding line widths. Accordingly, increases in operation reliability and speed of an XIP flash memory is accompanied by increased cost.

Cell array of memory device sharing selection line


The invention provides elastomeric copolyester amides, elastomeric copolyester urethanes, and methods for making the same. The polymers are based on α-amino acids and possess physical, chemical and biodegradation properties that render them suitable for use in the human body. The polymers are useful as carriers of drugs or other bioactive substances. The polymers can also be linked, intermixed, or a combination thereof, to one or more drugs. Additionally, the polymers can be used to coat stents, for example, to suppress restenosis. Furthermore, the biodegradation of the copolyester amides and copolyester urethanes allows for the delivery of essential α-amino acids to sites in the body, for example, to facilitate wound repair of injured tissues.

While they potentially offer many advantages due to their "organic nature," conventional poly(α-amino acids) possess many undesirable physical, chemical and biodegradation properties. For example, the biological and material properties of conventional poly(α-amino acids) cannot be varied over a wide range. In addition, the synthesis of many conventional poly(α-amino acids) is difficult and expensive.
A considerable amount of attention has therefore been focused on replacing the amide (peptide) linkage in the conventional poly(α-amino acids) with a variety of non-amide bonds to provide novel polymeric systems that are based on α-amino acids. One class of α-amino acid derived polymers are polyisopeptides (alternatively known as pseudo-poly(amino acids)), which belong to the XY-type heterochain polymers. Polyisopeptides are usually formed by linking trifunctional α-amino acids in the backbone chains. However, relatively few attempts have been made to synthesize polyisopeptides. For example, Sekiguchi et al. obtained poly-β-(α-allyl-L-aspartate) by the ring-opening polymerization of β-lactams. See, Rodriguez-Galan, A. et al., Makromol. Chem., Macromol. Symp., 6, 277 (1986) and Vives, J. et al., Makromol. Chem., Rapid Commun., 10(1):13 (1989). One major limiting feature of polyisopeptides is that structural modifications are limited solely to chemical variations at the N-acyl residue of the polyisopeptide. This narrow range of chemical modification has resulted in an undesirably narrow range of material properties of these polymers.
Another class of α-amino acid derived polymers are amino acid based bioanalagous polymers (AABBPs), which belong to the XX-YY heterochain polymers. AABBPs are mainly obtained by the polycondensation of XX (one type of monomer having two X functional groups) and YY (another type of monomer having two Y functional groups). AABBPs are not pure polyamino acids or pseudo-polyamino acids because they include residues of other types of monomers (e.g., dicarboxylic acids and diols).
One class of AABBPs are poly(ester ureas) (PEUs), which are prepared from bis-α-aminoacyl diol monomers. The first attempt to use bis-α-aminoacyl(phenylalanyl) diol for preparing bioabsorbable, semi-physiological polymers similar to poly(ester urea) was by Huang et al. Huang S. J., et al., J. Appl. Polym. Sci., 23(2): 429 (1979). Only low-molecular-weight PEUs, having limited material properties, could be prepared by this route.
Lipatova et al. have also synthesized semi-physiological poly(ester urethane ureas) from bis-L-phenylalanyl diols, diols, and diisocyanates. Lipatova T. E., et al., Dokl. Akad. Nauk SSSR, 251(2): 368 (1980) and Gladyr I. I., et al. Vysokomol. Soed., 31B(3): 196 (1989). However, no information on the synthesis of the starting material (e.g., α-diamino diesters) was given.
Yoneyama et al. reported on the synthesis of high-molecular-weight semi-physiological PEUs by the interaction of free α-diamino-diesters with non-physiological diisocyanates. Yoneyama M., et al., Polym. Prepr. Jpn., 43(1): 177 (1994). Contrary to Huang et al. (Huang S. J., et al., J. Appl. Polym. Sci., 23(2): 429(1979)), high-molecular-weight PEUs were obtained in some cases. In view of this preliminary data, there remains an ongoing need for novel polymers based on α-amino acids that possess a wide range of physical, chemical and biodegradation properties.

This patent is subject to a terminal disclaimer.

Elastomeric functional biodegradable copolyester amides and copolyester urethanes


In the following device, at the time of pan/tilt movement of a pan head, images #1 to #3 for three frames shot by a camera are sequentially taken in into an image memory of an image processing device. And, processing of an image processing processor as well as a CPU compares the image #1 with the image #2 and the image #1 with the image #3 respectively so as to extract an image of an moving object so as to detect moving velocity of the moving object based on the image of this extracted moving object. When the moving velocity of the moving object is detected, a command signal to cause the pan head to pan/tilt at the moving of that moving object is given to a pan head controller by the CPU. This moves the pan head in the pan/tilt direction at the moving velocity of the moving object. Thus, detection of the moving velocity of the moving object from the shooting image of the camera and control of the moving velocity of the pan head based on the detected moving velocity of the moving object enables following on the moving object without fail.

1. Field of the Invention
The present invention relates to a following device, and in particular to a following device which automatically follows a moving object with shooting direction of a camera caused to move automatically.
2. Description of the Related Art
A following device is a device which causes a pan head on which a television camera is mounted to pan/tilt with motor drive so as to automatically move the shooting direction of a camera and automatically follow moving subjects. As a method of following, the one described in Japanese Patent Application Publication No. 59-208983 is widely known. According to this method, an image covering two frames (covering two screens) in a predetermined time span from image signals outputted from a camera, and an image of a moving object is extracted with comparison of those images. In addition, from the position of the center of gravity of that extracted moving object, moving amount as well as moving direction of the moving object is detected, and the shooting direction of the camera is automatically controlled with panning/tilting of the pan head so that the center of gravity of the moving object always stays in the center of the screen based hereon.
In the present specification, operations of the pan head caused to move the shooting direction of the camera in the panning direction or the tilting direction will be referred to as the panning direction or tilting direction of the pan head or merely the movement of the pan head.
In the method of following described in the above described Japanese Patent Application Publication No. 59-208983, in order to extract images of a moving object by comparing images covering two frames taken in from a camera, the pan head is required to halt while those images for comparison are being taken in. That is, difference in shooting ranges of images for comparison due to movement of the pan head gives rise to movement of the image of the static objects on the screen so as to make it impossible to distinguish the image of the moving object and therefore the pan head cannot be moved while the images for comparison are being taken in. Thus, the above described following method cannot follow moving objects which move fast, and the pan head repeats movement and halt, giving rise to such defaults that the screen becomes less vision-friendly.
Under the circumstances, in order to overcome such a defect, the present applicant of the present application has proposed in Japanese Patent Application Publication No. 2000-175101 a method of following which has made it possible to extract the image of the moving object also from images of different shooting ranges and to recognize the images of the moving objects in spite that the pan head is being moved. According hereto, in spite that the pan head is halted or is moving, the images are taken in from the camera and the pan/tilt position of the pan head at that time is acquired. When images covering two frames are taken in a predetermined time, based on the pan/tilt position when each image is taken in, the shooting range of the camera at the time when each image was shot is given and the overlapping range in the shooting range of each image is determined as the comparison range. Within this comparison range, since the image of a static object does not move, comparison of images in the comparisons range will enable extraction of images only of the moving object.
However, the method of following in Japanese Patent Application Publication No. 2000-175101 detects the position of the moving object on the screen so as to control panning/tilting of the pan head so that its position will come approximately to the center of the screen, and thus the pan head will move following the movement of the moving object. Accordingly, when the moving velocity of the moving object gets fast, under such control of the pan head, the moving object would get out of the shooting range of the camera, and might result in failure to follow. In addition, since the moving velocity of the moving object cannot be determine, smooth following is unattainable.
In addition, in the method of following described in the above described Japanese Patent Application Publication No. 59-208983, a slight movement of the moving object within the shooting range of the camera results in a movement of the pan head and a movement of the shooting direction of the camera. Thus, due to defects such as swings of the screen and poor visualization of a camera, the applicant of the present application has provided a range of dead zone in the central portion of the screen in U.S. patent application Ser. No. 09/726,496 and has proposed such a method of following that is caused not to move the pan head in the case where a moving object is moving within the range of that dead zone.
However, the method of following of U.S. patent application Ser. No. 09/726,496 also has problems to be improved. For example, the moving velocity of a moving object could be naturally fast and could be slow, and in the case where the moving velocity is slow, no such events that movement of the pan head gets out of the screen will take place when the moving object gets out of the range of dead zone but in the case where the moving velocity is fast, the moving object gets out of the screen and following could become no longer executable.
Moreover, for example, when the moving object comes inside the screen from outside the shooting range (screen) of the camera, the moving object moves toward the center of the screen (the center of the horizontal direction or the perpendicular direction of the screen) and when a static object inside the screen starts moving, that moving object could move toward the center of the screen. In such a case, essentially, in spite of unnecessity of moving the pan head, in the conventional method of following, following is controlled without discriminating such movement circumstances of a moving object from other moving circumstances, and therefore the pan head will start moving immediately after the movement of the moving object is detected and useless operation of following is executed, giving rise to a problem that the images of the camera will become less visible.


In a wireless local area network (WLAN), receiving or transmitting signals having multiple modulation schemes can require the use of multiple clock rates. Providing these multiple clock rates significantly increases silicon area and power consumption, both of which are highly undesirably in a wireless device. A sequencing interpolator can advantageously reduce the number of clock rates by receiving signals at a first rate and outputting signals at a second rate. The sequencing interpolator can include a multiplexer network that selectively determines which coefficients are applied to certain signals. Coefficients are chosen to ensure that an error in a frequency domain is within a given tolerance. The multiplexer network can be controlled by a counter value. At a predetermined count, the interpolated output signal is discarded and the counter is reset.

1. Field of the Invention
The present invention relates to a wireless local area network (WLAN) device that can receive and transmit signals of multiple modulation types. In particular, the present invention relates to a sequencing interpolator that can provide a rational ratio (integer/integer) interpolation for signals of a predetermined modulation type, thereby reducing the number of phase locked loops (PLLs) to be used in the WLAN device.
2. Description of the Related Art
Wireless local area networks (WLANs) are becoming increasingly popular as communication networks. The IEEE 802.11 standards provide guidelines for the operation of devices operating in WLANs. Specifically, the 802.11a standard defines communication in the 5 GHz band using data rates of 6, 12, 18, 24, 36, and 54 Mbps. The 802.11b standard defines communication in the 2.4 GHz band using data rates of 1, 2, 5.5, and 11 Mbps. A recent proposed addition to the 802.11 standards, called the 802.11g standard, uses the high data rates of 802.11a in the frequency band of 802.11b, i.e. 2.4 GHz.
The 802.11g standard envisions that 802.11b devices can communicate with 802.11g devices that operate in the same WLAN, irrespective of communication mode. In an infrastructure communication mode, clients communicate with each other through an access point. In other words, an access point functions as a communication hub between its associated clients. In contrast, in an ad hoc communication mode, clients can communicate with each other directly. As used herein, the term "device" can refer to either an access point or a client.
To ensure backwards compatibility with 802.11b devices while allowing data rate increases, the 802.11g standard incorporates the modulation schemes from both the 802.11a and 802.11b standards. In general, modulation refers to the addition of information to a carrier. Typical modulation techniques include frequency modulation wherein the frequency of the carrier waveform is varied. The 802.11b standard uses a modulation scheme called complementary code keying (CCK) whereas the 802.11a standard uses another modulation scheme called orthogonal frequency division multiplexing (OFDM). Both CCK and OFDM provide distinctive frequency modulation aspects.
The 802.11g standard, although providing guidelines for compatibility, allows the dual modulation schemes to be implemented in a proprietary manner. Thus, some WLAN device providers could use redundant components to ensure that signals received or transmitted using CCK or OFDM modulation can be correctly interpreted and reconstructed. However, this redundancy undesirably increases the cost and power consumption of the network. Therefore, a need arises for a method of efficiently reducing component redundancy and power in a WLAN device (access point and/or client) operating in accordance with the 802.11g standard.

Receiving and transmitting signals having multiple modulation types using sequencing interpolator


An analytical cartridge adapted for use in analyzing fluids for spectrophotometry. The cartridge includes a plumbing system composed of the cuvette and various wells or chambers which are interconnected by passageways. After introduction into the cartridge, liquid samples are separated (if necessary) and transported to a cuvette utilizing a sequential application of centrifugal force followed by pressurization of the system. The cartridge may be used in a wide variety of spectrophotometric procedures to measure the concentration of a wide variety of constituents in fluids, including bodily fluids which contain liquid and solid components.

1. Field of the Invention
The present invention relates generally to systems and methods which are used in spectrophotochemical analysis. More particularly, the present invention relates to spectrophotometric instruments and methods which are used to analyze fluids in a wide variety of laboratories including clinical laboratories and other healthcare facilities.
2. Description of the Related Art
Clinical chemistry involves the qualitative and quantitative analyses of body fluids, such as blood, urine, spinal fluid and other materials. Clinical chemistry encompasses multiple specialty testing areas including coagulation, hematology, immunochemistry, as well as chemistry. The test results derived from such analyses are used by physicians and other healthcare professionals to diagnose, monitor and treat diseases. The analysis protocols, instrumentation and other equipment utilized in clinical laboratory testing must be capable of providing accurate and repeatable test results. In addition, it is desirable that the procedures and instrumentation be simple and efficient. The testing equipment and procedures should be versatile enough that they can be used in healthcare locations where relatively few samples are tested as well as in larger clinical laboratories where the number of samples being tested on a daily basis is quite large.
A wide variety of analysis protocols are based on spectrophotometric analysis of the fluid being tested or the reaction product(s) of the fluid and one or more reagents. In a typical spectrophotometric analysis, the test fluid is introduced into a cuvette and radiation at one or more selected wavelengths is passed therethrough. The radiation absorption properties of the fluid are measured and may be used in both quantitative and qualitative determinations. In order to be useful in a clinical setting, an analytical system must be able to carry out spectrophotometric determinations.
Another consideration in designing analytical equipment for use by healthcare personnel is the amount of sample available for testing. In many situations, the amount of blood or other bodily fluid available is relatively small. Accordingly, there has been a trend in clinical chemistry to develop analytical systems which are capable of conducting numerous different chemical analyses on relatively small amounts of sample. In general, the goal has been to develop clinical analytical systems which provide the maximum number of medical tests utilizing the minimum amount of sample.
In achieving the above goals, a multitude of different analytical procedures and approaches have been investigated. In one approach, instruments have been developed which have a single sample introduction site. The equipment is designed so that the sample is split and routed to various locations within the system where multiple chemical analyses take place. Other systems do not include internal sample splitting devices and rely on the clinical chemist to separate the sample into small aliquots which are introduced into various instruments which are capable of conducting a maximum of only a few chemical analyses at one time.
There is a continuing need to develop and provide clinical chemistry equipment which is not only accurate, but versatile enough to meet the demands of modem medicine. The equipment should be simple enough to be used by not only highly-skilled laboratory technicians, but also by other healthcare personnel who may be required to conduct laboratory tests from time to time. The equipment and procedures should be versatile enough so that they can be utilized in clinical laboratories which analyze thousands of samples daily, while at the same time being adaptable to doctors' offices, home healthcare agencies and nursing homes where the number of tests being conducted is not as great. In addition, the equipment should be versatile enough to be useful in conducting a wide variety of blood analyses which are presently being routinely utilized. The equipment should also be adaptable to conducting blood or other bodily fluid tests which will be developed in the future.


An antenna device includes a ground plate that is a plate-shaped conductor member, a patch portion that is a plate-shaped conductor member placed to be opposed to the ground plate with a predetermined distance therebetween, a short-circuit portion that is a conductor member electrically connecting together the patch portion and the ground plate, and an additional conductor that is a plate-shaped conductor member placed to be opposed to the patch portion with a predetermined distance therebetween. The additional conductor is placed on a side of the patch portion on which the ground plate is not placed. An inductance of the short-circuit portion, a capacitance formed by the ground plate and the patch portion, and a capacitance formed by the patch portion and the additional conductor are used to perform parallel resonance.

As an antenna device utilizing a zero-order resonance, there is an antenna device including a plate-like metal conductor (hereinafter referred to as ground plate) that is connected to an external conductor of a feeder cable and functions as a ground cable, a plate-like metal conductor (hereinafter referred to as patch portion) that is disposed so as to face the ground plate and provided with a feeding point at any position, and a short-circuit portion that electrically connects the ground plate and the patch portion.


A fastener for anchoring fencing to a post. The fastener includes first and second separable and complementary sections, each section have an inner and outer surface, a middle web portion, opposed first and second sides extend from opposite edges of the middle web portion in a direction outwardly from the middle web portion, and opposed first and second ends. Male coupling members extend in a direction outward from one of the sides of the first section and the second section has female receiving spaces on one of the sided. Wherein the male coupling members being biasable for engagement with the spaces to detachably secure the sections together with the inner surfaces facing one another such that the inner surfaces define an axial passage that extends from the first to the second ends of the sections, whereby the passage permits the fencing and post to be clamped together between the sections.

1. Field of the Invention
The present invention relates generally to fasteners for attaching fencing to fence posts, and more particularly, relating to a reusable fastener for removably attaching fencing to fence posts.
2. Discussion of Related Art
Safety or barrier fencing, among other uses, is widely used along roadways to stop drifting of debris onto the roadways, and to restrict entry to open pits, trenches, construction sites, or other restricted areas.
A traditional method of securing safety fencing to a fence post is by using plastic tie straps or small pieces of wire tied along the length of the post at spaced apart locations. There are many drawbacks to this method, including being very time consuming, requires the use of a tool to twist the wire, is difficult to accomplish with gloves on, and it is not very environmentally friendly since most of these materials are not reusable, and in most cases the wire or straps are left on the ground after being remove. Further, this method also tends to damage the safety fencing as a result of the wire or straps cutting into the fencing material, which can lead to the fencing breaking loose, this is particularly the case when the safety fencing is subjected to strong winds.
Accordingly, there is a need for a fence fastener with an improved construction that is capable of securing fencing to fence posts quickly and easy without the use of tools, that requires less time for installing and removing the fastener, that is environmentally friendly, and that is not damaging to the fencing.


Optical apparatus includes a mount, which holds a workpiece. An array of optical heads project respective patterns of radiation onto the workpiece. A calibration assembly captures images of the respective patterns. A motion assembly, on which the calibration assembly is mounted, transports the calibration assembly among a plurality of different positions between the array of the optical heads and the mount so as to intercept and image, at each of the different positions, a respective pattern projected by a different one of the optical heads. A processor processes the images captured by the calibration assembly at the different positions so as to monitor operation of the apparatus.

In Direct Imaging (DI) systems, a scanning beam is used to directly write an image, one or more pixels at a time, onto an exposure surface such as a photoresist. In systems that are known in the art, the image is typically created by modulating a scanning beam based on stored image data. The modulated beam is scanned in a raster pattern as the exposure surface (or scanning beam) advances in a scan direction.
Some DI systems use multiple beams in parallel to increase writing speed. For example, U.S. Pat. No. 7,046,266 describes a method of scanning for writing a pattern on a surface, including providing a scanning beam comprising a plurality of independently addressable sub-beams, which scan the surface side-by-side in the cross-scan direction. Each sub-beam is modulated to reflect information to be written, and the beams are overlapped in successive scans in the cross-scan direction such that all written areas of the surface are written on during at least two scans.


An amplifier includes amplifier transistor (3) whose collector is connected to a load impedance (12) which is a current generator and includes a device for controlling the current as a function of the voltage level at the collector (20) of the amplifier transistor, which control acts in such a way that the current decreases when the voltage increases with a time constant which is of the order of the field retrace period. The amplifier transistor (3) is of the NPN type and the power supply is positive, while the current generator is a PNP transistor (7) whose base is connected to the collector of the amplifier transistor (3) via a resistor (4).

1. Field of the Invention
The invention relates to a video signal amplifier arrangment for a television display tube, comprising an amplifier transistor whose collector is coupled to a terminal of a load impedance, the other terminal of which is coupled to a power supply source, the output signal of the amplifier being taken from said collector which is coupled to a video control electrode of the display tube.
Such amplifier arrangements present the following problem: a low load impedance of the amplifier transistor will contribute to a considerable current in the transistor with a large power dissipation. If this load impedance has a high value, the amplifier will have an insufficient passband.
2. Description of the Related Art
This problem can be solved by substituting the load for an active element, for example a second amplifier transistor having a polarity which is opposed to that of the first. Such a solution using two complementary push-pull cascode arrangements is described, for example in the documents U.S. Pat. Nos. 4,727,336, and 4,035,840 or JP-A-63 26105.
Nevertheless, such a solution makes it difficult to realize the drive of the second amplifier transistor, because the use of a connection capacitance (documents U.S. Pat. No. 4,035,840 and JP-A-63 26105) necessitates a compromise as regards the transition frequency of the capacitive connection, and a drive transmitting the dc component will complicate the realization because of the dc offset between the bases of the two transistors (for example, the circuit described in document U.S. Pat. No. 4,727,336 has two power supplies for this reason: +55 V and -55 V).

Video signal amplifier arrangement for a television display tube


In accordance with a first aspect of the present invention, a security sensitive program that operates with a secret is made tamper resistant by distributing the secret in space as well as in time. In accordance with a second aspect of the present invention, a security sensitive program is made tamper resistant by obfuscating the program. In accordance with a third aspect of the present invention, a security sensitive application is made tamper resistant by isolating its security sensitive functions, and making the isolated security sensitive functions tamper resistant by distributing the secrets of the security sensitive functions in time as well as in space, and/or obfuscating the security sensitive functions. In one embodiment where obfuscation is employed, the pseudo-randomly selected pattern(s) of mutations is (are) unique for each installation. In accordance with a fourth aspect of the present invention, a security sensitive system with security sensitive applications is made further tamper resistant by deploying an interlocking trust mechanism. In accordance with a fifth aspect of the present invention, a content industry association, in conjunction with content manufacturers, content reader manufacturers, and content player manufacturers of the industry jointly implement a coordinated encryption/decryption scheme, with the player apparatus manufactured by the content player manufacturers employing playing software that include tamper resistant decryption functions.

1. Field of the Invention
The present invention relates to the field of system security. More specifically, the present invention relates to the tamper resistant methods and apparatus.
2. Background Information
Many applications, e.g. financial transactions, unattended authorizations and content management, require the basic integrity of their operations to be assumed, or at least verified. While a number of security approaches such as encryption and decryption techniques are known in the art, unfortunately, the security approaches can be readily compromised, because these applications and the security approaches are implemented on systems with an open and accessible architecture, that renders both hardware and software including the security approaches observable and modifiable by a malevolent user or a malicious program.
Thus, a system based on open and accessible architecture is a fundamentally insecure platform, notwithstanding the employment of security measures. However, openness and accessibility offer a number of advantages, contributing to these systems' successes. Therefore, what is required are techniques that will render software execution virtually unobservable or unmodifiable on these fundamentally insecure platforms, notwithstanding their openness and accessibility. As will be disclosed in more detail below, the present invention of tamper resistant methods and apparatus achieve these and other desirable results.


Disclosed are a method for SDN based network management and an apparatus performing the same. A method for network management, performed in a central control apparatus, may comprise receiving a path request message indicating a request to configure a path from a terminal; generating path list information including information about at least one configurable path, and providing the terminal with the path list information; receiving information about a specific path selected in the path list information from the terminal; and transmitting information about at least one detail function included in each of at least one node constituting the selected specific path to the terminal. Therefore, a path optimized for user's requirements may be easily configured, and so service quality may be enhanced.

1. Technical Field
Example embodiments of the present invention relate to a technology for network management, and more specifically to a method for network management which can be applied to configuration of traffic paths and functions of nodes included in the paths in a network based on a software defined network (SDN), and an apparatus performing the same.
2. Related Art
In order to cope with recent expansion of cloud services for smart phones or pad-type terminals, explosive increase of contents, and environmental changes of companies, technologies of software defined networking (hereinafter, referred to as 'SDN'), for providing flexibility of network and efficient network management functions, have appeared.
The SDN has characteristics that it separates network control functions and packet forwarding functions, performs control functions in a centralized control plane, and configures a network in programming manner.
In the conventional network, each switch node constituting the network having an auto routing function performs packet routing. The auto routing function is efficient for a simple network structure since each switch performs packet routing automatically. However, as network structure becomes complicated according to explosive increase of data, amount of traffic which can be treated by the auto routing function has reached a limit.
In order to overcome the above-described problem of the conventional network, in the SDN, a path of data traffic is configured by the centralized control plane in provisioning manner, so that the problem of the conventional network may be resolved and a time for required for installing new applications may be reduced. The SDN may provide operators with flexibility in configuration, management, and security of network.
Meanwhile, in order to efficiently cope with recent explosive increase of data traffic, efforts to construct a smart network are going on. As one of the efforts, a function of each switch node is being intensified. For example, although the conventional node inspects only a header of a received packet, a current switch node may be configured to perform a deep packet inspection (DPI) function, which can inspect a payload part of a received packet at high speed
A switch node becomes able to provide various services such as firewall, encryption, image processing, etc. by using the DPI function. Also, currently, a switch node having a storage function configured to provide contents or services more efficiently is being used.
However, it is difficult to combine a smart network technology which provides the above-described various services with the SDN technology which pursues standardization of control functions of switch nodes.
For example, the scheme of control commands for the SDN, which is being standardized, has a limit of accommodating functions of a switch node pursuing various services.
Therefore, in order to efficiently combine the smart network with the SDN, a function of configuring detail functions of switch nodes in a centralized manner is demanded in addition to the centralized path configuration.

Method for controlling software defined network and apparatus for the same

ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE


A load detecting apparatus includes a strain member, a supporting member, a load input member and a strain detecting element. The supporting member is employed for supporting the strain member at a supporting portion thereof. The load input member is supported by the strain member and strains the strain member when an external load is applied thereon. The strain detecting element is provided at at least a surface of the strain member for detecting the strain generated by the load input member. Further, an outer end of the supporting portion located outwardly relative to the load input member is fixed to the strain member.

A known load detecting apparatus for detecting external load (externally applied load) by a strain (displacement) is disclosed in JP2003-83707A (hereinafter referred to as reference 1). According to the reference 1, a detecting member is press-fitted into a detection hole formed at a sensor substrate (strain member) and the external force is acted on an end portion of the detecting member, at which the detecting member comes in contact with the sensor substrate. Further, first and second fixing members (supporting members) are press-fitted into first and second fixing holes formed at the sensor substrate, respectively. Then, counter force is generated at end portions of the first and second fixing members, at which the first and second fixing members come in contact with the sensor substrate. The load detecting apparatus detects strain generated due to the external force and the counter force by means of strain detecting elements.
Further, according to a load detecting apparatus disclosed in WO2005/080931A1 (hereinafter referred to as reference 2), a fixing member (supporting member) is structured with an upper washer and a lower washer. The upper washer is press-fitted into the lower washer, thus supporting (interposing) a sensor substrate. Accordingly, the fixing member is fixed to the sensor substrate. Further, strain detecting elements are provided on the sensor substrate. The load detecting apparatus structured as above is secured to an object to be measured via the supporting member.
According to the structure of the load detecting apparatus disclosed in the references 1 and 2, because the fixing member(s) is press-fitted into the sensor substrate and is secured thereat, strain may be generated at positions adjacent to the fixing member(s) on the sensor substrate (a portion of the substrate adjacent to the fixing member) due to the force for press-fitting the fixing member(s) into the sensor substrate. Therefore, in a condition where the strain detecting elements are to be positioned in the vicinity of the fixing members, a value outputted from the strain detecting elements may be deviated from a zero point (a point of origin), and detecting accuracy (sensitivity) may be negatively affected because of influence of the generated strain, thus leading to a reduction of precision for detecting the external load.
A need thus exists for a load detecting apparatus which is not susceptible to the drawback mentioned above.


An electronic device has a number of ports that have the same physical form factor and that are receptive to cable insertion. The electronic device also has visual indicators corresponding to the ports. Each visual indicator indicates at least link establishment when a cable has been inserted into its corresponding port and a link has been established. When a cable is removed from a port, the electronic device controls its corresponding visual indicator to identify the port as one from which cable removal has recently occurred.

Networking devices such as switches are used to interconnect different devices in a wired manner. A switch may have four, eight, sixteen, thirty-two, sixty-four, or even more different ports, or jacks, that look identical and that are receptive to cable insertion. The plug at one end of a network cable is inserted into a port of a switch, and the plug at the other end is inserted into another device, such as another networking device, a computing device, and so on.

Identification of ports from which cables have been recently removed and that have the same physical form factor using existing visual port indicators

Lenovo Enterprise Solutions (Singapore) PTE. LTD.


The present invention provides a precursor composition for forming a conductive oxide film having high conductivity and a stable amorphous structure maintained even after heated at high temperature by a simple liquid phase process. The precursor composition of the present invention contains at least one selected from the group consisting of carboxylates, nitrates and sulfates of lanthanoids (but, except for cerium); at least one selected from the group consisting of carboxylates, nitrosyl carboxylates, nitrosyl nitrates and nitrosyl sulfates of ruthenium, iridium or rhodium; and a solvent containing at least one selected from the group consisting of carboxylic acids, alcohols and ketones.

In various electronic devices, conductive oxides are widely used as conductive materials for electrodes, wiring and the like. Recently, in the field of electronic devices, a device is required to be microminiaturized as small as possible, due to a demand of higher integration and multilayered wiring.
In this context, when a crystalline oxide is used as a conductive oxide, a limitation is indicated for the microminiaturization of the device. That is, it is known that conductivity becomes non-continuous as the size of an electrode or a wiring composed of a crystalline material approaches a crystal size. Therefore, an electrode and the like are required to have a size at least 3 times larger than that of a crystal size. Since a crystal size of a common crystalline conductive oxide is 50 to 100 nm, an electrode and the like having a size of less than 150 to 300 nm can not be produced using a crystalline conductive oxide.
On the other hand, since there are no such limitations for an amorphous conductive oxide, an electrode and the like having a more microminiature size can be formed.
As amorphous conductive oxides, for example, IZO (indium-zinc composite oxide), IGZO (indium-gallium-zinc composite oxide) and the like are known. Conventionally, films composed of these amorphous conductive oxides have been formed by gas phase methods, such as the sputtering method, the laser ablation method and the vapor deposition method, for example. However, a gas phase method requires massive and expensive equipment, and the productivity of films is also low, resulting in cost-ineffective film manufacturing.
In recent years, a technique in which an amorphous conductive oxide film is formed by a less expensive liquid phase process has been reported (C. K. Chen, et al., Journal of Display Technology, Vol. 5, No. 12, pp 509-514 (2009)). This technique involves a formation of an IZO film by applying a solution composition containing indium chloride, zinc chloride and acetonitrile as a precursor of an oxide on a substrate, and heating it. However, this technique has not yet been subjected to practical use because a film obtained by the technique do not have sufficient conductivity since its volume resistivity is greater than 1 Ω·cm. For example, in order to use the film in a gate electrode for a thin layer transistor, its volume resistivity is required to be 0.1 Ω·cm or less. In addition, the low thermal stability of amorphous IZO and IGZO is a problem. These materials can maintain an amorphous state up to 500° C. at the highest and undergo crystallization at 500 to 600° C. Therefore, they are not applicable for electronic devices which require a processing temperature of 500° C. or higher.
In view of these, a method is demanded for forming a conductive oxide film having high conductivity and a stable amorphous state by an inexpensive liquid phase process.
Recently, the present inventors completed a technique in which an amorphous conductive strontium-ruthenium composite oxide film by a liquid phase process, and filed a patent application thereof (Japanese Patent Application No. 2010-98200). The technique is an excellent technique in which an amorphous conductive oxide film having high conductivity can be formed by a liquid phase process comprising heating at a relatively low temperature of below 450° C. However, exposure of a film obtained by the technique to temperature of 450° C. or higher causes crystallization into a perovskite structure. Therefore, the stability of the amorphous structure at high temperature is not sufficient, if considering every manufacturing step of all electronic devices.
Meanwhile, a semiconductor device such as a diode and a transistor shows its functions through a junction between semiconductors showing different types of conductivity such as a pn junction and a pin junction. For many years, such a semiconductor has been manufactured using a metalloid element such as silicon and germanium. These materials are less than satisfactory as an industrial semiconductor material because their manufacturing cost is high, and they are susceptible to decomposition at high temperature of 600° C. or higher.
In this context, for example, an oxide semiconductor such as an In—Ga—Zn—O-based semiconductor is a potential material having various attractive properties including that it can also be prepared at a low temperature by a simple method such as the coating method, and that surrounding atmosphere at the time of preparation is not particularly required to be controlled, and in addition, that a thin film obtained shows optical transparency.
However, there is no other choice but to use, at least in part, conventional materials to manufacture a practical semiconductor device because most of known oxide semiconductors are an n-type semiconductor, leaving the above problems not completely solved.
Only a few oxide semiconductors showing p-type conductivity have been reported. For example, Applied Physics 97, 072111 (2010) and Applied Physics 93, 032113 (2008) described crystalline SnO showing p-type conductivity. However, the method of preparing it is very complicated. Briefly, according to the above literature in 2010, an amorphous SnO film is deposited on a substrate by radiofrequency magnetron sputtering, and a SiO2 cap layer is further formed on the amorphous SnO film by sputtering. Subsequently, two step annealing at different surrounding atmospheres and temperatures was performed to obtain a crystalline SnO thin film showing p-type conductivity. Such complicated manufacturing steps lack industrial applicability. In addition to this, a crystalline SnO obtained has insufficient p-type semiconductivity.

Precursor composition and method for forming amorphous conductive oxide film


An apparatus and method for utilizing a correction loop amplifier in conjunction with a main amplifier to produce signal amplification with low total harmonic distortion. The correction amplifier preferably has one input directly coupled to a first input of the main amplifier, and an output coupled to a second input of the main amplifier via a resistor. The second input of the correction amplifier is preferably coupled to a signal input via a voltage divider or RC network. A preferred embodiment configuration provides a power amplifier with improved THD over prior art circuits. The circuit is very flexible, and may incorporate low, high or band pass filter functions if desired. In addition, the power amplifier may be implemented in any combination of single or differential inputs and outputs.

The present invention relates generally to an apparatus and method for electrical signal amplification, and more particularly to an apparatus and method for utilizing a correction loop amplifier in conjunction with a main signal amplifier to reduce output signal distortion.
Signal amplifiers are used in many types of electronic circuits in a wide variety of consumer, industrial and other products. One such application is a power amplifier that may be used to provide a large amount of signal amplification for audio equipment. A conventional prior art differential input power amplifier circuit is illustrated in FIG. 1. One problem with this circuit, however, is that it typically has relatively high total harmonic distortion (xe2x80x9cTHDxe2x80x9d), and thus its direct use in high performance circuits is limited.
One approach to reducing the THD in a power amplifier circuit is taught by above-referenced U.S. patent application Ser. No. 09/491,543. FIG. 2 illustrates a low THD amplifier circuit 100 as disclosed by the above-referenced patent application. The transfer function of this circuit is generally given by                                                                         v                O                            =                                                                                A                          m                                                                                (                          s                          )                                                                                [                                                                                A                                c                                                                                (                                s                                )                                                                                (                                                              1                                -                                k                                                            )                                                                                +                          k                                                ]                                                                                v                                              I                        +                                                                              -                                                                                A                        m                                                                                (                        s                        )                                                                                kv                                              I                        -                                                                                A                        m                                                                                (                        s                        )                                                                                A                        c                                                                                (                        s                        )                                                                                (                                              1                        -                        k                                            )                                                                                k                      2                                                        +                                                            A                      m                                                                                (                                              1                        -                        k                                            )                                                        +                  1                                                                                =                                                                                [                                              1                        +                                                  k                                                                                A                              m                                                                                (                              s                              )                                                                                ]                                                                                v                                              I                        +                                                                              -                                                            k                                                                                A                            c                                                                                (                            s                            )                                                                                (                                                      1                            -                            k                                                    )                                                                                v                                              I                        -                                                                                k                    2                                    +                                      1                                                                  A                        c                                                                                (                        s                        )                                                                              +                                      1                                                                                A                          m                                                                                (                          s                          )                                                                                A                          c                                                                                (                          s                          )                                                                                (                                                  1                          -                          k                                                )                                                                                (        1        )
where       k    =                  R        2                              R          1                +                  R          2                      ,            k      2        =                  R        4                              R          3                +                  R          4                      ,
Am(s) and Ac(s) are transfer functions of main amplifier 102 and correction loop amplifier 104, respectively.
Generally, to properly operate circuit 100, the output of correction amplifier 104 (Ac(s)) should be virtual ground. If the input is a completely fully differential signal (i.e., v1+=v1xe2x88x92) the following equations may be derived:                                                         v              O                                                                  R                4                                                              R                  3                                +                                  R                  4                                                              =                      v                          I              +                                      ,                              and                                      xe2x80x83                                                  v              O                                =                                                                      R                  2                                                  R                  1                                                                          (                                                      v                                          I                      +                                                        -                                      V                                          I                      -                                                                      )                                      =                                                            2                                                        R                    2                                                                    R                  1                                                                                v                                      I                    +                                                  .                                                                        (        2        )                                                      Thus:                                          xe2x80x83                                                        2                                            R                2                                                    R              1                                      =                                                            R                3                            +                              R                4                                                    R              4                                .                                    xe2x80x83
Furthermore, if R4=R1, then R3=2R2xe2x88x92R1.
In practical circuit design, it is generally difficult to match R3=2R2xe2x88x92R1 to other resistors with values of R1 or R2.
If Am(s) greater than  greater than 0, Ac(s) greater than  greater than 0 and Ac(s)(1xe2x88x92k) greater than  greater than 0, the above equation may be simplified to                               v          O                =                                            v                              I                +                                                    k              2                                =                                                                                R                    3                                    +                                      R                    4                                                                    R                  4                                                                          xe2x80x83                                                          v                                  I                  +                                                      =                                          (                                                                            R                      3                                                              R                      4                                                        +                  1                                )                                                          v                                  I                  +                                                                                (        3        )
This indicates that the output voltage vo is mainly determined by the positive input v1+, and is insensitive to the negative input v1xe2x88x92. Essentially, the circuit may be operating as a single ended system, in which the input is v1+ and the output is vo. Therefore, a potential disadvantage with this circuit is that it may not be operating as a fully differential structure. Generally, in a mixed-signal environment, many of the digital noises are present in the power supply, substrate, or the signal wires, in a common mode fashion. In such an environment, a fully differential structure generally provides high (digital) noise immunization, a high Common-Mode Rejection Ratio (xe2x80x9cCMRRxe2x80x9d), and a high Power Supply Rejection Ratio (xe2x80x9cPSRRxe2x80x9d). However, because of the potential singled-ended operating characteristic of the circuit of FIG. 2, the benefits of a fully differential circuit may not be achieved.
For the circuit configuration shown in FIG. 2, the CMRR is:                     CMRR        =                                            A              DM                                      A              CM                                =                                                                      v                  O                                /                                  (                                                            v                                              I                        +                                                              -                                          v                                              I                        -                                                                              )                                                                                v                    O                                    /                                      (                                                                  v                                                  I                          +                                                                    +                                              v                                                  I                          -                                                                                )                                                  /                2                                      =                                          1                2                            =                                                -                  6                                                                  xe2x80x83                                                dB                                                                        (        4        )
Another potential disadvantage with the circuit illustrated in FIG. 2 is that it is relatively difficult to add a filtering function to the circuit.
These problems are generally solved or circumvented, and technical advantages are generally achieved, by preferred embodiments of the present invention comprising an apparatus and method for utilizing a correction loop amplifier in conjunction with a main amplifier to produce signal amplification with very low THD. The correction amplifier preferably has one input directly coupled to a first input of the main amplifier, and an output coupled to a second input of the main amplifier via a resistor. The second input of the correction amplifier is preferably coupled to a signal input via a voltage divider or RC network. Alternatively, the second input of the correction amplifier may be coupled to ground, typically for a single ended input negative gain configuration. A preferred embodiment configuration provides a power amplifier with improved THD over prior art circuits. The circuit is very flexible, and may incorporate low, high or band pass filter functions if desired. In addition, the power amplifier may be implemented in any combination of single or differential inputs and outputs.
In accordance with a preferred embodiment of the present invention, a power amplifier circuit apparatus comprises a main amplifier having first and second input nodes and an output node; a feedback resistor coupled between the first input node and the output node of the main amplifier; a correction loop amplifier having first and second input nodes and an output node, wherein the first input node of the correction amplifier is coupled to the first input node of the main amplifier; and a resistor coupled between the output node of the correction amplifier and the second input node of the main amplifier.
In accordance with another preferred embodiment of the present invention, a differential output amplifier circuit generates a balanced output signal having positive and negative signal components. The circuit comprises a first power amplifier circuit for providing the positive signal component of the balanced output signal, and a second power amplifier circuit for providing the negative signal component of the balanced output signal. Each of the first and second power amplifier circuits are configured similarly to the previously described embodiment.
In accordance with another preferred embodiment of the present invention, an amplifier circuit comprises a main amplifier and a correction amplifier, the main amplifier having first and second input nodes and an output node, and the correction amplifier having first and second input nodes and an output node. A method of correcting distortion in the amplifier circuit comprises feeding back an output signal from the main amplifier output node to the main amplifier first input node via a first resistor; feeding back the output signal to the correction amplifier first input node via the resistor; generating a correction signal at the output node of the correction amplifier; and providing the correction signal to the main amplifier second input node via a second resistor.
An advantage of a preferred embodiment of the present invention is that it provides much improved CMRR performance over prior art approaches. Assuming, ideal matching of resistors, and ideal main and correction amplifiers, the CMRR of the circuit should approach infinity. Practically, the CMRR of the circuit is limited by the matching of the resistors and the CMRR of the amplifiers. The higher CMRR generally provides higher immunization to digital interference and other common mode noise.
A further advantage of a preferred embodiment of the present invention is that it provides more gain flexibility than prior art approaches. The gain may be any value that is determined by             R      2              R      1        ,
so this preferred embodiment may be used to implement, for example, the volume control in the feedback loop of amplifier. For the prior art scheme discussed hereinabove, with                     v        O                    v                  I          +                      =                            R          3                          R          4                    +      1        ,
the minimum gain value is 1. Because the gain cannot be less than 1, it generally cannot be used in a volume control application.
A further advantage of a preferred embodiment of the present invention is that it provides configuration flexibility. For example, the amplifier could be configured to perform:
(1) fully-differential (balanced) input, single-ended output, 2-channel (4-channel) stereo;
(2) single-ended input, single-ended output, 2-channel (4-channel) stereo;
(3) fully-differential (balanced) input and output, mono (2-channel stereo);
(4) single-ended input, fully-differential (balanced) output, mono (2-channel stereo).
Configuration selection may be performed during design, or by using a few switches, after the circuit has been built. A basic design may be prepared beforehand, and then implemented in different configurations with a few wire connection changes.
A further advantage of a preferred embodiment of the present invention is that it is relatively easy to match all of the resistors, because each of the resistors is assigned one of two values.
A further advantage of a preferred embodiment of the present invention is that it is easy to extend the circuit to perform low pass, high pass, or band pass filter functions.
A further advantage of a preferred embodiment of the present invention is that it has extremely low THD compared with a conventional amplifier configuration.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.

Apparatus and method for electrical signal amplification