A rapid deployment plant protector having a polygonal umbrella cover having closed sleeves on a first side, open sleeves on an opposing side, and connection structure for joining an edge of a first of said polygonal umbrella cover with an edge of an adjoining polygonal umbrella cover; an umbrella hub; a plurality of cover stays corresponding in number to the number of said sleeves; and a vertical support on which said umbrella hub is disposed.

Field of the Invention
The present invention relates generally to plant protection apparatus, and more particularly to protective plant covers, and still more particularly to a hub for a rapid deployment umbrella-like protective plant cover that may be adjusted to deploy at different heights and with a different coverage area so as to adapt to plants as they grow.
Background Discussion
Plant covers of numerous kinds are known, including umbrella-like structures adapted for rapid deployment over one or more plants. Art relevant to the consideration of background for the present invention includes:
U.S. Pat. No. 8,161,680, to Sloan et al, which teaches a collapsible umbrella-type summer and winter plant protector. The cover includes a drawstring on its bottom perimeter to allow it to be tied around the bottom portion of a plant. The cover can be anchored to the ground using spikes disposed on the ends of the umbrella arms.
U.S. Pat. No. 7,497,048, to Bakowski, which discloses a tent-like plant protector including a flexible cover, a base, sides and plural vertices defining intersections between adjacent sides, and elongated frame members attached to the cover at one of the vertices. The frame members pivot into a deployment configuration wherein the frame members open position and sufficiently spread apart to form a plant-receiving interior region. The plant protector also has a stowage configuration wherein the frame members are in the collapsed position.
U.S. Pat. No. 8,166,986, to Ma and U.S. Pat. No. 7,178,535 to Eder, which each teach improved hubs for umbrella-like shade structures.
The shortcoming in the prior art is that the frame elements are coupled to the hub in a generally permanent manner and thereby limit the size of the area protected by the cover.
The foregoing patents reflect the current state of the art of which the present inventors are aware. Reference to, and discussion of, these patents is intended to aid in discharging Applicants' acknowledged duty of candor in disclosing information that may be relevant to the examination of claims to the present invention when such claims are presented in a regular national utility patent application claiming the benefit of the filing date of the instant application. However, it is respectfully submitted that none of the above-indicated patents disclose, teach, suggest, show, or otherwise render obvious, either singly or when considered in combination, the invention described herein.


A method is provided for treating peripheral atherosclerotic disease (arteriosclerosis obliterans) and/or intermittent claudication employing a cholesterol lowering drug such as an HMG CoA reductase inhibitor alone and/or an inhibitor of the enzyme squalene synthetase and optionally a pharmaceutical which reduces serum cholesterol by a mechanism other than inhibiting production of the enzyme HMG CoA reductase or the enzyme squalene synthetase, for example, probucol or gemfibrozil; employing an ACE inhibitor alone such as captopril or ceranapril; or a combination of a cholesterol lowering drug and an ACE inhibitor.

Harrison's Principles of Internal Medicine, 11th Edition, 1987, Editors-E. Braunwald et al, Chapter 198, pp 1040-1046 by D. Eugene Strandness, Jr., discusses vascular diseases of the extremities--also referred to as peripheral vascular disorders (Merck Manual, 15th Ed, Chapter 30, pp 555-557)--which include arteriosclerosis obliterans. "Symptoms and signs that develop secondary to arteriosclerosis obliterans rarely have an abrupt onset, since the process is a gradual, progressive one. The most common symptom occurs with exercise and is termed intermittent claudication, i.e., the pain that occurs in a muscle(s) with an inadequate blood supply that is stressed by exercise (page 1041)."
The proatherosclerotic effect of elevated serum cholesterol on vascular tissue is well documented (Weinstein and Heider, "Protective action of calcium channel antagonists in atherogenesis and vascular injury," Am. J. Hypertens. 2: 205-12,1989).
It is also well known that platelets which may participate in the atherogenic process do so via mediators released upon activation (thromboxane A.sub.2 (TXA.sub.2), platelet aggregating factor (PAF), etc.,) which in turn stimulate smooth muscle cells to contract as well as to proliferate. The latter effect is an important step in atherosclerotic plaque formation (Hoak, "Platelets and atherosclerosis," Semin. Thromb. Hemost. 14: 202-5, 1988). Many of the stimulatory effects of prostanoids on vascular smooth muscle can be reversed by endothelium derived relaxing factor (EDRF), a substance whose metabolic stability and/or efficacy appears to be enhanced by captopril (Goldschmidt and Tallarida, "Effect of captopril exposure on endothelium-dependent relaxation in rabbit aorta," F.A.S.E.B. Journal 3: A1195, 1989).
In addition, it has recently been found that captopril significantly reduced serum cholesterol (-18%) and increased HDL (27%) in hypercholeserolemic patients (Costa et al, "Use of captopril to reduce serum lipids in hypertensive patients with hyperlipidemia," Am. J. Hyperten. 1: 2219-2239, 1988). There is no evidence that these therapeutic effects result from inhibition of the cholesterol synthetic pathway. Thus, the therapeutic mechanism for ACE inhibitors is different from that of HMG CoA reductase inhibitors such as pravastatin and lovastatin.
Edelman, S. et al, N. Engl. J. Med. (320, No. 18, 1219-20, 1989), "Hyperkalemia During Treatment with HMG CoA Reductase Inhibitor," discloses a case where a patient received lovastatin (ls) for hyperlipidemia and whose hypertension was initially well controlled with lisinopril. "LS treatment was started when cholestyramine and niacin treatment was not successful. The patient developed myositis and hyperkalemia and recovered after emergency treatment and withdrawal of LS. He later resumed taking LS (without consultation) and again developed severe myositis and hyperkalemia. He recovered when LS was withdrawn. Care is cautioned when LS and lisinopril are given in combination to patients at risk of hyperkalemia."
European Patent Application 0219782 to Scholkens (Hoechst) discloses the treatment of atherosclerosis, thrombosis and/or peripheral vascular disease in mammals using an angiotensin converting enzyme (ACE) inhibitor or its physiologically tolerable salts. It further discloses that because ACE is predominantly localized in the luminal plasma membrane of the endothelial cell, ACE inhibitors can interfere in platelet-endothelium interaction. In addition, Scholkens discloses that ACE inhibition potentiates the action of bradykinin (a strong stimulator of prostacyclin release from endothelial cells) by inhibiting its degradation and ACE inhibitors, consequently, have an inhibitory effect on platelet aggregation.
Eorn, J. et al, "Prevention of Arteriosclerotic Lesions with Calcium Antagonists or Captopril in Different Rat Hypertension Models," J. Cardiovasc. Pharmacol. Vol. 12 (Suppl 6), 1988, discloses beneficial effects in mesenteric arteries atherosclerosis with captopril in spontaneous hypertensive Okamoto rats (SHRs), but not in salt-sensitive Dahl rats.
Someya, N. et al, "Suppressive Effect of Captopril on Platelet Aggregation in Essential Hypertension," J. Cardiovasc. Pharmacol. 6:840-843, 1984, discloses at page 840 that "hypertension is closely related to the genesis and progress of atherosclerosis," and that "platelet function plays an important role in atherosclerosis, with platelet dysfunction demonstrable in several vascular diseases. It has been reported that platelet aggregation is increased in hypertensives . . . " At page 842, it is indicated that the "data demonstrated the inhibition of platelet aggregation in vivo after administration of captopril to hypertensive subjects . . . " At page 843, it is indicated that "platelet aggregability is greater in hypertensives than in normotensives . . . platelet abnormalities may be a risk factor in atherosclerosis . . . If captopril possesses an antiplate aggregability effect in addition to its hypotensive effect, it may be very useful for the prevention of atherosclerosis and thrombotic diseases associated with hypertension."
Mizuno, K. et al "The effects of the angiotensin I-converting enzyme inhibitor, captopril, on serum lipoperoxides level and the renin-angiotensin-aldosterone and kallikrein-kinin systems in hypertensive patients," Nippon Naibunpi Gakkai Zasshi, Feb. 20, 1984, discloses that captopril is a beneficial antihypertensive agent for preventing serum lipoperoxides concentration (LPX)-induced atherosclerosis in hypertensive patients.
Mizuno, K. et al "Acute effects of captopril on serum lipid peroxides level in hypertensive patients," Tohoku J. Exp. Med., May, 1984, 143(1) p. 127-8, suggests that inhibition of angiotensin-converting enzyme by captopril offers a possible therapeutic approach to the treatment of atherosclerosis complicated with hypertension.
The role of the renin-angiotensin system in atherosclerosis is not clear. Campbell-Boswell & Robertson, Exp. and Mol. Pathol. 35:265 (1981) reported that angiotensin II stimulated proliferation of isolated human vascular smooth muscle cells while Geisterfer et al, Circ. Res. 62: 749-756 (1988) showed no proliferation (but stimulation of growth) of isolated rat vascular smooth muscle cells.
Overturf, M. et al, Atherosclerosis, 59:383-399, 1986, discloses that studies with ACE inhibitors in cholesterol fed rabbits show no significant effects in the development of atherosclerosis.
Cecil, Textbook of Medicine, 16 Ed., pp 239 to 241, indicates at page 240 that blood pressure is an accelerator of atherosclerosis.
U.S. Pat. Nos. 4,046,889 and 4,105,776 to Ondetti et al disclose proline derivatives, including captopril, which are angiotensin converting enzyme (ACE) inhibitors useful for treating hypertension.
U.S. Pat. No. 4,337,201 to Petrillo discloses phosphinylalkanoyl substituted prolines, including fosinopril, which are ACE inhibitors useful for treating hypertension. 5 U.S. Pat. No. 4,374,829 discloses carboxyalkyl dipeptide derivatives, including enalapril, which are ACE inhibitors useful for treating hypertension.
U.S. Pat. No. 4,452,790 to Karanewsky et al discloses phosphonate substituted amino or imino acids and salts thereof and covers (S)-1-[6-amino-2-[[hydroxy(4-phenylbutyl)phosphinyl]-oxy]-1-oxohexyl]-L-pr oline (SQ 29,852, ceranapril). These compounds are ACE inhibitors useful in treating hypertension.
U.S. Pat. No. 4,316,906 to Ondetti et al discloses ether and thioether mercaptoacyl prolines which are ACE inhibitors useful in treating hypertension. This Ondetti et al patent covers zofenopril.
There are several different classes of compounds which have serum cholesterol lowering properties. Some of these compounds are inhibitors of the enzyme HMG CoA reductase which is essential in the production of cholesterol, such as mevastatin (disclosed in U.S. Pat. No. 3,983,140), lovastatin also referred to as mevinolin (disclosed in U.S. Pat. No. 4,231,938), pravastatin (disclosed in U.S. Pat. No. 4,346,227) and velostatin also referred to as synvinolin (disclosed in U.S. Pat. Nos. 4,448,784 and 4,450,171).
Other compounds which lower serum cholesterol may do so by an entirely different mechanism than the HMG CoA reductase inhibitors. For example, serum cholesterol may be lowered through the use of bile acid sequestrants such as cholestyramine, colestipol, DEAE-Sephadex and poly(diallylmethylamine) derivatives (such as disclosed in U.S. Pat. Nos. 4,759,923 and 4,027,009) or through the use of antihyperlipoptroteinemics such as probucol and gemfibrozil which apparently lower serum "low density lipoproteins" (LDL) and/or converts LDL into high density lipoproteins (HDL).
U.S. Pat. No. 4,759,923 mentioned above discloses that poly(diallylmethylamine) derivatives which are bile salt sequestrants may be used in conjunction with drugs which reduce serum cholesterol by mechanisms other than sequestration, such as clofibrate, nicotinic acid, probucol, neomycin, p-aminosalicylic acid or mevinolin (also referred to as lovastatin).
Squalene synthetase is a microsomal enzyme which catalyzes the reductive dimerization of two molecules of farnesyl pyrophosphate (FPP) in the presence of nicotinamide adenine dinucleotide phosphate (reduced form) (NADPH) to form squalene (Poulter, C. D.; Rilling, H. C., in "Biosynthesis of Isoprenoid Compounds", Vol. I, Chapter 8, pp. 413-441, J. Wiley and Sons, 1981 and references therein). This enzyme is the first committed step of the de novo cholesterol biosynthetic pathway. The selective inhibition of this step should allow the essential pathways to isopentenyl tRNA, ubiquinone, and dolichol to proceed unimpeded. Squalene synthetase, along with HMG-CoA reductase has been shown to be down-regulated by receptor mediated LDL uptake (Faust, J. R.; Goldstein, J. L.; Brown, M. S. Proc. Nat. Acad. Sci. USA, 1979, 76, 5018-5022), lending credence to the proposal that inhibiting squalene synthetase will lead to an up-regulation of LDL receptor levels, as has been demonstrated for HMG-CoA reductase, and thus ultimately should be useful for the treatment and prevention of hypercholesterolemia and atherosclerosis.
One approach to inhibitors of squalene synthetase is to design analogs of the substrate FPP. It is clear from the literature that the pyrophosphate moiety is essential for binding to the enzyme. However, such pyrophosphates are unsuitable as components of pharmacological agents due to their chemical and enzymatic lability towards allylic C-O cleavage, as well as their susceptibility to metabolism by phosphatases.
P. Ortiz de Montellano et al in J. Med. Chem., 1977, 20, 243-249 describe the preparation of a series of substituted terpenoid pyrophosphates (Table A), and have shown these to be competitive inhibitors of the squalene synthetase enzyme. These substances retain the unstable allylic pyrophosphate moiety of FPP.
TABLE A ______________________________________ ##STR1## No. X Y Z ______________________________________ 1 CH.sub.3 CH.sub.3 H 2 H H H 3 C.sub.2 H.sub.5 H H 4 I H H 5 H I H 6 CH.sub.3 H SCH.sub.3 ______________________________________
Corey and Volante, J. Am. Chem. Soc. 1976, 98, 1291-3, have prepared FPP analog A and presqualene pyrophosphate (PSQ-PP) analog B as inhibitors of squalene biosynthesis. (Presqualene pyrophosphate is an intermediate in the conversion of FPP to squalene). These inhibitors possess methylene groups in place of the allylic oxygen moiety of FPP and PSQ-PP, but still retain the chemically and enzymatically unstable pyrophosphate linkage. ##STR2##
Poulter and co-workers have prepared cyclopropane C (Sandifer, R. M., et al., J. Am. Chem. Soc. 1982, 104, 7376-8) which in the presence of inorganic pyrophosphate is an intermediate analog inhibitor of the enzyme squalene synthetase. ##STR3##
Altman and co-workers, Bertolino, A., et al., Biochim. Biophys. Acta. 1978, 530, 17-23, reported that farnesyl amine and related derivatives D inhibit squalene synthetase, but provide evidence that this inhibition is non-specific and probably related to membrane disruption. ##STR4##
Poulter, C. D., et al, J. Org. Chem., 1986, 51, 4768, prepared compound E in a demonstration of a synthetic method, but did not report any biological data. ##STR5##
Poulter, C. D., Stremler, K. E., J.A.C.S., 1987, 109, 5542 describes the synthesis and biological evaluation of compounds having structure F. These compounds were evaluated as alternative substrates for avian liver farnesyl diphosphate and lemon peel cyclase. ##STR6##
McClard, R. W. and Poulter, C. D., et al., J.A.C.S. 1987, 109, 5544, reported that phosphinylphosphonates G and H were competitive inhibitors of the 1'-4-condensation between isopentenyl diphosphate and geranyl diphosphate catalyzed by avian liver farnesyl diphosphate synthetase. Phosphinylphosphonates G and H had Ki's of 19 .mu.M and 71 .mu.M, respectively. They also reported the speculative isolation of the farnesyl phosphinylphosphonate I, and the geranyl phosphinylphosphonate J from the enzymatic reaction of G with geranyl pyrophosphate or dimethylallyl pyrophosphate, respectively. The structure of I and J were tentatively assigned based on relative TLC mobilities. They hypothesized that I could be a potential inhibitor of squalene synthetase. ##STR7##
Capson, T. L., PhD dissertation, Jun. 1987, Dept. of Medicinal Chemistry, the University of Utah, Abstract, Table of Contents, pp. 16, 17, 40-43, 48-51, Summary, discloses cyclopropanes of the structure discloses cyclopropanes of the structure ##STR8## intermediate analog inhibitors of squalene synthetase.
S. A. Biller et al., Journal of Medicinal Chemistry, 1988, vol. 31, No. 10, pp. 1869 to 1871 disclose that isoprenoid (phosphinylmethyl) phosphonates (PMPs) inhibit squalene synthetase. These phosphonates have the structures
______________________________________ ##STR9## R.sup.1 ______________________________________ ##STR10## ##STR11## ##STR12## ##STR13## ______________________________________

Method for treating peripheral atherosclerotic disease employing a cholesterol lowering drug, an ACE inhibitor, or a combination thereof


A method of producing a workpiece of a heat-resistant steel, such as hot forming tool steel, where the workpiece may be hardened and depassivated after mechanical machining and electrochemical treatment. The hardening including a reduction step, so that no depassivation need be performed by pickling, for example, before nitriding. The result of the hardening treatment is a favorable surface condition for stepwise nitriding.

Nozzle bodies for modern direct injection systems are used to an increasing extent at operating temperatures up to 450° C. High demands are therefore made on the strength of components and the wear resistance of nozzle bodies. Nitrided hot forming tool steel in particular is therefore used to manufacture the nozzle bodies. ECM (electrochemical machining) methods are used in the production of internal bores (pressure chambers) and for rounding. The ECM methods used for shaping and surface treatment of metal workpieces are performed in an electrolyte solution, the workpiece to be machined usually being connected as the anode and the tool being connected as the cathode. Electrochemical machining methods are used in particular for deburring, polishing, grinding and etching the surfaces of a workpiece. The workpieces formed by the ECM method are highly passive and are very difficult to treat by thermochemical diffusion methods, in particular nitriding, because more noble alloy elements such as Cr remain on the surface and/or oxide alloy elements become oxidized, forming metal oxides and metal hydroxides MexOy[OH]z.
To improve the nitridability of direct-injection nozzle bodies, it is conventional today to pickle passive surfaces before nitriding, in particular by using hydrochloric acid. However, pickling has some major disadvantages. Pickling with acid may cause pickling scars, which decrease the strength of the component. Furthermore, it is very difficult to reproduce the results of pickling, because the length of storage between machining, basic heat treatment and nitriding may vary. Furthermore, pickling results in a considerable additional cost which is attributable in particular to the cost of the installation used for pickling and the required labor cost. Pickled workpieces must also be cleaned after pickling by using a very complex special cleaning technique. Disposal of pickling solutions is also complicated. In addition, pickling with acid results in unwanted environmental pollution and has a negative effect on working conditions.
The object of the present invention is thus to develop a method of treating workpieces made of hot forming tool steel, in particular direct injection nozzle bodies, to improve the nitridability of these workpieces in particular without having to pickle the workpieces and to thus avoid the disadvantages due to pickling which are known in the related art.

Method for heat-treating work pieces made of temperature-resistant steels


A backlight module includes at least one light source, a lamp cover and a circuit board. The lamp cover has a containing portion and at least one projection. The containing portion is arranged for containing the light source. The projection is located at an outer side of the containing portion on which the circuit board is placed so that at least one fixing portion of the circuit board is in contact with the projection for constraining movements of the circuit board relative to the lamp cover.

The disclosure relates, in general, to a display device, a backlight module and a method of fixing a circuit board on such a backlight module, and more particularly, to a display device using a side type backlight module and a method of fixing a circuit board on such a backlight module.
Along with the rapid advance in the technology of manufacturing flat display panels, which possess various advantages, such as lightweight, small volume, low power consumption and low or zero radiation, flat display panels have now been widely used in various electronic products such as personal digital assistants (PDA), notebook computers, digital cameras, mobile phones, computer screens and flat TVs. As the industry puts emphasis on research and development and adopts large-scale production, the quality of flat display panels has been improved and the price keeps dropping, and the area of application is rapidly expanded.
Generally speaking, a display device using a flat display panel has a circuit board, which is connected to the display panel and/or other external circuits via a cable. According to a method known to the inventor(s) for fixing the circuit board, the circuit board is fixed on a plastic housing by screws or adhesive, and the backlight module and the display panel are disposed in a front iron frame. To further reduce the thickness of the backlight module of the display device, the plastic housing only surrounds the backlight module so that the circuit board is directly located on the reflector. FIG. 1A shows a schematic, perspective view of a display device known to the inventor(s), and FIG. 1B shows a cross-sectional view of the display device of FIG. 1A taken along a cross-sectional line A-A′. The display device 10 includes a front iron frame F, a display panel 11 and a backlight module 12. The display panel 11 is disposed at one side of the backlight module 12. The display panel 11 and the backlight module 12 are contained in the front iron frame F. The backlight module 12 includes a plastic housing 19, a lamp cover 13, a circuit board 14, a reflector 17, a light guide plate 16, a light source 15 and multi-layered optical sheets 18. The reflector 17 is disposed at one side of the light guide plate 16. The multi-layered optical sheets 18 are disposed at the other side of the light guide plate 16 and opposite to the reflector 17. The lamp cover 13 is adjacent to the light guide plate 16, and located at one side of the light guide plate 16 for containing the light source 15, and receiving a part of the reflector 17 and the light guide plate 16. The circuit board 14 is disposed at the side of the light guide plate 16 opposite to the display panel 11, and is connected to the display panel 11 through the flexible circuit board C. The plastic housing 19 surrounds the reflector 17 and the light guide plate 16 so as to further reduce the thickness of the backlight module 12. As the circuit board 14 is directly located on the reflector 17, the circuit board 14 can only be fastened, e.g., by screws, on the plastic housing 19 from the two sides. When the cable P is plugged into a connector 14a of the circuit board 14 or unplugged from the connector 14a, the circuit board 14 may move relatively to the plastic housing 19 if the screw(s) is/are not fastened properly. As a result, the circuit board 14 may be tilted or bent, not only making the connector 14a easily prone to damage and creating a poor contact between the cable P and the circuit board 14, but also affecting the product quality.

Display device, backlight module of such display device, and method of fixing circuit board on such backlight module


A protective lifting system includes first and second mounting hooks each having, respectively, a line and pulley connection eyelet ring mounted thereon and a mounting bar connection eyelet ring mounted thereon which extends generally perpendicular to the shank section of the mounting hook, a pulley device mounted on the second mounting hook, a lift line having a first end connected to the first mounting hook and a second end which extends through the pulley device, a mounting bar operative to engage the mounting bar connection eyelet ring on the first and second mounting hooks to lift the hooks into an elevated supported position, the lift line being operative to lift an object to a safe elevated position by drawing the second end of the lift line through and away from the pulley device thereby decreasing the length of the lift line extending between the first and second mounting hooks.

1. Technical Field
The present invention is directed to food and backpack hanging systems for use by campers and other outdoorsmen and, more particularly, to a protective lifting system for objects for suspending the objects in an elevated position which includes first and second mounting hooks each having, respectively, a line and pulley connection eyelet ring mounted thereon and a mounting bar connection eyelet ring mounted thereon which extends generally perpendicular to the shank section of the mounting hook, a pulley device mounted on the second mounting hook, a lift line having a first end connected to the first mounting hook and a second end which extends through the pulley device, a mounting bar having a topmost engagement section which is operative to engage the mounting bar connection eyelet ring on the first and second mounting hooks to lift the hooks into an elevated position for engagement on a supporting object with the lift line extending therebetween, the lift line being operative to lift an object to be protected and supported thereon by drawing the second end of the lift line through and away from the pulley device thereby decreasing the length of the lift line extending between the first and second mounting hooks whereby the object is lifted into an elevated position supported between the first and second mounting hooks.
2. Description of the Prior Art
Each year, untold numbers of people visit wilderness areas for hunting, fishing, hiking, and many other outdoor activities. While these visits are, for the most part, exciting and enjoyable, visits and stays in wilderness areas also bring certain risks into play which are not encountered in ordinary daily life. Specifically, when visiting wilderness areas, persons must be aware that animals will often take an interest in their activities, particularly if the animals become aware of foodstuffs, toiletries or garbage which are being carried by the persons visiting the wilderness area. For example, one of the largest and potentially most dangerous animals frequently encountered in wilderness areas is the bear, particularly black bears, and these intelligent and curious animals spend a great deal of time exploring for food. This activity can bring them into close contact with humans, particularly since bears mainly rely on their sense of smell to locate foodstuffs and therefore the foodstuffs being carried by persons in wilderness areas may become targets of bears in order to satisfy their hunger.
In particular, hikers and campers often encounter bears in wilderness areas, and it is necessary for these persons to take precautions when entering the bears' habitat. Most commonly, hikers and campers store their food, toiletries, and garbage in either bear resistant containers or in what are commonly referred to as "food hangs." While hikers and campers would ideally carry bear resistant containers for their food, toiletries, and garbage with them, most bear resistant containers are bulky and heavy and are difficult to transport during hiking and camping. Therefore, the majority of hikers and campers use food hangs which usually consist of a long rope or cable which is draped over separate trees spaced at least twenty to thirty feet apart and which are at least fifteen feet high. The hiker/camper would then throw the rope over the first tree, transport the rope to the second tree and throw the rope over the second tree, then attach the food bag to the center of the rope where it is approximately equidistantly spaced from the two trees, then the ends of the rope would be pulled to lift the bag or pack containing the food, toiletries and/or garbage up into the air to suspend the bag or pack between the trees. The ends of the rope would then be secured to the tree by an appropriate means such as a knot or other such tie-off and the food hang would thus be completed.
It is easy to see, however, how the ordinary method of preparing and completing a food hang is a cumbersome and time-consuming process. For example, one must extend the rope over two selected trees, with all the attendant difficulties inherent in performing such an action, due to the numerous branches, twigs and leaves which are in the way when the rope is being thrown over a particular selected branch. Furthermore, one must be sure that the securing knots which are tying the rope in the selected position do not slip or give way which would result in the hanging food bag dropping to the ground. Also, one must ensure that the branch selected is of sufficient strength to support the hanging bag, and because of the method by which the rope is thrown over the branch, it may be difficult to select and accurately throw the rope over an appropriate branch unless one is quite skilled in the art of rope throwing. Therefore, there is a need for an improved object lifting and hanging system which addresses and corrects many of the deficiencies found in the prior art devices and systems.
Therefore, an object of the present invention is to provide an improved protective lifting system for objects for suspending objects in an elevated position.
Another object of the present invention is to provide an improved protective lifting system for objects which may be quickly and easily used in virtually any location in the wilderness and which may be used by most any hiker, camper, hunter, or fisherperson who is concerned about and wants to avoid keeping food, toiletries and/or garbage on the ground near their camping or resting location.
Another object of the present invention is to provide an improved protective lifting system for objects for suspending the objects in an elevated position which includes first and second mounting hooks which may be quickly and easily placed on spaced elevated supporting objects such as trees with a lift line extending between the first and second mounting hooks and through a pulley device on the second mounting hook such that merely by drawing the lift line through the pulley when the first and second mounting hooks are mounted on the supporting objects, the lift line will lift the object secured thereto in a simple and efficient manner.
Another object of the present invention is to provide a protective lifting system for objects for suspending the objects in an elevated position which utilizes an extendable or longitudinally extended mounting bar which releasably connects to a mounting bar connection eyelet ring, one mounted on each of the first and second mounting hooks for lifting the first and second mounting hooks into an elevated position engaging the supporting object, thus permitting quick and efficient placement of the first and second mounting hooks on the supporting objects.
Another object of the present invention is to provide a protective lifting system for objects for suspending the objects in an elevated position which will generally prevent fraying and degradation of the supporting rope, cord or cable which results from frictional contact between the rope, cord or cable with the tree or other such supporting object commonly used for support of food hangs.
Finally, an object of the present invention is to provide a protective lifting system for objects for suspending objects in an elevated position which is relatively simple and durable in construction and is safe, efficient and effective in use.

Protective lifting system for outdoor use


For providing a voltage booster circuit wherein the output voltage is boosted up with a sufficient ability, and smoothly and easily controlled as well to maintain a desired voltage level with little fluctuation, the voltage booster circuit of the invention comprises a plurarity of pumping circuits (1--1 to 1-n), each thereof connected in parallel between a power supply (Vcc) and an output terminal (VPUMP) for supplying a higher voltage than the power supply, driven by a pair of complementary pumping clocks; means for generating pump activating signals determining a number to be activated of said plurality of pumping circuits according to potential of the output terminal; and switching means (6-1 to 6-n) for supplying the pair of complementary pumping clocks to each of the number to be activated of the plurality of pumping circuits controlled with said pump activating signals.

The present invention relates to a voltage booster circuit, and more particularly to a voltage booster circuit whereof output voltage is able to be controlled stably.
In known voltage booster circuits, there is a type wherein output voltage is controlled not to exceed a maximum value referring to a reference voltage. As an example of this type of voltage booster circuit, there is a prior art disclosed in a Japanese patent application laid open as a Provisional Publication No. 132088/'92, which is embodied for eliminating break of a clamping transistor provided for limiting maximum voltage of its output used for erasing or writing a non-volatile semiconductor memory.
FIG. 8 is a block diagram illustrating circuit configuration of the prior art having a plurality of pumping units 11-1 to 11-n. Each of them, a pumping unit 11-1 for example, comprises a serial connection of a first and a second nMOS transistors MN1 and MN2 each diode-connected, and a first and a second pumping capacitors C1 and C2.
A pumping clock generator 360 generates a pair of complementary pumping clocks Tc and Bc, one of which, the pumping clock Tc for instance, is supplied to gate/drain connection of the first nMOS transistor MN1 through the first pumping capacitor C1, while the other, the pumping clock Bc, is supplied to gate/drain connection of the second nMOS transistor MN2 through the second pumping capacitor C2, of each of the plurality of pumping units 11-1 to 11-n.
Drain of the first nMOS transistor MN1 is supplied with a positive supply Vcc through a diode connection of an input nMOS transistor NTr11. Drains of the first nMOS transistor of each of the following pumping units 11-2 to 11-n is supplied from source of the second nMOS transistor MN2 of each of their preceding pumping units 11-1 to 11-(n-1) and source of the last pumping unit 11-n connected to an output terminal VPUMP.
The output terminal VPUMP, which is connected to source of a pull-up nMOS transistor NTr12 diode connected with its gate and drain supplied from the positive supply Vcc, is also connected to an input of a voltage divider 320. Output level signal VPUMPC output from the voltage divider 320 is compared with a reference voltage VREF supplied from a reference voltage generator 340 by a differential amplifier 330 for obtaining a control signal, with which the pumping clock generator 360 is ON/OFF controlled.
When the output level signal VPUMPC, proportional to potential of the output terminal VPUMP, is lower than the reference voltage VREF, the differential amplifier 330 activates the pumping clock generator 360 with the control signal for generating the pair of complementary pumping clocks Tc and Bc, which drive the pumping capacitor C1 and C2 of every of the plurality of the pumping units 11-1 to 11-n to a HIGH and a LOW level, alternately and complementarily.
When the first pumping capacitor C1 of the first pumping unit 11-1 is pulled down by LOW level of the complementary pumping clock Tc, it is charged with the positive supply Vcc toward a voltage level (Vcc-Vth) through the input nMOS transistor NTr11, Vth being threshold voltage of the nMOS transistors, since the first nMOS transistor MN1 is made OFF with its source pushed up by the HIGH level of the other complementary pumping clock Bc. When the complementary pumping clock Tc is turned to HIGH level, the first pumping capacitor C1 is pushed up and its electric charge flows to the second pumping capacitor C2 through the second nMOS transistor MN2 becoming ON, the input nMOS transistor NTr11 becoming OFF in turn.
In the same way, electric charge is pumped up from drain of the first nMOS transistor MN1 to source of the second l nMOS transistor MN2 in each of the plurality of pumping units 11-1 to 11-n. Therefore, by repeating these pumping cycles, potential of the output terminal VPUMP is boosted up toward a potential (Vcc-Vth+.DELTA.V), .DELTA.V being a potential proportional to the number n of the pumping units 11-1 to 11-n and to peak-to-peak voltage of the complementary pumping clocks Tc and Bc and depending also on pulse widths of the pair of complementary pumping clocks Tc and Bc, for a certain range of output load of the voltage booster circuit.
The potential of the output terminal VPUMP is divided into the output level signal VPUMPC by the voltage divider 320, which is compared by the differential amplifier 330 with the reference voltage VREF generated from the reference voltage generator 340. So, the potential of the output terminal VPUMP is boosted up during VREF.gtoreq.VPUMPC until the pumping clock generator 360 is disabled when the output level signal VPUMPC becomes higher than the reference voltage VREF. Thus, an output voltage proportional to the reference voltage VREF is obtained from the output terminal VPUMP, in the prior art of FIG. 8.
There is also proposed another type of voltage booster circuits, wherein output potential is controlled by varying pulse widths of the complementary pumping clocks.
However, in the prior art of FIG. 8, there is a problem that it is difficult to maintain potential of the output terminal VPUMP accurately at a desired voltage proportional to the reference voltage VREF without somewhat overshooting or undershooting, because the voltage booster circuit, which should have a sufficient boosting ability compared to its generally varying load, can not be but ON/OFF controlled in the prior art.
On the other hand, in the another type of voltage booster circuits, there is another problem that a certainly complicated circuit configuration is needed for feedback-controlling pulse widths continuously according to output level of the voltage booster circuit, resulting in an increased power consumption.


A fabricating method of nitride semiconductor substrate is provided. First, a first substrate including a first base material, a nitride semiconductor template layer stacked on the first base material, and a first dielectric layer stacked on the nitride semiconductor template layer is provided. Then, the first dielectric layer and the nitride semiconductor template layer are patterned, and a second substrate including a second base material and a second dielectric layer stacked on the second base material is provided. Next, the nitride semiconductor template layer and the first dielectric layer of the first substrate are transferred onto the second dielectric layer of the second substrate through bonding and transferring processes, and then a nitride semiconductor thick film is grown from the nitride semiconductor template layer through an epitaxy process. After that, the nitride semiconductor thick film and the second substrate are separated.

1. Field of the Invention
The present invention relates to a fabricating method of a nitride semiconductor substrate. More particularly, the present invention relates to a method of fabricating nitride semiconductor substrate of low defect density and a composite material substrate with patterned structure which is fabricated with the method.
2. Description of Related Art
In recent years, GaN and related ternary compound semiconductors are widely applied to short wavelength optoelectronic devices and high-power high-frequency devices, however, due to the difficulties in fabricating GaN substrate, such semiconductors are generally grown on sapphire substrate and SiC substrate. Even though GaN monocrystal can be successfully grown on these two substrates through heteroepitaxy technology, high density defects are usually produced during epitaxy process due to large lattice mismatch, and such defects will limit the application and development of GaN material in optoelectronic semiconductor devices.
In General, due to the limitation in solubility and diffusibility of nitrogen in liquid gallium, it is very difficult to fabricate GaN substrate by using conventional single crystal growth technology. Thus, in recent years, hydride vapor phase epitaxy (HVPE) is developed and used for increasing the thickness of GaN on sapphire substrate greatly, so as to grow GaN thick film, however, the defect density and macro-cracking can not be reduced effectively, and the main factor thereof is still caused by the differences between lattice constants and coefficients of thermal expansion (CTE) existing in hetero-materials.
Presently, some patents for fabricating low defect density GaN substrate have been issued already, such as U.S. Pat. No. 6,964,914. In this patent, first, H+ implantation is performed to GaN or AlN monocrystal base material, and the implantation depth is the thickness of GaN after subsequent transferring. Then, the thin GaN layer is transferred onto other supporting substrate through direct-wafer-bonding or intermediate-wafer-bonding after the implantation process, and the transferred monocrystal layer is referred to as nucleation layer. Next, a thick GaN monocrystal layer is grown through HVPE. Finally, the GaN thick film and the supporting substrate are separated.
However, the foregoing U.S. patent has some disadvantages even though it can be used for fabricating free standing GaN thick film, for example, the bonding temperature up to 800˜1000° C., and the separating temperature of nucleation layer is also up to 900˜950° C., high temperatures may cause GaN or the supporting substrate to burst due to the difference in CTE. In addition to this, the present cost of GaN substrate is up to US$10,000.

Fabricating method of nitride semiconductor substrate and composite material substrate

Industrial Technology Research Institute


Disclosed is a method for producing an SiC preform of a high volume fraction used for the manufacture of a metal matrix composite. The method involves the steps of mixing SiC particles of different particle sizes each selected from a range of 0.2 to 48 xcexcm with an organic binder, an inorganic binder, an aggregating agent, and distilled water, thereby producing a mixture, and stirring the mixture in accordance with a ball milling process, thereby producing a slurry containing the SiC particles, pouring the slurry containing the SiC particles into a mold having upper and lower molds respectively provided with absorbent bodies, and squeezing the slurry in the mold, thereby reducing a residual moisture content of the slurry, completely drying the slurry reduced in residual moisture content, thereby producing an SiC preform, and calcinating the SiC preform. The preform is impregnated with a metal matrix while maintaining a high reinforcement volume fraction of 70 vol % or more. Accordingly, this preform can be widely used for fundamental materials of metal matrix composites used to manufacture electronic packaging components and aerospace components requiring a low thermal expansion coefficient and a high thermal conductivity.

1. Field of the Invention
The present invention relates to a method for producing a preform used for the manufacture of a metal matrix composite, and more particularly to a method for producing an SiC preform having a high volume fraction of 70% or more using SiC powder in accordance with a ball milling and pressing process.
2. Description of the Related Art
The remarkable technical development in the 1990""s in technical fields associated with electronic components has resulted in requirements for the materials of electronic packaging components to have specific characteristics as follows.
First, the material of an electronic packaging component should have a thermal expansion coefficient similar to that of a semiconductor chip encapsulated by that packaging component. By virtue of such a thermal expansion coefficient, it is possible to minimize thermal stress generated due to a thermal expansion coefficient difference between the semiconductor chip and the material of the electronic packaging component when heat is generated from the electronic packaging component. By virtue of such an electronic packaging component, an improvement in the life of semiconductor devices may be achieved.
Second, for an electronic packaging component, it is necessary to select a material capable of efficiently discharging heat generated from a semiconductor device using the electronic packaging component. Since semiconductor devices are sensitive to heat and impact, products using such semiconductor devices should be protected from impact. Such products should also have an ability to easily discharge heat.
Recently, electronic products have been developed toward a compact size so that they are conveniently portable. For such compact electronic products, accordingly, materials having characteristics of a low density have been preferably used. For such low-density materials, there may be metal matrix composites which have been recently highlighted for electronic packaging materials.
Metal matrix composites have characteristics of a high thermal conductivity and superior mechanical characteristics while exhibiting a relatively good workability because they use a metal matrix. Such metal matrix composites also has a low thermal expansion coefficient, as compared to other metal materials, because they use, as a reinforcement, ceramic having a low thermal expansion coefficient, thereby causing the thermal expansion of the metal matrix to be suppressed. Such metal matrix composites may also have designing characteristics capable of adjusting the thermal expansion coefficient thereof to a desired level. Such designing characteristics may be obtained by adjusting the volume fraction of the reinforcement. By virtue of such characteristics, metal matrix composites have been highlighted in association with applications to materials of electronic packaging components and materials of aerospace products, such as artificial satellites or spaceships, which should be strictly controlled in terms of a dimension variation resulting from a thermal expansion.
Such an increased interest in metal matrix composites has also resulted in an increased interest in reinforcement preforms used in the production of those metal matrix composites.
For a conventional preform production method, there may be a vacuum-assisted extraction method which is mainly used in the production of fiber preforms. This vacuum-assisted extraction method is a method of mechanically mixing a reinforcement with a binder in a stirrer, thereby forming a slurry, and extracting the slurry in vacuum, thereby producing a reinforcement preform. Such a particle reinforcement preform produced in accordance with such a vacuum-assisted extraction method has an average reinforcement volume fraction of about 50%. In order to use such a preform for the production of a metal matrix composite for electronic packaging components, however, the reinforcement volume fraction should be 70% or more. When the preform has a reinforcement volume fraction of 70% or more, it can have a thermal expansion coefficient of 6 to 7 ppm/K similar to those of semiconductor chips.
Therefore, an object of the invention is to provide a method for producing an SiC preform, which has a high volume fraction, and is capable of a reinforcement for metal matrix composites, using a ball milling and pressing process.
In accordance with the present invention, this object is accomplished by providing a method for producing an SiC preform having a high volume fraction, comprising the steps of: mixing SiC particles of different particle sizes each selected from a range of 0.2 to 48 xcexcm with an organic binder, an inorganic binder, an aggregating agent, and distilled water, thereby producing a mixture, and stirring the mixture in accordance with a ball milling process, thereby producing a slurry containing the SiC particles; pouring the slurry containing the SiC particles into a mold having upper and lower molds respectively provided with absorbent bodies, and squeezing the slurry in the mold, thereby reducing a residual moisture content of the slurry; completely drying the slurry reduced in residual moisture content, thereby producing an SiC preform; and calcinating the SiC preform.

Method for producing SiC preform with high volume fraction

Korea Advanced Institute of Science and Technology


A method includes receiving a bipolar signal sensed by a pair of electrodes at a location in a heart of a patient. One or more electrocardiogram (ECG) signals are received, sensed by body-surface electrodes attached to the patient. Two or more successive QRS complexes are identified in the bipolar signal. One or more activations are detected in the bipolar signal, which occur within a window-of-interest that begins at least a given time with respect to the identified QRS complexes. The detected activations are checked whether they are late potentials, by verifying whether (i) the activations do not coincide with a predefined event observed in the ECG signals, and (ii) the activations are repeatable in the successive QRS complexes. In response to deciding that at least one of the detected activations is a late potential, the latest of the at least one of the late potentials is visualized to a user.

Annotation of electrophysiological signals to determine the local activation times (LATs) was previously suggested in the patent literature. For example, U.S. Patent Application Publication No. 2016/0128785 describes various embodiments for a system and a method for identifying the arrhythmogenic circuit of a patient or subject. In one embodiment, the method comprises obtaining data for electrograms recorded at various locations of the heart while programmed ventricular pacing with extra stimuli to induce ventricular tachycardia (VT) was performed, obtaining decrement values for at least two different locations of the heart using the recorded electrograms, generating at least a portion of a decrement map using the decrement values, and identifying the arrhythmogenic circuit based on electrograms having significant decremental properties. Late potentials, which are local potentials (activations) generally occurring after the end of the QRS complex are reproducibly seen, with reproducible timing from repetitive paced or Sinus Rhythm beats. Abnormal potentials can frequently be seen within the QRS complex (these were coined with the term "left ventricular abnormal local activation," or local abnormal ventricular activity (LAVA)). The issue here is the obvious subjectivity of the operator and the risk that these signals are non-specific targets, hence risking excessive ablation at sites that do not have the properties to induce or sustain re-entrant VT. Accordingly, the areas of late potentials during sinus rhythm (SR) and pacing in both the endocardial and epicardial surfaces were also characterized in the study. Color-coded substrate maps were created with the application of scar mapping and late potentials (LP) mapping during SR and ventricular pacing. The areas of LPs were defined as any local activity after the end of the surface QRS. Very late potentials (VLP) were defined as local activity more than 50 ms from the end of a surface ECG QRS.
As another example, U.S. Patent Application Publication No. 2017/0156612 describes how cardiac activity (e.g., a cardiac electrogram) is analyzed for local abnormal ventricular activity (LAVA), such as by using a LAVA detection and analysis module incorporated into an electro anatomical mapping system. The module transforms the electrogram signal into the wavelet domain to compute as scalogram; computes a one-dimensional LAVA function of the scalogram; detects one or more peaks in the LAVA function; and computes a peak-to-peak amplitude of the electrogram signal. If the peak-to-peak amplitude does not exceed a preset amplitude threshold, then the module can compute one or more of a LAVA lateness parameter for the electrogram signal using one of the one or more peaks detected in the LAVA function and a LAVA probability parameter for the electrogram signal.

Annotation of late potentials comprising local abnormal ventricular activation (LAVA) signals


Delta/sigma frequency discriminator (1) for converting a frequency (Fv) of an input signal into a digital output signal (C) comprising a frequency divider (8) which divides the input signal at a frequency dividing ratio which can be switched in dependence on the digital output signal (C), with at least one sampling register (12) which samples the divided input signal by means of a reference clock signal for generating the digital output signal (C), and with a dither circuit (15) which varies the clock period (T) of the reference clock signal so that interfering modulation tones in the signal spectrum of the digital output signal (C) are suppressed.

Frequency discriminators or frequency demodulators are widely used and are used in frequency synthesizers or as demodulators in frequency modulation receivers.
FIG. 1 shows a delta/sigma frequency discriminator (DSFD) according to the prior art as described in R. Beards, M. Copelend, "An Oversampling Delta-Sigma Frequency Discriminator", IEEE Trans. On Circuits and Systems II, Vol. 41, Vol. 1, January 1994. The delta/sigma frequency discriminator receives an input signal at an input E1 and a reference clock signal at an input E2. The delta/sigma frequency discriminator (DSFD) determines the frequency of the input signal and outputs a corresponding digital value at its output A. For this purpose, the delta/sigma frequency discriminator (DSFD) according to the prior art as shown in FIG. 1 contains a dual modulus frequency divider which divides the input signal at the signal input E1 at a frequency dividing ratio which can be switched in dependence on the digital output signal. A sampling register samples the divided input signal by means of the reference clock signal for generating the digital output signal. The reference clock signal is generated, for example, by a reference clock generator.
In the delta/sigma frequency discriminator DSFD according to the prior art, a digital output signal is generated which consists of a one-bit datastream. Depending on the logical state of the output signal, the frequency dividing ratio of the frequency divider is switched between a first frequency dividing ratio N and a second frequency dividing ratio N+L, where N, L are two suitable integer values. The delta/sigma frequency discriminator measures the frequency Fv of the input signal in comparison with the frequency FR of the reference clock signal.
The following applies:
                              Mean                                                                          value                                      [              C              ]                                      =                                            F              v                                                      (                                  N                  +                  L                                )                            /              2                                -                      F            R                                              (        I        )            where C represents the digital output signal.
L is typically selected to be much smaller than N, for example N=92 and L=4. The digital datastream C at the output of the delta/sigma frequency discriminator DSFD represents the frequency difference between the input signal, which has a relatively high frequency, and the low-frequency reference clock signal. The reference clock signal is generated by a reference clock generator, for example a crystal oscillator. The delta/sigma frequency discriminator DSFD measures the frequency Fv of the input signal. The output datastream exhibits a first-order quantization noise (+20 DB/DEC).
However, the delta/sigma frequency discriminator (DSFD) according to the prior art as shown in FIG. 1 has the disadvantage that in a frequent case when the frequency Fv of the input signal is constant, strong interfering modulation tones occur in the signal spectrum of the digital output signal (C). The same problem occurs in first-order delta/sigma modulators. The base frequency of the interfering modulation tones depends on the difference between the frequency Fv of the input signal and the frequency FR of the reference clock signal. It can happen that the interfering modulation tones occur within the low frequency band so that they can no longer be eliminated by a subsequent digital low-pass filtering. This leads to a considerable deterioration in the performance of the data processing system.
It has been attempted, therefore, to eliminate the interfering modulation tones by increasing the order of the delta/sigma frequency discriminator. For example, second- and third-order delta/sigma frequency discriminators (DSFD) have been proposed, for example in I. Galton, "A Practical Second Order Delta Sigma Frequency to Digital Converter", IEEE Inter. Symposium on Circuits and Systems, 1995, and M. Hovin et al., "Novel Second Order Delta-Sigma Modulator Frequency to Digital Converter", Electronic Letters, Vol. 31, No. 2, January 1995 or T. Riley et al., "A two-loop Third Order Multistage Delta-Sigma Frequency to Digital Converter", IEEE Intern. Symposium on Circuits and Systems, 1998. However, these delta/sigma frequency discriminators (DSFD) need analog circuit sections for implementing integrators in the feedback loop or providing charge pumps. Although the proposed delta/sigma frequency discriminators partially attenuate or suppress the interfering modulation tones at the output, they can only be implemented with complex circuitry, especially due to the analog circuit sections.


An orthodontic model has a single block body made of catalyzing acrylic resin with a pair of prism boxes inversely positioned and interconnected by a pair of posterior walls with a window, the prism boxes have covers of the same shape and are provided with perimetral depressions for fitting to the boxes and to reach a welding of edges of each dental arch or the model, and a method of its production is proposed.

The present invention relates to a method of manufacturing orthodontic models, as well as to orthodontic models produced by the inventive method.
Orthodontic models are currently made of plaster or hard resin. In the first case, the piece is fragile and appears to be unsatisfactory as a result of the plaster physical limitations. Continuous handling leads to early wearing of the model and the test or steady prosthesis fitting is impaired.
Another problem is that the plaster model, as a result of its fragility, is difficult to handle during orthodontics exposures, in addition to not causing an adequate technical effect, since the plaster is white and does not allow contrast between gums and teeth. Another disadvantage to be considered is that, if a portion of the model breaks, restoration is extremely argos, thus preventing total repair.
Models made of hard resin are more resistant and the material color contrast (teeth and gums) facilitates the orthodontic model study by the orthodontic professional. However, considering the drawbacks, the hard resin models are heavy, difficult to manufacture and impose high operating cost. For this reason, it is first necessary to mold an alginate matrix inside the patient mouth. When dried, this flexible matrix form receives the resin that is poured to fill it completely, reaching the maximum level. Once the resin is cured, the piece is removed from its mold and the finishing work is then started. This work is slow and expensive since all imperfections of the piece need to be removed. Depending on the case, dental arch models made of hard resin can weigh up to 400 g. This excessive mass renders the piece fragile, as it can easily break if dropped.

Method of manufacturing an orthodontic model, and an orthodontic model produced thereby


A method for producing sterile, decellurized bioprosthetic tissue comprising: (a) contacting a human tissue with a hypotonic solution to produce a lysed tissue, (b) contacting the lysed tissue with a first surfactant to produce a surfactant-treated tissue, (c) contacting the surfactant-treated tissue with a nuclease enzyme solution to produce an enzyme-treated tissue, (d) contacting the enzyme-treated tissue with a cleaning solution comprising a second surfactant, a chaotropic agent or a mixture thereof to produce a decellurized tissue and (e) contacting the decellurized tissue with a bioburden reducing agent to produce the final bioprosthetic tissue. Kits to be used in conjunction with said method, as well as, the bioprosthetic tissue produced via said method are also provided.

Tissue and organ transplantation is a rapidly growing therapeutic field as a result of improvements in surgical procedures, advancements in immunosuppressive drugs and increased knowledge of graft/host interaction. There are numerous investigations underway directed toward the engineering of improved transplantable tissue grafts, however, it is generally believed in the industry that ideal implants have yet to be produced.
The use of decellularized tissue scaffolds have been explored as a possibility for tissue engineering, however, the existing approaches have proven inadequate. References of interest include U.S. Pat. No. 6,743,574; U.S. Pat. No. 5,336,616; Gratzer et al., Tissue Engineering, 12(10):2975-2983 (2006); Woods et al., Biomaterials, 26:7339-7349 (2005); Williams et al., Acta Biomaterialia, 5:993-1005 (2009); Liao et al., Biomaterials, 29:1065-1074 (2008); Wilson et al., Ann Thorac Surg, 60:S353-S358 (1995); PCT App. Pub. No. WO2006/101885; U.S. Pat. No. 7,318,998; Kitagawa et al., J Med Invest, 48(3-4):123-132 (2001); Kearney, Clin Dermatol, 23:357-364 (2005); Azar, Clin Sport Med, 28:191-201 (2009); and Simon et al., Eur J Cardiothorac Surg, 23:1002-1006 (2003)).
Despite major advancements in the field of biomedical engineering, modern tissue transplantation remains associated with complications including inflammation, degradation, scarring, contracture, calcification (hardening), occlusion, and/or rejection. Moreover, existing technologies for producing decellularized tissue scaffolds have failed to sufficiently reduce the number of cells in the tissue to an adequate level. Therefore, there is a need in the art for methods of producing tissues that avoid or reduce the above-described drawbacks and thus have greater short- and long-term usability. There is also a further need in the art for methods of producing sterile, decellularized tissues.


A digital delay locked loop (DLL) includes a phase detector for outputting a comparing signal by comparing a system clock signal with a chip clock signal, a shift register for sequentially shifting data bit values in both the directions in accordance with the comparing signal, a phase delay unit for delaying and outputting the system clock signal in accordance with each bit value of the shift register, a domain selecting controller for detecting an overflow or an underflow condition of the shift register and outputting a domain selection controlling signal, and a domain selector for adjusting the phase of a driving signal from one region comprising 0.degree..about.180.degree. and to another area comprising 180.degree..about.360.degree. and carrying out a domain transition whenever an overflow or an underflow condition is generated when the phase reaches a boundary region of the two domains.

1. Field of the Invention
The present invention relates to a digital phase delay locked loop (DLL), and in particular, to an improved phase delay correction apparatus which is capable of embodying a precise resolution and an indefinite delay range with a minimum number of delay units by applying a domain classifying concept.
2. Description of the Conventional Art
As shown in FIG. 1, a conventional phase delay correction apparatus includes a phase detector 101 for outputting a comparing signal (RL) by comparing the phase of a chip clock signal (CCLK) on the basis of a system clock signal (SCLK), a phase adjusting unit 102 for outputting a phase-adjusted clock signal (YCLK) by sequentially delaying the system clock signal (SCLK) in accordance with the comparing signal (RL) of the phase detector 101, and a clock signal distributor 103 for supplying the phase-adjusted clock signal (YCLK) to the inside of a chip by distributing the phase-adjusted clock signal (YCLK) of the phase adjusting unit 102 and for feeding back the phase-adjusted clock signal (YCLK) to the phase detector 101 as the chip clock signal (CCLK).
As shown in FIG. 2, the phase adjusting unit 102 includes a shift register 41 for shifting the data "1" by one bit to the right from the input side (DR) when the comparing signal (RL) of the phase detector 101 is "1", synchronized with the clock signal (CLK) and for shifting the data "0" by one bit to the left from the input side (DL) when the comparing signal (RL) thereof is "0", synchronized with the system clock signal (SCLK) , and a plurality of delay units 42-1, 42-2, . . . 42-n for outputting a phase-adjusted clock signal (YCLK) by sequentially delaying the system clock signal (SCLK) in accordance with each bit value (B1 . . . Bn) of the shift register 41.
The plurality of delay units 42-1,42-2 . . . 42-n include first inverters 1 each for inverting a system clock signal, first pass gates 2 connected in parallel with the output terminals of the first inverters 1 and which are turned on when the corresponding bit value of the shift register 41 is "1", second pass gates 3 the output terminals of which are commonly connected to the output terminals of the first pass gates 2 and which are turned on when the corresponding bit value of the shift register 41 is "1", and second inverters 4 for outputting the phase-adjusted clock signal (YCLK) by inverting the outputs of the first inverters 1 inputted through the first pass gate 2 or the clock signal which is fed back from the succeeding delay unit through the second pass gate 3.
In the last delay unit 42-n, two inverters 5,6 are additionally connected in series between the first inverters 1 and the second pass gate 3.
Referring to FIG. 1 and FIG. 2, the operation of the conventional phase delay correction apparatus will now be described in detail.
The phase detector 101 compares the phase of the system clock signal (SCLK) with the phase of the chip clock signal (CCLK) and outputs the comparing signal (RL) to the phase adjusting unit 102, wherein the comparing signal (RL) is "1" when the phase of the chip clock signal (CCLK) is leading, and is "0" when the phase of the chip clock signal (CCLK) is trailing.
Here, as shown in FIG. 2, when the comparing signal is "1", the shift register 41 of the digital data line 102 shifts the data "1" by one bit from the input side (DR) to the right side, synchronized with the system clock signal (SCLK), and when the comparing signal is "0", synchronized with the system clock signal (SCLK) , the shift register 41 shifts the data "0" by one bit from the input side (DL) to the left, and outputs the bit values to the plurality of delay unit 42-1,42-2, . . . ,42-n.
Therefore, as the first and second pass gates 2,3 of the plurality of delay units 42-1,42-2, . . . ,42-n are turned on complementarily in accordance with each bit value (B1,B2, . . . ,Bn) shifted to the right or the left, a delay chain is formed comprising the first inverters 1 and the second inverters 4.
For example, when all the bits of the shift register 41 are "0", the first pass gates 2 are all turned on, and the second pass gates 3 are all turned off, and therefore, only the inverters 1,4 of the delay unit 42-1 form a delay chain, and the minimum delay of the system clock signal (SCLK) occurs.
Through the delay units 42-1,42-2, . . . ,42-n, the phase- adjusted clock signal (YCLK) is outputted to the clock signal distributor 103, which outputs a chip clock signal (CCLK) to the inside of the chip for detecting various versions of clock signals and phases within the chip, and feeds back the same and the phase detector 101. Afterwards, the identical operation is repeated.
However, since the delay range according to the conventional phase delay correction apparatus depends on the number of the delay units, the number of the delay units should be arranged so that a minimum delay occurs and a phase shift of more than 360.degree. may be achieved.
But, in the delay unit of the phase adjusting unit, a delay occurs through two inverters and one pass gate in a minimum delay condition, and when the delay is increased, since the delay through one pass gate is added, it has been difficult to achieve a resolution below 400 ps(Pico sec) due to the increase in the delay.


An original illuminating device includes LED (light-emitting diode) chips and a lens for condensing light emitted from the LED chips on an original-reading position, on the same substrate. The device is configured so as to prevent randomly-reflected light in the device from being specularly reflected by an original-mount glass toward a reading device. Since the specularly-reflected light is not incident upon the reading device, only light corresponding to an image on an original is incident upon the reading device. It is therefore possible to correctly read the original.

1. Field of the Invention
This invention relates to an original illuminating device which illuminates an original with light-emitting devices, and which is used in a facsimile, a copier or the like. The invention also relates to an original reading device which reads light from an illuminating device with a reading member.
2. Description of the Related Art
Heretofore, light sources emitting a large amount of light, such as fluorescent tubes, xenon tubes and the like, have been used as light sources for image reading apparatuses, such as facsimile machines and the like. Recently, however, since photosensors, such as CCDs (charge-coupled devices) and the like, tend to have higher sensitivity, light sources comprising light-emitting devices emitting a small amount of light, specifically, LEDs (light-emitting diodes) arranged in the shape of an array have appeared in the market.
This is because the LED has, for example, the following features. The LED can be provided in a small size and with low cost since it does not need an inverter for lighting it as do fluorescent tubes and xenon tubes. The LED does not generate high-frequency noise since it does not need high-frequency lighting. Furthermore, the LED has more stable rising characteristics and temperature characteristics than fluorescent tubes and xenon tubes.
An explanation will now be provided of a device using LEDs.
FIG. 7 shows the schematic configuration of an original reading device 100, to describe a background technique of the present invention.
In FIG. 7, there are shown an upper original mount 101, a white reference background 102 provided at the lower surface of the upper original mount 101, lower original mounts 103 and 104, and an original-mount glass 105. Below the original-mount glass 105 are disposed a substrate 106, a reflecting plate 112, and a photosensitive member, such as a photoelectric conversion device or the like (not shown). The substrate 106 faces reading position A of an original in a state inclined about 45.degree. relative to the original-mount glass 105.
FIG. 8 is a perspective view of the substrate 106.
On an identical surface of the substrate 106 there are linearly arranged LED chips 107, serving as a plurality of light-emitting devices, disposed in the direction of the longitudinal direction, and there are also arranged, in parallel, electrodes (made of a metal, such as gold, silver, Al or the like) 108 for passing current corresponding to the respective LED chips 107. The electrodes 108 are situated at positions so as to pass between the LED chips 107 and enclose the LED chips from both sides in the direction of the width of the substrate 106 orthogonal to the longitudinal direction thereof. Each of the electrodes 108 is connected to the corresponding LED chip 107 using a bonding wire 108a. There are also shown resistors 109, and patterns 110 and 111 for passing current to the substrate 106.
The LED chips are electrically connected so that a plurality of (eight in the case of FIG. 8) LED chips are connected in series using the electrodes and the bonding wires to form a group, and respective groups are connected in parallel using a circuit pattern. Since LED chips within one group are connected in series, respective electrodes are arranged while being separated with a space l.
In the original reading device 100 configured as described above, current is supplied to the substrate 106 from the outside to cause the LED chips 107 to illuminate the reading position A of the original D through optical path E shown by one-dot chain lines, as shown in FIG. 7. The light reflected by the original D is guided to the photosensitive member through optical path B, and an image on the original D is read.
The above-described device, however, has the following disadvantages, since the LED chips 107 and the electrodes 108 are provided on the same surface of the substrate 106.
It can be considered that each LED chip 107 is a point light source around the reading position A. Illuminating light from each LED chip 107 is randomly reflected by surrounding components in a complex manner to illuminate the entire area. Such randomly-reflected light reaches the electrodes 108 and illuminates the reading position A as a secondary light source, thereby adversely influencing a reading operation by the photosensitive members.
That is, the reflected light which has reached the electrodes 108 situated at the side of the optical path B relative to the LED chips 107 reaches the reading position A via optical paths E, M and N, as shown in FIG. 7. In this case, the light beams along the optical paths N and M illuminate the reading position A from a direction closer to the perpendicular direction relative to the original-mount glass 105 than the light beam along the optical path E. Hence, according to a certain setting of the optical paths, such light, serving as a secondary light source, is specularly reflected by the lower and upper surfaces of the original-mount glass 105, and is incident upon the CCD via a mirror optical system and a lens, acting in some cases as white noise which is different from the light reflected from the surface of the original D. Such a white-noise component is in some cases as large as about 10%-20%. As a result, the randomly-reflected light causes a failure in a reading operation of an image on the original; for example, the original D is determined to be white while it is actually black.
As described above, the electrodes 108 on the substrate 106 are not continuous along the longitudinal direction, but are arranged in a mosaic pattern having a gap l. Hence, the above-described white noise caused by the secondary light source has variations in its magnitude in the longitudinal direction of the substrate. As a result, an undulation as indicated by a broken line in FIG. 5 appears in the output from the photosensitive member even if the original D is totally white.
Next, an explanation will be provided of a case wherein a condenser lens is provided incident on the LED chips in order to increase the amount of light on the reading position A. FIG. 16 illustrates the schematic configuration of an original reading device, to describe a background technique of the present invention.
In FIG. 16, there are shown an upper original mount 201, a white reference background 202 provided at the lower surface of the upper original mount 201, lower original mounts 203 and 204, and original-mount glass 205. Below the original-mount glass 205 are disposed a substrate 206, and a photosensitive member, such as a photoelectric conversion device or the like (not shown). The substrate 206 faces illuminating position A of an original in a state inclined about 20.degree.-' relative to the original-mount glass 205.
On the upper surface of the substrate 206 are linearly arranged LED chips 208, serving as a plurality of light-emitting devices, disposed in the longitudinal direction thereof (the direction of the width of the original). A condenser lens 209 having condensing surfaces 209a and 209b is disposed above the LED chips 208. The condenser lens 209 may be provided in various manners. For example, each condenser lens 209 may be disposed for each LED chip 208. Alternatively, a rod-like condenser lens 209 may cover the entire row of the LED chips 208. Optical path 301 may be inclined in a direction separate from the LED chips 208 relative to the original-mount glass 205 in order to obtain a necessary amount of light by disposing the substrate 206 closer to the reading position A. The substrate 206 is secured to a holding member 211 using a lock screw 210.
In an original reading device 200 configured as described above, the LED chips 208 emit light to illuminate the reading position A of the original through optical path 300 shown by the one-dot chain line. The light reflected by the original is guided to the photosensitive member through the optical path 301, and an image on the original is read.
The above-described device, however, has the following disadvantages, since the condenser lens 209 is disposed above the LED chips 208.
In the above-described original reading device 200, each LED chip 208 can be considered as a point light source. The light emitted from the LED chips 208 illuminates the original reading position A via the condensing surfaces 209a and 209b of the condenser lens 209. Part of the light, however, is randomly reflected by condensing portions and sides of the condenser lens 209 not directly related to the condensing function, and mounting portions of the condenser lens 209 within the condenser lens 209. Particularly when such randomly-reflected light leaks toward the original-mount glass 205 from the side closer to the optical path 301 than the LED chips 208, the light illuminates the illuminating position A from a direction closer to the vertical direction relative to the surface of the original-mount glass 205 than the direct light from the LED chips 208. That is, the light emitted in direction T.sub.1 enters the condenser lens 209 from a surface other than the condensing surface 209a, and is directed in direction T.sub.2. The light is then directed in direction P after repeated reflection along a path indicated by two-dot chain lines, and is specularly reflected by the lower surface of the original-mount glass 205 to enter the optical path 301, functioning as noise for an image reading signal and causing a failure in an image reading operation. Another light beam in direction Q is also present, and the light is specularly reflected by the upper surface of the original-mount glass 205, causing the same failure. Such a noise component is in some cases as large as 10-20% of the light reflected by the original.
Furthermore, since variations are present in the magnitude of the noise in accordance with the arrangement of the row of the LED chips 208, an undulation in accordance with the row of the LED chips, the same as the undulation shown in FIG. 5, appears in the output from a CCD sensor, serving as a photosensitive member. As a result, vertical stripes having the same pitch as that of the row of the LED chips 208 appear in a read image.
It is possible to eliminate the influence of such undulations by sufficiently separating the LED array from the reading position. In this case, however, the amount of light from the LED chips cannot be sufficiently utilized. Hence, it is necessary to increase the number of the LED chips, causing an increase in the production cost. Another problem is that it is necessary to provide a space for separating the substrate having the LED array thereon from the reading position, and hence the size of the device is increased.
The above-described disadvantages are further increased for the light randomly reflected by the electrodes explained with reference to FIGS. 7 and 8, if the condenser lens shown in FIG. 16 is provided. That is, light having small incident angles from the LED chips is reflected by the incident surface of the condenser lens, is then reflected by the electrodes on the substrate, and specularly illuminates the original-mount glass after passing through an end portion of the condenser lens. Since this light is superposed with the directly-illuminating light from the LED chips, it becomes noise, further increasing the degree of failure in an image reading operation.

Original illuminating device and original reading device preventing random reflected light


This invention relates to gasification of high ash bituminous coals that have high ash fusion temperatures. The ash content can be in 15 to 45 weight percent range and ash fusion temperatures can be in 1150° C. to 1500° C. range as well as in excess of 1500° C. In a preferred embodiment, such coals are dealt with a two stage gasification process—a relatively low temperature primary gasification step in a circulating fluidized bed transport gasifier followed by a high temperature partial oxidation step of residual char carbon and small quantities of tar. The system to process such coals further includes an internally circulating fluidized bed to effectively cool the high temperature syngas with the aid of an inert media and without the syngas contacting the heat transfer surfaces. A cyclone downstream of the syngas cooler, operating at relatively low temperatures, effectively reduces loading to a dust filtration unit. Nearly dust- and tar-free syngas for chemicals production or power generation and with over 90%, and preferably over about 98%, overall carbon conversion can be achieved with the preferred process, apparatus and methods outlined in this invention.

1. Field of Invention
This invention relates to gasification of high ash bituminous coals that have high ash fusion temperatures. Existing fluidized bed gasifiers are unsuitable to process such coals economically as these coals are less reactive which leads to lower carbon conversion and generating undesirable components such as tar. If such coals are gasified in slagging entrained flow gasifiers that operate at higher temperatures to improve carbon conversion, the large energy penalty associated with slags, containing a large amount of additives that are necessary to lower ash fusion temperature, make the process economically unviable. In this invention, such coals are dealt with a two stage gasification process—a primary gasification step followed by a high temperature partial oxidation step of residual char carbon and small quantities of tar. The process is further beneficial with the inclusion of an internally circulating fluidized bed to effectively cool the high temperature syngas.
2. Background and Related Art
Those of skill in the art of coal gasification know that some bituminous coals are unsuitable for use in existing commercial gasifiers economically or practically. The initial ash deformation temperatures of these bituminous coals as measured by ASTM D-1857 are well above 1500° C. It becomes very difficult to melt the ash for gasifiers that rely on slagging the ash in the gasification process, such as conventional GE, Shell and E-Gas gasifiers. For these and other such gasifiers, to gasify the high ash fusion temperature coals, the gasifier operating temperature will be too high even with added fluxing agents and such operation shortens the life span of linings in the gasifier. Further, the high ash bituminous coals can contain up to approximately 45 weight percent (wt %) ash in the coal. Even with addition of, for example, approximately 20 wt % fluxing agents to lower the coal ash fusion temperature, the energy penalty to melt the large amount of ash is simply too high and leads to an inefficient and unreliable gasification process. Further, it would be difficult to operate these gasifiers due to large amount of slag flow of combined ash and fluxing agent. The high ash and high ash fusion temperature bituminous coals have been precluded from many existing gasification technologies.
It is also difficult to gasify these coals in conventional fluidized bed gasifiers as the bituminous coals have quite low reactivities with gasification agents. The fundamental reason for the low reactivity in a fluidized bed is that the operating temperature is limited due to the tendency for clinker formation. Once clinkers form, the gasifier looses fluidization and functional capabilities. Although the ash fusion temperature is high, the gasifier will form clinker a few hundred degrees of Celsius below the ash fusion temperature as the surfaces of burning coal particles have a much higher temperature than the measured bulk temperature in the fluidized bed. Further, the temperature in a fluidized bed gasifier is rarely uniform due to hot spots in some parts of the bed that tend to melt the surface of coal ash particles, leading to agglomerates and eventual clinker formation. Therefore, it is very rare for a fluidized bed gasifier to operate above approximately 1100° C. without bed fouling in spite of the coal ash fusion temperatures well above approximately 1500° C. Because of the operating temperature limitations, the carbon conversion in the fluidized bed process is generally below approximately 90%. The remaining carbon has to be combusted in a combustor (with all of the associated equipment in the combustion train) for economic viability, leading to increased capital and operating and maintenance costs for the gasification process. Thus, existing fluidized bed gasifiers cannot handle bituminous coals economically. Further, gasification of bituminous coals in fluidized beds generates small quantities of tar in the syngas, which is hard to remove and it becomes expensive to treat the syngas. Without treatment for tar in the syngas, the downstream equipment such as syngas cooler and dust filters tend to foul, leading to operational reliability concerns.
It is more difficult to gasify these types of bituminous coals in a moving bed gasifier. Most bituminous coals have some caking tendency and the moving bed gasifier has difficulty handling caking coals. The carbon conversion is even lower than in fluidized bed gasifiers due to limitations related to operating temperature. In addition, the moving bed gasifier generates large amount of tar and phenol water that requires expensive processes to treat to meet today's environmental regulations.
Two-stage gasification is known. The fixed bed or moving bed two-stage gasifier was developed to produce two different syngas streams in U.S. Pat. No. 5,139,535. One stream contains tar and carbonization gas and the other is product syngas from coal gasification. Due to low capacity, lower yield of product syngas and high wastewater production, the two stage moving bed gasifiers are obsolete.
There are various two-stage fluidized bed gasification systems. One type uses a two-vessel arrangement with a combustor and a gasifier. The flue gas from the combustor together with hot solids recycling between the gasifier and the combustor is fed into the gasifier to provide heat for the endothermic gasification reactions. U.S. Pat. No. 4,386,940 discloses one of these types. However, those skilled in the art of gasification understand that the problem is not how to provide the heat to the gasifier, but how to convert enough carbon and coal into desirable syngas constituents carbon monoxide and hydrogen. In the normal operating temperature range of up to approximately 1100° C. in such a two stage system, the coal conversion to carbon monoxide and hydrogen is too low with undesirable components such as tar still present in the syngas. Therefore, combustion and gasification in two separate vessels, and then routing the flue gas to the gasifier, is essentially no different than using a single gasifier with combustion and gasification zones.
U.S. Patent Publication No. 2013-0056685 discloses using a two-stage gasifier to accomplish high carbon conversion. The first-stage gasifier or pyrolyzer operates at approximately 500-700° C. and the second-stage operates at 1400-1500° C. The ash from the second-stage gasifier is melted and discharged as molten slag. This concept is similar to the one of U.S. Pat. No. 6,455,011 that discloses a method to gasify waste in a two-stage gasifier system. The first-stage gasifier is a fluidized bed gasifier and the second-stage is a swirl or cyclonic gasifier and ash is melted and discharged as slag. Yet, these methods incorporate the same difficulties and poor economics in handling high ash bituminous coals with high ash fusion temperatures as the entrained flow gasifiers.
Another two-stage entrained flow slagging gasifier is disclosed in U.S. Pat. No. 8,444,724. Since this type of gasifier requires melting and slagging the ash and fluxing agents, it cannot viably be used for those coals with high ash content and high ash fusion temperatures.
It is thus readily apparent that present coal gasification technologies cannot economically process coals with high ash content and high ash fusion temperatures. In addition to ably gasifying such coals, the layout of the process and design of downstream equipment also plays a significant role in skillfully generating high yields of nearly dust-free syngas for chemical synthesis or power generation end use.
It is an intention of the present invention to provide a process, appropriate apparatus and method for operating the series of apparatus that can gasify the high ash, high ash fusion temperature bituminous coals with carbon conversions above approximately 90%, and preferably above approximately 98%, while providing nearly tar-free syngas for further processing downstream to end-use chemicals or power generation.

Gasification of high ash, high ash fusion temperature bituminous coals