A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when the cover wafer is bonded to the device wafer.

As is known in the art, Microelectromechanical systems (MEMS) are integrated micro devices or systems combining electrical and mechanical components. MEMS devices may be fabricated using, for example, standard integrated circuit batch processing techniques. Exemplary applications for MEMS devices include sensing, controlling, and actuating on the micro scale. Such MEMS devices may function individually or in arrays to generate effects on a macro scale.
As is also known in the art, many MEMS devices require a vacuum environment in order to attain maximum performance. The vacuum package also provides protection and an optimal operating environment for the MEMS device. Specific examples of these MEMS devices include infrared MEMS such as bolometers, sometimes referred to as microbolometers, and certain inertial MEMS such as gyros and accelerometers. Previously, MEMS devices have been individually packaged in vacuum compatible packages after fabrication and dicing of the MEMS device. Often, however, the cost of packaging MEMS devices in traditional metal or ceramic packages may be on the order of about 10 to 100 times the device fabrication cost. This especially true if a vacuum is required in the package. These high packaging costs therefore make it difficult to develop commercially viable vacuum packaged MEMS devices. In addition, MEMS devices are fragile especially after dicing. Care must be taken in handling these devices, and traditional integrated circuit fabrication machinery cannot adequately handle and protect MEMS devices. Thus, special handling techniques have also been developed to protect the MEMS devices until vacuum packaging has been completed. These special handling procedures also add additional cost to the production of MEMS devices.
Over the years, various types of infrared detectors have been developed. Many include a substrate having thereon a focal plane array, the focal plane array including a plurality of detector elements that each correspond to a respective pixel. The substrate contains an integrated circuit which is electrically coupled to the detector elements, and which is commonly known as a read out integrated circuit (ROIC) and which is used to integrate the signal from each detector element and multiplex the signals off the chip with appropriate signal conditioning and processing.
Each detector element includes a membrane which is suspended at a location spaced above the top surface of the substrate, in order to facilitate thermal isolation. The membrane includes a thermally sensitive material, such as amorphous silicon (a-Si) or vanadium oxide (VOx). The membrane also includes two electrodes, which are each coupled to the thermally sensitive material, and which are also coupled to the ROIC in the substrate. As the temperature of the thermally sensitive material varies, the resistance of the thermally sensitive material also varies, and the ROIC in the substrate can determine the amount of thermal energy which has been received at a detector element by sensing the corresponding resistance change of that detector element.
As is the case with certain microelectromechanical (MEMS) devices, bolometers may need to be packaged in vacuum conditions for best performance. Exemplary requirements for the packaging of bolometer arrays include reliable hermetic sealing, the integration of IR window material with good infrared transmission, and high yield/low cost packaging. Both the reliability and the cost of MEMS devices depend upon encapsulation techniques chosen. For MEMS based bolometers, packaging may be done at the chip level or at the wafer level. A common way of packaging in this instance is to fabricate a protective, IR-transmitting cap wafer, or Window Cap Wafer (WCW), and bond it to an exposed surface of the semiconductor substrate, or device wafer, containing the active IR detector bolometer areas prior to dicing. The cap wafer, sometimes, also referred to as a cover or lid structure, is formed with cavities therein such that when the cap wafer is flipped and bonded to the device wafer, the cavities provide sufficient clearance to accommodate and protect the MEMS devices therein.
Uncooled infrared focal plane arrays operating at ambient temperature and without the use of active temperature stabilization require infrared optically blind reference pixels that do not absorb incident infrared radiation. These infrared optically blind reference pixels are used to determine ambient temperature of the focal plane which is required in the calibration of the focal plane array over the operating temperature of the focal plane array. This involves implementation of a gain and offset correction algorithm at any given temperature (sensed by the reference pixels) to the active detector elements in order to correct the image for ambient temperature drift effects, e.g., in an imaging focal plane array.
In the past, reference pixels have been made infrared optically blind by using short thermal isolation legs for the suspended infrared absorbing element in combination with placement of an infrared reflecting aluminum metallization directly on the reference pixel. However, reference pixels fabricated in this way have less Joule heating (e.g., in a voltage-biased suspended microbolometer structure) due to the shorter legs and to a lesser extent the added thermal mass of the aluminum reflector. As such, the output of the reference pixel as read out using a ROIC tends to diverge from the output of the infrared responsive suspended pixel detector elements, thereby limiting dynamic range both in terms of scene temperature and ambient temperature operating ranges.
As noted above, a cap wafer is formed with cavities therein such that when the cap wafer is flipped and bonded to the device wafer, the cavities provide sufficient clearance to accommodate and protect the MEMS devices therein. As also noted above, the cap is typically an infrared-transparent cover, or lid structure. These lids are often coated with an anti-reflective (AR) coating to reduce the reflective properties and increase the infrared transmission properties of the lid. In many applications, a WLP IR FPA package has a 300 um deep cavity with an ARC in the cap wafer to put the cap optical window as far from pixel plane as possible in order to minimize shadowing effect of optical defects in the image plane
As is also known in the art, some of these MEMS devices require antireflection coatings (ARCs).
As noted above, one such it detector is a bolometer. Bolometers are devices that act as thermal infrared (IR) sensors by absorbing electromagnetic radiation and thus increase their temperature. The resulting temperature increase is a function of the radiant energy striking the bolometer and is measured with for example, thermoelectric, pyroelectric, resistive or other temperature sensing principles. In the context of uncooled infrared imaging technologies, an infrared bolometer focal plane array (FPA) typically refers to resistive microbolometers, in which a temperature increase is measured by a corresponding resistance change. More specifically, a microbolometer is a type of resistor used as a detector in a thermal camera, for example. The microbolometer may include a tiny vanadium oxide or amorphous silicon resistor with a large temperature coefficient on a silicon element with large surface area, low heat capacity and good thermal isolation. Infrared radiation from a specific range of wavelengths strikes the vanadium oxide or amorphous silicon and changes its electrical resistance. Changes in scene temperature cause changes in the bolometer temperature, which are converted to electrical signals and processed into an image.
With regard to the ARC, a cavity, the floor of which becomes the inner surface of the window, is normally formed in the WCW to space the inside of the WCW away from the device wafer having the FPA detectors in order that defects in the ARC and window surface do not cast shadows on the FPA, which would appear as optical defects in the camera image. The cavity is formed with a Deep Reactive Ion Etch (DRIE). The DRIE cavity etching requires hours of etching per wafer. Controlling the window-detector gap can be accomplished by forming spacers between the device wafer and the WCW using layers of materials already employed in the fabrication of the detectors and package.
Today, in a wafer level packaged bolometer IR FPA, the window cap wafer (WCW) may have greater cost that the read-out IC wafer. Further, today, the WCW is typically a silicon-on-insulator (SOI) wafer. A substantial amount of the WCW cost is in the starting wafer (˜$400). Further, a Deep Reactive Ion Etch (DRIE) process is used to etch the cavity, with the oxide in the costly SOI wafer serving as an etch stop layer, and define the optical window at a cost of ˜$200, and the anti-reflective coating (ARC) on the inner surface costs about $500 per wafer.

Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling


A process for structuring a movable element out of a membrane region. A sacrificial layer and a sealing layer are applied to the underside of the membrane region. Following removal of the sacrificial layer, sealing layer forms a limit stop and a seal for the movement of the movable element.

Processes for making micromechanical rotational speed sensors are known from German Patent Application No. 1 95 26 903. According to this patent application, a membrane region is created in a silicon wafer by etching out a cavity so that this membrane region is thinner than the silicon wafer. By further etching processes, a movable element is then etched out of the membrane region. To limit the deflection of this movable element, various processes for creating limit stops have been described. These processes for creating limit stops have in common the feature that at least one additional wafer, particularly a silicon wafer, is needed to make them. Moreover, connecting this wafer with the silicon wafer from which the movable element was etched out requires a tedious procedure.

Process for making micromechanical structures


The present disclosure relates to a method performed in a fingerprint analysis system for facilitating differentiating between a live finger and a spoof finger. The method comprises acquiring a plurality of time-sequences of images, each of the time-sequences showing a respective finger as it engages a detection surface of a fingerprint sensor. Each of the time-sequences comprises at least a first image and a last image showing a fingerprint topography of the finger, wherein the respective fingers of some of the time-sequences are known to be live fingers and the respective fingers of some other of the time-sequences are known to be spoof fingers. The method also comprises training a machine learning algorithm on the plurality of time-sequences to produce a model of the machine learning algorithm for differentiating between a live finger and a spoof finger.

Various types of biometric systems are used more and more in order to provide for increased security and/or enhanced user convenience.
In particular, fingerprint sensing systems have been adopted in, for example, consumer electronic devices, thanks to their small form factor, high performance and user acceptance.
Liveness Detection/Anti Spoofing/Presentation Attack Detection is needed to protect biometric systems from attack with spoofed body parts, e.g. a spoof fingerprint.
There are many approaches to solving this problem applied to fingerprint recognition, such as hardware-based methods looking for material properties, pulse detection by oximetry, software-based methods looking for spoof created artefacts in the obtained fingerprint images and looking at fine scale textures.
There are multiple image-based software approaches described that explicitly look at perspiration effects that introduces differences between image frames. But not all fingers exhibit the amount of perspiration needed, especially not in winter conditions. See e.g. IJITKM Special Issue (ICFTEM-2014) May 2014, pp. 61-69 (ISSN 0973-4414), "Fake Fingerprint Detection Methods" by Tanisha Aggarwal et al.
There are also skin elasticity approaches that requires the user to twist the finger while the sensor captures a sequence of images. See e.g. IEEE Transactions on Information Forensics and Security, vol. 1, no. 3, September 2006, "Fake Finger Detection by Skin Distortion Analysis" by Athos Antonelli et al.
U.S. Pat. No. 7,133,541 discloses a method of differentiating between a live finger and an imitated finger. The method comprises obtaining a sequence of images while the finger is being placed on the fingerprint sensor, and variations between the sequential images are analysed to determine whether the finger is live.
Competently made spoofs can reach very high quality with regards to low presence of artefacts.
Since later generations of capacitive sensors are small and, due to a thick coating, have low spatial resolution, the number of artefacts present in each image is low, and fine scale textures are not present. Thus, the available software liveness methods are challenged.

Differentiating between live and spoof fingers in fingerprint analysis by machine learning


Disclosed are a method for training speech recognition model, a method and a system for speech recognition. The disclosure relates to field of speech recognition and includes: inputting an audio training sample into the acoustic encoder to represent acoustic features of the audio training sample in an encoded way and determine an acoustic encoded state vector; inputting a preset vocabulary into the language predictor to determine text prediction vector; inputting the text prediction vector into the text mapping layer to obtain a text output probability distribution; calculating a first loss function according to a target text sequence corresponding to the audio training sample and the text output probability distribution; inputting the text prediction vector and the acoustic encoded state vector into the joint network to calculate a second loss function, and performing iterative optimization according to the first loss function and the second loss function.

Transducer-based speech recognition model has been widely used at home and abroad, and its typical feature is that it can directly adapt to streaming speech recognition tasks. Although it introduces language predictor, its language modeling ability is insufficient. Through research, it is found that language predictor does not play the role similar to language model in real reasoning, but takes on the function of eliminating duplicate labels, and its ability to model dependencies between languages still has room for further improvement.

Method for training speech recognition model, method and system for speech recognition

INSTITUTE OF AUTOMATION, CHINESE ACADEMY OF SCIENCES


A solid-state image-taking system including a gate voltage control unit 31 and a substrate voltage control unit 32, for preventing generation of a defective image such as a residual image, without increasing the read voltage. The gate voltage control unit 31 applies the read voltage to the gate electrode 17 during the read period. The substrate voltage control unit 32 applies a stationary reverse bias voltage steadily to the semiconductor substrate 11 to cause electric charge excessively stored in the light-to-electric conversion unit 14 to overflow to a side of the semiconductor substrate 11, and not to the charge storage unit 13, and applies, during part or all of the read period, a specific reverse bias voltage that raises a potential barrier between the semiconductor substrate 11 and the well 12 to be higher than a height thereof when the stationary reverse bias voltage is applied.

(1) Field of the Invention
The present invention relates to a solid-state image-taking system that includes: a solid-state image-taking apparatus for outputting electric charge read from light-sensitive elements; and a driving apparatus for driving the solid-state image-taking apparatus, and more specifically relates to a technology for preventing generation of a defective image such as a residual image, without increasing the read voltage.
(2) Description of the Related Art
In recent years, image-taking apparatuses such as home video cameras and digital still cameras have been in widespread use.
Among such image-taking apparatuses, there are ones that use solid-state image-taking devices of charge-transfer types that read electric charge from light sensitive elements and transfer and output the read electric charge.
FIG. 17 shows the structure of a portion of a conventional solid-state image-taking device of charge-transfer type, the portion corresponding to one unit pixel.
As shown in FIG. 17, in the solid-state image-taking device, a p-well 72 is formed on an n-type substrate 71. The p-well 72 includes an n-type area 73 being an embedded channel, and an n-type area 74 being a photodiode. Ap-type area 75 is provided between the n-type area 73 and the n-type area 74. A SiO2 film 76 is formed on the p-well 72. A gate electrode 77 made of polysilicon is formed above the n-type area 73 with the SiO2 film 76 in between. This structure of the conventional solid-state image-taking device of charge-transfer type is called MOS (metal-oxide semiconductor) structure.
The gate electrode 77 functions as a transfer electrode to transfer electric charge, and also functions as a read electrode to read electric charge from the photodiode.
Adjacent unit pixels are each separated by a p-type area 78 specifically provided for this purpose.
The p-well 72 is typically grounded. A reverse bias voltage is applied to the n-type substrate 71 for the p-well 72.
Here, varying the reverse bias voltage applied to the n-type substrate can change the potential depth of the photodiode, and can change the height of the potential barrier between the n-type substrate 71 and the photodiode. It should be noted here that what is called vertical overflow drain structure can be formed by setting the reverse bias voltage to such a value that allows electric charge excessively stored in the photodiode overflows to the side of the n-type substrate 71, not overflowing to the charge transfer channel. In the present document, overflowing of the electric charge excessively stored in the photodiode over to the charge transfer channel is referred to as "blooming". Also, a voltage that is applied to the substrate and is at the limit of inhibiting the blooming is referred to as a "blooming inhibit voltage". To prevent the blooming from occurring in the conventional solid-state image-taking device of charge-transfer type, it is necessary to form a potential barrier high enough to prevent the blooming, between the photodiode (n-type area 74) and the charge transfer channel (n-type area 73). It is therefore necessary to make the p-type impurity in the p-type area 75, which is provided for the potential control, dense enough to prevent the blooming, preventing the empty space between the photodiode and the charge transfer channel from broadening.
However, if the p-type impurity in the p-type area 75 is made dense enough to prevent the blooming and to prevent the empty space between the photodiode and the charge transfer channel from broadening, it becomes difficult for the empty space to broaden even if a positive voltage is applied to the gate electrode 77. When this happens, the read voltage must be set to a higher level to prevent signal charge from remaining.
Japanese Laid-Open Patent Application No. S62-145865 discloses a solid-state image-taking apparatus for preventing signal charge from remaining when the signal charge is transferred from the light-sensitive unit to the transfer unit, thus reducing an amount of residual image.
A defective image such as a residual image is generated when, for example, the signal charge remains because of the read voltage set to a low level.
On the other hand, there is a demand for decreasing the surface area of the unit pixel. However, if the surface area of the unit pixel is decreased, the horizontal width of the p-type area for the potential control is also decreased. This makes it necessary to increase the vertical depth of the p-type area. This also increases the read voltage. However, there is a limit to increasing the read voltage. As a result, sometimes the signal charge remains, and a defective image such as a residual image is generated.

Solid-state image-taking apparatus, solid-state image-taking system, and apparatus and method for driving the solid-state image-taking apparatus

Matsushita Electric Industrial Co., Ltd.


The structure of a flash memory is described. Device isolation structures are located on the substrate. Sources are provided on the top layer of the substrate between two device isolation structures. Tunneling oxide layers are provided at both ends of the device isolation structures and on the substrate where the sources are present. Drains are provided in the top layer of the substrate where the tunneling oxide layer is absent in between the device isolation structures. Polysilicon blocks are extended across the ends of two device isolating structures, above the tunnel oxide layer. A silicon oxide cap layer is located on the polysilicon block. The silicon oxide layers are formed on the sidewalls of the polysilicon blocks. The polysilicon layer is on the sidewall of the polysilicon blocks and the polysilicon blocks are separated by the silicon oxide layer. The silicon oxide layer covers the surface of the polysilicon layers. Another polysilicon layer, which is located on the tunnel silicon oxide layer above the sources also, covers a part of the silicon oxide cap layer.

1. Field of Invention
The present invention relates to the structure and the manufacturing process of a surrounding-gate flash memory cell. More particularly, the present invention relates to a surrounding-gate flash memory having a self-aligned control gate.
2. Description of the Related Art
The nonvolatile memory cells have been widely used in various electronic components for the storage of structural information, the programming of information or information that can be repeatedly accessable. A flash memory is an erasable programmable read-only memory (EPROM) or an electrically erasable programmable read-only memory (EPPROM). Since the information in a flash memory can be stored, read and erased many times, there is increasing demand for the flash memory in the semiconductor market.
Two gates are generally provided in a flash memory cell, one of which is the floating gate formed by polysilicon for the storage of electrical charges and the other of which is the control gate to control the access of information. The floating gate is located under the control gate and is often in the state of xe2x80x9cfloatingxe2x80x9d without connecting to any circuitry. The control gate is usually connected to a wordline. A characteristic of the flash memory cell is its high speed xe2x80x9cblock-by-blockxe2x80x9d in the erasure of the stored data and is usually accomplished within 1 to 2 seconds. The xe2x80x9cblock-by-blockxe2x80x9d erasure process is much faster than the typical xe2x80x9cbit-by-bitxe2x80x9d EPROM erasure process, which requires at least several minutes.
As the device integration becomes higher, the coupling ratio of a control gate becomes smaller and the operation voltage needs to be raised. The application of the floating gate transistor structure in a conventional flash memory therefore limited in highly integrated. In the trend of increasing the writing and erasure speed and lowering the operation voltage of a flash memory, increasing the coupling ratio of the control gate has become the only solution. The potential of a floating gate can be increased as the coupling ratio of the control gate is increased Increasing the coupling ratio of the control gate, however, is inevitable to increase the capacitance between the floating gate and control gate. One way of increasing the capacitance is to reduce the thickness of the insulation layer, the other way is to increase the area of the capacitor or to use a high dielectric constant insulation material.
Based on foregoing, a surrounding-gate flash memory cell having a greater capacitor area between the control gate and the floating gate, and a higher coupling ratio for the control gate at the same integration as a conventional flash memory is provided.
The writing, reading and erasing of a flash memory are related to the coupling ratio of the control gate. The coupling ratio of the control gate of each flash memory cell unit has to be the same to avoid a faulty operation. It is, therefore, very important to control the area of the capacitor between the control gate and the floating gate in each flash memory cell unit. A micro-patterning process is used in forming the control gate of a flash memory in the conventional method. As the device integration gets higher, the window of the photo resist process becomes smaller. In such a case, it is possible to cause a difference in the operational voltage between different flash memory cell units due to misalignment. The flash memory is formed by an array of a plurality of flash memory cell units. A faulty operation thereby occurs when there is a difference in the operational voltage between the cell units in the same flash memory. The present invention is to provide a self-aligned method of forming the control gate and to ensure the same capacitor area between the control gate and the floating gate in each flash memory cell unit.
The same tunneling oxide layer is used for the electron transfer in the programming and the erasure of the information of a conventional floating gate flash memory, which may lead to the damage of the device easily. The present invention further provides a surrounding-gate flash memory comprising of control gates, floating gates and erasure gates. Moreover, the writing and the erasure of information are carried out at different silicon oxide layers to prevent the device from being damaged and to increase the lifetime of the device.
According to the present invention, a surrounding-gate flash memory having self-aligned control gates is provided. Such surrounding-gate flash memory is disclosed as the following:
A plurality of device isolation structures formed by a shallow trench isolation method or by a local oxidation method, are provided on a substrate. These device isolation structures are arranged in the form of a chessboard, with one row as a region and each region containing a plurality of the device isolation structures. The source regions are located in the substrate and are between neighboring regions of the device isolation structures. The tunneling silicon oxide layers are located at both ends of each device isolation structure region and on the substrate the source regions are located. The drain regions are located in the substrate without the tunneling oxide layer which are located between each two device isolation structures in the same region and two drain regions are isolated by the device isolation structures in the same region.
A group of polysilicon block comprises a polysilicon block extended across the same ends of every two device isolation structures, above the tunnel oxide layer. On the other ends of the same device isolation structures also extends another polysilicon block to form the other group of polysilicon block. Thus, two groups of polysilicon block are present in a same region of the device isolation structures. These polysilicon blocks are used as floating gates and these polysilicon blocks are located above the tunneling oxide layer. The distance between a polysilicon block and an adjacent polysilicon block is not the same. The distance between the polysilicon blocks in the same group is smaller than that in different groups. The distance between the polysilicon blocks in the same group is also smaller than the distance between the device isolation structures in the same region. A silicon oxide cap formed by local oxidation is provided over each polysilicon block. A first silicon oxide layer is formed on the sidewall of each polysilicon block. These silicon oxide layers are positioned above the tunneling oxide layers as well.
First polysilicon layers are provided on the sidewalls of the polysilicon blocks and above the tunneling oxide layers to connect the polysilicon blocks in the same group and separated from the polysilicon blocks by the first silicon oxide layer. Tile height of the first polysilicon layer is lower than that of the polysilicon blocks. These first polysilicon layers are used as control gates and as word lines. Second silicon oxide layers are provided on the surfaces of the first polysilicon layers. Further, the second polysilicon layers are provided above the tunnel silicon oxides above the sources. These second polysilicon layers located on the device isolation structures in the different regions but in between the adjacent polysilicon blocksform a T-shaped structure, which covers the half parts of the polysilicon blocks adjacent to the sources. These second polysilicon layers are used as erasure gates.
A dielectric layer covers all of the above constituting elements. Plugs are provided in the dielectric layer. The lower end of one plug is electrically connected to the drain. Conductive lines are provided above the dielectric layer and the conductive lines do not intersect. Each conductive line is electrically connected to the upper end of one plug exposed in the surface of the dielectric layer, and only connected to one of the drains in each group of the drains by one plug. These conductive lines are used as bit lines.
Further, two dummy polysilicon blocks which are side-by-side and having a smaller size are provided at both ends of each group of the polysilicon blocks. The dummy polysilicon blocks is to provide the position for forming the conductive plugs of the control gates.
According to the preferred embodiment of the present invention, a method for fabricating the above structure of the surrounding-gate flash memory having self-aligned control gates is provided. A substrate is first provided. Device isolation structures are provided on the substrate. The device isolation structures are roughly parallel to each other, and arranged in the form of a chessboard. Each row of the device isolation structures form a region and every region of the device isolation structures includes a plurality of the device isolation structures. A strip-shaped source region is provided between each two regions of the device isolation structures. A block-shaped drain region is provided between the device isolation structures in each region. The method of forming these device isolation structures comprises shallow trench isolation or local oxidation.
On the surface of the substrate, a tunnel silicon oxide and a first polysilicon layer are sequentially formed. The method of forming the tunneling oxide layer comprises thermal oxidation. The method of forming the first polysilicon layer comprises chemical vapor deposition. A field silicon oxide isolating layer is formed by local oxidation over the first polysilicon layer. The polysilicon layer is etched by using the field silicon oxide isolation as mask. A polysilicon block and a dummy polysilicon block having the field silicon oxide isolating layer. The method of etching the first polysilicon layer includes selectively anisotropic etching.
A patterned photoresist layer is formed by the known lithography to allow said strip-shaped source region to be exposed. The source is formed in the source region. The method of forming the source includes ion implantation. The photoresist layer is removed. A first silicon oxide is formed on the sidewall around the polysilicon block. The method of forming the first silicon oxide includes thermal oxidation.
A conformal second polysilicon is formed over said substrate. The method of forming the polysilicon layer includes low-pressure chemical vapor deposition or plasma-enhanced vapor deposition. The conformal polysilicon layer is etched. The second polysilicon layer is etched and the tunneling oxide layer is used as etching-stop layer. The method of etching polysilicon layer includes selectively anisotropic etching of the polysilicon/silicon oxide.
A second silicon oxide is formed on the surface of said the etched second polysilicon layer. The method of forming the second silicon oxide includes thermal oxidation or chemical vapor deposition. A third polysilicon layer is formed over the whole surface of the substrate. The method of forming the third polysilicon layer includes chemical vapor deposition. A plurality of openings is formed in said third polysilicon layer. The drain regions, a part of the second silicon oxide and a part of said field silicon oxide isolating layer are exposed through the openings. The method of forming the openings includes known lithography and anisotropic etching. Drains are formed in the drain region. The method of forming the drains includes ion implantation. The tunneling silicon oxide located over the drains is removed.
A dielectric layer is formed. The method of forming the dielectric layer includes chemical vapor deposition. The dielectric layer covers all of the constituting elements. The material for the dielectric layer includes silicon oxide. Plugs are formed by known process for forming plugs in the dielectric layer. The lower ends of the plugs are electrically connected to the drains, and the upper ends thereof are exposed on the surfaces of the dielectric layer. A plurality of conductive lines is formed over the dielectric layer by known process to be connected to the upper ends of the plugs.

Surrounding-gate flash memory having a self-aligned control gate


An automatic focusing method for scanning electron microscopy. A scanning electron microscope is set in a low magnification mode to detect a taper portion of an object to be observed. The beam scanning whose direction is perpendicular to the taper portion is effected whenever objective lens control condition is changed at a first pitch, and the secondary electron signals obtained under these conditions are converted into video signals. The video signals are differential smoothed to calculate a sum of video signal absolute values. On the basis of the sum of the absolute values, an optimum objective lens control condition in the low magnification mode can be obtained. Sequentially, the microscope is set to a high magnification mode, and the objective lens control condition is further changed at a second pitch within a predetermined range with the optimum control condition in the low magnification mode as the center of the range. The beam scanning whose direction is perpendicular to the taper portion is effected. In the same way as in the low magnification mode, the secondary electrons signal obtained under these conditions are converted into video signals to obtain the optimum objective lens control condition in the high magnification mode. The optimum control condition obtained in the high magnification mode is determined as the control condition to determine the focal distance of the objective lens.

The present invention relates to an automatic focusing method for scanning electron microscopy.
In a conventional scanning electron microscopy, the automatic focusing method has been attained in accordance with the following steps:
1) storing the secondary electron signals obtained by scanning electron beams at a constant speed in circular or linear scanning mode and further by varying the excitation condition of an objective lens at a predetermined rate; PA1 2) obtaining either one of an integration value of variations in signal between adjacent pixels on a displayed picture or an addition of absolute values of differences in signal between adjacent pixels, on the basis of the stored secondary electron signals; and PA1 3) obtaining an excitation condition of the objective lens in which the above-mentioned obtained value is maximized, to set the obtained excitation condition to the objective lens. (Set a central value of the excitation value width determined by a half of the maximum value to the objective lens by regarding the central value as the excitation condition in which the real maximum value can be obtained.)
In the above-mentioned conventional automatic focusing method since the electron beams are scanned at a constant speed in the circular or linear mode, where the boundary region (taper portion) of an object to be observed is located on the beam scanning lines, the components of topographic contrast are included to that extent in the obtained secondary electron signals, with a result that the automatic focusing precision is relatively high. In addition, when the beam scanning direction is perpendicular to the boundary region, it is possible to further improve the automatic focusing precision.
However, an object to be observed is generally located at any given position on the surface upon which the beams are irradiated. Therefore, in the case of the circular or linear scanning mode, the number of beams for scanning the boundary region of an object to be observed is not constant in the automatic focusing operation. Additionally, the topography of the object to be observed is not uniform, and further the boundary region is not always located along the direction perpendicular to the beam scanning direction. Accordingly, the topographic contrast components included in the obtained secondary signal fluctuate, thus resulting in a problem in that the precision of the automatic focusing operation is not stable.
Further, in the conventional automatic focusing method, since the automatic focusing operation is effected at a constant magnification (previously set by an operator usually), in case where the working distance between the objective lens and an object to be observed is changed markedly, there exists a problem in that the precision of the automatic focusing operation is often deteriorated.

Automatic focusing method for scanning electron microscopy


There is provided a game system and a puzzle game program capable of changing displayed states of puzzle elements depending on a tilt of the puzzle game apparatus, such that a high level of strategy-making is required and drastic game developments and excitement are realized, as well as a storage medium having the puzzle game program stored therein. A tilt detection section is provided in connection with the game apparatus (or a controller therefor) for determining a tilt direction. The puzzle elements displayed on a display screen are moved in a tilt direction of the game apparatus.

1. Field of Non-Limiting Exemplary Embodiments
Present non-limiting exemplary embodiments relate to a puzzle game apparatus, a puzzle game program, and a storage medium having the puzzle game program stored therein. More particularly, the present non-limiting exemplary embodiments relate to a puzzle game apparatus and a puzzle game program which allow a puzzle game to be played on, for example, a home-use TV game machine, an arcade video game machine, or a hand-held game machine, and a storage medium having a puzzle game program stored therein.
2. Description of Background Art
Conventionally, the following puzzle games are known, among others: a puzzle game disclosed in Japanese Patent Examined Publication No. 3-71154 (hereinafter referred to as "Technique 1"); a product designated "Tetris" marketed by Nintendo Co., Ltd. (hereinafter referred to as "Technique 2"); a puzzle game disclosed in Japanese Patent Laid-Open Publication No. 4-54986 (a product designated "Dr. Mario" marketed by Nintendo Co., Ltd.; hereinafter referred to as "Technique 3"); and a product designated "Panel De Pon" (also known overseas as "Tetris Attack" or "Pockemon Puzzle League") marketed by Nintendo Co., Ltd.; hereinafter referred to as "Technique 4").
Techniques 1 to 3 may be classified as puzzle games concerning dropping objects (dropping-object games), where objects such as blocks or capsules appear to fall down from the top of the game screen, and are operated by a player while they are falling so as to land in particular positions which cannot be changed once the objects have landed and piled up. The idea behind the dropping-object games of Techniques 1 to 3 is, by resourcefully changing where to pile up the objects, the player can make sure that objects form a contiguous horizontal row, or any line or chain of a predetermined number of objects; as a result, such objects disappear and any other objects which were present above the disappeared objects shift downwards. The number of erased lines or objects may be counted into the score. If the objects pile up to a certain height as a result of mis-operation or mis-planning on the player's part, the game is over.
On the other hand, Technique 4 embodies a game where panels of different attributes such as colors or textures rise from the bottom, whose positions can be switched along a vertical or horizontal direction by the operations of a player, such that once a certain number (or more) of panels of the same attribute are present along a vertical or horizontal direction, such panels disappear, until the panels reach a threshold height, at which time the game is over.
In any one of Techniques 1 to 4, the only input device which is controllable by the player to execute game operations, including switching or addition of blocks, is the button(s) provided on the game apparatus. Moreover, in the case where new blocks are added (whether falling or rising) into the game screen, such additional blocks will only come from a fixed direction. Therefore, simply by repeatedly playing the puzzle game, a player may eventually become able to formulate some sort of strategy for erasing blocks, and advance the game so as to be able to erase as many blocks as possible with each single operation.
As mentioned above, in the case of conventional puzzle games, the only input means for conveying the intentions of a player is the operation switch(es) provided on a controller for the game machine. Therefore, there is a problem in that the game operation may become monotonous, thus detracting from the fun of game playing and reducing the sense of involvement. Moreover, any change in the displayed images (hereinafter referred to as "image transformation") occurs based on the user's operation on the puzzle elements using the controller. Since any changes will occur in predictable and non-accidental manners, the game play may become monotonous and boring.
While conventional puzzle games may be able to allow a player to partially switch the positions of one or several selected blocks before new puzzle elements such as blocks are added on the displayed image, it is not possible to cause a drastic change in the arrangement of a large number of puzzle elements which are already present, or displayed in a fixed manner, on the displayed image.
Since the puzzle elements will only move in one fixed direction with respect to the display screen, and any additional puzzle elements will come from a fixed direction, it becomes easy to formulate strategies for game clearance after playing the game for a while, rather than constantly requiring adaptations to accidental changes. In this respect, conventional puzzle games are likely to become boring.

Game system, puzzle game program, and storage medium having program stored therein


An echo-location method for microwaves, sound and light capable of using incoherent and arbitrary waveforms of wide bandwidth to measure velocity and range (and target size) simultaneously to high resolution. Two interferometers having very long and nearly equal delays are used in series with the target interposed. The delays can be longer than the target range of interest. The first interferometer imprints a partial coherence on an initially incoherent source which allows autocorrelation to be performed on the reflected signal to determine velocity. A coherent cross-correlation subsequent to the second interferometer with the source determines a velocity discriminated range. Dithering the second interferometer identifies portions of the cross-correlation belonging to a target apart from clutter moving at a different velocity. The velocity discrimination is insensitive to all slowly varying distortions in the signal path. Speckle in the image of target and antenna lobing due to parasitic reflections is minimal for an incoherent source. An arbitrary source which varies its spectrum dramatically and randomly from pulse to pulse creates a radar elusive to jamming. Monochromatic sources which jigger in frequency from pulse to pulse or combinations of monochromatic sources can simulate some benefits of incoherent broadband sources. Clutter which has a symmetrical velocity spectrum will self-cancel for short wavelengths, such as the apparent motion of ground surrounding target from a sidelooking airborne antenna.

1. Field of the Technology
The present invention relates to the simultaneous measurement of target velocity and position by microwaves (radar), sound (sonar and ultrasound) and light, and more specifically, it relates to the use of long delay interferometric techniques, short coherence length illumination and the Doppler effect to measure velocity and range.
2. Description of the Background
Measuring the velocity and range of an object remotely by the response of reflected waves (microwaves, light and sound) is an important diagnostic tool in a variety of fields in science and engineering. In many cases, the velocimetry and range finding are accomplished by opposite kinds of illuminating waves. Traditionally, highly coherent and therefore narrowbanded illumination is used for velocimetry, so that the Doppler frequency shift in the reflected waves is larger than the illumination bandwidth .beta.. This allows the Doppler frequencies of moving targets to be easily distinguished from those of stationary objects by the use of narrowbanded filters. In contrast, for range finding a short coherence length .LAMBDA. is desired, since half the coherence length defines the range resolution. A short coherence length implies broadband illumination because of the reciprocal relationship .LAMBDA..about.c/.beta., where c is the speed of the waves. Thus, illumination optimized for conventional velocimetry is very different from that optimized for range finding.
For example, monochromatic laser illumination is conventionally used for optical velocimetry, whereas broadband and incoherent light such as white light is used for rangefinding, which in optics is called optical coherence tomography. Pulse Doppler radars are used for velocimetry having monochromatic waves enveloped into .about.1 .mu.s pulses. The range resolution of these is limited by the .about.300 meter pulse envelope length. In contrast, range finding or mapping radars use illumination having a much shorter coherence length. This is often achieved by increasing the bandwidth of the waveform through frequency modulation or the repetitive use of a coded pulse to simulate randomness.
A theoretical optimum waveform for many range finding applications is wideband and incoherent, analogous to white light generated by incandescence. For radar and sonar this could be generated by an electronic noise source. A truly incoherent waveform is random and therefore never repeats. This is an advantage because any speckle or temporary coherences in the echolocation target image is blurred away, improving the observation of detail. Incoherent illumination will not suffer the interference effect between the transmitted beam and parasitic reflections from the Earth, thus minimizing the lobed characteristics of antennas in the altitude direction. A further advantage of incoherent illumination over a short pulse or frequency modulated pulse having the same coherence length is that a random waveform can be arbitrarily long without repetition. That is, its time-bandwidth product can be arbitrarily large. The longer pulse carries correspondingly more energy to the target, which increases the maximum range of detection.
An important desirable trait of echolocation systems is the ability to measure velocity and range simultaneously to high resolution. In radar, the velocity resolution is used to separate moving targets from ground clutter. Once detected, the range and if possible, the size of the target is desired to be known. In medical ultrasound, the motion of the blood can distinguish blood vessels from surrounding tissues. A map of the vessels having high spatial resolution and color coded by velocity is the goal of these devices.
Measuring the velocity and range simultaneously to high resolution is possible by measuring the range to high resolution at two different, but well defined times and finding the rate of change. This is accomplished in some radars using short coherence waves and by cross correlating the reflected and transmitted signals. A disadvantage with a cross-correlation is that distortions in the waves suffered anywhere between the transmitter and receiver can broaden the cross-correlation peak, and hence can blur the velocity determination. Such distortions could include distortions in the final stages of the transmitting amplifier, the effect of propagation through the atmosphere, the target albedo spectrum such as resonances, and reverberations from previous pings.
A different method for determining velocity is the autocorrelation. This is a comparison of the received signal with itself delayed by a time .tau..sub.2. For those waveforms which produce an autocorrelation peak, the peak shifts with velocity v by an amount .DELTA..tau..sub.2 =2.tau..sub.2 v/c. The advantage of the autocorrelation is that it will not broaden by slowly varying distortions, which includes many practical distortions. Thus the autocorrelation will give an accurate velocity under distortions that would cause a cross-correlation to blur.
The problem is that autocorrelations cannot be used with the most desirable illumination, perfectly random and ever changing waveforms, because these waveforms are by definition incoherent over all delay scales. The method of the present invention is a solution to this problem. In addition to velocimetry using incoherent illumination, the invention is capable of measuring range and velocity simultaneously to high resolution, providing a way to discriminate moving targets from background clutter.

Noise pair velocity and range echo location system

The Regents of the University of California


In an electric motor, a plurality of magnet shells (4, 6) arranged on a rotor (2) is preloaded against the core (8) by springs (11, 13) which engage in a core (8) of the rotor (2). The springs (11, 13) have a shape which corresponds to the magnet shells (4, 6). The magnet shells (4, 6) are thereby secured reliably by form fitting on the rotor (2). This also makes the electric motor particularly favorable in terms of cost.

The invention relates to an electric motor with a rotor which has a plurality of individual, mutually separate, permanent-magnetic magnet shells, with a stator having coils arranged concentrically around the rotor, and with a retention element for preloading the magnet shells against a core of the rotor.
Such electric motors are frequently referred to as internal-rotor motors and are known in the industry. The retention element of the electric motor known in the industry is designed as a thin-walled sleeve manufactured from a non-magnetic material. Since permanent magnets are generally produced from a low-cost and brittle material, the magnet shells have only a low inherent strength and tend to crack. The sleeve prevents the magnets from being destroyed during transportation or operation and coming away completely or partially from the rotor due to centrifugal forces in operation. A magnetic short circuit between the magnets is prevented by the non-magnetic configuration of the sleeve. Since the coils are arranged on the stator, this electric motor does not need any fault-prone carbon brushes to transmit electrical energy to the coils.
One disadvantage with the known electric motor is that, despite narrow tolerances of the sleeve and of the core of the rotor, the magnet shells can be displaced. In the worst case, two magnet shells come into contact as a result and form a magnetic short circuit. This leads to a sharp reduction in the power of the electric motor. The magnet shells are therefore frequently bonded adhesively to the core of the rotor and the sleeve. Due to this configuration, the electric motor requires involved and very costly assembly to ensure reliable attachment of the magnet shells to the rotor.
The object on which the invention is based is to configure an electric motor of the type stated at the outset in such a way that the magnets are held in a particularly reliable manner on the rotor and that it can be produced at as reasonable a cost as possible.
According to the invention, this problem is solved by virtue of the fact that the retention element has a plurality of springs which engage in the core of the rotor and are intended to preload the magnet shells against the core, and that the springs and/or the core have a shape which corresponds in the axial and radial direction to the magnet shells.
By virtue of this configuration, the magnets are secured reliably on the rotor by form-fitting after the installation of the springs. The shape of the springs or of the core of the rotor can be made to correspond to that of the magnet shells in the axial and radial directions if, for example, the springs are made to fit round the magnet shells in a clip-like manner or by providing a hollow in the core to accommodate the magnet shells. The invention ensures that the magnet shells are secured in a highly reliable manner without being bonded adhesively to the rotor. As a result, the electric motor according to the invention can be produced at particularly reasonable cost.
According to an advantageous development of the invention, the springs are held reliably on the core of the rotor after the assembly of the electric motor if the core of the rotor has, parallel to its axis of rotation, grooves with undercuts to accept hooks of the springs.
According to another advantageous development of the invention, two adjacent springs hold each other in their envisaged position on the rotor if respective pairs of contiguous hooks of two springs are arranged in a common groove.
If the number of magnet shells is large, the springs could each preload a plurality of magnet shells against the core of the rotor. In the extreme case, a single spring fitting round the entire rotor can be sufficient to preload all the magnet shells. According to another advantageous development of the invention, however, the magnet shells are held in a particularly reliable manner in their envisaged position if each of the magnet shells is assigned a single spring.
The springs of two adjacent magnet shells could, for example, be manufactured from a material of good magnetic conductivity and be spaced apart to avoid a magnetic short circuit in their adjoining regions. A magnetic short circuit would lead to impairment of the power of the electric motor. However, the springs can touch one another without the risk of a magnetic short circuit if they are manufactured from a material of poor magnetic conductivity. This allows the springs to be supported on one another, making the rotor particularly sturdy.
According to another advantageous development of the invention, the core of the rotor has a particularly low weight if the core of the rotor is manufactured from ferromagnetic sintered metal. The low weight of the core gives the rotor a low inertia. Moreover, this allows the core to be configured in almost any desired manner at a reasonable cost and, for example, to be provided with recesses in its ends to further reduce its weight.
According to another advantageous development of the invention, the corresponding shape of the springs to the magnet shells can be produced in a simple manner if the springs are longer than the magnet shells and if the springs have projections which correspond in shape to the magnet shells.
It helps to simplify the assembly of the electric motor according to the invention if the projections are of lug-shaped configuration. In this case, the lug-shaped projections can serve as a stop. As an alternative, it is also possible for the lug-shaped projections to swivel from a position in which they release the magnet shells into a position in which they engage behind them.
According to another advantageous development of the invention, the projections can be produced in a very simple manner after their mounting on the rotor if the projections are designed as flanges.
The mounting of the magnet shells in their envisaged position is particularly simple if, in the regions of the springs in which they adjoin the hooks, the springs have a bow bent transversely to the axis of rotation of the rotor and a flattened ramp adjoining the latter. In this arrangement, the shaping of the bow means that it has spring properties for preloading the magnet shells. This also makes the electric motor according to the invention suitable for use in a liquid medium because of the favorable shape of the rotor in terms of flow.


A system and method for storing and selecting animal carcasses within a cooler. A storage area has at least one storage loop forming a continuous loop upon which carcasses may circulate. A feed rail leads to the storage area. A loop entry rail branches from the feed rail onto each storage loop. A removal rail intersects each storage loop and leads to an exit rail. Each carcass may have an identification tag. Readers read the tag and a processor and database store and process information associated with the tag. Carcasses enter the storage area via the feed rail and are routed onto the loop entry rail of the storage loop having the greatest available capacity. When carcasses meeting specific criteria are desired, the database is searched and the processor causes the appropriate carcasses to circulate to the removal rails. The carcasses exit the storage loops onto the removal rails.

During commercial meat production in an animal processing facility, a carcass is typically subjected to a number of different procedures. An animal is first stunned and bled and the hide is removed from the resulting carcass. Throughout this specification, the term "carcass" will be used to refer to the animal body or portion of an animal body after the animal is stunned and bled. Electrical stimulation may be used to facilitate bleeding. The carcass is then prewashed and may be subjected to an electrical stimulation process. The full animal carcass is typically split into sides (i.e., two approximately equal halves) depending on its species, size, and the intended purpose for the carcass. The carcass is subjected to steam pasteurization, typically after being split. The carcass is then inspected, weighed and washed. These processes typically take place in an area of the animal processing facility called the kill floor 2 (see FIG. 1). After these processes have taken place, the carcass is sent to a cooler 4 to be chilled, sorted, and stored until being sent to the fabrication area 6 for further processing. The carcass may be subjected to additional electrical stimulation before being sent to the cooler.
As shown in FIG. 2, during the processing of the carcass 8, the carcass is attached to a trolley 10, gambrel or shackle (hereinafter referred to as a "trolley") at an early point along the meat processing line. Typically, the rail 16 runs from the kill floor 2 through the cooler 4 to the fabrication area 6. The carcass 8, which is attached to the trolley 10, may thus be moved along the rail 16 to different areas within the animal processing facility.
As shown in FIG. 1, the cooler 4 typically includes an entry 25, a regrade/test area 30, a storage area 35, a staging area 40, and an exit 45. Carcasses travel on a feed rail 50 from the kill floor 2 through the entry 25 and into the regrade/test area 30 of the cooler 4. In the regrade/test area 30, the feed rail 50 branches into parallel rails, one rail serving as an E-coli test rail 55, another rail serving as a regrade rail 60, and the third rail serving as the continuation of the feed rail 50. The E-coli test rail 55 and the regrade rail 60 rejoin the feed rail 50 before leaving the regrade/test area 30. Multiple rails have been used for these purposes.
Carcasses exit the regrade/test area 30 and enter the storage area 35 via the feed rail 50. The feed rail 50 branches off into numerous parallel storage rails 65 once the feed rail 50 reaches the storage area 35 (see FIG. 1). The parallel storage rails 65 allow the carcasses to be sorted according to various criteria such as, for example, weight, rib eye area, projected meat yield, grade, marbling score, and projected subprimal weight. For example, all 800 pound carcasses could be sorted onto the first storage rail 65 while all 900 and 1000 pound carcasses could be sorted onto the second and third storage rails 65, respectively. Carcasses leave their respective storage rails 65 in a first in, first out (FIFO) basis.
While parallel storage rails 65 allow sorting of carcasses according to various criteria, they present two drawbacks. First, using parallel storage rails 65 results in an inflexible system because each carcass on the storage rail 65 may only exit the storage rail 65 according to a FIFO basis. Thus, selection for processing of specific individual carcasses off of a storage rail 65 is difficult.
Second, use of parallel storage rails 65 results in inefficient utilization of the storage area 35. For example, the storage area 35 may have five storage rails 65, each storage rail 65 being dedicated to one of classes A through E (these classes are used for example only and are not intended to represent any true class) and each storage rail 65 having a storage capacity of 100 carcasses. During a typical processing period, 20 class A carcasses may be waiting to enter the storage area 35. However, the storage area 35 may already contain 100 class A carcasses, 55 class B carcasses, 20 class C carcasses, 85 class D carcasses and 40 class E carcasses. Thus, although the storage space of the storage area 35 is only 60 percent utilized, the 20 class A carcasses cannot enter the storage area 35 because the class A carcass storage rail 65 is already at capacity.
There is a need in the art for a system and method for transporting, storing and selecting carcasses that allow for the efficient utilization of the storage area. There is also a need in the art for a system and method for transporting, storing and selecting carcasses within a storage area that facilitate flexibility in selecting for processing any individual carcass.

Chill cooler storage and selection system


The board-to-board connector comprises an insulating housing and a plurality of terminals. The terminals are mounted in corresponding terminal-receiving passages which are arranged in the insulating housing. The insulating housing has a base plate. A pair of first sidewalls protrudes upwards from the opposite longwise sides of the base plate. A pair of second sidewalls protrudes upwards from another opposite sides of the base plate. The central island portion keeps a certain distance to the first sidewalls and the second sidewalls, thus a periphery-receiving place is formed between the central island portion and sidewalls. Fixing parts are formed on the inside wall of the first sidewall exposed in the periphery-receiving place.

1. Field of the Invention
The present invention relates to a board-to-board connector, and particularly, to a board-to-board connector with an improved locking mechanism for firming up a plug.
2. The Related Art
A variety of electronic connectors have been used to make electrical connections between the circuits on different printed circuit boards. These printed circuit boards must be joined together with connectors in a manner to effectively and reliably interconnect the circuits on one printed circuit board to the circuits of another printed circuit board, in order to establish signal communication or power connection.
U.S. Pat. No. 5,876,217, issued Mar. 2, 1999, the disclosure which is hereby incorporated by reference in its entirety, discloses a connector system and method for connecting cooperating printed circuit boards and transferring high frequency radio frequency signals between the printed circuit boards. The connector assembly includes opposing plug and receptacle connector housings, each containing conductive terminals. The terminals of one of the connector housings, preferably the plug connector housing include body portion with separate contact and locking portions extending upwardly therefore and spaced apart from each other define a nest there between. The nest receives a portion of the other connector engage opposing sides of the other connector-housing portion. The contact portions fictionally engage the other connector-housing terminal while the locking portions positively engage recesses formed in the other connector housing.
When the connector mated, as designed above, the receptacle lacks for corresponding fixing portion to firm up the plug, thus the plug will not be firmed effectively when the plug inserted into the receptacle, and then the conductive terminals of the plug will not achieve reliable electronic contact with corresponding receptacle.


A process is provided for cracking hydrocarbon feedstock containing resid comprising: heating the feedstock, mixing the heated feedstock with a fluid and/or a primary dilution steam stream to form a mixture, optionally further heating the mixture, flashing the mixture within a flash/separation vessel to form a vapor phase and a liquid phase, partially condensing the vapor phase by contacting with a condenser within the vessel, to condense at least some coke precursors within the vapor while providing condensates which add to the liquid phase, removing the vapor phase of reduced coke precursors content as overhead and the liquid phase as bottoms, heating the vapor phase, cracking the vapor phase in a radiant section of a pyrolysis furnace to produce an effluent comprising olefins, and quenching the effluent and recovering cracked product therefrom. An apparatus for carrying out the process is also provided.

Steam cracking, also referred to as pyrolysis, has long been used to crack various hydrocarbon feedstocks into olefins, preferably light olefins such as ethylene, propylene, and butenes. Conventional steam cracking utilizes a pyrolysis furnace which has two main sections: a convection section and a radiant section. The hydrocarbon feedstock typically enters the convection section of the furnace as a liquid (except for light feedstocks which enter as a vapor) wherein it is typically heated and vaporized by indirect contact with hot flue gas from the radiant section and by direct contact with steam. The vaporized feedstock and steam mixture is then introduced into the radiant section where the cracking takes place. The resulting products, including olefins, leave the pyrolysis furnace for further downstream processing, including quenching.
Pyrolysis involves heating the feedstock sufficiently to cause thermal decomposition of the larger molecules. The pyrolysis process, however, produces molecules which tend to combine to form high molecular weight materials known as tar. Tar is a high-boiling point, viscous, reactive material that can foul equipment under certain conditions. In general, feedstocks containing higher boiling materials tend to produce greater quantities of tar.
The formation of tar after the pyrolysis effluent leaves the steam cracking furnace can be minimized by rapidly reducing the temperature of the effluent exiting the pyrolysis unit to a level at which the tar-forming reactions are greatly slowed. This cooling, which may be achieved in one or more steps and using one or more methods, is referred to as quenching.
Conventional steam cracking systems have been effective for cracking high-quality feedstock which contains a large fraction of light volatile hydrocarbons, such as gas oil and naphtha. However, steam cracking economics sometimes favor cracking lower cost feedstocks containing resids such as, by way of non-limiting examples, atmospheric residue (e.g. atmospheric pipestill bottoms) and crude oil. Crude oil and atmospheric residue often contain high molecular weight, non-volatile components with boiling points in excess of 590° C. (1100° F.). The non-volatile, components of these feedstocks lay down as coke in the convection section of conventional pyrolysis furnaces. Only very low levels of non-volatile components can be tolerated in the convection section downstream of the point where the lighter components have fully vaporized.
Cracking heavier feeds, such as kerosenes and gas oils, produces large amounts of tar, which leads to rapid coking in the radiant section of the furnace as well as fouling in the transfer line exchangers preferred in lighter liquid cracking service.
Additionally, during transport, some naphthas are contaminated with heavy crude oil containing non-volatile components. Conventional pyrolysis furnaces do not have the flexibility to process residues, crudes, or many residue or crude contaminated gas oils or naphthas which are contaminated with non-volatile components.
To address coking problems, U.S. Pat. No. 3,617,493, which is incorporated herein by reference, discloses the use of an external vaporization drum for the crude oil feed and discloses the use of a first flash to remove naphtha as vapor and a second flash to remove vapors with a boiling point between 450 and 1100° F. (230 and 590° C.). The vapors are cracked in the pyrolysis furnace into olefins, and the separated liquids from the two flash tanks are removed, stripped with steam, and used as fuel.
U.S. Pat. No. 3,718,709, which is incorporated herein by reference, discloses a process to minimize coke deposition. It describes preheating of heavy feedstock inside or outside a pyrolysis furnace to vaporize about 50% of the heavy feedstock with superheated steam and the removal of the residual, separated liquid. The vaporized hydrocarbons, which contain mostly light volatile hydrocarbons, are subjected to cracking.
U.S. Pat. No. 5,190,634, which is incorporated herein by reference, discloses a process for inhibiting coke formation in a furnace by preheating the feedstock in the presence of a small, critical amount of hydrogen in the convection section. The presence of hydrogen in the convection section inhibits the polymerization reaction of the hydrocarbons thereby inhibiting coke formation.
U.S. Pat. No. 5,580,443, which is incorporated herein by reference, discloses a process wherein the feedstock is first preheated and then withdrawn from a preheater in the convection section of the pyrolysis furnace. This preheated feedstock is then mixed with a predetermined amount of steam (the dilution steam) and is then introduced into a gas-liquid separator to separate and remove a required proportion of the non-volatiles as liquid from the separator. The separated vapor from the gas-liquid separator is returned to the pyrolysis furnace for heating and cracking.
Co-pending U.S. application Ser. No. 10/188,461 filed Jul. 3, 2002, Patent Application Publication US 2004/0004022 A1, published Jan. 8, 2004, which is incorporated herein by reference, describes an advantageously controlled process to optimize the cracking of volatile hydrocarbons contained in the heavy hydrocarbon feedstocks and to reduce and avoid coking problems. It provides a method to maintain a relatively constant ratio of vapor to liquid leaving the flash by maintaining a relatively constant temperature of the stream entering the flash. More specifically, the constant temperature of the flash stream is maintained by automatically adjusting the amount of a fluid stream mixed with the heavy hydrocarbon feedstock prior to the flash. The fluid can be water.
Co-pending U.S. patent application Ser. No. 60/555,282, filed Mar. 22, 2004, which is incorporated herein by reference, describes a process for cracking heavy hydrocarbon feedstock which mixes heavy hydrocarbon feedstock with a fluid, e.g., hydrocarbon or water, to form a mixture stream which is flashed to form a vapor phase and a liquid phase, the vapor phase being subsequently cracked to provide olefins, with product effluent cooled in a transfer line exchanger, wherein the amount of fluid mixed with the feedstock is varied in accordance with a selected operating parameter of the process, e.g., temperature of the mixture stream before the mixture stream is flashed.
Co-pending U.S. patent application Ser. No. 10/851,878, filed herewith, which is incorporated herein by reference, describes a process for cracking heavy hydrocarbon feedstock which mixes heavy hydrocarbon feedstock with a fluid, e.g., hydrocarbon or water, to form a mixture stream which is flashed to form a vapor phase and a liquid phase, the vapor phase being subsequently cracked to provide olefins. Fouling downstream of the flash/separation vessel is reduced by superheating the vapor in the upper portion of the vessel. A condenser may also be utilized within the vessel to improve liquid/vapor separation.
In using a flash to separate heavy liquid hydrocarbon fractions containing resid from the lighter fractions which can be processed in the pyrolysis furnace, it is important to effect the separation so that most of the non-volatile components will be in the liquid phase. Otherwise, heavy, coke-forming non-volatile components in the vapor are carried into the furnace causing coking problems.
Increasing the cut in the flash drum, or the fraction of the hydrocarbon that vaporizes, is also extremely desirable because resid-containing liquid hydrocarbon fractions generally have a low value, often less than heavy fuel oil. Vaporizing some of the heavier fractions produces more valuable steam cracker feed. Although this can be accomplished by increasing the flash drum temperature to increase the cut, the resulting heavier fractions thus vaporized tend to condense once the overhead vapor phase leaves the flash drum, resulting in fouling of the lines and vessels downstream of the flash drum overhead outlet.
Accordingly, it would be desirable to provide a process for treating vapor phase materials within a flash drum to remove components which are susceptible to condensing downstream of the drum overheads outlet.

This patent is subject to a terminal disclaimer.

Cracking hydrocarbon feedstock containing resid utilizing partial condensation of vapor phase from vapor/liquid separation to mitigate fouling in a flash/separation vessel


The watermark insertion section divides the quantized DCT coefficients into at least two data streams, and modifies values of AC components of the data streams, so as to embed the watermark information in each block of the image information with the DCT coefficients quantized. The modification is performed as follows. The sum of a plurality of data of each data stream (or the sum of a plurality of data of a prescribed portion of each data stream) is divided by 2. Then, a value of an AC component of each data stream is modified such that the value of each remainder (the value of the LSB) has a prescribed relationship with (for example, is equal to) the value of the watermark information. Specifically, the value of the first non-zero AC component, from the trailing end of each data stream, is processed by addition of 1 or subtraction of 1.

1. Field of the Invention
The present invention relates to an image processing apparatus, an image processing system, and an image processing method for embedding watermark information and/or detecting embedded watermark information in order to, for example, authenticate an original image; a control program for allowing a computer to execute the embedding and/or detection processing; a computer-readable recording medium having the control program stored thereon; and an electronic information apparatus using the same, for example, a digital camera.
2. Description of the Related Art
The above-mentioned type of image processing apparatus recognizes whether an image is an original image or not by embedding digital watermark information (hereinafter, also referred to simply as "watermark information"), which does not have any direct influence on the image, and then detecting the embedded watermark information. There are two types of watermark information, i.e., strong watermark information and weak watermark information. Strong watermark information is not erased even when the image data in which the watermark information is embedded is changed, and thus is used for, for example, copyright protection. Strong watermark information, when verified, can be used to assert copyright of an original image. Weak watermark information is erased when the image data in which the watermark information is embedded is changed, and thus is used for authentication of an original image. Herein, the term "digital watermark information" or "watermark information" refers to weak watermark information.
M. Yeung and F. Mintzer proposed a principle of weak watermark technology in "An Invisible Watermarking Technique for Image Verification", Proceedings of ICIP, Santa Barbara, Calif., Oct. 26-29, 1997, Vol. 2, pp. 680-683". FIGS. 11 and 12 show technology for embedding and detecting watermark information proposed in the above-mentioned publication (hereinafter, referred to as "conventional technology 1").
FIG. 11 is a functional diagram illustrating a procedure performed by a conventional watermark information embedding apparatus 100 used in conventional technology 1. The watermark information embedding apparatus 100 embeds watermark image information (watermark information) in original image information, so as to obtain watermarked image information. This will be described in more detail.
For an original image and a binary watermark image having the same size as that of the original image, a watermark extraction function is obtained. The original image is processed by calculations defined by the extraction function on a pixel-by-pixel basis. A look-up table LUT is used as a random number table 101 which uses a random number as a key. The look-up table LUT receives, for example, an 8-bit input for a gray-scale image, and provides a 2-bit ("1" or "0") output, on a pixel-by-pixel basis. The result of the calculation performed on the original image is input to the look-up table LUT and binarized. The binary value thus obtained is compared with a binary value obtained from the watermark information to be embedded in the original image by a comparison section 102. When the two binary values match each other, the pixel value of the original image (the 8-bit gray-scale value) is kept as it is. When the two binary values do not match each other, the pixel value of the original image is repeatedly adjusted by a pixel value adjusting section 103 until the two binary values match each other. Thus, a watermarked image is created.
FIG. 12 is a functional diagram illustrating a procedure performed by a conventional watermark information detection apparatus 110 used in conventional technology 1. Referring to FIG. 12, the watermark information detection apparatus 110 includes a random number table section 111 (look-up table LUT) which is similar to the random number table section 101 described above. The random number table section 111 is used to extract watermark information (watermark image) from the watermarked image information. More particularly, the watermarked image is processed by calculations defined by the extraction function obtained at the time of embedding, and the obtained calculation result is mapped by the random number table 111. Thus, the watermark image is obtained. The resultant binary image is examined so as to check whether the original image has been changed.
P. W. Wong proposed weak watermark technology in P. W. Wong, "A Public Key Watermark for Image Verification and Authentication", Proceedings of ICIP, 1998, Chicago, pp. 455-459. FIGS. 13 and 14 show technology for embedding and detecting watermark information proposed in the above-mentioned publication (hereinafter, referred to as "conventional technology 2").
FIG. 13 is a functional block diagram illustrating a procedure performed by a conventional watermark information embedding apparatus 200 used in conventional technology 2. The watermark information embedding apparatus 200 embeds watermark image information as follows.
A gray-scale original image and a binary watermark image are each divided into blocks each having n×n pixels (for example, 8×8 pixels). "n" is a natural number. The LSB (least significant bit) of the value of each block is set to zero. Then, based on parameters such as the remaining upper bits and the image size, a hash function is created so as to generate a value reflecting the block. The first n×n bits from the bit stream of the generated value are selected. An exclusive-OR (EXOR) of the selected n×n bits and the value of the watermark information corresponding to the selected n×n bits is obtained. The calculation result is encrypted using a secret key of a public key cryptography system (for example, RSA). The calculation result is written in the LSB of the original image. Thus, the embedding of the watermark information is completed.
FIG. 14 is a functional block diagram illustrating a procedure performed by a conventional watermark information detection apparatus 210 used in conventional technology 2. Referring to FIG. 14, the watermark information extraction is performed on a block-by-block basis like the embedding of the watermark information. Using the same hash function, bits other than the LSBs of the watermark image information, the image size and other sequences are calculated, and the first n×n bits of the calculation result are selected. Then, the LSBs are translated using the public key. An exclusive-OR (EXOR) of the resultant bit stream and the selected bit stream is obtained. The resultant logical operation result is the extracted watermark image information.
Japanese Laid-Open Publication No. 2000-50048 entitled "Image Processing Device" was proposed as conventional technology 3. This image processing device includes a compression/watermark addition section. The compression/watermark addition section includes block dividing means for dividing one original image into a plurality of pixel blocks; frequency transform means for transforming digital image data of each pixel block into a frequency so as to generate frequency image data; quantization means for quantizing the frequency image data so as to generate quantized data; a bit embedding section for receiving a quantized coefficient matrix obtained from the quantized data, information to be embedded (watermark information) and key information, so as to add the watermark information to one of the quantized coefficients in the matrix which is determined by a random number based on prescribed key information; and encoding means for encoding the embedded quantized data so as to generate compressed data. The bit embedding section includes a random number sequence generation section for generating a random number sequence having the key information as an initial value, a determination section for determining one quantization coefficient to be embedded from the quantized coefficient matrix as the quantized frequency image using the generated random number sequence, and a changing section for changing the determined quantized coefficient to be embedded so as to provide an embedded quantized coefficient matrix.
The conventional weak watermark technology (conventional technology 1) of Yeung et al. uses the values generated by the look-up table LUT using random numbers. The pixel value is adjusted so as to reflect the binary value of the watermark information. This method involves a problem in that the image quality of the watermarked image may be adversely affected depending on the value generated by the look-up table LUT.
With reference to FIG. 15, the adverse effect on the watermarked image will be described. FIG. 15 does not show the extraction function for the sake of simplicity.
As shown in FIG. 15, an 8-bit input of agray-scale original image (0 through 255) received by the look-up table LUT is randomly output as "1" or "0". When this binary output matches the binary value of the watermark information, the pixel value of the original image is kept as it is. When the two binary values do not match each other, the pixel value is repeatedly adjusted until the two values match each other.
For example, it is assumed that the gray-scale input is "020" and the binary output is "1". Assuming that the value of the watermark information is "0", the two binary values do not match each other. If the next gray-scale value "021" and the binary output is "0", the image quality is not adversely affected since there is no significant difference between the gray-scale values "020" and "021". If there is no binary output "0" corresponding to the subsequent gray-scale values "021" to "101", the gray-scale value "020" needs to be adjusted to the gray-scale value "101" although these two values are significantly different from each other. Such an adjustment of a gray-scale value to a significantly different value adversely influences the image quality of the original image. Furthermore, according to conventional technology 1, the outputs corresponding to the gray-scale values 0 through 255 of the original image are merely roughly divided into "1" and "0". Even though the original image is changed within a range of the 8-bit inputs corresponding to the output "1", such a change cannot be detected since the output is still "1" despite the change in the original image.
The weak watermark technology proposed by Wong (conventional technology 2) has the following problem. Watermark information is embedded in the LSBs of a flat image in which the gray-scale values (for example, 8-bit values) of the pixels are the same, on a block-by-block basis, each block having n×n pixels. According to this method, the image data is uniform except for the watermark information. Therefore, the method in which the watermark has been embedded, the watermark information itself, and the like are likely to be revealed. This may give a clue to assist forgery of the watermark information.
Conventional technologies 1 and 2 cannot be used for data-compressed images. Uncompressed data requires enormous storage capacity, and thus in actuality, image data is compressed in one way or another. The conventional technologies 1 and 2 are unpractical.
According to conventional technology 3, weak watermark technology is applied to data-compressed images. However, it is determined at random at which position of the quantized coefficient matrix in each divided block (for example, 8×8 pixels) the watermark information is to be embedded. Therefore, when the original data is changed at positions other than the position having the watermark information embedded therein, such a change cannot be detected. In addition, in the case where the watermark information is embedded the position of a DC component, which influences the image quality, instead of the position of an AC component, such a change may influence the image quality.

Image processing apparatus, image processing system, electronic information apparatus, image processing method, control program, and computer-readable recording medium


A vehicle lamp is provided with a first unit having a first main reflector for reflecting light from a first semiconductor light emitting element to a front side, and a second unit having a second main reflector for reflecting light from a second semiconductor light emitting element to the front side. A light emitting region of the first unit and a light emitting region of the second unit are arranged to be separated from each other. An additional optical unit for receiving light irradiated from the first and the second units to irradiate to the front side is arranged between the first unit and the second unit such that a light emitting region of the additional optical unit connects the light emitting region of the first unit and the light emitting region of the second unit to be optically recognized as a single light emitting region as a whole.

1. Field of the Invention
The present invention relates to a vehicle lamp, particularly relates to a vehicle lamp for forming a predetermined light distribution pattern by overlapping light emitted from a plurality of light source units.
2. Related Art
In a vehicle lamp, there is a case in which from a view point of safety, it is necessary to form a light distribution pattern with high accuracy. The light distribution pattern is formed by an optical system using, for example, a reflecting mirror or a lens or the like.
Further, there is also proposed a vehicle lamp for forming a predetermined light distribution pattern by overlapping light emitted from a plurality of light source units (refer to, for example, JP-B2-3187755).
According to the conventional vehicle lamp shown in FIG. 8 and FIG. 9, a front face opening portion of a lamp body 210 in a shape of a vertically long vessel opened from a front side in a skewed side direction is integrated with a transparent front face cover 211 a side face side of which is bent to a rear side to form a lamp chamber bent from a front face side in a side direction. Inside of the lamp chamber is aligned with a reflecting type lamp unit 220 for forming a high beam and a low beam, and a projecting type fog lamp unit 240 in an up and down direction.
The lamp unit 220 is constituted by a synthetic resin made reflector 222 in a shape of a paraboloid subjected to an aluminum vapor deposition process, and a bulb 230 constituting a light source insertingly attached to be fixed to a bulb inserting hole 223 formed at a rear top portion of the reflector 222.
The bulb 230 is constituted by a structure of integrating a bulb main body 236 integrally containing a filament 236a for a high beam and a filament 236b for a low beam to a bulb socket 232 made of a synthetic resin.
The lamp unit 240 is constituted by a reflector 242 substantially in a shape of an ellipsoid made by aluminum diecast subjected to an aluminum vapor deposition process having an aperture smaller than that of the reflector 222 of the lamp unit 220, a bulb 250 constituting a light source inserted to be attached to a bulb inserting hole 243 of the reflector 242, and a projecting convex lens 248 in a circular shape in a front view integrated to a front face opening portion of the reflector 242 by way of a circular cylinder type lens holder 246 made by aluminum diecast.
The bulb 250 is constituted by a structure of integrating a bulb main body 256 containing a filament 256a to a bulb socket 252 made of a synthetic resin.
An extension reflector 218 provided from the front face opening portion of the lamp body 210 along an inner side of the front face cover 211 is formed with circular opening portions 218a, 218b respectively in correspondence with the reflector 222 of the lamp unit 220 and the projecting convex lens 248 of the lamp unit 240. A surface side of the extension reflector 218 is subjected to an aluminum vapor deposition process similar to that of the reflectors 222, 242 to operate to conceal peripheral edge portions of the lamp units 220, 240 and make an outlook of the head lamp excellent by showing a total of the lamp chamber by a single mirror face color.
However, according to the vehicle lamp described in JP-B2-3187755, there is a portion B (portion surrounded by two-dotted chain line in FIG. 8) which does not constitute illumination between the lamp units 220, 240 and therefore, a walker or the like recognizes the lamp units 220, 240 as individually separated light emitting portions.
Therefore, according to the vehicle lamp forming a predetermined light distribution pattern by overlapping light emitted from the lamp units 220, 240 constituting the plurality of light source units, there is a possibility of deteriorating an optical recognizability as a total of the lamp piece.