A sample support member for atomic force microscopy of intermolecular interactions includes a sample support base having a plurality of protrusions, each protrusion having an apical substrate region or tip that has been chemically modified by the immobilization thereon of a sample compound or of a linking compound that is capable of binding a sample compound. A reference compound support member has a surface region having at least one reference compound immobilized thereon.. The relative position and orientation of the reference compound support member and the substrate support member are controlled to select a particular protrusion and to cause an interaction between a reference compound immobilized on the surface region of the free end of the cantilever and the sample compound immobilized on the apical substrate area of the selected protrusion. A physical parameter associated with the interaction between the reference compound and the sample compound can be measured.

1. Field of the Invention
The present invention relates generally to atomic force microscopy (AFM) and to apparatus and methods for measuring intermolecular interactions such as receptor/ligand, antibody/antigen and DNA interactions efficiently by atomic force microscopy.
2. Description of the Related Art
In conventional atomic force microscopy, a sample is scanned with a fine-tipped probe mounted on a cantilever, and deflections of the probe tip as it passes across the sample are measured to determine the topography of the sample. Deflections in the probe tip as it passes along the sample surface may be monitored by various methods, including optical reflection, interferometry, and piezoelectric strain gauge methods. See, for example, U.S. Pat. No. Re. 33,387 to Binnig, U.S. Pat. No. 5,144,833 to Amer et al, U.S. Pat. No. 5,463,897 to Prater et al, U.S. Pat. No. Re. 34,489 to Hansma et al and U.S. Pat. No. 5,260,824 to Okada et al, all of the above incorporated herein by reference.
In recent years, atomic force microscopy has been used to measure interfacial properties and intermolecular interactions such as elasticity, friction, adhesion, receptor/ligand interactions, and antibody/antigen interactions between individual molecules. To measure binding interactions between complimentary ligands and receptors, the probe tip of a cantilever and a sample surface may be chemically modified by various means to attach the complementary ligands and receptors to each. (For convenience, the compound or compounds immobilized on the cantilever or similar structures will be referred to herein as "reference" compounds and the compound or compounds immobilized on the sample support member or sample surface will be referred to herein as "sample" compounds.) The probe tip and sample surface may then be brought into proximity or into contact so that a ligand and a receptor interact or bond. When the probe tip and sample surface are then separated, the ligand-receptor bond breaks and the strength of the interaction force between the ligand and the receptor may be measured. The use of atomic force microscopy to study intermolecular forces is described, for example, in the following patents and publications, incorporated herein by reference: U.S. Pat. No. 5,363,697 to Nakagawa; U.S. Pat. No. 5,372,930 to Colton et al; Florin E.-L. et al, "Adhesion Forces Between Individual Ligand-Receptor Pairs" Science 264 (1994). pp 415-417; Lee, G.U et al, "Sensing Discrete Streptavidin-Biotin Interactions with Atomic Force Microscopy" Langmuir, vol. 10(2), (1994) pp 354-357; Dammer U. et al "Specific Antigen/Antibody Interactions Measured by Force Microscopy" Biophysical Journal Vol. 70 (May 1996) pp 2437-2441; Chilikoti A. et al, "The Relationship Between Ligand-Binding Thermodynamics and Protein-Ligand Interaction Forces Measured by Atomic Force Microscopy" Biophysical Journal Vol. 69 (November 1995) pp 2125-2130; Allen S. et al, "Detection of Antigen-Antibody Binding Events with the Atomic Force Microscope" Biochemistry, Vol. 36, No. 24 (1997) pp 7457-7463; and Moy V.T. et al, "Adhesive Forces Between Ligand and Receptor Measured by AFM" Colloids and Surfaces A: Physicochemical and Engineering Aspects 93 (1994) pp 343-348. If interactions between molecules are studied in liquids, the experimental conditions, such as pH, buffer/ionic concentration, buffer/ionic species, etc. may be varied to determine the effect that these have on the forces of interaction.
Atomic force microscopy has great potential for use in screening arrays of compounds, such as libraries of compounds produced by combinatorial methods, to identify useful ligand/receptor interactions and to discover useful drugs. Modem methods of combinatorial chemistry, parallel synthesis, and microlithography make it possible to produce large, compact libraries of chemical analogues in spatially addressable arrays. Atomic force microscopy with chemically modified probe tips provides a way of screening these arrays. However, the equipment and techniques currently used for atomic force microscopy are not well suited for repetitive measurements or efficient high-volume screening. In particular, chemically modified cantilever probe tips are fragile and easily damaged or inactivated. In a typical chemically modified cantilever probe tip, only the molecules that are bound to the very apex of the tip are available for force interactions with a substrate. The crucial area of the probe tip is typically very small and the number of molecules bound thereon is very few; if anything happens to damage those few molecules or to block access to, or to otherwise inactivate that small area of the probe tip, then the probe tip is rendered useless and must be replaced. Replacing the probe tip usually requires replacing the entire cantilever, a procedure that is expensive and time-consuming. Moreover, the typical cantilever probe tip has room for only one reference compound to be immobilized on the tip, so the cantilever must be replaced or modified whenever it is desired to use a different reference compound.

Apparatus and method for measuring intermolecular interactions by atomic force microscopy

The United States of America as represented by the Secretary of the Navy


The present invention provides a compound of formula I, in which R1, R2, X and R3 are defined in the Summary of the Invention, or a pharmaceutically acceptable salt thereof;

Coordinated cardiac contractility is governed by electrical changes that occur in cardiomyocytes. The cardiac impulse or action potential is determined by successive opening and closing of membrane ion channels that regulate the depolarizing (mainly Na+ and Ca++) and repolarizing (mainly K+) currents (Nerbonne and Kass, 2005). Genetic defects resulting in the malfunctioning of these channels and the associated ionic currents can lead to cardiac rhythm disorders generally described as cardiac channelopathies (Webster and Berul, 2013). Inherited mutations in cardiac ion channels resulting in gain or loss of channel function can alter the atrial and ventricular action potential and cause various cardiac arrhythmia syndromes, including long QT syndrome (LQTS), short QT syndrome, Brugada syndrome, and familial atrial fibrillation (Giudicessi and Ackerman, 2012). Prolongation of QT interval caused by abnormal cardiac repolarization is associated with an increased risk of life-threatening tachyarrhythmia. Presently 16 genes associated with LQTS have been identified with differing signs and symptoms, depending on the locus involved. The majority of cases have mutations in the KCNQ1 (LQT1), KCNH2 (LQT2) and SCN5A (LQT3) genes (Schwartz et al. 2013).
Cardiac repolarization is primarily mediated by the slow delayed rectifier current, IKs (KCNQ1) and the rapid delayed rectifier current IKr (KCNH2) conducted by the hERG channels (Sanguinetti and Tristani-Firouzi, 2006). Impairment or loss of K+ channel function delays cardiac repolarization, leads to excessive prolongation of the action potential duration and associated QT interval in the electrocardiogram and predisposes affected individuals to high risk of developing torsades de pointes arrhythmia and sudden cardiac death (Ravens and Cerbai, 2008). Jervell and Lange-Nielsen syndrome (JLN) is a rare cause of LQTS characterized by deafness, severe QT prolongation and lethal arrhythmias (Crotti et al. 2008). Most patients die of this disorder as children before age 10 despite aggressive therapy including behavior modification, beta blockers, defibrillators and sympathectomy. This syndrome is caused by homozygous or compound heterozygous mutations in genes KCNQ1 and KCNE1 that are responsible for the delayed rectifier repolarizing current IKs (Crotti et al. 2008). Acquired LQTS is often observed in the setting of structural or functional cardiac disease such as ischemic or diabetic cardiomyopathy. The altered substrate in coronary disease (ischemia or scar) may lower the threshold for afterdepolarization. Thus, subclinical IKs dysfunction with associated reduction in repolarization reserve may be exacerbated in these conditions.
hERG channel activators described in the literature include NS1643, NS3623, RPR260243, PD-118057, PD307243, ICA105574, A935142 and KB130015 (Zhou et al., 2011). These compounds act by altering channel activation, inactivation or deactivation (Perry et al. 2010). Pharmacological activation of hERG K+ channels is anticipated to normalize the QT interval, functionally mitigate the arrhythmic substrate and consequently reduce cardiac arrhythmia in patients with inherited or acquired LQTS. This approach is likely to be effective in LQTS resulting from mutations in genes other than KCNQ1 since it targets the alteration in QT per se and not specific genetic defects. hERG channel activators may also function as general antiarrhythmics since they reportedly reduce electrical heterogeneity in the myocardium and thereby reduce the possibility of re-entry (Grunnet et al. 2008). Thus, the current invention relates to hERG activators useful as pharmaceuticals for the treatment of genetic or acquired long QT syndromes and as a novel class of agents for the treatment of arrhythmias of other etiologies.    1. Nerbonne J M, Kass R S. Molecular physiology of cardiac repolarization. Physiol Rev. 2005; 85:1205-53.    2. Webster G, Berul C I. An update on channelopathies: from mechanisms to management. Circulation. 2013; 127:126-40.    3. Giudicessi, J. R. & Ackerman, M. J. Potassium-channel mutations and cardiac arrhythmias—diagnosis and therapy. Nat Rev Cardiol. 2012; 9:319-32.    4. Schwartz P J, Ackerman M J, George A L Jr, Wilde A A. Impact of Genetics on the Clinical Management of Channelopathies. J Am Coll Cardiol. 2013 May 15 (Epub ahead of print)    5. Sanguinetti M C, Tristani-Firouzi M. hERG potassium channels and cardiac arrhythmia. Nature. 2006; 440:463-9.    6. Ravens U, Cerbai E. Role of potassium currents in cardiac arrhythmias. Europace. 2008; 10:1133-7.    7. Crotti L, Celano G, Dagradi F, Schwartz P J. Congenital long QT syndrome. Orphanet J Rare Dis. 2008; 3:18.    8. Zhou P Z, Babcock J, Liu L Q, Li M, Gao Z B. Activation of human ether-a-go-go related gene (hERG) potassium channels by small molecules. Acta Pharmacol Sin. 2011; 32:781-8.    9. Perry M, Sanguinetti M, Mitcheson J. Revealing the structural basis of action of hERG potassium channel activators and blockers. J Physiol. 2010; 588(Pt 17):3157-67.    10. Grunnet M, Hansen R S, Olesen S P. hERG1 channel activators: a new anti-arrhythmic principle. Prog Biophys Mol Biol. 2008; 98:347-62.

Abstract: a method for manufacturing the compounds of the invention, and its therapeutic uses. The present invention further provides a combination of pharmacologically active agents and a pharmaceutical composition.


An imaging system 2 is provided comprising a primary gradient coil assembly 52 and a shield coil assembly 42. The shield coil assembly 42 is connected in series to the primary gradient coil assembly 52. The shield coil assembly 42 comprises a first gradient shield coil 82 and a second gradient shield coil 84. The second gradient shield coil 84 is connected in parallel to said first gradient shield coil 82.

The present invention relates generally to Magnetic Resonance Imaging (MRI) systems, and more particularly, to a method and system for shielding a gradient coil for use in a MRI system.
Magnetic Resonance Imaging (MRI) is a well-known medical procedure for obtaining detailed, one, two and three-dimensional images of patients, using the methodology of nuclear magnetic resonance (NMR). MRI is well suited to the visualization of soft tissues and is primarily used for diagnosing disease pathologies and internal injuries.
Typical MRI systems include a superconducting magnet capable of producing a strong, homogenous magnetic field around a patient or portion of the patient; a radio frequency (RF) transmitter and receiver system, including transmitter and receiver coils, also surrounding or impinging upon a portion of the patient; a gradient coil system also surrounding a portion of the patient; and a computer processing/imaging system, receiving the signals from the receiver coil and processing the signals into interpretable data, such as visual images.
The superconducting magnet is used in conjunction with a gradient coil assembly, which is temporally pulsed to generate a sequence of controlled gradients in the main magnetic field during a MRI data gathering sequence. Inasmuch as the main superconducting magnet produces a homogeneous field, no spatial property varies from location to location within the space bathed by such field; therefore, no spatial information, particularly pertaining to an image, can be extracted therefrom, save by introduction of ancillary means for causing spatial (and temporal) variations in the field strength. This function is fulfilled by the above-mentioned gradient coil assembly; and it is by this means of manipulating the gradient fields that spatial information is typically encoded.
The gradient coil assembly produces undesirable magnetic fields outside the assembly; as well a required fields within the gradient bore. These fringe fields produce eddy currents to be formed within the magnetic structures leading to degradation in image quality.
In order to limit the effects of fringe fields generated by gradient coil assemblies, it is known that shield coils may be used in combination with the primary coils in order to cancel the magnetic field outside of the gradient coil. In this fashion the presence, and thereby the effects, of fringe fields can be reduced. Cylindrical gradient coils, however, with a large radial distance between primary and shield coils require a low current density on the shield coil to provide good cancellation of the magnetic field outside the gradient coil. The "ideal" current density needs to be approximated by physical coil winding in the gradient assembly. These approximations can be inaccurate in the situation where individual windings have a large number of Ampere-Turns relative to the peak Ampere-Turns of the shield coil. Gradient coils in this scenario often result in poor fringe field performance and often have negative effects on image quality.
It would, therefore, be highly desirable to have a gradient coil assembly with improved shield coil performance such that the effects of fringe field degradation may be minimized. It would additionally be highly desirable to have a shield coil assembly with improved winding arrangement for reduction of fringe field degradation.

Split-shield gradient coil with improved fringe-field


A magneto-optic memory device, such as a magneto-optic disk or magneto-optic card having a pair of opposed substrates at least one of which is transparent. Between the substrates is a magneto-optic memory layer made of a stack of dielectric film, a rear earth-transition metal alloy thin film, a dielectric film and a light reflecting film built on the surface of the transparent substrate opposed to the other substrate. An adhesive layer covers the memory layer and bonds the transparent substrate to the other substrate. Lastly, a metal nitride film interposed between the light reflecting film of the memory layer and the adhesive layer.

1. Field of the Invention
The present invention relates to magneto-optic memory devices, and more particularly to magneto-optic memory devices, such as magneto-optic discs and magneto-optic cards, which are adapted to record data thereon and reproduce or erase the data therefrom when exposed, for example, to a laser beam.
2. Description of the Prior Art
Active research has been conducted in recent years for the development of magneto-optic memory device such as optical memory devices adapted for recording, reproducing and erasing data. Especially attention has been directed to devices wherein a rare earth-transition metal alloy thin film is used as the memory medium because the recording bits are free of the influence of the grain boundary and further because the film serving as the memory medium can be formed over a large area relatively easily. However, the magneto-optic memory devices incorporating the rare earth-transition metal alloy thin film as the memory medium generally fail to exhibit satisfactory magneto-optic effects (Kerr effect and Faraday effect) and therefore remain to be improved in the S/N ratio of reproduction signals. To overcome this problem, the so-called reflective film structure is employed for magneto-optic memory devices as already disclosed, for example, in Unexamined Japanese Patent Publication SHO 57-12428 and Applied Optics, Vol. 23, No. 22, p. 3472-3978.
FIG. 3 is a partial view of a vertical section showing a conventional magneto-optic memory device having a reflective film structure. With reference to the drawing, indicated at a is a transparent substrate of glass, polycarbonate resin, epoxy resin or the like, at b a transparent dielectric film having a higher refractive index than the substrate a at c a rare earth-transition metal alloy thin film, at d a transparent dielectric film, and a e a light reflecting film of metal.
With a memory device having the above construction, the rare earth-transition metal alloy film c is so thin that the light incident on the film c partly passes through the film. Consequently, reproduction light exhibits the Kerr effect due to the reflection at the surface of the film c and, in combination therewith, the Faraday effect which is produced by the portion of the light passing through the film c, reflected at the reflecting film e and passing through the film c again. This results in a Kerr rotation angle which is apparently several times as great as the angle afforded by the Kerr effect only. For example, the device shown in FIG. 3 exhibits an increased apparent Kerr rotation angle of 1.6 degrees (although a single GdTbFe film is about 0.3 degree in this angle) when the device comprises a glass substrate as the transparent substrate a, AlN film as the transparent dielectric film b, GdTbFe film as the rare earth-transition metal alloy film c, AlN film as the transparent dielectric film d and Al film as the light reflecting film e.
Nevertheless, the rare earth-transition metal alloy thin film is very susceptible to oxidation in the presence of moisture and loses the inherent magneto-optic characteristics thereof on oxidation. Especially with the device of the basic reflective film structure described above wherein the alloy film c needs to transmit light therethrough, the film is more prone to the influence of oxidation because the film must have a considerably decreased thickness and also because the film is left exposed at its end. In other words, the device has the problem of being poor in long-term reliability.
Accordingly, the device of reflective film structure described above is used usually with another substrate laminated to the reflecting film with an adhesive layer. The adhesive layer is used for covering the entire magneto-optic memory layer comprising the dielectric film b, alloy film c, dielectric film d and light reflecting film e and also for adhering the other substrate.
When the device is in this form, it is expected that the magneto-optic memory layer including the alloy film will be held out of direct contact with the atmosphere, with the alloy film protected against oxidation, so as to assure the device of reliability.
Nevertheless, the structure thus sealing off the device from the atmosphere still encounters difficulty in assuring long-term reliability.
The object of the present invention is to overcome the foregoing problem and to provide a magneto-optic memory device of reflective film structure which exhibits outstanding magneto-optic characteristics over a prolonged period of time.


Bedding covers for selectively covering an insulated bedding item. The bedding covers include a cover member, a flap member, and a cover fastener. The cover member is complementarily configured with the length and the width of the insulated bedding item. The cover member has a cover top edge having a cover width at least as wide as the width of the insulated bedding item. The flap member is coupled to the cover member along the cover top edge. The cover fastener is configured to secure the cover member to the insulated bedding item and is disposed on either the cover member or the flap member. The cover member and the flap member collectively define a flap configured to receive a portion of the insulated bedding item. The cover fastener and the flap cooperate to secure the insulated bedding item within the flap.

The present disclosure relates generally to bedding covers and bedding cover systems. In particular, bedding covers for covering insulated bedding items and bedding cover systems including a bedding cover and an insulated bedding item are described.
Bedding items, including sheets, blankets, duvets, and duvet covers, are used by people almost every day. In addition to personal use of bedding items in one's home, the hospitality industry, including resorts, hotels, and individuals renting their private property on a short term basis, makes regular use of bedding items for guests. Individuals in their own homes and guests at rented rooms expect bedding items to be clean and comfortable.
Duvets, blankets, and comforters, collectively referred to here as insulated bedding items, are popular types of bedding items. However, insulated bedding items can be a challenge to clean given their size and bulk. The challenges present with cleaning insulated bedding items lead to them not being cleaned sufficiently often, which can create unhygienic conditions.
Conventional duvet covers are designed to be removed from insulated bedding items for cleaning. While duvet covers are easier to clean than the insulated bedding items they cover, inserting and removing insulated bedding items to and from duvet covers is awkward and difficult. The difficulties that exist with using conventional duvet covers results in the duvet covers not being washed sufficiently often.
Thus, there exists a need for bedding covers and bedding cover systems that improve upon and advance the design of known duvet covers and bedding systems. Examples of new and useful bedding covers and bedding cover systems relevant to the needs existing in the field are discussed below.

Bedding covers and bedding cover systems


An electrical connector for connecting first and second conductors of a cable to first and second electrically conductive leads comprising first and second connector members with each of the connector members including a connector body and first and second conductive members carried by the connector body. Each of the conductive members has a terminal. The conductive members of the first connector member are coupled to the first and second leads, respectively and the conductive members of the second connector member can be coupled to the conductors of the cable, respectively. A flexible, elastic inner sleeve snugly receives a proximal region of the connector body of the second connector member and a distal region of the cable. A flexible outer sleeve, which is less flexible than the inner sleeve, snugly receives the inner sleeve. The connector bodies have a projection and recess so that they can be interconnected to place the terminals in electrical contact.

Submersible pumps are commonly used to pump water from water wells. One kind of submersible pump is powered by an electric motor. In the absence of utility company power, energy to drive the motors can be derived from solar panels. Submersible pumps utilizing solar power may be utilized in remote and even primitive parts of the world.
In a submerged pump of this type, both the pump and the motor are submerged in the well. One problem with pumps of this kind is installing them in the field in a manner that will assure a waterproof electrical connection between the motor and an electric cable extending from the solar panels down into the well to the motor pump assembly. It is also important that this electrical connection be quickly and easily made with a minimum of tools and skill, be easily field repairable, require only low maintenance and be very strong.
One prior art field installation technique includes splicing the conductors of the cable to the leads from the motor and then attempting to seal the connection. Unfortunately, this approach requires too much time, and more importantly, has not proved effective in sealing the electrical connection against water entry.
Another approach is to attach a long cable to the motor at the factory. This has the advantage of providing a factory seal. However, it also requires the shipment of a long length of cable along with the pump and motor. Furthermore, the shipped length of cable may be too long thereby wasting cable or too short in which event field splicing is necessary to provide a cable of adequate length.

Electrical connector and pump assembly utilizing same


Herein is disclosed a power and data storage module comprising a mechanical interface, configured to mechanically connect the power and data storage module to an robot or a charging device; an electrical interface, configured to electrically connect the power and data storage module to the robot or the charging device; a battery, configured to supply an electrical charge to the robot or to store an electrical charge received from the charging device; a memory, configured to store data received via the electrical interface from the robot or the charging device, and to provide stored data via the electrical interface to the robot or the charging device; and one or more processors, configured to perform one or more battery management functions on the battery and one or more memory management functions on the memory.

Many devices utilize a battery as a primary source of power. Said devices may be configured with a modular or removable battery, such that the battery may be removed from the device and subsequently charged. The use of a modular battery may allow the device to be used until depletion of battery capacity, and then the spent battery may be removed and replaced with a charged battery, such that the device can quickly resume operation. For at least this reason, it is known to use a modular battery in an Unmanned Aerial Vehicle (UAV). In this manner, the UAV may be operated until depletion of the battery, at which time the spent battery may be exchanged for a charged battery, and the operation of the UAV may be quickly resumed.
Some UAVs using such modular batteries are known to gather data throughout their operation and to store said data on a memory. It may be desirable to subsequently transfer the stored data to one or more external processors for subsequent data processing. In order to achieve this, some such UAVs are equipped with a removable memory, such as on a commercial memory card or other standardized data storage medium. In this manner, the removable memory may be removed from the device and inserted into a separate reader, such that the stored data may be read.


Described is a semiconductor device having a silicon oxide (SiO2) film into which nitrogen atoms, in a range between approximately 2xc3x971020 atoms/cm3 or more and 2xc3x971021 atoms/cm3 or less, are introduced, used as an insulator film in the semiconductor device. For example, the device can be a nonvolatile memory device, and the silicon oxide film can be used as an insulator film between, e.g., a floating gate electrode and control gate electrode of the nonvolatile memory device. Stable operations and a retention capability of a nonvolatile memory device are obtained even if the nonvolatile memory device is scaled. Moreover, a programming voltage can be lowered. Also described are methods of fabricating the semiconductor device.

The present invention relates to a semiconductor device, particularly to an art to be effectively applied to a semiconductor device comprising a nonvolatile memory device including an insulator film formed between a floating gate electrode and a control gate electrode. The present invention is especially directed to a nonvolatile memory (including, e.g., stacked type memories; or split type memories; or stacked type memories optionally having an erase gate in addition to the control and floating gates; or split type memories optionally having an erase gate in addition to the control and floating gates, with insulator films between the various gates), such as a flash memory.
A semiconductor device uses a nonvolatile memory device referred to as a flash memory. Because the flash memory is superior in portability and impact resistance and electrically allows on-board bulk erasing, it is anticipated as a file memory of a future compact portable data unit.
The flash memory is provided with a memory cell array section constituted by arranging a plurality of memory cells using a nonvolatile memory device as a memory unit like a matrix. The nonvolatile memory device is constituted on the surface of a semiconductor substrate made of, e.g., single crystalline silicon.
The above nonvolatile memory device mainly comprises a semiconductor substrate serving as a channel region, a first gate dielectric film, a floating gate electrode, a second gate dielectric film, a control gate electrode, and a pair of semiconductor regions serving as a source region and a drain region (also referred to as impurity diffusion layers). The nonvolatile memory device injects electrons into the floating gate electrode of the semiconductor substrate by applying a positive voltage to the control gate electrode of the semiconductor substrate, and stores one-bit data (xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d) in accordance with the difference in the threshold voltages of memory cell transistors. Moreover, the first gate dielectric film denotes a tunnel dielectric film formed between the semiconductor substrate and the floating gate electrode. Furthermore, the second gate dielectric film denotes, e.g., an interpoly dielectric film formed between the floating gate electrode and the control gate electrode.
In the case of the nonvolatile memory device, the floating gate electrode and the control gate electrode are each respectively formed from a polycrystalline silicon film, and the first gate dielectric film and the second gate dielectric film are respectively formed from a silicon oxide (SiO2) film. A silicon oxide film serving as the first gate dielectric film is formed by applying thermal oxidation to the surface of a semiconductor substrate made of single crystalline silicon, and a silicon oxide film serving as the second gate dielectric film is formed by applying thermal oxidation to the surface of a floating gate electrode made of a polycrystalline silicon film.
The silicon oxide film formed on the surface of the floating gate electrode made of the polycrystalline silicon film has a low breakdown voltage and is inferior in retention capability compared to a silicon oxide film formed on the surface of a semiconductor substrate made of single-crystal silicon. Therefore, in the case of flash memories of 4 [Mbit] onward, as the second gate dielectric film there is formed, in place of the single-layer silicon oxide film, a composite film, so-called an ONO (Oxide/Nitride/Oxide) film, obtained by superimposing a silicon oxide film, a silicon nitride (Si3N4) film, and a silicon oxide film in order on the floating gate electrode. This is because, when film thicknesses in terms of a silicon oxide film are the same, an ONO film has a small leakage current compared with a silicon oxide film. This art is discussed in xe2x80x9cIEEE Transaction on Electron Devices, 38(1991) pp. 386-391xe2x80x9d.
However, as the integration of a flash memory is improved, new problems occur when using an ONO film as the second gate dielectric film. One of the problems is that the process temperature following scaling of a nonvolatile memory device lowers. The ONO film is normally formed by thermally oxidizing the surface of a floating gate electrode made of a polycrystalline silicon film and thereby forming a lower silicon oxide film, then forming a silicon nitride film on the bottom silicon oxide film by a Low Pressure Chemical Vapor Deposition (LPCVD) process, and finally thermally oxidizing the surface of the silicon nitride film and thereby forming a top silicon oxide film. However, because oxidation of the silicon nitride film requires a high temperature of 900xc2x0 C. or higher, it is difficult to form a shallow junction indispensable for scaling of an LSI (Large Scale Integrated Circuit), when forming a source region and a drain region and thereafter forming the second gate dielectric film, and this is a factor for interrupting improvement in the integration of a flash memory.
According to only the thermal oxidation process described above, it is possible to form a second gate dielectric film, of a single-layer silicon oxide film, even at a low temperature of approximately 800xc2x0 C. However, this process has the problems that the thickness of a silicon oxide film decreases at the top end of the side wall of a floating gate electrode as the oxidation temperature is lowered, concentration of electric fields becomes remarkable at this portion, and leakage current increases. Moreover, an art is proposed in which a single-layer silicon oxide film is formed at a low temperature of approximately 750xc2x0 C. by the LPCVD process, instead of the thermal oxidation process, to use the film as the second gate dielectric film of a nonvolatile memory device. By using the LPCVD process, it is possible to decrease the leakage current of a silicon oxide film compared to the case of using the thermal oxidation process. However, the effect of the LPCVD process is not enough and it is practically difficult to apply the process to a nonvolatile memory device.
Another problem is to decrease the thickness of the second gate dielectric film. A voltage Vfg to be applied to a floating gate electrode for the programming/erasing operation of a nonvolatile memory device is shown by the following expression (1).
[Numerical Formula 1]
Vfg=C2Vcg/(C1+C2)xe2x80x83xe2x80x83(1)
In the above expression, Vcg denotes a voltage applied to a control gate electrode, C1 denotes the capacitance of a first gate dielectric film, and C2 denotes the capacitance of a second gate dielectric film. To efficiently supply the voltage, applied to the control gate electrode, to the floating gate electrode and lower a programming voltage, it is effective to decrease the thickness of the second gate dielectric film and increase C2. However, a conventional ONO film has a problem that electric charges accumulated in a floating gate electrode leak to a control gate electrode, that is, retention failure is actualized if thicknesses of top and bottom silicon oxide films are set to 5 nm or less. Moreover, to form the top silicon oxide film up to a thickness of 5 nm, it is necessary to form a silicon nitride film with a thickness of 10 nm or more in order to prevent the bottom polycrystalline silicon film, serving as a floating gate electrode, from oxidizing. Therefore, approximately 15 nm is a lower limit to the thickness of an ONO film in terms of a silicon oxide film. Because it is presently difficult to decrease the thickness of a first gate dielectric film, it is expected that a new second-gate-dielectric-film forming process is developed.
It is an object of the present invention to provide a semiconductor device (e.g., a nonvolatile memory device) having a gate dielectric film with a small leakage current at a low temperature, compared to a conventional ONO film, and having a stable operation and a sufficient retention capability even for smaller size (higher integration), and a method of manufacturing this semiconductor device.
It is another object of the present invention to provide a semiconductor device (e.g., a nonvolatile memory device, such as a flash memory) having two gate electrodes with an insulating film therebetween (e.g., floating and control gate electrodes, with an insulating film therebetween), wherein this insulating film has only a small leakage current, and a method of manufacturing this semiconductor device.
Moreover, it is another object of the present invention to provide an art making it possible to form a thin gate dielectric film compared to the case of using a conventional ONO film, and lower a programming voltage.
The above problems are solved by using a silicon oxide film or a composite film of a silicon oxide film and a silicon nitride film as a second gate dielectric film and introducing nitrogen into the silicon oxide film so that the maximum nitrogen atomic concentration in the silicon oxide film reaches approximately 2xc3x971020 atoms/cm3 or higher. Moreover, it is more preferable that the maximum nitrogen atomic concentration in the silicon oxide film is approximately 2xc3x971021 atoms/cm3 or less. Furthermore, by setting the maximum hydrogen atomic concentration in the silicon oxide film to 5xc3x971020 atoms/cm3 or less, better advantage is obtained.
A semiconductor device of the present invention is characterized by having a silicon oxide film between a first silicon film (e.g., first polycrystalline silicon film) and a second silicon film (e.g., second polycrystalline silicon film) above the first silicon film, introducing nitrogen into the silicon oxide film, and keeping the maximum nitrogen atomic concentration in the silicon oxide film at approximately 2xc3x971020 atoms/cm3 or higher, preferably approximately 2xc3x971021 atoms/cm3 or lower. When the semiconductor device has a nonvolatile memory device, the first silicon film can correspond to a floating gate electrode, the silicon oxide film can correspond to a second gate dielectric film, and the second silicon film can correspond to a control gate electrode. In this case, n-type impurities such as phosphorus (P) are generally introduced into the first silicon film and the second silicon film respectively. By using the silicon oxide film as the second gate dielectric film, it is possible to realize a film thickness of 15 nm or less which cannot be realized for a conventional ONO film.
The above silicon oxide film is formed, illustratively, by the LPCVD process using monosilane (SiH4) and nitrogen monoxide (N2O) as source gases. According to this process, it is possible to form a silicon oxide film at a low temperature of 700xc2x0 C. to 800xc2x0 C. As described above, however, it is difficult to use a silicon oxide film formed by the LPCVD process directly as the second gate dielectric film of a nonvolatile memory device. This is because the silicon oxide film has a large leakage current, and, when a power supply is cut off and the nonvolatile memory device is left as it is after injecting electrons into a floating gate electrode, electrons accumulated in the floating gate electrode leak to a control gate electrode and resultingly retention failure occurs. Moreover, because of a large leakage current, when injecting electrons into the floating gate electrode to boost the threshold of the nonvolatile memory device, problems also occur that the injected electrons go out to the control electrode side, the threshold voltage is not sufficiently boosted, and the writing and erasing threshold windows cannot be secured. As the result of our study, it is clarified that the leakage current of the silicon oxide film is caused by a defect referred to as an Exe2x80x2 center present in the silicon oxide film.
The Exe2x80x2 center is described in the article by Y. Kamigaki, et al., xe2x80x9cReduced Poly-Si TFT Threshold Voltage Instability By High-Temperature Hydrogenation of a-Si-Like Spin Centersxe2x80x9d, in the 33rd annual proceedings reliability physics 1995, pages 12-17, the contents of which are incorporated herein by reference in their entirety. Briefly, the Exe2x80x2 center is xe2x97xafSixe2x89xa1O3; and this defect can be removed by annealing in the presence of nitrogen, whereby the nitrogen is incorporated in the structure to form Nxe2x80x94Sixe2x89xa1O3, to get rid of the Exe2x80x2 center.
Therefore, in the case of the present invention, a leakage current is decreased by annealing a silicon oxide film in an NH3 environment (e.g., atmosphere) and terminating an Exe2x80x2 center at nitrogen atoms. The leakage current of the silicon oxide film is dependent on the nitrogen atomic concentration in the silicon oxide film. To decrease leakage current, control retention failure, and moreover secure a threshold voltage window, it is necessary to keep the maximum nitrogen atomic concentration in the silicon oxide film at approximately 2xc3x971020 atoms/cm3 or higher, preferably at 2xc3x971021 atoms/cm3 or lower. In this case, less nitrogen atoms are present in a middle region of the silicon oxide film than those in the top and bottom regions of the film. To obtain the above nitrogen atomic concentration, it is necessary to perform annealing in an NH3 environment (e.g., atmosphere) in a temperature range of 750xc2x0 C. to 900xc2x0 C., preferably in a temperature range of 800xc2x0 C. to 850xc2x0 C. Therefore, it is possible to lower the temperature of the gate dielectric film forming process compared to the case of a conventional ONO film. Preferably, the annealing in a nitrogen-containing environment (e.g., an ammonia atmosphere) is at a maximum temperature of 900xc2x0 C.; at such temperature in, e.g., the ammonia atmosphere, nitrogen can be incorporated in the silicon oxide film in a maximum amount of 2xc3x971021 atoms/cm3. The preferred maximum nitrogen concentration takes into account the annealing temperature.
Moreover, by keeping the maximum hydrogen atomic concentration in the silicon oxide film at 5xc3x971020 atoms/cm3 or lower, the present invention becomes more preferable. This is because hydrogen atoms present in the silicon oxide film form electron traps. When hydrogen atoms are present and a programming/erasing is performed, electrons are accumulated in a second gate dielectric film and the electrons accumulated in the gate dielectric film are discharged to a control gate electrode because of the subsequent leaving state and resultingly, retention failure occurs. To decrease the hydrogen atoms described above, it is necessary to perform wet oxidation for a short time at 800xc2x0 C. to 900xc2x0 C., preferably at 850xc2x0 C.
Moreover, the present invention becomes preferable by controlling the nitrogen atomic concentration in a silicon oxide film so that the concentration becomes lower in the top region of the silicon oxide film (adjacent the control gate electrode) than in the bottom region of the film. This nitrogen atom distribution is achieved by performing the above wet oxidation.
The present invention is not restricted to semiconductor devices having a nonvolatile memory device. For example, an advantage can be also obtained by applying the present invention to a semiconductor device having an MOS (Metal Oxide Semiconductor) transistor using one of the above first silicon film and second silicon film as an active layer and the other of them as a gate electrode, and moreover, using the above silicon oxide film as a gate dielectric film (insulator film formed between the active layer and the gate electrode). The MOS transistor includes a load MOS transistor used for a memory cell of an SRAM (Static Random Access Memory) and a switching MOS transistor used for a liquid crystal display.
Furthermore, an advantage is obtained by applying the present invention to a semiconductor device having a capacitor using the first silicon film as a bottom electrode, the second silicon film as a top electrode, and the silicon oxide film as a dielectric film.

Semiconductor device having nonvolatile memory and method of manufacturing thereof


Air-fuel ratio control system for an engine having a catalyst purifying exhaust gases, first oxygen sensor disposed upstream of the catalyst, and second oxygen sensor disposed downstream. Intake air flow rate is detected. An amount of oxygen flowing into the catalyst is calculated using oxygen concentration detected by the first sensor and the detected intake air flow rate. The air-fuel ratio is alternately controlled to lean and rich by comparison between the calculated oxygen amount and target values. A rich oxygen amount and a lean oxygen amount are calculated. A correction amount for correcting the first sensor output is calculated based on the rich oxygen amount, the lean oxygen amount, and an accumulated value of the detected intake air flow rate. The oxygen concentration corrected with the correction amount is used for calculating the inflowing oxygen amount, the rich operation oxygen amount, and the lean operation oxygen amount.

1. Field of the Invention
The present invention relates to an air-fuel ratio control system for an internal combustion engine and, particularly, to a control system for controlling an air-fuel ratio of an air-fuel mixture supplied to the internal combustion engine provided with a catalyst in the exhaust system for purifying the exhaust gases.
2. Description of the Related Art
Japanese Patent Laid-open No. H05-195842 (JP-'842) discloses an air-fuel ratio control system for an internal combustion engine provided with a catalyst in the exhaust system. According to this disclosure, an actual oxygen charged degree of the catalyst is compared with a target oxygen charged degree, and the air-fuel ratio is controlled to be richer when the actual oxygen charged degree is greater than the target oxygen charged degree, while the air-fuel ratio is controlled to be leaner when the actual oxygen charged degree is less than the target oxygen charged degree. This control makes it possible to always maintain an appropriate oxygen charged degree to obtain good exhaust characteristics.
In the above conventional system, the actual oxygen charged degree is calculated according to the intake air flow rate of the engine and an output of the air-fuel ratio sensor provided upstream of the catalyst. Accordingly, the calculated value of the actual oxygen charged degree is influenced by differences or aging in the detection characteristics of the air-fuel ratio sensor. In order to reduce such an influence, JP-'842 discloses a method for calculating an average value of an output of an air-fuel ratio sensor provided downstream of the catalyst and an average value of the output of the air-fuel ratio sensor provided upstream of the catalyst and correcting the output of the upstream air-fuel ratio sensor according to a ratio of the two average values.
However, the oxygen concentration of exhaust gases in the vicinity of each of these air-fuel ratio sensors may become different from each other due, for example, to a change in the engine operating condition, to the configuration of the exhaust pipe, or to the mounted positions of the upstream air-fuel ratio sensor and downstream air-fuel ratio sensor. The difference in oxygen concentrations may cause a change in the mutual relationship between the outputs of the two air-fuel ratio sensors in a short time period.
For example, in a high-load operating condition of the engine, the velocity of exhaust gases increases, and the oxygen concentration in the exhaust flow shown by the solid line A1 in FIG. 17 may slightly deviate from the oxygen concentration in the exhaust flow shown by the broken line A2. In this example, the upstream air-fuel ratio sensor 101 detects an oxygen concentration in the exhaust flow shown by the solid line A1. On the other hand, on the downstream side of the catalyst, the exhaust flows shown by the solid line A1 and the broken line A2 on the upstream side are mixed to create the exhaust flow shown by the thick solid line A3. Thus, the downstream air-fuel ratio sensor detects an oxygen concentration in the exhaust flow (A3). Therefore, the outputs of the two sensors differ from each other even if the detection characteristics of the two air-fuel ratio sensors 101 and 102 are completely identical.
The method disclosed in JP-'842 cannot appropriately deal with the deviation in the outputs of two sensors that is caused in a short time period due to the change in the engine operating condition.

Air-fuel ratio control system for internal combustion engine


In a method for inhibiting the polymerization of (meth)acrylic acid or esters thereof, the improvement comprising using as a polymerization inhibitor a N-oxyl compound represented by the general formula (1): ##STR1## wherein X represents CH.sub.2, CHOH, C=O, CHCOCH.sub.3 or CHNHCOCH.sub.2, in combination with phosphine compound or a cobalt compound.

1. Field of the Invention
The present invention relates to a method for inhibiting the polymerization of acrylic or methacrylic acid (acrylic acid and methacrylic acid being hereinafter collectively referred to as "(meth)acrylic acid") or esters thereof. More particularly, the present invention relates to a method for effectively inhibiting the polymerization of (meth)acrylic acid or esters thereof during their storage or upon their preparation, e.g., at a distillation stage.
2. Background Art
(Meth)acrylic acid or esters thereof have widely been utilized as raw materials for organic polymeric materials and a variety of organic materials. With the recent expansion of the field in which (meth)acrylic acid or esters thereof are utilized, those ones which have higher purities have been demanded. (Meth)acrylic acid and esters thereof tend to be naturally polymerized by light or heat. Therefore, there has been proposed to use various polymerization inhibitors in order to inhibit such a natural polymerization of (meth)acrylic acid or esters thereof during their storage or preparation. For instance, British Patent No. 1,127,127 discloses that an N-oxy radical such as tert-butylnitroxide or 2,2,6,6-tetramethyl-4-hydroxy-piperidine-1-oxyl, when used as a stabilizer for acrylic acid, exhibits a better polymerization-inhibiting effect than conventionally-known hydroquinone, phenothiazine and copper (II) chloride.
Further, U.S. Pat. No. 4,127,603 discloses a method for inhibiting the polymerization of methacrylic acid, in which 2,2,6,6-tetramethyl-4-hydroxypiperidine-1-oxyl or 2,2,6,6-tetramethylpiperidine-1-oxyl is allowed to exist in the catalytic oxidation reaction of methacrolein to produce methacrylic acid; and Japanese Patent Publication No. 46, 496/1983 discloses a method for inhibiting the polymerization of (meth)acrylic acid esters, using an N-oxyl compound such as 2,2,5,5-tetramethyl-3-oxopyrrolidine-1-oxyl or 2,2,6,6-tetramethyl-4-acetoxypiperidine-1-oxyl.
Furthermore, European Patent Publication No. 620,206 discloses the use of 2,2,6,6-tetramethylpiperidine-1-oxyl, hydroquinone and phenothiazine in combination for inhibiting the polymerization of (meth)acrylic acid or esters thereof; and U.S. Pat. No. 5,504,243 teaches the polymerization-inhibiting effect which can be attained when an N-oxyl compound such as 2,2,6,6-tetramethyl-4-hydroxy-piperidine-1-oxyl is used in combination with other compounds such as manganese salt compounds, copper salt compounds, 2,2,6,6-tetramethylpiperidine compounds or nitroso compounds. In addition, British Patent Publication No. 2,285,983 discloses the use of phenothiazine, hydroquinone or the like in combination with copper dithiocarbamate, and metallic cobalt, cobalt oxide, cobalt acetate or the like, as a polymerization inhibitor for acrylic acid during its distillation process.
However, the above-described conventional methods for inhibiting the polymerization of (meth)acrylic acid or esters thereof have the problem that the polymerization is not always fully inhibited depending upon the conditions under which these methods are applied, especially under the high-temperature conditions upon the distillation of (meth)acrylic acid or esters thereof.

Method for inhibiting polymerization of (meth) acrylic acid or esters thereof


An image scanner apparatus, method and system to scan a bar code or other optical code using an image capture device where the blurring associated with the movement of the bar code pass the image scanner is reduced or eliminated by using differential panning of the bar code. An image of the bar code is panned or moved across the image capture device in a direction that negates at least some of the apparent movement of the bar code past the image scanner. The apparent motion of the bar code to the image capture device is reduced thus reducing the blurring of the bar code in the captured image.

Bar code scanners are used in a wide variety of applications that rely on bar codes to store information. Industries such as retail, airline, self-service, automotive, parcel delivery, pharmaceutical, healthcare and others use optical codes to provide inventory control, customer identification, item tracking, security and many other functions. A bar code is read or scanned by a bar code scanner. The bar code is attached to or printed on an object and contains information about or related to the object. A typical bar code is comprised of a number of bars separated by spaces. Information is encoded on a bar code by varying the width of the bars and spaces. When a bar code is placed within the field of view of a bar code scanner, the scanner will detect, analyze and decode the bars and spaces comprising the bar code to retrieve the information encoded in the bar code. This operation is also called scanning or reading a bar code. The information encoded on a bar code is usually a sequence of numeric or alphanumeric numbers e.g., a Universal Product Code (UPC) or European Article Number (EAN).
An imaging bar code scanner (also referred to as an image scanner) reads a bar code by capturing a digital image of the bar code and then processing the image to detect and decode the bar code. It is advantageous for the bar code scanner to successfully read all bar codes presented to the scanner on the bar codes first pass by the scanner. This is known as a successful first pass read. Successful first pass reads of bar codes helps to maintain a good workflow at the checkout station and speeds up the overall checkout process. A high first pass read success rate has also been found to reduce stress on the person operating the scanner. This is particularly true if the operator is a customer operating a self-checkout terminal.
The percentage of successful first pass reads for an imaging scanner is negatively affected as the bar code passby speed increases. As the passby speed of a bar code increases, the image of the bar code captured by the image scanner starts to blur. The blurring reduces the ability of the image scanner to accurately detect and decode the bar code thus reducing the number of successful first pass reads. Because of external factors such as bar code size, bar code fidelity, illumination and bar code orientation to the scanner, the maximum passby speed for a successful first pass read will vary greatly. Since these and other factors are outside the control of the image scanner, it is important to reduce blurring as much as possible using methods that are controlled by the image scanner in order to achieve a high first pass read of a bar code.

Apparatus, method and system for an image scanner with differential panning


There is provided a luminescent medium which requires difficult analysis of light emitted from a luminescent material of the medium. A luminescent medium includes a substrate, and a luminescent material comprising a first luminescent material which, when irradiated with visible light, infrared light or ultraviolet light, emits first infrared light “a”, and a second luminescent material which, when irradiated with visible light, infrared light or ultraviolet light, emits second infrared light “b”. The first luminescent material is formed in a first planar area, and the second luminescent material is formed in a second planar area. The first planar area and the second planar area overlap each other, forming an overlapping planar area in which the luminescent materials each have a concentration gradation.

Luminescent media, comprising a substrate and a luminescent material provided on the substrate, have been developed in the field of media for which prevention of counterfeiting is required, such as securities including cash vouchers and prepaid cards, identification cards including driver's license cards, etc. in order to enhance the security of such media. When such a luminescent medium is irradiated with invisible light, it emits visible lights of different colors which can be read. This can prevent the medium from being easily counterfeited e.g. by using a common color printer.
In order to further enhance the counterfeiting prevention effect, a demand exists these days for the development of a luminescent medium which requires more difficult analysis of light emitted from a luminescent material of the medium.

Luminescent medium and method for reading luminescent medium


Container handling machine for printing onto containers with a transport device optionally configured as a carousel for transporting said containers, with direct printing heads and with a cleaning device for cleaning the direct printing heads, the cleaning device including at least one cleaning unit for dispensing cleaning fluid to a direct printing head and a collection device for discharging spent cleaning fluid.

It is known that containers, such as bottles or cans, can be provided with an imprint for identification of the container content, where the printing ink is at a printing station by use of a direct printing head applied directly onto the container. The containers are for this purpose transported in the container handling machine by use of a transport device and the direct printing heads print onto them in a two-dimensional manner. Such a direct printing head is, for example, an inkjet printing head comprising a plurality of typically vertically arranged nozzles (for example, 500-1000). A rotational motion of the container about its longitudinal axis and/or a pivotal motion of the printing head is typically performed for two-dimensional printing. The printed image itself is available as digital information in a computer controller and is used for respective actuation of the direct printing head, the container receptacles and/or a pivot unit. Furthermore, the printing ink is in a subsequent curing device curved with UV or electron beams by cross linking. Several printing units with different printing inks (printing colors) are provided for multi-color printing. It is with such direct printing methods possible to provide the container with an individual print.
The drawback here is that the fine nozzles of the direct printing heads can occasionally clog with printing color and/or contaminants, where already a single clogged nozzle causes a significant error in the print result. Furthermore, it is possible that scattered radiation of the curing device unintentionally cures excess ink on the direct printing head.
To this end, DE 10 2009 058219 A1 suggests that direct printing heads be cleaned by using a cleaning device in regular cycles. The printing head to be cleaned is there in a cleaning position mechanically dabbed off by a dabbing device and/or excess printing ink is removed by an extraction device.
The disadvantage here is that highly dried or partially cured ink residues must be removed with a respectively strong mechanical action of the dabbing device and the nozzles can thereby be damaged. Furthermore, particles can also be introduced by the dabbing device into the non-clogged nozzles and clog them.
It is furthermore known from DE 10 2006 052154 A1 that printing ink is for cleaning purposes jetted from the ink-jet printing head so as to flush the nozzle from the inside.
A disadvantage is that a relatively large amount of printing ink is consumed by this cleaning process and the distribution of the ink used as cleaning fluid is not uniform at the printing head. Furthermore, highly dried or cured ink residue on the printing head can with this method be difficult to remove.


An embodiment and method of the present invention includes a frequency lock loop (FLL) having an improved frequency error estimation and a low bit error rate (BER) in data demodulation by calculating and using an improved averaged phase rotation using ‘valid’ phase rotation samples.

1. Field of the Invention
The present invention relates generally to digital receivers for spread spectrum signals such as those used in Global Positioning System (GPS), and more particularly to a frequency discriminator and data demodulation techniques used in the carrier frequency lock loop (FLL) of digital code division multiple access (CDMA) spread spectrum receivers.
2. Description of the Prior Art
Global Positioning System (GPS) is a satellite-based radio navigation system. Each GPS satellite, also called space vehicle (SV), continuously transmits time-tagged spread-spectrum signals on two L-band carrier frequencies. Carriers are used for modulation of GPS signals, to be transmitted. "Carrier" and "carrier signal" are used interchangeably herein. Briefly, carrier is a sine/cosine wave characterized by its frequency. "Carriers" or "carrier signals", at a carrier frequency, as often referred to herein, are modulated by binary bits or code. Upon reception of a modulated signal, the carrier must be removed or the signal need be demodulated using a receiver-generated carrier at the same frequency as that of the received signal's carrier frequency in order to recover bits or code.
In GPS satellite-based radio navigation systems, each carrier is modulated by at least one of two pseudorandom noise (PRN) codes unique to the satellite. The L1 carrier at 1575.42 MHz is modulated by both the precise (P) code and the coarse/acquisition (C/A) code. The L2 carrier at 1227.60 MHz is modulated by the P code only. The encrypted P code is available only to military and other authorized users, while the C/A code is public to all commercial and civilian users.
The GPS radio-frequency (RF) signals of all SVs in view, captured by a GPS receiver antenna, are amplified and down-converted to an intermediate frequency (IF) that is further digitalized by an analog-to-digital (A/D) converter, as show in FIG. 1. A digital receiver channel consists mainly of a carrier tracking loop and a code tracking loop, as shown in FIG. 2.
FIG. 1 is a block diagram illustrating, generally, the components of a typical GPS receiver 10. The receiver 10 is shown to include a GPS antenna 12 coupled to a pre-amplifier block 14, which is shown coupled to a down-converter block 16, which is, in turn, shown coupled to a IF filter block 18. The block 18 is shown coupled to an A/D converter block 20, which is shown coupled to an N number of digital receiver channels 22 for providing measurement input to a navigation processing (or position-velocity-time estimation) block 24. The blocks appearing before or to the left of the N number of digital receiver channels 22 process information that is in analog form, whereas, the blocks appearing to the right of or after the block 20 process signals that are in digital form.
The GPS antenna 12 first captures GPS RF signals of all satellites that are in view. The captured RF signals are then amplified, by the pre-amplifier block 14 and down-converted, by the down-converter block 16 and provided to the IF filter block 18, the output of which is provided to the A/D converter block 20 for digitization thereof and provided to each of N number of digital receiver channels 22. One receiver channel tends to track signals of one satellite, measures code and carrier phases, and demodulates navigation data bits. When there are four or more satellite measurements available, the receiver can have a position, velocity and time (PVT) information, which is processed by the block 24.
FIG. 2 is a block diagram illustrating the carrier and code tracking loops in one of the N number of digital receiver channels 22 of FIG. 1. In FIG. 2, a digital receiver channel 26 is shown to include a carrier removal block 28 coupled to a code wipeoff block 30, which is shown coupled to an integrate and dump block 32, which is shown coupled to a code loop discriminator block 34 and a carrier loop discriminator block 40. The block 34 is shown coupled to a code loop filter block 36, which is shown to provide input to the code numerically-controlled oscillator (NCO) block 38. The block 38 provides properly-delayed PRN code to the block 30—"properly" refers to the receiver-generated code and carrier being properly delayed in order to match the received code and carrier—. The block 40 is shown coupled to the carrier loop filter block 42, which is shown coupled to the code NCO block 38 and to the carrier NCO block 44. The block 44 is shown to provide carrier signals having a proper phase delay or a delay at a proper frequency, to the block 28. The blocks 28, 30, 32, 40, 42 and 44 comprise the carrier tracking loop, as they cause tracking of the received signals' carrier phase or frequency and the blocks 28, 30, 32, 34, 36 and 38 comprise the code tracking loop for tracking of the received signals' PRN code phase. The block 28 receives, as input, a digital IF signal generated by the block 20 of FIG. 1.
The digital receiver channel 26 accomplishes signal tracking with a carrier tracking loop and a code tracking loop. The carrier tracking loop removes the carrier (plus carrier Doppler due to line-of-sight relative motion between the receiver and the satellite) from the digital IF signal and produces in-phase (I) and quadrature-phase (Q) sampled data for use by the block 30. The carrier tracking loop is designed to synchronize the phase or frequency of the local NCO with that of the received carrier signal.
The code tracking loop is often implemented as a delay lock loop (DLL). The DLL correlates the I and Q signals normally with early, prompt, and late replica codes to maintain PRN code lock, resulting in IE, QE, IP, QP, IL and QL samples. The GPS 50-Hz navigation message data modulation remains after the carrier removal and code wipeoff. The block 32 provides signal integration, resulting in filtered IES, QES, IPS, QPS, ILS and QLS samples. The integration time defines the pre-detection filter bandwidth. Based on the locked code phase, the signal transit time from the satellite to the receiver and therefore the distance (called pseudorange) between them can be measured. The receiver can compute its PVT if there are four or more pseudorange measurements available.
The carrier tracking loop can be implemented either as a phase lock loop (PLL) or as a frequency lock loop (FLL), based on its discriminator function. It can also be used to demodulate navigation data bits. A Costas PLL offers accurate carrier phase measurements and easy data demodulation mechanism, but the PLL is sensitive to dynamics stress potentially causing it to even lose tracking of a strong signal. On the other hand, the FLL relies on frequency measurements; it is more robust for tolerating dynamic stress. Unfortunately, data demodulation is more complicated in a FLL than in a PLL.
FIG. 3 is a phasor diagram illustrating a typical method of estimating the frequency error in a FLL. Phasor Aa at time ta, which is the vector sum of Ia and Qa components, has a carrier phase angle of Φa=tan−1(Qa/Ia). If an adjacent pair of samples Ib and Qb is sampled within the same data bit interval as Ia and Qa, then their phase difference Φb−Φa, divided by their time difference tb−ta, is an estimate of the frequency error. Assuming that the pre-detection coherent integration time (PDI) in block 32 is TPDI, then the detected frequency error is equal to
                                                                        tan                                  -                  1                                                                          (                                                      Q                    b                                    /                                      I                    b                                                  )                                      -                                          tan                                  -                  1                                                                          (                                                      Q                    a                                    /                                      I                    a                                                  )                                                          2                        π                                                                                T              PDI                                                                                in                                                            Hz          .                                    Eq        .                                                    (          1          )                    Theoretically, the FLL discriminator, of the block 40 of FIG. 2, can detect a maximum frequency error of
  +      /          -                        1                      2                                      T              PDI                                      .            For example, if TPDI equals 10 ms, a maximum +/−50 Hz frequency error can be detected. This frequency error detection range is directly related to the pull-in range of a carrier tracking loop. The larger the detection range, the more frequency error is tolerable for a receiver to handoff from acquisition to tracking. The large frequency error tolerance also makes an FLL more appealing than a PLL when a receiver uses a low-cost oscillator and frequently experiences user dynamics. However, phase angle difference quantities are usually noisier than the phase angle measurements themselves, which also result in noisy frequency error estimate. This is one of the problems associated with prior art techniques of estimating the frequency error accuracy.
In FIG. 3, if the NCO generated frequency matches the incoming signal carrier, then the frequency error will be zero. Since the two sampling times ta and tb are within the same bit interval, this frequency error estimation method is insensitive to bit transitions; however, the variance of phase difference (Φb−Φa) generally is twice as the variance of the phase Φa or Φb, which leads to a noisy frequency error estimate.
FIG. 4 is a graph illustrating a binary phase shift keying (BPSK) modulation, which is used as the GPS navigation data modulation method. In BPSK, the carrier phase has a 180-degree (or π) phase shift when a data bit transition occurs. For example, at times 20 ms and 60 ms in FIG. 4, the data bit transitions are from 0 to 1 and from 1 to 0, respectively. Accordingly, the carrier phase has a π phase shift at these two bit transitions. The π carrier phase shifts, caused by unknown bit transitions, make data modulation difficult in an FLL.
Accordingly, there is a need for improving data demodulation in FLL utilized in digital CDMA spread spectrum receivers including GPS receivers. Furthermore, there is a need to improve the frequency error estimate accuracy in order to more accurately adjust the frequency of the receiver's generated carrier signal to match that of the received carrier signal and to continue to adjust to compensate for frequency shifts due to Doppler effects resulting from a moving receiver and/or satellite.

Method and apparatus for frequency discriminator and data demodulation in frequency lock loop of digital code division multiple access (CDMA) receivers


A compact self-ballasted fluorescent lamp includes a double-spiral arc tube formed by winding a glass tube to its both ends around a spiral axis, and sealing electrodes each having a filament coil at the ends of the glass tube, and a holding member that has a closed bottom and holds the arc tube. The holding member has, at its end wall, insertion openings through which the ends of the glass tube are inserted. The ends of the glass tube are inserted to such positions that enable the filament coils to be positioned within the holding member, and the minimum distance L, in the insertion direction of the ends of the glass tube, between the filament coil and the edge of the insertion opening of the holding member is 6 mm.

(1) Field of the Invention
The present invention relates to a compact self-ballasted fluorescent lamp including an arc tube composed of a glass tube at least partially bent and electrodes with filament coils sealed at both ends of the glass tube, and a holder having insertion openings and holding the arc tube by fixing the ends of the glass tube inserted through the insertion openings.
(2) Related Art
In the present energy-saving era, compact self-ballasted fluorescent lamps have been increasingly widespread as energy-saving light sources alternative to incandescent lamps. As one example, a compact self-ballasted fluorescent lamp includes an arc tube formed by winding a glass tube in a double-spiral shape and enclosing mercury in the glass tube, a holder holding the arc tube, an electronic ballast contained in the holder for lighting the arc tube, a globe covering the arc tube, and a screw-type base attached to the holder.
At both ends of the glass tube, electrodes with filament coils are sealed. The holder has a pair of insertion openings through which the ends of the glass tube are inserted in the holder. Some compact self-ballasted fluorescent lamps have such a construction where the arc tube is held by the holder in a state where the filament coils placed in the glass tube are positioned within the holder (see Japanese Laid-Open Patent Application No. H8-339780). To efficiently obtain visible light emitted from the arc tube, however, compact self-ballasted fluorescent lamps having such a construction where the filament coils are positioned outside the holder have been developed in recent years.
Compact self-ballasted fluorescent lamps with the construction where the filament coils are positioned outside the holder can feature an improved amount of light emission. After the cumulative lighting time of long hours, however, these lamps start to suffer from poor rising characteristics at the lighting startup compared with the initial stage of their use.
FIG. 1 shows the relationship between a relative luminous flux value and an elapsed lighting time for a conventional compact self-ballasted fluorescent lamp. The relative luminous flux value is a luminous flux value relative to a luminous flux value during the steady lighting state, at the lighting startup of the conventional compact self-ballasted fluorescent lamp. Here, the conventional compact self-ballasted fluorescent lamp is repeatedly made ON and OFF with its base being oriented upward, until a total lighting time reaches 100 hours and 6000 hours. The total lighting time is a total of ON times when a ON/OFF cycle of "two hours and 45 minutes ON" and "15 minutes OFF" is repeated.
As shown in the figure, for the conventional compact self-ballasted fluorescent lamp, the time required by the relative luminous flux value during the steady lighting state to reach 60% is about 7.5 seconds for the total lighting time of 100 hours, whereas the time is about 20.5 seconds for the total lighting time of 6000 hours. The time required by the relative luminous flux value to reach 60% for the total lighting time of 6000 hours is 2.7 times as long as that for the total lighting time of 100 hours. In this way, after the total lighting time of long hours, the lamp starts to suffer from poor rising characteristics at the lighting startup compared with the initial stage of its use.

Compact self-ballasted fluorescent lamp with improved rising characteristics


A prosthesis includes a first plate and a second plate spaced apart from the first plate to form a gap therebetween. The second plate can move independently of the first plate. The prosthesis also includes a lower plate spaced apart from the first plate and the second plate. A plurality of support posts support the first plate and the second plate above the lower plate.

The present invention pertains generally to a joint prosthesis. In particular, the present invention relates to absorbing forces in a joint prosthesis.
The human body includes several joints such as the knee, the hip, the shoulder and the elbow. These joints are vulnerable to damage from various injuries, wear and disease. When the joints have been severely damaged, partial or total joint replacement may be the only viable solution. In many joint replacements, a prosthetic structure is inserted into the joint. Typically, the prosthetics include a base member secured to a bone to allow normal joint articulation.
The human knee is the single largest joint of the human body, but due to its structure, is arguably the most vulnerable to damage. The leg consists principally of a lower bone called a tibia and an upper bone known as the femur. The tibia and femur are hinged together at the knee joint. The knee joint includes several femoral condyles supported in an engagement with crescentic fibrocartilages that are positioned on the upper end of the tibia and receive the femur. The joint is held together by numerous ligaments, muscles and tendons. The patella is a similarly supported bone positioned in front of the knee joint and acts as a shield for it.
In addition to providing mobility, the knee plays a major role in supporting the body during static and dynamic activities. The knee works in conjunction with the hip and ankle to support the body weight during static erect posture. The knee is also heavily loaded because of its location connecting the two longest bones in the human body. Body weight, inertia and ground reaction forces often produce large moments at the knee. Dynamically, the knee joint must transmit extremely high forces needed for powerful movement of the lower extremity, while damping out impulsive shock loads to the spine and head. Furthermore, the knee must provide major stability to the lower extremity as well as fulfill major mobility roles during movement.
In current knee replacement prosthetic designs, the tibia is resected to form a flat, horizontal platform known as a tibial plateau. A tibial platform is secured to the tibial plateau with posts or anchors fixed normal or perpendicular to the tibia plateau. The anchors provide additional support to the tibial platform when the joint is subjected to shear, tipping and torque forces present under normal knee articulation.
A similar component, comprising a curved convex semi-spherical shell, covers the femoral condyles and slidably engages a concave tibial bearing insert. On a side opposite the femoral component, the tibial insert is substantially flat and slidably engages the tibial platform. Interaction of opposing surfaces of these three elements, the femoral component, the tibial component, the tibial insert and the tibial platform allows the prostheses to function in a manner equivalent to a natural knee joint.
Current prosthetic designs are relatively inflexible and inelastic, especially when reacting to forces produced on the knee joint. When a prosthesis is placed in-vivo, the prosthesis experiences a larger number of force cycles that can ultimately lead to failure of the prosthesis. As a result, a prosthesis is needed that can absorb and limit failure over a larger number of force cycles.


It makes it possible to track instrument information and to obtain an accurate history of the instrument information, even when a mounting position mounted with a railway vehicle instrument has been changed. Instrument information indicating an operation or a state of a railway vehicle instrument mounted to each mounting position included in a composition is collected. A serial number determined for each mounting position is updated. The instrument information is assigned with a temporary ID including position information specifying the each mounting position and a serial number. A combination of a new temporary ID and an old temporary ID included in the temporary ID group and assigned to new instrument information and old instrument information indicating an operation or a state of a same railway vehicle instrument is estimated.

In railways, in order to achieve stable operation and safe operation, it is obliged to perform maintenance work such as inspection and repair of railway vehicle instrument periodically, every time a travel distance reaches a certain distance, or in accordance with a situation. However, in a case of manually performing maintenance of each of a large number of railway vehicle instruments, an enormous cost is required.
Therefore, it may be considered to adopt a technique of collecting a large number of pieces of instrument information that individually indicate an operation or a state of a large number of railway vehicle instruments, and using for maintenance of the large number of railway vehicle instruments.
In this technique, the large number of railway vehicle instruments are connected to a network, and integrated management of the large number of railway vehicle instruments is performed by a vehicle management apparatus called a monitor apparatus. The vehicle management apparatus collects instrument information of the large number of railway vehicle instruments, and aggregates the collected instrument information on a server on the ground. The aggregated instrument information is used to confirm an operation or a state of each railway vehicle instrument, which is each of the large number of railway vehicle instruments. The instrument information of each railway vehicle instrument may be represented by a value, or may be represented by other than a value. The instrument information represented by a value is an operating time of each railway vehicle instrument, an operation count of each railway vehicle instrument, a fluctuation history of a voltage applied in each railway vehicle instrument, a fluctuation history of a current having flowed in each railway vehicle instrument, a fluctuation history of a temperature of each railway vehicle instrument, and the like. The instrument information represented by other than a value is a failure diagnosis result notified from each railway vehicle instrument, and the like. The instrument information of each railway vehicle instrument is to be the basis of determination of a deterioration state, necessity of repair, and the like of each railway vehicle instrument.
A technique described in Patent Document 1 relates to management of a railway vehicle mounted instrument (title of the invention). In the technique described in Patent Document 1, an instrument identification number is given to the railway vehicle mounted instrument (paragraph 0017). In a recording unit provided in the railway vehicle mounted instrument, maintenance management characteristic values such as a time, a number of times, and a distance are recorded (paragraph 0028). The instrument identification number is set as an ID (paragraph 0029, paragraph 0030, and FIG. 1). Organized maintenance management information is grasped, a history of the railway vehicle mounted instrument is monitored, and maintenance information is issued (paragraph 0030, paragraph 0031, and FIG. 1).
A technique described in Patent Document 2 relates to management of a vehicle component (title of the invention). In the technique described in Patent Document 2, a component mounted to a train composition is registered in a component database (paragraph 0011). Travel distance data of the registered component is stored in the component database (paragraph 0011). A composition number and a travel distance corresponding to the composition number are received from an operation management system (paragraph 0011). The received travel distance is added to the travel distance data of the component mounted to the train composition (paragraph 0011). The travel distance data is updated when the component is replaced or a mounting position is changed (paragraph 0011). If there arises a component having a cumulative travel distance or a travel distance from a previous inspection or replacement exceeding a threshold value, an alarm is outputted (paragraph 0011).

System for managing railway vehicle instrument, and on-board apparatus for managing railway vehicle instrument


A clock synthesis circuit) including a phase-locked loop and one or more frequency synthesis circuits is disclosed. The phase-locked loop includes a voltage-controlled oscillator (VCO) having a sequence differential stages o produce equally spaced clock phases. The frequency synthesis circuit includes a sequence of adder-and-register units that select one of the VCO clock phases. An output multiplexer receives each of the selected clock phases, and selects among these clock phases in sequence; the output of the multiplexer is applied to a first toggle flip-flop that changes state in response to rising edge transitions at the output of the multiplexer. A second toggle flip-flop is clocked by the output of the first toggle flip-flop, itself toggling in response to rising edge transitions at the output of the first toggle flip-flop. One or more additional flip-flops can be similarly connected in sequence. The additional toggle flip-flop enables the VCO to be formed with fewer stages for a given frequency resolution, reducing noise and thus frequency error.

This invention is in the field of integrated circuits, and is more specifically directed to clock generation circuits.
As is fundamental in the art, many modern electronic systems include numerous integrated circuits that operate in conjunction with one another. For example, consumer-oriented systems such as televisions and home theaters include video decoders for decoding an input video signal into digital video output signals that are synchronized with a synchronization pulse contained within the incoming video signal itself. Modern spread-spectrum communications transmitters and receivers require the generation of high-frequency clock signals for the modulation and demodulation, respectively, of signals over the multiple subchannels of the spread spectrum bandwidth. In these and other electronic systems, the generation of periodic signals for clocking the operation of circuit functions based upon a system clock or synchronization pulse, is a common and often critical function.
A conventional approach for generating periodic signals based upon a reference clock utilizes the well-known phase-locked loop ("PLL"). In general, PLL circuits operate by comparing the time at which an edge of a reference clock is received with a corresponding edge of an internally generated clock. If a significant delay between these two edges is detected, the generation of the internal clock is adjusted to more closely match the received reference clock. In conventional analog PLLs, the frequency of a voltage controlled oscillator is adjusted by a filtered signal from a phase detector that compares system and chip clocks, so that the instantaneous frequency of the internal chip clock is advanced or retarded depending upon whether the chip clock lags or leads the system clock. Analog PLLs adjust the phase of the chip clock in a substantially continuous manner in response to a phase difference between the internal chip clock and the system clock. This smooth operation generally depends upon the filtering of the output of the phase detector circuit, but can be made quite well-behaved in many implementations. Additionally, by inserting frequency dividers in the forward and feedback loops, analog PLLs can be used to generate periodic signals of a selectable frequency multiple of the input reference clock.
Several types of digital PLLs (DPLLs), in which some of the signals communicated around the loop are in digital form, are known in the art. A specific class of DPLL is the so-called "all-digital" PLL (ADPLL), in which all signals in the loop are digital. Known implementations of ADPLLs include divide-by-N counters, increment-decrement (ID) counters, and digital waveform synthesizers. Several conventional ADPLL designs are described in Best, Phase-Locked Loops: Design, Simulation, and Applications (McGraw-Hill, 1997), pp. 177-199.
By way of further background, clock generator circuits based on a phase-locked loop (PLL) are described in Mair and Xiu, "An Architecture of High-Performance Frequency and Phase Synthesis", J. Solid State Circ., Vo. 35, No. 16 (IEEE, June, 2000), pp. 835-46, and in U.S. Pat. No. 6,329,850 B1, issued Dec. 11, 2001 and commonly assigned herewith, both documents incorporated herein by this reference. In these "flying-adder" clock generation circuits, the voltage controlled oscillator (VCO) of the PLL produces a plurality of evenly-spaced output phases at a frequency that is locked to a reference clock. A register stores a digital value that selects the desired phase to be applied to the clock input of a toggle flip-flop from which the output clock is generated. A frequency synthesis circuit adds integer and fraction portions of an incoming frequency selection value to the current contents of the register. The fraction portion of the frequency selection value permits a time-averaged clock frequency to be produced with more precision than would be attained by the integer portions selecting the multiple VCO output phases. This article and U.S. Patent also describe alternative realizations, including multiple frequency synthesis circuits based upon the same PLL and the generation of a phase-shifted secondary output from a phase synthesis circuit that is slaved to the frequency synthesis circuit. Additional performance is obtained by providing separate paths for producing the leading and trailing edges of the output clock.
By way of further background, U.S. Patent Application Publication No. US 2004/0008805 Al, published Jan. 15, 2004, from copending and commonly assigned application Ser. No. 10/376,453, filed Feb. 26, 2003, and incorporated herein by this reference, describes a phase-locked loop using a flying-adder frequency synthesizer, in which a central processing unit generates a feedback divide integer in the feedback loop from the VCO output (which provides the multiple phases to the flying-adder). Because the CPU generates the feedback ratio, the flying-adder frequency synthesizer can be designed to use only integer values, effectively eliminating jitter while still providing low frequency error.
By way of further background, U.S. Patent Application Publication No. US 2005/0162552 A1, published Jul. 28, 2005, from copending and commonly assigned application Ser. No. 10/829,770, filed Apr. 22, 2004, and incorporated herein by this reference, describes the application of a digital-control oscillator based on a flying-adder frequency synthesizer in generating a clock signal that is at an extremely large frequency multiple relative to the input reference signal. Such clock signals are useful in many systems applications, for example in video decoders. In this implementation, the flying-adder architecture provides such high frequency-multiple clock signals to be generated, while also providing the ability to finely and precisely tune the phase of the clock signals.
By way of further background, U.S. Pat. No. 6,940,937 B2, issued Sep. 6, 2005, commonly assigned herewith and incorporated herein by this reference, describes another flying-adder clock generation circuit, based on the flying-adder architecture of the Mair and Xiu article and U.S. Pat. No. 6,329,850 B1. In particular, this copending application describes a clock generation circuit in which two or more frequency synthesis paths terminate at the inputs of a multiplexer, the output of which toggles a toggle mode bistable multivibrator (T flip-flop). Sequential selection of the synthesis paths is controlled in a synchronized manner with the output of the circuit, so that the synthesis path outputs sequentially toggle the flip-flop. In this way, the number of synthesis paths can be increased arbitrarily, with the scaling limited by the performance of control circuits for the output multiplexer. The propagation delay paths of each synthesis path can then extend to the multiple periods of the output clock, making higher output frequency possible. In addition, the toggle signal operates as a double-frequency clock signal.
These flying-adder frequency and phase synthesis circuits have been observed to provide excellent performance, with the later advances described above resulting in scalability of the architecture, as well as improved performance and reliability. However, it has been observed, in connection with this invention, that the most significant source of noise in these circuits is design and layout mismatch among the multiple VCO stages. This noise directly causes frequency error in the output clock signal. Based on this observation, it has been discovered, in connection with this invention, that it is desirable to reduce the number of VCO stages in order to reduce the severity of this mismatch, and thus the frequency error; in addition, this reduction in the number of VCO stages would also beneficially reduce power consumption of the circuit. However, simply reducing the number of VCO stages would correspondingly reduce the number of available phases applied to the flying-adder synthesizer, and thus reduce the resolution at which the frequency of the output clock signal may be selected. As such, the ability to improve the accuracy of the flying-adder frequency synthesis architecture in this way has not yet been available.

Precision frequency and phase synthesis with fewer voltage-controlled oscillator stages


The invention relates to a knee-joint endoprosthesis with a femoral part anchored in the femur and a tibial plate connected to the tibia bone, on which tibial plate tibial parts are arranged by way of gliding surfaces, and preferably with meniscus elements disposed between the femoral part and the tibial parts. With a view to mechanically stable anchorage of the tibial part on the tibial plate that may optionally be subsequently released, even at the implanted joint, so that the tibial part can be exchanged, it is proposed that the tibial part or parts are detachably connected to the tibial plate by wedging, screwing and/or bracing.

A knee-joint endo-prosthesis is known from EP 0 442 330 B1 to have a femoral part, a meniscus element and a tibial part, the bearing surfaces of the femoral part and the tibial part bearing against associated bearing surfaces of the meniscus element.
The tibial part is firmly connected to a tibial plate, the tibial plate being anchored within the tibia bone and intended to knit together with the latter. The femoral part, tibial part and meniscus element are preferably produced from a ceramic material.

Fixation of a tibial part on a tibial plate of a knee-joint endoprosthesis

CeramTec AG Innovative Ceramic Engineering


A device for treating tissue includes a capsule extending longitudinally from a proximal end to a distal end and including a lumen extending therein and a clip slidably received within the lumen of the capsule. The clip includes a middle prong, a first outer prong and a second outer prong. The first prong is coupled to the middle prong so that the first prong is movable relative to the middle prong between a first open configuration and a first closed configuration. The second outer prong coupled to the middle prong so that the second prong is movable relative to the middle prong between a second open configuration and a second closed configuration. The first and second outer prongs are independently movable relative to the middle prong to be moved between the first and second open configurations to the first and second open configurations and the first and second closed configurations.

Physicians have become more willing to perform more aggressive interventional and therapeutic endoscopic procedures including, for example, removal of larger lesions (e.g., cancerous masses), tunneling under mucosal layers in the gastro-intestinal (GI) tract to treat tissues below the mucosa, full thickness removal of tissue, inserting devices through the GI tract and then penetrating the GI organ to treat tissue outside the GI tract, and endoscopic treatment/repair of post-surgical issues (e.g., post-surgical leaks, breakdown of surgical staple lines, anastomotic leaks). These procedures may entail an increased risk that the wall of the GI tract will be perforated, or may require closure of one or more openings intentionally formed in the GI tract wall as part of the procedure. Endoscopic closure reduces cost and may reduce the trauma and inconvenience associated with these procedures. However, conventional tissue closure devices may be insufficient to close certain perforations.