Disclosed is a technique for providing one or more virtual machines or one or more software containers provided by cloud services to manage a horticultural operation. The techniques include transmitting, from the image dispatcher service, the image data to a first computing instance that executes a first subprocess of an image processing pipeline. Using the first subprocess of the image processing pipeline, partially processed image data is generated from the image data. The partially processed image data resulting from the first subprocess is then transmitted from the first computing instance to a second computing instance that executes a second subprocess of the image processing pipeline. Thereafter, a fully image processed image associated with the image data is produced via at least the second subprocess of the image processing pipeline.

Modern industrial horticultural operations include not merely the planting, cultivation, and harvesting of plants, but performing those operations with multiple plants, conditions, greenhouses, grow operations, and people, all in different geographic locations. Accordingly, collecting and marshaling of this information towards a coherent and effective horticultural operation is difficult. Generally, a master grower regularly collects information about a horticultural operation, identifies problems, identifies solutions for those problems and applies them for remediation. This monitoring and remediation cycle may be called a horticultural feedback loop.
Specifically, because the environments surrounding different respective grow operations vary widely, and much information is spread over different locations, a collection of information for a horticultural operation is difficult. Furthermore, information collected is generally of low fidelity, of dubious provenance, untimely, incomplete, and does not lend itself for determining a course of remedial action, let alone coordinate an operation-wide response. Even where information is collected in a centralized location, the information is not in a state to perform automated hi-fidelity, and therefore accurate, diagnosis and remediation.
The techniques discussed herein allows for the collection of hi-fidelity, reliable, timely, and complete information, which in turn is used for automated diagnosis and remediation, thereby providing the ability to implement an effective horticultural operational feedback loop.

Pipelined processing of plant images for monitoring horticultural grow operations


The hologram card generates a hologram image in response to an illumination light beam. The hologram card comprises a substrate of a first plastic material having a first refractive index. The substrate has a contoured surface. The contoured surface is formed to include localized topological features constituting a diffractive optical element. The diffractive optical element is structured to generate a hologram image when illuminated by the illumination light beam. The hologram card also comprises a protective layer of a second plastic material having a second refractive index that differs from the first refractive index by less than 0.2. The protective layer covers the contoured surface of the substrate. The protective layer is chemically bonded to, and directly contacts, at least the topological features constituting the diffractive optical element.

Machine-readable hologram cards have recently been proposed for use as financial transaction cards and in other applications in which security is important. Such cards encode alpha and numeric data using multiple diffractive optical elements (DOEs). A major advantage of such encoding is that the data stored in the card cannot be read by the user, or by an unsophisticated counterfeiter.
FIG. 1A is a perspective view of a machine-readable hologram card 1. Such a machine-readable hologram card and a card reader for such a card is described in U.S. Pat. No. 4,204,638 of Laude, and by Tompkin et al. in Low-Density Diffractive Optical Memories for Document Security, 35 OPT. ENG., 2513-2518 (September 1996). In the machine-readable hologram card 1, the diffractive optical element (DOE) 3 is located on the reading surface 5 of the card. In the example shown, the data storage capacity of the card is increased using multiple DOEs arranged along the track 7.
FIG. 1B shows a cross-sectional view of a small part of a machine-readable hologram card 1 taken through part of the DOE 3. The DOE 3 includes the thin plastic substrate 17 having the irregularized diffraction grating 11 formed in its surface 13. The depth of the diffraction grating is exaggerated in the figure to show the contours of the diffraction grating more clearly. The diffraction grating is typically formed by embossing the substrate 17. The surface 13 is covered by the thin reflective layer 15. The reflective layer is normally a thin layer of metal deposited on the surface 13 before or after the surface is embossed. The DOE is affixed to the reading face 5 of the substrate 9 of the card 1 by a suitable adhesive.
FIG. 2 shows a typical card reader for reading the machine-readable hologram card shown in FIGS. 1A and 1B. A collimated light beam from the laser 21 is directed by the mirror 23 onto the DOE 3 on the reading surface 5 of the machine-readable hologram card 1. The DOE generates a hologram image by diffracting the collimated light beam. The irregularities formed in the diffraction grating 11 cause the diffraction grating to generate a number of satellite beams at characteristic angles and with characteristic intensities. A detector is provided in each of the anticipated paths of the main and satellite diffracted light beams to detect the intensity of the diffracted light beam. The detectors 25, 27, 29 and 31 are shown as examples. The electrical output levels from the detectors are analyzed by the electronic circuit 33 to determine whether the card 1 inserted into the card reader generates the correct combination of detector output levels, i.e., the same combination of output levels as that generated by a genuine card. Moreover, the absence or presence of one or more of the detector outputs may be used to represent binary data that can be extracted by the electronic circuit. The data encoded in successive DOEs disposed along the track 7 are read out by transporting the card in the direction indicated by the arrow 35.
Despite the potential for greater security offered by encoding data as DOEs, known machine-readable hologram cards are not impossible to counterfeit. The use of a limited number of discrete detectors requires that the diffraction gratings generate a relatively simple pattern of diffracted light beams. This requires that the diffraction grating itself be relatively simple. A hologram card using diffraction grating-type DOEs can be counterfeited in one of two main ways. The first main way involves cloning the DOEs taken from a valid, genuine card. The genuine DOEs are used as templates to generate masters from which multiple counterfeit DOEs and corresponding hologram cards can be manufactured.
Cloning involves delaminating the DOEs taken from a genuine hologram card to expose the diffraction grating 11 in the surface 13 of the DOE. It is possible to delaminate the conventional DOE mechanically because the adhesion between the reflective layer 15 and both the card substrate 9 and the DOE substrate 17 is relatively weak. Thus, the DOE can be simply pulled off the card substrate to expose the surface 13. Alternatively, the DOE can be delaminated chemically by dissolving the reflective layer using a chemical that does not attack the DOE substrate 17. Because the metal of the reflective layer is chemically very different from the plastic of the substrates of both the card and the DOE, finding a suitable chemical is not difficult. Once the surface 13 has been exposed, known electroplating methods can be used to derive a master from the surface 13. The master can then be used as a stamper to make the DOEs for multiple counterfeit machine-readable hologram cards using conventional embossing techniques.
The second main way of counterfeiting a machine-readable hologram card is to make the master for each DOE from scratch, and then to use a known method to derive from the master a stamper that can then be used to manufacture the DOEs for multiple counterfeit cards using conventional embossing techniques. In conventional machine-readable hologram cards that are designed to be read using the apparatus shown in FIG. 2, the diffraction gratings in the DOEs have topographical features with linear dimensions of several microns. The masters for patterns with such dimensions can be printed with sufficient resolution using high-resolution printers of the type commonly used for typesetting.
A paper by Steve McGrew entitled Countermeasures Against Hologram Counterfeiting, http://www.iea.com/.about.nli/publications/countermeasures.html, suggests that delaminating metallized holograms could be made more difficult by making the holograms "multiply connected." The paper explains that a multiple connectivity means that the hologram is composed of dots or else is punched full of holes. The figure illustrating a "multiply connected" hologram is not published. However, the description indicates that the active areas of a "multiply connected" hologram will still include an aluminum layer. Although multiply connecting the hologram will make the hologram more difficult to counterfeit, retaining the aluminum layer provides an avenue through which the embossed surface can still be accessed. Moreover, the need to pattern the aluminum layer complicates the process of manufacturing such holograms.
Accordingly, there is a need for a machine-readable hologram card with considerably higher security than known machine-readable hologram cards. The DOEs in such a card should generate a more complex hologram image than the DOEs of known hologram cards, and the more complex hologram image should be capable of easy detection. Moreover, such a card should be simple to manufacture but should be very difficult to counterfeit either by cloning or by making a master from scratch. There is also a need for an apparatus capable of reliably reading such a high-security machine-readable hologram card.

High-security machine-readable holographic card


A method and system are disclosed for operating a controller of and a RKE system to provide for short distance functions that are actuatable from a key fob at a shorter distance from the vehicle than other long distance functions. This may include receiving a desired type of radio frequency signal; actuating a high gain mode of a receiver of the controller; detecting a message from an acceptable remote keyless entry transmitter; decoding a function code portion of the message; changing the receiver from the high gain mode to a lower gain mode if the function code is not a long distance function; decoding a remaining portion of the message; determining if the remaining portion of the message was decoded properly; and performing the requested function if the remaining portion of the message was decoded properly.

The present invention relates to remote keyless entry types of systems employed with automotive vehicles.
Remote keyless entry systems are commonly used with automotive vehicles today. Such systems are including a wider range of functions that can be performed by the remote keyless entry system. For example, not only are the conventional lock, unlock, trunk release, and panic functions available, but also new functions such as remote engine start.
For certain functions, such as remote engine start, it is desirable to allow these functions to be performed while the operator is a greater distance from the vehicle than for some of the conventional functions. For example, one may wish to allow for the remote engine start, door lock, and panic alarm functions to be operable when the key fob is as far away from the vehicle as two hundred meters. To obtain this long rage functionality, the remote keyless entry system can be designed to operate at this greater distance.
Having the greater range of operation for the remote keyless entry system, however, may be undesirable for certain other remote keyless entry functions. One may wish to avoid inadvertently releasing the trunk if the trunk release button on the key fob is pressed when one is at this long range distance since he will not see or hear the trunk release. Moreover, one may not wish to inadvertently unlock the vehicle doors when at this longer range since one may be out of sight of the vehicle and thus not realize that the doors are unlocked. Accordingly, it may be undesirable for door unlock or trunk release functions to be operable from the same two hundred meter distance. Of course, the shorter range functions are still desirable for the remote keyless entry system, so operators may wish for these short-range functions to be operable only when the operator actuates the key fob at a more conventional range of, for example, about fifty meters or less.
Some have attempted to overcome this drawback by designing their remote keyless entry systems to try and detect the distance that the key fob is from the vehicle when the button is pressed, and then determine what function, if any, to perform based on this detected distance. This may be attempted by using received signal strength indicator (RSSI) circuitry. But due to environmental conditions, such as ambient radio frequency noise, this type of method can be very unrepeatable—that is, the range is not always consistently and accurately determined. Such inaccuracy may be undesirable for vehicle operators with these types of remote keyless entry systems. Thus, it is desirable to have a remote keyless entry system that allows for operation of both long-range and short-range functions, while overcoming the drawbacks of the prior art.


A system for selectively forming high-speed serial connections between various components of a network device that includes a multiplexing switch coupled a GE slot and to the high speed serial interfaces of a PHY and at least two network devices. The switch can be programmed to connect the serial interfaces of the two network modules to provide a high-speed, low-latency serial link between the two network modules. Alternatively, the serial interface of a network module can be connected to the GE slot to provide a high-speed, low-latency serial link between the network module and the GE slot.

Network devices, such as routers and switches, often utilize modules and cards to implement interfaces and ports to provide interconnectivity to other network devices and allow the network device to be configured to meet the particular requirements of a particular network node.
The network devices must provide a switching fabric to allow the transfer of data and other information between modules and cards. A common implementation of a switching fabric is a bus system, such as the PCI bus, where PCI bus defines an interface between a host CPU and a number of peripheral devices. The number of peripheral devices connected can be increased by utilizing PCI to PCI (P2P) bridges to couple PCI bus segments and extend the bus.
A single memory map applies to all the PCI bus segments so that a given memory address specifies a unique PCI bus segment and device on the segment. The PCI allows for bus masters so that, for examples, two network devices may communicate directly without CPU intervention. However, since the PCI bus system is hierarchical in the sense that communication between devices is managed by the P2P bridges and devices on different segments must be managed by multiple P2P bridges, there can be high latency when bus segments or busy and arbitration is complicated.
The CPU is the root device in the PCI hierarchy which is useful in network devices that use a centralized processing model where functions such as security processing is performed by the CPU for all network modules.
However, many network devices utilize a distributed processing model where processing is performed on the network modules without the use of the CPU to avoid latency due to the need to access the CPU and memory through multiple P2P bridges and bus segments.
The challenges in the field of switching fabrics continue to increase with demands for more and better techniques having greater flexibility and speed. Therefore, a need has arisen for a new system and method for coupling modules in a network device.

Configurable high-speed serial links between components of a network device


An implantable cardioverter defibrillator (ICD) automatically determines whether to use electrogram (EGM) signals sensed by a true bipolar electrode pair or those sensed by an integrated bipolar electrode pair. EGM signals from both the true bipolar pair and the integrated bipolar pair are simultaneously sensed and compared to determine which pair produced more accurate sensing of cardiac events. The more accurate source of EGM signals is selected and used in determining the therapy to be delivered.

The present invention relates to implantable cardioverter defibrillators (ICDs), and more particularly to an ICD that automatically determines the most effective sensing electrode configuration.
An implantable cardioverter defibrillator provides therapies for maintaining and restoring normal cardiac rhythms by pacing or by delivering electrical shock therapy for cardioverting or defibrillating the heart. The ICD is implanted pectorally, and one or more electrical leads connected to the ICD are inserted into or in proximity to the heart of the patient. The leads carry current from the ICD to the heart tissue to stimulate the heart using either low energy pacing pulses or high energy cardioversion/defibrillation shocks. The leads are also used for sensing electrogram (EGM) signals from the heart that are used by the ICD to determine therapy to be delivered.
Within the ICD, sense amplifiers coupled to the leads amplify electrogram signals from the electrodes. The amplified EGM signal is filtered, rectified, and level-detected to sense intrinsic depolarizations of the atria (referred to as P-waves) and the ventricles (referred to as R-waves).
Single chamber ICDs use a single lead placed in the right ventricle to treat ventricular arrhythmia. Dual chamber ICDs treat ventricular arrhythmia (and in some cases atrial arrhythmia as well), and include one lead placed in the right ventricle and a second lead placed in the right atrium. In some cases, a third lead may be placed to gain access to the left ventricle (e.g. in the coronary sinus).
The ICD leads include a tip electrode that is attached to the wall or surface of the heart and a ring electrode that is located on the lead but spaced a short distance from the tip electrode. The ring and tip electrodes form a bipolar electrode pair for pacing and for sensing.
A high voltage coil used for delivering a cardioversion/defibrillation shock is also located on the ventricular lead. Some right ventricular leads carry two coils, one located in the right ventricle and the other located in the superior vena cava (SVC). A high voltage shock is typically applied between one of the high voltage coils and electrically conductive housing or can of the ICD.
The tip and ring electrodes of the lead are typically used for sensing EGM signals using a true bipolar sensing configuration. In some leads, the ring electrode is not present in order to reduce the number of conductors. In that case, the high voltage coil and the tip form an EGM sensing configuration which is referred to as integrated bipolar sensing. With improved lead technology, leads having a ring electrode, a tip electrode, and one or two high voltage coils are being used to a greater extent. These leads have the capability for both true bipolar sensing or integrated bipolar sensing. Current ICDs/leads provide for just one type of sensing.
For dual chamber detection algorithms in ICDs, based upon the sensed P-waves from the atrial lead and R-waves from the ventricular lead, the ICD delivers a therapy, which can include antitachycardia pacing (ATP), cardioversion or defibrillation. The effectiveness of the ICD in treating tachyarrhythmia depends upon the ability to accurately sense P-waves and R-waves with the atrial and ventricular leads, respectively. Oversensing of R-waves can produce an erroneous identification of ventricular tachycardia or fibrillation, resulting in unnecessary and painful cardioversion/defibrillation shocks and a waste of battery energy. Conversely, undersensing of R-waves can result in failure to detect ventricular tachycardia or fibrillation, and therefore failure to provide therapy when needed.

Implantable cardioverter defibrillator with automatically adaptable sensing configuration


A computerized music apparatus utilizes resources including software modules to generate desired musical sound. In the apparatus, a primary storage is loadable with a set of software modules which are selected to perform tasks needed in generation of the desired musical sound. A central processing unit accesses the primary storage to execute the software modules stored therein to generate the musical sound. A secondary storage provisionally stores a plurality of software modules which are designed to perform a variety of tasks. A loader operates when the generation of the musical sound is initiated for selecting an effective and optimum set of software modules by searching the secondary storage according to prescribed criterion, and loads the selected software modules into the primary storage to thereby ensure effective and optimum use of the resources. Further, the computerized music apparatus is readily modified to emulate a tone generating system of a model electronic musical instrument. In the modified apparatus, an emulator operates based on device information stored in the storage for emulating a tone generating system of the model electronic musical instrument so that the emulator operates in response to event information to generate the musical tone as if sounded by the model electronic musical instrument.

The present invention relates to a computerized music apparatus which generates musical sound by loading software modules for carrying out various tasks from a secondary storage device into a primary storage device. Further, the present invention relates to a computerized music apparatus which can emulate a tone generating system of existing electronic musical instrument by extended versatility.
There are various types of electronic musical instruments including high performance products and low ability products. The conventional electronic musical instruments employ hardwares which are different a product by product, and usually, their softwares are separately developed as specific ones. Since it is troublesome to independently develop softwares for different instruments, a convenient technique is disclosed in JP-A-3-39995. The technique disclosed in JP-A-3-39995 is such that a model code to specify a desired product is registered by jumper lines or switches. A CPU of the product discriminates the model code, and executes data processing according to the code. Thus, common programs can be used for multiple products different in performance. It is possible to selectively carry out various controls such as an automatic accompaniment function is installed and performed only in a product in which this function is implemented. This function is disabled in another product in which the function is not implemented. However, the technique disclosed in JP-A-3-39995 has a drawback that the control program should be fixed in advance, and it is difficult to modify the program. For example, even if only a part of the software related to the automatic accompaniment function has to be modified, it is not easy to modify only that part. Further, in the prior art, the program commonly used in the products having different performances is stored in a primary storage, so that an unnecessary part of the program may be stored in the primary storage as well. Furthermore, common use of program modules is not considered in the prior art. For instance, many similar programs have been developed separately, and they are not compatible with each other.
Today, various types of electronic musical instruments are put in practical use, and various sound sources (musical tone generators) are known and employed in the instruments. Among current products, there are some electronic musical instruments which use the same sound source commonly. However, most of the instruments generally employ a specific sound source, which is different by a product to product. Thus, configuration of a tone generating system and a data format used in the instruments also vary by a product to product. To eliminate such an inconvenience, and to improve compatibility of the data format of performance data and timbre data, GM (General MIDI) standard is established. For example, an order of timbres specified by codes is defined in the GM standard, and a MIDI apparatus is structured to select a similar timbre even if another timbre code which is not supported in the instrument is specified according to the defined order of the timbres. However, the performance data and the timbre information created for a specific platform are often incompatible in another platform, and sometimes they cannot be reproduced perfectly on another platform. This is caused by incompatibility of a sound source hardware and else. Examples of the incompatibility are listed below:
(a) Musical tone synthesizing method employed in the sound source is different among various products. There are various synthesizing principles such as PCM, FM, and physical model. PA1 (b) Sound effector is not compatible. A sound source may accommodate various effectors such as a tone filter and a reverb circuit. If a sound source lacks the effector, it is difficult to synthesize the same sound as in another instrument. PA1 (c) Type and number of control parameters are not compatible over various sound sources. Even if similar control parameters are used in different platforms, a control range of the parameter may be limited, or cannot be altered at all. PA1 (d) Actual effect corresponding to a parameter is different due to hardware difference between platforms. The actual effect of similar digital filters (e.g. cutoff frequency) may vary over platforms due to difference in the filtering method or dimension of filtering. PA1 (e) Program of CPU to control the sound source is different. The programs may vary in its tone assignment pattern, polyphony for a tone, control timings and so on.
As described above, the conventional electronic musical instruments suffer from a lot of limitations with respect to the hardware and software construction and are poor in compatibility and versatility.

Computerized music apparatus composed of compatible software modules


System and methods are described for assisting a contractor in managing information associated with a construction project. The amount of information relating to labor, materials, scheduling and billing and the number of individuals accessing the information can be overwhelmingly large for even a simple construction project. As such, the system and methods described are particularly useful for gathering, maintaining and disseminating the voluminous amount of information associated with a construction project. In one method, a drawing from a construction project is provided that has one or more intelligent objects. Information is then gathered relating to labor, materials and schedules for the project. The information is associated with the respective intelligent object and visually represented on the drawing. The drawing is displayed and certain aspects associated with the intelligent objects can be quickly identified. In addition, reports may be generated that quickly and efficiently organize information according to any number of user selected criteria.

This invention relates generally to the field of contracting, construction and project management, and in particular to the management of materials, labor, scheduling and billing for a construction project. More specifically, the invention provides both systems and methods for assisting a contractor, supplier and/or project manager in efficiently managing and disseminating the information for a construction project.
One important aspect of a contractor's job is the effective management of an ongoing construction project, which includes the tight control of the associated costs. Since a contractor desires to present a competitive bid while still being able to produce a profit, estimates of the costs involved in completing the project need to be closely estimated. As a result, there is usually little room to deviate from the estimated costs when the work is actually performed.
Another important aspect of a contractor's job is the monitoring of the project until completion so that adjustments can be quickly made and there are no surprises at the end of the project. For example, if labor went unmonitored, the end of the project may bring with it the shocking conclusion that labor far exceeded the budgeted amount. The overrun on labor would thus affect the bottom line profitability for the project. Similar scenarios could be described for the on-time delivery of materials used in a project. An early warning on material and labor issues can greatly help prevent such surprises that affect profitability.
Such a task can be challenging because construction management involves the gathering and managing of large amounts of information from multiple sources concerning the material delivery, labor costs, scheduling of events and billing for an ongoing project. For large projects, the amount of information to capture, track and manage can be overwhelming.
A particularly time consuming aspect of a contractor's job is the gathering of data for a construction project. In a perfect world, data is captured or generated from a single source at a single location. However, a construction project is far from a perfect world. In most cases, information is captured by various unrelated data capture programs or generated from a multitude of dissimilar sources. A large number of hours can be spent and wasted gathering and organizing the information. Since data capture can be such a time consuming endeavor, it expends valuable time that a contractor could spend on other, more profitable tasks.
Hence, it would be desirable to provide systems and methods which would assist the contractor in gathering, managing, tracking and disseminating the voluminous amount of information necessary to control the profitability of a construction project. It would be further desirable if such systems and methods provided an early indication of areas of cost concern.

This patent is subject to a terminal disclaimer.

System and method for tracking and managing construction projects


A reaction apparatus for producing vapor-grown carbon fibers (VGCF) and a continuous production system for producing VGCF are disclosed. The VGCF reaction apparatus is featured in installing a plurality of holes on the upper portion of inner tubes; and filling thermally conductive material in the areas between the inner tubes and the outer tube. The continuous production system includes the reaction apparatus, a product collection system and a carrier-gas collecting system, wherein carbon fibers produced by the reaction apparatus fall into the product collection system, and in the product collection system, a collection bin full-loaded with carbon fibers is pushed out and an empty bin is pushed into the collection chamber under PLC control as well as atmosphere replacement with inert gas, thereby continuously producing VGCF.

VGCF has excellent material properties of a unique onion-ring micro-structure, a high aspect ratio, a high thermal-conductive coefficient, a low thermal-expansion coefficient, high strength, high elasticity and high corrosion resistance. In addition, carbon fibers made by the vapor-growing method can have the structure similar to the single-crystal graphite structure, thereby forming excellent multi-wall carbon tubes having excellent electrical conductivity, wherein the thermal conductivity thereof is better than that of the thermally-conductive material such as copper or aluminum. The success of VGCF study has added quite an important product to the carbon fiber industry in which OPCF (Organic Precursor Carbon Fibers) such as PAN, Pitch carbon fibers have been the major products for quite a long time.
The VGCF production process mainly uses low boiling hydrocarbon compounds as raw material (carbon source) having pyrolysis reaction in reductive carrier gas (H2) atmosphere, thus directly forming VGCF via the special catalysis of transition metals such as iron, nickel or cobalt in nano-particles thereof as nucleation, wherein the reaction temperature is between 800° C. and 1300° C. The VGCF fabrication process has the advantage that the fabrication skill is simple and does not need to perform the steps of spinning, pre-oxidation, carbonization, etc. required in the OPCF fabrication process, so that the VGCF fabrication process can form carbon fibers directly from cheap low-boiling hydrocarbon material via pyrolysis and catalysis.
Referring to FIG. 1A and FIG. 1B, FIG. 1A and FIG. 1B are schematic diagrams showing conventional VGCF reaction apparatuses respectively, wherein a conventional VGCF reaction apparatus is composed of tubular reactor and a heater 50, and the tubular reactor can be formed solely from an outer tube 40 (such as shown in FIG. 1A) or from an inner tube 30 inserted into the outer tube 40 (such as shown in FIG. 1B).
Such as the tubular reactor shown in FIG. 1A, raw material gas enters the outer tube 40 via an guide tube 10 mounted on one end of the outer tube 40, and the heat generated by the heater 50 is passes through the outer tube 40 to the gas mixture of the raw material gas and carrier gas for increasing the temperature of the gas mixture, thereby pyrolyzing the raw material gas to form carbon fibers. Thereafter, the carbon fibers generated fall into a collection bin 60. However, in the aforementioned process, the temperature near the tube wall is quite higher than the central area of the reaction tube and the situation becomes worse when the reactor diameters increase, so that aforementioned process is merely suitable for use in the tubular reactors with small diameters and is not suitable for mass production. Meanwhile, there are carbon fibers frequently attached to the tube wall, thus lowering productivity, and the reaction often needs stopping for cleaning, thus disadvantaging continuous production.
Such as the tubular reactor shown in FIG. 1B, raw material gas enters the outer tube 40 via a guide tube 10, and carrier gas (H2) enters the outer tube 40 via a gas inlet 20 mounted on one end of the outer tube 40, and inert gas enters from the bottom of the outer tube 40 as guide gas. After mixing, the raw material gas, and the carrier gas enter the inner tube 30, wherein the heat generated by the heater 50 is passed through the outer tube 40 to the inner tube 30 and then to the gas mixture of the raw material gas, the carrier gas and inert gas for increasing the temperature of the gas mixture, thereby enabling the raw material gas to be pyrolyzed to form carbon fibers. Thereafter, the carbon fibers generated fall into a collection bin 60. Generally, the inert gas passing between the inner tube 30 and the outer tube 40 is used as guide gas for reinforcing the heat transfer efficiency between the inner tube 30 and the outer tube 40. However, since the thermal conductive coefficient of the guide gas is not large, the heating efficiency of the heater 50 on the gas mixture is not good, and the energy provided by the heater 50 thus cannot be well utilized, and the VGCF formed from carbon source under inert atmosphere is inferior to that formed under pure reductive atmosphere (H2). Further, there are carbon fibers frequently attached on the tube wall of the inner tube 30 in the conventional tubular reactor, thus lowering productivity and disadvantaging continuous production due to frequent tube wall cleaning.
On the other hand, a conventional continuous production system for producing VGCF is mainly composed of a gas-supplying apparatus, a tubular reactor and a collection bin. After the carbon fibers generated fall into a collection bin and fill up the collection bin, the reaction has to be first stopped, and then a gas-swapping step is performed for replacing the carrier gas (H2) in the collection bin with inert gas (such as nitrogen) so as to prevent carrier gas from resulting in explosion. Thereafter, the collection bin is moved out and replaced with another empty collection bin. Then, after the air in the empty collection bin is expelled and replaced with inert gas, the carrier gas is introduced into the reaction system for starting another reaction cycle. Therefore, the conventional continuous production system has the following disadvantages. Besides replacing the collection bin and the atmosphere therein, a lot of manpower have to be consumed and further the reaction system has to be stopped for quite a period of time, thus resulting production interruption and lower productivity; and there is no carrier-gas recycling system, not only resulting in pollution but also increasing production cost.
Hence, there is a need to develop a reaction system for producing VGCF in a continuous manner, thereby effectively utilizing the energy provided by the heater; preventing carbon fibers from attaching to the tube wall of the inner tube; continuously collecting products (VGCF) without stopping the reaction apparatus; and effectively recycling carrier gas, thus increasing productivity; easily cleaning the reaction tubes; preventing pollution and workforce waste; and lowering production cost.

Reaction apparatus for producing vapor-grown carbon fibers and continuous production system thereof


An optoelectronic assembly having an insulating substrate with a planar surface and a metal layer bonded to the planar surface such that selected regions of the substrate are exposed and a step is produced between the substrate and a top surface of the metal layer. An active optical device is mounted on the metal layer and a passive optical device is aligned with the active device using the step as a fiduciary for positioning the former. The metal layer provides an electrical path to the active device. The thickness of the metal layer is selected such that the heat generated by the active device is dissipated, the substrate does not interfere with the propagation of light along the first optical axis, and such that the in-plane coefficient of thermal expansion (CTE) of the metal layer is constrained by the substrate. The optoelectronic assembly is also suitable for mounting active devices provided with submounts or without.

Optoelectronic components or active optical devices such as diode lasers, light-emitting diodes (LEDs) and photodiode detectors are used for printing, data storage, optical data transmission and reception, as well as pumping of high power lasers and a multitude of other applications. Optoelectronic packages are intended to provide a way for mounting passive and active optical elements and devices, as well as electrical components, in a robust structure which preserves proper alignment. Typically, an optoelectronic package includes an assembly upon which the optoelectronic components are mounted. The requirements of a package depend upon the application. In most cases, a package should provide precision alignment for the internal components, enable high speed electrical operation, provide for heat dissipation, match the coefficient of thermal expansion (CTE) between the mount and the device, and provide for simple external electrical connections and hermetic sealing. In addition, the package should be mechanically robust and be highly reliable. Clearly, satisfying all of these requirements calls for a judicious choice of materials and mounting techniques. In cases where numerous optical parts including other active devices and passive optical elements, e.g. lenses, gratings, fibers, mirrors and the like are intended to cooperate with each other, alignment of these parts with respect to each other is crucial.
These requirements have resulted in packages that are an order of magnitude-larger, costlier, and more difficult to manufacture than purely electronic packages. In fact, the cost of most optoelectronic devices is dominated by the package rather than the optical devices themselves. New optoelectronic technologies will not succeed in the marketplace if the cost of packaging remains as high as it is now.
In a laser-fiber coupler, for example, the relative positions of fibers, lenses, mirrors and lasers must be precisely adjusted and permanently fixed to maintain beam coupling efficiency. Single-mode optical fibers, for examples require optical as alignment tolerances of less than 1 .mu.m while multi-mode optical fibers require optical alignment tolerances of less than 10 .mu.m. To achieve precision alignment, the optoelectronic device is operated and monitored while the optical components are moved. The components are typically secured in place once a coarse alignment is achieved and then fine-tuned for optimal performance.
Precision alignment is complicated by the expansion and contraction of package materials during temperature fluctuations brought about primarily by the heat required to attach (solder) the individual active optical devices and variations in ambient temperature. Many prior art techniques use materials with varied coefficients of thermal expansion (CTEs). During thermal cycling the components of an optoelectronic device can drift out of alignment causing poor performance or even complete malfunction. Also, the mechanical stress produced can damage the components.
Existing packaging techniques often require that packages be manufactured individually. For example, individual constituent mechanical components of a package may be assembled into a finished device one at a time in an assembly line process. Batch processing techniques have been developed which can fabricate large numbers of optoelectronic assemblies. These techniques, however, are usually limited in their ability to manufacture a wide variety of optoelectronic devices and result in performance sacrifices. This is chiefly due to a high number of parts and a reliance on 3-D alignment. For example, conventional TO cans and high performance butterfly packages are not planar and thus their production cannot be easily automated.
The cost of present devices is further increased by the fact that optoelectronic assemblies frequently reside on substrates which need to be mounted on other substrates to produce the final package. For example, optoelectronic components mounted on silicon, a frequently-used material, must be remounted when placed in an optoelectronic package. Silicon is problematic for high-speed optoelectronic packages because it is a rather lossy dielectric. Progress in the fields of optics and electronics yields ever faster optoelectronic devices and therefore, this characteristic of silicon is limiting. Also, silicon is a brittle material susceptible to cracking and chipping, a liability in mechanically demanding applications. Further, its thermal conductivity is far lower than that of conventional heatsinks such as copper.
The teachings of U.S. Pat. Nos. 4,357,072, 4,119,363, and 4,233,619 hinge on proper placement and alignment of the optical and electronic components in three dimensions. Under these circumstances, the alignment of a fiber to a laser or the alignment of a lens to a detector is very difficult. Each component must be actively positioned, incurring all the expense associated with active alignment. Due to their design, these packages preclude the use of batch process manufacturing techniques. Also, high speed operation is problematic since these packages use numerous electrical connections and have complex geometries. Because the packages include dissimilar materials, great care is required to ensure that the differences in the CTEs of the materials do not cause misalignment during temperature fluctuations. This situation often leads package designers to compromise between heat dissipation and mechanical stability requirements.
Another disadvantage of these assemblies is the fact that they require a relatively large number of steps to fabricate. Each assembly has numerous subassemblies and, in general, one step is required for fabricating each subassembly. In turn, multiple steps and large numbers of subassemblies increase the cost, complexity and size of the package.
A technique for providing passive alignment between a plurality of diode lasers and optical fibers is described in U.S. Pat. No. 5,163,108. By forming alignment pedestals on the substrate for holding the laser chip and grooves in the substrate for holding optical fibers, simple alignment is accomplished. Unfortunately, this technique is limited because it does not provide an adaptable method for including other optical components such as lenses or mirrors. Further, the technique does not provide for enhanced heat dissipation for active elements generating large amounts of heat.
U.S. Pat. No. 5,123,074 describes a substrate for mounting active and passive optical elements and optical components. The substrate is made of an insulating block with metal regions formed for electrical connections and for mounting components. A reversed structure with a metal block and insulating regions is also described. Electrical circuits are formed on the insulating regions with the metal regions serving as bonding pads for the optical hardware. In the embodiment with an underlying metal block, the metal block acts as a ground plane, enhancing the high speed electrical characteristics of the substrate. The surfaces of the metal and insulating regions of the substrate lie in one plane, so that the substrate provides no mechanical alignment. Thus, this invention has the disadvantage of requiring the components to be actively aligned. Also, since the surface of the substrate is a single plane, different components cannot be mounted at different heights to allow for optical alignment.
U.S. Pat. No. 4,926,545 discloses a batch process for manufacturing optoelectronic assemblies. The assemblies can provide passive alignment or simplified active alignment for optoelectronic and optical components. The device includes metalization patterns for aiding alignment. The metalization patterns act as visual alignment aids for the placement of components. A problem with this device is that it uses silicon and therefore has all the disadvantages associated with silicon optoelectronic substrates. In addition, the process only provides for device positioning in which the optical axes are perpendicular to the substrate. This limits the ability of an optoelectronic circuit designer since orienting the optical axes parallel to the substrate allows one to design more complex optoelectronic circuits in a smaller space.
U.S. Pat. No. 5,119,448 discloses a method of making a substrate for mounting optical components by forming relief structures into the surface of the substrate. The relief structures provide mechanical alignment for the components. This method is primarily concerned with mounting fiber arrays and using such fiber arrays as sensors. No provisions are made for incorporating active optoelectronic components such as lasers and using the substrate as an optoelectronic assembly. Further, this method does not yield an optoelectronic package, or assembly for a package, and requires at least two patterning steps.
In the prior art, no single optoelectronic packaging technique offers the simultaneous advantages of high speed electrical operation, adaptability to produce various optoelectronic devices, adaptability to batch processing, effective heat dissipation and resistance to misalignment caused by changes in temperature. Yet a combination of these characteristics is very desirable for further progress in the field of optoelectronic packaging and circuit design.

Optoelectronic assembly and method of making the same


A circuit utilizing memcapacitive elements for mixed memory storage and polymorphic computing is introduced. The circuit includes a plurality of memory cells each selectively or fixedly connected to a word line, bit line and dual bit line. Each memory cell includes a memcapacitive element. Voltage pulse generators can selectively applying voltage pulses to the memory cells. A method for mixed memory storage and polymorphic computing in at least two memory cells is provided. Data is stored by selectively applying voltage pulses to an individual memory cell to set an internal charge level of the memcapacitive element. Logic functions are conducted by applying voltage pulses having independent amplitudes to at least two memory cells to achieve internal charges in the memcapacitive elements of the cells to store an output bit according to a logic map that depends upon applied independent voltage pulse amplitudes.

Most modern computing systems follow the so-called Von Neumann architecture. This architecture separates memory, control and logic. This widely successful model includes inherent performance limits that researchers have recently sought to overcome. Quantum computing represents one branch of research that seeks to provide massive parallelism in departure from the traditional model. Practical quantum computing systems still have many technological hurdles to overcome, and large scale quantum computing schemes have not yet been demonstrated to outperform traditional CMOS large scale integrations.
Memristors have been attracted a lot of attention due to the prospects of non-volatile information storage. See, Chua, L. O. & Kang, S. M., "Memristive devices and systems. Proc. IEEE 64, 209-223 (1976); the International Technology Roadmap for Semiconductors, 2011 Edition (http://www.itrs.net/). Memristors have been recently proposed to enable "stateful" logic operations via material implication. See, J. Borghetti et. al., "'Memristive switches enable 'stateful' logic operations via material implication," Nature, 464, 873, (2010). Memristive based systems employ intrinsically dissipative memristive devices, which consume power at a very high level.
Recent efforts, including research by some of the present inventors and colleagues, have provided information storage based upon capacitors or inductors with memory (together with memristors collectively called memelements). See, Di Ventra, M., Pershin, Y. V. & Chua, L. O., "Circuit elements with memory: memristors, memcapacitive systems and meminductors," Proceedings of the IEEE 97, 1717-24 (2009). Computation has been demonstrated only with memristors (but not memcapacitors or meminductors) as stated in the previous paragraph where J. Borghetti et. al. has been cited. The computation demonstrate with the memristors was limited only to the logic operation "IMP" (material implication).
Some of memelements are readily fabricated with current technology and can be integrated with CMOS. Pershin, Y. V. & Di Ventra, M., "Memory effects in complex materials and nanoscale systems," Advances in Physics 60, 145-227 (2011); Jo, S. H., Kim, K-H. & Lu, W., "High-Density Crossbar Arrays Based on a Si Memristive System,". Nano Lett. 9, 870874 (2009). These past efforts focused mainly on models and realizations of memcapacitors and meminductors but fail to provide any basis for computing (including binary logic operations) based on these elements.

Circuit for mixed memory storage and polymorphic logic computing

The Regents of the University of California


A bed mattress provides a zippered border attachment providing access to a hidden compartment on the interior of the mattress. The border may be completely or partially separable from the top mattress cover to allow inspection of the spring unit or to access the interior space of the mattress. In the all-around zipper construction of one preferred embodiment, the outer covers are pre-assembled without expensive machinery and allow a large inventory to be maintained comprising different mattress components. The hidden compartment preferably has its own zipper closure and may be formed to have two or more inner pockets. A pair of handles may be provided on the exterior of the border at about the ends of the pocket to overlap the pocket seams and help hide the presence of the compartment.

The present invention relates to a type of bed mattress and a method of constructing same, and in particular to a mattress which allows an end user to access the interior of the mattress.
The conventional inner construction of present bed mattresses includes an inner coil spring unit surrounded on the top and bottom by padding which provides a barrier and cushion against the metal springs. In better quality mattresses a wire grid is further provided as a barrier between the padding and the spring unit. The padding is then padded on its top and bottom by layers of foam, cotton, and other materials. The typical outer construction of a mattress includes a top and bottom cover, and a border which surrounds the four sides or perimeter of the spring unit. The covers and border are usually quilted fabric available in a variety of colors and print patterns, thus providing the initial aesthetic appeal to the customer.
A flange formed by a strip of strong fabric is attached to the boundaries or peripheries of the top and bottom covers prior to the final assembly of the mattress. The top and bottom flanges extend over the side edges of the spring unit and are anchored to the springs using metal rings, commonly referred to as "hog rings". The flanges fix the padded layers in place on the top and bottom of the spring unit, so that during prolonged use the various layers are not dislodged. The flanges also serve to resist the tensile forces around the perimeter of the bed resulting from a body resting on top of the mattress.
A specialized tape edge machine, mounted on a special table, is used to attach the border to the top and bottom covers after the flanges of the covers have been attached to the spring unit. Wads of cotton material are often inserted just prior to the covers' attachment in order to round and pad the corners of the mattress. Also, stiffening members may be affixed to upper and lower border rods along the mattress sides prior to final assembly, for people who sit on the edge of the bed and require extra support therein.
In the final assembly of the mattress, a decorative tape is folded over the raw edges of the cover, flange, and border materials by an operator. The operator must manually position the tape over the raw edges while walking backward, as the machine moves around the mattress and stitches the tape to form a welt around the mattress perimeter. This is done for the top cover attachment to the border, and also for the bottom cover attachment to the border. The tape edge machine and its required components are quite costly, and a highly skilled operator is required to produce quality mattresses.
There are some fold-away mattresses for sofa beds or Murphy (wall) beds which use a "bucket" construction. In this construction only a top cover has a flange which is anchored to an inner spring unit. A bottom cover and border are sewn together and the inner spring unit placed within. The tape edge machine is then used to attach the top cover to the top of the border. Even less expensive fold-away mattresses may use a foam unit within the bucket construction and completely omit the use of flanges. However, none of these fold-away mattresses allow access to the interior after final assembly of the mattress.
The flange construction also does not apply to water beds, where an outer cover may be separately constructed and then attached over the water mattress without the special machinery and technique described above. This is because the typical water bed mattress has a foam border construction which provides the functions of fixation and force resistance that flanges provide. That is, water beds do not require flanges and therefore do not require the special machinery or skilled labor.
There also are mattresses presently available which allow the top cover to be reversed, although this still does not provide access to the interior. Velcro or other such means is provided on the top of an upper mattress cover, over which a separable panel is placed. This panel may be padded or quilted, or a thick wool material may be attached on one side. This reversible construction is an additional feature that is independent of the attachment of the mattress outer covers during final assembly.
Most of the components for bed mattresses, such as the quilted material, foam, padded layers, and spring units are readily available from several sources. In fact, many mattress manufacturers simply obtain these components and perform only the flange and border attaching procedures on site. That is, the manufacturers provide only the final assembly of the mattresses.
However, because of limited storage space and for inventory control, only certain combinations of springs/padding/foam/quilted covers are usually maintained by each manufacturer. These are usually stored in intermediate stages of assembly, so that customization of a mattress--i.e., using a different padding or quilted cover requires a lengthy wait to fulfill the custom order. Thus, consumers are quite limited in the immediate selection afforded by the present mattress manufacturers and retailers, unless a great amount of time and money is willing to be spent to obtain the ideal mattress construction.
Not only is the customer limited in his choice from what is available from a particular dealer, as either a custom order or from stock, the customer must take the salesperson's word that the interior construction of the mattress the customer takes home is the same as the mattress displayed in the store. That is because the inner construction of the mattress is obscured once final assembly of the border to the top and bottom covers is completed, so that the consumer is blind as to the actual construction of both the store's displayed mattresses and his own mattress once it is at his home. While the outer covers are easily verified, at least for the color/pattern and quilting style, the true worth--and cost--of the mattress is in the padding and spring unit construction which are the most important elements for restful sleep and for durability.
A further problem with present mattresses is that any moisture absorbed by the mattress results in time spent drying the mattress, as well as possible mildew or other lingering odors. The moisture may be from a spilled glass of water, or a buildup of normal bodily secretions over time. Two ways presently used to avoid or reduce wetness and odor are the use of waterproof sheets and the presence of vent holes on the sides of the mattress. The sheets prevent moisture from being absorbed by the mattress, but only if positioned over all possible areas of wetness. The vent holes allow some ventilation of the interior of the mattress to speed drying somewhat, but may not completely prevent odors from resulting.


The transmission power of a cellular mobile telephone is adjusted as a function of received power information. The celluar mobile telephone is equipped with a variable-gain amplifier that covers the transmission power range, and the gain and supply voltage of the amplifier are tuned as a function of the received power information.

In a wireless communication system, a base station communicates with a plurality of remote terminals, such as cellular mobile telephones. Frequency division multiple access (FDMA) and time division multiple access (TDMA) are the traditional multiple access schemes for delivering simultaneous services to a number of terminals. The basic idea underlying the FDMA and TDMA systems is sharing the available resource in such a way that several terminals can operate simultaneously without causing interference. For an FDMA system several frequencies are shared, and for a TDMA system several time intervals are shared.
Telephones operating according to the GSM standard belong to the FDMA and TDMA systems in the sense that transmission and reception are performed at different frequencies and also at different time intervals.
In contrast to these systems using frequency division or time division, the CDMA (Code Division Multiple Access) systems allow multiple users to share a common frequency and a common time channel by using coded modulation. CDMA systems include the CDMA 2000 system, the WCDMA system (Wide Band CDMA) and the IS-95 standard.
In CDMA systems, as is well known to the person skilled in the art, a scrambling code is associated with each base station, and this makes it possible to distinguish one base station from another. Furthermore, an orthogonal code, known by the person skilled in the art as an OVSF code, is allotted to each remote terminal (such as for a cellular mobile telephone, for example). All the OVSF codes are mutually orthogonal, thus making it possible to distinguish one remote terminal from another.
Before sending a signal over the transmission channel to a remote terminal, the signal has been scrambled and spread by the base station using the scrambling code of the base station and the OVSF code of the remote terminal. In CDMA systems, it is again possible to distinguish between those which use a distinct frequency for transmission and reception (CDMA-FDD system) and those which use a common frequency for transmission and reception, but distinct time domains for transmission and reception (CDMA-TDD system).
The invention applies advantageously to communication systems of the CDMA type, and more particularly to systems of the CDMA-FDD type. The invention applies also to communication systems of the FDMA and TDMA type, in particular to GSM and GPRS telephones, and more generally to terminals operating according to the UMTS standard which must be capable of operating both under a CDMA system, like the WCDMA system, and under the FDMA and TDMA systems, for example.
In remote terminals, such as cellular mobile telephones, there is currently provided a single power amplifier for transmission. This power amplifier has a wide radio frequency power operating range. Also, in CDMA-FDD systems, the power amplifier is operating continuously during the communications.
Moreover, the transmission power delivered by the power amplifier can vary within a predetermined range of powers, typically from −50 dBm to 24 dBm for third-generation mobile telephones. In this power range, the transmission power is adjusted as a function of power information received regularly by the telephone and originating from the base station.
At present, the power amplifier is designed in such a way as to exhibit the greatest effectiveness for the maximum transmission power. For intermediate or low power, there is significant deterioration in the effectiveness since the quiescent current of the power amplifier does not change, while the power transmitted decreases. Thus, in these modes of operation at low or intermediate power, the effectiveness, that is, the efficiency, drastically decreases to less than a percent. This results in a loss of energy at the level of the battery, thereby reducing its lifetime.

Process and device for monitoring the transmission power of a mobile terminal, for example a cellular mobile telephone, in particular capable of operating according to the UMTS standard


An electronic rhythm instrument having two or more rhythm switches which correspond to rhythmical sounds, and which generates rhythmical sounds corresponding to the rhythm switch operated. In the electronic rhythm instrument, one of the rhythmical sounds can be assigned commonly to a plurality of the rhythm switches, and further, a tone pitch and/or a tone volume can be assigned to each rhythm switch to which one of the rhythmical sounds is assigned commonly when a primary mode is selected. After the assignment, when a secondary mode is selected and one of the rhythm switches is operated, the preassigned rhythmical sound having the tone pitch and/or the tone volume assigned to the operated rhythm switch can be generated. The present invention can assign a tone-pitch scale and/or a tone-volume scale to a number of rhythm switches. When the tone-pitch scale is assigned to the rhythm switches, a melody can be produced according to the tone-pitch scale. When the tone-volume scale is assigned to the rhythm switches, a more expressive percussion performance is achieved than in a conventional instrument.

1. Field of the Invention
The present invention relates to electronic rhythm instruments which can generate rhythmical sounds when rhythm switches on a panel are operated.
2. Prior Art
A conventional rhythm instrument is described in the U.S. Pat. No. 4,672,876. In this rhythm instrument, each key on the keyboards is used as a rhythm switch. For example, each rhythmical sound, such as that of tom-toms, and bass drum, etc., is assigned to one of the keys on the upper keyboard, and when one of the keys is depressed, the rhythmical sound assigned to the key is produced. Moreover, a function to assign a rhythmical sound to a desired key on the lower keyboard is provided for. This makes it possible for a performer to reassign rhythmical sounds to keys most convenient to the performer. The rhythm performance by means of rhythm switches (i.e., keys on the keyboards) is called hand-percussion.
However, the conventional instrument is not provided with a function to control tone pitches o tone volumes of the rhythmical sounds.

Electronic rhythm instrument with tone pitch and tone volume control


Parallel training of a machine learning model on a computerized system is described. Computing tasks of a system can be assigned to multiple workers of the system. Training data can be accessed. The machine learning model is trained, whereby the training data accessed are dynamically partitioned across the workers of the system by shuffling subsets of the training data through the workers. As a result, different subsets of the training data are used by the workers over time as training proceeds. Related computerized systems and computer program products are also provided.

The present disclosure relates in general to the field of computer-implemented methods and systems enabling parallel training of machine learning models such as generalized linear models. In particular, the present disclosure is directed to methods aiming at improving the convergence of the parallel training algorithm.
Today's individual computerized machines often offer dozens of cores and hundreds of gigabytes of random access memory (RAM) that can, if used efficiently, significantly contribute to improve training performance of machine learning models. In this respect parallel versions of popular machine learning algorithms such a stochastic gradient descent and stochastic coordinate descent have been developed. These methods introduce asynchronicity into the sequential algorithms in order to enable parallelization and better utilization of compute resources.

Parallel training of machine learning models

International Business Machines Corporation


A resin-coated aluminum alloy sheet material for an aluminum electrolytic capacitor case includes a resin layer that contains wax composed of at least one of polyethylene wax and carnauba wax, and has a thickness falling within a range from at least 2 μm to at most 22 μm. A total of lengths of wax particles, defined when the wax particles are cut along a straight line of 100 μm optionally drawn on the surface of the resin layer, is at least 10 μm. A number of the wax particles, featured by a cross-sectional shape having a size of at most 80% of the thickness of the resin layer and of at least 0.1 μm, is from at least 3 to at most 50. A number of the wax particles, featured by a cross-sectional shape featured by a major axis extent having a size of more than 80% of the thickness of the resin layer is less than 10.

Recently, a resin-coated aluminum alloy sheet material, which does not need an insulative resin-coating process after a formation process, is used as a material for an aluminum electrolytic capacitor case. Due to the fact that this aluminum electrolytic capacitor case material is subjected to a severe formation process including a combination of a deep drawing and an ironing, if a usual resin-coated aluminum alloy sheet material for buildings or the like is used instead, cracks, peelings and so forth occur in the resin layer thereof, and thus a sufficient insulative property can not be ensured. Also, a formation process using a volatile press oil, which does not need a solvent degreasing process, prevails in order to obey the recent regulation of solvent, and thus requires a higher formability in comparison with a conventional formation process using a high viscosity oil.
On the other hand, it is well known that addition of a solid lubricant such as wax is effective in improving a formability of a resin-coated aluminum alloy sheet material. In a case where a resin layer is formed by a coating process, when wax is added to a coating material, a part (or all) of the wax cures in the state of existing on a surface of the resin layer due to the fact that the wax generally features a smaller surface energy than that of a base resin as a main component of the resin layer. When the resin-coated aluminum alloy sheet material so produced is subjected to a press formation process, the wax existing on the surface of the resin layer acts as a lubricant, and thus a press tool can smoothly slide on the surface of the resin layer so that cracks or peelings can not easily occur in the resin layer during the press formation process.
Then, a production method for a resin-coated aluminum alloy sheet material, featuring addition of wax for an improvement of the formability, has been proposed.
For example, Patent Document 1 discloses a coated metal web featuring a superior formability to an ironing, wherein, in the coated metal web material containing inner wax for a multi-stage ironing formation, regarding wax particles observed in a direction of a cross-section of a coated layer by a transmission electron microscope, a cross-sectional area of the wax particles, existing in a depth measured from the uppermost surface of a coated layer to a distance of (100−Ya)×Z/100) before an a-th formation stage, is at least 3%: Ya % is a reduction rate of a thickness of the coated layer when it is subjected to the a-th formation stage; and Z(μm) is a thickness of the coated layer before it is subjected to the a-th formation stage.
Also, Patent Document 2 discloses a production method for producing aluminum alloy sheet material for can end, wherein a coating process for coating a metal sheet with a coating material containing wax is carried out in such a manner that a temperature of the metal sheet is controlled at 110° C. after 5 seconds from the start of the coating process, and that it is then controlled at most 180° C. after 10 seconds from the start of the coating process.
The above-mentioned methods are directed to an improvement of the formability by giving a surface of a resin layer a superior lubricant property, and by making a press tool smoothly slide thereon. On the other hand, by giving a resin layer a large stretchability, progress a followingability of the resin layer to deformation of an aluminum alloy sheet material is also effective in the improvement of the formability. As a measure to give the resin layer the large stretchability, increasing a molecular weight of a base resin material of the resin layer is included.
As an example of the improvement of the formability by controlling a molecular weight of epoxy-series resin, for example, Patent Document 3 discloses a resin-coated aluminum alloy sheet material for a capacitor case, which is characterized by the fact that a resin material of the resin layer includes an epoxy-series resin as a main component, and at least one or no less than two resin materials selected from the group consisting of a phenolic resin, an acrylic resin, a urethane resin and a urea resin, features a number average molecular weight falling within a range from 5,000 to 30,000, and contains a lubricant of 0.1 to 10 weight parts per 100 weight pats of the resin, the tensile strength of the resin layer being at least 40 N/mm2, the elongation of the resin layer being at least 2%, the thickness of the resin layer falling within a range from 3 μm to 30 μm, and that a cross-cut survival rate in a cross-cut test is at least 60% when the resin-coated aluminum alloy sheet material is rolled at a rolling ratio of 40%. (Note: in this document, it is stated that a more preferable range for the number average molecular weight is from 10,000 to 20,000.)
Also, Patent Document 4 discloses a lubricated steel sheet for cans which is excellent in a drawing/ironing formability, wherein a surface of the lubricated steel sheet, which is defined as an inner wall face of a can, is coated with a coating composition composed of an epoxy resin featuring an number average molecular weight falling within a range from 2,000 to 100,000 and an epoxy equivalent weight falling within a range from 1,500 to 50,000, and wax featuring a softening point of at least 30° C., so that a coated layer is formed on the inner wall surface in a dry-coating weight falling within a range from 10-85 mg/100 cm2, the coated layer having a coefficient of dynamic friction falling within a range from 0.03 to 0.20 at the temperature of 60° C., and a pencil hardness of at least "H" at the temperature of 60° C. In Patent Document 4, it is stated that a more preferable range for the average molecular weight is from 3,000 to 70,000, and it is specified in a sub-claim that the wax is composed of at least one kind of wax selected from the group consisting of esters of fatty acid-series wax, fluorine-series wax, polyolefin-series wax, lanolin-series wax, montan wax, microcrystalline wax and carnauba wax.    Patent Document 1: JP-2005-288980 A    Patent Document 2: JP-H11-244778 A    Patent Document 3: JP-2006-334917 A    Patent Document 4: JP-2004-314415 A

Resin-coated aluminum alloy sheet material for aluminum electrolytic capacitor case, case for aluminum electrolytic capacitor, and aluminum electrolytic capacitor


Disclosed is a real-image object optical system 20, which is provided on the eyepiece optical system 28 side from the light path combining element 13, a first liquid crystal shutter 40 is provided for permitting/prohibiting incidence of light from the range finder window 31 to the object optical system, and a second liquid crystal shutter is provided in the vicinity of the image forming plane IM of the object optical system 20 for switching the light transmission range between the full range and a partial range, and by coupling and switching these elements, a superimposed full image and double image are caused to appear using a persistence of vision effect in the eye of the camera user.

The present invention relates to a range finder system utilizing superimposed two images.
A conventional range finder is provided with a first window and a second window which are separated by a predetermined base line length distance. Light entered through the first and second windows is combined by a half mirror and is directed to a common eyepiece optical system. The camera user observes superimposed two images of an object via the eyepiece optical system. Between the first window and the half mirror, there is provided a rotatable mirror which deflects incident light such that the degree of superimposition of the two images changes in the direction of the base line. The distance to the object is determined from the angle of rotation of the rotatable mirror when the two images of the-object coincident.
In particular, in an interlocking type range finder, movement of the photographing lens is interlocked with rotation of the rotatable mirror such that the photographing lens focuses on the object when the two object images coincide.
Conventionally, two types of such a coincidence type range finder are known. In a first type, depending on the positional relationship between the objective lens and the half mirror, two objective lenses are provided respectively on two light paths an the object side of the half mirror. In the second type, a single virtual image type objective lens is provided on the eyepiece lens side of the half mirror.
In first type, especially when the objective lens forms a real image, the outline of each of the superimposed two images is clearly observable, and accordingly a clear field of view can be obtained. However, the first type of range finder system has the drawback of relatively high manufacturing costs, since it includes a large number of components and takes time to assemble.
In the second type, on the other hand, the number of component parts is greatly reduced, compared to the first type, and assembly thereof is easier, thus making it possible to reduce manufacturing costs. However, the second type of finder has a drawback in that, since the half mirror is positioned on the object side of the virtual image objective lens, the area of the half mirror will be relatively large, and if the objective lens is a zoom lens, the range in which the images are superimposed is formed and the unclearness of the image outline within this range will change with zooming of the lens, and there will be a significant drop in resolution especially when the zoom lens is located closer to a tele-photo side.


An anti-jamming design for a stapler track provides reduced force to shear a staple from a rack of staples. In stapling, a front staple must be separated from a rack of staples to eject the staple out. Conventional staplers shear the glue that holds the staples together all at once, so the peak force to separate the staple is high. In the present invention the glue that holds staples together in a rack is sheared by a peeling action. Locally progressing sections of glue are peeled as the front staple is sheared from the adjacent second staple. According to one embodiment of the invention progressive shearing is provided by an asymmetric track front end, whereby the front staples are fully supported on one side only so that the staple rack twists as the striker slowly presses down. The striker contacts the supported, higher, side of the staple first and the staple begins to shear from this higher side. When used in a low force spring actuated stapler, the present invention prevents the striker from resting atop the staple in an energized state if the stapling cycle is not properly completed.

For consumer applications staples are used in both staple guns and desktop staplers. Both may be referred to as staplers. Staple guns usually employ a heavier staple and stapling mechanism than desktop staplers, and do not include a separate base and anvil element. However desktop staplers may also be of a heavy-duty format if intended for large stacks of paper. Standard light duty staplers typically fasten a maximum of 20 sheets of paper.
The staples are provided in a rack that includes a line of staples glued together edge-to-edge. The strength of the glue must be sufficient to hold the rack together during handling and use of the staples. The staples are held in or on a track; a front most staple extends past the track to a position under a striker. The striker shears off the front staple so that the staple can be ejected out if the stapler. The glue that holds the rack together must not be too strong or it will require excessive force to separate the front staple by shearing. The consistency of the glue that holds the staples in the rack is an important part of manufacturing staples.
In a direct action stapler, where a handle is directly linked to the striker, a user must directly overcome the staple rack glue shear force needed to separate the front staple. Direct action is typical in desktop staplers. The shear force can be a large part of the apparent effort of such stapling. In a spring-actuated stapler the impact action makes the user unaware of the shearing step of ejecting a staple. The fast moving spring is plenty strong enough to overcome the shear strength of the glue. In any spring actuated stapler the energy of the striker after it released is far more than required for shearing a normal staple.
Co-pending U.S. patent application Ser. No. 10/443,854 shows a light duty spring actuated desktop stapler. The disclosure is incorporated herein in its entirety by reference. In a light duty spring actuated desktop stapler the spring may not be strong enough to shear the staple if the handle is not pressed far enough to release the striker. In this case the striker has no momentum, but rather presses the staple with just the static force generated from deflection of the spring. The design of the above referenced application is very efficient. This of course is desirable to make an easy to operate stapler. However it means that the static force of the deflected spring will be particularly low since a less stiff spring is needed in the efficient design. If the spring cannot shear the front staple with static force, then the striker will remain atop the front staple with the spring energized. In this condition the device may be non-functional until the staple is ejected. Further the staple may eject unexpectedly.
It is desirable to reduce the force required to shear the front staple from a rack.

Jam resistant staple holding track for staplers


A container for a vehicle interior has a base body in which at least one compartment is formed and a lid for at least partially closing the compartment and movable between a closed position and an open position. An actuator biases the lid into the open position and a latch can retain it in the closed position. A first brake associated with the actuator retards movement of the lid during movement of the lid from the closed into the opened position. A second brake further retards movement of the lid in only a limited end portion of its movement into the open position.

A compartment with a roller shutter lid is described in EP 1 591 317. The roller shutter lid is provided with an elastically deformable spring membrane. The roller shutter lid is guided in guides having a curvature in one limited portion. As a result of the curvature, a force is exerted on the spring membrane of the roller shutter lid in the opening or closing direction.
DE 10 2008 018 557 describes a storage compartment with a roller shutter lid. An elastic element urges the roller shutter lid in the opening direction.
DE 10 2006 020 264 describes a compartment with a lid for the interior of a vehicle. A roller spring biases the lid in the open position.

Storage container for motor-vehicle interior


A method and apparatus are provided for processing far jump-call branch instructions within a processor in a manner which reduces the number of stalls of the processor pipeline. The processor includes an apparatus, for providing a fallback far jump-call speculative target address that corresponds to a current far jump-call branch instruction. The microprocessor apparatus includes a far jump-call branch target buffer and a fallback speculative target address generator. The far jump-call branch target buffer stores a plurality of code segment bases and offsets corresponding to a plurality of previously executed far jump-call branch instructions, and determines if a hit for the current far jump-call branch instruction is contained therein. The fallback speculative target address generator is coupled to the far jump-call branch target buffer. In the event of a miss in the far jump-call branch target buffer, the fall back speculative target address generator generates the fallback far jump-call speculative target address from a current code segment base and a target offset, the target offset corresponding to the current far jump-call branch instruction.

1. Field of the Invention
This invention relates in general to the field of microprocessors, and more particularly to a method and apparatus for performing branch prediction on far jump and far call instructions.
2. Description of the Related Art
In information handling systems computer instructions are typically stored in successive addressable locations within a memory. When processed by a Central Processing Unit (CPU), the instructions are fetched from these consecutive memory locations and executed. Each time an instruction is fetched from memory, a program counter within the CPU is incremented so that it contains the address of the next instruction in the sequence. This is the instruction pointer or IP. Fetching of an instruction, incrementing of the program counter, and execution of the instruction continue linearly through memory until a program control instruction such as a jump on condition, a non-conditional jump or a call instruction is encountered.
A program control instruction, when executed, changes the address in the program counter and causes the flow of control to be altered. In other words, program control instructions specify conditions for altering the contents of the program counter. The change in the value of the program counter as a result of the execution of a program control instruction causes a break in the otherwise successive sequence of instruction execution. This is an important feature in digital computers since it provides control over the flow of program execution and a capability for branching to different portions of a program. Examples of program control instructions include Jump, Test and Jump conditionally, Call, and Return, which are also called branch instructions.
A Jump instruction causes the CPU to unconditionally change the contents of the program counter to a specific value, i.e., to the target address for the instruction where the program is to continue execution. A Test and Jump instruction conditionally causes the CPU to test the contents of a status register, or possibly compare two values, and either continues sequential execution or jumps to a new address, called the target address, based on the outcome of the test or comparison. A Call instruction causes the CPU to unconditionally jump to a new target address, but also saves the value of the program counter to allow the CPU to return to the program location it is leaving. A Return instruction causes the CPU to retrieve the value of the program counter that was saved by the last Call instruction, and return program flow back to the retrieved instruction address.
In early microprocessors, execution of program control instructions did not impose significant processing delays because such microprocessors were designed to execute only one instruction at a time. If the instruction being executed was a program control instruction, by the end of execution the microprocessor would know whether it should branch, and if it was supposed to branch, it would know the target address of the branch. Thus, whether the next instruction was sequential, or the result of a branch, it would be fetched and executed without significant delay.
However, modern microprocessors are not so simple. Rather, it is common for modern microprocessors to operate on several instructions at the same time within different blocks or pipeline stages of the microprocessor. Hennessy and Patterson define pipelining as, "an implementation technique whereby multiple instructions are overlapped in execution." Computer Architecture: A Quantitative Approach, second edition, by John L. Hennessy and David A. Patterson, Morgan Kaufmann Publishers, San Francisco, Calif., 1996. The authors go on to provide the following excellent illustration of pipelining:
"A pipeline is like an assembly line. In an automobile assembly line, there are many steps, each contributing something to the construction of the car. Each step operates in parallel with the other steps, though on a different car. In a computer pipeline, each step in the pipeline completes a part of an instruction. Like the assembly line, different steps are completing different parts of the different instructions in parallel. Each of these steps is called a pipe stage or a pipe segment. The stages are connected one to the next to form a pipe—instructions enter at one end, progress through the stages, and exit at the other end, just as cars would in an assembly line."
Thus, after instructions are fetched, they are introduced into one end of the pipeline. Then they proceed through pipeline stages within a microprocessor until they complete execution. In such pipelined microprocessors it is often not known whether a branch instruction will alter program flow until the instruction reaches a late stage in the pipeline. But, by this time, the microprocessor has already fetched other instructions and is executing them in earlier stages of the pipeline. If a branch causes a change in program flow, all of the instructions in the pipeline that followed the branch must be thrown out or flushed. In addition, the instruction specified by the target address of the branch instruction must be fetched. Throwing out the intermediate instructions and fetching the instruction at the target address creates processing delays in such pipelined microprocessors. To alleviate this delay problem, many pipelined microprocessors use branch prediction mechanisms in an early stage of the pipeline that predict the outcome of branch instructions, and then fetch subsequent instructions according to the branch prediction.
If the branch prediction logic correctly predicts the outcome of the branch then process flow continues forward from the target address of the branch taken. However, if the branch prediction logic incorrectly predicts the outcome of the branch, then the entire pipeline must be flushed and execution starts anew from the branch instruction forward. Branch mispredictions and the resultant flushing of the pipeline are undesirable due to the amount of time lost in restarting the pipeline at the resolved target address of the mispredicted branch.
As mentioned earlier, conditional or non-conditional branches are implemented by jump instructions. Jump instructions to an address within the same data segment as the jump instruction are called near jumps, while jump instructions to an address in a different data segment are called far jumps. Similarly, calls to an address within the same data segment as the call instruction are designated as near calls, while call instructions to an address in a different data segment are called far calls.
In conventional X86 pipeline microprocessors, the pipeline is flushed and refilled whenever a far jump or far call instruction is executed. This flushing action effectively slows down the operation of the microprocessor. In more detail, the execution of a far jump or far call instruction requires that a new code segment descriptor be loaded into the code segment descriptor register of the microprocessor. The term "far jump-call" is used collectively herein to indicate a far jump or far call instruction. The far jump-call instruction prescribes the new code segment descriptor along with an offset. This code segment descriptor includes a new code segment base address to which the offset is added to determine the far jump-call target address. Once this target address has been computed, it is provided to the next instruction pointer so that subsequent instructions beginning at the target address can be fetched and executed by the pipeline.
Current x86 pipeline processors either 1) do not perform any type of speculative branch for far jump-calls at all, or they 2) utilize a branch target buffer (BTB) for predicting far jump target addresses. In the 1st scenario, the new code segment descriptor corresponding to the segment of the far call instruction is loaded from memory and the target address of the far call is calculated when the far jump is executed, typically in a later pipeline stage. Unfortunately, in this scenario far jumps incur a penalty that is roughly equivalent to the number of stages in the pipeline between the stage where the far jump instruction is fetched and the stage where it is resolved. For pipeline microprocessor having only a few stages, the penalties associated with stalling the pipeline until resolution at a later stage are not sufficiently serious to merit any type of speculative branch logic for far jumps/calls. However, to increase microprocessor throughput, designers continue to decompose the pipeline logic into increasingly more stages. Hence, to provide no far jump prediction at all in a modern pipeline microprocessor will result in excessive pipeline delays associated with the execution of far jump-call instructions.
In the 2nd scenario, the branch target buffer (BTB) provides a small array in an early pipeline stage into which is stored the code segment base entries corresponding to the N most recently executed instructions (wherein N is an integer). The offset of a current far jump instruction is used to index into a far jump BTB. If a corresponding entry exists (i.e. a BTB hit), then the contents of the entry are provided to speculative address calculation logic for calculation of a speculative target address. Subsequent instructions are thus fetched from the speculative address forward. Unfortunately, in this scenario wherein a branch target buffer (BTB) is employed for prediction of far jump target addresses, if no corresponding entry exists in the BTB (i.e. a BTB miss), then the microprocessor pipeline will be stalled until the current far jump instruction is resolved. Also unfortunately, in this scenario, the same penalty is incurred as if no prediction logic had been employed whatsoever.
What is needed is a technique for performing branch prediction on far jumps and far calls in a manner which reduces the pipeline flushing penalties associated with far jumps and calls. Moreover, a mechanism is needed for increasing microprocessor efficiency when far jumps/calls are encountered even when branch target buffer misses occur.

Processor including fallback branch prediction mechanism for far jump and far call instructions