Embodiments of a foot supporting skate device for supporting one's foot adjacent a roller skate, preferably but not limited to the in-line type, while skating according to a new method, the device comprising a foot support member integral with a pair of perpendicularly extending flanges having holes or slots therein for attaching the device to the roller skate preferably with a plurality of the skate's axle bolts and nuts.

This invention relates to wheeled skating devices and more particularly to skates having a boot, shoe or other means attached to the skate's wheels for holding a rider's foot in position relative to the wheels.
Skates, including in-line roller skates and more conventional roller skates, wherein each skate has a boot or shoe for retaining the rider's foot in position relative to the skate's wheels, are well known in the art. Likewise, conventional skateboards having no such foot retaining means are also well known.
These prior art skating devices have posed limitations and relative hazards in certain circumstances and when attempting certain maneuvers. For example, when skating on a wet or otherwise moderately slippery surface, the use of conventional or in-line skates, wherein both of the rider's feet are booted, that is, retained in position relative to the wheels of the skates, has posed a problem in that upon sliding and losing his or her balance, the rider has attempted to recover on one or both of his or her feet, both of which have been essentially wheeled and more prone to slippage. This has limited the rider's ability to effectively recover. Also, under such slippery conditions, it has been more difficult for a rider to impel himself or herself forward when the rider's foot has been used to push off the ground with a wheeled skate prone to slippage.
Many prior art in-line skates have a brake attached to the skate near the heel of the skate boot. A recent attempt to remove one skate for increased stability and traction under slippery conditions has been made with an attempt to rest the non-skated foot on the prior art skate's brake while skating. However, this has proven problematic, since there has not been provided adequate support for the nonskated foot on the brake, because the brake has not been designed to support one's foot during skating or while attempting skating maneuvers. Such brakes are too small in size, they slope downwardly, and they often have not been designed to withstand the forces which would be placed on the brake during skating or certain skating maneuvers. Thus, during such an attempt to support the foot on the skate's brake, the foot has slipped off the brake during skating and while attempting maneuvers, creating a hazardous situation.
There are several tricks that one can do on a skateboard but which have not been done, or at least have not been done as easily, on conventional or in-line skates. For example, doing 360 degree turns or spins, and multiples or divisions thereof (e.g., "180's", "360's", "720's", etc.) on the rear wheels of a skateboard are relatively easy. However, doing these tricks on the rear wheels of conventional or in-line skates has been very difficult. This is partly because prior art skates have not provided adequate place on or adjacent the skate for the skater to put his or her other foot while doing the spin. Moreover, the leverage force necessary to raise and or maintain the front wheels of the skate off the ground in order to perform the trick has been lacking since no adequate place has been provided on the skate on which to apply such force. An attempt to do such tricks or maneuvers while attempting to rest one's foot on a prior art in-line skate's brake would be unsuccessful for two reasons: first, as described above, the brakes have not been designed with the support of one's foot in mind, and hence, there would be inadequate leverage applicable to the brake in order to raise the front end of the skate, and second, the brake's pad would drag on the ground during such wheelie or spinning type tricks.
Another trick common to skaters and skateboarders is called an Ollie. A skater performs an Ollie by jumping off the ground, for example by jumping off a ramp or an elevated surface, and by lifting the skates upwardly by tucking the knees. In the past with skateboards, Ollies have been difficult because there was no means for attaching the skateboard to the skater's feet. Thus, the skater had to reach down with his or her hand and grab the board to keep it in contact with the feet until landing occurred.
Another disadvantage of prior art skates and techniques is that it has been more difficult, especially for beginners, to easily come to a complete stop when both feet have had wheels on them. Moreover, even standing still when both feet have had wheels on them has sometimes been difficult, especially on an inclined or otherwise irregular surface.
Still another disadvantage of prior art skates has involved the avoidance of obstacles, such as potholes, curbs, rocks of various sizes and the like. Sometimes it has been difficult to avoid such obstacles when both feet have had wheeled skates on them. An attempt to remove one of the skates to alleviate this problem has not been feasible since there has not been a suitable place to rest the non-skated foot during riding.
A further disadvantage of prior art skates is that beginners often have had a very difficult time using them. This is especially true while pushing off and starting motion forward. Since conventionally both feet have been retained in a wheeled skate, the instability of the whole process just being learned has been increased. Of course, this has presented certain safety hazards when learning to skate. Moreover, stopping has been difficult for beginning skaters, both on conventional and in-line prior art skates. This has been especially true on inclined or otherwise uneven skating surfaces.


A rain gutter cleaning tool is provided wherein the tool is supported and carried on an elongated pole with a fixed handle at one end, an intermediate actuating handle and operating gripper jaw mechanism on the other end. The gripper jaws are disposed at an optimum angle for easy and convenient access to the open top of the conventional rain gutter and may be selectively actuated to remove leaves and accumulated debris from clogged gutters.

This invention relates generally to home tools and appliances and more particularly relates to a rain gutter cleaning tool which may be manually held and manipulated by a user for cleaning a rain gutter disposed at a relatively remote location, i.e., a rain gutter situated on the eave of an architectural structure such as a dwelling place, a garage, or a utility building and susceptible to malfunction due to the accumulation of fallen leaves and other yard debris.


A Land Grid Array connector (1) comprises an socket (2) having opposite upper and lower surfaces, a plurality of contacts (4) received in the socket and a retention frame (3) assembled with the socket. Each contact comprises upper and lower contacting sections (41, 42) extending beyond the upper and lower surfaces of the socket adapted for electrically connecting with a Central Processing Unit and Printed Circuit Board. The retention frame comprises a base portion (31) defining an opening to interferentially receive the outer periphery of the socket and four sidewalls (32) extending upwardly beyond the base portion. The socket fills up the opening after assembled to the retention frame and forms a receiving space together with the base portion and the four sidewalls of the retention frame which is originally communicating with the opening before the socket is assembled to the retention frame adapted for accommodating the Central Processing Unit.

1. Field of the Invention
The present invention generally relates to a Land Grid Array connector assembly, and more particularly to a Land Grid Array (LGA) Land Grid Array connector for removably mounting a chip module, such as a Central Processing Unit (CPU), to a printed circuit board.
2. Description of Related Art
U.S. Pat. No. 6,929,505, issued on Aug. 16, 2005 and assigned to HonHai, discloses a Land Grid Array (LGA) connector for electrically connecting a chip module to a printed circuit board (PCB). Such LGA connector comprises an insulative housing, a plurality of contacts received in the insulative housing, and a mating frame surrounding the insulative housing and integrally formed with the insulative housing. The LGA connector is disposed on the PCB to realize the electrical connection between the contacts and the PCB. Then the chip module is displaced on upper surface of the insulative housing to realize the electrical connection between the chip module and the contacts, further realize the electrical connection between the chip module and the PCB.
However, with the increase of the number of the pins of the chip module and function added to the chip module, the number of contacts received in the insulative housing is also increased, correspondingly, of course, the square of the insulative housing is increased either. This causes the intensity of the integral insulative housing is not rigid enough to support so many contacts and increases the difficulty to mold such insulative housing or causes the insulative housing to be prone to deformation.
Therefore, it is desired to provide an improved Land Grid Array connector assembly to stress the problems mentioned above.

Land grid array connector with interleaved bases attached to retention frame


A pipeline processing apparatus for performing processing operations in a succession of processing cycles, in which each cycle is composed of a succession of stages that include an instruction decoding stage for decoding an instruction associated with the cycle and an execution stage for executing an operation dependent on the instruction, and the processing cycles include a first cycle which starts at a first time and a second cycle that begins at a second time that is after the first time and that overlaps the first cycle in time. The apparatus is constructed and controlled for causing a branch instruction to be decoded in the instruction decoding stage of the first cycle; and for effecting a calculation in the execution stage of the first cycle, dependent on the branch instruction decoded in the instruction decoding stage of the first cycle.

1. Field of the Invention
This invention relates to a speed-up technique for realizing a quick processing in response to a branch instruction or in an exceptional treatment or handling based on an internal vector.
2. Related Art
In general, instruction address operations in a micro processor are classified into two categories, i.e. fixed command operations in accordance with ordinary instructions and non-fixed command operations in accordance with branch instructions or the like.
In the case of ordinary instructions, their instruction addresses are calculated during an IF (instruction fetch) stage. On the other hand, in the case of branch instructions, their instruction addresses are calculated during an EX (execution of operation) stage. Branch instructions generally comprise the addressing mode such as a program counter relative branch, an immediate branch, and a register direct branch. Among them, the program counter relative branch is an instruction to execute the operation of the program counter and a relative value at the EX stage. On the other hand, the immediate branch and the register direct branch are instructions both dealing with their branch addresses as immediate values, and hence they execute the processing for setting an immediate value to the program counter in the EX stage (Refer to "H8/327, SH7032 Programming Manuals of Hitachi, or RISC System by K. Ohmori, Kaibundo publishing Co., Ltd.).
As one of this kind of conventional technologies, a micro processor adopting a 5-stage pipeline processing system will be explained hereinafter.
Sequential five stages of this pipeline processing consists of IF (instruction fetch), ID (instruction decode), EX (execution of operation), MA (memory access) and WB (write back) stages. FIG. 5 shows the sequential flow representing the ordinary 5-stage pipeline processing.
FIG. 6 shows the arrangement of a conventional micro processor which comprises a decoder 1 and a data path 2. Data path 2 comprises an operating section 2-1 performing logical operations, arithmetic operations, shift operations and so on, a register file 2-2 storing the operation or computation data, a program counter 2-3 counting the address of the present program, and an address unit 2-4 selectively switching the output to an address bus 4 from operating section 2-1 or program counter 2-3. Operating section 2-1 through address unit 2-4 are respectively controlled in response to the signals of control buses 7-1 through 7-4 fed from decoder 1.
Micro processor designates an address in a memory (not shown) by outputting data through address bus 4 and reads out the instruction stored in the designated address through data bus 3, and then decodes the readout instruction in decoder 1, thereby controlling the data path 2.
An immediate bus 6-1 is provided between decoder 1 and operating section 2-1. Read buses 6-2 and 6-4 are provided to read out the data from register file 2-2. Reference numerals 63 and 6-5 represent input buses of operating section 2-1, while 6-6 represents an output bus of operating section 2-1. Furthermore, reference numeral 6-7 represents a read bus of program counter 2-3, and 6-8 represents an input bus of address unit 2-4. There are also provided a plurality of bidirectional switches 5-1 through 5-6 to switch the above-described buses 61, 6-2, 6-4, 6-5, 6-6 and 6-7.
Regarding operation timing, each stage of IF through WB has the following relationship or correspondence to each of units 2-1 through 2-4 constituting the data path 2.
Program counter 2-3 operates during the IF stage. Decoder 1 (control section) and register file 2-2 operate during the ID stage. Operating section 2-1 operates during the EX stage. Address unit 2-4 operates during the MA stage. And, register file 2-2 operates during the WB stage.
The immediate branch instruction in the above-described conventional micro processor is executed according to the pipeline flow shown in FIG. 7. More specifically, the branch address decoded in decoder 1 is entered from immediate bus 6-1 to operating section 2-1 in EX stage 301 and then is set through output bus 6-6 to program counter 2-3.
Similarly, in executing the register direct branch instruction in the above-described micro processor, the branch address is read out from register file 2-2 and is entered through buses 6-4 and 6-5 to operating section 2-1, and is then set via bus 6-6 to program counter 2-3.
In this manner, according to the above-described conventional micro processor, the branch address is always set to the program counter 2-3 via operating section 2-1 in the response to the branch instruction or in the exceptional treatment. Hence, when seen on the processing stage flow, the above-described micro processor is forced to pass through the EX stage every time, resulting in a significant delay in the processing speed.
Furthermore, FIG. 11 shows the relationship between the instruction processing cycle and each stage in a micro processor adopting the 5-stage pipeline processing system.
In this example, it is now assumed that a conditional branch instruction is fetched in n instruction processing cycle. This conditional branch instruction is decoded in the ID stage. There is a waiting time for waiting the operation result coming from the EX stage of the immediately preceding n-1 instruction processing cycle. Then, at the timing of ID stage of the own n instruction processing cycle, the operation result obtained from the n-1 instruction processing cycle is compared with the branch condition. Thereafter, the processing flow proceeds to the EX stage of the branch address.
For this reason, the ID stage of the n instruction processing cycle requires a relatively long time L equivalent to the sum of a first duration required for waiting the operation result obtained from the n-1 instruction processing cycle and a second duration required for comparing the operation result thus obtained and the condition of the branch instruction. In other words, according to the above-described conventional pipeline processing, the length of a particular stage, if it has the longest time, will make other stages delay in their processing time.

Pipeline processing apparatus for reducing delays in the performance of processing operations


A gas detection system comprising a case having a hollow chamber, a gas input port, a gas output port, a radiation emitting device, and a photo detector. The gas input port may be disposed on the case for a test gas flowing into the chamber. The gas output port may be disposed on the case for the test gas flowing out of the chamber. The radiation emitting device may be disposed on the case and operated in a surface plasmonic mode or a waveguide mode for emitting a narrow bandwidth thermal radiation light source with multi-peak wavelengths into the chamber, wherein the multi-peak wavelengths may comprise a first absorption wavelength and a second absorption wavelength of the test gas. The photo detector may be disposed on the case for detecting light intensity of the light source passing through the chamber to determine the concentration of the test gas.

1. Field of the Invention
The present disclosure relates generally to a gas detection system. More specifically, the present disclosure relates to a gas detection system with a narrow bandwidth thermal radiation light emitting device as a light source thereof.
2. Description of the Related Art
A conventional gas detection system may be used to detect ambient gases in a house, a public place, or a working place. Accordingly, one may monitor concentration changes of ambient gases, especially toxic gases. A gas detection system may also be used as a medical test for the breath of a patient. Accordingly, one may diagnose the patient's disease or illness.
A gas detection system may usually be applied by using a chemical method or an optical method. Gas detection systems using chemical methods may often have slow response times. Further, gas detection systems using chemical methods may require that the absorbing material used for detection be replaced after a period of usage. Accordingly, the replacement of the absorbing material may increase costs and inconvenience. On the other hand, gas detection systems using optical methods may often comprise a broadband light source and a filter arranged in a complex structure. As one of ordinary skill in the art having the benefit of the present disclosure would appreciate, this may result in higher costs. Further, gas detection systems using only one filter may filter light with only one wavelength or a band of wavelengths. Such gas detection systems may not filter a light with more than one wavelength at the same time. Therefore, the conventional gas detection systems using optical methods belong to a single-beam optical sensor. Further, the filtering bandwidth of the filter is hard to reduce, which may affect the detection precision.
As one of ordinary skill in the art having the benefit of the present disclosure would appreciate, the absorption wavelength peak of some test gases or compounds may not always be a single peak. Thus, conventional gas detection systems may not be able to detect the multi-peak wavelengths. As a result, the detection precision and accuracy may be affected. Accordingly, there is a need for an improved gas detection system with high precision and accuracy.

Gas detection system and radiation emitting device for the gas detection system


An apparatus and methods for modifying isolation structure configurations for MOS devices to either induce or reduce tensile and/or compressive stresses on an active area of the MOS devices. The isolation structure configurations according to the present invention include the use of low-modulus and high-modulus, dielectric materials, as well as, tensile stress-inducing and compressive stress-inducing, dielectric materials, and further includes altering the depth of the isolation structure and methods for modifying isolation structure configurations, such as trench depth and isolation materials used, to modify (i.e., to either induce or reduce) tensile and/or compressive stresses on an active area of a semiconductor device.

1. Field of the Invention
The present invention relates to apparatus and methods for modifying stresses in semiconductor devices. In particular, the present invention relates to modifying isolation structure configurations, such as trench depth and isolation materials used, to either induce or reduce tensile and/or compressive stresses on an active area of MOS semiconductor devices.
2. State of the Art
Semiconductor integrated circuits are formed by chemically and physically forming circuit components in and on a semiconductor substrate. These circuit components are generally conductive (e.g., for conductor and resistor fabrication) and may be of different conductivity types (e.g., for transistor and diode fabrication). Thus, when forming such circuit components, it is essential that they are electrically isolated from one another, wherein electrical communication between the isolated circuit components is achieved through discrete electrical traces.
Various techniques have been developed for electrically isolating integrated circuit components formed in the semiconductor substrate. One such technique is known as trench isolation. The trench isolation technique involves forming a channel or trench in the semiconductor substrate, usually by etching techniques well known in the art. The trench is formed to surround the circuit components to be isolated and filled with a dielectric material, thereby electrically isolating the circuit components.
FIGS. 22 and 23 illustrate in side cross-sectional view and in top plan view, respectively, components of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). As shown in FIG. 22, a source region 202 and a drain region 204 are implanted in a semiconductor substrate 206. The source region 202 and the drain region 204 may be implanted with either a p-type material, such as boron, to form a pMOS (p-channel Metal Oxide Semiconductor) transistor or an n-type material, usually phosphorous and/or arsenic, to form an nMOS (n-channel Metal Oxide Semiconductor) transistor.
A gate structure 208 spans a region of the semiconductor substrate 206 between the source region 202 and the drain region 204. An exemplary gate structure 208 comprises a conductive material 212 electrically isolated with dielectric spacers 214 and 214′ adjacent the source region 202 and the drain region 204, a lower dielectric layer 216, and a cap layer 218.
The source region 202 and the drain region 204 are isolated with an isolation structure 222 (i.e., a dielectric-filled trench) extending into the semiconductor substrate 206, preferably beyond the depth of the source region 202 and the drain region 204, as shown in FIG. 22. The isolation structure 222 surrounds the source region 202 and the drain region 204, as shown in FIG. 23, to form an island or active area 224. The material which form the gate structure 208 extends beyond the active area 224 to other semiconductor device components (not shown).
It has been reported in literature that stresses on an active area can significantly effect the performance of MOS devices. Hamada in "A New Aspect of Mechanical Stress Effects in Scaled MOS Device", IEEE Transactions on Electron Devices, vol. 38 (1991), pp. 895-900 illustrated that stresses of the order of 100 MPa can affect performance by a few percent. In the reported experiments, well-controlled uniaxial stresses were applied on MOS devices by using a 4-point bending technique. The stresses were applied both parallel and perpendicular to the channel current direction and for both nMOS and pMOS devices. The results showed that for nMOS devices, tensile stress in both directions improves performance, while compressive stress degrades performance. These effects have been found to be more significant for long channel nMOS devices. For pMOS devices, tensile stress perpendicular to the channel current direction improves performance, but tensile stress parallel to the channel current direction degrades performance, and vice versa for compressive stress.
Such degradation in performance is particularly a problem for MOS devices in flip-chip packaging configurations. FIG. 24 illustrates a cross-sectional view of such a packaging configuration. With flip-chip packaging configurations, a semiconductor die 232 is electrically attached to a carrier substrate 234, such as a printed circuit board, with the active surface 236 of the semiconductor die 232 facing the carrier substrate 234. The electrical attachment of the semiconductor die active surface 236 to the carrier substrate 234 is generally achieved by refluxing solder balls 238 between the semiconductor die active surface 236 and the carrier substrate 234 to form an electrical connection between electrical traces on or in the semiconductor die 232 (not shown) and electrical traces on the carrier substrate 234 (not shown). Once electrical attachment of the semiconductor die 232 to the carrier substrate 234 is complete, an underfill material 242 is disposed between the semiconductor die 232 and the carrier substrate 234. The resulting structure is then heated to cure the underfill material 242. However, when the resulting structure is cooled down to room temperature from the underfill cure temperature, a bending curvature develops because the carrier substrate 234 contracts more than the semiconductor die 232 (i.e., due to the thermal expansion mismatch between the carrier substrate 234 and the semiconductor die 232), as shown in FIG. 25. Such bending causes biaxial compressive stresses (illustrated by arrows 248 in FIG. 25) on MOS transistors 246 (shown schematically as rectangles in FIGS. 24 and 25) within the semiconductor die 232.
As previously discussed, these biaxial stresses will degrade nMOS device performance. However, these biaxial stresses will have less of an effect on the performance of a pMOS device due to the cancellation effects of the two perpendicular stress components (i.e., the decrease in performance due to compressive stress perpendicular to the channel current direction is offset by the increase in performance due to the compressive stress parallel to the channel current direction).
Therefore, it would be advantageous to develop a technique to effectively induce or reduce tensile and/or compressive stresses on the active area of a MOS device to improve the operating performance thereof, while utilizing commercially-available, widely-practiced semiconductor device fabrication techniques.

This patent is subject to a terminal disclaimer.

Isolation structure configurations for modifying stresses in semiconductor devices


A method of operating working machines with a changeable nominal value of at least one specific parameter of a working machine has the steps of forming by the changed nominal value an actual value of the specific parameter of the corresponding working machine; and deriving from the change of the respective actual value of a plurality of working machines a pronounced user behavior; and a device provided for performing the method.

The present invention relates to a method of and device for operating working machines.
A plurality of systems are known from the prior art, that support the operator of working machines, in particular agricultural working machines, during the adjustment of optimal operational parameters of the working machine. For example, the patent document EP 0 928 544 is known, in which a system for machine adjustment is disclosed and operates so that, depending on the various constellations, operational parameters of working elements of the agricultural working machine which are optimal for outer harvesting conditions are determined, they are stored, and depending on the performance, the adjustment of these parameters on corresponding working elements is performed.
For determination of these optimized operational parameters, the system operates through diverse known sensor systems, which determine within the working machine efficient parameters such as grain loss and performance, and with consideration of outer boundary conditions generates from them, in an evaluation and computation unit, optimized operational parameters for the working elements of the agricultural harvester. The effect of such a system, in addition to other features, is increased, since the optimized parameters and the associated outer boundary conditions can be stored in a working machine in data sets, which can be retrieved by operators of other working machines. Thereby the optimization process of the operational parameters of the other working machines can be accelerated.
Such systems however have the disadvantage that the operator which wants to go back to a generated data set must first make a choice, which data set available to him is usable for a concrete operation case. This depends in particular on the experience of the corresponding operator of the agricultural working machine and is in particular difficult when the boundary conditions related to the corresponding optimized parameters deviate from the outer boundary conditions of the concrete application case.
In the most favorable case, it can lead to the situation that the operator of an agricultural working machine, despite taking hold of already optimized machine parameters, due to the deviating outer boundary conditions does not reach a satisfactory optimization of its operational parameters, so that he is forced to rely on its experience to carry out an independent optimization of the operational parameter of its working machine. Such adjustment steps can be however very time consuming, since in the agricultural working machines, a plurality of operational parameters having mutual influences have to be adjusted, and the adjusting regions of the individual operational parameters partially have very great band widths.

Method of and device for operating working machines


This invention teaches new types of linearization circuits, exhibiting improved broadband suppression of nonlinear distortion. These realizations do not require the use of reactive elements such as capacitors, or of active elements such as transistors, eliminating the drawbacks of prior art realizations. The linearization circuits are particularly suitable for linearizing optical sources with odd wave voltage to light transfer characteristics, such as externally modulated CW lasers. The fundamental building blocks of the linearization circuits of this invention are novel nonlinear electrical one-ports with an expansive V-I characteristic, denoted as ENLOP (Expansive Nonlinear one-Ports). The ENLOP building blocks are further embedded in linear circuits.

The problem of analog transmission via fiber optics, especially for Cable Television (CATV) transmission and distribution, has received strong impetus with the introduction of some AM fiber links based on novel distributed feedback (DFB) semiconductor lasers. Analog AM transmission systems and distribution networks benefit from fiber-optic transport, since the distance between electrical repeaters can be significantly increased as compared with electronic distribution networks. However, the requirements on second-order and third-order linearity are very stringent for directly modulated lasers to be used in the optical transmitters, since the presence of non-linearities causes intermodulation distortion which, in the case of CATV transmission for example, shows up as intolerable degradation of the television picture. Because of non-linearity of the optical source, the modulating signal amplitude has to be limited to small values in order to maintain the composite triple beat and second order distortion specifications under a tolerable level. A reduction of the optical source non-linearity would directly translate into the ability to increase the modulation signal amplitude while still maintaining the composite distortion specifications. An increased modulation amplitude (modulation index) is equivalent to better signal to noise ratio, i.e., the ability to distribute the analog signal over larger distances, to split the signal to more receiving sites, or to transmit more channels on the same link. The main obstacle with AM fiber transmission is how to overcome the non-linearity limitations of optical sources for analog transmission. Currently used approaches include:
1. Careful laser device selection, using distributed feedback lasers and other types of semiconductor low-noise lasers, and trying to carefully select individual devices or modify the fabrication process in order to produce a more linear response, for example preventing leakage current around the active lasing area. The problem with this approach is that currently the yield for devices with sufficient linearity is quite low, and reliable fabrication techniques for more linear laser devices have not yet been found.
2. Feedforward techniques, as described by J. Koscinski, "Feasibility of multichannel VSB/AM transmission on fiber optic links" NCTA Technical papers, Las Vegas 1987 p. 17. In these techniques, compensation of the nonlinearity is achieved by isolating the distortion produced in a nonlinear circuit and subsequently injecting the processed error back into the circuit. The disadvantages of these methods are in the requirements to use matched sources and the cost of two optical sources and the complexity of delay and gain balancing.
3. Negative feedback techniques, such as described by J. Koscinski, "Feasibility of multichannel VSG/AM transmission on fiber optic links," NCTA Technical papers, Las Vegas 1987, p. 17, rely on a photodiode to monitor the optical signal and provide the necessary feedback signal. The amount of distortion compensation depends on the feedback gain. Although the application of negative feedback is straightforward, large bandwidth requirements may create problems at high frequencies rendering this technique impractical.
An alternative to directly modulating lasers is using external modulators in conjunction with CW lasers. A directly modulated laser such as a DFB laser tends to be more sensitive to optical back reflection, and noisier than a CW laser which is modulated externally. The back reflection into the laser yields a non-linear light vs. current response when coupled with chirping effects of the directly modulated laser. The advantages of using modulators vs. lasers in terms of the non-linear intermodulation distortion have been discussed by G. E. Bodeep, T. E. Darcie, "Comparison of second and third order distortion in intensity modulated InGaAsP lasers and an LiNbO.sub.3 external modulator," Paper WK2, OFC89' Conference on Optical Fiber Communications, Houston, Tex., February 1989, where it was concluded that external modulators tend to have lower second order distortion but higher third order distortion then directly modulated lasers. However, the ability to maintain the second order distortion of a modulator at a sufficiently low level cannot be taken for granted, and depends on how close to the quadrature point the device is biased. Fabrication imperfections, temperature changes, optical damage, and the like may cause the bias point to drift away from quadrature, in which case the second order distortion becomes more substantial. In order to use external modulators effectively for analog transmission applications, the drift in the bias point (which causes second harmonic distortion) as well as the third order harmonic distortion of the device must be eliminated or greatly reduced, since prior art modulators provide adequate linearity only over a very limited range around the quadrature point.
It is generally known that external modulators have a transfer characteristic that is considerably more stable than that of lasers. Unlike the lasers' light vs. current curve, the shape of the modulators, transfer characteristic is generally unaffected by optical power, temperature, aging, and the like, although the quiescent point of operation on the fixed transfer characteristic is affected by these factors.
If means were found to extend the linear range around the quadrature point, then the modulation index of the analog information signal could be increased and the performance of analog links improved, with better signal to noise ratio, and the ability to provide longer links.
Henry A. Blanvelt, Howard L. Loboda, "Predistorter for linearization of electronic and optical signals", U.S. Pat. No. 4,992,754 is applicable to the linearization of distributed feedback lasers but is not quite applicable to the linearization of external modulators in terms of the high suppression required.
Richard B. Childs and Vincent A. O'Byrne, "Multichannel AM Video Transmission using a high power Nd:YAG Laser and Linearized External Modulator" IEEE Journal on selected areas in communication, Vol. 8, No. 7, Sept 1990, Richard B. Childs and Vincent A. O'Byrne, "Predistortion linearization of directly modulated DFB lasers and external modulators for AM video transmission", WH-6 OFC '90, San Francisco, Calif., January 1990, and Richard B. Childs and Vincent A. O'Byrne, "50 Channel VSB-AM Video Transmission Employing a Linearized External modulator", PD23-1, OFC90, San Francisco, Calif., January 1990, refer to external modulator linearization by predistortion.

Shunt-expansive predistortion linearizers for optical analog transmitters


An object detecting apparatus for detecting an object or a distance with the object includes at least one light receiving element for detecting a light quantity entering from a sensor window portion for example, a projection window portion and an entrance window portion through which an electromagnetic wave from an electromagnetic wave generation portion toward an object and a reflected electromagnetic wave from the object pass. Furthermore, an irregularity determining portion determines a state of at least one of the projection window portion and the entrance window portion using at least the detected light quantity of the light receiving element. For example, the light receiving element includes a first light receiving portion and a second light receiving portion which receive the light quantities of direct current part of light entering from the first and second light receiving portions.

In a conventional distance detecting apparatus mounted on a vehicle, a distance between the vehicle and an object, such another vehicle (for example, forward of the vehicle including the conventional distance detecting apparatus), may be detected using a laser beam. The distance detecting apparatus intermittently radiates the laser beam from a laser diode to irradiate the forward vehicle and detect reflected light from the forward vehicle. The distance detecting apparatus detects the distance from the vehicle to the forward vehicle based on a difference between a light radiating time and a light receiving time.
For example, a conventional distance detecting apparatus includes an irradiation portion for irradiating the laser beam, a polygon mirror, for example, a rotatable scan mirror having a truncated hexagon pyramid shape, and a laser light receiving portion for receiving the reflected light from the forward vehicle. In such a conventional distance detecting apparatus, the laser light irradiated from the irradiation portion may be reflected by the polygon mirror and introduced into a vehicle including conventional distance detecting apparatus from a front side. However, in such an arrangement, if dirt or another irregularity is present on a sensor surface, for example, a transparent surface for passing the laser beam therethrough, the distance cannot be accurately detected.

Object detecting apparatus and irregularity detecting device for the same


A process is disclosed for removing particulate product from a fluidized bed reactor to optimize, within the constraints of the product removal cycle, conservation of gas in which the product is entrained. Data are compiled on the time required for equalizing pressure between product discharge tanks, and these data are used to determine the optimum times for various valves to be open. Product movement steps and equalization steps can be performed simultaneously.

This invention relates to the production of polyolefins in fluidized beds, and particularly to an efficient method of removing polymerized product from a fluidized bed reactor at a desired rate of production while optimizing the conservation of fluidizing gas.
In the production of poloyolefins in fluidized bed reactors, a long standing problem has been the loss of unreacted monomers and other components of the fluidizing gas as a consequence of removing the solid product from the reactor. The polymer product is in the form of small particles and is generally removed by passing them, usually by positive gas pressure transfer assisted by gravity, while still more or less entrained in, or at least surrounded by, the gaseous atmosphere predominating in the reactor. Regardless of the system of valves which causes the flow of solid product to the desired destination, the gas leaving the reactor along with the product generally contains a significant volume of unreacted monomer. This unreacted monomer represents an economic loss in at least two waysxe2x80x94it is no longer in the reactor where it can form the desired product, and it represents an environmental and safety issue which must be dealt with. The fluidizing gas may include inert gases used, for example, to control the dew point of the recycle gas. This also represents an economic loss. It is therefore desirable to minimize the amount of gas accompanying the product as it leaves the reactor. There is also a secondary effect, arising from the care taken to minimize the removal of gas with the finished productxe2x80x94the systems developed to assure only a minimal loss of gas tend to retard the removal of solid product, which can cause the entire process to be dependent on the rate of product removal rather than the otherwise possible rate of production. It is highly undesirable for the production rate of a large, expensive reactor to be limited by the product removal system.
In Aronson""s U.S. Pat. No. 4,621,952, it is pointed out that the original Union Carbide fluidized bed process for making polyolefins included a gas lock zone associated with the product discharge train. Unreacted monomer accompanying the product resin was vented and recycled back to the reactor by compression. See U.S. Pat. Nos. 4,003,712, 4,032,391, 4,255,542, and 4,302,565. The Aronson ""952 patent describes the use of a settling zone to fill a vessel with as much solid material as is practical, thus minimizing the amount of gas in the settling zone or vessel before it is sealed off by appropriate valving from the rest of the system. It also describes a transfer zone downstream from the settling zone. While discharging to the transfer zone, the settling zone reaches an intermediate pressure which is then preserved and can be increased after the settling zone is emptied by connection to another settling zone containing higher pressure gas, to reduce the amount of gas that can enter the settling zone from the reactor in the next cycle.
In U.S. Pat. No. 4,535,134, the loss of gaseous monomer during solid product removal from a horizontal reactor is reduced by controlling the powder level in a receiving container.
Our invention is a method of product removal from a fluidized bed polyolefin reactor which optimizes the conservation of monomer and other gas components within the time available for the product discharge function. The invention calls for a plurality (preferably two) parallel sets or series of vessels for receiving product from the reactor. The product is passed, in each parallel train, first to a first stage vessel, then to a second stage vessel having a reduced pressure, and finally to a conveyor, bin, or other end destination of a pressure lower than that of the second stage vessel. The conveyor, bin, or other end destination may have a pressure lower than atmosphericxe2x80x94for example, where gas is drawn from it by a vacuumxe2x80x94but may also be atmospheric or higher than atmospheric. Optionally, a third stage vessel of further reduced pressure may be inserted between the second stage vessel and the final destination. After each discharge from one vessel to another, connection is made between the just-filled vessel and the equivalent one in the other train, so that gas may pass from the higher pressure vessel to the lower pressure vessel. Appropriate valves are manipulated by a control system which takes into account the pressures and volumes of gas in both vessels over time, the effect (optionally) of solids content in the vessel on the volume of gas in the vessel, the flow resistance characteristics of the connections between the vessels, and the overall product discharge cycle time. On-line determination of the flow and fill characteristics of the current product can be utilized with or without historical data. The control system allocates a time for equalization at each stage to permit the most efficient sequence of stepsxe2x80x94that is, to permit the removal of all product made within the discharge cycle time period, with a minimum or optimum level of gas loss. The sequence of steps includes as an option the simultaneous performance of certain valve operations. That is, more than one step may be performed at the same time, as will be seen below.

Union Carbide Chemicals and Plastics Technology Corporation


A tire has a piezoelectric flexing element associated with an energy storage device (e.g., a capacitor). The piezoelectric flexure element is mounted in cantilever fashion in a housing so as to be positioned substantially along a plane orthogonal to a radial direction of the tire and, so that a first end of the piezoelement is restrained by the housing. A loading mass is coupled to the second end of the piezoelectric flexure element. A small gap is formed between the inner walls of the housing and the outer surface of the loading mass in order to allow limited flexure of the piezo-electric element. The housing including the piezoelectric is mounted in a tire portion in correspondence of a tread area of the tire, preferably on the inner surface of the tire. The piezoelectric element flexes under the action of the radial acceleration when the tire rotates. The loading mass and the gap are chosen to obtain a) small entity oscillations of the flexure element substantially during a complete revolution of the tire when the tire rotates at low speed; b) large entity oscillations of the flexure element substantially only during the passage of the tire portion including the piezoelectric element in the contact patch. Sufficient electrical power for powering an electronic device included within the tire is obtained, together with a long durability of the piezoelectric element.

1. Field of the Invention
The present invention relates to a method and system for generating electrical energy within a vehicle tyre. More specifically, electrical power is generated by using piezoelectric technology to convert mechanical strain, due to tyre flexure during rolling, to electric charge, that is stored in an energy storage device, and is thus made available to an electronic device disposed within the tyre. The present invention also relates to a system for monitoring operating parameters of a tyre.
2. Description of the Related Art
The incorporation of electronic devices within pneumatic tyres is taking a greater importance in order to increase safety of vehicles. Tyre electronics may include sensors and other components suitable for obtaining information regarding various physical parameters of a tyre, such as for example temperature, pressure, number of tyre revolutions, vehicle speed. Such information may become useful in tyre monitoring and/or warning systems. Furthermore, active control systems of the vehicle may be based on information sent from sensor devices included within the tyres. Typically, wireless transmission is employed in order to send the tyre performance information outside the tyre, to a receiver disposed on the vehicle, so that such electronic devices disposed within the tyre typically include a transmitter associated to an antenna. A microprocessor is also typically employed, in order to collect and process the signals coming from the performance sensors, before transmission.
Such integrated tyre electronics have conventionally been powered by a variety of techniques and different power generation systems.
A typical solution for powering tyre electronics systems is the use of a non-rechargeable battery, which may cause inconveniences to a tyre user since proper electronics system operation is dependent on periodic battery replacement. As a matter of fact, batteries tend to deplete their energy storage quite rapidly when powering electronic applications characterized by complex levels of functionality. Furthermore, conventional batteries typically contain heavy metals that are not environmentally friendly and which present disposal concerns, especially when employed in numerous quantity. Moreover, performances of conventional batteries are often influenced by temperature: in particular, the functioning of such batters is not reliable at low temperatures.
Another known method for powering tyre monitoring systems is a coupling of radio-frequency (RF) power between an antenna disposed on the vehicle in close proximity with an antenna included within the electronic device disposed in the tyre. This typically requires antennas disposed in vehicle portions frequently exposed to damage from road hazards, and thus may not be a desirable solution for powering tyre electronic applications.
The use of piezoelectric elements has also been proposed for powering tyre monitoring systems. Piezoelectricity is a property of certain materials, such as quartz, Rochelle salt, and certain solid-solution ceramic materials such as lead zirconate-titanate (PZT), of generating electricity when mechanically stressed.
For example, PCT patent application WO 01/80327 A1 discloses a system for generating electrical energy in a vehicle tyre, comprising at least one elongate piezoelectric element which extends in a longitudinal direction along at least a portion of the tyre. The elongate piezoelectric element preferably comprises a coaxial cable extending along a straight or undulated path of the tyre circumference.
PCT patent application WO 03/095244 A1 discloses a system for generating electric power from a rotating tyre's mechanical energy that has a piezoelectric structure and an energy storage device. The structure comprises a plurality of piezoelectric fibers embedded in a generally unidirectional fashion in an epoxy matrix. The structure is mounted on a support substrate for uniformly distributing mechanical strain in the piezoelectric structure. The structure is mounted within a tyre for generating electric charge as the wheel moves along a ground surface.
U.S. Pat. No. 4,510,484 discloses a device provided for sensing the condition of a pneumatic tyre mounted on a tyre rim and subject to normal vibrations. The device comprises a housing, a band for mounting the housing to the tyre rim, a sensor for monitoring the condition within the tyre, circuitry operatively connected to the sensor for generating radio signals indicative of the tyre condition, power supply operatively connected to the circuitry and a receiver for receiving the radio signals. The power supply includes a radially extending piezoelectric reed having a base portion and an end portion. The base portion is elastomerically bonded to the housing. A tuning mass member is mounted to the end portion and is configured for mating abutment against stop members which limit the flexure stroke of the piezoelectric reed and inhibit the compound bending of the reed. The tuning mass member is sized relative to the piezoelectric reed to obtain a natural resonant frequency of vibration of the power supply of approximately 60 Hz, corresponding to common wheel vibrations which occur during vehicle operations. In operation, centrifugal forces operate to urge the tuning mass member away from the radiating center of the rotating wheel. Such forces tend to align the plane defined by the piezoelectric reed element with a radiating center line. In the event the reed element is not aligned at a rest equilibrium state with a radiating center line, centrifugal forces cause the reed element to bend into such an alignment and may urge the tuning mass member into continued engagement with an adjacent stop member. Such continued engagement would operate to reduce the vibration of the reed element and accordingly reduce the ability of the power supply to power the radio circuit. When the reed element is properly aligned along a radiating center line, the power supply may enjoy a maximum vibrational stroke during operation with optimum ability to power the radio circuit.
U.S. Pat. No. 6,438,193 discloses a self-powered revolution counter of a tyre, comprising a mechanical-electrical energy converter and a revolution counting circuit. One piezoelectric crystal element acts both as energy converter and as revolution sensor. The piezo element is attached to or embedded within the inner wall of the tyre, under the tread or the sidewall, in a way which causes it to flex with the tyre each time the circumferential sector of the tyre containing the piezo element is compressed against the road or other vehicle-supporting surface. A positive pulse is generated when the piezo element is flexed. When straightened again, the piezo element produces damped oscillating positive/negative signal at a significantly lower peak level than the positive pulse. The damped oscillations are determined by physical characteristics of the piezo element (mass, compliance). A typical measured oscillation frequency is on the order of 100 Hz. According to the authors, these oscillations are beneficial for enemy conversion. A prepared embodiment of the piezo element disclosed in the '193 patent is a circular unimorph having two circular plates bonded together and a piezo crystal plate in the center. According to the authors, the stress distribution is more uniform in this configuration than that obtained with a bimorph implemented in a typical cantilever mounting. The authors also disclose that an open voltage of 34 V was obtained with a large deflection in a tested cantilever-mounted bimorph piezo element. However, the Applicant notes that details related to the structure of the tested cantilever-mounted bimorph piezo element and to its mounting within the tyre are not disclosed in the '193 patent.

Method and system for generating electrical energy within a vehicle tyre


A method for determining an optimal pacing timing control parameter setting is provided for use in an implantable medical device programmed to deliver a pacing pulse in response to the timing control parameter. The method includes storing a user-selected optimization metric, iteratively adjusting the timing control parameter setting, sensing a first signal that varies in response to left ventricular wall acceleration, measuring the user-selected optimization metric in response to the sensed first signal, and determining an optimal timing control parameter value in response to the measured user-selected optimization metric.

During normal cardiac function, the left ventricle fills during two diastolic phases, a passive filling phase and an active filling phase. The passive filling phase occurs first as the ventricle relaxes following ventricular systole. Ventricular relaxation causes the pressure within the left ventricle to fall, allowing the mitral valve between the left atrium and left ventricle to open. Blood flows into the left ventricle through the left atrium during the passive filling phase due to the pressure difference across the mitral valve. As the passive filling rate slows, the left atrium contracts, actively contributing to ventricular filling. The force generated by the actively contracting left atrium forces more blood into the ventricle.
This atrial contribution to ventricular filling is important in maintaining an adequate preload for optimal ventricular contraction. According to the Frank-Starling law, the ventricles contract more forcefully during systole when filled to a greater degree during diastole. Generally, cardiac stroke volume increases as cardiac filling increases. During many disease states or during various physiologic conditions such as exercise, an overlap between the phases of active atrial contraction and passive left ventricular filling can occur. This can result in reduced atrial contribution to ventricular filling as the pressure gradient across the mitral valve is reversed from normal upon the onset of systole. This contributes to aphysiologic conditions including mitral regurgitation and flow reversal through the pulmonary vein, manifesting itself with a clinical symptom referred to as "pacemaker syndrome". If atrial contraction occurs too late after the passive filling phase, ventricular contraction may have already begun, closing the mitral valve. Thus, late atrial contraction may cause the atria to contract against a closed or partially closed valve, which can result in retrograde flow. Early atrial contraction, prior to the end of the passive filling phase, results in fusion of the passive and active filling phases. The force available from the contracting atria is under-utilized when blood is forced into an empty or only partially filled ventricle. This reduces the overall filling of the left ventricle and results in reduced effectiveness of systolic contraction.
During a number of cardiac stimulation therapies, including dual chamber pacing, cardiac resynchronization therapy, and extra-systolic stimulation among others, an atrial-ventricular (AV) delay is set to control the timing between atrial depolarization and ventricular depolarization. The AV delay can be optimized based on various hemodynamic measurements which are aimed at improving either diastolic or systolic function but may or may not improve both diastolic and systolic function. The AV delay is commonly optimized using echocardiography for maximizing left ventricular filling time while ensuring that the atrial contribution to diastolic filling is not truncated.
A physician's criteria for determining a patient's optimal left AV delay is often based on the patient's underlying disease and symptoms. The patient's symptoms mitigated after an AV delay optimization procedure are therefore dependent on the individual patient's disease, cardiac contractile function or physiologic compensatory mechanisms. The patient's disease and functional state may be associated with systolic or diastolic dysfunction and this information is utilized clinically to determine the various pacing therapy parameters that should be optimized in an attempt to achieve the greatest patient benefit. Furthermore, an AV delay setting determined to be optimal during an office visit may change over time due to changes in disease state, patient activity level, medications or other influences. Other timing parameters, such as AA delays and VV delays may also impact diastolic and systolic function and therefore may be optimized to achieve a desired benefit of a particular pacing therapy. Optimization of one timing parameter may influence the optimal value of another timing parameter.

Method and apparatus for determining optimal pacing therapy timing intervals


Circuitry and method to enhance the infrared illumination of nearby obstas detected by lidar, radar and passive IR detectors on low flying high speed aircraft.

1. Field of the Invention
The present invention generally relates to night vision infrared imaging systems as used in helicopters, e.g. night vision goggles.
2. Description of Prior Art
Beginning September 1990, a system was built and subsequently flight tested using a projected cueing technique as a warning in terrain avoidance. The services in this and other countries have tested prototype night vision sensors to detect and display small obstacles such as wires and poles. These types of obstacles are particularly hazardous to low flying helicopters and certain fixed wing aircraft that fly similar reconnaissance missions. These sensors include both laser systems such as the British LOCUS CO.sub.2 laser light detection and ranging system (lidar) and conventional microwave radars such as the french ROMEO radar. The U.S. Army has recently awarded a contract for a diode laser lidar under the name of OASYS. All these systems employ some form of warning system inside the cockpit, which may include an audible alarm and/or an indication on a heads-up or heads-down display. These indirect warning systems have the limitation that while the obstacle location is indicated, the hazard may not be seen or correctly evaluated by the pilot. There is a need for a cueing system that interacts directly and visually with the pilot to better locate and identify an obstacle in the shortest possible time.

Night vision projected infrared cueing system

The United States of America as represented by the Secretary of the Army


A method includes identifying, by a communication device, an audience including one or more viewers, generating a preference profile for the audience, correlating the generated preference profile to one or more social profiles, determining, based on the generated preference profile, the one or more social profiles, and a database of social influencers, a contextual influence, the contextual influence identifies and quantifies a possible reaction of the audience to a video content, computing a plurality of potential video advertisements from a plurality of video templates, the computing is based on the determination of the contextual influence, and ranking the computed plurality of potential video advertisements according to the contextual influence.

The present invention generally relates to contextual computing and more particularly to real time contextualization of videos based on video templates and entity recognition.
The ability to dynamically create or adapt appropriate personalized video content in a contextually sensitive manner is becoming increasingly important in areas such as advertising. Since a wide variety of sensor-enabled devices are currently available, information about an individual audience may be collected and analyzed in a real-time fashion. This may provide an environment in which video advertisements may be generated to target an audience including a plurality of viewers in a highly personalized way.

International Business Machines Corporation


Provided is an electronic device that includes an LTCC inductor including a first sheet disposed on a substrate and including a first conductive pattern, a second sheet disposed on the first sheet and including a second conductive pattern, and a via electrically connecting the first conductive pattern to the second conductive pattern, and a spacer disposed on a lower surface of the first sheet to provide an air gap between the substrate and the first sheet, wherein the first conductive pattern is exposed out of the lower surface of the first sheet.

The present invention disclosed herein relates to a low temperature cofired ceramic (LTCC) inductor, and more particularly, to an electronic device including an LTCC inductor.
Recently, electronic devices are required to be miniaturized and have high performance. To this end, a three dimensional stacking technology for manufacturing various integrated circuits and passive devices in a single module through a system-in-package process has been widely used.
According to a low temperature cofired ceramic (LTCC) technology, inner electrodes and passive devices are printed on a plurality of green sheets formed of glass-ceramic based material, so as to form a desired circuit, and then, the green sheets are stacked and cofired to manufacture a multi-chip module.
Through the LTCC technology, a circuit substrate and a combination module having high performance and high reliability can be fabricated. At first, the LTCC technology was expected to be used in various fields, but the LTCC technology was limited only to fields requiring special reliability, such as super computer fields or aerospace fields. Thus, the market of the LTCC technology was not expanded because of typical resin multi layered substrates. However, as the mobile communication market has rapidly grown in recent years, the LTCC technology is being widely used to achieve the miniaturization, low cost and high performance of a high frequency analog circuit.
Typical ceramic multi-layered substrates, formed of alumina-based material, require a high temperature firing process. However, according to the LTCC technology, glass-based material is added to perform a low temperature firing process. As such, a firing temperature is decreased to use a high electrical conductive metal, having low cost and low melting temperature, as the material of an interconnection of an inner layer. In addition, the LTCC technology prevents the shrinkage of a green sheet in an x-axis direction and a y-axis direction, so as to fabricate a circuit without modifying an initial design.
The LTCC technology is used for power amplifier modules, engine control units (ECUs) for automobiles, band pass filters, micro antennas, and wireless interfaces of mobile phones, so as to achieve high frequency, high reliability, low cost, miniaturization and low power consumption of a product.

Electronic device including LTCC inductor

Electronics and Telecommunications Research Institute


Pressure adjusting valves (9A, 9B) control outlet pressures of variable throttle portions (8a) of directional control valves (8A, 8B) of closed center type to be kept substantially equal to a maximum load pressure detected by a detecting line (13). A variable throttle valve (40) and a pressure adjusting valve (41) are disposed in a bypass line (5) branched from a pump supply line (3) for controlling an outlet pressure of the variable throttle valve (40) to be also kept substantially equal to the maximum load pressure. The variable throttle valve (40) has an opening area controlled to be reduced with an increase in the input amount by which a control lever unit is operated, and a pump delivery rate is controlled by a tilting control device (2n) to become a flow rate corresponding to the input amount of the control lever unit.

Known hydraulic drive systems equipped on hydraulic machines such as hydraulic excavators and cranes are described in, e.g., JP-A-3-213703, JP-A-7-63203 and JP-A-1-312201.
The hydraulic drive system described in JP-A-3-213703 comprises a variable displacement hydraulic pump, directional control valves of center bypass type for controlling flows of a hydraulic fluid supplied to a plurality of actuators from the hydraulic pump, and a pump control device for controlling the delivery rate of the hydraulic pump to become a flow rate corresponding to shift amounts by which the directional control valves are operated. The directional control valves of center bypass type include each a throttle (center bypass throttle) in its center bypass passage. Downstream of the center bypass throttle, there is provided a pressure compensating valve for controlling the differential pressure across the center bypass throttle to be kept constant.
The hydraulic drive system described in JP-A-7-63203 comprises a variable displacement hydraulic pump, a plurality of actuators driven by a hydraulic fluid delivered from the hydraulic pump, a plurality of directional control valves of closed center type for controlling flows of the hydraulic fluid supplied to the plurality of actuators, a plurality of control lever units for operating the plurality of directional control valves, a bypass line connected to a delivery line of the hydraulic pump, a bleed valve disposed in the bypass line and returning the hydraulic fluid delivered from the hydraulic pump to a reservoir when the plurality of directional control valves are in their neutral positions, and a bleed control device for controlling the bleed valve so that the bleed valve has an opening corresponding to input amounts by which the plurality of control lever units are operated.
The hydraulic drive system described in JP-A-1-312201 is constructed as shown in FIG. 15.
In FIG. 15, a valve apparatus comprising pressure compensating valves 82A, 82B, variable throttle valves 80A, 80B of closed center type, and directional control valves 81A, 81B is connected to a supply line 3 of a hydraulic fluid delivered from a variable displacement pump 1. Actuators 6, 7 are connected respectively to the directional control valves 81A, 81B through load lines 81Aa, 81Ab and load lines 81Ba, 81Bb. Also, the variable throttle valves 80A, 80B and the directional control valves 81A, 81B are driven for operation by respective pilot pressures produced by control lever units 30A, 30B.
Lines 83A, 83B for detecting load pressures of the associated actuators are connected respectively to lines interconnecting the variable throttle valves 80A, 80B and the directional control valves 81A, 81B. The detected load pressures are introduced as control signals to the pressure compensating valves 82A, 82B, and the detecting lines 83A, 83B are connected to a shuttle valve 84. Maximum one of the load pressures of the actuators 6, 7 driven by the hydraulic pump 1 is detected through the shuttle valve 84 and introduced to a maximum load pressure detecting line 85b.
Further, in a bypass line 5 branched from the supply line 3 of the hydraulic pump 1, there are disposed an unloading valve 85 to which the delivery pressure of the hydraulic pump 1 and the detected maximum load pressure are introduced respectively through signal lines 85a, 85b and which drains a part of the flow delivered from the hydraulic pump 1 when the differential pressure between the pump delivery pressure and the maximum load pressure exceeds the pressure difference preset by a spring 85s, and a pressure generator, downstream of the unloading valve 85, comprising a throttle 42 and a relief valve 43. A pressure generated by the pressure generator is introduced to a tilting control device 2n of the hydraulic pump 1 through a signal line 44 to carry out negative flow control under in such a manner that the delivery rate of the hydraulic pump 1 is decreased or increased in accordance with an increase or decrease of the pressure generated by the pressure generator depending on an increase or decrease of the amount by which the hydraulic fluid is drained through the unloading valve 85.

Hitachi Construction Machinery Co., Ltd.


A device includes a housing that can be transported between remote locations. The housing includes base and cover members conjoined therewith. The base member includes an open top end and a divider position in a cavity thereof, defining isolated chambers within the housing. The cover member includes a divider mateable with the divider of the base member. A mechanism is included for locking the cover member to the base member. A mechanism is included for collecting body excrements from the patient and is in fluid communication with one of the chambers. A mechanism is included for cleansing a selected portion of the patient and is in fluid communication with another chamber. The cleansing mechanism and the collecting mechanism are independently and simultaneously operable, and are electrically mated to an external power supply source.

1. Technical Field
This invention relates to collection and cleansing devices and, more particularly, to a portable collecting and cleansing device for collecting body excrements and promoting hygiene for bed-ridden patients.
2. Prior Art
Accommodating the physiological necessity to urinate or defecate on the part of incapacitated or infirm patients is problematical. Proposed solutions to this need have demonstrated that it is an illusive problem. The ubiquitous bedpan generally has been employed for this procedure. However, where the patient is severely incapacitated, for example, in recovery from stroke and the like, the procedure is highly physically taxing both on the part of the patient and the medical attendant.
The most prevalent care for person so disposed is to apply diaper-like absorbing material or diapers to contain or absorb solid and fluid excrement, respectively. However, this requires much attention from a nurse or attendant and is extremely uncomfortable for the physically impaired person. This is especially true in cases where the discharge of excrement is constant because complete cessation of bowel and urination control has been lost.
A number of prior art devices are known for collecting and storing fluid and solid excrement. Although such collecting and storing devices are sufficient for their intended applications they still have various drawbacks. The greatest limitation of current collecting devices is the considerable weight and size associated with these devices. Often times, people reach a point in the course of their rehabilitation where movement by their own accord is possible. However, they are still dependent on the collecting device that has such a considerable weight that the device effectively prevents them from becoming mobile again.
Accordingly, a need remains for a portable collection and cleansing device in order to overcome the above-noted shortcomings. The present invention satisfies such a need by providing a portable collection and cleansing device that is convenient and easy to use, is practical in design, and provides healthful benefits to the user and their caretaker(s). Such a device is appealing to a wide range of people and is utilized by bedridden as a convenient alternative to catheterization or adult diapers. The user benefits from the waste storage and disposal device that offers hygiene benefits as well. Such a device also reduces or eliminates the need for constant assistance, which aids in providing the individual with a higher level of sufficiency and self-esteem.

Portable collection and cleansing device


A CMOS device having dual polycide gates is formed by first providing a silicon substrate, which is divided into a cell area and a peripheral circuit area and has a device isolation layer, a P-well, and a N-well in the peripheral circuit area. The n+ polycide gate at the P-well and the p+ polycide gate at the N-well are formed. An interlayer dielectric layer is formed on the resultant of the silicon substrate having the n+ polycide gate and the p+ polycide gate. A first bit-line contact hole for exposing the n+ polycide gate is formed, and a second bit-line contact hole for exposing the p+ polycide gate is formed. Bit-lines with a bridge structure on the interlayer dielectric layer is formed. The bit-lines simultaneously contact the n+ polycide gate and the p+ polycide gate through the first and second bit-line contact holes.

1. Field of the Invention
The present invention relates generally to a CMOS device and a method of manufacturing the same, and more particularly to a CMOS device with dual polycide gates and a method of manufacturing the same, which is capable of stabilizing gate characteristic of peripheral circuit region.
2. Description of the Prior Art
As well known in the art, a gate of a MOS device has been primarily made from polysilicon. This is because the polysilicon has proper physical characteristics for a gate, such as a high melting point, facilitation of thin film formation, facilitation of a line pattern, stabilization for an oxide atmosphere, and flat surface formation. Further, in the case where the polysilicon is actually applied to MOSFET device, the gate made from the polysilicon implies dopant such as Phosphorus, Arsenic, Boron, etc. and achieves a low resistance.
However, with increasing integration of MOS devices, the line widths and resistance of gates should decrease. In order to achieve low resistance in the fine lines having the narrow width in highly integrated devices, research has been actively undertaken in pursuit of a transitional metal polycide gate, which will have the structure in which a transitional metal-silicide, such as tungsten silicide, titanium silicide, nickel silicide and the like, and polysilicon are stacked instead of an existing polysilicon gate. Especially, the tungsten silicide of the transitional polycides can realize a low resistance on a fine wire width, and satisfies characteristics required as the gate. Thus, the tungsten silicide is expected to have a use in manufacturing large integrated devices.
On the other hand, CMOS device has n+ polysilicon gate formed in all of NMOS and PMOS regions. In this case, there is a problem in that a buried channel is formed by a counter-doping in the PMOS region, which thereby increases a short channel effect.
As an attempt to solve the problem above problem, a method of forming a dual gate has recently been used, in which n+ polysilicon gate is formed in NMOS region and p+ polysilicon gate is formed in PMOS region. The dual gate forming method solves the problem due to the buried channel by forming surface channels in both the NMOS and PMOS regions.
Further, a technology for forming dual polycides, which includes a dual gate forming technology and a polycide gate forming technology grafted together, has been proposed. In order to realize a gate in a highly integrated device having low resistance as well as being able to restrict the short channel effect, the technology for forming dual polycides is necessary.
Hereinafter, a method of manufacturing CMOS device with dual polycide gates according to a conventional art will be described in brief with reference to FIGS. 1A to 1D.
Referring to FIG. 1A, after a device isolation layer 2 is formed in a silicon substrate 1 to define an active region, masking process and ion implant process as well-known are performed to form P-well 3a and N-well 3b on the silicon substrate 1. Then, a gate oxide layer 4 and a polysilicon layer 5 are sequentially formed on the silicon substrate 1 on which the device isolation layer 2 and the wells 3a and 3b.
Referring to FIG. 1B, the masking and ion implantation processes are performed by known methods to form n+ polysilicon layer 5a and p+ polysilicon layer 5b in the P-well 3a and the N-well 3b, respectively.
Referring to FIG. 1C, a metal silicide layer 6 and a hard mask layer 7 are sequentially formed on polysilicon layers 5a and 5b of which regions are differently doped.
Next, though not shown in detail herewithin, after the hard mask layer 7 is patterned to define the gate region, the metal silicide layer 6, the doped polysilicon layers 5a and 5b, and the gate oxide layer 4 below the patterned hard mask 7 are sequentially etched by using the patterned hard mask 7 as an etching barrier, thereby forming the dual polycide gate including n+ polycide gate 10a for NMOS and p+ polycide gate 10b for PMOS.
Referring to FIG. 1D, an insulating interlayer 8 is formed on the resultant to cover the dual polycide gate. Then, after the insulating interlayer 8 and the hard mask layer 7 are etched to form a bit line contact hole 9, a bit-line 15 contacting the metal silicide layer of the dual polycide gates 10a, 10b is formed on the insulating interlayer 8.
FIG. 1E is a plan view showing a CMOS device manufactured by the method of FIG. 1D, where FIG. 1D is a cross-sectional view taken along the line A-A′ in FIG. 1E. As shown in FIG. 1E, the dual polycide gate 10, i.e. continuous word-lines are transversely arranged, while the bit-lines 15 are longitudinally arranged perpendicularly to the word-lines. The bit-line 15 contacts the corresponding one of the word-lines at the "contact" point as shown FIG. 1E, which more exactly is at the boundary between the NMOS and PMOS.
In the conventional method of forming dual polycide gate as described above, however, a dopant inter-diffusion may likely occur between the NMOS and PMOS in the peripheral circuit region.
Specifically, since the n+ polysilicon layer 5a of the NMOS and the p+ polysilicon layer 5b of PMOS are adjacent to each other in the peripheral circuit region, n type impurity and p type impurity doped in the n+ polysilicon layer 5a and p+ polysilicon layer 5b, respectively, are inter-diffused through the metal silicide layer, so as to cause a counter-doping effect in each gate polysilicon layer in an annealing process for a formation of the interlayer dielectric layer and a succeeding process. Thus, a serious gate depletion effect occurs, in which a sufficient concentration of impurities in each gate polysilicon layer quickly decreases. As a result, the electrical characteristics of the device will degrade (e.g. the threshold voltage changes). Even worse, it may cause a transistor to lose its on/off operational capability.
In addition, the distance between devices in the peripheral circuit region has decreased in the highly integrated semiconductor devices. Therefore, the likelihood of dopant inter-diffusion between the gate of the NMOS and the gate of the PMOS increase as the devices are further highly integrated. It is expected that the gate depletion effect will be more serious due to this dopant inter-diffusion.

CMOS device with dual polycide gates and method of manufacturing the same


A rotary cutter mechanism includes a rotary blade which is rotatably provided around a shaft center and which includes a first cutting edge portion, a counter blade which is provided to face a locus drawn by the first cutting edge portion of the rotating rotary blade and which includes a second cutting edge portion, and a protruding member which is provided on the edge portion of the rotary blade on the first direction side and which protrudes from the rotary blade toward a rotation direction side, the rotation direction side being a side on which the rotary blade faces the object to be cut in a case where the object to be cut is cut between the first cutting edge portion and the second cutting edge portion.

The present disclosure relates to a rotary cutter mechanism that cuts an object to be cut.
A rotary cutter mechanism is known that can cut an object to be cut that is transported. This type of rotary cutter mechanism is provided, for example, on a sheet attachment device in order to cut an adhesive tape. In the sheet attachment device, a roller is provided separately from a rotary cutter. In the sheet attachment device, the rotary cutter cuts the adhesive tape while the roller is pressing the adhesive tape against a paper tag.


The present invention relates to a spread spectrum signal reception apparatus for receiving a code division multiplex signal, and for receiving a spread spectrum signal for synchronization previous to the code division multiplex signal. The reception apparatus detection means for detecting a reception level of the spread spectrum signal for synchronization previous to the code division multiplex signal, and adjustment means for adjusting a level of the code division multiplex signal in accordance with the reception level detected by the detection means.

1. Field of the Invention
The present invention relates to a spread spectrum signal reception apparatus for receiving the code division multiplex signal.
2. Related Background Art
The present applicant proposed a spread spectrum signal reception apparatus which controls the amplifying ratio of an amplifier, in Japanese Patent Application No. 3-304005 (Japanese Patent Application Laid-Open No. 5-122192), by utilizing the peak of a correlator output as an automatic gain control (AGC) voltage.
The constitution of a reception apparatus explained in Japanese Patent Application Laid-Open No. 5-122192 is shown in FIGS. 4 and 5.
Next, an operation of the circuit shown in FIG. 4 will be explained.
A convolver output detected by a detector 41 is further detected of its peak value by a peak level detector 22.
An output of a detector 41 is input to a noise level detector 23 and the noise level is detected by this noise level detector 23. A noise level detector 23 interrupts only the regular peak portion of a convolver output and detects the peak of another portion.
Then, the difference between the peak level and the noise level is detected by a difference detector 24. This difference corresponds to the ratio of the convolver output signal to the noise. When this difference voltage becomes higher, the S/N ratio of a convolver output is improved. Accordingly, gains of two variable amplifiers 13 and 19 are controlled to become the appropriate value respectively from a control voltage generator 25 so that this difference voltage becomes a certain predetermined value V.sub.0. Accordingly, the S/N ratio of a convolver output can be held at the best condition irrespective of variation of the reception wave level, with maintaining the output voltage of a difference detector 24 at the previously set value V.sub.0. It should be noted that a first local oscillator may be controlled instead of an amplifier 13.
Next, an operation of the circuit shown in FIG. 5 will be explained.
The correlation output of a convolver 14 has the known output interval t.sub.1 given with the transference rate of information to be transferred. Also, the width t.sub.2 of the correlation output is already known. The correlation output is sent to a detector 41 through a high frequency switch 33 and further sent to a code synchronization unit.
In case where the code is synchronized by detecting the peak of the most large correlation output depending on an envelope detection, if a correlation output of the delay wave component depended on the multi-pass is observed, it becomes difficult to synchronize the code because the peak interval is deviated due to the delay wave.
Accordingly, in a circuit shown in FIG. 5, a high frequency switch 33 is switched responding to the interval of a correlation output depended on a desired wave component to eliminate the correlation output component due to the delay wave.
When the switch signal of a switch signal generator 34 is on-state, a high frequency switch 33 becomes through-state and the correlation output is sent to a detector 41. That is, when the switch signal is off-state, a high frequency switch 33 acts as an attenuator to attenuate the correlation output, and when the switch signal is on-state, a high frequency switch 33 becomes through-state to conduct the correlation output to the detector 41 side.
Accordingly, the correlation output eliminated delay wave component can be obtained by fitting the cycle of the switch from a generator 34 to the interval t.sub.1 of the above correlation output, and fitting the on-timing of the switch signal to the timing of the desired wave, further by setting the on-pulse width t.sub.3 of the switch signal narrower than the width t.sub.2 of the above correlation output (t.sub.3 <t.sub.2).
The switch signal from a generator 34 is maintained at the on-state until the initial correlation output is obtained after the power is turned on. Due to this fact, the initial correlation output is sent to a detector 41 and the detection output is input to a timer circuit 35. According to this, a timer circuit 35 is operated and the timer output is switched from an off-state to an on-state with the timing (t.sub.m) responded to the interval t.sub.1 of the above correlation output to turn on the switch signal of a switch signal generator 34. Then, from the second correlation output, the switch signal is ON/OFF controlled in response to the interval t.sub.1 of the correlation output by the own operation of a timer circuit 35. That is, the on-pulse width t.sub.3 and the off-pulse width (t.sub.1 -t.sub.3) are set together with the initial off-time t.sub.m in a time circuit 35.
However, in a burst synchronization system, if the AGC is utilized, the ratio for an input level of the correlator output for extracting the synchronization signal is greatly changed between the burst synchronization period and the multiplex demodulation period subsequently followed, and the AGC output level does not become a constant level. Therefore, an operation point is greatly changed in a later stage, so that the circuit design becomes difficult.
During the multiplex demodulation period, it is difficult to realize the accurate AGC by only the synchronization signal in a correlator output because of the influence of interference due to the mutual correlator of channels other than synchronization signal channel.

Spread spectrum signal reception apparatus