A gaming system which provides a persistence game which utilizes predetermined game outcomes. One or more predetermined game outcomes include a persistence game award value. If a predetermined game outcome including such a persistence game award value is selected to be provided to the player in association with a current play of a primary game, the gaming system determines whether to provide this persistence game award value to a player in association with the current play of the primary game, or to store this persistence game award value to be subsequently provided to a player in association with a subsequent play of the primary game. The determination of whether to provide or store the persistence game award value is based on the then current progress of the persistence game (i.e., the current state of an accumulation meter).

The majority of the contemporary wagering gaming devices or gaming terminals, such as slot machines, provide games of chance which randomly generate awards and other outcomes. Such Class III gaming terminals typically randomly generate a primary game award for a play of a primary game (e.g., slot machine games, video poker games, video blackjack games, and video Keno games). For such primary games, which primary game award is randomly generated is based on a probability calculation. Such Class III gaming terminals may also randomly generate a secondary game award for a play of any secondary game, wherein which secondary game award is randomly generated is based on a probability calculation. The probabilities of obtaining each of the outcomes, such as the awards in the primary games and the awards in the secondary games and the amount of each of the awards determine the average expected pay out percentage of such Class III gaming terminals. Because the awards or other outcomes of these gaming terminals are randomly determined, there is no certainty that a player will ever obtain any particular award. That is, no matter how many times a player plays a primary game or a secondary game, since these Class III gaming terminal generates outcomes randomly (i.e., based upon a probability calculation), there is no certainty that the gaming terminal will ever provide the player with a certain outcome, such as the highest paying award. On the other hand, due to the random determination, these gaming terminals can provide a certain outcome without limit, such as the highest paying award, numerous times in a small number of plays.
Certain known secondary games of Class III gaming terminals are played over the course of a number of plays of the primary or base game. Such secondary games provide one or more players an award for their persistence in playing the gaming machine for a prolonged number of plays or period of time. In these persistence or persistence-type secondary games, in association with one or more plays of the primary game, a portion of the secondary game is played or at least one secondary game element is provided to the player. After that player (or a different player currently playing at the gaming terminal) has obtained a designated number of secondary game elements (or advanced to the secondary game a designated number of times), these Class III gaming machines provide a secondary game award to the player currently playing the gaming machine. The provided secondary game award is based on the plurality of obtained secondary game elements (or the plurality of plays of the secondary game) which randomly occur based on triggering events associated with the plurality of plays of the primary game. Because the secondary game elements of these gaming terminals are randomly determined, there is no certainty that any player will ever obtain the designated number of secondary game elements to be provided the secondary game award.
One known Class III gaming terminal with a persistence or persistence-type secondary game includes a non-retreating or non-decreasing accumulator or accumulation meter which must be filled to win a secondary game award. The non-retreating accumulator or accumulation meter of this known persistence secondary game will not decrease until the secondary game award is provided. In this persistence secondary game, each time a suitable outcome randomly occurs in association with a play of a primary game, such an accumulation meter increases or is otherwise suitably incremented. After the accumulation meter is full (i.e., the suitable outcome has randomly occurred a designated quantity of times in association with a plurality of plays of a primary game), the gaming terminal provides a secondary game award to the player currently playing at that gaming terminal.
In one version of a persistence secondary game with such an accumulation meter, upon an initiation of a first play of a primary game, the gaming terminal sets the accumulation meter to an initial or reset amount. For each play of the primary game in which the gaming terminal randomly generates a designated outcome, such as a losing game outcome, the gaming terminal increases the accumulation meter. For each play of the primary game in which the gaming terminal randomly generates a non-designated outcome, such as a winning game outcome, the gaming terminal causes the accumulation meter to remain unchanged. In this version, when the accumulation meter increases to a threshold amount (i.e., the gaming terminal has generated a suitable quantity of designated game outcomes), the gaming terminal provides a secondary game award associated with the accumulation meter to the player currently playing at the gaming terminal and resets the accumulation meter. Because the accumulation meter of this persistence secondary game increases based on a suitable outcome randomly occurring in association with a play of a primary game, there is no certainty that the accumulation meter will ever full and the gaming terminal will ever provide a secondary game award to any player.
Another known Class III gaming terminal with a persistence or persistence-type secondary game includes a retreating accumulator or accumulation meter which must be filled to win a secondary game award. The retreating accumulator or accumulation meter of this known persistence secondary game may decrease before the secondary game award is provided. Such an accumulator or accumulation meter increases upon one or more suitable random events occurring in one or more plays of a primary game and decreases if one or more suitable random events do not occur in one or more plays of the primary game. In such secondary games, a previously increased accumulation meter (i.e., a partially-filled accumulation meter) will decrease unless a suitable random event occurs in association with a subsequently played primary game to maintain any previous increase of the accumulation meter. That is, such an accumulator or accumulation meter (i) increases upon one or more suitable first random events occurring in one or more plays of a primary game; (ii) decreases upon one or more suitable second random events occurring in one or more plays of the primary game; and (iii) does not change when no suitable first random events nor suitable second random events occur.
In one version of a known Class III gaming terminal including a persistence secondary game with a retreating accumulator or retreating accumulation meter, upon an initiation of a first play of a primary game, the gaming terminal sets the accumulation meter to an initial or reset amount. If the gaming terminal randomly generates a first type of designated outcome (e.g., a first type of losing game outcome) for the first play of a primary game, the gaming terminal associates the accumulation meter with this type of designated outcome and increases the retreating accumulation meter. In this version, if for a second play of the primary game, the gaming terminal again randomly generates the same type of designated outcome as is currently associated with the accumulation meter (e.g., the first type of losing game outcome is generated again) the gaming terminal increases the retreating accumulation meter. On the other hand, if for the second play of the primary game, the gaming terminal randomly generates a different type of designated outcome than is currently associated with the accumulation meter (e.g., a second, different type of losing game outcome is generated), the gaming terminal resets the retreating accumulation meter, associates the accumulation meter with this, different type of designated outcome and increases the retreating accumulation meter. Moreover, if for the second play of the primary game, the gaming terminal randomly generates a non-designated outcome (e.g., a winning game outcome), the gaming terminal does not increase or decrease the retreating accumulation meter. This process of increasing, decreasing or not modifying (i.e., not increasing or decreasing) the retreating accumulation meter based on the generated primary game outcome continues as described above until the accumulation meter increases to a threshold amount or level.
In one known Class III gaming terminal including a persistence secondary game, when the accumulation meter increases to the threshold amount or level, the gaming terminal provides a secondary game award associated with the accumulation meter to the player currently playing at the gaming terminal and resets the accumulation meter. In another known Class III gaming terminal including a persistence secondary game with a plurality of different threshold amounts or levels, when the accumulation meter increases to the threshold amount or level, the gaming terminal enables the player currently playing at the gaming terminal to either accept the secondary game award associated with the current threshold level of the accumulation meter or reject this secondary game award and attempt to increment the accumulation meter as described above to another, higher threshold level. Because the accumulation meter of this persistence secondary game increases based on a random event occurring and further decreases based on a random event not occurring, there is no certainty that the accumulation meter will ever full and the gaming terminal will ever provide a secondary game award to any player.
The above-described uncertainties are faced by both players and casinos (or other gaming establishments). For example, certain casinos prefer that a relatively high number of players hit low awards while a relatively low number of players hit high awards. When players hit high awards periodically, certain casinos can attract more players, because of the positive publicity these large wins generate. By using desired payback percentages or probabilities, the casinos can also expect to make a certain level of profit. The random determinations can, however, unexpectedly cause casinos to suffer a loss or, on the other hand, to reap great profit in the short run and lose business in the long run due to a reputation for only paying out low awards. In other words, a given casino can expect to earn a certain profit percentage in the long term for a given casino game. However, over a designated period of time, a given casino can also suffer a financial loss on a given game. That is, a game with more-frequent high-value awards above a certain high-value threshold is mathematically more likely to generate a loss for the casino over the designated period of time relative to a similar game (with an equal long-term payback percentage) that has less-frequent high-value awards above the high-value threshold (and a greater likelihood of providing lower-value awards at or below the high-value threshold). Accordingly, a typical casino offering Class III games must balance its interest in reducing its financial risk with the interests of certain players that prefer games with more-frequent high-value awards above a certain high-value threshold.
Regulatory bodies in certain jurisdictions do not permit the use of probability-based gaming terminals in-part for certain of these reasons. These regulatory bodies instead permit the use of Class II wagering gaming terminals which are provided in two major forms: (1) a bingo-based Class II systems and (2) a central pull-tab systems. Typical bingo-based Class II systems provide awards based on the automatic play of a multi-player bingo game, wherein the bingo-game outcomes are displayed in a bingo-game form (and/or a slot game form, a video poker game form or any suitable form). Typical central pull-tab systems provide a set or pool of certain or definite awards. Certain pull-tab outcome pools, often referred to as paper pull-tabs, provide game outcomes via a physical collection of paper-tickets. Certain pull-tab outcome pools, often referred to as electronic pull-tabs, provide game outcomes via a collection of data in an electronic or electromechanical data storage mechanism. Generally, in pull tab based systems, a certain number of wins are guaranteed and the overall amount paid back to players is guaranteed. That is, the actual payback percentage is static and not an average expected amount.
In certain jurisdictions, to comply with the above-mentioned regulatory rules that do not permit the use of probability-based gaming terminals, centralized electronic pull-tab systems, also known as central determination gaming systems (including a plurality of individual gaming terminals in communication with a central processor or controller) have been implemented wherein the central system maintains one or more predetermined pools or sets of predetermined game outcomes. Each predetermined game outcome in each set or pool includes a game outcome component (i.e., a win, a loss, a secondary game trigger or other suitable outcome) with an associated value or payout amount, if any, and a game presentation component (i.e., how the game outcome is displayed or presented to the player). In these systems, when a player makes a wager on one of the Class II gaming terminals, the central system independently selects a predetermined game outcome from a set or pool of predetermined game outcomes and flags or marks the selected game outcome as used. Once a game outcome is flagged as used, it is prevented from further selection from the set or pool and cannot be selected by the central controller upon another wager. The selected predetermined game outcome is communicated to the individual gaming terminal. The individual gaming terminal displays or presents the game presentation component and provides the player the game outcome component with the associated value, if any, for the selected game outcome. This type of Class II central determination gaming system provides players with all of the available predetermined game outcomes over the course of the play cycle and guarantees the actual wining outcomes and losing outcomes in the pool or set.
In addition to central determination gaming systems which provided predetermined game outcomes, other known Class II gaming terminals are configured to provide a player a predetermined game outcome. In these gaming terminals, rather than receiving a predetermined game outcome from a central controller, the gaming terminal stores a plurality of predetermined game outcomes in a memory device. Upon a player initiating a game at the gaming terminal, the predetermined game outcome which will ultimately be provided to the player is selected and flagged or marked as used. The gaming terminal then proceeds with one or more game sequences and upon the conclusion of the game sequences, the selected predetermined game outcome is provided to the player. In another version of a Class II gaming terminal, a predetermined game outcome is determined based on the results of a bingo or keno game. In this version, a plurality of individual gaming terminal each utilizes one or more bingo or keno games to determine the predetermined game outcome which will be provided to the player for any game played at that gaming terminal.
As the predetermined game outcome in a central determination gaming system is selected by the central controller for each game played and as the game outcome in a persistence secondary game is determined over a plurality of plays of the secondary game, no known central determination gaming system provides a predetermined game outcome as a result of a persistence secondary game. That is, an inconsistency occurs between providing a separate predetermined game outcome for each game played (i.e., a central determination gaming system) and providing one outcome for a plurality of games played (i.e., a persistence secondary game). Moreover, an inconsistency occurs between Class III gaming terminals with a persistence secondary game that is uncertain to ever provide a secondary game award to a player and Class II gaming terminals with predetermined outcomes that are guaranteed to be provided to a player. Accordingly, a need exists to provide a persistence secondary game that is operational in a central determination gaming system.

Central determination gaming system and method for providing a persistence game with predetermined game outcomes


Configurable LED light improving community safety and the environment by providing illumination as function of internal self-diagnostics and status of ambient environment, comprising: controller, sensors, LED's, interfaces, enclosure. Sensors include: ambient light, proximity, temperature, voltage, current. Interfaces include: wireless, INTERNET. LED's configurations include: single color, multicolor, flexible PCB. Enclosure configurations include: water-proof, recess, surface mounting, hidden magnets for latch-in mounting. Controller configurations define real-time control algorithm based on: sensor status; time based controls; apparatus operating acceptance criteria. Apparatus acceptance criteria include: operation within specifications; optimization of energy consumption; contribution to environmental safety. Control algorithm includes: real-time internal and external diagnostics; and controls sustaining operation within acceptance criteria. Apparatus configurations stored in non-volatile memory. LED's produce illumination parallel to the viewing surface. Apparatus in compliance with local and national regulations, and compatible with patent pending plug and power distribution. Installations include: ceilings, walls, floors; furniture; appliances; lamps; aquariums; billboards; backlighting art.

LED as illuminated devices for general lighting gain popularity in a variety of application, including residential light bulbs, replacing the inefficient and less reliable incandescent light bulbs. Majority of devices used for general lighting, unless covered or located at a different angle, are generating direct illumination, by sending the generated light directly toward the surface aimed for illumination. While this is, perhaps, the most energy efficient method of using the light, it does create problems. In majority of application, when an user looks toward an existing light fixture, the source of light is so bright and "focused" or concentrated, that the entire experience of looking at a light fixture could be very unpleasant and may present a health hazard. In addition, since the light sources radiate energy in the direction of the light, long exposure to this sort of radiation, may also cause concerns in respect to health. This is in particular true, when a large billboard or display with huge number of LED's is viewed from a short distance. The highly concentrated source of light with moderate diffusing will still cause a "blinding" effect after being looked even for a short period of time. Increasing the "density" of diffusing the "bright spots" to eliminate the "blinding effect", will significantly reduce the efficiency of generating illumination per unit of electricity. Not all users are educated or even old enough to understand the importance of avoiding looking directly at the existing bright sources of light for an extended period of time. It is definitely not healthy or even pleasant looking at a light bulb shining the light directly into your face. In terms of energy conservation, most of lights lack intelligence, i.e. embedded controls, which limits their configuration options. In addition, most have no self-diagnostics, which would allow the light to monitor the environment, and adjust its performance to: sustain reliability and longevity of the product, maintaining efficiency of utilizing energy resources powering the light, etc. In addition, illuminated devices, including the ones providing general illumination of our homes, commercial buildings, etc., at some point will need to comply with local and state ordinances. As technology is moving forward, the ordinances are revised to take advantages of emerging technologies. It would be beneficial to have intelligent illuminated lights, which can be initially configured to meet current regulations, including ordinances, and then re-configured to incorporate modifications to the ordinances.

Apparatus intelligent parallel view LED light, methods of configuration and controls


A hybrid hydraulic system for a work vehicle is provided that includes a first fixed displacement hydraulic pump whose outlet is connected to a priority valve. The priority valve, in turn, directs the pump's flow to a first group of closed center backhoe valves on a primary circuit and a second group of open center loader valves on a secondary circuit. A second hydraulic pump is provided with independent load sensing capability to supplement fluid flow provided by the first pump.

Off-highway work vehicles such as loader-backhoes utilize a variety of hydraulic system architectures. One common arrangement is called an "open center" architecture. In a typically open center systems, a constant displacement pump such as a simple gear pump is used as a primary source of hydraulic fluid for the various hydraulic devices in the system. The pump provides a constant flow rate of hydraulic fluid through the system that does not vary with time. The control valves function by restricting this hydraulic fluid flow through the pump and providing an alternative path into the actuator to be moved. The pump responsively raises the pressure in its outlet line (i.e. the main hydraulic supply line) sufficient to maintain a constant flow rate through the pump. In an open center system, generally speaking, the flow rate through the pump is constant and the load on the pump and engine varies with changing head pressure.
In another common arrangement, called a "closed center" architecture, a variable displacement pump (such as a de-stroking piston pump) is provided that is configured to maintain a relatively constant output pressure regardless of the flow rate over time. The various control valves function by connecting the devices they control to the output of the pump. When the control valves provide this alternative flow path, the output pressure tends to drop and the control circuit for the pump compensates by increasing the specific displacement of the pump. When the specific displacement is increased, the pressure is restored to its design output pressure. When the operator closes the valve that conducts fluid to the desired device, the pressure increases in the system and the control circuitry for the hydraulic pump responsively reduces the specific displacement of the pump (i.e. the pump is "destroked"). In a closed center system, generally speaking, the pressure provided by the pump is constant and the flow rate is varied as necessary to maintain a constant head pressure.
Some systems are hybrids of both open center and closed center components. In these systems, some control valves are configured to operate as open center valves and some control valves are configured to operate as closed center valves. In these hybrid systems, the pump is an open center (i.e. constant displacement) pump. This mandates that one modify the closed center valves for use in an otherwise open center system. The closed center valves must be coupled to the hydraulic supply at a point downstream from the open center components in order to operate properly.
The modifications in hybrid systems include an inlet compensator at the inlet of the closed center valves that directs hydraulic fluid either to the closed center function when the closed center valves are selected, or directs it to the tank when the open center valves are used. The inlet compensator requires a constant pressure differential be established to work correctly but increases average working pressure, higher neutral standby pressures, more component complexity/cost to make the system perform correctly, increased fuel consumption, etc.
What is needed is a system for directing fluid flow to both open center and closed center components that reduces the losses in current subsystems. What is also needed is a system that eliminates the need for an inlet compensator. It is an object of this invention to provide such a system.


An interconnect structure includes an interlayer dielectric (ILD) having a cavity extending therethrough along a first direction. A first electrically conductive strip is formed on a substrate and within the cavity. The first electrically conductive strip extends along the first direction and across an upper surface of the substrate. A second electrically conductive strip is on an upper surface of the ILD and extends along a second direction opposite the first direction. A fully aligned via (FAV) extends between the first and second electrically conductive strips such that all sides of the FAV are co-planar with opposing sides of the first electrically conductive strip and opposing sides of the second electrically conductive strip thereby providing a FAV that is fully aligned with the first electrically conductive strip and the second electrically conductive strip.

The present invention generally relates to fabrication methods and resulting semiconductor-based integrated circuits (ICs). More specifically, the present invention relates to methods and resulting interconnect structures of ICs having fully aligned vias.
ICs commonly use metal interconnect structures (or "lines") to connect semiconductor devices such as, for example, transistors, on the ICs. These interconnect structures are typically formed using an additive damascene process or dual damascene process, in which a dielectric layer is patterned to include openings therein. A conductive metal, for example, copper (Cu) is subsequently deposited within the openings and thereafter any conductive metal that is located outside the openings is removed via a planarization process.

Interconnect structure having fully aligned vias

INTERNATIONAL BUSINESS MACHINES CORPORATION


When needing to make write accesses to both upper and lower sides of a counter in a timer, a CPU accesses the lower side last, and accesses the lower side first when needing to make read accesses thereto. The timer stores data of the data bus in the write buffer at the write access to the upper side, and writes the data of the data bus to the lower side and writes the data of the write buffer to the upper side at the write access to the lower side. At the read access to the lower side of the counter, the timer reads the data of the lower side for output to the data bus and reads the data of the upper side for storage in the read buffer. At the read access to the upper side, it outputs data of the read buffer to the data bus.

1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and, more particularly, to an IP (Intellectual Property) macro re-used to improve the design efficiency of a system LSI or the like.
2. Description of the Related Art
Recently, CPUs have been configured in a multi-bit structure in order to cope with high-speed and high-performance of a system LSI. For example, if data input/output of a CPU is expanded from an 8-bit to a 16-bit type, then a data bus is also changed from an 8-bit to a 16-bit type. Meanwhile, an IP macro having an internal register expanded from an 8-bit type to a 16-bit type is required to be connectable not only to an 8-bit data bus but to a 16-bit data bus so as to improve the reusability.
For example, a case of expanding a counter in the IP macro (timer or the like) from an 8-bit to a 16-bit type will be described. To allow for an 8-bit CPU to obtain a counter value of a 16-bit counter via an 8-bit data bus, the 8-bit CPU needs to access both upper and lower sides of the 16-bit counter. However, if data of the upper side and lower side (both of which are a length of 8 bits) of the 16-bit counter are read at different timings, the 8-bit CPU cannot obtain the counter value of the 16-bit counter correctly. To solve such a problem, a typically employed method is that a 16-bit buffer is first installed in the IP macro to simultaneously store the data of the upper and lower sides during the 16-bit counter in counting operation and then read the data from the 16-bit buffer by every 8 bits. The above-mentioned method is also applied to a case where the 8-bit CPU sets a counter value of the 16-bit counter via the 8-bit data bus.
In addition, Japanese Unexamined Patent Application Publication No. 2004-280924 discloses a memory test circuit capable of testing a memory having a data width larger than a data bus of a CPU without increasing the number of test cycles.
In the above-mentioned method, however, because read data from the 16-bit counter or write data to the 16-bit counter is temporarily stored in the 16-bit buffer, the IP macro having the 16-bit counter may not operate at a same timing as the IP macro which is yet expanded to a 16-bit type (i.e., IP macro having the 8-bit counter). Consequently, a test pattern with respect to the IP macro, which is not yet expanded to a 16-bit type, cannot be employed to the IP macro expanded to the 16-bit type. As a result, a new test pattern has to be created for the IP macro expanded to the 16-bit type. Further, there is a problem in the above-mentioned method in that both of the upper and lower sides of the 16-bit counter need be always accessed even if only the lower side of the 16-bit counter need be accessed, resulting in a waste of time.


A novel terminal apparatus of low power consumption type is disclosed, in which an oscillation circuit is controlled to be energized only when a CPU is operated and de-energized otherwise, thus remarkably reducing power consumption. The progress of the CPU technology has made it possible to stop oscillation temporarily without sacrificing the CPU operation, unlike the conventional CPU circuit whose operation cannot be assured without constant application of an oscillation frequency thereto.

The present invention relates to a portable terminal apparatus of battery-powered type.
In conventional portable terminal apparatuses of this type, power is supplied for a CPU constantly from a battery while a power supply is turned on thereby to drive an oscillation circuit normally. The oscillation circuit, therefore, consumes electric power all the time regardless of the operation of the CPU.
In order to meet the present-day demand for smaller and lighter industrial equipment, however, portable terminal apparatuses are required to be reduced in power consumption.
The portable terminal apparatuses now in use comprises a C-MOS device and consumes electric power increasing in proportion to the operating frequency. Although a lower frequency is a measure for reducing the power consumption, the processing speed of the CPU would be decreased. The disadvantage of the conventional portable terminal apparatuses, therefore, cannot be obviated simply by reducing the power consumption.

Oscillation control apparatus for a portable battery-driven terminal

Matsushita Electric Industrial Co., Ltd.


The present teachings provide methods for resizing, reducing, and/or closing an atrial appendage. A delivery catheter is percutaneously advanced to the atrial appendage. At least two tissue anchors are implanted in tissue of the heart. Both tissue anchors are pulled together so that the atrial appendage is resized, reduced, and/or closed. This closure method and system could be used alone in closing the atrial appendage. This closure method and system could also be used in addition to other treatment mechanisms.

The left atrial appendage (LAA) is a muscular pouch connected to the left atrium of a heart. Since the LAA lies within the confines of the pericardium and in close relation to the free wall of the left ventricle, its emptying and filling may be significantly affected by left ventricular function.
When patients have a normal heart rhythm, the atrial appendage squeezes rhythmically with the rest of the left atrium. In doing so, all of the blood in LAA is ejected into the left atrium and distributed all over the body, including the muscles, the organs, and the brain, with the rest of the blood from that chamber.
Atrial fibrillation is a common rhythm disturbance in older patients, in which the top chambers of the heart do not beat regularly. In a fibrillating atrium, the LAA becomes a major site of blood stasis, which significantly increases the risk of clot formation. Indeed, almost 15% of all patients with nonvalvular atrial fibrillation (NVAF) develop thrombus in their heart. For those who are at the highest risk for thromboembolic events, anticoagulation, including warfarin and the newer anticoagulants, has been offered. However, this is a difficult medication and patient compliance can be difficult. Dietary restrictions are necessary, the dose of the medication may need to be changed frequently, and blood testing is required at least once a month. In addition, anticoagulation increases the risk of both intracerebral and extracranial bleeding.
Approximately 30% to 50% of patients with atrial fibrillation are not even eligible to receive anticoagulation. In the recent years, several percutaneous LAA occlusion devices have been developed. The Percutaneous Left Atrial Appendage Transcatheter Occlusion (PLAATO) device (Appriva Medical) was the first to be tested and used in humans. Since then, multiple devices have emerged, including the Amplatzer device (AGA Medical Corporation/St. Jude Medical), the Watchman device (Boston Scientific), the WaveCrest device (Coherex), LAA occluder (Occlutech), and LAmbre device (Lifetech). A common characteristic of these devices is a relative large metal cage designed to self-expand and lodge into the LAA. It has been reported that a significant learning curve exists for physicians to adopt these treatments. Device-related embolization during or after the procedure and erosion of the device into the tissue are constant concerns for these implants
LARIAT suture delivery device (SentreHeart) differs from all the above implant devices—only a suture is used to tie-up the LAA. The LARIAT device is deployed by a trans-pericardial approach, specifically, by using an epicardial snare with a pre-tied suture to lasso and occlude the LAA. Both the intracardiac trans-septal access to the LAA and direct pericardial access are required. There are many access-related complications associated with the LARIAT device, including serious pericardial effusion and major bleeding.
Surgical techniques to occlude the LAA also continue to evolve, with efforts being made to overcome the inconsistent closure, tissue tearing, and intrathoracic bleeding associated with suturing or stapling techniques. For example, a widely used device, the AtriClip® (Atricure), consisting of a parallel titanium crossbar clip covered with woven polyester fabric, has received a CE Mark and is approved by the FDA for the closure of the LAA under direct visualization in conjunction with other open cardiac surgical procedures.
Thus, drawbacks in each existing LAA closure device/method continue to demand improvement on the LAA closure technology, such as an effective closure without post-procedure complications, minimum use of metal in the implant, and minimum invasion approaches with less recovery time.

This patent is subject to a terminal disclaimer.

Method and system for closing left atrial appendage


A method of calculating a current correction formula may include first measuring voltage values at each of current measuring parts configured to measure currents in socket parts of a power strip in a state in which no current flows in the socket parts, second measuring the voltage values at each of the current measuring parts in a state in which a current flows in one of the socket parts, and calculating a correction formula formed by a inverse matrix of a matrix having as its elements differences between the voltage values measured by the second measuring and the voltage values measured by the first measuring.

The power strip may be used to supply power in homes, offices, and the like. The power strip includes sockets for connecting to a plurality of electrical apparatuses and the like, and may supply power to each of the electrical apparatuses connected to the sockets.
On the other hand, in recent years, there are demands to reduce the power consumption in consideration of the increase in power demands and the global environment. One example of the measures to reduce the power consumption requires the power consumed by each of the electrical apparatuses to be known. That is, by knowing the power consumption and the state of use of each of the electrical apparatuses, the arrangement and the like of the electrical apparatuses may be optimized in order to reduce the power consumption.
Examples of the prior art include Japanese Laid-Open Patent Publication No. 2007-522634, Japanese Laid-Open Patent Publication No. 7-240259, and Japanese Laid-Open Patent Publication No. 2002-98715.
The power strip receives power from a single socket, and supplies power to each of the electrical apparatuses connected to the sockets of the power strip. For this reason, the power strip is unable to know the power consumption of each of the electrical apparatuses connected thereto. For example, according to a method proposed in a Patent Document 3, the current flowing through the entire power strip may be detected in order to calculate the power consumption. However, it is impossible to separately know the power consumption of each of the electrical apparatuses and the like connected to the sockets of the power strip.
For this reason, there are demands for a power strip that may separately know the power consumption of each of the electrical apparatuses and the like connected to the power strip. More particularly, there are demands for a method of calculating a current correction formula for the power strip, a current measuring method, a power measuring method, a manufacturing method, the power strip, and a current measuring system that may enable accurate measurement of the power consumption of each electrical apparatus and the like using the power strip.

Method of calculating current correction formula for power strip, current measuring method, and power strip


The present invention provides a protein having low-substrate-specific amino acid racemase activity; DNA encoding the protein; a recombinant DNA comprising the DNA; a transformant carrying the recombinant DNA; a process for producing the protein by using the transformant; and a process for producing a racemic amino acid which comprises allowing a culture of the transformant or a treated matter thereof as an enzyme source and an amino acid to be present in an aqueous medium to racemize the amino acid in the aqueous medium, and recovering the racemic amino acid from the aqueous medium.

Low-substrate-specific amino acid racemase, which is classified as EC 184.108.40.206 and whose substrate specificity is very low, is an enzyme useful for the industrial production of racemates of various amino acids. The microorganisms so far reported to produce this enzyme are strains belonging to the genera Pseudomonas [Methods in Enzymology, 17B, 629–636 (1971); Journal of Bacteriology, 175, 4213–4217 (1993)] and Aeromonas [Agricultural Biological Chemistry, 51, 173–180 (1987)]. However, their activity is often weak, and it is difficult to fully compensate this defect by improvement of culturing method or acquisition of a mutant strain.
With regard to the proteins having low-substrate-specific amino acid racemase activity, the protein produced by Pseudomonas putida IF012996 has been purified and the amino acid sequence of its active site has been reported [Biochemistry, 23, 5195–5201 (1984)]. However, there has been no report on the DNA sequence encoding the enzyme or on a successful high-level expression of a protein having the enzyme activity using a microorganism such as Escherichia coli.

Amino acid racemase having low substrate specificity and process for producing racemic amino acid


A method of assembling an anti-wolf resonator assembly for use with a string instrument is provided. The method includes positioning a first portion of the resonator assembly against a first side of a surface of the instrument, and magnetically coupling a second portion of the resonator assembly to a second side of the instrument surface that is opposite the first side of the surface. The surface is positioned between the first and second portions of the resonator assembly. The resonator assembly is configured to dampen at least one of a musical note and a vibration produced by the string instrument.

This invention relates generally to string instruments, and more specifically to, an anti-wolf-note resonator assembly for a string instrument and method of assembling the same.
Well constructed, string instruments, such as a cello, may generate a wolf-note when the instrument is played. More specifically, when played, known instruments produce an intended note that vibrate at an intended frequency. However, depending on a strength or amplitude of the intended note, an errant portion of the instrument may vibrate, rattle, flap, or resonate, producing an unintended note at a frequency that is different than that of the intended note. If the instrument produces both the unintended note and the intended note simultaneously, the combined acoustical interference, called a beat, may cause the wolf-note sound to be generated. It is a common practice to refer to both the unintended note and the intended note as the wolf-note, since both may be so close in tone that they sound almost like the same note. However, as is known by those skilled in the art, the wolf-note sounds like a wolf howl and the amplitude modulation is generally uncontrollable and annoying, and may prevent the player of the string instrument from producing a steady clear note. The above explanation, the beating of two notes, is not the only explanation offered in the literature to explain the wolf note. However, for this discussion and for simplicity we will assume that the theory of the beating of two notes describes the wolf-note phenomena.
As a slight digression, we offer, for completeness, a second wolf-note theory. We will call this the "mobile-bridge" theory as opposed to the above "beat-frequency" theory.
In the mobile-bridge theory, the amplitude of the bridge is so great that it periodically dampens the string vibration. For a string to vibrate in a standing wave it has to be firmly fixed at both ends. However in string instruments one end of the string is fixed at the nut near the scroll and the other end is allowed to also vibrate at the bridge. The bridge can vibrate in two modes of oscillation, either in phase with the string or out of phase with the string vibration. If the bridge is out of phase with the string, it will drive the string by reflecting wave energy back into the string. If the bridge is in phase, it will tend to dampen string vibration by moving out of the way and hence absorb wave energy. In practice, the bridge will vibrate back and forth between these two modes. Thus the string will periodically vibrate stronger when out of phase with the bridge, and vibrate weaker when in phase. This vibrating stronger and weaker-in phase and out of phase-is the wolf note sound.
The mobile-bridge theory explains why cellos more often have a wolf note as compared to violins and violas. It is because the cello's bridge is proportionally taller. Thus the top of the cello bridge has greater amplitude of vibration and hence vibrates in and out of phase more easily.
Typically, the wolf note occurs at a frequency where the cello vibrates the strongest, at what is called the main wood mode of oscillation. This is the simplest, greatest amplitude, and lowest mode of vibration for the top of the instrument. To prevent the wolf note we need to reduce this exaggerated vibration.
At least one known method to suppress the wolf-note is to take energy away from the main wood mode of oscillation by attaching a weight to a string of the instrument such that the weight is positioned between the bridge of the instrument and the tailpiece of the instrument. The weight must be tuned to oscillate at the frequency of the main wood vibration. However, as is known, the size and position of the weight on the string may be critical to suppressing the wolf note. For example, as the string ages and/or stretches, the string may require retuning. After retuning, the weight may need repositioning to be effective in suppressing the wolf-note. Moreover, such devices may provide only limited results, and as such the main wood note may still remain uncomfortably loud although the wolf note has been suppressed.
Another known solution in suppressing wolf-notes is to permanently attach a resonant weighted device, a damper, to the string instrument. A musician, through trial and error, determines the most effective or optimum location for such a device. Once the most effective position is identified, the device is inserted into the cavity of the instrument and is permanently coupled to an interior surface of the instrument. Because the devise is permanently coupled to the instrument with an adhesive material, it cannot easily be repositioned, and/or cannot be removed without the assistance of a repair shop.

Anti-wolf-note resonator assembly for a string instrument and method of assembling the same


A one piece fan shroud for a tractor has first and second faces, a frame with top, left and right sides, a bottom, and an upper wall extending from the top of the frame. The upper wall, left and right sides of the fan shroud are dimensioned to match the internal geometry and seal with an internal surface of a tractor hood. A rubber seal may extend around the upper wall and the left and right sides of the frame.

Utility vehicles such as tractors with internal combustion engines have engine cooling systems that draw air from a front grill through a radiator into the engine compartment. The engine cooling system typically includes a radiator assembly with a cooling fan surrounded by a shroud. The cooling fan may be provided to force flow of cooling air across the radiator. The radiator may be disposed forwardly of the cooling fan, and the cooling fan may be disposed-forwardly of the engine.
Optimum performance of the engine cooling system requires that air flow be blocked or minimized around the first or engine side of the radiator assembly (i.e., the hot engine compartment) to the second or cool side of the radiator assembly (i.e., the front grill). Efforts to seal the engine side from the cool side have involved various combinations of outward extensions from the radiator area, along with sealing materials such as foam or rubber to fill gaps between the radiator assembly and the vehicle hood and/or side panels. For example, seals may include foam or rubber material that fills gaps between the internal surface of the vehicle hood and the radiator assembly. Several pieces and/or sizes of sealing material may be needed because the size of the gaps may vary. An improved and simplified sealing arrangement is needed between the engine side and cool side of a tractor radiator assembly.
In addition to the radiator, fan, and fan shroud, the radiator assembly includes structural components that support the radiator and fan shroud and/or attach those structures to the frame or body of the vehicle, parts that seal the radiator assembly and air intake passages, and auxiliary items such as coolant recovery bottles. As a result, a typical radiator package has a large number of parts and requires substantial assembly time, at a significant cost. It is highly desirable to decrease vehicle cost by reducing the number of parts and shortening assembly time needed for a radiator assembly.


A method of producing an aperture extending from an optically flat surface through a substrate defining the optically flat surface to a surface of the substrate remote from the optically flat surface comprising the steps of: a) forming the optically flat surface; b) etching to form the remote surface to produce an area of the substrate of a desired thinness bounded by the optically flat surface; and c) laser cutting through the area of desired thinness from the remote surface toward the optically flat surface to produce aperture, of a desired shape and size; and a structure when made by the method.

In the past, it has been very difficult or impossible to produce small sharp edged apertures in an optically flat polished surface in a very thin section of a substrate without disturbing the optical flatness of the surface.
Typical of the prior art is a process which is very low in yield and quality and in which a substrate is polished on one side to produce an optically flat polished surface and then machined mechanically or by electron discharge machining (EDM) down almost to the polished surface from the opposite side of the substrate with the aperture subsequently being drilled through the remaining material. This machining leaves severe stresses which can damage and distort the polished surface and the thickness of the thin section in which the aperture is formed is limited. Additionally, using EDM causes extremely non-linear material removal and it is unreasonably difficult to achieve an appropriate thinness for the appropriate formation of the apertures.
The production of micro-apertures in an optically flat surface requires very thin unsupported sections which are too thin to be polished in such an unsupported form.

Method of producing micro-apertures in optically flat surfaces and structures when made by the method


A computation efficient polyphase channelization system enables one of many user FDMA signals to be channelized through multiple FFT response frequency bands forming an aggregate frequency band where K-point FFT channels are greater than the decimation factor M to produce FFT overlapped responses that have a smooth aggregate response without disjointed band gaps for reduced distortion using a clockwise commutator having M channels feeding M filter blocks, each of which having β polyphase filters, and having a ring switch to provide smooth filter responses that then drive β K-point FFTs to provide a β set of K vector FFT responses that are then combined in a post processing system for producing K channelized outputs.

The present and future generations of satellites need to operate with small earth terminals such as mobile vehicle or hand held terminals. Such satellites need to be user oriented in that the user terminal needs to be relatively less complex, using low power, having low weight and low cost. Such requirement may be achieved at the cost of increasing the complexity, such as with space borne equipment and the central earth stations. Present day technology involves such processing on board the satellite. An example of such a system is mobile messaging service via satellites. In such a system, a forward link takes messages from an earth station to the satellite, which retransmits to the mobiles over spot beams. The return link begins at the mobiles, goes up to the satellite and terminates at the earth station. In such a system, the types of transmitter and receivers in the forward and reverse links may be different. Thus the optimum uplink and downlink designs to and from the mobiles and the earth stations may be very different requiring frequency translation achieved by channelization.
In the case of a multiple access communications system, the uplink uses frequency division multiple access (FDMA) signaling with low cost and low complexity terminals while the downlink uses time division multiple access (TDMA) signaling to maximize the satellite radiated power without intermodulation noise. In such systems, the small earth terminals do not need the capability of transmitting at very high burst rate and stringent satellite frame synchronization capabilities necessary for TDMA transmitter. In another multiple access system, uplink is based on random access technique while the downlink uses TDMA. In terms of modulation, all such multiple access systems make use of digital techniques with inherent advantages in terms of power efficiency, flexibility, error correction and detection coding and encryption. The feasibility of mixed mode multiple accessing techniques requires efficient means of translation between the two formats of multiple access system. Although analog techniques are in principle straightforward, in terms of implementation considerations of size, weight, cost, and flexibility, direct digital method are expected to achieve higher performance. Digital techniques can also fully exploit advances in VLSI and ASIC technologies to achieve these speed and costs objectives. Such translation may involve conversion of an FDMA signal into a TDM multiplexed signal, which may then go through a digital switch to various TDMA carriers being transmitted over the spot beams. Such digital translation techniques are also useful in the switching of FDMA carriers to different spot beams with out requiring arrays of analog bandpass filters and converters. There are several techniques for direct digital translation and switching using a channelization method where a wide band signal is channelized and individual channels are respectively processed.
Optimum system design in such cases may involve different multiple accessing techniques on the uplink and downlink. The feasibility of mixed mode multiple accessing techniques requires an efficient means of translation between the two formats of multiple accessing communication systems. There are several digital techniques available for translation, that is channelization, namely, an analytical signal method, a polyphase Discrete Fourier Transform (DFT) method, a frequency domain FFT filtering method, weight, overlap and add (WOLA) method, and a tree filter multistage bank method. The analytical signal method, frequency domain FFT filtering method, and the multistage filtering method are computationally complex, the weight, overlap and add method involves processing of the input signal in blocks. Among these prior methods, the polyphase DFT method is the most efficient in terms of computational efficiencies and processes the input signal on a sample-by-sample basis.
In terms of computational efficiency and the ease of sample-by-sample processing, the polyphase DFT approach is the most attractive as the number of computations required per sample of the input signal processing increases linearly with log2 K where K is the number of channels. However, the polyphase channelizer that possesses this computational advantage is only applicable to the case where K is equal to the decimation factor M or an integer multiple. There are many significant applications where K is not equal to M or an integer multiple and it is desirable to achieve the same computational advantage as for the case of K equal to M.
The conventional polyphase DFT communication channelizer includes an analyzer for channelization and a synthesizer for dechannelization. The conventional polyphase DFT analyzer includes a front end complex downconverter for downconverting an input wideband signal into a complex input fed into an input clockwise commutator for round robin sampling for providing M channelized outputs. The M channelized outputs are fed into a filter bank of K filters to provide K filtered outputs to an FFT, the FFT outputs constitute the K channelized outputs. The input to the analyzer is the sampled version of the multiplexed signal comprising K channel signals. This polyphase DFT analyzer is computationally efficient where M=K providing a homogenous mapping between the M commutator output the K number of filters in the filter bank. That is, the polyphase analyzer includes a commutator followed by a bank of polyphase filters having filter outputs that are processed by the FFT processor. The FFT processor outputs are the desired K channels. All of the channel signals have equal one-sided bandwidth of B Hz. The sampled input is an analytic complex signal that may be obtained by a Hilbert transform operation on the real IF bandpass signal. In the polyphase analyzer for the case of K=M, all of the K channels share a common polyphase filter bank. The ith polyphase branch filter has a impulse response pi(m) given by pi(m)=h(mM−i) for i=0, 1, . . . , M−1, where h is the impulse response of the desired analyzer prototype low pass filter.
Similarly, the polyphase synthesizer includes an inverse FFT processor, followed by a set of polyphase filters whose outputs are combined by a commutator to yield the desired synthesized multiplexed signal. The inverse FFT providing M inverse transformed outputs to a bank of filters having M filter outputs feeding a commutator for combining the M filter outputs into a complex output. The commutator provides the complex output that is then upconverted by an upconverter for forming a wideband output. In the polyphase synthesizer, all of the K channels share a polyphase filter bank with the ith polyphase filter impulse response qi(m) given by qi(m)=f(mM+i) for i=0, 1, . . . , M−1 where f is the desired synthesizer prototype low pass filter impulse response. The total number of real multiplications required per second per channel are given by a MPDFT multiplication equation. In the MPDFT multiplication equation, the terms δ1 and δ2 are constants, the term B is the bandwidth, and the term w is the channel center frequency spacing.
            M      PDFT        =          2                    w        [                                            [                                                2                  3                                                                  log                                                        [                                          1                      /                                              (                                                  10                                                                                δ                            1                                                                                δ                            2                                                                          )                                                              ]                                                              ]                                      (                              w                -                                  2                                    B                                            )                                +                      4                                                      log                2                                                          (                K                )                                                    )              ]
However, the standard polyphase analyzer and synthesizer architecture is applicable to the case when the number of channels K is equal to the decimation factor M. When some user signals require larger frequency bands compared to other user signals, in principle, the user signal requiring larger frequency band may be allocated more than one adjacent channels out of K number of channels each of the same bandwidth. However, the filter roll off near the edges of the channels introduces band gaps among adjacent channels thus causing band gaps in the frequency band of the user allocated multiple channels which in turn causes distortion in the user signal. To avoid the problem of band gaps in the frequency band of the user with multiple channel allocation, it is desirable to introduce some overlap among the frequency response of adjacent channels. The said overlap is achieved by selecting the number of channels K greater than the decimation factor M. The selection of K greater than M thus provides signal fidelity to users assigned with multiple of the K channels. In the case when K>M, it is desirable to have similar computational and sample-by-sample processing advantages of the conventional polyphase architecture. Hence, it desirable to have a computationally efficient polyphase channelization system with a sample-by-sample processing architecture for the complex case where the number of channels K is not integrally related to the decimation factor M of the channelizer. Various modifications for the case when K is not integrally related to M, do not have the sample-by-sample processing and computational advantages of the conventional polyphase DFT method where essentially one filter operating at a single channel rate filters all the channels. In the case when some users require assignment of multiple channels, there is significant band gap and consequential distortion in the channelized signals when K is selected equal to M. These and other disadvantages are solved or reduced using the invention.

Generalized polyphase channelization system


A method of determining the complexity of a telephonic communication received by a contact center is provided. The method comprises the step of establishing a call rule based on one or more of a call duration threshold, a non-interaction threshold, a distress event threshold, a third party dialog threshold, and a call transfer threshold. A recorded telephonic communication is received and call attributes associated with the telephonic communication are determined. The call attributes include one or more of the following: call duration data, non-interaction data, distress event data, third party dialog data and call transfer data. The established call rule is compared to the call attributes of the telephonic communication, and data indicative of the complexity of the telephonic communication is generated.

It is known to utilize telephone call centers to facilitate the receipt, response and routing of incoming telephone calls relating to customer service, retention, and sales. It is also known to utilize a web based system to facilitate requests and inquiries related to customer service.
At the contact center, a customer is in contact with a customer service representative ("CSR") or CSR agent who is responsible for answering the customer's inquiries and directing the customer to the appropriate individual, department, information source, or service as required to satisfy the customer's needs. At the contact center, the customer may also enter into an automated self-service system such as, for example, an interactive voice response ("IVR") system. In an IVR system, the customer interacts with the IVR system directly and has the call processed accordingly. During an interaction, a customer may also enter into self-service systems such as an Internet web-based system to transmit inquiries and identify possible solutions.
Automated self-service systems such as IVR and web-based systems provide useful mechanisms to handle non-complex calls. However, instances arise in which a complex customer inquiry is routed to a self-service system, and the self-service system is inappropriately equipped to address the inquiry of a particular call type. Conversely, instances may arise when simple or non-complex calls are routed to a CSR, when the particular call time could be more appropriately and expeditiously handled through a self-service system. Both instances can result in a negative customer interaction which ultimately may be harmful to a customer relationship. Moreover, improper use or non-use of self-service systems can result in inappropriate allocations of contact center resources, including money, time and human resources.
Accordingly, there is a need in customer relationship management ("CRM") for tools useful for determining which calls are best suited for use in such self-service systems. In particular, a need exists for tools that analyze calls between a customer and CSR to determine the complexity of a call or call type, and ultimately determine the appropriateness of routing future calls of a particular call type to self service systems.
The present invention is provided to solve the problems discussed above and other problems, and to provide advantages and aspects not provided by prior systems of this type. A full discussion of the features and advantages of the present invention is deferred to the following detailed description, which proceeds with reference to the accompanying drawings.

Method and system determining the complexity of a telephonic communication received by a contact center


First and second columnar spacers are formed on a color filter substrate, and step films are formed on an active matrix substrate in the same step as signal lines. The columnar spacers are formed by proximity exposure, and the step films are formed by being exposed by a lens projection system. In plan view, the step films are disposed inside the columnar spacers. The first columnar spacers are made to be in contact with the regions of the protective film that are higher in elevation with the step films in the active matrix substrate.

1. Field of the Invention
The present invention relates to a liquid crystal display device which has two substrates opposed to each other via columnar spacers disposed therebetween.
2. Description of the Related Art
A liquid crystal display device is formed of two glass substrates opposed to each other with a uniform distance (gap) therebetween, and of a liquid crystal layer disposed between these substrates. In such a liquid crystal display device, in order to have a uniform gap between the two glass substrates, a plurality of spacers are formed between the two glass substrates. Spacers are classified into columnar spacers which are formed on a substrate by being patterned to extend toward the other substrate, and spherical spacers which are dispersed inside a liquid crystal layer.
FIG. 1 is a cross sectional view showing a conventional liquid crystal display device provided with columnar spacers. As shown in FIG. 1, this conventional liquid crystal display device has a glass substrate 101. Scan lines 102 are formed on the glass substrate 101, and an insulating protective film 103 is formed so as to coat the scan lines 102. Signal lines (not illustrated), pixel electrodes (not illustrated) and the like are formed on the insulating protective film 103. Another insulating protective film 104 is formed on the protective film 103 so as to coat the signal lines and the pixel electrodes. This arrangement forms TFTs (Thin Film Transistors, not illustrated) in which the signal lines are connected to the drain, the pixel electrodes are connected to the source, and the scan lines 102 are connected to the gate. This is the structure of an active matrix substrate 105.
On the other hand, another glass substrate 106 is disposed opposed to the glass substrate 101, and a black matrix (BM) 107 is formed on the surface of the glass substrate 106 that is opposed to the active matrix substrate 105. The black matrix 107 is disposed in regions including the regions corresponding to the scan lines 102 of the active matrix substrate 105. On the black matrix 107 are provided color filters (CF) 108. A protective film 109 is formed so as to coat the black matrix 107 and the color filters 108. This is the structure of a color filter substrate 110.
Inside the regions where the black matrix 107 and the color filters 108 are overlapped with each other on the color filter substrate 110, columnar spacers 111 made of acrylic resin or the like are formed to extend toward the active matrix substrate 105. The tip of each of the columnar spacers 111 is in contact with a part of the region directly above each of the scan lines 102 of the protective film 104 of the active matrix substrate 105. Between the active matrix substrate 105 and the color filter substrate 110, liquid crystal 112 is filled to form a liquid crystal layer.
However, this conventional liquid crystal display device has the following problems. When an external force is applied on the glass substrates 101 and 106, thereby dislocating the active matrix substrate 105 and the color filter substrate 110 in the direction parallel to the substrates, the frictional force between the columnar spacers 111 and the protective film 104 prevents the dislocation between the substrates from being restored even after the external force disappears. This makes the glass substrates 101 and 106 have birefringence, thereby causing light leakage regardless of the orientation of the liquid crystal. This light leakage is particularly conspicuous in black display, and is recognized as display unevenness. A reduction in the frictional force between the columnar spacers 111 and the protective film 104 by reducing the number of the columnar spacers 111 will result in plastic deformation of the columnar spacers 111, thereby causing gap unevenness.
Japanese Patent Publication No. 2002-182220 discloses a technique to reduce the frictional force between the columnar spacers and the substrate while holding the gap between the substrates. FIGS. 2 and 3 are cross sectional views showing conventional liquid crystal display devices disclosed in this patent document, Japanese Patent Publication No. 2002-182220. The liquid crystal display device shown in FIG. 2 is provided with a glass substrate 121, and with counter voltage signal lines 122 formed thereon. The counter voltage signal lines 122 are coated with an insulating film 123 on which drain signal lines 124 are formed. A protective film 125 is formed so as to coat the drain signal lines 124, and an orientation film 126 is formed on the protective film 125. This is the structure of an active matrix substrate 127. On the surface of the active matrix substrate 127, the regions including the counter voltage signal lines 122 are higher in elevation than the other regions.
On the other hand, a glass substrate 128 opposed to the glass substrate 121 has a black matrix 129 on a surface thereof that is opposed to the active matrix substrate 127. A protective film 130 is formed so as to coat the black matrix 129. On the protective film 130 are formed a plurality of columnar spacers 131a and 131b. An orientation film 132 is formed so as to coat the protective film 130 and the columnar spacers 131a and 131b. This is the structure of a color filter substrate 133. Liquid crystal 134 is filled between the active matrix substrate 127 and the color filter substrate 133 so as to form a liquid crystal layer.
In the liquid crystal display device shown in FIG. 2, the columnar spacers 131a are formed in the positions opposed to the counter voltage signal lines 122 on the active matrix substrate 127, and the tips of the columnar spacers 131a are in contact with the elevated regions on the active matrix substrate 127. On the other hand, the remaining columnar spacers 131b are formed in the positions not opposed to the counter voltage signal lines 122 on the active matrix substrate 127, and the tips of the columnar spacers 131b are not in contact with the active matrix substrate 127.
As described above, of the plurality of columnar spacers, only the columnar spacers 131a are made to be in contact with the active matrix substrate 127, whereas the columnar spacers 131b are made not to make contact. As a result, when no external force is applied on the liquid crystal display device, the frictional force is small because only the columnar spacers 131a are made to be in contact with the active matrix substrate 127, and when an external force compressing the liquid crystal display device is applied, the columnar spacers 131a are deformed to make the tips of the columnar spacers 131b come into contact with the active matrix substrate 127. This allows the gap between the substrates to be maintained.
The aforementioned patent document, Japanese Patent Publication No. 2002-182220 also discloses a technique to provide pedestal patterns directly under some of the columnar spacers, as shown in FIG. 3. In the color filter substrate 141 of the liquid crystal display device, the surface of the glass substrate 142 is provided with a black matrix 143 and color filters 144 thereon, and pedestal patterns 145 are formed on a portion of the black matrix 143. A protective film 146 is formed so as to coat the black matrix 143, the color filters 144, and the pedestal patterns 145. On the protective film 146 are formed a plurality of columnar spacers 147a and 147b. The columnar spacers 147a are formed directly above the pedestal patterns 145, whereas the columnar spacers 147b are formed in regions outside the regions directly above the pedestal patterns 145.
Consequently, the tips of the columnar spacers 147a are at a position higher than the tips of the columnar spacers 147b by the thickness of the pedestal patterns 145. Therefore, the columnar spacers 147a are in contact with the active matrix substrate (not illustrated); however, the columnar spacers 147b are not in contact with the active matrix substrate unless an external force to compress these substrates is applied. This makes it possible to maintain the gap between the substrates, while reducing the frictional force between the columnar spacers and the active matrix substrate.
However, the aforementioned conventional liquid crystal display device has the following problems. Even if the height of the columnar spacers on the color filter substrate is made uniform in the manufacture of the liquid crystal display device, the gap between the active matrix substrate and the color filter substrate varies after the liquid crystal display device is assembled. This increases a variation in luminance, chromaticity and contrast in each liquid crystal display device.


An apparatus for encryption and decryption, capable of use in encryption and decryption of advanced encryption standard. Byte substitution operation and inverse byte substitution operation are to be combined. Byte substitution operation can be expressed as y=M*multiplicative_inverse(x)+c while inverse byte substitution operation can be expressed as x=multiplicative_inverse(M−1*(y+c)), wherein M and M−1 are inverse matrix of each other and c is a constant matrix. Since the two equations employ a look-up table, that is, multiplicative_inverse(x), the lookup tables for use in byte substitution and inverse byte substitution operations are to be combined according to the invention so as to lower hardware complexity of the implementation. In addition, main operations of column mixing operation and inverse column mixing operation are to be rearranged to combine the two operations in part, resulting in simplified hardware implementation.

1. Field of the Invention
The invention relates in general to an apparatus for encryption and decryption, and more particularly to an apparatus for encryption and decryption, capable of use in encryption and decryption of advanced encryption standard (AES).
2. Description of the Related Art
Since the electronic-business (e-business) grows rapidly for the few years and the numbers of on-line transactions are increasing, data encryption is required to be much stricter for the sake of data security. A stricter encryption standard, advanced encryption standard (AES), has been developed after the widely used data encryption standard (DES) and is expected to be replaced for DES so as to fulfil the stricter data security requirement. An AES system is a symmetric-key system in which the sender and receiver of a message share a single, common key, thereafter called a subkey, which is used to encrypt and decrypt the message. The data length of a subkey may be chosen to be any of 128, 192, or 256 bits while a plaintext and a ciphertext can be such as 128 bits. For the sake of simplicity, hereinafter, plaintexts, ciphertexts, and subkeys are chosen to be 128 bits in length.
The AES system encrypts a plaintext according to the following encryption algorithm.
Encryption Algorithm of AESAddRoundKeyfor round=1 to Nr−1KeyExpansionSubBytesShiftRowsMixColumnsAddRoundKeyend forSubBytesShiftRowsAddRoundKey
In this encryption algorithm, a round key addition operation (AddRoundKey) is first to perform a bitwise exclusive-OR (EX-OR) operation on the plaintext and the first subkey and to output the result of the EX-OR operation. Next, the algorithm proceeds to the following looping. The number of rounds of the looping is set to Nr−1 in which Nr is specified according to the AES specification. For each round, a key expansion operation (KeyExpansion) is performed to produce a new subkey based on a previous subkey. That is, in the first round of the looping, the first subkey is used to generate the second subkey by the KeyExpansion. After the KeyExpansion, a byte substitution operation (SubBytes) acts on the result of the AddRoundKey. Next, a row shifting operation (ShiftRows) is performed and then a column mixing operation (MixColumns) acts on the result of the ShiftRows. The first round is ended by performing the EX-OR operation on the result of the MixColumns and the current subkey, i.e., the second subkey. The looping are executed for the next round until the number of rounds of the looping is reached. As mentioned above, for each round, a new subkey is to be generated. For example, in the second round of the looping, the KeyExpansion is performed to generate the third subkey based on the second subkey. The generation of the other subkeys is done in the same way. When the looping is completed, the ciphertext is obtained by processing the result of the looping through the SubBytes, ShiftRows, and AddRoundKey.
The AES system decrypts the ciphertext according to the following decryption algorithm.
Decryption Algorithm of AESAddRoundKeyfor round=1 to Nr−1InvKeyExpansionInvShiftRowsInvSubBytesInvMixColumnsAddRoundKeyend forInvShiftRowsInvSubBytesAddRoundKey
The operations in decryption are basically the inverse of the operations in encryption. The AES decryption includes the following steps. First, the inverse of AddRoundKey (InvAddRoundKey) is performed on the ciphertext and the previous subkey produced in the encryption above, for example, the 10th subkey that is assumed to be the last produced subkey after the encryption operation, and to output the result of the InvAddRoundKey, wherein the result of the InvAddRoundKey is referred to as decryption input ciphertext, for the sake of brevity. Note that since the InvAddRoundKey is identical to the AddRoundKey due to the characteristic of EX-OR operation, InvAddRoundKey is hereinafter referred to as AddRoundKey. Next, the following looping is performed. For each round of the looping, the inverse of KeyExpansion (InvKeyExpansion) is performed on an input subkey to produce an output subkey based on the input subkey, where the output subkey, in the encryption, is the immediately produced subkey before the input subkey produced. For example, in the first round, the InvKeyExpansion is applied to the 10th subkey (the input subkey) so as to produce the ninth subkey (the output subkey); in the second round, the application of InvKeyExpansion to the ninth subkey produces the eighth subkey; and so on. Next, the decryption input ciphertext is processed through the inverse of SubBytes (InvSubBytes), the inverse of ShiftRows (InvShiftRows), and the inverse of MixColumns (InvMixColumns). After that, AddRoundKey (i.e. InvAddRoundKey) is performed on the result of the last operation and the current subkey, resulting in the next decryption input ciphertext for the next round. The current key, for example, in the first round, is the ninth subkey after the application of InvKeyExpansion to the 10th subkey. Afterward, the looping is performed until the number of round of the looping is reached. The decryption result is finally obtained by processing the result from the rounds of the looping through the InvSubBytes, InvShiftRows, and AddRoundKey.
As described above, the AES algorithm has five main operations, namely, AddRoundKey, KeyExpansion, SubBytes, ShiftRows, and MixColumns. These operations will be described in the following. For the sake of brevity, hereinafter, the description employs several notations. (1) The output of one operation is denoted by "out" while the input of the operation is denoted by "in". (2) The notation "+" (or "⊕") denotes bitwise exclusive-OR operation (EX-OR) other than addition. Since the five main operations are performed sequentially during the encryption/decryption and the output of an immediate operation (out) is as the input of its successive operation (in), these outputs and inputs of these operations will be denoted, for the sake of brevity, by out's and in's only, without names particularly denoted for them. In addition, plaintexts, ciphertexts, and subkeys have data lengths of 128 bits and are represented by 4×4 matrices with elements of 8 bits.
FIG. 1 illustrates the effect of AddRoundKey on data. As mentioned above, the operation of AddRoundKey is bitwise exclusive-OR (EX-OR) operation. The EX-OR is performed on an input data code (in) and a subkey (k), resulting in an output data code (out). By the characteristic of EX-OR operation, the input data code (in) is equal to the EX-OR operation of the output data code (out) and the subkey (k). In FIG. 1, AddRoundKey is illustrated in terms of respective elements and is represented as inN ⊕kN=outN, where N is an integer indicative of the corresponding element's number. For the sake of brevity, this notation will hereinafter be adopted in the drawings.
FIG. 2 illustrates the effect of ShiftRows on data. In ShiftRows, the rows of an input data code (in), for example, the output of the AddRoundKey, is cyclically shifted to the right over different offsets. For example, the first row is not shifted (or shifted over zero byte), the second row is shifted to the right over one byte, the third row over two bytes, the fourth over three bytes and then the output of the ShifRows (out) is obtained as shown in the left of FIG. 2. If ShiftRows is in the way as in the example, the inverse of the ShiftRows (InvShiftRows) acts on its input data code in an inverse manner of the ShiftRows. That is, the first row of the input data code to InvShiftRows is not shifted (or shifted over zero byte), the second row is shifted to the left over one byte, the third over two bytes, and the fourth over three bytes.
FIG. 3 illustrates the effect of MixColumns/InvMixColumns on data. In MixColumns, every column of an input data code, e.g., obtained from the output of the ShiftRows, is transformed into the corresponding column of the output data code by the matrix multiplication of a specific multiplication matrix by the column. For example, the first column of the input data code (in) with elements in0, in1, in2, and in3 is multiplied by a 4×4 matrix in the upper of FIG. 3, resulting in the first column of the output of the MixColumns with elements out0, out1, out2, and out3. Conversely, the application of MixColumns to all columns of the output data code with the inverse of the specific multiplication matrix results in the input data code, e.g., as illustrated in the lower matrix multiplication. That is, InvMixColumns uses a specific multiplication matrix that is the inverse of the specific multiplication matrix for MixColumns.
FIG. 4 illustrates the effect of SubBytes/InvSubBytes on data. SubBytes is a non-linear byte substitution, operating on every byte of the input data code independently. The substitution table used in the substitution operation is called S-box, and the application of the S-box to each byte of the input data code (say x) results in one byte of data (say y). The operation of the S-box can be expressed as:y=M*multiplicative_inverse(x)+c,  (1)
where
  M  =                    (                                            1                                      1                                      1                                      1                                      1                                      0                                      0                                      0                                                          0                                      1                                      1                                      1                                      1                                      1                                      0                                      0                                                          0                                      0                                      1                                      1                                      1                                      1                                      1                                      0                                                          0                                      0                                      0                                      1                                      1                                      1                                      1                                      1                                                          1                                      0                                      0                                      0                                      1                                      1                                      1                                      1                                                          1                                      1                                      0                                      0                                      0                                      1                                      1                                      1                                                          1                                      1                                      1                                      0                                      0                                      0                                      1                                      1                                                          1                                      1                                      1                                      1                                      0                                      0                                      0                                      1                                      )                                            and                                      c        =                            [                                                    0                                            1                                            1                                            0                                            0                                            0                                            1                                            1                                              ]                T            .
Since the multiplicative inverse (multiplicative_inverse) is a complicated function, the mostly used approach to SubBytes is to use a look-up table to obtain y from x. As shown in FIG. 4, in SubBytes, each element of the output data code, such as out0, is obtained from an element of the input data code, such as in0, through a look-up table, which is represented by y=Table_A(x). Table_A is indicative of the substitution table, i.e., the S-box of AES. Conversely, the application of InvSubBytes to every element obtained from the SubBytes, such as out1, results in the corresponding element of the input data code for the SubBytes, such as in0, through an inverse look-up table, which is represented by x=Table_B(y). Table_B is indicative of the inverse substitution table, i.e., the inverse S-box of AES (inv-S-box). In practice, S-box and inv-S-box require substantial hardware, making them not economic to be implemented.
In implementation of AES, several main difficulties should be overcome. As described above, each of the algorithms of AES encryption and decryption has different processing steps, wherein inverse operations and non-linear substitution operations are involved. Particularly, SubBytes and InvSubBytes, the non-linear substitution operations, require referring to respective look-up tables. The implementation of the substitution operations will occupy substantial memory space (e.g., 2×16×256×8 bits) under the design requirement for high efficient encryption/decryption. In addition, MixColumns and InvMixColumns involve matrix multiplication. If they are not to be integrated effectively, their implementation will also occupy a substantial amount of operating resource. Thus, in implementation, these operations should be considered and redesigned as so to lower the hardware complexity and save the operating resource.

Apparatus for encryption and decryption, capable of use in encryption and decryption of advanced encryption standard

Industrial Technology Research Institute


A light emitting device includes: a substrate; a light emitting element disposed on the substrate; a light transmissive member having a plate shape and having an upper face and a lower face that is larger than the upper face, disposed such that the lower face opposes a light emission face of the light emitting element; a light reflecting member covering lateral faces of the light transmissive member; and a light shielding frame covering lateral faces of the light transmissive member via the light reflecting member. The light shielding frame has an opening. An outer perimeter of the lower face of the light transmissive member is positioned outward of an inner perimeter of the opening in a plan view as seen from above.

The present disclosure relates to a light emitting device and a method of manufacturing the same.
High output light emitting devices constructed with light emitting elements such as LEDs have been used as light sources in the automotive applications, and the like. For example, Japanese Patent Publication No. 2014-127679 discloses a high output light emitting device for use as an automotive light source having enhanced heat dissipation performance by virtue of a heat dissipation layer formed so as to cover the periphery of the light emission face of the light emitting element. According to the Japanese Patent Publication No. 2014-127679, the light emitting device disclosed therein can achieve sharp-edged light distribution characteristics in addition to improved heat dissipation properties because of the heat dissipation layer formed to cover the periphery of the light emission face of the light emitting element, which is said to be suited, for example, for automotive headlamp applications. Here, the sharp-edged light distribution in that patent publication is understood that there is a large luminance difference between the inside and the outside of the light emission surface.
However, there is a need for more efficient extraction of light emitted from light emitting elements in the light emitting devices for use as high output light sources for automotive applications and the like.
Accordingly, one object of the present disclosure is to provide a light emitting device achieving a large luminance difference between the inside and the outside of the light emission surface as well as efficient extraction of the light emitted by the light emitting elements.
According to one embodiment, a light emitting device includes: a substrate, a light emitting element disposed on the substrate, a light transmissive member having a plate shape and having an upper face and a lower face disposed such that the lower face opposes a light emission face of the light emitting element, a light reflecting member covering lateral faces of the light emitting element and lateral faces of the light transmissive member, and a light shielding frame disposed on the upper face of the light reflecting member surrounding the light transmissive member, wherein the light shielding frame has an opening, an inner perimeter of the opening is positioned at a distance apart from an outer perimeter of the upper face of the light transmissive member in a plan view as seen from above, and the light reflecting member is interposed between the inner perimeter of the opening and the outer perimeter of the upper face of the light transmissive member.
The method of manufacturing a light emitting device according to certain embodiment of the present includes: mounting a light emitting element on a substrate, bonding a light transmissive member having a plate shape such that a lower face of the light transmissive member faces a light emission face of the mounted light emitting element, forming a resin wall having upper end higher than an upper face of the light transmissive member in locations at a predetermined distance apart from the light emitting element and the light transmissive member and interposed by the light emitting element and the light transmissive member while maintaining flexibility to be deformed by pressing force, disposing a light shielding frame having an opening at a predetermined height from the substrate by pressing the light shielding frame to be in contact with the upper end of the resin wall such that an inner perimeter of the opening is positioned on or outward of the outer perimeter of the upper face of the light transmissive member, and forming a light reflecting member that surrounds the light emitting element and the light transmissive member between the substrate and the light shielding frame by supplying s light reflecting resin into a space between the substrate and the light shielding frame.
The light emitting device according to certain embodiments of the present disclosure can achieve a large luminance difference between the inside and the outside of the light emission surface as well as efficient extraction of the light emitted by the light emitting element.
The method of manufacturing a light emitting device according to certain embodiment of the present disclosure can allow for manufacture of a light emitting device achieving a large luminance difference between the inside and the outside of the light emission surface as well as efficient light extraction of the light emitted by the light emitting element.

Light emitting device and method of manufacturing same