A control method for a solid state drive is provided. The solid state drive includes a non-volatile memory with plural blocks. In a step (a1), a block is opened. In a step (a2), a program action is performed to store a valid write data into the open block. Then, a step (a3) is performed to judge whether an amount of the valid write data in the open block reaches a predetermined capacity. In a step (a4), if the amount of the valid write data in the open block does not reach the predetermined capacity, the step (a2) is performed again. In a step (a5), if the amount of the valid write data in the open block reaches the predetermined capacity, the open block is closed and the step (a1) is performed again. The predetermined capacity is lower than a capacity of one block.

As is well known, a solid state drive (SSD) is a data storage device that uses a non-volatile memory to store data. After data are written to the non-volatile memory, the data are still retained in the solid state drive even if no electric power is supplied to the non-volatile memory.
FIG. 1 is a schematic functional block diagram illustrating the architecture of a conventional solid state drive. As shown in FIG. 1, the solid state drive 10 comprises a controller 110, a buffering element 130 and a non-volatile memory 120. The controller 110 is in communication with a host 12 through an external bus 20. Consequently, commands and data can be exchanged between the controller 110 and the host 12. For example, the buffering element 130 is a cache memory, and the non-volatile memory 120 is a flash memory. For example, the buffering element 130 is a static random access memory (SRAM) or a dynamic random access memory (DRAM). For example, the external bus 20 is a USB bus, an IEEE 1394 bus, a M.2 bus, a PCIe bus or a SATA bus.
The non-volatile memory 120 comprises a main storage area 122 and an over-provisioning area (OP area) 124. Generally, the host 12 is only able to access the data of the main storage area 122. The data for the controller 110 to implement specified functions are stored in the OP area 124. For example, the OP area 124 contains backup blocks to replace the bad blocks of the main storage area 122. Optionally, the controller 110 may use the blocks of the OP area 124 to implement a garbage collection (GC) action.
A process of storing write data from the host 12 into the main storage area 122 of the non-volatile memory 120 will be illustrated as follows. Firstly, the controller 110 performs an error correction code (ECC) encoding operation on the write data, and then temporarily stores the write data into the buffering element 130. Moreover, the controller 110 performs a program action at proper time in order to store the write data of the buffering element 130 into the main storage area 122 of the non-volatile memory 120.
FIG. 2 schematically illustrates the structure of a four-channel non-volatile memory. The non-volatile memory 120 comprises four channels CH1˜CH4. Each channel contains 1024 blocks. The write data can be written into the open blocks of the four channels CH1˜CH4. The open block is the block associated with the program action.
The first blocks of the four channels CH1˜CH4 are the block B0, the block B1, the block B2 and the block B3, respectively. The second blocks of the four channels CH1˜CH4 are the block B4, the block B5, the block B6 and the block B7, respectively. The rest may be deduced by analogy.
Similarly, the (n+1)-th blocks of the four channels CH1˜CH4 are the block B4n, the block B4n+1, the block B4n+2 and the block B4n+3, respectively, wherein n is an integer larger than or equal to 0 and smaller than or equal to 1023. In other words, the 1023th blocks of the four channels CH1˜CH4 are the block B4092, the block B4093, the block B4094 and the block B4095, respectively.
The non-volatile memory 120 comprises the main storage area 122 and the OP area 124. A portion of each of the channels CH1˜CH4 is included in the main storage area 122 so as to be accessed by the host 12. The other portion of each of the channels CH1˜CH4 is included in the OP area 124 and is controlled by the controller 110.
Generally, each of the channels CH1˜CH4 in the non-volatile memory 120 comprises plural blocks. Each block contains plural pages. For example, each channel of the non-volatile memory 120 contains 1024 blocks, each block contains 64 pages, and each page has the size of 4k bytes. Due to the inherent properties of the non-volatile memory 120, at least one page is written during the program action, and the erase action is performed in a block-wise fashion.
It is noted that the number of the channels in the non-volatile memory 120 and the number of the blocks in each channel are not restricted. Moreover, the number of pages in each block and the size of each page may be determined by the manufacturer of the non-volatile memory 120. That is, the number of pages in each block is not restricted to 64, and the size of each page is not restricted to 4k bytes.
In a normal working state, the host 12 accesses the non-volatile memory 120 through logical block addresses (LBA). Each LBA can store data of 512 bytes in size. That is, the LBA size is 512 bytes, and the data amount that can be stored in each block is equal to 500 LBA sizes, i.e., 64×4k bytes=256k bytes=500×512 bytes.
When the host 12 intends to program the write data into the main storage area 122 of the non-volatile memory 120, the host 12 may provide a write command and a corresponding LBA to the controller 110. Then, the corresponding LBA write data is transmitted from the host 12 to the controller 110. The LBA write data is temporarily stored in the buffering element 130 by the controller 110. Then, the LBA write data is transmitted to and stored into the main storage area 122 of the non-volatile memory 120. The data amount of the LBA write data is equal to the LBA size, i.e., 512 bytes. Of course, the host 12 may issue consecutive LBAs and transmit plural LBA write data to the controller 110. For brevity, the LBA and the corresponding LBA write data will be described as follows.
FIGS. 3A to 3D schematically illustrate the operations of the non-volatile memory of the conventional solid state drive when a program action is performed by the controller. When the program action is performed by the controller 110, the LBA write data are sequentially stored into the blocks according to the serial numbers of the blocks. For example, after the LBA write data is filled into the block B0, the controller 110 closes the block B0 and continuously writes the LBA write data into block B1. The rest may be deduced by analogy.
As shown in FIG. 3A, the box marked with oblique lines denotes a valid LBA write data. The blocks B0, B1, B2 and B3 have been filled with plural LBA write data. In addition, the controller 110 continuously stores the LBA write data into the block B4. For example, the LBA write data corresponding to LBAz is stored in the block B1, the LBA write data corresponding to LBAy is stored in the block B2, and the LBA write data corresponding to LBAx is stored in the block B3.
Moreover, the host 12 can update the stored LBA write data. When the host 12 updates the LBA write data corresponding to a specified LBA, the updated LBA write data is stored in the block that is being used. At the same time, the previously stored LBA write data corresponding to the specified LBA is set as an invalid LBA write data. The host 12 is unable to read the invalid LBA write data.
Please refer to FIG. 3B. When the host 12 updates the LBA write data corresponding to LBAx, the updated LBA write data is stored in the block that is being used (i.e., the block B4). At the same time, the LBA write data previously stored in the block B3 corresponding to LBAx is set as an invalid LBA write data. In the drawings, the block with the cross mark denotes the invalid LBA write data.
As shown in FIG. 3C, the block B4 has been filled with plural LBA write data. In addition, the controller 110 continuously stores the LBA write data into the block B5. When the host 12 updates the LBA write data corresponding to LBAy and LBAz, the two updated LBA write data are stored in the block that is being used (i.e., the block B5). At the same time, the LBA write data previously stored in the block B2 corresponding to LBAy and the LBA write data previously stored in the block B1 corresponding to LBAz are set as the invalid LBA write data.
As shown in FIG. 3D, the block B5 has been filled with plural LBA write data. In addition, the controller 110 continuously stores the LBA write data into the block B6. When the host 12 updates the LBA write data corresponding to LBAx, the updated LBA write data is stored in the block that is being used (i.e., the block B6). At the same time, the LBA write data previously stored in the block B4 corresponding to LBAx is set as the invalid LBA write data.
After the controller 110 performs plural program actions, the number of the blank blocks in the non-volatile memory 120 is gradually decreased. That is, the programmable space of the non-volatile memory 120 will be gradually decreased. Moreover, since the LBA write data are continuously updated by the host 12, many invalid LBA write data are contained in the used blocks.
As mentioned above, the erase action of the non-volatile memory 120 is performed in the block-wise fashion. Although some blocks of the non-volatile memory 120 contain invalid LBA write data, these blocks also contain valid LBA write data. In other words, these blocks cannot be directly erased by the controller 110.
In case that there are not enough blank blocks in the non-volatile memory 120, the controller 110 of the solid state drive 10 will perform the garbage collection action in order to release the space for the invalid LBA write data in the used blocks. Consequently, the programmable space is increased. The principles of the garbage collection action will be described as follows.
When the controller 110 performs the garbage collection action, the controller 110 checks the valid data rates of all blocks sequentially. For example, if the valid data rate of a block is 100%, it means that the data stored in this block are all valid LBA write data. Whereas, if the valid data rate of a block is 90%, it means that 10% of the data stored in this block are invalid LBA write data and 90% of the data stored in this block are valid LBA write data. Whereas, if the valid data rate of a block is 80%, it means that 20% of the data stored in this block are invalid LBA write data and 80% of the data stored in this block are valid LBA write data.
When the controller 110 performs the garbage collection action, the controller 110 checks the valid data rates of all blocks in the non-volatile memory 120 sequentially and determines plural selected blocks according to the valid data rates. After the valid LBA write data in all of the selected blocks are moved to the blank blocks, all of the selected blocks are erased and the spaces for the invalid LBA write data are released successfully. Consequently, the programmable space of the non-volatile memory 120 is increased.
FIGS. 4A and 4B schematically illustrate the operations of the non-volatile memory of the conventional solid state drive when a garbage collection action is performed by the controller.
Please refer to FIG. 4A. After the controller 110 checks the valid data rates of all blocks in the non-volatile memory 120 sequentially, five selected blocks Ba1˜Ba5 with the valid data rate of 80% are determined. After the valid LBA write data in all of the selected blocks Ba1˜Ba5 are moved to the four new blank blocks Bb1˜Bb4 by the controller 110, the five selected blocks Ba1˜Ba5 are erased. Since the non-volatile memory 120 has one additional blank block, the programmable space of the non-volatile memory 120 is increased. Moreover, after the garbage collection action is completed, the program/erase count (P/E count) of each of the five selected blocks Ba1˜Ba5 is added by 1.
Generally, when the controller 110 of the conventional solid state drive 10 performs the garbage collection action, the blocks with the lower valid data rate are determined as the selected blocks. After the valid LBA write data in all of the selected blocks are moved to the other blank blocks, these selected blocks are erased as the blank blocks and the garbage collection action is completed.
As mentioned above, the solid state drive 10 receives the LBA and the valid LBA write data according to the write command of the host 12 and stores the valid LBA write data into the non-volatile memory 120. Consequently, the solid state drive 10 is unable to realize the valid data rates of all blocks in the non-volatile memory 120. When the garbage collection action is performed, the controller 110 has to sequentially check the blocks in the non-volatile memory 120 in order to confirm their valid data rates. However, the non-volatile memory 120 has so many blocks. When the garbage collection action is performed, it takes a long time for the controller 110 to determine the selected blocks and move the valid LBA write data. In other words, the system latency of the solid state drive 10 is increased and the performance of the solid state drive 10 is impaired.
An inferior condition of the garbage collection action is shown in FIG. 4B. After the controller 110 checks the valid data rates of all blocks in the non-volatile memory 120 sequentially, 100 selected blocks Ba1˜Ba100 with the valid data rate of 99% are determined. After the valid LBA write data in all of the 100 selected blocks Ba1˜Ba100 are moved to the 99 new blank blocks Bb1˜Bb99 by the controller 110, the 100 selected blocks Ba1˜Ba100 are erased. Obviously, the time period of performing the above garbage collection action is very long. Since the solid state drive 10 has the maximum system latency, the system performance of the solid state drive 10 is largely reduced. Moreover, after the garbage collection action is completed, the P/E count of each of the 100 selected blocks Ba1˜Ba100 is added by 1.
As mentioned above, the conventional solid state drive 10 is unable to realize the valid data rates of all blocks in the non-volatile memory 120. Consequently, during the garbage collection action of the conventional solid state drive 10, the system latency of the solid state drive 10 is very unstable and unexpected. Moreover, since the controller 110 determines the blocks with the lower valid data rate as the selected blocks, the P/E counts of the blocks in the non-volatile memory 120 are very uneven after the garbage collection action has been performed many times. That is, the P/E counts of some blocks in the non-volatile memory 120 are very high, and the P/E counts of some other blocks in the non-volatile memory 120 are very low.
Generally, the parameters influencing the use life of the solid state drive 10 are mainly the ambient temperature and the P/E counts. When the solid state drive 10 moves the valid LBA write data, the P/E counts are increased according to the amount of the valid LBA write data. The increase of the P/E count is referred as a write amplification index (WAI).
The lower WAI indicates that the amount of the moved valid LBA write data is lower and the P/E count of the block is lower. Consequently, the use life of the solid state drive 10 is extended. Whereas, the higher WAI indicates that the amount of the moved valid LBA write data is higher and the P/E count of the block is higher. Consequently, the use life of the solid state drive 10 is shortened. For example, the WAI corresponding to the garbage collection action of FIG. 4A is lower than the WAI corresponding to the garbage collection action of FIG. 4B.

SOLID STATE STORAGE TECHNOLOGY CORPORATION


A semiconductor device having a memory cell region comprising a plurality of memory cells is described, and a stable characteristic is imparted to all the memory cells provided in the memory cell block. Impurities are implanted into a memory cell region of a silicon substrate at predetermined intervals, thus forming a plurality of wells. A resist film used as a mask for implanting impurities has strip-shaped patterns and a broad pattern. Since the strip-shaped patterns located close to the broad pattern are inclined, the characteristics of the wells located in the vicinity of the outer periphery of the memory cell region become unstable. The wells having unstable characteristics are taken as dummy wells which do not affect the function of a semiconductor device.

1. Field of the Invention
The present invention relates to a semiconductor device having a dummy pattern, and more particularly, to a semiconductor device having a memory cell block including a plurality of memory cells.
2. Description of the Background Art
A semiconductor device, such as a memory device, has a memory cell block comprising a plurality of memory cells. A plurality of memory cells included in a memory cellblock are formed by means of repetition of an identical pattern. As the area of the memory cell block becomes wider, the environment of memory cells located at the center of the memory cell block becomes apt to greatly differs from the environment of memory cells located in the vicinity of the periphery of the memory cell block. An example of such a difference in environment of memory cells will be described by reference to FIGS. 8A through 8D.
FIGS. 8A through 8D are enlarged cross-sectional views showing the outermost periphery portion of a memory cell block formed on a conventional semiconductor device.
As shown in FIG. 8A, according to a conventional method of manufacturing a semiconductor device, a thermal oxide film 12 having a thickness of about 15 nm, a polysilicon film 14 having a thickness of about 50 nm, and a nitride film 16 having a thickness of about 165 nm are deposited, in this sequence, on a silicon substrate 10. These films are patterned by means of photolithography and etching. Trenches 18 having a depth of about 300 nm are formed in the silicon substrate 10 by means of etching while the thus-patterned nitride film 16 and the like are taken as a mask.
An oxide layer is formed to a thickness of about 50 nm on the interior walls of the respective trenches 18 by means of thermal oxidation of the silicon substrate 10. As shown in FIG. 8B, in order to fill each of the trenches 18 with an oxide film, an oxide film 20 is deposited to a thickness of about 500 nm over the entire surface of the silicon substrate 10. Because of its characteristics, the oxide film 20 is deposited thickly on a narrow pattern and thinly on a wide pattern. For this reason, the thickness of the oxide film 20 becomes thinner toward the periphery of the memory cell block relative to the thickness in the center thereof.
As shown in FIG. 8C, according to the conventional method, the entire surface of the silicon substrate 10 is abraded by means of chemical-and-mechanical polishing (CMP). As illustrated, irregularities arising in the thickness of the oxide film 20 before CMP operation are not absorbed by CMP operation, and the irregularities still remain after the CMP process.
As shown in FIG. 8D, the nitride film 16, the polysilicon film 14, and the thermal oxide film 12 remaining on the surface of the silicon substrate 10 are removed after the CMP operation. As a result, an isolation oxide film 22 for separating individual active regions from each other is formed on the surface of the silicon substrate 10. Irregularities in the thickness of the oxide film 20 which have remained after the CMP operation still remain as irregularities in the thickness of the isolation oxide film 22. As a result, the isolation oxide film 22 surrounding the outermost periphery portion of a memory cell block becomes thinner than the isolation oxide film 22 located in the vicinity of the center of the memory cell block.
After formation of the isolation oxide film 22, a gate dielectric film is formed to a thickness of 30 to 100 angstroms on the surface of the silicon substrate 10. Subsequently, a gate electrode made of polysilicon is patterned onto the gate dielectric film. Further, a side wall dielectric film is formed from TEOS or a nitride film so as to cover the side wall of a gate electrode.
According to the conventional method for manufacturing a semiconductor device, the isolation oxide film 22 is also removed during an etching process for forming a gate electrode or a side wall dielectric film on the silicon substrate 10. As mentioned above, the thickness of the isolation oxide film 22 surrounding the outermost periphery portion of the memory cell block tends to becomes smaller than the thickness of the isolation oxide film 22 located in the vicinity of the center of the memory cell block. Because of such a tendency, the isolation oxide film 22 surrounding the outermost periphery portion of the memory cell block may becomes lower than the surface of the silicon substrate 10 under the influence of the foregoing various etching operations.
In the area where the surface of the isolation oxide film 22 is lower than the surface of the silicon substrate 10, the resistance to a junction leakage is deteriorated. For this reason, in the conventional semiconductor device, the memory cells located along the outermost periphery of the memory cell block are susceptible to failures ascribable to a junction leakage. Thus, in the semiconductor device having a memory cell block, the environment of memory cells located in the vicinity of the center of the memory cell block greatly differs from the environment of memory cells located in the vicinity of the periphery of the memory cell block. Hence, anomalies are likely to arise mainly in the memory cells located in the vicinity of the outermost periphery of the memory cell block.
The present invention has been conceived to solve the foregoing drawbacks of the conventional methods and is aimed at providing a semiconductor device having a structure suitable for imparting a stable characteristic to all memory cells provided in a memory cell block.
The above objects of the present invention are achieved by a semiconductor device described below. The semiconductor device includes a plurality of impurity-diffused layers provided on a silicon substrate at predetermined intervals. One or some of the plurality of impurity-diffused layers located at the outermost periphery position are dummy diffusion layers which are functionally not required by the semiconductor device.
The above objects of the present invention are also achieved by a semiconductor device described below. The semiconductor device includes constituent elements of the same kind which are provided in a plurality of layers. The semiconductor device also includes dummy patterns such that the constituent elements are provided in substantially identical proportions in the plurality of layers. Interconnection elements are provided for fixing the electric potential of the dummy patterns to a predetermined electric potential.
The above objects of the present invention are further achieved by a semiconductor device described below. The semiconductor device includes dummy patterns formed such that constituent elements are provided in a predetermined layer so as to assume a uniform density or pitch over the entire surface of the predetermined layer. The semiconductor device also includes interconnection elements for fixing the electric potential of the dummy patterns to a predetermined electric potential.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.

Semiconductor device having a dummy pattern


Techniques are provided for autonomous vehicle operation using linear temporal logic. The techniques include using one or more processors of a vehicle to store a linear temporal logic expression defining an operating constraint for operating the vehicle. The vehicle is located at a first spatiotemporal location. The one or more processors are used to receive a second spatiotemporal location for the vehicle. The one or more processors are used to identify a motion segment for operating the vehicle from the first spatiotemporal location to the second spatiotemporal location. The one or more processors are used to determine a value of the linear temporal logic expression based on the motion segment. The one or more processors are used to generate an operational metric for operating the vehicle in accordance with the motion segment based on the determined value of the linear temporal logic expression.

Operation of a vehicle from an initial location to a final destination often requires a user or the vehicle's decision-making system to select a route through a road network from the initial location to a final destination. Selecting a complex route can require many decisions, making traditional algorithms for route selection impractical.

Autonomous vehicle operation using linear temporal logic


A trampoline including a trampoline mat, a frame surrounding the trampoline mat, and an attachment system for connecting the frame to the trampoline mat. The attachment system includes a plurality of elastic straps connected to the periphery of the trampoline mat and a plurality of connectors for connecting the elastic straps to the frame.

1. Field of the Invention
The present invention relates to trampolines. More particularly, the present invention relates to an attachment system for connecting a trampoline mat to a trampoline frame.
2. Description of the Related Art
Trampolines and other springboards have been used for decades for sport, entertainment, and fitness purposes. Significant health risks, however, accompany the use of a trampoline. For instance, should the user lose control, he or she may land incorrectly on the trampoline or, even worse, fall off the trampoline causing significant injuries.
A conventional trampoline includes a central mat connected to an outer frame by a plurality of springs having open hooks at their ends. The springs hook into slots or holes at the top of the frame and connect to the mat at the opposite end. This construction leaves large spaces between adjacent springs. Often, the trampoline may include a foam pad covering the frame and loosely attached to the frame with string. The pad typically vibrates and moves during use and leaves these large spaces uncovered or only partially covered with only a thin foam pad. Should the user lose control, he or she may fall into these spaces and be injured.

Trampoline with elastic frame attachment system


A method and apparatus may be used for performing a scene-based automatic white balance correction. The method may include obtaining an input image. The method may include obtaining a raw image thumbnail. The method may include obtaining an augmented image thumbnail. The method may include computing a histogram from an image thumbnail. The method may include determining a scene classification. The method may include learning a filter. The filter may be learned from one or several different instances of the raw image thumbnail, the augmented image thumbnail, the scene classification, or any combination thereof. The method may include applying the filter to the histogram to determine white balance correction coefficients and obtain a processed image.

Image capture devices, such as cameras, may capture content as images or video. Light may be received and focused via a lens and may be converted to an electronic image signal by an image sensor. The image signal may be processed by an image signal processor to form an image, which may be stored, encoded, or both. The configurations used by the image capture device to capture the images or video may in some cases have an effect on the overall quality of the images or video. For example, typical automatic white balance (AWB) correction is slow and inaccurate.


In one embodiment, an apparatus includes a context-based prediction circuit to receive an instruction address for a branch instruction and a plurality of predictions associated with the branch instruction from a global prediction circuit. The context-based prediction circuit may include: a table having a plurality of entries each to store a context prediction value for a corresponding branch instruction; and a control circuit to generate, for the branch instruction, an index value to index into the table, the control circuit to generate the index value based at least in part on at least some of the plurality of predictions associated with the branch instruction and the instruction address for the branch instruction. Other embodiments are described and claimed.

Branch prediction is used to enhance performance in wide, super-scalar processors. Conventional branch predictors use both local and global branch history components. The local predictor makes a direction prediction for a branch instruction (using an instruction pointer (IP) of the instruction) based only on the IPs behavior in the recent past. The global predictor, on the other hand, makes a direction prediction for the branch instruction based on the behavior of all the recently executed branch instructions in the program and captures correlations for different global history lengths. However, with a default scheme to select a prediction from a global predictor that tracks the longest history as a definitive final prediction, some undesired amount of mispredictions occur.

System, apparatus and method for context-based override of history-based branch predictions


A film can comprise greater than or equal to about 95 wt % thermoplastic resin and about 0.001 wt % to about 5.0 wt % sulfonate salt, based on a total weight of the film, and have a UL-94 rating of VTM-0, wherein the thermoplastic resin is selected from the group consisting of polyimide, polysulfone, and copolymers, reaction products, and combinations comprising at least one of the foregoing thermoplastic resins.

Since high Tg (glass transition temperature) thermoplastic resins (e.g., Tg of greater than or equal to about 180° C.) are processed at high temperatures, many standard additives that are used to flame retard other resins are unstable, decomposing under the high process temperatures needed to melt process the viscous high Tg amorphous thermoplastics. The decomposition of standard flame retardant (FR) additives during melt processing, as well as the detrimental effects such decomposition products can have upon the resin and the equipment, is a problem. This is true of amorphous polyetherimide (PEI) and polysulfone (PSU) resins that have high Tg and high viscosity making them more difficult to melt process than crystalline resins or lower Tg amorphous resins. Efforts to improve the flame retardancy of PEI by forming blends with additional materials such as brominated polycarbonate, aliphatic bominated or chlorinated compounds, and hydrated inorganic compounds like aluminum trihydrate and some alkyl phosphates, are ineffective due to decomposition or volatilization of the flame retardant additive.
A particular flame retardancy deficiency has been noted in PEI and polysulfone films having a thickness of 25 micrometers to 300 micrometers (e.g., films used in applications such as electronics). Hence, PEI and polysulfone films have need of improved flame retardant performance. These thin films have a relatively high surface area that is exposed to air, making the combustion process more favorable than in thicker sections. Electronic specifications often require the film to exhibit sufficient flame retardancy such as that specified in UL-94 (Underwriter's Laboratory Bulletin 94 entitled "Tests for Flammability of Plastic Materials, UL-94"). A rating of VTM-0 is desirable in many applications. Polyetherimide and polysulfone thin films, however, often only attain a UL-94 rating of VTM-1 or VTM-2. Various unsuccessful attempts have been made at improving the flame retardancy rating and ignition resistance of the film while retaining the melt processability, good mechanical and electrical properties, and transparency of the PEI, PSU, and polyethersulfone (PES) films. Therefore, there remains a need to produce polyetherimide and polysulfone films having a thickness of about 25 micrometers to about 300 micrometers while attaining a UL-94 rating of VTM-0.

Flame retardant thermoplastic films and methods of making the same


A brake device has at least one wheel cylinder operable by the pressure of a working liquid. A reservoir stores the working liquid discharged from the at least one wheel cylinder during the operation of an anti-lock braking function. A pump serves to transfer the working liquid from the reservoir. An outlet valve is disposed on the discharge side of the pump. A master cylinder receives the working liquid delivered from the pump via the outlet valve. A pulsation reducing device is disposed on a downstream side of the outlet valve between the pump and the master cylinder. The pulsation reducing device controls the operation speed of the outlet valve in order to reduce possible pulsations produced in the working liquid discharged from the pump.

1. Field of the Invention
The present invention relates to brake devices having a pump that serves to pump a working liquid previously discharged into a reservoir from the wheel cylinders and to deliver the working liquid to a master cylinder via a discharge valve associated with the pump.
2. Description of the Related Art
In general, brake devices have a master cylinder and a wheel cylinder(s). The master cylinder serves to pressurize a working liquid in response to the operation of a brake pedal so as to deliver hydraulic pressure via the working liquid to the wheel cylinder(s). The wheel cylinder(s) then functions to press the friction surfaces of brake pads against a brake disk as a result of the pressure of the working liquid.
Brake devices having an anti-lock function for preventing a wheel(s) from being locked up during braking (i.e., stopping rotation while the vehicle is still moving) are also known. These types of brake devices typically have an actuator that includes a reservoir and a pump. The reservoir serves to store the working liquid that is discharged from the wheel cylinder(s) when the pressure of the wheel cylinder(s) is to be reduced (thereby, eliminating or preventing the locking effect upon the wheel). The pump then serves to pump the working liquid stored within the reservoir in order to deliver the working liquid to the master cylinder. Conventionally, a reciprocating pump (e.g., a plunger pump) has been generally used as a pump for this type of brake device. Japanese Laid-Open Patent Publication No. 8-230642 and U.S. Pat. No. 6,000,764 teach such brake devices.
However, the working liquid discharged from the reciprocating pump naturally has pulsations in pressure. Such pulsations may cause vibrations of various pipelines, the master cylinder, etc., of the brake device, possibly producing unpleasant vibration sounds. In addition, vibrations may be transmitted to the vehicle body and create an uncomfortable feeling or sensation for passengers.
In order to reduce the effects of pulsations of the working liquid, there has been proposed to provide a damper chamber on the downstream side of the pump. However, in many cases it has been difficult to effectively suppress the pulsations only by the provision of the damper chamber.


An apparatus and method for adjusting the voltage applied to a Faraday shield of an inductively coupled plasma etching apparatus is provided. An appropriate voltage is easily and variably applied to a Faraday shield such that sputtering of a plasma can be controlled to prevent and mitigate deposition of non-volatile reaction products that adversely affect an etching process. The appropriate voltage for a particular etching process or step is applied to the Faraday shield by simply adjusting a tuning capacitor. It is not necessary to mechanically reconfigure the etching apparatus to adjust the Faraday shield voltage.

1. Field of the Invention
The present invention relates generally to semiconductor fabrication, and more particularly, to apparatuses and methods for adjusting the voltage on a powered Faraday shield to control the behavior of a plasma inside an inductively coupled plasma etching chamber.
2. Description of the Related Art
In semiconductor manufacturing, etching processes are commonly and repeatedly carried out. As is well known to those skilled in the art, there are two types of etching processes: wet etching and dry etching. Dry etching is typically performed using an inductively coupled plasma etching apparatus.
FIG. 1 shows an inductively coupled plasma etching apparatus 100, in accordance with the prior art. The inductively coupled plasma etching apparatus 100 includes an etching chamber 101 structurally defined by chamber walls 102 and a chamber window 104. The chamber walls 102 are typically fabricated from stainless steel; however, other suitable materials may also be used. The chamber window 104 is typically fabricated from quartz; however, other materials such as alumina (Al2O3), silicon nitride (Si3N4), aluminum nitride (AlN), silicon carbide (SiC), and silicon (Si) may also be used. The chamber window 104 provides a vacuum seal to the chamber walls 102. A semiconductor wafer (i.e., "wafer") 110 is mounted on a chuck 108 positioned on the bottom inner surface of the etching chamber 101. A coil 116 and a metal shield 112 are positioned above the chamber window 104. The coil 116 is held above the etching chamber 101 by insulating spacers (not shown). The coil 116 is fabricated from an electrically conductive material and includes at least one complete turn. The exemplary coil 116 shown in FIG. 1 includes three turns. The coil 116 symbols having an "X" indicate that the coil 116 extends rotationally into the page. Conversely, the coil 116 symbols having a "●" indicate that the coil 116 extends rotationally out of the page. The metal shield 112 is secured beneath the coil 116 in a spaced apart relationship using insulating spacers 114. The metal shield 112 is disposed immediately above the chamber window 104. The coil 116, the metal shield 112, and the chamber window 104 are each configured to be substantially parallel to one another. Furthermore, the coil 116 and the metal shield 112 are electrically connected through a tap 118.
FIG. 2 shows the basic operating principles of the inductively coupled plasma etching apparatus 100, in accordance with the prior art. During operation, a reactant gas flows through the etching chamber 101 from a gas lead-in port (not shown) to a gas exhaust port (not shown). High frequency power (i.e., RF power) is then applied from a power supply (not shown) to the coil 116 to cause an RF current to flow through the coil 116. The RF current flowing through the coil 116 generates an electromagnetic field 120 about the coil 116. The electromagnetic field 120 generates an inductive current 122 within the etching chamber 101. The inductive current 122 acts on the reactant gas to generate a plasma 123. High frequency power (i.e., RF power) is applied from a power supply (not shown) to the chuck 108 to provide directionality to the plasma 123 such that the plasma 123 is "pulled" down onto the wafer 110 surface to effect the etching process.
The plasma 123 contains various types of radicals in the form of positive and negative ions. The chemical reactions of the various types of positive and negative ions are used to etch the wafer 110. During the etching process, the coil 116 performs a function analogous to that of a primary coil in a transformer, while the plasma 123 performs a function analogous to that of a secondary coil in the transformer.
The reaction products generated by the etching process may be volatile or non-volatile. The volatile reaction products are discarded along with used reactant gas through the gas exhaust port. The non-volatile reaction products, however, typically remain in the etching chamber 101. The non-volatile reaction products may adhere to the chamber walls 101 and the chamber window 104. Adherence of non-volatile reaction products to the chamber window 104 may interfere with the etching process. A deposition of electrically conductive non-volatile reaction products on the chamber window 104 may electrically shield the inner region of the etching chamber 101 from the electromagnetic field 120 generated about the coil 116. Consequently, the plasma 123 will not strike well, and the etching process will have to be discontinued until the deposition is removed from the chamber window 104. Additionally, excessive deposition may result in particles flaking off the chamber window 104 onto the wafer 110, thus interfering with the etching process. Excessive deposition, therefore, requires more frequent cleanings of the etching chamber 101 and the chamber window 104.
Deposition of non-volatile reaction products on the chamber window 104 can be mitigated and prevented by sputtering the plasma against the chamber window 104 to "knock off" the deposition. To avoid non-uniformity in the plasma 123, the sputtering should be performed in a uniform manner across the chamber window 104. Non-uniform deposition and/or non-uniform sputter can introduce drift into the etching process. Drift can prevent reproducibility among a number wafers 110 whose characteristics are intended to be uniform.
The metal shield 112 acts as a Faraday shield to ensure that electromagnetic energy generated by the coil 116 is uniformly distributed to the plasma 123. As a result of uniformly distributing the electromagnetic energy to the plasma 123 in the vicinity of the chamber window 104, the deposition of non-volatile reaction products onto the chamber window 104 will occur uniformly. Similarly, the sputtering of non-volatile reaction products from the chamber window 104 will also occur uniformly. The presence of uniform electrical characteristics across the chamber window 104 facilitates the generation of uniform plasma 123 characteristics across the etching chamber 101. However, even uniform deposition of non-volatile reaction products on the chamber window 104 will continue to interfere with the etching process as previously discussed. Therefore, it is necessary to sputter the plasma 123 against the chamber window 104 to prevent buildup of non-volatile reaction product deposition. The sputtering of plasma 123 against the chamber window 104 must be performed carefully to minimize or prevent erosion of the chamber window 104 by the charged particles of the plasma 123.
FIG. 3 shows how the Faraday shield voltage can be controlled to affect the chamber window 104 characteristics, in accordance with the prior art. View 134 shows the effects of applying an appropriate voltage to the metal shield 112 to control deposition and sputter of non-volatile reaction products relative to the chamber window 104. With the appropriate voltage applied to the metal shield 112, incident ions 128 of the plasma 123 will be uniformly directed toward the chamber window 104. The energy and intensity of the incident ions 128 will prevent deposition while simultaneously minimizing the erosive effects of sputtering. View 136 shows the effects of applying too low a voltage to the metal shield 112. With too low a voltage, incident ions 130 directed toward the chamber window 104 will lack the required energy and intensity to prevent buildup of non-volatile reaction products commonly called a deposition 124. View 138 shows the effects of applying too high a voltage to the metal shield 112. With too high a voltage, incident ions 132 will be directed toward the chamber window 104 having too much energy and too much intensity, thus causing too much sputtering. Excessive sputtering can result in erosion 126 of the chamber window 104. Such erosion 126 not only shortens the lifetime of the chamber window 104, but also generates particles which can contaminate the wafer 110 and introduce unwanted chemical species into the etching process environment. The presence of unwanted species in the etching process environment is particularly undesirable because it leads to poor reproducibility of the etching process conditions.
The appropriate Faraday shield voltage is dependent on the particular etching process that is being performed. Some factors that may influence the appropriate voltage include the type of reactant gas, the RF power applied to the coil 116, the material to be etched from the wafer 110, and the process environment conditions inside the etching chamber 101. Many etching recipes include multiple etching steps, e.g., the breakthrough step, the bulk etch steps, and the over etch step, in which the RF power, pressure, and gas compositions can be substantially different. Consequently, a certain setting for the appropriate Faraday shield voltage for a given etch step may not be optimal in other etch steps. Thus, the Faraday shield voltage should be controllable to ensure that the chamber window 104 is maintained free of non-volatile reaction product deposition during the etching process. Furthermore, the Faraday shield voltage should be easily adjustable to accommodate the variance in voltage requirements for different etching processes and steps. In the prior art, the etching apparatus has been mechanically reconfigured to obtain an appropriate Faraday shield voltage for a particular etching process. Such mechanical reconfiguration has a narrow operating window and is costly in terms of material expense and time resulting in lower wafer throughput.
In view of the foregoing, there is a need for an apparatus and a method to easily adjust the voltage applied to a Faraday shield of an inductively coupled plasma etching apparatus.

Method for adjusting voltage on a powered Faraday shield


A plane, mechanical keyboard comprises several main keys, each of which is surrounded by one or more secondary keys and is mechanically connected to at least one of these secondary keys to define a striking zone. Mechanisms interconnect the main keys and the secondary keys so that each main key, under the effect of a pressure, drives the neighboring secondary keys mechanically connected to this main key downwards and so that a pull-back force exerted on each secondary key exerts a corresponding pull-back force capable of drawing the neighboring main key back upwards when there is no pressure exerted on this neighboring key. This keyboard is designed, inter alia, to be integrated into pocket computer devices or pocket electronic devices or again into portable telephones.

1. Field of the Invention
The present invention relates to a plane mechanical keyboard designed to be integrated into microcomputer type pocket computers or electronic devices or into portable telephones for example.
2. Description of the Prior Art
Mechanical keyboards are widely available in the market. They include membrane-type keyboards, flexible contact keyboards and also touch pad keyboards.
However, presently existing mechanical keyboards have keys that are far too small to enable the high-speed and efficient typing of a text. For, since the keys have a size that is generally smaller than the contact surface of a user's finger, it becomes impossible to press a key without rubbing against at least one of its angular edges. Consequently, the high-speed and prolonged typing of a text very soon becomes irksome and ergonomically unsound.
Furthermore, the small sizes of the keys and the small interstices between two contiguous keys mean that the typing must be done with very great precision in order to prevent the many typing errors that are likely to occur.
FIGS. 1A to 1C show three types of prior art keyboards. These three keyboards are made to the same dimensions, and the spacing E between the centers of two neighboring keys is constant from one keyboard to another. Only the width of the keys, respectively referenced l.sub.A, l.sub.B and l.sub.C, varies from one keyboard to another. Now, it is this dimension of the keys that plays a very great role in the value of the margin of error available to the user around the center of a key of a keyboard. The margin of error is geometrically defined as the size of a horizontal or vertical segment on which the center of the finger must be placed in order that the striking of the required key may be valid. This margin is generally inversely proportional to the striking precision.
In general, the value of the spacing E between the centers of two neighboring keys for small-sized keyboards designed for pocket devices ranges from 1 to 1.5 cm.
Furthermore, it is assumed by approximation that the contact surface of an adult finger on a keyboard, when a key is struck, forms a circle whose diameter, designated by the reference d, is estimated at about 0.8 cm. In order that a user may be sure of being able to depress one of the keys of a keyboard by randomly pressing on this keyboard, it is furthermore necessary that the width of the keys of this keyboard should range from E to E-d, namely about 0.2 and 0.7 cm.
FIGS. 1A to 1C show the development of the margin of error, referenced m.sub.A, m.sub.B and m.sub.C, as a function of the width of the keys. It can be seen that, when the width l.sub.C of the keys is equal to E, the margin of error m.sub.C is the minimum, namely a user must take great care to avoid striking two keys simultaneously.
However, when the width l.sub.A of the keys is the minimum and equal to E-d, then the margin of error is the maximum. In this case indeed, no great precision is required to strike the keys since they are sufficiently spaced out to prevent the possibility that two keys may be struck simultaneously. FIG. 1B illustrates an intermediate example with a value of l.sub.B ranging from E to E-d.
However, the optimum approach shown in FIG. 1A is not ergonomically sound. For, as described earlier, since the striking surface l.sup.2 is smaller than the contact surface (.PI.d.sup.2 /4) of a user's finger, it is impossible to strike a key without rubbing against at least one of its angular edges. Consequently, this type of key cannot be used for the fast and prolonged typing of a text in an efficient manner.


Heat-rejecting media may thermally couple to a device, and the heat-rejecting media may include active heat-rejecting media configured to thermally couple to the device and thermally couple between the device and an active cooling system such that the active cooling system causes heat transferred to the active heat-rejecting media from the device to be transferred from the active heat-rejecting media and passive heat-rejecting media extending from the active heat-rejecting media and configured to thermally couple to the device and thermally couple between the device and a system-level air mover other than the active cooling system and configured to drive airflow to components of a system comprising the device such that the heat transferred to the passive heat-rejecting media from the device is transferred to the airflow driven by the system-level air mover.

As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
As processors, graphics cards, random access memory (RAM) and other components in information handling systems have increased in clock speed and power consumption, the amount of heat produced by such components as a side-effect of normal operation has also increased. Often, the temperatures of these components need to be kept within a reasonable range to prevent overheating, instability, malfunction and damage leading to a shortened component lifespan. Accordingly, air movers (e.g., cooling fans and blowers) have often been used in information handling systems to cool information handling systems and their components.
To control temperature of components of an information handling system, an air mover may direct air over one or more heatsinks thermally coupled to individual components. Traditional approaches to cooling components may include a "passive" cooling system that serves to reject heat of a component to air driven by one or more system-level air movers (e.g., fans) for cooling multiple components of an information handling system in addition to the peripheral component. Another traditional approach may include an "active" cooling system comprising an air mover and heat sink local to (e.g., mounted or mechanically attached to) a component for cooling the component by driving air over the heat sink to cool the peripheral component. Another type of active cooling may include liquid cooling, in which a heat-exchanging cold plate is thermally coupled to the component, and a chilled fluid is passed through conduits internal to the cold plate to remove heat from the component.
While active cooling may provide a very efficient approach to cooling with high-velocity, high-impact airflow with very low air mover power consumption required for the local active air mover, there may be no cooling redundancy for the component in case of failure of the local air mover. Similarly, traditional liquid cooling solutions also do not provide cooling redundancy in the event of failure of the liquid cooling system (e.g., if a pump for conveying the cooling fluid to the cold plate fails).

Systems and methods for combined active and passive cooling of an information handling resource


In resource measurement device 32, a measured value x of resource use condition is acquired in respect of the wireless resource to be monitored. Furthermore, in comparators 34 and 35, the measured value x is compared with the call admission threshold value xA of service A or with the call admission threshold value xB of service B, respectively. Comparison result selector 36 then selects one or other of the comparison results of comparators 34 and 35 in accordance with the type or degree of priority of the service of the call requested, identified by service identifier 33, and call admission control device 31 restricts new call admission in accordance with the selected comparison result. Thus, the call admission control method, communication system and base station device wherein deterioration of communication quality is suitably suppressed by call admission control in accordance with the service that is being utilized are provided in communication in which access is performed with shared resources.

1. Field of the Invention
The present invention relates to a call admission control method, communication system and base station device employed in communications in which access is performed by a plurality of users with shared resources.
2. Related Background Art
In a mobile communication system comprising a wireless base station and a plurality of mobile stations, data communication (transmission/reception) is performed by wireless communication circuits between the base station and the mobile stations. Circuit switching systems and packet switching systems are examples of switching systems employed in such data transmission/reception.
As the access system, the code division multiple access system (CDMA), the frequency division multiple access system (FDMA) or the time division multiple access system (TDMA) may be employed.

Call admission control method, communication system and base station device


A system and method is disclosed that compresses and decompresses images. The compression system and method includes an encoder which compresses images and stores such compressed images in a unique file format, and a decoder which decompresses images. The encoder optimizes the encoding process to accommodate different image types with fuzzy logic methods that automatically analyze and decompose a source image, classify its components, select the optimal compression method for each component, and determine the optimal parameters of the selected compression methods. The encoding methods include: a Reed Spline Filter, a discrete cosine transform, a differential pulse code modulator, an enhancement analyzer, an adaptive vector quantizer and a channel encoder to generate a plurality of data segments that contain the compressed image. The plurality of data segments are layered in the compressed file to optimize the decoding process. The first layer allows the decoder to display the compressed image as a miniature or a coarse quality full sized image, the decoder then adds additional detail and sharpness to the displayed image as each new layer is received. The decoder uses optimal decompression methods to expand the compressed image file.

1. Field of the Invention
This invention relates to the compression and decompression of digital data and, more particularly, to the reduction in the amount of digital data necessary to store and transmit images.
2. Background of the Invention
Image compression systems are commonly used in computers to reduce the storage space and transmittal times associated with storing, transferring and retrieving images. Due to increased use of images in computer applications, and the increase in the transfer of images, a variety of image compression techniques have attempted to solve the problems associated with the large amounts of storage space (i.e., hard disks, tapes or other devices) needed to store images.
Conventional devices store an image as a two-dimensional array of picture elements, or pixels. The number of pixels determines the resolution of an image. Typically the resolution is measured by stating the number of horizontal and vertical pixels contained in the two dimensional image array. For example, a 640 by 480 image has 640 pixels across and 480 from top to bottom to total 307,200 pixels.
While the number of pixels represents the image resolution, the number of bits assigned to each pixel represents the number of available intensity levels of each pixel. For example, if a pixel is only assigned one bit, the pixel can represent a maximum of two values. Thus the range of colors which can be assigned to that pixel is limited to two (typically black and white). In color images, the bits assigned to each pixel represent the intensity values of the three primary colors of red, green and blue. In present "true color" applications, each pixel is normally represented by 24 bits where 8 bits are assigned to each primary color allowing the encoding of 16.8 million (28.times.28.times.28) different colors.
Consequently, color images require large amounts of storage capacity. For example, a typical color (24 bits per pixel) image with a resolution of 640 by 480 requires approximately 922,000 bytes of storage. A larger 24-bit color image with a 2000 by 2000 pixel resolution requires approximately twelve million bytes of storage. As a result, image-based applications such as interactive shopping, multimedia products, electronic games and other image-based presentations require large amounts of storage space to display high quality color images.
In order to reduce storage requirements, an image is compressed (encoded) and stored as a smaller file which requires less storage space. In order to retrieve and view the compressed image, the compressed image file is expanded (decoded) to its original size. The decoded (or "reconstructed") image is usually an imperfect or "lossy" representation of the original image because some information may be lost in the compression process. Normally, the greater the amount of compression the greater the divergence between the original image and the reconstructed image. The amount of compression is often referred to as the compression ratio. The compression ratio is the amount of storage space needed to store the original (uncompressed) digitized image file divided by the amount of storage space needed to store the corresponding compressed image file.
By reducing the amount of storage space needed to store an image, compression is also used to reduce the time needed to transfer and communicate images to other locations. In order to transfer an image, the data bits that represent the image are sent via a data channel to another location. The sequence of transmitted bytes is called the data stream. Generally, the image data is encoded and the compressed image data stream is sent over a data channel and when received, the compressed image data is decoded to recreate the original image. Thus, compression speeds the transmission of image files by reducing their size.
Several processes have been developed for compressing the data required to represent an image. Generally, the processes rely on two methods: 1) spatial or time domain compression, and 2) frequency domain compression. In frequency domain compression, the binary data representing each pixel in the space or time domain are mapped into a new coordinate system in the frequency domain.
In general, the mathematical transforms, such as the discrete cosine transform (DCT), are chosen so that the signal energy of the original image is preserved, but the energy is concentrated in a relatively few transform coefficients. Once transformed, the data is compressed by quantization and encoding of the transform coefficients.
Optimization of the process of compressing an image includes increasing the compression ratio while maintaining the quality of the original image, reducing the time to encode an image, and reducing the time to decode a compressed image. In general, a process that increases the compression ratio or decreases the time to compress an image results in a loss of image quality. A process that increases the compression ratio and maintains a high quality image often results in longer encoding and decoding times. Accordingly, it would be advantageous to increase the compression ratio and reduce the time needed to encode and decode an image while maintaining a high quality image.
It is well known that image encoders can be optimized for specific image types. For example, different types of images may include graphical, photographic, or typographic information or combinations thereof. As discussed in more detail below, the encoding of an image can be viewed as a multi-step process that uses a variety of compression methods which include filters, mathematical transformations, quantization techniques, etc. In general each compression method will compress different image types with varying comparative efficiency. These compression methods can be selectively applied to optimize an encoder with respect to a certain type of image. In addition to selectively applying various compression methods, it is also possible to optimize an encoder by varying the parameters (e.g., quantization tables) of a particular compression method.
Broadly speaking, however, the prior art does not provide an adaptive encoder that automatically decomposes a source image, classifies its parts, and selects the optimal compression methods and the optimal parameters of the selected compression methods resulting in an optimized encoder that increases relative compression rates.
Once an image is optimally compressed with an encoder, the set of compressed data are stored in a file. The structure of the compressed file is referred to as the file format. The file format can be fairly simple and common, or the format can be quite complex and include a particular sequence of compressed data or various types of control instructions and codes.
The file format (the structure of the data in the file) is especially important when compressed data in the file will be read and processed sequentially and when the user desires to view or transmit only part of a compressed image file. Accordingly, it would be advantageous to provide a file format that "layers" the compressed image components, arranging those of greatest visual importance first, those of secondary visual importance second, and so on. Layering the compressed file format in such a way allows the first segment of the compressed image file to be decoded prior to the remainder of the file being received or read by the decoder. The decoder can display the first segment (layer) as a miniature version of the entire image or can enlarge the miniature to display a coarse or "splash" quality rendition of the original image. As each successive file segment or layer is received, the decoder enhances the quality of the displayed picture by selectively adding detail and correcting pixel values.
Like the encoding process, the decoding of an image can be viewed as a multi-step process that uses a variety of decoding methods which include inverse mathematical transformations, inverse quantization techniques, etc. Conventional decoders are designed to have an inverse function relative to the encoding system. These inverse decoding methods must match the encoding process used to encode the image. In addition, where an encoder makes content-sensitive adaptations to the compression algorithm, the decoder must apply a matching content-sensitive decoding process.
Generally, a decoder is designed to match a specific encoding process. Prior art compression systems exist that allow the decoder to adjust particular parameters, but the prior art encoders must also transmit accompanying tables and other information. In addition, many conventional decoders are limited to specific decoding methods that do not accommodate content-sensitive adaptations.

Method and apparatus for compressing images


Extrudable elastic oral pharmaceutical gel compositions, especially containing aetaminophen as the therapeutically active agent, and manually operable metered dose dispensers containing them and method of making and method of use thereof are disclosed.

1. Field of the Invention
The invention relates to extrudable elastic oral pharmaceutical gel compositions and metered dose dispensers containing them and method of making and method of use thereof.
2. Information Disclosure Statement
Cohen et al. U.S. Pat. No. 4,708,834 issued Nov. 24, 1987 describes pharmaceutical gel compositions as fills for gelatin capsules. The fill compositions are described as "comprising an aqueous solution or dispersion of a polysaccharide gum and a pharmaceutically-active compound". Most of the water thereof is described as being removed after encapsulation by drying the capsules. Acetaminophen and niacin fill compositions and capsules are specifically described.
There is a need for oral pharmaceutical compositions for pediatric and adult/geriatric use in an easy to use metered dose form. An attempt to fill this need is shown by Mackles U.S. Pat. No. 4,639,367 issued Jan. 27, 1987, which describes "stable, edible anhydrous aerosol foam[s] or whip[s] capable of suspending up to 50% by weight of a dispersed solid . . . prepared from a foamable, edible anhydrous liquid oil; a foaming agent; and controlled amounts of a food grade propellant which are sufficient to produce a stable foam rather than a spray." Such products appear to be illustrated by Extra Strength MAALOX.RTM. WHIP.TM. Antacid brand of magnesium and aluminum hydroxides oral suspension, which is described by Physicians' Desk Reference for Nonprescription Drugs (ninth edition, 1988, pp. 423 and 667). These compositions suffer the disadvantages of high caloric content due to the edible oil, potential for gastric and intestinal distress due to the aerosol propellant, inexact metering and tendency for the aerosol dispenser nozzle to clog due to the particulate nature of the compositions. The presently described and claimed invention overcomes all of these disadvantages.

Extrudable elastic oral pharmaceutical gel compositions and metered dose dispensers containing them and method of making and method of use thereof


The simultaneous actuating mechanism for parallel axis rotors includes a base and a plurality of rotating rotors mounted in spaced relation inside the base, the rotors having parallel axes of rotation. A crank pin extends from each rotor at a position offset from the corresponding axis of rotation. A driving assembly is coupled to the crank pin of all the rotors. Operation of the driving assembly causes simultaneous rotation of the rotors to facilitate various mechanical functions, such as threading, steering, and reciprocation of multiple elements.

1. Field of the Invention
The present invention relates to mechanical actuators, and particularly to a simultaneous actuating mechanism for parallel axis rotors that drives or rotates a plurality of spaced rotors at the same time without employing intermediate, motion-transferring components between the rotors.
2. Description of the Related Art
One of the most fundamental aspects of mechanical systems is power transfer, usually from rotary motion into working motion. Most common mechanical systems include a rotary driver connected to a plurality of other components that need to be powered by the driver. The components are typically interconnected by intermediate components, such as gears, pinions, pulleys, belts, chains, and the like, prior to performing actual work. Depending on the complexity of these mechanical systems, the power transfer can be inefficient, simply from the physics of attempting to move multiple components from a single source or input. In other words, for a given amount of rotary power, the output power for work can be significantly reduced due to the energy loss in moving the intermediary components. Additionally, a complex mechanical system with numerous parts generally tends to be more prone to requiring servicing and maintenance, since there are more parts that can potentially wear out or fail.
Thus, a simultaneous actuating mechanism for parallel axis rotors solving the aforementioned problems is desired.

Simultaneous actuating mechanism for parallel axis rotors


A semiconductor wafer polishing agent contains mainly a silica containing polishing agent and is added with a polyolefin type fine particle material. The novel semiconductor wafer polishing agent is capable of low brightness polishing to the back face of the wafer, sensor detection of the front and back faces of the wafer, and suppression of dust to be generated by chipping of the back face of the wafer, thereby to increase the yield of semiconductor devices. A polishing method using the polishing agent and a novel semiconductor wafer having a back face with an unconventional surface shape are also disclosed.

1. Field of the Invention
The present invention relates to a polishing agent and a polishing method used for polishing semiconductor wafers, in particular, single-crystal silicon wafers (hereinafter may be referred to, for brevity, as "wafer"). Further, this invention relates to a novel semiconductor wafer having a back face with an unconventional surface shape.
2. Description of the Related Art
Generally, as shown in FIG. 10, the manufacturing method of semiconductor wafers includes a slicing process (A) to obtain wafers of thin disc type by slicing a single crystal ingot formed by a pulling process using a crystal pulling machine; a chamfering process (B) to chamfer a peripheral edge portion of the wafer obtained through the slicing process (A) to prevent cracking or breakage of the wafer; a lapping process (C) to flatten the surface of the chamfered wafer by lapping it; an etching process (D) to remove mechanical damage of the so chamfered and lapped wafer; a primary mirror polishing process (E1) to polish one side of the etched wafer to obtain a primary mirror surface of the wafer; a final mirror polishing process (G) to finally polish the surface of the so primary mirror polished wafer to obtain a final mirror surface of the wafer; and a washing process (H) for washing the finally mirror polished wafer to remove the polishing agent or dust particles from its surface.
As the etching process (D), there are two types of processes, that is, an acid etching process using an acid etching solution of a mixed acid or the like and an alkaline etching process using an alkaline etching solution of NaOH or the like. In the acid etching process, as shown in FIG. 11, a relatively high etching rate is obtained, and a surface roughness of an etched wafer is so fine that a cycle of the roughness is less than 10 .mu.m and a P-V (Peak to Valley) value thereof is smaller than 0.6 .mu.m. On the contrary, in the alkaline etching process, as shown in FIG. 12, a surface roughness of an etched wafer is so large that a cycle of the roughness is in the range of 10 to 20 .mu.m and a P-V value thereof sometimes exceeds 1.5 .mu.m.
However, in the semiconductor wafer produced through the respective processes shown in FIG. 10, the following problem has been seen because the back face of the etched wafer is left as etched to the final stage.
After the both faces of the wafer are etched in the etching process, only the front face of the wafer is subjected to mirror polishing in the next mirror polishing process. The polished front face of the wafer is not chucked by as a vacuum chucking means and therefore offers no problem. However, when the backs face of the etched wafer is chucked by such a chucking means, edged portions still remaining in the back face with relatively large surface roughness are chipped or broken to generate fine dust or a great number of fine particles, due to which the yield of semiconductor devices diminishes.
If both the front and back faces of the wafer are subjected to mirror polishing, there will be vanished relatively large surface roughness on the back face. Therefore, the generation of fine dust or particles described above can be prevented so that the problem caused by such fine dust or particles can also be solved.
However, according to the above both-face mirror polishing process, the back face also becomes a mirror surface. Thus, respective sensors of processing machines can not distinguish the front face from the back face. Further, the so mirror polished wafer tends to slip out from a conveying line.
There have been no effective means capable of such low brightness polishing for semiconductor wafers that can satisfy the above face detection and wafer conveyance.

Polishing agent used for polishing semiconductor wafers and polishing method using the same


Techniques are provided for autonomous vehicle fleet management for reduced traffic congestion. A request is received for a vehicular ride. The request includes an initial spatiotemporal location and a destination spatiotemporal location. A processor is used to generate a representation of lane segments. Each lane segment is weighted in accordance with a number of other vehicles on the lane segment. A vehicle located within a threshold distance to the initial spatiotemporal location is identified such that the identified vehicle has at least one vacant seat. The processor is used to determine a route for operating the identified vehicle from the initial spatiotemporal location to the destination spatiotemporal location. The route includes one or more lane segments of the lane segments. An aggregate of weights of the one or more lane segments is below a threshold value. The received request and the determined route are transmitted to the identified vehicle.

Operation of a vehicle from an initial location to a final destination often requires a user or the vehicle's decision-making system to select a route through a road network from the initial location to a final destination. Selecting a complex route can require many decisions, making traditional algorithms for route selection impractical. Traditional algorithms are sometimes used to select a route across a directed graph from the initial location to a final destination. However, if a large number of other vehicles on the road use such an algorithm, the selected route may become overloaded and travel may slow to a crawl. In addition, the presence of parked vehicles, construction zones, and pedestrians complicate route selection and operation.

Autonomous vehicle fleet management for reduced traffic congestion


Analyzers are described that include a conveyance device for transporting containers which contain analyte, each container having identification information; an identification information reader for reading an identification information of a container transported at a first position by the conveyance device; an analyzer body for acquiring an analyte from a container transported at a second position by the conveyance device and analyzing the analyte; and an anomaly notification device for reporting an anomaly if the identification information reader consecutively reads the same identification information. Conveyance device and transport anomaly determination method are also described.

Conventionally, analyzing systems which analyze specimens via an analyzer while specimen containers are transported by a conveyance device have become widespread in the effort for more efficient examinations. Specimen inspection systems which read a barcode as identification information from a transported specimen container and subsequently transport the container and suction the specimen are well known as examples of such analyzing systems (for example, refer to Japanese Laid-Open Patent Publication No. 7-239333).
In the specimen inspection system disclosed in Japanese Laid-Open Patent Publication No. 7-239333, each analysis item to be analyzed is determined after a barcode is read and before a sample is suctioned, such that it is possible for the analyzer to quickly suction a sample when the sample container has arrived at the suction position. In this way the examination speed can be increased since the analyzer does not enter a standby state when the suctioning process is performed.
In the specimen inspection system disclosed in Japanese Laid-Open Patent Publication No. 7-239333, however, there are occasions when an anomaly of the conveyance device may occur after the barcode of the transported sample container has been read but before the sample has been suctioned from the sample container whose barcode has been read, such that the sample container remains stopped at the barcode reading position and is not transported; in this case an inconvenience arises inasmuch as the sample container cannot be transported normally. Furthermore, there are occasions when, after the barcode of a sample container being transported has been read but before the sample has been suctioned from the container whose barcode has been read, a user may remove the sample container from the rack and return it one position behind a specific position in the rack, such that the sample container is not transported normally.
When a sample container is not transported normally after the barcode has been read from the sample container being transported but before the sample has been suctioned from the container whose barcode has been read, a problem arises which causes a reduction in the examination reliability inasmuch as a sample accommodated in a sample container which is different than the sample container whose barcode has been read may be erroneously suctioned as the sample of the container whose barcode has been read.

Analyzer, conveyance device, and transport anomaly determination method


The invention relates to isolated nucleic acid molecules comprising the sequence of a DNA virus microRNA. In another embodiment, the invention relates to single stranded DNA virus microRNA molecules. In yet another embodiment, the invention relates to single stranded anti-DNA virus microRNA molecules.

MicroRNAs are small RNA molecules of about 22 nucleotides. These microRNA molecules can control gene expression in a sequence specific manner in a wide variety of organisms.
In many organisms, RNA silencing mediated by double-stranded RNA (dsRNA), such as siRNA and microRNA, is part of an innate immune response against RNA viruses and transposable elements. Counter defense strategies to thwart the host response were found in, for example, plant viruses and the insect Flock House virus. These viruses express inhibitors, e.g., dsRNA-binding proteins, that interfere with the host cell RNA silencing machinery.
For example, microRNAs are reported to block translation after partially hybridizing to the non-coding 3′ region of mRNAs of target genes. The genes targeted by microRNAs largely remain to be characterized. However, there is growing evidence that microRNAs are implicated in various diseases and illnesses. For instance, drosophila microRNAs have been shown to target genes involved in apoptosis, and B-cell chronic lymphocytic leukemia has been linked to the deletion of two microRNAs.
However, to date, the existence of microRNA encoded by mammalian viruses have not been reported. Identifying mammalian virus microRNAs, and, if they exist, understanding their biological function would facilitate the development of new anti-viral drugs.
Therefore, there is a need to identify viral microRNAs, and for new materials and methods that can help elucidate the function of known and future virus microRNAs.
Due to the ability of microRNAs to induce RNA degradation or repress translation of mRNA which encode important proteins, there is also a need for novel molecules that inhibit DNA virus microRNA-induced cleavage or translation repression of target mRNAs.


An electronically controlled disc brake with self-servo effect comprises a ramp plate provided with a brake pad for engagement with a brake disc, an actuator for applying a control force on the ramp plate substantially transverse to the brake disc, a ramp bridge, and rollers movable in ramps in surfaces facing each other of the ramp plate and the ramp bridge. The arrangement of these members is such that a movement of the ramp plate in the tangential direction of the brake disc will cause it to move towards or away from the brake disc.

It is well known in the art that a self-servo effect for a disc brake on a vehicle may be obtained by applying a brake pad against the rotating brake disc, where the brake pad is tangentially movable in relation to the brake disc over inclined ramp means or the like.
The problem with such designs has hitherto been the relatively poor controllability, especially if hydraulic or pneumatic brake actuators have been used and if a great self-servo effect was desired.
We now see an increasing use of electronically controlled brake actuators, especially electric motors, which greatly improve the controllability of the brakes.
The main object of the invention is to accomplish a disc brake of this kind, which is as simple, cheap and effective as possible, providing a low level of actuation energy, low weight and high reliability, and which may provide the desired self-servo effect in both rotation directions of the brake disc, which is of importance not only for service braking but also for parking braking.


The present invention discloses a power semiconductor component 1 having a special pressure contact system which is suitable, for example, for circuit-breakers, rectifiers, or the like in industrial drives. A pressure-equalizing element 9 in the form of a box 10, 15 with a flowable or plastically deformable medium 12 is inserted between a pressure plunger 7a and a power semiconductor 2. Because of the hydrostatic pressure in the box 10, an inhomogeneous pressure delivered at one side is passed on to the other side as a homogeneous pressure. A homogeneous pressure delivery can be achieved, even in the edge region of the pressure surfaces 11a, 11b, by means of an inlet camber of the lateral surface 13. The box 10, 15 preferably consists of copper or AlSiC, and the medium 12 of a liquid metal (Ga, Hg), a plastic metal (Pb, Al) or of metal balls (Cu) in silicone oil. The box can be arranged on one or both sides of one or more power semiconductors 2, and can also replace the molybdenum disks 3a, 3b or contact plates 4a, 4b.

1. Field of the Invention
The present invention relates to the field of power electronics. It proceeds from a power semiconductor component having pressure contact plungers according to the preamble of claim 1.
2. Discussion of Background
Power semiconductors for industrial, tractive and other applications frequently include power semiconductor components such as, for example, thyristors, GTOs (gate turn-off thyristors), MCTs (MOS-controlled thyristors), power diodes, IGBTs (insulated gate bipolar transistors) or MOSFETs (MOS-controlled field effect transistors), which are encapsulated in a housing having pressure contacts. Such pressure housings can include, for example, a large-area thyristor or a plurality of small-area MOS-controlled semiconductor chips.
Such a power semiconductor component is disclosed, for example, in U.S. Pat. No. 4,500,907. The typical design comprises a semiconductor wafer with metallized power contacts, contact plates bearing on both sides and two cylindrical metal plungers by means of which the arrangement is held together in a housing. The contact plates consist of molybdenum (Mo) or tungsten (W) having a coefficient of expansion matched to silicon. The metal plungers serve the purpose of making electric and thermal pressure contact with the power semiconductor and of dissipating heat to a heat sink. The required high contact pressures lead to the known problem that damaging excess pressures can occur in the semiconductor wafer at the edge of its contact surface with the rigid contact plate. It is proposed as a solution to mill in a groove, for example a rectangular, V-shaped or arcuate one, on the circumference of the metal plunger, in order in conjunction with homogeneous pressure loading from outside to achieve pressure relief at the edge side by elastic deformation of the groove.
Proposed in U.S. Pat. No. 5,539,220 is a flat pressure housing for several semiconductor elements arranged next to one another, in which the contacting and heat dissipation are provided by pressing on large-area, common electrode plates. Such a pressure contact housing is preferably fitted with several IGBT chips and a free-wheeling diode. Advantages of said design relate to improving the heat dissipation and eliminating the bond wires and their inductances. Thermoplastic or solder layers between the electrode plates and semiconductors, and matching the overall height of IGBTs and free-wheeling diodes are disclosed as measures for ensuring homogeneous contact pressure over all structural elements.
Further reaching problems owing to inhomogeneities in the contact pressure impressed from outside onto the components remain unsolved in both publications. This relates first and foremost to unevennesses in contact plates and nonuniformly acting clamping devices. If a contact plate or a clamping device is deformed, or should they become deformed in the course of time owing to a change in load, material fatigue or the like, the result is a nonuniform distribution of the contact pressure over individual or several power semiconductor surfaces. This can lead to local overheating and to the failure of a semiconductor element. In the case of GTOs, for example, one of the most frequent causes of failure is the deformation acquired by the contact plates and metal plungers during operation. Thus, 10 mm thick contact plates made from copper can have unevennesses of 100 .mu.m or more. Slight deformations of the contact plates already occur, however, when they are being tested before installation.

Power semiconductor component with a pressure-equalizing contact plate


An aqueous composition for cleaning contact lenses comprises an aliphatic monohydric alcohol, a surface active agent having cleaning action for contact lens deposits, and an abrasive agent.

This invention relates to a composition for cleaning contact lenses. The composition comprises an aliphatic monohydric alcohol, a surface active material having cleaning action for contact lens deposits, and an abrasive agent.
The tendency of contact lens materials to form deposits necessitates regular cleaning of the contact lenses. Deposits from the tear film include protein, lipid and mucin, and deposits from external sources include cosmetic deposits, such as from mascara or hair spray, or materials deposited when the lens is handled.
Enzymatic contact lens cleaners are frequently used to remove protein deposits, especially denatured proteins, particularly with hydrophilic soft contact lenses for which protein is the major deposit problem. However, enzymatic cleaners are not particularly effective for other types of deposits.
Surfactant contact lens cleaners, which employ a surface active agent having cleaning action, are used to remove lipid deposits, loosely bound protein deposits, and other deposits. Surfactant cleaners are used in conjunction with finger rubbing or other mechanical cleaning, followed by rinsing to remove the deposits. Surfactant cleaners are used for hard and soft contact lenses. Hard lenses include polymethylmethacrylate lenses and rigid gas permeable lenses formed of a silicon acrylate or a fluorosilicon acrylate polymer. Soft lenses include hydrophilic hydrogel lenses.
Various surfactant contact lens cleaners which employ an alcohol, such as ethanol or isopropanol, are known. A commercial product marketed by CIBA Vision (Atlanta, Ga., USA) as an "extra-strength" contact lens cleaner is MiraFlow.RTM. Extra-Strength Daily Cleaner. This cleaner includes, as principal active ingredients: isopropanol; poloxamer 407 (a polyoxyethylene, polyoxypropylene block copolymer such as available under the trade name Pluronic F-127); and an amphoteric imidazole surfactant. Similar compositions are disclosed in U.S. Pat. No. 4,046,706 (Krezanoski).
Additionally, U.S. Pat. No. 4,421,665 (Lloyd et al.) discloses alcohol-containing contact lens cleaning solutions comprising: a non-polar solvent in the form of cyclohexane and/or ethyl acetate, and optionally. trace amounts of chloroform; ethanol or isopropanol as a polar solvent; and a surfactant. The surfactant is preferably a nonionic surfactant, although dioctylsulfosuccinate is also disclosed. The patent discloses that the non-polar solvent is adapted to provide for enhanced solubility of lipids and lipoproteins, and the alcohol has the ability to dissolve fully the non-polar solvents and potentiate their anti-microbial activity. However, the use of non-polar solvents such as cyclohexane, ethyl acetate, and chloroform in a contact lens solution is undesirable in case the composition is not adequately rinsed from the lens.
A challenge is to develop alcohol-containing contact lens cleaning compositions which not only provide the desired cleaning efficacy, but which also are suitable for ophthalmic use and are less damaging to the lenses. Efforts to develop alcohol-containing contact lens cleaning compositions often lead to compositions which damage the lens; for example, use of the compositions in a cleaning regimen may result in scratching of the lens surfaces, or deterioration of the lens such that the power of the lens is changed.

Alcohol-containing abrasive composition for cleaning contact lenses


There is provided an article management system having a plurality of article management apparatus that are arranged at the respective process stage position in a production line and read information by RF tag readers from an article RF tag affixed to each of articles contained in a case and a case RF tag attached to each of the cases. A server connected to the respective article management apparatus for managing ID information on the articles, quantity of the articles, current process stage positions for each of the cases and other items. With this system, production management for the articles contained in the cases can be performed in a short time without being interrupted, even if some of the tags have become damaged and reading from the tags is impaired.

(1) Field of the Invention
The present invention relates to an article management system and article management apparatus that manage, for example, an article manufactured in an automated factory while it is moving from one process stage position to another.
(2) Description of Related Art
The Japanese patent application Kokai publication No. 2002-337827 discloses an apparatus that manages mail articles by reading ID information of individual mail articles through an antenna of an RF ID tag interrogator that is made to approach or contact to a carrier case that contains plural mail articles each of which carries an RF tag storing ID information.
In this apparatus, if an RF tag attached to a mail article is damaged and becomes unreadable, this RF tag needs to be replaced with a reissued RF tag or to be treated separately from other mail article(s) carrying readable RF tags. It takes a lot of time to reissue a new tag or to manage only mail article(s) carrying unreadable RF tag(s) differently from others.

Article management system and article management apparatus


A continuously adjustable collet chuck assembly comprising: a) a collet chuck body, b) an adjustment ring positioned within the collet chuck body, the adjustment ring including fixed key sized and configured to engage a keyway on a collet, and c) a locking member positioned in the collet chuck body to exert a force on the ring, the force having a substantial component in the axial direction to prevent rotation of the ring. The axial force securely fixes the adjustment ring, and therefore the collet, at any rotational position.

A collet (or collet chuck) is a holding device that forms a collar around, and exerts a force on, a work piece (typically a rod-shaped object). A collet assembly often includes collet segments positioned in a collet chuck body, to center and grip the work piece in a lathe. Typically the collet has a slotted clamping sleeve with a conical portion to clamp a work piece by forcing the collet segments radially in or radially out. The collet fits into a collet chuck which is attached to the face of the spindle or a work surface. One advantage of collets is the precision with which they hold the work piece due to their fixed dimensions.
Collet chucks are known in which a locking screw provides rotational adjustment in discrete increments, for example, by rotating the collet to one or more discrete, regularly spaced stops positioned around the collet chucks circumference. The adjustments are possible in discrete increments due to a key, e.g., a dog point screw, which engages the collet keyway. By relying on discrete stops, such collets are limited to discrete stop positions. Once the rotational position has been fixed relative to a locking screw, it is typically necessary to further rotate the collet in one direction or the other, to tighten it or back it out. Since adjustment is limited to discrete positions around the circumference of the collet chuck body, it is not possible to control the rotational position of the collet.