A decorative wall display assembly comprises a frame (14) that has the appearance of a conventional window frame, in combination with a glazing sheet (16), and a conventional mirror (18) mounted toward the rear of the frame, and a space (19) between the glazing sheet (16) and the mirror (18). The overall effect is that the assembly gives the illusory appearance of being a window, and accordingly gives the room in which it is used the appearance of being larger than it actually is, while being flush mounted on the wall as would be a picture or other conventional decorative display assembly.

Windows serve a variety of functions. Windows provide a view of the outdoor surroundings, outside the building in which the window is used. A window can also give the perception of increasing the size of the room in which it is used.
But windows have the disadvantage that they can only be used on an outer wall of the building. They cannot be used on an interior wall. Windows also have the disadvantage that they are conduits for transmitting a greater amount of heat than is transmitted by a typical insulated exterior wall, whether by conduction, convention, or radiation, thereby increasing winter heat loads and summer air conditioning loads.
On the other hand, a window can provide natural lighting and passive solar heat, and can have beneficial psychological and other effects on people who can view the outdoors through a window.
It is known to attempt to create an illusion of an outdoor atmosphere in a room by placing an assemblage of large color pictures, generally comprising a mural, of summer gardens or winter scenes, namely the current or desired season, of substantially the full height and length of the room. Such assemblages are intended to simulate what might be the view through a large window. The pictures can be made of modular panels assembled close together, to simulate the appearance of an outdoors environment. A typical such modular picture assembly is shown in U.S. Pat. No. 3,447,274 Davidson.
It is also known to use wall decorations that operate as decorative lighting, and which have some of the appearance characteristics of a window. Thus, U.S. Pat. No. 5,265,360 Reiss et al teaches a device having some appearance characteristics of a window. It includes what appears to be a front window sash, and a rearwardly extending enclosure, wherein the enclosure contains decorated panels 50, 56 disposed at angles to the front of the device, to give a three dimensional effect to the appearance of the display inside the device. Lights 72 behind the decorative panels 50, 56 illuminate the decorative panels 50, 56 to provide the desired affect.
U.S. Pat. No. 5,251,392 McManigal teaches a wall mounted device which operates more like a conventional light fixture. A fluorescent light bulb 35 shines light through a translucent diffusion panel assembly, which can include a decorative layer 25. A reflector 36 reflects the rearwardly-directed component of the light toward the diffusion panel assembly.
U.S. Pat. No. 4,139,955 Reiback teaches a decorative lighting device which creates the illusion of depth in the device by using a partially silvered front glazing sheet, which has a transmission factor of 0.10-0.50, in combination with a mirror on the rear wall of the device. Interior light bulbs provide the internally generated light which is necessary for the operation of the display. The front glazing sheet, because of its low transmission factor, reflects at least 50% of the incident light back to the mirror. The mirror then reflects the light back to the front panel. The light follows a path of recurring/multiple reflections, between the front panel and the mirror, for several round trips until that component of the light which has not been transmitted through the front glazing sheet is extinguished.
The above references have none of the window-like characteristics related to a dynamically changing view dependent on the viewer's movements relative to the wall display assembly. Thus, to the extent these references address depth perception, they represent views generated predominantly within the confines of the wall display assembly, as opposed to a conventional window, which represents views generated by light from objects disposed outside the window assembly, where the images seen by the viewer change constantly as the viewer moves about with respect to the window, and wherein the general make-up of the views seen by the viewer is outside the control of the producer of the window.
It is an object of the invention to provide a decorative wall display assembly wherein the views seen by a viewer are generated by light from objects disposed outside the wall display assembly.
It is another object of the invention to have the decorative wall display assembly free from light sources or lamps.
It is another object of the invention to provide a decorative wall display assembly wherein the general make-up of the views seen by the viewer is outside the control of the producer of the wall display assembly.
It is a further object to provide such a decorative wall display assembly that has appearance characteristics of a conventional window in a wall, including a transparent front glazing sheet, a rearwardly disposed mirror reflecting light through the front glazing sheet, and a space between the front glazing sheet and the rearwardly disposed mirror, whereby light images reflected by the mirror are transmitted to and through the glazing sheet without appreciable scattering of the light as such light might be scattered by passing it through a translucent sheet.
It is still another object to provide such a decorative wall display assembly which gives the illusion of being deeper than the actual depth of the assembly as measured between the mirror and the front of the frame, whereby the apparent size of the room in which the display assembly is used is accordingly increased.
It is yet another object to provide such a decorative wall display assembly which provides internal structural support between the glazing sheet and the mirror, across at least one transverse dimension of the assembly.
It is an object of the invention to provide a decorative wall display assembly wherein the mirror comprises an opaque mirror transmitting substantially no light through the rear side thereof.
Still another object is to provide such a decorative wall display assembly wherein the mirror and glazing sheet can readily be removed from the assembly for cleaning or replacement of elements of the assembly.
Yet another object is to provide such a decorative wall display assembly wherein front edges of the mirror and the glazing sheet are separately and individually abutted against a common enclosing frame.
Finally, it is an object to provide such a decorative wall display assembly wherein front edges of the mirror, the glazing sheet, and an optional intervening spacer are all separately and individually abutted against a common enclosing frame, and substantially against each other such that front support of each the mirror, the glazing sheet, and the spacer is generally independent of the front support of the others of the mirror, the glazing sheet and the spacer, and wherein at least partial rear support of the glazing sheet is provided by the spacer and at least partial rear support of the spacer is provided by the mirror.


A hydraulic door opening mechanism for overhead bi-fold doors is herein disclosed. The door opening mechanism mounts a hydraulic pump, pressure reservoir, valve manifold, and a hydraulic motor or cylinder on a first door panel. The door opening mechanism is pre-assembled with the doorframe prior to mounting the door in the door opening.

Bi-fold doors have long been used wherever high clearance is needed in a doorway. Bi-fold doors are commonly used in agricultural, industrial, and aviation settings in lieu of the more common track mounted overhead door, as the bi-fold door does not require the same headroom as does the track mounted overhead door, the track mounting system being unnecessary for the bi-fold door.
Opening mechanisms for prior art bi-fold doors commonly use electric motors as the source of the forces needed to open the door. However, electric motors are somewhat limited in their output, the larger motors being somewhat heavy for the application. In addition, it is difficult to operate an electric motor in at varying speeds without losing a significant portion of the power output of the motor. Finally, electric motors are relatively slow in that the amount of torque that they put out allows the typical bi-fold door to be opened only in a steady state, slow manner.
It has been found, however, that a small, self-contained hydraulic door opening mechanism may be used in place of the standard electric motor to overcome the problems inherent in electric motors under such conditions.
It is an objective of the present invention to adapt a hydraulic motor and/or cylinder to open and close a bi-fold door. It is a further object of the present invention to provide a door opening mechanism that can quickly and quietly open a bi-fold door and also actuate automatic locking systems incorporated into the door. It is yet another object of the present invention to simplify the installation of a bi-fold door by pre-assembling the door with its door opening mechanism at the time of manufacture, leaving only the task of mounting the door on its hinges in the door opening and connecting electric power to the door opening mechanism. A final object of the present invention is to provide a hydraulically operated door opening mechanism that may be controlled through a hard-wired control circuit or wirelessly using a suitable transmitter and receiver.
These and other objects, aspects, features and advantages of the present invention will become more fully apparent upon careful consideration of the following Detailed Description of the Invention and the accompanying Drawings, which may be disproportionate for ease of understanding, wherein like structure and steps are referenced generally by corresponding numerals and indicators.
All figures are drawn for ease of explanation of the basic teachings of the present invention only; the extensions of the figures with respect to number, position, relationship, and dimensions of the parts to form the preferred embodiment will be explained or will be within the skill of the art after the following teachings of the present invention have been read and understood. Further, the exact dimensions and dimensional proportions to conform to specific force, weight, strength, and similar requirements will likewise be within the skill of the art after the following teachings of the present invention have been read and understood.
Where used in the various figures of the drawings, the same numerals designate the same or similar parts. Furthermore, when the terms "top," "bottom," "upper," "lower," "first," "second," "inside," "outside," and similar terms are used herein, it should be understood that these terms have reference only to the structure shown in the drawings as it would appear to a person viewing the drawings and are utilized only to facilitate describing the invention.

Hydraulic door opening mechanism and method of installing a bi-fold door


A method of producing a porous carbon composite fibrous mats formed of a network of carbon fibers incorporated with porous carbon particles. The method includes electrospinning a polymer solution to form a porous layer of polymeric fibers and the polymeric fibers are doped with a precursor of conductive metal particles, wherein the polymer solution includes a polymer and the precursor of the conductive metal particles, electrospraying a metal organic framework suspension onto the porous layer of polymeric fibers, wherein the metal organic framework suspension includes metal organic framework particles, repeating the electrospinning and electrospraying in an alternating manner to form a porous network of polymeric fibers incorporated with the metal organic framework particles, and heating the porous network of polymeric fibers incorporated with the metal organic framework particles to form the porous carbon composite fibrous mats. The porous carbon composite fibrous mats and its applications thereof are also disclosed herein.

A large number of small organic compounds (SOCs) can be detected in aquatic environments. Such pollutants, especially those associated with antibiotics and various toxic organic compounds in urban waters have generated worldwide public health concerns as they tend to be ubiquitous, persistent, and may disrupt the endocrine systems of aquatic organisms.
Conventional water treatment technologies may not be sufficiently effective for their removal and/or degradation. Other treatment technologies, such as reverse osmosis (RO) or advanced oxidation processes (AOPs), may be effective only to a certain extent, and suffer from intensive energy requirement (1-10 kW hr/m3). In addition, the operational efficacy of RO and AOPs tend to drop significantly in the presence of natural organic matter due to membrane fouling and strong oxidant scavenging. Addressing these limitations may require innovative treatment technologies that effectively remove these contaminants from drinking water at lower cost and less energy.
Recently, a flow-through electrochemical filtration system which employs carbon nanotube (CNT) and/or graphene membranes as electrode materials has been developed to remove organic contaminants in water through physical absorption and electrooxidation. The strategy is based on an electrochemical approach to reduce filter fouling rates by in situ foulant destruction, which in turn reduces the frequency of physical and/or chemical cleanings needed to maintain optimal permeability. The electrochemical filtration system may be advantageous compared to batch electrochemical oxidation processes due to the liquid flow through the electrode resulting in convection-enhanced transfer of the target molecule to the electrode surface. The energy consumption for this electrochemical filter was calculated to be 0.7 kW hr/kg COD and/or 0.084 kW hr/m3, which are much lower than electrochemical oxidation processes (4-100 kW hr/kg COD and/or 1-10 kW hr/m3). However, certain technological issues may have limited the scaling up of such flow-through electrochemical filtration system.
Firstly, the properties of graphene and/or CNT macrostructures in the electrode membrane, such as electrical conductivity and mechanical strength, remain far lower than the properties of individual graphene or CNT. The CNT membrane may be fragile, easily torn apart and fractured. Moreover, agglomeration of CNTs was observed after an extended period of operation. Secondly, the potential release of the fragile graphene/CNT from the filtration system into water bodies causes serious environmental and potential human health risks because of its aerodynamic shape. Thirdly, although mass production of both graphene and CNT have made significant progress, the high cost of these materials restricts commercialization of this technology. Therefore, it remains a challenge to develop a scalable, low-cost and mechanically stable electrochemical filter for aqueous organic contaminants adsorption and degradation, which may at least overcome the drawbacks of the current CNT and/or graphene electrochemical filter.
There is thus a need to provide for a solution that addresses one or more of the limitations mentioned above. The solution should at least provide for a method of producing a porous carbon composite fibrous mats.

Free-standing porous carbon fibrous mats and applications thereof

Agency for Science, Technology and Research


This invention provides an improvement to magnetostrictive torque sensors giving an output signal indicative of the torque applied about the axis of a shaft where the shaft includes a magnetostrictive ring, attached to or formed as a part of the shaft so that the torque applied to the shaft is applied proportionally to the ring, and the ring consists essentially of novel composites consisting of magnetically hard and highly magnetostrictive rare earth (iron).sub.2 binary compound particles embedded in Cu, Fe, or other suitable metals.

Measurement of the torque applied to a rotating shaft has long been of considerable industrial interest. In particular, a reliable, accurate, and inexpensive torque sensor is crucial to the development of electric power steering systems for automotive vehicles. The specifications of U.S. Pat. Nos. 4,760,745, 4,882,936, 4,896,544, 5,351,555 and 5,465,627, issued to Ivan J. Garshelis, describe previous methods and materials for measuring torque.
The '555 patent and its divisional case, the '627 patent, describe an arrangement for a torque sensor (see FIG. 1 of either patent) aimed for use in an automotive power steering system. It is a non-contact device comprising a ring of magnetic, magnetoelastic material mounted to the shaft whose torque is to be measured. While Garshelis uses the term "magnetoelastic" to properly characterize the effect of elastic torque strain on the magnetization of his torque sensor, this specification uses the term "magnetostrictive" as appropriate to characterize the material that senses the applied torque.
A vital feature of the sensor is confinement of the ring's magnetization to the circumferential direction when no torque is applied to the shaft. When torque is applied to the shaft and conveyed to the ring, the magnetization of the ring tilts away from the circumferential direction, producing an axial component of the magnetization whose magnitude and sign depend on the size and rotational sense of the torque. The axial magnetization generates a magnetic field external to the ring which is measured by a secondary detector, i.e., a magnetic field sensor. In the embodiment of U.S. Pat. No. 5,465,627, the magnetostrictive ring is formed of nickel maraging steel and is mechanically attached to the shaft by a vigorous force fit. Besides providing for attachment, the large hoop stress .sigma..sub.h thus created in the ring plays the crucial role of generating an effective uniaxial anisotropy K.sub.u which keeps the ring magnetization in the circumferential direction in the absence of torque. If the magnetostriction of the ring is assumed to be isotropic, K.sub.u is equal to 3.lambda..sigma..sub.h /2, where .lambda. is the isotropic magnetostriction constant of the ring material. For maraging steel .lambda..about.30 ppm (cf. I. J. Garshelis, "A Torque Transducer Utilizing a Circularly Polarized Ring", IEEE Trans. Magn. 28, 2202 (1992), hereinafter, Garshelis Paper), a relatively small value, and .sigma..sub.h must be on the order of the yield strength of the ring (655 MPa for T-250 maraging steel) to furnish sufficiently large K.sub.u.
This combination has several major disadvantages, including the following. First, generating large and uniform .sigma..sub.h requires large press forces to mate carefully machined matching tapers on the shaft outside diameter and the ring inside diameter. Unless precisely done, this attachment procedure can easily generate axial or radial (i.e., non-hoop) stresses which can cause substantial non-uniformity of the ring magnetization in the absence of torque. Second, with .sigma..sub.h near the yield strength of maraging steel, the coercivity in the circumferential direction is only .about.5 Oe (FIG. 5 of Garshelis Paper), making the output of the device very susceptible to degradation by small stray magnetic fields or residual stresses. Any disturbance to the circumferential magnetization in the untorqued state can result in loss of sensitivity and/or generation of a spurious torque signal. Third, the axial magnetization with torque applied is proportional to .lambda. according to the model of the Garshelis Paper, and the small value of .lambda. makes for correspondingly small output signal.

Magnetostrictive torque sensor utilizing RFe.sub.2 -based composite materials


A balancing apparatus which is capable of compensating for an eccentricity generated even when a rotating member is rotated at a velocity that is lower than a critical velocity thereof. Preferably, the balancing apparatus is disposed, in relation with the rotating member, at a position spaced apart from a rotation center of the rotating member by a predetermined distance. The balancing apparatus includes a plurality of balls for compensating for an eccentricity, a hardening agent for fixing the balls under the condition that the eccentricity is compensated by the balls, and a keeping member for insertion of the balls and the hardening agent.

1. Field of the Invention
The present invention relates to a balancing apparatus utilizing an ultraviolet hardening agent and a ball for preventing a rotating member that is rotated at a super high velocity such as a VTR head driving apparatus, a laser scanning unit and the like, from being vibrated or oscillated due to an imbalance generated by inequality in the material and the shape of the rotating member.
2. Description of the Related Art
As widely known, a balancing apparatus is provided to remove an imbalance generated due to inequality of the material density of and incomplete circular shape of a shaft that is rotated at a super high velocity. The balancing apparatus includes a ring-shaped hoop installed on the shaft, a ball freely moved in the hoop and an operational fluid introduced into the hoop, for preventing the ball from being suddenly moved and removing a minute rotational imbalance. When the shaft is rotated at a velocity higher than a critical velocity thereof, the ball and the fluid of the balancing apparatus are automatically located at a position where the eccentricity is compensated. The critical velocity is a velocity when the eccentricity begins to be compensated for by the ball and the operational fluid.
A conventional VTR head driving apparatus including such a balancing apparatus for removing such as an imbalance will be described with reference to FIG. 1 hereinafter.
FIG. 1 shows an upper drum 20 which a head tip 10 for reading audio and video signals written on a VTR tape is fixed to.
The upper drum 20 is connected to a rotation power generating unit (not shown). A ring-shaped groove 30 having a little smaller diameter than the upper drum 20 is formed in an upper surface of the upper drum 20. A predetermined number of balls 40 that are solid balancers having a predetermined density are inserted into the groove 30. A fluid 50 that is a liquid balancer having a predetermined density is also introduced into the groove 30. The fluid 50 prevents the balls 40 from being suddenly moved and adjusts a minute imbalance generated on the upper drum 20.
The amount of the fluid 50 introduced into the groove 30 is, preferably, ranged from 1/3 to 1/2 of the ring-shaped groove 30.
An opening of the ring-shaped groove 30 including the balls 40 and the fluid 50 is closed by a cover 60 for preventing the balls 40 and the fluid 50 from flying out of the groove 30. The cover 60 has a shape that is similar to and larger than the opening of the groove 30.
The operation of the conventional balancing apparatus will be described hereinafter.
First, when power is supplied to a rotation power generating unit (not shown), the upper drum 20 begins to be rotated in association with a shaft A connected to the rotation power generating unit. The rotations per minute of the upper drum 20 increase according to an increase in the angular acceleration of the rotation power generating unit. After a predetermined amount of time, the upper drum 20 is rotated at a constant velocity ranging from 4000 to 9000 R.P.M.
However accurately and precisely the upper drum 20 is fabricated, when the upper drum 20 is rotated at a super high velocity, several milligrams of imbalance is inevitably generated on the upper drum 20 due to a minute asymmetry in the shape of and inequality of the material density of the upper drum 20. The imbalance is compensated for by the balls 40 and the fluid 50 of the balancing apparatus formed in the upper drum 20, in such a manner that the balls 40 and the fluid 50 are moved to a position that is symmetrical to a position that the imbalance is generated. This results in an enhanced rotation stability of the upper drum 20.
The balls 40 and the fluid 50 of the conventional balancing apparatus are capable of compensating for only the imbalance generated when the rotating member, i.e. the upper drum 20, is rotated at a velocity that is higher than a critical velocity of the upper drum 20. Accordingly, the imbalance compensating ability of the conventional balancing apparatus is considerably reduced when the rotating member is rotated at a velocity that is lower than the critical velocity. As a result, the performance and the life of the rotating member may be also reduced because the rotating member may be vibrated and oscillated by the rolling movement of the balls until a rotating velocity of the rotating member reaches the critical velocity of the rotating member.


A multiprocessor system has a plurality of CPUs with respective local buses, and a memory which stores a plurality of programs to be executed by the CPUs and is connected to a common bus which can be accessed via the local buses, each local bus being connected to a CPU identification register which stores an identification value for identifying the corresponding CPU. When a program which is specific to a CPU is to be executed by that CPU, the corresponding identification value is read out from the identification register of the CPU and is judged, and branching to the appropriate program is performed based on the judgement result.

1. Field of Technology
The present invention relates to a multiprocessor computer system having a plurality of CPUs (Central Processing Units) which execute respective programs stored in a single memory.
2. Description of Prior Art
Computer systems are well known which are of multiprocessor configuration, having a plurality of CPUs to handle processing for various peripheral circuits and devices, to thereby achieve increased performance. With such a multiprocessor system however, it has been generally necessary in the prior art that respective control programs which are executed by the CPUs are stored in respectively different memories, each connected to a dedicated set of buses, i.e., with each memory only being accessible by a corresponding one of the CPUs.
However the size of a control program which is to be executed by a CPU of a computer system cannot be definitely known until development of the system has been completed. Hence, since the memory size (i.e., amount of memory capacity) that will be required for the control program is not accurately known during development, it is necessary to provide an excess amount of memory capacity. Thus in the case of a multiprocessor system, in which the various CPUs execute respectively different control programs which are stored in respective memories, the overall amount of excess memory capacity will become large.
To overcome this problem, it has been proposed in the prior art that all of the control programs of a multiprocessor system be stored in a single program memory. Such a system is disclosed for example in Japanese Patent Hei 5-289987. With that invention, the respective program memory for two CPUs is connected to respective local buses of the two CPUs. A bus access arbitration circuit performs control of data memory such as to enable access by both of the CPUs.
However since the CPUs execute respectively different processing, they must access respectively different memory areas containing the programs which they execute. The above prior art method of enabling access to data memory does not enable accessing of program memory, stored in a single memory unit (i.e., having only one set of memory addresses) by a plurality of CPUs. Thus, that prior art method cannot be directly applied to the problem of a multi-CPU system in which each of respective control programs which are executed by the various CPUs are stored together in a single memory..
Furthermore if each of the CPUs in such a multiprocessor system are identical devices (i.e., the same model of processor, produced by the same manufacturer) then it can be expected that the respective interrupt vectors that are assigned to various interrupt signals will be identical for each of the CPUs. Hence in the prior art, if all of the programs and routines which are executed by the various CPUs were to be stored in a single memory, it would be impossible for the plurality of CPUs to execute respectively different forms of interrupt handler processing in response to the any specific interrupt signal.
This can be understood by considering for example a very simple case in which each CPU automatically specifies the same interrupt vector in response to an interrupt signal which has been assigned the level 1 (execution priority) status. In that case, if a plurality of various types of interrupt might be assigned the level 1 status, then even if the corresponding interrupt signals were to be supplied to respectively different ones of the plurality of CPUs, all of the level 1 interrupts would have to be processed by the same interrupt handler routine. This is a serious disadvantage.
The term "interrupt vector" is used herein with the general significance of information which is generated in some manner when an interrupt signal is supplied to a CPU, which directs the CPU operation to branch to the starting address of a specific interrupt handler program. The term "bus" as used herein within the terms "local bus" and "common bus" is to be understood as signifying a set of buses which includes at least an address bus and data bus.

Multiprocessor system having a plurality of control programs stored in a continuous range of addresses of a common memory and having identification registers each corresponding to a processor and containing data used in deriving a starting address of a CPU-linked interrupt handler program to be executed by the corresponding processor


The present invention relates to a device for degassing molten steel, comprising an evacuation vessel (2), a pouring ladle (3), an inlet nozzle (4) with a gas purging device (5) arranged therein, and a discharge nozzle (1), wherein at its lower edge (9), in a radial direction in relation to the central longitudinal axis (6) of the discharge nozzle (1), the discharge nozzle (1) has at least one bore (7).

The present invention relates to a device for degassing molten steel with an improved outlet nozzle. In particular, the present invention relates to a special shape of an outlet nozzle for avoiding local dead water regions in a steel casting ladle. The present invention further relates to a method for degassing liquid steel with the improved outlet nozzle.
The method for degassing liquid steel is an RH-method (Ruhrstahl-Heraeus method). In the RH-method, the liquid steel is conveyed from a casting ladle in a riser pipe into an evacuation vessel. A conveying gas, in particular argon, is introduced into the riser pipe above the level of the steel bath. The argon flow introduced into the riser pipe through several nozzles, disintegrates into a plurality of argon bubbles which rise in the immediate vicinity of the wall. The conveyance of the liquid steel is facilitated by the volume enlargement because of argon in the riser pipe and by the pressure difference between the outer air pressure and the negative pressure in the evacuation vessel. The argon bubbles entrain the molten steel and ensure a uniform circulation of the molten steel. The partial pressure is simultaneously lowered and the decarburization reaction is accelerated. The steel taken into the evacuation vessel is sprayed. As a result, a significant surface increase and a good degassing of the liquid steel occur.
Oxygen, which during the entire treatment time is taken in simultaneously and is, among others, supplied from the slag, leads to the formation of carbon monoxide (CO). CO is degassed in the vacuum vessel, so that the desired decarburization is achieved. The fine decarburization to values which are as low as possible can be optimized by oxygen which is additionally blown in. A high circulating speed of the molten steel and, thus, an increase of the conveying gas flow and an increase of the nozzle diameter of the vacuum plant, lead to a faster decarburizing sequence.
DE 19511640 C1 discloses a nozzle for a degassing vessel with a refractory lining and a gas rinsing device with several ducts arranged in the lining. The ducts are distributed over the circumference of the nozzle and extend, in relation to the center longitudinal axis of the nozzle, through the refractory lining in a radial direction. The ducts can be connected at the outer side to at least one gas supply line.
For forming an almost continuous gas veil, the ducts are arranged in close sequence circumferentially along the inner wall of the nozzle. A uniform flow of liquid steel is achieved up to and into the vacuum vessel. The gas supply which is distributed over the entire circumference facilitates, preferably through fine bubbles, an especially fine distribution of the treatment gas with a simultaneously significantly increased reaction volume between treatment gas and molten steel. In this manner, a higher and faster decarburizing output is achieved, so that smaller quantities of reduction media are necessary.
JP 6299227 A discloses a method for manufacturing steel with very low carbon content by means of a degassing device, wherein the inlet nozzle is positioned such that the distance between the axis of the inlet nozzle and the axis of the metal bath is at least 10% of the inner diameter of the metal bath.
JP 1198418 A discloses a device and a method for vacuum degassing of molten steel, wherein gas is introduced into the inlet nozzle and the outlet nozzle, and the function of the nozzle can be alternated.
JP 57200514 A discloses a method for degassing molten steel, wherein the degassing effect is improved by degassing an RH-vacuum apparatus, in which an inert gas is blown into a molten steel vessel from the bottom.
JP 3271315 A discloses an RH-vacuum decarburizing method of noble steel, wherein degassing and decarburizing are achieved in a short time and the chromium loss is reduced. The result is achieved by using steel having a low silicon content and by repeated degassing and decarburizing procedures with an RH-vacuum vessel.
JP 2173204 A discloses a vacuum vessel for an RH degassing device, wherein an ultrasound oscillator is mounted at a contact point with the liquid steel in the vacuum vessel, for destroying bubbles which are produced by the blowing in of gas, and for improving the reaction surface at the phase reaction.
JP 11158536 A discloses a method for melting steel having a very low carbon content, wherein an inert gas is blown through the inlet pipe below the added aluminum into the vessel at the outlet nozzle for circulation after decarburizing.
JP 3107412 A discloses a method for manufacturing steel with a very low carbon content, wherein during decarburizing, argon is blown simultaneously into the inlet as well as the outlet pipe.
It has been found, and is confirmed by numeric simulations, that in the steel casting ladle of an RH plant local flow regions, so-called dead water regions, are formed which are mixed relatively late, only after about two minutes, with the remaining molten steel.
The devices and methods known in the prior art have the disadvantage that dead water regions are formed in the steel casting ladle which increase the homogenization time of the molten steel.
A dead water region is usually formed between the outlet nozzle and the refractory wall of the casting ladle. Through the downwardly directed jet of molten steel from the outlet nozzle, a small quantity of material is taken in from the direct surroundings around the outlet nozzle. Consequently, because of the delayed homogenization, the carbon concentration remains altogether at a high level at this location. The dead water region mixes poorly with the remaining molten steel because the average flow velocity is low. Because of the low exchanges of mass, pulse and energy between the dead water region with high carbon concentration and the remaining molten steel with low carbon concentration, the molten steel in the ladle must be frequently circulated until the desired final carbon content is achieved. Since the molten steel in the ladle must circulate frequently, the treatment time is long.

Device for degassing molten steel with an improved discharge nozzle


A controller of a power storage system includes a voltage measuring device configured to be electrically coupled to at least one cell and to generate first voltage data, the first voltage data comprising a first voltage value and a first voltage measurement time of a voltage of the at least one cell, and a current measuring device configured to be electrically coupled to the at least one cell and to generate first current data, the first current data comprising a first current value and a first current measurement time of a current through the at least one cell, the first voltage measurement time corresponding to the first current measurement time in a first measuring period, a battery management system configured to generate a clock signal transmitted to the voltage measuring device and the current measuring device to synchronize the first voltage data and the first current data in a first transmission period of the first measuring period.

(a) Field
Aspects of embodiments of the present invention relate to a battery management system.
(b) Description of the Related Art
In a power storage system, the battery may be iteratively charged and discharged during a short period of time. In order to calculate an accurate state of charge SOC (e.g., relative state of charge (RSOC)) in an environment in which charging and discharging are iteratively performed during a short period of time, a cell voltage and a current amount should be continuously measured with a short measuring period. A measured voltage and a measured current respectively measured by a voltage sensor and a current sensor are transmitted to a processor that calculates the SOC. The measured voltage and the measured current may experience a transmission delay or a transmission error during a transmission process, and, accordingly, the measured voltage and the measured current might not be easily synchronized.

Battery management system and method for synchronizing voltage and current of battery


A testing device is disclosed including a plurality of elastic members, a plurality of elastic terminals, and a plurality of terminal boards. Each elastic member is provided with an arc-shaped elastic deformation portion, at least one elastic terminal is arranged as one set and is clamped on one elastic member with an inner arc of the elastic deformation portion. Each terminal board is provided with a recess for accommodating one of the elastic members, the recess is provided with at least one arc-shaped groove each matched with a respective elastic terminal, an outer arc of the elastic deformation portion is embedded in a respective arc-shaped groove, each arc-shaped groove has an upper end extending to an upper surface of the terminal board, and a lower end extending to a lower surface of the terminal board.

For a testing fixture used for testing a chip, a connector or other PCBs (Printed Circuit Boards), electric signal transmission is implemented by using a spring probe or an elastic terminal in a complex shape. The spring probe has a spring contact member in its internal mechanical structure, which may form a multi-point contact inside the probe, resulting in multiple contact resistances. Addition of the multiple contact resistances leads to a relatively large total resistance, which will also be increased especially with the wear of the contact after the probe has been used for a period of time. In addition, a coil spring is used to provide an elastic force for the spring probe, and a shape of a coil structure forms an impedance or interference to an electric signal, which affects and weakens the transmission of an electric signal strength. The existing elastic terminal has a complex S shape, with elastic force being provided by a laminated rotating structure similar to a spring structure, and this shape also has various impedances or interferences in electrical performance, which affects and weakens the transmission of the electric signal strength. With continuous improvement of the current electrical signal communication technology, requirements on resistance value and interference for the existing conductor is becoming higher and higher, and the spring probe and the elastic terminal in the complex S shape cannot meet the requirements of electrical signal communication.

QUANWISE MICROELECTRONICS (ZHUHAI) CO., LTD.


A device that accepts input of asynchronously-arriving variable-length optical packets transmitted over a plurality of lightpaths, and outputs same to a single optical path, comprising: in order to prevent the optical packets from overlapping in the output lightpath, a controller that uses the delay times of the delay elements and the optical packet length and arrival gap time thus read to determine by computation the delay element used for temporary storage, where a plurality of stages of processors is provided. Thus, the processing required to determine the delay time is performed by parallel processing with the results of processing the prefix-sum operation used in parallel pipelined processing along with the queue length, optical packet length and arrival gap time of the buffering device.

1. Field of the Invention
The present invention relates to an optical packet buffering device that uses optical circuits that have limited buffer capacity or data holding time, in order to guide a plurality of optical packets such that they are not overlapped toward one lightpath, and to the buffering method thereof.
2. Description of the Prior Art
With advances in optical communications technology able to transfer large amounts of information, in order to achieve even higher levels of throughput, optical technology is being introduced into not only the transmission paths but also into optical packet switching. Typically in optical packet switching, an optical packet transfer process is performed and an optical packet switch is used therein. The functions of such an optical packet switch can be divided into the five categories of: (1) label lookup, (2) switching, (3) buffer management, (4) buffering and (5) routing. Typically, an optical packet switch that implements functions (2) and (4) above optically is called an optical packet switch. This consists of optical switches and optical buffers, having broadband characteristics because the data is transferred while remaining as an optical signal.
In addition, by improving (3) buffer management above, it is possible to make further improvements to the throughput of an optical packet switch. Logic circuits based on electronic circuits had conventionally been used for this (3) buffer management. This is because practical optical logic circuits had not been available.
One of the objects of buffer management is to prevent the collision of optical packets. In an optical packet switching network, if a plurality of optical packets should arrive simultaneously at an optical packet switch, then the optical packets are stored in different positions of buffers to avoid collision. FIG. 1 shows a queue that represents the state of a buffer. For example, in the current Internet technology, packet transmission is done without performing priority control as shown in FIG. 1. The packets that arrive at the packet switch are stored in the buffer if space is available regardless of priority.
In addition, an optical packet switch does not use a semiconductor memory, which is often used in the buffer described above. Since an optical packet switch does not use semiconductor memory for buffering, a method of implementing optical buffer must be used as reported in the literature such as Document 1: K. Habara et al., "Development of a large-capacity photonic packet switch using wavelength routing techniques," Technical Report of IEICE, SSE99-149, February 2000, and Document 2: David K. Hunter and Meow C. Chia and Ivan Andonovic, "Buffering in Optical Packet Switches," IEEE/OSA Journal of Lightwave Technology, Vol. 16, No. 12, pp. 2081-2094, December 1998.
Previously known optical buffers have used a plurality of optical fibers of different lengths. These are optical delay elements with different delay times, so the optical packets are stored for the length of this delay time. A method of controlling the optical packets that are allocated to these optical delay lines to be able to avoid collision is known. At this time, it is not possible to extract an optical packet at an arbitrary time, so it is necessary to prevent the collision of optical packets at the time of output, and for this reason, some sort of buffer management technique must be used at the time of input to the optical buffer, thereby controlling the delay times,
In addition, as examples of the conventional optical packet switch architecture, we shall present N-input×N-output optical packet switches with configurations consisting of N 1-input×N-output buffer-less optical switches and N N-input×1-output buffers. The respective 1-input×N-output switches and N-input×1-output buffers are connected in a substantially lattice-type manner. In order to configure the above 1-input×N-output optical packet switches as N-input×N-output optical packet switches that exhibit adequate performance, it is also necessary to process a plurality of optical packets that arrive simultaneously in a sufficiently short period of time, and thus it is important to adopt a buffer management scheme requiring a small amount of computation.
The above optical packet switches are constituted using optical switches. Known optical switches that can be used in this application include: mechanical optical switches that use drive coils as shown in the schematic diagram in FIG. 3(a), optical switches that use optical semiconductor devices as shown in the block diagram in FIG. 3(b) and Mach-Zehnder type optical switches (not shown).
With the above 1-input×N-output buffer-less optical switches, it is possible to perform high-speed label lookup by means of an optical label lookup function as recited in Document 4: N. Wada, H. Harai, W. Chujo, and F. Kubota, "Photonic packet routing based on ultiwavelength label switching using fiber Bragg gratings," ECOC 2000 Technical Digest (26th European Conference on Optical Communication), vol. 4 (No. 10.4.6), pp. 71-72, September 2000. As a result, N-input×N-output optical packet switches exhibit high node throughput. However, in order to avoid collision of optical packets and decrease the percentage discarded, a buffer is required, so an N-input×1-output buffer is connected to each output port of the N-input×N-output optical packet switches.
Here follows a more specific description of the buffer management method for processing variable-length packets. This method is already well known. For example, in Document 3: F. Callegati, "Optical buffers for variable length packets," IEEE Communications Letters, vol. 4, pp. 292-294, September 2000, control is done by the following method with the addition of round-robin scheduling.
With the output buffer type N-input×N-output optical packet switch shown in FIG. 2, N N-input×1-output buffer and N 1-input×N-output switches are used. When the amount of data transmitted increases, t is possible for up to N optical packets to arrive simultaneously at the N-input×1-output buffer.
In order to prevent the collision (or overlap) of these optical packets, delay line buffers are used. In this case, in order to store all of the optical packets, the process of finding the delay of N optical packets must be performed within the period of time lmin equivalent to the minimum optical packet length. Specifically, the time permitted for processing one optical packet is lmin/N. If this time is made to be equivalent to the processing time for one optical packet when buffering is performed according to a simple round-robin scheme, then this indicates that the buffer management can be performed by means of round-robin scheduling.
FIG. 4(a) shows the structure of a 4-input×1-output optical buffer. In this case, N=4. An optical buffer made up of optical delay elements consists of B(=4) optical delay elements using fiber delay lines, N×(B+1) optical switches and a buffer management device (or buffer manager). The B fiber delay lines {d0, d1, d2, d3} have lengths of integral multiples of the unit length D of delay line, giving lengths of {0, D, 2D, 3D}. In addition, round-robin scheduling based on a clock signal in the buffer manager is repeated every period of time T. For this reason, the buffer manager receives the optical packet information at a point in time separated from the N×(B+1) optical switch by more than the period of time T, and must use this information to find the delay time required for each of the N optical packets during this predefined period of time T. Since it is necessary to process the sequentially arriving optical packets during the period of time T, the relation T≦lmin must be satisfied. For example, as shown in FIG. 4(a), four optical packets arrive and the buffer manager stores the optical packets A, B and C in the delay lines d0, d2 and d3 and discards optical packet D. This type of control is achieved by the use of the buffer manager driving the optical switch. FIG. 4(b) shows the positions of the optical packets, when viewed from the output port, immediately after optical packet A is switched to delay line d0. As shown in FIG. 4(c), optical packets A, B and C are provided as output without collision. In this example, optical packet B had arrived in the buffer prior to optical packet A, but the arriving optical packets are processed sequentially in a round-robin fashion, so they are output in the order shown in FIG. 4(c).
Here follows a detailed description of the behavior of the buffer manager according to the flowchart in FIG. 5. Table 1 presents the main parts of the program.
[Table 1]
TABLE 1ln: packet lengthtn (n=1, . . . , N): arrival gap timef : temporary variable for queue lengthT : periodD : unit length of the delay elementB : number of the delay elementsfor n = 1 to N dobeginif (f! = 0)begin                                                        Δ              n                        =                          ⌈                                                f                  -                                      t                    n                                                  D                            ⌉                                ;                                                          if                                                                                Δ              n                                <          B                       beginf = tn + ln + ΔnD;Packet n is given delay Δn;endelse Packet n is discarded;endendf = max(f − T, 0);
The buffer manager performs processing in order to avoid optical packet collisions both internally or upon output. Here, f is defined to be the amount of time from a predetermined start time to within the round-robin repeat time T until the time tf when all of the optical packets within the optical fibers have left the buffer. Hereinafter this f is called the buffer occupancy. Each period T, the buffer manager finds the delay time of the optical packets that have arrived at all ports. The delay times given to the optical packets arriving within the same period are found in the order port k=1, 2, . . . , N. Let us assume that an optical packet with an optical packet length lk arrives at port k at the time tk taking the time t0 to be the origin. The, delay time t to be given to the optical packet in order to avoid a collision is t=f−tk. Here, upon considering that the delay line buffer has a discrete time characteristic, one can see that the optical packets should be given the following time delay (F1 of FIG. 5).
                                          Δ            k                              D                =                              D            ×                          Ceil                                            (                                                      f                    -                                          t                      k                                                        D                                )                                              =                      D            ×                          ⌈                                                f                  -                                      t                    k                                                  D                            ⌉                                                          [                  Equation                                                              1                ]
Here, the function Ceil(x) represents a function that gives the smallest integer that is no less than x. If Δk<B, then that packet is stored in the Δkth delay line (F2). Conversely, if Δk≧B, then that optical packet is discarded. In this manner, a portion of the optical packets is discarded and the remainder is stored, so it is necessary to update the buffer occupancy f accordingly. Thus, when an optical packet is stored (F4), f is updated as follows.f=tk+lk+ΔkD  [Equation 2]
Once the delay of the optical packets at all ports is found, excluding the discarded ports, the buffer occupancy f is updated to the new value of max((f−T),0), thus getting ready for the optical packet processing in the next round-robin period after a time of T.
When such an optical delay line buffer is used, the interval between the optical packet arriving at port k and the optical packet stored immediately previously, or namely the optical packet output at the time indicated by the f used at the time of finding the delay in the optical packet arriving at port k, is as follows.Θk=ΔkD+tk−f  [Equation 3]
Document 6 (H. Harai, N. Wada, F. Kubota, and W. Chujo, "Contention resolution using multi-stage fiber delay line buffer in a photonic packet switch," Proceedings of IEEE ICC 2002) recites a method wherein delay line buffer units are disposed in a tree structure, and buffer managers are placed in each. Taking N to be the number of ports, this increases the processing speed by N1/2 times in comparison to the round robin processing described above, but a group of delay lines must be placed at each buffer unit so the increased size of the optical element is a problem. In addition, Document 5 (A. Prakash, S. Sharif, and A. Aziz, "An O(log2N) parallel algorithm for output queuing," Proceedings of IEEE Infocom 2002.) recites a method of performing the process of storing packets, not in optical buffers but rather in semiconductor memory buffers, as parallel processing. This makes the scale of the managing device N times that when using the round-robin process, and the processing speed is log2 N times as fast.
The round-robin scheme described above proceeds sequentially, with data processing regarding buffering being performed in a predetermined port order, so in order to perform high-speed buffering, it is necessary to perform the data processing at high speed but thus the buffering speed is limited. In addition, when the same number of processor units as the number of lightpaths are provided in parallel as recited in Document 5 above, or when delay line buffer units are provided in a tree structure as recited in Document 6 above, even in a method wherein parallel processing is used, the maximum processing time per processor units increases rapidly as the number of input lightpaths increases.
The present invention has as its object to improve the speed of buffering performed during the parallel processing of data, and provide an optical packet buffering device that is able to avoid a rapid increase in the maximum processing time per arithmetic operator even if the number of inputs increases.

Optical packet buffering device and method

National Institute of Information and Communications Technology Incorporated Administrative Agency


A phase shift mask comprises a transparent substrate (1) provided with a mask pattern formed by a light transmitting portion (4) for transmitting effective light beams having an intensity which substantially contributes to exposure and a light translucent portion (2) for transmitting ineffective light beams having an intensity which does not substantially contribute to exposure. The light translucent portion (2) is for phase shifting the ineffective light beams transmitted therethrough to make the ineffective light beams be different in phase from the effective light beams transmitted through the light transmitting portion (4) that the effective and the ineffective light beams passing through an area in the vicinity of a boundary between the light transmitting portion (4) and the light translucent portion (2) cancel each other so as to assure an excellent contrast at the boundary. The light translucent portion (2) comprises a thin film made of a material containing oxygen, metal, and silicon as main components.

This invention relates to a phase shift mask capable of improving a resolution of a transfer pattern by imparting a phase difference to exposure light beams passing through the mask and to a phase shift mask blank from which the phase shift mask is made. More particularly, this invention relates to a phase shift mask of a so-called halftone type and a phase shift mask blank from which the phase shift mask is made.
To manufacture a semiconductor LSI, use is made of a phase shift mask which is known as one of photomasks for transferring a fine pattern. The phase shift mask imparts a phase difference to exposure light beams passing through the mask to thereby improve a resolution of a transfer pattern. As one of those phase shift masks of the type described, Japanese Patent Publication (A) H04-136854 discloses a phase shift mask which is particularly adapted to transfer an isolated pattern such as a single hole, dot, or line.
In the phase shift mask disclosed in the above-referenced publication, a mask pattern formed on a transparent substrate comprises a light transmitting portion and a light translucent portion. The light transmitting portion transmits effective-light beams having an intensity which substantially contributes to exposure. On the other hand, the light translucent portion transmits ineffective light beams having an intensity which does not substantially contributes to exposure. The ineffective light beams passing through the light translucent portion are shifted in phase so that the ineffective light beams passing through the light translucent portion have a phase substantially reverse to that of the effective light beams passing through the light transmitting portion. In this arrangement, the effective and the ineffective light beams passing through an area in the vicinity of a boundary between the light transmitting portion and the light translucent portion cancel each other. It is therefore possible to assure an excellent contrast at the boundary. The phase shift mask described above is called a halftone type. In this phase shift mask, the light translucent portion has both a light shielding function of substantially shielding the effective light beams and a phase shift function of shifting the phase of the ineffective light beams. Accordingly, it is unnecessary to separately form a light shielding film pattern and a phase shift film pattern. Thus, the phase shift mask is simple in structure and easy in manufacture.
In the meanwhile, the light translucent portion in the above-mentioned phase shift mask of a halftone type is required to have optimum values for both a light transmissivity and phase shift ability. If the light translucent portion is formed by a single material, both of the above-mentioned requirements must simultaneously be fulfilled by selecting its thickness. However, an appropriate material fully satisfying such requirements has not yet been developed so far.
In view of the above, a proposal is made of an improved light translucent portion of a multilayer structure comprising a plurality of kinds of materials in the form of a high-transmissivity layer and a low-transmissivity layer. The low-transmissivity layer mainly serves to adjust the light transmissivity to a predetermined value. On the other hand, the high-transmissivity layer mainly serves to adjust an amount of the phase shift. With this structure, it is readily possible to adjust both the light transmissivity and the phase shift amount to optimum values. FIGS. 1 and 2 show phase shift masks each of which has a light translucent portion of a multilayer structure. Referring to FIG. 1, the phase shift mask comprises a transparent substrate 10, a stopper film 11 formed on the transparent substrate 10, a SOG (spin on glass) film 12 formed on the stopper film 11 to serve as the high-transmissivity layer, and a chromium film 13 formed on the SOG film 12 to serve as the low-transmissivity layer. Referring to FIG. 2, the phase shift mask comprises the transparent substrate 10, the chromium film 13 formed on the transparent substrate 10, and the SOG film 12 formed on the chromium film 13.
However, the above-described phase shift masks with the light translucent portions of a multilayer structure have following disadvantages.
As described above, the high-transmissivity layer and the low-transmissivity layer are made of SOG and chromium, respectively. Therefore, when etching is carried out to form a mask pattern, it is required to use different kinds of etching media for the SOG film 12 and the chromium film 13 as the high-transmissivity layer and the low-transmissivity layer, respectively. It is assumed that both the SOG film 12 and the chromium film 13 are subjected to dry etching in order to suppress occurrence of side etch. In this event, the SOG film 12 as the high-transmissivity layer is etched by the use of a series of fluoride etching gases such as CF.sub.4, CHF.sub.3, SF.sub.6, C.sub.2 F.sub.6, NF.sub.3, CF.sub.4 +H.sub.2 CBrF.sub.3. On the other hand, the chromium film 13 as the low-transmissivity layer is etched by a series of chlorine gases such as CCl.sub.4 and Cl.sub.2. If both of the films are successively etched in a same etching apparatus, one etching gas used earlier may remain in the apparatus to be mixed with the other etching gas used later. This possibly results in disturbance of etching conditions. In order to eliminate the possibility of such disturbance, it is proposed to etch those films in separate etching apparatuses. In this event, however, an additional etching apparatus is required and the substrate must be moved from one etching apparatus to the other. Furthermore, during the movement, foreign particles such as dust may be attracted onto the substrate to cause a defective pattern to be formed. In addition, the SOG film has a low refractive index and must therefore be relatively thick. This means that the mask pattern has a large step height. As a result, the mask pattern is readily damaged during washing and washability is insufficient to remove the foreign particles attracted thereto.

Phase shift mask and phase shift mask blank


With a plurality of memory blocks as a pair, a plurality of pairs of the memory blocks are provided and in a case where a pair of memory blocks is designated as a new boot region, when designating other pair of memory blocks as a boot region, a value obtained by subtracting a predetermined value from an initial value set at the boot area designation flag of the memory block of all the memory block pairs is stored in the boot area designation flag of each memory block of other memory block pair and at the time of booting the system, if values of the boot area designation flags in the memory blocks of other memory block pair are equal and not the initial value, determination is made that a boot program is stored in other memory block pair.

1. Field of the Invention
The present invention relates to a single-chip microcomputer having a CPU and a nonvolatile memory and, more particularly, to a boot region switching method of, when a certain region of a nonvolatile memory is designated as a boot region where a boot program is stored, switching other region to be a new boot region.
2. Description of the Related Art
Single-chip microcomputer (or single-chip micro) is a semiconductor device in which a storage region where a control program is stored and a CPU (central processing unit) for executing operation based on the control program are formed on one semiconductor chip.
In order to facilitate modification of a control program, some of such single-chip microcomputers employ nonvolatile memories including a flash memory as a memory for storing the control program.
Single-chip microcomputer mounted with such a flash memory, even when a control program stored in the flash memory needs to be modified, enables the once stored control program to be rewritten.
Among methods of rewriting such a control program are a writer rewriting mode for rewriting a control program by using a flash writer and a self-programming mode for rewriting a nonvolatile memory at the stage of user's use. The writer rewriting mode is a mode of controlling rewriting of a flash memory by starting instruction execution from a boot memory to communicate with the outside, while a user mode is a mode of executing a user region by similarly booting from a boot memory and then selecting a start address. In the self-programming mode, a boot program and other instructions necessary for rewriting are transferred from a nonvolatile memory or from the outside to a RAM to rewrite the nonvolatile memory based on the instruction read from the RAM. In the self-programming mode, only when rewriting a region containing a boot block, a boot program is required as writing data. A boot program is a program to be executed first at the time of system booting after the system is reset.
At the time of rewriting a certain memory block of a nonvolatile memory by the self-programming mode as described above or at the time of replacing a boot program with a new boot program, a boot region switching process is executed such that a boot program stored in the memory block in question is rewritten into another memory block or a new boot program is stored in another memory block, which causes the region in which the boot program is stored to change to a new boot region.
However, simply transferring a boot program stored in a user region of a certain memory block into a RAM, or erasing an original boot program and storing the boot program read from the RAM in a user region of another memory block might result in a single-chip microcomputer system not being able to continue with normal operation due to instantaneous cut-off of power or the like occurring during erasure of a user region of a nonvolatile memory in which programs, including a boot program (hereinafter referred to as a boot program), are stored. In another case, instantaneous cut-off of power might occur during new program writing after erasure, resulting in incomplete writing. In such cases, even when the system is reset to boot again, there are cases where a boot program has not been normally rewritten to disable re-booting. Therefore, the self-programming mode of rewriting a nonvolatile memory at a stage of user's use has a problem that a user region in which a boot program is stored can not be erased safely.
As a countermeasure which eliminates the problem, techniques for safely rewriting a user region in which a boot program is stored are disclosed in Japanese Patent Laying-Open (kokai) No. Heisei 8-255084 and Japanese Patent Laying-Open (kokai) No. Heisei 10-149282. This patent teaches the process of rewriting a program in a boot area, by copying an old boot program into a free user region to save the same, erasing storage contents of the boot area in question and then writing a new boot program into the area, and after confirming the end of the writing, erasing the old boot program copied into the free user region. Therefore, even when a situation occurs where writing a new program can not be executed completely due to instantaneous cut-off of power or the like, the system can be booted again by the old boot program to prevent the system from entering an unrecoverable state.
With the above-described methods, however, the number of actions is large such as copying of an old boot program into a free area and erasure of an old boot program when it becomes unnecessary, resulting in making procedures complicated and time-consuming.
Conventional single-chip microcomputer which solves the above-described problems is recited in Japanese Patent Laying-Open (kokai) No. 2001-195241.
The conventional single-chip microcomputer is designed to have a boot area designation flag provided for each user region to enable a boot program stored in a nonvolatile memory to be safely rewritten in an onboard mode at a stage of user's use by a less number of actions. Structure of the conventional single-chip microcomputer is shown in FIG. 4.
Boot area designation flag, which is provided for each memory block, is a flag for indicating that a boot program is stored in a user region of the memory block in question.
The conventional single-chip microcomputer includes, as illustrated in FIG. 4, a nonvolatile memory 41, a CPU 2, a boot memory 3, a region switching flag 4 and a RAM 5.
The nonvolatile memory 41, in which programs including a boot program are stored, is divided into two memory blocks 161 and 162. The memory block 161 is formed of a user region A for writing data such as a program code by a user and a region for storing a boot area designation flag A corresponding thereto and the memory block 162 is formed of a user region B and a region for storing a boot area designation flag B corresponding thereto.
The CPU 2 is a main processor which conducts control and operation according to a program stored in the nonvolatile memory 41. The CPU 2 conducts setting of the region switching flag 4 based on the contents of a boot area designation flag. The boot memory 3 has a function of booting the system according to a designated control mode. After the system is booted up, among the programs stored in the nonvolatile memory 41, the boot program is first processed. Rewriting of the boot program is executed by a flash writer when the computer is handled singly by a factory and is executed in a self mode when in an on-board mode at the stage of user's use. The region switching flag 4 has a function of designating a user region in which the boot program is stored at the time of system booting. The RAM 5 temporality stores necessary data in response to an instruction from the CPU 2.
With reference to the flow chart of FIG. 5, description will be made of a procedure of rewriting programs including a boot program in a user region in a self-programming mode in thus structured conventional single-chip microcomputer when the user region A of the memory block 161 is designated for booting (boot area designation flag A="0", the boot area designation flag B="1"). The nonvolatile memory 41 is designed that, when data contents are erased, "1" is stored in all the erased bits.
Here, the user region and the boot area designation flag of the memory block 161 are represented by the user region A and the boot area designation flag A, respectively, and the user region and the boot area designation flag of the memory block 162 are shown as the user region B and the boot area designation flag B, respectively.
The conventional rewriting process involves: first, erasing the storage contents of the user region B and the boot area designation flag B into which a boot program is newly written (Step 201); then, writing the new boot program into the user region B (Step 2002); next, writing data so as to make the boot area designation flag B have boot designation (data "0") (Step 203).
Then, the storage contents of the user region A and the boot area designation A (Step 204) are erased. At this time, nothing is written to the boot area designation flag A, and thus the data "1" remains the same. The next step is writing with a program other than the boot program into the erased user region A according to the necessity.
In the user mode, when the system is booted by resetting, the program is executed from the boot memory 3, based on which program values of the boot area designation flag A and the boot area designation flag B. These flags are read to determine which of the user region A and the user region B stores the new boot program. The program writes the data of the relevant user region into the region switching flag 4 and the region switching flag 4. The region switching flag 4 is set to read storage contents branched into the user regions in which the new boot program is stored at the time of system booting.
When instantaneous cut-off of power occurs after the end of Step 203 and before Step 204 ends, a plurality of user regions might be designated as a boot region. In such a case, any of the user regions, the user region A, for example, should be preferentially designated as a boot region.
In the conventional single-chip microcomputer, since setting a boot area designation flag and a region switching flag enables a user region including a boot program for booting the system to be switched, thereby enabling boot program rewriting in a nonvolatile memory to be executed always with the old boot program existing, even when rewriting fails to be completed due to instantaneous cut-off of power or the like at the time of rewriting in the self-mode, recovery is possible by further rewriting and rewriting is enabled with a less number of actions in a short period of time.
In such a conventional single-chip microcomputer, however, when instantaneous power cut-off occurs during erasure of the user region B, that is, during the processing of Step 201 in FIG. 5, the value of the boot area designation flag B becomes indefinite to have a valid value depending on situations. At this stage, however, processing of Step 202 for writing the new boot program into the user region B is yet to be completed. Therefore, when the system is reset to boot up, both the boot area designation flags A and B go valid and if setting is made here to preferentially designate the user region B as a boot region, such a problem occurs that a user region in which no boot program is stored might be designated as a boot region.
In a flash memory, in particular, pre-write is conducted of, before erasing written data, once executing writing to make a voltage level held in all the memory cells be the same level. Therefore, when instantaneous power cut-off or the like occurs during pre-write of a certain memory block, a boot area designation flag of the memory block might attain "1" which should be originally "0", or attain "0" which should be originally "1".
As a result, in the conventional single-chip microcomputer shown in FIG. 4 as well, such a problem possibly occurs that a memory block in which a boot program is stored can not be specified depending on timing when instantaneous cut-off of power occurs, which disables booting from the boot program. Then, when booting from the boot program is not executed, system operation might not be conducted normally to have erroneous operation.
The above-described conventional single-chip microcomputers have the shortcomings of instantaneous power cut-off or the like occurring during the boot program rewriting processing in the self-programming mode making booting from the boot program impossible.

Single-chip microcomputer and boot region switching method thereof


A method for reducing a delay in a wireless communications system resulting from a handoff while mitigating a risk of premature termination of wireless communications, the method includes comparing data indicative of actual use of the wireless communications systems to at least one predetermined criteria. If the comparing determines a sector pairing in the wireless communications system to be statistically significant for purposes of recommending at least one search window setting, at least one value related with a distance associated with the sector pairing may be used to automatically determine a corresponding signal delay. If the corresponding signal delay exceeds a prior determined signal delay, a recommended search window setting may be determined using the corresponding signal delay.

Many wireless communications networks utilize base stations each positioned to cover a corresponding "cell" within which a wireless communications device may operate. As used herein, the term "wireless communications device" generally refers to any device being suitable for communicating in a wireless fashion using a wireless communications network. Examples of such devices include, but are not limited to: wireless telephones, i.e., handsets, and mobile computing devices including such functionality, such as portable Personal Computers (PCs) and Personal Digital Assistants (PDAs). Further, each cell may be divided into "sectors" as is also well understood.
A cell typically covers a limited geographic area and routes communications between wireless communications devices physically located within the limited geographic area and a telecommunications network, such as a Public Switched Telephone Network (PSTN). When a wireless communications device physically moves from one cell and/or sector to another, a "handoff" may be performed to coordinate operation of the wireless communications device with the new cell and/or sector. Generally, a handoff typically involves negotiating instructions between the moving wireless communications device and one or more base stations and/or mobile switching centers corresponding to the location of the wireless communications device. This serves to keep a communications session, such as a phone call, active as the wireless communications device traverses from one cell and/or sector to another. A handoff may be triggered, for example, when the wireless communications device detects a pilot signal from a different base station that exceeds a given threshold.
Referring now to FIG. 1, there is shown an illustration of a handoff threshold example for a CDMA system as a plot of pilot signal strength versus time. At time (1), as the pilot signal strength 10 exceeds a threshold T_ADD, the mobile communications device sends a Pilot Strength Measurement Message and transfer the pilot to a Candidate Set 20. At time (2), the corresponding base station sends a Handoff Direction Message. At time (3), the mobile communications device transfers the pilot to the Active Set 30 and sends a Handoff Completion Message. At time (4), as the pilot signal strength 10 drops below a threshold T_DROP, the mobile communications device starts a handoff drop timer. At time (5), the handoff drop timer expires, and the mobile communications device sends a Pilot Strength Measurement Message. At time (6), the corresponding base station sends a Handoff Direction Message. At time (7), the mobile communications device moves the pilot from the Active Set 30 to the Neighbor Set 40 and sends a Handoff Completion Message. This technique is well understood by those possessing an ordinary skill in the pertinent art.
In a wireless communications network utilizing a Code Division Multiple Access (CDMA) system, a handoff from one cell and/or sector to another involves estimating the timing of a received signal. Wireless communications devices communicating via CDMA systems may experience delays in reception of signals due to the speed of light, reflections, and mobility of the wireless communications devices. When a wireless communications device moves from a first cell to a second cell, a handoff is performed to assign new system resources associated with the second cell. CDMA systems may employ "Search Windows" of a settable length over which to search for the potentially delayed signals. A Search Window is typically set around spreading (or PseudoRandom—PN) sequence phase offsets where geographically adjacent base stations are expected to be transmitting. If a utilized Search Window is set too wide, the searching process can temporally delay handoffs, reducing performance of the wireless communications devices and capacity of the network system. Further, if the Search Window is set too narrow, wireless communications devices may not acquire delayed signals, which may lead to poor performance and dropped communications, such as calls, due to one or more missed handoff opportunities.
Conventionally, two methods for setting Search Windows may be employed: default settings may be used based upon general manufacturer recommendations; or vehicles with test equipment may be moved throughout the cells and sectors and used to collect timing delay information to calculate Search Window settings.
The first method may prove satisfactory for many handoff scenarios, but typically does not provide for even nearly-optimal settings. The second method can provide improved performance over the first method, but, is often expensive, time-consuming, and typically requires large areas to be covered in the data collection process—further driving up costs in both dollars and time.

This patent is subject to a terminal disclaimer.

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