A system and a method for using a computer program to automate the process of searching and or retrieving data from a particular data pool for introduction to a user is provided. More specifically, a program is used that may robotically manipulate existing web sites using computer source codes that are generated all or in part by the computer program and/or software. The system may trace, monitor and analyze a browser or network application to produce transactions and manipulate the data retrieved to automatically access previously un-accessible data from a web site.

The internet, and more specifically, the World Wide Web, has hundreds of millions of pages available, waiting to present information on a variety of topics to an individual. In addition, many companies, organizations, and individuals have constructed true applications using the World Wide Web as the delivery medium. Consumers can now conduct on-line banking, shop for automobiles, participate in on-line auctions, and many other activities of a transactional nature. World Wide Web based applications such as those mentioned above all present the user with the various screens and data that make up the application through a web browser such as NETSCAPE NAVIGATOR, or MICROSOFT INTERNET EXPLORER. Software engineers term these types of World Wide Web transactional programs 'Web Applications' in contrast to software applications that run on older text based terminals, or in contrast to older client server technologies. Broadly then, World Wide Web has produced 2 classes of content. The first class of content may be read-only content, in which the user is directed to a specific web page and can then read the content of that page. The second class of content are Web applications, wherein the user actually enters data in an interactive manner to perform some tasks, like shopping for a product, performing a banking transaction, etc.
All World Wide Web applications and content present and retrieve user input using (broadly) two technologies. The first is the actual network protocol that is hidden from the user. This protocol is widely known as the Hypertext Transfer Protocol, or simply 'HTTP'. The format of the information flowing over HTTP and subsequently accepted by a web browser, or conversely a web server is Hypertext Markup Language, or simply 'HTML'.
A very important part of web technology is that it functions over a public network. Thus almost anyone can, from a home computer, view web pages that are actually published all over the world. From a business perspective, the 'publicness' of the World Wide Web has removed a big barrier for moving data between companies and companies, and between companies and individuals. Heretofore, if two companies wanted to exchange business information, they would typically construct a private network, then agree on a protocol, then implement software that supported the agreed upon protocol, then transfer the data. Usually that process took months or years of work. Today, using the World Wide Web, each company simply publishes the data to their web server, and any of its authorized partners can see the data visually using a web browser.
As the web grew in the 1990's billions of web pages were produced. In addition, thousands of web applications were produced. While on the whole this has been a positive development for technologist, it has created a unique problem as regards integration of content and data from these many web pages and applications. Web technology today focuses on human beings being able to interact with a web browser to view and modify web based information. However there is a great need for machine to machine communication over the Internet, as contrasted with human to machine which is what constitutes the bulk of all activity on the Internet today.
Machine to machine communication over the internet using HTTP and HTML is problematic. The fundamental reason for that is that HTML is more suitable as a publishing format, rather than a data exchange format. For example, it is trivial for a human to use a web browser to go, to a banking site and check his/her account balance, it is much harder to write a piece of software that will, from a computer, access a bank web site, login, and query for an account balance, returning the data, not in HTML, but in a more 'machine friendly' format like the Extensible Markup Language (XML).
Programs that access web sites, that are normally accessed by human users sitting at a computer using a web browser, are call variously 'software robots', 'robots', 'software agents', 'agents', 'programs' or other. Programs that access web sites appear from a network and data presentation format, to the web site as an end user would. The web site or web application receives and sends information exactly as it would to a real human user, but instead the information is received, processed, and responded to by a piece of software running on a computer somewhere on the Internet, rather than a live human user using a web browser. In these applications, the web site, or web application does not know it is communicating with anything other than a web browser, when in fact it is communicating with a piece of custom written software.
Today the majority if not all of these robotic applications are hand written by skilled software engineers. New web sites and applications are being created at a rate that is much more rapid than the ability of software engineers to write corresponding robotic applications. So in general web applications today immediately allow human users to perform some function, but do not support machine to machine communication.
No invention exists today that automatically generates software robots that can manipulate existing web sites and web applications. The net effect of the invention is a dramatic reduction in the amount of time necessary to implement machine to machine communications that utilize existing web sites and web applications.
Moreover, no application or program exists today that uses a system of monitoring and analyzing functions placed to a distinct web browser or other network based application to produce an extract of network transactions that can be manipulated by software to perform the desire operation automatically.
Further, no system of application exists for a program to emulate the transactions of the network based application and mimic the transactions in later access of the same network based applications or other relevant network abilities.


An integrated image sensor for acquiring and processing electrical signals representative of an object comprising a photosite array configured to convert light into the electrical signals, an A/D converter configured to convert the electrical signals into digital data, and logic integral with the image sensor configured to scale the digital data by a non-integer-scaling factor. A method for acquiring and processing image data with an integrated image sensor comprising the steps of capturing, via the image sensor, the image data representative of an image, scaling, via the image sensor, the image data by a non-integer value, and outputting from the integrated image sensor scaled image data.

1. Field of the Invention
The present invention generally relates to image acquisition and processing, and, in particular, to a system and method that integrates spatial image resolution scaling, commonly called image resizing, on an image sensor.
2. Related Art
A digital camera typically employs image sensors to convert light reflected by an object through an optical lens into electrical signals. Sensor technology utilized in digital cameras may employ a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) image sensor to convert the light (photons) into electrical signals (electrons).
The sensor technology in a digital camera typically includes an array of photodiodes, referred to in the art as "photosites." The array of photosites is conceptually a two-dimensional array, and each photosite in the array converts a small portion of the total light detected, which is reflected from an object within the lens' field of view, into electrical signals.
Typically, the electrical signals are analog signals, which are converted into digital format by an analog-to-digital (A/D) converter. The A/D converter may either be located on the sensor (e.g., on a portion of the semiconductor chip, which comprises a CMOS image sensor) or the A/D converter may receive the output of the sensor. In either embodiment, the A/D converter typically converts the analog signal to a digital signal, and then transmits the digital signal to a general-purpose processor or application specific integrated circuit (ASIC) within the digital camera.
The processor of the digital camera performs a wide variety of image processing functions. These operations commonly include auto-exposure, auto-focus, automatic white balancing, sharpening, image spatial resolution scaling, compression as well as other proprietary image processing operations known in the art. After the digital image data is fully processed, it is usually stored in digital format in memory located within the digital camera.
Recent technological advances have resulted in sensors for digital cameras, which can produce outputs in the several megapixels. For example, a typical CMOS image sensor or CCD sensor can employ a 2000×1500 array of photosites, which output three million analog signals. If three million analog signals representative of light detected by the photosites are digitized, then a typical representation of one single still image or frame would comprise approximately three million image data values. Moreover, if the digital camera were in video mode to capture motion, then a full photosite array collection may be three million pixels at up to thirty frames per second. Common frame rates for full motion digital video range between 24 and 30 frames per second.
Even if the sensors are equipped to collect megapixels of data at video frame rates, typically, the bus bandwidth and data processing capabilities of digital cameras are unable to manipulate such a large volume of data. In other words, the computation requirements necessitated by such a large volume of data (e.g., three million pixels per frame at a rate of 30 Hz) would easily exceed the processing capabilities of the system.
To reduce the volume of image data generated by the image sensor and, therefore, consumed by the camera's processor, sensors may include logic that performs a process known in the art as "pixel binning." Generally, pixel binning refers to collecting multiple pixel signals in the vertical and/or horizontal direction, into a single larger charge, which represents the area of the individual pixels contributing to the charge. In this regard, as light falls on an image sensor, for example a CCD, electrons accumulate at each pixel. Note that the number of electrons that a pixel is capable of accumulating varies, depending upon the type of image sensor employed. However, for exemplary purposes, assume that each pixel of the image sensor is capable of accumulating 100,000 electrons at each pixel, which is commonly referred to in the art as "well depth." A group of the pixels are then "binned" by summing the accumulated electrons at each pixel in the group into a single charge, or "superpixel."
For example, a binning of 3×3 means that an area of nine (9) adjacent pixels have been combined into one large pixel. Employing the example provided hereinabove, if each pixel is capable of accumulating 100,000 electrons, and each pixel in the nine adjacent pixels accumulate 80,000 electrons, then the superpixel that results from binning the nine pixels with a 3×3 matrix is a single "superpixel" comprised of 720,000 electrons.
Moreover, the 3×3 binning applied to a sensor that has a photosite array of 2000×1500, results in data collected that comprises a two-dimensional array of 667×500. Therefore, the amount of collected data for each frame is reduced in size from three megapixels to approximately three-hundred thousand (300,000) pixels. This reduction in the sensor's output data rate is intended to bring the sensor's output data rate into the processing capability of the camera's processor.
Note that the "superpixel" method of binning electrons from an image sensor is an example of a binning method known in the art. Other binning methods known in the art may also be implemented to reduce the volume of image data produced by the image sensor.
Typically, after electrical signals are binned, the data is transmitted from the sensor to a general-purpose processor or an ASIC for video processing operations.
Image resizing is generally performed by a processor or an ASIC, so that the output image size corresponds to a desired resolution. For example, the digital camera may be set to capture an image that is 640 by 480 pixels, which may be significantly fewer pixels than the sensor is capable of generating. Another resolution commonly used in capturing video images is what is referred to as quarter VGA, which is a resolution of 320 by 240 pixels.
Moreover, a processor or ASIC that receives the digital data produced by an image sensor may reduce the image defined by the digital data to a desired resolution for more compact storage or the processor or ASIC may not perform any resizing of the digital data, prior to its storage.

Image sensor for capturing and filtering image data

Hewlett-Packard Development Company, L.P.


A system and method in accordance with the invention permits the full support of two ISA buses, a local ISA bus and a second ISA bus. To do so, upon receiving an access cycle, the cycle is directed to the second ISA bus. The second ISA bus is monitored for a signal event which indicates that an ISA device is claiming the cycle. If the signal event does not occur, the cycle is directed to the local ISA bus.

1. Field of Invention
The invention is related to the direction of access cycles to various buses in a multi-bus system.
2. Background Art
The IBM PC AT computer architecture has become industry standard architecture for personal computers, and is typically built around a CPU such as an 80286, 80386, 80486, or 80586 (Pentium.RTM.) microprocessor manufactured by Intel Corporation. The CPU is coupled to a host (local) bus, capable of performing memory accesses and data transfers at high rates of speed (i.e., on the order of 10-66 MHz;). The host bus generally includes 16, 32, or 64 data lines, a plurality of address lines, and various control lines. For present purposes the following signals on the host bus are important:
______________________________________ Signal Name Signal Description ______________________________________ HD[63:0] Host Bus Data Lines. HA[31:3] Host Bus Address Lines. BE[7:0]# Byte enables 7 through 0: Selects the active byte lanes on HD[63:0]. INTR Interrupt Request: INTR is driven to signal the processor that an interrupt request is pending and needs to be serviced. M/IO# Memory/Input-Output: M/IO# defines processor bus cycles along with D/C#, and W/R#. D/C# Data/Control: D/C# defines processor bus cycles along with M/I0# and W/R#. W/R# Write/Read: W/R# defines processor bus cycles along with M/I0# and D/C#. ADS# Address Strobe: The processor asserts ADS# to indicate that a new bus cycle is beginning BRDY# Burst Ready: BRDY# indicates that the system has responded in one of three ways: 1) Valid data has been placed on the processor data bus in a response to a read, 2) Processor write data has been accepted by the system, or 3) the system has responded to a special cycle. STPCLK# Stop Clock: this signal is connected to the STPCLK# input of the processor. It causes the processor to get into the STPGNT# state. ______________________________________
The typical IBM PC AT-compatible computer also includes a system bus, sometimes referred to as an I/O bus. Such a system bus is used to interface communications between a host CPU and a peripheral device, or communications between peripheral devices and host memory. The system bus is coupled to the host bus via certain interface circuitry. The system bus includes generally 8, 16, or 32 data lines, a plurality of address lines, as well as control/status lines. One of the most commonly used system buses is the industry standard architecture (ISA) bus. The ISA bus was adopted by several computer industry groups in the 1980's to create a standard to permit the development of compatible add-on cards in a reasonable and consistent fashion. The ISA bus operates at approximately 8 Mhz and includes 8 or 16 data lines, distinct address lines, as well as distinct control and command lines.
The various signals on the ISA bus are well specified and known in the industry. General information on the ISA bus can be found in Solari, "AT Bus Design" (San Diego, Annabooks, 1990), incorporated by reference herein. For present purposes, the following ISA signals are important:
______________________________________ Signal Name Signal Description ______________________________________ SA[23:0] 24 address lines. BALE Bus address latch enable line. BALE is an active high signal asserted to indicate when the SA address, AEN and SBHE# lines are valid. BALE remains asserted throughout ISA master and DMA cycles. SBHE# System byte high enable. When SBHE# is active, it indicates that a byte is being transferred on the upper byte (SD[15:8]) of the data bus. AEN Address enable line. AEN is asserted during DMA cycles to prevent I/O slaves from misinterpreting DMA cycles as valid I/O cycles. When active, AEN informs I/O resources on the ISA bus that a DMA transfer is occurring. SD[15:0] 16 data lines. MEMR# Read request lines to a memory resource on the ISA bus. MEMW# Write request lines to a memory resource on the ISA bus. IOR# Read request line to an I/O resource on the ISA bus. Also called IORC# or IORD#. IOW# Write request line to an I/O resource on the ISA bus. Also called IOWC# or IOWR#. M16# Memory chip select 16. Asserted by an addressed memory resource on the ISA bus if the resource can support a 16-bit memory access cycle. Also called MEMSC16#. I016# I/O chip select 16. Asserted by an addressed I/O resource on the ISA bus if the resource can support a 16-bit I/O access cycle. Also called IOCS16#. NOWS# Synchronous Ready line. Also sometimes called 0WS#, SRDY# or ENDXFR#. Activated by an addressed memory resource to indicate that it can support a shorter-than-normal access cycle. IOCHRDY I/O channel ready line. If this line is deactivated by an addressed I/O resource, the cycle will not end until it is reactivated. Also sometimes called CHRDY. IRQ(15, 14, Interrupt request lines to 12:9, 7:3) interrupt controller for CPU. DMARQ (7:5, DMA Request lines from I/O 3:0) resource on ISA bus. DACK(7:5, DMA Acknowledge lines. 3:0) BCLK ISA bus clock signal. ______________________________________
Recently, efforts have been made to develop other bus protocols for PC AT-compatible computers with the goals of reducing the size of PC AT-compatible computers as well as continued industry standardization. These efforts have included the development of the PCI bus, which has been developed to establish a new industry standard for bus architectures, particularly those interfacing with high bandwidth functions. The PCI bus is described in detail in "PCI Local Bus Specification", Revision 2.1 (Portland, Oreg., PCI Special Interest Group, 1995), incorporated by reference herein. For present purposes, the following PCI signals are important:
______________________________________ Signal Name Signal Description ______________________________________ AD[31:0] PCI Address and Data: AD[31:0] are bidirectional address and data lines for the PCI bus. FRAME# Cycle Frame: FRAME# is driven the current bus master to indicate the beginning and duration of an access. FRAME# is asserted to indicate that a bus transaction is beginning. While FRAME# is asserted, data transfers continue. When FRAME# is deasserted, the transaction is in the final data phase or has completed. IRDY# Initiator Ready: IRDY# indicates the initiating agent's (the bus master's) ability to complete the current data phase of the transaction. IRDY# is used in conjunction with TRDY#. A data phase is completed on each clock that both IRDY# and TRDY# are sampled asserted. During a write, IRDY# indicates that valid data is present on AD[31:0]. During a read, it indicates the master is prepared to accept data. TRDY# Target Ready: TRDY# indicates the target agent's (selected device's) ability to complete the current data phase of the transaction. TRDY# is used in conjunction with IRDY#. A data phase is asserted. During a read, TRDY# indicates that valid data is present on Ad[31:0]. during a write, it indicates the TRDY# is proper. DEVSEL# Device Select: When actively driven, DEVSEL# indicates the driving device has decoded its address as the target of the current access. STOP# Stop: STOP# indicates that the current target is requesting a master to stop the current transaction. PCICLK Master PCI clock. CLKRUN# Clock Run: CLKRUN# is an I/O sustained tristate signal used by the central resource (the host) to request permission to stop or slow the PCICLK. ______________________________________
Despite PCI bus development, because the PCI bus was designed primarily to support high-end peripherals (i.e., supporting speeds of up to 66 Mhz for 64-bit data), it is not as economical to manufacture low-end peripherals for the PCI-bus as it is for the older and slower ISA-bus. Thus both PCI-type devices and ISA-type devices are commonly produced and computer systems must be developed which have the interfaces to support both PCI-type and ISA-type devices.
Generally, in performing a read or write access to a system bus device, the host processor typically initiates an I/O access cycle by asserting M/IO#, W/R#, D/C#, and an I/O address. System interface circuitry recognizes the I/O signals generated by the host processor, performs the desired operation over the system bus, and if appropriate, returns results to the host processor over the host bus.
When the system bus is an ISA bus and when the interface circuitry receives an access cycle initiated by the host processor, the interface circuitry merely directs the cycle onto the ISA bus. The target devices on the ISA bus will decode the address asserted, and the appropriate device (the one addressed) will claim the cycle, and then perform a data transfer.
One drawback of this ISA device bus claiming scheme, however, is that ISA devices generally give no indication to the interface circuitry, or to any other device, that they are claiming particular cycles. The ISA device simply engages in the procedure to begin transmitting or receiving data.
The PCI bus attempts to solve the addressing problems experienced with ISA buses. With the PCI bus, during an initial configuration cycle, every device on the PCI bus is first assigned a specific address range which uniquely identifies the device. Further, all address lines (AD[31:0]) on the PCI bus are coupled to every PCI device, and each device performs its own address decoding. Finally, each device on the PCI bus asserts a DEVSEL# signal, which indicates when asserted that the device is claiming the cycle.
PCI 2.1 supports two styles of address decoding: positive and subtractive. Positive decoding occurs when a device is "looking" for accesses into the address range to which it has been assigned, and is generally faster than subtractive decoding. When a device "sees" its address on the bus, i.e., when signals are asserted on the address bus indicating an address in the device's address range, the device positively claims the cycle and asserts DEVSEL#, indicating to other PCI devices that it is claiming the cycle.
Subtractive decoding occurs when a device accepts accesses which are not accepted by any other device. Thus subtractive decoding can only be performed by one device on the PCI bus. In addition, subtractive decoding is generally slower than positive decoding since it effectively gives all other devices on the bus a "right of first refusal" on each access. If a device claims a cycle by subtractive decoding, it also asserts a DEVSEL# signal, indicating to other PCI devices that it "owns" the bus, i.e., that it claims the cycle. Further details regarding addressing and address decoding on the PCI bus can be found in PCI 2.1.
Because PCI and ISA as well as other types of system buses are common, many systems are built to support multiple bussing schemes. In such multi-bus systems, when the CPU or other device initiates an I/O access cycle, the interface circuitry must direct the cycle to the appropriate bus. This type of situation has most often been handled using the positive-subtractive decode scheme of the PCI bus. For instance, upon receiving a cycle, the interface circuitry first directs the cycle to the PCI bus, where it will be positively or subtractively decoded by PCI devices. If no PCI device, including the interface circuitry, positively claims the access cycle, the cycle is subtractively claimed by the interface circuitry. The interface circuitry is thus a PCI device and further acts as the single PCI subtractive decoder on the PCI bus. The interface circuitry then directs the subtractively claimed cycle to the local ISA bus. Thus, the local ISA bus receives the cycle by default.
This system of positive and subtractive decoding has tended to work well with free-standing PC systems. Notebook computers with docking stations, however, pose a more difficult problem. Notebook computers, or other mobile devices, when standing independently, typically have a similar bus structure to a desktop system, i.e., host processor, interface circuitry, ISA bus, PCI bus, etc., and will thus operate as described above. When a notebook system is docked, or placed in a docking station, however, a second ISA bus is usually linked to the notebook system. I/O cycles initiated from the host processor (on the notebook) must then be identified by the interface circuitry as destined for the ISA bus local to the notebook system (the "local ISA bus"), the PCI bus, or the remote ISA bus accessed through the docking station.
The presence of a remote ISA bus will raise several problems. First, remote ISA devices can claim the same address ranges as local ISA devices and therefore a bus conflict can result, particularly when both devices are trying to put data onto the bus for a read cycle. Second, the remote ISA devices, like their local ISA counterparts, still do not acknowledge that they are claiming a particular cycle. Therefore, if a cycle is directed to the remote ISA bus and the cycle is not claimed by a remote ISA device, the computer system may be significantly slowed.
The solution to these problems which is generally practiced is that for various more permanent local ISA resources (e.g., ROM, KBC, RTC) whose I/O addresses are known at manufacturing time, the known addresses are stored in registers in the interface circuitry. When a cycle directed to the PCI bus is ultimately destined for a local permanent ISA device address, the interface circuitry is programmed to positively claim the cycle when the cycle is on the PCI bus and then to direct the cycle to the local ISA bus. Otherwise the cycle is directed to the remote ISA bus. While this scenario aids in avoiding conflict with known local devices, it does not overcome the problematic situation where additional ISA devices (add-on cards) are added to the local ISA bus. Identifying which ISA bus a cycle should be directed to is usually a guessing game at best and can lead to bus conflict situations. Therefore, because conventionally there has not been a good way to determine when an ISA device is claiming a cycle, most designers minimize use of ISA devices.
Thus, it is desirable to develop a system which can recognize when a device on a second ISA bus claims a cycle, allowing bus conflicts to be minimized.

System and method of positively determining ISA cycle claiming


A manufacturing method of an array substrate for a liquid crystal display device includes forming a switching element in a pixel area on a substrate, wherein the pixel area includes a reflective area and a transmissive area, forming an organic layer on an entire surface of the substrate including the switching element, first exposing the organic layer using a first mask, second exposing the first exposed organic layer using a second mask, developing the first and second exposed organic layer to form a passivation layer having an unevenness pattern in the reflective area, forming a reflector on the passivation layer in the reflective area, and forming a pixel electrode on the reflector in the reflective area and the transmissive area.

1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to a manufacturing method of an array substrate for a liquid crystal display (LCD) device including a reflector.
2. Discussion of the Related Art
Due to the rapid development in information technology, display devices have evolved into instruments that can process and display a great deal of information. Flat panel display (FPD) devices, which have the properties of a thin profile, low weight and low power consumption, have been developed.
The FPD devices may be classified into two types depending on whether the device emits or reflects/transmits light. One type is a light-emitting type display device that emits light to display images, and the other type is a light-reflecting/transmitting type display device that uses an external light source to display images. Plasma display panels (PDPs), field emission display (FED) devices, and electroluminescent (EL) devices are examples of the light-emitting type display devices. Liquid crystal display (LCD) devices are examples of the light-reflecting/transmitting type display device.
Among many kinds of FPD devices, LCD devices are widely used for notebook computers and desktop monitors because of their excellent characteristics of resolution, color display and display quality.
In general, a liquid crystal display (LCD) device includes two substrates, which are spaced apart and facing each other, and a liquid crystal layer interposed between the two substrates. Each of the substrates includes an electrode and the electrodes of each substrate are also facing each other. Voltage is applied to each electrode and an electric field is induced between the electrodes. An arrangement of the liquid crystal molecules is changed by varying the intensity of the electric field. The LCD device displays a picture by varying the light intensity according to the arrangement of the liquid crystal molecules.
Because the LCD device is not luminescent, it needs an additional light source in order to display images.
Therefore, a backlight is arranged behind a liquid crystal panel and is used as a light source. Light incident from the backlight penetrates the liquid crystal panel, and the amount of light transmitted is controlled depending on the arrangement of the liquid crystal molecules. Here, the substrates are usually transparent and the electrodes of each substrate are usually formed of a transparent conductive material.
This LCD device is referred to as a transmissive type LCD device or a transmissive LCD device. Because the transmissive LCD device uses the backlight as a light source, it can display a bright image in dark surroundings. However, the transmissive LCD device has high power consumption due to the operation of the backlight.
To remedy this disadvantage, a reflective (or reflection type) LCD device is suggested. The reflective LCD device displays images by reflecting external light, thereby resulting in low power consumption as compared with the transmissive LCD device. In the reflective LCD device, a pixel electrode on a lower array substrate is made of a conductive material having high reflectance and a common electrode on an upper color filter substrate is made of a transparent conductive material so that external light can be transmitted therethrough.
However, the reflective LCD device cannot be used in dark surroundings because it depends on an external light source.
To solve the above problems, a transflective LCD device has been recently proposed and developed. The transflective LCD device can be used both in a transmissive mode and in a reflective mode. A related art transflective LCD device will be described hereinafter more in detail.
FIG. 1 is a cross-sectional view of an array substrate for a related art transflective LCD device. As shown in FIG. 1, a reflective area RtA and a transmissive area TmA, which together constitute a pixel area, are defined on a substrate 3.
In the reflective area RtA, a gate electrode 9 is formed on the substrate 3. Although not shown in the figure, a gate line and a storage electrode are also formed in the same layer as the gate electrode 9. A gate insulating layer 15 is formed on an entire surface of the substrate 3 including the gate electrode 9. A semiconductor layer 18 is formed on the gate insulating layer 15 corresponding to the gate electrode 9. The semiconductor layer 18 includes an active layer 18a and an ohmic contact layer 18b.
A source electrode 21 and a drain electrode 24 are formed over the semiconductor layer 18. The source electrode 21 and the drain electrode 24 contact the ohmic contact layer 18b of the semiconductor layer 18. The source electrode 21 and the drain electrode 24 are spaced from and facing each other. The gate electrode 9, the semiconductor layer 18, the source electrode 21 and the drain electrode 24 constitute a thin film transistor Tr.
Next, a first passivation layer 30 is formed on the source and drain electrodes 21 and 24 and the active layer 18a exposed between the source and drain electrodes 21 and 24. Convex patterns 35 are formed on the first passivation layer 30 and a second passivation layer 37 covers the convex patterns 35 to have an uneven surface. The second passivation layer 37 has a drain contact hole 44 exposing the drain electrode 24 with the first passivation layer 30. The first passivation layer 30 is formed of an inorganic material and the second passivation layer 37 is formed of an organic material.
A reflector 41 is formed on the second passivation layer 37 by depositing a metal material that reflects light well. The reflector 41 also has an uneven surface due to the uneven second passivation layer 37. The reflector 41 is connected to the drain electrode 24 through the drain contact hole 44.
Meanwhile, in the transmissive area TmA, the gate insulating layer 15 and the first passivation layer 30 are sequentially formed on the substrate 3. The first passivation layer 30 is removed in the transmissive area TmA to expose the gate insulating layer 15 and to form a step between the transmissive area TmA and the reflective area RtA.
Next, a pixel electrode 49 is formed in the reflective area RtA and in the transmissive area TmA by depositing a transparent conductive material and then patterning it. The pixel electrode 49 contacts the reflector 41, and is electrically connected to the drain electrode 24.
FIGS. 2A to 2F show a manufacturing method of the array substrate for the transflective LCD device according to the related art.
Forming a switching element such as a thin film transister Tr, which includes a gate electrode, a semiconductor layer, a source electrode and a drain electrode, may use a conventional manufacturing method, and therefore, it will not be described in detail.
As shown in FIG. 2A, a first passivation layer 30 is formed on a source electrode 21 and a drain electrode 24 by depositing an inorganic material on an entire surface of a substrate 3 including a thin film transistor Tr as a switching element, wherein a reflective area RtA and a transmissive area TmA are defined on the substrate 3. The first passivation layer 30 improves adhesion between layers, but may be omitted. An organic layer 31 is formed on the first passivation layer 30 by coating a photosensitive organic material such as photo acryl.
Next, a mask 32 including light-blocking portions BA and light-transmitting portions TA is disposed over the organic layer 31 and a first mask process is performed. The organic layer 31 is exposed to light through the mask 32. Because the organic layer 31 is formed of the photosensitive organic material such as photo acryl, a process of forming a photoresist on the organic layer 31 can be omitted.
As shown in FIG. 2B, the exposed organic layer 31 is developed, and portions that are not exposed to light are removed to form organic patterns 33 in the reflective area RtA. At this time, an inclination angle of a convex pattern (to be formed later) may be changed by controlling a distance between the organic patterns 33. Here, the photosensitive organic material is a negative type, where a portion that is not exposed to light is removed. A photosensitive organic material of a positive type, where a portion that is exposed to light is removed, may also be used.
As shown in FIG. 2C, the substrate 3 including the organic patterns 33 of FIG. 2B is heat-treated, and thus convex patterns 35 are formed. Surfaces of the organic patterns 33 of FIG. 2B are melted through a heat-treatment process to spread out, and then is hardened resulting in the convex patterns 35.
As shown in FIG. 2D, a second passivation layer 37 is formed by coating the same organic material as the convex patterns 35 on an entire surface of the substrate 3 including the convex patterns 35. The second passivation layer 37 has an uneven surface, which has a proper inclination angle, due to the convex patterns 35 in the reflective area RtA and a flat surface in the transmissive area TmA.
Next, as shown in FIG. 2E, a second mask process is carried out and the second passivation layer 37 and the first passivation layer 30 are patterned. Thus, in the reflective area RtA, a drain contact hole 44 exposing the drain electrode 24 is formed, and in the transmissive area TmA, the second passivation layer 37 and the first passivation layer 30 are removed to form a step between the reflective area RtA and the transmissive area TmA.
A reflector 41 is formed on the second passivation layer 37 in the reflective area RtA by depositing a metal material that reflects light well and then patterning it. At this time, the reflector 41 also has an uneven surface due to the second passivation layer 37. The metal material is removed in the transmissive area TmA and thus there exists no reflector 41 in the transmissive area TmA. The reflector 41 contacts the drain electrode 24 through the drain contact hole 44 and functions as a reflective electrode.
As shown in FIG. 2F, a pixel electrode 49 is formed by depositing a transparent conductive material on the substrate 3 including the reflector 41 thereon and then patterning it. The pixel electrode 49 contacts the reflector 41 in the reflective area RtA and contacts a gate insulating layer 15 in the transmissive area TmA.
In the manufacturing method of the above array substrate, two mask processes are required for forming the uneven passivation layer. That is, the first mask process is performed for forming the convex patterns and the second mask process is carried out for forming the drain contact hole and the step between two areas in the second passivation.
The cost of materials may be increased because of twice coating an organic material. In addition, when the convex patterns are formed of a first organic layer and the second passivation layer is formed of a second organic layer over the convex patterns, the unevenness of the convex patterns may not be thoroughly reflected in the second passivation. Thus, the reflector may have a bad and uneven surface.

Manufacturing method of array substrate for liquid crystal display device


A lithographic projection apparatus includes conduits which supply utilities to components in a vacuum chamber such as object tables and/or associated motors and/or sensors. The conduits are shielded from exposure to the vacuum by conduit conducts having at least the same number of degrees of freedom as their associated object table.

1. Field of the Invention
The present invention relates to lithographic projection apparatus, and more particularly to apparatus including conduits for providing utilities such as power, water, control signals and gases through cables, hoses or pipes to a movable component in a vacuum chamber.
2. Background of the Related Art
A lithographic projection apparatus in accordance with the present invention generally includes a radiation system for providing a projection beam of radiation, a first object table for supporting patterning structure, the patterning structure serving to pattern the projection beam according to a desired pattern, a second object table for holding a substrate, a vacuum chamber provided with a first gas evacuating means for generating a vacuum beam path for the projection beam, a projection system for projecting the patterned beam onto a target portion of the substrate and conduits for providing utilities to a component moveable in at least one degree of freedom in said vacuum chamber.
The term "patterning structure" as here employed should be broadly interpreted as referring to means that can be used to endow an incoming radiation beam with a patterned cross-section, corresponding to a pattern that is to be created in a target portion of the substrate; the term "light valve" can also be used in this context. Generally, the said pattern will correspond to a particular functional layer in a device being created in the target portion, such as an integrated circuit or other device (see below). Examples of such patterning structure include:
A mask. The concept of a mask is well known in lithography, and it includes mask types such as binary, alternating phase-shift, and attenuated phase-shift, as well as various hybrid mask types. Placement of such a mask in the radiation beam causes selective transmission (in the case of a transmissive mask) or reflection (in the case of a reflective mask) of the radiation impinging on the mask, according to the pattern on the mask. In the case of a mask, the first object table will generally be a mask table, which ensures that the mask can be held at a desired position in the incoming radiation beam, and that it can be moved relative to the beam if so desired.
A programmable mirror array. An example of such a device is a matrix-addressable surface having a viscoelastic control layer and a reflective surface. The basic principle behind such an apparatus is that (for example) addressed areas of the reflective surface reflect incident light as diffracted light, whereas unaddressed areas reflect incident light as undiffracted light. Using an appropriate filter, the said undiffracted light can be filtered out of the reflected beam, leaving only the diffracted light behind; in this manner, the beam becomes patterned according to the addressing pattern of the matrix-addressable surface. The required matrix addressing can be performed using suitable electronic means. More information on such mirror arrays can be gleaned, for example, from U.S. Pat. No. 5,296,891 and U.S. Pat. No. 5,523,193, which are incorporated herein by reference. In the case of a programmable mirror array, the first object table may be embodied as a frame or table, for example, which may be fixed or movable as required.
A programmable LCD array. An example of such a construction is given in U.S. Pat. No. 5,229,872, which is incorporated herein by reference. As above, the first object table in this case may be embodied as a frame or table, for example, which may be fixed or movable as required.
For purposes of simplicity, the rest of this text may, at certain locations, specifically direct itself to examples involving a mask and mask table; however, the general principles discussed in such instances should be seen in the broader context of the patterning structure as hereabove set forth.
Lithographic projection apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, the patterning structure may generate a circuit pattern corresponding to an individual layer of the IC, and this pattern can be imaged onto a target portion (e.g. comprising one or more dies) on a substrate (silicon wafer) that has been coated with a layer of radiation-sensitive material (resist). In general, a single wafer will contain a whole network of adjacent target portions that are successively irradiated via the projection system, one at a time. In current apparatus, employing patterning by a mask on a mask table, a distinction can be made between two different types of machine. In one type of lithographic projection apparatus, each target portion is irradiated by exposing the entire mask pattern onto the target portion at once; such an apparatus is commonly referred to as a wafer stepper. In an alternative apparatus—commonly referred to as a step-and-scan apparatus—each target portion is irradiated by progressively scanning the mask pattern under the projection beam in a given reference direction (the "scanning" direction) while synchronously scanning the substrate table parallel or anti-parallel to this direction; since, in general, the projection system will have a magnification factor M (generally <1), the speed V at which the substrate table is scanned will be a factor M times that at which the mask table is scanned. More information with regard to lithographic devices as here described can be gleaned, for example, from U.S. Pat. No. 6,046,792, incorporated herein by reference.
In a manufacturing process using a lithographic projection apparatus, a pattern (e.g. in a mask) is imaged onto a substrate that is at least partially covered by a layer of radiation-sensitive material (resist). Prior to this imaging step, the substrate may undergo various procedures, such as priming, resist coating and a soft bake. After exposure, the substrate may be subjected to other procedures, such as a post-exposure bake (PEB), development, a hard bake and measurement/inspection of the imaged features. This array of procedures is used as a basis to pattern an individual layer of a device, e.g. an IC. Such a patterned layer may then undergo various processes such as etching, ion-implantation (doping), metallization, oxidation, chemo-mechanical polishing, etc., all intended to finish off an individual layer. If several layers are required, then the whole procedure, or a variant thereof, will have to be repeated for each new layer. Eventually, an array of devices will be present on the substrate (wafer). These devices are then separated from one another by a technique such as dicing or sawing, whence the individual devices can be mounted on a carrier, connected to pins, etc. Further information regarding such processes can be obtained, for example, from the book "Microchip Fabrication: A Practical Guide to Semiconductor Processing", Third Edition, by Peter van Zant, McGraw Hill Publishing Co., 1997, ISBN 0-07-067250-4, incorporated herein by reference.
For the sake of simplicity, the projection system may hereinafter be referred to as the "lens"; however, this term should be broadly interpreted as encompassing various types of projection system, including refractive optics, reflective optics, and catadioptric systems, for example. The radiation system may also include components operating according to any of these design types for directing, shaping or controlling the projection beam of radiation, and such components may also be referred to below, collectively or singularly, as a "lens". Further, the lithographic apparatus may be of a type having two or more substrate tables (and/or two or more mask tables). In such "multiple stage" devices the additional tables may be used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposures. Twin stage lithographic apparatus are described, for example, in U.S. Pat. No. 5,969,441 and WO 98/40791, incorporated herein by reference.
In a lithographic apparatus, the size of features that can be imaged onto the substrate is limited by the wavelength of the projection radiation. To produce integrated circuits with a higher density of devices and hence higher operating speeds, it is desirable to be able to image smaller features. While most current lithographic projection apparatus employ ultraviolet light generated by mercury lamps or excimer lasers, it has been proposed to use shorter wavelength radiation of around 13 nm. Such radiation is termed extreme ultraviolet (EUV) or soft x-ray, and possible sources include laser produced plasma sources, discharge plasma sources or synchrotron radiation from electron storage rings. An outline design of a lithographic projection apparatus using synchrotron radiation is described in "Synchrotron radiation sources and condensers for projection x-ray lithography", J B Murphy et al, Applied Optics Vol. 32 No. 24 pp 6920-6929 (1993).
Other proposed radiation types include electron beams and ion beams. Further information with regard to the use of electron beams in lithography can be gleaned, for example, from U.S. Pat. No. 5,079,122 and U.S. Pat. No. 5,260,151, as well as from EP-A-0 965 888. These types of beam share with EUV the requirement that the beam path, including the mask, substrate and optical components, be kept in a high vacuum. This is to prevent absorption and/or scattering of the beam, whereby a total pressure of less than about 10−6 millibar is typically necessary for such charged particle beams. Otherwise, for apparatus using EUV radiation, the total vacuum pressure need only be between 10−3 and 10−5 millibar. Optical elements for EUV radiation can be spoiled, by the deposition of carbon layers on their surface, which imposes the additional requirement that hydrocarbon partial pressures should generally be kept as low as possible, for example below 10−8 or 10−9 millibar.
Working in a high vacuum imposes quite onerous conditions on the components that must be put into the vacuum. For components inside the vacuum chamber, materials that minimize or eliminate contaminant and total outgassing, i.e. both outgassing from the materials themselves and from gases adsorbed on their surfaces, should be used. It has been found that for the desired degree of movement required by the object holders, conduits can be made of plastics materials such that they are flexible enough. These types of materials often are deleterious to the vacuum in the vacuum chamber because outgassing of contaminants as described above will occur. There are plastics better suited for vacuum applications (for example teflon) but the large number of cables and lines which are required to be lead through the vacuum present a large surface area to outgassing of contaminants. It will be difficult to get a partially hydrocarbon pressure below 10−8 or 10−9 millibar, for example, when plastic conduits are used. Furthermore, the risk of leaks from conduits makes their use impractical. It would be very desirable to be able to reduce the use of conduits. However, conventional designs of substrate, mask and transfer stages are very complicated and employ large numbers of sensors and drive arrangements, which all need a large numbers of conduits for conveying water and gases and for protecting electric wiring.
To circumvent this problem it has been proposed in U.S. Pat. No. 4,993,696 to use metal pipes made of stainless material for the supply and exhaustion of an operating fluid or gas in a vacuum ambience. Two adjacent pipes may then be coupled with each other by a joint, which is arranged to allow swingable movement of one of the pipes relative to the other. The metal pipes will not suffer from outgassing as the nylon conduits will do. A disadvantage of the joints is that it is very difficult to design joints that are totally closed for fluids or gases in a vacuum environment. Therefore, there may be leakage of gases through the joint to the vacuum environment that will contaminate the vacuum environment.
Another solution has been proposed by European Patent Application 1052549. In this publication conduits are fed through hollow pipes that are rigidly connected to a movable object table and which pipes are used to transfer movements from outside a vacuum chamber to said table. The pipes are hollow and the pressure within the pipes is equal to the pressure outside the vacuum chamber. Between the wall of the vacuum chamber and the pipes differentially pumped seals are used to prevent the leakage of air to the vacuum chamber and at the same time allowing for movement of the object table.

Lithographic apparatus, device manufacturing method, and device manufactured thereby


Methods and systems are provided for a compressed natural gas fuel rail. In one example, a system comprises a device having a first volume for housing compressed natural gas and a second volume for housing lubricant, the first and second volumes arranged in a single housing and separated by a barrier. Lubricant flow from the second volume to the first volume may be adjusted by adjusting a pressure of the second volume so that a pressure difference between the second and first volumes is increased to increase lubricant flow or decreased to decrease lubricant flow.

Recently, natural gas has also been increasingly used as a fuel for motor vehicles with corresponding engines. The storage, transportation, and refueling are either carried out as Compressed Natural Gas (CNG), which may be heavily compressed but still gaseous natural gas, or as liquefied natural gas (LNG), which may be natural gas which has been liquefied by severe cooling and is kept in liquid form through storage in pressurized vessels.
The advantage of natural gas may be fewer emissions as a result of combustion compared to gasoline and diesel. In the case of CNG this is because, on the one hand, CNG is already present in a homogeneous gaseous form in the combustion chamber and not in an atomized form like gasoline and diesel, and, on the other hand, the molecule chains contain only approximate half as many carbon atoms with respect to the hydrogen atoms as those in gasoline and diesel, that is when combustion occurs with oxygen more water (H2O) and less carbon dioxide (CO2), and soot are produced.
At normal atmospheric pressure (e.g., 1 atm and/or about 1 bar), natural gas has a very low energy density in comparison with diesel fuel, for example—at 0.036 MJ/Liter a lower volumetric calorific value than that of diesel which is 34.7 MJ/Liter, the natural gas is compressed to approximately 200 bar, in order to be able to carry along a sufficient quantity of energy with an acceptable volume in the motor vehicle.
The drive differs in that, instead of a gasoline/air mixture, a natural gas/air mixture is compressed, ignited and burnt in the cylinders.
Internal combustion engines which are operated with CNG as the fuel may comprise injection nozzles different than injection nozzles found in gasoline and diesel engines. For continuous operation, a minimum degree of lubrication may be desired, but the fuel CNG does not provide this while gasoline and diesel may additionally function as lubricants. Thus, CNG injection nozzles may demand an auxiliary source of lubrication not common to gasoline and diesel engines. A certain degree of lubrication is brought about by the fact that leaked oil passes from a compressor of a CNG filling station to the inlet nozzles. However, this is not sufficiently reliable. Therefore, the service life and operational reliability are limited, since the lack of lubrication may cause increased wear.
Therefore, an object of the present disclosure is to indicate ways in which the lubrication of an injection nozzle of an internal combustion engine which is operated with CNG as a fuel can be improved.
The object of the present disclosure is achieved by a device for metering lubricant for a fuel injection nozzle for injecting CNG into an internal combustion engine, with an injection rail with a first volume for holding lubricant and a second volume for holding CNG, wherein the first volume is separated from the second volume by a separator element which is embodied so as to be permeable to lubricant.
The inflow of lubricant can be influenced in a targeted fashion by the separator element. During operation, a sufficient quantity of lubricant may be supplied, with the result that degradation owing to a lack of lubrication is mitigated.
According to one embodiment, the separator element may comprise a sponge-like structure at least in certain sections. For example, the separator element can be fabricated from a foamed material, such as e.g. plastic or metal. In this context, the separator element has, in the sections with the sponge-like structure, an open-celled construction, (e.g., the cell walls are not closed). Therefore, the separator element can take up fluids and allow them to pass.
According to a further embodiment, the separator element has a semi-permeable layer for the lubricant at least in certain sections. For example, the separator element can have sections which permit only molecules with less than a specific mole mass or colloids or particles of less than a specific size to pass through, while relatively large molecules or colloids cannot pass.
According to a further embodiment, the separator element is a perforated plate at least in certain sections. The plate can be perforated during its manufacture or after its manufacture by the introduction and/or machining of through-openings.
According to a further embodiment, lubricant can be fed into the second volume through an oil port. The oil port can be connected to a lubricant circuit of the internal combustion engine, with which components of the internal combustion engine, such as pistons mounted in cylinders, can be lubricated. For this purpose, the oil port can be connected to an oil gallery or to an oil sump of the internal combustion engine. In addition, convenient refilling can also be carried out through the oil port when the lubricant supply is exhausted.
According to a further embodiment, lubricant can be pressurized in the second volume by a pressure port. Thus, a feed pressure can be built up by which lubricant can be fed to the fuel injection nozzle. This may occur without a pump.
According to a further embodiment, the pressure port is connected by a branch line to a gas line with which CNG can be fed into the first volume. Therefore, the high gas pressure under which CNG is stored is used to supply the feed pressure. Drive assemblies for generating pressure can thus be dispensed with.
According to a further embodiment, a gas pressure regulator is assigned to the branch line. With the gas pressure regulator, it is possible to regulate the gas pressure and therefore the feed pressure. With the gas pressure regulator, it is thus possible to even out pressure fluctuations in the pressure with which CNG is stored. When desired, the feed pressure can also be increased in order thereby to increase the feed rate of the lubricant if necessary.
In one example, the issues described above may be addressed by a system comprising a device comprising a first volume fluidly coupled to a lubricant port, a second volume configured to deliver compressed-natural-gas directly to an injection rail, wherein the first volume and the second volume are separated by a separator element shaped to allow lubricant to flow from the first volume to the second volume. In this way, the fuel injectors configured to inject a non-lubricating fuel may receive lubrication.
As one example, an amount of lubricant flowing from the first volume to the second volume may be adjusted via adjusting a pressure of the first volume. The first volume pressure may be adjusted via one or more of a pressure regulator and/or an oil pump. By doing this, the device may precisely flow a desired amount of lubricant such that the fuel injectors are sufficiently lubricated while preventing over-lubrication, thereby conserving lubricant for other components desired lubrication.
It should be understood that the summary above is provided to introduce in simplified form a selection of concepts that are further described in the detailed description. It is not meant to identify key or essential features of the claimed subject matter, the scope of which is defined uniquely by the claims that follow the detailed description. Furthermore, the claimed subject matter is not limited to implementations that solve any disadvantages noted above or in any part of this disclosure.

Methods and systems for a lubricating device


A pressure compensating molding system with die faces of thin sheets. A thin die sheet separates a mold cavity from a heating/cooling cavity. A heating system causes a heated fluid to flow through the heating/cooling cavity, thereby preheating the thin sheet. The injection material is forced through a sprue into the mold cavity. Pressure sensors monitor the pressure of the injection material in the mold cavity and in the heating/cooling cavity. A controller varies the pressure in the heating/cooling cavity to equalize a pressure differential across the thin die sheet. A cooling system causes a cooling fluid to flow through the heating/cooling cavity to cool the molded component.

1. Field of Invention
This invention pertains to a molding system. More particularly, this invention pertains to a molding system in which the die faces are formed of thin sheets that are heated and cooled on demand by a fluid outside the mold cavity. Further, the dimensional stability of the thin sheets is maintained by equalizing the pressure between the mold cavity and the fluid cavities on the opposite side of each thin sheet.
2. Description of the Related Art
A common manufacturing method is molding in which a material is placed in a cavity and the material is set or cured to conform to the shape of the cavity. For example, one type of molding process is injection molding, which involves injecting a molten material into a cavity under high pressure. The pressure forces the molten material to flow throughout the cavity. As the molten material cools, it hardens. Temperature control of the injection mold allows the molten material to flow throughout the cavity and to also aid in the setting or curing of the material. The molten material must be maintained above its melting temperature while being injected and filling the cavity. Then the heat from the molten material must be removed to set or cure the material into a molded product.
Typically, a mold is at a lower temperature than the melting temperature of the molten material. As the molten material is injected it cools as heat is transferred to the mold. The injection pressure is maintained at a level sufficient to force the molten material into the cavity. As the molten material begins to cool as it flows, a high injection pressure is required to maintain the flow of the material into the cavity. The high injection pressure requires that the mold be massive and have sufficient structural strength to prevent the mold cavity from deforming when subjected to high injection pressures.
Because molds are massive to withstand the high injection pressures, the molds have high thermal mass. Generally, it is desirable to maintain the temperature of the mold within certain limits to minimize shrinkage and distortion of the material as it sets or cures. Temperature control also ensures uniformity among replicated molded objects. As the mold is used repeatedly, excess heat must be removed quickly to minimize downtime between injecting the molten material for another object. But, the high thermal mass results in difficulties in controlling the mold temperature.
Many ingenious attempts have been made to control the temperature of conventional, massive molds. For example, U.S. Pat. No. 5,762,972 discloses an injection molding system that uses induction heating to quickly heat the mold. U.S. Pat. No. 6,846,445 discloses a mold that uses surface heating generated by surface current due to proximity effect and/or skin effect on the mold insert powered by radio-frequency or high-frequency electrical current. U.S. Pat. No. 6,312,628 discloses a mold that uses low pressure water to cool the mold. The patented apparatus uses water phase change, from liquid to steam, to increase the heat transfer from the mold.
Temperature control is desirable for other molding processes, not just injection molding. For example, resin transfer molding uses a molding material that is exothermic, that is, it gives off heat as the material cures. This excess heat must be removed to avoid undesirable artifacts in the molded object. It is also desirable for the mold to be at an elevated temperature to aid the filling of the mold. For example, U.S. Pat. No. 5,653,907 discloses a shell mold with a hollow support structure with a plurality of intersecting upstanding support ribs supporting a substrate layer that supports a thin, hard, thermally responsive mold shell. The substrate acts as a heat sink to dissipate heat from the shell.


A soother device for calming infants and children and inducing sleep. The soother includes a light source and a rotating image bar through which light from the source is projected to generate a soothing light pattern visible to the infant or child, for example in wave form or having the appearance of moving water or light reflecting from moving water.

Some infants and children have difficulty falling asleep or sleeping on a regular schedule. It has been discovered that certain visible images or patterns may have a calming effect on infants and children. It is to the provision of a crib soother device for attachment to or around a crib or other sleeping area to generate visible light patterns or images to help calm infants and children, that the present invention is primarily directed.


A vehicle control system is provided for a vehicle that is steered by steer-by-wire, the system including a battery mounted in the vehicle, a steer-by-wire steering system that turns wheels by an electric motor that is operated by electric power supplied from the battery, a steering controller for controlling the operation of the steer-by-wire steering system, and an engine controller for controlling, by electric power supplied from the battery, the operation of an engine for making the vehicle travel. A booster circuit boosts the voltage applied to the steering controller so that, when the voltage of the battery decreases, the voltage applied to the engine controller falls below its minimum operating voltage before the voltage applied to the steering controller falls below its minimum operating voltage. With this arrangement, it is possible to provide fail-safe operation when there is a decrease in the voltage of the battery which supplies electricity to the steering controller.

1. Field of the Invention
The present invention relates to a vehicle control system that includes a battery mounted in a vehicle, an electrically operated device that is operated by electric power supplied from the battery and drives a critical system of the vehicle, electrically operated device control means for controlling the operation of the electrically operated device, and engine control means for controlling, by electric power supplied from the battery, the operation of an engine for making the vehicle travel.
2. Description of the Related Art
Japanese Patent Application Laid-open No. 11-5550 and Japanese Patent No. 3364673 disclose steer-by-wire (SBW) steering systems in which mechanical connection between a steering wheel and a steering gearbox is absent, and steering control means controls the drive of an electric motor provided in the steering gearbox based on an electrical signal generated by operation of the steering wheel, thereby turning left and right wheels.
However, because mechanical connection between the steering wheel and the steering gearbox is absent in the steer-by-wire steering system and the wheels are turned by driving the steering gearbox by the driving force of the electric motor which employs a battery as a power source, if the voltage of the battery that supplies electricity to the steering control means decreases, appropriate turning of the wheels may become impossible.


A stacked set of playing cards are supported to expose an information bearing portion bearing a first machine-readable indicia and an information bearing portion bearing a second machine-readable indicia, such that each of the first and second machine-readable indicia from a number of cards are read by at least one reader. The second machine-readable indicia may provide redundancy, or may be related to the first machine-readable indicia to allow the authentication of the playing card.

1. Field of the Invention
The present description generally relates to the automated gaming systems and in particular automated systems for card games.
2. Description of the Related Art
Casinos and other forms of gaming are a multi-billion dollar, worldwide industry. Typically, a customer exchanges currency or some form of credit for a casino's wagering tokens, commonly known as chips. The customer places the chips as wagers at various table games, for example card games such as Blackjack or twenty-one, Hi/Low, Poker and LET IT RIDE®. The game operator, such as a dealer, pays out winning wagers with additional chips based on the set of odds for the particular game. The dealer collects the customer's wagered chips for losing wagers. The odds of each game slightly favor the casino, so on average the casino wins and is profitable.
Card games are a well-known form of recreational entertainment. Games are typically played with one or more decks of cards, where each deck typically includes 52 cards of four suits (i.e., hearts, diamonds, clubs, and spades), each suit including 14 cards of varying rank (i.e., 2–10, Jack, Queen, King and Ace). Card games may, or may not, include wagering based on the game's outcome. One popular card game is known as blackjack or twenty-one. In blackjack, one or more players compete against the dealer. The players attempt to collect a hand having a total value equal to, or as close to 21, without going over. The value of the hand is determined by the rank of the card. Thus, cards having rank 2–10 have the value 2–10 respectively. Face cards (i.e., Jack, Queen, King) each have the value 10, while Aces can have the value 1 or 10 at the player's discretion. An initial hand of two cards having the value of 21 (i.e., an Ace plus a 10 or a face card) is referred to as a natural "21", or blackjack, and beats other hands with the value of 21. Suits have no bearing on the game of blackjack.
Card games are particularly popular in casinos and other gaming establishments. Players wager large sums of money while playing card games, thus, it is desirable to ensure that those playing the game are not cheating, for example by substituting one or more cards into the deck or hand, or marking cards. It is also desirable to ensure that those playing the game are not using various prohibited strategies, such as card counting. Further, it is desirable to monitor the game in a relatively unobtrusive manner to allow casino customers to feel comfortable in their surroundings.

Method, apparatus and article employing multiple machine-readable indicia on playing cards


A pilot signal is transmitted from a transmitting device through a communication network under test to a receiving device. The pilot signal is transmitted at a known transmit time and in a voice channel. Incoming signals within the voice channel at the receiving device are monitored to detect receipt of the pilot signal. A receipt time of the pilot signal at the receiving device is identified. The one-way delay (OWD) is determined as a difference between the receipt time of the pilot signal at the receiving device and the transmit time of the pilot signal from the transmitting device.

Testing of communication equipment and networks often involves emulating telephone calls to generate diagnostics regarding the connection and performance of the calls. The emulated calls can exercise many different components within the communication network, including combinations of analog and digital components. Due to the complexity of modern communication networks and the combined use of analog and digital components, it is difficult to assess the performance of the communication network on a component-level basis. For example, in determining the one-way delay (OWD) corresponding to the time required for a voice packet to travel through the communication network from a transmitting phone to a receiving phone, it is difficult if not impossible to address the OWD on a component-by-component basis. Therefore, a solution is needed for determining OWD through a communication network without requiring the communication network to be evaluated on a component-level basis with respect to the time required for the voice packet to be transmitted through each component. Additionally, the solution should be applicable to heterogeneous communication networks that combine analog and digital communication technologies.

Method and system for one-way delay measurement in communication network


A universal joint apparatus having jointed shaft suited for transmitting high torques, comprising a spider and two yokes for fitting the arms of the spider. Each spider arm is fitted, with a bearing setup having a radial bearing with an outer ring and an inner ring, an axial bearing arranged in the area of the spider arm wrist, in a yoke eye associated with the latter. The axial bearing is disposed in a connecting structure of elastic behavior.

The invention relates to a universal joint for a jointed haft.
Spider bearing apparatuses are known in various styles from the following documents:
1. DE 35 44 253 C1 PA1 2. DE 34 46 495 C2 PA1 3. SU 15 07 480 A1
DE 35 44 253 C1 discloses a spider bearing apparatus comprising a radial bearing and an axial bearing, the inner ring of the radial bearing resting on its outside via a collar on the spider arm end face and featuring inside a further collar that forms the inner ring of the axial bearing. The axial force is not introduced by way of collars on the spider arm wrist, but via the spider arm end face. The radially outer collar that provides support on the spider arm end face is designed as a detachable component, facilitating both the manufacture of the bearing sleeve itself and also the assembly and axial play adjustment. A favorable embodiment is marked by the ability to remove the collar disk after assembly.
DE 34 46 495 C2 teaches a universal joint style with a spider whose arms are joined to the arms of two yokes each by way of an antifriction bearing apparatus. The latter comprises a radial bearing with an inner ring and an outer ring secured against axial displacement in the eye of the yoke as well as an axial bearing arranged radially within the radial bearing on the spider arm. The outer ring of the radial bearing features a raceway for the rollers of the axial bearing. The inner ring of the radial bearing has a collar disposed radially inside, which extends away from the spider arm axis and is fashioned as a radially inner raceway for the rollers of the axial bearing. The design of the inner ring of the radial bearing is such that it is placed on the spider arm up to an outer stop fashioned as a collar.
Common to both designs is that the occurring transverse forces are introduced in the yoke as traction forces in the direction of the spider arm axis away from the axis of the joint. However, this makes it necessary to secure the bearing rings in this direction and requires additional force transmission elements for transmitting the axial forces that are directed away from the joint axis on the shortest path to the yoke, which expresses itself in a greater number of components, elevated assembly expense and thus additional cost.
A reversal of the force introduction in the yoke is realized with a design according to SU 15 07 480 A1. Here, the axial bearing is arranged in the area of the spider arm wrist. The outer raceway of the axial bearing, viewed in axial direction, is formed by the inner ring or sleeve of the radial bearing. The inner raceway is formed by a separate annular element featuring a collar that bears on the yoke while its end face serves as a bearing face for the end face of the outer ring of the radial bearing, which end face is directed toward the axis of the joint. But this design requires a high manufacturing accuracy in order to guarantee an optimum load performance of the axial bearing. Under load, however, especially under the effect of transverse acceleration, this design leads to an unsatisfactory transmission and directing of the transverse forces in the yoke, since the components backing the raceways of the axial bearing (inner ring of the radial bearing and annular element, due to its relatively short support in the bearing bore and the rigid fitting of the axial bearing), show under these conditions, appreciable positional deviations from the fitting position relative to one another.

Universal joint apparatus for a cardan shaft


A graphics pipeline includes a cache having cache lines that are configured to store data used to process frames in a graphics pipeline. The graphics pipeline is implemented using a processor that processes frames for the graphics pipeline using data stored in the cache. The processor processes a first frame and writes back a dirty cache line from the cache to a memory concurrently with processing of the first frame. The dirty cache line is retained in the cache and marked as clean subsequent to being written back to the memory. In some cases, the processor generates a hint that indicates a priority for writing back the dirty cache line based on a read command occupancy at a system memory controller.

Processing systems including graphics processing units (GPUs) implement a cache hierarchy (or multilevel cache) that uses a hierarchy of caches of varying speeds to store frequently accessed data. Data that is requested more frequently is typically cached in a relatively high speed cache (such as an L1 cache) that is deployed physically (or logically) closer to a processor core or compute unit. Higher-level caches (such as an L2 cache, an L3 cache, and the like) store data that is requested less frequently. A last level cache (LLC) is the highest level (and lowest access speed) cache and the LLC reads data directly from system memory and writes data directly to the system memory. Caches differ from memories because they implement a cache replacement policy to replace the data in a cache line in response to new data needing to be written to the cache line. For example, a least-recently-used (LRU) policy replaces data in a cache line that has not been accessed for the longest time interval by evicting the data in the LRU cache line and writing new data to the LRU cache line. The GPU processes data on a frame-by-frame basis, e.g., a graphics pipeline in the GPU renders one frame at a time. Thus, the cache hierarchy used to cache data for the graphics pipeline evicts dirty data from the caches at the end of one frame and before the start of the subsequent frame. Evicting the dirty data requires writing the dirty cache lines back to system memory, which consumes a significant amount of bandwidth and leads to bottlenecks for traffic between the cache hierarchy and the system memory. The bottlenecks have a significant performance impact on the GPU at the start of the subsequent frame because of the constrained bandwidth for reading new data into the clean cache lines and writing dirty cache lines back to the system memory.

Selectively writing back dirty cache lines concurrently with processing


A wheel angle determining device includes a position sensor being provided on a vehicle wheel assembly to directly measure a wheel angle. The wheel assembly having a first portion being fixedly connected to a vehicle and a second portion being rotatable about an axis formed in a plane substantially perpendicular to a vehicle travel direction. The second portion of the vehicle wheel assembly including a vehicle wheel. The position sensor having a first end operatively connected to the first portion of the vehicle wheel assembly and a second end operatively connected to the second portion of the vehicle wheel assembly.

1. Field of the Invention
The present invention relates to a position sensor for sensing a position of, for example, a wheel of a vehicle, such as an automobile, a bus, a truck, a tractor, etc., or a position of a rudder or propeller system of a boat, airplane, etc.
2. Description of the Background Art
A steering system is a major system required for driver operation of a vehicle to control a path of the vehicle. Typically, a driver uses a steering wheel that turns a steering shaft. The steering shaft is usually connected through a rack and pinion gear and additional mechanical linkages, such as a tie rod, to the front wheels. The angle between the front wheel plane and the longitudinal axis of the vehicle is commonly referred to as a wheel angle or a steering angle. This wheel angle is proportional to the rotational angle of the driver's steering wheel.
Some vehicles may be designed with a rear wheel steering system that compliments the front wheel steering system. Because the vehicle operator cannot independently operate two steering systems, obviously, the front and rear wheel steering systems must be coordinated, which is preferably performed via an electronic control systems.
A schematic illustration of a vehicle four-wheel steering system is illustrated in FIG. 1, which is described in U.S. Pat. No. 6,580,988. The vehicle 1 includes front wheels 3 and rear wheels 5. The front wheels 3 are steered together using a known gear and linkage mechanism that can be coupled with a power steering system. The front wheels 3 are connected by a tie rod 7, which is attached to control arms (not shown) of the wheels. The vehicle operator steers the front wheels 3 using a steering wheel 9 attached to a steering shaft 11, which is connected to the tie rod 7 by a linkage system (not further shown), for example, a rack and pinion.
A rear wheel steering mechanism is schematically illustrated at 13, which includes a reversible electrical motor drive that actuates a tie rod (not shown) that is operatively connected to the rear wheels 5. The steering of the rear wheels 5, however, is not under the direct control of the vehicle operator. A rear wheel steering controller 15, which receives data concerning the position of the steering wheel 9 from a position sensor 17 that is provided somewhere on the steering shaft 11, controls the rear wheels 5.
As noted above, conventional steering position sensors are typically provided on the steering shaft of a vehicle and must be able to determine at least a 360 degree rotation of the steering shaft, because, as is commonly known, in order for a vehicle operator to steer the wheels to their maximum steering angle, the steering wheel has to be turned through several 360 degree rotations.
U.S. Publication 2003/0145663, which corresponds to DE 100 41 095 A1, discloses a device for measuring an angle by magnetic sensors or optical sensors. This position sensor, however, must still be fashioned to the steering shaft of a vehicle.
The prior art devices, however, are not able to determine the precise wheel angle of a vehicle wheel because they do not take into account mechanical play of the linkages of a vehicle between the steering shaft and the wheels. Further, this mechanical play increases with wear and tear on a vehicle. Thus, the accuracy of the wheel position continuously decreases as the mechanical play between the linkages increases.
In addition, in particular for the case of vehicles having four wheel steering, as described above, the only provision for determining a wheel position of the rear wheels is typically performed by a position sensor provided directly on the steering shaft. Thus, a single position sensor mounted on the steering shaft provides the position of all four wheels of a vehicle.
Moreover, in particular for the case of an optical position sensor, the conventional position sensor are susceptible to dirt and debris and must therefore be mounted along the steering shaft within the vehicle compartment or require a substantial enclosure to protect the position sensor from the environment, which, may not be feasible because of limited space about the steering shaft or because of economic reasons.


A 3D landscape real-time imager, and method for operating such an imager, where the imager includes:                at least one illuminating part which is designed to scan at least a portion of the landscape at a given range and having an ultra-short laser pulse source emitting at least one wavelength, and an optical rotating block, with a vertical axis of rotation, and controlled such that given packets of pulses are shaped in a pattern of rotating beams sent toward the at least partial landscape; and        at least one receiving part which includes a set of SPAD detector arrays, each arranged along a vertical direction and rotating at a given speed in synchronism with the optical rotating block of the illuminating part, the detection data of the SPAD detector arrays being combined to acquire 3D imaging data of the at least partial landscape in a central controller.

Some 3D imagers exist today. An example of such a prior art is WO-2009139971 (A2), entitled "COMPUTER VISION-BASED MULTI-TOUCH SENSING USING INFRARED LASERS". Another patent application US-A-2002033818, entitled "Three-dimensional relative positioning and tracking using LDRI" teaches the use of a laser to illuminate a target and then to acquire an enhancement of the imagery produced on the basis of such an illumination. Such 3D imagers are also described in a textbook entitled 'Principles of 3D image analysis and synthesis', Bernd Girod, Günther Greiner, Heinrich Niemann, (Chapter 1.2), Kluwer 2002. Such 3D imagers have a very high depth accuracy. They are mostly limited in their characteristics of speed of acquisition and measurement distance. They all require that no or very few light pulses are emitted before another previously emitted pulse is received and measured. This limitation arises from the risk of confusion of pulses if multiple pulses are on the way between transmitter and receiver at one time. Also, high repetition rate pulses may lead to problems if common optics are used for the emission and reception of pulses, because optical elements may cause partial reflections of pulses. The measurement distance of such devices is limited by the low energy of the pulses they use to maintain eye safety. They then use multiple low-power pulses separated by large time intervals and then average the results to measure a distance for a 3D pixel. Such techniques are not suitable for obtaining fast landscape imaging. In such a technique, a 3D imager should be able to scan the surroundings in nearly all directions.
In other technical fields, some devices are using light at 1.5-μm near-infrared (NIR) wavelength. They are mainly long distance rangefinders or airborne lidars using the relatively eye-safe properties of that wavelength region, as such light is absorbed in the eye's lens. However, it is not possible to generate an image on the basis of such a lidar with a high resolution, at all ranges. Further, the time to acquire a complete frame of the scene is long, especially when the scanned scene is a complete landscape.

3D landscape real-time imager and corresponding imaging methods


One example describes a superconducting XOR-gate system. The system includes a pulse generator configured to generate a decision pulse. The system also includes an input superconducting XOR-2 gate that receives a first superconducting logic input signal and a second superconducting logic input signal and is configured to perform a logic XOR function based on the decision pulse on a given phase of a clock signal to provide an intermediate superconducting logic output signal. The system also includes an output superconducting XOR-2 gate that receives the intermediate superconducting logic output signal and a third superconducting logic input signal and is configured to perform a logic XOR function based on the decision pulse on the given phase of the clock signal to provide a superconducting logic output signal.

Logic gates are an integral aspect of computer processing. Traditional computer processing that implements complementary metal-oxide semiconductor (CMOS) provides for a simplified manner of implementing logic gates using binary signals. However, superconducting technology introduces additional challenges to fabricating logic gates and implementing logic operations. As an example, in wave-pipeline (WPL) superconducting technologies, such as reciprocal quantum logic (RQL), the exclusive-OR (XOR) gate is accomplished in such a way that the maximum input size is two, and each XOR gate is implemented on a different phase boundary of an associated clock signal relative to each other. As a result, XOR gates that require more than two logic inputs operate out-of-phase with respect to each other. However, XOR gates are useful in arithmetic units like multipliers, such that XOR operations that require a larger quantity of logic inputs in typical superconducting circuits increases latency.

Superconducting exclusive-OR (XOR) gate system