A track guidance system for guiding a vehicle with reference to pre-specified desired values of at least one application phase, includes a script development function (3) for developing an application script that defines pre-specified desired values of application phases according to which the vehicle is to be guided, at least one track regulator (12; 12a, 12b, 12c) for guiding the vehicle with reference to the pre-specified desired values, an input function (2) for the user to develop a regulator matrix that allocates track regulators to the application phases, an application control (4) for controlling the time sequence of the application phases on the basis of the corresponding pre-specified desired values, a regulator control (10) for activating the respective track regulator relevant in the respective application phase, whereby the respectively active track regulator (12; 12a, 12b, 12c) transfers its status for control or monitoring to the regulator control (10).

Regulating loops, which are superposed or super-ordinated over the actual vehicle regulation or control, are realized in automatic vehicle guidance systems. For example, a vehicle guidance system involves maintaining target pre-specifications for the purpose of the navigation. Particularly, in modern aircraft with automatic regulation, which is realized with the aid of the so called fly-by-wire control systems, autopilot functions are superposed on the flight control functions. In that context, on the basis of a command branch, for example due to the vertical accelerations commanded by the pilot, the regulation or regulating system includes feedbacks for the stabilization of the regulating loop. The autopilot operating modes superposed on these regulation functions in a regulation technical manner can relate to various flight phases, for example to the terrain following flight, in which a prescribed height or elevation above the ground is to be maintained. Also, certain flight paths can be prescribed for navigation or for landing approach procedures, the maintenance of which flight paths is effectuated by the aircraft by means of automatic autopilot operating modes.
Generally, in these autopilot operating modes, for respectively provided application or operating types of the vehicle, typically a nominal or desired parameter, such as a desired speed, a desired altitude, or a prescribed travel direction is adjustedly set, the maintenance of which desired parameter is effectuated by the command branch of the respective autopilot function. Thus, in that context, the pilot has the possibility, dependent on the respective flight situation, to select nominal or desired parameters and to select or call up prescribed operating modes, which the aircraft can then carry out without manual intervention of the pilot.
A disadvantage of these methods is that only a limited number of pre-defined autopilot operating modes is available to the pilot. The functionality of present-day autopilots is limited in future vehicle guidance systems, in which there exist the requirement of an increase of the number of the autopilot operating modes to be provided as well as increased demands on the flexibility of such operating modes.
Flight management systems, with which application or operating phases are run through, which are influenceable, are described in the publications: Rudolf Brockhaus, Flugregelung (Flight Regulation), Springer-Verlag, 1994, ISBN 3-540-554 16-5, chapter 17.4.1 (pages 632–634), chapter 20.3.4 (pages 734–738); DE 37 83 535 T2; DE 196 04 931 A1; and WO 01/48573 A1. It is the object of the invention to provide an automatic vehicle guidance system as well as a method for the carrying out of an automatic vehicle guidance, which is adjustedly settable to a plurality of application or operating modes, with a small effort and expense.

Vehicle guidance system for automatic vehicle guidance


In the case that a client signal having a bandwidth larger than BW divided by P exists, where the P is the number of client ports of one optical transponder card and the BW is an optical signal band, it is configured to accommodate client signals in one optical transponder card by combining plural client signals of which the total band is no greater than the BW and which have different bands so as to make it a maximum within the aforementioned range.

1. Field of the Invention
The present invention relates to an optimum accommodation design method for a client signal using an optical transmission/reception card, and an optimum design method for an optical network.
2. Description of the Related Art
In recent years, an optical transmission/reception card (transponder card), generically called ADM on λ, ADM on a card, et cetera, integrally equipped with an Add/Drop function of a SONET signal (ANSI T1. 105 recommendation: Synchronous Optical Network Basic Description Including Multiplex Structures, Rates and Formats) and an SDH signal (ITU-T Recommendation G.803: Architecture of Transport Networks Based on the Synchronous Digital Hierarchy) and an optical signal transponder function (i.e., the function of generating a signal light) has been developed for enabling a construction of an upper layer network accommodating diverse client signals including a SONET signal, SDH signal (simply "SONET/SDH" hereinafter), Ethernet (registered trademark) and fiber channel on an optical network structured by a wavelength division multiplexing (WDM) system.
The focused here is a design technique for accommodating a client signal, which is accommodated by a SONET/SDH network built up on a WDM net, to a SONET/SDH frame.
FIG. 1 exemplifies a mapping of a SONET signal frame.
FIG. 1 exemplifies a mapping of four OC48s, which are SONET signals, to a SONET frame of OC192.
When multiplexing four OC48s and mapping in a SONET frame of the OC192, an overhead part of each frame of the OC48 is separated and it is mapped together with an overhead part of the OC192 frame. And each payload part of the OC48 is mapped together with that of the OC192.
FIG. 2 is a diagram describing a technique premised by the present invention.
Conventionally, a WDM network and a SONET/SDH network built thereon are constituted by respectively different apparatuses, namely a WDM apparatus and an SONET/SDH ADM (Add/Drop Multiplexing) apparatus. The WDM apparatus is one for carrying out a wavelength multiplexing by making optical signals carried on different wavelength lights, while the SONET/SDH ADM apparatus is one generating a signal carried on one wavelength light by applying a time division multiplexing to client signals of individual channels. A purpose of a design for accommodating a client signal on the network is to accommodate all the given client signals and minimize the number of SONET/SDH ADM apparatuses required for the accommodation, thereby minimizing an apparatus cost. In the case of accommodating client signals by using the SONET/SDH ADM apparatus, such accommodation has conventionally been carried out so as to raise bandwidth usage efficiency of each optical signal in consideration of a bandwidth of each client signal. The number of client signal ports of the SONET/SDH ADM apparatus is generally large, making it unnecessary to consider the number of client signals per optical signal, and therefore a combination gaining the maximum band usage ratio of optical signals independent of the number of client signals has been selected in priority. That is, the conventional accommodation design has made it possible to equip an interface for the worth of the number of ports capable of accommodating client signals of the worth of a natural number obtained by the following expression (1) for all client signals:
                              (                      The                                                                          number                                                                          of                                                                          ports                                                                          on                                                                                the                                                                                client                                                                          signal                                                                          side                    )                =                              (                          optical                                                                                signal                                                                                bandwidth                                                                                of                                                                                a                                                                                SONET                                            /                                          SDH                                                                                ADM                                                                                apparatus                        )                                          /                                          (                          bandwidth                                                                                of                                                                                one                                                                                client                                                                                signal                        )                                              (        1        )
However, an optical transponder card (i.e., TRPN in FIG. 2) 10-1 through 10-N of a WDM apparatus, which had conventionally provided only a transponder function of an optical signal, has been integrally equipped with ADM functions 11-1 through 11-N of the SONET/SDH signal in the recent years as shown in FIG. 2 (i.e., TRPN 12-1 through 12-N). Owing to this, it is possible to build up a SONET/SDH ring network (i.e., a synchronous digital signal network) in addition to a WDM network just by the WDM apparatuses.
A patent document 1 is available as a conventional technique focusing on the most optimal distribution, noting a method for searching the most optimal portfolio with a high probability of acquiring a high profit. A patent document 2 is available as a conventional technique focusing on allocating shared resources, noting a technique for making an apparatus requiring a use of a shared resource bid an amount of required resources and price, and allocating a resource by processing the bid.
[Patent document 1] Japanese Patent Application Publication No. 2000-293569
[Patent document 2] Japanese Patent Application Publication No. 2003-520496
FIG. 2 shows the difference between the configurations of networks, which is constituted by a SONET/SDH ADM apparatus and a WDM apparatus, and that of an optical network which uses an optical transponder card comprising an ADM on λ function and constituted by the WDM apparatus only. Here, when accommodating a client signal by using the optical transponder card, what is different from the case of using the SONET/SDH ADM apparatus is that the number of client signal ports of the optical transponder cards 12-1 through 12-N is small, that is, at most 10 or thereabouts. This results in two client signals existing:(signal bandwidth of an optical signal of an optical transponder card)/(the number of client signal insertion ports of an optical transponder card)<(bandwidth of a client signal)   (2)(signal bandwidth of an optical signal of an optical transponder card)/(the number of client signal insertion ports of an optical transponder card)≦(bandwidth of a client signal)   (3)
FIGS. 3A through 3C exemplify the case of an accommodation result of a client signal being different between a configuration using the SONET/SDH ADM apparatus and WDM apparatus, and the one using the WDM apparatus equipped with the optical transponder card.
The configurations shown in FIGS. 3A through 3C accommodate each signal (4, 4 and 8) of (2.5 G, 1.25 G and 622 Mbps) in 10 Gbps bandwidth per one wavelength. The number of client ports of the optical transponder card is configured as eight ("8").
Here,(bandwidth of an optical signal)/(the number of client signal insertion ports)=1.25 Gbps,allowing a client signal meeting both the above noted expressions (2) and (3) to coexist. A design using the conventional SONET/SDH ADM apparatus just maximize a usage ratio of a total band, and therefore accommodates a signal in the order of having a larger band, resulting in generating two optical signals. If it is likewise accommodated by the optical transponder card by considering only the band usage ratio, however, three optical transponder cards are necessary as shown in FIG. 3B, negating an accomplishment of an optimum accommodation by two cards shown in FIG. 3C. This is because the conventional system does not consider a limit in the number of client side ports of an optical transponder card.


A pneumatic radial tire for passenger car comprises a circumferential belt layer in addition to a slant belt layer, in which specified PET, nylon, PEN or vinylon fiber cords or steel cords are used in the circumferential belt layer.

1. Field of the Invention
This invention relates to a pneumatic radial tire having excellent cornering properties and either or both of durability and high-speed durability. More particularly it relates to a pneumatic radial tire for use in general-purpose passenger cars mainly developed for weight reduction.
2. Description of the Related Art
With the demand for energy saving, it has been attempted to improve the fuel consumption in automobiles by reducing the weight, and this in turn tends to raise the demand for weight reduction in tires. Particularly, this is true in pneumatic radial tires for use in general-purpose passenger cars.
In general, a pneumatic radial tire comprises a so-called cross belt formed by laminating at least two slant belt layers on an outer periphery of a carcass crown portion to cross cords of these layers with each other. From a viewpoint of tire weight reduction, there have been developed tires comprising a belt composed of a single slant belt layer and a circumferential belt layer(s) containing light-weight organic fiber cords arranged substantially in parallel to an equatorial plane of the tire. The tire of this type is disclosed in, for example, JP-A-62-152904 and JP-A-4-163212.
In the tires disclosed in these prior art publications, organic fiber cords having a high tensile rigidity in the circumferential direction such as aromatic polyamide fiber cords (e.g. Kevlar cord) and the like are used as a cord in the circumferential belt layer. Further, it is disclosed that the circumferential belt layer can control the pushing out of the tread portion through centrifugal force during the high-speed running to improve the high-speed durability.
Moreover, organic fiber cords widely used as a cord for a carcass ply such as polyethylene terephthalate (hereinafter abbreviated as PET) fiber cord, nylon fiber cord, polyethylene naphthalate (hereinafter abbreviated as PEN) fiber cord and vinylon (PVA) fiber cord are considerably low in tensile rigidity in the circumferential direction as compared with the aromatic polyamide fiber cord, so that they are hardly ever applied as a cord for the circumferential belt layer. Also, the use of steel cords for the circumferential belt layer is unfavorable from a viewpoint of weight reduction and the like, so that steel cords are hardly ever used in the circumferential belt layer.
When aromatic polyamide fiber cords are used in the circumferential belt layer, however, the resistance to compression fatigue is poor, so that it has been confirmed that the belt is apt to create compression breakage accompanied with buckling deformation of the belt generated during the severe cornering.

Pneumatic radial tires with circumferential cord belt layer having specified cord twisting structure


A method of manufacturing ceramic bodies comprising the steps of: preparing a ceramic sheet; forming through holes in the ceramic sheet, each of the through hole forming at least one part of the contour of each ceramic bodies; and cutting the ceramic sheet into pieces of ceramic bodies. The ceramic sheet can be a single ceramic sheet or a laminate of ceramic sheets. The method of manufacturing ceramic bodies further comprises a step of forming a recess in the ceramic sheet, or pressure molding or partially removing of the ceramic body, as required. The manufacturing method provides inexpensive production of small ceramic elements having a complicated shape and extremely smooth surfaces with less uneven filling and nonuniform density.

Electronic components have found wide applications in various kinds of electronic equipment and communication devices. With recent size and cost reduction of electronic components, it is becoming more important to reduce the size and cost of ceramic elements for use in bobbins, core materials, or base materials thereof as well.
Conventionally, these ceramic bodies have been manufactured by powder molding. The powder molding process includes the steps of: adding a binder to a ceramic raw material; forming ceramic granules in a granulation process; filling the ceramic granules in a mold; molding the granules by uniaxially pressing followed by a sintering of the molded object.
In the powder molding process, ceramic granules must be filled in a mold evenly. Unevenly filled granules cause problems, such as improper pressing, incorrect height, and moreover, breakdown of the pins or the mold. Furthermore, in the case of a small and complicated shaped component, filling granules in every corner of the mold is difficult. Increasing molding pressure to efficiently fill the granules causes problems, such as breakdown of the mold.
As described above, in the powder molding process, it is essential to fill ceramic granules in a mold evenly. For this purpose, powder fluidity of the ceramic granules is important. Ceramic granules have excellent powder fluidity when they are spherical and have diameters of at least 100 μm. In addition, for the granules to be filled evenly, the mold must have a size more than ten times the diameter of each granule.
However, with the downsizing of ceramic elements, it has become difficult to satisfy the necessary conditions for ensuring the relationship between the mold size and the diameter of the ceramic granule, and powder fluidity. In addition, for cost reduction of the products, it is necessary to use a multi-cavity mold. However, granules tend to be filled in the multi-cavity mold more unevenly. Therefore, it is difficult to obtain a smaller ceramic element and cost reduction thereof at the same time.
The present invention addresses the conventional problems discussed above. Therefore, it is an object of the present invention to provide a manufacturing method in which small ceramic elements can be produced at a low cost by punching a ceramic sheet using a face-forming mold of a multi-pin structure and cutting the ceramic sheet into separate pieces.

Method of manufacturing ceramic material body

Matsushita Electric Industrial Co., Ltd.


Deep profile and highly doped impurity regions can be formed by diffusing from a solid source or doped silicon glass and using a patterned nitride layer. An oxide etch stop and polysilicon sacrificial layer are left in place in the patterned regions and the dopant is diffused through those layers. The polysilicon provides sacrificial silicon that serves to prevent the formation of boron silicon nitride on the substrate surface and also protects the oxide layer during etching of the silicon glass layer. The oxide layer then acts as an etch stop during removal of the polysilicon layer. In this way, no damage done to the substrate surface during the diffusion or subsequent etch steps and the need for expensive ion implanter steps is avoided.

This invention relates generally to semiconductor processes and devices and more specifically to a method for forming a highly doped and/or deep profile doped region and the resulting devices formed therefrom.
A Several methods are known for forming deep profile and/or highly doped impurity regions. Ion implanters are frequently used to drive impurities into a semiconductor substrate to formed doped regions, as is well known in the art. Such machines cost several millions of dollars each and it would be impractical to use an ion implanter to drive impurities deep into the substrate because of the amount of processing time that would be required. In this context a deep profile is roughly five microns or more. Likewise, for a very high concentration impurity region in the range of around 1018 atoms/cm3 or more, the time required for processing using an ion implanter would be prohibitively expensive.
As an alternative to ion implanting, some in the art have deposited an impurity containing layer on the surface of the semiconductor substrate (or to selected regions of the substrate) and have diffused the desired impurity into the substrate from the impurity containing layer. One example is the use of a boron silicon glass (BSG) layer being placed on the substrate surface in order to form a highly doped boron region in the substrate.
FIG. 1 illustrates a prior art method for forming a highly doped, deep profile boron region using a BSG layer. Substrate 1 had formed on its major surface an oxide layer 3 over which is formed a masking silicon nitride layer 5. Oxide layer 3 is formed between substrate 1 and nitride layer 5 to minimize stress arising from thermal expansion mismatch between the silicon substrate 1 and the nitride layer 5.
As shown, masking nitride layer 5 and oxide layer 3 have been patterned to form an opening 9 to expose substrate 1. After patterning, boron silicon glass (BSG) layer 7 is formed over the device, overlying silicon masking layer 5 and contacting the surface of substrate 1 in the opening 9. The BSG layer 7 acts as boron source for a subsequent diffusion step. The device is subject to a diffusion step at high temperature (typically 1100-1200 C.) in a nitrogen environment, during which boron migrates from the BSG layer 7 and diffuses into substrate 1, resulting in doped region 11 within the substrate. A thin film of boron silicon nitride 13 is also formed during the diffusion step. This boron silicon nitride is an undesirable consequence of the diffusion step and must be removed prior to further processing.
After diffusion, BSG layer 7 is removed, typically using hydrofluoric (HF) etch. While the HF etch provides desirable properties for removing BSG layer 7, it is not effective at removing the undesirable boron silicon nitride layer 13. Phosphoric acid is used to remove the nitride masking layer 5 as well as to remove the formed boron silicon nitride layer 13. The phosphoric acid exhibits low selectivity to and undesirably etches the silicon substrate as wellxe2x80x94this causes damage to the silicon substrate and can have adverse consequences on the electronic devices to be subsequently formed in the silicon substrate.
Therefore, a need exists in the prior art for a method of forming highly doped and/or deep profile impurity regions which is not prohibitively expensive and which does not damage the silicon substrate. The method should also be compatible with conventional processing methods and techniques.
In one aspect, the present invention provides a method of forming an impurity region in a substrate. The method includes forming an etch stop layer on a surface of the substrate, forming a sacrificial layer on the etch stop layer, and forming a masking layer on the sacrificial layer. The masking layer is patterned to form an opening exposing a region of the sacrificial layer. An impurity source layer is then formed on the masking layer and the exposed region of the sacrificial layer, and an impurity from the impurity source layer is diffuses through the sacrificial layer and etch stop layer and into the substrate, whereby the sacrificial layer traps undesirable impurities.
In another aspect, the invention provides a method of forming doped region in a silicon substrate. The method comprises forming an oxide layer on the substrate, forming a polysilicon layer on the oxide layer, forming a nitride layer on the polysilicon layer, and patterning the nitride layer to form openings to the underlying polysilicon layer. The method further comprises providing an impurity source in proximity to the wafer, and diffusing impurities from the impurity source through the polysilicon layer and the oxide layer into the substrate. Additionally, the method includes removing the nitride layer, removing the polysilicon layer, whereby the oxide layer acts as an etch stop, and removing the oxide layer.


A tag comprising: a hang tab body; a hang tab; a ratchet; a cutting channel; a guide channel; and, a tail, the tail comprising teeth and at least one knob. The tail may be fed through the guide channel and the cutting channel into the ratchet, thereby allowing the ratchet to engage the teeth, which in turn prevents the tail from being disengaged from the ratchet, thereby securing the tag to a product. The product may be easily released by severing the portion of the tag in the cutting channel. The cutting channel can also provide a guide which helps to prevent damaging the product as the tag is remove.

Prior to purchasing sun glasses, reading glasses, or other eyewear, a customer will typically browse a store's selection, trying on different pairs. A variety of eyewear displays are available, with different displays being advantageous for different eyewear styles. For example, some eyewear displays include a tray which supports the frame under the lenses and/or via the nose bridge, and such displays also include a portion for receiving the eyewear arms. Thus, the eyewear is presented in an open manner, and the purchaser can readily observe the eyewear from many angles. While such displays are advantageous in certain settings or with certain eyewear styles, these displays tend to require significant floor space and do not permit a large number of eyewear to be presented to the user in a compact space. To facilitate the presentation of a larger number of eyewear, some displays utilize hang tags from which the eyewear hang. The hang tags allow the eyewear to be displayed with the arms closed, thereby allowing, more eyewear to be displayed in the same retail space as the open-arm displays described above.


A disk tray for a disk player including a tray main body installed on a disk player main body which carries a disk in and out of the disk player main body. The disk tray has a disk accommodating portion which is indented to accommodate a disk, and a protective layer formed on the surface of the disk accommodating portion facing an accommodated disk for protecting the disk placed on the disk accommodating portion.

1. Field of the Invention
The present invention relates to a disk tray for a disk player, and more particularly, to a disk tray for a disk player having an improved structure so that a disk placed thereon can be protected.
2. Description of the Related Art
In general, a disk player which adopts a disk such as a compact disk (CD), a digital video disk (DVD) or a laser disk (LD) to record/reproduce information uses a disk tray to load the disk on a turntable of a main unit.
Referring to FIG. 1, a conventional disk tray 20 for a disk player is installed to be capable of reciprocating above the deck 10. The disk tray 20 comprises a tray main body 21 having a disk accommodating portion 23 and a cushion member 25 installed on the disk accommodating portion 23.
The tray main body 21 is installed on the deck 10 to be capable of reciprocating and is driven by power provided from a driving motor (not shown) installed on the deck 10. The disk accommodating portion 23 is formed of first and second disk accommodating portions 23a and 23b each having a different depth and diameter to correspond to disks of different sizes. That is, the first disk accommodating portion 23a is for accommodating a disk 1 having a diameter of 120 mm. The second disk accommodating portion 23b is further indented to a depth greater than that of the first disk accommodating portion 23a to accommodate a disk (not shown) having a diameter of 80 mm. Therefore, by respectively forming the first and second disk accommodating portions 23a and 23b, a disk which is placed on the tray main body 21 is guided to an appropriate position.
A plurality of cushion members 25 are attached on the second disk accommodating portion 23b. The cushion members 25 support a disk placed on the second disk accommodation portion 23b and prevents damage to the disk. Also, impacts to the tray main body may be prevented from being transmitted to the disk by the cushion members 25.
However, in the conventional disk tray 20 for a disk player, since a plurality of cushion members 25 are separately attached to the disk accommodating portion 23, it is difficult to align the height of each the cushion member 25 to be flush with one another. Accordingly, the disk may be placed askew to thereby cause malfunction when placed on a turntable in the deck 10. Furthermore, after long use, the cushion members 25 may become detached from the disk accommodating portion 25 due to repeated contact with the disk.

Disk player disk tray having a protective layer


The invention provides a PCV system for a V-type engine, where an oilmist extraction port, through which oilmist to be supplied to an oil separator is taken out from the engine, is formed at a position corresponding to the lateral center of the top portion of a chain case of the engine, and the oil separator has an oil discharge hole, and is connected to a PCV valve. A rib, which extends from the floor wall of the oil separator toward a wall opposite to the floor wall, is arranged inside the oil separator. The rib forms a dead-end portion that is open in the direction opposite to the direction toward the PCV valve side, and forms a dead-end in the direction toward the PCV valve side. An oil return passage connected to the oil discharge hole is provided with a container portion.

The disclosure of Japanese Patent Application No. 2005-376773 filed Dec. 28, 2005, including the specification, drawings and abstract, is incorporated herein by reference in its entirety.
1. Field of the Invention
The invention relates to a PCV (positive crankcase ventilation) system for a V-type engine (an engine in which the cylinders are arranged in two separate banks that form a V-shape therebetween).
2. Description of the Related Art
A PCV system separates oilmist from blowby gas using an oil separator, and supplies the oilmist-free blowby gas to an intake system of an engine.
Japanese Patent Application Publication No. 2004-211644 (JP-A-2004-211644) describes providing an oil separator in the upper area of the space between the right and left banks in a V-type engine.
When a surge tank of an intake system is arranged in the upper area of the space between the right and left banks, if an oil separator is provided in the dead space below the surge tank to effectively utilize the space, the oil separator needs to be short in height and flat in order to avoid contact between the oil separator and the surge tank.
FIGS. 7 and 8 show the case where an oil separator 1 that is short in height is arranged in the manner in which the portion, at which the oil separator is connected to the PCV valve, faces the front of a vehicle. In the oil separator 1 that is short in height, the height of a rib 2, on which the blow-by gas containing oilmist impinges so that liquid and gas are separated from each other, is low. Accordingly, an oilmist inlet 3 needs to be formed at an appropriate position so that the size of grains of the oilmist flowing into the oilmist inlet 3 becomes appropriate for gas-liquid separation, or the rib 2 needs to be appropriately arranged so that the length of a blowby gas passage in the oil separator is sufficiently long in order to effectively separate liquid and gas from each other.
If the oil separator 1 that is short in height receives an inertia force due to a sudden stop of the vehicle or if the engine tilts, for example, when the vehicle is running on a downhill slope, oil 4, which has been separated from gas and is on the floor of the oil separator 1 may easily enter a PCV valve 5 provided at the front end of the oil separator 1, flow into an intake manifold, and be burned in the engine. As a result, white smoke may be produced.
In document DE 34 14 710, an engine is disclosed which comprises a valve and an oil separator. Connecting holes connecting the oil separator and a crank case, are formed at the cylinder block. In document EP 0 287 756, an de-aerating means having an oil separator, is placed at the crank case between the cylinders.


A counter-surveillance detection system includes a camera with an integrated illumination source and a processor for performing analytic software algorithms. The counter-surveillance detection system and method is configured to detect foreign objects within a defined field of view (FOV) using an analytic software method operating on imagery data from the camera that is synchronized with the illuminator source. In some applications, the system is used to detect a human performing remote observation of snooping.

Cameras and other video equipment are currently used as part of security systems for monitoring the inside of buildings and/or external grounds. The image data from various cameras is typically transmitted to a bank of video monitors in a central viewing area where an operator watches the incoming images for the presence of unauthorized personnel or other events.
Image processing technology continues to be developed. Captured image data can be processed to determine the presence of objects and motion of objects from one frame to another.

Automatic counter-surveillance detection camera and software


An enterprise network includes at least one communication device 208-1, an Open Systems Interconnect (OSI) Layer 2 switch 206, and a corresponding enterprise switch 208. The communication device 208-1 is connected to at least one of an access point 904-1 and a respective port 207-1 of the Layer 2 switch 206. The enterprise network includes a plurality of Emergency Location Information Numbers (ELINs) corresponding to differing segments of the enterprise network. The Layer 2 switch 206 serves at least one of the differing segments. The communication device 208-1 includes a discovery agent 252 operable, when a predetermined first event occurs, to obtain from the Layer 2 switch 206 at least one of an access point identifier, a switch identifier from the Layer 2 switch 206, and a port identifier identifying the respective port 207-1.

Local regulations, as well as concerns about public safety and liability, require enterprises to provide employees and visitors with an effective means to reach a universal emergency number (e.g., 911 in the U.S., 000 in Australia, and 112 in the European Community) operator in an emergency. The call routes through the local central office, through a switch, to the appropriate Public Safety Answer Point (PSAP), where the call is answered. Each PSAP covers one city or one rural community. At the PSAP, emergency operators determine the nature of the emergency and contact the appropriate agency: typically police, fire, or emergency medical services. A single PSAP is typically responsible for an area covering several independent police and fire departments in the U.S.
With Enhanced 911 (E911), the calling party number, known as an Emergency Location Information Number (ELIN), is sent with the emergency call over Centralized Automatic Message Accounting (CAMA) trunks or via the calling number information element over Integrated Services Digital Network (ISDN) trunks. A suitably configured module at the PSAP uses the ELIN to lookup the caller's documented street address location from the Automatic Location Information (ALI) database. In ISDN, the ELIN is referred to as the location identification number.
To allow operators at the PSAP to call back a caller, IP communication systems use Public Switched Telephone Network (PSTN)-based methods to send an ELIN that identifies the telephone number for an extension from which the emergency call was dialed. If the extension number is not public, premise-based communications systems can be programmed to send an ELIN that is located nearby the calling extension. This is typically done by setting up the Local Area Network (LAN)-based telephony system itself, a media gateway, or a separate server, to automatically send a properly formatted number, such as the public telephone number. To deliver this information to the public emergency services network, the information can be encoded over analog CAMA (which requires an 8-digit ELIN), or over digital ISDN trunks (which require a 10-digit ELIN).
The above schemes assume that a calling party number or ELIN always corresponds to the street address in the ALI database. This assumption is not always true in practice. Adds, moves, and changes occur frequently in a dynamic enterprise communications environment. IP Telephony enables end users to relocate automatically their telephones to any location that can access the Wide Area Network (WAN). For example, H.323 IP telephone users can move telephones without notifying the system administrator of the move and Session Initiation Protocol (SIP) telephone users can use the same extension number at several different telephones simultaneously. If the users of such telephones dial a universal emergency number, emergency response personnel may go to the wrong physical location.
To address this problem, Cisco Systems™ has introduced the Emergency Responder™. The operation of the Emergency Responder will be discussed with reference to FIG. 1. A communications system comprises a switch 100 (such as a Private Branch Exchange or PBX), an emergency responder 104, a first Ethernet switch 108 in a first subnet 112 and having a plurality of ports 116a–n connected to a plurality of telephones 120-1 to -N, and a second Ethernet switch 122 in a second subnet 124 and also having a plurality of ports 128a–n, all of which are connected by a network 132. As used herein, a "subnetwork" or "subnet" refers to a network segment. The telephones 120-1 to -N each have a corresponding Media Access Control or MAC address and an extension (the phone number). The Ethernet switch ports are cabled to wall jacks in specific rooms or cubicles. The switch 100 contains an auto or manual entry table with a mapping of extension to MAC address. The emergency responder 104 contains a -table with a mapping of Ethernet switch and port to physical location (such as wall jack location), e.g., switch 12sw-a4 comprises port 7, which in turn corresponds to building A, floor 4, aisle C, cube 10.
The emergency responder 104, at predetermined time intervals, queries the switch 100 (or Ethernet switches directly) for new phone and user login registration events. In response to reported events, the emergency responder queries the various Ethernet switches in the network 132 using the Simple Network Management Protocol or SNMP and/or Cisco Discovery Protocol (CDP) to determine the location of the telephone and the user, based on the switch port to which the phone is attached. In other words, the responder 104 retrieves the port-to-MAC mapping information from each Ethernet switch. The location is then updated in an emergency responder location database (not shown). Thus, if telephone 120-2 is moved from port 116b of the first Ethernet switch 108 to port 128b of the second Ethernet switch 122 (as shown by the dotted lines), the emergency responder must determine that the telephone has moved and notify the switch 100. It is important to note that the switch 100 is unaware that the telephone moved from one Ethernet port to another (unless the IP address changed) because the switch 100 recognizes the telephone only by extension and MAC address. Only the Ethernet switch is aware that the telephone has moved. The responder must inform the switch 100 where the telephone is connected. To determine to which port the telephone has been moved, the responder then must query each and every Ethernet switch in the same subnetwork.
When an emergency call is placed, the switch queries the emergency responder to retrieve the calling telephone's current location based on MAC address. In response to the SNMP query, the emergency responder locates and transmits the requested information to the switch, which then forwards the information along with the call. The location is the ELIN of a real or virtual phone that has a port close to the physical location of the port of the calling phone and has a street address that is known to be correctly entered in the ALI database. When an emergency call is dropped, any calls to the ELIN are forwarded automatically for a predetermined period of time to the device originating the dropped call.
The methodology employed by the Emergency Responder™ has been embodied in TSB-146, Telecommunications—IP Telephony Infrastructures—IP Telephony Support, Emergency Calling Service, formulated under the cognizance of TIA Subcommittee TR-41.4, IP Telephony Infrastructure and Interworking Standards ("TIA Standard"). The TIA Standard requires connectivity between the IP communication device (shown in FIG. 1 as the telephones), the switch/server (called "call agent or server" in the standard and shown in FIG. 1 as the switch, an adjunct called the "Location Information Server" (shown in FIG. 1 as the emergency responder), and Simple Network Management Protocol (SNMP) ports on every data switch (shown in FIG. 1 as the first and second Ethernet switches) in the same subnet as the IP communication device.
The approach of the Emergency Responder™ and the TIA Standard can have a number of drawbacks. For example, the emergency responder, due primarily to the time required to learn of the change from the switch (due to the polling interval), is unable to collect location information on a real time basis. It is thus possible that, if a telephone is moved to another ethernet switch and dials an emergency call before the emergency responder is able to ascertain the new location of the telephone, emergency personnel will be sent to an incorrect location (which in FIG. 1 is associated with the first subnet rather than the second subnet). The likelihood of this happening depends on the duration of the polling interval of the Ethernet switches by the responder 104. As will be appreciated, switch queries are done neither too frequently as the network will be flooded with traffic nor too infrequently as a user might make an emergency call before the emergency responder recognizes the user's IP telephone has moved. Because the emergency responder 104 is queried during an emergency call for location information, there is a possibility that ELIN information may not be provided to the emergency provider, that the emergency call will be delayed until the information is received, or that an incorrect ELIN (such as a default ELIN) may be provided. Not only is there a time delay in obtaining the information, namely the switch 100 must send a query through network 132 to the responder 104 and then the responder 104 must send a response through the network 132 to the switch 100 but also the location information is not accessible if the emergency responder cannot be contacted for some reason. For example, the emergency responder or a link on a communication path to/from the responder may malfunction.
These problems are addressed by the Communication Manager 2.0™ product of Avaya Inc.™ and the Emergency Responder™ version 1.2 product of Cisco Systems™. This product locates the IP phone making the emergency call based on the phone's IP address. IP addresses are grouped into networks or sub-networks. As will be appreciated, a "subnet" is a common term used to describe a grouping of IP addresses. It is a common practice to assign a subnet of IP addresses to a relatively tight geographic region. For example, an IP subnet could be assigned to a given floor in an office building or one wing of a given floor. In this manner, an E911 caller can be located to a floor or wing of a floor based solely on the IP address of the calling phone. This methodology is discussed in copending application Ser. No. 10/607,414, filed Jun. 25, 2003, entitled "Universal Emergency Number ELIN Based on Network Address Ranges" to Becker et al., which is incorporated herein by this reference. Although this methodology represents a substantial improvement over the port-based method, it is desirable in many applications to have a more precise method of locating an E911 caller, particularly in a large building.

Advanced port-based E911 strategy for IP telephony


A storage apparatus sets up part of non-volatile cache memory as a cache-resident area, and in an emergency such as an unexpected power shutdown, backs up dirty data of data cached in volatile memory to an area other than the cache-resident area in the non-volatile cache memory, together with the relevant cache management information. Further, the storage apparatus monitors the amount of the dirty data in the volatile cache memory so that the dirty data cached in the volatile cache memory is reliably contained in a backup area in the non-volatile memory, and when the dirty data amount exceeds a predetermined threshold value, the storage apparatus releases the cache-resident area to serve as the backup area.

1. Field of the Invention
The invention relates to a storage apparatus and a method of managing data in the storage apparatus, and particularly relates to a backup technique for cache data in the storage apparatus.
2. Description of Related Art
With the viewpoint of improving system performance, etc., a storage apparatus (or storage sub-system) is generally equipped with cache memory. The cache memory is typically composed of volatile memory such as DRAM. A large-scale storage apparatus equipped with high-capacity hard disk drives (HDD) is provided with high-capacity cache memory in the order of from several to several tens of gigabytes. During operation, the storage apparatus responds to an I/O request to a host apparatus while caching application data in the cache memory.
Also, in order to further improve system performance, a storage apparatus has been proposed which includes a "cache-resident function" for caching the entire logical volume created for hard disk drives in cache memory.
In such a storage apparatus, in order to prevent large amounts of data in cache memory from disappearing, upon an unexpected power shutdown, data in the cache memory is destaged (backed up) to hard disk drives while power supply is temporarily supplied from a battery as a secondary power supply to maintain the operation state of the apparatus.
In addition, increased capacity and reduction in cost of non-volatile memory such as flash memory have been promoted recently, and application of non-volatile memory has been expanding rapidly. For example, JP06-236241 A discloses a hard disk device in which part of cache memory is composed of flash memory. More specifically, in JP06-236241 A, data in a frequently accessed area in a hard disk is located in flash memory, and this eliminates the movement of a disk head as much as possible to enhance data access efficiency, and also prevents cache data from disappearing due to a power shutdown.
Further, JP10-154101 A discloses a data storage system in which a semiconductor disk apparatus composed of EEPROM functions as cache memory to a hard disk device. Specifically, in JP10-154101 A, necessary information for activating an operating system or a frequently-used application program is stored in the semiconductor disk apparatus, and this enables the cache function to be exhibited effectively even immediately after the power-on.
In a large-scale storage apparatus, large amounts of data exist in cache memory while not being subjected to destaging to hard disk drives during operation. Therefore, it is imperative to take measures to prevent such data from disappearing in an emergency such as a power shutdown.
A conventional battery-employing backup method in an emergency has tended to prove costly, as a storage apparatus needs to be provided with a considerable number of relatively expensive batteries in order to maintain its driving of hard disk drives. Therefore, keeping power consumption low as much as possible leads to longer driving with a smaller number of batteries. However, as long as a hard disk drive is set as a data backup destination, there is a limit to effective reduction in power consumption.
Further, if backup is conducted for all the data in cache memory in an emergency such as a power shutdown, the load on a processor as a result of backup processing will be heavy, and backup time is required. Thus, it has been difficult to keep battery power consumption low.
Moreover, even when part of cache memory is composed of non-volatile memory, the data stored in volatile memory still has a problem in that the data will be lost without being subjected to backup in an emergency such as a power shutdown. However, if the data stored in volatile cache memory is backed up to a hard disk drive in an emergency such as a power shutdown, this eventually results in the power consumption problem in the conventional battery backup method. Despite this, backup for cache data in volatile memory to non-volatile memory used as cache memory has not been proposed.
Furthermore, when non-volatile cache memory is used as backup memory in an emergency such as a power shutdown, when data in volatile cache memory is merely transferred to the non-volatile cache memory, data that does not originally need to be subjected to backup, such as clean data, is transferred also, which means effective backup processing cannot be realized. There is also the possibility that as of yet non-destaged data cached in the non-volatile cache memory is overwritten with the transferred data.
In view of the above, the invention has an objective of data held in volatile cache memory being efficiently and reliably stored under a second power supply even when an emergency backup request due to an unexpected power shutdown or similar emerges, and consequently has an objective of reducing the power consumption of the secondary power supply as much as possible.

Storage apparatus and data management method in the storage apparatus


A method, apparatus, and system to synchronize multiple host controllers with non-uniform frame rates. The apparatus includes a first host controller, a second host controller, and logic. The first host controller is configured to access memory at a first frame rate. The second host controller is configured to access the memory at a second frame rate which is different from the first frame rate. The logic is coupled to the first and second host controllers to synchronize the memory accesses of the first and second host controllers at a common frame rate. Other embodiments are described.

Due to ever increasing gate count and clock speeds in current computing platform designs, there is increasing value in platform power conservation. Low-power computing platforms are increasing in popularity because power consumption is highly related to battery life and heat dissipation, which affect mobility. In general, computing platforms that consume less power are more mobile. One way to conserve power is to alter functional behaviors which would allow certain components to stay in a lower power state for extended periods of time.
Presently, chipset implementations may utilize multiple controllers such as universal serial bus (USB) host controllers to increase performance. Multiple USB host controllers within a computing platform can increase performance by increasing the total bandwidth available to all USB devices in the platform. Generally, a legacy USB host controller such as a controller that complies with the USB Specification, Revision 1.1, can service two USB ports. Universal Serial Bus Specification, Revision 1.1, published Sep. 23, 1998. More recently, USB host controllers that comply with the USB Specification, Revision 2.0, may service more than two USB ports (e.g., six ports). Universal Serial Bus Specification, Revision 2.0, published Apr. 27, 2002. Although many ports may be serviced by a single USB host controller, many mobile computing platforms have multiple USB host controllers. Additionally, a single computing platform may include different types of USB host controllers.
Conventionally, the operation of each USB host controller is independent from the other USB host controllers (i.e., the state of one controller has nothing to do with the state of another controller). Furthermore, the operation of USB host controllers is periodic. For example, legacy USB host controllers fetch a new work list, or frame, every one millisecond (ms). USB host controllers operating in compliance with the USB 2.0 standard fetch new frames every 125 microseconds (μs).
During operation of the USB host controllers, the computing platform is typically in a normal operating power state. Common definitions of power states are available in the Advanced Configuration and Power Interface (ACPI) open standard. Advanced Configuration and Power Interface Specification, Revision 3.0a, published Dec. 30, 2005. For example, processors may operate in various "C" power states ranging from C0 (full power) to C4 (low power). The fetch, or frame, operations described above are typically performed when the processor and chipset are in the C2 power state. However, the processor and chipset may enter low-power state such as the C3 power state in between memory accesses.
If multiple USB host controllers are implemented, there may be several memory accesses distributed over time that prevent the processor from entering a low power state for an appreciable amount of time. For example, immediately prior to a memory access by a USB host controller, the USB host controller may issue a "start of frame" (SOF) marker. The periodic "start of frame" markers for a given USB host controller are conventionally triggered by host software independently of the "start of frame" markers for other USB host controllers. The random relationship of these markers may prevent the processor from entering a low-power state, resulting in substantially continuous power consumption.
The inefficiency resulting from these uncontrolled memory accesses by several USB host controllers is aggravated by the frame rate variation between legacy USB host controllers, which have a frame rate of approximately one millisecond, and USB host controllers that have shorter frame rates such as 125 microseconds. This difference in frame rates may further limit or even eliminate the opportunity for a processor to enter a low-power state.
Conventional technology does not adequately address this problem. Although some potential solutions propose pre-fetching the next several work lists, or frames, pre-fetching may introduce stale data because the USB host controller software is allowed to run very close to the hardware. Additionally, pre-fetching and other conventional technologies to save power using USB host controller behavior do not address the interaction between multiple host controllers with non-uniform frame rates.

This patent is subject to a terminal disclaimer.

Power-optimized frame synchronization for multiple USB controllers with non-uniform frame rates


A method and a device for treating waste printed circuit boards with molten tin include process of throwing printed circuit boards into a molten tin bath in treating furnace, letting the boards proceed crashing, stirring and carbonizing treatment for separating copper foil, thermosetting plastic and glass fiber. Then these three kinds of materials are respectively separated from each other by taking advantage of their different specific gravity and collected in separate tanks to recover copper and other metals from the waste printed circuit boards.

This invention relates to a method and a device for treating waste printed circuit boards with molten tin or its alloy, particularly to one adapted to recover copper and other metals from waste printed circuit boards.
Disqualified printed circuit boards may be made not a little in their manufacturing process, and besides, good printed circuit boards will become useless and be discarded after a long period of use or become old-style to be displaced with new ones. Then waste printed circuit boards should have to be treated with special methods, otherwise they never fail to pollute our living environment.
However, printed circuit boards used in industries may have multiple metal layers, which are very difficult to be stripped off. So, various methods such as incineration, crush, pickling, floatation, solidification thermal cracking, etc. are in use for treating discarded printed circuit boards. Nevertheless, none of these methods are quite ideal, too complicated to result in high cost in treatment.

Method of recycling waste printed circuit boards

Cleanevi' Engineering Consultant Co., Ltd.


A data processing apparatus and method are provided for performing segmented operations. The data processing apparatus comprises a vector register store for storing vector operands, and vector processing circuitry providing N lanes of parallel processing, and arranged to perform a segmented operation on up to N data elements provided by a specified vector operand, each data element being allocated to one of the N lanes. The up to N data elements forms a plurality of segments, and performance of the segmented operation comprises performing a separate operation on the data elements of each segment, the separate operation involving interaction between the lanes containing the data elements of the associated segment. Predicate generation circuitry is responsive to a compute descriptor instruction specifying an input vector operand comprising a plurality of segment descriptors, to generate per lane predicate information used by the vector processing circuitry when performing the segmented operation to maintain a boundary between each of the plurality of segments. As a result, interaction between lanes containing data elements from different segments is prevented. This allows very effective utilisation of the lanes of parallel processing within the vector processing circuitry to be achieved.

Field of the Invention
The present invention relates to a data processing apparatus and method for performing segmented operations.
Description of the Prior Art
One known technique for improving performance of a data processing apparatus is to provide circuitry to support execution of vector operations. Vector operations are performed on at least one vector operand, where each vector operand comprises a plurality of data elements. Performance of the vector operation then involves applying an operation repetitively across the various data elements within the vector operand(s).
In typical data processing systems that support performance of vector operations, a vector register file will be provided for storing the vector operands. Hence, by way of example, each vector register within a vector register file may store a vector operand comprising a plurality of data elements.
In certain implementations, it is also known to provide vector processing circuitry (often referred to as SIMD (Single Instruction Multiple Data) processing circuitry) which provides multiple lanes of parallel processing in order to perform operations in parallel on the various data elements within the vector operands.
Through the use of vector operations, significant performance benefits can be realised when compared with the performance of an equivalent series of scalar operations.
For certain types of operations which can be vectorised to enable them to be executed in parallel within the various lanes of the vector processing circuitry, it is difficult to obtain efficient utilisation of the vector processing circuitry. For example, there are often operations which are performed on each iteration of a loop, but within each iteration the number of data elements to be processed by those operations can vary, such that there is a lack of regularity in the number of data elements to be processed in each iteration. Whilst for each iteration the various data elements may be able to be processed within respective lanes of the vector processing circuitry, this will not always lead to good utilisation of the available lanes of the vector processing circuitry. For example, if the vector processing circuitry has N lanes of parallel processing, it may often be the case that less than N data elements are processed in respect of several of the iterations, leading to inefficient utilisation of the vector processing circuitry. Further, due to the irregular nature of the data elements for each iteration, it has up to now been considered impractical to make more efficient use of the vector processing circuitry since it is unclear exactly how many lanes will be required on any particular iteration.
One example of an algorithm where such irregular numbers of data elements need to be processed is a sparse matrix multiplication algorithm, where a sparse matrix of first data elements is multiplied by a vector of second data elements in order to produce a number of multiplication results for each row of the sparse matrix. The multiplication results within each row are then accumulated in order to produce a result for each row. However, the number of multiplication results produced for each row is dependent on the number of non-zero data elements in each row of the sparse matrix, and hence the number of multiplication results can vary quite significantly between the various rows. Whilst the accumulation operation required to accumulate the multiplication results for any particular row lends itself to being performed using lanes of the vector processing circuitry, the number of lanes required for any particular iteration will vary, and this will tend to result in significant underutilisation of the vector processing circuitry, which will affect both performance and the energy consumption of the vector processing circuitry when performing those operations.
Recent attempts at solving irregular problems such as sparse matrix vector multiplication have focused on using throughput-oriented processors or graphics processing units (GPUs). Whilst GPUs are very good at overlapping computation with memory accesses and thus hiding latency, they experience difficulties when the irregularity of the data structures manifest as computational load imbalances. As a result, the efforts are only successful when special data formats are used or the underlying physical problem being modelled produces a well structured sparse matrix for example.
The following are examples of various papers that describe techniques for handling irregular data structures:
1. Shubhabrata Sengupta, Efficient Primitives and Algorithms for Many-core architectures, PhD Thesis, 2010.
2. G. E. Blelloch, J. C. Hardwick, J. Sipelstein, M. Zagha, S. Chatterjee, Implementation of a Portable Nested Data-Parallel Language, Journal of Parallel and Distributed Computing, Volume 21, Issue 1, April 1994.
3. B. Ren, G. Agrawal, J. R. Larus, T. Mytkowicz, T. Poutanen, W. Schulte, SIMD Parallelization of Applications that Traverse Irregular Data Structures, 2013.
4. M. Billeter, O. Olsson, U. Assarsson, Proceedings of the Conference on High Performance Graphics 2009, Efficient Stream Compaction on Wide SIMD Many-Core Architectures.
It would be desirable to provide a mechanism for improving the utilisation of vector processing circuitry, that would enable better utilisation of the lanes of parallel processing when handling a variety of sets of data, for example the earlier described irregular data structures.

Data processing apparatus and method for performing segmented operations


An antitheft gear lever lock for cars comprising a bracket (1) forged by manganese steel under solubilized state having a Brinell hardness of approximately 220 kg/mm.sup.2. The bracket is formed with an end section (2) provided with throughholes (3) for fastening bolts (12) and being able to be subjected to one or more bendings (8). The bracket (1) has further an elongated intermediate section (6) provided with one or more bendings (8', 8") approaching the gear lever (14) and has a head section (4) provided with holes (5) for the connection to the antitheft padlock closure mechanism (16) which is supported by the bracket (1). The antitheft padlock closure mechanism is adapted to lock a gear lever (14) by a bend (28) embracing and retaining the gear lever (14) in the operative position and the bend (28) is able to reach its rest position by an easy rotational movement.

The present invention relates to an antitheft gear lever lock for cars in the form of a bracket locking the gear lever to the floor of the car.
Antitheft devices for cars locking mechanically the gear lever are known. They essentially consist of a padlock closure mechanism with a body which is rigidly connected to one end of a bracket, the other end of which is bolted to the floor of the car, and with a bend supported by such body which can be snap-locked to and unlocked from the latter and in the operating position is caused to embrace the gear lever in order to lock it in the reverse gear position in case of cars with manually operated gear shift and in the park position in case of cars with automatic gearshift.
However, such antitheft devices have some drawbacks. One drawback relates to the locking bracket of the padlock closure mechanism. Such drawback consists in that the brackets used hitherto are not made of a material which is plastic enough to be easily bent by a fitter so that there is no chance to adapt the brackets to any car model and then a particular bracket must be used every time. A second drawback relates to the body including the padlock closure mechanism which is supported by the bracket when the gear lever lock has to be brought to the rest position. Presently, the body is provided at the upper side with a groove and two tabs standing from said body and parallel to and urged away from each other by a spring. A bend is slidingly inserted into such groove so as to engage said tabs in order to overcome the force of the spring and to reach its rest position. The described operation is very hard to be carried out by the driver.


There is provided a filter network arrangement comprising a filter network; and one or more correction networks, wherein the one or more correction networks is arranged to substantially equalize the passband gain and group delay of the filter network arrangement. Given an appropriate Q for the one or more correction networks, a polynomial for the one or more correction networks can be found that equalizes both the passband gain and group delay and the one or more correction networks can be synthesized from the polynomial.

Communication satellites typically process signals received and transmitted in a number of communication channels. To separate and combine the communication channels, the satellite may make use of a number of filters. Filters involved in signal processing are designed to meet often strict requirements on signal quality. Gain and group delay variation as a function of frequency can cause signal degradation. It is therefore desirable that filters involved in signal processing exhibit close to gain flatness and group delay flatness where possible.
In non-minimum phase filters, cross-couplings within the filters have been used to equalise the group delay of the filters. This technique requires a higher order filter and there is a limit to the percentage of the bandwidth of the filter which can be corrected.
It is also known to use external networks to equalise group delay across the passband of a filter. For example, external one-port networks have been used to add appropriate delays to signals in the passband.
Moreover, it is known that the quality factor (Q) of the resonators of a filter can be adjusted in order to give some flattening of the passband. The Q of a resonator is a measure of the strength of the damping of its oscillations. To obtain a flat passband, very high Q filter resonators are conventionally used, which results in a filter with a relatively large size. To obtain a flat passband with lower Q resonators, pre-distortion, the introduction of complex transmission zeros or lossy cross couplings in the filter have been suggested. The use of complex zeros or lossy cross couplings to flatten the passband means that an increase in the complexity and the order of the filter is required.
The invention aims to improve on the prior art.


Apparatus, methods, and other embodiments associated with correcting defects in an image sensor output are described. According to one embodiment, an imaging device includes image sensor array logic, calibrated noise logic, and defect logic. The image sensor array logic is configured to generate an image array of output pixels in a Bayer pattern. The calibrated noise logic is configured to generate a noise estimate for each pixel. The defect logic is configured to detect a potential defect in a pixel-under-test of the image array of output pixels based on the noise estimate.

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventor(s), to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Image sensor arrays are formed from a grid of photo detectors/sensors. In is not uncommon to have one or more defective photo detectors that originated from the manufacturing process or became defective over the lifetime of the image sensor array. When an image sensor array outputs an image array of output pixel values, the output pixel values (corresponding detected intensities of light) for defective photo detectors will be incorrect. That is, the output pixel values for defective photo detectors in the image sensor array will not properly correspond to the intensities of light impinging on those photo detectors of the sensor array. For example, a defective photo detector may output a pixel value that is too bright (too large) or too dark (too small).
Some imaging devices (e.g., cameras) attempt to correct the output values of defective photo detectors in an image array of output pixel values. For example, some techniques generate correction factors for defective photo detectors before imaging (e.g., during a calibration process) and then apply the correction factors during imaging to correct the pixel values. However, these correction techniques have their limitations, especially in imaging devices having image sensor arrays with multiple color channels.

Methods and apparatus for defect correction in image sensor outputs


A method is provided for a destination storage system to handle SCSI-3 reservations. The method includes discovering a volume on a source storage system when the source storage system exports the volume to the destination storage system, exporting the volume to host computer systems, locally registering keys for first paths to the destination storage system, and registering with the source storage system the keys for second paths to the source storage system. When one of the host computer systems requests to reserve the volume, the method includes locally reserving the volume for paths to the destination storage system with registered keys and performing reservation forwarding to request the source storage system to reserve the volume for paths to the source storage system with registered keys.

A storage array is a storage system that contains multiple drives. It has cache memory and functionalities such as RAID (redundant array of independent disks) and virtualization. A storage area network (SAN) is a network that can provide access to consolidated, block level data storage. It can be used to make storage devices, such as storage arrays, accessible to host computers (e.g., server computers) so that the storage devices appear as locally attached devices to the operating systems on the host computers.
Use of the same reference numbers in different figures indicates similar or identical elements.

Hewlett Packard Enterprise Development LP


A rotor of a steam or gas turbine is equipped with rotor blades, which are held in the rotor (6) in a plurality of radial rows and comprise a blade foot 1 installed in the rotor (6), a blade leaf (2) and a cover plate (3). An open pocket (5) is prepared in the sloping surfaces of the cover plates (3) of a row of rotor blades, which the sloping surfaces are located opposite each other. The pockets (5) of two adjacent cover plates (3) form together an essentially closed cavity, which expands in the radial direction of the rotor (6). A pin, whose largest cross section is smaller than the largest cross section of the cavity but larger than the smallest cross section of the cavity, is placed freely movably into each cavity.

The following description pertains to the application of the present invention in a steam turbine. The statements made analogously also apply to gas turbines.
Steam turbines are used mainly as powerplant turbines for generating electricity and as industrial turbines for driving generators, pumps, fans and compressors. The steam turbine is a heat engine with rotating rotors, in which the enthalpy gradient of the continuously flowing steam is converted into mechanical energy in one or more stages.
The blading of the rotating rotor of the turbine shall convert the enthalpy of the steam into kinetic energy possibly in a lossless manner and transmit the forces occurring in the process to the shaft and the housing of the turbine. The steam now flows from a space having a higher pressure through a nozzle into a space being under a lower pressure. The greater the pressure difference, the greater is the velocity of the steam attained. After the discharge from the nozzle, the steam reaches the curved profile of the first rotor blade stage, the so-called regulating stage. Subsequently, the deflection takes place in the stationary guide vane stage for a subsequent flow through the next rotor blade stage again. Depending on the design and the size of the turbine, the process is repeated several times. The profile length of the rotor blades and guide vanes increases in the direction of flow. As a result, the space flown through increases, as a consequence of which the pressure and the temperature of the steam decrease. Large turbines are divided into a high-pressure part, a medium-pressure part and a low-pressure part.
The profile of each blade is a compromise between fluidic, strength-related, vibration-related and economic requirements. The blade profiles are available with mostly geometrically graduated chord lengths. The blades in a turbine are subject to many different loads and stresses. To guarantee a long operating time and to avoid damage, the blades must be designed and dimensioned correspondingly for safety. A rotor blade must have, for example, a sufficient strength in order to absorb the load caused by the centrifugal forces occurring as well as by the bending due to the torque to be transmitted. Additional load factors are the temperature at the inlet, which reaches up to 530° C., and the erosion corrosion occurring on the profile inlet sides due to the moisture content of the steam in the low-pressure range.
In addition to the stress caused by centrifugal forces, temperature and erosion corrosion, the rotor blades are subject to stress due to vibration. Vibration is induced in the rotor blades by the flowing steam in conjunction with other acting forces. The stress due to vibration leads, in the long term, to a change in the microstructure of the blade material. Incipient cracks of submicroscopic size are formed at first in the near-surface area, and they merge over time. After the damaging phase of the merging of the cracks, an incipient technical crack is finally formed, which extends at right angles to the highest principal direct stress and induces a considerable excessive increase in stress at the tips of the cracks. If the crack is not recognized or the blade is not replaced, fatigue fracture will occur at the end of the process. Damage due to stress due to vibration is among the most frequent causes of damage in material engineering, partly because the actual stress groups are unknown and partly because no complete theory can be set up as a consequence of the large number of material engineering influential factors.
Among other things, the following solutions are used to damp the vibrations of the rotor blades of steam turbines.
A wire extending circularly in holes in the profile area damps the vibrations in larger end-stage blades in the low-pressure range of the turbine.
In rotor blades, which are loaded by a low circumferential velocity only, a shrouding is riveted in sections by means of rivet pins to the profile end of the blades installed in the turbine rotor. This design was frequently used in older turbines. The strength of the riveted connection is not sufficient in modern turbines with high circumferential velocities. The riveted design is ruled out here.
Cover plate rotor blades, which combine good strength properties with high efficiencies, are now used almost exclusively in the high-pressure and medium-pressure areas of turbines. The blade and the piece of shrouding (cover plate) belonging to it form one unit in this design. The cover plates of the individual rotor blades form a ring after their installation in the turbine rotor. The vibration is damped in them at the contact surfaces between the individual blades. The drawback of the low strength of the riveted connection is thus avoided.
However, the design of the rotor blades provided with cover plates has the following weak points. It is not always possible in practice to install the rotor blades without clearance in relation to one another because of the different tolerances of each rotor blade in a stage with, e.g., 100 rotor blades. Another reason is the strong centrifugal forces, which act on every individual rotor blade in the operating state of the turbine. The centrifugal forces cause the blades to be somewhat offset to the outside. Since each rotor blade forms a wedge with its foot and cover plate surfaces, a gap is formed at the cover plate surfaces between the individual rotor blades due to the described outward settling of the blades. The vibrations are no longer damped as described because of the gap formation.
Several prior-art solutions are available for avoiding the described drawback caused by the gap formation between the cover plates of the rotor blades.
A plane groove each, in which a circular wire is introduced, is turned in the two plane faces of the cover plates after the installation of the rotor blades in the turbine rotor. The blades are connected with one another by the wire, and the vibrations are damped. The drawback of this solution is that a sufficient cover plate height must be available to install the wire. Heavy weight of the cover plates leads to a reduction of the possible speed of rotation of the turbine because of the events that are to be taken into account in the calculation of the strength.
In a second design, the cover plates are manufactured with a slight angular twisting in relation to the blade foot. After their installation in the turbine rotor, the rotor blades are under a certain torsional stress, which compensates the gap formation and guarantees damping of the vibrations as a result. However, this solution is expensive because of the manufacturing technology and difficult to design.
Furthermore, the rotor blades must have a certain minimum length for their use in order to make it possible to generate a torsional stress in the first place. In the longer term, the stress decreases due to wear on the contact surfaces and material fatigue. Vibration damping is no longer present thereafter.


Provided is an on-vehicle electronic control device with low cost and low power consumption for performing monitoring control in both a driving mode and a parking mode of a vehicle. A main CPU is supplied with electric power from an on-vehicle battery via a power switching element and a main power supply circuit so as to control a plurality of electric loads in accordance with operating states of a plurality of input sensors. A sub CPU connected to the main CPU via a serial interface is supplied with electric power from the on-vehicle battery via a sub power supply circuit so as to monitor operations of the main CPU and input signals. The sub CPU has low speed and small memory capacity so as to operate with lower power consumption compared with the main CPU.

1. Field of the Invention
The present invention relates to an improvement of an on-vehicle electronic control device suitable for detecting fuel evaporation from a fuel tank in a parked state, measuring parking time, or the like.
2. Description of the Related Art
There are various known electronic control devices to which electric power is supplied from a battery mounted on a vehicle in an unmanned and parked state. They are used for detecting whether or not vapor generated in a fuel tank for an internal combustion engine mounted on a vehicle leaks to the outside of the fuel tank, for detecting whether or not a temperature sensor for cooling water for an internal combustion engine detects a decrease in water temperature as time passes after an engine stops, and/or for monitoring a state of a parked vehicle and performing blinking warning display as a part of functions of vehicle antitheft control.
For instance, there is provided an electronic control device performing control with the use of electric power supplied from a battery when a power switch is turned on (see paragraphs [0003] to [0005] and FIG. 1 of JP 2003-315474 A (hereinafter referred to as Patent Document 1), for instance). Patent Document 1 discloses a concept of a soak timer for detecting parked time for preheat control of cooling water or detection of fuel evaporation, which measures the parked time in appropriate measuring time and measuring accuracy for an application as a wide range specification.
According to Patent Document 1, a soak timer IC keeps time in a parked state where the power switch of a vehicle is opened, and after a predetermined period of time a power supply relay is driven to activate a host microcomputer as an engine control device. The host microcomputer performs predetermined control and then issues an instruction about the next activation to the soak timer IC. Then, the host microcomputer stops its action, and the power supply relay is turned off.
However, the soak timer IC can receive an instruction for selecting a clock unit and an instruction for activation clock time from the host microcomputer when the power switch is closed, but does not have a function of detecting fuel evaporation on by itself. In other words, presence or absence of fuel evaporation and/or an abnormal state of a water temperature sensor are detected by the host microcomputer itself as the engine control device while the soak timer IC is an IC only for keeping time.
In addition, there is provided an electronic control device for a vehicle, which is used for preventing a battery from being exhausted due to activation of an on-vehicle device while the engine is stopped (see paragraph [0017], Abstract, and FIG. 1 of JP 2003-232250 A (hereinafter referred to as Patent Document 2), for instance). In this electronic control device for a vehicle, the microcomputer as the engine control device is supplied with electric power from the on-vehicle battery via a power supply relay with a self holding action when the power switch is closed, and includes a timer function for keeping parked time after the power switch is opened. The microcomputer checks an abnormal state at the time point when a predetermined parked time has passed, and then turns off the power supply relay.
This electronic control device for a vehicle does not need a special IC for keeping the parked time. When discharge current of the on-vehicle battery increases after the power switch is opened so that the engine stops, the electronic control device measures discharging capacity of the on-vehicle battery in advance and then judges whether or not to keep the parked time.
In addition, there is provided a failure diagnosis apparatus for engine temperature sensing means, which can check a failure of the water temperature sensor for sensing cooling water temperature for the engine accurately and in early timing after the start of the engine (see paragraph [0026], Abstract, and FIG. 1 of JP 2000-282930 A (hereinafter referred to as Patent Document 3), for instance).
According to Patent Document 3, the engine control device includes a soak timer for detecting stop time of the engine, so as to keep parking time after the power switch is opened until it is closed again. By observing a change in cooling water temperature along with the parking time, the presence or absence of an abnormal state of the water temperature sensor is determined. Further, the action of the engine control device is stopped when the power switch is opened, but the soak timer works to keep the parking time with low power consumption by a backup voltage supplied continuously after the power switch is opened.
On the contrary, as a technique related to the present invention, there is a known electronic control device installed in a vehicle, which includes a main CPU and a sub CPU. In this on-vehicle electronic control device, the sub CPU and the main CPU cooperate with each other and work in parallel, whereby the sub CPU performs an assistant job such as bearing a part of an input and output control function or monitoring presence or absence of an abnormal state of the main CPU or an input and output circuit (see Abstract and FIG. 1 of JP 2002-089351 A (hereinafter referred to as Patent Document 4), for instance).
According to this on-vehicle electronic control device, an input signal for low speed operation is supplied to the sub CPU that is connected to the main CPU via a serial interface, and the input signal information is transmitted to the main CPU via a serial communication circuit. In addition, an output circuit for low speed operation is connected to the sub CPU, and the output circuit responds to an output control signal transmitted from the main CPU via the serial communication circuit. As a result, the number of input and output ports of the main CPU can be reduced, an input filter constant can be adjusted or set by the sub CPU, or other various assistant jobs can be performed by the sub CPU.
In addition, there is provided an air intake amount control device for an engine, having a duplexed CPU system for control (see Abstract and FIG. 1 of JP 2002-371897 A (hereinafter referred to as Patent Document 5), for instance). According to this air intake amount control device for an engine, a sub CPU is connected via a serial interface to a main CPU having a throttle valve opening degree control function and an engine control function. The sub CPU cooperates with the main CPU so as to detect an abnormal state of control, to stop power supply to a motor for controlling the throttle valve opening degree when an abnormal state occurs, to perform abnormal state warning display or to bear other various assistant functions.
The electronic control device disclosed in Patent Document 1 described above includes an external oscillator having high accuracy, and a reference clock is generated based on an oscillation signal of the oscillator. The reference clock signal is counted for keeping the parked time. It is not discussed in Patent Document 1 that an oscillator of low power consumption, low cost and low accuracy is utilized effectively. Therefore, the electronic control device has a drawback in that power consumption of the on-vehicle battery increases when the power switch is opened.
In addition, the soak timer IC is merely for keeping the parked time and does not have a fuel evaporation detecting function. Therefore, the host microcomputer is required to be supplied with electric power so as to perform the fuel evaporation detection control action when the power switch is closed. Consequently, power consumption of the on-vehicle battery increases when the power switch is opened.
In addition, the device described in the above-mentioned Patent Document 2 does not perform control of power consumption of the on-vehicle battery in the parked state without being charged. Therefore, there arises a problem that set time of the timer for keeping the parked time is restricted or that the parked state cannot be monitored in order to prevent the on-vehicle battery from being in the over discharged state.
Further, in general, a timer circuit commonly called a soak timer keeps a lapse time after the power switch is closed and supplies electric power temporarily to the control device so as to activate a microprocessor when a predetermined period of time passes, whereby the microprocessor can perform short time measuring and monitoring control before turning off the power. Such the intermittent activation is repeated a plurality of times. Therefore, even if the activated operation ends in short time, there arises a problem that the activation of the microprocessor with high speed and large memory capacity can be a large load on the on-vehicle battery while the battery is not charged.
In addition, the device described in the above Patent Document 3 does not have a vehicle monitoring function during the parked state and is limited to the function of merely keeping the parking time after the power switch is opened until it is closed again. Therefore, there arises a problem monitoring control of the fuel evaporation detection cannot be performed during a period while the power switch is opened.
In addition, the devices described in the above Patent Documents 4 and 5 do not relate to the parked state monitoring after the power switch is opened, and the sub CPU is in the disabled state when the power switch is opened. Therefore, there arises a problem that the monitoring control of the fuel evaporation detection cannot be performed during the period while the power switch is opened.


A controlled traction cartridge for use in connection with a differential. The catridge generally comprises a shaft, a gear mounted on the shaft and rotatable with respect thereto, and an interior bearing surfaces associated with the shaft. The gear is maintained in frictional engagement with the interior bearing surface for inhibiting the rotation of the gear.

This invention relates generally to transaxles and, more particularly, relates to a controlled traction catridge for use in providing a controlled traction differential.
As is known, the use of a standard differential assembly in the transmission system of a motor vehicle allows the wheels to spin at different speeds. In the case of a vehicle traveling in a straight line, the axle shafts connected to the standard differential assembly will rotate at the same speed. However, when a turn or curve is encountered, the axle shaft nearest the inside of the turn will slow in rotational speed while the outer axle shaft will simultaneously increase in rotational speed. As such, the wheels, driven by the axle shafts, are prevented from scuffing the surface across which they travel.
While the standard differential assembly serves an important function in the operation of a transmission system, the standard differential of simple construction has difficulty operating under certain conditions. For example, when a first one of the drive tires is disposed in wet, muddy, or loose soil conditions, or when the first drive tire has been partially or completely removed from contact with the ground, the coefficient of friction under the first drive tire will be substantially lower than that associated with the second drive tire. This resulting frictional imbalance will tend to cause the second drive tire to remain stationary while the first drive tire will spin without moving the vehicle.
To solve the problem of loss of traction in larger transaxle systems, a variety of techniques have been developed to reduce the tendency of the transaxle to differential. For example, U.S. Pat. No. 3,528,323 to Kamlukin, issued Sep. 15, 1970, discloses a means for preventing free spinning of one of the driven shafts of a transaxle without interfering with the normal differential capability of the transaxle. In particular, the '323 patent discloses the use of a coil spring to outwardly force the gears of the differential into engagement with the differential housing thereby introducing a frictional force into the assembly which acts to resist relative rotation of the axle shafts. In this manner, the frictional force limits the free spinning of one axle shaft while the other remains stationary.
While the friction inducing means disclosed in the '323 patent works for its intended purpose to provide larger transaxles with a controlled traction differential assembly, the use of coil springs to apply the frictional force often requires special tools and/or procedures for use in applying the forces necessary to set the springs. These additional tools and/or procedures undesirably results in increased manufacturing costs. Therefore, there remains a need for a controlled traction differential assembly which is simpler to construct, can be produced at a lower cost, and which can be readily incorporated into a smaller transaxle such as an integrated hydrostatic transaxle.
As a result of these existing needs, it is an object of the present invention to provide an integrated hydrostatic transaxle having a controlled traction differential assembly which will provide the hydrostatic transaxle with the benefits and advantages which have accrued to other types of transaxles that use controlled traction differential assemblies.
It is a further object of the present invention to provide a controlled traction differential assembly which is cost effective and relatively easy to manufacture.
It is still a further object of the present invention to provide a controlled traction cartridge for use in conveniently converting a standard differential assembly into a controlled traction differential assembly.
It is yet a further object of the present invention to provide a controlled traction differential assembly in which the breakdown bias, i.e., the amount of torque required to cause the differential to operate, may be easily varied.

Controlled traction cartridge and differential