A method of forming conductive vias of integrated circuitry comprises forming first openings in a first masking material, with the first openings being spaced along a line passing across the first openings. Sidewalls of the first openings are lined with a second masking material to form a ring within individual of the first openings and a second opening within the individual first openings radially inside of the ring. The first masking material is removed along the line to form a void space between immediately-adjacent of the rings. A mask is formed that comprises the rings and a third opening in third masking material, with the third opening extending along the line above and across multiple of the rings and multiple of the second openings. The mask is used as an etch mask while etching into substrate material that is exposed through the third opening to form contact openings in the substrate material that are spaced along the line. Conductive material is formed in the contact openings to form conductive vias.

Memory is one type of integrated circuitry and is used in computer systems for storing data. Memory may be fabricated in one or more arrays of individual memory cells. Memory cells may be written to, or read from, using digitlines (which may also be referred to as bitlines, data lines, or sense lines) and access lines (which may also be referred to as wordlines). The digitlines may conductively interconnect memory cells along columns of the array and the wordlines may conductively interconnect memory cells along rows of the array. Each memory cell may be uniquely addressed through the combination of a digitline and a wordline.
Memory cells may be volatile, semi-volatile, or non-volatile. Non-volatile memory cells can store data for extended periods of time in the absence of power. Non-volatile memory is conventionally specified to be memory having a retention time of at least about 10 years. Volatile memory dissipates and is therefore refreshed/rewritten to maintain data storage. Volatile memory may have a retention time of milliseconds or less. Regardless, memory cells are configured to retain or store memory in at least two different selectable states. In a binary system, the states are considered as either a "0" or a "1. In other systems, at least some individual memory cells may be configured to store more than two levels or states of information.
Arrays of memory cells may comprise a plurality of wordlines at one elevation and a plurality of digitlines at another elevation. Individual of the memory cells may effectively be provided between and/or proximate such lines where they cross. Individual memory cells can be written to or read from by application of suitable voltage and/or current to the respective crossing wordline and digitline. An elevationally-elongated (e.g., vertical) conductive via may be provided to each wordline and to each digitline to apply such voltage and/or current to the selected lines. Only one conductive via is commonly fabricated for each line, although multiple conductive vias may be provided to electrically couple to the same line.
A continuing goal in fabrication of memory and other integrated circuitry is to make ever smaller and closer packed circuit components. As integrated circuitry density has increased, there is often greater reduction in the horizontal dimension of circuit components as compared to the vertical dimension. In many instances, the vertical dimension has increased. Conductive vias formed in contact openings are commonly used for electrically coupling circuit components that are at different elevations relative to one another. As circuit components become smaller and closer together, it becomes increasingly difficult to control critical dimension, mask alignment, and provide acceptable margins of error when forming contact openings to lower elevation circuit components.

Methods of forming conductive vias and methods of forming memory circuitry


Provided herein is a Mooring Line Restrainer capable of withstanding the whiplash from the impact of a snapped mooring line, and including a contoured Restraining Member shaped to engage and restrain snapped mooring lines and incorporating a single or multi-turn spring, mounted on a framework attached to one or more support bases. At least one of the support bases is a magnetic holding device adequate for different sizes of mooring lines, for securely and strongly fixing the Mooring Line Restrainers on the deck of a ship at appropriate positions along and on either sides of the mooring lines as per a mooring layout plan. The support bases have provisions for interlinking the plurality of adjacent or alternate Mooring Line Restrainers for forming a strong structure around the mooring lines for confining and restraining any snapped mooring lines within a narrow zone around their pre-snapped positions on the ship's deck.

Field of Invention
The present invention relates to a mooring line restrainer for restricting the area on the deck of a ship of the snap-back zone of a snapped high tension mooring line in order to eliminate or at least reduce injury to ship's personnel and equipment. More particularly, the invention relates to development of novel structural frameworks which can be setup by positioning and linking the mooring line restrainers around the mooring lines on the deck of a ship for restraining any snapped mooring line to a much smaller area.
Description of Related Art
A Mooring refers to any permanent structure to which a vessel may be secured. A ship is secured to a mooring through mooring lines to forestall free movement of the ship on the water. An anchor mooring fixes a vessel's position relative to a point on the bottom of a waterway without connecting the vessel to shore. A Mooring Operation involves laying mooring lines to remote off board locations like anchors, quays, wharfs, tugs, other ships or mooring buoys for securing a ship in a given position.
It is, a known fact that snapping of lines constitutes one of the principal hazards associated with mooring operations. The lines can and do part occasionally. Numerous accidents, many of them fatal, have been regularly reported over the years. When lines under stress break suddenly, the "free end tends to 'whip' or 'oscillate' violently" and hit anybody or anything within their path with tremendous force. A snapped mooring line recoils in an area designated as the "Snap-back Zone". Statistical evidence shows that in 53 percent of all cases of personal injuries arising from mooring incidents, ropes (wire or fibre) have parted under load and personnel within 'snap-back zones' have been hit. In 42 percent of cases, ropes/wires have not parted, but injuries have resulted from ropes jumping/slipping off drum-ends or bitts, or personnel being caught or 'dragged' by ropes, fixtures coming off mountings and from other causes [UK P&I Club's Loss Prevention Bulletin January 2009].
Qualified seafarers are aware of the fact that a snapback zone exists when a mooring line is under tension, and the mooring crew are expected to take this into account when they are working mooring lines on deck. It is possible to roughly estimate the limits of these 'snap-back' zones and if they are highlighted on the deck, the mooring crew can avoid standing inside or close to these danger areas. Painting these areas also helps supervising officers instruct crew to keep clear when lines are coming under tension. Highlighting mooring line snap-back zones ensures that crew can visibly see the danger areas without having to purposely think about them while working.
The shapes and limits of these danger zones have been roughly estimated, and as stated earlier as a precaution these are recommended to be marked on the deck, and the mooring crews are advised not to stand inside or close to these areas. But very often the mooring crew are required to lay more than one line within the area or because of some other operational considerations it may not be always practicable to avoid the snap-back zones. Mooring areas in many cases may also contain several trip and obstruction hazards, and highlighting these is a good starting point.
However, in several cases the number and arrangement of mooring lines can even create several overlapping snap-back zones, and it would be difficult for the mooring crew to avoid these dangerous areas. It is also widely recognized that the estimation of the exact size of these snap-back zones is a very complex analytical problem, and cannot be determined with any reasonable degree of assurance, and thus the mooring crew, is continuously exposed to danger.
Numerous accidents, many of them fatal, have involved seamen being caught in bights of or getting entangled with mooring ropes in motion and being dragged into mooring equipment or fittings. Mooring operations are hazardous, mainly because of the great loads the mooring lines are subjected to, which means that they are likely to part with little warning and great force. When a line breaks or is suddenly released under tension, it will travel back probably within a narrow cone around a straight line, striking anybody or anything in its path. If the line leads around a roller or a lead, then it may potentially whip around in a wider arc.
However, since it is known that the actual dimension of such areas is difficult to determine, and may potentially extend over an area larger than the limits normally shown in various official safety manuals. This is because there are too many factors like material, age/condition, and length of line deployed, the mode of failure, and the angle of line that influence the behavior of a snapped mooring line. Therefore, the dynamics of a snapped mooring line being very complex is not amenable for analysis by simple mathematical models. A snapped line behaves in a very unpredictable chaotic manner.
In view of this, the practice of reliance on the shape and size of the snap-back zones determined on the basis of unsound reasoning only provides limited safety in many situations. In reality the incorrectly marked snap-back zones may even provide a false sense of safety and security to the mooring crew.


Embodiments include systems for regulating windings in a power supply. Aspects include a transformer comprising a first primary winding and a first secondary winding, a DC to DC converter, a saturable reactor coupled to an output of the first secondary winding and an input to the DC to DC converter, and a controlled current source coupled to a node between the saturable reactor and the input of the DC to DC converter, wherein the controlled current source is configured to provide a current rate based on an output voltage of the DC to DC converter, wherein a first filter inductor of the DC to DC converter is magnetically coupled to a second filter inductor of a second DC to DC converter.

Exemplary embodiments pertain to the art of power converters and more specifically to critical load management in secondary winding in auxiliary power supply.
Switched mode DC to DC converter power supplies are widely used to convert power from a source, such as mains power, to DC power supply for electronic devices. Switched mode DC to DC converters are generally fly back and forward converter topologies. In both instances, the DC to DC converter employs a transformer and a switching device to couple energy to a secondary output. The transformer provides isolation as well as the ability to adjust the output voltage. For multi-output forward converters, often only one output load is regulated while the others are unregulated. Regulating these other output loads typically requires additional large circuitry.

Critical load management in secondary winding in auxiliary power supply


A level shifter ESD protection circuit with power-on-sequence consideration used for receiving a first signal and outputting a second signal is provided. The level shifter circuit includes an inverter, a first switch, a second switch, a voltage level shifting circuit, a first ESD clamp and a second ESD clamp circuits. When the first power supply has been powered on and the second power supply is off, the first and second switches will remain off resulting from the power-off of the second power supply. Therefore, the second power source would not be affected by the first power supply because of passing through the ESD protection circuit.

1. Field of Invention
The present invention relates to an electrostatic discharge (ESD) protection circuit. More specifically, the present invention relates to a level shifter ESD protection circuit with power-on-sequence consideration.
2. Description of Related Art
In mixed-voltage IC, as shown in FIG. 1A, different internal circuits are supplied with power by the system voltage with different voltage levels, respectively. FIG. 1A is a block diagram of a portion of the circuit of a general mixed-voltage IC. In FIG. 1A, the operation power of the internal circuit 110 is provided by system voltage VDD1 (for example, 3.3 volts) and ground voltage VSS1 (for example, 0 volt). In addition, the operation power of the internal circuit 130 is provided by system voltage VDD2 (for example, 12 volts) and ground voltage VSS2 (for example, 0 volt). Since the input/output logic levels of the internal circuit 110 and the internal circuit 130 are different, a level shifter is needed to serve as the interface circuit of the internal circuit 110 and the internal circuit 130. For example, the level shifter 120 receives the output signal 111 (for example, 0˜3.3 volts) output by the internal circuit 110, transforms the same into a corresponding signal 131 (for example, 0˜12 volts) and outputs the same to the internal circuit 130.
When electrostatic discharge (ESD) happens at the connecting end of the mixed-voltage IC, the instantaneous ESD current would flows along the low impedance path in IC in a large volume. The large volume ESD current would generate high temperature and damage any components in the path of the current. FIG. 1B is a schematic diagram of the level shifter 120 and the ESD path in FIG. 1A. For example, as shown in FIG. 1B, when ESD event happens at the connecting end of the ground voltage VSS2, if the system voltage VDD1 is grounded, then the ESD current passes through the gate capacitor of the transistor 121 from the ground voltage line VSS2, flows to the system voltage line VDD1 (the dotted line ESD1 of the current path shown in the figure). Or, if the system voltage VSS1 is grounded, then the ESD current passes through the gate capacitor of the transistor 121 from the ground voltage line VSS2 and travels to the ground voltage line VSS1 (the dotted line ESD2 of the current path shown in the figure). As a result, the transistor 121 may be damaged (in the same principle, the transistor 122 may also be damaged).
The main cause of the damage of the above components is because there is no connection between the ground voltage line VSS1 and the ground voltage line VSS2. Therefore, the electrostatic discharge current ESD is not able to be conducted to the ground voltage line VSS2 via the ground voltage line VSS1, but only through the silicon substrate. If the substrate impedance is not small enough, the electrostatic discharge current ESD may damage the transistor 121. Since the ESD is instantaneous, therefore in the case of electrostatic discharge, the impedance of gate capacitor is less than the impedance of normal operation.
FIG. 1C is a schematic diagram of another level shifter 120 and ESD path in FIG. 1A. As shown in FIG. 1C, the gravity of regular ESD occurred in the system voltage line VDD2 is severer than the regular ESD occurred in the ground voltage line VSS2. That is because the ground voltage line VSS2 still has the substrate as the connection path connecting the ground voltage line VSS1, yet there is no discharging path in N well to help balance charge. Therefore, for example, when ESD event happens at the connecting end of the system voltage line VDD2, if system voltage VDD1 is grounded, then the electrostatic discharge current ESD travels through the gate capacitor of the transistor 123 from the system voltage line VDD2 and arrives at the system voltage line VDD1 (the dotted line ESD1 of the current path shown in FIG. 1C). Or, if the ground voltage line VSS1 is grounded, then the electrostatic discharge current ESD travels through the gate capacitor of the transistor 123 from the system voltage line VDD2 and arrives at the ground voltage line VSS1 (the dotted line ESD2 of the current path shown in FIG. 1C). As a result, the transistor 123 may be damaged (same principle, the transistor 124 may also be burned).
An ESD protection circuit (such as Taiwan Patent No. I234266) may be disposed in the level shifter 120 by those who are skilled in the art to avoid the level shifter 120 from damaged by ESD current. However, system voltage line VDD1 and system voltage line VDD2 are usually not powered on at the same time. For example, the mixed-voltage IC cuts off the power supply of the system voltage line VDD2 when entering power saving mode, while the power supply of the system voltage line VDD1 is maintained. If the power-on-sequence is taken into consideration, because of the disposition of the ESD protection circuit, the first powered-on power supply may affect the power which is not yet powered on and the related circuits thereof. For example, FIG. 1D schematically describes that, through the disposed ESD protection circuit, the power supply which has not been powered on and the related circuits are affected by the power supply which has been powered on earlier.
With reference to FIG. 1D, when the power supply of the system voltage line VDD1 is activated first before the power supply of the system voltage line VDD2, the system voltage line VDD1 supplies power to the system voltage line VDD2 via the transistor 125 and the ESD clamp circuit 126 (and/or the ESD clamp circuit 127). Therefore, the internal circuit 130 which should be turned off may be turned on because of the power supplied by the system voltage line VDD1. In addition, since the operating voltage of the internal circuit 130 is different from the voltage of the internal circuit 110, when the system voltage line VDD1 supplies power to the system voltage line VDD2 via the ESD clamp circuit, error of the internal circuit 130 will occur, and even the internal circuit 130 may be damaged.

Level shifter ESD protection circuit with power-on-sequence consideration


An assembly includes a Surface Acoustic Wave (SAW) component disposed within a housing or capsule by supports which support the component close to, but not in contact with, the bottom of the housing or capsule, thereby allowing some movement of at least portions of the component within the housing or capsule.

1. Field of the Invention
The present invention relates to means for assembly longitudinal body, such as a Surface Acoustic Wave (SAW) component within a housing or capsule (package).
2. Background Information
SAW components or devices are characterized by the use of a piezoelectric crystal substrate with electro acoustic transducers, normally a metal film forming an interdigital `finger` pattern, deposited onto the crystal surface. The transducer produces an electric field over the crystal surface when an electric signal is applied to it. This electric field is transformed into a mechanical force in the crystal, which subsequently launches an acoustic (mechanical) wave in the crystal surface.
Conversely, the transducer may convert the acoustic energy back to an electric signal. The most commonly used substrate materials are quartz, lithium niobate and lithium tantalate. These materials are, by their nature, sensitive to mechanical stress. Any mechanical stress will influence the electrical behavior of the SAW component.
SAW components usually have a longitudinal structure, i.e., the length is greater than the width, and they are usually glued along one of its surfaces to the bottom of a housing or capsule. This assembling method can be considered suitable for smaller SAW components, such as those having a length of less than 20-30 mm, and for SAW devices with moderate electric performance requirements over the operating temperature range. When larger SAW components are concerned, and when both the electrical performance requirements and the operating temperature range are demanding, other assembling means are required, in order to avoid degradation of the electrical performance of the SAW component due to mechanical stress introduced by the differential coefficient of thermal expansion between the SAW substrate and the capsule.
An alternative, well known approach is to isolate the entire SAW component and its capsule thermally, e.g., by use of a temperature controlled heater. This method is however in many cases impracticle or unacceptable for cost or other reasons.

Surface acoustic wave device clamped within housing


A hinge has two hinge parts for connecting two device parts of a portable device. The hinge parts can be moved relative to each other so as to allow the portable device to operate in a number of positions. For example, in a mobile phone with a sliding cover to expose the phone keyboard when the mobile phone is operated in an open position, the hinge parts are also configured to allow the sliding motion of the sliding cover. Furthermore, electrically conductive segments are provided on the hinge parts so that electrical contacts between the device parts can be achieved when the portable device is operated in different positions. Additionally, an optical conduit is provided through the hinge so that optical signals can be conveyed between the device parts when the portable device is operated in different positions.

A portable device, such as a mobile phone, may have two device parts interconnected by a hinge. It is advantageous to have an optical conduit within the hinge for transmitting optical signals between the device parts. In general, optical signals must be converted into electrical signals and, therefore, electrical powers are generally needed in both device parts. Thus, it is also advantageous to convey electrical power or signals from one device part to another through the hinge.

Hinge with optical signal conduit and electrical connection


A mold used to form a midsole for an article of footwear and a method of manufacturing are disclosed. The mold includes a first portion and a second portion cooperating to define a midsole recess, the first portion including a major recess and plurality of wall segments extending throughout the major recess and cooperating to define a plurality of minor recesses. A fillet is provided at each intersection of adjacent wall segments. The mold may have a draft angle of less than or equal to approximately 2.5 degrees.

To keep a wearer safe and comfortable, footwear is called upon to perform a variety of functions. For example, the sole structure of footwear should provide adequate support and impact force attenuation properties to prevent injury and reduce fatigue, while at the same time provide adequate flexibility so that the sole structure articulates, flexes, stretches, or otherwise moves to allow an individual to fully utilize the natural motion of the foot
Conventional articles of athletic footwear generally include two primary elements, an upper and a sole structure. The upper is secured to the sole structure and forms a void on the interior of the footwear for comfortably and securely receiving a foot. The sole structure is secured to a lower portion of the upper and is positioned between the foot and the ground. The sole structure generally incorporates multiple layers that are conventionally referred to as an insole, a midsole, and an outsole. The insole, or sockliner, is a thin, compressible member located within the void and proximate a lower surface of the foot to enhance footwear comfort. The midsole, which is conventionally secured to the upper along the length of the upper, forms a middle layer of the sole structure and serves a variety of purposes that include attenuating ground (or other contact surface) reaction forces to lessen stresses upon the foot and leg; controlling potentially harmful foot motions, such as over pronation; and beneficially utilizing such ground reaction forces for more efficient toe-off. The outsole forms a ground-engaging portion (or other contact surface-engaging portion) of the sole structure, and is formed from a durable and wear-resistant material that includes texturing to improve traction.
The conventional midsole is primarily formed from a resilient, polymer foam material that extends throughout the length of the footwear, often by way of a molding process. The properties of the polymer foam material in the midsole are primarily dependent upon factors that include the dimensional configuration of the midsole and the specific characteristics of the material selected for the polymer foam, including the hardness or density of the polymer foam material. By varying these factors throughout the midsole, the relative stiffness and degree of ground reaction force attenuation may be altered to meet the specific demands of the activity for which the footwear is intended to be used. In addition to polymer foam materials, conventional midsoles may include, for example, one or more fluid-filled bladders (e.g., filled with air or other gasses) and moderators.
Midsoles may be formed with sipes, which are vertically extending slots or recesses formed in the midsole that form sole elements throughout the midsole and an articulated configuration that provides flexibility for the footwear. The sipes may be formed during a molding process used to form the midsole, or they may be cut into the midsole with a hot knife or other suitable members after the midsole has been formed.
A mold used to form a midsole may include blades extending upwardly from a bottom portion of the mold, with the blades defining the sipes within the material used to form the midsole. In some footwear the sipes may be relatively narrow and relatively deep, in which case the blades used to make such sipes may be susceptible to breakage.
It would be desirable to provide a mold and method of manufacturing footwear with sipes that reduces or overcomes some or all of the difficulties inherent in prior known devices. Particular advantages will be apparent to those skilled in the art, that is, those who are knowledgeable or experienced in this field of technology, in view of the following disclosure of the invention and detailed description of certain embodiments.

Mold for footwear with sipes and method of manufacturing same


The disclosed embodiments relate to reducing adjacent channel interference in an OFDM receiver. An error metric is monitored and the carrier frequency of the desired channel is slowly adjusted in response to the error metric. In this manner, the received OFDM signal, including the desired signal corrupted by the adjacent interfering channel, may be shifted until the zero crossings of the adjacent channel line up with the FFT bins. A multi-tap equalizer may then be used to remove the inter-bin interference that results from the frequency offset in the desired channel.

This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
A wireless LAN (WLAN) is a flexible data communications system implemented as an alternative or extension to a wired LAN within a building or campus. Using electromagnetic waves, WLANs transmit and receive data over the air, minimizing the need for wired connections. Thus, WLANs combine data connectivity with user mobility, and, through simplified configuration, enable movable LANs. Some industries that have benefited from the productivity gains of using portable terminals (e.g., notebook computers) to transmit and receive real-time information are the digital home networking, health-care, retail, manufacturing, and warehousing industries.
Manufacturers of WLANs have a range of transmission technologies to choose from when designing a WLAN. Some exemplary technologies are multicarrier systems, spread spectrum systems, narrowband systems, and infrared systems. Although each system has its own benefits and detriments, one particular type of multicarrier transmission system, orthogonal frequency division multiplexing (OFDM), has proven to be exceptionally useful for WLAN communications.
OFDM is a robust technique for efficiently transmitting data over a channel. The technique uses a plurality of sub-carrier frequencies (sub-carriers) within a channel bandwidth to transmit data. These sub-carriers are arranged for optimal bandwidth efficiency compared to conventional frequency division multiplexing (FDM) which can waste portions of the channel bandwidth in order to separate and isolate the sub-carrier frequency spectra and thereby avoid inter-carrier interference (ICI). By contrast, although the frequency spectra of OFDM sub-carriers overlap significantly within the OFDM channel bandwidth, OFDM nonetheless allows resolution and recovery of the information that has been modulated onto each sub-carrier.
The transmission of data through a channel via OFDM signals also provides several other advantages over more conventional transmission techniques. Some of these advantages are a tolerance to multipath delay spread and frequency selective fading, efficient spectrum usage, simplified sub-channel equalization, and good interference properties.
In spite of these advantages, there are some problems with OFDM data transfer in systems that are adapted to process multiple signals from multiple users. One example of such a problem is adjacent channel interference (sometimes referred to as interchannel interference). One of the main reasons for adjacent channel interference is the windowing that occurs as an inherent part of the Fast Fourier Transform (FFT) processing of signals that is typical of all OFDM receivers. In processing signals using FFT algorithms, the tone of each OFDM sub-band may be spread across multiple FFT bins with periodically spaced zero crossings (e.g. a sinc function in the case of a rectangular window) in the frequency domain. Such a frequency domain structure allows adjacent channels to be placed at the multiples of the sampling rate with no adjacent channel interference because of the alignment of the zero crossing. Thus, even though the energy from an adjacent channel in the frequency range for the desired channel is non-zero, there is no adjacent channel interference because of the orthogonal nature of the two signals.
However, when a carrier frequency offset is present, the orthogonality between adjacent channel signals is not maintained and adjacent channel interference occurs. A method of reducing adjacent channel interference in OFDM receivers is desirable.

Method and apparatus for adjacent channel interference reduction in an orthogonal frequency division multiplexing (OFDM) receiver


An image forming apparatus reads an original to acquire image information, processes the acquired image information, and determines whether or not to form the processing result on the original. Upon determining to form the processing result on the original, the image forming apparatus forms the processing result on the original, and upon determining to not form the processing result on the original, the image forming apparatus forms the processing result on a sheet other than the original.

1. Field of the Invention
The present invention relates to an image forming apparatus for reading and processing an image of an original, a control method for the same, and a storage medium.
2. Description of the Related Art
In existing image forming apparatuses, the original conveying system of an original conveying type of image reading unit and the print sheet conveying system of the print unit for print sheets have generally been configured independently of each other. Specifically, the original conveying system and the print sheet conveying system are each independently provided with a sheet feeding unit for originals or print sheets, guide members that constitute a predetermined conveying path, multiple conveying rollers, a motor that is the drive source, a drive circuit for the motor, a sheet discharge unit, and the like. It has therefore not been possible to avoid an increase in the complexity of the overall functional configuration of the image forming apparatus, a rise in cost, and an increase in apparatus size. Japanese Patent Laid-Open No. 2000-185881 proposes configuration simplification, cost reduction, and size reduction by using the original conveying system and the transfer sheet conveying system in common through providing the image reading unit in the transfer sheet conveying path from the sheet feeding unit to the sheet discharge unit.
With the above-described image forming apparatus, before the print unit performs printing on an original in the sheet feeding stage, the original in that sheet feeding stage is read by the reading unit, and then printing is performed on the original in the sheet feeding stage after the image information of the original has been acquired. Also, some image forming apparatuses such as this have a sheet conveying path and a print unit that can perform printing on an original that has already been subjected to single-sided or double-sided printing. Applications for this include overwrite printing in which printing is performed on an original that has already been subjected to printing. Also, there is a conventionally known function according to which after an image of a read original has been transmitted, the transmission result is printed on a print sheet as a report and discharged. According to this function, the user can view the report in order to check whether or not the image of the original was transmitted normally.
However, the above conventional technology has the problems described below. In the above conventional technology, the transmission result report is printed on a different print sheet from the original. In other words, in the conventional technology, a separate print sheet for report printing needs to be fed and subjected to printing. However, if the read original is an original that is printed on only one side, sheets can be saved by printing the transmission result on the back surface. Accordingly, if the report can be printed on the original, it is desirable to use the original instead of preparing a separate sheet for printing.

Image forming apparatus, control method for the same and storage medium


A switching hinge having a hinge housing at which a hinge flap is swivellably disposed about an axis. A switching element is coupled to the hinge flap, which switching element triggers a switching operation at a built-in switch in a predetermined position of the hinge flap.

The present disclosure relates to a switching hinge having a hinge housing, at which a hinge flap is swivellably disposed about an axis. A switching element is coupled to the hinge flap, which switching element triggers a switching operation at a built-in switch in a predetermined position of the hinge flap.
Switching hinges exist where a hinge flap is swivellably disposed on a hinge housing and in which case, in a certain angular position, a switching element coupled with the hinge flap triggers a switching operation at a built-in switch. Once the switching point is defined, it can no longer be changed and should be protected from an access from the outside also under the aspect of safety with respect to manipulation. Here, it is a disadvantage that diverse equipment and safeguards have to be disassembled for transport purposes and adaptations to the existing localities have to take place during an installation. The known switching hinges cannot be adapted to such changed assembly positions.
From German Patent Document DE 10 2004 041 723, a hinge switch is known in the case of which a contact switch is provided between two hinge flaps swivellable relative to one another. The contact switch comprises a switching shaft which has a self-locking thread and can be rotated for adjusting the switching point.
British Patent Document GB 2 150 757 shows a hinge switch having two swivellably disposed hinge flaps. Here, switching elements are provided coaxially to a bolt connecting the hinge flaps, which switching elements have a first switching contact and a second switching contact. By rotating the switching contact by a transmission, the switching point can be adjusted.
The present disclosure relates to a switching hinge which can be adapted to different mounting situations and which permits a flexible defining of the switching point.
The present disclosure thus relates to a switching hinge comprising a hinge housing that includes a hinge flap swivellably disposed about an axis on the hinge housing. The switching hinge also includes a switching element coupled to the hinge flap along the axis, which switching element triggers a switching operation at a built-in switch in a predetermined position of the hinge flap. The built-in switch is adjustable to adjust a switching point at which the switching operation occurs. An exchangeable connection element is located between the switching element and the hinge flap. The exchangeable connection element is configured to transmit rotating motions between the switching element and the hinge flap. The exchangeable connection element is configured to be mounted either the hinge flap or the switching element in different angular positions to adjust the switching point on either the hinge flap or the switching element.
According to the present disclosure, the switching point of the built-in switch can be adjusted later, so that the switching hinge can be easily adapted to different installation situations. The adjusting devices for adjusting the switching point are arranged to be protected from an access from the outside, so that the switching hinge is secured with respect to manipulations. As a result, the switching hinge can be demounted and reused. Thus, adaptation to a respective installation situation is possible.
Furthermore, an exchangeable connection element for the transmission of rotating movements is provided between the switching element and the hinge flap, which connection element can be mounted on the hinge flap and/or on the switching element in different angular positions. The switching point of the switching hinge can thereby be newly defined in a simple manner, in which case only the connection element is exchanged or mounted in a different angular position in order to adjust the switching hinge to the desired switching point.
According to an embodiment of the present disclosure, the connection element can at least partially be fixed in a form-locking or force-locking manner on the hinge flap and/or the switching element, so that a continuous adjustment of the connection element becomes possible. If required, a new connection element can also be used for defining a new switching point.
The connection element may be constructed as a ring disk which is non-ratably coupled with the hinge flap and the switching element. As a result, the connection element can be produced in a cost-effective manner, and an adjustment of the switching point can then take place at low expenditures.
For a simple mounting, the connection element can be inserted into a receiving device constructed at the hinge flap, which receiving device has at least one inwardly protruding tooth. As a result, the inwardly protruding tooth can dig itself into the material of the connection element so that a non-rotatable connection is established. For this purpose, the connection element may be made of a plastically deformable material, such as a plastic material or of a soft metal.
In addition, the connection element may have an interior opening which has a shape deviating from the circular shape and can non-rotatably be connected with a protruding pin on the switching element. The opening may, for example, be constructed as a hexagon, so that a coupling can take place by a correspondingly constructed hexagonal pin.
For a compact construction, the switching element may be received in a protected manner in a switch housing in which the built-in switch is arranged. The built-in switch and the switching element may therefore be arranged securely with respect to a manipulation from the outside. In this case, the switch housing can be fixed on the hinge housing.
In order to be able to newly define a switching point in a simple manner, markings may be provided on the switch housing and the switching element, so that a corresponding orientation can be simplified.
Other aspects of the present disclosure will become apparent from the following descriptions when considered in conjunction with the accompanying drawings.


Disclosed is an automatic contrast correction method and apparatus for optimizing contrast of a picture screen. There is included an effective picture screen extractor for extracting video data corresponding to the effective picture screen among video data in the picture screen, a plurality of amplifiers for receiving the video data and amplifying the received video data for output, and a microcomputer for comparing the average value which is calculated from the video data of the effective picture screen with a previously set reference value and regulating an amplification factor by supplying a control signal to the amplifiers according to the comparison result. Even if video images photographed toward the sun are printed, it can be prevented from being printed in a dark state, thereby obtaining a good quality of picture.

The present invention relates to an automatic contrast correction method and apparatus thereof, and more particularly to a method and apparatus for automatically correcting contrast to maintain optimum contrast of a reproduced picture for use in a color video printer.
A color video printer is a printing apparatus which prints on paper still or captured pictures that are selected or captured from moving pictures photographed by camera recorders ("camcorders"). s A conventional color video printer comprises a first decoder for converting a reproduced video signal into color difference signals, memories for storing color difference signal data of the pictures to be printed, a second decoder for converting the color difference signal data supplied from the memories into R, G and B signals, an encoder for converting the R, G and B signals into a composite video signal and supplying it to a monitor, line memory means in which the R, G and B signals are sequentially selected by a three-input-to-one output switch and the selected signals are converted into digital data so as to be stored in line memories, an intermediate gradation converter for converting the data supplied from the line memory means into a physical signal, and a thermal printing head (TPH) in which a heat generation amount is adjusted by an output of the intermediate gradation converter.
FIG. 1 is a block diagram of a color signal processor in a conventional color video printer.
In FIG. 1, a switch SW3 includes three inputs e, f and g, which receive the respective different color signals from a decoder (not shown) for converting the color difference signal data of a user's desired still picture or moving picture to be printed. That is, inputs e, f and g are B, G and R signals, respectively. Then, switch SW3 sequentially selects the R, G and B signals by a switch control signal CTL2 and outputs the selected signal. First, if the B signal is input through input e in switch SW3, it is sampled by a clock CLK in an A/D converter 18. That is, as shown in FIG. 2, a pulse is generated by clock CLK at the location of ".alpha.," so that all data (.alpha..sub.1, .alpha..sub.2, . . . , .alpha..sub.525) at the location thereof is sampled by the clock pulse. That is, the clock pulses are in time coincidence with the positions .alpha., . . . .alpha..sub.25 of a roster type scan of the picture to be presented; said picture being presented in the form of B, G and R signals input to switch SW3. The sampled data is stored in one of two line memories through a switch SW4. First and second line memories 41 and 42 are controlled by a line memory controller 43. Switches SW4 and SW5 are simultaneously controlled by a switch control signal CTL3. If terminals h and j are respectively selected in switches SW4 and SW5, the sampled data output from A/D converter 18 passes through switch SW4 and is stored in a first line memory 41 under the control of line memory controller 43. Then, the data which is stored in first line memory 41 passes through switch SW5 under the control of line memory controller 43 and is supplied to an intermediate gradation converter 19. Then, intermediate gradation converter 19 outputs a signal having a pulse width that varies according to the digital data input signal supplied from switch SW5 and supplies it to TPH 20. TPH 20 regulates a heat generation amount according to the signal supplied from intermediate gradation circuit 19. As described above, the color signal data at the location of ".alpha." which is sampled in A/D converter 18 is supplied to intermediate gradation converter 19 and TPH 20 through first line memory 41, thereby being printed on the paper, etc.
After the color signal data of a first line which is sampled at the location of ".alpha." is completely printed, the clock pulse is input at the location of ".beta.", so that all data (.beta..sub.1, .beta..sub.2, . . . , .beta..sub.525) at the location of ".beta.". is sampled. If terminals i and k are respectively selected in switches SW4 and SW5 by switch control signal CTL3, second line memory 42 is accessed. The sampled data at the location of ".beta." is stored in second line memory 42 through switch SW4, and then is supplied to intermediate gradation circuit 19 and TpH 20 through switch SW5, so that the color signal data of a second line is printed on the paper.
As described above, the sampled data at a plurality of location is sequentially printed. Thus, in effect, an entire picture defined only by color signal B is printed, line by line, on the print paper by this process. Generally, 500 to 600 lines of data are printed in this manner in a single color.
After printing with respect to the B signal is accomplished, switch SW3 receives the G signal through input f by switch control signal CTL2. Then, the G signal supplied to A/D converter 18 through switch SW3 is printed through the same procedure as in the case of the B signal. After printing with respect to the G signal is accomplished, switch SW3 receives the R signal through input g by switch control signal CTL2. Then, the R signal is printed through the same procedure as in the case of the B and G signals. In this manner, the respective color signals are printed in turn, so that all color signal data in one picture screen is printed. Here, colors of Yellow, Magenta and Cyan are printed by the B, G and R signals, respectively.
However, in such a conventional color video printer, when the images which are photographed toward the sun are produced and printed, the whole printed images have the tendency of growing dark.

Automatic contrast correctin useful in video-to-print apparatus


The invention includes systems and methods for maintaining control of an electronic record, which may have transferable value, wherein a user may add digital signature information to a single unique authoritative copy of the electronic record held in a repository without compromising the uniqueness of the authoritative electronic record. Provided the digital signature information is valid, an authoritative electronic record may be amended to include multiple digital signatures, while continuing to be a single unique authoritative electronic record.

1. Field of Invention
This invention relates generally to the field of computer security, and more specifically to electronic records and digital signatures.
2. Description of Related Art
In business transactions, it is generally known that by physically producing a "blue ink" signature, or a signature made by a person using an ink pen, on a physical record, the signer can enter a legally-binding agreement, provided both parties involved in the transaction have agreed that the existence of a signature in a particular area or areas of the physical record constitutes agreement by the signer to the terms contained within the physical record. Thus, the terms outlined in the signed physical record may be legal and enforceable.
Modern technology has profoundly changed the way business transactions are conducted today. The use of computers and other data processing devices is commonplace in both large and small businesses. The connectivity provided by intranets and the Internet has reduced information transfer times from days to seconds, and transferring documents electronically eliminates postage and shipping charges. For a reasonable investment, a small business or organization can acquire communication benefits similar to those of large high-technology corporations.
Many government agencies have taken advantage of the cost and time savings benefits offered by electronic communications, and the filing of electronic documents will soon be the preferred, if not required, method of filing certain documents with certain U.S. government agencies.
Nevertheless, electronic records, which are generated, transmitted, received, or stored by electronic means, can be modified or forged. Furthermore, the true origin of an electronic communication can be concealed or faked. Thus, cryptography systems and methods have been developed that attempt to help a recipient verify that a received electronic communication, such as, for example, an e-mail, was actually transmitted from the claimed sender, and that the content of the received electronic communication is an accurate representation of the message transmitted by the sender.
Likewise, systems and methods have been developed that attempt to validate electronic transactions, such as credit card purchases over the Internet. Typically, these systems involve the use of a digital signature (sometimes referred to as an electronic signature) that can be added to an electronic record to authenticate the identity of the sender of the record or the signer of the record, and verify that the received electronic record is a true and accurate representation of what the sender transmitted. Ultimately, the goal of these systems and methods is to produce a system and method whereby a signer's digital signature on an electronic record is given the same legal enforceability as a blue ink signature on a physical record.
Generally, an electronic signature is an electronic sound, symbol, or process attached to or logically associated with a contract or other record and executed or adopted by a person with the intent to sign the record. A digital signature is a form of electronic signature, generated by computer hardware or software and represented in a computer as a string of binary digits. The methods of producing a digital signature involve a set of rules and a set of parameters such that the digital signature produced is unique and verifiable, and such that both the identity of the signatory (person represented by the digital signature) and the integrity of the data (the binary bits which were signed) can be verified.
Traditional cryptography has usually involved the creation and sharing of a secret key for the encryption and/or decryption of a message. Unfortunately, if the secret key is discovered or intercepted by someone else, the message can easily be decrypted. Thus, use of a Public Key Infrastructure (PKI) or Public Key Cryptography (PKC) system is generally preferred.
A PKC system is an asymmetric encryption system, meaning that it employs two "keys", which are created simultaneously using the same algorithm by a public-private key issuing authority. A public key is made publicly available (as part of a digital certificate) in a directory that all parties can access, and is used to encrypt an electronic record or verify a digital signature. A private key is kept private, secret, and never shared with anyone or transmitted across the Internet, and is used to generate a digital signature or decrypt an encrypted electronic record. Each person involved in an electronic transaction based on the private and public key method of digital signature generation and verification will possess a private and public key pair. Anyone can verify a person's digital signature by using that person's public key (which can be found in a public directory), but only the possessor of a person's private key may generate a digital signature. PKC systems permit the user's public key to be posted, in a directory or on a bulletin board for example, without compromising the user's private key. This public key concept simplifies the key distribution process.
Asymmetric systems adhere to the principle that knowledge of one key (the public key) does not permit derivation of the second key (the private key) because finding large prime numbers is computationally easy but factoring the products of two large prime numbers is computationally infeasible. Examples of PKC algorithms are the Digital Signature Algorithm (DSA) (Federal Information Processing Standards Publication 186, 1994, "FIPS PUB 186," and its successors), and the Rivest, Shamir, and Adleman (RSA) algorithm, as specified in Internet Engineering Task Force (IETF) Request for Comments (RFC) 2347 and its successors.
When dealing with an electronic record, such as an e-mail message, a sender may, for example, digitally "sign" the electronic record using the PKC system. When digitally signing an electronic record using a PKC system, the sender does not merely add his or her digital signature to the electronic record as he or she would a "blue ink" signature. Instead of using a "blue ink" signature, a message digest of the electronic record (a statistically-unique mathematical "summary" of the electronic record), is first generated using special software.
The message digest is a compressed representation of the original electronic record, but is usually much smaller than the electronic record on which it is based. Message digests may be produced using standard, published, one-way hashing algorithms, and message digests produced by the same algorithm are generally the same length in bits. The message digest will be considered a unique representation of the electronic record because it is computationally infeasible for the same message digest function to produce the same message digest for two different electronic records. Therefore, the use of a message digest as a representation of the electronic record is considered valid.
Message digest algorithms currently available, such as MD-2, MD-4, MD-5, SHA-1, and SHA-256, are hashing algorithms that create message digests by iteratively performing computations on specific portions of the electronic record (512 bits or 1024 bits). The result of each iteration is combined with the result from the previous iteration forming a "chain" of interim values, thus these interim values are called chain values. The initial chain value is called the seed value and is a predefined, constant value (the actual value depends on the particular message digest algorithm being used). For SHA-1, as an example, five 32-bit chain values are produced for each 512 bits of data. A full history of PKC systems is described in W. Diffie's, "The First Ten Years of Public-Key Cryptography", which is incorporated herein by reference.
Once the message digest has been produced, the sender's private key (an asymmetric private key, which the sender usually obtains from the public-private key issuing authority) is used to cryptographically create a digital signature from the message digest. Because of the manner by which the sender's digital signature is obtained, the sender's digital signature will be different each time he or she sends a different e-mail message.
When the electronic record with the sender's digital signature is received by a recipient, the digital signature is verified using the electronic record and the sender's public key. If the digital signature is valid, the recipient knows that the sender's private key was used to sign the electronic record.
In addition to encrypting an electronic record, a sender may be authenticated by the receiver by using the private key to encrypt some data. When the receiver receives the encrypted data, he can use the sender's public key, which resides in the sender's publicly available digital certificate, to decrypt it. PKC can also be used to generate a digital signature to authenticate a signer. The signer creates a message digest of the electronic record. After generating the message digest, the signer creates a digital signature from the message digest with his private key. The receiver, upon receiving the digital signature and computing the message digest of the electronic record, uses the signer's public key, which resides in the signer's publicly available digital certificate, to verify the signature. This operation validates the identity of the signer because he is the only person who can sign the message with his private key.
Thus, a PKI enables users of a basically unsecured public network, such as the Internet, to securely and privately exchange digital information through the use of a public and a private cryptographic key pair that is obtained and shared through a trusted authority. Varieties of products are offered by, for example, RSA®, Verisign®, GTE CyberTrust®, Xcert®, or Netscape®, which enable a user to implement a PKI. While there is no universal standard for PKI, the public key infrastructure generally presumes the use of Public Key Cryptography (PKC), which is the most common method on the Internet for authenticating a message sender or encrypting a message.
In addition to the PKC method, encryption may be accomplished by the symmetric algorithm method. An example of this is the Data Encryption Standard (DES), which is described in Data Encryption Standard, Federal Information Processing Standards Publication 46 (1977) ("FIPS PUB 46," and its successors), which is available from the U.S. Department of Commerce. In general, a symmetric cryptographic system is a set of instructions, implemented in hardware, software, or both, that can convert plain text into ciphertext, and vice versa. In a private key system (sometimes known as a symmetric cryptographic system), a specific key is used that is known to the users but is kept secret from others.
Computers and other electronic devices, such as Personal Digital Assistants (PDA) and cellular telephones, provide the interface terminals from which parties to a business transaction may take advantage of the many benefits of electronic transactions. One of the primary benefits of validating electronic transactions is the ability to transact business with a person, or groups of people, anywhere in the world, since electronic transactions can take place over telephone lines, computer networks, and through the air via cellular and satellite communication systems.
In recognition of the general acceptance of using electronic communications in the business place, laws regulating electronic communications have begun to be developed and adopted. In effect since Oct. 1, 2000, the Electronic Signatures in Global and National Commerce Act (often referred to as the e-signature law or e-Sign) specifies that in the United States, the use of a digital signature on an electronic record is as legally binding as a traditional handwritten signature written in ink on paper. The purpose of this and other laws, such as the Uniform Electronic Transactions Act (UETA), is to validate the authenticity of electronic transactions, to legally bind parties to a digitally signed contract, and to provide a legal framework for enforcement of electronically signed documents. Thus, digital signatures allow parties to conduct electronic business transactions that were previously limited to paper with handwritten signatures.

This patent is subject to a terminal disclaimer.

Systems and methods for obtaining digital signatures on a single authoritative copy of an original electronic record


In one embodiment, a phase-locked loop system in a receiver samples received incoming data using a first clock and a second clock that have the same frequency but are out of phase with each other. A first control signal generated by a phase detector is used to control a charge pump, whose output may be filtered to drive a VCO circuit generating the first and second clocks. A frequency detector generates a second control signal based at least on phase relationships between the incoming data and the first and second clocks. A qualifier circuit determines if the first control signal is valid or invalid based at least on the second control signal. If the first control signal is invalid, the qualifier circuit prevents the first control signal from being used to adjust the frequency of the first and second clocks.

1. Field of the Invention
The present invention relates generally to data communication systems, and more particularly but not exclusively to phase and frequency detection circuits.
2. Description of the Background Art
In serial data communication systems, data bit streams are transmitted using a certain voltage waveform (e.g. NRZ (non-return to zero) waveform) via transmission lines to remote receivers. To reduce cost, a typical data communication system does not employ dedicated transmission lines to carry clock or timing information. In such a communication system, a remote receiver needs to extract the clock from the incoming data bit stream. Phase-locked-loops (PLLs) are often used in serial data receivers to extract clocks embedded in incoming data bit streams. A typical PLL consists of a phase/frequency detector, a loop filter, and a voltage-controlled oscillator (VCO). The VCO is used to generate a local clock, referred to as "VCO clock". The phase/frequency detector detects the phase and frequency differences between the VCO clock and the clock embedded in the incoming data bit stream. The phase and frequency differences are filtered by the loop filter and are used to control the frequency and consequently the phase of the VCO clock. The clock embedded in the incoming bit stream is thus recovered in a closed-loop manner by the PLL.
A phase detector (PD) is a key component of a PLL used for clock and data recovery. The phase detector enables the PLL to properly align the phase of the VCO clock with that of the incoming bit stream, so that the receiver can sample the incoming data bit stream at a proper timing instant, preferably at the midpoint of each bit interval. Linear phase detectors and binary phase detectors are two types of phase detectors normally used for clock and data recovery. An example linear phase detector is disclosed in U.S. Pat. No. 4,535,459. A linear phase detector generates a pulse representing the phase error between incoming data and VCO clock. The pulse width is proportional to the phase error. A problem with linear phase detectors is that they may not work well at very high-speed data rates because the detector has to generate a very narrow pulse for a small phase error. Unbalanced loading and delay mismatch can worsen this problem. Therefore, linear phase detectors suffer from a relatively large phase error. In a very high-speed link, a slight misalignment can lead to a significant increase of bit error rate.
A binary phase detector generates a pulse of fixed width, which usually covers one data bit interval, of a polarity indicating whether the incoming data or the VCO clock is leading in phase. A binary phase detector is also known as "bang-bang" because of its phase detection characteristic as shown in FIG. 1. A binary phase detector generates an output signal VOUT that is either positive or negative depending on the phase relationship between the incoming data and VCO clock. For example, the binary phase detector may be configured to generate a positive output signal VOut when the VCO clock is lagging the incoming data, and a negative output signal VOut when the VCO clock is leading the incoming data.
A phase detector by itself cannot capture the incoming data if the initial frequency of the VCO clock differs too much from the baud rate of the incoming data ("data baud rate"). In that case, a frequency detector (FD) has to be added into the loop to aid data acquisition. Commonly used frequency detectors can be classified into two categories: quadricorrelator frequency detectors and rotational frequency detectors. A quadricorrelator is well known for its analog implementations, which require many special analog components, such as rectifiers, differentiator, etc. These analog components are very sensitive to process, voltage, and temperature variations. If not carefully designed, a system employing a quadricorrelator may not function as expected.
In contrast to quadricorrelator frequency detectors, rotational frequency detectors are implemented using digital circuits. Rotational frequency detectors are disclosed in the following two papers: "A Si Bipolar Phase and Frequency Detector IC for Clock Extraction up to 8 Gigabit/s" by A. Pottbacker et al. in IEEE Journal of Solid State Circuits, December, 1992, pp 1747–1751 and "Frequency Detectors for PLL Acquisition In Timing and Carrier Recovery" by D. G. Messerschmitt in IEEE Trans. on Communications, September 1979, pp 1288–1295.
FIG. 2 shows a block diagram of a conventional PLL system 200 utilizing a phase and frequency detector. The PLL system 200 consists of a rotational frequency detector 222, a phase detector (PD) 206, a summer 208, a charge pump (CP) circuit 209, a low pass filter (LPF) 210, and a VCO 211. The rotational frequency detector 222 consists of an in-phase detector (IPD) 201, a quadrature-phase detector (QPD) 202, a frequency detector (FD) 203, and a summer 204. The rotational frequency detector 222 also includes a lock-in detector (LID) 207 used to detect whether the PLL system 200 has successfully locked in the frequency of the clock embedded in the incoming data (simply labeled as "DATA" in FIG. 2). When the frequency of the embedded clock is not yet locked, the LID 207 controls a tri-state buffer 205 to enable the rotational frequency detector output 226 to control the VCO 211 via the summer 208, the CP 209, and the LPF 210. When the frequency of the incoming data is locked in within a certain range, the LID 207 controls the tri-state buffer 205 to disable the rotational frequency detector output 226. In that case, the VCO 211 is solely controlled by the PD output 228. The PD output 228 represents the phase error between the in-phase clock CLK_I and the incoming data stream.
The VCO 211 generates an in-phase clock CLK_I and a quadrature-phase clock CLK_Q, which are 90 degrees out of phase with each other. As is conventional, the incoming data is used to sample both the in-phase clock CLK_I and the quadrature-phase clock CLK_Q by the in-phase detector 201 and by the quadrature-phase detector 202, respectively. Both IPD 201 and QPD 202 are binary phase detectors and compare the phase relationship between incoming data and their respective VCO clock. Their outputs are provided to the FD 203 to detect the frequency error. The IPD output 220 and the FD output 225 are combined by the summer 204, resulting in the output 226. When there is a frequency difference between the clock embedded in the incoming data and the VCO clock, the rotational frequency detector output 226 comprises pulses of exclusively the same polarity that depends on whether the VCO clock is faster or slower. In practice, however, due to circuit non-idealities and mismatches between the IPD output 220 and the FD output 225, the rotational frequency detector output 226 won't have the same polarity even when there is a frequency error. This degrades the performance of the PLL system 200. Furthermore, the output of the rotational frequency detector 222 needs to be disabled by the LID 207 when the VCO frequency has been locked to within a certain range, otherwise the rotational frequency detector 222 may disrupt phase locking. Unfortunately, the LID 207 may falsely detect an out-of-lock condition and improperly enable the rotational frequency detector output 226. This causes further PLL performance degradation.

Phase and frequency detection circuits for data communication systems


An organic layer (1) is applied to a transparent carrier (2) in such a way that different partial regions with different refractive indices are formed in the layer. Owing to deflection at the phase boundaries within the layer, fewer photons remain trapped in the layer as a result of wave-guiding losses than in the case of homogeneous layers.

Organic light emitting diodes exhibit a series of advantages which make them attractive for use in optoelectronics. These include the availability of many emission colors, low threshold voltages, fast switchability, small thickness and the possibility of using flexible substrates. Typical areas of application of OLEDs are pixelated display instruments and large-area elements for illumination purposes.
One important development goal for OLEDs is to increase the luminous efficiency and, associated with this, to reduce the power consumption. This is of importance particularly for portable electronic devices, in which only limited energy resources are available.
The majority of the previous developments for maximizing the luminous efficiency have been concerned with increasing the internal quantum efficiency. The latter is defined as the ratio between the photons generated in the diode to the injected electrons. New materials with improved luminescence properties, optimized layer sequences or better adapted electrode materials have contributed to increasing the internal quantum efficiency in recent years.
A different approach for increasing the luminous efficiency consists in improving the extraction efficiency. Extraction efficiency is understood as the probability with which a photon generated in the emission zone can be coupled out of the diode and thus ejected. Coupling-out losses arise as a result of absorption or as a result of waveguidance in one of the layers. Waveguidance is caused by total reflection at the interface of two layers with different refractive indexes. In the case of planar interfaces, the angle between incident and reflected beam does not change apart from the sign. Accordingly, once a photon has been subjected to total reflection, it remains confined in the corresponding layer and cannot be extracted.
The representation of FIG. 1 illustrates the process of waveguidance in the layers of an organic light emitting diode:
A transparent electrode 2 (generally indium tin oxide, ITO for short) is situated on a substrate 3. At least one organic layer 1 is deposited on said electrode, said layer being followed by an electrode 5 (e.g. a cathode). Photons are generated by emitters 6 in the organic layer 1. Only photons which do not remain in one of the layers 1–3 and 5 as a result of waveguidance are extracted. The line IV shows the path of an extracted photon by way of example.
Depending on the layer thickness and refractive index of the individual layers, wave-guiding effects, indicated by the lines I, II and III in FIG. 1, may occur in the organic layer, in the transparent electrode and in the substrate, respectively. Since the layer thicknesses of the organic layers and of the transparent electrode are in the region of the light wavelength or less than that, discrete optical modes I, II, corresponding respectively to lines I, II mentioned above, form in these layers, as a single stationary optical wave with a distinct wavelength. A continuum of modes III, corresponding to line III mentioned above, is present in the substrate as a plurality of optical waves with different wavelengths, and traditional geometric optics can be used to calculate and predict the behavior of the continuum of modes. Therefore, a distinction is made between layer modes and substrate modes.
If the formation of layer modes can be disturbed and the undesirable waveguidance can thus be minimized, the extraction efficiency is increased and so, too, is the luminous efficiency.
The optical modes formed in a thin planar layer are dependent not only on the wavelength but essentially on the layer thickness and the refractive index of the layer.
A change in the refractive index and thus the disturbance of the wave-guiding effects can be achieved by means of inhomogeneities in the organic layer if the inhomogeneities have a different refractive index than the layer matrix.
To date, the approaches a) to c) briefly outlined below have been proposed for suppressing wave-guiding effects, in which case a) and b) aim at changing the refractive index and c) utilizes a change in the layer thickness:
a) Dispersion of nanoparticles in one of the organic layers of the OLED (S. A. Carter et al., Enhanced luminance in polymer composite light emitting devices, Appl. Phys. Lett. 71(9), p. 1145, 1997)
In this case, particles of TiO2, SiO2 or Al2O3 having a size of 30 to 80 nm are embedded in the polymeric emitter material MEH-PPV.
This method is associated with the following difficulties:
It is technically very difficult to disperse nanoparticles uniformly in a solvent in which polymers have already been dispersed or dissolved. The consequence of poorly dispersed nanoparticles is an inhomogeneous emission of the LED layer which contains said nanoparticles, for which reason diodes produced in such a way are not suitable for use in display instruments.
The oxidic nanoparticles proposed can lead to a degradation of the active layer through oxidation. Accordingly, a significantly shorter service life has been observed in the case of the diodes with nanoparticles than in the case of the reference diodes.
b) Densely packed SiO2 microspheres (T. Yamasaki, K. Sumioka, T. Tsutsui: Organic light-emitting device with an ordered monolayer of silica microspheres as a scattering medium, Appl. Phys. Lett. 76(10), p. 1243, 2000).
In this case, monolayers of densely packed SiO2 spheres with a diameter of 550 nm are used as scattering centers. In this case, the spheres are applied on the substrate beside the ITO anode tracks. This makes it possible to suppress waveguidance in the organic layers and in the glass. An increase in the coupling-out efficiency was observed.
This method is associated with the following difficulties:
The application of densely packed sphere areas can be realized only with a very high effort. Moreover, a large-area application of such areas of several square centimeters has not yet been realized hitherto. The scattering centers are situated outside the active diode volume. Accordingly, only a small part of the substrate surface can be utilized for light generation. Furthermore, an inhomogeneous luminance results.
The periodic structure of the dense sphere packing means that the scattering efficiency is highly wavelength-selective. Accordingly, a generally undesirable lateral color profile occurs.
c) Corrugated (wave-shaped) organic layers (J. M. Lupton et al., Bragg scattering from periodically microstructured light emitting diodes, Appl. Phys. Lett. 77(21), p. 3340, 2000).
In this case, a polymeric LED is applied on a one-dimensionally periodic structure with a period of 388 nm and depths of 10–100 nm. The structure acts as a Bragg reflector and again leads to scattering of optical modes in the emitter material.
This method is associated with the following difficulties:
The periodicity of the structure leads to a high degree of angular dispersion. A 15 nm thin gold layer was used as the anode, said gold layer already having a high degree of absorption despite the small layer thickness. Transferring the corrugation to the transparent ITO that is otherwise customary as a standard anode is difficult to realize on account of the larger ITO layer thicknesses and high process temperatures.
Furthermore, there are diverse approaches for better coupling-out of the substrate modes. However, since these methods cannot prevent the formation of optical modes in thin layers, they are not taken into consideration for preventing the wave-guiding effect.

Organic light-emitting diode (OLED) and method for the production thereof


A toilet seat assembly 10 includes a toilet seat 12 having a seat skin 14 defining the exterior surfaces thereof and a seat core 16 disposed within and surrounded by the seat skin 14 and a cover 18 having a cover skin 20 defining the exterior surfaces thereof and a cover core 22 disposed within and surrounded by the cover skin 20. The assembly is characterized by the cores 16, 22 each comprising a waste material. The waste material may be a single polymer wasted in the process of making other products. Alternatively or in combination therewith, combining a plurality of different materials (including different polymers) from different sources may be employed to formulate the waste material.

1. Field of the Invention
The subject invention relates to a toilet seat assembly including a seat and a cover and, more specifically, to molded toilet seat assemblies.
2. Description of the Prior Art
Toilet seat assemblies include a seat and cover coupled together by a hinge mechanism that also connects the assembly to a toilet. These toilet seat assemblies have been fabricated from materials such as wood and plastic, some with a solid core surrounded by polymer material. Examples of such prior art techniques are disclosed in the U.S. Pat. Nos. 3,863,277 to Harrison; 3,988,789 to Blount; U.S. Pat. No. 5,991,935 to Wang and 6,154,892 to Hogue.
In all prior systems there has been the continuing objective to reduce the cost of fabricating the toilet seat assemblies.

Method of molding a toilet seat assembly


Circuitry includes a floating-body main field-effect transistor (FET) device, a body-contacted cascode FET device, and biasing circuitry coupled to the floating-body main FET device and the body-contacted cascode FET device. The floating-body main FET device includes a gate contact, a drain contact, and a source contact. The body-contacted cascode FET device includes a gate contact, a drain contact coupled to a supply voltage, and a source contact coupled to the drain contact of the floating-body main FET device and to a body region of the body-contacted cascode FET device. The biasing circuitry is coupled to the gate contact of the floating-body main FET device and the gate contact of the body-contacted cascode FET device and configured to provide biasing signals to the floating-body main FET device and the body-contacted cascode FET device such that a majority of the supply voltage is provided across the body-contacted cascode FET device.

Low noise amplifiers (LNAs) are extensively used in radio frequency (RF) circuitry such as RF front end circuitry. FIG. 1 shows a conventional LNA 10. The conventional LNA 10 includes a main transistor 12, a cascode transistor 14, and biasing circuitry 16. The main transistor 12 includes a gate contact G coupled to both the biasing circuitry 16 and an input node 18, a source contact S coupled to ground via an isolation inductor L_IS, and a drain contact D. The cascode transistor 14 includes a gate contact G coupled to the biasing circuitry 16, a drain contact D coupled to both a supply voltage VCC via an isolation inductor L_IS and an output node 20, and a source contact S coupled to the drain contact D of the main transistor 12.
In operation, the biasing circuitry 16 provides biasing signals to the gate contact G of the main transistor 12 and the cascode transistor 14. Generally, the biasing signals are provided such that a majority of the supply voltage VCC is distributed across the main transistor 12. Signals provided at the input node 18 are amplified by the main transistor 12 and the cascode transistor 14 by modulating the supply voltage VCC, and are provided at the output node 20. Due to the biasing of the main transistor 12 and the cascode transistor 14 discussed above, the main transistor 12 performs the transconductance amplification, while the cascode transistor 14 performs the transresistance amplification.
In the conventional LNA 10, the main transistor 12 and the cascode transistor 14 are silicon on insulator (SOI) metal-oxide semiconductor field-effect transistors (MOSFETs). SOI MOSFETs are available in floating-body and body-contacted configurations. FIGS. 2A through 2C show an exemplary floating-body SOI MOSFET 22. Specifically, FIG. 2A shows a top view of the floating-body SOI MOSFET 22, FIG. 2B shows a first cross-sectional view of the floating-body SOI MOSFET 22 taken through A-A1 of FIG. 2A, and FIG. 2C shows a second cross-sectional view of the floating-body SOI MOSFET 22 taken through B-B1 of FIG. 2A. The floating-body SOI MOSFET 22 includes a substrate 24, a buried oxide layer 26 on the substrate 24, and a device layer 28 on the buried oxide layer 26. The device layer 28 includes a number of shallow trench isolation (STI) regions 30, which surround a source region 32, a body region 34, and a drain region 36. The source region 32 and the drain region 36 are separated by the body region 34. A gate oxide layer 38 is on the body region 34 and a portion of the source region 32 and the drain region 36. A gate contact 40 is on the gate oxide layer 38. A source contact 42 is on the source region 32, and a drain contact 44 is on the drain region 36.
FIGS. 3A through 3C show a body-contacted SOI MOSFET 46. Specifically, FIG. 3A shows a top view of the body-contacted SOI MOSFET 46, FIG. 3B shows a first cross-sectional view of the body-contacted SOI MOSFET 46 taken through A-A1 of FIG. 3A, and FIG. 3C shows a second cross-sectional view of the body-contacted SOI MOSFET 46 taken through B-B1 of FIG. 3A. The body-contacted SOI MOSFET 46 includes a substrate 48, a buried oxide layer 50 on the substrate 48, and a device layer 52 on the buried oxide layer 50. The device layer 52 includes a number of STI regions 54, which surround a source region 56, a body region 58, and a drain region 60. The source region 56 and the drain region 60 are separated by the body region 58. A gate oxide layer 62 is on the body region 58 and a portion of the source region 56 and the drain region 60. A gate contact 64 is on the gate oxide layer 62. A source contact 66 is on the source region 56 and a drain contact 68 is on the drain region 60. As shown in the top view of the body-contacted SOI MOSFET 46 shown in FIG. 3A, the gate oxide layer 62 and the gate contact 64 are formed in an "H" shape. Further, the body region 58 is extended above a top portion and a bottom portion (i.e., the outer sides of the "H" shape) of the gate oxide layer 62 and the gate contact 64. The "H" shape of the gate oxide layer 62 and the gate contact 64 separates this additional body region 58 from the source region 56 and the drain region 60 and terminates any parasitic channel effects that may occur at the edge of the additional body region 58. Essentially, the "H" shape of the gate oxide layer 62 and the gate contact 64 acts as a mask to form the various regions of the body-contacted SOI MOSFET 46. A "T" shape, an "L" shape, and a "U" shape may also be used for the gate oxide layer 62 and the gate contact 64, as required by the particular layout of the body region 58. While not shown, a silicide layer may connect the source region 56 and the body region 58 such that the body-contacted SOI MOSFET 46 is a source-to-body connected SOI MOSFET. This may require a break in the gate oxide layer 62 and the gate contact 64 (not shown).
Generally, floating-body SOI MOSFETs have higher transconductance than their body-contacted counterparts. Further, the footprint of body-contacted SOI MOSFETs is often larger than floating-body SOI MOSFETs due to the extra area required for the extended body region. This generally brings extra parasitic capacitance and thus a lower transition frequency (ft). Accordingly, floating-body SOI MOSFETs are generally the preferred configuration for SOI MOSFETs used in LNAs.
While floating-body SOI MOSFETs are generally preferred over body-contacted SOI MOSFETs for LNAs, these devices exhibit a marked increase in noise when operated at high drain-to-source voltages. Further, fluctuations in the supply voltage provided to floating-body SOI MOSFETs may result in significant increases in noise. This is due to the well-known phenomena of charge storage within the floating-body region, which changes the threshold voltage of the device and causes a "kink" in the current vs. voltage response thereof. FIG. 4 illustrates a drain current density vs. drain-to-source voltage response of a floating-body SOI MOSFET for both a partial depletion and a total depletion device (the partial depletion device is shown as a dashed line 70 and the total depletion device is shown as a solid line 72). As shown in FIG. 4, the current density in each device remains relatively constant to a particular voltage, after which a "kink" in the response is presented. This "kink" results in significant distortion due to a non-linear response of the device. To avoid such effects, the biasing circuitry 16 discussed above generally attempts to bias the main transistor 12 at a voltage below the "kink" and the cascode transistor 14 at a voltage above the "kink". However, changing supply voltages due to different battery conditions in a mobile device may make it impossible to avoid these "kinks" and thus result in significant distortion in the conventional LNA 10. Specifically, as the supply voltage is reduced due to battery discharge, it may cause one of the main transistor 12 and the cascode transistor 14 to reach the "kink" and therefore exhibit a non-linear response.
Body-contacted SOI MOSFET devices do not suffer from the aforementioned noise problems and do not experience the "kink" effect as described above. This is illustrated in FIG. 4 by a long-dashed line 74. As shown in FIG. 4, the current density vs. voltage response of a body-connected device remains relatively linear over most of the voltage range. This is due to the fact that charge carriers may be removed from the body as necessary via the contacted body, thereby avoiding a change in threshold voltage as charge carriers accumulate in the body. However, using body-contacted SOI MOSFET devices in place of the floating-body SOI MOSFET devices generally results in similarly poor performance due to the relatively low transconductance and higher junction capacitance of these devices. Accordingly, there is a need for an LNA with improved performance at high frequencies.


An article of manufacture is disclosed for absorbing liquids, particularly body fluids such as menses. The disclosed article is disposable and has a wrapper associated therewith. An elastic material is secured to the backsheet and is maintained in a substantially tensioned state until separation of the wrapper from the backsheet. Upon separation of the wrapper from the backsheet the tension in the elastic member is released causing the disposable absorbent article to form an upwardly cupped configuration to conform more closely to the wearer's body.

All manner and variety of absorbent articles configured for the absorption of bodily fluids are, of course, well known. Current types of absorbent articles include sanitary napkins, pantiliners, diapers, and incontinent articles.
Several prior art structures have been developed to improve the overall fit of absorbent articles so that they more readily conform to the contours of the human body. By improving the fit of the absorbent article, it is expected that the performance of the absorbent article will also improve. In some prior art sanitary napkins elastic has been placed along the lateral edges of the sanitary napkin. The elastic is contained within the material comprising the absorbent article and therefore is not visible to the consumer. The elastic provides the sanitary napkin with an upwardly cupped shape improving the overall fit of the sanitary napkin to the body. However, there are numerous packaging, transport and storage problems associated with articles having an upwardly cupped shape.
Other prior art sanitary napkins are of a substantially planar configuration making them easier to package, transport, and store. However, these prior art sanitary napkins remain in their substantially planar configuration throughout their use. While being easier to package, transport and store, the substantially planar sanitary napkin does not readily conform to the contours of the human body. According, the substantially planar sanitary napkin provides an overall fit which is perceived as less than desirable by some users who prefer the upwardly cupped configuration.
Accordingly, it is desirable to produce an individually wrapped absorbent article, e.g., sanitary napkin, which can be packaged, transported, and stored in a substantially planar or flat configuration and yet conform substantially to the contours of the human body upon removal of the absorbent article from the package by the user.

Individually wrapped disposable absorbent article which becomes elasticized when unwrapped


A distinct male cultivar of Salix purpurea named ‘Fish Creek’, characterized by rapid stem growth producing greater than 30% more woody biomass than either of its parents (‘94001’ and ‘94006’) and 20% more biomass than a current production cultivar (‘SV1’). ‘Fish Creek’ can be planted from dormant stem cuttings, produces multiple stems after coppice, and the stem biomass can be harvested when the plant is dormant. In the spring following harvest, the plant will re-sprout very vigorously, producing new stems that can be harvested after two to four years of growth. This harvest cycle can be repeated several times. The stem biomass can be chipped and burned as a source of renewable energy, generating heat and/or electricity. ‘Fish Creek’ displays a low incidence of rust disease or damage by beetles or sawflies.

1. Field of the Invention
The invention is a new and distinct cultivar of Salix purpurea known by the varietal name 'Fish Creek'. The new variety was produced through controlled willow breeding conducted by the inventors at the State University of New York College of Environmental Science and Forestry in Syracuse, N.Y. The objective of the breeding program is to produce new willow cultivars that generate high biomass yields on a variety of sites, are resistant to diseases and pests, and possess agronomic traits suitable for mechanical planting, harvesting, and post-harvest processing to provide a sustainable, renewable source of energy. Once a field planting of shrub willows is established, the woody stems can be harvested every three years, and new shoots will re-sprout the following season. Repeated harvesting every two to four years can be sustained for at least 15 years.
2. Description of Relevant Prior Art Including Information Disclosed Under 37 CRF 1.97-1.99
This new variety of Salix purpurea was the seedling progeny of the controlled pollination of a female clone (ID# 94006) of Salix purpurea by a male clone of Salix purpurea (ID# 94001) performed in February 1998 in Syracuse, N.Y. The plant has been propagated repeatedly by stem cuttings and has been found to retain its distinctive characteristics through successive propagations and field trials. More specifically, the plant has been asexually reproduced by collecting dormant stems during the winter months from a plant growing in Syracuse, N.Y.; cutting them into either 5″ or 10″ pieces (cuttings); then planting those cuttings in the field in Tully, N.Y. in the spring or in potting mix in the greenhouse, then transplanting the rooted cuttings to the field in Tully, N.Y.
Both parents (94006 and 94001) were originally identified in 1994 growing on the shores of creeks in Oneida County, N.Y. and were vegetatively propagated from stem cuttings. The new variety is distinguished from the female parent in that it is male. The growth of the parent plants was characterized in nursery plantings. Both parents displayed rapid stem growth and low incidence of rust disease, so were chosen to serve as parents in a cross. The seedlings produced by this cross (identification #9882) were first established in a greenhouse, and then were transplanted to a field. This particular individual (identification #9882-34) shown in the Figures was selected from the family due to its exceptional stem height growth.
The new cultivar has been grown in Syracuse, N.Y. and Tully, N.Y., which have a normal yearly average daily temperature of 47° F., normal daily maximum temperature in July of 82° F., normally daily minimum temperature in January of 14° F., and average precipitation of 40 inches. The new cultivar grows from a rooted cutting to a fully mature plant ready for harvest in approximately three years.

Fast-growing willow shrub named ‘Fish Creek’

The Research Foundation of State University of New York