A method for the dynamic cleaning of semiconductor fabrication equipment and particularly quartzware with a thermally activated source of fluorine, such as nitrogen trifluoride, at an elevated temperature, typically at the process operation temperature, wherein the cleaning is terminated prior to complete cleaning and removal of undesired substances allowing rapid restart of fabrication equipment so cleaned.

The present invention is directed to the field of thermal cleaning with nitrogen trifluoride and similar fluorine sources. More specifically, the present invention is directed to cleaning various silicon-containing semiconductor substances from wafers and chemical vapor deposition equipment, including reaction vessels and hardware, using a dynamic flow of nitrogen trifluoride at elevated temperatures with a unique partial clean process.
The semiconductor industry has experienced a long-felt need to solve the problem of cleaning chemical vapor deposition furnaces and quartz tubes in the furnaces as well as quartz hardware of various undesired substances, such as silicon nitride, polycrystalline silicon, titanium silicide, tungsten silicide and various other silicides, as well as silicon dioxide, which are typically present as undesired films on furnaces and quartz hardware during their deposition on silicon wafers and chips being processed as electronic materials and integrated circuits.
The normal procedure for cleaning is to remove the parts, such as those made of quartz, metals or other materials from a furnace, such as quartz furnace tubes, and perform a wet chemical cleaning. O-ring seals would typically have to be replaced in such an operation, as well as cleaning of lines, doors and other vacuum components. The wet chemical cleaning is very costly and time consuming. When the equipment is shut down to pull the quartz parts, it can require up to 18 hours of time. Also, the system necessitates reverification for its operating integrity before it can be used again. The wet chemical cleaning application requires special chemicals, equipment and sinks to perform this cleaning. Another disadvantage is that the quartzware is attacked at accelerated rates which affects its reproducibility and reliability of operation. This is especially true when cleaning quartz racks or wafer holders. These components have special slots cut in the quarts to hold the parts being coated, and when the wet chemical clean attacks the quartz, it affects the dimensions of these slots. When the slots are affected, the parts being held are not coated uniformly, which requires the quartz be replaced at accelerated scheduling.
Another alternative is plasma cleaning. The plasma cleaning method requires the use of another piece of equipment especially designed to perform a cleaning of quartz tubes in place within the chemical vapor deposition furnace equipment. First, the plasma cleaning method does not clean the other quartz parts which are used in the chemical vapor deposition furnace system. This means these parts will need to be chemically wet cleaned, separate and apart from plasma cleaning methods. Also, the plasma cleaning equipment takes up space in the manufacturing area, and may prevent other tubes from being used in the system while it is being utilized. If the quartz parts are replaced with another material like silicon carbide, it will make the plasma system application unreliable.
Methods of using nitrogen trifluoride have been attempted but never have been brought to the marketplace. One such method was performed in a static mode that allowed by-products to condense on the cooler walls of the system. This caused a dangerous condition when these by-products were not evacuated before returning the system to the atmosphere. This called for extended purging times and reduced the benefits of this method. It also allowed for possible dangerous gas mixtures to develop in the system's vacuum components that may mix with gases which are normally utilized to deposit films on the wafers.
One nitrogen trifluoride cleaning method is discussed in UK Patent Appln. GB2183204 where nitrogen trifluoride is used in a static mode and suggestion for use in a continuous flowing mode is also set forth. This patent application does not address the means or methods for removing cleaning by-products, the treatment of by-products once removed, the extent of clean or the use of nitrogen trifluoride with any other gases.
U.S. Pat. No. 5,421,957 discloses a nitrogen trifluoride cleaning process for semiconductor process reactors and apparatus by controlling the moisture content during the clean operation to be less than 10 parts per million by volume. Inert carrier gases for the nitrogen trifluoride are disclosed such as nitrogen, helium, argon or the like. The concentration of the inert was from 95.5% to 80% of the etchant mixture.
U.S. Reissue Patent No. 30,505 discloses a process for plasma etching of a solid material with a binary mixture comprising essentially oxygen and a halocarbon wherein at least one carbon atom in said molecule is linked to a predominance of fluorine atoms. At the temperatures recited (25.degree.-300.degree. C.) there is no reaction between the binary gas mixture and the solid material to be etched. Temperatures in excess of 1000.degree. C. are necessary to thermally dissociate halocarbons, making this gas impractical for thermal cleaning of semiconductor process equipment.
U.S. Pat. No. 4,374,698 describes an etch process for differential etching of silicon nitride from silicon dioxide using the combination of carbon tetrafluoride and a halofluorocarbon. The gas etchant may include oxygen or nitrous oxide. A plasma is necessary to dissociate the halocarbon into species that will react with the solid material. The role of the oxygen source in this patent is to volatilize the carbon products into CO and CO.sub.2. Without oxygen, this process would coat the process equipment with teflon-like material, defeating the usefulness of the process for cleaning.
U.S. Pat. No. 4,522,681 discloses a method for etching holes in silicon dioxide wherein a dry plasma etch gas of argon, nitrogen trifluoride and oxygen may be used. Polymeric photoresist materials such as polymethyl methacrylate, ethyl methacrylate, methyl isopropyl ketone as well as copolymers thereof with methacrylic acid may be used. This class of photoresist materials was required, versus standard novel AC photoresists, to successfully practice the invention. Plasma is necessary to dissociate the fluorine compound into specie that will etch the substrate. The role of the oxygen is to etch the photoresist and not the substrate.
U.S. Pat. No. 4,568,410 discloses a dry plasma etch process for etching silicon nitride using nitrogen trifluoride and oxygen. Good results for etching silicon nitride were found with relative percentages of the nitrogen trifluoride to oxygen recited at column 5, line 65 to be 10-20 SCCM of NF.sub.3 in comparison to 20-35 SCCM for oxygen. The gases are also disclosed as capable of etching common resists.
U.S. Pat. No. 4,787,957 is directed to a method for plasma desmear and etchbac of epoxy and polyimide materials from a multilayered or double sided printed circuit board using a plasma gas composition in the range of 20-45% NF.sub.3, the remainder being O.sub.2.
EP Application 0 731 497 A2 discloses a thermal clean with diluted nitrogen trifluoride and means for removing the cleaning by-products.
Various chlorine trifluoride cleaning processes are known such as are disclosed in U.S. Pat. Nos. 5,254,176; 5,294,262; 5,380,370; and 5,069,724.
In the article "In Situ Cleaning of Silicon Nitride (Si.sub.3 N.sub.4) Process Quartzware Using a Thermal Nitrogen Trifluoride (NF.sub.3) Etch Process", SEMATECH Technology Transfer 96083161A-TR (9/30/96) by A. D. Johnson, et al., a thermal cleaning process using nitrogen trifluoride is disclosed. The article suggests the use of complete cleans.
The prior art has failed to address a commercially successful process for cleaning semiconductor materials or equipment using a gaseous source to produce volatile cleaning by-products which are readily removed from the materials or equipment after cleaning is accomplished. In addition, the prior art has not addressed a viable method for thermal cleaning with fluorine sources in which minimal start-up time is required to re-initiate the production process in the cleaned equipment. The present invention as set forth below overcomes these drawbacks of the prior art.

Partial clean fluorine thermal cleaning process


Described herein are methods and apparatus, including computer program products, that implement a centralized cache storage for runtime systems. A computer program product can include instructions operable to receive a request at a centralized shared cache framework to store an entity; cache the entity in a shared memory in response to the request, where the shared memory is operable to store the entity such that the entity is accessible to runtime systems, and caching the entity in the shared memory comprises storing the entity for one of the runtime systems; receive a request at the centralized shared cache framework to retrieve the entity from the shared memory; and if the entity is stored in the shared memory, retrieve the stored entity from the shared memory, where the centralized shared cache framework is operable to retrieve the entity for any of the runtime systems.

The present application relates to digital data processing, and more particularly to centralized cache storage for runtime systems.
A runtime system is a code execution environment that executes instructions or code in user requests and that provides runtime services for that code. Core runtime services can include functionality such as process, thread, and memory management (e.g., laying out entities in a server memory, managing references to entities, and garbage collecting entities). Enhanced runtime services can include functionality such as error handling and establishing security and connectivity.
One example of a runtime system is a virtual machine (VM). A VM is an abstract machine that can include an instruction set, a set of registers, a stack, a heap, and a method area, like a real machine or processor. A VM essentially acts as an interface between program code and the actual processor or hardware platform on which the program code is to be executed. The program code includes instructions from the VM instruction set that manipulate the resources of the VM. The VM executes instructions on the processor or hardware platform on which the VM is running, and manipulates the resources of that processor or hardware platform, so as to effect the instructions of the program code. In this way, the same program code can be executed on multiple processors or hardware platforms without having to be rewritten or re-compiled for each processor or hardware platform. Instead, a VM is implemented for each processor or hardware platform, and the same program code can be executed in each VM. The implementation of a VM can be in code that is recognized by the processor or hardware platform. Alternatively, the implementation of a VM can be in code that is built directly into a processor.
As an example, a Java source program can be compiled into program code known as bytecode. Bytecode can be executed on a Java VM running on any processor or platform. The Java VM can either interpret the bytecode one instruction at a time, or the bytecode can be further compiled for the real processor or platform using a just-in-time (JIT) compiler.
In addition to Java VMs, other examples of VMs include Advanced Business Application Programming language (ABAP) VMs and Common Language Runtime (CLR) VMs. ABAP is a programming language for developing applications for the SAP R/3 system, a widely installed business application system developed by SAP. The CLR is a managed code execution environment developed by Microsoft Corp. of Redmond, Wash.
When executing, runtime systems create and reference local data entities. Many different types of local entities can be created, including, for example, strings, constants, and variables, objects that are instances of a class, runtime representations of a class, and class loaders that are used to load class runtime representations.
When a local entity is no longer being used by a runtime system, the memory being used to store the local entity needs to be reclaimed—i.e., freed or otherwise released and returned to the pool of available memory—so that it can be used to store new data entities. In some environments, programmers must explicitly reclaim the memory they have allocated for local entities (e.g., by explicitly calling functions to free specified sections of memory). In other environments, the reclamation of memory is handled through a technique known as garbage collection.
Garbage collection is a process designed to identify and reclaim blocks of memory that have been dispensed by a memory allocator but that are no longer "live" (i.e., no longer being used, as determined, for example, by not being reachable from any currently referenced objects or entities). Entities that are garbage collected are typically referred to as being "dead" as opposed to being live. Garbage collection is usually handled as a background task by runtime systems rather than as an explicit task by user programs. There are some costs associated with garbage collection, as access to memory must typically be restricted and runtime systems must sometimes be halted during some portions of the garbage collection process.
Multiple runtime systems can be executed in parallel in order to increase the performance and scalability of server environments. When multiple runtime systems are executed in parallel, resource (e.g., memory) and time consumption can be reduced by sharing entities between the runtime systems. There are multiple techniques that can be used to share entities, and many different types of entities can be shared (including for example strings, constants, variables, object instances, class runtime representations, and class loaders).
A runtime system can include a cache, which is a temporary storage, in a memory, for entities. In some implementations, entities in a cache can be directly accessed by programs running in the runtime system. For example, a program can store and retrieve entities in the cache. In a cache for a Java VM, objects can be cached in a local heap.

Centralized cache storage for runtime systems


A method for manufacturing a monocrystalline piezoelectric material layer includes providing a donor substrate made of the piezoelectric material, providing a receiving substrate, transferring a so-called “seed layer” of the donor substrate onto the receiving substrate, and using epitaxy of the piezoelectric material on the seed layer until the desired thickness for the monocrystalline piezoelectric layer is obtained.

A distinction between two main categories of filters can be made among acoustic components used for filtering in the radio frequency range:                first, "Surface Acoustic Wave" (SAW) filters; and        second, "Bulk Acoustic Wave" (BAW) filters and resonators.
A review of these technologies is given in the paper by W. Steichen and S. Ballandras, "Composants acoustiques utilisés pour le filtrage—Revue des différentes technologies" (Acoustic components used for filtering—Review of different technologies), Techniques de l'Ingénieur, E2000, 2008.
Surface acoustic wave filters typically comprise a thick piezoelectric layer (in other words, with a thickness usually equal to several hundred μm) and two electrodes in the form of inter-digitated combs deposited on the surface of the piezoelectric layer. An electric signal, typically a variation of an electrical voltage, applied to an electrode, is converted to an elastic wave that propagates on the surface of the piezoelectric layer. Propagation of this elastic wave is facilitated if the frequency of the wave corresponds to the frequency band of the filter. This wave is converted again into an electrical signal as it reaches the other electrode.
Bulk acoustic wave filters typically include a thin piezoelectric layer (in other words, the thickness is generally much less than 1 μm) and two electrodes formed on each main face of the thin layer. An electrical signal, typically a variation of an electrical voltage, applied to an electrode, is converted to an elastic wave that propagates through the piezoelectric layer. Propagation of this elastic wave is facilitated if the frequency of the wave corresponds to the frequency band of the filter. This wave is converted again into an electrical voltage as it reaches the electrode located on the opposite face.
In the case of surface acoustic wave filters, the piezoelectric layer must have an excellent crystalline quality so as not to cause attenuation of the surface wave. Therefore, in this case, it will be preferred to use a monocrystalline layer. At the present time, appropriate industrially usable materials are quartz, LiNbO3 or LiTaO3. The piezoelectric layer is obtained by cutting an ingot from one of the materials, the precision required for the thickness of the layer not being very important if the waves have to propagate essentially on the surface.
In the case of bulk acoustic wave filters, the piezoelectric layer must have a determined and uniform thickness over the entire layer, and must be precisely controlled. On the other hand, since the crystalline quality is relegated to the second order of important parameters for filter performances, compromises are currently being made concerning the crystalline quality and a polycrystalline layer has been considered to be acceptable for a long time. Therefore, the piezoelectric layer is formed by deposition on a support substrate (for example, a silicon substrate). At the present time, materials used industrially for such a deposit are AlN, ZnO and PZT.
Therefore, material choices in the two technologies are very limited.
The choice of a material is the result of a compromise between the different properties of the filter, depending on the specifications of the filter manufacturer.
It would be desirable to be able to use more materials than those listed above, to provide more freedom in the design of bulk acoustic wave filters or surface acoustic wave filters. In particular, materials traditionally used for surface acoustic wave filters could represent interesting alternatives for bulk acoustic wave filters.
However, this requires obtaining thin, uniform and good quality layers of these materials.
A first possibility would be to thin the thick layers cut from ingots, using polishing and/or etching techniques. However, these techniques cause a large loss of material and cannot achieve a layer with a thickness of a few hundred nanometers with the required uniformity.
A second possibility would be to use a SMART CUT® type layer transfer by creating a zone of weakness in a donor substrate of quartz, LiNbO3 or LiTaO3 so as to delimit the thin layer to be transferred, by bonding the layer to be transferred to a support substrate and detaching the donor substrate from it along the zone of weakness so as to transfer the thin layer onto the support substrate. However, creation of the zone of weakness by ion implantation in the donor substrate damages the transferred layer and deteriorates its piezoelectric crystals. Curing methods (particularly baking) known for the transfer of silicon layers are not always capable of completely repairing the piezoelectric layer, due to the complex crystalline structure of the layer and damage mechanisms that seem to be different from mechanisms that occur in silicon.
Finally, at the present time, there is no appropriate substrate, particularly with an appropriate lattice parameter, to form a monocrystalline thin layer made of quartz, LiNbO3 or LiTaO3 by heteroepitaxy with sufficient quality, even if several tests have been carried out on substrates such as sapphire.

Method for manufacturing a monocrystalline piezoelectric layer


Provided is an airbag module-mounting side frame configured to be attachable an airbag with high rigidity and efficiently even when an airbag attachment portion has a closed cross-sectional structure. A side frame which forms a seat and on which an airbag module is mounted is provided. A portion of the side frame to which the airbag module is attached has a closed cross-sectional structure. An attachment member that connects the airbag module and the side frame is disposed to connect an inner wall surface of the closed cross-sectional structure arranged on an outer side of the seat and an inner wall surface of the closed cross-sectional structure arranged on an inner side of the seat.

Disclosed herein is an airbag module-mounting side frame and a vehicle seat provided with the same, and particularly, an airbag module-mounting side frame which is preferably applicable when an airbag attachment portion has a closed cross-section and a vehicle seat provided with the same.
Conventionally, a vehicle seat on which an airbag module is mounted so that an airbag can be deployed and inflated outward in response to large impact force in the event of a collision or the like has been used.
Such an airbag module is often attached to a frame which serves as a framework of a vehicle seat, a space where no cushion pad is present is formed in this attachment position, and the airbag module and its peripheral members are accommodated in this space.
As described above, although the airbag module is often attached to a frame, a large number of frames have a closed cross-sectional shape as well as a flat-plate shape.
That is, a hollow-shaped frame of which the outer surface, the inner surface, and the side surfaces are closed is often used, and a technique for attaching an airbag module to the outer surface of such a frame is required (for example, see Japanese Patent Document No. 2012-076545 A ("the '545 Document")).
The '545 Document discloses a vehicle seat on which an airbag module is mounted.
A side frame that forms a vehicle seat according to the '545 Document has a closed cross-sectional shape, and an airbag module is mounted on an outer side surface thereof.
According to this technique, the airbag module and the frame are fastened by a bolt that is inserted through an outer surface of a closed sectional structure portion.
That is, the bolt is inserted through an outer surface of the frame and is fastened to a nut disposed on the inner side of the closed sectional surface of the frame. The leg side of the bolt is positioned on the inner side of the closed sectional surface of the frame.
According to the technique disclosed in the '545 Document, an airbag module can be effectively attached to a frame having a closed sectional surface.
Moreover, although such an airbag module is often attached to a side frame in a state of being accommodated in a storage case, a technique for arranging the airbag module in a frame having a closed sectional surface without using such a storage case is required.
As a technique that solves such a problem, a technique of mounting an airbag module in a recess formed in a side frame or the like is proposed, for example.
When the airbag module is mounted in the formed recess as such, it is possible to accommodate the airbag module efficiently without any adverse effect on the appearance (for example, see Japanese Patent Document No. 2001-501844 A ("the '844 Document")).
The '844 Document discloses a seat backrest frame.
A lateral member (a portion corresponding to a so-called "side frame") that forms the backrest frame according to this technique has a groove shape which is open to the rear side and extends in an up to down direction. The lateral member is configured such that a member (electric motor) that forms a back supporting member and an airbag module can be accommodated in this groove-shaped portion.
According to the technique disclosed in the '844 Document, an airbag can be attached to the lateral member (side frame).
As described above, although the technique of the '545 Document can attach an airbag module to a side frame having a closed cross-section, development of a technique for attaching the airbag module to the side frame easily with high rigidity is required.
Moreover, although the technique of the '844 Document can attach an airbag efficiently by forming a recess in a side frame and storing an airbag module in this recess, development of a technique for attaching the airbag to the side frame easily with high rigidity is required.
That is, a technique of attaching an airbag module to a side frame having a closed cross-section with high rigidity and improved attachment workability is required. Further, a technique of attaching an airbag module to a recess formed in a side frame having a closed cross-section with high rigidity and improved attachment workability without using a storage case for the airbag module is required.
Various embodiments described herein have been provided in view of the problems of the conventional art, and an object of these is to provide an airbag module-mounting side frame configured to be attachable an airbag with high rigidity and efficiently even when an airbag attachment portion has a closed cross-sectional structure and to provide a vehicle seat provided with the same.
Another object is to provide an airbag module-mounting side frame capable of easily attaching an airbag module to a recess of a side frame having a closed sectional structure efficiently and having high attachment rigidity and to provide a vehicle seat provided with the same.

Airbag module-mounting side frame and vehicle seat provided with same


A system for identifying product placement props in a scene, the system includes: one or more cameras individually equipped with radio frequency identification (RFID) readers for filming or recording a scene for audio/video (A/V) content; one or more product placement props each having an RFID tag affixed thereon representing product placements within the scene; wherein the RFID readers interrogate the RFID tags to determine product placement prop related information including: which of the one or more product placement props are in the scene, and the one or more product placement props relative location with respect to the one or more cameras; and one or more recording devices for retaining the A/V content and the product placement prop related information.

1. Field of the Invention
The present invention relates generally to product placement, and more particularly, to a system for identifying product placement props in a scene with one or more cameras equipped with radio frequency identification (RFID) readers.
2. Description of the Related Art
The proliferation of recording devices and the downloading of audio/video (A/V) content from the Internet in the home has become an increasing concern for advertising and programming executives. The ability to record a program for later viewing, generally allows the viewer to skip or eliminate commercial breaks. The elimination of commercials acts as a disincentive for advertisers to place televised advertisements, and lowers fees paid to programmers. In an effort to get advertised products noticed by viewers, who either skip or tune out commercials, advertisers are increasingly relying on product placement in the backgrounds of various scenes in television programming and feature films. However, as the number of product placements increase, advertisers are requiring improved feedback about the airtime their products are receiving, and if a particular product placement was effective.

International Business Machines Corporation


A solenoid-operated valve design and method particularly for suited for micro-fluidic applications are disclosed. The solenoid valve contains various structure and features that provide for small dispense volumes, small internal volume, and fast operating speed. Also disclosed is a valve design and method particularly suited for a compact, high-density valve manifold. In a particular embodiment disclosed, the valve uses a diaphragm assembly that ensures zero or little leakage. The solenoid-operated valve further has features allowing for low power consumption.

1. Field of the Invention
The present invention pertains generally to valves for physical transport and isolation of liquids and gases. More particularly, the present invention pertains to solenoid-operated isolation valves that are designed for low power and quick dispensing applications. The present invention, in a preferred embodiment, is particularly but not exclusively, useful as a solenoid-operated valve for micro-fluidic platforms with high-density manifolds, and method of manufacturing the same.
2. Description of the Prior Art
Solenoid-operated valves for isolation and transport of fluids are well known. An attractive characteristic of all solenoid-operated valves is that they can be remotely operated because electrical power is used to actuate the valve. Also, a solenoid valve is an attractive option when fluid systems require a valve to cycle open and shut, and thereby pass a set dispense volume of fluid. This is because solenoid valves use a generated and collapsing electromagnetic field to engage a valve stem or a plunger rod. Thus, a power supply can be easily cycled on and off to pass a particular amount of fluid. Solenoid valves are particularly useful in micro-fluidic applications.
Advancements in micro-fluidic arts such as blood chemistry analysis, drug discovery, DNA sequencing, liquid chromatography and other technical arts requiring precision fluid handling have created a need for progress in the components that control and dispense the fluids. Thus a need exists for a design and method for making and using a solenoid valve that provides for small dispensing volumes and can occupy a high density valve manifold with small fluidic components. Also, the nature of most micro-fluidic applications places importance on conserving a fluid sample. Therefore, a valve design and method having a zero "dead volume," and small internal volume is desired. Similarly, an isolation valve should be designed for zero leakage.
In addition, solenoid valve design and method that requires only a small power supply is desired for several reasons. One such reason is that a solenoid coil energized with a relatively high power supply incurs residual magnetism. Any residual magnetism affects the shut off speed of the valve and therefore the dispensed volume. Also, corrosion properties of materials used to fabricate valves are important. For instance, blood is a natural oxidizing agent and will cause some material to undergo pitting corrosion.


There is provided a mechanism for conducting power control in a time division based communication. Subframes of a frame structure of the time division based communication are classified into at two or more classification sets, each classification set comprising at least one subframe. For each of the classification sets, power control related parameters are selected in accordance with the interference on the respective subframes. On the basis of the selected power control related parameters, a power control parameter set is configured defining a power control setting for each subframe of the frame structure. A UE receiving the power control parameter set applies the power control related parameters in the power control.

1. Field of the Invention
The present invention relates to a mechanism for enhancing power control in communication networks. In particular, the present invention is related to apparatuses, methods and computer program products providing a mechanism by means of which an improved power control in time division based communication networks, such as a local area time division duplex network is provided for enabling more flexible and efficient transmission power settings for communication network elements like UEs in the local area.
2. Related Background Art
Prior art which is related to this technical field can e.g. be found by the technical specification 3GPP TS 36.213, for example according to version 10.2.0.
The following meanings for the abbreviations used in this specification apply:    DL: downlink    DwPTS: downlink pilot time slot    eNB: evolved node B    E-UTRAN: evolved universal terrestrial radio access network    FDD: frequency division duplex    GP: guard period    LA: local area    LTE: Long Term Evolution    LTE-A: LTE Advanced    MCS: modulation and codeing scheme    PC: power control    PDCCH: physical downlink control channel    PRACH: physical random access channel    PRB: physical resource block    PUCCH: physical uplink control channel    PUSCH: Physical Uplink Shared Channel    RNTI: radio network temporary identifier    RRC: radio resource control    SF: subframe    SRS: sounding reference symbol    TDD: time division duplex    TPC: transmission power control    Tx: transmitter    UE: user equipment    UL: uplink    UpPTS: uplink pilot time slot    UTRAN: Universal Terrestrial Radio Access Network
In the last years, an increasing extension of communication networks, e.g. of wire based communication networks, such as the Integrated Services Digital Network (ISDN), DSL, or wireless communication networks, such as the cdma2000 (code division multiple access) system, cellular 3rd generation (3G) communication networks like the Universal Mobile Telecommunications System (UMTS), enhanced communication networks based e.g. on LTE, cellular 2nd generation (2G) communication networks like the Global System for Mobile communications (GSM), the General Packet Radio System (GPRS), the Enhanced Data Rates for Global Evolutions (EDGE), or other wireless communication system, such as the Wireless Local Area Network (WLAN), Bluetooth or Worldwide Interoperability for Microwave Access (WiMAX), took place all over the world. Various organizations, such as the 3rd Generation Partnership Project (3GPP), Telecoms & Internet converged Services & Protocols for Advanced Networks (TISPAN), the International Telecommunication Union (ITU), 3rd Generation Partnership Project 2 (3GPP2), Internet Engineering Task Force (IETF), the IEEE (Institute of Electrical and Electronics Engineers), the WiMAX Forum and the like are working on standards for telecommunication network and access environments. Examples for new communication technologies are for example LTE and LTE-A of 3GPP.
For example, in LTE represent is the next evolution of 3GPP based communication technology high data rates the DL and UL direction as well as reduced latency for packet transmissions is tried to be achieved. For this purpose, orthogonal frequency division multiple access (OFDMA) is the multiple access method used in the DL direction while in the UL direction single-carrier frequency division multiple access (SD-FDMA) mode is used. There are two different duplex modes for separating the transmission directions from the user to the base station and vice versa: on is frequency division duplex (FDD) and the other is time division duplex (TDD). In the case of FDD, the downlink and uplink are transmitted using different frequencies. In the TDD mode, the DL and UL are on the same frequency and the separation occurs in the time domain, so that each direction in a call is assigned to specific timeslots. The TDD mode is used for transmissions in unpaired frequency bands.
Both the uplink and downlink for LTE are divided into radio frames of a specific length (e.g. 10 ms). A frame consists of two "half-frames" of equal length, with each half-frame consisting of e.g. 10 slots, wherein two consecutive slots form one subframe. TDD may use the same frequency bands for the uplink and the downlink. The transmission directions are separated by carrying the UL and DL data in different subframes. The distribution of subframes between the transmission directions can be adapted to the data traffic and is done either symmetrically (equal number of DL and UL subframes) or asymmetrically.
Asymmetric distribution of subframes may be employed, for example, in LTE-A systems, such as TDD systems in a LA scenario (LA TDD). For example, the asymmetric resource allocation in LTE TDD is realized by providing seven different semi-statically configured uplink-downlink configurations defining a respective number and order of UL subframes and DL subframes in the transmission frame. Due to these different configurations, it is possible to provide between 40% and 90% DL subframes which allows a certain flexibility in the resource allocation in the LA TDD network.
For TDD deployments in general, interference between UL and DL including both basestation-to-basestation and UE-to-UE interference is typically handled by statically providing a guard period and adopting the same frame timing and uplink-downlink configuration practically in the entire network. However, in an LA network, the interference between UL and DL may occur again since it may be of interest to consider different UL/DL allocations in the neighboring cells. This is because a same DL/UL configuration in different neighboring cells of the LA network may not match the traffic situation in the different LA cells having generally a small number of users. However, in order to handle such an interference, it is necessary to conduct a suitable power control, so that this may have a heavy impact on the transmission power settings for a UE in the LA network.
Also the DL-UL interference in multi-cell scenarios is to be considered. As a result, an interference level between different subframes of the same frame may be significantly different.

Mechanism for enhancing power control in time division based communications


An improved therapy is described for patients suffering from pathological conditions characterized by viral, fungal, bacterial, or protozoal load by which such load is reduced. The invention also alleviates symptoms associated with such pathogen-load-characterized conditions by decreasing the pathogen load.

The invention concerns immunodeficient conditions which are caused by or which involve dysfunction of the cell-mediated immune system and which may be reflected by infection with and disease caused by other pathogenic microorganisms which may be viral, bacterial, fungal or protozoal in nature. For example, candidiasis and histoplasmosis are caused by fungal organisms, tuberculosis is caused by a bacterium, and shingles is caused by the re-emergence of Herpes zoster in adults who have previously had chicken pox, the primary manifestation of infection with this virus in childhood.
A typical manifestation of cell-mediated immunity is the delayed type hypersensitivity ("DH") skin reaction. A DH skin reaction is observed when an appropriate antigen is injected intradermally. Within 24 to 48 hours, local inflammation (erythema) and a swelling and thickening (induration) are observed in a sensitive individual. The degree of sensitivity may be measured by the size and severity of the reaction. The DH reaction also presents characteristic histological findings—specifically, perivascular infiltration of leukocytes and monocytes in the inflamed area. The cells seen at the site of a DH reaction are derived from the peripheral blood leukocyte population.
The mechanisms of cell-mediated immunity are as yet incompletely understood. It is known that the cells which mediate the response are capable of responding in a variety of ways to a challenge from an antigen. These responses include: proliferation of cells bearing specific sensitivity to a given antigen; the induction and multiplication of cells mediating a variety of immune functions, including antibody production; and reactions against foreign cells and tumors.
Gottlieb U.S. Pat. No. 4,468,379 disclosed that endogenous materials isolated from human leukocyte dialysates exist that amplify the speed and magnitude of cell-mediated immune system response. These immunoamplifier materials are distinguished from so-called transfer factors in that immunoamplifiers do not transfer to a subject an immune response to a mitogen or antigen to which the subject has not previously been exposed and is not concurrently exposed, while transfer factors are said to do so. Moreover, immunoamplifiers nonspecifically increase cell-mediated immune system responses to mitogens and antigens to which the subject has previously been or concurrently is exposed, while transfer factors are specific to particular antigens.
The material designated "amplifier 1" in the '379 patent was subsequently determined to be a mixture of various things. They include (1) what is referred to subsequently in Gottlieb U.S. Pat. No. 5,081,108 and Gottlieb U.S. Pat. No. 5,100,663 as YG Product, (2) what is referred to in Gottlieb U.S. Pat. No. 5,081,108 as YGG Product, (3) another as-yet undefined or incompletely defined amplifier, (4)=various amino acid products, and (5) other materials. The foregoing materials occurred in amplifier 1 in varying relative proportions, depending on the identity of the blood sample from which the sample of amplifier 1 was derived. Such variation appears to reflect the fact that the content of a human blood sample varies from donor to donor and even for the same donor from time to time, depending on the state of the immune system of the donor. The fact that the content of amplifier 1 varied from sample to sample adversely affected the repeatability of experiments directed toward establishing the immunologic activity of amplifier 1. That in turn adversely affected ability to establish product identity, standard dosages, assays, and the like for amplifier 1. These factors have hindered therapeutic utilization of products based on amplifier 1.
Gottlieb U.S. Pat. No. 4,616,079 suggested that amplifiers may act on T-helper cells (T4 cells) in a way that causes them to produce chemical mediators (cytokines) whose effect is to increase the speed and/or magnitude of cell-mediated immune system response to antigens and other means of activating a cell-mediated immune system response. Indicia of this response include DH reaction to recall antigens, production of IL-2 and gamma interferon, and potentiation of cytotoxic cells.
Gottlieb U.S. Pat. No. 4,699,898 and Gottlieb U.S. Pat. No. 5,100,068 disclosed that Tyr-Gly and Tyr-Gly-Gly peptides are immunologically active components in the partially purified dialysate fractions previously described in earlier Gottlieb patents, such as Gottlieb U.S. Pat. No. 4,616,079. The ability of YG Product and YGG Product to affect immune responses has been confirmed in subsequent literature. See, e.g., B. Zacharie et al., Thioamides: Synthesis, stability, and immunologic activities of thioanalogues of Imreg, Preparation of new thioacylating agents using fluorobenzimidazolone derivatives, 42 J. MED. CHEM. 2046 (1999).
Finally, it may be helpful to refer for background purposes to A. Gottlieb et al., Decrease in serum HIV RNA following treatment with a leukocyte dialysate fraction (LDS) that contains N-terminal peptides of the enkephalins and enhances cell-mediated immunity, in INTERNATIONAL CONGRESS OF IMMUNOLOGY, NEW DELHI, INDIA 883-99 (G. P. Talwar et al. eds. 1998)(pub. Monduzzi Editore SpA, Bologna, Italy).
It is known that various diseases and pathological conditions, such as HIV Disease and AIDS, as well as chemotherapy, radiation, and aging, depress the immune system response. A result is increased susceptibility to opportunistic infections, malignancies, and other pathological conditions that a normal immune system would have confronted. Frequently (and for some conditions, invariably), the result is death.
It is now believed that amount of viral load is related to the severity of HIV Disease and AIDS symptoms. By the same token, therapies have been sought that would decrease viral load. As yet, many such therapies have undesirable side effects and/or their effectiveness diminishes after use for a time. It would be desirable to have a therapy for reduction of viral load that caused fewer or no side effects. It would also be desirable to have a therapy for reduction of viral load that did not diminish in effectiveness after use for a time.
It is known that a desired therapeutically active molecule may be delivered by administering to a patient a different molecule that hydrolyzes, as a result of the action of endogenous enzymes, to fractions that include the desired therapeutically active molecule. Hetacillin is a well known example. Hetacillin breaks down in the human body to ampicillin. A legal controversy ensued internationally, following the introduction of hetacillin, over whether the manufacture, use, and sale of hetacillin infringed patents on ampicillin.
It is known that desired therapeutically active molecules may be degraded by enzymatic hydrolysis, and that such process may sometimes be retarded or prevented by use of the principle of so-called steric hindrance. This term refers to placement of a radical such as methyl in a location where an enzyme might otherwise cause hydrolysis. This principle has been used, largely on a trial and error basis, to create synthetic penicillinase and other hydrolysis-resistant drugs. It is also known to N-methylate the Tyr residue of Tyr-Gly or Tyr-Gly-Gly to inhibit such enzymatic action. It is also known to esterify or amidify the C-terminal carboxyl group to inhibit enzymatic cleavage.
Tyr-Gly and Tyr-Gly-Gly have been sold as chemical reagents (L-tyrosyl-glycine and L-tyrosylglycylglycine) by Sigma Chemical Co., St. Louis, Mo., among others. Tyr-Gly and Tyr-Gly-Gly are not sold in U.S.P. grade, and it is illegal under applicable laws to sell Tyr-Gly or Tyr-Gly-Gly for use as a pharmaceutical. Commercial grade Tyr-Gly and Tyr-Gly-Gly are not considered free of pyrogens, endotoxin, and other pharmaceutically unacceptable constituents. The presence of such pyrogens, endotoxin, and other pharmaceutically unacceptable constituents makes a product unacceptable for use as a drug, as that term is defined by federal statute, both under generally recognized medical principles and under FDA regulations.
Over the years in the literature and in prior Gottlieb patents, the usage of the terms "amplifier", "immunoamplifier", "amplifier of the immune system", and related terms may not have been uniform. It should be understood that "immunoamplifier" as used in this application means the same as those other terms in prior applications and publications.

Abstract: The present invention accomplishes those objects by administering substances to patients suffering from pathogen load that enhance the function of the patients' immune systems. The substances are known as “immunoamplifiers,” a term that refers to the substances' ability to increase cell-mediated immune system response non-specifically.


A water saving device for us in a hot water system to recover an initial volume of cold water when a hot water tap is turned on. The device has an inlet for receiving water piped from a water heater, a primary outlet for delivering hot water to a tap, and a by-pass outlet through which any cooled water is diverted by a thermally actuated shuttle valve. The device also includes a secondary valve for closing off the by-pass outlet when the water pressure downstream of the primary outlet is high (such as when the down stream hot water delivery tap is closed and opening the by pass outlet when the water pressure downstream of the primary outlet is low, such as when the downstream hot water delivery tap is opened.

1. Field of the Invention
This invention relates to a liquid conservation device. The invention also extends to a liquid conservation apparatus including the conservation device.
This invention relates particularly but not exclusively to a water conservation device for fitting to a domestic hot water tap so as to divert water that is below a specified design temperature away from the hot water tap. The water is only directed to and through the hot water tap once it reaches its design temperature. The initial volume of water that is diverted can then be recovered and re-used. It will be convenient to hereinafter describe this invention with reference to this example application.
However, it is to be clearly understood that the invention is capable of broader application. For example, the invention may be applied to a water system that provides cold water at a design temperature, eg cold water for drinking. In this case the device will be used to divert an initial volume of water that is above the design temperature away from a tap and then recycle it back to a cooling device so that it can be reused. Water will only be passed through the tap when it is at or below a set temperature.
Further the invention can be applied to drinks other than water including alcoholic beverages and also drinks like coffee and tea that should preferably be supplied within certain temperature ranges. The invention may also be applied to industrial liquids that need to be supplied in a certain condition.
The primary requirement for the invention to find application is that the substance must be a liquid and it must be desired for the liquid to be supplied in a certain condition. Generally this condition will mean supplying the liquid at a certain temperature. However, the Applicant does not exclude diverting an initial volume of liquid until other conditions have been reached, for example, a certain concentration of a component in the liquid, or a certain pH or salinity, or even a certain viscosity. Applicant envisages that the application of this invention could potentially be so wide that it is not possible at this time to provide a closed list of the possible uses of the invention.
2. Description of Related Art
In a domestic environment a hot water supply, eg a geyser, is typically situated spaced away from one or more hot water taps, while water in the geyser is kept at a design temperature, eg by one or more heating elements. Water that is held in the water lines in between use of the hot water supply is not heated and it cools slowly over a period of time. Typically, after half an hour or so it will be at the same temperature as the pipe and be around ambient temperature. As a result of this cooling of water in the pipe, when the hot water tap is turned on again the initial water flow from the tap is cold. Typically, a user might cause this water to flow directly to the drain and only commence use of the water passing out of the hot tap once it has warmed up sufficiently. This therefore leads to a loss of this water down a drain.
Clearly therefore, it would be advantageous if a way of saving the water could be devised. This is particularly so in recent times in Australia where water supplies have become more and more scarce. Water restrictions are in place in many regions and in addition several areas have been declared drought areas.
It would be particularly advantageous if a way could be devised of diverting this initial volume of cold water away from the tap so that it could be re-used either as hot or cold water. After the water had been warmed up to a required temperature it could be permitted to pass through the tap and used as hot water in the usual way.

Liquid conservation device and a liquid apparatus incorporating the liquid conservation device


A method of continuous curing and post-curing of a plurality of extruded strands is provided. A plurality of extruded strands is wrapped through a plurality of spindle units rotatably connected to a rigid frame structure. A plurality of dual spindles are provided in a plurality of upper and lower spindle units, wherein each dual spindle comprises a free spinning roller and a driven roller. A chamber that comprises a dual function chamber configured for heating and cooling is supported on the rigid frame structure. The plurality of extruded strands is continuously transferred between the upper spindle units and the lower spindle units such that the plurality of extruded strands runs in a vertical fashion that continuously alternates between the lower spindle units and the upper spindle units. Each of the plurality of strands is transferred independently of each other and continuously passed through the chamber for continuous curing and post-curing.

1. Technical Field of the Embodiment
The present embodiment relates in general to a method and apparatus for the continuous curing and post curing of strands of extruded rubber products and the like. More specifically, the present embodiment relates to a method and apparatus that can continuously perform both curing and/or post curing processes of strands of extruded rubber and similar products.
2. Description of the Related Art
Several types of apparatuses and methods are employed for the continuous curing of longitudinally extruded strands of rubber and similar products. Conventional apparatuses offer discontinuous or batch processes for curing rubber and related extruded strands. The conventional apparatus and methods typically cure continuous lengths of extruded strands in a continuous fashion in a liquid salt bath or curing oven with heat and/or through a microwave process, and are then post-cured in a batch fashion where the extrudate is cut and post-cured in an oven or autoclave. The conventional method of batch post-curing is inefficient due to the presence of multiple manufacturing processes, increased labor, and resulting overhead expenses.
Various apparatuses and methods exist for the curing of different types of materials. U.S. Pat. No. 4,155,695 issued to Karppo on May 22, 1979 discloses an apparatus for continuous curing of elongated products, such as cables comprising a conductor surrounded by a mantle of cross linkable material. The cable is passed longitudinally through a curing tube for heating the cable to a curing temperature and subsequently subjected to cooling. The heating of the cable in the heating zone is carried out by means of heat radiation in a pressurized gas atmosphere and the cooling of the cable is carried out in the presence of a gas under pressure so that heat is transferred from the heated cable in the cooling zone partially by radiation to the cooled wall of the tube and partly by convection to said cooled gas.
U.S. Pat. No. 4,356,143 issued to Hill on Oct. 26, 1982 discloses an apparatus and a method for the curing of a continuous length of curable material. The length of material is passed through a curing chamber defined by a tubular body. This tubular body is disposed in the upper part of another heated tubular body which contains a heat exchange liquid. This liquid is fed to one or more injectors disposed at one or both ends of the body, injected along the chamber, and then allowed to drain back into the body. The body contains a further tubular body downstream of, and partitioned from, the original tubular body. The tubular body also has an injector through which water is injected to cool the length of material. The tubular body may be provided with drain holes through which heat exchange liquid can be quickly drained at the end of a curing run. It may also be provided with air vents or a longitudinal slot in its upper part to release trapped air. Devices for wiping heat exchange liquid clinging to the cured material on emergence from the curing chamber are also provided.
U.S. Pat. No. 7,198,476 issued to Harcourt on Apr. 3, 2007 discloses an apparatus and process for continuously vulcanizing a hose. Pressurized air or other gas is intermittently supplied through a woven jacket, a mandrel, a check valve and into the interior of an extruded rubber hose. The hose is sealed as it is pulled over the mandrel. Pinch rollers seal the other end of the hose. One or more non-contact heaters vulcanize the hose from outside-in. Pressurizing the inside of the hose maintains proper diametrical dimensions of the hose.
The above conventional apparatuses and methods employ batch processing of the extrudate in the cooling zone, and uses pressurized hot air or other gas in the heating zone. Generally these conventional apparatuses and methods cure in a continuous fashion in a liquid salt bath or curing oven with heat and/or microwaves; and are then post-cured in a batch fashion where the extrudate is cut and post-cured in an oven or autoclave. These methods cannot be employed for the simultaneous and continuous curing of multiple strands of the extrudate.
Hence, it can be seen that there is a need for an improved method and apparatus for the continuous curing of extrudates. Continuous curing is preferred to the discontinuous curing processes because the quality of the final product is higher due to the ability to accommodate longer extrudates and easier quality control. The continuous curing method is also more economical due to the presence of high speed lines and the absence of the need for the intermediate conveying of the extrudate. Lower overall costs as a result of less manpower, less space requirements, and lower energy requirements are additional benefits realized as a result of using the continuous curing method and apparatus.

This patent is subject to a terminal disclaimer.

Continuous curing and post-curing method


In a DRAM, a bit-line potential inputting node of an equalizer provided for each odd-numbered pair of bit lines is provided separately from a bit-line potential inputting node of an equalizer provided for each even-numbered pair of bit lines. In burn-in testing, one node receives a high level and the other node receives a low level to simultaneously apply electric field stress between adjacent pairs of bit lines. This allows sufficient acceleration of initial failures in burn-in testing.

1. Field of the Invention
The present invention relates to a semiconductor memory device and particularly to a semiconductor memory device with a test mode.
2. Description of the Background Art
FIG. 7 is a plan view of a layout of a chip for a conventional dynamic random access memory (referred to as a DRAM hereinafter).
Referring to FIG. 7, the DRAM includes four memory mats 10 each provided at one of four corners of the memory chip, a row decoder 11 and a column decoder 12 provided for each memory mat 10, and a peripheral circuit region 13 provided at the center of the memory chip. Each memory mat 10 includes a plurality of memory arrays MA1-MA16 and a plurality of sense amplifier bands SA1-SA17 arranged along the direction of the longer side of the chip. Each of memory arrays MA1-MA16 and each of sense amplifier bands SA1-SA17 are alternately arranged.
Each of memory arrays MA1-MA16 includes a plurality of memory cells each for storing data of one bit. Each memory cell is arranged at a predetermined address which is determined according to row and column addresses.
Row decoder 11 is responsive to a row address signal for selecting any of memory arrays MA1-MA16 and designating any row address of the selected memory array. Column decoder 12 is responsive to a column address signal for designating any column address of memory arrays MA1-MA16.
Arranged in sense amplifier bands SA1-SA17 is a circuit for inputting/outputting data between the memory cell of the address designated by row and column decoders 11 and 12 and the outside. A circuit for controlling the entire DRAM, a power supply circuit and the like are arranged in peripheral circuitry region 13.
FIG. 8 shows in detail a configuration of the memory array MA1 and sense amplifier bands SA1 and SA2 shown in FIG. 7.
Referring to FIG. 8, memory array MA1 is configured in the so-called half-pitch cell arrangement, and includes a plurality (16 in the figure) of bit lines BL and /BL, and a pair MCP of memory cells periodically arranged at the intersection of two word lines WL and one bit line BL or /BL. Sense amplifier bands SA1 and SA2 are each provided with a plurality (four in the figure) of sense amplifier+input/output control circuits 15.
The pair MCP of memory cells includes a memory cell MC connected to one word line WL of two word lines WL and to bit line BL, and a memory cell MC connected to the other word line WL and to bit line BL, as shown in FIG. 9A. Memory cell MC includes an n-channel MOS transistor 20 for access and a capacitor 21 for storing information.
The pair MCP of memory cells is practically formed on a surface of a p silicon substrate 22, as shown in FIG. 9B. A gate electrode or word line WL is formed on a surface of p silicon substrate 22 with a gate oxide film (not shown) interposed therebetween and n.sup.+ source/drain regions 23a, 23b and 23c are formed in the surface of silicon substrate 22 at one side of each of two word lines WL as well as between the two word lines WL to form two n-channel MOS transistors 20. The common source/drain region 23c of the two n-channel MOS transistors 20 is connected to bit line BL, and a conductive layer 24, a dielectric layer 25 and a conductive layer 26 are deposited on the surface of each of source/drain regions 23a and 23b to form capacitor 21 of memory cell MC. Conductive layer 24 serves as one electrode of capacitor 21 or a storage node SN, and conductive layer 26 serves as the other electrode of capacitor 21 to receive a cell potential Vcp.
An odd-numbered bit line BL and even-numbered bit line /BL which are arranged adjacent to each other form a pair of bit lines BL and /BL. A pair MCP of memory cells is arranged at the intersection of an odd-numbered bit line BL and (4m+1)th and (4m+2)th word lines WL, wherein m represents an integer equal to or larger than zero. A pair MCP of memory cells is arranged at the intersection of an even-numbered bit lines /BL and (4m+3)th and (4m+4)th word lines WL.
Pairs of bit lines BL and /BL configured of a (4n+1)th bit line and a (4n+2)th bit line are connected to their respective sense amplifier+input/output control circuits 15 in sense amplifier band SA1, wherein n represents an integer equal to or larger than zero. Pairs of bit lines BL and /BL configured of a (4n+3)th bit line and a (4n+4)th bit line are connected to their respective sense amplifier+input/output control circuits 15 in sense amplifier band SA2. Each sense amplifier+input/output control circuit 15 in sense amplifier bands SA1 and SA2 receives a precharge potential VBL (=Vcc/2).
Sense amplifier+input/output control circuit 15 in sense amplifier band SA2 includes transfer gates 30 and 34, a column select gate 31, a sense amplifier 32 and an equalizer 33, as shown in FIG. 10.
Transfer gate 30 includes n-channel MOS transistors 41 and 42. N-channel MOS transistors 41 and 42 are connected between input/output nodes N1 and N2 of sense amplifier+input/output control circuit 15 and a corresponding pair of bit lines BL and /BL of memory array MA2, respectively, and the gates of n-channel MOS transistors 41 and 42 receive a memory array select signal BLIR.
Transfer gate 34 includes n-channel MOS transistors 52 and 53. N-channel MOS transistors 52 and 53 are connected between input/output nodes N1 and N2 and a corresponding pair of bit lines BL and /BL of memory array MA1, respectively, and the gates of n-channel MOS transistors 52 and 53 receive a memory array select signal BLIL. Sense amplifier+input/output control circuit 15 in sense amplifier band SA2 is shared by two memory arrays MA1 and MA2 arranged on the both sides of the sense amplifier+input/output control circuit 15. When memory array MA1 is selected, signal BLIR attains a low level and transfer gate 30 is shut down. When memory array MA2 is selected, signal BLIL attains a low level and transfer gate 34 is shut down.
Column select gate 31 includes n-channel MOS transistors 43 and 44 connected between input/output nodes N1 and N2 and signal input/output lines IO and /IO, respectively. The gates of n-channel MOS transistors 43 and 44 are connected to column decoder 12 via a column select line CSL. When column decoder 12 causes column select line CSL to rise to a high level as the selected level, n-channel MOS transistors 43 and 44 are turned on and input/output nodes N1 and N2, that is, the pair of bit lines BL and /BL of memory array MA1 or MA2 are coupled with the pair of data signal input/output lines IO and /IO.
Sense amplifier 32 includes p-channel MOS transistors 45 and 46 connected between input/output nodes N1 and N2 and a node N3, respectively, and also includes n-channel MOS transistors 47 and 48 connected between input/output nodes N1 and N2 and a node N4, respectively. The gates of MOS transistors 45 and 47 are both connected to node N2, and the gates of MOS transistors 46 and 48 are both connected to node N1. Nodes N3 and N4 receive sense amplifier activating signals SE and /SE, respectively. When sense amplifier activating signals SE and /SE attain a high level and a low level, respectively, sense amplifier 32 responsively amplifies a slight, potential difference between nodes N1 and N2, i.e., between paired bit lines BL and /BL of memory array MA1 or MA2 to the power supply voltage Vcc.
Equalizer 33 includes an n-channel MOS transistor 49 connected between input/output nodes N1 and N2, and n-channel MOS transistors 50 and 51 connected between input/output nodes N1 and N2 and a node N6, respectively. The gates of n-channel MOS transistors 49-51 are all connected to node N5. Node N5 receives a bit line equalization signal BLEQ, and node N6 receives precharge potential VBL (=Vcc/2). When bit line equalization signal BLEQ attains an active high level, equalizer 33 responsively equalizes the potentials of nodes N1 and N2, i.e., the potentials of bit lines BL and /BL of memory array MA1 or MA2 with precharge potential VBL. It should be noted that signals BLIR, BLIL, SE, ISE and BLEQ and precharge potential VBL are provided from a circuit in peripheral circuitry region 13 shown in FIG. 7.
The other memory arrays MA2-MA16 and sense amplifier bands SA3-SA17 also have the same structure.
An operation of the DRAM shown in FIGS. 7-10 will now be described briefly. On standby, signals BLIR, BLIL and BLEQ all attain a high level, signals SE and /SE both attain an intermediate level (Vcc/2), and the potentials of bit lines BL and /BL are equalized with precharge potential VBL. Word line WL and column select line CSL each attain a low level as the non-selected level.
In the write mode, bit line equalization signal BLEQ initially falls to a low level to stop the equalization between bit lines BL and /BL. Then, in response to a row address signal, row decoder 11 selects, for example, memory array MA1 and sets signals BLIR and BLIL to low and high levels, respectively, to couple memory array MA1 with sense amplifier bands SA1 and SA2. Furthermore, row decoder 11 causes the word line WL of the row corresponding to the row address signal to rise to a high level as the selected level and turn on n-channel MOS transistors 20 of memory cells MC of the row.
Then, column decoder 12 causes column select line CSL for the column corresponding to a column address signal to rise to an active high level and turn on column select gate 31. Write data externally applied is provided to the pair of bit lines BL and /BL of the selected column via the pair of data input/output lines IO and /IO. The write data is provided as a potential difference between bit lines BL and /BL. Capacitor 21 of the selected memory cell MC stores therein the amount of an electrical charge corresponding to the potential of bit line BL or /BL.
In the read mode, bit line equalization signal BLEQ initially falls to a low level and the equalization between bit lines BL and /BL is stopped. As is in the write mode, row decoder 21 selects, for example, memory array MA1 and couples memory array MA1 with sense amplifier bands SA1 and SA2 as well as causes the word line WL of the row corresponding to a row address signal to rise to a high level as the selected level. The potentials of bit lines BL and /BL slightly change depending on the amount of electrical charge stored in capacitor 21 of the activated memory cell MC.
Then, sense amplifier activating signals SE and /SE attain high and low levels, respectively, to activate sense amplifier 32. When the potential of bit line BL is slightly higher than that of bit line /BL, the resistance values of MOS transistors 45 and 48 are smaller than those of MOS transistors 46 and 47, respectively, and the potential of bit line BL is increased to high level and the potential of bit line /BL is reduced to low level. When the potential of bit line /BL is slightly higher than that of bit line BL, the resistance values of MOS transistors 46 and 47 are smaller than those of MOS transistors 45 and 48, respectively, and the potential of bit lines /BL is increased to high level and the potential of bit line BL is reduced to low level.
Then, column decoder 12 causes column select line CSL of the column corresponding to a column address signal to rise to a high level as the selected level to turn on column select gate 31 of the column. The data on the pair of bit lines BL and /BL of the selected column is externally output via column select gate 31 and the pair of data signal input/output lines IO and /IO.
FIG. 11 shows the main portion of another conventional DRAM in comparison with that shown in FIG. 8. The DRAM shown in FIG. 11 is configured in a so-called quarter-pitch cell arrangement.
More specifically, (4n+1)th and (4n+3)th bit lines configure a pair of bit lines BL and /BL, and (4n+2)th and (4n+4)th bit lines configure a pair of bit lines BL and /BL. A pair MCP of memory cells is arranged at the intersection of a (4n+1)th bit line and (4m+1)th and (4m+2)th word lines. A pair MCP of memory cells is arranged at the intersection of a (4n+2)th bit line and (4m+2)th and (4m+3)th word lines. A pair MCP of memory cells is arranged at the intersection of a (4n+3)th bit line and (4m+3)th and (4m+4)th word lines. A pair MCP of memory cells is arranged at the intersection of a (4n+4)th bit line and (4m+4)th and (4m+5)th word lines.
Each odd-numbered pair of bit lines BL and /BL configured of (4n+1)th and (4n+3)th bit lines is connected to sense amplifier+input/output control circuit 15 in sense amplifier band SA1. Each even-numbered pair of bit lines BL and /BL configured of (4n+2)th and (4n+4)th bit lines is connected to sense amplifier+input/output control circuit 15 in sense amplifier band SA2.
The rest of the configuration and operation of the DRAM is the same as the DRAM shown in FIGS. 7-10 and thus a description thereof is not repeated.
Quarter-pitch cell arrangement is more advantageous than half-pitch cell arrangement in that laterally elongate capacitor 21 of memory cell MC can be rotated by 90.degree. and arranged as a longitudinally elongate capacitor, as shown in FIG. 12.
In order to ensure the reliability of such a DRAM, conventionally, dynamic burn-in testing has been generally conducted by dynamically operating each chip for a long period of time (normally, several tens of hours) under a temperature and voltage stress condition higher than the normal operating condition to accelerate generation of initial failures for screening any chips with the possibility of causing initial failures in the market and thus preventing the shipment of such chips to the market.
In conventional burn-in testing, one word line WL and one column select line CSL represented by thick solid lines are selected by row decoder 11 and column decoder 12 to select one memory cell MC indicated by a circle, as shown in FIG. 13. In this burn-in testing, while electric field stress is applied between a word line WL selected by row decoder 11 a nd a word line WL adjacent thereto, the acceleration effect is small, since word lines WLs are selected one by one.
Thus, a method has been proposed which enhances acceleration effect by selecting odd-numbered word lines WL1, WL3, . . . or even-numbered word lines WL2, WL4, . . . at one time. FIGS. 14 and 15 are block circuit diagrams showing main portions of a DRAM capable of implementing such a testing method.
Referring to FIGS. 14 and 15, row decoder 11 of the DRAM includes word drivers WD1, WD2, . . . provided for word lines WL1, WL2, . . . , respectively. Each of word drivers WD1, WD2, . . . is configured of an inverter which inverts, amplifies and provides internal signals V1, V2, . . . on word lines WL1, WL2, . . . , respectively.
More specifically, odd-numbered word drivers WD1, WD3 . . . each include a p-channel MOS transistor 61 and an n-channel MOS transistor 62. P-channel MOS transistor 61 is connected between a line for a power supply potential Vcc and a corresponding word line (e.g., WL1), and has its gate receiving a corresponding internal signal (e.g., V1). N-channel MOS transistor 62 is connected between a line for a power supply potential VA and a corresponding word line (WL1 in this example), and has its gate receiving a corresponding internal signal (V1 in this example).
Even-numbered word drivers WD2, WD4, . . . each include a p-channel MOS transistor 63 and an n-channel MOS transistor 64. P-channel MOS transistor 63 is connected between a line for power supply potential Vcc and a corresponding word line (e.g., WL2), and has its gate receiving a corresponding internal signal (e.g., B2). N-channel MOS transistor 64 is connected between a line for a power supply potential VB and a corresponding word line (WL2 in this example), and has its gate receiving a corresponding internal signal (V2 in this example).
Power supply potentials VA and VB are generated in a VA generation circuit 65 and a VB generation circuit 66, respectively. When a burn-in testing signal BIl attains an active high level, VA generation circuit 65 responsively outputs a high level (power supply potential Vcc). When burn-in testing signal B11 attains an inactive low level, VA generation circuit 65 responsively outputs a low level (a ground potential GND). When a burn-in testing signal BI2 attains an active high level, VB generation circuit 66 responsively outputs a high level. When burn-in testing signal BI2 attains an inactive low level, VB generation circuit 66 outputs a low level.
An operation of the DRAM shown in FIGS. 14 and 15 will briefly be described.
As shown in FIGS. 16A-16E, at standby, burn-in test signals BI1 and BI2 both attain an inactive low level and power supply potentials VA and VB both attain ground potential GND. Furthermore, internal signals V1, V2, . . . all attain a high level and word lines WL1, WL2, . . . all attain ground potential GND.
In burn-in testing, only burn-in testing signal BI1 of burn-in testing signals BI1 and BI2 attains an active high level, and only power supply potential VA of power supply potentials VA and VB attains a high level. Thus, odd-numbered word lines WL1, WL3, . . . attain a high level and even-numbered word lines WL2, WL4, . . . attain a low level, and thus electric field stress is simultaneously applied between word lines and those adjacent thereto.
Then, only burn-in testing signal BI2 of burn-in testing signals BI1 and BI2 attains an active high level and only power supply potential VB of power supply potentials VA and VB attains a high level. Thus, even-numbered word lines WL2, WL4, . . . attain a high level and odd-numbered word lines WL1, WL3, . . . attain a low level, and thus electric field stress in the inverted direction is simultaneously applied between word lines and those adjacent thereto.
The acceleration effect of conventional burn-in testing is, however, not satisfactory.

Semiconductor memory device having test mode


A deformable mirror control device is provided with improved response characteristic by devising the mode of control even if the deformable mirror has a large time constant in comparison with the response speed required in applications such as the retinal camera. The deformable mirror device comprises a deformable mirror 10 having a reflective surface deformed with an applied voltage, and a voltage control circuit 20 for controlling the voltage applied to the deformable mirror 10. Here, the voltage control circuit 20 produces a steady-state voltage at which the reflective surface of the deformable mirror 10 takes an intended shape in a steady state, and produces a transient voltage that causes the reflective surface of the deformable mirror 10 to deform toward the intended shape, and also produces a transient voltage that causes the shape of the reflective surface of the deformable mirror 10 to shift quickly toward the intended shape.

1. Technical Field
The present invention relates to a deformable mirror device appropriate for use in retinal cameras, heads-up displays, astronomical telescopes, laser irradiation devices and so on. The present invention also relates to a device for observing the retina of an eye that casts light beam from a photographing light source to an eye to be examined and records the image of the light beam reflected from the retina of the eye as a retinal image, for diagnosing the retina of the eye.
2. Related Art
The device such as a camera for observing the retina of an eye is used by ophthalmologists and ophthalmic opticians to photograph the image of the retina of an eye for inspecting the state of the retina, hemorrhage on the retina of the eye, and so on. Incidentally, the human eyes optical system is composed of the cornea, the lens, the vitreous body and others with, unlike an ideal optical system used as a basis of the geometrical optics, some deformation. In particular in the clinical field of ophthalmology, the image of the retina of the eye is required to be clear and of little aberration because the extent of difference of the examined eye from a normal eye is used as diagnosis information. However, because the optical system for the human eyes constituting the photographing device is not ideal, in some cases sufficient resolution cannot be achieved. Therefore, to compensate for the deformation of the wavefront of the optical system for the human eyes, the deformable mirrors using the piezoelectric effect have been in use.
However, the conventional deformable mirrors using the piezoelectric element require a high voltage applied to the piezoelectric element and needs to use, as an electronic control circuit, a piezoelectric element with a high dielectric strength that is expensive. Therefore, commercially available retinal cameras employ deformable mirrors using electrostatic attraction that can be actuated with a lower voltage in comparison with the piezoelectric type.
However, the electrostatic type of deformable mirrors is low in natural frequency (for example, about 10 Hz) and the response speed is about 100 milliseconds in time constant. Thus, the electrostatic type of deformable mirrors, because of its slow response in deformation, has had a problem of difficulty in performing real time processing to the extent required in the ophthalmic examination (for example, a response speed of about 30 milliseconds in time constant).
Another problem with the deformable mirrors is that its shape is determined with the limitation of the specifications of the instruments to which it is incorporated, and its thickness, size, and material cannot be changed freely. Another problem with the deformable mirrors is that its dynamic range for the deformation amount is determined with the specifications of the instruments to which it is incorporated, and the distance between electrodes of the electrostatic type of deformable mirrors is also determined accordingly. Therefore, the response characteristic of the electrostatic type of deformable mirrors to the applied voltage is inevitably determined. Thus, it is still another problem that no measures can be taken in the structural design to shorten the response time of the deformable mirrors, such measures as employing hard materials for the deformable mirrors, increasing the thickness of deformable member, and reducing the size of the deformable member.
The present invention is to solve the above problems. An object of the present invention is to provide a deformable mirror device with which response characteristic is improved by devising the mode of control even if the time constant of the deformable mirror is large in comparison with the response speed required in applications such as images of the retina of an eye. Another object of the present invention is to provide a device for observing the retina of an eye with which a real time processing can be performed to the extent required in ophthalmic examinations.

Deformable mirror control device and device for observing retina of eye


A seed meter for planting seeds includes a seed plate rotatably mounted within a housing. A rotary seed chamber (RSC) is mounted in the housing adjacent the seed plate and movable between first and second positions, to permit the seed plate to singularly select individual seeds from the RSC while in a first position, and to dump seed therefrom as well as blocking seeds from entering the seed plate while in a second position. A seed intake compartment having an inlet end, and a discharge end is located adjacent the RSC. A valve is located in the intake compartment to intermittently prevent seed from flowing from the inlet end to the discharge end. A power means actuates both the RSC and the valve. A wing plate on the rotary seed chamber opens and closes the discharge end as the rotary seed chamber is in its first and second positions, respectively.

Planters for seed research plots are used to select from different groups of seeds for planting in a short segment of a row, and thence stop the planting in the first segment and to select sequentially seed from another group until a plurality of segments of a row (or more) are planted with seeds from different groups. The seeds from each group represent different types and characteristics of corn seed, for example.
One of the most significant shortcomings of existing planters is that they require a plurality of control systems to accommodate the various functional requirements such as stopping and starting the flow of seed, the coordination of seed inlets and outlets, the contamination of seed groups and the elimination of extra seed. Such existing planters are very expensive to manufacture, maintain, and service.
It is therefore a principal object of this invention to provide a method and means for planting seeds in a seed research plot.
A further object of this invention is to provide a method and apparatus for planting seed in a seed research plot which can control the various phases of seed handling with a single control system.
A still further object of this invention is to provide a method and apparatus for planting seed in a seed research plot which is inexpensive to manufacture, and economical to maintain and service.
These and other objects will be apparent to those skilled in the art.

Method and apparatus for planting seed in a seed research plot


A ternary card assembly is provided that includes a detachable smart card, a detachable information tab, and a disposable carrier card, which are connected by breakaway links. The smart card and the information tab may be connected to one another directly or indirectly through an intermediate element. The information tab may include one or more panels that are elastically displaceable from the plane of the information tab to render the information tab useful in different ways. A payload set is also provided, which includes a smart card and an information tab, which is detachably connected to only a part of the smart card's perimeter. Also provided are methods of preparing a smart card for use and for customizing a smart card.

A smart card is a relatively small, typically pocket-sized, plastic card with an embedded integrated circuit (IC). The IC typically includes a digital storage array (memory) and a processor.
A smart card is typically used for storing data securely. In the context of mobile phone technology, secured data uniquely identifies a mobile phone subscriber to an associated Mobile Network Operator (MNO). The data stored in a smart card also defines the types of services to which a subscriber is entitled. A special kind of smart card, known as a Subscriber Identity Module (SIM) card, is a used with a cellular phone technology known as the Global System for Mobile Communications (GSM).
ISO-7810 is an international standard relating to smart cards, and the standard is managed jointly by the International Organization for Standardization (ISO) and the International Electrotechnical Commission (IEC). According to ISO-7810, smart cards may be 85.6 millimeter (mm) long and 53.98 mm wide. A smart card with the aforementioned dimensions is said to comply with the ID-1 format. Such smart card is referred to herein as an "ID-1 card." Due to their compact size, ID-1 cards can be conveniently handled during manufacturing, transferred (such as to intended end-users), and stored.
A common trend in electronics is to minimize size, and accordingly a smart card smaller than the ID-1 card has been defined. This miniature card is said to "comply with ID-000 format," which was devised as a form factor for a SIM card.
Due to the size being smaller than a card complying with the ID-1 format, SIM cards are not handled as conveniently as ID-1 cards. For example, a SIM card is more prone to becoming lost or damaged. Therefore, for handling and shipping, SIM cards are usually embedded in, integrated with, supported on, or carried by ID-1 cards (carrier cards) and detached there from at a later stage, such as when a phone subscriber wants to insert a SIM card into a mobile phone.
SIM cards are normally protected by secret information, which may be embedded as a PIN code and a PUK key. Such codes and keys are examples of information that is customized to the SIM card. Such information is herein collectively referred to as "information pertaining to the operation of the SIM card," or more generally "information pertaining to the operation of the smart card", or even just "information" for brevity. The information may include other kinds of data, such as barcode data. Sometimes, the information is printed on a piece of paper accompanying the SIM card or mounted onto the associated ID-1 carrier card. Printing the information on a piece of paper or on the SIM card's shipment envelope increases the probability of shipping SIM cards with incorrect information, due to the possibility of mismatch of the paper or envelope with the SIM card.
From a manufacturing point of view, it is relatively convenient to add by printing, engraving, and so on the information onto the surface of the ID-1 carrier card, because this step can be performed as part of the personalization or customization process of the SIM card. The part of the ID-1 card with the confidential information may be concealed with a layer of a scratch-removable material. For environmental preservation reasons, it is desirable to recycle ID-1 carrier cards after the SIM card is removed. However, ID-1 carrier cards with information thereon are usually retained by their users with their SIM cards, so they are generally not recycled.
FIG. 1 illustrates an ID-000 card 6, which is an exemplary payload, carried by an ID-1 card 2. ID-1 card 2 is thus regarded as a "carrier" card. A traditional card assembly of an ID-1 carrier card, such as ID-1 carrier card 2, and an ID-000 card, such as ID-000 card 6, may be regarded as a "2-part" card assembly. ID-000 card 6 contains an embedded integrated circuit (not shown), the external electrical contacts of which are shown at 9. Embedding an IC within ID-000 card 6 makes ID-000 card 6 a smart card, for which reason ID-000 card 6 is also referred to herein as "smart card 6."
ID-000 card 6 is shown carried by, and detachably connected to, carrier card 2 by breakaway link (or breaking line) 4, which is typically a groove, perforation, slot line, or the like. Breakaway link 4 is shown interrupted by breaking points (or breaking bridges) 8. Detaching, or separating, smart card 6 from ID-1 card 2 may be effected, for example, by first breaking points 8 and then by pulling smart card 6 from ID-1 card 2.
A breakaway link generally is a mechanically weakened line separating two elements. The breaking line may be weakened, for example by reducing its thickness to the extent that one can relatively easily separate one element from the other. In FIG. 1, breakaway link 4 (the perimeter of smart card 6) is shown between smart card 6 and carrier ID-1 card 2.
As discussed above, information pertaining to the operation of the smart card is sometimes added to the surface of the ID-1 carrier card. In FIG. 1, exemplary information "abc-1234" shown generally at 10 is displayed (exposed) on ID-1 carrier card 2 (Information 10 may have initially been covered with scratch-removable material). After detaching smart card 6 from ID-1 carrier card 2, the user still wants a record of the information, so ID-1 carrier card 2 (with information 10 thereon) is typically retained by the smart card user. Thus, at least some of the ID-1 carrier cards do not get recycled.
Therefore, it would be beneficial to have a way of adding information associated with a smart card onto its carrier card while allowing that information to be easily detached from the carrier card. The carrier card could then be recycled after the smart card and the associated information are detached there from. The present disclosure presents such a way to provide information that is more conducive to recycling waste materials. The disclosure uses the terms "PIN," "PUK," "carrier card," "payload," "information tab," and "payload set," which are understood in the present disclosure as follows:
A "PIN (Personal Identification Number) code" is a secret numeric password shared between a user and a system (usually a telecommunication system). The PIN code can be used to authenticate the user to the system.
A "PUK (PIN UnlocK) key" is a recovery code required to unlock a GSM SIM card that has been disabled or has locked itself after an incorrect PIN code was entered several consecutive times.
A "payload" is a component that may be carried by a larger object, such as a carrier card that may comply with the ID-1 format. Typically, the payload is a card smaller than the carrier card. A card that complies with the ID-000 format may be a payload.
A "carrier card" references a card that carried, carries, or is intended to carry, a payload. The carrier card essentially increases the payload's form factor. In the context of the present invention, a carrier card also carries an information tab.
An "information tab" is a descriptive element or object, which accompanies or is associated with another object. The information tab carries information, for example a PIN code and a PUK code, associated with the functionality or operation of the other object. The other object may be a SIM card or other smart card.
A "payload set" is a combination or set that includes a payload and an associated information tab.


The present invention relates to tetrahydropyranyl lower akyl esters and specifically to tetrahydropyranyl acetates, a method for preparation thereof using ketene and use thereof as fragrances and aroma substances.

To prepare consumer goods and consumables having certain organoleptic properties, that is products having advantageous odor (olfactory) or flavor (gustatory) properties, a large number of aroma chemicals (fragrances and flavorings) are available for the exceptionally diverse fields of application of these substances. In this regard, there is a constant demand for novel substances and aroma chemicals and for novel improved preparation methods which enable the provision of individual aroma chemicals with, for example, higher efficiency or in higher purity.
It is known that esters of higher alcohols may be prepared by reacting these with carbonyl halides or with carboxylic anhydrides. In this way, aroma chemicals having valuable properties can be attained such that this synthetic route has its ongoing justification. A disadvantage of the reaction with carbonyl halides, however, is that hydrohalic acids are formed in the reaction thereof, which generally lead to problems of corrosion, and elimination of water in the case of tertiary alcohols and thereby causing numerous polymerizations. The disadvantage in the reaction with carboxylic anhydrides is that equimolar amounts of the corresponding carboxylic acid are formed in the reaction mixture, which must be removed in the work-up and the reuse thereof can be technically complex. A synthetic route which avoids these disadvantages is therefore preferable.
It is further known that acetic acid esters may be prepared by reacting hydroxyl group-containing compounds with ketene. Various catalysts may be used for the reaction of hydroxyl group-containing compounds with ketene, e.g. Brønsted acids such as sulfuric acid, p-toluenesulfonic acid, phosphoric acid, potassium hydrogen sulfate or Lewis acids such as boron trifluoride or boron trifluoride etherate. However, various disadvantages have also been described for the catalyzed reaction of ketenes. For instance, acidic catalysts may cause corrosion in metal apparatuses or lead to the undesired formation of resin-like impurities. In addition, it can often be difficult to remove them again from the reaction mixture.
Methods and apparatuses for preparing ketene are described, for example, in Organic Syntheses, Coll. Vol. 1, p. 330 (1941) and Vol, 4, p. 39 (1925) and in der Chemiker Zeitung [The Chemists Journal] 97, No. 2, pages 67 to 73 (1979).
EP 0949239 A1 describes a method for preparing linalyl acetate by reacting linalool with ketene in the presence of a zinc salt as catalyst.
It is further known that diverse substituted tetrahydropyran compounds can be used as aroma chemicals. Thus, for example, 2,4,4-substituted tetrahydropyranyl esters of the general formula (X.1) are valuable aroma chemicals:

EP 0383446 A2 describes the synthesis and also the olfactory properties of numerous different 2,4,4-trisubstituted tetrahydropyranyl esters (X.1), where RI is methyl or ethyl and RII is a straight-chain or branched C2-C4-alkyl or C2-C4-alkenyl. For this purpose, 3-methylbut-3-en-1-ol is initially reacted with an aldehyde of the formula RII—CHO in the presence of an acidic catalyst, wherein a reaction mixture is obtained comprising at least one 2-substituted 4-hydroxy-4-methyltetrahydropyran of the general formula (X.2):

The intermediate (X.2) is then subjected to an acylation by reaction with a carboxylic anhydride under acidic conditions.
4-Hydroxytetrahydropyran compounds and especially 2-substituted 4-hydroxy-4-methyltetrahydropyrans are also valuable compounds for use as aroma chemicals, and diverse methods for their preparation are known to those skilled in the art, for example, from EP 1493737 A1, WO 2011/147919, WO 2010/133473, WO 2011/154330 and WO 2014/060345.
The unpublished WO 2016/139338 describes a method for preparing tetrahydropyranyl esters from the corresponding 4-hydroxytetrahydropyran compounds by reaction with a ketene compound.
It has been found, surprisingly, that certain novel tetrahydropyranyl lower alkyl esters, in particular tetrahydropyranyl acetate compounds show advantageous fragrance properties.
Surprisingly, it has also been found that these novel tetrahydropyranyl acetate compounds can be prepared in a simple manner by reacting the corresponding alcohol precursors with ketene affording very high yields and at the same time high purity. Thus, preferably, tetrahydropyranyl acetates having higher purity and therefore improved fragrance quality can be achieved than with known methods from the prior art. This is surprising in view of the high reactivity of the ketenes used.
It is known from the prior art that the preparation of fragrances also generally proceeds from starting materials which themselves can be used as fragrances. Surprisingly, the precursor of the tetrahydropyranyl lower alkyl esters (I′) or (I), i.e. the respective alcohol, is unsuitable as a fragrance.

Tetrahydropyranyl lower alkyl esters and the production of same using a ketene compound


An apparatus for assessing the brain state of a patient comprises at least one sensor to monitor at least one physiological variable, which provides at least one output signal. In addition, the apparatus for assessing the brain state of a patient comprises a computer processor for receiving the at least one output signal, wherein the computer processor filters the at least one output signal and applies pattern recognition techniques in evaluating the brain state of the subject. The computer processor comprises a first filtering module, which removes transient events not indicative of a brain state, and a second filtering sub-module, which groups together multiple modalities on the basis of classification techniques and incorporates additional information regarding mental states.

Generally, there are devices in the health care, scientific research and mental health fields related to general pattern recognition of brain signals and to the recognition of brain activity. For example, there are techniques and apparatuses that measure brain activity through invasive examination, such as deep computing techniques to organize and respond to data from implantable medical devices and invasive examination using implantable electrodes. There are also techniques and apparatuses that measure brain activity through non-invasive examination. For example, there are methods and apparatuses for examining brain function through detection of the size of a subject's pupil, as well as through detection of electrical signals via an electroencephalogram (EEG), an electomyogram (EMG) and/or through electro-oculograph (EOG) techniques. As another example, there are other methods and apparatuses for recording electromagnetic activity in the brain, selecting a target pattern of electromagnetic activity produced by the brain and analyzing the sample of electromagnetic activity of the brain to identify a portion which contains the target pattern. However, such apparatuses and techniques lack complex signal analysis necessary to extract data from multiple sources.
Accordingly, there is a need for an apparatus and for a method for monitoring one or more physiological variables associated with cognitive/affective brain states via multiple sensors, filtering the data to reduce the complexity of the data before applying the learning algorithms that correlate the data with examined brain state, and applying pattern recognition techniques and technology in recognizing a brain state of a subject.