An information encoding method in which a common multiplier A of the input signal samples x(i) in each frame is estimated. Each sample x(i) is divided by A, the quotient is rounded to the number of significant digits, and the rounded quotient y(i) is encoded. The y(i) is multiplied by A and the product is subtracted from x(i) to obtain an error signal z(i), which is encoded. The A is encoded and the codes of y(i), z(i), and A are combined together and outputted. To estimate A, each numeric value is divided by a determined representative value. Irreducible fractions between the maximum positive error and the maximum negative error are obtained by dividing each numeric value by a correct representative value using rational approximation. Among the obtained irreducible fractions, the one having the smallest common denominator of the numeric values is obtained, which is corrected using the representative value to obtain A.

There are compression encoding schemes that introduces some distortion of audio signal data (sample values) such as MP3, AAC, and TwinVQ. There are also compression encoding schemes of video information data (sample values), such as JPEG There are lossless coding schemes as well that do not introduce distortion (for example see Non-patent literature 1). Also important is lossless compression of floating-point-format data, which is readily editable (for example see Non-patent literature 2). Also known is the Euclidean algorithm, which determines the greatest common divisor, namely common multiplier, of multiple values.
In case of an audio signal, an audio signal captured by a microphone is sampled at a sampling frequency f and using a quantizing bit number q. Each sample value is converted to a digital value, and inputted as digital sample. The analog samples are often multiplied by a common constant to adjust the gain. If samples are multiplied by a constant in an analog domain before analog-digital conversion is performed, the samples in the analog signal domain can contain errors.
Similarly, in the case of compression encoding of a video information signal, when a two-dimensional video signal is raster-scanned to obtain one-dimensional sample sequences, each of the samples may be multiplied by a common constant to adjust the gain to obtain the original video signal.
Each sample s0(i) in an original sample sequence is multiplied by a common real number G as a gain to obtain a sample s1(i)=s0(i)×G.
The samples s1(i) obtained by multiplying the real number G are often represented in binary notation or IEEE 754 binary floating point format and the digital sample sequences are encoded. The floating point for at standardized as IEEE-754 uses 32 bits as shown in FIG. 1. The floating-point representation consists of a 1-bit sign, an 8-bit exponent, and 23-bit mantissa, starting from the most significant bit. Let S denote the sign, E denote a decimal value represented by the 8-bit exponent, and M denote a binary number of the mantissa Then the numeric value of the floating-point representation can be represented in sign and magnitude binary notation as Formula (1):(−1)S×1.M×2E−E0  (1) [Formula 1]
According to IEEE-754, E0=27−1=127. Therefore, E−E0 in Formula (1) can take any value in the range:−127≦E−E0≦128However, E−E0=127 is defined to be all 0s and E−E0=128 is defined to be all 1s. E−E0=n represents the number of digits (bits) of the integer part of the value expressed by Formula (1) minus 1, that is, the number of bits lower than the highest, "1".
Most of conventional compression encoding schemes such as the one described in Non-patent literature 1 have tried to minimize redundancy in an original input waveform (for example music signal waveform) of input sample sequences in order to reduce the amount of information. The amplitude (bit length) of an input waveform that can be encoded by an encoder is specified as 16 bits, for example. If the bit length is 24 bits, 16 higher-order bits are encoded and the lower 8 bits are outputted without being encoded or after being separately compression-coded.
Non-patent literature 1 Hans M. and Schafer R. W.: Lossless Compression of Digital Audio, IEEE Signal Processing Magazine, Vol. 18, No. 4, pp. 21-32 (2001).
Non-patent literature 2: Dai Yang and Takehiro Moriya: Lossless Compression for Audio Data in the IEEE Floating-Point Format, AES Convention Paper 59873 AES 115th Convention, New York, N.Y., USA, Oct. 10-13, 2003.

Information encoding method, decoding method, common multiplier estimating method, and apparatus, program, and recording medium using these methods

Nippon Telegraph and Telephone Corporation


A system and method for implementing a CDN based on SDN are provided. The method includes: a complete service logic function of the CDN is added on an application layer of the SDN, and an application unit sends a resource requirement request and service orchestration request to an orchestration unit when receiving a CDN application request; the orchestration unit performs service orchestration in combination with related information of the SDN, sends a reservation request to a control unit to obtain a required resource, and then determines content distribution and content delivery paths in combination with network load balancing and routing condition; an L2 and L3 forwarding table is created and transmitted to a data forwarding unit according to related forwarding policy of an SDN control plane; and the application unit executes a related operation according to a content distribution or media access request, and the data forwarding unit forwards data.

SDN is a novel network technology emerging in recent years, and main characteristics of the SDN are control and forwarding separation, network openness and programmability, and software and hardware separation. The SDN makes conventional communication network equipment liberated from exclusive hardware binding and develop towards a direction of a universal hardware-based platform plus customized software, and implement network function virtualization, network management simplification and network deployment automation through an open programming interface. Therefore, compared with conventional network function realization and engineering implementation, equipment cost, labor cost and deployment time are greatly reduced. According to architectural hierarchies, the SDN is substantially divided into three layers from top to bottom: an application layer, a control layer and a data layer.
At present, the industry is carrying out or has carried out a large amount of standardization work on the control layer and the data layer. However, for the application layer and an internal structure thereof, particularly on how to implement integration, management and control of an application as well as combination and aggregation with another existing applications and the like, fewer discussions are made, and a development speed is relatively lower. This will cause deficiency of capabilities of the SDN in terms of usability, openness, programmability, manageability, operability, compatibility and interoperability with the existing applications and the like, which is unfavorable for healthy development of the SDN industry. Particularly, the SDN has a congenital handicap in terms of how to rapidly establish SDN developer communities and attract a large number of SDN application developers to focus on the solving of hotspot application problems, and migrating main applications in existing networks to an SDN technology and the like.
Regardless of the Open Networking Foundation (ONF) standards organization or the Open Daylight (ODL) (SDN controller open-source organization), the application layer of an SDN currently defined is mainly located to provide a highly abstract function such as network application and network service orchestration and the like. The application layer of the SDN may perform network resource request and service orchestration according to an application request of a user. That is, the application layer of the SDN upwards provides Application Programming Interface (API) calling (arctic interface) for an external user in a Representational State Transfer (REST) manner and realizes a customized application function for an external client to realize a virtual network application function; and the application layer of the SDN downwards provides network API calling (northbound interface) for an SDN controller in the REST manner, and make a resource request to a control layer of the SDN to realize a virtual network service function.
From the point of the application layer of the SDN, current related technical research and discussion and standardization work mostly focus on an aspect of the northbound interface between the application layer of the SDN and a control layer of the SDN. While during a practical application of the SDN, service externally provided by the SDN is mainly implemented through an internal orchestration function of the application layer of the SDN and interfaces (i.e. arctic interfaces, also called as application interfaces) between the application layer of the SDN and its external upper-layer application. Function requirements related to the arctic interface and function requirements related to the orchestration have yet not been fully explored, and an upper-layer service related to the arctic interface and Layer 4-Layer 7 (L4-L7) services using a northbound interface are not discussed or still under early research and discussion (such as a service chain application). Particularly on how to construct existing network services based on the SDN, no discussions have been started. Therefore, those also obstruct the integration of other existing applications and SDN applications to a certain extent and further influence the development of the SDN application and the SDN itself.
Furthermore, for existing applications (such as CDN, Over The Top (OTT) and various video media services) in the industry, with respect to the problem of how to meet continuously increasing requirements of terminal clients on service quality and a requirement on continuous reduction of overall operation and maintenance cost by fully utilizing an SDN architecture and better using an efficient, high-performance and high-cost-performance virtual network function provided by a bottom-layer bearer network through an open network programming interface, discussions are yet in a very early initial stage and there also has yet not been a definite solution, which restricts the step of migrating existing services to the SDN.
Relative to the SDN, a CDN is a relatively mature technology, and is adopted to provide distribution and acceleration of a media content, such as a webpage and a video and so on, for the Internet or a telecommunication dedicated network. The main characteristic of the CDN is that the media content is cached in multiple stages and proximity service is provided for a user to provide relatively high experience quality for the user.
Functions of the CDN mainly include two parts, i.e. content distribution and content delivery (also called as media delivery), and basic functions include content distribution/delivery, scheduling/control, storage/caching, media service and the like. At present, related definitions and standard specifications about CDNs are made by international standards organizations, such as the International Telecommunication Union Telecommunication Standardization Sector (ITU-T), the European Telecommunication Standards Institute (ETSI), the 3rd Generation Partnership Project (3GPP) and the Internet Engineering Task Force (IETF) and the like, and industry standards organizations such as the China Communications Standards Association (CCSA) and the like, and the CDNs are adopted to bear services such as Internet Protocol Television (IPTV), Community Antenna Television (CATV), OTT Television (OTT TV) and mobile streaming media and the like. According to a current CDN solution, under a limitation of the fact that a bottom-layer bearer network is not open, a CDN serving as a service network must exist as a superimposed layer and dependent on a capability of the bottom-layer bearer network. In addition, a server, storage/cache server and media server required by the CDN solution all use exclusive hardware (such as a blade server/a server with an Advanced Telecom Computing Architecture (ATCA) and the like), and the dependence on hardware architecture is very high and there is no universality. Moreover, since a network performance requirement related to the CDN (such as network bandwidth, time delay and jitter) is relatively high, great complexity is brought to network capacity expansion and consequent management of address planning, equipment configuration, node deployment, service fulfillment, software upgrading and the like. For example, along with rapid development of a service such as IPTV, CATV, OTT and mobile streaming media, the CDN is gradually being decoupled from services to become a pipeline for transmitting a content aggregating and bearing multiple services, resulting in more and more CDN deployment nodes, larger and larger network scale, more and more complex management of CDN content routing, and more and more difficult management of multiple service providers/content providers (CPs/SPs), and service configuration.
For the above problems existing in the current CDN related technical solution, in consideration of a technical development trend of a CDN, it is urgent to discuss about the integration of the CDN and the SDN, and how to introduce an SDN technology into the CDN solution to effectively solve the problems, confronting by the CDN, of closure of a bearer network, exclusiveness of hardware, complexity in management and the like to further improve openness, cost performance and usability of the CDN and further reduce overall operation and maintenance cost of the CDN.

Software-defined network-based method and system for implementing content distribution network


A processing device for executing a machine learning neural network operation includes memory and a processor. The processor is configured to receive input data at a layer of the machine learning neural network operation, receive a plurality of sorted filters to be applied to the input data, apply the plurality of sorted filters to the input data to produce a plurality of different feature maps, compress the plurality of different feature maps according to a sparsity of the feature maps and store the plurality of different feature maps in the memory.

Machine learning (e.g., deep learning) is widely used in a variety of technologies (e.g., image classification) to make predictions or decisions to perform a particular task (e.g., whether an image includes a certain object). A convolutional neural network (CNN) is a class of deep learning algorithms widely used in machine learning applications. These networks typically include multiple layers. At each layer, a set of filters is applied to the output of previous layer, and the outputs of each layer are known as activations or feature maps. The first and last layers in a network are known as the input and output layers, respectively, and the layers in between the first and last layers are typically known as hidden layers.
Machine learning models in supervised learning are trained in order to make predictions or decisions to perform a particular task (e.g., whether an image includes a certain object). During training, a model is exposed to different data. At each layer, the model transforms the data and receives feedback regarding the accuracy of its operations. During an inference stage, the trained model is used to infer or predict outputs on testing samples (e.g., input tensors).

This patent is subject to a terminal disclaimer.

Feature reordering based on sparsity for improved memory compression transfers during machine learning jobs


Disclosed is an information processing apparatus. The information processing apparatus includes a first hard disk drive, a conversion circuit and a signal control circuit. The conversion circuit is connected with the first hard disk drive to determine whether a second hard disk drive corresponding to a slave exists when the first hard disk drive serves as a master, and the determine whether a first control signal has a first logic level in a first predetermined time.

1. Technical Field
The present invention relates to an information processing apparatus and a control method thereof. More particularly, the present invention relates to an information processing apparatus including a conversion circuit connected with a hard disk drive and a control method thereof.
2. Related Art
An interface of a hard disk drive used as an information processing apparatus, for example, has been changed from an ATA (advanced technology attachment) interface to a serial ATA interface as disclosed in JP-A-2008-15856. When a hard disk drive employing the serial ATA interface is used as an information processing apparatus employing the ATA interface, an ATA/serial ATA conversion circuit is provided between the ATA interface of the information processing apparatus and the serial ATA interface of the hard disk drive, so that the hard disk drive employing the serial ATA interface can be used.
In such a case, the ATA/serial ATA conversion circuit systematically determines if the hard disk drive connected with the ATA/serial ATA conversion circuit is only a master (device 0) of an ATA standard, or a slave (device 1) as well as the master (device 0) after the hard disk drive starts to operate. Further, the ATA/serial ATA conversion circuit automatically determines that self-diagnosis of the slave (device 1) has been completed based on a PDIAG signal received from the slave (device 1).
However, in a case in which an information processing apparatus, which does not allow the slave (device 1) to be connected with the master (device 0), when the ATA/serial ATA conversion circuit is used, the ATA/serial ATA conversion circuit waits for a control signal, which must be output from the slave (device 1), until a predetermined timeout period passes in order to perform the above functions, so a lot of time is required for starting the information processing apparatus. Thus, even if a user wants to use the information processing apparatus immediately, the user must wait until the information processing apparatus starts to operate.
Further, such a problem may occur in an interface conversion circuit, which performs conversion between interfaces having specifications different from each other, and an information processing apparatus including various conversion circuits, which are connected with a hard disk drive, as well as the ATA/serial ATA conversion circuit.

Apparatus with reduced latency for master and slave storage devices


This disclosure describes a sample drying system and method that provides a high rates of evaporation and sublimation that is commonly employed in compound processing procedures. The drying increases the sample-solute concentration and removes the solvent completely to produce the dried sample as a non-volatile solute precipitate. Re-circulating of drying gas is disclosed along with a solvent cold trap.

1. Field of the Invention
The present invention relates to the removal of solvents from a solution to produce non-volatile material or precipitates, and more particularly to provide high rates of evaporation and sublimation commonly applied in compound processing procedures to accelerate production of dry non-volatile materials.
2. Background Information
Compound processing to separate mixtures of chemical compounds into pure individual components usually includes a series of sequential dissolution process steps interspersed with drying steps. The drying step may only increase the concentration of a liquid or solid, but often complete drying of the non-volatile precipitates is needed before a re-dissolution is performed. To recover the dissolved non-volatile materials as dry powders or to increase the concentration of compounds, three approaches are used: a) vacuum centrifuges; b) freeze drying; and c) blow down concentrators. Multi-step compound processing is time consuming and expensive, and drying steps are in the critical path of any process because drying must be complete before the next step begins. Any reduction in drying time is advantageous.
Vacuum centrifuges combine a high performance vacuum pump to create very low pressure conditions inside the chamber of a centrifuge rotor to increase the rate at which solvent molecules can escape from the surface of a solution. The centrifugal force keeps solutions in their containers and prevents the violent boiling of the solution in the vacuum environment. A cold trap is usually configured to scavenge solvent molecules as they migrate from the higher concentration space inside the vacuum centrifuge to the low concentration space inside a solvent collection vessel in the cold trap. High performance vacuum systems are needed to speed drying, but such vacuum systems are expensive to buy and operate. However, these expensive, high performance systems working with water-containing solvent (which is the most commonly occurring solvent in biological samples) still only have the ability to remove water at about 0.5 mL/hr. It would be advantageous to increase the removal rate of water in such systems.
Freeze drying is a technique chosen typically when solute molecules are subject to degradation at temperatures above freezing or when in liquid solutions. This process requires that the solution be frozen initially. The container with the frozen solvent material is placed in the freeze drying apparatus. A hard vacuum is pulled on the surface of solid solution whereupon solvent molecules escape (sublime) from the solid solution. Since sublimation is endothermic it tends to maintain the solid frozen state of the solution. The now free solvent molecules migrate to and are collected in the lower concentration region of the cold trap solvent collection container. This approach retains the expensive vacuum system while adding, in some applications, expensive refrigeration equipment. If water is used as a solvent, the time to pre-freeze compound solutions adds to the time and effort to bring the compounds to dryness.
Blow-down concentrators create a continuous flow of a gas onto the surface of the liquid (or solid) solution. The gas flow promotes the escape of solvent molecules from the solution container so that they can be carried away in the flow of used gas out an exhaust port. The blow-down unit can be located inside a fume hood so that solvent vapors are not released to the workspace, or the exhaust port can be connected to a cold trap to capture the solvent molecules in a container. In every case, the exhaust outlet is directed to a fume hood. Blow-down concentrators are configured with specific gasses which are non-reactive to the solute compounds so that compound degradation does not occur. Nitrogen is commonly chosen to prevent degradation of potentially reactive compounds from oxygen in the air.
Blow down concentrators are not recommended for complete drying since the flow of drying gas will carry away the dry material. Using industry standard tube (test tube-like) tube containers, known blow down driers suggest a maximum of two (2) liters per minute of gas flow per solution tube container. Furthermore, it is suggested that the solution not be dried to a powder, but to a more concentrated liquid state, since this conservative gas flow rate may disturb a dry sample. The inability to dry completely a sample solution reduces the performance of blow down concentrators, and their consumption of gas (usually nitrogen) adds to the operating costs of blow down systems.

Apparatus and method for drying a solid or liquid sample


Presented herein are methodologies for implementing a system and apparatus to estimate a network disruption index and undertake a mitigation action accordingly. A method includes calculating a network disruption index based on at least a disruption score associated with a service request measure, an end-of-life measure, a security incident response measure and a return material authorization measure for respective hardware devices in a network, comparing the network disruption index to a predetermined threshold, and when the network disruption index is above the predetermined threshold, identifying one or more of the hardware devices in the network for a mitigation action and implementing the mitigation action.

Network performance is crucial to business operations, yet administrators must often rely on outdated indicators for network management that enable primarily reactive, rather than proactive or pre-emptive, actions.
Traditional key performance indicators such as availability, utilization, latency and jitter are measurable quantities coming directly from information collected from the network infrastructure. While these traditional indicators serve as valuable measures of network health and functionality, they are inherently limited by the information they incorporate.

System and method to estimate network disruption index


The invention is directed to a method for forming a metal-oxide semiconductor field effect transistor. The method comprises steps of providing a substrate having a gate structure formed thereon, wherein a plurality of isolation structures are located in the substrate adjacent to both sides of the gate structure and then forming a first spacer on the sidewall of the gate structure. A portion of the substrate between the first spacer and the isolation structures is removed to form a recession and a source/drain layer is deposited in the recession, wherein the top surface of the source/drain layer is higher than the top surfaces of the isolation structures. A second spacer is formed on the isolation structures and at the sidewall of the source/drain layer and a metal silicide layer is formed on the source/drain layer.

1. Field of Invention
The present invention relates to a metal-oxide semiconductor field effect transistor and a method for forming the same. More particularly, the present invention relates to a metal-oxide semiconductor field effect transistor having a strained layer and a method for forming the same.
2. Description of Related Art
Since the metal-oxide semiconductor field effect transistor possesses the superiority features such as, high reliability, low power consumption and low cost, it becomes the most important device in the integrated circuit. Typical metal-oxide semiconductor field effect transistor is formed on a silicon substrate and has a gate electrode, a source/drain region and a gate dielectric layer located between the gate electrode and the substrate. With the development of the electronic equipment such as telecommunication equipment, it is necessary to speed up the operation of the metal-oxide semiconductor field effect transistor. However, the application of the metal-oxide semiconductor field effect transistor is limited by the moving rate of the electrons and the holes within silicon.
Conventional, a metal-oxide semiconductor field effect transistor is provided to use germanium silicon epitaxy material to form the source/drain region so as to improve the moving rate of the electrons and the holes. Comparing to silicon, germanium possesses relatively smaller electron effective mass and hole effective mass so that the germanium silicon material can improve the electron migration probability and the hole migration probability. Moreover, since the lattice constant of germanium is larger than that of silicon, the germanium silicon epitaxy possesses a functionality as a strained layer. Therefore, the germanium silicon epitaxy further improves the efficiency of the metal-oxide semiconductor field effect transistor.
Nevertheless, it is easy for the metal-oxide semiconductor field effect transistor with the use of the germanium silicon epitaxy as the source/drain region to have structure defects. FIG. 1 is a cross-sectional view of a conventional metal-oxide semiconductor field effect transistor. As shown in FIG. 1, the metal-oxide semiconductor field effect transistor comprises a substrate 100, a gate electrode 102, a gate dielectric layer 104, a source/drain region 106 and a metal silicide layer 108. The metal silicide layer is the last part formed in the structure shown in FIG. 1. The method for forming the metal silicide layer 108 includes a self-aligned silicide process (salicide process). It is easy to generate spiking phenomenon at the border between the source/drain region 106 and the isolation structure 110 by using salicide process. Therefore, the metal silicide layer 108 is in contact with the substrate 100, which leads to junction leakage.

Metal-oxide semiconductor field effect transistor


The present invention relates to novel peptides derived from an EDAR (EDAR receptor) ligand which belongs to TNF (tumor necrosis factor)-α family and to uses of the same. The present peptides of EDA3 derived from EDA and EDphD1 derived from EDAR ligand possess identical or similar activities to naturally occurring EDA and have much higher stability and skin penetration potency than naturally occurring EDA. Therefore, the composition containing the present peptide not only shows excellent effects on improvement in hair loss and promotion of hair growth, but also has superior efficacies on treatment of an EDA signal transduction pathway-related disorder. In addition, the outstanding activity and stability of the present peptide described above may be greatly advantageous in application to pharmaceutical compositions, quasi-drugs and cosmetics.

Field of the Invention
The present invention relates to an EDAR (EDA receptor)-derived novel peptide and use thereof.
Description of the Related Art
Hair follicle is a peculiar skin organ of mammals, which is developed from the bottom of primitive epidermis into much internal skin layer. The plug of cells known as follicle or dermal papilla exists in the base of the hair follicle (Stenn and Paus, Physiol. Rev., 81: 449 (2002)), and papilla is essential in normal circulation of the hair follicle (Oliver, Embryol. Exp. Morph. 15: 331 (1966); Oliver, Embryol. Exp. Morph. 16: 231 (1967)) and in growth of the hair shaft. The hair shaft is a thread-shaped epithelial cells that are composed of keratin filaments and filament-aggregating proteins tightly attached thereto.
Human hair follows a growth cycle with three distinct phases: anagen, catagen, and telogen phases. The hair growth cycle is regulated by hormones or many growth factors. Severe stress or malnutrition may advance the catagen and telogen phases, leading to severe hair loss (alopecia) (Arck, American Journal of Pathology, 162 (3): 709-712 (2003)). In male pattern baldness, the hair follicles at the front and top of the scalp are sensitive to androgen, which causes the follicles to miniaturize, thereby resulting in hair loss. Briefly, excessive secretion of androgen activates 5-α reductase which causes testosterone to be converted to dihydrotestosterone (DHT). Subsequently, DHT reduces the number of thick dark terminal hairs by shortening a period of hair growth and by miniaturing hair follicles, leading to hair loss. It has been supposed that about 20% of hair loss women suffer from a few disorders called as "female pattern baldness" which the hair often becomes thinner at the top of the scalp. In addition, hair loss broadens with aging. For example, severe hair loss may be caused from different disorders such as cicatricial alopecia or scar conditions including burns or compression injury. Whatever is the cause, while woman power in the workforce has been enhanced and men have cared about their appearance, hair loss may have remarkable psychological, social and sexual impacts as well as loss of pride and self-respect. Although various medicaments have been used to treat hair loss, they are too expensive or give very different adverse effects among individuals. Additionally, it is necessary to take these drugs in a constant manner. In this connection, it is one of serious drawbacks that hair loss may be caused by stopping them. Meanwhile, another demerit is that their efficacies and side effects may be quitely different between individuals.
Therefore, the development of cheaper and more effective novel active ingredient is needed in this industrial field.
Raw materials utilized in cosmetic products have the advantage of being inexpensive, whereas do not give good results since they are composed of plant extract-derived components. It has been known up to now that two commercial drugs (minoxidil and finasteride) may delay only additional hair loss. However, no actual medicaments may have been useful to induce regeneration of new hair follicle in practice. Many scalp cosmetics for preventing hair loss have been commercially available in the market, for example including: (a) a product including a plant extract derived from sophora, hot pepper, Swertia herb, Morus alba, mulberry leaf, ginseng, licorice, peony, foxglove, fennel, Japanese cornel, garlic, and so forth; (b) a composition containing xanthines and growth hormones for not only improving cellular metabolism suppressed by excess dihydrotestosterone (DHT) but also facilitating hair growth through hair loss inhibition and hair regeneration induced by growth hormones; (c) a product containing minerals, vitamins and extracts of green tea, rosemary, mugwort or licorice, which supplies nutrients to the scalp and hair for preventing hair loss and promoting hair growth; and (d) a male pattern baldness product mixing the substances such as vitamin B, vitamin C, vitamin D, vitamin E, nicotinic acid, pantothenic acid, biotin, folic acid, etc. with plant extracts, which inhibits 5-α reductases to suppress production of DHT during androgen metabolism and to help hair metabolism by have been developed. However, they have hardly influence on the production of new hair. As another example, a research group of the Jikei University School of Medicine in Tokyo, Japan has developed the product using corosolic acid known to be effective in diabetes, which inhibits 5-α reductases and exhibits an excellent effect on hair growth.
Many factors are associated with each other in the growth and degeneration of hair. For hair production, the present researchers have studied utilizing the effectiveness for: (a) promoting proliferation of fibroblast which is most important for hair root production; and (b) promoting the expression of factors which is important for inducing hair follicle formation and differentiation of hair.
EDA (Ectodysplasin), which belongs to the tumor necrosis factor (TNF) family, is known to involve in the development of various ectodermal organs such as hair, tooth, and sweat glands. Defect of EDA is a cause of X-linked hypohidrotic ectodermal dysplasia. Among the isoforms of EDAs, EDA1 is the most important for ectodermal development and exerts its function by binding the specific receptor of EDAR. After EDA1's binding to EDAR, EDARADD (EDAR-associated death domain) and NEMO (NF-κB, Essential Modulator) are activated, and NF-κB translocates into nucleus with the degradation of IκB, the inhibitor of NF-κB. The translocated NF-κB enhances in nucleus the expression of genes capable of promoting the formation of hair follicles such as CTGF/CCN2 and Shh (Sonic hedgehog homolog).
Throughout this application, various patents and publications are referenced and citations are provided in parentheses. The disclosure of these patents and publications in their entities are hereby incorporated by references into this application in order to more fully describe this invention and the state of the art to which this invention pertains.

EDAR ligand derived peptides and use thereof


A finite field inverse circuit has a finite field data unit (1112) and an inverse control unit (1110). The inverse control unit includes (1110) a k.sub.l and k.sub.u decrementer pair (1108, 1122), a k.sub.l -k.sub.u difference unit (1106), an inverse control finite state machine (1102), and a one-bit memory (1104) coupled to the inverse control finite state machine (1102). The finite field data unit (1112) includes four m bit wide registers that are shift registers designated as B (1120), A (1118), M (1114), and C (1116), where B- is a first register, A- is a second register, M- is a irreducible polynomial register, and C- is a field element register. An the irreducible polynomial is loaded left justified in the M-register, a field element to be inverted is loaded left justified in the C-register, and a single "1" is loaded in an LSB bit of the B-register. The field element is then inverted in 2n+2 system clock cycles where n is a field size associated with the field element.

Elliptic Curve (EC) cryptography over a finite field require arithmetic operations of addition, multiplication, squaring and inversion. Additionally, subtraction operations are also required if the field is not of characteristic two. Modular arithmetic operations are also required, for example in computing signatures, however these operations are required less frequently than the finite field operations. EC cryptography as an example, requires the full complement of modular operations, addition, subtraction, multiplication and inversion.
Field sizes for cryptography tend to be relatively large, requiring fast, dedicated processors to perform the arithmetic operations in an acceptable time. Thus there have been numerous implementations of either fast modular arithmetic processor or dedicated processors for performing arithmetic operations in F.sub.2.sup.m.
Traditionally RSA was the encryption system of choice, however with the advent of superior and more secure EC cryptography the need for processors that perform modular exponentiation exclusively is becoming less imperative. Thus while users are in transition from RSA cryptography to EC cryptography there is a need for an arithmetic processor that supports both these operations, with little or no penalty in performance.


A phased-array RF pulse generator is disclosed which includes a video-pulse generator arranged to generate video pulses each having a leading edge. An array of nonlinear and dispersive transmission lines, are arranged to generate RF pulses from the video pulses. At least one sensor is arranged to detect the leading edge of the video pulses after they have passed along the transmission lines. A phase controller is arranged to set the velocity of the video pulses in each transmission line to put the detected leading edges, and hence the generated RF pulses, into a desired phase relationship.

In the prior art, circuits are described that use nonlinear and dispersive transmission lines to produce pulsed RF signals. (As used herein, the terms radio frequency (or RF) refers to microwave or longer electromagnetic waves.) An electrical pulse is injected into such a transmission line, and the nonlinear and dispersive characteristics of the line act to form a high-frequency signal as the pulse propagates along the transmission line. Several different types of nonlinear material and several types of dispersive characteristics are available to be employed to produce RF circuits with output frequencies in the 0.1 GHz to 100 GHz frequency range.
Specifically, it is known to use nonlinear, dispersive transmission lines to convert video pulses (electrical pulses having a broad top-hat shape, with a short rise time compared with their pulsewidth, i.e. a constant amplitude for almost all of their duration) into RF pulses. A typical form of nonlinear, dispersive transmission line for this application is a variant of a standard inductance/capacitance (LC) ladder transmission line, to which nonlinearity and dispersive characteristics have been added. For example, it is known to add non-linearity to such a transmission line by providing saturable magnetic material in the inductive elements of the ladder, and to provide increased dispersion by coupling an extra capacitor across pairs of LC unit components of the ladder. Typically, the nonlinear dispersive transmission lines are created by placing thin sheets of conductors and insulators on top of each other to provide the required transmission-line components. GB 2317752A (British Aerospace) describes an alternative structure, in which the capacitative elements are formed from conductive blocks. This arrangement reduces the effects of stray capacitances and stray inductances, and thereby increases the upper limit of the generated frequency and operating RF voltage of the transmission line.
In the prior art, techniques to change the frequency and timing of the RF output pulse are described, usually by application of an adjustable DC current, voltage signal or applied magnetic field to the transmission line. GB 2 368 213A (BAE Systems plc) describes a pulse generator using a nonlinear, dispersive transmission line in which the frequency of the generated signal can be tuned over a much wider range at high powers than was the case with previous pulse generators. A nonlinear and dispersive LC ladder transmission line, of the type described above, is tuned by applying a low-power electrical signal to the nonlinear inductance components, thereby modifying the extent of the nonlinearity of the inductance component, and hence the output frequency of the generated signal. Specifically, a low-power direct current is applied to the transmission line, which flows in the inductors and couples with the saturable magnetic material in each inductor. The initial dc current is used to set the saturable magnetic material at a certain point on its hysteresis loop; the dc current can then be adjusted to tune the generated signals.
It is also known to use nonlinear capacitors in the LC circuit elements of the transmission lines. The LC circuit elements can then be tuned by varying the initial charge voltage of the nonlinear capacitors.
An ability to control the frequency and the timing of the RF output pulse from nonlinear dispersive transmission line circuits allows arrays of these circuits to be operated in phase synchronism. In this way large, RF-transmitting arrays can be produced that provide control over the output frequency and relative phase of each element in the array. U.S. Pat. No. 7,342,534 (Seddon et al.) describes a phased-array RF pulse generator in which an array of such tunable, nonlinear, dispersive transmission lines are provided. Each transmission line of the array is individually tunable to provide its generated signal with a desired phase relative to the phases of the other transmission lines of the array, enabling effects such as beam shaping and beam steering to be achieved in the overall generated signal.
Whilst each of those prior-art documents describes nonlinear, dispersive transmission lines based on LC ladder transmission lines, nonlinear, dispersive transmission lines can be achieved in other ways. For example, WO 2007/141576A1 (BAE Systems plc) describes a nonlinear, dispersive transmission line that transfers video-pulse energy to RF frequencies using a transmission line modulator based on an impulse-excited gyromagnetic action.
In order to ensure the correct output frequency and timing relationships between several individual RF sources in an array, the frequency and relative phase of the generated RF is monitored and any required adjustments are made to the system to bring it to the correct relationships. The output signal from this type of transmission line circuit is usually a short duration RF pulse with duration of a few RF cycles up to about 100 RF cycles. The short duration of the RF signal makes it difficult to determine the phase and frequency of each RF source. Known prior-art techniques include measuring the frequency of the generated RF signals by passing the RF signal through a dispersive structure, such as a RF delay line, and measuring the pulse propagation time through the RF delay line. Knowledge of the dispersion characteristics of the RF delay line (in particular the propagation velocity as a function of frequency) allows the frequency of the signal to be calculated from measurement of the propagation delay. It is conventional practice to analyse the frequency and phase of short-duration pulsed RF signals using fast transient recording devices that are based on analog to digital convertors (ADCs). The analog RF signal is sampled and digitised, and the digitised signal can then be processed to give a wide range of signal characteristics such as frequency content and relative phase information. Individual ADC devices are currently limited to sampling rates of about 4 GS/s. In order to faithfully represent signals with frequencies of 1 GHz or higher, it is necessary to use interleaving techniques, repetitive pulse sampling and sophisticated digital data processing. Those techniques require relatively expensive systems that are suitable for monitoring only relatively small numbers of RF sources. However, large transmitter arrays require a significant number of measurement channels (much more than 10 elements), for which an ADC-based control system is both bulky and costly (typically several tens of thousands of pounds).
It would be advantageous to provide a phased-array RF pulse generator in which one or more of the aforementioned disadvantages is eliminated or at least reduced.


A method of manufacturing a semiconductor device includes: forming first conductive layer on semiconductor substrate; forming a magnetic film on the first conductive layer; forming second conductive layer on the magnetic film; forming a first mask layer on the second conductive layer; patterning the second conductive layer; patterning the magnetic film; forming a first insulating film on the first conductive layer to cover side surfaces of the patterned second conductive layer and the patterned magnetic film; forming a second mask layer on the first insulating film to cover the patterned second conductive layer, the patterned magnetic film, and the first insulating film; patterning the first insulating film; patterning the first conductive layer; forming a second insulating film on the semiconductor substrate to cover the patterned second conductive layer, the patterned magnetic film, and the patterned first conductive layer; and forming a third insulating film on the second insulating film.

1. Field
The embodiments discussed herein relate to a method of manufacturing a semiconductor device having magnetic elements.
2. Description of Related Art
In a magnetotunnel junction (MTJ) including two ferromagnetic layers having a thin insulating layer therebetween, the tunnel resistance varies depending on the relative directions of magnetization of the two ferromagnetic layers. A magneto-resistive random access memory (MRAM) may be a semiconductor device where magnetic elements (MTJ elements) having MTJs utilizing a tunnel magneto resistance (TMR) effect are arranged in a matrix form as a memory cell.
Related art is disclosed in, for example, Japanese Laid-open Patent Publication Nos. 2006-253303, 2009-43831, 2006-261592, 2009-16417, 2008-135619, and 2006-5152.

Method of manufacturing semiconductor device


A computer implemented method of producing macro-view conclusion data related to a seismic event. The method includes receiving at a processing center a set of data related to a parameter of a seismic event. The parameter is measured using a vibration sensor of a hard disk drive of a computer at a known, fixed location, wherein the vibration sensor produces the set of data. The method further includes processing the set of data at the processing center to produce the macro-view conclusion data. The macro-view conclusion data is then stored in a storage device.

1. Field of the Invention
The present invention relates generally to an improved data processing system and in particular to a method and apparatus for predicting earthquakes and tsunamis. Still more particularly the present invention relates to a computer implemented method, apparatus, and a computer usable program product for detecting parameters regarding earthquakes and tsunamis using a plurality of hard-disk drives.
2. Description of the Related Art
Detection, prediction, and modeling of earthquakes are increasingly important sciences in modern society, given the size and complexity of modern cities. The physics of earthquakes and earthquake detection is well understood. Actual detection is accomplished at a gross macroscopic level using seismographs distributed over very broad geographical areas. Because seismographs are expensive and relatively rare, the grain of information that seismographs detect is large. In other words, data regarding an earthquake is limited to a few particular geographical locations. For this reason, much information is not collected during an earthquake. Further, the information that is collected is often not correlated to the actual threat level to people and infrastructure. Thus, accessing much more highly detailed data regarding earthquakes is greatly desirable.

System and method for detection of earthquakes and tsunamis, and hierarchical analysis, threat classification, and interface to warning systems

International Business Machines Corporation


A working-system for a single path having a plurality of equipment set along the single path and a plurality of working-objects performing predetermined jobs on the plurality of the equipment while moving along the single path, including: a simulator estimating job completion times according to job orders by which the jobs are processed, and priority orders among the jobs, in response to there being an interference between the working-objects; and a job allocator allocating the jobs having an optimal job order and an optimal priority order to an optimal working-object to minimize the job completion times.

1. Field of the Invention
The present invention relates to a working-system for a single path and a control method thereof, and, more particularly, to a working-system for a single path and a control method thereof performing a job without limiting a working area.
2. Description of the Related Art
There are various possible forms of a work-system performing a job while moving along a single path. As an example, a process of conveying a load from equipment near the single path to other equipment is divided into a loading process carrying the load from the initial equipment onto a working unit, and an unloading process unloading the load from the working unit onto the subsequent equipment.
FIGS. 1A and 1B illustrate a conventional working-system performing a job on a single path.
As illustrated in FIGS. 1A and 1B, the working-system comprises equipment 110, conveying units 120, and a single path 130.
The equipment 110 may be a shelf or a working desk performing a specific function. The equipment 110 should be disposed on the single path with a predetermined interval between pieces of the equipment 110.
The conveying units 120, including a unit to transfer the load back and forth to the equipment 110, are configured to move forward and backward along the single path 130.
The working-system illustrated in FIG. 1A includes a pair of the conveying units 120, comprising a first conveying unit 121 and a second conveying unit 122, which are set to perform a job in a first working area and a second working area, respectively. Such a working-system becomes inefficient when a situation requires only the first conveying unit 121 to perform several jobs in the first working area, while the second conveying unit 122 remains idle.
A working-system illustrated in FIG. 1B includes a pair of the conveying units 120, comprising a third conveying unit 123 and a fourth conveying unit 124, which are set to perform a job in an area "A" and an area "B", respectively. However, the area "A" and the area "B" have a common area, or an area "C", where both the third conveying unit 123 and the fourth conveying unit 124 can perform the job.
FIG. 2 is a control block diagram illustrating the job allocation of the working-system illustrated in FIG. 1B.
Hereinbelow, operation of a conventional working-system for the single path will be described in reference to FIG. 1B and FIG. 2.
When the working-system is assigned with a new job at operation B1, it is determined whether the job should be processed in the common area at operation B2.
When it is determined that the job should be processed in the common area, at operation B3, working-times required for each of the conveying units 123 and 124 are calculated to find a job order which takes the least amount of time while avoiding a jam with another job in the common area. At operation B4, the job is allocated to the conveying units 120 taking the least amount of time based on the calculated working-times.
At operation B4, if the job is not to be processed in the common area, the job is allocated to the appropriate one of the conveying units 120 in an appropriate area.
If the new job is assigned in an exclusive area where only one of the conveying units 120 can perform the job, the job is allocated to the appropriate one of the conveying units 120. Meanwhile, if the job is assigned in the common area, where the plurality of the jobs can be processed at the same time, the job should be allocated to the one of the conveying units 120 which takes the least amount of time in conveying, with consideration of the job order, to avoid a jam in the common area.
The conventional working-system for the single path 130 may have a limitation in a layout when the area should be divided. It may not be able to process the job assigned to an exclusive area, or may have to process the job twice by splitting the area with a buffering area in the middle. The job allocation may be so inefficient that a conveying time has to be increased, due to an interference between the conveying units 120 not being considered enough to be processed efficiently. Also, there is a problem in that an expansion of the common area may be followed by an increase of the conveying time.

Working-system for single path and control method thereof


A graphics system for storing and editing graphic images represented by digital data, includes a frame memory for storing pixel data representing graphic images including first and second graphic objects. The pixel data is stored at addresses, each being associated with one or more graphic fragment forming the first and second graphic objects. First and second addresses are respectively associated with those of the graphic fragments forming the first and second graphic objects. A memory controller controls writing and reading the pixel data to and from the frame memory. A fragment editor is provided to receive the pixel data read from the first address and modify the associated fragment with the received pixel data so as to form modified pixel data. An address detector detects the first address responsive to a request to read the pixel data from the first address and the second address responsive to a subsequent request to read pixel data from the second address. The detector compares the detected first and second addresses to identify an overlap of the first and second graphic objects. If an overlap is identified, the controller controls the writing of the modified pixel data to the first address before the reading of the pixel data from the second address.

Graphics operations typically require a read, modify, write operation. For example, in source/destination blending, a translucent surface is rendered by reading the solid surface color from the frame buffer memory and then arithmetically blending with the translucent color. The blended result is then written back to the same location in the frame buffer. In plane masking, a bit mask is used such that only specified bits of a pixel are overwritten by new data; in general this requires reading the destination, merging new data and writing the result. In Z buffering, hidden surface removal is accomplished by reading the destination Z value and then arithmetically comparing the destination Z value to a source Z value to determine acceptability before conditionally writing back the source Z value to the frame buffer.
A read/write turn-around typically involves switching the frame buffer memory bus from reading data to writing data, and then to back to reading data. This results in a latency or delay between issuing a request to read data from a particular address to actually receiving the data from the frame memory. Similarly, once data is to be written back to the frame memory, the frame buffer memory bus must be switched from read to write and accordingly another latency or delay may be experienced as the bus is put in high impedance mode for one or more cycles. These delays can be significant.
To reduce the impact of these latencies, it has been proposed that a number of reads and writes be batched together to decrease the number of read/write turnarounds. The actual length of the batch of reads or writes is limited only by the system's physical hardware.
However, if multiple graphical objects are rendered, there may be a complete or partial overlap of one object with another object. For example, one object may be "in front of" another object when viewed. This may create a consistency problem for batching in that if a first object has yet to be written to the frame memory, then reads for a second overlapping object could use the old, i.e., unmodified data, from the frame buffer. This is an unacceptable error.
For example, in a system having a single pixel at each address, let us say that a single pixel is read during each read cycle and a single pixel is written during each write cycle. Let us assume that the first four pixels being read are associated with one object and the next four pixels being read are associated with another object and the fourth and seventh read pixels are at identical pixel addresses. If the pixel data read at the fourth address has been modified but is yet to be written back to the frame buffer, the pixel data read at the seventh address will be read from erroneous stale data in the frame buffer rather than the modified pixel data.
To solve this problem, graphic systems often prohibit batching reads for one object with reads for another object. Accordingly, all reads and writes for one object are processed before reading any pixel data for another object, to completely avoid the consistency problem. However in modern graphic systems, graphical applications are using smaller and smaller objects to reduce artifacts when rendering curved surfaces and the read/write turnaround penalty is getting proportionally larger with each new generation of memory. Thus, to require a complete writing of a first object before reads for a subsequent object can result in a significant system overhead and unacceptable delays.
Simple techniques have been proposed to detect overlaps in graphic images. One technique proposes comparing the minimal bounding rectangles of respective objects to detect an overlap. However, this technique tends to result in a high false-positive rate and is generally considered to be of little practical use. More sophisticated techniques have been proposed which require extensive computation to determine if respective objects are overlapping. Such techniques are computationally expensive and made even more so because the comparison is not simply of two successive objects, but rather of multiple successive objects.
It has also been proposed to use a cache for the frame buffer memory in combination with rather complex bookkeeping to track dependencies created by overlaps. By utilizing an out-of-order implementation, overlapping objects could be painted faster than non-overlapping objects, in many cases, by avoiding the writing and rereading for an overlapped object in the frame memory prior to reuse of the overlapped pixel data. Instead, the overlapped pixel data can be read directly from the cache and hence read in its current, e.g. modified, form. However, such cache memory requires extensive resources and expense.

Graphic system with read/write overlap detector


A circuit carrier adapted for a pin grid array (PGA) package is disclosed. The circuit carrier comprises a substrate, at least one pin pad, at least one solder mask layer, at least one solder layer, at least one pin and a fixing layer. The pin pad is disposed over the surface of the substrate. The solder mask layer is disposed over the surface of the substrate, and exposing at least a portion of the pin pad. The solder layer is disposed over the pin pad. One end of the pin connects to the pin pad through the solder layer. The fixing layer is disposed over the solder mask layer, and covering the solder layer and a portion of a side surface of the pin. When the solder layer melts due to a high process temperature, the fixing layer helps to fix the pin to the pin pad.

1. Field of the Invention
The present invention relates to a circuit carrier, and more particularly to a circuit carrier adapted for a pin grid array (PGA) package.
2. Description of the Related Art
Due to advance of technology, a variety of electronic products have been developed. These electronic products with multiple functions are more portable and available for users, and have small sizes. Circuit carriers have been widely used in circuit layout for these electronic products. The circuit carrier can be, for example, printed circuit boards (PCB) or IC substrates. The circuit carrier is composed of a plurality of patterned circuit layers and a plurality of dielectric layers that are alternatively stacked with each other. Each dielectric layer is disposed between two patterned circuit layers. These patterned circuit layers are connected to each other with plated through holes (PTH) or micro vias. Due to having high layout density, convenient package process and high electrical performance, the circuit carrier has been popularly applied to various electrical packages like ball grid array (BGA) package or PGA package.
FIG. 1 is a cross sectional view showing a conventional Flip Chip (FC)/PGA package. The package adopts a surface mounting technology (SMT) pinning technology. The FC/PGA package comprises a circuit carrier 100 and a chip 180. The circuit carrier 100 comprises a substrate 110, at least one pin pad 120, a solder mask layer 140, at least one pin 150 and at least one solder layer 160. The pin pad 120 is disposed over the surface 112 of the substrate 110. The solder layer 140 is disposed over the surface 112 of the substrate 110, having at least one solder mask opening 140a for exposing the pin pad 120. One end of the pin 150 connects to the pin pad 120 through the solder layer 160. The chip 180 connects to the surface 114 of the substrate 110 via the bumps 170. An underfill 190 is filled between the chip 180 and the substrate 110.
SMT has been used to connect two devices. The solder layer usually comprises Sn/Pb alloy because of its good soldering properties. By the concern of environmental pollution caused by Pb, some countries will forbid the use of Sn/Pb alloy and replace it by lead free solder in the near future. The reflow temperature for the lead free solder is higher than that for lead containing solder, such as Sn/Pb alloy. The change will impact reliabilities of electronic devices bonded with SMT.
Referring to FIG. 1, the bumps 170 comprise lead free solder and the pin 150 is fixed to the pin pad 120 with the solder layer 160, which is a lead free solder, too. In order to melt the bumps 170 or the pre-solders thereunder, the reflow temperature is about 260° C. When the reflow temperature is higher than the melting point of the solder layer 160, the solder layer 160 melts and the pin 150 cannot be fixed to the pin pad 120 due to the melting of the solder layer 160. Without the help of the solder layer 160, the shift or disposition of the pin 150 occurs. As a result, the yield of manufacturing the electrical package declines.

Circuit carrier and fabrication method thereof


An object of the present invention is to provide an exhaust gas purification system which exhibits high exhaust gas purification performance. The present invention provides an exhaust gas purification system including: a carrier containing aluminum oxide; an exhaust gas purification device including a catalyst provided on the carrier and containing gallium, and connected to an internal combustion engine; and a system connected to the exhaust gas purification device for increasing an oxygen concentration. The system for increasing an oxygen concentration provides an oxygen concentration higher than that of a post combusted gas of the internal combustion engine.

In recent years, a lean burn engine having an air-fuel ratio providing lean fuel has drawn attention. Here, the air-fuel ratio represents a ratio of air to fuel in a gas. A three-way catalyst conventionally used for purifying an exhaust gas of a theoretical air-fuel ratio (stoichiometric) engine makes it difficult to purify NOx in an exhaust gas of the lean burn engine. Therefore, an exhaust gas purification catalyst for lean burn engines has been examined.
As the exhaust gas purification catalyst for lean burn engines, a catalyst in which gallium is supported on a metal oxide carrier is known to have NOx purification performance even in an oxygen excess atmosphere.
PTL 1 states that the use of a catalyst containing gallium and a refractory oxide (alumina, titania, magnesia, zirconia, and the like) makes it possible to reduce and remove NOx in an oxidizing atmosphere.
In PTL 2, the use of a catalyst containing rhodium and aluminum and containing one or more of gallium and zirconium provides improved durability of the catalyst to SOx.
The lean burn engine has an air-fuel ratio providing lean fuel, that is, increases the proportion of air to increase an oxygen concentration, thereby improving fuel efficiency. This requires an exhaust gas purification catalyst capable of maintaining the NOx purification performance even if the oxygen concentration is increased.


A system for improving cybersecurity includes a server configured to define a group of users associated with corresponding user devices, send calibration vectors to user devices, receive actions performed calibration vectors by users, allocate users in the group to one of sub-groups based on received actions, send a set of simulated vectors to user devices associated with users allocated to a particular subgroup, receive actions performed on the simulated vectors by each of the users in the subgroups, define a threshold expertise level for the subgroups, receive, one or more threat vectors reported by one or more users allocated to the sub-groups having the expertise level above the threshold expertise level, update the set of simulated vectors based on the received threat vector, and use the updated set of simulated vectors as training vectors for the each of the users allocated to a particular subgroup to improve cybersecurity.

Corporations and other organizations are vulnerable to a variety of threats. In the era of information technology, organizations are primarily prone to cyber-attacks. The most common cyber-attacks and threats that compromise individual users, corporations and organizations are for example ransomware, phishing attacks, text lures, look-a-like domain, brand impersonation, social graph. Cyber-attacks can result in a direct loss of money, loss of confidential information which later can be monetized, loss of infrastructure availability, loss of data integrity, loss of customer confidence, loss of brand value, and other losses. Cyber-attacks may take a variety of forms including, but not limited to, employee theft, embezzlement, robbery, sabotage, infection with computer viruses, compromised credit card accounts, database invasions, and others. For example, phishing today has become one of the most challenging security concerns across all industries. Phishing typically involves a fraudulent attempt to obtain sensitive information such as usernames, passwords and credit card details by disguising as a trustworthy entity in an electronic communication and generally affects organizations of all sizes. Generally, it takes the advantage of the weakest link in security, the human element. Therefore, it is of utmost importance to provide training to individuals to reduce the chances of falling prey to an attack.
Conventionally, several computer-based training systems have been developed for training individuals to enhance awareness of the individual towards cyber-attack. However, there are several problems associated with the conventional training systems. One of the problems being that the conventional training systems follow a one-size-fit approach for designing training material for all individual. These modules may come in many different forms, including videos, presentations, simulations, training games and the like provided to each individual. The problem with such an approach is that it does not consider the fact that every individual requires specific or different level of training for different threats. The existing training systems do not have the potential to dynamically adapt according to the individual needs. Another problem with such an approach is that the training systems are not constantly updated with the ever evolving new threats.
Therefore, in light of the foregoing discussion, there exists a need to overcome the aforementioned limitations associated with the conventional training systems for improving cybersecurity in an organization.

System for improving cybersecurity and a method therefor


A holographic optical device having a light transmissive substrate with a first holographic optical element carried by the substrate, and a second holographic optical element also carried by the substrate but laterally offset from the first holographic optical element. The first holographic optical element diffracts waves from each data point in a display source into a collimated plane wave such that the plane wave is trapped inside the substrate by internal reflection, and the first holographic optical element also corrects field aberrations over the entire field of view by being recorded using at least one aspheric wavefront. The second holographic optical element diffracts the trapped plane waves out of the substrate.

The present invention relates to holographic optical devices, and particularly to devices which include a plurality of holographic optical elements (HOEs) carried by a common light-transmissive substrate. The invention is capable of being implemented in a large number of applications. Described below, for purposes of example, are the following implementations: division multiplexing/ demultiplexing systems; compact holographic displays; compact holographic beam expanders and compressors; and holographic visor or head-up displays.
Recently, there have been significant advances in optical fibers technology for telecommunication systems. One of the proposed methods to exploit more efficiently the high potential bandwidth of optical fibers is by wavelength division multiplexing (WDM). With this technique, a large number of communication channels can be transmitted simultaneously over a single fiber. During the last decade, various systems for implementing WDM have been proposed, including systems based on birefringent materials, surface relief gratings, Mach-Zender interferometry, and waveguides. Unfortunately, these proposed systems generally suffer from low efficiencies or from a strict limitation on the number of channels.
Another proposed approach is to use a thick reflection hologram as described in N.Moslehi, P.Harvey, J.Ng and T.Jannson, Opt. Lett. 14,(1989) 1088. However, the necessity to use a conventional aspheric lens for collimating and/or focusing the light waves makes the system bulky and space consuming. Furthermore, a single holographic element is very sensitive to the signal's wavelength which usually depends strongly on temperature. One application of the present invention described below enables wavelength division multiplexers/demultiplexers to be constructed having advantages in the above respects.
The invention also enables improved holographic displays to be constructed. Since its inception three decades ago, there has been significant progress in the area of display holography. Indeed, it has become so popular as to play an important role in advertising, packaging and even in art. Yet, the current form of display holograms has some severe drawbacks. The necessity to use a readout light source that must be located at some distance from the hologram, in order to illuminate its whole surface, makes the holographic display systems bulky, space consuming, and sometimes inconvenient to use. Another drawback is that the transmitted part of the readout wave, which is not diffracted by the holograms, usually bothers the observer.
Recently, there have been several proposals, based on edge-illuminated holograms for constructing compact displays that overcome the above drawbacks. The salient feature of these proposals is to reconstruct the holograms with a readout wave which enters the hologram substrate through a polished edge so as to reach the emulsion at a large angle of incidence. Unfortunately, the necessity to enter the readout wave through the hologram's edge introduces some problems, such as the need for a special cover plate (thick, with polished edges), and the requirement of very accurate alignment of the readout wave. Also, the edge-illuminated holograms are very sensitive to the readout wavelength, so the hologram must be reconstructed with purely monochromatic light.
Another important application of the present invention is in providing a compact holographic display which has advantages in the above respects.
A further application of the invention is to provide a compact beam expander or compressor. Beam expanders for magnifying a narrow collimated beam into a beam of larger diameter are typically comprised of a telescopic assembly of two lenses along a common axis and having a common focal point. When used with polychromatic light, e.g., while light, refractive lenses are generally needed. However, with monochromatic light, such as from lasers or other monochromatic sources, it may be advantageous to exploit holographic lenses. The present invention provides a beam expander or compressor which can be used with both monochromatic light as well as polychromatic light.
Another important application for holographic optical elements (HOEs) is in visor displays. There a HOE serves as an imaging lens and a combiner, where a two-dimensional quasi-monochromatic display is imaged to infinity and reflected into an observer's eye. The display can be derived either directly from a CRT or indirectly by means of a relay lens or an optical fiber bundle. Typically, the display is comprised of an array of points whose geometry at readout differs from that at recording. As a result, the imaged array contains aberrations that decrease the image quality. In addition, it is often necessary to record the HOEs at a wavelength that differs from the readout wavelength. This is particularly true when the read-out wavelength is not suitable for recording the HOES. Such a wavelength shift introduces additional aberrations.
Another problem, which is usually common to all types of diffractive optical elements, is their relatively high chromatic dispersion. This is a major drawback in applications where the light source is a CRT which is not purely monochromatic.
Recently several new designs were proposed for improving the performance of holographic lenses. These designs, which only deal with single HOEs, compensate for the geometric and chromatic aberrations by using nonspherical waves rather than simple spherical waves for recording. However, they do not overcome the chromatic dispersion problem.
The present invention may also be used for designing and recording HOEs for visor displays in which both the aberrations and chromatic dispersions are minimized. It is particularly advantageous because it is very compact and can be readily incorporated even into optical systems that have specialized configurations.


A display and a touch panel can replace operation of a remote control. Conversion/management analyzes BML description for realizing the software remote control function corresponding to operation of a special key of the remote control on display with a BML browser and makes function assignment of the touch panel. When event elements are crowded, the proximity of the specified position is once enlarged for preventing erroneous operation from occurring.

1. Field of the Invention
This invention relates to an in-vehicle digital broadcast reception apparatus for receiving a satellite digital broadcast and a ground digital broadcast.
2. Description of the Related Art
Hitherto, BS (Broadcasting Satellite) digital broadcasts from broadcasting satellites, CS (Communication Satellite) digital broadcasts from communication satellites, and the like have been carried out as satellite digital broadcasts using artificial satellites in geostationary orbits. Start preparation for ground digital broadcasts for conducting digital broadcasts through antennas installed on the ground is also being advanced. Association of Radio Industries and Businesses (ARIB) advances standardization work for the digital broadcasts, and the technique of ISO (International Standards Organization) 13818 called MPEG2 of color moving picture compression techniques internationally defined by MPEG (Moving Picture Experts Group) is adopted. In MPEG2, coded video and audio are put into a packet and the packet is transmitted in the TS (Transport Stream) format of a fixed length suitable for transmission.
FIG. 10 shows a configuration of an MPEG-TS signal transmitted in a digital broadcast. In the MPEG-TS signal, contents of a plurality of services and programs containing video, audio, and data can be multiplexed for transmission. The data of each service or program is divided into a plurality of TS packets. Each TS packet has a fixed length of 188 bytes and contains a four-byte packet header. The packet header contains a packet identifier (PID) to make it possible to identify the TS packet. The TS packets having the same PID provide the data of the same service or program. As special information identified by the PID of the TS packet, PSI (Program Specific Information) and SI (Service Information) are also used to facilitate selection and viewing out of a large number of types of services and programs. Further, service, called EPG (Electronic Program Guide), for providing a function for enabling the user to peruse, search, and preselect a program scheduled for broadcast is also available. Information of SI is used for the EPG. The data broadcast with the MPEG-TS signal is described using a document description language called BML (Broadcast Markup Language). The EPG can also be provided using the BML.
FIG. 11 shows an outline of a data broadcast using the BML. The description with tags as shown as BLM DOCUMENT 1 is transmitted as the data in the MPEG-TS signal as shown in FIG. 10. It is assumed that the description of BLM DOCUMENT 1 defines relationships among objects as shown as OBJECT TREE 2, for example, and specifically defines superposing of MOVING PICTURE PLANE 3, STILL PICTURE PLANE 4, and TEXT/GRAPHICS PLANE 5 to generate display screens 6a and 6b. As a moving picture displayed on the MOVING PICTURE PLANE 3, an image transmitted as video in the MPEG-TS signal can be used. In the STILL PICTURE PLANE 4, a background image and a window formed by clipping a part of the background image are transmitted as data. In the TEXT/GRAPHICS PLANE 5, data for button display of ITINERARY 5a, CHARGE 5b, and RESERVE 5c is transmitted as event elements. Any of the event elements is to be selected by the viewer and in the initial state, focus display such that ITINERARY 5a at the top is selected is produced, for example. The display screen 6a is formed by superposing MOVING PICTURE PLANE 3, STILL PICTURE PLANE 4, and TEXT/GRAPHICS PLANE 5 in order with the focus display of ITINERARY 5a. The moving picture on MOVING PICTURE PLANE 3 is scaled down to a window 4a of STILL PICTURE PLANE 4.
On the display screen 6a, the user can change event element selection by operating a remote control 7. When the viewer presses a downward arrow key 7a of the remote control 7, an event 8 of remote control key down occurs. As response operation 9, the focus moves to CHARGE 5b below ITINERARY 5a on TEXT/GRAPHICS PLANE 5, and the whole display screen 6b is displayed. When the viewer presses a DETERMINE key 7b of the remote control 7, the operation corresponding to the focus-displayed event element at the time is performed. This operation is described in BLM DOCUMENT 1. For example, when ITINERARY 5a is selected, a tour itinerary is displayed; when CHARGE 5b is selected, the tour charge is displayed. The remote control 7 is also provided with numeric keys 7c for entering a numeric value, special keys called color buttons 7d of blue, red, green, and yellow, and the like.
The data broadcast realized using the BML as shown in FIG. 11 is intended to be received at a home television receiver and it is assumed that the remote control 7 is used to operate the data broadcast. On the other hand, a digital broadcast can also be received at a mobile unit and a data broadcast can also be provided; it is expected that the broadcast will be used effectively to convey traffic information, etc. However, to operate an in-vehicle receiver, preferably a touch panel rather than a remote control is used considering safety.
A touch panel is formed on the surface of a liquid crystal display, etc. (see JP-A-Hei. 9-44307) The touch panel is, for example, a transparent resistance film and as the resistance value is lowered because of a contact pressure, the touch position is detected. To guide the operator as to which part of the touch panel is to be touched, an operation image of buttons, etc., is displayed on the display. The display with the touch panel also produces image display on the surface of in-vehicle machine for the necessity of operation. As for a touch panel using a large plasma display panel (PDP), function expansion is also proposed. (see JP-A-2000-148347)
In a digital broadcast, data described in the BML is transmitted assuming that the user operates the remote control 7, as described above. However, with an in-vehicle machine having the remote control 7, an operation fitted for a data broadcast cannot be performed, and data cannot be used effectively.

In-vehicle digital broadcast reception apparatus


A combined GPS and GLONASS receiver receives GPS signals and GLONASS signals. A calibration signal is generated utilizing the received GPS signals and/or the received GLONASS signals to offset group delay errors in the received GLONASS signals. The generated calibration signal is filtered through Kalman filters to estimate group delay variations in the received GLONASS signals. The estimated group error delay variations are combined with the received GLONASS signals to calibrate the received GLONASS signals by offsetting the estimated group error delay variations. When GPS signals are not available for use, the combined GPS and GLONASS receiver obtains group delay errors stored or in the received GLONASS signals to estimate calibration coefficients. The estimate calibration coefficients are updated utilizing received GPS and/or GLONASS signals. The updated estimated calibration coefficients are stored before turning off the combined GPS and GLONASS receiver to expedite calibrating of GLONASS signals received upon turning on.

1. Field of the Invention
Certain embodiments of the invention relate to signal processing for navigation satellite systems (NSS). More specifically, certain embodiments of the invention relate to a method and system for calibrating group delay errors in a combined GPS and GLONASS receiver.
2. Background Art
The Global Positioning System (GPS) and the Global Orbiting Navigation Satellite System (GLONASS) are two Global Navigation Satellite Systems (GNSS). GNSS receivers may normally determine their position by receiving satellite broadcast signals from a plurality of satellites.
A fully operational GPS comprises up to 24 earth orbiting satellites approximately uniformly dispersed around six circular orbits with four satellites each. Each satellite carries a cesium or rubidium atomic clock to provide timing information for the signals transmitted by the satellites. Each GPS satellite transmits L-band carrier signals continuously in two frequency bands centered at 1575.42 MHz and 1227.6 MHz, denoted as L1 and L2 respectively. The GPS L1 signal is quadri-phase modulated by two pseudo-random noise (PRN) codes in phase quadrature, designated as a coarse/acquisition code ("C/A code") and a precision ranging code ("P-code"). The GPS L2 signal is BPSK modulated by only the P-code. The C/A code is a gold code that is specific to each satellite, and has a symbol rate of 1.023 MHz. The unique content of each GPS satellite's C/A code is used to identify the source of a received signal. The P-code, is a relatively long, fine-grained code having an associated clock or chip rate of 10 f0=10.23 MHz. The full P-code has a length of 259 days, with each satellite transmitting a unique portion of the full P-code. The portion of the P-code used for a given GPS satellite has, a length of precisely one week (7,000 days) before this code portion repeats. The GPS satellite signals comprise navigational information of the transmitting GPS satellite which may be exploited by a corresponding satellite receiver to determine its own navigation information such as the satellite receiver's position and velocity.
The GLONASS system uses 24 satellites, distributed approximately uniformly in three orbital planes of eight satellites each. The GLONASS system transmits L-band carrier signals continuously in two frequency bands, denoted as L1 and L2, respectively, centered at frequencies of f1=(1.602+9 k/16) GHz and f2=(1.246+7 k/16) GHz, where k (=1, 2, . . . 24) is the channel or satellite Lumber. Each GLONASS satellite transmits signals in frequencies that are specific to each satellite. The GLONASS L1 signal is modulated by a C/A-code with a chip rate=0.511 MHz and by a P-code with a chip rate=5.11 MHz). The GLONASS L2 signal is BPSK modulated by only the P-code. The P-code is the same, and the C/A-code is the same, for each GLONASS satellite. The GLONASS satellite signals comprise navigation information of the transmitting GLONASS satellite which may be exploited by a corresponding satellite receiver to determine its own navigation information such as the satellite receiver's position and velocity.
Both the GPS system and the GLONASS system use transmission of coded radio signals, with the structure described above, from a plurality of Earth-orbiting satellites. Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.

Method and system for calibrating group delay errors in a combined GPS and GLONASS receiver


A system and method allows a user to view communications exchanged between other participants within an online chat room without the user becoming a participant within the online chat room. The online chat room enables ongoing exchanges of electronic communications between two or more participants whose participation within the chat room are mutually revealed to each other. A user is enabled to perceive the existence of the online chat room without the user becoming a participant within the online chat room. Selection of the online chat room by the user is received. Responsive to user selection of the online chat room and without the user becoming a participant within the online chat room, at least some of the communications exchanged between the participants within the online chat room are made perceivable to the user as the communications are exchanged.

On-line chat systems provide a way for on-line users to engage in real-time conversations. Typically, these systems provide for real-time group textual messaging, with the conversational groups defined by "chat rooms." Chat systems are normally implemented in a distributed computing environment.
Such chat rooms are beneficial because they enable real-time communications on various topics by two or more participants of similar or divergent interests or backgrounds. To find chat rooms with conversations of interest, chat participants typically infer conversation content based on the chat room title. For instance, a chat participant seeking to converse regarding football might select a chat room titled "Football."

Systems and methods for previewing communications sessions


A regulated hybrid AC-DC rectifier employing a boost stage is disclosed herein. The regulated hybrid AC-DC rectifier comprises a 12 pulse inductive current splitter/merger (CSM) system coupled to a boost stage. The boost stage may be regulated using a PWM controller. The regulated hybrid AC-DC rectifier may further include a three phase input filter configured to regulate the harmonic content of the AC-DC hybrid converter within a desired limit. The regulated hybrid AC-DC rectifier may further comprise a notch filter system configured to tune out harmonic ripples at known intervals, such as 11th and 13th order harmonics.

Historically, in various applications, such as those used in vehicles, (e.g., aircraft), AC-DC conversion is used to provide power to various systems. Two types of rectifiers have been implemented, active rectifiers and passive rectifiers. Examples of active rectifiers include a two-level active rectifier, such as a two-level active rectifier configured to convert a three-phase voltage source into a single regulated DC voltage source with a controllable input power factor. Additionally, active rectifiers include three-level active rectifiers, such as a Vienna rectifier. A Vienna rectifier may be configured to convert a three-phase input voltage into a regulated dual DC-bus voltage source with a controllable input side power factor. Examples of passive rectifiers may include an auto-transformer rectifier unit and AC-Side inductive power transfer-based harmonic rectifier. In general, a passive rectifier is completely passive, meaning the output voltage depends on the component values, and the passive rectifier is not capable of being regulated.


A shield for a cable attachment system for attaching a cable to a component having a ball grid array (BGA). The shield may comprise an outer conductive surface, a first end configured to be coupled to a surface of the component, a second end that receives the cable, and an inner non-conductive material received within the shield adjacent the first end and encasing the connection of the cable to the BGA of the component. The cable may be configured to be coupled to the BGA of the component.

Micro sensing components such as endoscopes, guidewires, catheters, cameras, and the like require small form factors that inherently create installation and manufacturing concerns for discrete cable or coaxial cable termination. For example, devices such as endoscopes, guidewires, catheters, or cameras typically have a ball grid array to facilitate the signal transfers to or from the device and/or to provide power. However, because these types of devices have size constraints on the order of 3 millimeters or less, cable design and proper termination of the cable at the device can be problematic.
Common methods of terminating shielded or coaxial cables to ball grid arrays (BGA) utilize direct connection to the BGA. These types of connections may create a manufacturing concern since connecting such a small length of wire within the space constraints of the assembly requires precision slowing down the manufacturing process and potentially leading to excessive manufacturing inefficiencies or assembly quality problems.
Further, this type of connection increases the required termination region/distance and/or a corresponding outer diameter of the termination. This may lead to a situation where the outer diameter of the termination or the length of the termination region exceeds an allowed size constraint for a particular device type or application.

Methods and apparatus for RF shield and cable attachment system