A pistol with a magazine disconnect mechanism that disables the pistol's discharge capability when the magazine is removed. The pistol may generally include a frame that holds a magazine, a hammer pivotally mounted to the frame, and a sear engageable with the hammer. The sear is operable to hold the hammer in a cocked position and further to release the hammer from the cocked position to discharge the pistol. A locking member may be provided that is movable into and out of engagement with the sear in response to removing the magazine from and inserting the magazine into the pistol. The locking member engages the sear when the magazine is removed to prevent the sear from moving and releasing the hammer while held in the cocked position by the sear. A trigger interlock is also provided in which the trigger prevents the magazine from being removed when the trigger has been partially pulled by a user.

The present invention generally relates to firearms, and more particularly to a magazine disconnect mechanism for autoloading pistols that disable the pistol's discharge capability when the magazine removed.
In autoloading pistols utilizing removable cartridge magazines, a cartridge may still remain chambered after the magazine has been removed. Although the loaded chamber condition of a pistol's chamber is customarily and most positively checked by user opening the action and visually observing the presence of a cartridge therein, prior devices are known that attempt to augment this procedure by alternatively disabling the trigger assembly so that the pistol cannot be discharged when the magazine is removed. The trigger assembly typically includes a trigger, a trigger bar, a hammer which contacts a firing pin that strikes a chambered cartridge, and a sear which holds the hammer in a cocked ready-to-fire position. One approach used in a known magazine disconnect devices has been to arrest movement of the trigger linkage connected to the hammer. For example, when the magazine is removed in one known device disclosed in U.S. Pat. No. 6,240,669 to Spaniel et al., an open-topped slot in the trigger bar receives and engages a downwardly spring-loaded lug to block the trigger bar and trigger connected thereto from being moved in response to an attempted trigger pull. When the magazine is reinserted in the pistol, the lug is contacted and displaced upwards by the magazine to disengage the lug from the slot.
The foregoing trigger assembly disabling devices can be circumvented by the user in certain instances. For example, it may be possible to defeat the lug and trigger bar slot device by partially pulling the trigger before fully withdrawing the magazine. This would cause the trigger bar to move slightly forward, so that the lug would not be aligned with and seat in the trigger bar slot when the magazine is subsequently completely removed. The trigger could then be fully pulled and a cartridge if remaining in the chamber may be discharged. In addition, parts in these type devices such as the slot, lug, and often long and circuitous biasing springs are prone to wear and breakage which may render these magazine disconnects ineffective.
Accordingly, there is a further need for a magazine disconnect mechanism that overcomes the shortcomings of the prior devices and disables the pistol's discharge capability when the magazine is removed.


A feedback link between a receiver and a transmitter in a multiple antenna communication system is used to control the transmission rate and thereby improve system throughput performance.

The invention relates generally to wireless communication systems and, more particularly, to rate control in multiple antenna communication systems.
It has been shown that wireless communication systems with multiple antennas can provide significant performance improvements and achievable data rates over single antenna systems, in particular in fading environments. The time varying nature of the channel quality in wireless environments (referred to as "fading") causes random fluctuations in the received power level and, as a result, can lower the probability of reliable decoding. The attempted transmission rate may exceed the instantaneous channel capacity, a phenomena know as outage. Much effort has been directed recently to minimizing the outage probability through various adaptive transmission schemes.
The performance gains provided by multiple antennas systems can be considerably higher if knowledge of the channel state information is available. Unfortunately, in practical systems, it is often only possible to obtain an estimate of the channel state information at the receiver. Moreover, the receiver is usually limited to using a feedback link with a very limited capacity (e.g., a few bits of feedback per block of transmission) when providing the channel state information to the transmitter.

Throughput maximization using quantized rate control in multiple antenna communication


Methods for fabricating facetless semiconductor structures using commercially available chemical vapor deposition systems are disclosed herein. A key aspect of the invention includes selectively depositing an epitaxial layer of at least one semiconductor material on the semiconductor substrate while in situ doping the epitaxial layer to suppress facet formation. Suppression of faceting during selective epitaxial growth by in situ doping of the epitaxial layer at a predetermined level rather than by manipulating spacer composition and geometry alleviates the stringent requirements on the device design and increases tolerance to variability during the spacer fabrication.

In order to improve performance and packing density of modern microelectronic devices, it is often desirable to reduce channel lengths of metal-oxide-semiconductor-field-effect transistors ("MOSFETs") during device design. As the MOSFET channel length decreases, however, short channel effects and parasitic resistance become of increasing concern. To minimize short channel effects in bulk silicon devices, for example, the source/drain doping junction depths are decreased during scaling. But shallower junctions require the use of thinner silicides to minimize leakage current from the silicon/silicide interface to the junction depletion region, which, at the same time, may increase parasitic contact resistances. As another example, to improve performance of a silicon-on-insulator ("SOI") device by reducing short channel effects, its silicon region should preferably be less than about 20 nm thick. Conventional silicide formation processes, however, may consume substantially the entire silicon layer of such thickness, which may, in turn, result in undesirably large leakage currents and parasitic contact resistance because the silicide/silicon interface area is small.
The increasing operating speeds and computing power of microelectronic devices have recently given rise to the need for an increase in the complexity and functionality of the semiconductor substrates that are used as the starting substrate in these microelectronic devices. Such "virtual substrates" based on silicon and germanium provide a platform for new generations of VLSI devices that exhibit enhanced performance when compared to devices fabricated on bulk Si substrates. Specifically, new technological advances enable formation of heterostructures using silicon-germanium alloys (hereinafter referred to as "SiGe" or "Si1-xGex") to further increase performance of the semiconductor devices by changing the atomic structure of Si to increase electron mobility. These substrates are called strained Si substrates.
A strained Si substrate is generally formed by a first epitaxial growth of a relaxed SiGe layer on bulk Si, and then a second epitaxial growth of a thin (less than about 500 Å) Si layer on the relaxed SiGe layer. Because the lattice constant of relaxed SiGe heterostructure is different from Si, the thin Si layer becomes "strained," resulting in enhanced mobilities (and hence improved device speeds) over bulk Si. The percentage of Ge in SiGe, and the method of deposition can have a dramatic effect on the characteristics of the strained Si layer. U.S. Pat. No. 5,442,205, "Semiconductor Heterostructure Devices with Strained Semiconductor Layers," incorporated herein by reference, demonstrates one such method of producing a strained Si device structure.
A method of epitaxially growing a relaxed SiGe layer on bulk Si is discussed in international application WO 01/22482, "Method of Producing Relaxed Silicon Germanium Layers," incorporated herein by reference. The method includes providing a monocrystalline Si substrate, and then epitaxially growing a graded Si1-xGex layer with increasing Ge concentration at a gradient of less than 25% Ge per micron to a final composition in the range of 0.1<x<1, using a source gas of GexHyClz for the Ge component, on the Si substrate at a temperature in excess of 850° C., and then epitaxially growing a semiconductor material on the graded layer.
Another method of epitaxially growing a relaxed SiGe layer on bulk Si is discussed in a paper entitled, "Low Energy plasma enhanced chemical vapor deposition," by M. Kummer et. al. (Mat. Sci. & Eng. B89, 2002, pp. 288–95), incorporated herein by reference, in which a method of low-energy plasma-enhanced chemical vapor deposition (LEPECVD) is shown, which allows the formation of a SiGe layer on bulk Si at high growth rates (0.6 micron per minute) and low temperatures (500–750° C.).
To grow a high-quality, thin, epitaxial strained Si layer on a graded SiGe layer, the SiGe layer is, preferably, planarized to reduce the surface roughness in the final strained Si substrate. Current methods of chemical mechanical polishing (CMP) are typically used to improve the planarity of surfaces in semiconductor fabrication processes. U.S. Pat. No. 6,107,653, "Controlling Threading Dislocations in Ge on Si Using Graded GeSi Layers and Planarization," incorporated herein by reference, describes how planarization can be used to improve the quality of SiGe graded layers.
Although the resulting biaxial tensile or compressive strain alters the carrier mobilities in the layers of the "virtual substrate" enabling the fabrication of high-speed and/or low-power devices, short channel effects and parasitic resistance remain of concern for strained-Si-based devices as well.
Raised source/drain structures have been proposed as a technique for forming high-quality contacts to improve performance of bulk silicon, silicon-on-insulator (SOI), and strained silicon devices. Raised source/drains are generally fabricated by raising the level of the source and drain regions by selective semiconductor, e.g., silicon, deposition. The extra silicon increases the process margin for the silicide process and extends the latitude for contact junction design. To maintain a similar crystalline structure, the extra silicon is "grown" by silicon epitaxy.
For example, in bulk and strained Si devices, raised source/drain contacts have been proposed as a means of forming shallow dopant junctions to minimize contact resistances and short channel effects. In SOI devices, the raised source and drain regions provide sacrificial silicon useful for silicide consumption to form low resistance contacts on thin Si films.
Typically, source and drain regions are formed by selective epitaxial silicon growth after formation of a sidewall dielectric spacer of silicon dioxide (SiO2), silicon nitride (Si3N4), or a combination of both materials. In this process, silicon is epitaxially grown on exposed windows in a dielectric mask while nucleation of polysilicon on the masking material is suppressed during the incubation time by, for example, etching of spurious nuclei on the dielectric material by hydrogen chloride, the mediation of saturation by formation of a number of intermediate chlorine-containing silicon precursors, and passivation of surface defect sites which serve as heterogeneous nucleation centers. Also, selectivity is facilitated by growing for a period of time that is generally shorter than the incubation period needed for polysilicon nucleation on the dielectric mask.
The dielectric spacer electrically isolates a gate made of, for example, polysilicon, from the source and drain regions. After the selective epitaxial growth step, a heavy low-energy implant forms a doped region, and is followed by a silicidation process for, e.g., low resistance complementary metal-oxide-semiconductor (CMOS) contacts.
During selective epitaxial growth, however, decreased thickness of the epitaxial layer typically occurs at interfaces between the epitaxial layer and the dielectric spacer or field oxide, where facets form by growth of low-energy crystal planes that minimize the energetically less favorable epitaxial Si/dielectric material interface. Because the raised source/drain regions grow thinner near the dielectric spacer edge, faceting leads to non-planar device layers. This phenomenon raises processing concerns in bulk Si, SOI, and strained Si devices by complicating implementation of selective epitaxial growth in device applications. Specifically, thinner faceted regions cause localized deeper dopant penetration during ion implantation, which increases short channel effects and leakage currents. Also, thinner faceted regions typically result in deeper silicide penetration and greater Si consumption during silicidation. Thus, faceting may result in poor doping profile control and poor silicide depth control, leading to degraded device characteristics and more complex device designs.
For example, referring to FIG. 1, a cross-sectional transmission electron microscope (XTEM) image illustrates undoped Si layers 10 grown adjacent to reactive ion etched <110>-oriented SiO2 sidewalls 12. The SiGe layers 14 were included as markers to track facet development and evolution. The selective Si epitaxy has noticeable (311)-oriented facets 15 and (110)-oriented facets 17 next to SiO2 sidewalls. Such faceting would be detrimental during implant and silicidation of source and drain regions. Referring to FIG. 2, a silicided source region 20 is formed by selective epitaxial growth on a thin film SOI substrate 22 according to any method known in the art. Such faceted growth leads to deep penetration of a silicide 24 to a buried SiO2 layer 26. This penetration may dramatically increase the contact resistance because the silicide/silicon channel interfacial area is reduced, which leads to poor device characteristics. The electrical contact to the device channel is made through the area adjacent to the spacer 28, which is only the width of the Si channel. Furthermore, the contact quality may degrade because of incomplete silicide formation if the thickness of consumed Si is insufficient.
Similarly, in strained-Si-based devices, thinner faceted raised source and drain regions may cause the silicide to penetrate into a relaxed silicon-germanium (SiGe) layer underneath a strained Si layer. This may result in formation of a poor quality silicide because of the rejection of Ge during alloying of the SiGe layer with the silicide metal. This rejection may create high-resistivity regions that compromise the contact quality.
Facetless selective epitaxial growth is, therefore, desirable for fully realizing the performance advantages of the raised source/drain scheme for fabrication of low-resistance contacts and shallow junctions in advanced devices that have wide ranging application to Si, SOI, and strained Si technologies.
Recently, facetless epitaxy has received much attention in the design of raised source/drain contacts for CMOS applications. For example, selective growth in inverse patterns, i.e. using SiO2 pillars with a Si field as opposed to Si windows in a SiO2 field, has been proposed. Another approach involves fabrication of facetless raised source/drain structures by selective epitaxial growth in commercially available low-pressure and atmospheric-pressure chemical vapor deposition systems by carefully controlling the geometry of the multilayer spacer structure and sidewall spacer profile. For example, it has been suggested that undercutting the liner oxide and silicon growth under the silicon nitride spacer recesses the silicon-liner oxide interaction away from the source/drain region. This gives extra thickness in the source/drain region before the increase in silicon-dielectric interface energy causes the epitaxial layer to facet.
In yet another approach, discussed in a thesis entitled "Selective SiGe Nanostructures" by Tom Langdo (Ph.D. Thesis, MIT, 2001)("Langdo thesis"), incorporated herein by reference, facetless growth was demonstrated by in situ n-type doping of a silicon layer being deposited by selective epitaxy adjacent to a sidewall of a reactive ion etched SiO2 spacer in a ultra-high vacuum chemical vapor deposition (UHVCVD) system. It was demonstrated that a combination of moderate n-type doping and relatively vertical SiO2 sidewalls results in facet-free epitaxy along <110>-oriented SiO2 sidewalls. Referring to FIG. 3, an XTEM image illustrates growth of 1×1018/cm3 n-type doped Si with Si0.9Ge0.1 marker layers on <110>-oriented SiO2 sidewalls. As shown in FIG. 3, all Si0.9Ge0.1 marker layers follow (100) planes, and thus, facet formation is suppressed during the growth. SiO2 was chosen as the sidewall material instead of more commonly used Si3N4 because selective growth generally cannot be achieved with either SiH4 or SiH2Cl2 source gases, common Si precursors, on Si3N4 spacers without the addition of hydrogen chloride. Because of the deleterious effects of chloride on a UHVCVD system, however, addition of hydrogen chloride to the source gases is impractical.
Obstacles hinder the commercialization of this UHVCVD growth approach. First, UHVCVD is generally not feasible for large-scale commercial applications. Second, UHVCVD selective growth is not possible with Si3N4 dielectric materials. Finally, the UHVCVD process described above is generally not compatible with multi-layered commercial spacer structures that include, e.g., Si3N4 materials.
Thus, there remains a need in the art for a process of fabricating semiconductor devices having facetless raised source/drain structures that is compatible with existing semiconductor manufacturing processes, systems, and materials and that also possesses improved process tolerances.

This patent is subject to a terminal disclaimer.

Methods of fabricating semiconductor structures having epitaxially grown source and drain elements


A motor vehicle lock, more particularly for a vehicle rear door, having a lock cover and a locking mechanism consisting of substantially rotary latches and at least one pawl, furthermore having at least one coupling lever, and at least one electric drive, wherein the coupling lever can take up different positions and interacts with a drive element of the drive and a central locking mechanism, wherein, to take up its positions, the coupling lever is connected to the drive element. The drive element and/or lock cover have/has a latching contour having at least two position holders wherein at least one position holder is designed asymmetrically and a spring mechanism is provided, wherein the spring mechanism cooperates with the latching contour, as a result of which the coupling lever can be positioned in the different positions.

A motor vehicle latch of the type described at the outset is typically attached to a motor vehicle door and interacts with a locking pin on the bodywork side. Furthermore, however, the arrangement can also be reversed, such that the locking pin is arranged on the motor vehicle door and the latch is arranged on the bodywork side.
Motor vehicle latches of this kind are equipped with a central locking mechanism and typically have different positions and functions associated therewith. In this case, it is conceivable that the positions of the coupling lever can be adjusted by means of the drive. Motor vehicle latches of this kind are known for example from DE 199 43483B4. In this case, both an anti-theft module and a locking module are achieved. It is furthermore possible to lift the pawl over the anti-theft module directly, or optionally with interposition of a tripping lever.
However, a disadvantage of the motor vehicle latches known from the state of the art is that, when lifting the anti-theft module by means of the coupling lever, there is a risk of incorrect operation of the anti-theft lock or of the central locking system. This results in a faulty interaction chain in the latch, as a result of which users may become locked in or out of the vehicle.
There is therefore a need to develop motor vehicle latches such that the risk of incorrect operation within the interaction chain can be reduced or even prevented.


A device for calculating a multiplication of a multiplier and a multiplicand includes a first performer that performs an exact three operand addition and a second performer that performs an approximated operand addition and a calculator that calculates current look-ahead parameters using the approximated intermediate results. The first performer is further implemented to perform an exact three operand addition in the current iteration step using the exact intermediate result for the current iteration step and using the look-ahead parameters calculated for the current iteration step.

1. Field of the Invention
The present invention relates to cryptography and in particular to concepts for calculating a multiplication of a multiplier and a multiplicand with regard to a modulus within a cryptographical calculation, wherein the multiplier, the multiplicand and the modulus are parameters of the cryptographical calculation.
2. Description of the Related Art
Cryptography is one of the basic applications for modular arithmetic. One basic algorithm for cryptography is the known RSA algorithm. The RSA algorithm builds up on a modular exponentiation which may be illustrated as follows:C=Md mod (N).
Here, C is an encrypted message, M is a non-encrypted messaged, d is the secret key and M is the modulus. The modulus N is usually generated by a multiplication of two prime numbers p and q. The modular exponentiation is broken up into multiplications using the known square and multiply algorithm. For this, the exponent d is broken up into powers to two, so that the modular exponentiation may be broken up into several modular multiplications. In order to be able to implement the modular exponentiation in an efficient way regarding calculation, the modular exponentiation is therefore broken up into modular multiplications which may then be broken up into modular additions.
DE 3631992 C2 discloses a cryptography method wherein the modular multiplication may be accelerated using a multiplication look-ahead method and using a reduction look-ahead method. The method described in DE 3631992 C2 is also referred to as the ZDN method and is described in more detail with reference to FIG. 18. After a starting step 900 of the algorithm the global variables M, C and N are initialized. The aim is to calculate the following modular multiplication:Z=M*C mod N.
M is referred to as the multiplier, while C is referred to as the multiplicand. Z is the result of the modular multiplication, while N is the modulus.
Hereupon different local variables are initialized which need not be explained in more detail here. In the following, two look-ahead methods are applied. In the multiplication look-ahead method GEN_MULT_LA using different look-ahead rules a multiplication shift value sZ and a multiplication look-ahead parameter a are calculated (910). Hereupon, the current content of the Z register is subjected to a left-shift operation by sz digits (920).
Substantially, in parallel to that a reduction look-ahead method GEN_Mod_LA (930) is performed to calculate a reduction shift value Sn and a reduction parameter b. In a step 940 the current content of the modulus register, that is N, is shifted to the left or to the right, respectively, by sn digits in order to generate a shifted modulus value N′. The central three operand operation of the ZDN method takes place in a step 950. Hereby, the intermediate result Z′ is added to the multiplicand C after step 920 which is multiplied with the multiplication look-ahead parameter a and to the shifted modulus N′ which is multiplied with the reduction look-ahead parameter b. Depending on the current situation the look-ahead parameters a and b may have a value of +1, 0 or −1.
One typical case is that the multiplication look-ahead parameter a is +1 and that the reduction look-ahead parameter is −1 so that to a shifted intermediate result Z′ the multiplicand C is added and the shifted modulus N′ is subtracted from the same. a will have a value equal 0 when the multiplication look-ahead method would allow more than one preset number of individual left shifts, that is when sz is greater than the maximum admissible value of sz, which is also referred to as k. For the case that a equals 0 and that Z′ is rather small due to the preceding modular reduction, that is the preceding subtraction of the shifted modulus, and is in particular smaller than the shifted modulus N′, no reduction need to take place, so that the parameter b is equal 0.
The steps 910 to 950 are performed until any digits of the multiplicand are processed, that is until m is equal 0, and until also a parameter n is equal 0 which indicates whether the shifted modulus N′ is even greater than the original modulus N, or whether despite the fact that already any digits of the multiplicand have been processed still further reduction steps need to be performed by subtracting the modulus from Z.
Finally it is determined whether Z is smaller than 0. If this is the case, the modulus N needs to be added to Z in order to achieve a final reduction, so that finally the correct result Z of the modular multiplication is obtained. In a step 960 the modular multiplication is ended using the ZDN method.
The multiplication shift value sZ and the multiplication parameter a which are calculated in step 910 by the multiplication look-ahead algorithm result from the topology of the multiplier and from the used look-ahead rules which are described in DE 3631992 C2.
The reduction shift value SN and the reduction parameter b are determined by a comparison of the current content of the Z register to a value ⅔ times N, as it is also described in DE 3631992 C2. Due to this comparison the name of a ZDN method results (ZDN=Zwei Drittel N=two thirds of N).
The ZDN method, as it is illustrated in FIG. 18, leads the modular multiplication to back a three operand addition (block 950 in FIG. 18), wherein for an increase of the calculation time efficiency the multiplication look-ahead method and along with it the reduction look-ahead method are used. Compared to the Montgomery reduction a calculation time advantage may be achieved.
In the following, with reference to FIG. 19 the reduction look-ahead method is explained in more detail which is implemented in block 930 of FIG. 18. First of all, in a block 1000 a reservation for the local variables is performed, i.e. the reduction look-ahead parameter b and the reduction shift value sn. In a block 1010 the reduction shift value sn is initialized to 0. Hereupon the value ZDN is calculated in a block 1020 which is equal to ⅔ of the modulus N. This value, which is determined in block 1020 is saved in a separate register on the crypto-coprocessor, the ZDN register.
In a block 1030 it is then determined whether the variable n is equal to 0 or whether the shift value SN is equal to −k. k is a value which defines the maximum shift value which is given by hardware. In the first run block 1030 is answered by NO, so that in a block 1030 the parameter n is decremented and that in a block 1060 also the reduction shift value is decremented by 1. Then, in block 1080 the variable ZDN is allocated again, that is with half its value, which may easily be achieved by a right shift of the value in the ZDN register. In block 1100 it is then determined whether the absolute value of the current intermediate result is greater than the value in the ZDN register.
This comparison operation in block 1100 is the central operation of the reduction look-ahead method. If the question is answered by YES, the iteration is ended and the reduction look-ahead parameter b is allocated, as it is illustrated in block 1120. If the question to be answered in block 1100 is answered by NO, however, an iterative step back is performed in order to examine the current values of n and sn in block 1030. If block 1030 is answered by YES sometime in the iteration, a step back to block 1140 is performed in which the reduction parameter b is set to zero. In the three operand operation illustrated in block 950 in FIG. 18 this leads to the fact that no modulus is added or subtracted, which means, that the intermediate result Z was so small that no modular reduction was required. In block 1160 the variable n is then newly allocated, wherein then finally in block 1180 the reduction shift value sn is calculated which is required in block 940 of FIG. 18 to perform the left shift of the modulus in order to obtain a shifted modulus.
In blocks 1200, 1220 and 1240 finally the current values of n and k are examined regarding further variables MAX and cur_k in order to examine the current allocation of the N register in order to guarantee that no register exceedings takes place. The further details are not important for the present invention, are, however, described in more detail in DE 3631992 C2.
The algorithm illustrated in FIGS. 18 and 19 may be implemented in hardware, as it is illustrated in FIG. 10. For the three operand operation to be performed in block 950 an arithmetical unit 700 is required which is referred to as AU in FIG. 10. The same is coupled to a register C 710 for the multiplicand, to a register N 720 for the modulus and to a register Z 730 for the current intermediate result of the modular multiplication. Form FIG. 10 it may further be seen that the result of the three operand operation is fed into the Z register 730 again via a feedback arrow 740. From FIG. 10 further the connection of the registers to each other may be seen. The value ZDN calculated in block 1020 of FIG. 19 needs to be saved in a separate ZDN register 750. The ZDN comparison or the iteration loop illustrated in FIG. 19, respectively, is further controlled in its operation by a separate control logic 760 for the ZDN comparison.
The main task of the ZDN algorithm for the calculation of Z:=M×C mod N further consists of the following two operations:    1. Calculation of the shift values sz and si for the registers Z and N, so that the following equation is satisfied:⅔N×2−si<|Z|≦ 4/3N×2−si and    2. Calculation of the three operand sum:Z:=2sZZ+aC+b×2sz-siN,
The multiplication look-ahead parameter a and the reduction look-ahead parameter b may take values of −1, 0 and +1, as it is known.
It is to be noted that the intermediate result Z, the multiplicand C and the modulus N are long numbers, i.e. numbers whose number of digits or bits, respectively, may be greater than 512, wherein these numbers may have up to 2048 digits.
The above-described known method for performing the modular multiplication therefore comprises the following slightly rewritten three operand addition:N:=N*2sn Z:=Z*2sz+vc*C+vn*N.
In the preceding equations sZ indicates the shift value of the intermediate result Z as it is calculated from the known Booth method, i.e. the multiplication look-ahead method. sn indicates the shift value of N as it is calculated and as it was performed above.
In one practical implementation the shift values sz and sn must not be infinitely high, because for this shifters for shifting long numbers are provided which can only carry out a bit shift in a long number register up to a maximum shift value. Therefore, in a cryptography processor which operates according to the known ZDN method, a shift value sz between 0 and 5 is enabled. With regard to the shifting of the modulus a shift value between −3 and +3 is used.
It is a disadvantage of the limited shift values that e.g. the shift value sz for shifting the intermediate result Z from a preceding iteration step is often too small for a current iteration step. This is the case when the multiplication look-ahead algorithm determines that the multiplier is implemented so that e.g. a greater shift value than 5 is possible. This is the case when depending on the look-ahead rule e.g. more than 5 successive zeros occur in the multiplier. If it is considered that the multiplier M comprises 1024 or even 2048 bits then this situation may easily occur frequently. Due to the limited shift value the known ZDN method will in this "special case" react by performing a three operand operation, with the maximum shift value, that, however, the multiplication look-ahead parameter vc is set to 0, i.e. that in this step nothing is added to the multiplicand. In the next iteration step a new multiplication shift value sz is calculated which is then, when it is greater than the maximum shift value szmax, limited by a maximum shift value, which again leads to a degenerated "three operand operation", in which the multiplicand is again not added, in which therefore only the shifted intermediate result and the shifted modulus are added under consideration of the sign of the modulus.
From the preceding consideration it may be seen that in such as special case, when the multiplication look-ahead algorithm would allow a great shift, the same may not be implemented to achieve maximum efficiency due to the limited shift amount szmax.
The known ZDN method is therefore not able to use the full efficiency increase of the multiplication look-ahead method. In order to achieve an efficiency increase, in the known ZDN method a shifter increase would have to be preformed which, however, leads to the fact that more chip area is required, in particular with integrated circuits for chip-cards, which is not always tolerable due to restricted area provisions by chip-card manufacturers or may lead to considerable price increases, respectively.
It is to be noted here, that in particular in the field of cryptography processors a largely competitive market exists where already small price differences may lead to the survival of one supplier while the other supplier will not survive. The reason for this is that processors for chip-cards are a mass product as chip-cards are typically manufactured in great numbers.
On the other hand there are considerable security requirements for the chip-card processors, as chip-cards are typically in the hand of users, i.e. also in the hands of attackers, which have the chip-card processor to be attacked completely in their hands. Therefore security requirements for cryptography algorithms continuously increase, which for example becomes obvious through the fact that for increasing the security of the RSA algorithm the operands are no more only e.g. 1024 bit long but have to be 2048 bit long.
Anyway, the overall area required by the processor is firmly given by the chip-card manufacturer. This means that a manufacturer for chip-card processors must place arithmetic units and place-intensive memories on a firmly given area. On the other hand, increasingly compact cryptography algorithms also require more working memory, so that an enlargement of an arithmetic unit, so that e.g. a greater shifter is built in, is often not tolerable for this reason. If more chip area was given to the arithmetic unit, i.e. for example to a shifter, then on the other hand less working memory could be implemented on the firmly given chip area, which again leads to the fact that certain highly-complicated cryptography algorithms can not be implemented at all or are slower in calculating as if they were processed and implemented by rival products, respectively.
The known ZDN method explained with reference to FIGS. 18 and 19 is disadvantageous in so far that the three operand addition of the long-number calculating unit illustrated by block 950 in FIG. 18 may not continuously be processed but that always first a calculation of a look-ahead parameter sz′ sn and if necessary of the parameters a and b is to be carried out using blocks 910 and 930 before then the three operand addition may be performed. It is so to speak a serial two stage principle in an iteration loop, in so far that first look-ahead parameters are calculated and then the three operand addition is performed. During the calculation of the shift and sign parameters sz and sn or a and b, respectively, the calculating unit for performing the three operand addition runs idle, which is illustrated by block 950 in FIG. 18.

Modular multiplication with parallel calculation of the look-ahead parameters


The present invention provides a method of producing a copolymer of hydroxytyrosol, or its derivative, and at least one flavonoid comprising reacting hydroxytyrosol monomers or derivative with at least one flavonoid in the presence of an enzyme and hydrogen peroxide in an aqueous solution.

1. Field of the Invention
The present invention relates generally to an enzymatic mediated copolymerization process of hydroxytyrosol with different flavonoids which results in a novel polymer of polyphenol. This polymer has improved electrical and optical properties, water solubility, and consequently processability (compared to phenolic resins) and may be synthesized using chemically safe and environmentally friendly conditions for the formation of antioxidant for foods or anticancer drugs.
2. Description of the Related Art
Naturally occurring flavonoids have attracted a great deal of attention in the last decade primarily due to their potent antioxidant activity. In particular, compounds like catechins belonging to the flavonoid family have been found to possess very good antioxidant activity. These flavonoids are naturally occurring and are found in green and white teas, cocoa, red wine, strawberries, cherries, peaches, apples, plums, beans and lentils. Common catechins are: (+)-catechin, (−)-catechin, (−)-epicatechin, epicatechin gallate (ECG), and epigallocatechin-3-gallate (EGCG). In a recent study, the addition of 300 mg/Kg catechin showed inhibition of oxidation in red meat and poultry.
Moreover, catechins were found more effective against lipid oxidation in raw pork compared to BHA and BHT. However, the commercial use of catechins as antioxidants has been impeded by their poor thermal stability. Flavonoids like EGCG are known to decompose at room temperature after a few minutes. Curcumin decomposes at room temperature in aqueous solution. Other flavonoids, like epicatechins, decompose at temperatures beyond 45° C. One objective is to overcome the limitations of the naturally occurring flavonoids to render them more stable through polymerization. To accomplish this, we propose a unique and simple one-pot synthesis to make copolymeric flavonoids that exhibit enhanced stability and activity over the naturally occurring forms. This novel approach will involve the use of flavonoids, isolated from naturally occurring materials that will be polymerized using oxidoreductases such as horseradish peroxidase (HRP).
Enzymatic polymerization of phenol in aqueous solutions was initially investigated as a possible benign and environmentally friendly solution to the synthesis of polyphenols (J. A. Akkara, K. J. Senecal, and D. L. Kaplan, Jour. of Pol. Part A: Pol. Chem., 29, 1561, (1991)).
These initial attempts were unsuccessful as only very low molecular weight oligomers could be formed which had limited properties to meet the requirements for such applications. Alternative enzymatic reactions have since been investigated to improve molecular weight and the mechanical, thermal, optical and electronic properties of these polymers including micelles, air-water interface monolayers and mixture into various organic solvents. Although the molecular weights and properties of these polyphenols were improved, their commercial application remains limited due to extensive branching and poor solubility and processability of the resulting polymers (Madhu S. Ayyagari, Kenneth A. Marx, Sukant K. Tripathy, Joseph A. Akkara, and David L. Kaplan: "Controlled Free-Radical Polymerization of Phenol Derivatives by Enzyme-Catalyzed Reactions in Organic Solvents" Macromolecules 1995, 28, 5192).

Copolymerization of hydroxytyrosol with flavonoids mediated by horseradish peroxidases

The United States of America as represented by the Secretary of the Army


An ophthalmologic apparatus includes an objective lens, a refractive power measurement optical system, an inspection optical system, and an optical path separating unit. The refractive power measurement optical system is configured to project light in a first wavelength range onto a subject's eye via the objective lens and to detect returning light from the subject's eye. The inspection optical system is configured to project light in a second wavelength range onto the subject's eye via the objective lens. The optical path separating unit that is arranged in an optical path of the refractive power measurement optical system and is configured to separate an optical path of the inspection optical system from the optical path of the refractive power measurement optical system by performing wavelength separation based on changeable wavelength separation characteristics.

Ophthalmologic apparatuses capable of performing a plurality of inspections and measurements for a subject's eye are known. The inspections and the measurements for the subject's eye include a subjective inspection and an objective measurement. The subjective inspection is to acquire the result based on the responses from the subject. The objective measurement is to acquire information on the subject's eye mainly by the use of a physical method without referring to the responses from the subject.
For example, Japanese Unexamined Patent Application Publication No. 2017-136215 discloses an ophthalmologic apparatus that is capable of performing a subjective inspection and a refractive power measurement for the subject's eye and performing imaging and measuring by using optical coherence tomography.


A process for the decontamination of a medium comprising a particulate material contaminated with one or more metal species, the process comprising the steps of treating a body of the said medium with microbially produced sulfuric acid so as to solubilize the metal species as a metal sulfate; treating the leached metal sulfate by a bioprecipitation process which converts the said sulfate to an insoluble sulfide; separating hydrogen sulfide produced during the bioprecipitation from the insoluble metal sulfide; and oxidizing the separated hydrogen sulfide to form a reusable source of a sulfur-containing ingredient.

World-wide, substantial amounts of land have become metal contaminated as a result of industrial, waste disposal and other activities. Examples of such contaminants include: mercury, cadmium, barium, chromium, manganese and lead, radionuclides such as actinides and fission products. Such contaminants can pose a significant threat to ground water and therefore drinking water supplies and in many cases either limit, or prevent land re-use. Additionally, as a result of recent legislation in the United States of America and likely similar legislation within the European Community and elsewhere, waste producers are becoming increasingly liable to prosecution and to meet the costs of recovery and clean up if they do not act responsibly towards their wastes. Consequently there is a growing need for technologies which can help solve the problems caused by contaminated land.
To date, a number of techniques have been developed to remediate contaminated land. Examples include: soil stabilization, electromigration, vitrification, volatilization, incineration, soil washing, pump and treat systems, land farming, slurry phase bioremediation, etc. Many of these known techniques possess several limitations including:
a) Lack of a permanent solution to the problem, e.g. transferral of the material to a toxic landfill, or entrapment within matrixes possessing a limited life; PA1 b) Unsuitability to treat a wide range of contaminants, e.g. metal contaminated land in the case of currently used biological processes; PA1 c) The generation of high volume, or difficult to control secondary wastes, e.g. soil stabilization and incineration; PA1 d) Lack of selectivity of in-situ or ex-situ options as appropriate to a particular site, e.g. as in the case of incineration and soil washing; PA1 e) High costs, e.g. incineration, vitrification and pump and treat systems; PA1 f) Limited ability to re-use contaminants, e.g. soil stabilization systems when applied to metals. PA1 i) actinides or their radioactive decay products or compounds thereof; PA1 ii) fission products; PA1 iii) heavy metals or compounds thereof. PA1 a) direct attack of metal sulfides; PA1 b) by electrochemical processes (galvanic conversion), resulting from contact between two dissimilar metal species immersed in a suitable electrolyte, e.g. sulfuric acid; or PA1 c) by the oxidative effect of ferric sulfate. PA1 (a) sludge containing precipitated metal sulfides and biomass; PA1 (b) aqueous hydrogen sulfide and soluble metal sulfides together with some biomass components; PA1 (c) gaseous hydrogen sulfide. PA1 (a) direct oxidation to sulfuric acid and/or sulfates; PA1 (b) oxidation to elemental sulfur, which can if appropriate then be added to, e.g. spread on, the contaminated soil to produce sulfuric acid.
The present invention seeks to address these problems by enabling biological systems to remediate metal contaminated land non-specifically.

Process for the treatment of contaminated material


A process for producing an ocular lens characterized by mixing a polymerizable component for an ocular lens with an organic solvent (I) capable of dissolving the polymerizable component, injecting the obtained mixture into a mold having the desired shape for an ocular lens and then, preparing a polymer by the polymerization reaction, immersing the polymer taken off from the mold in an aqueous organic solvent (II) having compatibility with the organic solvent (I), and then, hydrating the polymer, and an ocular lens produced by the process, which is, in particular, remarkably excellent in transparency.

Conventionally, in general, a material having relatively high water-absorptive property, such as a material having a water content of at least 40% by weight has the advantage of being imparted flexibility by water even if its own flexibility is, as usual, not so high. However, oxygen permeability of the above material is insufficient and when water content in the material is increased, there generates a problem that bacteria widely breed and safety of the material is lowered.
Then, there is proposed a material comprising a copolymer which is prepared by combining a monomer or macromonomer capable of imparting excellent oxygen permeability to the material, such as a silicon and/or fluorine-containing monomer or macromonomer with a hydrophilic monomer capable of imparting excellent wettability (hydrophilic property) to the material, such as a hydroxyl group-containing monomer so that water content of the material becomes low, and then, by copolymerizing these together with. Although the material is surely excellent in oxygen permeability, the material is poor in flexibility, and furthermore, because compatibility of the silicon and/or fluorine-containing monomer or macromonomer with the hydrophilic monomer is remarkably poor, when these components are mixed together with, sometimes phase separation is generated and only an opaque polymer is obtained by the copolymerization. Therefore, there occurs a problem that it is difficult to use the above material as a contact lens or an intraocular lens.
Then, in order to solve the above problem, there is proposed a process for producing a soft contact lens, comprising desilylating the copolymer prepared by copolymerizing a hydroxyl group-containing hydrophilic monomer of which hydroxyl group is previously silylated with a polyorganosiloxane having a polymerizable group and a hydrophilic group on the same side chain of the molecule (Japanese Unexamined Patent Publication No. 295216/1989).
By the above process, a soft contact lens which is excellent in transparency can be produced. However, because there is necessitated a complicated step such that hydroxyl group of a hydroxyl group-containing hydrophilic monomer is previously silylated and then, the obtained copolymer is desilylated, it is desired that the step in the process is more simplified.
Also, in addition to the above process, there are proposed a process for producing a contact lens, comprising mixing a monomer composition containing a crosslinking agent with a solvent having high compatibility with the monomer composition to give a mixture, producing a formed article of polymer by molding the mixture by the static casting and removing the solvent from the formed article of polymer (Japanese Unexamined Patent Publication No. 225913/1989), a process comprising using a monomer composition containing a silicone-containing monomer and a hydrophilic monomer in the above process for producing a contact lens (Japanese Unexamined Patent Publication No. 501504/1996) and a process comprising evaporating and removing the solvent at the specific temperature in the above process for producing a contact lens (Japanese Unexamined Patent Publication No 503173/1996).
By these processes, a contact lens which is relatively good in transparency can be produced. However, when these processes are employed, there is a fear that the solvent and non-reacted monomer composition which have been used during the static casting are not completely removed, so that these remain in a contact lens.
In the meantime, as an intraocular lens material, there is proposed a material prepared by polymerizing a silicon-containing monomer capable of imparting flexibility to the material.
However, the above material has a problem that a lens from the material becomes cloud in white owing to stain such as lipid after inserting the lens into an eye because the material has a high affinity for lipid, so that optical properties are lost. Then; in order to solve the problem, it is tried to develop various processes for producing an intraocular lens material. However, a process by which the desired intraocular lens can be easily produced has not been provided yet.
As aforementioned, there has not yet been provided a process for easily producing a contact lens material and an intraocular lens material which are, in particular, excellent in transparency and furthermore have flexibility, high oxygen permeability, stain resistance, wettability, safety and the like at the same time.
The present invention has been accomplished in consideration of the above prior art, and aims at providing a process for extremely easily producing an ocular lens such as a contact lens, which is, in particular, remarkably excellent in transparency, has flexibility and high oxygen permeability, is excellent in stain resistance and wettability, and furthermore has high safety, and providing an ocular lens represented by a contact lens, which is produced by the process.

Process for producing ocular lens and ocular lens produced by the process


An apparatus, method and system for generating music in real time are provided. A pipeline for coordinating generation of a musical piece is created. At least one producer is loaded into the pipeline, the at least one producer for producing at least one high level musical element of the musical piece, independent of other producers in the pipeline. At least one generator is called by the at least one producer, the at least one generator for generating at least one low level music element of the musical piece. The at least one low level musical element and the at least one high level musical element are integrated, such that the musical piece is generated in real time.

There is increasing interest and demand for adaptive music composition systems, which can change the character of generated music in real time, for use in diverse areas such as video game music generation, film score composition, and development of interactive composition tools. Previous music composition systems have tended to be monolithic and complex in their approach to automated music composition and have not been successful in mimicking human composed pieces of music. Furthermore, previous music composition systems have not been successful at adapting the music being generated to mood as it develops in a game or a film etc. Rather, the previous music composition systems rely on calling up different snippets of music that are classified under the given mood. This can be expensive for the makers of a video game as a composing and/or licensing fee must be paid for each snippet of music used. The complexity of the previous music composition systems have also made them difficult to use by a non-specialist.


A motor drive loop circuit for a micro-electro-mechanical system (MEMS) gyroscope is provided. The motor drive loop circuit includes a motor configured to drive a proof mass in the MEMS gyroscope and a minus-90-degree phase-shift twin-tee notch filter. The motor is configured to cause the proof mass to oscillate at a primary-proof-mass mode. The a minus-90-degree phase-shift twin-tee notch filter is configured to: provide a minus 90 degree phase at a motor resonance frequency equal to the primary-proof-mass mode; suppress resonance at undesired mechanical modes of the motor during a startup of the motor; and provide gain at the motor resonance frequency.

A fast micro-electro-mechanical system (MEMS) gyro motor startup time is critical for many applications. The MEMS gyro motor has several undesired mechanical modes of vibration that can compete with the primary-proof-mass mode used to drive the proof mass. These undesired mechanical modes of vibration delay the startup time of a MEMS gyro motor. The motor drive control loop for a gyroscope contains a filter function that provides a −90 degree phase shift necessary for oscillation. The filter in the motor drive control loop plays an important part in suppressing the competing modes. The suppression of competing modes provided by the current filter topology is weak and allows those modes to delay startup of the MEMS gyro motor.


The present invention relates to an optical waveguide circuit such as an arrayed waveguide grating, etc. A lower cladding is formed on a silicon substrate. A core having the following waveguide construction is formed thereon. That is, an input side slab waveguide is connected to the emission side of a plurality of incidence waveguides, a plurality of arrayed waveguides having different lengths form each other are juxtaposed at and connected to the emission side thereof, an output side slab waveguide is further connected to the emission side thereof, and a plurality of emission waveguides are connected to the emission side thereof, thereby causing the abovementioned waveguide construction. The upper cladding covers up the core. The cladding and core are made of silica-based glass, wherein the value B of birefringence occurring in said optical waveguide portion is |B|xe2x89xa65.34xc3x9710xe2x88x925, and xcex1sxe2x88x922.0xc3x9710xe2x88x927xe2x89xa6xcex1g xe2x89xa6xcex1s+2.0xc3x9710xe2x88x927 is established where it is assumed that the thermal expansion coefficient of the upper cladding is xcex1g, and the thermal expansion coefficient of a silicon substrate is xcex1s.

The present invention relates to an optical waveguide circuit such as an arrayed waveguide grating used for optical transmissions, etc.
Recently, optical wavelength multiplexing transmissions have been researched and studied as a method for remarkably increasing transmission capacity, some of which have been used in practical applications. Such an optical wavelength multiplexing transmission is used to transmit, for example, a plurality of light having different wavelengths through multiplexing. In such an optical wavelength multiplexing transmission system, in order to pick up light wavelength by wavelength at the light receiving side from a plurality of transmitted light, it is indispensable that an optical transmission element, etc., which can transmit only light having predetermined wavelengths is provided in the system.
As one example of optical transmission elements, there is an arrayed waveguide grating (AWG: Arrayed Waveguide Grating) as shown in, for example, FIG. 6. The arrayed waveguide grating is such that it has a waveguide construction, as shown in the same drawing, on a substrate 11. The waveguide construction of the arrayed waveguide grating is as shown below. That is, an input side slab waveguide 13 is connected to the emission side of incidence waveguides 12 as one or more optical input waveguides juxtaposed to each other. And, a plurality of juxtaposed waveguides 14 are connected to the emission side of the input side slab waveguide 13. An output side slab waveguide 15 acting as the second slab waveguides is connected to the emission side of the plurality of arrayed waveguides 14. Emission waveguides 16 acting as a plurality of juxtaposed optical output waveguides are connected to the emission side of the output slab waveguide 15.
The arrayed waveguides 14 propagate light introduced from the input side slab waveguide 13, and are formed so as to have lengths different from each other. Also, the emission waveguides 16 are provided so as to correspond to the number of signal light, divided by, for example, an arrayed waveguide grating, having wavelengths different from each other. In addition, a number (for example, 100 lines) of arrayed waveguides 14 are usually provided. However, in the same drawing, in order to simplify the drawing, the number of the respective waveguides 12, 14, and 16 is simplified for illustration.
For example, transmission side optical fibers are connected to the incidence waveguides 12, into which wavelength multiplexed lights are introduced. Subsequently, light which is introduced into the input side slab waveguide 13, passing through the incidence waveguides 12, is diffracted by the diffraction effect thereof, and made incident into a plurality of respective arrayed waveguides 14, wherein the light propagates through the respective arrayed waveguides 14.
Light which propagated through the respective arrayed waveguides 14 reaches the output side slab waveguide 15, and is further condensed at the emission waveguides 16 for output. Also, since the lengths of the respective arrayed type waveguides 14 differ from each other, a shift occurs in the phases of individual lights after they propagated through the respective arrayed waveguides 14. And, the phase front of a light from the arrayed waveguide is inclined in compliance with the quantity of the tilt, wherein the position of condensing the light is determined by the angle of the inclination, and the light condensing positions of light having different wavelengths differ. By forming the emission waveguides 16 at the condensing positions of light having different wavelengths, it is possible to output light having different wavelengths from the emission waveguides 16 wavelength by wavelength.
For example, as shown in the same drawing, as wavelength multiplexed light having wavelengths xcex1, xcex2, xcex3, . . . xcexn (n: an integral number) is inputted from one incidence waveguide 12, the light is diffracted by the input side slab waveguide 13. And, it reaches the arrayed waveguides 14, and as described above, is condensed at different positions on the basis of wavelength, passing through the output side slab waveguide 15. Light having different wavelengths is made incident into different emission waveguides 16, and are outputted from the emission ends of the emission waveguides 16, passing through the respective emission waveguides 16. And, since optical fibers for light output are connected to the emission ends of the respective emission waveguides 16, it is possible to pick up light of respective wavelengths via the optical fibers.
In the arrayed waveguide grating, the wavelength resolution of the diffraction grating is proportional to a difference (xcex94L) in length of the respective arrayed waveguides 14. Therefore, by designing the xcex94L so as to become larger, it will become possible to multiplex and demultiplex wavelength multiplexed light having narrow wavelength intervals, which could not be achieved in prior arts. That is, the arrayed waveguide grating can achieve light multiplex and demultiplex functions (functions to multiplex and demultiplex a plurality of light signals having a wavelength interval of 1 mn or less), which are required in achievement of a high bite rate optical wavelength multiplexed transmission.
The abovementioned arrayed waveguide grating is an optical waveguide circuit that is formed so that an optical waveguide portion 10 having a lower cladding, a core and an upper cladding, which are formed of silica-based glass, is formed on a substrate 11 made of silicon, etc. The arrayed waveguide grating is such that the lower cladding is formed on the substrate 11 made of silicon, etc., the core which constitutes the abovementioned waveguide is formed thereon, and the upper cladding is further formed on the core so as to cover the core. In addition, the upper cladding was made of silica-based glass to which, B2O3 and P2O5 are, respectively, doped on pure silica glass at a ratio of 5 mole %.
FIG. 7 shows a manufacturing process of the arrayed waveguide grating. Hereinafter, a description is given of the manufacturing method of an optical waveguide circuit with reference to the same drawing. First, as shown in the same drawing (a), a film of the lower cladding 1b and a film of the core 2 are formed on the silicon substrate 11 in order. Next, as shown in the same drawing (b) , photolithography and reactive ion etching method are applied thereto, using a mask 8. By the application, as shown in the same drawing (c), an optical waveguide pattern of the arrayed waveguide grating is formed by processing the film of the core 2, whereby the core 2 of the optical waveguide construction is formed.
Next, as shown in the same drawing (d) , a film of the upper cladding 1a is formed on the upper side of the core 2 in a form embedding the core 2. In addition, the film of the upper cladding 1a is formed by depositing the upper cladding glass particles 5 by the flame hydrolysis deposition method and consolidating the upper cladding glass particles 5 at, for example, 1200xc2x0 C. through 1250xc2x0 C.
However, originally, in an arrayed waveguide grating that is applied as optical transmission elements for optical wavelength multiplexed transmissions as described above, it is preferable that the polarization dependency loss (PDL) in the TE mode and TM mode is as close to zero as possible. However, in the prior art arrayed wavelength grating, the abovementioned polarization dependency loss (PDL) was 3 dB where the center wavelength xcexc is in a range of xc2x10.1 nm.
Therefore, in order to compensate the polarization dependency loss, the prior art arrayed waveguide grating was constructed as shown in FIG. 8. That is, a half-wave plate 3 formed of polyimide, etc., is inserted into the middle way of the arrayed waveguide 14 in the form of crossing all the arrayed waveguides 14. If so, a polarized wave propagating through the arrayed waveguide grating is turned by 90 degrees at the incidence side and the emission side of the half-wave plate 3, and influences resulting from the abovementioned polarization dependency loss can be evaded. Also, the material of the half-wave plate 3 is not limited to polyimide, but it may be made of a silica-based glass material. However, since, if it is made of polyimide, the thickness thereof can be made thinner, a polyimide-made half-wave plate was most excellent as the half-wave plate 3 in the prior art arrayed waveguide grating.
However, as described above, if the arrayed waveguide grating is formed by inserting a half-wave plate 3, a so-called return loss occurs, in which a part of the light incident into the half-wave plate 3 returns to the incidence side of the incidence waveguides 12. In a case where the half-wave plate 3 is inserted vertical to the arrayed waveguides 14, the value of the return loss becomes approx. xe2x88x9235 dB. Thus, if a return loss exceeding xe2x88x9240 dB is produced in elements used for an optical wavelength multiplexed transmission system, the arrayed waveguide grating will not be able to be used for optical waveguide multiplexed transmissions.
In addition, in a case where the half-wave plate 3 is inclined unvertical by 8 degrees with respect to an axis vertical to the arrayed waveguides 14, the return loss can be suppressed by around xe2x88x9240 dB. However, in this case, even though a thin half-wave plate 3 made of polyimide is applied, it will become difficult for a slit, through which the half-wave plate 3 is inserted, to be formed and for the half-wave plate 3 itself to be inserted in view of the technical aspect. Therefore, in this case, another problem occurs, that is, the yield of arrayed waveguide gratings is lowered due to insertion of the half-wave plate 3.
In addition, if an attempt is made to juxtapose arrayed waveguides 14 to each other since the length of a polyimide-made half-wave plate 3 utilized at present is approx. 8 mm, only 320 arrayed waveguides 14 can be disposed at most. Therefore, even though an attempt is made to increase the number of arrayed waveguides 14 in order to achieve an arrayed waveguide grating having a narrow interval in future, a limitation is produced in the number of arrayed waveguides 14, and it becomes difficult to meet the requirement. Also, if an attempt is made to lengthen the polyimide-made half-wave plate 3, the production yield of the half-wave plates 3 themselves is lowered, and in line therewith, production costs of the arrayed waveguide gratings will be increased.
Still further, since a half-wave plate 3 is inserted into and fixed in an insertion slit worked at an arrayed waveguide grating by a dicer, etc., it becomes necessary to work the insertion slit in order to provide the half-wave plate 3. And, the half-wave plate 3 is inserted into the slit and is fixed with an adhesive agent, etc. For this reason, the number of processes of manufacturing arrayed waveguide gratings is increased, wherein still another problem occurs, that is, production costs of the arrayed waveguide grating are accordingly increased.
The present invention was developed to solve the abovementioned problems, and it is therefore an object of the invention to provide an optical waveguide circuit such as an arrayed waveguide grating having characteristics shown in (1) through (3) below: (1) an optical waveguide circuit provided by the invention can be manufactured by a fewer number of processes, and production costs thereof are inexpensive, (2) an optical waveguide circuit provided by the invention is excellent in return loss characteristics, and can suppress influences of polarization dependency loss, and (3) an optical waveguide circuit provided by the invention can construct an arrayed waveguide grating in which 320 or more arrayed waveguides can be juxtaposed to each other at intervals of 25 xcexcm.
In order to achieve the objects, the invention employs the following construction and means to solve the problems. According to the first aspect of the invention, an optical waveguide is an optical waveguide portion made of a lower cladding, a core and an upper cladding formed of silica-based glass is formed on a silicon substrate, wherein a value B of birefringence occurring at said optical waveguide portion is |B|xe2x89xa65.34xc3x9710xe2x88x925.
According to the second aspect of the invention, an optical waveguide circuit is, in addition to the first aspect, where it is assumed that the thermal expansion coefficient of the upper cladding is xcex1g, and the thermal expansion coefficient of a silicon substrate is xcex1s, xcex1s xe2x88x922.0xc3x9710xe2x88x927xe2x89xa6xcex1gxe2x89xa6xcex1s+2.0xc3x9710xe2x88x927 is established.
According to the third aspect of the invention, an optical waveguide circuit is that said arrayed waveguide grating is constructed by an optical waveguide circuit according to said first or second aspect, wherein a first slab waveguide is connected to the emission side of one or more juxtaposed optical input waveguides; a plurality of juxtaposed arrayed waveguides having different lengths from each other, which propagate light introduced from said first slab waveguide, are connected to the emission side of said first slab waveguide; a second slab waveguide is connected to the emission side of said plurality of arrayed waveguides; a waveguide construction, in which a plurality of juxtaposed optical output waveguides are connected to the emission side of said second slab waveguide, is formed of a core; and a plurality of optical signals having different wavelength from each other, which are inputted from said optical input waveguides, are caused to propagate with a difference in phase secured per wavelength by said arrayed waveguides, and are inputted into optical output waveguides differing per wavelength; whereby an arrayed waveguide grating is constructed, which outputs light having wavelengths different from each other through different optical output waveguides.
For example, in a case where the arrayed waveguide grating is applied to an optical wavelength multiplexed transmission system, it is preferable that the polarization dependency loss (PDL) in the TE mode and TM mode, being a polarization mode, is as close to zero as possible. Therefore, the inventor examined to which value the PDL of the arrayed waveguide grating is set for adequate optical wavelength multiplexed transmissions. As a result, it was found it was preferable that the PDL was set to 0.5 dB or less. And, in order to make the PDL smaller than 0.5 dB, the inventor also examined through simulation experiments to which value the quantity of center wavelength shift in the TE mode and TM mode in the arrayed waveguide grating is adequately set.
In the examination, first, optical transmission spectra in the respective polarization modes (TE mode and TM mode) of the arrayed waveguide grating were, respectively, measured. Also, it was assumed that the maximum value in difference between the transmission loss in the TM mode at the center wavelength xc2x1xcex2 (xcex2 is a predetermined value, for example, 0.8 nm) in the TE mode and the transmission loss in the TM mode at the center wavelength xc2x1xcex2 in the TM mode is a polarization dependency loss. And, for example, the transmission spectrum in the TM mode is caused to gradually shift in a suspected state with the transmission spectrum in the TE mode fixed, and the quantity of the shift was determined to be the center wavelength shift in the polarization mode. The polarization dependency loss is plotted with respect to the quantity of center wavelength shift to draw a graph. And, on the basis of the graph, the relationship between the quantity of center wavelength shift by the polarization mode and the polarization dependency loss was obtained.
The result is shown in FIG. 2. As shown in the same drawing, by setting the quantity of center wavelength shift in the TE mode and TM mode, which is the polarization mode in the arrayed waveguide grating, to 0.05 nm or less, it could be confirmed that the abovementioned PDL was made smaller than 0.5 dB. Therefore, the inventor determined that, in the case where an arrayed waveguide grating is used as an optical wavelength multiplexing transmission, an adequate shift quantity AXB of the center wavelength in the TE mode and TM mode is 0.05 nm or less.
Also, in an optical waveguide circuit such as an arrayed waveguide grating, etc., it is considered that the shift in the optical transmission center wavelength by the abovementioned polarization mode is influenced by a value of birefringence occurring in the optical waveguide portion. The quantity xcex94xcexB of center wavelength shift by the polarization mode can be expressed by the following equation, using a value B of birefringence occurring in the optical waveguide portion, a effective refractive index nc of the core, and center wavelength xcexO of light propagating through the core:
xcex94xcexB=|Bxc2x7xcexO/nc|xe2x80x83xe2x80x83(1)
Herein, in order to find out the optimal birefringence value in the case where an arrayed waveguide grating is applied to an optical wavelength multiplexed transmission system which is now under consideration, if xcexO and nc are determined as follows, the range of value B of birefringence occurring in the optical waveguide portion was obtained. And, the xcexO was determined to be 1550 nm which is the center wavelength in the optical wavelength multiplexed transmission system under consideration. Also, the refractive index of the core is determined by a composition of the core, and is determined to be approximately 1.45.
Where the value B of the birefringence is set in a range of |B|xe2x89xa65.34xc3x9710xe2x88x925, it was found that the value of xcex94xcexB of the quantity of center wavelength shift by the polarization mode could be set in the range. That is, it was found that, by setting the value B of the birefringence, the polarization dependency loss could be determined in the loss range required for an arrayed wavelength grating.
On the basis of the results of the abovementioned examinations, in the optical wavelength circuit according to the invention, the value B of the birefringence occurring in the optical waveguide portion is determined to be an adequate value of |B|xe2x89xa65.34xc3x9710xe2x88x925. In the other words, the stress provided onto the core by the stress applied from the cladding onto the core is made smaller. Accordingly, in the invention, the quantity of center wavelength shift in the abovementioned TE mode and TM mode in an optical waveguide circuit is established to be a value of 0.05nm or less, and the value of the polarization dependency loss (PDL) can be set to an adequate value of 0.5 dB or less.
Therefore, if an optical waveguide circuit according to the invention is applied to an optical wavelength multiplexed transmission system having, for example, a wavelength band of 1.55 xcexcm, it is possible to provide an optical waveguide circuit that can suppress influences of the polarization dependency loss without providing any half-wave plate. In further detail, as in the third construction of the invention, where an optical waveguide circuit is applied to an optical wavelength multiplexed transmissions system having a wavelength band of 1.55 xcexcm as an arrayed waveguide grating, it is possible to construct an arrayed waveguide grating that is capable of suppressing influences of the polarization dependency loss without providing any half-wave plate.
And, in the arrayed waveguide grating, the number of manufacturing processes can be accordingly reduced since no half-wave plate is required, whereby yield thereof can be increased to accordingly reduce the production cost thereof. In addition, the arrayed waveguide grating can be made so that it can accommodate, for example, 320 or more arrayed waveguides at internals of 25 xcexcm, wherein it is possible to increase the number of channels.
Also, in the invention, by establishing xcex1s, xcex1sxe2x88x922.0xc3x9710xe2x88x927xe2x89xa6xcex1gxe2x89xa6xcex1s+2.0xc3x9710xe2x88x927 where it is assumed that the thermal expansion coefficient of the upper cladding is xcex1g, the thermal expansion coefficient of the upper cladding can be optimized.
Therefore, if an optical waveguide circuit according to the invention is thus constructed, it is possible to obtain an optical waveguide circuit that can bring about the abovementioned excellent effects.


An arithmetic teaching device consisting of a rod having hand movable spaced collars slidable thereon and having sequentially spaced numbers therealong corresponding to the collars whereby the numbers indicate visually the arithmetic calculation of preceeding manipulated numbers.

1. Field of Invention
The invention relates to a manually operated calculating device.
2. Brief Description of Previous Art
An early development of a manually operable calculating device is the abacus which comprises a plurality of transversely spaced vertically disposed strings having movable counters thereon but there is no resulting numerical reading of a calculation.
In teaching simple or elementary arithmetic functions to beginning school graders, it is very helpful to the learning process to reduce mental calculations or the combination of visual and mental calculations, such as a teacher illustrating on a blackboard, to a hands-on situation in which the pupil or school grader applies his hands physically in carrying out the calculations demonstrated by the teacher. Where the pupil can physically carry out the calculating function and observe or see what he is doing, the mental process of absorbing and understanding the calculation process and its result is greatly expedited. This has been attested to by teachers involved in teaching arithmetic to beginning learners.


A herbal steam device includes a closed heated boiling chamber with openings at the side for a steam outlet. A collecting chamber surrounds the upper part of the boiling chamber. Cold water from a reservoir below flows into the boiling chamber through an inflow pipe. Surplus water flows through an overflow and a backflow pipe back to the reservoir. An electrical heating plate is present under the boiling chamber, and a herb pot may be placed in the steam space above the boiling chamber. The inflow pipe runs in a curve around the boiling chamber. The steam which escapes from the openings heats up the inflowing water. At the same time, the relatively cold inflow pipe acts as a foam barrier adjacent to the openings.

1. Technical Field
This invention relates to a herbal steam treatment device that may create steam enriched with essential oils of herbs or plant extracts.
2. Background Information
Herbal steam, which is also called flavour steam, has a very positive effect on the skin. On the one hand it stimulates the metabolism and on the other hand it is relaxing and comforting. The skin becomes softer and more elastic; blood circulation and metabolism are stimulated. Thereby the receptiveness of the skin increases for the effects of the corresponding plant extracts or essential oils.
The herbal steam device "IONTO-HERB" available from IONTO-COMED of Eggenstein-Leopoldshafen, Germany, includes a steam pot of high-grade steel with an integrated heating plate. A removable lid provides access to fill the steam pot. However, the entire quantity of water in the steam pot must be heated up whenever the steam device is used. In the steam space a herb sieve is arranged. The steam, enriched with essential oils, is led through a steam pipe to a steam outlet. By the direct arrangement of the herb sieve above the steam pot it is inevitable that condensed water which is enriched with oil flows back to the steam pot. The foam that arises can be accepted to a certain degree. If, however, the foam reaches a certain height, the heating must be switched off immediately to prevent ebullient foam. Otherwise the foam may reach the steam outlet over the steam tube and hot water droplets from the bursting bubbles could reach the person to be treated. This undesirable effect is sometimes referred to as the "Spittle" of the steam device.
The herbal steam device "IONTO-HERB XL," also from IONTO-COMED, includes a steam pot which is filled with water over a filler neck with an unscrewable clasp until full. The water in the steam pot boils with the help of the electrical heater. The arising steam passes through a horizontal steam channel into a herb stub, thereby enriching the steam with essential oils. The enriched steam then passes further through the outlet of a steam pipe. The condensate arising in the steam pipe flows through a condensate outlet and is collected in a condensate beaker separated from the steam pot. Therefore, the condensate with the essential oils does not get into the steam pot. When used correctly no foam can arise so that, as a rule, there is no danger of ebullient foam or even "Spittle." However, the condensate beaker must be drained frequently in order to prevent it from overflowing. The electrical heater of the steam pot is switched off automatically when the condensate state reaches its maximum state. One disadvantage of this device is that its wide construction requires a correspondingly stable stand with heavy base plate.
Both described herbal steam devices have a long heating-up time because after filling, the entire volume of water must be heated until it boils. In addition, through costly control electronics with liquid level sensors, it must be ensured that the heater is only switched on when the operating conditions are perfect.
Therefore, a need has long existed for an improved herbal steam device that may have a simple and space-saving construction, short heating-up time, long uninterrupted treatment period, ease of use, and high operational safety.


A coil for electromagnetically actuating a switching device. The coil includes terminal connections retained in a coil flange for the coil where there are recesses in the flange to accommodate electrical components. The terminal connections are developed as a joint bar, and the joint bar serves as a mechanical holding device for one of the sides of two diodes of a rectifier bridge configured on opposite sides of the joint bar. The one side of the two diodes is soldered to the joint bar. These elements are inserted as a unit into the recesses of the coil flange.

The present invention relates to a coil for electromagnetically actuating a switching device. The coil is provided with terminal connections retained in a coil flange for the coil. The coil flange has recesses for accommodating electrical components.
In a known coil for electromagnetically actuating a switching device (German Patent 36 44 113), at two adjacent corner areas of a flange, two terminal posts extend perpendicular to the magnetic field of a winding coil and parallel to each other. Indentations, which are connected with one another via more shallow indentations and which are also connected to the terminal posts, are formed on the outer surface of this end flange such that the voids are formed away from the winding. Electrical or electronic circuit elements can be inserted into these indentations. In this case, the corresponding connecting wires are bent in the corner areas of the flange and, can be soldered together in the installed state.
However, the known coil does not permit simple manufacturing so that production may be difficult to automate.

Coil for electromagnetically actuating a switching device


A vehicle parking assistance device to be positioned in a given parking location defined by a length and width is disclosed. In one embodiment, a support base member includes three bores disposed in linear alignment therein. Each of the three bores provides a distinct position within the length and the width of the given parking location. An elongated flexible pole having a visual indicator secured thereto is releasably engaged in one of the three bores. The three bores furnish easy adjustment of the placement of the elongated flexible pole in order to compensate for minor mistakes in the placement of the vehicle parking device and/or to accommodate vehicles of different dimensions.

Existing vehicle parking assistance devices, which signal to a driver when a vehicle has reached a selected point and should be stopped, in the marketplace have limitations. By way of example, laser-based systems are expensive and difficult to install. Curb-based objects which are attached to pads are inadequate as such devices rely on the visual perception of the driver to ensure that the vehicle approach is correct and within a tight and often difficult to define range. Tennis balls hung on a string from a ceiling are dangerous to install, often in the way, and difficult to adjust to compensate for differing car lengths. Accordingly, a need exists for an improved vehicle parking assistance device which addresses these deficiencies.

Vehicle parking assistance device and method for use of same


A system for retaining stators and reducing air leakage in a gas turbine engine having an axis includes a stator having an inner platform, an outer platform, a low pressure side, a high pressure side, and at least one foot, and designed to turn air. The system also includes a case positioned radially outward from the stator and having at least one recess designed to interface with the at least one foot to resist movement of the stator relative to the case. The system also includes a bladder positioned between the outer platform of the stator and the case and designed to receive pressurized fluid having a greater pressure than ambient pressures experienced at the low pressure side of the stator and to further resist movement of the stator relative to the case in response to receiving the pressurized fluid.

Gas turbine engines include a compressor for compressing air prior to combustion. The compressor section includes multiple stages, or rows, of rotating rotor blades with one or more stage of stationary stators positioned between each stage of rotor blades. The rotor blades and stators are housed within a casing. Due to design tolerances, the stators are capable of moving relative to the casing. Such relative movement and gaps that are present in the assembly undesirably allow air leakage between stages, reducing performance of the gas turbine engine. Solving this issue may be challenging where tip clearance distances change in response to changing engine operating conditions due to vibration, thermal expansion, and the like.

Stator outer platform sealing and retainer


A power switching control apparatus for acquiring pieces of making operation time information of individual phase switches more precisely according to loads and making instants. Making operation time information detecting means outputs the making operation time information of at least one of individual phase switches on the basis of the motion of the movable contact of the phase switch, and outputs the making operation time information of at least another of the individual phase switches on the basis of the phase current of the phase switch. Moreover, the making operation time information detecting means outputs the making operation time information ITA, ITB and ITC of an A-phase switch, a B-phase switch and a C-phase switch individually on the basis of either the detected output of a contact operation sensor and the detected output of a phase current sensor.

1. Field of the Invention
This invention relates to a power switching control apparatus, which is constituted to arrange phase switches at individual phases of a three-phase AC power circuit and to control the individual phase switches independently of one another.
2. Description of Related Art
A synchronous switching apparatus is disclosed in International Laid-Open WO000/04564. In this synchronous switching apparatus, phase switches arranged at the individual phases of a three-phase AC power circuit are controlled independently of one another, and the individual phase switches are so made at the set phases as to suppress the generation of the inrush current or surge voltage which is severe against the system device such as the transformer, shunt reactor, power lines or capacitor banks of the three-phase AC power circuit.
Generally speaking, however, the contacts of the phase switch are erroded by the arcs, and the drive mechanism of the moving contacts disperses and has its driving characteristics varied according to the surrounding environment such as the ambient temperature. JP2001-135205A has disclosed a one-phase power switching apparatus. In this power switching apparatus, on the basis of the waveform of a phase current and the pre-arcing time of a switch, the making operation time of the switch is detected and is reflected on the control of the next making instant of the switch. This making operation time of the switch is the action time from the time when the making command of the switch is fed to the time when the contact is actually connected.
In case the individual phase switches of the three-phase AC power circuit are made independently of one another and in set phases, no phase current flows in the state where the first phase switch is made, if the load is of a non-grounded neutral point type. In case the load is of the type, in which it has a common core of the grounded neutral point type, the phase switch to be finally made has two preceding phases made so that it is made in the substantial "0" voltage between contact. In the constitution where the making operation time of the phase switch is detected on the basis of the phase current waveform containing pre-arcs, therefore, the phase current waveforms containing the pre-arcs cannot be obtained when all the phase switches are made to raise a problem that it is impossible to detect the making operation times of all the phase switches precisely.


An apparatus and method for generating an audible indication during the time that a computer system has been toggled into a mode wherein all the letters of the alphabet a displayed in the upper case or the so-called capslock "ON" mode.

The present invention is directed to the problem of typing on a computer keyboard when the capslock key on the keyboard is unintentionally activated, or the so-called "capslock error". Such errors occur when, due to the locking feature of the standard capslock key, successive words intended to be typed in lower case are all typed in capital letters, e.g. "ERROR" is typed when the typist intended to type "error".
The primary problem solved by the present invention occurs when the operator of the computer keyboard, having activated the capslock mode to "ON", continues to a section of the document wherein the text is not intended to be capitalized, forgetting that the keyboard has been placed in the capslock "ON" mode. Another common occurrence is when the capslock key is inadvertently touched during normal operation of the computer keyboard, thereby placing the keyboard in the capslock "ON" mode, unbeknownst to the typist. In either event, several characters or even pages of text maybe typed capitalized into the computer's word-processing program contrary to the operator's intent.
A visual indication of the capslock "ON" mode is present on most computer keyboards via a light or light emitting diode (LED), which is lit during time that capslock is "ON". Said indication is usually found in the upper right hand corner of the keyboard. Most word-processing programs also provide some sort of visual indication on the monitor or CRT that the capslock mode is "ON". One way the light can be turned "ON" in conventional keyboards is by a direct circuit connection between the capslock key and the light or LED present in the upper right hand corner of most keyboards.
Unfortunately, these visual indications are not particularly effective. The reason is that most typists, especially touch typists, do not concentrate on the monitor or keyboard while they are typing. In fact, they are trained to ignore both and concentrate on the text being transcribed. Consequently, when the capslock key is inadvertently pressed to the "ON" mode (or the operator forgets to turn the key to the "OFF" mode), the operator does not notice that many lines are typed in capital letters and must be retyped, all at substantial cost and lose of time.
It is, therefore, a principal object of this invention to provide means to alert the typist that the capslock mode is "ON" by providing an audible indication that the capslock mode has been activated. Recognizing that millions of keyboards are in place throughout the world, one embodiment of the present invention is designed as an attachment to existing keyboards. Another embodiment incorporates the invention into the circuitry of new computer keyboards. A further embodiment incorporates the invention in the design of software, or as hybrid of both hardware and software.

Computer system having capslock ON audible warning signal


Disclosed are methods and apparatus for guaranteeing restoration of traffic between one or more cable modems and a backup cable modem termination system upon failure of an active cable modem termination system are disclosed. Subscriber information associated with one or more cable modems are received from an active cable modem termination system. The subscriber information includes one or more subscriber identifiers. For instance, the subscriber information may include a primary subscriber identifier that identifies a particular cable modem as well as a secondary subscriber identifier that is assigned to high priority traffic such as that being transmitted in real-time. In addition, the subscriber information may also include a scheduling type that is further used to categorize the real-time traffic, such as into voice or video traffic. The subscriber information is then prioritized in an order in which the transmission of messages between the one or more cable modems and the backup cable modem are to be restored. For instance, the subscriber information may be prioritized according to time of receipt of the subscriber information, presence of secondary subscriber identifier, and/or scheduling type. The cable modems are then polled according to this priority order.

The present invention relates to digital computer network technology. More specifically, it relates to methods and apparatus for restoring traffic within an access network.
Broadband access technologies such as cable, fiber optic, and wireless have made rapid progress in recent years. Recently there has been a convergence of voice and data networks which is due in part to United States deregulation of the telecommunications industry. In order to stay competitive, companies offering broadband access technologies need to support voice, video, and other high-bandwidth applications over their local access networks. For networks that use a shared access medium to communicate between subscribers and the service provider (e.g., cable networks, wireless networks, etc.), providing reliable high-quality voice/video communication over such networks is not an easy task.
One type of broadband access technology relates to cable modem networks. A cable modem network or "cable plant" employs cable modems, which are an improvement of conventional PC data modems and provide high speed connectivity. Cable modems are therefore instrumental in transforming the cable system into a full service provider of video, voice and data telecommunications services.
A head end complex and cable modem typically communicate. This communication may be one-way or two-way between the cable modem and head end complex. In one way communication, the cable modem merely receives data from the head end complex, but cannot transmit data to the head end complex. For example, the cable modem cannot request particular types of data from the head end complex. In two-way communication, the cable modem can transmit data (e.g., data requests) to the head end complex.
There are circumstances that may interfere with the communication between a cable Head End and a cable modem. As one example, there may be a hardware failure of the cable Head End. As another example, there may be a software failure within the cable Head End. As yet another example, there may be a power outage that causes communication between the cable Head End and the cable modem to be disrupted.
In order to ensure that communication between a cable Head End and a cable modem has not been interrupted, a handshake is typically exchanged between the cable Head End and the cable modem. More particularly, this handshake is typically initiated by the cable Head End. Thus, when the cable modem does not receive a communication from the cable Head End within a period of time, the cable modem declares a time out.
When a time out occurs, the cable modem initiates a new connection with the cable Head End. Unfortunately, this new connection takes time to establish. For instance, it may take up to 24 seconds to rebuild a connection between a cable modem and its cable Head End.
In the event that a cable Head End fails, it would be undesirable to abruptly disconnect the modem from the cable Head End to re-initiate a connection. This is particularly undesirable when real-time traffic such as voice or video data is being transmitted. Even if the connection were merely delayed, such a substantial delay during a real-time transmission such as a phone call is unacceptable.
In view of the above, it would be desirable to prevent a time out of a cable modem when a cable Head End fails. Moreover, it would be desirable if the effects of a time out could be minimized.

Apparatus and method for restoring traffic during failover in a cable head end