A reprogrammable address selector is incorporated in an embedded DRAM array which has a plurality of addressable DRAM components. The reprogrammable address selector responds to an address signal defining a unique response address. One of a plurality of selected response addresses may be electrically and selectively programmed into the selector as a substitute for a fixed response address. Thereafter the addressable DRAM component responds to the programmed response address rather than the fixed response address. The programmed response address is programmed from address signals applied on the bus.

A DRAM is a memory element which holds and supplies information for use by electronic computing and logic elements, such as microcontrollers, microprocessors, logic arrays, and the like. An ASIC or a SLIC is a single IC which includes a combination of various electronic components, such as microcontrollers, microprocessors, logic gates, registers, amplifiers and the like, all of which have been selected, connected and integrated together to perform specific functions for a specific application. Examples of SLICs are controllers for computer memory disc drives, graphics controllers, LAN switches, fuel injector control systems for internal combustion engines, global positioning systems, and control devices for a wide variety of consumer products, among many other things. SLICs are desirable for use in mass produced products because of the enormous amount of functionality which can be created at a very low effective cost. These types of SLICs are sometimes referred to as a "system on a chip," because of the complete functionality obtained from the single chip or IC.
DRAMs have only recently been incorporated as part of SLICs. Previously, when the SLIC required memory to function, separate memories or DRAM chips were provided on a printed circuit board. Embedding DRAM in a SLIC avoids the additional cost of a separate memory chip. Avoiding the cost of the separate DRAM chip is attractive when the SLIC itself requires only a small amount of memory, because separate DRAM chips are relatively costly and of considerable memory size.
The typical semiconductor fabrication process almost always creates some number of defective chips, simply because of the complexity of the fabrication process and the large number of variables which must be precisely controlled during the process to obtain a fully functional chip. The number of fully functional chips created relative to the number of chips started or attempted is known as the "yield." If the yield is high, a lower effective cost per functional chip results, since the cost per chip is inversely proportional to the yield. Because of the highly competitive nature of semiconductor fabrication business, it is essential to obtain the highest possible yield to keep the individual costs of each functional chip as low as possible.
Fabrication of a SLIC with an embedded DRAM typically presents a much higher risk of defects and lower yields than the fabrication of a SLIC without an embedded DRAM. The DRAM is formed by tens or hundreds of thousands of repetitive and closely spaced components, resulting in a very high "density" of elements. High densities inherently create a greater possibility of defects arising during fabrication. Thus, embedding a DRAM in a SLIC simply raises the risk of reduced yields and a higher effective cost for each of the functional SLICs produced.
The embedded DRAM portion of the SLIC usually represents a relatively small portion of the overall size of the typical SLIC. If this were not the case, it would be more cost effective to use a separate DRAM chip in combination with the SLIC. The impact of a defect arising from a defective DRAM portion of the SLIC is therefore typically much greater than its contribution toward the size and cost of the complete SLIC. It is perhaps for these reasons and others that DRAMs have not been embedded in SLICs on a widespread and commercial basis.
In contrast, commercial DRAM chips are fabricated with special DRAM fabrication processes that have been specifically developed to address the unique fabrication requirements of DRAMs. These DRAM processes have evolved over many years to improve density and enhance yields. However, these special DRAM processes are not particularly attractive for use in fabricating SLICs with embedded DRAMs, because many of the other non-DRAM components of the SLIC do not require or respond favorably to such special DRAM fabrication process. Thus, the special DRAM fabrication process is usually unnecessary and potentially expensive when applied to the remainder of the SLIC. The relative size contribution of the embedded DRAM to the overall size of the SLIC often will not justify the use of a special DRAM fabrication process, even if the DRAM fabrication process could be favorably applied to the remaining elements of the SLIC. Furthermore, the influences from the other non-DRAM components of the SLIC, such as noise, may require DRAM circuit designs which are not optimal for response to such special DRAM fabrication processes.
In order to address the defect problem in fabricating semiconductor chips, it is typical to include redundant elements. Upon detecting a defective element by testing after fabrication, the defective element is bypassed and one of the redundant elements is substituted in its place. In this manner the chip can be salvaged and made fully functional.
Redundancy is typically implemented by using a laser to explode or evaporate conductors formed in the chip, and thereby physically disconnect the defective components and substitute the functional redundant components. However, this laser programmed redundancy technique is not cost-effective in the circumstance of a relatively small size contribution of the embedded DRAM to the SLIC. The cost of the laser and the testing equipment is significant, as is time and costs to program and apply the laser to the minute pattern of DRAM conductors and components on the chip. A standard SLIC test environment must be maintained to test the SLIC, because of the high relative proportion of non-DRAM components and to assure proper functionality of the SLIC itself. If the costs of laser programmed redundancy were added to the standard SLIC test processes, the resulting test procedure would not be standard and could possibly escalate the costs of fabrication to the point of making the entire SLIC process cost-ineffective.
These considerations are further complicated by the differing requirements for embedded DRAM for a variety of different SLICs. Typically a SLIC manufacturer will have a "library" of standard component designs which can be incorporated together in creating the SLIC, because of the wide variety of different circuitry which may be required in different SLICs. The standard library designs will include, for example, arrays of logic gates, microprocessors, DRAMs and the like. The cost effectiveness of competing in the SLIC fabrication market depends on the ability to integrate the standard library designs together in creating the SLIC, without specifically having to redesign each component each time it is used in a different SLIC. Generally, successfully integrating different standard designs will require the ability to physically reposition the standard components on the chip to accommodate differing customer requirements. Furthermore, testing the SLIC is complicated by the different contributions and combinations of the standard designs, since a method must be devised to specifically test each component, even though the components may be combined in different patterns and relationships in different SLICs. Developing a unique test program for each different SLIC can also increase the overall costs of the SLIC.
Testing the SLIC is always accomplished initially after fabrication, and in addition, many SLICs also utilize a built in self test (BIST) to test the SLIC upon initially applying power. In general, the BIST program is executed to write a test pattern of signals to the DRAM array and thereafter to read the signals back from the DRAM array. The signals read from the array are compared with the signals which were written to the array, and the comparison reveals any defects in the DRAM. Each memory cell of the DRAM must be tested, and because a typical DRAM array has a large number of memory cells, BIST testing can occupy a considerable amount of time. While the BIST test occurs, the SLIC is not operational. BIST testing may delay the time when the SLIC becomes fully functional and able to respond in the environment in which it is intended to the used.
Substituting a redundant fully functional segment of a DRAM memory for a defective DRAM memory segment may also create difficulties in executing the operational software of the SLIC. The operational software maintains a memory map of the addresses of the functional memory, and these addresses are used by the software to achieve proper functionality. If a defective DRAM segment has one of the addresses in the range of the memory map, a memory remapper must be employed to translate the address signals generated by the operational software to the new address of the substituted redundant element. In general, memory remappers consume extra time to accomplish the address translation, and this extra time may degrade the performance of the SLIC. Thus, although redundancy may achieve a functional SLIC, the performance of the SLIC may suffer as a result of substituting those redundant elements which must be addressed during the normal functionality of the system software.
For all of the above reasons, and others, it is important to achieve high levels of performance from the DRAM embedded in SLICs and ICs, while using conventional SLIC manufacturing processes and redundancy techniques to fabricate the different types and configurations of SLICs. It is with respect to these and other considerations that the present invention has evolved.

Reprogrammable address selector for an embedded DRAM


A method of profiling the border of termination paste applied to a chip capacitor electrode comprising the steps of casting a layer of termination paste of finite thickness; passing a profiling element through the upper part of the layer of paste, the element having an exterior profile that is arranged to dip into the paste and scrape some of the paste from the upper part of the paste layer to form a reverse profile in the layer of the paste; and, dipping a chip capacitor electrode into the paste layer at the reverse profile formed therein, to terminate the capacitor with the profile formed in the paste.

1. Field of the Invention
This invention pertains to the field of computer chip capacitor electrode termination. More particularly, this invention is a unique method of profiling the wet paste layer to control the border the termination paste makes with the computer chip capacitor (chip) to insure that there are no areas where the paste dips toward the edge of the chip or thins out to adversely affect the ultimate properties of the finished chip.
2. Description of the Prior Art
Computers and other electronic appliances are growing in importance in our daily lives at a rate that appears to be reaching exponential proportions. These electronic devices reach all ages and areas of endeavor. Infants are exposed to computers through electronically-based games that teach musical tones and image recognition, such as cows, trucks, bananas, etc. Preschoolers play games on computers that lay the basis for later learning math, reading and geography. Elementary, Junior High, High School and College students take classes in computer theory, programming and operation. For those who entered the work force before computers became a part of the school curriculum, there are seminars, home-study courses and public television courses that introduce one to computers, computer operation and software operation. Virtually every business in the United States of America uses computers somewhere in its operation.
The use of computers to undertake business functions and educational activities has created a demand for more computer capacity and faster processing times. What started out as a simple Commodore.RTM. 64 computer with black/white monitor (having 64 k of memory utilizing a very short program) now is a 1-32 megabyte RAM/5 Gigabyte hard drive computer with color monitor, offering programs that include moving pictures and music. In addition, other electronic devices, such as VCRs, television sets, cameras, camcorders, auto alarms, radios and the like are using more and more computer hardware to become more user-friendly with expanded capabilities. Competition among various electronic companies has forced computer and computer-accessory manufacturers to design more powerful and more capable circuitry. Just one indication of the astonishing rate of computer development is seen in the case of hard drives. In the past 15 years, hard drive storage capacity has increased at an average annual rate of a factor of three. Where in 1982 a standard hard drive was 10 megabytes, it has grown to 5 Gigabytes in 1997.
At the center of all this activity is a device so small that one could easily miss its existence, if not careful to look for it. It is a miniature capacitor, of a general size of 0.040 inches long with a square or rectangular cross-section 0.020 inches on a side, with spaced-apart flat end surfaces. These devices are constructed of multiple layers of electrically conductive material held apart by a ceramic dielectric matrix that is fired to produce a hard, minute device much smaller than a grain of rice. Used by the thousands in computer circuitry, these capacitors, called "chips" by those in the trade, are in great demand.
In the circuitry, they are soldered directly to the computer circuit board on their flat side surface and often resemble miniature bumps on the circuit board. For this special soldering technique, the end or edge surfaces of the conductive layers in the chips are coated with a silver paste and fired, at high heat, to cure or set the silver paste to a coating that is easily soldered to a specially designed copper "flat" located on the computer circuit board. To coat these ends of the chips there has been invented hand-operated tools with which to position the chips for coating with a wet, curable compound, reference U.S. Pat. Nos. 4,381,321; 4,393,808; 4,395,184; and 4,526,129.
In this prior art practice, a layer of the wet paste is cast on a planar surface, the top of the layer is scraped to a level surface of desired thickness (usually 0.005 inches), and then the chips are dipped into the layer to apply a coat of the paste in a band along the chip edge to a depth of 0.005 inches. The chip with its band of wet paste is then passed through a dryer and then the chip reversed and the opposite, uncoated edge dipped in another, similar layer of paste and then dried to complete the termination process.
A problem has developed in that the surface tension of the paste causes a momentary "belly" or dip to form along the entire length of the chip edge when it is dipped in the paste and about its edges with the lowest part of the dip being at the middle of the chip. Surface tension forces and the wettability of the paste blend out much of this belly over the next few seconds, however the surface tension at the corners of the chip remains unaffected, due in large part to the high tension at the sharp corners. The border of paste thereafter formed on the chip electrode often displays a distinct lower area or dip at the corner edges. Such unevenness in the border creates problems of current density coming into the chip from the underlying circuit tracing to which the chip is soldered. Additionally, the unevenness in the border at the corners of the chip results in less silver at the corners which makes the chip susceptible to damage during testing and/or mounting. Still further, when the border is uneven, the higher border at the middle of a chip whose corners are at the proper border height represents more silver than is necessary to terminate the chip and, when multiplied by the large number of chips that have this malady, represents a direct loss of value in the chip.
Changing the density of the paste, adding surface tension modifiers to the paste, and other such potential remedies have not proven adequate because of the effects they have on other properties of the chip.

Method of profiling the termination paste for chip capacitor electrodes


A map display apparatus according to the present invention has a display device capable of displaying a road map in different map forms in a base screen region and a window screen region. A control circuit determines whether the window screen is provided or not on the basis of input information entered through an input device, and determines which one of a planimetric map and a bird's-eye view is displayed in the base screen and the window screen. Either of the planimetric map and the bird's-eye view are displayed using road map data as a common map data base stored in a map storage memory, which eventually reduces the cost of the apparatus. When the window screen is displayed, a range of the road map including at least a range of the road map displayed in the base screen is displayed in the window screen, and an indication representing the range of the road map displayed in the base screen is displayed in the window screen.

There is known a map display apparatus for a motor vehicle, which displays a road map in the form of a so-called bird's-eye view, namely, displays the road map on a display device such that the road map around the current position of the vehicle (vehicle position) is displayed in a larger scale than a far side view (refer to laid-open Publication No. 2-244188 of unexamined Japanese Patent Application, for example). The apparatus disclosed in the above-identified publication places a view point behind the current position of the vehicle, and displays a view taken by looking down the map from this view point in the travelling direction of the vehicle, on a screen of the display device. In this manner of displaying the bird's-eye view, it is possible to display map information around the current position in a larger scale, and also display a wide range of map information ranging from the current position to a distance place. This makes it easier to visually grasp connecting conditions of junctions of roads. Further, the road map can be displayed with an increased sense of reality as if the driver himself/herself actually looked down the road map.
When the road map is displayed in the form of the bird's-eye view, however, the map scale is continuously varied from the lower edge of the screen toward the upper edge, making it difficult for the driver to grasp a sense of distance. When the driver is not accurately aware of road conditions around the vehicle position, as in the case where the vehicle is running through an area that is unfamiliar to the driver, it is more desirable to display an ordinary planimetric map on a map scale that does not vary in local parts of the map, rather than displaying the bird's-eye view.
If the processing for displaying the road map in the form of the bird's-eye view is effected using road map data independent of road map data used for displaying a planimetric map, there arises a need to newly add the road map data for the bird's-eye view, which may increase the cost of the apparatus.
It is an object of the present invention to provide a map display apparatus for a motor vehicle, which is capable of selecting as desired the map form of the road map displayed on the display device. It is another object of the present invention to provide a map display apparatus for a motor vehicle, which is able to display road maps in a plurality of different map forms at the same time. It is a further object of the present invention to provide a map display apparatus for a motor vehicle, which is able to display road maps of different map forms, using the same map data base.


Disclosed is a method of inhibiting anandamide amidase in an individual or animal and novel inhibitors of anandamide amidase. The disclosed method and novel compounds can be used to reduce pain in an individual or animal suffering from pain, reducing nausea in an individual undergoing chemotherapy, for example cancer chemotherapy, suppressing appetite in an individual, reducing intraocular pressure in the eye of an individual or animal suffering from glaucoma and suppressing the immune system in an individual with an organ transplant.

.DELTA..sup.9 -Tetrahydrocannabinol, the pyschoactive marijuana derived cannabinoid, binds to the CB1 receptor in the brain and to the CB2 receptor in the spleen. Compounds which stimulate the CB1 receptor have been shown to induce analgesia and sedation, to cause mood elevation, to control nausea and appetite and to lower intraocular pressure (Mechoulam, Cannabinoids as Therapeutic Agents, CRC Press, Boca Raton, Fla. (1986), Fride and Mechoulam, Eur. J. Pharmacol. 231:313 (1993), Crawley et al., Pharmacol. Biochem. Behav. 46:967 (1993) and Smith et al., J. Pharm. Exp. Therap. 270:219 (1994)). Cannabinoids have also been shown to suppress the immune system (Mechoulam, Cannabinoids as Therapeutic Agents, CRC Press, Boca Raton, Fla. (1986). Thus, compounds which stimulate the CB1 or CB2 receptor, directly or indirectly, are potentially useful in treating glaucoma, preventing tissue rejection in organ transplant patients, controlling nausea in patients undergoing chemotherapy, controlling pain and enhancing the appetite and controlling pain in individuals with AIDS Wasting Syndrome.
Arachidonyl ethanolamide (anandamide) is a naturally-occurring brain constituent that acts as a CB1 and CB2 agonist and exhibits pharmacological activity in mice comparable to cannabinoids (Fride and Mechoulam (1993), Crawley et al. (1993) and Smith et al. (1994)). Anandamide is cleaved in vivo by anandamide amidase. Thus, inhibitors of anandamide amidase have the effect of indirectly stimulating the CB1 and CB2 receptors by increasing in vivo levels of anandamide.
In addition to acting at the CB1 and CB2 receptors, cannabinoids also affect cellular membranes, thereby producing undesirable side effects such as drowsiness, impairment of monoamine oxidase function and impairment of non-receptor mediated brain function. The addictive and psychotropic properties of cannabinoids also limit their therapeutic value. Inhibitors of anandamide amidase are not expected to have the undesired membrane-related side-effects produced by cannabinoids. By providing an alternate mechanism for stimulating the CB1 and CB2 receptor, anandamide inhibitors might not have the addictive and psychotropic properties of cannabinoids. However, present inhibitors of anandamide amidase have disadvantages. For example, phenylmethylsulfonyl fluoride (PMSF) is toxic to cells. Thus, there is a need for new and more potent inhibitors of anandamide amidase which have reduced toxicity towards cells and which do not significantly interact with the CB1 or CB2 receptor at inhibitory concentrations.

Anandamide amidase inhibitors as analgesic agents


Systems, apparatus, methods and computer program products are described for producing text-to-speech synthesis with non-speech sounds. In general, some of the pauses or silences that would otherwise be generated in synthesized speech are instead synthesized as non-speech sounds such as breaths. Non-speech sounds can be identified from pre-recorded speech that can include meta-data such as the grammatical and phrasal structure of words and sounds that precede and succeed non-speech sounds. A non-speech sound can be selected for use in synthesized speech based on the words, punctuation, grammatical and phrasal structure of text from which the speech is being synthesized, or other characteristics.

The following disclosure generally relates to information systems.
In general, conventional text-to-speech application programs produce audible speech from written text. The text can be displayed, for example, in an application program executing on a personal computer or other device. For example, a blind or sight-impaired user of a personal computer can have text from a web page read aloud from the personal computer. Other text to speech applications include those that read from a textual database and provide corresponding audio to a user by way of a communication device, such as a telephone, cellular telephone, portable music player, in-vehicle navigation system or the like.
Speech from conventional text-to-speech applications typically sounds artificial or machine-like when compared to human speech. One reason for this result is that current text-to-speech applications often synthesize momentary pauses in speech with silence. The location and length of pauses is typically determined by parsing the written text and the punctuation in the text such as commas, periods, and paragraph delimiters. However, using empty silence to synthesize pauses, as conventional synthesis applications do, can lead listeners to feel a sense of breathlessness; particularly after lengthy exposure to the results of such synthesis. In human-produced speech, pauses can actually consist of breath intakes, mouth clicks and other non-speech sounds. These non-speech sounds provide subtle clues about the sounds and words that are about to follow. These clues are missing when pauses are synthesized as silence, thus requiring more listener effort to comprehend the synthesized speech.
Some text-to-speech applications produce speech that can include emotive vocal gestures such as laughing, sobbing, crying, scoffing and grunting. However, in general such gestures do not improve comprehension of the resultant speech. Moreover, these techniques rely on explicitly annotated input text to determine where to include the vocal gestures in the speech. Such annotated text may, for example, appear as follows, "What? <laugh1> You mean to tell me this is an improvement? <laugh4>." The text '<laugh1>' is an example of a specific textual command that directs the synthesis to produce a specific associated sound (e.g., a mocking laugh).

Using non-speech sounds during text-to-speech synthesis


It is an object of the present invention to prevent variations in sensitivity of the sensor circuits of the respective channels by equalizing the power of oscillation frequency signals to be distributed/supplied from one oscillation circuit to the sensor circuits of the respective channels. Multi-channel sensor circuits are arranged with a common oscillation circuit. A high-impedance conversion circuit is connected to the output terminal of the oscillation circuit. A first impedance matching circuit for performing impedance matching of resonance circuits of the respective channels with reference to the oscillation circuit is arranged on the output side of the high-impedance conversion circuit. Second impedance matching circuits for performing impedance matching of the oscillation circuit with reference to the resonance circuits are connected at the input terminals of the resonance circuits of the respective channels. The first impedance matching circuit is connected to the second impedance matching circuits through coaxial cables.

1. Field of the Invention
The present invention relates to an electrostatic sensor apparatus including a parallel arrangement of a plurality of sensor circuits, each designed to detect a change in exterior capacitance and output the resultant detection signal.
2. Description of the Prior Art
The present applicant has proposed a high-precision electrostatic sensor apparatus in, e.g., Japanese Patent Application No. 1-126234, which is capable of detecting a change in a very small electrostatic capacitance of 1.times.10.sup.-5 pF.
As shown in FIG. 1, this apparatus includes an oscillation circuit 1, a high-impedance conversion circuit 1a connected to the output terminal of the oscillation circuit 1, a resonance circuit 2, a detection electrode 3 for detecting a change in electrostatic capacitance with respect the electrostatic capacitance of an object to be detected, a detection circuit 4, and an amplifier circuit 5. The oscillation circuit 1 and the resonance circuit 2 respectively include ceramic resonators as independent dielectric resonators. For example, as shown in FIG. 2, a resonant frequency f.sub.0 of the resonance circuit 2 is set to be slightly shifted from a fixed oscillation frequency f.sub.1 of the oscillation circuit 1, and the resonant frequency f.sub.0 is shifted by .DELTA.f in correspondence with a small capacitance change .DELTA.C detected by electrode 3. The electrostatic capacitance change .DELTA.C is then converted into an output voltage .DELTA.V. The voltage .DELTA.V is detected/amplified and extracted.
Recently, there has been a demand for parallel processing of detection signals based on a plurality of electrostatic capacitances detected by an electrostatic sensor apparatus. In order to realize such parallel processing of signals, a plurality of channels, each including a sensor circuit consisting of the above-mentioned components from the oscillation circuit 1 to the amplifier circuit 5, may be adjacently arranged.
When, however, a plurality of channels, each including a sensor circuit consisting of the components from the oscillation circuit 1 to the amplifier circuit 5, are to be adjacently arranged, even a slight difference between the oscillation frequencies of the respective channels can cause interference, e.g., resonance between the oscillation frequencies of the respective channels. Consequently, accurate signal processing cannot be performed.
In order to solve such a problem, the present applicant has proposed a multi-channel electrostatic sensor apparatus in Japanese Patent Laid-Open No. 1-261756, in which a plurality of sensor circuits 6a, 6b, and 6c are operated with a common oscillation circuit 1, as shown in FIG. 3. According to this apparatus, there is no possibility of a shift in oscillation frequency signals supplied from the single oscillation circuit 1 to the sensor circuits 6a, 6b, and 6c of the respective channels through a high-impedance conversion circuit 1a, thus solving the problem of interference caused by the above-mentioned oscillation frequency shift.
However, in the system for distributing/supplying oscillation frequency signals to resonance circuits 2 of the respective channels by using the common oscillation circuit 1, impedance mismatching is caused on the resonance circuit 2 for the oscillation circuit 1 side. The oscillation frequency supplied to the resonance circuit 2 of each channel then distortion due to the influence of a reflected wave from each impedance mismatching portion. And loss of resonant curve or error in an output from each resonance circuit 2. For example, the resonance circuit 2 of the sensor circuit 6a has oscillation frequency characteristics indicated by the resonant curve shown in FIG. 4, whereas the resonance circuit 2 of the sensor circuit 6b has oscillation frequency characteristics indicated by the resonant curve shown in FIG. 5. That is, outputs or the waveforms of signals output to the resonance circuits 2 of the respective channels differ from each other, and the sensitivities of the sensor circuits of the respective channels of the electrostatic sensor apparatus vary.

Apparatus for matching impedance in an electrostatic sensor


A connector detection circuit is used for detecting whether a first connector of an electronic device is in sufficient connection with a second connector of a connection device. The connector detection circuit includes a pressure sensing module, a switch unit, and an indicator. The pressure sensing module is located under the pins of the first connector, to sense whether there is pressure applied on each pin of the first connector by a corresponding pin of the second connector, and to output sensed results. The switch unit is connected to the pressure sensing module to receive the sensed results, and is connected to the indicator to control the indicator to indicate whether the first connector and the second connector have a sufficient connection with each other according to the sensed results.

1. Technical Field
The present disclosure relates to electronic devices, and particularly to an electronic device with a connector detection circuit.
2. Description of Related Art
Universal serial bus (USB) and serial advanced technology attachment (SATA) are popular connector communication standards used on many electronic devices. For example, a USB device or a USB data cable with a USB connector is usually connected to a computer for transmitting data. However, when the transmission of data fails, it is difficult to know whether the USB connector has an insufficient contact with the computer or whether the USB device itself is defective.

Electronic device and connector detection circuit thereof

HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.


A system for transmitting information from a source to a destination using multilevel signaling. Multiple conductors are coupled between the transmission source and the transmission destination. Multiple drivers are coupled to the conductors at the transmission source. Each driver is coupled to a pair of conductors. Multiple comparators are coupled to the conductors at the transmission destination. Each comparator is coupled to a pair of conductors. The information is encoded into a sequence of symbols in which each symbol represents a unique permutation of signal levels on the conductors. Each signal level is used at least once for each symbol. All signal levels associated with a particular symbol are transmitted over the conductors simultaneously.

1. Field of the Invention
The present invention relates to a multilevel signaling system for transmitting signals across a multiconductor transmission line.
2. Background
Various techniques and systems are available for transmitting data between a source and a destination. When data is electrically transmitted across a conductor, a particular signaling technology or protocol is utilized. A set of symbols may be associated with specific signaling technologies. The symbols are used to encode the data into various electrical patterns on the transmission line conductors such that each symbol may be distinguished from other signals by analyzing the electrical pattern on the conductors. The conductors used to transmit data include wires, cables, traces on printed circuit boards, conductors embedded within a substrate, and various other conductive materials.
In certain data transmission systems, the conductors are treated as transmission lines and analyzed by considering various electrical and electromagnetic wave properties and characteristics. In these systems, the signaling technology may include the coupling of signal drivers, signal receivers, conductors, and termination devices.
A particular type of data transmission system transmits signals differentially. For example, FIG. 1 illustrates a known differential transmission system using a pair of conductors. A differential driver 10 receives data on input 12 and transmits differential signals across conductors 14 and 16. Conductor 14 is coupled to the non-inverting output of driver 10 and conductor 16 is coupled to the inverting output of driver 10. A differential receiver 18 (also referred to as a differential comparator) receives the differential signals from conductors 14 and 16, and generates an output on line 20. Conductor 14 is coupled to the non-inverting input of receiver 18 and conductor 16 is coupled to the inverting input of receiver 18. A pair of terminating resistors 22, 24 are coupled between conductors 14 and 16, and a terminating voltage V.sub.term.
In the system of FIG. 1, the pair of conductors 14, 16 are capable of transmitting two symbols representing a binary zero or binary one. The data provided to driver 10 represents one of two possible symbols; e.g., a binary zero or one. Driver 10 transmits a particular signal pattern on conductors 14, 16 based on the input data provided to the driver. For example, when a binary zero is the input data, driver 10 generates a logic low signal on its non-inverting output which is coupled to conductor 14. Driver 10 also generates a logic high signal on its inverting output which is coupled to conductor 16. Conversely, when a binary one is the input data, driver 10 generates a logic high signal on its non-inverting output and generates a logic low signal on its inverting output. Thus, the polarity of the outputs from differential driver 10 are always opposite one another. The output polarity is controlled by the input signal applied to driver 10.
Differential driver 10 may be a current mode driver which produces output currents (i.sub.0 and i.sub.1) in response to the input provided. The value of v.sub.0 is defined as v.sub.0 =V.sub.term -i.sub.0 R.sub.t. Similarly, the value of v.sub.1 is defined as v.sub.1 =V.sub.term -i.sub.1 R.sub.t. Receiver 18 compares the voltage levels on its two inputs and generates the data output signal corresponding to the input provided to driver 10.
The differential signaling system illustrated in FIG. 1 requires two conductors 14, 16 to transmit a single bit of data. Therefore, this method results in an inefficient use of data interconnect resources (number of conductors =2.times.number of bits transmitted). Certain applications may require a more efficient use of interconnect resources in a differential transmission system. Thus, it is desirable to provide a system having the advantages provided by differential signaling, but without the inefficient ratio of the number of conductors to the number of bits transmitted.

Apparatus and method for multilevel signaling


A method and system providing a multi-memristive synaptic element for a cognitive computing system. The multi-memristive synaptic element comprises an array of memristive devices. The method comprises arbitrating a synaptic weight allocation, a related synaptic weight being represented by a synaptic weight variable of said multi-memristive synaptic element, updating said synaptic weight variable by a delta amount, and assigning said memristive devices to elements of a clock-like ordered circular list for selecting a particular memristor of said memristive devices requiring to be updated by a deterministic, periodic global clock that points to a different memristor at every clock tick, such that said multi-memristive synaptic element has a larger dynamic range and a more linear conductance response than a single memristor synaptic element.

It is widely believed that mankind is entering the third era of cognitive computers. Cognitive computers may extend the boundaries of human cognition by deriving insights and intelligence from the vast amount of data at our disposal. Today's cognitive computers are still based on the von Neumann computing architecture that is highly area/power inefficient due to the physical separation between memory and logic. To address this challenge, an alternative brain inspired neuromorphic computing architecture is heavily researched—either to complement the existing cognitive computers or to replace them in the long run. However, to fully realize the areal/power benefits of such architecture, it is essential to realize the synaptic and possibly the neuronal elements using nanoscale memristive devices. Memristive devices are resistive devices whose resistance depends on the history of the current that had previously flown through it. They can be arranged in high-density crossbar arrays and each memristor can be used to store multiple bits of information. These properties make memristors a suitable to be used as synapses in neuronal networks, in which is a vast amount of synapses with analog values. However, memristors have limitations such as nonlinearity, limited dynamic range, a symmetric conductance response and devise variability that pose a key challenge. To achieve satisfactory network performance, it is essential to have a linear symmetric device with enough dynamic range.
There are several disclosures relating to a method providing a multi-memristive synaptic element for a cognitive computing system. For example, US 20150170028 A1 discloses a method of providing memristive devices in a neural network and updating weights of each synapse between an input layer neuron and an output layer neuron, wherein the weight is spike timing modulated with updates. This method may be used for pattern recognition. Additionally, the method includes classifying a spike pattern represented by a set of inter-spike intervals, regardless of noise in the spike pattern.
Further, US 20090292661 A1 discloses a method of utilizing memristor arrays in neural networks and implementing synaptic weight updates. The document pertains to compact synaptic circuits and networks comprising compact synaptic circuits that exhibit functional characteristics of biological synapses and networks of synapses including, but not limited to, spike timing dependent plasticity.
However, it is a known disadvantage of traditional approaches to address and synchronize sub-elements of the memristor devices even if arrays of memristors are used.
Hence, there may be a need to overcome the limitations of traditional approaches, namely the nonlinearity of memristors and a coordination of individual elements of a memristor array used as synaptic elements.

This patent is subject to a terminal disclaimer.

Multi-memristive synapse with clock-arbitrated weight update

International Business Machines Corporation


According to one aspect, a medical system may include an instrument including an end effector for acting as a monopolar electrode. The end effector may be configured to be positioned in a body of a subject and emit radiofrequency energy towards a target area in the body. The medical system may further include a return electrode. The return electrode may be deliverable within the body proximate the target area and separately from the instrument and the monopolar electrode. The return electrode may be configured to contact tissue in the body proximate the target area and receive radiofrequency energy emitted from the end effector.

Medical devices are often used to extract undesired and/or foreign material from the body. These medical devices use various extraction methods, such as dissection, coagulation, fulguration, ablation, etc., of undesired body matter. An example of a type of procedure that uses such methods is electrosurgery. Electrosurgery involves the application of energy to biological tissue to cut, coagulate, desiccate, or fulgurate tissue. Electrosurgery uses various types of high-frequency electrical energy to directly heat the tissue.
Generally, electrosurgery is performed using a radio frequency electrosurgical generator and a hand piece including one or two electrodes. A monopolar instrument comprises only one active electrode while a bipolar instrument includes two active electrodes at the surgical site. The monopolar instrument requires the application of another instrument called a dispersive or return electrode elsewhere on or otherwise coupled to the patient's body to defocus or disperse the radio frequency current and returning the energy to the electrosurgical generator to prevent injury to the underlying tissue. However, often injury to the patient can occur from the energy traveling a large distance from the active electrode through the body to the return electrode. Also, doctors must be careful to avoid complications such as direct coupling, insulation failure, and capacitive coupling, among other potential complications that may result in patient injury.
A bipolar electrosurgical instrument typically includes forceps or other end effectors with the two tines of the forceps performing the active and return electrode functions, with only the tissue grasped by the forceps included in the electrical circuit. Bipolar instruments require less voltage than monopolar instruments, and since the active and return electrodes are at the site of surgery, the risk of accidental injury to the patient is less compared to monopolar devices. Bipolar instruments perform well when sealing vessels, however they include lateral thermal spread that will continue until the device activation is ceased. Bipolar electrosurgical instruments are limited in their application and provide less precise cutting compared to monopolar instruments. There is a need for a hybrid between monopolar and bipolar electrosurgical instruments that may utilize voltages similar to bipolar instruments and yet have similar cutting power to monopolar instruments.
Conventional electrosurgical devices often have large profiles and are not configured to be inserted into difficult to reach areas of the body or for use with endoscopic devices. There is a need for an electrosurgical device with a small cutting electrode that mitigates thermal perforation while maintaining a high level of cutting performance. Furthermore, there is a need for an electrosurgical device optimized for use in endoscopic procedures.

Methods and devices for performing electrosurgery


An imaging apparatus including a first lens unit with positive power in which the most object-side surface is concave and the most image-side surface is convex, an aperture stop, a second lens unit with positive power in which the most object-side surface is convex and the most image-side surface is concave, and a third lens unit with positive power; and an image sensor. Air spacing between the second lens unit and the third lens unit assumes the shape of a biconvex air lens. The imaging apparatus satisfies the following condition:1.4≦|r 2R|/IH≦15.0where IH is the maximum photographic image height, which is a half of the diagonal length, in an effective imaging area, of the image sensor, and r 2R is the radius of curvature, measured along the optical axis, of the most image-side surface of the second lens unit.

1. Field of the Invention
This invention relates to an imaging apparatus used in an electronic imaging system of a digital camera, and in particular, to an electronic imaging apparatus equipped with a photographing optical system in which good performance is obtained even in the use of a CCD with the number of pixels of 3M (mega) or more, the ratio of the entire lens length to an image height can be reduced to 4.5 or less, and a single focus lens with a half angle of view of 25 degrees or more is provided.
2. Description of Related Art
Recently, the compact and high-pixel-density design of an imaging apparatus using an electronic imaging system, such as a digital camera or a mobile phone with a camera, has been increasingly advanced. Consequently, a demand for a compact and high-performance design of a lens system used in such an imaging apparatus has significantly increased.
The single focus lens used in the electronic imaging apparatus, in which its focal length is not changed, is easily used at a half angle of view of 25 degrees or more, in view of the fact that there are various photographic scenes, for example, personal photography, landscape photography, and photography of information such as letters.
Prior art that takes aim at such a half angle of view of 25 degrees or more is set forth, for example, in Japanese Patent Kokai Nos. 2000-321489, 2003-195158, 2001-100092, 2001-21800, and 2000-193884.

Olympus Corporation and Olympus Imaging Corp.


A new and distinct Chamelaucium cultivar named ‘ROTEMWAX’ is disclosed, characterized by a unique deep pink color throughout the flower. The new variety is early blooming and is very well branched. The new variety is a Chamelaucium, normally producing cut flower stems, or as a garden or container plant.

The new Chamelaucium cultivar is a product of a planned breeding program conducted by the inventor, Nitzan Nir, in Kfar Hess, Israel. The objective of the breeding program was to produce new Chamelaucium varieties for ornamental commercial applications. The new variety was selected as a hybrid seedling from the breeding program at a commercial nursery in Kfar Hess, Israel.
The seed parent is the unpatented variety referred to as Chamelaucium uncinatum 'M.B.Violet' The pollen parent is the unpatented variety referred to as Chamelaucium uncinatum 'M.B. Orchid'. The new variety was discovered in December of 2008 by the inventor in a group of seedlings resulting from the previously mentioned crossing in a commercial nursery in Kfar Hess, Israel.
Asexual reproduction of the new cultivar has been performed by vegetative cuttings. This was first performed at a commercial nursery in Kfar Hess, Israel in November of 2009 and has shown that the unique features of this cultivar are stable and reproduced true to type in successive generations.


A three-pole, metal-encased, pressurized-gas-insulated, high-voltage switchgear may include a single-pole, encapsulated, high-voltage power switch. Breaker units are located in a pressure chamber and are arranged with longitudinal axes thereof parallel to one another, and are attached to a bearing component which also carries the casing of the drive. In order to increase the mechanical rigidity of the bearing component, a shared gear casing with two partitions is provided for the switching mechanism, to which the breaker units are attached via bearing rings. The bearing rings, held by bridges, lie in front of three apertures on a side wall of the gear casing, to the flanges of which the pressure chambers are also attached. In the interior of the gear casing, carriers for the bearings of the drive shafts are provided, which proceed from the partitions or an outer wall. All bearing and sealing surfaces of the gear casing lie in parallel planes in each case, and can be machined in a single clamping process. The shared gear casing for the switching mechanism is suitable for single-pole, encapsulated, pressurized-gas-insulated, high-voltage power switches of three-pole, metal-encased, pressurized-gas-insulated, high-voltage switchgears.

The invention relates to a three-pole, metal-encased, pressurized-gas-insulated, high-voltage switchgear with a single-pole, encapsulated, high-voltage power switch, with several breaker units lying next to each other, encapsulated with one pole in pressure chambers, which are each attached to a bearing component which is connected with a casing of the drive and of the switching mechanism, and the parallel axes of which run parallel to each other.
From FR 20 89 315, a multi-pole, encapsulated high-voltage switch with several breaker units lying next to one another in a shared casing is known, in which the switching mechanism is also housed in the same casing as the breaker units. The breaker units are each connected with the shared casing at their two ends, so that complicated disassembly is required for maintenance.
It is known, especially from CH-PS-558 094, to encapsulate the poles of the power switch of a three-pole, metal-encased, pressurized-gas-insulated, high-voltage switchgear in single-pole manner in each case, so that the breaker units of each pole are each housed in a separate pressure chamber, which is closed off by a cover on the frontal side.
From CH-PS-648 152 (cf. there particularly FIGS. 1 to 4), a multi-pole, metal-encased, pressurized-gas-insulated high-voltage switchgear of the type stated initially is known, in which the pressure chambers of the individual breaker units are each rigidly connected with the shared gear casing. There, the breaker units are each attached individually, in the individual pressure chambers.

Three-pole, metal-encased, pressurized-gas-insulated, high-voltage switchgear


Systems and methods related to digital frequency locked looping to synchronize frequencies between the local signal from a local oscillator and a reference clock signal from a remote oscillator. A reference counter increments its count for every pulse in the reference clock signal. The value in the reference counter is compared to a configurable reference value. Whenever a match between the reference counter value and the reference value occurs, a hit signal is generated and the reference counter value is reinitialized. Concurrent with the above, a feedback counter increments for every pulse from the local signal. When the hit signal is generated, the value in the feedback counter is compared to a configurable feedback value (by subtraction) to generate a difference value. The difference value is then converted to a frequency adjust signal for use in either increasing or decreasing the frequency of the local oscillator. The hit signal also reinitializes the feedback counter.

The revolution in digital electronics and communications has given rise to a multitude of digital devices for the consumer. Digital music players and cellular telephone handsets are just two results from this revolution. For some of these devices, the clock signals which run their digital electronics components may need to be synchronized. As an example, to ensure that device A properly works with device B, their clock signals may need to be frequency synchronized with one another.
While clock synchronization may be possible using a phase locked loop (PLL), this approach requires complex signal processing and is unsuitable for low power applications. Furthermore, phase locked loops are not necessarily able to adjust to changing conditions. Inexpensive PLLs may be unable to adjust if one of the clock signals it is tracking drifts from its expected frequency. A PLL is also quite more than what is needed in some applications which may only require frequency tracking and not necessarily phase tracking between two signals.
There is therefore a need for frequency locked looping suitable for use with digital electronics that does not require complex signal processing and that is simple to implement. It would also be preferable if such a solution were also suitable for use in synchronizing clock signals across a wireless link. Preferably, the solution would be able to adjust the frequency of a VCO (voltage controlled oscillator).


A current perpendicular to plane (CPP) magnetoresistive sensor having a current path defined by first and second overlying insulation layers between which an electrically conductive lead makes content with a surface of the sensor stack. The current path being narrower than the width of the sensor stack allows the outer edges of the sensor stack to be moved outside of the active area of the sensor. This results in a sensor that is unaffected by damage at outer edges of the sensor layers. The sensor stack includes a free layer that is biased by direct exchange coupling with a layer of antiferromagnetic material (AFM layer). The strength of the exchange field can be controlled by adding Cr to the AFM material to ensure that the exchange field is sufficiently weak to avoid pinning the free layer.

The heart of a computer is an assembly that is referred to as a magnetic disk drive. The magnetic disk drive includes a rotating magnetic disk, write and read heads that are suspended by a suspension arm adjacent to a surface of the rotating magnetic disk and an actuator that swings the suspension arm to place the read and write heads over selected circular tracks on the rotating disk. The read and write heads are directly located on a slider that has an air bearing surface (ABS). The suspension arm biases the slider into contact with the surface of the disk when the disk is not rotating but, when the disk rotates, air is swirled by the rotating disk. When the slider rides on the air bearing, the write and read heads are employed for writing magnetic impressions to and reading magnetic impressions from the rotating disk. The read and write heads are connected to processing circuitry that operates according to a computer program to implement the writing and reading functions.
The write head includes a coil layer embedded in first, second and third insulation layers (insulation stack), the insulation stack being sandwiched between first and second pole piece layers. A gap is formed between the first and second pole piece layers by a gap layer at an air bearing surface (ABS) of the write head and the pole piece layers are connected at a back gap. Current conducted to the coil layer induces a magnetic flux in the pole pieces which causes a magnetic field to fringe out at a write gap at the ABS for the purpose of writing the aforementioned magnetic impressions in tracks on the moving media, such as in circular tracks on the aforementioned rotating disk.
In current read head designs a spin valve sensor, also referred to as a giant magnetoresistive (GMR) sensor, has been employed for sensing magnetic fields from the rotating magnetic disk. The sensor includes a nonmagnetic conductive layer, hereinafter referred to as a spacer layer, sandwiched between first and second ferromagnetic layers, hereinafter referred to as a pinned layer and a free layer. First and second leads are connected to the spin valve sensor for conducting a sense current therethrough. The magnetization of the pinned layer is pinned perpendicular to the air bearing surface (ABS) and the magnetic moment of the free layer is located parallel to the ABS, but free to rotate in response to external magnetic fields. The magnetization of the pinned layer is typically pinned by exchange coupling with an antiferromagnetic layer.
The thickness of the spacer layer is chosen to be less than the mean free path of conduction electrons through the sensor. With this arrangement, a portion of the conduction electrons is scattered by the interfaces of the spacer layer with each of the pinned and free layers. When the magnetizations of the pinned and free layers are parallel with respect to one another, scattering is minimal and when the magnetizations of the pinned and free layer are antiparallel, scattering is maximized. Changes in scattering alter the resistance of the spin valve sensor in proportion to cos θ, where θ is the angle between the magnetizations of the pinned and free layers. In a read mode the resistance of the spin valve sensor changes proportionally to the magnitudes of the magnetic fields from the rotating disk. When a sense current is conducted through the spin valve sensor, resistance changes cause potential changes that are detected and processed as playback signals.
When a spin valve sensor employs a single pinned layer it is referred to as a simple spin valve. When a spin valve employs an antiparallel (AP) pinned layer it is referred to as an AP pinned spin valve. An AP spin valve includes first and second magnetic layers separated by a thin non-magnetic coupling layer such as Ru. The thickness of the spacer layer is chosen so as to antiparallel couple the magnetizations of the ferromagnetic layers of the pinned layer. A spin valve is also known as a top or bottom spin valve depending upon whether the pinning layer is at the top (formed after the free layer) or at the bottom (before the free layer).
The spin valve sensor is located between first and second nonmagnetic electrically insulating read gap layers and the first and second read gap layers are located between ferromagnetic first and second shield layers. In a merged magnetic head a single ferromagnetic layer functions as the second shield layer of the read head and as the first pole piece layer of the write head. In a piggyback head the second shield layer and the first pole piece layer are separate layers.
Magnetization of the pinned layer is usually fixed by exchange coupling one of the ferromagnetic layers (AP1) with a layer of antiferromagnetic material such as PtMn. While an antiferromagnetic (AFM) material such as PtMn does not in and of itself have a magnetization, when exchange coupled with a magnetic material, it can strongly pin the magnetization of the ferromagnetic layer.
The ever increasing demand for increased data rate and data capacity has lead a relentless push to develop magnetoresistive sensors having improved signal amplitude and reduced track width. Sensors that show promise in achieving higher signal amplitude include current perpendicular to plane (CPP) sensors. Such sensors conduct sense current from top to bottom, perpendicular to the planes of the sensor layers. Examples of CPP sensors include CPP GMR sensors and tunnel valve sensors. A CPP GMR sensor operates based on the spin dependent scattering of electrons through the sensor, similar to a more traditional CIP GMR sensor except that, as mentioned above, the sense current flows perpendicular to the plane of the layers. A tunnel valve operates based on the spin dependent tunneling of electrons through a non-magnetic, electrically insulating barrier layer.
Traditionally, the magnetization of the free layer has been accomplished by hard magnetic bias layers formed at either side of the sensor stack. However, the push for ever increased areal density has lead a continual push for sensors of ever decreasing size. As the size of the sensor shrinks, the free layer becomes less stable. The need for increased free layer stability is even more pronounced at higher signal amplitudes.
Another problem that arises as a result of the push for smaller sensors, is that as track width decreases, the magnetic performance of the sensor layers suffers. Manufacturing processes used to define the sensor (such as ion milling) cause a certain amount of damage to the sensor layers at the outside edges of the sensor. Areas nearer to the center are, however, unaffected by the manufacturing processes that damage the outside of the sensor. When sensors have a large track width, the damaged portion of the sensor layers at the outside of the sensor stack are a sufficiently small percentage of the sensor as a whole that the overall performance is not significantly affected. However, as sensor track width decreases, the damaged portion of the sensor makes up an unacceptably large percentage of the sensor, and performance suffers.
Therefore, there is a need for a sensor design that can provide increased free layer stability in CPP magnetoresistive sensor. There is also a need for a sensor design that can overcome the challenges presented by decreased track widths. Such a sensor would preferably overcome the performance problems caused by sensor damage at outside edges of the sensor stack.

Magnetoresistive sensor having biasing AFM layer in contact with free layer and a track width defined by a lead contact area

Hitachi Global Storage Technologies Netherlands B. V.


Converter systems are provided which complement sample capacitors in at least one converter stage with replica capacitors. The replica capacitors are switched to receive replica charges from the analog input signal during the same operational mode in which the sample capacitors receive undesirable remnant charges. In an initial portion of a subsequent operational mode, the remnant capacitors are briefly switched to the sample capacitors to substantially cancel the remnant charges. The sample capacitors then participate in obtaining input-signal samples during the remainder of the subsequent operational mode. Because the remnant charges have been substantially canceled, the accuracy of the subsequent operational mode is considerably enhanced. In another system embodiment, the replica capacitor is replaced by a discharge switch which provides a discharge path in an initial portion of the subsequent operational mode.

1. Field of the Invention
The present invention relates generally to pipelined analog-to-digital converter systems.
2. Description of the Related Art
Switched-capacitor pipelined signal converter systems arrange a plurality of converter stages so that they successively convert an analog input signal to corresponding digital bits. All but the last one of the stages provides a residue signal for processing by a succeeding one of the stages. The successive digital bits can then be temporally aligned so that they form a digital code which corresponds to the original input signal.
One class of these pipelined systems inserts a sampler ahead of the converter stages. The sampler forms samples of the input signal which are then presented to the initial stage for processing. Because the sampler consumes additional power and contributes to system noise and distortion, it is eliminated in a second class of pipelined converter systems. The sampler is often referred to as a sample-and-hold amplifier (SHA)) and, accordingly, the second class of systems is often said to have a "SHA-less" architecture.
Although SHA-less converter systems have the capability to reduce power consumption, noise and distortion, they introduce other problems because capacitors in the initial converter stage are now involved in a sampling process in addition to their conversion and residue generation processes. To resolve these problems, some SHA-less systems provide additional capacitors in the initial stage for the sampling process and/or insert additional buffering prior to the initial stage. These provisions, however, generally increase power consumption and noise and reduce speed capability. Other SHA-less systems provide a brief time for resetting of the stage capacitors but this additional time, of course, significantly reduces speed capability.

Enhanced-accuracy converter stages for pipelined signal converter systems


The present invention provides a process for preparing compounds of Formula I: ##STR1## wherein R.sub.1 is methyl by reduction of a camphene intermediate with a reducing agent.

Pharmaceutically active bicycloheptan-amines, including mecamylamine are useful for the treatment of hypertension in humans, and as ganglion blockers. Mecamylamine reduces blood pressure in both normotensive and hypertensive patients.
Conventionally, mecamylamine has been produced by the reduction of 3-formamidoisocamphane with lithium aluminum hydride. This technique is described in U.S. Pat. No. 2,831,027 to Pfister, III, et al. Another method for preparing mecamylamine is discussed in Great Britain Patent No. 856,862 to Lepetit et al. According to this method, mecamylamine is produced from 3-aminoisocamphane.
There remains a need in the art for methods of producing pharmaceutically active bicycloheptan-amines. There remains a need in the art for commercially viable methods of preparing pharmaceutically active bicycloheptan-amines. Accordingly, it is an object of the present invention to provide a new method of preparing pharmaceutically active bicycloheptan-amines such as mecamylamine.

Process for preparing bicycloheptanamine compounds


A CAM device includes an array of CAM cells each having a spin torque transfer (STT) storage cell to store a data bit. Each STT storage cell includes a first magnetic tunnel junction (MTJ) element coupled between a first input node and an output node of the CAM cell, a second MTJ element coupled between a second input node and the output node of the CAM cell, and a first match transistor coupled between the match line and ground potential and having a gate coupled to the output node. The logic state of the data bit is represented by the relative resistances of the first and second MTJ elements.

A content addressable memory (CAM) device is a storage device that is commonly used for high speed search operations because it can be instructed to compare a search key (e.g., a specific pattern of comparand data) with multiple data stored in an associated CAM array. A CAM array typically includes a plurality of rows of CAM cells, each of which can be accessed by a corresponding address for read and write operations. Binary CAM cells, which can store two states of information (e.g., a logic 1 and a logic 0), typically include a random access memory cell that stores data and includes a compare circuit that compares the stored data with a search key to generate a match result. During compare operations, the match results of the CAM rows are provided to a priority encoder via a plurality of corresponding match lines. In response to the match results, the priority encoder determines which matching CAM row has the highest priority associated with it, and outputs the index (e.g., address) of the highest priority match (HPM).
FIG. 1 illustrates a typical binary CAM cell. The CAM cell 100 includes a memory cell 110 and a compare circuit 120. In the example shown, the memory cell 110 is a static random access memory (SRAM) cell including a latch formed by cross-coupled inverters 112 and 114 and including access transistors 116 and 118. The latch stores a single bit of data (i.e. a logical one or zero) in a complementary manner (e.g., node 113 stores a data bit D and node 115 store the complemented data bit D). Access transistor 116 couples node 113 to a bit line BL, and access transistor 118 couples node 115 to a complementary bit line BL. The gates of access transistors 116 and 118 are connected to a word line WL, which upon being activated, enables data to be written to and/or read from the memory cell 110 via the bit lines BL and BL. A pair of PMOS bit line pre-charge transistors 106 and 108 are connected between a supply voltage VDD and the bit lines BL and BL, respectively, to pre-charge the bit lines for read and/or write operations in response to a read/write pre-charge signal PC_RW.
The compare circuit 120 includes four transistors 122, 124, 126, and 128. Transistors 122 and 124 are connected in series to form a first signal path between a match line ML and ground potential. The transistors 126 and 128 are connected in series to form a second signal path between the match line ML and ground potential. The gates of transistors 122 and 126 are connected to the data bit D and complementary data bit D, respectively, stored in the memory cell 110. The gate of transistor 128 is connected to a compare line CL, while the gate of transistor 124 is connected to a complementary compare line CL. The compare circuit 120 compares the data stored in the memory cell 110 with comparand data provided on compare lines CL and CL, and indicates the match results of CAM cell 100 by selectively discharging the match line ML. Typically, the match line is pre-charged (e.g., to VDD) prior to compare operations. Then, during compare operations, if the data stored in CAM cell 100 matches the comparand data, compare circuit 120 does not turn on and thus the match line ML remains in its pre-charged state to indicate the match condition. Conversely, if there is not a match, compare circuit 120 turns on and discharges the match line ML to ground potential to indicate the mismatch condition.
Existing CAM architectures are increasingly difficult to scale as device geometries continue to become smaller. More specifically, the difficulties of fabricating RAM cells below 45 nanometers limits the scalability of CAM devices that include such memory technologies. For example, referring to FIG. 1, as the die area of the SRAM cell 110 decreases so does the node capacitance between the inverters 112 and 114, which undesirably increases the susceptibility of nodes 113 and 115 to inadvertent logic changes (e.g., caused by single event upsets). As a result, the soft error rate of CAM cell 100 typically increases as device geometry decreases, thereby essential limiting the scalability of such CAM cells. DRAM-based CAM architectures suffer from similar restrictions, due to the amount of die area needed to maintain a given capacitance for storing charge.
Additionally, RAM-based CAM devices are volatile, and therefore must be continually powered to preserve data stored therein. The need for continual power undesirably restricts the application and durability of such RAM-based CAM devices.
Thus, it would be desirable to reduce the size and power consumption of a CAM cell, and to preserve the data stored in the CAM cell in the absence of power.

Content addressable memory device having spin torque transfer memory cells


An embodiment of an integrated electronic device formed in a semiconductor body delimited by a lateral surface, which includes: a substrate made of a first semiconductor material; a first epitaxial region made of a second semiconductor material, which overlies the substrate and defines a first surface; a second epitaxial region made of a third semiconductor material, which overlies the first surface and is in contact with the first epitaxial region, the third semiconductor material having a bandgap narrower than the bandgap of the second semiconductor material; an active area, extending within the second epitaxial region and housing at least one elementary electronic component; and an edge structure, arranged between the active area and the lateral surface, and including a dielectric region arranged laterally with respect to the second epitaxial region, which overlies the first surface and is in contact with the first epitaxial region.

As is known, integrated electronic devices are formed within dies, which are manufactured starting from wafers of semiconductor material and have, in plan view, a generally rectangular or square shape.
In detail, the edges and corners of the dies correspond to the so-called "scribe lines", i.e., to the lines along which the wafers of semiconductor material are cut to form the dies themselves. In other words, the scribe lines define corresponding lateral surfaces of the dies.
In greater detail, each integrated electronic device can include a plurality of elementary electronic components, such as, for example, transistors, diodes, photodiodes, etc. Furthermore, given a generic die that houses at least one elementary electronic component, within the die it is possible to define a peripheral region (also known as "edge region"), adjacent to the scribe lines, and a central region, which is surrounded by the peripheral region and in which the at least one elementary electronic component is physically made. In addition, in the peripheral region there is usually provided a so-called edge-termination structure.
As is known, the edge-termination structures surround corresponding active areas, i.e., areas set within the central regions and housing the elementary electronic components. In use, the edge-termination structures perform the function of preventing onset of breakdown phenomena within the peripheral regions, which are more subject to the phenomenon of breakdown as compared to the central regions. In fact, the active areas, and hence the central regions, are typically designed so that the elementary electronic components housed therein can sustain (in theory) a maximum voltage Vmax, before the breakdown of the PN junctions present within said elementary electronic components occurs. Instead, within the edge regions, it is possible for breakdown to occur also at voltages much lower than the maximum voltage Vmax, with consequent limitation of the voltage that can effectively be applied to the elementary electronic components, and hence also to the integrated electronic device that houses them. In particular, the peripheral regions are more subject to the phenomenon of breakdown on account of the presence, in general, of corners and/or curvatures of doped regions, with consequent possibility, in use, of an increased density of the equipotential lines, i.e., an increase of the electrical field, to the point of causing breakdown of the semiconductor material that forms the peripheral regions.
For practical purposes, the edge-termination structures hence perform the function of reducing locally the intensity of the electrical field so as to prevent peaks of intensity of the electrical field in the proximity of the edges.
The presence of appropriate edge-termination structures is even more important in the case of integrated electronic devices formed at least in part not only of silicon but also of silicon carbide (SiC). In fact, within said integrated electronic devices very intense electrical fields are generated, which, in the central regions, are typically confined within portions made of silicon carbide, which has a critical electrical field higher than the critical electrical field of silicon. Instead, in the absence of appropriate edge-termination structures, it is possible, in the peripheral regions, for intense electrical fields to be generated also within silicon portions, with the consequent possibility of a breakdown occurring.

Integrated electronic device with edge-termination structure and manufacturing method thereof


A method and apparatus for providing an interactive computer-driven employment recruiting service. The method and apparatus enables an employer to advertise available positions on the Internet, directly receive resumes from prospective candidates, and efficiently organize and screen the received resumes. The method and apparatus further is capable of monitoring employment advertisements for a job seeker and automatically notifying the job seeker when a position for which the job seeker is suitable becomes available. The method and apparatus further enables a plurality of companies to advertise job positions at a single location accessible via the Internet by a job seeker, and enables the job seeker to communicate directly with a company via the Internet if the job seeker is interested in exploring further information pertaining to an available position at that company.

Many resources are presently available to assist businesses in finding suitable candidates to fill available positions. Perhaps the most common recruiting method is direct advertising by employers in the employment section of a newspaper, or in a magazine that is targeted to people having specific skills (e.g., engineers, attorneys, computer programmers, and so on). A typical employment advertisement will generally include a brief description of the available position, along with the address, telephone number, facsimile number and/or e-mail address of the employer. Applicants can apply for the advertised position by sending their resumes directly to the employer by facsimile, regular mail or e-mail. An employer will usually have a person in its employment or human resources department screen the resumes to identify the applicants best suited for the position.
Many disadvantages are inherent in this conventional recruiting method. For instance, a magazine and especially, a newspaper, has a limited amount of subscribers and generally services only a limited region. Therefore, the company's advertisement may never be seen by many qualified people outside of that region. In order to distribute the advertisement more universally, it may be necessary for the employer to run the advertisement in several newspapers or magazines, thus substantially increasing the advertising expense incurred by the company.
Furthermore, this conventional method is also very inefficient even after the resumes are received by the company. For example, because the resumes must be manually organized and screened, a person in the company's recruitment or human resources department may need to spend a significant amount of time every day performing this task. In a large corporation having many positions becoming available on a daily basis, it may be necessary for several people to devote most of their time to organizing and screening applicants' resumes. Furthermore, because a large amount of resumes may be received, the task of organizing and screening those resumes may be particularly onerous and thus, a certain resume may be overlooked or mishandled. As a result, a candidate who is well suited for a position may never be considered.
In an attempt to increase the scope of their advertising, some companies have begun using computer networks, such as the Internet, to post employment opportunities. For instance, a company may set up its own "home page" on the World Wide Web (the "Web") on which various job openings can be posted. Anyone who subscribes to the internet can thus access or "log on" to that company's home page, determine which positions at that company are available, and send a resume to the company via regular mail, facsimile or e-mail.
Although a home page can be a useful tool in enabling a company to expand its advertising capabilities, a home page provides no mechanism for organizing or screening resumes that are received. The received resumes still must be organized and screened by a person in the company's human resources department in the traditional manner. Hence, the possibility still exists that a resume will be overlooked or mishandled.
Furthermore, in order for an applicant to see the company's advertisement, the applicant must be aware that the company exists and has a home page on the Web. Hence, if the applicant has never heard of the company, the applicant would not be aware that company has a home page. Many highly qualified candidates therefore may overlook a company's advertisement because they simply are not aware that the company exists.
Several advertisement agencies have recognized these potential shortcomings and have developed "career bulletin boards" on the Web. A career bulletin board, such as CareerMosaic, MonsterBoard, and the like, is an electronic bulletin board on which messages can be "posted" as on a conventional bulletin board. A career bulletin board is advantageous because it provides a single location at which many companies can post employment opportunities. A job seeker can log onto the bulletin board to peruse the posted available positions. However, several problems are inherent with career bulletin boards.
For example, if a company wants a job seeker to see complete descriptions of their job openings, the company must send those complete descriptions directly to the bulletin board provider. The computer at the site of the bulletin board provider must store all of the company's information and thus, must have access to a large amount of memory.
Furthermore, the computer must be capable of continuously accessing that information to display it on the bulletin board. These accessing and displaying operations, which involve the handling of large amounts of data, may slow the computer's operation significantly. As a consequence, if many job seekers are accessing the bulletin board at the same time, the computer may be incapable of handling this high level of activity. Hence, additional job seekers may be unable to access the bulletin board at that time, or job seekers who are already logged onto the bulletin board may experience very slow service. Also, if a failure occurs with the computer, the entire bulletin board will become unavailable and thus, every job posting will become unavailable.
Additionally, bulletin boards are typically set up so that a job seeker submits a resume directly to the bulletin board provider. The resume is stored in a central repository along with all of the other resumes, and must be forwarded to the company to which the job seeker is applying for employment. This type of arrangement decreases the confidentiality of the resumes, because they are handled by the bulletin board provider instead of only by personnel at the company. Also, this type of arrangement decreases the company's confidentiality, since a complete job description is sent to the bulletin board provider. Furthermore, once the resumes are received by the company, they still must be manually organized and screened. In addition, if a company updates its listing of job descriptions, the updated list must be sent to every bulletin board to which the company subscribes.
It is further noted that the direct advertising methods discussed above require that a job seeker monitor the advertisements on a regular basis in order to ascertain whether a specific position is available. Hence, instead of relying on advertisements, an employer or job seeker may use a professional recruiter to find suitable candidates for available positions and vice-versa. However, the efforts of professional recruiters are limited by the resources available to them.
For example, if a recruiter has been hired by an employer to find suitable candidates for an available position, the recruiter must undertake efforts such as "cold calling" suitable candidates employed by other companies, networking with other recruiters to obtain names of potential candidates, and the like. Conversely, if a recruiter has been hired by a job seeker to find a suitable position, the recruiter may need to undertake similar efforts to locate such a position. Hence, it is likely that a recruiter will overlook available positions and suitable candidates. Furthermore, since recruiters charge a substantial fee for their services, many companies and job seekers are reluctant to use a recruiter and incur such expense.
In order to assist companies in facilitating their recruiting efforts, several software companies have developed resume screening programs which can be configured to screen a collection of resumes for the most qualified candidates. Resumes that are received by an employer who uses this software are first scanned into a computer and stored. The computer running the resume screening software can then be controlled to search those resumes for various attributes, such as college degrees, prior experience, special qualifications, and the like. The computer will then provide a list of the most qualified candidates out of the entire collection of resumes. This computerized screening and sorting method allows human resource personnel to devote more time to other tasks.
However, known resume screening software does not assist employers in advertising available positions. Although the resume screening software is useful once a resume has been received by the company, it provides no advantage in enabling the company to seek out the most qualified candidates. A company must still use either the conventional methods of advertising (e.g., newspaper, magazines, professional recruiter, etc.) or a career bulletin board in order to solicit resumes. Hence, the drawbacks associated with those types of advertising methods have not been resolved.
Therefore, a continuing need exists for a system which will maximize the scope of a company's advertising efforts while also providing a reasonably secure and efficient manner of forwarding resumes to the company and enabling the company to efficiently screen and categorize the resumes received. Additionally, a continuing need exists to assist a job seeker in locating available positions quickly and effectively.

Computerized job search system and method for posting and searching job openings via a computer network


To secure a large space that can be utilized effectively above an air cleaner, a low-deck vehicle 10 is constructed to mount an engine shaped like a letter V in the fore-and-aft direction under a low-deck and an air cleaner. The air cleaner is adapted to be capable of being maintained and inspected from the side of the vehicle. A filter element is provided in the air cleaner, and is attachable and detachable by a lid member on the side of the air cleaner. An inspection lid opposing the lid member is provided on a vehicle body cover covering the air cleaner. A space for arranging vehicle accessories such as a fuel tank is provided above the air cleaner.

In a low-deck vehicle such as a scooter-type motor cycle or motor tricycle, a technology in which an engine shaped like a letter V in the fore-and-aft direction is mounted at the lower portion of a vehicle body frame, and an air intake structure and an air cleaner structure are disposed above the engine is disclosed in JP-A-2001-88763. FIG. 28 is a schematic drawing of a low-deck vehicle which corresponds to FIG. 2 in JP-A-2001-88763. Parts shown therein are renumbered.
The low-deck vehicle 300 is a scooter-type motorcycle in which a power unit 320 is mounted in a double-cradle type vehicle body frame 310 at the position downwardly of a low-deck 318.
The vehicle body frame 310 includes a pair of left and right upper frames 312, 312 (only the left one is shown, hereinafter) extending from a head pipe 311 downward and rearward, a pair of left and right down frames 313, 313 extending downward from the head pipe 311, a pair of left and right center frames 314, 314 extending from the midsections of the down frames 313, 313 rearward and upward, a pair of left and right lower frames 315, 315 extending from the lower ends of the down frames 313, 313 toward the rear, and a pair of left and right rear frames 316, 316 for connecting the rear ends of the lower frames 315, 315 and the rear ends of the center frames 314, 314.
The rear ends of the upper frames 312, 312 are connected to the midsections of the center frames 314, 314. The low-deck 318 can be supported by the vehicle body frame 310. The low-deck 318 is a floor on which legs of an occupant is placed.
The power unit 320 includes an engine 321 shaped like a letter V in the fore-and-aft direction mounted at the front, and a transmission unit 331 mounted at the rear. The V-shape engine 321 is a water-cooling engine having a front cylinder 322 and a rear cylinder 323 formed so as to form a bank angle θ10 (angle θ10 between the cylinders 322 and 323) in the order of 45° in side view. The front cylinder 322 extends substantially horizontally toward the front. The rear cylinder 323 extends toward the head pipe 311. Consequently, the bank angle θ10 becomes a narrow angle in the order of 45° in side view. As a matter of course, a bisector L11 of the bank angle θ10 passes between the head pipe 311 and a front wheel 351. Reference numeral 324 designates a crankshaft.
Exhaust pipes 326, 326 connected to the respective cylinders 322, 323 extend below the engine 321 toward the rear and reach a muffler 327.
The low-deck vehicle 300 includes an air cleaner 340 disposed in a space between the head pipe 311 and the rear cylinder 323, an engine-cooling radiator 352 disposed between the engine 321 and the front wheel 351, a seat 353 disposed on top at the rear, and a front fuel tank 354 and a rear storage box 355 disposed under the seat 353.
The transmission unit 331 is provided with a power transmission unit 333 that is capable of swinging in the vertical direction about a final output shaft 332 as the swinging support end. A rear wheel 334 may be mounted to the power transmission unit 333 and the power transmission unit 333 may be suspended from the vehicle body frame 310 via a rear cushion 335. The rear cushion 335 is vertically disposed under the seat 353 between the fuel tank 354 and the storage box 355. Reference numeral L12 is a straight line passing through the head pipe 311 and the final output shaft 332.
The air cleaner 340 includes a filter element 341 in the interior thereof, an air intake port 342 on top thereof, and a lid 343 disposed on top for closing the air intake port 342. The respective cylinders 322, 323 are connected to the air cleaner 340 via air intake connecting hoses 344, 345, respectively. The air intake connecting hose 344 connected to the front cylinder 322 passes between the cylinders 322, 323 to the air cleaner 340. On the other hand, the air intake connecting hose 345 connected to the rear cylinder 323 passes over the rear cylinder 323 to the air cleaner 340.
However, the air cleaner 340 in the related art is provided with the lid 343 on top thereof. In order to attach and detach the filter element 341 disposed in the interior of the air cleaner 340, it is necessary to open the lid 343 on top. Therefore, it is not easy to secure a large space that can be used effectively above the air cleaner 340.
Accordingly, it is an object of the present invention to provide a technology to secure a large space that can be used effectively above the air cleaner.
Also, in order to secure ease of straddling the vehicle body when the driver rides on the vehicle, the vehicle body frame 310 shown in FIG. 28 is constructed in such a manner that the upper frames 312, 312 are significantly lowered toward the rear, and the rear ends thereof are joined to the midsections of the center frames 314, 314. In other words, since the upper frames 312, 312 and the center frames 314, 314 are combined into a substantially V-shape, arrangement of the engine 321 at the lower position is limited, and thus it is difficult to use a space above the engine 321 effectively while maintaining rigidity of the vehicle body frame 310. In addition, there is room for improvement regarding the relation between the vehicle body frame 310 and the air intake structure.
Accordingly, it is a further object of the present invention to provide a technology in which air can be supplied smoothly from the respective air intake structures to the respective cylinders of the V-shape engine while improving rigidity of the vehicle body frame.

Air cleaner and air intake structures for low-deck vehicle


A method of laying hot blacktop paving material, the method comprising a spreading step during which the material is spread onto a surface for receiving it, and immediately prior to the spreading step, a step of adding water during which water plus wetting agent is mixed with the blacktop material.

A blacktop material that is laid while hot always comprises a mix of a mineral aggregate skeleton coated in hot bitumen. Attempts are made to keep its temperature high until it has finished being laid, which generally occurs within the two hours following fabrication and transport to the site where it is laid. This laying consists in distributing the mixture over the surface to be covered in a layer of thickness that is defined, regular, and uniform, e.g. in order to constitute a layer of a roadway (a top layer or a bed layer) or of a similar work. The hot blacktop material is generally laid using a road surfacing machine which performs all of the mechanical functions that are required, and that are accompanied in the final stage by passing compactors over the freshly-spread layer, which compactors serve to densify the mixture.
During these various stages, it can happen that the temperature of the mixture drops below the acceptable limit for satisfactory laying. In addition, it can be advantageous to fabricate paving material at relatively low temperature, for example as described in the patent application filed on the same day as the present patent application by the same Applicant.

Method and apparatus for laying hot blacktop paving material


A new and distinct cultivar of Limonium plant named ‘Esm Ara’, characterized by its upright and somewhat outwardly spreading plant habit; long and strong flowering stems; vigorous and freely branching growth habit; freely and uniformly flowering habit; dense panicles with purple-colored flowers; and good postproduction longevity.

The present Invention relates to a new and distinct cultivar of Limonium plant, botanically known as Limonium sinuatum, and hereinafter referred to by the cultivar name Esm Ara.
The new Limonium is a product of a planned breeding program conducted by the Inventor in El Quinche, Pichincha, Ecuador. The objective of the breeding program was to create new freely branching Limonium cultivars with compact inflorescences and purple-colored flowers.
The new Limonium originated from a cross-pollination made by the Inventor in August, 2001 in El Quinche, Pichincha, Ecuador of a proprietary selection of Limonium sinuatum identified as Code 136, not patented, as the female, or seed, parent and an unidentified selection of Limonium sinuatum, not patented, as the male, or pollen, parent. The new Limonium was discovered and selected by the Inventor as a flowering plant within the progeny of the stated cross-pollination in a controlled environment in El Quinche, Pichincha, Ecuador.
Asexual reproduction of the new cultivar by terminal cuttings in El Quinche, Pichincha, Ecuador since February, 2002, has shown that the unique features of this new Limonium are stable and reproduced true to type in successive generations.


A speech recognition method comprising the steps of: storing multiple recognition models for a vocabulary set, each model distinguished from the other models in response to a Lombard characteristic, detecting at least one speaker utterance in a motor vehicle, selecting one of the multiple recognition models in response to a Lombard characteristic of the at least one speaker utterance, utilizing the selected recognition model to recognize the at least one speaker utterance; and providing a signal in response to the recognition.

In a known example for building automotive speech recognition systems, speakers or training subjects are grouped based on gender, dialect, or accent. The speakers' utterances are collected over time into a training data set, and an acoustic model for an automotive speech recognition system is trained using the collected training data set. This method assumes that speakers annunciate at a normalized rate and pitch. A recognition system utilizing the model takes as input a signal comprised of acoustic energy emanating from a speaker as an utterance and determines the probability of a match of the signal to a word or a phrase, or set of words or phrases. Speaker utterances are collected in an environment with little or no background noise, resulting in a noise-free data set to develop or train an acoustic model.
In an automotive environment, users of automotive speech recognition systems speak in different ways depending on the background noise within a vehicle interior. Many users increase utterance volume and pitch as vehicle interior background noise increases in intensity. Vehicle interior background noise is influenced by, for example, the type of road the vehicle is traversing, the speed the vehicle travels, wind noise, noise external to the vehicle, HVAC settings, and other factors. Variations in user utterance volume and pitch coupled with varying external and internal background noise may represent challenges in associating the acoustic model with the user and obtaining recognition of the utterances.