A magnetic random access memory includes: a magnetic recording layer including a ferromagnetic layer and having perpendicular magnetic anisotropy; and a magnetic reading layer provided on the magnetic recording layer and used for reading information. The magnetic recording layer includes: a magnetization switching area having reversible magnetization; a first magnetization pinned area connected to a first boundary of the magnetization switching area and having magnetization whose direction is pinned in a first direction; and a second magnetization pinned area connected to a second boundary of the magnetization switching area and having magnetization whose direction is pinned in a second direction. The magnetic reading layer includes: a magnetic sensing layer whose direction of magnetization changes based on a direction of the magnetization of the magnetization switching area; a nonmagnetic barrier layer provided on the magnetic sensing layer; and a pinned layer provided on the nonmagnetic barrier layer.

In view of high integration and high speed operation, an MRAM is a promising nonvolatile memory. In the MRAM, a magnetoresistive element showing a "magnetoresistance effect" such as the TMR (Tunnel MagnetoResistance) effect is used. In the magnetoresistive element, a Magnetic Tunnel Junction (MTJ) where, for example, a tunnel barrier layer is sandwiched by two ferromagnetic layers is formed. The two ferromagnetic layers include: a magnetization pinned layer (a pinned layer) whose direction of the magnetization is pinned; and a magnetization free layer (a free layer) whose direction of the magnetization can be switched.
It has been known that a resistance value (R+ΔR) of the MTJ of a case where the directions of magnetization of the pinned layer and the free layer are "antiparallel" becomes larger than a resistance value (R) of a case where the directions are "parallel" due to the magnetoresistance effect. The MRAM uses a magnetoresistive element having the MTJ as a memory cell, and stores data in a nonvolatile manner by using variation of the resistance value. For example, the antiparallel state is related to data "1", and the parallel state is related to data "0". Writing of data to a memory cell is carried out by switching the direction of magnetization of the free layer.
As a method for writing data to the MRAM, the "asteroid method" and the "toggle method" have been known. According to these writing methods, switching magnetization required to switch the magnetization of the free layer becomes large approximately in inverse proportion to a memory cell size. That is, the more the memory cell is refined, the more a writing current tends to increase.
As a writing method able to suppress the increase of the writing current caused by the refinement, a "spin transfer method" is proposed (for example, refer to Japanese Patent Publication No. 2005-93488A1 (corresponding U.S. Pat. No. 7,193,284 (B2)), and "Current-driven excitation of magnetic multilayers", J. C. Slonczewski, Journal of Magnetism & Magnetic Materials, 159, L1-L7 (1996)). According to the spin transfer method, a spin-polarized current is injected to a ferromagnetic conductor, and the magnetization is switched due to a direct interaction between the spin of conduction electrons constituting the current and the magnetic moment (hereinafter referred to as the "Spin Transfer Magnetization Switching").
U.S. Pat. No. 6,839,005 discloses a magnetic shift register using the spin transfer. The magnetic shift register stores information by using a domain wall in the magnetic substance. In the magnetic substance divided into a plurality of areas (magnetic domains), an electric current is supplied so as to pass through the domain wall and the domain wall is moved by the electric current. The direction of magnetization in each area is treated as recording data. Such magnetic shift register is, for example, used for recording a large amount of serial data. Meanwhile, the motion of the domain wall in the magnetic substance is reported also in "Real-Space Observation of Current-Driven Domain Wall Motion in Submicron Magnetic Wires", A. Yamaguchi et al., Physical Review Letters, Vol. 92, pp. 077205-1-4 (2004).
The "domain wall motion MRAM" using the Domain Wall Motion caused by such spin transfer is described in Japanese Patent Publication No. 2005-191032A1 and in "Reduction of Threshold Current Density for Current-Driven Domain Wall Motion using Shape Control", A. Yamaguchi et al., Japanese Journal of Applied Physics, vol. 45, No. 5A, pp. 3850-3853 (2006).
An MRAM described in Japanese Patent Publication No. 2005-191032A1 includes: a magnetization pinned layer where magnetization is pinned, a tunnel insulating layer stacked on the magnetization pinned layer; and a magnetization recording layer stacked on the tunnel insulating layer. Since including a portion whose direction of the magnetization can be switched and a portion whose direction of the magnetization is not changed substantially, the magnetization recording layer is referred to as not a magnetization free layer but the magnetization recording layer. FIG. 1 is a schematic plane view showing a structure of the magnetization recording layer of Japanese Patent Publication No. 2005-191032A1. In FIG. 1, a magnetization recording layer 100 has a linear shape. The magnetization recording layer 100 includes: a joint portion 103 overlapping with a tunnel insulating layer and a magnetization pinned layer; constriction portions 104 adjacent to both ends of the joint portion 103; and a pair of magnetization pinned areas 101 and 102 formed to be adjacent to the constriction portions 104. The pinned magnetizations opposite each other are applied to the magnetization pinned areas 101 and 102, respectively. Moreover, the MRAM includes a pair of writing terminals 105 and 106 electrically connected to the pair of the magnetization pinned areas 101 and 102. Due to the writing terminals 105 and 106, an electric current penetrating through the joint portion 103, the pair of the constriction portions 104, and the pair of the magnetization pinned areas 101 and 102 of the magnetization recording layer 100 flows.
FIG. 2 shows a structure of a magnetic recording layer 120 of a magnetic memory cell, which is described in "Magnetic Configuration of a New memory Cell Utilizing Domain Wall Motion", H. Numata et al., Intermag 2006 Digest, HQ-03 (2006). The magnetic recording layer 120 is U-shaped. Specifically, the magnetic recording layer 120 includes a first magnetization pinned area 121, a second magnetization pinned area 122, and a magnetization switching area 123. The magnetization switching area 123 overlaps with the pinned layer 130. The magnetization pinned areas 121 and 122 are formed to be extended in a Y direction, and their directions of magnetization are pinned in the same direction. Meanwhile, the magnetization switching area 123 is formed to be extended in an X direction, and has reversible magnetization. Accordingly, a domain wall is formed on a boundary B1 between the first magnetization pinned area 121 and the magnetization switching area 123 or on a boundary B2 between a second magnetization pinned area 122 and the magnetization switching area 123. Initialization of a magnetization state is carried out by applying a sufficiently-large initial magnetic field in a diagonal direction of 45 degree in an XY plane, and a state where: the magnetization of the magnetization pinned area is directed to a +Y direction; the magnetization of the magnetization switching area is directed to a +X direction; and the domain wall is formed on the boundary B1 is realized after the initial magnetic field is removed.
The magnetization pinned areas 121 and 122 are connected to respective current supply terminals 125 and 126. A writing current can flow in the magnetic recording layer 120 by using the current supply terminals 125 and 126. Depending on the direction of the writing current, the domain wall is moved in the magnetization switching area 123. The magnetization direction of the magnetization switching area 123 can be controlled by the domain wall motion.
However, in the MRAM using the current driven domain wall motion, it is concerned that an absolute value of the writing current becomes relatively large. Other than the above-mentioned Physical Review Letters, Vol. 92, pp. 077205-1-4 (2004), many reports about observation of the current driven domain wall motion are issued. Meanwhile, the domain wall motion requires a threshold current density of approximately 1×108 A/cm2. In this case, for example, in a case where a width of layer causing the domain wall motion is 100 nm and the film thickness is 10 nm, the writing current is 1 mA. To reduce the writing current to be less than this value, it may be considered that the film thickness should be reduced. However, in this case, it is known that the current density required for the writing is further increased (for example, refer to the above-mentioned "Japanese Journal of Applied Physics, vol. 45, No. 5A, pp. 3850-3853 (2006)"). In the MRAM using the current driven domain wall motion, a technique able to reduce the writing current is desired.
Meanwhile, in an element using a perpendicular magnetic anisotropy material whose magnetic anisotropy of a magnetization recording layer is perpendicular to a substrate surface, a threshold current density of around 106 A/cm2 was observed (for example, refer to "Threshold currents to move domain walls in films with perpendicular anisotropy", D. Ravelosona et al., Applied Physics Letters, Vol. 90, 072508 (2007)).
Relating to the element using the perpendicular magnetic anisotropy material, Japanese Patent Publication No. 2003-110094A1 (corresponding U.S. Pat. No. 6,844,605 (B2)) discloses a magnetic memory using a perpendicular magnetization film and a manufacturing method thereof. The magnetic memory includes: a magnetoresistive element constituted by stacking a first magnetic layer including a perpendicular magnetization film, a nonmagnetic layer and a second magnetic layer including a perpendicular magnetization film, a switching magnetic field of the second magnetic layer being smaller than that of the first magnetic layer, a resistance value of a case where an electric current flows between the first magnetic layer and the second magnetic layer varying depending on a relative angle defined by a magnetization direction of the first magnetization layer and that of the second magnetization layer; and a magnetic field generation mechanism provided to switch the magnetization direction of the first magnetization layer of the magnetic resistance element. The magnetic memory is characterized in that the switching magnetic field Hc of the first magnetic layer expressed in the following expression (1) is set so as to be smaller than the magnetic field generated from the magnetic field generation mechanism.Hc=2(Ku−2πMs2f)/Ms  (1)
Here, Ku and Ms are the perpendicular magnetic anisotropy constant and the saturated magnetization of the first magnetic layer 11, respectively. When the film thickness and width of the first magnetic layer 11 are T and W, respectively, f is expressed in f=7×10−13(T/W)4−2×10−9(T/W)3+3×10−6(T/W)2−0.0019(T/W)+0.9681.
In addition, Japanese Patent Publication No. 2006-73930A1 discloses a method of changing magnetization state of a magnetoresistance effect element using domain wall motion, and a magnetic memory element and a solid magnetic memory using the method. The magnetic memory element includes a first magnetic layer, an intermediate layer, and a second magnetic layer, and information is recorded on the basis of magnetization directions of the first magnetic layer and the second magnetic layer. The magnetic memory element is characterized in that: magnetic domains having mutually-antiparallel magnetization and a domain wall for separating the magnetic domains are constantly formed in at least one of the magnetic layers; and positions of the adjoining magnetic domains are controlled by moving the domain wall in the magnetic layer to carry out information recording. The second magnetic layer may have the magnetic anisotropy in a direction perpendicular to a film surface.
As described above, in the MRAM using the current driven domain wall motion, it is concerned that an absolute value of the writing current becomes relatively large. Accordingly, as described below, the inventors have studied that the writing current can be reduced in the MRAM using the current driven domain wall motion by using the perpendicular magnetic anisotropy material as the magnetization recording layer.
FIGS. 3A and 3B are a plane view and a cross-sectional view of a conceivable magnetoresistive element using a perpendicular magnetic anisotropy material, respectively. A magnetization recording layer 10 includes a magnetization switching area 13 and a pair of magnetization pinned areas 11a and 11b. However, in FIGS. 3A and 3B, a symbol represented by a white circle and a dot, a symbol represented by a white circle and an X-mark, and a white arrow show magnetization directions of the magnetization switching area 13 and the magnetization pinned area 11a and 11b in which they are described.
The magnetization switching area 13 overlaps with a tunnel insulating layer 32 and a pinned layer 30, and has a function as a free layer. The magnetization pinned area 11a is adjacent to one end of the magnetization switching area 13 and the magnetization pinned area 11b is adjacent to the other end of the magnetization switching area 13. Constriction portions 15 are provided to joint portions between the magnetization switching area 13 and the magnetization pinned areas 11a or 11b. Mutually-opposite pinned magnetizations are applied to the pair of the magnetization pinned areas 11a and 11b. In addition, the constriction portions 15 serve as pinned potentials to the domain wall, and the domain wall is initialized so as to be positioned to a region 12a or a region 12b in the vicinity of the constriction portion. The data reading is carried out by using variations of the tunnel resistance depending on the relative directions of magnetizations of the magnetization switching area 13 and the pinned layer 30. Since the magnetization of the magnetization switching area 13 is in a direction perpendicular to the film surface, the magnetization of the pinned layer 30 also has to be perpendicular to the film surface (for example, in Japanese Patent Publication No. 2003-110094A1 and Japanese Patent Publication No. 2006-73930A1).
Meanwhile, regarding the storing and reading of information, it is generally desirable that an MR ratio is large as much as possible. In the past, many reports about a configuration as the magnetic tunnel junction where both of the free layer and the pinned layer have magnetization components in the surfaces are issued. For example, in a case where CoFeB is used for the free layer and the pinned layer and MgO is used for the tunnel barrier, the MR ratio of more than 200% was observed (refer to "230% room-temperature magnetoresistance in CoFeB/MgO/CoFeB magnetic tunnel junctions", D. D. Djayaprawira et al., Applied Physics Letters, Vol. 86, 092502 (2005)). However, in the magnetic tunnel junction where the conceivable magnetic layer having the perpendicular anisotropy is used as shown in FIGS. 3A and 3B, such a large MR ratio has not been observed. Hence, there is a problem whether or not the storing and reading of information can be adequately carried out.

Magnetic domain wall random access memory


A computer-implemented method includes receiving a request for storage for a container and determining whether a suitable thin provisioned volume currently exists based on criteria in the request. In response to determining that a suitable thin provisioned volume currently exists, the method includes selecting an unused portion of the thin provisioned volume and creating a container volume in the selected unused portion of the thin provisioned volume. The method also includes permitting input/output (I/O) to the container volume and releasing the selected unused portion of the thin provisioned volume in response to determining the container volume is no longer needed.

The present invention relates to thin provisioning capable storage systems, and more specifically, this invention relates to near-instant provisioning of storage blocks in thin provisioned volumes to support short-lived applications.
In virtual storage, thick provisioning is a method of storage allocation where storage capacity is reallocated on physical storage at the time the storage medium is created. Thin provisioning provisions storage on an as-needed basis in order to avoid wasting physical capacity and/or to save on up-front storage costs. Thin provisioning delays allocation until it is necessary such that virtual machines recognize a fully allocated storage medium at all times. Virtual machines may consume only the capacity needed for the current files.

Fast provisioning of storage blocks in thin provisioned volumes for supporting large numbers of short-lived applications

International Business Machines Corporation


A transition barrier for transitioning from a permanent median barrier to a temporary median barrier, the transition barrier having: a) a first end; the first end being connectable to the permanent median barrier by a permanent median barrier connector; b) a second end; the second end being connectable to the temporary median barrier by a temporary median barrier connector; c) a transition section defining a transition wall of a predetermined length between the first end and the second end; the transition wall having a top, bottom, front and a back; d) at least one barrier brace proximate the transition wall, for supporting said transition wall; and e) at least one spacer, proximate the back of the transition wall for contact with a surface of the permanent concrete barrier.

One existing transition barrier consists of a 4950 mm long steel channel running the length of the transition between a permanent concrete barrier and a temporary concrete barrier with two 6610 mm long steel beam guide rails (SBGR) (one steel beam guide rail fitted matingly atop the other) running the length of the transition and secured onto the steel channel (acting as a stiffener) via 16 mm diameter bolts at 950 mm intervals along the length of the steel channel. The existing system also includes a second 6610 mm long steel channel running the length of the transition just below the two SBGR. One end of each of the i) two 6610 mm long SBGR and ii) 6610 long steel channel running just below the two SBGR is secured onto the permanent concrete barrier with anchor bolts and the other end of each of the i) two 6610 mm long SBGR and ii) 6610 long steel channel running just below the two SBGR is secured onto the temporary concrete barrier with anchor bolts. Experience has shown that the above system is not rigid enough, and creates a pocket in the rail during impact by a vehicle, causing the vehicle to spin around or stop suddenly. Furthermore, if deflection of the vehicle occurs, deflection may cause the temporary transition wall to buckle, or cause the vehicle to snag on the temporary transition wall rather than be re-directed. Both results may cause serious injury to the occupant(s) of the vehicle and/or result in a secondary collision.
Other transition barriers include US 2006/0072967, EP 2020460 B1, EP 2213800 and US 2016/0060832.
There is a need for a transition barrier that may be temporary and/or permanent. There is a need for a temporary transition barrier that mitigates vehicle spin around and/or flip over, during collision into a temporary transition barrier. There is also need for a temporary transition barrier that minimizes deflection upon impact. There is also a need for a temporary transition barrier that complies with the Manual for Assessing Safety Hardware (MASH). MASH is part of the American Association of State Highway and Transportation Officials (AASHTO). MASH provides evaluation techniques for the crash testing of safety hardware devices for use on the National highway System (NETS). MASH presents uniform guidelines for crash testing permanent and temporary highway safety features and recommends evaluation criteria to assess test results. The MASH report is available at bookstore.transportation.org. There is also a need for a temporary transition barrier useful with a road sign support system.

Transition barrier for connecting a permanent barrier to a temporary barrier

POWELL (RICHMOND HILL) CONTRACTING LIMITED


A spectrometer equipped with an integrating sphere is used to measure a reflection spectrum from a suspension in a container when the suspension is irradiated with measurement light, of which wavelengths are selected from a wavelength range including near infrared. Reflection spectra of a number of types of standard samples, of which concentrations in the suspension are already known, are used to prepare a measurement model in accordance with an assay technique on the basis of a recursion. A concentration of the material in the suspension is found using the measurement model.

1. Field of the Invention
The present invention relates to a method and an apparatus for analyzing the concentration of materials in a suspension, and in particular to an analysis method and an analysis apparatus that are appropriate for analyzing the concentration of materials in a suspension with high turbidity, such as the analysis of the amount of lipids in milk, the concentration of vegetable juice, or the concentration of microscopic algae (so-called phytoflagellates) that float in water.
2. Description of Related Art
A Gerber method and a Babcock method have been used for the conventional measurement of the amount of lipids (butterfat) that are contained in milk or processed milk (they are generally referred to as milk in the present specification). According to both of these methods, concentrated sulfuric acid is added to milk so as to break the globule membrane that surrounds the milk fat, and then, droplets of milk fat that float in the concentrated sulfuric acid solution are collected through centrifugal separation, and thus, the volume is measured.
In place of these conventional techniques, a method for measuring the amount of lipids using near-infrared spectrometry has been put into practice. In accordance with this method for measurement using near-infrared spectrometry, milk is contained in a sample cell for measuring a liquid sample, and the sample cell is irradiated with light for measurement so that the transmitted light is detected to measure the absorption spectrum of the milk. After that, the amount of lipids in the milk to be measured is calculated from a measurement model that has been prepared in advance by measuring the absorption spectra of a number of types of milk, of which the amount of lipids are already known.
An online measuring method has also been proposed as a method for measuring the amount of lipids in milk using near-infrared spectrometry (see Non-Patent Document 1). In accordance with this technology, a sample chamber through which milk flows is irradiated with light from a halogen lamp so that spectrometry is carried out after guiding the diffuse transmission light to a spectrometer from milk through an optical fiber. The absorption spectrum of light from the milk that flows through the sample chamber is continuously measured so that the amount of lipids in the milk that flows through the sample chamber is sequentially measured online on the basis of the measurement model that has been prepared in advance.

Method and apparatus for analyzing the concentration of materials in suspension


A metering system provides a measuring level with multiple meters and a collection level with multiple collectors. Each meter periodically measures a parameter, such as electricity consumption, and stores measurement information. Each meter periodically transmits its stored measurement information to a collector by a wireless signal. When a collector receives a transmission, it determines which meter sent the transmission, and then extracts unprocessed measurement information. The collector then processes the measurement information to generate a metered function, such as a load profile, a time-of-use profile, or a demand profile. The collector can compensate for missed transmissions and power failures. The metered functions for each meter are transmitted from the collectors to a monitoring station.

The present invention relates to metering systems, and, in particular, to distributed metering systems using wireless communication.
Metering is the periodic measurement of a parameter at multiple locations. For example, utility companies meter the natural gas, electricity and water consumed by households.
The collection of data from a metering system is usually performed by physical inspection of individual meters. For example, in residential areas, electrical utility companies use electromechanical meters with rotating disks to measure the consumption of electricity. Electrical utility companies send a xe2x80x9cmeter readerxe2x80x9d to record the meter measurement about once a month. Metering of natural gas and water is handled similarly.
Utility companies often wish to charge different rates at different times. For example, an electrical utility company may wish to charge higher rates during peak hours of consumption, e.g., the morning and evening. In addition, electrical utility companies may wish to apply a penalty if a consumer exceeds a certain limit within a particular period of time. Unfortunately, electromechanical meters do not permit this objective to be achieved because they show only the cumulative consumption of electricity at the time of inspection.
The general ability to provide information about the history of a parameter at the time of inspection, e.g., something other than a cumulative total, will be referred to as profiled metering. Two basic approaches have been used to provide profiled metering.
One approach involves recording the meter measurements on paper, magnetic tape or computer memory for subsequent collection by physical inspection. The other approach is to use more complex meters that include a microprocessor, a clock and a memory. The microprocessor is preprogrammed with a particular billing schedule to increment a selected register depending on an internal clock. Again, the contents of the registers are collected by physical inspection. Unfortunately, these complex meters are expensive and unreliable. In particular, after a power failure, the clock will differ from real time and an incorrect register may be incremented.
Another problem with electromechanical meters is that meter measurements need to be gathered by physical inspection by xe2x80x9cmeter readersxe2x80x9d. The physical inspection of meters by is expensive. An automated system to electronically transmit metering information could provide considerable cost savings. However, a residential community may have tens or hundreds of thousands of meters. Even with computers, the simultaneous monitoring of tens of thousands of meters by a central computer system is difficult.
In general, in one aspect, the invention provides a metering system having multiple telemetry devices and multiple collection devices. There are fewer collection devices than telemetry devices. The telemetry devices include a sensor to measure a parameter to generate measurements, a memory configured to store the measurements, and a transmitter to transmit the stored measurements to a collection device at transmission times. Each measurement is transmitted at a plurality of different transmission times. The collection devices includes a receiver to receive transmissions from the telemetry devices, a processor for extracting the measurements from the transmissions and analyzing the measurements to generate a metered function of the parameter, and a transmitter to transmit the metered function to a monitoring station.
The sensor of the metering system may include a counter to store a value, a means for incrementing the counter upon receipt of a trigger signal, and a means for storing the value from the pulse counter in the telemetry device memory and resetting the pulse counter at each measurement time. The telemetry device memory may store eighteen measurements, and may discard old measurements and store new measurements. The telemetry device may include a measurement timer for a set interval, such as 2.5 minutes, to trigger a measurement time at its expiration. A power failure may trigger a measurement. The telemetry device may store and increment a sequence counter, and detect power failures. The collection device memory may be configured to store a plurality of objects, each representing a telemetry device. Each collection device may include a means for determining and storing a time of receipt for each transmission. The metering function may be a load profile, a time-of-use profile or a demand profile. The parameter may be electrical power, fluid flow, voltage, current, temperature, pressure, or humidity.
In general, in another aspect, the invention provides a method of metering. A parameter is measured with a telemetry device to generate measurements and a plurality of measurements are stored in the telemetry device. The measurements are transmitted to a collection device at a transmission times. The measurements are extracted from the transmissions, and are analyzed to generate a metered function of the parameter. The metered function is transmitted to a monitoring station.
The advantages of the invention include the following. The metering system can provide profiled metering without physical inspection of the individual meters and uses wireless communication to transmit information. In addition, the metering system is cost-effective, reliable, resistant to power failures, and adaptable to a variety of applications.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized by means of the instrumentalities and combinations particularly pointed out in the claims.

Schlumberger Resources Management Systems, Inc.


Provided are a method, system, and article of manufacture for specifying user defined or translator definitions to use to interpret mnemonics in a computer program. A mnemonic is processed in the computer program having a user defined definition and a translator definition. The mnemonic is interpreted according to the user defined definition in response to previously processing a mnemonic command specifying the mnemonic and the user defined definition. The mnemonic is interpreted according to the translator definition in response to previously processing a mnemonic command specifying the mnemonic and the translator definition.

1. Field of the Invention
The present invention relates to a method, system, and article of manufacture for specifying user defined or translator definitions to use to interpret mnemonics in a computer program.
2. Description of the Related Art
Programmers write computer programs in computer languages referred to as the source code which includes data declarations and instructions that operate on data. The programmer writes keywords and commands in a language to instruct the language translator to perform certain actions. Such keywords and commands typically have meanings relevant to the context of their use, and may be abbreviated in a mnemonic form. A "mnemonic" as that term is used and defined herein may comprise a string of one or more characters, keyword, etc. having a defined meaning in a computer language. Before the program can be executed, the source code must be transformed to machine readable executable code.
Every programming language has a number of reserved names, language keywords, or mnemonics necessary for the language translator (a compiler, assembler, interpreter, etc.) to understand the structure and content of programs written in that language. The presence of reserved mnemonics may preclude the programmer from using such mnemonics in unexpected or ambiguous ways. If a programmer uses a mnemonic that matches a reserved mnemonic, also known as a built-in translator defined mnemonic, then the match may result in a misinterpretation of the meaning or structure of the program or an error message that may not indicate the actual cause of the problem.
Language keyword redefinition is especially problematic for assembler languages, where mnemonics can be used for referencing objects not defined in the program currently being assembled, and for instruction mnemonics. Most assemblers support a capability to allow the programmer to use mnemonics with the standard statement syntax to refer to both built-in or pre-defined mnemonics (such as assembler directives and machine instructions) and to user-defined mnemonics (such as macro-instructions). If the same statement syntax is used, the programmer may consequently write a statement in which such a mnemonic refers either to a built-in instruction known to the assembler or to a previously coded user-defined macro-instruction.
Prior art assembler implementations avoid possible conflicts between built-in and user defined mnemonic definitions by allowing only one definition of a given mnemonic to be used, to the exclusion of the other. That is, only one allowed form of any language keyword in the form of a mnemonic is supported, either as a built-in instruction or a macro-instruction, but not both.
As machine architectures and assembler facilities evolve, it is possible that the introduction of new built-in machine instruction mnemonics or assembler instruction mnemonics will conflict with existing user-defined macro-instruction mnemonics or the creation of new user-defined or vendor-supplied macro-instruction mnemonics will conflict with existing built-in mnemonics. In such cases, the programmer must either change the coding of his user-defined mnemonics to avoid using the unwanted new definition of the built-in machine instruction mnemonic, or must change the name of his user-defined macro-instruction to avoid conflicts when using the new built-in mnemonic.
For example, in the IBM® zSeries® z/Architecture® computers from International Business Machines Corporation, a new machine instruction with mnemonic MSG was introduced. The mnemonic MSG had been widely used in many programs for user-defined message-generating macro-instructions as a convenient abbreviation for "MESSAGE". The built-in machine instruction stands for MULTIPLY SINGLE (the G of MSG indicates the 64-bit version). Programs using such user-defined MSG macro-instructions that had the same name as the MULTIPLY SINGLE built-in instruction were faced with the problem of either avoiding the use of the new MSG machine instruction or of rewriting the MSG macro-instruction with a new name and then revising all programs that previously used the MSG mnemonic for the MSG macro-instruction to use the new name instead. For large volumes of code, such changes can impose an expensive updating burden, and require extensive retesting of many programs. (IBM, zSeries, and z/Architecture are registered trademarks of International Business Machines Corporation in the United States, other countries, or both).
To avoid this problem, programmers may devise complex programming techniques that tell the assembler to use one or the other definition of a mnemonic alternately. However, such advanced programming techniques may be error-prone and likely to confuse later readers or maintainers of the program who do not understand such techniques which may not be documented or widely known.
Thus, there is a need for techniques to provide flexibility to users of programming languages in specifying a user defined or translator defined definition for a mnemonic.

Specifying user defined or translator definitions to use to interpret mnemonics in a computer program


The present invention pertains to a multi-layer sidewall process (100) that facilitates forming a transistor in a manner that allows adherence to certain design rules while concurrently mitigating adverse effects associated with forming areas of transistors close to one another. First sidewall spacers having first widths are formed (124) alongside a gate structure of a transistor to facilitate implanting source/drain dopants far enough away from the gate structure so that dopant atoms are unlikely to migrate into a channel area under the gate structure. Additionally, the process provides uniform layers for dopant atoms to pass through to mitigate variations in device characteristics across a wafer. The manner of forming the sidewall spacers also allows a salicide blocking process to be simplified. The first sidewall spacers are subsequently reduced (132) to establish second sidewall spacers having second widths which are smaller than the first widths. The smaller second sidewall spacers facilitate compliance with design rules by allowing source and drain contacts to be formed closer to the gate structure.

Several trends presently exist in the semiconductor device fabrication industry and in the electronics industry. Devices are continually getting smaller, faster and requiring less power, while simultaneously being able to support a greater number of increasingly complex and sophisticated applications. One reason for these trends is that there is an ever increasing demand for small, portable and multifunctional electronic devices. For example, cellular phones, personal computing devices, and personal sound systems are devices which are in great demand in the consumer market. These devices rely on one or more small batteries, which are generally rechargeable, as a power source and also require an ever increasing computational and storage capacity to store and process data, such as digital audio, digital video, contact information, database data and the like. In light of all these trends, there is an ever increasing demand in the industry for smaller and faster transistors used to provide the core functionality of the integrated circuits used in these devices.
Accordingly, in the semiconductor industry there is a continuing trend toward manufacturing integrated circuits (ICs) with higher densities. To achieve high densities, there has been and continues to be efforts toward scaling down dimensions (e.g., at submicron levels) on semiconductor wafers, that are generally produced from bulk silicon. In order to accomplish such high densities, smaller feature sizes, smaller separations between features, and more precise feature shapes are required in integrated circuits (ICs) fabricated on small rectangular portions of the wafer, commonly known as dies. This may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, as well as the surface geometry of various other features (e.g., corners and edges). The scaling-down of integrated circuit dimensions can facilitate faster circuit performance and/or switching speeds, and can lead to higher effective yield in IC fabrication by providing more circuits on a die and/or more die per semiconductor wafer, for example.
The process of manufacturing integrated circuits typically consists of more than a hundred steps, during which hundreds or thousands of copies of an integrated circuit can be formed on a single wafer. Throughout the process, the wafer has layer after layer of material applied thereto and treated in some fashion to create electrically active regions in and on the semiconductor wafer surface. In MOS transistors, for example, a gate structure containing one or more conductive materials is created from one or more layers, and this gate structure can be energized by applying a voltage thereto to establish an electric field within a semiconductor channel, by which current is enabled to flow between a source region and a drain region on either side of the channel. The source and drain regions facilitate this conductance by virtue of containing a majority of positive (p-type) or negative (n-type) dopant atoms.
Dopant atoms are implanted into the source and drain regions to establish the n or p type regions. It can be appreciated that dopant atoms may, at times, have to be implanted through one or more layers of material to establish the source and drain regions, and that the composition of such layers may slow down or otherwise affect the trajectory of the dopant atoms. Accordingly, if the layers are not substantially uniform, the implanted areas may differ across the wafer resulting in devices having different operating characteristics. Thus, it would be desirable to have substantially uniform layers where dopant atoms are implanted through the layers. However, with conventional processing, and in particular processing to form sidewall spacers adjacent to gate structures, layers are often damaged or otherwise made non-uniform by some of the steps within the process. Such sidewall spacers serve to direct dopant atoms into certain 'implant' regions within the substrate and are formed, in part, by etching a layer of material overlying the gate structures. The etchant utilized, however, can also etch or 'eat away' some of the layer(s) adjacent to the gate structures, making them non-uniform and thus adversely affecting the implantation process. Thus, it would be desirable to form sidewall spacers while maintaining the uniformity of adjacent layers.
Also, patterning or otherwise processing some layers in conventional manners can lead to undesirable channeling that can short out conductive areas, such as electrical contacts for source and drain regions, for example. Such channeling is more prone to occur between features that are formed very close to one another, such as between sidewall spacers that are continually formed closer to one another as scaling continues. By way of example, a relatively thin layer of oxide material that overlies gate structures, sidewall spacers and other areas of the wafer may be non-uniform due to limitations associated with tools available and/or process variations. Accordingly, such a layer may have to be etched, stripped or otherwise removed from the wafer. Doing so, however, may cause a small channel to be formed in an underlying layer (e.g., a shallow trench isolation (STI) layer) that electrically isolates two or more conductive areas from one another. The channel can thus electrically couple the conductive areas, particularly where a material, such as tungsten (W), for example, is subsequently applied in the fabrication process. The material can diffuse into the channel and electrically couple and short out the conductive areas. Thus, it would be desirable to establish uniform layers in a manner that does not facilitate shorting out conductive areas.
Additionally, it is at times desirable to protect or 'block off' portions of material from subsequent processing. For example, certain layers of material can be salicided or treated to become (more) electrically conductive and/or to establish areas where electrical contacts of connections can be made. It may, however, be desirable to protect some regions from such treatment(s) so that such regions remain 'resistive' or non-conductive. Conventionally, additional steps are required to isolate or protect such regions from subsequent processing. As with most fabrication processing, however, it is an ongoing desire to simplify the process and reduce the time, material and equipment required to fabricate semiconductor devices. Accordingly, it would be desirable to perform a salicide blocking process in a more efficient manner.
Further, as device sizes continue to shrink, the close proximity of certain areas can lead to undesirable results. With regard to transistors, for example, forming source and drain regions too close to the gate structure can lead to diffusion or migration of source/drain dopants into the channel region under the gate structure, which can in turn lead to skewed threshold voltages, leakage currents, etc., all of which are undesirable. Additionally, certain design rules come into play as scaling occurs. Such design rules set forth maximum and/or minimum allowable values for certain dimensions, for example. One such design rule may, for example, dictate a maximum allowable distance between a gate structure and a source contact. However, satisfying this design rule with conventional fabrication techniques may not be feasible since forming the source region very close to the gate structure may allow source dopants to drift into the channel.


An optical receptacle includes a housing having a base end and a nose end. From the base end of the housing is fitted the first ferrule. A split sleeve is provided in the housing. In the split sleeve is fitted the second ferrule of an optical fiber connector plug to be connected to the nose base side of the housing so that the first and second ferrules are aligned with each other. At the base end of the housing are provided first hook portions for holding the first ferrule while at the nose end are provided a fitting portion for fitting an optical fiber connector and second hook portions for holding the optical fiber connector plug in the fitting position thereof. The housing includes an inner part and an outer part having fixed therein the inner part. The inner part is composed of the first and second hook portions integrally molded. The outer part holds the optical fiber connector plug and hold therein the inner part fixedly. The optical receptacle has a simplified structure without adverse affect on the function of the device, thus achieving down-sizing and reduction in weight.

1. Field of the Invention
The present invention relates to an optical receptacle and a method for manufacturing the same. More particularly, the present invention relates to an optical receptacle which is applied advantageously to connecting parts between a device having incorporated therein an input or output circuit, such as an ONU (optical network unit) module, and an optical fiber connector plug fitted to an outer optical cord as well as to a method for manufacturing the same.
2. Description of Related Art
Optical connectors which are used for connecting optical fibers include IEC 1754-4 "Type SC Connector Family" prescribed in "JIS C-5973" (1990). This connector is generally called "SC-type optical fiber connector" and used widely in optical transmission systems. At their input and output portions for inputting and outputting optical signals, SC type optical fiber connectors couples detachably optical devices such as photo diodes (hereafter, sometimes referred to as "PD") or laser diodes (hereafter, sometimes referred to as "LD") with optical fibers. optical receptacles are optical components which connect the optical connectors with optical fiber connector plugs that are fitted on one hand to a device having input and output circuits for optical signals and on the other hand. to an optical fiber connector plug.
FIG. 1 shows schematically a conventional "SC-type optical receptacle". As shown in FIG. 1, a conventional optical receptacle 101 has an interface equivalent to an adapter in SC-type optical connectors. A housing 102 includes a substrate 107, to which a precision sleeve 103 is fixed, and a hook portion 104 and an outer shell 106. From a terminal end of the housing 102 are inserted a lens 108 and an optical element 109 such as PD or LD.
In the case of the above-described conventional optical receptacle, the lens 108 and the optical element 109 are arranged coaxially with the center axis of the precision sleeve 103 so that the optical axis of an optical fiber is aligned to that of the element to which the optical fiber is to be connected. When a single mode optical fiber is used, not only high precision alignment with the precision sleeve 103, the optical element 109 and so on is required but also the precision sleeve 103 itself must be fabricated with high precision, thus increasing the manufacturing cost of the optical receptacle.
On the other hand, it is sometimes the case that optical elements can be coupled with satisfactory working efficiency through fibers fitted to the optical elements in advance. In the case where an optical fiber is to be connected to an optical waveguide instead of an optical element itself, it is difficult to attach an optical receptacle directly to an end surface of the optical waveguide.
In order to connect a pig-tail optical fiber, which is fitted to an optical circuit, to an optical cord detachably, it is advantageous to attach an optical connector to each optical fiber and connect the fibers through an adapter since this approach is most excellent in workability and gives good connection characteristics.
As such an optical connector, there can be used widely the above-described SC-type optical fiber connectors.
FIG. 2 is a partial cross sectional view showing a conventional SC-type optical fiber connector. FIG. 3 is an exploded view of a conventional SC-type optical fiber connector adapter and a conventional SC-type optical fiber connector plug, corresponding to the part A shown in FIG. 2.
As shown in FIG. 2, input and output portions of an optical module can be fabricated, for example, by attaching, to a tip portion of an optical fiber pigtail, an SC-type optical fiber connector 202 and connecting the SC-type optical fiber connector 208 to an SC-type optical fiber adapter 203 which is fitted to a panel portion of the optical module (not shown). In this case, the SC-type optical fiber adapter 203 has two housings 204 within each of which a sleeve 205 and hooks 206 are provided. In the sleeve 205 which is fitted in the housing 204 is held a split sleeve 211 as shown in FIG. 3. The optical fiber connector 208 includes the coupling device 202 one end of which can be fitted in the SC-type optical fiber adapter 203 and the other end thereof is inserted an outer shell 212. A ferrule 209 is pressed into the outer shell by a spring 213 which is supported by an inner shell 214 over which a crimp ring 215 covers. The crimp ring 215 together with an intervening ring 216 are contained in a boot 217, which is connected to the tension member and coating of an optical fiber cord 201. The outer shell 212, the ferrule 209, the spring 213, the inner shell 214, the crimp ring 215, the ring 216 are coaxially aligned and contained within the inner cavity of the coupling device 202.
Connection to an optical fiber cable outside the optical module can be achieved by engaging the optical fiber connector plug 208 in the housing 204 such that the ferrule 209 is inserted in a split sleeve 211 and the housing 210 of the plug 208 to is clamped by the hooks 206 so that the plug 208, is prevented from rearward movement and thus does not come out of the housing 204.
As described above, the SC-type optical fiber connector shown in FIG. 2 is of a dual engagement structure. More particularly, the ferrule 209 floats within the cavity of the plug housing 210. The plug housing 210 and the sleeve 205 engage with each other. On the other hand, the ferrule 209 and the split sleeve 211 engage with each other. The sleeve 205 and the split sleeve 211 engage with the respective counterparts independently of each other. Due to this dual engagement, the SC-type optical fiber connector is resistant to tension or bending urged to the optical cord from outside. If such an outer force is applied to the connector, the connector is given substantially no adverse effect on its connecting characteristics. As shown in FIG. 3, the conventional SC-type optical fiber adapter and the SC-type optical fiber connector plug together comprise thirteen (13) components. The SC-type optical fiber connector plug is prescribed
As is well known, SC-type optical fiber connectors are used under various conditions. For example, in some applications, the optical cord receives no outer force inside the optical module to which it is connected. Therefore, in such an environment where no outer force is urged, it is wasteful to use the above-described SC-type optical fiber connector. Much less, the use of SC-type optical fiber connectors is disadvantageous in view of production costs, space required for fitting it.

Nippon Telegraph & Telephone Corporation


An audio reproduction method comprises providing equal loudness response data defining a dependency between sound pressure level and frequency, resulting in sounds of equal loudness, including for sounds of a notional negative loudness; generating a required spectral weighting profile from the response data to represent a difference in frequency response between a first audio transducer and a second, different, audio transducer; applying a spectral weighting to an audio signal in dependence upon the derived frequency response; and reproducing the spectrally weighted audio signal using the second audio transducer at an audio reproduction level. In some examples, the generating step comprises: mapping a difference between the first audio transducer and the second audio transducer to a mapped difference in audio level; deriving a frequency response dependent upon a difference between: the response data applicable to the audio reproduction level; and the response data applicable to the audio reproduction level as modified by the mapped difference in audio level.

This disclosure relates to audio processing.
In the course of, for example, music mixing, it is known for mixing technicians to listen to the work in progress on high-grade and reference monitors alternatively. While high-grade monitor loudspeakers can provide accuracy, transparency and generally faithful restitution of all frequencies, reference monitors are used to evaluate how the mixed music will sound when reproduced by real-world, consumer-grade loudspeakers. In this context, it is noted that (apart from specific signal processing applied deliberately in some loudspeaker or other systems), modern audio equipment can be considered as "transparent" before the loudspeakers, which is to say that even relatively low-end equipment can reproduce and amplify audio signals with a generally flat frequency response; it is at the stage of mechanical reproduction by audio transducers that significant differences in spectral response can be introduced.
The human ear is not equally sensitive to all frequencies, which has prompted scientists to look for the physical level that a notional human ear requires to hear all frequencies at the same loudness. This results in the generation of so-called equal-loudness contours (ELCs) such as the so-called Fletcher-Munson curves or the ISO226-2003 standard curves. The Fletcher-Munson curves are somewhat older than the ISO curves (1933 vs 2003), and so are considered less relevant to the present description than the ISO226-2003 curves.
An example representation of the ISO226-2003 curves is provided by FIG. 1 of the accompanying drawings. Each contour represents the physical level required for the ear to hear a pure sine tone at the same loudness, this level being measured in phon. By convention, physical and perceptual levels have the same value in the case of a 1000 Hz pure tone. In other words, therefore, the level of a given sound in phon is the dB (decibel or log scale) SPL (sound pressure level) of a sound at a frequency of 1 kHz that sounds just as loud as the given sound. A level of 0 phon has been adopted by convention to represent the limit of human perception.


Corrosion of conventional refinery steels due to sulfur bearing, carboxylic acid containing hydrocarbon materials is minimized by forming on the surface of the steel a fine grain iron sulfide film where at least the steel surface is substantially all of a pearlite microstructure.

Carbon steels used in refinery service undergo corrosion by sulfur compounds and carboxylic acids, especially naphthenic acids, present in crudes and distillate fractions. Many newly available crudes have high concentrations of these corrosive species, and as a result, carry a lower cost on a per barrel basis. Consequently, there is an economic incentive in processing these crudes, provided that the material costs, because of corrosion, can be minimized. Highly alloyed steels, such as 316 or 317 stainless steel, are an approach, but these materials are so expensive as to make the processing of acidic, sulfur beating crudes too costly. Therefore, a real incentive exists for processing crudes and distillates containing sulfur and naphthenic acids with relatively inexpensive materials.


A multilevel converter including, in particular, a voltage source, a current source, and a capacitor for each of its cells, and a controller. The controller evaluates any current difference between an observed current through the current source and a current requested by the current source. The controller also includes ON-time controller for taking into account the current difference, if any, and altering accordingly a duration of the first conduction state of all of the cells in the converter in a direction suitable for reducing the current difference. The controller also maintains all of the floating capacitors at their equilibrium voltage values.

The converter described in that patent application is shown, by way of example, in accompanying FIG. 1. It essentially comprises, between a voltage source SE and a current source C, a succession of controllable switching cells CL1, CL2, . . . , CLn+1, each having two switches T1, T'1; T2, T'2; . . . ; Tn+1, T'n+1, with one pole of each of the two switches forming part of a pair of upstream poles and the other pole of each of the switches forming part of a pair of downstream poles, the pair of downstream poles of an upstream cell being connected to the pair of upstream poles of a downstream cell, and the pair of upstream poles of a first cell CL1 being connected to said current source C, while the pair of downstream poles of a last cell CLn+1 is connected to said voltage source SE, the converter also comprising a respective capacitor C1, C2, . . . , Cn+1 for each cell, except that the capacitor of the last cell may be omitted when said voltage source SE is suitable for performing the same role, each capacitor being connected between the two poles constituting the pair of downstream poles of its cell, the converter further having control means (not shown) governing the nominal operation of the converter and acting on the switches of the successive cells in such a manner that the two switches of any one cell are always in respective opposite conduction states (represented by control links such as lcl), such that in response to a cell control signal delivered by said control means, one of the two switches in a given cell is successively in a first conduction state and then in a second conduction state during a cyclically repeated converter period, and such that in response to cell control signals that are identical but offset in time by a fraction of said converter period, the switches of successive cells function respectively in the same manner but offset in time by said fraction of a period.
Preferably, said fraction of a period is equal to the reciprocal of the number n+1 of cells, i.e. 2.pi./n+1, which is optimal with respect to harmonics generated on the output and which enables the voltages charged on the capacitors of the converter to be balanced naturally. Some other offset is nevertheless conceivable, as are different offsets between the various stages.
In such a converter, the successive capacitors C1, C2, . . . , Cn+1 have respective increasing mean charge voltages, the mean charge voltage of the capacitor associated with each of said cells being equal to the product of a voltage VE delivered by said voltage source SE multiplied by the reciprocal of the number of cells in the converter and by the rank of the cell, i.e. VE/3, 2VE/3, VE when n+1=3, i.e. when the converter has only three cells.
Naturally, the above applies to other values of n, providing n is not less than two, and in particular when n is greater than three.
The term "multilevel converter" is used below to designate a converter that satisfies the above description.
To examine more easily how the charge ought nominally to vary on one of the capacitors of a multilevel converter as described above, reference is made to FIG. 2 which shows an arbitrary switching cell CLk together with its switches Tk and T'k, the capacitor Ck associated with the cell, and also the following cell CLk+1 and its switches Tk+1, T'k+1.
Given the coupling between the switches within each cell, Tk and T'k or Tk+1 and T'k+1, the set of two imbricated cells CLk and CLk+1 shown in FIG. 2 has four states:
a) a first state where Tk and Tk+1 are non-conducting, so the charge voltage on Ck does not change;
b) a second state where Tk and Tk+1 are both conducting, so the charge voltage on Ck does not change either, since under those circumstances T'k and T'k+1 are non-conducting;
c) a third state where Tk is conducting and Tk+1 is non-conducting, in which case the current source C forces a current Ik which is equal to I to flow through Tk while the current I'k through T'k is zero. It is the state of Tk+1 that forces the current Ik+1 to be zero, while the current I'k+1 is equal to I so the current I'ck through the capacitor Ck is equal to I; and
d) a fourth state where Tk is non-conducting and Tk+1 is conducting, so the current source C forces a current I'k equal to I through T'k while the current Ik through Tk is zero. The state of Tk+1 forces a current Ik+1 to be equal to I, while the current I'k+l is zero, so the current Ick through the capacitor Ck is equal to I.
The currents I'ck=I'k+1 and Ick=Ik+1 deliver additional charge of opposite signs to the capacitor Ck in the above third and fourth states; the first situation is said to be negative and the second positive. The currents corresponding to these two states are forced by the current source. If the current source forces an exactly accurate DC, and everything else remains equal, then the currents forced by the current source during stages c) and d) are the same and in opposite directions at all times throughout the conduction periods of Tk and Tk+1 (which are nominally equal and offset in time, as mentioned above). This means that the charge on Ck is changed negatively and then positively by equal amounts, so it does not vary over one period of the converter.
In an ideal system (accurate current source, infinite impedance), the currents Ick and I'ck are determined by the current source. In more practical terms, when the impedance of the current source is not infinite, the current through the current source depends on the voltage across its terminals and thus on the voltages Vck on the capacitors. For example, if it should happen that the charge voltage Vck is too high compared with its nominal value VE.k/n, for whatever reason, then there will result a discharging current I'ck tending to be greater and a charging current Ick tending to be smaller than they ought to be nominally, thereby tending to return the charge on the capacitor Ck to the value it ought to have. This explains that the operation of the multilevel converter is stable and can accommodate variations in amplitude, in either direction, both at the voltage source and at the current source. It is explained below that this nevertheless gives rise to problems in dynamic terms.
FIG. 3 is an example of operation of the multilevel converter of FIGS. 1 and 2 for a situation when it comprises three cells; pulse width modulation (PWM) type control is applied in order to deliver a sinusoidally modulated alternating voltage to the current source C, i.e., during successive periods p1, p2, p3, . . . in the operation of the converter (line t), the switches T1, T2, and T3 are successively conductive during time intervals that vary in accordance with a wave for modulating the output voltage, referred to below as the "modulating" wave. At each instant, the corresponding switches T'1, T'2, and T'3 are in the opposite positions.
Naturally, other modes of modulating the operation of the switches make it possible to obtain the same result, as is well known. Also clearly, the converter may also serve to deliver the current source C with any other waveform or with a regulated DC voltage.
Consideration is given initially to the period p1 in the operation of the converter. During this period, while any one of the switches T1, T2, and T3 is conducting, the other two are non-conducting. For each set of two cells and the capacitor between them, this corresponds to above-described states c) and d), in which the capacitor receives successive additional negative and positive charge, with the total value thereof being nominally zero. It should also be observed that while the imbricated cells CL1 and CL2 are in state d), imbricated cells CL2 and CL3 are in state c) such that capacitor C1 receives additional positive charge from the same current that provides additional negative charge to capacitor C2.
FIG. 3 also shows, by way of example, how the multilevel converter operates during periods p2, p3, etc. . . . , during which the conduction periods of the switches T1, T2, and T3 become shorter, and then become longer until they exceed one-third of a period, in which case they overlap. Line VI shows the voltage that would ideally be transmitted to the current source, in particular if the capacitance of the capacitors was such that the additional charge in question did not significantly alter the voltage across their terminals. The voltage VI is expressed in fractions of the voltage VE from the voltage source SE, taking the negative pole of the voltage source SE as the voltage reference. It can then be seen that this voltage VI contains both a large fundamental at the frequency of the modulating wave, and also lower-amplitude harmonics at frequencies higher than the chopper frequency which are easily eliminated by a low-pass filter. Since the current is variable, integrating it by means of an arbitrary inductive element contained in the current source results in the converter supplying the current source with an AC of sinusoidal appearance having a period that is equal to the period of the fundamental of the output voltage.
Since the current varies sinusoidally, states c) and d) mentioned above will not convey equal additional amounts of charge to the capacitors of the converter, since between the above two states, the current will have had time to vary. Such variation is negligible only if the operating period of the switches is significantly greater than the frequency of the modulating wave.
It should also be expected that the AC supplied to the current source will not be exactly sinusoidal, but will be distorted in an asymmetrical manner. Likewise, errors in the levels of the control signals or in the signals they generate, or indeed differences in the switching times of the various switches involved, inevitably cause switch conduction durations to be unequal over an operating period of the converter, or will shift the conduction stages of the switches in time, or else will unbalance the currents charging and discharging the capacitors. Consequently, and in general, it is not possible in practice with a multilevel converter of the type described to guarantee that nominal operating conditions as described initially will, in fact be satisfied. Unfortunately, a persistent error in additional charge will lead to an error in one direction or the other in the charge on a capacitor, and thus to an error in its mean charge voltage, thereby giving rise to distortion at the operating frequency of the converter in the voltage delivered to the current source.
This effect is illustrated by trace VI' in FIG. 3 which is similar to the trace VI with the exception that capacitor C1 (FIG. 1) which is assumed to be charged to a voltage that is smaller than its nominal charge voltage prevents the converter from delivering pulses vi1, vi2, vi3 of constant amplitude, with the converter supplying instead, pulses such as vi1' that are of smaller amplitude (the scale is exaggerated to make it more readable) whenever the capacitor C1 is delivering its own charge voltage to the current source C, and pulses such as vi2' of greater amplitude whenever the capacitor C1 is subtracting its own voltage from the voltage delivered to the current source C, and finally also pulses such vi3' of unchanged amplitude whenever the capacitor C1 is not in the circuit. It is thus easy to see that this introduces into the signal VI' a disturbing component at said chopper frequency of the converter.
Such a disturbing component does not exist when the capacitors are charged to their respective nominal voltages. When such a component appears, it is generally harmful.
However, and above all, the voltages to which the switches are subjected are no longer substantially equal to the differences between the nominal charge voltages of two adjacent capacitors, i.e. the voltage of the voltage source divided by the number of stages in the converter. This can put the switches in danger.
Naturally, and as mentioned above, errors in charge on the capacitors tend spontaneously to be reabsorbed, but that process takes time.
In addition, the spontaneous process is implemented via the current source. It therefore cannot have effect when the current source is not forcing a current, and in any event it will be slowed down whenever the current flowing through the current source is small.
French Patent Application No. 9502818 dated Mar. 10, 1995 therefore proposes a multilevel converter which, alongside the above-mentioned modulation control, includes means for measuring any difference on each of said capacitors between the evaluated mean charge voltage and the nominal mean charge voltage of the capacitor, and additional control means changing the duration of said first conduction state of the cell associated with said capacitor in a direction such that the measured voltage difference is reduced.
In an embodiment of that improved multilevel converter, each of said difference-measuring means includes means for receiving the value of the voltage of the voltage source, the rank of the stage and the number of stages, so as to determine what the nominal charge voltage of each capacitor consequently ought to be in an operating period of the converter, said difference then being measured on each capacitor of the converter by comparator means subtracting said mean voltage evaluated across the terminals of each capacitor from said nominal charge voltage of the capacitors.
It is possible to refer to that prior patent application in general to obtain numerous implementation details and explanations concerning operation of that multilevel converter that are not reproduced in the present application.
However, the above-mentioned measurements are intended to correct the charge differences of the capacitors of the converter with the capacitors being considered individually only. Unfortunately, as mentioned above, any corrective action taken on one of the values considered gives rise to actions on other values (the charges on the other capacitors, the voltage or the current at the output of the converter, etc.), which actions are undesirable, and in turn require corrective actions, and so on. The problem posed by this is further complicated by the fact that the corresponding response times are different and are not controlled.

Electronic circuit for converting electrical energy having a corrective, collective control means


A device for stabilizing images acquired by a digital-image sensor includes a motion-sensing device, for detecting quantities correlated to pitch and yaw movements of the digital-image sensor, and a processing unit, connectable to the digital-image sensor for receiving a first image signal and configured for extracting a second image signal from the first image signal on the basis of the quantities detected by the motion-sensing device. The motion-sensing device includes a first accelerometer and a second accelerometer.

1. Technical Field
The present invention relates to an image stabilizing device, in particular for image acquisition using a digital-image sensor.
2. Description of the Related Art
As is known, shots taken using non-professional portable apparatuses, such as camcorders or digital cameras, either stand-alone or incorporated in telephone apparatuses, suffer from flickering caused by minor movements of the operator. In particular, portable apparatuses are supported only by the hands of the operator, and the lack of a firm point of rest makes it practically impossible to keep the framing stable. The resulting image is hence unstable and consequently unpleasant to the eye. The same problem also regards cameras during the acquisition of single images. A movement can render acquisition imprecise, especially for long exposure times.
The use of image stabilizers has thus been proposed. By appropriate processing, in digital apparatuses it is possible "to cut out" a portion (hereinafter referred to as "usable frame") of the image effectively acquired (hereinafter referred to as "complete image"). Only the usable frame is made available for display, whereas an outer frame is eliminated from the complete image. Stabilizer devices enable estimation of the movements of the equipment and recalculation of the co-ordinates of the usable frame so as to compensate for the movements and render the image stable.
Image stabilizers of a first type are based upon the content of the images to be stabilized. After identification of reference elements in a scene, in practice the displacement of the apparatus and the position of the usable frame are estimated by comparing the positions of the reference elements in successive frames. Systems of this type are not satisfactory when the scene framed contains elements that are effectively moving, such as, for example, a person who is walking.
According to a different solution, image stabilizers include gyroscopes, which measure angular velocity of the apparatus with respect to axes transverse to an optical axis thereof (normally, two axes perpendicular to one another and to the optical axis). The rotations about said axes cause in fact the greatest disturbance. By means of temporal integration of the data detected by the gyroscopes, it is possible to trace back to the instantaneous angular position of the optical axis of the apparatus and from here to the position of the centre of the usable frame. The image can then be corrected accordingly. In this way, the stabilization of the image is independent of its content. Gyroscopes, however, absorb a lot of power, because they use a mass that must be kept constantly in oscillatory or rotational motion. Their use is hence disadvantageous in devices that are supplied autonomously because they markedly limit the autonomy thereof.

Image stabilizing device of the MEMS type, in particular for image acquisition using a digital-image sensor


An exercise system for allowing a user to increase endurance, power, speed, quickness, and overall body conditioning. The exercise system includes a body member that is adapted to snuggly fit around a portion of a user. A plurality of pockets is coupled to the body member. Each of the pockets has a flap that is secured to a front panel of each the pockets such that the flap is for closing each of the respective pockets. A plurality of weight members each are selectively insertable into each of the pockets such that the weight members are adapted to change the weight resistance against the muscles of the user when the body member is fitted around a portion of a user.

1. Field of the Invention
The present invention relates to exercise systems and more particularly pertains to a new exercise system for allowing a user to increase endurance, power, speed, quickness, and overall body conditioning.
2. Description of the Prior Art
The use of exercise systems is known in the prior art. More specifically, exercise systems heretofore devised and utilized are known to consist basically of familiar, expected and obvious structural configurations, notwithstanding the myriad of designs encompassed by the crowded prior art which have been developed for the fulfillment of countless objectives and requirements.
Known prior art includes U.S. Pat. No. 5,951,446; U.S. Pat. No. 4,303,239; U.S. Pat. No. 4,958,386; U.S. Pat. No. 4,974,398; U.S. Pat. No. Des. 352,369; and U.S. Pat. No. 5,514,056.
While these devices fulfill their respective, particular objectives and requirements, the aforementioned patents do not disclose a new exercise system. The inventive device includes a body member that is adapted to snuggly fit around a portion of a user. A plurality of pockets is coupled to the body member. Each of the pockets has a flap that is secured to a front panel of each the pockets such that the flap is for closing each of the respective pockets. A plurality of weight members each are selectively insertable into each of the pockets such that the weight members are adapted to change the weight resistance against the muscles of the user when the body member is fitted around a portion of a user.
In these respects, the exercise system according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in so doing provides an apparatus primarily developed for the purpose of allowing a user to increase endurance, power, speed, quickness, and overall body conditioning.


A visual Web site analysis program, implemented as a collection of software components, provides a variety of features for facilitating the analysis, management and load-testing of Web sites. A mapping component scans a Web site over a network connection and builds a site map which graphically depicts the URLs and links of the site. Site maps are generated using a unique layout and display methodology which allows the user to visualize the overall architecture of the Web site. Various map navigation and URL filtering features are provided to facilitate the task of identifying and repairing common Web site problems, such as links to missing URLs. A dynamic page scan feature enables the user to include dynamically-generated Web pages within the site map by capturing the output of a standard Web browser when a form is submitted by the user, and then automatically resubmitting this output during subsequent mappings of the site. An Action Tracker module detects user activity and behavioral data (link activity levels, common site entry and exit points, etc.) from server log files and then superimposes such data onto the site map. A Load Wizard module uses this activity data to generate testing scenarios for load testing the Web site.

With the increasing popularity and complexity of Internet and intranet applications, the task of managing Web site content and maintaining Web site effectiveness has become increasingly difficult. Company Webmasters and business managers are routinely faced with a wide array of burdensome tasks, including, for example, the identification and repair of large numbers of broken links (i.e., links to missing URLs), the monitoring and organization of large volumes of diverse, continuously-changing Web site content, and the detection and management of congested links. These problems are particularly troublesome for companies that rely on their respective Web sites to provide mission-critical information and services to customers and business partners.
Several software companies have developed software products which address some of these problems by generating graphical maps of Web site content and providing tools for navigating and managing the content displayed within the maps. Examples of such software tools include WebMapper.TM. from Netcarta Corporation and WebAnalyzer.TM. from InContext Corporation. Unfortunately, the graphical site maps generated by these products tend to be difficult to navigate, and fail to convey much of the information needed by Webmasters to effectively manage complex Web sites. As a result, many companies continue to resort to the burdensome task of manually generating large, paper-based maps of their Web sites. In addition, many of these products are only capable of mapping certain types of Web pages, and do not provide the types of analysis tools needed by Webmasters to evaluate the performance and effectiveness of Web sites.
Another problem in the field of Web site and intranet management relates to the ability of the site to handle peak loads. The heavy use of a site can lead to a significant degradation in performance, or even a complete loss of service. Examples of Web sites that have undergone severe performance degradations during heavy use include the IBM Olympic site during the 1996 summer olympics, and the CNN Interactive Election Day site during the 1996 presidential election.
Mercury Interactive Corporation, the assignee of the present application, has addressed this problem by developing software tools that allow companies to load-test their World Wide Web and intranet sites. Mercury Interactive's LoadRunner.RTM. 4.5 and Astra.TM. SiteTest 1.0 products, for example, include functionality for sending large volumes of client requests (representing hundreds or thousands of concurrent users) to a site while monitoring the site's performance. These products use a virtual user executable, or "Vuser," to send the client requests to the Web site while monitoring the site's performance. The Vuser sends the client requests to the site according to a pre-defined test script (also referred to as a "Vuser script" or "Web script"), which is in the general form of a list of the HTTP (HyperText Transport Protocol) messages to be sent to the site. In one implementation, up to 50 Vusers can be run concurrently on a single Windows.TM. NT or 95 workstation, with different Vusers using different test scripts.

Software system and methods for generating a load test using a server access log


A tiltable mounting device is for mounting cylindrical objects with a top surface and a lateral surface, and for tilting the objects relative to a reference plane. The device has a frame, and one or more mandrels, each configured to mount a cylindrical object. Each mandrel is rotatable about a longitudinal axis, and is tiltable in the frame between first and second positions. The longitudinal axis of each mandrel in the first position is oriented perpendicularly to the longitudinal axis of the respective mandrel in the second position. In the first position, each mandrel is oriented with the top surface of the object in the reference plane, and in the second position, each mandrel is oriented such that the lateral surface of the cylindrical object is tangent to the reference plane.

As in every other production industry, branding of products is a pivotal strategic and marketing factor for the producers of bottled beverages. When aiming at developing a unique branding for bottled beverages with a largely uniform container design, such as wine bottles with screw caps, the design of the label and the screw cap are essentially the only designable components. For that reason, there is a need for printing facilities that enable printing on labels and screw caps. The geometry of the screw caps poses a particular challenge for a corresponding printing apparatus, since screw caps are cylindrical objects with a planar top surface and a cylindrical lateral surface, both of which have to be printed. Such a printing process requires—by far—more advanced technologies than printing on planar labels, for which conventional paper printing technology may be applied.
An exemplary apparatus for printing on cylindrical objects is disclosed by WO 2015/16628 A1. It comprises a plurality of stationary printheads and a holding device for holding the cylindrical objects in a fixed orientation. The holding device moves the cylindrical objects into the vicinity of the printheads such that the printheads may print on the cylindrical object. The fixed orientation of the cylindrical objects ensures a reproducible orientation of the printheads relative to the cylindrical objects, which allows for simplifying the ink feed system needed to feed the ejectors of the printheads.
The conventional printing apparatus for cylindrical objects mentioned above is designed to print on the lateral surface of the cylindrical objects. However, for cylindrical objects, such as screw caps, it is desirable to allow printing on the top surface of the cylindrical objects as well.

Tiltable mounting device, printing system and method for printing on cylindrical objects


Techniques for linking non-coding and gene coding regions of a genome are provided. In one aspect, a method of determining associations between non-coding sequences and gene coding sequences in a genome of an organism comprises the following steps. At least one conserved region is identified from one or more non-coding sequences. Additional instances of the conserved region are located in the untranslated or amino acid coding regions of one or more genes in the organism under consideration, and the conserved region is associated with the one or more biological processes in which these one or more genes participate.

It is known that the intergenic and intronic regions comprise most of the genomic sequence of higher organisms. The intergenic and intronic regions are collectively referred to as the "non-coding region" of an organism's genome, as opposed to the "gene-" or "protein-coding region" of the genome. Even though recent work suggested participation of the intergenic and intronic regions in a regulatory role, for the most part, their true function remains elusive. The search for conserved motifs, presumed to be regulatory and control signals, in regions upstream of the 5′ untranslated regions (5′UTRs) of genes, has been the focus of research activities for many years.
More recently, researchers began studying the 3′ untranslated regions (3′UTRs) of genes where they discovered conserved regions and showed them to be functionally significant, in direct analogy to the cis-motifs of promoter regions. Large-scale comparative analyses allowed researchers to also study conservation in the vicinity of genes and elsewhere in the genome with great success. However, these studies were carried out on only a handful of organisms at a time because of the magnitude of the necessary computations.
The analysis of 3′UTRs intensified further after it was discovered that they contain binding sites that are targeted by short interfering ribonucleic acids (RNAs) that induce the post-transcriptional control of the corresponding gene's expression through either messenger RNA (mRNA) degradation or translational inhibition. Accumulating evidence that non-coding RNAs control developmental and physiological processes and that a considerable part of the human genome is transcribed, has helped researchers identify "functional" elements in areas of the genome that are not associated with protein-coding regions.
Thus, techniques for efficiently and effectively identifying and associating non-coding regions with gene coding regions of a genome would be desirable.

Techniques for linking non-coding and gene-coding deoxyribonucleic acid sequences and applications thereof


Projections/depressions of a two-dimensional periodic structure are formed in a p-GaN layer (4) such that the period of the projections/depressions is 1 to 20 times the wavelength of light radiated from an active layer (3) in a semiconductor. As a result, a diffractive effect achieved by the projections/depressions of the two-dimensional periodic structure change the direction in which the light radiated from the active layer (3) travels. If the projections/depressions are not provided, light at a radiation angle which satisfies conditions for total reflection at the interface between a semiconductor device and an air cannot be extracted to the outside of the semiconductor device so that the light emission efficiency of the device is low. By contrast, the projections/depressions as formed with a period according to the present invention diffract the light at an angle which does not cause total reflection so that the efficiency with which the light is extracted to the outside of the semiconductor device is improved exponentially. This improves the light emission efficiency of the device.

The present invention relates to a semiconductor light-emitting device and, more particularly, to a semiconductor light-emitting device made of a nitride compound semiconductor such as GaN, InGaN, AlGaN, or the like.
In recent years, the use of a nitride compound semiconductor represented by GaN has allowed a high-intensity emission of light ranging in color from ultraviolet to blue and green, which had been impossible thus far. As a result, light-emitting devices using nitride compound semiconductors, such as a light-emitting diode (LED) and a semiconductor laser, have been developed vigorously. Since an LED is easier to fabricate and control than a semiconductor laser and longer in lifespan than a fluorescent lamp, an LED using a nitride compound semiconductor is considered to be promising as a light source for illumination.
A description will be given herein below to an example of a conventional nitride compound semiconductor LED. FIG. 16 is a perspective view showing a structure of the conventional nitride compound semiconductor LED disclosed in FIG. 10 of Prior Art Document 1 (Japanese Laid-Open Patent Publication No. 2000-196152).
In the conventional LED, as shown in FIG. 16, a sapphire substrate 101, a GaN buffer layer (not shown), an n-type GaN layer 102, an InGaN active layer 103, and a p-type GaN layer 104 are formed successively by crystal growth and a trench 108 for exposing the n-type GaN layer 102 as the bottom surface thereof has been formed by partly etching away the InGaN active layer 103 and the p-type GaN layer 104. An n-side electrode 106 is provided on the portion of the n-type GaN layer 102 exposed as the bottom surface of the trench 108, while a p-side transparent electrode 105 is provided on the p-type GaN layer 104 and a p-side bonding electrode 107 is provided on a part of the p-side transparent electrode 105.
The following is the operation of the LED. Holes injected through the p-side bonding electrode 107 expand laterally in the p-side transparent electrode 105 to be injected into the InGaN active layer 103 from the p-type GaN layer 104. On the other hand, electrons injected through the n-side electrode 106 are injected into the InGaN active layer 103 from the n-type GaN layer 102. Light emission occurs upon the recombination of the holes with the electrons in the InGaN active layer 103. The light is emitted to the outside of the LED through the p-side transparent electrode 105.
However, such a conventional structure has the problem of low light extraction efficiency. The light extraction efficiency is the ratio of light generated in the active layer and emitted from the LED into an air to all the light generated in the active layer. The cause of the low light extraction efficiency is the refractivity of a semiconductor which is higher than that of the air. As a result, the light from the active layer is totally reflected by the interface between the semiconductor and the air and confined to the inside of the LED. For example, the refractivity of GaN is about 2.45 when the wavelength of the light is 450 nm so that a critical refractive angle at which total reflection occurs is as small as about 23 degrees. That is, light radiated from the active layer at an angle larger than the critical refractive angle in terms of a normal to the interface between the semiconductor and the air is totally reflected by the interface between the semiconductor and the air so that the light emitted from the active layer and extractable to the outside of the LED accounts for only about 4% of all the light emitted from the active layer. Thus, the conventional LED using a nitride compound semiconductor is low in external quantum efficiency (the ratio of light that can be extracted from the LED to currents supplied to the LED) and has the problem of power conversion efficiency (the ratio of a light output that can be produced to all the supplied power) lower than that of a fluorescent lamp.
As a solution to the problem, a technology which forms projections/depressions at the surface of the LED has been proposed, as disclosed in FIG. 5 of Prior Art Document 1. FIG. 17 is a perspective view showing the structure of the conventional nitride compound semiconductor LED disclosed in FIG. 5 of Prior Art Document 1.
In the structure shown in FIG. 17, projections/depressions each of a spherical lens structure have been formed in the p-type GaN layer 104. The structure has the possibility that, even though the angle formed between emitted light and a normal to the interface between the flat portion of the p-type transparent electrode 105 and the air is larger than the critical refractive angle, the angle of incidence of the light becomes smaller than the critical refractive angle if it is incident on the portion provided with the projections/depressions. Accordingly, the probability that the light generated in the active layer is emitted to the outside of the LED without being totally reflected increases and the external quantum efficiency is thereby improved.
However, the technology for improving the light extraction efficiency based on the principle proposed in Prior Art Document 1 is disadvantageous in that, because the angle of incidence of light sensitively varies in response to the configuration of a projecting and depressed surface, the design of the projecting and depressed surface is extremely difficult and characteristics are unstable due to size variations during the fabrication of devices. The technology is also disadvantageous in that, though the projections/depressions to be formed should have a depth of about several micrometers to improve the light extraction efficiency, processing is difficult because of the high etching resistance of a nitride compound semiconductor.

Semiconductor light-emitting device and method for fabricating the same

Matsushita Electric Industrial Co., Ltd.


A ligament balancer for a knee is disclosed that includes a first guide portion having a first guide hole extending there through, and a second guide portion having a second guide hole extending there through, the first and second guide portions being moveable with respect to each other along a movement axis, the balancer being adapted such that, in use, the movement axis is substantially parallel to the anterior/posterior axis of a distal femoral surface. Also disclosed is a kit of parts that includes the ligament balancer and a drill guide for a knee, the drill guide includes first and second connected arms, each arm comprising at least two guide openings extending there through, the guide openings being spaced longitudinally along each arm, longitudinal axes of the first and second arms intersecting at a predetermined angle. Also disclosed is a method of attaching a cutting block to a distal femoral surface as part of a knee replacement procedure.

When a knee joint becomes damaged or diseased, it is known to replace all or part of the knee joint with a prosthesis. A common form of prosthesis comprises a femoral component, which is attached to a distal end of a femur, and a tibial component, which is attached to a proximal end of a tibia. The femoral and tibial components may articulate directly or may be separated by a meniscal bearing component. The femoral component also articulates with a patella, which is secured in position by a quadriceps tendon and a patellar ligament.
The articulation of a natural knee joint is stabilised by the action of medial and lateral collateral ligaments and anterior and posterior cruciate ligaments. Where possible, all of these ligaments are retained when a prosthesis is implanted, although in practice it is often necessary to remove at least the posterior cruciate ligament. It is desirable for tension in the knee ligaments after surgery to be balanced throughout the range of motion of the knee.
The most complex component of a knee prosthesis is the femoral component, as it carries not only the condylar bearing surfaces, but also the patella bearing surface, which extends along an anterior face of the distal femur. Conventional femoral components require resection of the distal end surface of the femur and the anterior and posterior faces of the femur. They also usually require two chamfered cuts to be made at the distal end of the femur anteriorly and posteriorly. The positioning of the femoral cuts determines the position and orientation of the implanted femoral component, and hence the bearing surfaces which it carries. The correct positioning of the femoral cuts is vitally important therefore to ensuring equal tension in the ligaments after surgery.
It is known to use surgical jigs to guide the positioning of the femoral cuts. Correct placing of a jig to ensure balancing of the ligaments with the knee in flexion is complicated by the presence of the patella. The patella is conventionally either everted or subluxed in order to provide sufficient space for the surgical jig. However, this means that the substantial force exerted via the patella and patellar tendon by the quadriceps mechanism is acting out of its normal alignment. With the patella out of position, this force acts to skew the joint either laterally or medially, making balancing of the remaining ligaments extremely difficult.
Owing, at least in part, to the complicated nature of balancing ligaments with the knee in flexion, flexion balancing conventionally comprises attempting to replicate in flexion a previously measured and balanced extension gap.


The present application generally relates to the use of metabolites of ginger and analogs thereof for the treatment and prevention of diseases, including but not limited to, cancer.

Ginger (Zingiber officinale Rosc.), a member of the Zingiberaceae family, has been cultivated for thousands of years as a spice and for medicinal purposes. It is believed that the major pharmacologically active components of ginger are gingerols and shogaols. Shogaols, α,β-unsaturated ketones which are the dehydrated products of gingerols, are the predominant pungent constituents in dried ginger.