A decentering optical system which takes a substantially parallel beam as input light, includes a prism having a medium whose refractive index is greater than 1, and four optical surfaces disposed at boundary surfaces of the medium so as to be mutually decentering or to slant. The four optical surfaces form a light-incident surface through which the input light enters, at least two internal-reflective surfaces which reflect internally the input light entering inside, a splitting surface which splits an optical path of the input light reflected by any one of these internal-reflective surfaces, into a transmission optical path and a reflection optical path; and a transmitting surface which emits the input light traveling along the reflection optical path towards an exterior. Real images are formed along each of the transmission optical path and the reflection optical path.

Priority is claimed on Japanese Patent Application No. 2004-250705, filed Aug. 30, 2004, the contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a decentering optical system and an optical system using the same. The present invention relates to, for example, a decentering optical system which is preferable for emitting a substantially parallel beam or for focusing on a focal point surface, and an optical system using the same.
2. Description of the Related Art
In the past, there have per se been known various kinds of reflection optical systems which are decentering optical systems in which reflective surfaces are combined together so as to be mutually decentering or to slant.
For example, in FIGS. 1, 4, and 6 of Japanese Unexamined Patent Application, First Publication No. H08-313829 (hereinafter "patent document 1"), and in FIGS. 1 to 24 of Japanese Unexamined Patent Application, First Publication No. 2000-105338 (hereinafter "patent document 2"), a prism type is disclosed as this kind of reflection optical system. Furthermore, optical systems in which such optical systems are combined with light reception elements and display devices are also disclosed.
Patent document 1 discloses an ocular optical system formed of a prism having decentering reflective surfaces, and having an arrangement in which, when it is seen from a reverse-light-tracking direction, an observation light entering through a first surface is reflected internally toward the first surface by a second surface, and then is reflected internally from the first surface towards a third surface, thereby being folded into a Z-shaped optical path, and then the observation light forms a real image at the exterior of the prism.
Patent document 2 discloses a prism element having five optical surfaces, wherein observation light entering through a first surface is reflected internally towards the first surface by a second surface, is then reflected internally towards a third surface by the first surface thereby forming an intermediate image within the prism element, is then reflected internally by the third surface, is then reflected internally by a fourth surface, and is thereafter reflected internally by a fifth surface thereby forming an image surface. That is, a prism element is disclosed which relays an intermediate image through the optical surfaces after the third surface.
In addition, an arrangement having four optical surfaces in which the third surface also serves as the fifth surface is disclosed.

Decentering optical system and optical system using the same


The present invention provides an implantable drug infusion device which features a reliable and leak proof weld joint. The implantable drug infusion device features a hermetic enclosure; a drug reservoir positioned within the hermetic enclosure, a drug handling component, the drug handling component joined with a top surface of a docking station, the drug reservoir joined with a bottom surface of the docking station by a welded joint. The drug handling component typically being a MEMS-type device and fashioned from a silicon-glass or silicon--silicon sandwich. The docking station functions to isolate the thermal stresses created during the formation of the welded joint from the other joints and particularly from the joint between top surface of the docking station and the drug handling component. The thermal isolation function of the docking station is provided through one or more grooves within the docking station, the grooves functioning to separate, in a thermal manner, the top and bottom surfaces of the docking station.

Implantable drug infusion devices are used to provide patients with a constant and long term dosage or infusion of a drug or any other therapeutic agent. Essentially such device may be categorized as either active or passive.
Active drug or programmable infusion devices feature a pump or a metering system to deliver the drug into the patient's system. An example of such an active drug infusion device currently available is the Medtronic SynchroMed programmable pump. Such pumps typically include a drug reservoir, a peristaltic pump to pump out the drug from the reservoir, and a catheter port to transport the pumped out drug from the reservoir via the pump to a patient's anatomy. Such devices also typically include a battery to power the pump as well as an electronic module to control the flow rate of the pump. The Medtronic SynchroMed pump further includes an antenna to permit the remote programming of the pump. Passive drug infusion devices, in contrast, do not feature a pump, but rather rely upon a pressurized drug reservoir to deliver the drug. Thus such devices tend to be both smaller as well as cheaper as compared to active devices. An example of such a device includes the Medtronic IsoMed.TM.. This device delivers the drug into the patient through the force provided by a pressurized reservoir applied across a flow control unit.
Regardless of whether the device is an active or passive drug infusion device, any such devices present challenges to assemble, in a sufficiently hermetic manner while still using biocompatible materials. These difficulties are further magnified when such a device utilizes micro-electrical mechanical systems (MEMS). MEMS typically are extremely small, and further are constructed from a silicon-glass or silicon-silicon sandwich. In particular, to date, the joining of different types of materials necessary for use of MEMS technology in an implantable infusion device has not been feasible using any other joining techniques other than welding. In the extremely harsh and ceaselessly aggressive environment found in the body, epoxies and other glues, while permitting a mechanical joint to be reliably fashioned, have not permitted that same joint to be assembled in a satisfactorily leak-proof or water tight manner. Over time, most joint seals using glues or epoxies have been found to permit vapor or moisture to be passed through the joint. When dealing with implantable electrical devices, such vapor can have serious, if not catastrophic, consequences. Thus, to date, the use of welds is found to be the most effective method for joining similar as well as disparate materials together in order to assemble the implantable infusion device.
Welding, however, is often difficult to implement when joining different or disparate materials together. Namely, thermal stresses often result through the heating and the cooling of these materials, such stresses often having unintended or unacceptable consequences with regards to other areas of the device. With particular regards to drug infusion devices, it has been a problem to reliably join a drug reservoir to the other fluid handling components through welding. One area where this problem exists in the joining of the drugs reservoir to such a MEMS device. As mentioned above, MEMS typically are of a sandwich construction, and thus the direct welding of a component to them is not possible. Often, it has been necessary to use or more intermediary layers to achieve a bond to the MEMS but which may, in turn later be welded to the drug reservoir, for example. During the weld process, however, often the thermal stresses have caused the joint to be formed with one or more flaws, i.e. buckling (when welding thin membranes), delamination (when welding thin film), cracking (of glasses due to stresses introduced when welding).
It is, thus, the object of the present invention to provide a drug infusion device which permits such a drug reservoir to be coupled to the fluid handling components through welding.


The present invention relates to a waterproofing spraying apparatus for delivering a waterproofing coating to the exterior surface of a basement wall which requires moisture proofing. The spraying apparatus includes a remote controlled airless fluid pressurizing unit, a pair of hoses and a spray gun. The spray gun including a moveable arm which is moveable between an extended position and a deflected position. Attached to the end of the moveable arm is a pair of nozzles for delivering the waterproofing coating from the spray gun. The waterproofing coating comprising two fluids which are mixed external to the spray gun after leaving their respective nozzle.

The present invention relates generally to the design and construction of a water proofing spray apparatus for use in waterproofing an exterior surface of basement walls. More particularly, the present invention includes a remote controlled airless spraying machine having a spray gun with a moveable arm for delivering waterproofing material onto basement walls. Although the invention was developed for use in applying a waterproofing coating to the exterior surface of a basement wall, certain applications may be outside of this field.
In todays technologically advanced building industry it is generally well known to apply a waterproofing coating during the construction phase to the exterior surface of porous concrete or masonry basement walls. Typically, for a period of time after the construction of the basement the subterrain portion of the wall is readily accessible by a workman for applying a waterproofing coating thereon. The application of a waterproofing coating onto the exterior surface of the basement wall is designed to minimize or prevent ground water seepage into the basement. Ground water seepage is a direct result of hydrostatic pressure that exerts a force which often drives the ground water through voids or pores in the basement walls.
The rate and quantity of ground water seepage through the basement wall is significantly effected by the soil conditions immediately surrounding the building. If the land surrounding the basement walls includes subsoil with a high clay content, naturally high water tables, or the lack of adequate drainage the ground water seepage will be amplified. Further, the lack of proper workmanship, the use of inferior materials and an improper design are just some of the factors that contribute to an increase in ground water seepage. Inferior or substandard mortar, block, or concrete creates paths or voids which allows the ground water to pass through the basement wall into the basement. Alternatively, if the basement wall is of a poured substantially solid concrete construction it may have imperfect bonding between the layers which allows for the seepage of ground water therebetween.
It is generally known in the building industry to provide a drainage tile adjacent the perimeter of the basement walls for channeling the ground water therefrom. Applying a water impervious membrane or coating to the exterior surface of the walls has generally been utilized by the building industry to minimize or prevent the seepage of ground water through the basement walls. Numerous techniques have been employed to apply waterproofing coating onto the exterior surface of the basement walls. The most common techniques have been to apply the waterproofing coatings with brushes, trowels or spraying equipment. The utilization of brushes or trowels to apply the waterproofing compound has been very labor intensive and often results in a coating with cracks, voids, and unevenness. Pragmatically because of the forementioned problems the application of the waterproofing compound with a trowel or brush has been limited to relatively small surface areas.
A more commonly used technique to apply the waterproofing coating onto the exterior surface of the basement wall is with a spraying apparatus. Common limitations associated with prior spraying apparatuses have been attributed to the inflexibility of the spraying apparatus, and the inability to remotely control the operation of the device. Further, many of the prior spraying machines have required the workman to change their techniques of applying the waterproofing coating to the exterior surface depending upon the geometry of the basement walls, rather than allowing the workman to reorient the nozzles to facilitate delivering the waterproofing compound to the exterior surface.
Even with a variety of earlier designs there remains a need for an improved waterproofing spray apparatus. The present invention satisfies this need in a novel and unobvious way.


Systems, apparatuses, and methods are directed toward audio and visual mapping. A visual frame associated with an environment may be received. The visual frame may be segmented into a plurality of regions of interest. A first position for a first region of the plurality of regions of interest is determined. A determination may be made that the first position intersects with a projected area associated with a user. The projected area is to include one or more areas that are outside of a current direction of movement of the user. One or more characteristics of a first auditory stimulus are selected based on the first position and the determination that the first position is within the projected area.

Navigating complex and dynamic environments may be difficult, particularly in less than ideal conditions. For example, at night time a human being may have difficulty discerning objects in dark or dim conditions. Thus, navigating through a dark environment may become dangerous and/or difficult as the human being may not be able to recognize potentially dangerous situations, such as tripping over unrecognized objects or falling into unrecognized apertures. Further, visually impaired individuals may have difficulty navigating complex and dynamic changing environments.


The present invention provides pharmaceutical formulations suitable for intravenous injection comprising a lyophilized anti-ulcerative agent reconstituted in isotonic solutions suitable for intravenous administration, such as 5% dextrose or 0.9% sodium chloride. The solutions are brought to a pH of between about 9 and about 12, preferably between about pH 10 and 11, by a glycine-sodium hydroxide buffer. Such formulations are chemically and physically stable, and do not significantly change color, for at least between about 6 and about 12 hours at room temperature, and are stable to color change for from between about 24 and 48 hours if kept at 5° C.

Souda et al., U.S. Pat. No. 5,045,552, incorporated by reference herein, describes compounds that inhibit an H+/K+-ATPase present in the stomach. These compounds are useful for treatment of peptic ulcers and other disorders associated with secretion of gastric acid, such as heartburn and gastroesophageal reflux. For example, one such compound has the following structure: and includes pharmaceutically acceptable salts of the compound. This compound is referred to herein as Compound 1.
It is desirable when preparing reconstituted solutions of such anti-ulcerative compounds that are suitable for intravenous administration, that the solubilized compounds exhibit physical and chemical stability for at least between about 6 and about 12 hours at room temperature. It has been found by the present inventors that anti-ulcerative compounds such as Compound 1 and the compounds described by general formula I below discolor when they are reconstituted, i.e., dissolved, in aqueous solutions, particularly in solutions suitable for intravenous administration, e.g., 5% dextrose or 0.9% saline. Such solutions quickly turn yellow to yellow-brown.
The compounds of the present invention have been determined to be more potent H+/K+-ATPase inhibitors than omeprazole sodium. However, in order to provide clinically useful pharmaceutical formulations of the compounds disclosed herein for intravenous administration, it is first necessary to provide formulations for lyophilization and intravenous administration that do not degrade physically, chemically and/or demonstrate a change in color.

Pharmaceutical formulation comprising glycine as a stabilizer


Concepts and technologies for video alternate network access points and receivers that enable wireless delivery of video content to multiple customer premises over a service area are provided herein. In an embodiment, a system includes a satellite dish receiver that is configured to receive a satellite video feed, and a video alternate network access point that is communicatively coupled to the satellite dish receiver. The video alternate network access point can perform operations that ingest the satellite video feed directly from the satellite dish receiver. The operations can activate a microcell transceiver embedded within the video alternate network access point, and identify a multicast-broadcast single-frequency network channel. The operations can then transmit, to a video alternate network receiver device from the microcell transceiver, the satellite video feed over at least the multicast-broadcast single-frequency network channel.

Conventional cable and satellite delivery of video content requires each customer premises to have one or more satellite dishes mounted outside and pointed to a satellite. Conventional satellite systems may receive Ka-band satellite feed and/or Ku-band satellite feed across two signal polarizations. However, the conventional satellite systems cannot carry the entire satellite feed across a single coaxial cable. Therefore, conventional satellite systems send one of four sub-bands (in one of vertical or horizontal polarization, and high or low frequencies) from the satellite dish to an indoor set-top box receiver using a coaxial cable that physically extends through walls and through other physical structures of a customer premises. When the conventional set-top box receiver seeks a different sub-band, the conventional set-top box receiver must use the coaxial cable to signal the satellite dish using a defined voltage and/or frequency tone. Although satellite service providers have typically subsidized installation costs, the conventional satellite systems can, and typically do, lead to high installation costs due to the extended runs of cable, piercing walls, and mounting of the conventional satellite dish to each customer premise. Some conventional satellite systems may require installation of multiple coaxial cables that supply multiple conventional set-top box receivers when the customer premise has multiple viewing devices.
Previous attempts to provide video content over wired internet protocol have faced similar physical limitations due to network topology, such as requiring coaxial and/or twisted pair wiring through walls in order to reach a conventional receiver at the customer premise. Additionally, conventional techniques to use Wi-Fi transport to deliver video content have incurred reception and interference issues, along with requiring the Wi-Fi base station to be within close proximity to the consuming devices, such as requiring the conventional Wi-Fi base station to be within the customer premises or a maximum of a few hundred feet away. Moreover, previous attempts to use Wi-Fi to broadcast video content have continued to require each customer premises to have one or more satellite dish with physical wiring going into each customer premises.

Video alternate network access points and receivers


An image processing device is provided that can precisely measure the photographing position or posture of a photographing device or the coordinates of an object based on sequentially changing photographed images. A series of sequentially photographed images are acquired, from which feature points are extracted. The feature points are tracked and correlated to each other. Stereo images are selected from the series of photographed images correlated, and subjected to an orientation and a 3D measurement. The error range of corresponding points obtained by the 3D measurement is calculated. Based on the calculated error range, it is determined whether or not the corresponding points are appropriate for 3D measurement. Those corresponding points determined as inappropriate are deleted. Another orientation and another 3D measurement are performed using those corresponding points excluding the deleted ones, thus improving the measurement precision.

1. Technical Field
The present invention relates to an image processing device and method. More particularly, the present invention relates to an image processing device and method for measuring the coordinates of a photographing device or an object by keeping track of a dynamic image of the object taken when the photographing device moves relative to the object.
2. Related Art
There is known a technique to measure the position of a photographing device by continuously photographing an object while the photographing device is moving relative to the object. When the photographing device is actually mounted on a moving body such as a car or held in the hand of a person to perform photographing, however, the acquired images may occasionally be far from stable and require vertical or rotational corrections frame by frame, due to the sway of the car or the person. In some cases, a moving object such as another car or person, a flying bird or a falling leaf, may intervene between the photographing device and the object, causing feature points (this may referred to as characteristic points) to be hidden behind and reappear again. Movement in a three-dimensional (3D) space may occasionally be difficult to perceive when viewed on a two-dimensional (2D) image. Thus, there is a need for a process to deal with such sway of the photographing device, a process to deal with feature points that disappear and reappear, and a process to identify and delete feature points and corresponding points inappropriate for 3D measurement. On other hand, for the case where a stationary object is photographed with a stationary photographing device, there is disclosed a 3D measurement technique to precisely and automatically search for corresponding points for measurement. (See Patent Document 1.)
[Patent Document 1] JP-A-2003-264852 (paragraphs [0018] to [0073], FIGS. 1 to 11, etc.)
In order to measure the 3D coordinates of a photographing device or an object based on moving images, it is necessary to find, on two or more frames of the moving image, feature points corresponding to each other, or identical points on the object (hereinafter referred to "corresponding feature points") and to keep track of them. In the case where movement is made in the depth direction of a 3D space when corresponding feature points are to be obtained, for example, such movement cannot be recognized as movement when viewed two-dimensionally. Rather, so-called "pseudo feature points" and "pseudo reference points", which are recognized on the image at corners of two or more lines at different depth levels in the 3D space, prevent proper removal of erroneous corresponding points. Conventional analysis of a moving image is based on the evaluation of 2D movement of points, and not 3D movement thereof. Erroneous corresponding points that could not be properly removed consequently deteriorate the measurement precision of 3D coordinates and reduce the reliability of the measurement.
Thus, it is required to provide a technique that can precisely measure the photographing position and posture of a photographing device and the coordinates of an object from photographed images that sequentially change such as a moving image, even in the case where it is necessary to identify and delete feature points and corresponding points inappropriate for 3D measurement, by developing and applying the technique to photograph a stationary object with a stationary photographing device described above to the case where either or both of them are mobile.
The objective of the present invention is to provide an image processing device and method that can precisely measure the photographing position or posture of a photographing device or the coordinates of an object based on sequentially changing photographed images, such as moving images.

This patent is subject to a terminal disclaimer.


A relay for overcurrent or short-circuit protection is provided wherein the relay has a thermistor in the form of a film of polymer material. The thermistor is arranged over a large surface in the interior of the relay between a connection segment of a terminal element and a terminal plate coupled parallel thereto. By such design, the thermistor is serially connected into the load circuit of the relay. Upon the appearance of either an overcurrent or a short circuit, the thermistor makes an immediate shift to a high resistance value, thereby interrupting the load circuit.

1. Field of the Invention
The present invention is directed to a relay having at least one pair of contacts as well as terminal elements for a load circuit wherein at least one of the terminal elements is coupled parallel with a terminal plate having a flat connection segment in order to produce an electrical connection having a contact element in the interior of the relay.
2. Description of the Prior Art
A relay of the general type described above is known, for example, from German Patent No. DE 37 08 723 A1. Such relays are typically used in automotive engineering, but they are also employed in a variety of other applications. In automobiles, it is standard practice to have the current circuits fused in a fuse box and then conducted to their respective loads via relays or switches. However, new designs, particularly those of bus systems, require a self-fused switch. This means that a peripherally-arranged relay must be fused against overload at its immediate location of use. Thus, it is also generally known to attach a fuse element directly to a relay as described, for example, in German Patent No. DE 32 09 915 A1. However, this known construction requires a special design of the relay itself. Moreover, in terms of space, this construction is fairly costly.


An arbitrary input AC voltage is applied from an external power supply (1) to a rectifying circuit (2), and one rectifying output end of the rectifying circuit is connected to a switching element (4) through a coil (3), while the other rectifying output end of the rectifying circuit is connected to a common terminal of the switching element through a detecting circuit (5) for a current waveform. Further, a peak value wave detecting circuit formed of a diode (6) and a capacitor (7) is connected in parallel with the switching element (4) so that a step-up chopper circuit is formed. A detecting circuit (10) for an output voltage having two resistors (9a), (9b) is connected between both ends of this capacitor (7). The one rectifying output end of the rectifying circuit (2) is connected to a detecting circuit (11) for an effective voltage value, and the two resistors (9a), (9b) for detecting the output voltage of the detecting circuit (10) are selected by a detecting signal of the detecting circuit (11). The detecting signals of these detecting circuits (5), (10), (11) are supplied to a control block (12) for controlling turning-on and turning-off timings of the switching element (4).

1. Field of the Invention
The present invention relates to a power supply circuit suitably used in e.g., a display monitor device.
2. Description of the Related Art
For example, a power supply circuit used in a display monitor device is connected to various kinds of external power supplies from a low voltage of about 100 V to a high voltage of about 220 V. In the power supply circuit, the voltages applied from the connected power supplies are rectified and rectified outputs are applied to a voltage converting circuit (DC--DC converter) so as to obtain a desirable stabilized voltage to be applied to a load.
Use of a step-up chopper circuit for reducing higher harmonic wave current noises and improving power factor is considered in such a power supply circuit. Namely, it is widely known that such a step-up chopper circuit is effective so as to reduce the higher harmonic wave current noises and improve the power factor.
FIG. 1 shows one example of the conventional power supply circuit using a step-up chopper circuit. In FIG. 1, for example, an arbitrary input AC voltage from a low voltage of about 100 V to a high voltage of about 220 V is applied from an external power supply 21 to a rectifying circuit 22. A rectified output of full-wave rectification or half-wave rectification is obtained from both ends of this rectifying circuit 22.
One rectifying output end of the rectifying circuit 22 is connected to a switching element 24 through a coil 23. The other rectifying output end of the rectifying circuit 22 is connected to a common terminal of the switching element 24 through a current waveform detecting circuit 25. Further, a peak value detecting circuit formed of a diode 26 and a capacitor 27 is arranged in parallel with the switching element 24 so that the step-up chopper circuit is formed.
Accordingly, in this power supply circuit, since the above switching element 24 is turned on and off with an arbitrary timing, a voltage boosted in comparison with the rectified output is obtained from the coil 23 instantaneously when the switching element 24 is turned off. A peak value of this output voltage is provided to the capacitor 27. An output DC voltage obtained across both ends of the capacitor 27 is applied to a DC--DC converter 28.
Further, a detecting circuit 30 for an output voltage having a resistor 29 is connected between both ends of the above capacitor 27. The one rectifying output end of the rectifying circuit 22 is connected to a detecting circuit 31 for an effective voltage value. Detecting signals from these detecting circuits 30, 31 and a detecting signal from the above detecting circuit 25 for a current waveform are supplied to a control block 32 for controlling turning-on and turning-off timings of the switching element 24.
For example, loads 33 and 34 are circuits of respective portions of a display monitor device to which a driving voltage from the DC--DC converter 28 is supplied. For example, a standby power supply circuit 35 is used to apply a predetermined standby power to the control block 32 even in a state in which the power supply of the entire device is turned off.
In the above power supply circuit, for example, the turning-on and turning-off timings of the switching element 24 are controlled such that an output DC voltage obtained across both the ends of the capacitor 27 becomes to a predetermined value. Namely, in the above power supply circuit, a boosting voltage ratio is changed by varying an on-off duty of the switching element 24 so that a value of the output DC voltage can be varied.
Therefore, the on-off duty cycle of the switching element 24 is varied by the control block 32 so as to obtain a predetermined output DC voltage with respect to a detecting signal from the above detecting circuit 31 for an effective voltage value. Further, the on-off duty cycle of the switching element 24 is adjusted by the control block 32 by using a detecting signal from the detecting circuit 30 for an output voltage such that this output voltage becomes a desirable value.
Thus, the output DC voltage obtained between both the ends of the capacitor 27 can be adjusted to a predetermined value. In this case, for example, various kinds of applied voltages from a low voltage of about 100 V to a high voltage of about 220 V can be boosted to a fixed output DC voltage of, for example, 360 V. Thus, the monitor device can be stably operated even when any power supply is connected as the external power supply 21.
In accordance with this power supply circuit, the higher harmonic wave current noises are reduced and the power factor is improved by using the step-up chopper circuit so that a preferable power supply circuit can be formed.
However, for example, when the above power supply circuit is mounted to a display monitor device having a maximum consumed power of about 450 W and a power loss is measured, it has been found in this power supply circuit that the power loss is greatly changed in accordance with an input AC voltage as shown in the table of FIG. 2.
Namely, for example, A in FIG. 2 shows a reference value of the power loss when the power supply circuit is formed by double voltage rectification and a capacitor input system without using the step-up chopper circuit. When the input AC voltage is 100 V, the output DC voltage is 262 V. In this case, an output power Pout is 288.2 W when an input power Pin is 318.5 W. Accordingly, a power loss of 30.3 W is caused.
In contrast to this, B and C in FIG. 2 show cases in which the above step-up chopper circuit is used. When the input AC voltage is 100 V (B in FIG. 2), the output DC voltage is 359 V. In this case, the output power Pout is 290.8 W when the input power Pin is 347.5 W. Accordingly, a power loss of 56.7 W is caused. This case shows an increase in loss of 26.4 W in comparison with the case of A in this table.
When the input AC voltage is 230 V (C in FIG. 2), the output DC voltage is 361 V. In this case, the output power Pout is 292.4 W when the input power Pin is 329.5 W. Accordingly, a power loss of 37.1 W is caused. This case shows an increase in loss of 6.8 W in comparison with the case of A in the table.
Thus, in the power supply circuit using the above step-up chopper circuit, a great increase in power loss is caused particularly when the input AC voltage is low. Namely, such a loss is caused by using the step-up chopper circuit when a voltage (solid line) and an electric current (broken line) are formed as shown in, FIG. 3 by turning on and off the switching element 24 and both this voltage and this electric current are not zero.
As mentioned above, for example, when 100 V as an input AC voltage is boosted up to 359 V as an output DC voltage, a boosting voltage ratio is large so that a fall period of the electric current applied to the switching element 24 is made long. Therefore, the power loss caused in this period is increased.
Accordingly, in the case of such an increase in loss, this loss is changed to heat generation in the switching element 24, etc. so that it is necessary to arrange a strong cooling device, etc. for removing this generated heat. When the above output DC voltage is set to be low in accordance with a low input AC voltage, there is a fear that no step-up chopper circuit is operated when a high input AC voltage is supplied.

Power supply with voltage stabilizing control circuit


A memory system includes an encoding processing circuit configured to perform redundant encoding process on target data for generating data and a memory for writing the generated data by the encoding processing circuit, where a number of bits having a predetermined value are half or less than a total number of bits of the generated data.

In high-density memory chips, with a decrease in the size of material constituting individual memory cells (1-bit memory elements), the probability (error rate) that the content of a memory cell is changed to be different from the original content to be stored increases due to fluctuation of characteristics resulting from processing accuracy during manufacturing, or an increase in the influence of disturbance such as temperature, electromagnetic waves, and the like.
As countermeasures to this error, in addition to a method of just increasing the processing accuracy or protecting the memory cells so as to decrease the influence of disturbance, a method of correcting error bits using an error correction code (ECC) is known. The error rate may be caused by the device characteristics of memories in addition to disturbance.
Like MRAMs, RRAMs, or ReRAMs, in electrically rewritable memories using memory cells capable of having two different resistance values, by putting the memory cells into any one of a low-resistance state and a high-resistance state, data are stored so that one resistance state corresponds to a logical value of 0 and the other resistance state corresponds to a logical value of 1. When reading data, the logical value is determined to be 0 or 1 (or 1 or 0) depending on whether the resistance value of a memory cell is smaller or larger than a threshold value.
In such a memory, since it is not possible to directly measure the resistance value during reading, by applying a constant voltage to a memory cell to measure a current value or by flowing a constant current to measure a voltage value, a resistance value is estimated and a logical value is determined.
For example, in MRAMs, the same operation is performed between writing and reading, and reading is performed with intensity such that the content of a memory is not changed. For example, when reading data, a current flows in the same direction as when writing the data of 0, and whether the data is 0 or 1 is determined based on the resistance value at that time.
At this time, the content of a memory which is 1 may be altered to 0. This is called read disturbance, which is affected by fluctuation of the characteristics of a memory cell, and which is a major cause of an increase in the error rate of MRAMs. If the probability (read disturbance probability) of the occurrence of this read disturbance increases, there is a problem in that it is not possible to correct all error bits using the conventional error correction code.
As a technique of preventing destruction of data written to a memory, a nonvolatile semiconductor memory device is proposed in which the number of data "1" in the written data is counted, inverted data of the written data are written to a normal memory portion when the number of data "1" is half or more than the number of bits of the written data, and information indicating the inversion is written to an auxiliary word memory portion, thereby suppressing drain disturb (for example, see Patent Document 1). When reading data from the normal memory portion, data are read from the auxiliary word memory portion to determine whether data was inverted during writing. If data was inverted, the data read from the normal memory portion is inverted and output.
However, since it is necessary to read information indicating whether data is inverted or not from the auxiliary word memory portion whenever data is read, there is a problem in that the reading process is complicated, and the memory access time increases.

Memory system having an encoding processing circuit for redundant encoding process


The multiprocessor system includes one or a plurality of main processors and a plurality of sub-processors, and an execution control circuit which conducts execution control of each the sub-processors, wherein the execution control circuit includes an execution control processor for execution control processing of each the sub-processors, a control bus output unit for activation of a command to each the sub-processors, a status bus input unit for status notification from each the sub-processors, a determination circuit which determines whether or not the status notification has one-to-one dependency with a processing command to be issued next on an operation sequence and is to be processed at a high speed, a status accelerator which issues a corresponding processing activation command when the status notification is to be processed at a high speed, and a status FIFO control unit which processes the status notification by using the execution control processor.

Multiprocessor systems are roughly classified into two, a system designed to execute symmetric multiprocessing (SMP) in which each processor is homogeneous and a system designed to execute asymmetric multiprocessing (AMP) in which each processor is heterogeneous.
Here, the latter heterogeneous multiprocessor system in general employs a control method of directly controlling execution of other plurality of sub-processors by a main processor (MP).
In this method, the main processor which manages the entire system to execute main processing also executes activation control of each of functionally-distributed sub-processors.
On this occasion, control of each sub-processor is realized by using a system bus whose access right is held by the main processor, by which bus a notification of processing completion from each sub-processor is made after input of each interrupt signal from each sub-processor to check a state of each sub-processor by using the system bus.
Such a control method as described above has advantages of facilitating consideration and implementation of a control sequence of the entire multiprocessor system and having high observability for debugging because state management of the entire system and state management of each sub-processor can be aggregated in one place.
This, however, has a problem of a processing failure because late increase in scale of system LSIs and complication of the same cause processing loads to be centralized in the main processor.
The technique having a parallel-execution dedicated execution control unit is proposed as related art such as that disclosed in Patent Literature 1 in order to solve the problem.
The related art recited in Patent Literature 1 is enabling an increase in the rate of operation due to decentralization of main processor loads and parallel execution of the respective sub-processors by implementing a control mechanism which operates at least two sub-processors in parallel in a pipeline fashion.
The execution control unit has a circuit configuration dependent on the number of sub-processors to be connected such as input of a completion notification signal. In this case, it is a common practice for late system LSIs to have a plurality of sub-processors (IP cores) integrated on one chip, so that demanded is system expansion in a short TAT (Turn Around Time), that is, an increase in the number of cores. There accordingly occurs a need of changing a circuit configuration of the execution control unit or a capacity of an internal command table each time, resulting in having low expandability. Another problem is that such complicated execution control processing as includes three or more processings dependent on each other is difficult to realize and has low flexibility.
Proposed as another related art is such a technique as disclosed in Patent Literature 2 is a technique which enables improvement in flexibility and expandability of an execution control circuit dedicated to parallel execution control.
The related art recited in Patent Literature 2 achieves load decentralization of execution control processing and improvement in expandability and flexibility at the same time by providing the execution control circuit with an execution control processor, a status bus input unit for checking a processing status from each sub-processor, and a status FIFO whose capacity is variable.
This technique, however, requires a processing time on the order, for example, of several tens to several hundreds of cycles for execution control processing with respect to one processing status because execution control processing of each sub-processor is executed by software processing on the execution control processor.
Another problem is that since expansion of the number of sub-processors or the number of processing statuses directly leads to an increase in the amount of execution control processor processing, such a risk is increased as processing failure of the processor or the need of an increase in the number of execution control circuits.
Proposed as other related art is such a technique as disclosed in Patent Literature 3 which enables speed-up of sub-processor control by a main processor by using an instruction buffer and a response buffer.
According to the related art recited in Patent Literature 3, spontaneous read of an instruction buffer by an idle sub-processor eliminates the main processor's need of recognizing which sub-processor is idle, thereby speeding up sub-processor control.
The technique is, however, premised on homogeneous symmetric multiprocessing (SMP) in which each sub-processor is capable of processing any task, so that it is in the first place not applicable to a multiprocessor system having heterogeneous asymmetric multiprocessing (AMP) targeted by the present invention.
Similarly to the related art recited in Patent Literature 2, because of software processing by the main processor, the technique requires a processing time on the order of several tens to several hundreds of cycles for execution control processing of one task even when speed-up of the processing is realized.
Patent Literature 1: Japanese Patent Laying-Open No. 2003-208412
Patent Literature 2: International Publication WO2010/016169A1
Patent Literature 3: Japanese Patent Laying-Open No. H09-218859
The first problem to be solved is that when execution control of each sub-processor is realized in a multiprocessor system by using not a main processor but a dedicated execution control processor (CP), its execution control processing time (latency) might cause a processing failure of the multiprocessor system as a whole.
The reason is that with a further demand for speed-up of late image processing system LSIs or communication processing system LSIs, a processing time required for execution control between the respective sub-processors exerts an adverse effect of increasing a possibility that entire processing will not be finished in time. For a data processing system where data is processed in a pipeline fashion by sequentially using the respective sub-processors, in particular, it will be crucial in the future how much time overhead in processing of the respective sub-processors can be reduced.
When execution control processing by an execution control processor is realized as a whole in dedicated hardware to speed up processing, for example, reduction in flexibility and expandability will occur as a second problem which will be described later.
Second problem is low flexibility and expandability of a multiprocessor system as a whole when implementing execution control dedicated hardware.
The reason is that an interface and a circuit configuration of an execution control unit are in general liable to depend on the number of sub-processors connected or the number of processing statuses. In other words, when increasing the number of sub-processors or the number of processing statuses for expanding the system, circuit change is required such as change of an interface or a table capacity of the execution control unit itself.
Further problem is that it is in general difficult to realize such complicated execution control processing as includes processing by three or more sub-processors dependent on each other by using dedicated hardware including table look-up. Even when the processing is realized by using a complicated circuit configuration, if the circuit is specialized in the execution control processing in question, its flexibility and expandability will be very low.

Multiprocessor system, execution control method and execution control program


A carrier substrate is provided with a layer of PDMS and curing agent on one side of the carrier substrate. The PDMS and curing agent can be arranged to receive and adhere to a lithographic substrate. The carrier substrate can be dimensioned such that the combined carrier substrate and lithographic substrate may be handled by a conventional lithographic apparatus.

The present invention relates to a lithographic method and a carrier substrate.
A lithographic apparatus is a machine that applies a desired pattern onto a target portion of a substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that circumstance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern corresponding to an individual layer of the IC, and this pattern can be imaged onto a target portion (e.g. comprising part of, one or several dies) on a substrate (e.g. a silicon wafer) that has a layer of radiation-sensitive material (resist). In general, a single substrate will contain a network of adjacent target portions that are successively exposed. Known lithographic apparatuses include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion in one go, and so-called scanners, in which each target portion is irradiated by scanning the pattern through the beam in a given direction (the "scanning"-direction) while synchronously scanning the substrate parallel or anti-parallel to this direction.
In a conventional lithographic apparatus, a substrate onto which a pattern is to be projected is held on a substrate table by applying a vacuum through the substrate table onto a lowermost surface of the substrate. Once the pattern has been applied to the substrate, the vacuum is released to allow the substrate to be removed from the substrate table and replaced with a subsequent substrate to be patterned. In some instances, the shape or stricture of a substrate may be such that a vacuum cannot be used to hold the substrate on the substrate table.
It is desirable to provide a lithographic method and a lithographic carrier substrate which overcome or mitigate one or more problems of the prior art, whether identified herein or elsewhere.

Lithographic method and carrier substrate


A method for forming a capacitor in a semiconductor device is disclosed. The method includes forming a storage node electrode on a semiconductor substrate, forming a dielectric layer having a high dielectric constant on the storage node electrode, depositing a plate electrode on the dielectric layer, thereby forming by-product impurities, and removing by-product impurities remaining on the plate electrode by introducing a hydrogen (H) atom-containing gas onto the semiconductor substrate while depositing a capping layer on the plate electrode.

The invention relates to a semiconductor device. More specifically, the invention relates to a method for forming a capacitor in a semiconductor device capable of exhibiting a high capacitance and a low leakage current.
Recent trends toward highly integrated semiconductor devices have brought about a reduction in cell size thereof. As a result, it is increasingly difficult to form capacitors that have a sufficient capacitance (Cs). In particular, a principal factor in obtaining highly integrated dynamic random access memories (DRAMs) consisting of a transistor and a capacitor is minimizing the area of the capacitor (which occupies a large amount of space in a chip) while maximizing the capacitance of the capacitor. To obtain the capacitance required for each unit cell, there have been actively developed dielectric materials having a high dielectric constant (k). With a decreasing design rule, there has been an increased demand to obtain the required capacitance.
Various methods have been suggested to obtain the desired capacitance. First, a high dielectric material, such as hafnium oxide (HfO2), alumina (Al2O3), or a multi-layer laminate of these materials is used to form a capacitor dielectric layer. When the high dielectric material is used for the capacitor dielectric layer, atomic layer deposition (ALD), rather than chemical vapor deposition (CVD), is performed based on the large aspect ratio of the capacitor.
Second, there is suggested a structure of metal/insulator/metal (MIM) in which upper and lower electrodes in a capacitor are made of metallic materials having a large work function as a method for imparting superior dielectric performance to the dielectric layer to secure a desired capacitance.
In such a MIM structure, a titanium nitride (TiN) layer is widely used as the electrode material of the capacitor owing to its simple formation process. The titanium nitride (TiN) layer is formed with a mixed gas of titanium tetrachloride (TiCl4) and ammonia (NH3). Chlorine (Cl), generated as a by-product upon the formation of the titanium nitride (TiN) layer, exists in the layer. The residual chlorine (Cl) remaining in the layer causes problems, including a significant increase in specific resistance and thus an increase in contact resistance.
To remove the chlorine (Cl) from the titanium nitride (TiN) layer and improve the qualities of the layer, high-temperature annealing is performed under a nitrogen or ammonia atmosphere after deposition of the titanium nitride layer.
However, in a case where a dielectric layer of the capacitor is made of a material having a high dielectric constant, the dielectric layer has a degraded thermal stability, thus making it incapable of withstanding the thermal stress of subsequent heating processes. That is to say, the dielectric layer undergoes excessive or abnormal crystallization upon the subsequent high-temperature process, thus inducing the formation of a grain boundary. The grain boundary causes an increase in leakage current, thus making it impossible to utilize the dielectric layer in the capacitor. When an electrode is made of titanium nitride, the subsequent heat-treatment cannot be performed under a high temperature. As a result, chlorine (Cl) remains on the electrode, thus causing a deterioration in the conductivity thereof. In addition, chlorine (Cl) accumulates at the interface between the electrode and dielectric layer, and a trap site is formed on the interface therebetween, thereby disadvantageously causing an increase in leakage current of the capacitor.

Method for fabricating capacitor in semiconductor device


In one embodiment, a method includes accessing data identifying a video for processing and mapping an instruction graph to the video based on one or more predetermined criteria and the data identifying the video. The instruction graph describes a workflow for processing the video, and the workflow includes a series of services that each provide particular processing of the video. The method includes calling the services in series to process the video based on the instruction graph. The video streams to each service in series as the video processes. A downstream service may begin processing one or more portions of the video after an upstream service has finished processing the one or more portions of the video and before the upstream service has finished processing the video in its entirety.

Processing a video typically involves waiting for an uploader to upload the entire video and then running the video through a processing pipeline, with each stage in the processing pipeline finishing its processing of the entire video before the next stage begins. After all the stages in the processing pipeline have finished, the video may be replicated to one or more streaming servers. Until then, the video may be unavailable to the uploader and to users. The more bytes making up the video, the greater the latency or the "time to market" of the video for the uploader and for users.


Method and apparatus for locating and guiding a biopsy needle with respect to an X-rayed specimen having a tumor to be engaged by the needle. Intersecting laser beams are utilized to mark the location of the tumor and to guide the biopsy needle in a vertical path. The laser beam source is movable in orthogonal paths while compensating means redirect the beams to maintain them within a target area.

In recent years the public has become very aware of the importance of X-ray examination of women's breasts in the control and cure of breast cancer. The early detection of cancerous tumors is recognized as significantly improving the chances of successful treatment. As a consequence, women of a certain age or genealogical background are subject to X-ray examination of their breasts at frequent intervals. Such examination often detects tumors or lesions which are of a questionable character, it being impossible to determine from the X-ray whether the tumor or lesion is malignant or benign. In such situations, it is normal to take a specimen or biopsy of the tumor or lesion to permit a careful examination of the abnormal tissue.
The most common means of taking a biopsy of a tumor or lesion in a woman's breast is by using an elongated needle which may be inserted with a rotary movement to cut a core sample of tissue in the area of the tumor or lesion. The needle is equipped with suction means to aid in extracting the cylindrical section of tissue. Since the current trend is toward early detection through frequent examination, the tumor or lesion which is to be checked through the biopsy is often very small and barely discernable on the X-ray. With the tumor or lesion often being well below the skin surface, it is extremely difficult to insert the biopsy needle with sufficient accuracy to engage and sample the area of tissue that is of interest and requires further testing.
In the presently used procedure, the breast of the patient is compressed against a horizontal surface below which the X-ray film is positioned. The compressing member is placed above the breast, clamping it against the surface, leaving a panel of skin exposed through a rectangular opening which has indicia on the sides of the opening to aid in establishing the location of the tumor discovered on the X-ray. By establishing the coordinates of the location of the tumor from the X-ray, a mark is placed on the location on the exposed skin using the indicia beside the opening to show where the biopsy needle should be inserted. An additional X-ray is taken to show the depth of the tumor so that the needle may be inserted and the specimen taken at the proper depth below the skin surface. After a biopsy specimen has been taken, another X-ray is taken to assure that the biopsy specimen is from the suspected tissue.
Because of the limited size of the tissue to be sampled and the possible errors in correlating the location of the needle insertion with the location of the tumor as shown on the X-ray, it is not unusual for many needle insertions to be required before achieving the proper location of the needle with respect to the tumor. The procedure causes considerable pain and discomfort and the prolongation resulting from the techniques employed suggest that improved techniques are required.
One attempt at locating the biopsy needle more precisely with respect to an X-ray picture of a tumor has involved the use of movable cross wires to create a shadow produced by an incandescent lamp to locate the needle insertion point on the skin. This technique has not proven to be particularly helpful, since the shadow image of the wires was not sharp enough to give a precise location and the normal ambient light in the area was usually too high to permit good visibility of the shadow image of the wires.
Another approach involved use of a laser dot which was projected in from the side to spot the needle insertion location on the skin. The angle at which the laser beam was projected tended to introduce errors since any deflection of the skin would cause the laser spot to shift location.
Another problem associated with the biopsy is the difficulty of inserting the needle in a direction perpendicular to the horizontal support surface. The selected location on the skin is intended to be directly over the tumor, so the needle must be inserted vertically if it is to engage the tumor. However, the biopsy needle is designed to be rotated as it is inserted. Otherwise, the sharp angled end on the needle will tend to deflect the path of the needle to one side as it is inserted. Experience has revealed that it is very difficult to rotate the biopsy needle and maintain its vertical orientation as it is inserted. Accordingly, it would be desirable to provide means for locating the insertion point for a biopsy needle and for guiding the needle to maintain its vertical position as it is inserted.


A method enhances selectivity between a film of a light-sensitive material and a layer to be subjected to etching in the course of fabrication processes of an electronic semiconductor device starting from a semiconductor material wafer. The method includes radiating the wafer with an ion beam subsequently to depositing the layer to be etched and defining a circuit pattern on the film of light-sensitive material. An alternative method exposes the wafer to a non-reactive gas medium under plasma rather than radiating the wafer with an ion beam.

This invention relates to a method for enhancing selectivity between a film of a light-sensitive material and a layer to be subjected to etching in the course of electronic semiconductor device fabrication processes.
As is well known, the fabrication of electronic semiconductor devices involves subjecting wafers of a silicon semiconductor to a number of chemio-physical treatments in order to define complex patterns of monolithically integrated electronic circuits thereon.
Specifically for defining submicron geometries, a processing technique known as plasma etching is used extensively whereby thin films of both conductive and dielectric materials can be etched.
For example, FIG. 1a shows schematically a portion of a semiconductor substrate 1 on which has been deposited a layer or film 2 of a suitable material for plasma etching, which film may be a dielectric layer, a layer of polycrystalline silicon, or a metallization layer.
FIG. 1b shows schematically the same semiconductor portion as overlaid with a layer 3 of a light-sensitive material, e.g., a photoresist.
As is well known, to define patterns in the underlying layer 2, the photoresist must be subjected to a photolithographic process for hardening predetermined portions 4 of the photoresist. A subsequent flushing step will result in the uncured photoresist portions being removed to leave the portions 4 as masks for corresponding portions of the layer 2 underneath, as shown in FIG. 1c.
At this point, a selective plasma etching step allows the patterns defined in the photoresist layer 3 to be transferred onto the layer 2. The masks represented by the cured photoresist portions 4 will protect the layer 2 during the etching step, as shown in FIG. 1d.
Finally, the photoresist masks are removed to reveal the structure shown in FIG. 1e.
One of the most important features of plasma etch processing is etch selectivity between the photoresist and the layer 2 to be etched. Briefly stated, the etching rate ratio of the two layers is vital to a successful etching operation.
The problems involved in providing for a high etch selectivity are discussed in U.S. Pat. No. 5,277,757, for example.
The selectivity values to be obtained by current technologies usually lie within the range of 2 to 15.
With too low a selectivity, the photoresist may become exhausted before the layer 2 being processed is fully etched. Thus, if the etching were continued, the upper portion of the layer 2 would no longer be protected by the photoresist, and would be etched itself. The outcome of this is an unacceptable degradation of the patterns, leading to possible losses in the yield of approved devices for operation.
To clarify the above points, attention is directed to FIGS. 2a and 2b, which reproduce photographs taken at an electron microscope of two identical profiles of aluminum metal interconnects. FIG. 2a shows a profile wherein etch selectivity has been adequate to ensure that the etched layer could take a desired shape with a rectangular cross-section.
Conversely, FIG. 2b shows a profile wherein etch selectivity has been inadequate to provide the desired shape for the etched layer; in fact, a degradation of the top surface is clearly noticeable.
With the current trend of integrated circuit fabrication technology towards defining ever smaller geometric structures, which involves lithographic constraints in terms of focal depth (Deep UV), it becomes necessary to use photoresist layers of ever smaller thickness.
Such thin layers are inherently less resistant to etching processes, and result in even lower selectivity.
In summary, there exists a growing demand for new technologies effective to enhance selectivity during etching processes.
A prior attempt at filling this demand has been a technology known as xe2x80x9cphotostabilizationxe2x80x9d. It provides for exposure of the semiconductor material wafers to high-intensity UV radiation at an elevated temperature, about 200xc2x0 C.
This treatment is described in a publication xe2x80x9cThe Platform for Excellence for Photoresist Processingxe2x80x9d, GEMINI, and is carried out after the layer 2 to be etched has been deposited and the photoresist patterned for plasma etching. Accordingly, the wafer 1 would be photostabilized after the step of FIG. 1c and ahead of the step of FIG. 1d.
Photostabilization causes the characteristics of the resin comprising the photoresist to undergo modification, and produces cross-linking reactions between the polymer chains. This provides increased resistance to plasma etch processing.
While being advantageous in more than one way, this prior technique concurrently causes the photoresist to become more dense, which if carried too far can result in the post-etch dimensions being excessively small and unacceptable. This same problem has also been encountered where a photoresist of the Deep UV type was used.
In addition, the photostabilization technique requires the availability of special equipment.
A second prior technique consists of radiating the wafer with an electron beam. This technique is described, for example, by M. Ross et al. in a publication xe2x80x9cCharacterization of Electron Beam Stabilization of Deep-UV Resistxe2x80x9d, Proceedings of the Microlithography Seminar INTERFACE 1997, page 119.
This radiation step is also carried out after the step of FIG. 1c and before the step of FIG. 1d.
An electron source is used for the purpose, with the electrons being accelerated towards the wafer surface by means of an electron gun.
The last-mentioned technique has the same advantages and the same drawbacks as that previously discussed.
A further approach is described in Japanese Patent Specification No. JP-01 288853, which relates to a semiconductor wafer processing technique using a reactive gas, such as CF4.
In this way, an additional barrier layer is created over the photoresist.
An embodiment of the present invention provides a method for enhancing selectivity between a film of a light-sensitive material and a layer to be etched in processes for fabricating electronic semiconductor devices. The method has such functional features as to effectively improve selectivity without introducing additional steps in the process.
The embodiment provides a method as above which can be implemented without the use of special equipment.
In one embodiment, the method radiates the wafer of semiconductor material with an ion beam.
Another embodiment provides for the wafer of semiconductor material to be exposed to a chemically inert plasma medium, that is a medium comprising non-reactive noble gases.
The features and advantages of the invention will be apparent from the following description of an exemplary, though not limitative, embodiment thereof illustrated by the accompanying drawings.

Method for enhancing selectivity between a film of a light-sensitive material and a layer to be etched in electronic semiconductor device fabrication processes


A heat shield assembly of a combustion chamber has a supporting structure and heat shield elements arranged on the supporting structure. For fastening, the supporting structure has spring devices fastened therein, into each of which a fastening bolt can be screwed. In order to realize the pre-installation and the later removal of the spring elements contained in the spring device, at a holding sleeve, a contact plate is removably fastened in the holding sleeve on the side facing the heat shield element and a stationary securing plate is arranged on the opposite side.

From the prior art, various solutions for the fastening of heat shield elements on a support structure of a combustion chamber are known. On account of occurring thermal expansions and vibrations it is absolutely necessary to provide an elastic fastening of the heat shield elements in the combustion chamber. To this end, various solutions are applied, wherein the heat shield elements are fastened either by means of an elastic clip or by means of a spring-mounted fastening bolt.
For the simple realization of a correspondingly elastic fastening of the fastening bolt, provision is made in the support structure of the combustion chamber at the individual fastening points in a known manner for spring packs which can be arranged on the support structure in a variety of ways. In the simplest way, a multiplicity of disk springs, and also a fastening nut, are arranged on the rear side pointing away from the combustion chamber interior. For accelerating the installation, it is also known to assemble the required disk springs to form a pack and in this case to arrange them in a sleeve. This sleeve is in turn fastened in the support structure. In a first known embodiment, use is made in this case of a sleeve, open toward the combustion chamber rear side, which comprises a multiplicity of disk springs and on the rear side has a pressure plate as the nut. This pressure plate is movable in the axial direction of the sleeve and is secured against loss by means of a locking element.
It has proved to be disadvantageous in the case of this solution that removal of the disk spring pack directly from the support structure is in many ways made difficult. A removal of the disk springs from the sleeve requires accessibility on the rear side of the support structure. This, however, depending on the position on the combustion chamber, is not provided. For solving this problem, EP 1 862 740 B1 discloses a disk spring pack in which a sleeve, which is open toward the combustion chamber interior, is used. In this case, a bottom of the sleeve which is arranged on the rear side forms the securing element against loss of the required pressure plate. The disk springs are similarly located on the pressure plate, wherein a disk with a supporting male thread is used as the abutment for the disk springs. In this case, the male thread is constructed in a manner to coincide with the male thread on the sleeve so that the sleeve and the disk can be screwed into a corresponding threaded hole in the support structure. As a result of this, removal of the disk spring pack toward the combustion chamber interior is subsequently enabled by unscrewing the disk, wherein the sleeve remains in the support structure.
In the embodiment with a sleeve open toward the rear side, there is the problem that the disk spring pack cannot be readily modified when required. In the alternative embodiment with the sleeve open toward the combustion chamber interior, there is the problem that this disk spring pack cannot be screwed directly into the support structure in a pre-assembled state.

Heat shield assembly of a combustion chamber having a disk spring set


An LCD device is disclosed which includes: at least one sensor module configured to sense an amount of external light; a liquid crystal display panel configured to display images; at least one light source module disposed under the liquid crystal display panel and configured to emit light; and at least one light guide plate configured to convert light from the at least one light source module into two-dimensional light and apply two-dimensional light to the liquid crystal display panel. The at least one light source module includes infrared LEDs and visible LEDs which are selectively driven according to a sensed light quantity sensed by the at least one sensor module and allow infrared light and visible light to be selectively emitted.

1. Field of the Disclosure
The present application relates to a liquid crystal display device.
2. Description of the Related Art
With the development of an information society, the requirements for display devices used to display images have been increased in a variety of manners. As such, flat display devices being thinner and lighter weight compared to cathode ray tubes (CRTs) of the related art are being actively researched and manufactured. The flat display devices include liquid crystal display (LCD) devices, plasma display devices (PDPs), organic light emitting display (OLED) devices and so on. Among the flat display devices, the LCD devices are now widely being used because of features such as small size, light weight, slimness and low power drive.
FIG. 1 is a disassembled perspective view showing an LCD device according to the related art.
Referring to FIG. 1, the related art LCD device includes a LCD panel 10 configured to display images, and a backlight unit 20 disposed under the LCD panel 10 and configured to apply light to the LCD panel 10. Also, the LCD device further includes a top cover 1 configured to encompass edges of the upper surface of the LCD panel 10 and combined with the backlight unit 20, and a support main 18 configured to support edges of the lower surface of the LCD panel 10 and combined with the backlight unit 20.
A gate printed-circuit-board (PCB) 13 is disposed beside an edge of the LCD panel 10 and configured to apply gate signals to gate lines of the LCD panel 10. A data PCB 15 is disposed beside another edge of the LCD panel 10 and configured to apply data voltages to data lines of the LCD panel 10. A plurality of flexible printed-circuit substrates 17 are arranged between the gate and data PCBs 13 and 15 and the LCD panel 10. As such, the gate PCB 13 can be connected to the gate lines of the LCD panel 10 through the flexible printed-circuit substrates 17. Similarly, the data PCB 15 can be connected to the data lines of the LCD panel 10 through the flexible printed-circuit substrates 17.
The backlight unit 20 includes a box-shaped bottom cover 70 with an opened upper surface, light source 50 disposed in an inner side surface of the bottom cover 70, a light guide plate 40 disposed parallel to the light source 50, optical sheets 30 disposed on the light guide plate 40, and a reflection sheet 60 disposed under the light guide plate 40. The light guide plate 40 is configured to convert incident light from the light source 50 into a two-dimensional light. The optical sheets 30 are configured to diffuse and converge the two-dimensional light entered from the light guide plate 40. The reflection sheet 60 reflects light progressing downward from the light guide plate 40 toward the LCD panel 10, in order to reduce light leakage.
The backlight unit 20 further includes a housing 51 configured to encompass a side of the light source 50. The housing 51 guides light emitted from the light source 50 to enter an incident surface of the light guide plate 40.
In general, light emitting diode (LED) can be used as a light source for the LCD device. In detail, an LED configured to emit visible light is used as a light source for the LCD device.
Such an LCD device can be used for a special purpose. In other words, the LCD device can be used when concealment is required in nighttime under a special circumstance such as a military operation and so. However, it is difficult to use the LCD device under the circumstance in which concealment is required because a user using the LCD device is exposed to everyone. This results from the fact that a visible LED is employed as a light source of the LCD device. Meanwhile, night vision goggles using infrared light instead of visible light are being mainly employed, in order to secure the view in the nighttime.
In view of this point, it is necessary to develop an LCD device for special purposes which uses both visible light and infrared light.


Systems and methods for building road models, driver models, and vehicle models and making predictions may use driving data received from a plurality of vehicles being driving along a path by a driver. The driving data including a minimum of vehicle location preferably supplemented by data related to the time of observations, vehicle dynamics, and various vehicle sensors. The received data may be categorized into a plurality of maneuvers and a plurality of variables that describe the maneuvers and the received driving data may be identified. A road model may then be built for the path based on the identified variables and maneuvers and the behaviors of a particular driver compared to the road model to assess their driving and intervene as appropriate.

Traditionally, driving environments are described using traditional maps. These maps provide a geographical representation derived from sensors on a well-equipped survey vehicle. The features that are detected by these vehicles are generally visual, such as paint markings detected by cameras, and spatial, curbs and buildings detected by cameras or LIDAR. In all cases the features are static. The features represented in the map are available to a single survey vehicle when it passes and they are generally stable on timescales of years corresponding to the time needed to create, distribute and use the resulting map. Features such as average speed or the distribution of speeds are not available to the survey vehicles and hence are not intrinsically part of these maps. Speed attributes may be later added to a map based on observations from vehicles or speed limit signs, but these are used for navigation and planning purposes and are only available at the link level (that is the time to traverse a section of road connecting two intersections).
In the past, practitioners have attempted to derive driver behavior models and predict driver patterns (speed, position, acceleration, etc.) based on a map (as described above), sensor data available in the vehicle (radar, vision system, etc.), and/or sensors external to a vehicle (hereafter identified as "external observations"). These models are often used in traffic simulations to describe the motion of simulated vehicles (based on traditional map data), for the evaluation of new vehicle sensors and systems in simulated environments, and for predicting a future vehicle state, as well as other purposes.
For example, curve speed warning systems provide a warning to a driver if he or she is entering a curve at a speed that is judged to be unsafe. In the simplest case, the speed is judged unsafe if the lateral acceleration is, or is expected to be in some short time interval, above some threshold, say 0.4 g, this lateral acceleration is derived from the curvature of the road and the (expected) speed of the vehicle by the relation a=v/r, where r is the radius of curvature of the road, a is the acceleration, and v is the speed This approach works well in many cases, however, there are cases where this method results in erroneous warnings of excessive speed, which, if low, may result in annoyance to the driver, or, if the computed speed is too high, a lack of warning when warning is appropriate. The errors can result from one of several mechanisms. One reason for calculating an incorrect speed is errors in the map. Curvature can be very sensitive to small errors in position for the road centerline, especially for very tight curves, thus even small relative errors in position between points in the map may result in significant errors in the maximum speed. The second reason for errors is that the road may be banked in such a way as to allow a higher or lower speed. Often bank angle of the road is not included in the map data. A third reason for errors is compound curves were there may be several different curvatures in close succession making it very difficult for the algorithm to properly compute an optimum speed. Errors may also be caused because drivers do not follow the centerline geometry e.g. they cut the curve resulting in a lower radius of curvature than that in the database. Humans may select a higher or lower speed due to other considerations as well, such as the width of the shoulder, the surface of the road, the ability to see the full extent of a curve, etc. None of these factors are included in the traditional map database. Additionally some drivers are better than others, or at least drive faster, thus a proper speed alert for one driver is an annoyance alarm for another.
Additionally, existing models have limited fidelity, due in part to the complexity of human driving behaviors, but also to the existence of many factors a human takes into consideration that are not available to sensors and algorithms used for traditional driver behavior modeling, such as road surface, weather conditions, time of day, vehicle sightlines, etc. The fidelity of existing behavior models are limited by the content available in existing map databases.

Systems and methods for building road models, driver models, and vehicle models and making predictions therefrom


A system for receiving inputs including ripple signals, input port conditions and clock conditions, and operating on information contained therein, receives a ripple signal, converts the signal to a digital form, and operates on multiple outputs that can act as interfaces with other peripheral devices depending on information in the received signal. The system can be used as a load control device in an electrical network of an industrial, domestic or commercial complex in conjunction with other load control devices.

Traditionally ripple control has been used to transmit information from a power source to a load via the power transmission system to afford remote control of that load. The most common use is in the control of the heating of hot water.
At present, ripple signal receivers are limited to direct control applications wherein they recognise a predetermined signal and execute a predetermined function. They are not capable of recognising more than one input or executing more than one function or set of functions based on the information contained in the inputs. Furthermore, the signal recognition and output function parameters are either limited or set at the time of manufacture so that each receiver is designed and manufactured for a specific purpose.
Currently available receivers are also traditionally associated with or attached to the main switchboard of a building or dwelling, from which a dedicated circuit is wired to the electrical appliance of which the receiver is the controller. The currently available receivers are also unable to decode the ripple signal and transmit the information contained in the signal to other devices.
EP 0159896 discloses a ripple control system wherein the receiver uses a pair of synchronous filters driven 90.degree. out of phase with each other to reject unwanted signals. The emphasis of the invention is on obtaining narrow bandwidth analogue filtering to enable the recognition of a predetermined code which may incorporate more than one frequency. The receiver then executes a predetermined function.
Other ripple receivers are known and include Aust 26102/71 and Aust 45281/79. However those are dedicated to receiving a particular ripple signal and executing a predetermined function or set of functions in response to that code.
NZ 211797, NZ 216945, and NZ 172898 disclose inventions relating to analogue or digital filtering of a wanted ripple signal in a ripple receiver. The inventions emphasise the filtering of a wanted ripple signal and do not disclose a selection of output functions which are dependent on one or more received ripple signals.


An uninterruptible power supply apparatus includes a cooler cooling a converter/chopper circuit and a cooler cooling a PWM inverter. The converter/chopper circuit and the cooler make up one integrated unit. Accordingly, a smaller apparatus can be achieved, compared with a conventional apparatus in which a cooler is provided for each of a converter and a chopper.

Conventionally, uninterruptible power supply apparatuses have been widely used as power supply apparatuses for stably supplying alternating current (AC) power to an important load such as a computer system. As shown for example in Japanese Patent Laying-Open No. 07-298516 (Patent Document 1), an uninterruptible power supply apparatus generally includes a converter converting commercial AC power to direct current (DC) power, an inverter converting DC power to AC power and supplying the AC power to a load, and a chopper supplying the DC power generated by the converter to a battery when the commercial AC power is supplied and supplying DC power of the battery to the inverter when the commercial AC power is interrupted.    Patent Document 1: Japanese Patent Laying-Open No. 07-298516

Compact uninterruptible power supply apparatus with cooling units

TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION