A scaleable abstraction control solution including an abstraction process and an abstraction system. The abstraction solution permits extraction, tracking, and management of data defined in one or more documents. The abstraction process can include double blind data abstraction. The abstracted data can be verified using a quality assurance process that can include statistical sampling, tracked random error insertion, and abstraction auditing. Data from documents can be abstracted into one or more customizable databases, forms, templates, or software.

The sheer number and complexity of contracts that a company may enter into results in difficulties in contract management. Large companies may have between 10,000 and 40,000 active contracts. Because these contracts are typically scattered throughout an organization within filing cabinets and individual computers, the business-critical information contained in the contracts, such as payment terms, renewal clauses, liabilities, etc., are hidden from view.
Some of the biggest barriers to successful implementations of contract management solutions are data availability and data quality. For a contract management solution to be effective, the content of paper and computer-based documents must be converted into useable, consistent digitized data. Contract managers typically gather this critical contract data through the difficult and time-consuming process of data conversion and extraction.
Data conversion, or the process of extracting existing data from other applications and converting it into a useable format, is important because certain types of data are more accurate when pulled from applications. However, data conversion alone falls short of the rich data fields that are created during the data extraction process.
Data abstraction is the process of extracting or summarizing key data from contracts and converting the data into consistent electronic formats. This data can be stored in a centralized data repository (application database) where it can be accessed by a contract management solution. Data abstraction focuses on both the quantitative and qualitative information contained in contracts. Quantitative information, data with measurable terms, is essential to the execution and management of contracts. This information can include items such as payment terms, renewal clauses, liabilities, discounts and other incentives, chargeback terms and revenue recognition. Qualitative information, or data about the specific elements of a contract, can be essential to understanding the contract as a whole and can include items such as critical issues, key clauses, responsibilities, and descriptive information about quantitative fields.
By extracting and consolidating key information from contracts, companies are able to build a comprehensive view of all the contractual obligations that drive their operations and spending. Because data abstraction is a difficult process involving high degrees of complexity, and because a company may have large numbers of contracts, few companies or system implementers are equipped to handle the job.


A fast Duplicate Address Detection (DAD) Entity in a distribution system including multiple Access Points and multiple mobile nodes associated therewith. The fast DAD entity includes a memory unit for storing an address table recording information including IP addresses of the multiple mobile nodes; an interface unit for receiving Neighbor Solicitation messages that includes an IP address from a mobile node newly associated with the distribution system; a record unit for extracting the IP address of new mobile node from the Neighbor Solicitation messages, and recording the IP address in the address table; a search unit for searching the IP addresses of the multiple mobile nodes stored in the address table; a decision unit for comparing the IP address of the new mobile node with the IP addresses of the multiple mobile nodes already configured with the sub-network, and deciding whether there already present the same IP address; and a control unit for generating a response message notifying that the IP address of the new mobile node is confirmed as unique and can be used as new Care-of Address (CoA), and sending the response message to the new mobile node through the interface unit, if there does not exist the same IP address as a result of the decision of the decision unit.

1. Field of the Invention
The present invention relates to a fast Duplicate Address Detection (DAD) Entity for managing information for fast DAD performance in the distribution system and a method for carrying out DAD efficiently using the fast DAD Entity, and more particularly, to a structure of the fast DAD Entity for managing mobile node address information for fast DAD performance in the distribution system using the Inter-Access Point Protocol (IAPP) and a method using the fast DAD Entity for shortening the DAD time it takes to assign a Care-of Address (CoA) to a mobile node.
2. Description of the Related Art
Recently, the number of wireless internet users has increased along with the rapid development of internet supplies. There have also been more wireless communications technology developments, and improved performance of mobile terminals such as portable computers, Personal Digital Assistants (PDAs), and so on. Under the wireless internet environment, a mobile terminal frequently roams around to change its own network point of attachment. Such a mobile terminal is referred to as a mobile node.
According to the mobile IPv6, a mobile node communicates with a Correspondent Node (CN) using its own home address through its Home Agent (HA) which is a router having its own registration information, even in the event that the mobile node roams to a Foreign Network. If a mobile node is linked to a foreign network, the mobile node is assigned a temporary address, that is, a CoA, from the foreign network, and performs registration, that is, sends binding update messages to its Home Agent together with its home address.
A mobile node joins the Solicited-node Multicast Address in its linked foreign network, randomly generates a new CoA that it attempts to use, and multicasts to its newly linked network, Neighbor Solicitation messages including its own IP address, Link-Layer address, generated CoA, and so on, to have the DAD carried out.
If the mobile node fails to receive a Neighbor Advertisement message notifying of address duplication within a predetermined limited time RetransTimer, the new CoA is recognized as a unique CoA, and the mobile node performs communications using the new CoA. The predetermined limited time RetransTimer is 1000 ms by default.
However, if a node attached to the sub-network is using the new CoA, the node sends to the mobile node, Neighbor Advertisement messages including its own Link-Layer address in a reply to the Neighbor Solicitation messages. Thus, the mobile node re-generates its interface identifier (ID) at random, re-generates a new CoA, and has the DAD procedure performed again for the newly generated CoA.
As stated above, according to the existing mobile IPv6, a wait time as much as the default time of RetransTimer is required, even in the event that the DAD succeeds. Therefore, the mobile node cannot use the CoA set as a temporary address for the waiting time, which causes a considerable packet loss when in handoff mode.
There exists the Optimistic DAD (ODAD) as a scheme proposed to solve the above problem. The ODAD is based on the assumption that the DAD is far more likely to succeed than to fail. Accordingly, a mobile node immediately uses a generated new CoA (NCoA) as a temporary address and performs communications without waiting till the DAD succeeds.
However, when an address is duplicated, the ODAD causes troubles to the mobile node that uses the address as a new address as well as to another mobile node that has configured the same address previously. That is, in the event that the mobile node that uses the address as a new address attempts to send packets or receive packets from a Correspondent Node, the mobile node may be disconnected with the Correspondent Node since packets can be delivered to the mobile node that has configured the same address previously. Further, the ODAD has a problem in that the introduction to the concept of temporary address before DAD adds complexity to the IPv6 configuration.

Fast duplicate address detection entity for managing information for fast duplicate address detection in distribution system and fast duplicate address detection method using the same


A method clusters each character on a document into one of a plurality of clusters based on widths of at least a portion of the characters on the document and measures distances between characters on the document. A threshold for each of the plurality of clusters is calculated based on at least a portion of the distances between characters in each cluster. The method then segments characters into units using the thresholds for the plurality of clusters. A distance between two characters in the document is compared to a threshold for a cluster to classify the two characters as being part of a unit when the distance is less than the threshold and not being part of the unit when the distance is greater than the threshold. Then, the method performs a recognition process on the document using the units.

When automatically processing documents, or images with text, an optical character recognition (OCR) software application segments the document into meaningful units, such as words. Every error that is introduced in this initial step may significantly lower the overall accuracy of the recognition process. For example, the OCR software application may output poor recognition results when poor word segmentation occurs even though the character recognition part was performed acceptably. This is because incorrect word segmentation cannot be overcome even by excellent recognition of the characters. For example, the original text of the document contains two amounts of "12,123 45,67", but the word segmentation merges the two amounts into one word of "12,123456,67", and it is impossible to know if and where the string should be split. For example, some interpretations could be "12,12 345,67" or "12,1 23456,67", etc. Accordingly, a poor word segmentation may negatively affect the optical character recognition results.

Font family and size aware character segmentation


The invention provides a process for producing and/or purifying acrylic acid or methacrylic acid or an ester of any of these, wherein mixtures of high-boiling heavy ingredients (high-boiling matter mixtures) discharged from individual step units are classified by the content therein of (meth)acrylic acid and/or of the dimer thereof and handled. According to the invention, even when high-boiling matters which have been discharged from distillation columns, high-boiling-matter cracking reactors, and the like in a plant for producing (meth)acrylic acid and/or an ester thereof and are alike in liquid nature are mixed with each other in the same tank, no polymer precipitation occurs. The handling and storage thereof are hence easy. Consequently, tanks can be united into one, and the process is extremely advantageous in reducing the construction cost and the area necessary for equipment.

In a process for producing acrylic acid or methacrylic acid (hereinafter referred to as (meth)acrylic acid) by catalytic vapor-phase oxidation and in a process for producing a (meth)acrylic ester by direct esterification, various high-boiling matters generate in individual step units such as a dehydration column, distillation column, acetic acid separation column, high-boiling-matter cracking reactor (high-boiling-matter cracking column), and the like. In general, these high-boiling matters are temporarily stored in tanks and thereafter subjected to a treatment such as recovery treatment, incineration disposal, or landfill disposal. Some kinds of high-boiling matters are stored in tanks via a high-boiling-matter cracking reactor. For storage, tanks disposed respectively for separate production processes have been used because the high-boiling matters are yielded from a variety of sources and have properties characteristic of the individual processes.
Such a storage method heretofore in use is intended to avoid a trouble that when high-boiling matters generating in individual processes are mixed, then the polymerization inhibitor, by-product polymers, and the like contained therein precipitate. This is because the polymers precipitated adhere as a tacky ingredient to the inside of an apparatus to arouse troubles. This necessitates separate tanks for high-boiling matters in plant construction. There has hence been a problem that the construction cost is high and the area necessary for tank installation is large.

Process for producing (meth)acrylic acid compound


The present invention involves a direction sensor and a navigation system containing the direction sensor. The direction sensor has an earth magnetism sensor and a rate gyro sensor that calculates a compensated direction by weighted means process of the outputs from the earth magnetism sensor and the rate gyro sensor. The compensated direction has a high detection accuracy similar to the rate gyro sensor over a short time period, but does not have an error accumulation of the rate gyro sensor during a long time interval because the rate gyro sensor is substantially calibrated with the accurate direction obtained by the averaging outputs of the earth magnetism sensor. The navigation system has distribution information of the magnetic disturbances to the earth magnetism on a map and it reduces the weighted mean ration to the earth magnetism sensor when the magnetic disturbance at the locating position is large. The accuracy of the compensated direction is further improved by excluding inaccurate outputs of the earth magnetism sensor.

(1) Field of the Invention
The present invention relates to a direction sensor having an earth magnetism sensor and a rate gyro sensor, and a navigation system of a vehicle having this direction sensor for locating a position on a map. More particularly, this invention relates to an improvement in detection accuracy of a driving direction sensor and navigation system.
(2) Description of the Related Art
Vehicles are recently equipped with a navigation system that detects driving paths, displays the driving position on a map and offers various instructions to aid a driver. The navigation system includes a driving direction sensor and a driving distance sensor, and calculates a position on a map from the driving direction and the driving distance. The direction sensor used in the above system is required to detect the absolute direction corresponding to the direction on a map.
Two types of direction sensors are generally used in the navigation system. One type is a rate gyro sensor that detects a rotation speed and calculates a rotated angle from a reference direction. A conventional gyro having a gimbal, an optical fiber gyro and a gas rate sensor are included in this rate gyro sensor. The rate gyro sensor generally has characteristics such that the detection accuracy is very high when detecting during a short time range, but the accuracy deteriorates when detecting over a long time range due to the accumulation of errors. Therefore, the rate gyro sensor needs to be periodically calibrated. This calibration is performed by or with reference to the absolute direction. Further, the rate gyro sensor needs to be initialized to set the reference direction at a start of the operation because it calculates the rotated angle from the reference direction. This initialization is also performed by or with reference to the absolute direction and the calibration is substantially equal or similar in procedure as the initialization.
The other type of direction sensor is an earth magnetism sensor that detects a forward angle of a vehicle relative to magnetic north of earth and calculates an absolute direction on a map. The earth magnetism sensor has an advantage in that it can detect an absolute direction and detecting errors do not accumulate. However, because the intensity of earth magnetism is as low as 0.3 Gauss, the detection of earth magnetism is disturbed by various external magnetic factors such as polarization of a vehicle body, and a magnetic field produced due to electrical equipment of a vehicle. Further, various facilities such iron bridges, large buildings, high level roads and tunnels also disturb the earth's magnetic field. These disturbances cause errors in the detection of the earth magnetism sensor. Various methods are proposed for compensating the disturbance due to polarization of vehicle body and the disturbance has been reduced by using these methods. However, the disturbances due to facilities such as bridges, buildings, etc. cannot be adequately compensated because these disturbances exist at random.
As the rate gyro sensor and the earth magnetism sensor respectively have the above-mentioned characteristics, a conventional navigation system generally comprises both a rate gyro sensor and an earth magnetic sensor and calculates a precise driving direction by compensating or correcting each other's detection results. For example, in a navigation system disclosed in Japanese Unexamined Utility Model Publication (Kokai) No. 62-163721, the errors of earth magnetism due to the polarization of a vehicle is compensated for by the difference of the outputs of the earth magnetism sensor and the rate gyro sensor.
In the most orthodox system, the rate gyro sensor is normally used as a driving direction sensor, and the output of the earth magnetism sensor is used only as a reference direction for the initialization and the periodical calibrations of the rate gyro sensor. This system has problems in that the reference direction obtained from the earth magnetism sensor is not necessarily precise and the accumulation of errors of the rate gyro sensor is not reduced.
In a navigation system disclosed in Japanese Unexamined Utility Model Publication (Kokai) No. 62-163721, the errors of an earth magnetism sensor due to the polarization of a vehicle is compensated for by the difference of the outputs of the earth magnetism sensor and the rate gyro sensor.
In a navigation system disclosed in Japanese Unexamined Utility Model Publication (Kokai) No. 61-72618, the earth magnetism sensor is normally used as a driving direction sensor and the rate gyro sensor is used when the magnetic field of the location position seems to be disturbed more than a predetermined level. The intensity of the disturbance is determined according to the difference between the outputs of the earth magnetism sensor and the rate gyro sensor in a short time range or interval. However, if the magnetic field of the earth magnetism is uniformly disturbed in a wide range or long time interval, for example, when driving along a railroad or a transmission line, the incorrect output of the earth magnetism sensor is always used because the difference in the short time range is always small under this condition since the disturbance is slowly accumulated.
In another navigation system disclosed in Japanese Unexamined Patent Publication (Kokai) No. 64-353314, information relating to specific facilities that largely influence the earth magnetic field and the influence patterns of the facilities to the magnetic field is disclosed. The earth magnetism sensor detects these changes of the magnetic field due to the specific facilities. The navigation system determines positions of the specific facilities and compensates the locating position according to the positions of the specific facilities. This system normally uses the rate gyro sensor as the driving direction sensor and initializes the rate gyro sensor by the above detected positions. However, the influence pattern of the facility to the magnetic field is very complex. Therefore, it is not easy to determine the facility position according to the detected changes of the magnetic field. Further, when there is no specific facility in a wide range or area, the driving direction is determined only by the rate gyro sensor. Therefore, this system also has a disadvantage in that the error accumulation of the rate gyro sensor increases.

Direction sensor having an earth magnetism sensor and a rate gyro sensor and navigation system having this direction sensor


An imager pixel and imaging device and system including an imager pixel for discharging a floating diffusion region are described. The imager pixel includes a photoconversion regions floating diffusion region, and a reset diode. A reset diode is coupled to the floating diffusion region and, when activated, discharges accumulated and collected charge from the photoconversion and the floating diffusion regions. Following successive accumulation, transfer and collection processes, the reset diode again discharges residual accumulated and collected charge from the photoconversion and the floating diffusion regions.

Digital imagers have become popular features in various electronic devices. Typically, a digital imager includes an array of imager pixels or cells with each of the pixels including a photoconversion device (e.g. a photogate, photoconductor, or photodiode). In a Complementary Metal Oxide Semiconductor (CMOS) imager, a readout circuit is connected to each imager pixel which typically includes a source follower output transistor. The photoconversion device converts photons to electrons which are typically stored at a floating diffusion region connected to the gate of the source follower output transistor. A charge transfer device (e.g., a pass transistor) can he included for transferring charge from the photoconversion device, also known as a charge accumulation region, to the floating diffusion region, also known as a charge collection region. In addition, such imager pixels typically have a transistor for resetting the floating diffusion region to a predetermined charge level prior to charge transference. Furthermore, the output signal of the source follower transistor is gated by a row select transistor.
CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630 to Rhodes, U.S. Pat. No. 6,376,868 to Rhodes, U.S. Pat. No. 6,310,366 to Rhodes et al., U.S. Pat. No. 6,326,652 to Rhodes, U.S. Pat. No. 6,204,524 to Rhodes, and U.S. Pat. No. 6,333,205 to Rhodes. The disclosures of each of the forgoing patents are herein incorporated by reference in their entirety.
FIG. 1 shows one example of an imager pixel 10 of a conventional CMOS imager. A photodiode 12 or a charge accumulation region is comprised of regions 14, 16 which are opposite doping types, creating a p-n junction. When incident light strikes the photodiode 12, electron/hole pairs are generated in the p-n junction of the photodiode 12. The generated electrons are collected in the n-type region 16 of the photodiode 12. The photo charge is transferred from the initial charge accumulation region to a charge collection region, typically a floating diffusion region 18 via a transfer transistor 20, as illustrated in FIG. 1. The collected charge at floating diffusion region 18 is typically converted to a pixel output voltage VOUT by controlling the gate of a source follower transistor 22.
In operations, a row select transistor 24 is activated by row select signal RS and connects the imager pixel 10 to a column line 26. A reset transistor 28 is typically turned on by a reset signal RESET and the residual collected charge in the floating diffusion region 18 is reset to a predetermined voltage (egg. Vdd). Integration of light and accumulation of electrons at photodiode 12 is conducted at least during the reset period and prior to the application of a transfer gate voltage signal TX. The transfer gate voltage signal TX is then applied to the gate of the transfer transistor 20 to cause the accumulated charge in the photodiode 12 to transfer to the collection or floating diffusion region 18.
As illustrated, the collection or floating diffusion region 18 is electrically connected to the gate of a source follower transistor 22, the output of which is selectively applied to the column line 26 by row select transistor 24. The reset transistor 28 selectively resets the collection or floating diffusion region 18 to a predetermined voltage by coupling a voltage Vdd to the collection or floating diffusion region 18 during a reset period which precedes or follows a charge accumulation or integration period.
While a four-transistor (4T) imager pixel design provides a separate reset transistor 28 to reset the collection or floating diffusion region 18 to a known potential, there is an ever increasing desire to minimize the number of transistors used in an imager pixel to reduce pixel cell size, increase pixel density in an array and increase the proportion (e.g., fill factor) of the charge accumulation region (e.g., photodiode) with the overall size of the imager pixel. Furthermore, there is also a further desire to simplify overall imager pixel design and fabrication complexity.


A reinforcing structure for a hinge section of a Gerber bridge including first and second girders (10, 11) which are connected with each other through the hinge section, comprises reinforcing steels (13a, 14a) continuously established on at least one of upper and lower surfaces of the first and second girders (10, 11) and reinforcement (13, 14) established by covering at least one of the upper and lower surfaces of the first and second girders on which the reinforcing steels are established, with curing material so as to integrally connect the first and second girders (10, 11) with each other. By making the hinge section to be continuous between the first and second girders to thereby establish the Gerber bridge as a continuous bridge, the Gerber bridge can have the same structure as a continuous bridge which transfers bending moment therethrough, and thus can obtain superior reinforcement effects and long-term stability.

A Gerber bridge having a hinge section or a connecting section in a continuous girder not only has the same advantages as those of a continuous bridge, but also is externally, statically determinate, so that differential settlement of supporting points does not occur in a Gerber bridge, and a Gerber bridge is not influenced by temperature changes. In addition, since it is possible in a Gerber bridge to decrease dead-load stress in comparison with a single girder, a Gerber bridge is advantageously adopted in a long span, a cross-section of which is dominated with dead-load. Thus, a Gerber bridge is often used as a steel made bridge or a concrete made bridge reinforced with steel bars.
There have often occurred breakages of bridges caused by rapidly increased traffic volume and heavy loads mounted on a heavy trucks. In particular, bridges established in accordance with old standard not only become obsolete, but also decrease its load-resistance due to repeated load from heavy trucks and corrosion due to salt damage. Among such bridges, a hinge section of a Gerber bridge is heavily damaged, and a crack occurs, in particular, because of shearing forces in a lot of hinge sections of existing Gerber bridges.
The damage of a hinge section of a Gerber bridge is characterized by:
(a) vertical crack of a support due to concentration of horizontal stress caused by expansion and contraction of girders which is caused by insufficient movement of a support of a hinge section, or by earthquake; PA1 (b) deterioration and corrosion of reinforcing steel caused by water leakage from an expanded or contracted portion; and PA1 (c) oblique cracks in corners caused by lack of resistance to bending moment and shearing force.
As is seen in a bridge accident which recently occurred in Korea, if a hinge section is heavily damaged, the bridge itself may fall. Thus, it has long been an object to establish a reinforcing structure of a hinge section.
A conventional method of reinforcing a hinge section of a Gerber bridge is to fill the space in a hinge section with epoxy resin. However, in this method, girders are merely the adhered to each other by means of adhesive force of the epoxy resin. This method is somewhat advantageous if epoxy resin is filled before a hinge section is damaged, but cannot provide sufficient advantages once a hinge section has been damaged.
In another conventional method, a cable is formed between horizontal girders by means of which a reaction force is supported at the hinge section. Since almost all work for carrying out this method can be done on a lower surface of the bridge, it is possible to accomplish reinforcement construction without prohibiting vehicles from running on the bridge. However, a horizontal girder to which the cable is fixed unperferably receives a large horizontal load which has not been taken into consideration at initial design. In addition, this method cannot provide essential repair to a damaged hinge section. Furthermore, the cable is kept exposed to the atmosphere, and it is not preferable to use a cable in such a condition.
In still another conventional method, a cable is spanned between support girders which supports a girder hung from a hinge section, and a pre-stress is introduced to the hung girder by means of an out-cable system. However, a fixed girder supporting a hung girder therewith receives a large horizontal load. In addition, as the introduced pre-stress decreases, it becomes more difficult to stably keep the reinforcement effects.
In view of the foregoing problems in prior methods of reinforcing a hinge section, it is an object of the present invention to provide a reinforcement structure for a hinge section which accomplishes superior reinforcement effects and long-term stability.

Reinforcing structure for hinge section of gerber bridge


A driving apparatus for a liquid crystal display device includes a liquid crystal display panel having a plurality of data lines and gate lines arranged in a matrix configuration, a data driver for supplying video data to the data lines, a gate driver for supplying gate pulses to the gate lines, and a timing controller for controlling polarity of the video data by supplying a polarity inversion signal to the data driver and controlling a timing of the data driver and the gate driver according to a number of horizontal synchronization signals supplied during a data blanking period, wherein a plurality of the polarity inversion signals are different from each other.

1. Field of the Invention
The present invention relates to a method and a display apparatus, and more particularly to a driving method and a liquid crystal display apparatus.
2. Description of the Related Art
A liquid crystal display device displays images by controlling light transmittance of a liquid crystal material using an electric field. The liquid crystal display device comprises a liquid crystal display panel having a pixel matrix and a drive circuit for driving the liquid crystal display panel.
FIG. 1 is a block schematic diagram of a liquid crystal display device according to the related art. In FIG. 1, a liquid crystal display is connected to a system driver 1 installed in a computer system, and includes a graphic card 2 for supplying video data adapted to a liquid crystal display 3. The graphic card 2 converts the video data and supplies the converted video data to the liquid crystal display 3, wherein the video data includes red (R), green (G), and blue (B) video data. In addition, the graphic card 2 generates control signals that include a clock signal (DCLK) and horizontal and vertical synchronization signals (Hsync, Vsync) suitable for the resolution of the liquid crystal display 3.
The liquid crystal display 3 includes a liquid crystal display panel 10, a data driver 6 for driving data lines (D1 to Dm) of the liquid crystal display panel 10, a gate driver 8 for driving gate lines (G1 to Gn) of the liquid crystal display panel 10, a timing controller 4 for controlling a drive timing of the data and the gate drivers 6 and 8, a power supply circuit 14 generating a driving voltage necessary to drive the liquid crystal display 3, and a gamma circuit 12 supplying a gamma voltage to the data driver 6.
The power supply circuit 14 generates driving voltages necessary for driving the liquid crystal display 3 (i.e., gate high voltage, gate low voltage, gamma reference voltage, and common voltage) using the voltage received from a system power supply (not shown) of the system driver 1. Accordingly, the power supply circuit 14 supplies the driving voltages to the timing controller 4, the data driver 6, the gate driver 8, and the gamma circuit 12.
The liquid crystal display panel 10 is connected to a thin film transistor (TFT) formed at each intersection of an n-number of the gate lines (G1 to Gn) and an m-number of the data lines (D1 to Dm) and includes liquid crystal cells connected to the respective thin film transistor and arranged in a matrix pattern. The thin film transistor supplies video data from the data lines (D1 to Dm) to the liquid crystal cell in response to gate signals from the gate lines (G1 to Gn). Since the liquid crystal cell comprises a pixel electrode connected to a common electrode and a thin film transistor facing each other in which a liquid crystal is located thereto, the liquid crystal display is equivalently expressed as a liquid crystal capacitor (Clc). The liquid crystal cell includes a storage capacitor (Cst) connected to a pre-staged gate line in order to maintain the data voltage charged to the liquid crystal capacitor (Clc) until the next data voltage is received.
The gate driver 8 sequentially supplies the gate high voltage signal to the gate lines (G1 to Gn) according to a gate start pulse signal (GSP) received from the timing controller 4. Accordingly, the gate driver 8 includes a plurality of gate drive integrated circuits (not shown), commonly referred to as gate driving ICs, for separately and sequentially driving the gate lines (G1 to Gn). Each of the gate driving ICs include a shift register responding to the gate start pulse signal (GSP) and a gate shift clock signal (GSC) provided from the timing controller 4. In addition, the gate driving ICs sequentially generate a gate high voltage signal and include a level shifter for shifting voltages of the gate high voltage signal to suitable levels for driving the thin film transistor. When the gate start pulse signal (GSP) is supplied from the timing controller 4, the gate driving ICs respond to the gate shift clock signal (GSC) and sequentially supplies the gate high voltage signal having one horizontal period (1H) to the gate lines (G1 to Gn) by performing a shift operation.
The data driver 6 converts the R, G, and B data signals from the timing controller 4 into analog signals and supplies the video data of one horizontal line for each horizontal period in which the gate high voltage signal is supplied to the gate line (G1 to Gn) to the data lines (DL1 to DLm). Accordingly, the data driver 6 includes a shift register part supplying sequential sampling signals, a latch part providing signals at the same time as sequentially latching the video data in response to the sampling signal, a digital-analog converter part converting the digital video data from latch part into analog video data, and an output buffer part providing signals as buffering the analog video data from the digital-analog converter part. Positive and negative gamma voltages are set in order to have voltage levels different from each other according to the voltage level of the video data from gamma circuit 12 in a digital-analog converter part of the data driver 6. As the positive and the negative gamma voltages are supplied to the video data, the video data adapts gamma characteristics that are selected by a polarity inversion signal (POL) from the timing controller 4 and is supplied to the data lines (D1 to Dm) in response to a source output enable signal (SOE).
In order to drive the liquid crystal display panel 10, the timing controller 4 responds to a clock signal and horizontal and vertical synchronization signals (Hsync, Vsync) from the graphic card 2, and controls driving timing of the gate driver 8 and the data driver 6. For example, the timing controller 4 responds to the clock signal and the horizontal and the vertical synchronization signals (Hsync, Vsync), generates a gate clock signal, a gate control signal, and a gate start pulse, and supplies the signals to the gate driver 8. In addition, the timing controller 4 responds to an input clock signal and horizontal and vertical synchronization signals (Hsync, Vsync), and generates a data enable signal and supplies the signals to the data driver 6. Moreover, the timing controller 4 supplies the R, G, and B video data from the graphic card 2 to the data driver 6 in synchronization with the polarity inversion signal and the data enable signal.
During driving of the liquid crystal panel 10, since the thin film transistor (TFT) is turned ON by the gate high voltage (Vgh) supplied to the gate line (G), video voltage signals supplied to the data lines (DL1 to DLm) are charged to the liquid crystal capacitor (Clc). Subsequently, since the thin film transistor is turned OFF by the gate low voltage (Vg1) supplied to the gate line (G), the video voltage charged to the liquid crystal capacitor (Clc) is maintained until the next data voltage is supplied. Accordingly, when the gate high voltage (Vgh) and the gate low voltage (Vg1) are supplied to a pre-staged gate line (Gn-1), the storage capacitor (Cst) connected in parallel to the liquid crystal capacitor (Clc) is charged and maintains the charged voltage higher than voltage charged to the liquid crystal capacitor during a turned OFF period. Thus, fluctuations of the voltages charged to the liquid crystal capacitor (Clc) can be minimized.
In order to drive the liquid crystal cells of the liquid crystal display panel, various inversion driving methods, such as frame inversion, line-column inversion, and dot inversion, are commonly used in the liquid crystal display device. During the frame inversion driving method, the polarity of the data signal supplied to the liquid crystal cells of the liquid crystal display panel is inverted whenever a frame is changed. During the line-column inversion method, the polarity of the data signal supplied to the liquid crystal cells is inverted according to the line (column) of the liquid crystal display panel. During the dot inversion method, a data signal is supplied to each liquid crystal cell of the liquid crystal display panel, wherein the data signal has a polarity contrary to the data signal supplied to adjacent liquid crystal cells along vertical and horizontal directions. In addition, during the dot inversion method, the polarity of the data signals supplied to all the liquid crystal cells of the liquid crystal display panel are inverted for each frame. Among the various inversion driving methods, the dot inversion method provides excellent picture quality, as compared to the frame and line-column inversion methods. Driving of the frame and line-column inversion methods is carried out as the data driver 6 responds to the polarity inversion signal supplied to the data driver 6 from the timing controller 4.
In general, liquid crystal display devices are commonly driven at a frame frequency of 60 Hz. However, in devices, such as a notebook computer, requiring low power consumption, the frame frequency is lowered to 50˜30 Hz, thereby creating a flicker phenomenon during the dot inversion method. Accordingly, a 2-dot inversion method is used to drive the liquid crystal display panel.
FIGS. 2A and 2B are diagrams showing 2-dot inversion polarity patterns applied to the liquid crystal display panel of FIG. 1 according to the related art. In FIGS. 2A and 2B, the polarities of data signals are supplied to liquid crystal cells of the liquid crystal display panel using a two-dot inversion method having odd- and even-numbered frames. In the odd- and even-numbered frames, the polarity of the data signal is inverted by the liquid crystal cell similar to the dot inversion system along a horizontal direction, but is inverted by the 2-dots along a vertical direction.
FIGS. 3A and 3B are diagrams showing additional 2-dot inversion polarity patterns applied to the liquid crystal display panel of FIG. 1 according to the related art. In FIGS. 3A and 3B, the polarities of data signals are supplied to liquid crystal cells of the liquid crystal display panel using a 2-dot inversion method including odd- and even-numbered frames. In the odd- and even-numbered frames, the polarity of the data signal is inverted by the liquid crystal cell similar to the dot inversion system along a horizontal direction, but is inverted by 2-dots along a vertical direction except for a first horizontal line.
FIG. 4 is a waveform diagram of polarity inversion signals applied to a data driver of the liquid crystal display panel of FIG. 1 according to the related art. In order to drive the liquid crystal display using the 2-dot inversion method, the timing controller 4 generates the polarity inversion signal (POL) for the liquid crystal cell driven by the 2-dot inversion method using the vertical synchronization signal (Vsync) and the horizontal synchronization signal (Hsync) received from the graphic card 2. In addition, the timing controller 4 generates the data enable signal (DE) for supplying the data signal to the liquid crystal cell using of the vertical synchronization signal (Vsync) and the horizontal synchronization signal (Hsync) received from the graphic card 2. The data enable signal (DE) generated by the timing controller 4 is divided into a back porch period, which spans from the last point of time of the vertical synchronization signal (Vsync) to the starting point of time of the data enable signal (DE), and an effective data period when effective data is supplied during one vertical synchronization period. Accordingly, the back porch period is a period between a rising edge of the data signal at the first data line, after the vertical synchronization signal (Vsync) is over, among a blanking period in which effective data does not exist in one frame driven by the one vertical synchronization signal (Vsync). Furthermore, the polarity of the polarity inversion signal (POL) generated by the timing controller 4 is inverted by the two horizontal synchronization signals (Hsync) during the period of the vertical synchronization signal (Vsync).
FIG. 5 is a circuit diagram of a polarity inversion signal generator for generating the polarity inversion signals of FIG. 4 according to the related art. In FIG. 5, the timing controller 4 includes a polarity inversion signal generator 30 having a first D flip-flop (DF1) supplying a first frequency division to the horizontal synchronization signal (Hsync), a second D flip-flop (DF2) supplying a second frequency division to an output from an inverted output terminal (BQ1) of the first D flip-flop (DF1), a reset circuit 32 for resetting frames of logic states of the first and the second D flip-flop (DF1, DF2), and a multiplexer for selecting an input signal supplied from a non-inversion output terminal (Q2) and an inverted output terminal (BQ2) of the second D flip-flop (DF2) to supply the selected input signal to the data driver.
In FIG. 5, the first D flip-flop (DF1) receives the inverted horizontal synchronization signal (Hsync) as a clock signal to supply the first frequency division to the received signal to provide the frequency-divided signal. The second D flip-flop (DF2) supplies the second frequency division to the input signal from the first D flip-flop (DF1) to provide the frequency-divided signal. For example, the second D flip-flop (DF2) supplies frequency-division twice to the horizontal synchronization signal (Hsync).
FIG. 6 is a waveform diagram of polarity inversion signals applied to a data driver according to the related art. In FIG. 6, the first D flip-flop (DF1) synchronizes a signal, which is fed-back from its own inversion output terminal (BQ1) and is received at an input terminal (D), with the rising edge of the inverted horizontal synchronization signal (Hsync) to generate a first polarity inversion signal (POL1), thereby supplying the generated first polarity inversion signal (POL1) to the clock input terminal of the second D flip-flop (DF2) through the inversion output terminal (BQ1). Accordingly, the first polarity inversion signal (POL1) is inverted in polarity for each falling edge of the horizontal synchronization signal (Hsync).
In FIG. 6, the second D flip-flop (DF2) synchronizes a signal, which is fed-back from its own inversion output terminal (BQ2) and is received at an input terminal (D), with the rising edge of the first polarity inversion signal (POL1) from the inversion output terminal (BQ1) of the first D flip-flop (DF1) to generate a second polarity inversion signal (POL2). Accordingly, the second polarity inversion signal (POL2) is inverted in polarity for each second period of the horizontal synchronization signal (Hsync). In addition, the second polarity inversion signal (POL2) generated at the second D flip-flop (DF2) is supplied to a first input terminal of the multiplexer (MUX) through the non-inversion output terminal (Q2) and is supplied to a second input terminal of the multiplexer (MUS) through the inversion output terminal (BQ2).
In FIG. 5, the reset circuit 32 includes a fourth D flip-flop (DF4) delaying the vertical synchronization signal (Vsync) received in response to the clock signal (CLK) by one clock period, a fifth D flip-flop (DF5) delaying the input signal from non-inversion output terminal of the fourth D flip-flop (DF4) by one clock period in response to the clock signal (CLK), an XOR gate 34 for Exclusive-OR-Logic operation between the input signal from non-inversion output terminal (Q5) of the fifth D flip-flop (DF5) and the vertical synchronization signal (Vsync), and a NAND gate for NAND-Logic operation between the output signal (Q6) from XOR gate 34 and the vertical synchronization signal (Vsync). The reset circuit 32 generates the reference to the horizontal synchronization signal (Hsync) in order to invert the vertical synchronization signal (Vsync) for each frame. In addition, the polarity inversion signal (POL2) of 2 dot inversion system is generated by the first and the second D flip-flops (DF1, DF2) including a reset signal (VSRB) for resetting the logic states of the first and the second D flip-flops (DF1, DF2) for each frame on the basis of the vertical synchronization signal (Vsync).
The multiplexer MUX selects input signals provided to each of the first and the second input terminals from the inverted output terminal (BQ2) and the non-inverted output terminal (Q2) of the second D flip-flop (DF2), and supplies the selected signal to the data driver 6 (in FIG. 1). Accordingly, the reset circuit 30 includes a third D flip-flop (DF3) that generates a selection signal (CS) inverted for each frame unit and is connected to a selection signal input terminal of the multiplexer MUX. The third D flip-flop (DF3) receives a feedback signal from its own inverted output terminal (BQ3) synchronized at a rising edge of the inverted vertical synchronization signal (Vsync), and generates and supplies the selection signal (CS) to the selection signal input terminal of the multiplexer MUX through a non-inverted output terminal (Q3). Since the selection signal is generated on the basis of the vertical synchronization signal (Vsync), the selection signal (CS) is inverted for each frame. Accordingly, the multiplexer MUX performs an inversion in response to the second polarity inversion signal (POL2) for each selection signal (CS) from the third D flip-flop (DF3) and supplies the inverted signal to the data driver 6.
FIG. 7 is a schematic circuit diagram of a MUX part of a data driver according to the related art. In FIG. 7, the data driver 6 (in FIG. 1) supplies the polarity of the video data to the liquid crystal display panel 10 (in FIG. 1) using the 2-dot inversion method according to the polarity inversion signal (POL2) received from the timing controller 4 (in FIG. 1) using a plurality of multiplexers 52. Accordingly, each of the multiplexers 52 of the data driver 6 (in FIG. 1) includes first and second input terminals to which positive (+) and negative (−) data voltages are supplied from a digital-analog converter (not shown), a selection signal input terminal to which the polarity inversion signal (POL2) received from the timing controller 4 (in FIG. 1) is supplied, and an output terminal connected to the data lines (DL1 to DLm) through a buffer (not shown). In FIG. 7, an inverter 54 is connected to the selection signal input terminal of even-numbered ones of the multiplexers 52 for inverting the polarity inversion signal (POL2) received from the timing controller 4 (in FIG. 1).
Accordingly, the polarity of the video data supplied to the liquid crystal display panel 10 from the data driver 6 (in FIG. 1), as shown in FIGS. 2A, 2B, 3A, and 3B, are converted to have the polarity using the 2-dot inversion method since a start point of time of the polarity inversion signal (POL2) differs according to the number of the horizontal synchronization signal (Hsync) received during the back porch period of the data enable signal (DE).
When the number of the horizontal synchronization signal (Hsync) received to the back porch period of the data enable signal (DE) is even numbered, the polarity of the effective video data of the data enable signal (DE) is supplied to the liquid crystal display panel 10 using the 2-dot inversion method, as shown in FIGS. 2A and 2B, according to the second polarity inversion signal (POL2) beginning from a point "A" of time of the second polarity inversion signal (POL2), as shown in FIG. 6. Furthermore, when the number of the horizontal synchronization signal (Hsync) received to the back porch period of the data enable signal (DE) is odd numbered, the polarity of the effective video data of the data enable signal (DE) is supplied to the liquid crystal display panel 10 using the 2-dot inversion method, as shown in FIGS. 3A and 3B, according to the second polarity inversion signal (POL2) beginning from a point "B" of time of the second polarity inversion signal (POL2), as shown in FIG. 6.
FIGS. 8A and 8B are diagrams showing flicker inspection patterns of a 2-dot inversion system according to the related art. In FIG. 8A, during the 2-dot inversion driving method, a flicker inspection pattern (i.e., the first flicker inspection pattern) shows that the polarity of data supplied to the liquid crystal display panel is changed by a 1-dot unit along a horizontal direction and is changed by a 2-dot unit along a vertical direction and is supplied as a half-gray pattern to a green sub-pixel of the negative polarity (−), and a black pattern to red and blue sub-pixels. Accordingly, if the first flicker inspection pattern is displayed on the liquid crystal display panel driven using the 2-dot inversion method, the flicker can be adjusted since components of a ½-frame frequency, i.e., frame frequency divided in half, appear due to the half-gray pattern of the negative polarity (−).
In FIG. 8B, during the 2-dot inversion driving method, the flicker inspection pattern (i.e., the second flicker inspection pattern) shows that the polarity of data supplied to the liquid crystal display panel is changed by a 1-dot unit along a horizontal direction and is changed by a 2-dot unit along a vertical direction except for a first horizontal direction that supplies a half-gray pattern to a green sub-pixel of the negative polarity (−), and a black pattern to red and blue sub pixels. Accordingly, if the second flicker inspection pattern is displayed on the liquid crystal display panel driven using the 2-dot inversion method, the flicker can be adjusted since components of a ½-frame frequency, i.e., frame frequency divided in half, appear due to the half-gray pattern of the negative polarity (−).
FIGS. 9A and 9B are diagrams showing flicker inspection patterns according to the related art. In FIG. 9A, inspection of a flicker adjustment for the liquid crystal display using the 2-dot inversion driving method includes adjusting the flicker by a first flicker inspection pattern (a) using the 2-dot inversion method (b), wherein the data polarity is changed by the 1-dot unit along the horizontal direction and is changed by the 2-dot unit along the vertical direction except for the first horizontal direction. Accordingly, a flicker inspection pattern (c) is produced, wherein the positive polarity (+) and the negative polarity (−) are offset from each other. Thus, flicker cannot be seen on the liquid crystal display panel due to the frame frequency component, and the flicker cannot be adjusted.
In FIG. 9B, inspection of a flicker adjustment for the liquid crystal display using the 2-dot inversion driving method includes adjusting the flicker by a first flicker inspection pattern (a) using the 2-dot inversion method (b), wherein the data polarity is changed by the 1-dot unit along the horizontal direction and is changed by the 2-dot unit along the vertical direction except for the first horizontal direction. Accordingly, a flicker inspection pattern (c) is produced, wherein the positive polarity (+) and the negative polarity (−) are offset from each other. Thus, flicker cannot be seen on the liquid crystal display panel due to the frame frequency component, and the flicker cannot be adjusted.
Accordingly, with respect to the driving method of the liquid crystal display using the 2-dot inversion driving method, since the polarity inversion signal (POL2) supplied to the data driver 6 becomes different according to the number of the horizontal synchronization signal received to the back porch period of the data enable signal (DE), the data polarity of the 2-dot inversion method supplied to the liquid crystal display panel 10 becomes different.

This patent is subject to a terminal disclaimer.

Method and apparatus for driving liquid crystal display device


A positionable truck bed enclosure may be mounted on the gunwales of a pickup truck. The enclosure may comprise side panels mountable on the gunwales and a top hinged along one edge and mounted between the side panels. The top may be hinged intermediate its ends to form first and second sections, and control arms connected to the second section may be used to control the position of the lower edge of the second section as the top is raised and lowered.

One advantage of open trucks such as pickup trucks is that the bed is readily accessible for loading and unloading of loads, cargo, pets and the like. Cargos may include, without limitation tools, instruments, materials, purchases and the like that may be valuable or that others may desire to remove from the truck bed. Protection against such removal is offered by bed covers, that may be referred to as tonneau covers, or by canopies. These solutions, however, may limit or restrict the use of the truck in one manner or other. For example, if a fifth wheel mount is installed in the bed of the truck, a canopy or tonneau cover will have to be removed or raised in order to mount a fifth wheel trailer on the fifth wheel mount. Cargo that extends above the level of the bed, such as, for example, an appliance such as a refrigerator, or other such bulky load, may likewise not be readily loadable without removal of the bed cover or canopy.
Cargo boxes mountable in the truck bed may be used to secure articles against removal from the truck bed. These may be mounted on the gunwales of the truck bed behind the cab of the truck. Tools, instruments, purchases and other items may be secured in the box, but space may be limited, and removal of the box for handling outsized cargo may require removal and storage of the box. Kennels or cages may be mounted in the truck bed or mounted to the gunwales of the truck bed for transportation of animals, and may likewise limit the use of the truck bed.
Transportation of animals raises another set of issues. For example, many dogs and other animals enjoy riding in the bed of a pickup. However, this may not be safe unless they are in some manner secured because the animal may be thrown from, or fall from, the bed if the truck maneuvers sharply, traverses sufficiently sharp terrain irregularities, suffers an impact or otherwise. Furthermore, if the animal is left in the bed when the vehicle is parked, the animal may present a danger to passersby, may exit the truck bed and wander off, or, particularly in the case of prize animals, such as show dogs, hunting dogs and working dogs, may be stolen from the bed of the truck. Finally, the bed of the truck does not offer protection to the animal from sun, rain and snow.


A buffering structure including at least a first FIFO storage structure to stage at least a selected one of undiverted egress packets and undiverted ingress packets is provided. The buffering structure further includes at least first associated packet drop logic to selectively effectuate head or tail flushes of the first FIFO storage structure. In various embodiments, one or more additional FIFO storage structures are also provided to stage one or more diverted and/or insertion of egress/ingress packets. Those use for staging diverted egress/ingress packets are likewise provided with associated packet drop logic to perform tail flushes of these additional FIFO structures. In one application, the buffering structure is employed by a multi-protocol network processor, which in turn is employed by an optical networking module.

1. Field of the Invention
The present invention relates to the field of networking. More specifically, the present invention relates to packet buffering and flushing for high-speed network trafficking equipment, such as 10-gigabit optical-electrical routers or switches.
2. Background Information
With advances in integrated circuit, microprocessor, networking and communication technologies, increasing number of devices, in particular, digital computing devices, are being networked together. Devices are often first coupled to a local area network, such as an Ethernet based office/home network. In turn, the local area networks are interconnected together through wide area networks, such as SONET networks, ATM networks, Frame Relay, and the like. Of particular importance is the TCP/IP based global inter-network, the Internet.
As a result of this trend of increased connectivity, increasing number of applications that are network dependent are being deployed. Examples of these network dependent applications include but are not limited to, the World Wide Web, e-mail, Internet based telephony, and various types of e-commerce and enterprise applications. The success of many content/service providers as well as commerce sites depend on high-speed delivery of a large volume of data across wide areas. In turn, the trend leads to increased demand for high-speed data trafficking.
Historically, data communication protocols specified the requirements of local/regional area networks, whereas telecommunication protocols specified the requirements of the regional/wide area networks. The rapid growth of high volume, high-speed data routing over the Internet has fueled a convergence of data communication (datacom) and telecommunication (telecom) protocols and requirements. It is increasingly important that data traffic be carried efficiently at high speed across local, regional and wide area networks.
When routing or switching network traffic, a need often arises to divert some of the packets being routed/switched onto a routing path (to perform additional processing or dropping the packets), or insert additional packets into the packet streams being received off a routing path. FIG. 1 illustrates a typical prior art approach to providing such functionality of packet diversion and/or packet insertion to an "intermediate" networking equipment. Illustrated is an example networking switch/router 50 having switching/routing fabric 52, including a number of ingress/egress points 54a-54n, through which packets may be received and/or routed onto the corresponding coupled mediums (routing paths). To provide the desired packet diversion and/or insertion functionality, one or more of ingress/egress points 54a-54n, such as point 54n, are reserved for the coupling of one or more companion processors 56 (also referred to as host processors), as opposed to the mediums connecting the switch/router to a network. The basic implementations of these switches/routers would route all packets through host processors 56, to enable host processors 56 to selectively divert some of the packets from the various routing paths (for additional processing or dropping the packets) or to selectively inject additional packets into the packet streams of the various routing paths. In other more advanced implementations, additional switching/routing resources (such as programmable switching/routing tables) (not shown) may be employed to facilitate routing of some of the packets of the routing paths to host processors 56 for "processing" ("diversion"), and routing of the packets injected by host processors 56 onto the routing paths of their selection ("insertion").
These prior art approaches all suffer from the common disadvantage in that at least one of the ingress/egress point of switching/routing fabric 52 is used for the coupling of a host processor 56. As networking speed increases, with more and more packets being routed/switched over a unit of time, host processor 56 becomes a bottleneck under these prior art approaches. Typically, more than one host processor 56 have to be employed, resulting in more than one ingress/egress points 54a-54n being consumed, which in turn leads to a reduction in the bandwidth of networking equipment 50 (for a given amount of switching/routing resources (fabric 52)). Increasingly, these architectures are becoming un-scalable for the type of efficient, high speed (10 Gb and beyond) networking that spans local, regional, and wide area networks, especially when multiple datacom and telecom protocols are involved.
Thus, an improved approach to packet diversion and insertion, including buffering and flushing of buffered packets, is desired.

Data link/physical layer packet buffering and flushing


Described are methods, apparatus and computer programs for determining run-time dependencies between logical components of a data processing environment. Components of the data processing environment are monitored by monitoring agents accessing run-time activity data via APIs of the managed system. A dependency generator identifies correlations between the run-time activity of the monitored components. For synchronous monitored systems, the dependency generator calculates an activity period for monitored components and determines which component's activity periods contain the activity periods of other components. Containment is used as an indicator of a likely dependency relationship, and a weighting is computed for each dependency relationship based on the consistency of containment.

The identification and tracking of dependencies between components of distributed systems is becoming increasingly important for integrated fault management (problem determination, impact analysis and repair for a set of cooperating components or processes). Distributed systems can be represented as interacting service components, classified into multiple layers, where each layer provides services to layers above. Many service components have dependencies on other service components—such that failures occurring in one service component affect other services and ultimately customer applications. A dependency exists when a first component requires a service performed by another component in order for the first component to execute its functions.
Dependencies can exist between the components of different services on a single system and also between the client and server components of a service distributed across multiple systems and network domains. Typically, dependencies exist between various components of a distributed system, such as end-user services, system services, applications and their logical and physical components.
Relatively frequent failures is a characteristic of most complex operational systems. Recently, attempts have been made to reduce systems' mean time to recovery (MTTR) once failures are detected. In order to reduce MTTR, it is necessary to be able to quickly determine the root cause of a problem that is detected at a higher level, and then to resolve the problem. Many problem determination applications use a component dependency graph to pin-point the root cause.
For example, B. Gruschke, "Integrated Event Management: Event Correlation Using Dependency Graphs", Proceedings of 9th IFIP/IEEE International workshop on Distributed Systems: Operations and Management (DSOM), 1998, discloses the use of a dependency graph for problem determination, mapping incoming alarms and events to nodes of the graph to identify dependent nodes which are a likely root cause of problems.
However, the discovery and recording of dependency information in a distributed system is a time-consuming and difficult task, since service components generally do not expose dependency information in a standard way. The lack of explicit dependency information makes the tasks of problem determination, isolation and resolution particularly difficult.
It is not acceptable to rely solely on dependency information within configuration files or machine-readable files provided by a software vendor, because the vendor's knowledge of dependencies may be limited and because static information within configuration files cannot provide a picture of dynamic, run-time dependencies. Emerging Web-based architectures allow the composition of applications at runtime and an application running within a Web application server may be instantiated and then terminated within a few seconds.
Furthermore, known techniques for automatically determining dependency information rely on fairly invasive middleware instrumentation or internal instrumentation—such as by embedding code which responds to Application Response Measurement (ARM) API calls (implementing The Open Group's Technical Standard C807) but this requires all components to implement the standard. In typical heterogeneous customer environments, which include a collection of hardware and software from different vendors, known approaches for intrumenting managed applications or objects to directly obtain dependency data are difficult and time consuming to implement, and therefore costly. Such instrumentation approaches may even be unusable in heterogeneous environments and in systems with security, licensing or other technical constraints.
One approach to instrumenting the components of a managed system is disclosed by P. Hasselmeyer in "Managing Dynamic Service Dependencies", 12th International Workshop on Distributed Systems: Operations and Management (DSOM), France, 2001. Dependencies are made accessible to management applications as properties attached to components. Dependency data is supplied directly by the component having the dependency. The components can be polled or dependency change notifications can be generated at run-time.
A technique for determining dependency information is described by S. Bagchi, G. Kar and J. Hellerstein in "Dependency Analysis in Distributed Systems using Fault Injection: Application to Problem Determination in an e-commerce Environment", 12th International Workshop on Distributed Systems: Operations and Management (DSOM), France, 2001. The described technique involves injecting a fault into a system during a testing phase and collecting measurements of the external behaviour of the system. The measurements are then analyzed and statistical regression analysis is used to determine the extent to which a quality of service metric depends on specific components. However, fault insertion and other "perturbation" techniques are reliant on the ability to insert controlled perturbations which will be effective in discovering dependencies. Furthermore, typical fault insertion techniques are limited to a testing phase because the insertion of faults is generally unacceptable at run-time.
C. Ensel, "Automated generation of dependency models for service management", Workshop of the Open View University Association (OVUA), 1999, suggests that generation of service dependency models may be automated using a Neural Network and information collected at run-time. Information such as, for example, CPU usage of an application is taken from lower layers such as the operating system, middleware or transport system. According to Ensel, a time series of objects' activities may then be fed into a Neural Network to judge whether the objects appear to be related. Ensel states that a complex training process is required, but does not describe the training process or how the Neural Network would determine dependencies.

Systems, methods and computer programs for determining dependencies between logical components in a data processing system or network

International Business Machines Corporation


Elevator systems and methods are provided. The systems include an elevator car movable within an elevator shaft, the elevator car includes an elevator car door interlock device operable to open and close elevator car doors, a plurality of landing doors located at respective landings along the elevator shaft, wherein each landing door includes a landing door interlock device operable to open and close a respective landing door, wherein each landing door interlock device is engageable by the elevator car door interlock device to enable operation of the elevator car doors and the respective landing door simultaneously. An elevator component inspection system is configured with a detector located on the top of the elevator car and arranged to monitor the interlock devices, wherein the detector obtains inspection data associated with the elevator car door interlock device and the plurality of landing door interlock devices.

The subject matter disclosed herein generally relates to elevator systems and, more particularly, elevator component inspection systems.
Elevator systems include elevators cars that are moveable within an elevator shaft between different landings or floors of a building. When an elevator car is located at a landing, part of the elevator car will typically engage with a landing door mechanism to enable operation of the landing doors. For example, an elevator car may include an elevator car door interlock device and each landing may have a landing door interlock device. During operation the elevator car door interlock device must be able to move through the elevator shaft without contacting the landing door interlock devices. Further, sufficient contact between the interlock devices is important to ensure proper operation of the elevator doors. Inspection of clearances, spacing, contact areas, etc. that are associated with the interlock devices takes time. Accordingly, improved means for inspection of such interlock devices may be beneficial.


The invention provides for a transport system and method of using the transport system. The transport system may include a transport track; and a platform assembly that transports along the transport track, the platform assembly including (1) a cargo platform; and (2) a pair of drive pinion trucks mounted on opposing sides of the cargo platform, each drive pinion truck engaged with the transport track for movement along the transport track. The drive pinion trucks may be provided with a leveling system to provide leveling of the cargo platform during operation.

The invention is directed to systems and methods for providing transport.
As the United States Navy moves its sea basing visions forward, underway replenishment (UNREP) operations will be required to be completed at increased rates and during higher sea states than current facilities and procedures allow. The Navy standard elevator has been identified as a key technology gap that will need to be addressed in order to achieve the goals of Future Naval Capability (FNC).
Currently, elevator operations and, more specifically, the time required to load/unload elevators and transport between elevators are the biggest bottleneck in shipboard cargo and weapons strike-up and strike-down operations. Additionally, in an effort to increase ship survivability, many future combatants will require a ropeless elevator capable of crossing gaps to allow for ballistic hatches to remain normally closed during ship operations.
The systems and methods of embodiments of the invention address the above needs and others.

General Dynamics Armament and Technical Products


A donor substrate for use in an organic light emitting display comprises a base substrate and a transfer layer disposed on the base substrate. A selective heat generation structure is interposed between the base substrate and the transfer layer. The selective heat generation structure has a heat generation region from which heat is generated by light-to-heat conversion and a heat non-generation region contacting the heat generation region. By employing the donor substrate, it is possible to form minute transfer layer patterns with high accuracy without the need to accurately control the width of a laser beam. A fabrication method of an organic light emitting display comprises disposing the donor substrate on an acceptor substrate, irradiating a laser beam onto the donor substrate, and forming a transfer layer pattern on a pixel electrode of the acceptor substrate.

1. Technical Field
The present invention relates to a donor substrate and, more particularly, to a donor substrate for laser thermal transfer, and to a fabrication method of an organic light emitting display using the donor substrate.
2. Related Art
In general, at least a laser beam, an acceptor substrate and a donor film are required to use a laser thermal transfer imaging method. The donor film comprises a base film, a light-to-heat conversion layer disposed on the entire surface of the base film, and a transfer layer disposed on the entire surface of the light-to-heat conversion layer. In order to execute such a laser thermal transfer imaging method, the donor film is laminated on the acceptor substrate so that the transfer layer faces the acceptor substrate. Subsequently, a laser beam is irradiated onto the donor film. Accordingly, transfer layer patterns are formed on the acceptor substrate. This technology is disclosed in U.S. Pat. Nos. 5,998,085, 6,214,520, and 6,114,088.
The formation of transfer layer patterns on the acceptor substrate by irradiating the laser beam onto the base film is now described in detail. The laser beam is irradiated onto parts of the base film. At this point, the light-to-heat conversion layer in the areas onto which the laser beam is irradiated absorbs the laser beam, and converts the laser beam to thermal energy. The transfer layer contacting the regions of the light-to-heat conversion layer, from which the thermal energy is generated is transferred to the acceptor substrate selectively by the thermal energy, thereby forming transfer layer patterns. In this case, the width of the transfer layer pattern corresponds to the width of the laser beam. Therefore, if it is intended to minutely form the transfer layer pattern, the width of the laser beam should be adjusted with accuracy. However, the accurate adjustment of the width of the laser beam requires a highly accurate laser apparatus. Such a laser apparatus with high accuracy comes at a high price, thereby causing an increase in the fabrication cost of an organic light emitting display.

Donor substrate and fabrication method of organic light emitting display using the same


A multiply-conductive matrix (MCM) for a current collector/electrode and a method of making the MCM are disclosed. The MCM includes a frame, preferably including a lug, the frame preferably made from a reticulated polymer foam substrate, and a body preferably made from the same substrate. The specific surface area of the frame is greater than the specific surface area of the body, resulting in greater rigidity and strength of the frame when the body and frame are joined to form an assembled matrix. Electrically conductive material is applied to the matrix to form the current collector. Optionally, a bonding material is also applied. Electro-active paste is applied to current if collector. The resulting MCM-based electrodes are ultra light and may be used as anode or cathodes in a lead-based battery, lithium ion battery, and nickel metal hydride battery for improved performance.

1. Field of the Invention
This invention relates to current collectors/electrodes for batteries and methods for producing current collectors/electrodes.
2. Description of the Related Art
Since the very early days of commercially available lead-acid batteries in the late 19th Century, battery electrodes have been made from pasted plates. Such plates, called "current collectors," commonly have a support base made of a porous matrix, such as a metal grid. Traditionally the grid is a lead alloy in which the holes are filled with an electro-active paste such as a mixture of red lead and 33% dilute sulfuric acid. The process of applying the paste to the matrix is referred to as "pasting". The term "matrix", as used herein, refers to the base structure of a current collector to which the electro-active paste is applied. Such a matrix may be characterized or classified, in part, on the basis of its specific surface area, normally expressed in the units m2/m3. The term "ground substance" and "matrix substrate" refer to the porous substance of which a matrix is made.
Recently attempts have been made to find non-metal matrix substrates that are more suitable for current collectors than lead grids. The goal has been to find a sturdy, light-weight, porous substrate that retains electro-active paste in the hostile environments and operating conditions of a wide range of battery applications. Kelley et al, U.S. Pat. No. 6,979,513 ("Kelley"), describe the use of carbon foam to form a battery current collector. Gyenge et al in U.S. Pat. No. 7,060,391 ("Gyenge") teach the use of carbon foam deposited with a layer of lead-tin alloy in the construction of a current collector for a lead acid battery.
These devices can improve the utilization efficiency of positive active mass, and battery energy density. However, current collectors such as those of Kelley and Gyenge employ cast solid lead or lead alloy frames and/or lead connectors—also known as "lugs"—in order to improve electrical current distribution and structural integrity. These lead frames and/or lugs are relatively heavy, which negates any weight savings achievable from the use of carbon foam, and, consequently, there is basically no or negative gain in power density and little improvement in energy density. Similarly, the weight of present nickel metal hydride battery current collectors is relatively high.
An additional drawback is that carbon foam is fragile and lacks structural integrity, which complicates manufacturing processes such as battery pasting and battery assembling. For instance, whilst a carbon foam matrix is much lighter than metal-based matrices carbon foam current collectors of the Gyenge type must be thicker than a conventional lead grid as a result of the need to maintain the structural integrity and strength of the carbon foam. Consequently, the number of such thick current collectors that can be arranged in parallel and series internally is actually less than in a battery using conventional lead grids. This means that a lead acid battery employing the Gyenge type current collectors have lower power density than the conventional lead acid battery.
Those skilled in the art are also familiar with deficiencies of other types of current collectors. For example, metal-foil current collectors presently used in lithium ion batteries have at least two problems: 1) low volume cathode material loading, given that the battery has a very thin layer of cathode material applied onto the metal sheet current collector, limiting the battery capacity; and 2) high risk of thermal runaway due to poor electrical conductivity of the cathode material such as Li—CoO2, Li—MnO2, and Li—FePO4. Thermal runaway may occur, for example, when a microscopic impurity such as copper or nickel is mixed inside the cathode material, which can converge on one spot, leading to a substantial electrical short and development of a sizable current between the positive and negative plates.
From the foregoing discussion it is apparent that a need exists for a matrix that is made of ultra light material and yet has sufficient rigidity and strength to serve as the base for a current collector. Accordingly, the present invention provides a novel and non-obvious multiply-conductive matrix (MCM) for a current collector that results in improved battery power density, energy density, and electrical conductivity as well as enhanced battery safety.

Multiply-conductive matrix for battery current collectors


A method and system for transferring access to cellular services from a postpaid subscriber account to a prepaid subscriber account are disclosed. A central postpaid system receives a request to transfer cellular services from the postpaid subscriber account to the prepaid subscriber account. The cellular services are transferred to a central prepaid system for the prepaid subscriber account. The amount of the transferred cellular services is deducted from the postpaid subscriber account stored in the central postpaid system. A monetary amount from the prepaid subscriber account is credited to the postpaid subscriber account for the transferred amount of cellular services.

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventor(s), to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
A telecommunication system may provide cellular services to both prepaid subscribers and postpaid subscribers. Prepaid subscribers pre-pay for cellular services such as voice call minutes, SMS/text, and data. When a prepaid subscriber uses up all of their voice call minutes, SMS/text, and/or data, they must go to a mobile provider to buy more cellular services. Postpaid subscribers, on the other hand, are billed once a month or once a billing period for the cellular services provided to them during the month/billing period, and the cellular services are automatically replenished every month/billing period regardless of whether the postpaid subscriber used-up all of the cellular services from the prior month/billing period. In addition, in some telecommunications systems, it is a "use it or lose it" postpaid subscription model. Thus, if the postpaid subscriber does not use all of their cellular services for the current month/billing period, the excess cellular services do not rollover to the next month/billing period and are forfeited.
Therefore, there exists a need for a cellular service exchange within a telecommunication system that enables prepaid subscribers to buy cellular services such as voice call minutes, SMS/text, and/or data from postpaid subscribers, and enables postpaid subscribers to sell and transfer their cellular services to prepaid subscribers. Such an exchange gives prepaid subscribers more flexibility as to where or how they reload their account, e.g., family/friends/colleagues with a postpaid account v. mobile store/provider, and gives postpaid subscribers the ability to monetize their excess or unused cellular services. Prepaid subscribers can also reload their accounts based on how much they can afford or need (e.g., $1, $2, $3, etc. or 1 minute, 2 minute, 3 minute, etc.), rather than in set increments. The cellular service exchange also provides flexibility in the type (e.g., voice call minutes, SMS/text, and/or data) and cost of the cellular service(s) the postpaid subscriber wishes to sell.

Transfer of cellular services from a postpaid subscriber to a prepaid subscriber


A method or an apparatus controls a continuously variable valve timing mechanism of an internal combustion engine to continuously and variably control the timing of an intake valve according to atmospheric pressure. The method or apparatus reads an engine revolution speed NE, an engine load GN, and an atmospheric pressure PA, refers to a map according to the atmospheric pressure PA, to find an atmospheric pressure correction coefficient Kpa, which is 1.0 at low altitudes with PA=760 mmHg and decreases as the altitude increases, i.e., as the atmospheric pressure PA decreases, calculates a corrected engine load GNpa as GNpa.rarw.GN/Kpa, and refers to a map according to the corrected engine load GNpa and engine revolution speed NE, to find a target displacement to be imposed on the open/close timing of the intake valve.

1. Field of the Invention
The present invention relates to a method of and an apparatus for controlling a continuously variable valve timing mechanism of an internal combustion engine, to continuously and variably control the open/close timing of an intake or exhaust valve of the engine according to a target timing.
2. Description of the Related Art
There are many variable mechanisms that optimize the open/close timing of a valve of an automobile engine according to driving conditions. One of them is an ON/OFF mechanism, which changes the timing of an intake valve of the engine from normal timing to early timing when an engine load exceeds a switching threshold. Japanese Unexamined Utility Model Publication No. 3-99844 decreases the switching threshold or increases a detected engine load in response to a decrease in atmospheric pressure, to optimize the valve timing.
To provide high-performance engines, continuously variable valve timing mechanisms for optimizing valve timing at all times have been developed in place of the ON/OFF mechanisms, as disclosed in Japanese Unexamined Patent Publication No. 4-175430 (corresponding to U.S. Pat. No. 5,271,360). This mechanism continuously changes the open/close timing of a valve, and therefore, never employs the idea of changing the switching threshold in response to a change in atmospheric pressure. There is a requirement, therefore, to provide a method of properly controlling the continuously variable valve timing mechanism.

Method of and apparatus for continuously and variably controlling valve timing of internal engine


At the surface of a p-type silicon substrate, n-type source/drain diffused layers are formed. On the substrate between the source/drain diffused layers, a gate insulating film made of a silicon oxide film is formed so as to be isolated from the diffused layers. A gate electrode is formed on the gate insulating film. Sidewalls are formed on the sides of the gate insulating film and gate electrode, extending upward from the substrate. In this invention, the sidewalls are composed of material whose permittivity is higher than that of the gate insulating film, for example, of a silicon nitride film.

1. Field of the Invention
This invention relates to a transistor with an offset gate structure, and more particularly to an improvement in the driving capability of a transistor with an offset gate structure.
2. Description of the Related Art
In MOSFETs, as their channel length become shorter, a short channel effect begins to take place, resulting in a fluctuation in the threshold value. For a MOSFET structure to alleviate the short channel effect, an LDD (Lightly Doped Drain) structure is widely known which has a reduced impurity concentration in the source/drain diffused layers, particularly in the vicinity of the gate electrode.
In LDD MOSFETs, the low impurity concentration at the edges of the diffused layers particularly in the vicinity of the gate electrode reduces an electric field strength there, which alleviates a short channel effect, improving the withstand voltage.
Even with such LDD MOSFETs, as their component elements get smaller, the withstand voltage decreases. A reduction in the withstand voltage is particularly significant when the gate length is smaller than or on the order of 0.6 to 0.4 .mu.m.
To solve this problem, an offset gate structure has been proposed which has a portion formed in the channel region at which the source/drain diffused layers and the gate electrode do not overlap each other.
These types of offset gate MOSFETs have an offset region in the current path (the channel region).
In the offset region, however, an inversion layer is not formed easily, thereby offering a high resistance. For this reason, offset gate MOSFETs cannot carry a sufficiently large current, which makes it difficult for the MOSFETs to sufficiently drive the transistors at the subsequent stage. That is, MOSFETs with an offset gate structure have a poor driving capability.

Transistor with an offset gate structure