A chip ID register configuration includes a shift register having individual stages. A fuse device connected to the shift register has fuses each substantially assigned to a respective one of the individual stages of the shift register, for identifying a chip having various required and non-required categories. The fuse device stores information from the categories to be read out serially through the shift register to identify the chip. A memory unit stores items of defined information. A logic circuit reads the fuse device for the required category and reads one of the items of defined information stored in the memory unit for the non-required category, on the basis of the categories of the chip to be identified. Standard testing of different chips is made possible while taking up little chip area.

The present invention relates to a chip ID (identification) register configuration including a shift register and a fuse device connected to the shift register. Individual stages of the shift register are each substantially assigned one fuse in the fuse configuration, in order to identify a chip. It is possible to store information in the fuse device, and to read out the information serially through the shift register to identify the chip.
A chip ID register configuration is implemented in a chip in order to ensure that the chip can be identified accurately. Significant data about the chip, such as its manufacturing site or factory, batch number, design version, etc. is stored in the chip ID register configuration.
Such a chip ID register configuration includes a shift register for n bits and n fuse latches, each of which has a fuse and a latch element and are also referred to in short as xe2x80x9cfusesxe2x80x9d in the following text. Information bits are programmed into those fuses, for example with the aid of a laser.
The information that is stored in the fuses of the chip ID register configuration, that is to say the significant data about the chip, can be read serially out of the register configuration with the aid of a clock signal during a test of the chip.
Attention also has to be paid to the fact that different information is additionally important for different chips. For example, there are items of information which have to be stored in each chip, such as its serial number or wafer number. Other information only needs to be stored on single chips, such as xe2x80x9csplit lot informationxe2x80x9d, for example.
One possible structure of a chip ID register configuration is illustrated in the following table. That register configuration includes a total of 74 storable bits, which are subdivided into 13 categories (xe2x80x9cfield namesxe2x80x9d) A to M, each of which is assigned a significant item of information (xe2x80x9cfield descriptionxe2x80x9d), such as lot number, wafer number, X coordinate, Y coordinate, etc.. Each category A to M has a specific number of bits (xe2x80x9cnumber of bits requiredxe2x80x9d). Contents, for example numbers 0 to 9, and meanings or xe2x80x9ccommentsxe2x80x9d assigned to the latter (xe2x80x9ccommentxe2x80x9d), such as a year of manufacture, are stored in further columns.
In each of the figures, categories A to M are intended to illustrate a shift register stage, as well as fuses F connected thereto, as is shown diagrammatically for the category A.
A first chip (xe2x80x9cproduct 1xe2x80x9d) may, for example, use all of the categories A to M, while a second chip (xe2x80x9cproduct 2xe2x80x9d) and a third chip (xe2x80x9cproduct 3xe2x80x9d) only need some parts of the chip ID register configuration.
In order to simplify a reading operation, a standard test interface is made available for each type of chip, that is to say for each product, so that the various chip ID register configurations of the different chips can all be read with the same test. The result is that testing time is readily saved. However, one drawback is to be seen in the fact that the individual chip ID register configurations on the various chips take up more chip area than would actually be required. Therefore, the same chip area is required for product 2 and product 3 as for product 1, although product 2 only has to store a total of 52 bits and product 3 only has to store 54 bits instead of the 74 bits of product 1, in their respective chip ID register configurations.
FIGS. 2a, 2b and 2c diagrammatically illustrate how chip area can be saved in a chip ID register configuration. Product 1 in FIG. 2a, product 2 in FIG. 2b and product 3 in FIG. 2c are specified herein as examples. In this case, an individual chip ID register configuration is implemented on each chip. It is only the information needed for the respective chip (xe2x80x9cproductxe2x80x9d) which is stored in that configuration. Product 1 needs 74 bits and has a correspondingly large chip ID register configuration with a 74-bit shift register. Each category A to M is assigned a respective corresponding number of fuses. For example, category A has four fuses, category B has five fuses, category C has five fuses, etc. (see Table 1).
Products 2 and 3 manage with a substantially smaller chip ID register configuration as compared with product 1, and have a 52-bit shift register (product 2) and a 54-bit shift register (product 3), respectively.
When reading out the conventional chip ID register configuration of the example of FIGS. 2a, 2b and 2c, a clock signal xe2x80x9cclockxe2x80x9d is input into the shift register and in each case reads out an information content stored in the fuses in the individual shift registers for the products 1 to 3. In that case, each chip or each type of chip must be tested individually, since the individual shift registers contain items of information from different categories in their stages. For example, product 1 contains information from category A in the first stage, while products 2 and 3 have information from categories B and D, respectively, in their first stages. This means that different test interfaces have to be used for the various products in order to ensure that the registers of the various chip ID register configurations can be read out correctly. In other words, product 1 needs a test interface which is based on the fact that all of the categories A to M are stored in the register. However, test interfaces which are needed for product 2 and for product 3 each assume that information from the specified categories is stored in the registers in those products. The chip identification is obtained at an output OUT.
It is therefore possible for chip area to be saved by using a chip ID register configuration based on the principle explained through the use of FIGS. 2a, 2b and 2c. However, that chip ID register configuration has the considerable disadvantage of ruling out the use of a standard test interface and needing different test interfaces for each different type of chips.
FIGS. 3a, 3b and 3c diagrammatically illustrate a chip ID register configuration which permits the use of a standard test interface. In this case, FIG. 3a again shows a chip ID register configuration for product 1, FIG. 3b shows a chip ID register configuration for product 2, and FIG. 3c shows a chip ID register configuration for product 3 from Table 1 given above, each in diagrammatic form.
In the example of FIGS. 3a, 3b and 3c, a standard chip ID register configuration for 74 bits is implemented on each chip, although the number of fuses that is actually integrated depends on the product. This means that product 1 has 74 fuses, while product 2 and product 3 have 52 fuses and 54 fuses, respectively.
On one hand, in the case of product 1, all of the stages of the shift register from category A to category M are respectively assigned fuses, so that in this case there is a total of 74 fuses. On the other hand, product 2 has fuses only in the stages of the shift register which correspond to necessary categories, that is to say in stages B, C, D, etc., while in the stages of the shift register with categories that are not needed, that is to say for example in stages belonging to category A, only an item of defined information is contained, for example xe2x80x9c0000xe2x80x9d, which is indicated by a designation xe2x80x9cdefxe2x80x9d in FIG. 3b.
Therefore, in the case of the chip ID register configuration of FIGS. 3a, 3b and 3c, an equal-sized shift register is always integrated into the individual chips of the various chip types, although a smaller shift register, as in the case of products 2 and 3, would be adequate. In other words, more chip area is occupied in this case than is actually required.
The use of a standard test interface is possible for this purpose, since in the case of categories that are not needed, that is to say for example in the case of category A of product 2, the defined information (xe2x80x9cdefxe2x80x9d) is obtained at the output OUT from the chip ID register configuration when the shift register stages in category A are read out.
It is accordingly an object of the invention to provide a chip ID register configuration, which overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and which permits the use of standard test interfaces when reading out, while saving chip area.
With the foregoing and other objects in view there is provided, in accordance with the invention, a chip ID register configuration, comprising a shift register having individual stages. A fuse device connected to the shift register has fuses each substantially assigned to a respective one of the individual stages of the shift register, for identifying a chip having various required and non-required categories. The fuse device stores information from the categories to be read out serially through the shift register to identify the chip. A memory unit stores items of defined information. A logic circuit reads the fuse device for the required category, and reads one of the items of defined information stored in the memory unit for the non-required category, on the basis of the categories of the chip to be identified.
The chip ID register configuration according to the invention therefore combines the advantages of the existing register configurations which are explained above by using FIGS. 2 and 3. Accordingly, in spite of the use of standard test interfaces, it is possible to adapt the chip area needed for the chip ID register configuration in the individual chip types to the actual requirement. For this purpose, in the chip ID register configuration according to the invention, the items of information that are important for the respective chip type or the respective product are stored. In this chip IP register configuration, each fuse and each register stage of the shift register is used. In order to then permit the chip ID register configurations of various chip types or products to be read in the same way, the logic circuit, including a counter and a multiplexer, is additionally integrated into the respective chips. This logic circuit ensures that an item of defined information is read for a category that is not needed. To this end, the multiplexer supplies the output either with the content of the shift register or the item of defined information. A counter, which is controlled by the clock signal, outputs the signals to read the shift register and to control the multiplexer. This counter has been developed specifically for each chip type or each product, but this does not require any great effort.
In summary, the chip ID register configuration according to the invention takes up less chip area than existing register configurations and nevertheless permits the standard testing of different chip types or products with one test interface.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a chip ID register configuration, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.


A method for measuring hysteresis curves and anisotropic energy of magnetic memory units is disclosed. It comprises gradually applying different magnetic fields to a single-layer or a multilayer magnetic structure (such as a MRAM memory unit) by extra ordinary Hall effect, and recording the variation of the Hall voltage to obtain the hysteresis curve and anisotropic energy with specific instruments, and calculating the individual anisotropic energy value of the magnetic material of the single-layer or the multilayer magnetic structure.

1. Field of Invention
The present invention relates to methods for measuring hysteresis curves and anisotropic energy, and more particularly to methods for measuring hysteresis curves and anisotropic energy of multilayer magnetic memory units.
2. Description of Related Art
As applications of magnetic components for everyday life grow day-by-day, developing various kinds of magnetic materials with better physical characteristics become the trend of fashion for researchers. Measuring the hysteresis curves and anisotropic energy of magnetic materials are important for differentiating their characteristics.
Conventional methods for measuring hysteresis curves include vibrating sample magnetometer (VSM) or the Kerr rotation angle by laser beam.
The measurement principle of VSM is to vibrate the magnetic sample near the coils, and determine the magnetic properties with the corresponding magnetic flux variations.
The measuring principle of the Kerr rotation angle by laser beam is either to magnetize the magnetic material with an applied external magnetic field, or spontaneously magnetize a ferromagnetic material, which makes the refraction index of the material magnetically birefringent. That means the refraction index of right-handed and left-handed polarized light are different. The magneto-optic Kerr effect will elliptically polarize a linearly polarized laser normally incident on a sample surface. The Kerr angle is the angle between the linearly polarized light and the elliptically polarized light. The direction of the magnetic moment could be determined using the angle of the elliptically polarized light, and together with the external magnetic field, the whole hysteresis curve can be obtained.
The conventional method for measuring the anisotropic energy of a single-layer uses an applied external magnetic field along the axis parallel to the direction of the sample magnetization to obtain the coercive field of the hysteresis curve and the variation curve of magnetization per unit of the sample. A second external magnetic field is applied along the axis perpendicular to the sample magnetization, wherein the intensity of the field must be much greater than the magnetization of the sample to obtain the variation curve of the perpendicular anisotropic energy of the sample. Software is then used to calculate the value of the anisotropic energy.
The aforementioned methods can all be affected by environmental factors. The VSM method is very sensitive. Any adjustment for the position between sample and coil will cause a significant deviation for the measurement. While measuring the Kerr rotation angle, a slight deviation regarding the pathway, intensity, or angle for the laser beam could also create some difficulty. The present invention provides methods that apply to the extra-ordinary Hall effect which can significantly reduce the difficulty to measure the hysteresis curves and anisotropic energy.
The conventional method can only measure the anisotropic energy of a single-layer material, however, if a magnetic structure consists of a plurality of magnetic materials, the conventional method fails to obtain the anisotropic energy of every magnetic material therein.
This other shortcoming for the conventional method is especially problematic for magnetic devices consisting of multi-film layers of various materials.

Method for measuring hysteresis curve and anisotropic energy of magnetic memory unit

National Yunlin University of Science and Technology


A sampling circuit uses an input stage to sample an input signal and a secondary evaluation stage to maintain the output state of the input stage. Once the input stage transitions at a clock transition, the secondary evaluation stage uses regenerative feedback devices to hold the state to help ensure the sampling circuit only switches once during an evaluation.

Field of the Invention
This disclosure relates to sampling circuits and more particularly to reducing metastability exposure associated with sampling circuits.
Description of the Related Art
Sampling circuits can be used to sample values of asynchronous signals. It is desirable that at the clock edge of the clock supplied to the sampling circuit, a sampling circuit evaluates sampled data based on the state of the data setup prior to the clock edge. The circuit of FIG. 1 shows a sampling circuit that samples on the rising edge of the clock signal C. The circuit of FIG. 1 has a long clock to Q (clk-Q) resolution time if the data transitions at an inopportune time relative to the clock. That can cause a metastability exposure. Metastability refers to a circuit, such as a flip-flop, whose output is unstable and oscillates between 0 and 1, eventually settling to either the 0 state or the 1 state. In the circuit shown in FIG. 1, during the evaluation phase, having the data change after the sampling (rising) edge of the clock and before the falling edge of the clock can lead to a false reading. Thus, using the sampling circuit of FIG. 1 in asynchronous sampling applications such as a time-to-digital converter (TDC) can result in false readings. Increasing the size of the feedback devices 101 and 103 used in the sampling circuit to mitigate the likelihood of false readings can slow the internal nodes and reduce speed. In sampling circuits metastability exposure is undesirable and improvements in sampling circuits for asynchronous applications is desirable.

Sampling circuit with reduced metastability exposure


Systems and methods for providing micro defect inspection capabilities for optical systems are disclosed. Each given wafer image is filtered, treated and normalized prior to performing surface feature detection and quantification. A partitioning scheme is utilized to partition the wafer image into a plurality of measurement sites and metric values are calculated for each of the plurality of measurement sites. Furthermore, transformation steps may also be utilized to extract additional process relevant metric values for analysis purposes.

Thin polished plates such as silicon wafers and the like are a very important part of modern technology. A wafer, for instance, may refer to a thin slice of semiconductor material used in the fabrication of integrated circuits and other devices. Other examples of thin polished plates may include magnetic disc substrates, gauge blocks and the like. While the technique described here refers mainly to wafers, it is to be understood that the technique also is applicable to other types of polished plates as well. The term wafer and the term thin polished plate may be used interchangeably in the present disclosure.
Wafer processing industries aim at integrating more circuits on a smaller chip at a lower cost with the ability to manufacture chips in large volumes with high quality and reliability to continuously improve the yield. As semiconductor technology evolves toward smaller and smaller nodes, wafer test metrology equipment is crucial to process development and to control that the wafers are in good quality. If a wafer has been damaged by previous processing steps, it is scrapped rather than undergo further processing to save money and time.
Nanotopography is defined as the deviation of a surface within a spatial wavelength of around 0.2 to 20 mm. Nanotopography bridges the gap between roughness and flatness in the topology map of wafer surface irregularities in spatial frequency. Nanotopography of the silicon wafer is dictated to a large extent by the polishing process. A true planetary, freefloating, double-sided polishing process that simultaneously polishes both sides of a silicon wafer technically achieves the required nanotopography and flatness results.
Nanotopography and flatness monitoring are critical at different steps in the wafer manufacturing process. The nanotopography and flatness of incoming bulk wafers are key parameters because of their impact on final wafer properties and wafer bond ability. Since the flatness properties of incoming 200- and 300-mm wafers undergo only minor changes during wafer processing, precise and comprehensive measurement capabilities are necessary to detect minute variations in topography on the final wafer surface.
Presently, the wafer metrology tools, such as WaferSight from KLA-Tencor, can scan both the front and back surfaces of a wafer, which is held vertically to avoid gravitational deformations. By combining wafer shape, edge roll-off, thickness or flatness, and nanotopography measurements in a single scan, the system provides complete data sets that are necessary for nanotopography and wafer geometry monitoring in wafer manufacturing. The system also performs dual-side topography measurements with high sampling resolution at the wafer edge in a single measurement.
Nanotopography data helps to close the gap between micron- and wafer-scale thickness measurements. Depending on the reference plane definition at the silicon/oxide interface, nanotopography can be linked to top-silicon thickness variations, thus providing uniformity information at the millimeter scale.
The settings of the high-pass or band-pass filters used for nanotopography measurement evaluation may significantly influence the results reported. Height maps of wafers of different nanotopography conditions recorded with an interferometric tool are processed with different filter settings in an experiment with factorial design in order to assess their influence and range of variation. Typical parameters of filter settings include filter type, filter cut-off wavelength and data extrapolation at the wafer edge. It is known that filter type, cut-off wavelength, and data extrapolation have significant impact on nanotopography measurement results. These three factors also are subject to strong interactions. A double Gaussian filter with constant 20 mm cut-off wavelength or variable cut-off wavelengths, starting from 20 mm cut-off wavelength in the wafer interior region and reducing to 1 mm in the wafer edge region are often used for providing accurate nanotopography height maps. Application of deviation metric for threshold height analysis allows the correct localization of peaks and valleys in the map and determining defective areas on a wafer.
The old method uses the Gaussian or Double Gaussian (DG) filters to process the wafer surface image and then calculate the specified metric values over the sites of the filtered images. However, the Gaussian and Double Gaussian filters have large attenuation on the signals from certain features of interest, dimple/pit, edge EPI crowns, scratch and slipline. Dimple/pit refers to surface depression. Edge EPI crowns refers to the difference between the surface elevation from the edge of the slice and that of the slice edges exposed in microns (associated with EPI layer deposition). Scratch refers to a shallow groove or cut below the established plane of the surface. Slipline refers to a process of plastic deformation in which one part of a crystal undergoes a shear displacement relative to another in a manner that preserves the crystallinity of each part of the material.
There is a large residue of low frequency shape component in the filtered image when the cutoff wavelength of the filter is long, making the old method that uses the Gaussian or Double Gaussian (DG) filters unsuitable. In addition, the response of the Gaussian and Double Gaussian filters to the wafer edge roll-off and the discontinuity created from edge exclusion also hinders the accurate identification of the wafer surface features in the wafer edge region.
Therein lies a need for systems and methods of advanced site-based nanotopography for wafer surface metrology without the aforementioned shortcomings.

Systems and methods of advanced site-based nanotopography for wafer surface metrology


Image correcting methods and apparatuses for removing speckles from an image are provided. The image correcting method includes selecting a first region in an image; removing a speckle from a second region except for the first region from the image by using image information at a predetermined frequency band in the image; and increasing a contrast level of the first region.

1. Field
The following description relates to image correcting methods and apparatuses for removing speckles from an image.
2. Description of the Related Art
Methods and apparatuses for observing inner structures of subjects such as human tissues or various materials are being widely used in various fields. Some examples are various kinds of internal transmitting images and tomography photographing equipment, such as an X-ray system, a computerized tomography (CT) scanner, a magnetic resonance imaging (MRI) apparatus, and an ultrasound system. Such equipment are used in the medical field because they identify cause, position, and progression of various kinds of diseases without cutting an inner structure of a human body or a living body. These diagnosis equipment are less harmful to a living body, provide a high-resolution image at a reasonable price, are mobile, and convenient to use. One such equipment, an optical coherence tomography (OCT) apparatus, uses interference between a light, which is irradiated to and reflected from a subject, and a reference light to capture an image of an inner structure of the subject. OCT provide high-resolution images, is harmless to a human body, and is widely used in the medical field due to its advantages.
Some methods of removing speckles from 2D ultrasonic images are described below. Since speckles occur by interference between reflective signals of adjacent reflectors, it is possible to decrease the speckles by decomposing signals generated from the reflectors. In addition, different ultrasonic images that represent the same position are obtained and shape deformation of the speckles on each ultrasonic image is averaged so that it is possible to reinforce image information on the tissues and to decrease the speckles. Moreover, it is possible to decrease speckles in an image by digital filtering, which may be implemented as a multi-scale technique using wavelet transform, which is a technique using a partial differential equation and a non-local means (NLM) technique using a mean of pixels adjacent to a current pixel in an image.

Method and apparatus for image correction


In a communication system, an access point in communication with one or more stations is configured to shift the start of transmission of its downlink data. The access point may automatically shift the transmission of the downlink data in response to receiving downlink data transmitted by a neighboring access point. Shifting the start of transmission of its downlink data permits stations to correctly synchronize to the downlink data. The transmission of data may be synchronized to a synchronization event. In some instances, the access point updates its downlink data with a value corresponding to the shift. The access point may not shift the transmission of the downlink data if the signal strength of the received downlink data is below a threshold.

The present disclosure relates generally to communication systems. The present disclosure relates more particularly to a mechanism for communicating data frames in a time division duplex communication system.
Wireless broadband networks have become very popular for data communication. Such networks may be set up relatively inexpensively and quickly. Such networks may provide local communication among network client devices through an access point which controls communication in the network. Instead, or in addition, such networks may provide communication access to remote networks including the Internet.
The Institute of Electrical and Electronics Engineers (IEEE) has promulgated several data communication standards which have subsequently been adopted by industry. One example of a family of such standards is commonly referred to IEEE 802.11. IEEE 802.11 includes several protocols including IEEE 802.11a, IEEE 802.11b, IEEE 802.11g, IEEE 802.11n and IEEE 802.11ac. 802.11 networks and devices are commonly referred to as WiFi devices. The 802.11 protocols define devices and operations that may communicate in a network, including messaging and timing. According to the protocols, an access point or base station controls data communication including timing of communication between the access point and respective stations or client devices in a service area around the access point. Client devices operate according to the same protocol to communicate with the access point. Messaging is defined by the protocol.
To improve the utility of these networks, manufacturers have been expanding the range of communication and thus the size of the service area. Initially, WiFi communication was limited to line of sight or a few tens of meters between transmitter and receiver. More recently, networks are being developed with a service area radius or node size of 5 to 15 km.
Increasing the scale of networks in this manner has met with commercial success. This success has created opportunities for additional features in systems and methods for communication as well as opportunities for improving performance and efficiency.


In some examples, an autonomous robotic welding system comprises a workspace including a part having a seam, a sensor configured to capture multiple images within the workspace, a robot configured to lay weld along the seam, and a controller. The controller is configured to identify the seam on the part in the workspace based on the multiple images, plan a path for the robot to follow when welding the seam, the path including multiple different configurations of the robot, and instruct the robot to weld the seam according to the planned path.

Robotic manufacturing entails the use of robots to perform one or more aspects of a manufacturing process. Robotic welding is one application in the field of robotic manufacturing. In robotic welding, robots weld two or more components together along one or more seams. Because such robots automate processes that would otherwise be performed by humans or by machines directly controlled by humans, they provide significant benefits in production time, reliability, efficiency, and costs.


A sensor system for determining the position of at least one edge of at least one web material traveling along a predetermined path. In one embodiment, the sensor system has at least one transmitter block having a plurality of transmitters capable of selectively transmitting ultrasonic signals and at least one receiver block having a plurality of receivers capable of generating receiver output signals in response to the receivers receiving at least a portion of the ultrasonic signals transmitted by the at least one transmitter block. The receiver block is spaced a distance from the transmitter block so as to define a sensor field of view therebetween whereby at least a portion of the at least one web material traveling along a predetermined travel path interferes with at least a portion of the ultrasonic signals transmitted by the at least one transmitter block. The receiver output signals generated by the at least one receiver block is indicative of the position of the web of material as the same is moved along the travel path between the transmitter block and the receiver block. In an alternative embodiment, the functions of the at least one transmitter block and the at least one receiver block are performed essentially equivalently by at least one transceiver block and at least one reflector.

Ultrasonic sensors having a transmitter disposed on one side of a web material and a receiver disposed on the other side of the web material for locating the position of an edge of the web material therebetween, are known in the art. Such ultrasonic sensors are mounted perpendicular to the web material direction of travel and suffer from problems due to the reflection of sound between the transmitter, the web material, and the receiver. Noise is thereby introduced into the signal produced by the receiver, and reduces the accuracy of the prior art ultrasonic sensors.
Previously, people in the art attempted to solve this problem by changing the angle of the ultrasonic sensor with respect to the web material (away from the perpendicular orientation discussed above), as well as designing sensor housing to maintain non-parallelism between transmit and receive sides, so that the sound reflections would be reflected away from the receiver. Although the prior art method reduced the problem of sound reflection somewhat, it is less desirable to have the prior art ultrasonic sensor mounted angularly with respect to the direction of web travel. In addition, this angular mounting limits the effective sensing area and allows less web plane change than that of perpendicular mounting.
Thus, there is a need for an ultrasonic sensor which does not suffer from the aforementioned problems caused by the reflection of the sound waves as described hereinabove. It is to such an improved ultrasonic sensor that the present invention is directed.

Ultrasonic sensor system for web-guiding apparatus


Described are techniques used in connection with subscribe and alert services as may be embodied in a subscription system. The subscription system uses a preprocessor for preprocessing subscription and notification messages prior to submission to the subscription/publication server. The preprocessor outputs a preprocessed message including one or more identifiers categorizing an input subscription or notification message. The preprocessor uses a content graph to produce the preprocessed message. The subscription system uses a content based routing system with a tree-like topology to process preprocessed subscriptions and notifications using content graphs maintained at each node in the system. Also described is a loss detection technique using sequence numbers.

1. Technical Field
This application generally relates to event notification, and more particularly to event notification as may be used in connection with a subscription service.
2. Description of Related Art
Computer systems may be used in performing a variety of different tasks and operations. One or more computer systems may be connected using a network such as the Internet. The Internet may be used to find information of interest about a selected topic. Search engines, such as Google, may be used to return information in accordance with a search query. However, such queries provide a snapshot of information in response to a query at a particular point in time and do not alert users when subsequent new information may be available.
Subscription systems or event notification systems may be used to notify or report information to a subscriber from an information provider when certain events occur. Such systems in use today include, for example, subscription to weather service notifications, stock market prices, and the like. Users or subscribers sign up to receive information of interest. When an event of interest occurs, the subscribers may be sent an electronic notification.
One type of existing subscription service is a unicast subscription system such as, for example, Ebay, Amazon, and Google. Notifications are sent to users about selected topics of interest or items as selected by the users or subscribers. In the unicast approach, subscribers send messages to a single information provider. However, existing unicast subscription services may be unable to efficiently distribute notifications to a large number of subscribers. Thus, when there are a large number of notification messages to be sent, the subscription service may experience an unacceptable performance degradation.
Another existing approach, the single-identifier multicast subscription system, is based on the IP multicast communication model. Using multicast, a subscriber sends her subscription to a provider. When the provider is ready to broadcast an event or send out a notification, the provider addresses each packet to a single IP multicast address or channel. Upon receiving a packet, the router looks up the identifier and forwards the packet to selected neighboring routers or subscribers according to its router notification tables. The multicast subscription service uses a topology of one or more event routers to disseminate notifications. The event routers may be arranged, for example, in an overlay network. An identifier may be associated with a particular subject or category of information about which a subscriber may receive information. A difficulty may occur if a subscriber chooses to request information from overlapping subscription categories each represented by an identifier. As an example of the foregoing, a subscriber may want to receive notification for all baseball games between the Boston Red Sox and any New York baseball team. Rather than use 3 subscription category identifiers (one each for "baseball", "Red Sox" and "New York"), a subscription service may have to use, for example, 7 group identifiers to represent the possible subscription category intersections and avoid sending out messages or notifications to the subscriber that do not fit the selected subscription criteria. The number of category identifiers increases with the number of subscription categories and associated category subscription intersections.
Another approach based on the IP multicast model may be referred to as a content-based multicast system. In the content-based system, the forwarded messages are based on message text rather than relying on a single-identifier attached to each message. Existing content-based systems may use subscription requests and notifications based on attribute-value pairs (e.g., TYPE=BASEBALL, GAME=CUBS v. MARLINS, DATE=OCTOBER 20). Such systems may impose a structure on the message and may require modifications to many components (such as each of the routers) of the system to support multiple message formats or changes to an existing format. In comparison to the identifier multicast-based system for example, additional computation time may be used to parse the strings of the message text decreasing the efficiency of the content-based multicast approach.
Thus, it may be desirable to have an efficient and flexible system for use in event notification applications that overcomes one or more of the problems with the existing techniques. It may be desirable to have a single system for event notification in connection with multiple information providers in which the system may be easily adjusted to accommodate varying subscriber and notification formats.

High speed subscribe-and-alert service using content graphs


An aging monitor circuit that provides a more accurate estimate of aging and/or delay in a circuit and/or circuit path. The aging monitor circuit employs a separate aging path with driving and receiving flip flops (FFs) and a tunable replica circuit (TRC) to enable measurements of single-transition DC-stressed path delay that only propagates through stressed transistors or other circuit element(s). A finite state machine (FSM) in the aging monitor circuit is configured to adjust a frequency of a clock signal output by a digitally controlled oscillator (DCO) in response to an error signal output by the receiving FF. The error signal is generated in response to single-transition DC-stressed path delay; and therefore enables the adjustment of the frequency of the dock signal to correspond to an amount or effect of the delay.

As a transistor ages over time and due to regular usage, the physical/electrical characteristics of the materials that make up the transistor may change. The changes in the physical/electrical characteristics of the materials may, for example, cause a switching speed of the transistor to become slower (more delayed) over time.
In current microprocessors, on-die monitors typically use a ring oscillator (RO) design to measure the impact of transistor aging on circuit delay. A feature of an RO design is the simple integration of the RO into existing product design flows because a RO is generally a self-contained circuit (e.g., a clock signal is not required). A problem with an RO design, however, is the severe underestimation of the impact of transistor aging on circuit delay.
With respect to a circuit path in a microprocessor, the worst-case delay degradation from transistor aging occurs when the path ages during a DC state, in which path nodes receive a constant DC voltage to keep specific transistor(s) in the path turned ON (such as a constant logic high level voltage to keep N-type transistors turned ON and/or a constant logic low level voltage to keep P-type transistors turned ON) and hence these transistor(s) are constantly under DC stress that contributes to the aging of the transistor(s). Such DC-stress during the DC state is the expected aging scenario for the vast majority of paths in a microprocessor. In general, increasing the level of DC voltage results in faster aging.
The path delay change due to DC stress depends significantly on the transition of the input signal being provided to the circuit path(s). Consider for example, a circuit path in which multiple pairs of N-type and P-type transistors are coupled in series, such that the first pair of transistors includes a N-type transistor and a P-type transistor, the second pair of transistors include another N-type transistor and another P-type transistor, and so forth. A single-transition input to the circuit path (such as an input binary signal going from logic high to logic low, or vice versa) will turn ON one of the transistors in the pair, while the other transistor in each pair is turned OFF.
The single-transition DC-stressed path delay that only propagates through stressed transistors represents the worst-case path delay degradation. In comparison, the opposite single-transition unstressed path delay that only propagates through non-stressed transistors may actually result in a delay improvement due to the reduced contention between stressed and non-stressed transistors in the path. In a conventional RO design, the RO's delay measurement averages the path delays from both transitions (e.g., stressed and unstressed path delays), thereby significantly underestimating the delay degradation.
Accordingly, even though a conventional RO design allows for simple integration into existing product design flows, the conventional RO design severely underestimates the impact of aging on circuit path delay since the path delays from both stressed and unstressed transitions are averaged. Hence, current on-die RO-based aging monitors are inadequate for measuring the effect of aging on path delays in a microprocessor or other circuitry.

Self-contained, path-level aging monitor apparatus and method


An organic light emitting diode, including: a substrate; a first cavity electrode in a first micro-cavity region of the substrate; a first transparent electrode of a first thickness in the first micro-cavity region, the first transparent electrode overlaps beyond a first side of the first cavity electrode; a first emissive layer in electrical connection with the first transparent electrode; and a cathode layer on the first emissive layer.

Field of the Invention
This application claims the benefit of Korean Patent Application No. 10-2013-0001321, filed on Jan. 4, 2013, which is hereby incorporated by reference as if fully set forth herein. Embodiments of the invention relate to an organic light emitting diode, and more particularly, to an organic light emitting diode micro-cavity structure and method of making. Although embodiments of the invention are suitable for a wide scope of applications, it is particularly suitable for a matrix structure having at least three sub-pixel regions.
Discussion of the Related Art
In general, an organic electroluminescent (EL) device, also known as organic light-emitting diode device or OLED device, can emit light at a predetermined color wavelength. An OLED device includes an anode for hole injection, a cathode for electron injection, and an organic emissive layer, sandwiched between the anode and cathode to enable hole and electron recombination that yields an emission of light. OLED devices can be stacked on top of one another so that one emissive layer emits one color and an other emissive layer emits another color such that the colors combine to form one or more colors. To construct a pixilated color display device such as a television, computer monitor, cell phone display, or digital camera display, individual OLED devices or stacked OLED devices can be arranged as a matrix array of pixels.
In order for each pixel to produce multiple colors, the pixels are divided into sub-pixel regions with each sub-pixel region having an OLED device for emitting a predetermined peak color wavelength or a plurality of color wavelengths. Generally, a color pixel display is made of one of two pixel types. The first pixel type is the RGB pixel type that has red, green and blue sub-pixel regions. The second pixel type is the RGBW pixel type that has red, green, blue and white sub-pixel regions. Red, green and blue sub-pixel regions emit predetermined peak color wavelengths of red, green and blue, respectively. A white sub-pixel region emits a plurality of color wavelengths. In addition to the RGB and RGBW pixel types, there are other display pixel types having sub-pixel regions with other predetermined peak color wavelengths, such as a RGCM pixel type having sub-pixel regions that emit with peak color wavelengths of red, green, cyan and magenta.
A matrix of pixels can be electrically driven using either a passive matrix or an active matrix driving scheme. In a passive matrix, the OLED sub-pixel regions are sandwiched between two sets of orthogonal electrodes arranged in rows and columns. In an active matrix configuration, each OLED device of a sub-pixel region is activated by switching element and driving element, such as transistors.
There are three basic approaches to using OLED device structures to produce a color display. The first approach uses different organic electroluminescent materials for the emissive layers in the sub-pixels of a pixel to emit different predetermined peak color wavelengths. The second approach uses a same organic electroluminescent material for each emissive layer along with different color filters in each sub-pixel region to emit different predetermined peak color wavelengths. The third approach uses different organic electroluminescent materials for the emissive layers along with along with different color filters in each sub-pixel region to emit different predetermined peak color wavelengths.
In the first approach of using different organic electroluminescent materials without color filters, each differently colored sub-pixel region can be constructed using different organic electroluminescent materials for each of the emissive layers of the OLED devices in the sub-pixel regions of the pixels. For example, a first organic electroluminescent material emits a peak red wavelength, a second organic electroluminescent material emits a peak green wavelength, and a third organic electroluminescent material emits a peak blue wavelength. These three different organic electroluminescent materials are each selectively positioned within their respective sub-pixel regions of the pixels by using one of shadow masks, thermal transfers from donor sheets, and ink jet printing.
In the second approach of using a same organic electroluminescent material for each emissive layer along with different color filters in each sub-pixel region to emit different predetermined peak color wavelengths to producing a color display, the same organic electroluminescent material in all of the different color sub-pixel regions can be either a continuous layer across all of the sub-pixel regions or individual layers position respectively in each sub-pixel region. The different color filters used to selectively convert the common color wavelength emitted from each OLED device to the different colors of the sub-pixel regions are positioned above the emissive layer in a top emission device and below the emissive layer in bottom emission device. In the case of using the same organic electroluminescent material in the emissive layer of all of the sub-pixel regions, the organic electroluminescent material is typically configured to produce a broad emission spectrum of light, also referred to as white emission or white light OLED.
In the third approach of using different organic electroluminescent materials for the emissive layers along with different color filters, each differently colored sub-pixel region can be constructed using different organic electroluminescent materials for each of the emissive layers of the OLED devices in the sub-pixel regions of the pixels. For example, a first organic electroluminescent material emits a peak red wavelength, a second organic electroluminescent material emits a peak green wavelength, a third organic electroluminescent material emits a peak blue wavelength and a fourth organic electroluminescent material emits a broad spectrum of wavelengths or white light. In this example, a red filter is associated with the first organic electroluminescent material that emits a peak red wavelength, a green filter is associated with the second organic electroluminescent material that emits a peak green wavelength, a blue filter is associated with the third organic electroluminescent material that emits a peak blue wavelength.
To improve the luminance output efficiency of the OLED devices in all three of the above approaches, the micro-cavity effect can be used. In a micro-cavity OLED device, the emissive layer structure is disposed between a reflector and a semi-transmissive reflector, which is at least semi-transparent to a desired wavelength. The reflector and semi-transmissive reflector form a Fabry-Perot micro-cavity that enhances the emission properties of the emissive layer structure disposed in the micro-cavity. More specifically, light emission near the wavelength corresponding to the resonance wavelength of the cavity is enhanced through the cathode while diminishing other wavelengths that do not correspond to the resonance wavelength. The use of a micro-cavity in an OLED device increases the light extraction efficiency or luminance output by configuring the depth or length of micro-cavity between a reflective electrode and a cathode of a sub-pixel region to have a resonance wavelength corresponding to the desired peak color wavelength for the sub-pixel region.
FIG. 1 is a view of three sub-pixel regions that each having a top emission OLED micro-cavity structure according to the prior art. As shown in FIG. 1, red sub-pixel region R, green sub-pixel region G and blue sub-pixel region B are formed on a substrate 101. The red sub-pixel region R includes a red emissive layer 151 positioned between a common cathode 160 and an anode 120R for the red sub-pixel region R. The green sub-pixel region G includes a green emissive layer 152 positioned between a common cathode 160 and an anode 120G for the green sub-pixel region G. The blue sub-pixel region B includes a blue emissive layer 153 positioned between a common cathode 160 and an anode 120B for the blue sub-pixel region B. The anode 120R for the red sub-pixel region R is on a cavity electrode 110R, which is on the substrate 101. The anode 120B for the blue sub-pixel region B is on a cavity electrode 110B, which is on the substrate 101. The anode 120G for the green sub-pixel region G is on a cavity electrode 110G, which is on the substrate 101. The red sub-pixel region R, green sub-pixel region G and blue sub-pixel region B are separated by banks 140.
The depth of a micro-cavity between a reflective electrode and a cathode of a sub-pixel region in the prior art is configured by controlling the thickness of the emissive layer. As shown in FIG. 1, the depth of the micro-cavity CDR in the red sub-pixel region R between the common cathode 160 and cavity electrode 110R for the red sub-pixel region R is larger than the depth of the micro-cavity CDG in the green sub-pixel region G between the common cathode 160 and the cavity electrode 110G for the green sub-pixel region G because the red emissive layer 151 of the red sub-pixel region R is thicker than the green emissive layer 152 of the green sub-pixel region G. The depth of the micro-cavity CDB in the blue sub-pixel region B between the common cathode 160 and the cavity electrode 110B for the blue sub-pixel region B is smaller than the depth of the micro-cavity CDG of the green sub-pixel region G between the common cathode 160 and the cavity electrode 110G for the green sub-pixel region G because the blue emissive layer 153 of the blue sub-pixel region B is thinner than the green emissive layer 152 of the green sub-pixel region G.
As shown in FIG. 1, the red color light RCL reflects back and forth between the common cathode 160 and the cavity electrode 110R across the entire depth of the micro-cavity CDR such that the luminance of the red color light RCL increases by constructive interference. The green color light GCL reflects back and forth between the common cathode 160 and the cavity electrode 110G across the entire depth of the micro-cavity GDR such that the luminance of the green color light GCL increases by constructive interference. The blue color light BCL reflects back and forth between the common cathode 160 and the cavity electrode 110B across the entire depth of the micro-cavity CDB such that the luminance of the blue color light BCL increases by constructive interference.
The effective micro-cavity depth is defined by optical distance, which is wavelength. The depth of the micro-cavity CDR for the red sub-pixel region R is configured to be deeper than the depth of the micro-cavity CDB for the blue sub-pixel region B because the wavelength of the red color light RCL is longer than the wavelength of blue color light BCL. The depth of the micro-cavity CDG for the green sub-pixel region G is configured to be deeper than the depth of the micro-cavity CDB for the blue sub-pixel region B because the wavelength of the green color light GCL is longer than the wavelength of blue color light BCL. The depth of the micro-cavity CDR for the red sub-pixel region R is configured to be deeper than the depth of the micro-cavity CDG for the red sub-pixel region G because the wavelength of the red color light RCL is longer than the wavelength of green color light GCL.
Controlling the thickness of the emissive layers is difficult. More specifically, the prior art structure requires a separate deposition process for each sub-pixel region because each emissive layer is typically a series of sub-layers whose thicknesses vary depending on the overall thickness of the emissive layer for that sub-pixel region. Further, the emissive layers can not be highly defined using the fine metal mask evaporation technique. Also, patterning of the transparent anode electrode in the prior art can result in left over residue that can result in a short circuit between adjacent pixel regions.

OLED micro-cavity structure and method of making


When a polymer gel has excellent mechanical strength and an ability to maintain surface wetness for a longer time, the polymer gel may be very widely applied to a variety of fields. The present disclosure provides example embodiments of a polymer gel having excellent mechanical strength and an ability to maintain surface wetness for a longer time. Further, the present disclosure provides example embodiments of a method of preparing the polymer gel.

Generally, a polymer gel refers to a material including a three-dimensional network structure formed by crosslinked polymer chains; and a liquid held in the three-dimensional network structure. A polymer gel may be applied to a wide variety of fields, for example, from food materials such as agar or gelatin to medical materials such as contact lenses. Due to its non-uniform network structure, a polymer gel generally has very low mechanical strength and its industrial applications are limited, but polymer gel materials having various functions have been proposed.
For example, Patent Document 1 discloses a double-network gel material having increased mechanical strength. Non-Patent Document 1 discloses a hybrid hydrogel composed of a physical network and a chemical network, the physical network being derived from a nanophase-separated microstructure of hydrophobic nanodomains, and the chemical network which is crosslinked with cinnamoyl moieties. Non-Patent Document 2 discloses hydrogel beads prepared at a temperature of −15° C.˜−20° C.: the prepared hydrogel beads release water under pressure of a piston and a shape thereof is recovered when the pressure is released and water is added. Non-Patent Document 3 discloses a hydrogel which is polymerized in a reaction mixture containing hydroquinone as a polymerization inhibitor: this reaction mixture is cooled to −196° C., and then heated to a desired temperature. Non-Patent Document 4 discloses chromatography using a cryogel.    Patent Document 1: International Patent Publication NO. 2003/093337    Non-Patent Document 1: Weiss, R. A. et al.; Polymer 2013, 54, 2174-2182    Non-Patent Document 2: Okay, O. et al.; Reactive & Functional Polymers 2009, 69, 273-280.    Non-Patent Document 3: Okay, O. et al.; Macromol. Sci., Part A., 2007, 44, 1195-1202.    Non-Patent Document 4: Srivastava, A. et al.; Nature Protocols 2010, 5, 1737-1747.

Polymer gel and preparation method therefor


A polling resource management system and methodology for facilitating the management of polling resources for polling message queues. A user interacts with customer applications within a web services system. A polling manager within the web services system utilizes polling resources, such as polling threads, polling assignments, and polling workers to access and implement messages in the message queues. A polling resource manager automatically scales the polling assignments, polling threads, and invoke threads to better utilize the polling resources and to reduce latency experienced by the user when interacting with the customer applications.

Generally described, entities, such as individuals and companies, can provide computer applications that are accessed by user computing devices over communication networks to exchange data or information. Such applications can be hosted in a networked-environment and accessed via the communication network, such as a web service that is provided by a network service provider. Web service technologies typically allow the application provider or content provider, as customers of the web service, access to virtual cluster of computing device, physical or virtual, that are available through a communication network, such as the Internet.


A stirring system for stirring contents in a laboratory flask having a round or spherical bottom and a reduced neck includes a stirrer shaft manufactured with a ring at the lower end thereof which permits attachment of a blade with a nut and bolt made of TEFLON material. The nut and bolt prevents the stirrer blade from flipping over during assembly and allows for a controlled tightening force to be applied to ensure that the blade remains in proper stirring position during use. The nut and bolt design permits use of the shaft with any stirrer blade having a keyhole cutout or circular opening. A method of stirring contents in a laboratory flask by attachment of the stirrer blade to the stirrer shaft with a nut and bolt is also disclosed.

Stirrer blades are commonly used in conjunction with laboratory flasks wherein the blades have a straight or flat top edge and a rounded bottom edge that generally conforms to the inside bottom curvature of the flask. The blade is curved to more closely associate itself with the flask for stirring a material therein. Therefore, in a proper position of conventional stirring blades, the curved bottom edge is facing downwardly and generally fits the curvature of the flask with the flat edge up.
Considerable difficulties arise when installing the conventional stirring blade since the blade often becomes inverted. Should this occur, the flat edge is disposed downwardly and is therefore not oriented to properly stir material within the flask. It is necessary to disassemble the apparatus to correct this condition. This condition generally occurs as a result of the method of installing the stirrer assembly which is accomplished by turning the blade so that its long axis parallels that of the rod or shaft. Then, after installing the blade and the shaft through a narrow neck of the flask, or through a glass bearing inserted into the top opening of the neck, the blade must then be rotated through 90.degree. to the proper position. Many times the blade turns in the wrong direction thereby causing the aforesaid inversion to occur.
To enable the blade to be inserted through the narrow neck of the flask, as mentioned above, the blade must first be oriented so that its long axis is perpendicular to the neck mouth and therefore parallel to that of the rod or shaft to which it is attached. After installing the blade and shaft through the narrow neck, or after installing the upper end of the shaft through the lower end of the glass bearing following which the blade is then inserted through the narrow neck of the flask followed by the bearing, the blade must then rotate through 90.degree. to the proper position. To enable this to occur, as disclosed in U.S. Pat. No. 3,207,489, it is common practice in the industry to form the shaft or glass rod to have a laterally extending lower end portion terminating in a circular vertical flange having a diameter greater than the largest diametral opening formed in the blade. This opening is the larger part of a keyhole shaped opening in the blade which enables the blade to be assembled in relation to the shaft or rod by first inserting the upper end of the shaft through the larger diametral opening and then sliding the blade downwardly along the entire length of the shaft towards the laterally extending lower end portion or foot defining the bottom end of the shaft. There is also a projecting member on the bottom end of the shaft or foot which the slotted portion of the keyhole opening must be aligned with to enable the blade to pass over the projecting member and onto the foot into engagement with the flange. When the blade is then rotated so the keyhole shaped opening is no longer in alignment with the lower projecting member, the blade is retained on the foot by being sandwiched between the lower projecting member and the circular flange.
Therefore, one of the disadvantages of the stirrer assembly of the aforementioned U.S. Pat. No. 3,207,489 is that the blade (1) must first be mounted to the shaft by (2) passing the upper shaft end through the keyhole shaped opening and then (3) sliding the blade along the entire length of the shaft and around the lower projection so that the aforementioned (4) interlocking of the blade to the shaft can occur. This is time-consuming and sometimes cumbersome within a laboratory environment. Once the blade is mounted to the shaft in the aforementioned manner, care must then be taken to rotate the blade so that the long axis is parallel to shaft with the keyhole part of the opening facing upwardly and away from the lower projecting portion and not downwardly in alignment with that projection. Otherwise, the stirrer blade could flip off the shaft during assembly.
It is accordingly an object of the present invention to provide a stirrer assembly wherein the stirrer blade is securely mounted to the stir shaft to avoid flip-over during assembly and insertion into a flask.
Another object is to provide a stirrer blade assembly wherein the amount of tension for securing the blade to the stir shaft can be controlled.
Yet a further object is to provide a stirring blade attachment system having a new and improved stir shaft which is manufactured to permit attachment of the blade with a "TEFLON " material nut and bolt.
Still another object is to provide a stirring blade attachment system with a new and improved stir shaft which is formed without the bottom projection and which therefore presents fewer projections which are likely to come in contact with the flask and result in breakage of the projections in the flask or breakage of the flask bottoms particularly in the event that the blade has flipped off the stir shaft as occurred in the prior art.

Laboratory flask stirrer assembly attachable with a nut and bolt


The present invention is to create a compound that selectively activates glucokinase in the liver, and in particular, to provide an agent for treating and preventing diabetes and impaired glucose tolerance, wherein the agent has a low hypoglycemia risk. A compound represented by the formula (1) as shown below, or a salt thereof, or a solvate of the compound or the salt:

According to a Summary of National Health and Nutrition Examination Survey Results 2007 published by the Ministry of Health, Labour and Welfare, it is estimated that there are approximately 8,900,000 people who are "strongly suspected of having diabetes" and approximately 13,200,000 people who are "likely to have diabetes" in Japan. That is to say, it is predicted that a total of approximately 22,100,000 Japanese people are affected with diabetes or belong to a diabetes high-risk group. Diabetes has characteristics such as an increase in the fasting plasma glucose level, insulin resistance, acceleration of gluconeogenesis in the liver, and a reduction in glucose-responsive insulin secretion. In addition, there is a fear that diabetes may increase the risk of developing diabetic nephropathy, retinopathy, nervous disorder, and macroangiopathy, and that it may further lead to a significant reduction in quality of life (QOL), such as the necessity of dialysis, blindness, quadruple amputation, arteriosclerotic disease, and stroke.
For the treatment of diabetes, kinesitherapy, dietetic therapy, and drug therapy are carried out. As agents used in drug therapy, metformin having the action of suppressing gluconeogenesis in the liver and promoting the use of sugar in the skeletal muscle is used as a first-line drug. Then, a sulfonylurea (SU) agent promoting insulin secretion, a dipeptidyl peptidase (DPP)-4 inhibitor (see non-patent document 1), a glucagon-like peptide (GLP)-1 analog (see non-patent document 2), thiazolidinedione that improves insulin resistance, and the like are used as agents of second alternatives. Among these agents, the SU agent stimulates pancreatic β-cells and promotes endogenous insulin secretion (see non-patent document 3). However, there is a case in which the SU agent may cause hypoglycemia as a side effect. Thus, attention should be paid when this agent is used, in particular, for elder people, people with deterioration of renal function, and the case of an irregular dietary habit. In addition, with regard to the SU drug, side effects such as an increase in body weight have also been reported. Moreover, the SU drug has been known to cause primary failure in which no effects are found from an initial administration, or secondary failure in which clinical effects disappear during the administration period.
Glucokinase (hereinafter also abbreviated as "GK") belongs to a hexokinase family and has an alias "hexokinase IV." Hexokinase is an enzyme that catalyzes conversion of glucose to glucose-6-phosphate at an initial stage of the glycolysis system in a cell. In the case of three hexokinases other than GK, enzymatic activity becomes saturated at a glucose level of 1 mmol/L or less. On the other hand, GK has low affinity for glucose and shows a Km value close to a physiological blood glucose level (8 to 15 mmol/L). GK is mainly expressed in liver and pancreatic β-cells. In recent years, it has been elucidated that GK is also present in brain. The sequences of N-terminal 15 amino acids are different between GK in the liver and GK in pancreatic β-cells, depending on a difference in splicing. However, they have identical enzymatic properties, and intracellular glucose metabolism via GK is accelerated in response to a change in blood glucose levels from a normal blood glucose level (around 5 mM) to hyperglycemic level after eating (10 to 15 mmol/L).
Through the ages, a hypothesis had been proposed that GK functions as a glucose sensor in the liver and pancreatic β-cells. Recent study results have demonstrated that GK actually plays an important role for the maintenance of systemic glucose homeostasis, so that the hypothesis could be proved. For example, a mouse with a destroyed glucokinase gene had significant hyperglycemic symptoms and died shortly after birth. In addition, in heterozygous GK knockout mice, glucose tolerance was deteriorated and insulin secretion by sugar stimulation was impaired. On the other hand, in normal mice in which GK was excessively expressed, the lowering of a blood glucose level, an increase in the content of glycogen in liver tissues, and the like were observed, and such phenomena were observed also in mice in which diabetes was artificially developed. Furthermore, recent studies have revealed that GK functions as a glucose sensor and plays an important role for the maintenance of glucose homeostasis even in humans. An abnormality in the GK gene was found in a family line of maturity-onset diabetes of the young referred to as "MODY2," and the correlation between the symptoms of this disease and GK activity was clarified (non-patent document 4). Meanwhile, a family line having mutagenesis for increasing GK activity was also found. In such a family line, fasting hypoglycemic symptoms attended with an increase in the plasma insulin level were also observed (non-patent document 5). From these reports, it is considered that GK functions as a glucose sensor in mammals including humans and plays an important role for regulation of blood glucose. Accordingly, it is considered that a substance having a GK-activating action is useful as an agent for sugar metabolism-related diseases including type II diabetes as a typical example.
According to several reports regarding GK-activating drugs, it has been revealed that there is a considerable risk that drug administration will cause hypoglycemia (non-patent documents 6 and 7). Excessive induction of insulin secretion in the pancreas in a state in which the blood glucose level is low has been suggested as a major cause of the occurrence of this hypoglycemia. A GK-activating drug having a systemic action (pancreas and liver) is considered to have the hypoglycemia risk. Moreover, a GK-activating action in the pancreas is considered to increase stress in pancreatic β-cells, and thus, as in the case of the sulfonylurea agent, the GK-activating drug has the risk of causing dysfunction of the β-cells and deterioration of diabetes, when it is administered for a long period of time. Furthermore, this drug also has the risk of leading to an increase in the amount of body fat and an increase in body weight due to insulin secretion.
As means for avoiding these problems regarding side effects, several GK-activating drugs with high liver selectivity have been reported. For example, patent document 1 describes a thought that blood glucose level can be normalized, while reducing the hypoglycemia risk, by using a liver-selective GK-activating factor. This document describes that the urea compound described in WO2004/002481 was used for evaluation, but does not disclose the chemical structure of a specific compound. In addition, non-patent document 8 reports that a compound represented by the following formula (A):
is a liver-selective GK-activating drug for lowering blood glucose level without increasing insulin secretion. However, this document reports that the aforementioned compound is distributed, rather in a larger amount, in the pancreas, and thus, the action mechanism of liver selectivity has not been clarified. Moreover, non-patent document 9 reports that a compound represented by the following formula (B):
acts as a liver-selective GK-activating drug by being incorporated into the liver by organic anion transporters (OATP1B1 and OATP1B3), by utilizing carboxylic acid substitution on pyridine. However, this document also reports that if the substitution site of carboxylic acid is moved, the pharmacological activity itself disappears.
In the liver, GK is regulated by a glucokinase regulatory protein (GKRP). GKRP competing with glucose binds to GK and then inhibits it. At a physiological glucose level, a majority of GK in the liver binds to GKRP, and it is localized in the nucleus of a hepatocyte. In contrast, at a high glucose level, GK does not bind to GKRP, and thus, phosphorylation of glucose becomes possible. As such, by the action of GKRP, GK activity is regulated in a glucose-dependent manner in the liver (non-patent document 10). In fact, when a liver-selective GK-activating drug was repeatedly administered to Goto-Kakizaki diabetes model rats, the drug exhibited a hypoglycemic action at the same level as that of a systemic GK-activating drug. On the other hand, when such a liver-selective GK-activating drug was repeatedly administered to normal rats, the drug did not lower the blood glucose level, while a systemic GK-activating drug lowered the blood glucose level of the normal rats. As a result, it was demonstrated that the liver-selective GK-activating drug has the hypoglycemia risk that is lower than that of the systemic GK-activating drug (non-patent document 9). From these results, the liver-selective glucokinase-activating drug is anticipated to be a new type of glucokinase-activating antidiabetic drug, which reduces side effects caused by systemic GK-activating drugs by controlling blood glucose level in a glucose-dependent manner. However, as described above, there have been only a few reports regarding liver-selective GK-activating drugs, and thus, it is still difficult to design a liver-selective compound intentionally.
As an antidiabetic drug having the phenylacetamide skeleton of the present invention, which is based on a GK-activating action, a compound represented by the following formula (C) has been reported (patent document 2).
(wherein Q represents aryl, 5- or 6-membered ring heteroaryl, or 4- to 8-membered heterocycle; T represents a heterocycle, which is linked to form a heteroaryl ring together with —N═C—, or in which only the N═C bond is an unsaturated portion; R1 and R2 each independently represent hydrogen, hydroxy, halogen, cyano, nitro, vinyl, ethynyl, methoxy, OCFnH3-n, —N (C0-4 alkyl)(C0-4 alkyl), CHO, or C1-2 alkyl (which is optionally substituted with one to five independent substituents selected from halogen, hydroxy, cyano, methoxy, —N (C0-2 alkyl) (C0-2 alkyl), SOCH3, and SO2CH3); or R1 and R2 together form a carbon ring or a heterocycle; or R1 and R2 may together represent an oxygen atom linked to a ring via a double bond; R3 and R4 each independently represent hydrogen, halogen, OCFnH3-n, methoxy, CO2R77, cyano, nitro, CHO, CONR99R100, CON(OCH3)CH3, or C1-2 alkyl, heteroaryl or C3-7 cycloalkyl, which is optionally substituted with one to five independent substituents selected from halogen, hydroxy, cyano, methoxy, —NHCO2CH3, and N(C0-2 alkyl) (C0-2 alkyl); or R3 and R4 together form a 5- to 8-membered aromatic ring, a heteroaromatic ring, a carbon ring, or a heterocycle; R5 and R6 each independently represent hydrogen, hydroxy, halogen, cyano, nitro, CO2R7, CHO, COR8, C(OH)R7R8, C(═NOR7) R8, CONR9R10, SR7, SOR8, SO2R8, SO2NR9R10, CH2NR9R10, NR9R10, N(C0-4 alkyl) SO2R8, NHCOR7, or a C1-4 alkyl group, a C2-4 alkenyl group, a C2-4 alkynyl group, a C1-4 alkoxy group, an aryl group or a heteroaryl group, in which any group is optionally substituted with one to six independent substituents selected from halogen, cyano, nitro, hydroxy, C1-2 alkoxy, —N (C0-2 alkyl) (C0-2 alkyl), C1-2 alkyl, CFnH3-n, aryl, heteroaryl, —COC1-2 alkyl, —CON (C0-2 alkyl)(C0-2 alkyl), SCH3, SOCH3, SO2CH3, and SO2N(C0-2 alkyl)(C0-2 alkyl); or R5 and R6 together form a 5- to 8-membered carbon ring or a heterocycle; R7 and R77 each independently represent hydrogen, or a C1-4 alkyl group, a C2-4 alkenyl group, a C2-4 alkynyl group, a C3-7 cycloalkyl group, an aryl group, a heteroaryl group or 4- to 7-membered heterocyclic group, in which any group is optionally substituted with one to six independent substituents selected from halogen, cyano, nitro, hydroxy, C1-2 alkoxy, —N (C0-2 alkyl)(C0-2 alkyl), C1-2 alkyl, C3-7 cycloalkyl, a 4- to 7-membered heterocycle, CFnH3-n, aryl, heteroaryl, CO2H, —COC1-2 alkyl, —CON (C0-2 alkyl)(C0-2 alkyl), SOCH3, SO2CH3, and SO2N(C0-2 alkyl)(C0-2 alkyl); R8 represents a C1-4 alkyl group, a C2-4 alkenyl group, a C2-4 alkynyl group, a C3-7 cycloalkyl group, an aryl group, a heteroaryl group, or a 4- to 7-membered heterocyclic group, in which any group is optionally substituted with one to six independent substituents selected from halogen, cyano, nitro, hydroxy, C1-2 alkoxy, —N (C0-2 alkyl)(C0-2 alkyl), C1-2 alkyl, C3-7 cycloalkyl, a 4- to 7-membered heterocycle, CFnH3-n, aryl, heteroaryl, CO2H, COC1-2 alkyl, —CON (C0-2 alkyl) (C0-2 alkyl), SOCH3, SO2CH3, and SO2N(C0-2 alkyl) (C0-2 alkyl); R9, R10, R99, and R100 each independently represent hydrogen, or a C1-4 alkyl group, a C3-7 cycloalkyl group, an aryl group, a heteroaryl group or a 4- to 7-membered heterocyclic group, in which any group is optionally substituted with one to six independent substituents selected from halogen, cyano, nitro, hydroxy, C1-2 alkoxy, —N (C0-2 alkyl) (C0-2 alkyl), C1-2 alkyl, C3-7 cycloalkyl, a 4- to 7-membered heterocycle, CFnH3-n, aryl, heteroaryl, COC1-2 alkyl, —CON (C0-2 alkyl)(C0-2 alkyl), SOCH3, SO2CH3, and SO2N(C0-2 alkyl) (C0-2 alkyl); or R9 and R10, or R99 and R100 together form a 6- to 8-membered hetero bicyclic system or a 4- to 8-membered heterocycle, which is optionally substituted with one or two independent substituents selected from C1-2 alkyl, CH2OCH3, COC0-2 alkyl, hydroxy, and SO2CH3; n represents 1, 2, or 3; m represents 0 or 1; and the dotted line optionally forms a double bond together with the solid line, and Δ indicates that the double bond is in (E)-configuration). However, the aforementioned compound is different from the compound of the invention of the present application in terms of the substituents R1 and R2 on the ring Q. Moreover, as for the aforementioned compound there are neither descriptions nor suggestions of possessing a liver-selective action. It has been reported that, in particular, the compound of Example 94 (PSN-GK1), which is a representative compound, has a hypoglycemic action on normal mice, even if it is used at a low dose (non-patent document 11).

Phenylacetamide compound and pharmaceutical containing same

Abstract: wherein, in the following formula (1), ring A represents a thiazolyl group, a pyridyl group, a pyrazyl group, or a pyrazolyl group; L represents —(CO)—, —(CS)—, or —SO2—; and R1 represents a C1-6 alkyl group, a hydroxy C1-6 alkyl group, a C1-6 alkoxy group, an amino group, a C1-6 alkylamino group, a hydroxyamino group, an N—C1-6 alkylcarbamoyl group, or a group represented by the formula (2) as shown below, wherein R3 represents a C1-6 alkyl group; and R2 represents a hydrogen atom, a halogen atom, a C1-6 alkyl group, a C1-6 alkoxy group, or a carboxyl group. The formulas are shown below:


A caching method and system for a control system having a fast network and a slow network that each contain devices involved in the control of a process is disclosed. The cache is disposed in a gateway interface device interconnected with both the fast and the slow networks. The cache is populated only in response to requests of clients connected in the fast network but is refreshed independently of the fast network. To reduce traffic on the slow network, the cache is populated with a collection of parameters to which a requested parameter belongs. This avoids a round trip on the slow network for future requests of the requested parameter and other members of the collection. A parameter is removed from cache if an associated expiration timer expires before a further request therefor is received. Cache refresh is variable based on loading of the slow network and responsiveness of the devices of the slow network.

A process is often controlled by a control system that includes a fast (e.g., 10 MB or faster) native network and a slow (e.g., 31 KB) non-native network. In such a system, there is a need for communication between the devices of the fast native network and the devices of the slow non-native network. For example, a part of the process may require that an intelligent valve in the slow non-native network be actuated based on a temperature monitored by a temperature sensor in the fast native network. A control processor in the fast native network controls this part of the process by gathering the temperature data, processing the data according to a control program and communicating a control signal for the valve of the slow non-native network.
Typically, data of the non-native devices is accessed by two or more clients (e.g., a host computer or the control processors) in the fast native network. These clients may have to wait for their accesses to be serviced due to the slow speed of the slow non-native network. This can result in long delays that hinder processing in the fast network and affect the control of the process.
There is a need for a simple and flexible communication system that reduces the delays caused by the speed difference between fast and slow networks that control a process.

Caching process data of a slow network in a fast network environment


An apparatus for handling layers of palletized goods is disclosed including a lift head with a substantially horizontal suction face sized for a pallet including downwardly open suction chambers, which via individual valves are connected to a vacuum source, incorporated in the lift head or provided externally. The suction face is movable against a top side of an upper layer of goods on a pallet. The valves are closed if the associated suction chamber is not closed downwardly by contacting the top side of the goods on the uppermost pallet layer. The lift head along the outer sides of the suction face includes a vertically adjustable skirt with inflatable squeezing pads for exerting an inwardly directed pressure on the outer sides of at least the goods in the upper pallet layer. The skirt interacts with a two-part flexible curtain at opposing ends of the suction face each of which are connected with the adjustable skirt and from each side of the suction face are moved inwardly along the underside of the lifted pallet layer to a position in the middle under the suction face so that the two-part flexible curtain is disposed at the underside of the pallet layer which is lifted and is capable of supporting the lifted pallet layer.

1. Field of the Invention
The present invention concerns an apparatus for handling layers of palletized goods and of the kind indicated in the preamble of claim 1.
2. Description of the Prior Art
In order to provide effective and cheap distribution of goods, many goods are distributed on pallets, by way of example on so-called EU pallets (800×1200 mm). Yet a continuing increasing need has appeared for also dispatching orders comprising smaller consignments of goods in a correspondingly efficient way. Statistically it has appeared that many orders for small shops actually consist of consignments of goods often consisting of very few layers or maybe just a single layer of palletised goods.
WO 2000/64790 A1 and WO 2008/019691 A1 disclose apparatuses for handling layers of palletized goods. These apparatuses comprise a vertically displaceable lift head with a horizontal suction face which in size is adapted to a pallet and has a large number of downwards open suction chambers. The suction face is arranged to be moved downwards against the top side of an upper layer of individually or groupwise packed goods on a pallet, where the suction chambers via individual valves are connected with a source of vacuum incorporated in the lift head. These the apparatuses interact with depalletizing systems which are known per se.
The valves between the suction chambers and the source of vacuum are designed as ball valves with very light thin-walled valve bodies that are enclosed in the suction chamber by lateral projections or by a retainer net which interact with upper round valve openings with spherical valve seats at the bottom if the actual suction chamber is not closed at the bottom by contacting the top side of the goods in an upper pallet layer.
Along the outer sides of the suction face, the lift head comprises a squeezing mechanism for exerting an inwardly pressure at the outer sides of the goods in at least an uppermost pallet layer. In connection with each valve there are arresting means for preventing the valve balls from shutting off the valves, which ensure that the shut-off valves of the suction face can be forcibly opened where there is a contact to the goods in the pallet layer, and can be forcibly opened where there are gaps or openings in the pallet layer. The descriptions of these previous inventions are hereby incorporated in the present application by reference.
In connection with the hitherto common handling of layers of palletized goods, they primarily work with rectilinear lifting and moving of pallet layers, by moving pallet layers mutually between positions on mutually perpendicular pallet ways.
Experiments have been made using robot technology for moving palletized layers of goods by the current suction heads. However, using robots requires an entirely different movement pattern which also includes swinging movements of suction heads, which place significantly greater demands on the suction ability in order to hold the relatively heavy and possibly open pallet layer in a secure way during swinging movements where centrifugal force actions occur.

Apparatus for handling layers of palletized goods


An information processing apparatus includes a CPU and a memory connected to an internal local bus, and includes a data transmission/reception unit transmitting and receiving data to and from a public network, a voice encoding/decoding unit encoding and decoding voice data, an image encoding/decoding unit encoding and decoding image data, an external input/output interface controller controlling an input/output interface with an external unit, and an input/output switching unit selectively forming a data bus among the data transmission/reception unit, the voice encoding/decoding unit, the image encoding/decoding unit and the external input/output interface controller.

1. Field of the Invention
The present invention relates to an information processing apparatus and a communication function expansion method.
2. Description of the Related Art
In recent years, the use of mobile telephones is spread widely and, at the same time, the main bodies of mobile telephones are made increasingly smaller in size. On the other hand, the demand for realizing a mobile telephone serving as an information processing apparatus having more advanced functions have risen.
To satisfy such a demand, there is proposed expanding the function of a mobile telephone using an external input/output interface (I/F). To be specific, a wire or radio connection interface is provided in a mobile telephone and an external apparatus is connected to the mobile telephone through this interface. For example, Jpn. Pat. Appln. KOKAI Publication No. 9-149107 discloses a mobile telephone having an external terminal for connecting a headset to the mobile telephone. If a headset plug is inserted into the external terminal, in particular, the microphone and the speaker of the mobile telephone are switched over to the microphone and the speaker of the headset.
In addition, Jpn. Pat. Appln. KOKAI Publication No. 8-234931 discloses a switching control circuit for a personal computer which is an information processing apparatus, wherein when a PCMCIA-compatible card is connected to the personal computer, the switching control circuit selects one of the connection of a card connection port with a system bus and the connection of the card connection port with a moving picture dedicated bus in accordance with the function of the card.
However, no consideration has been given to providing a radio external input/output interface on a mobile telephone or personal computer.
Furthermore, no matter which apparatus is connected to the external input/output interface of the mobile telephone, communication between the mobile telephone and an external unit is held only through a public line and other media cannot be used for the communication therebetween. Thus, the expandability of the conventional mobile telephone is insufficient.

Information processing apparatus and communication function expansion method


In a turbine housing 12 of a turbocharger 10A of a twin-scroll type, a scroll-shaped passage is separated into a front scroll passage 42 and a rear scroll passage 44 by a partition wall 40. A front wall 50 and a root part 40b of the partition wall 40 curve toward a front side to secure cross-sectional areas a1, a2, a3 . . . and b1, b2, b3 . . . . The scroll passages 42, 44 are formed to have equal cross-sectional areas, a tip part 40a of the partition wall 40 is arranged perpendicular to the turbine rotor blade 26 and the scroll passages 42, 44 are symmetrical near the tip part 40a about an axis X so as to eliminate the flow rate difference.

As a turbocharger installed in a vehicle or the like, a turbocharger of a twin-scroll type is known in which a passage between a turbine housing inlet and a leading edge of turbine rotor blades is separated into a front side (an exhaust gas outlet side) and a rear side (a bearing housing side) so as to avoid interference with the exhaust gas of a multicylinder engine and also to utilize pulsation of the exhaust gas of the engine (dynamic pressure). A twin-scroll turbocharger of this type is disclosed in Patent Literatures 1 and 2.
An example construction of the conventional turbocharger of twin-scroll type which is disclosed in Patent Literature 2 is now described in reference to FIG. 3 and FIG. 4. In FIG. 3, a turbine housing 102 of the turbocharger of the twin-scroll type has a scroll passage for the exhaust gas inside. A partition wall 104 protruding in the passage separates a scroll passage 106 on the front side and a scroll passage 108 on the rear side.
A turbine shaft 110 and a turbine wheel integrally formed with the turbine shaft 110 are arranged in a center part of the turbocharger 100. A plurality of turbine rotor blades 114 are integrally formed around the turbine wheel 112 in a radial fashion.
As shown in FIG. 4, the scroll passages 106, 108 are formed in a scroll shape. The exhaust gas e flows in the scroll passages 106, 108 from the outside toward the inside in the radial direction, and then enters the turbine rotor blades 114 from an outlet opening 116 so as to rotate the turbine wheel 112. Then, the exhaust gas e passes through an outlet casing 118 and is drained.
A bearing housing 120 is arranged next to the turbine housing 102. The turbine housing 102 is provided with a connection flange 122 in contraposition to the bearing housing 120 so that the bearing housing 120 and the turbine housing 102 are coupled to each other. The turbine housing 102 and the bearing housing 120 are fixed normally by connecting the connection flange 122 and a connection flange (not shown) provided in the bearing housing 120 by means of a coupling of a ring shape.
Near an outlet flange 124 of the turbine housing 102, a wastegate valve 126 is provided for controlling a supercharging pressure of the turbocharger 100 at a setting pressure or below. By allowing a part of the exhaust gas flowing in the front scroll passage 106 and the rear scroll passage 108 to exit the exhaust gas exit from the wastegate valve 126, the supercharging pressure of the turbocharger 100 is controlled not more than the setting value.
According to the above structure, the exhaust gas e exhausted from the engine (not shown) enters the turbine rotor blades 116 via the scroll passages 106, 108, thereby rotating the turbine wheel 110. The rotation of the turbine wheel 110 rotates a compressor wheel (not shown) coupled to the turbine shaft 110. This generates a flow of the intake air and the intake air is supplied to the combustion cylinder. In the multicylinder engine, by dividing the exhaust gas e exhaust from the combustion cylinder to two scroll passages 106, 108 so as to suppressing the interference of the multicylinder engine with the exhaust gas energy as well as to improve the rotation efficiency of the turbine shaft 110 by using the pulsation of the exhaust gas.
In this manner, the rotation of the turbine in a low-speed rotation range is started early without decreasing A/R and thus it is possible to improve a response speed of the turbocharger in the low-speed rotation range as well as the output of the engine.

Turbine housing for a turbocharger of twin-scroll type


A method and software for analyzing a heap is described, in which a snapshot is made of a heap, which can be later analyzed by an analysis tool when a program that had run out of memory is no longer running. In one embodiment, an object allocated by the program is accessed and copied into a file, and an address of the object allocated by the process is recorded in association with an offset in the file of the copy of the object. The copy of the object copied into the file has preferably the same size as the object allocated by the process. A heap analysis tool may then be run on the objects copied into the file.

During execution of a computer program, objects are allocated memory to store information. In many environments, memory management routines are provided to enable programmers to dynamically allocate and deallocate memory for objects during the execution of the program. The area of memory from which objects are dynamically allocated and reallocated is often referred to as a "heap." In some run-time environments, e.g. in a JAVA™ virtual machine, the memory management routines also provide for garbage collection, which automatically reclaims memory for objects that are no longer used, so that the reclaimed memory is available for subsequently allocating other objects.
Generally, a garbage collector determines whether an object is no longer used and can therefore recycle the object's memory when the object is no longer referenced within the program. However, some user programs in garbage-collected, run-time environments unintentionally keep references to objects that are no longer going to used in the program, thereby consuming large amounts of memory because keeping a reference to an object prevents the garbage collector from identifying the object as garbage and reclaiming that object's memory. If the program eventually requests to use more memory from the heap than what is available, the program runs out of memory, typically crashing or otherwise failing to perform its intended function.
Debugging the application programming errors that lead to running out of heap memory is a difficult process. Typically, such debugging involves analyzing which objects reference which other objects. Conventional techniques however, for analyzing the referencing relationships of user-created objects to determine why programs run out of memory are cumbersome and slow. One approach to analyzing these relationships is by running a tool in the virtual machine itself that would analyze the heap in the virtual machine and provide a digest of the memory allocation, e.g. how much memory is retained by which objects, but typically these tools also need heap memory to run, which is precisely the problem in low-memory situation.
Therefore, there is a need for method for analyzing a heap for memory errors, particularly in environments in which heap memory has been exhausted.

Architecture for a scalable heap analysis tool