An active filter having a frequency characteristics of the fewer variations of manufacturing and the least temperature dependency is provided. A differential amplifier is comprised of resistors 15 and 16 which have a resistance value R.sub.E and are connected in common to a current source 39 in proportion to kT/(qR.sub.0), together with transistors 13 and 14. The transistor 14 is connected to an active load comprised of transistors 18 and 19. The transistor 18 is connected to a current source 31 for producing a current in proportion to a capacity C.sub.0 while the transistor 19 is connected to a current source 30 for producing a current of a remainder of the current produced by the current source 31 subtracted from the current in proportion to 1/R.sub.a. The transistor 19 is further connected to an internal capacitor 21 having capacity C.sub.1. A frequency characteristics of the active filter circuit is determined by the ratio of resistance values R.sub.E, R.sub.0 and R.sub.a and the ratio of the capacities C.sub.O and C.sub.1, and a term of an ambient temperature is cancelled.

1. Field of the Invention
The present invention relates to an improvement of property variations and temperature dependency because of passive elements in an active filter circuit comprised of semiconductor integrated circuits.
FIG. 13 is a circuit diagram showing an embodiment of an active filter circuit which is a conventional primary lowpass filter.
Referring to FIG. 13, an input terminal 2 is connected to a base of an NPN transistor 13. A signal of dc bias voltage applied by a voltage source 4 superposed with an ac signal V.sub.i superposed is input to the input terminal 2.
The NPN transistor 13 has its collector connected to a power source 1 and its emitter connected through a resistor 15 (resistance value R.sub.E) to a first terminal of a constant current source 17. A second terminal of the constant current source 17 is grounded. The constant current source 17 generates dc current 2I.sub.3.
The constant current source 17 has its first terminal connected to a first terminal of a resistor 16 (resistance value R.sub.E). of which second terminal is connected to an emitter of an NPN transistor 14. The NPN transistor 14 has its base connected to an output terminal 24 and its collector connected to respective emitters of NPN transistors 18 and 19. The NPN transistor 18 has its collector connected to the power source 1 and its base connected to an emitter of an NPN transistor 7. The NPN transistor 19 has its collector connected to a first terminal of a constant current source 20, of which second terminal is connected to the power source 1. The collector of the NPN transistor 19 is also connected to a base of an NPN transistor 22 and a first terminal of a capacitor 21 (capacity C.sub.1). A second terminal of the capacitor 21 is grounded.
An NPN transistor 22 has its collector connected to the power source 1 and its emitter connected to an output terminal 24 and a first terminal of a constant current source 23, of which second terminal is grounded. The NPN transistor 19 has its base connected to an emitter of an NPN transistor 6, while the NPN transistors 6 and 7 have their respective bases and collectors connected in common to a voltage source 5. The NPN transistor 6 has its emitter connected to a collector of an NPN transistor 9 while the NPN transistor 7 has its emitter connected to a collector of an NPN transistor 10. An emitter of the NPN transistor 9 is grounded through a resistor 11 (resistance value R.sub.1) while an emitter of the NPN transistor 10 is grounded through a resistor 12 (resistance value R.sub.2). The NPN transistors 9 and 10 have their respective bases connected in common to a voltage source 8.
In general, emitter current I.sub.E in transistors can be expressed as follows: ##EQU1## where V.sub.BE is a base-emitter voltage, k is a Boltzmann's constant, T is an ambient temperature of transistors which are expressed by an absolute temperature, and q is an amount of electric charge of electrons. According to the formula 1, an emitter resistor r.sub.e of the transistors 13 and 14 can be expressed as follows: ##EQU2##
Thus, utilizing the ac signal V.sub.i input to the input terminal 2 and an ac signal V.sub.o appearing at an output terminal, an ac component I.sub.14C of the collector current in the transistor 14 can be expressed as follows: ##EQU3##
An ac component I.sub.19C of the collector current in the transistor 19 is determined by emitter currents I.sub.6E and I.sub.7E as follows: ##EQU4##
A value of the dc current from the current source 20 is set equal to that of the dc component of the collector current in the transistor 19.
An ac voltage V.sub.22B applied to a base of the transistor 22 can be expressed as follows: ##EQU5## where f is a frequency of the signal V.sub.i and .pi. is a ratio of the circumference of a circle to its diameter.
The ac signal V.sub.o appearing in the output terminal 24 is equal to the ac voltage V.sub.22B, and hence it can be expressed as follows: ##EQU6##
The formulae (2), (3), (4) and (6) together lead the following formula: ##EQU7##
I.sub.6E and I.sub.7E are determined by voltage V.sub.8 of a voltage source 8 and resistance values R.sub.1 and R.sub.2, and they can be expressed as follows: ##EQU8##
V.sub.BE9 and V.sub.BE10 are base-emitter voltages in the transistors 9 and 10.
A frequency characteristic of the dc signal V.sub.o output at the output terminal 24 is, as will be recognized in the formula 7, determined by the capacity C.sub.1 of the capacitor 21 built in an semiconductor integrated circuit, the resistance value R.sub.E of the built-in resistors 15 and 16, the current I.sub.3, the absolute temperature T, and the ratio of the emitted current I.sub.6E to the emitter current I.sub.7E within the integrated circuit.
A conventional active filter circuit is configured as mentioned above, and therefore, its frequency characteristic depends upon a capacity of a capacitor build in a semiconductor integrated circuit, a resistance value of built-in resistors and an absolute temperature. Thus, there is the disadvantage that variations in manufacturing semiconductor integrated circuits cause variations in capacity, resistance value and ambient temperature to change their characteristics.


Hair styling accessories including a puffing member specially adapted for shaping hair into a puffed condition. Also included is a specially shaped barrette which is adapted for cooperative combination with the puffing member to position and retain the puffing member in a desired location as well as to provide for separating and manipulating hair in strands as may be desired for a variety of coiffures. The puffing member includes a main section having generally symmetrically convex front and back surfaces to present a puffed appearance. Essentially centrally positioned within the main section there is disposed a thin sheet of malleable or deformable material (e.g., 0.006 inch thick tin foil such as is used for fins in air conditioners) adapted for manipulation so that the shape of the main section can be altered within a range suitable for a variety of hair styling applications. The puffing member additionally includes an appending region of lesser width which is fitted with at least two apertures provided to accept one or more fastening members such as one or more fingers from the barrette, a hair pin, or another fastening member.

This invention relates to hair styling devices and more particularly to a deformable shape specially adapted for independently puffing a person's hair or for cooperative combination with a specially shaped barrette to provide improved positioning and retention at a desired position.
As set forth in U.S. Pat. No. 5,303,723 granted to the inventor of the present invention Apr. 19, 1994, a generally peanut-shaped hair styling device was proposed. According to that proposal, by the advantageous utilization of a combination of elements, an adjustable device presented a number of features including that of versatility in aiding a hair stylist to style long hair into and retain it in any of several desired shapes without requiring the use of bobby pins, hair pins or the like.
A number of other proposals have been made, illustrative of which are those of U.S. Pat. Nos. Des. 172,953 granted to L. M. Dorfman Sep. 7, 1954; 374,931 granted to S. H. Brooks Dec. 20, 1887; U.S. Pat. Nos. 1,971,152 granted to Michel Barrnache Aug. 21, 1934; 2,021,200 granted to O. F. Placco on Nov. 19, 1935; 2,262,478 granted to E. C. Thompson Nov. 11, 1941; 2,406,376 granted to William Huppert Aug. 27, 1946; 2,435,275 granted to C. S. Hirsch Feb. 3, 1948; 2,728,347 granted to M. L. Leste Dec. 27, 1955; 2,765,798 granted to M. L. Carvell Oct. 9, 1956; 3,419,020 granted to J. L. Courtney Dec. 31, 1968; 3,693,637 granted to Abraham Sidelman Sep. 26, 1972; 3,980,092 granted to Tino Garufi Sep. 14, 1976; 4,150,678 granted to Georgia M. Photopulos Apr. 24, 1979; 4,648,414 granted to Steve A. Fox et al. Mar. 10, 1987; 5,284,167 granted to Gayle R. Gill Feb. 8, 1994; and 5,477,870 granted to Neal M. Menaged Dec. 26, 1995. While the proposals of the prior art appear to offer attractive features, there has continued to be a need for yet an additionally improved styling aid to facilitate shaping and retaining the hair in overlying patterns.


A bicycle helmet having a transparent eye shade and various interchangeable sun shield portions, along with affixed sun shield portions, also including a helmet with a built in sun shield. Sticker or stickers of various styles can be connected to all eye shade portions of the assemblage.

1. Field of Invention
This invention relates to bicycle helmets, specifically to a transparent sun shield for a bicycle helmet.
2. Description of Prior Art
Presently, bicycle helmets do not have sun shields. Currently, some bicycle helmets are made with visors. An example is the visored bicycle helmet in U.S. Pat. No. 5,333,328 to Roberts (1994). Visored bicycle helmets give a bicyclist eye protection against harmful ultraviolet rays. But, visors also block the upper peripheral view of the bicyclist, since visors are not transparent.

Sun shield helmet assembly for bicyclist


Embodiments of mechanisms of forming a radio frequency area of an integrated circuit are provided. The radio frequency area of an integrated circuit structure includes a substrate, a buried oxide layer formed over the substrate, and an interface layer formed between the substrate and the buried oxide layer. The radio frequency area of an integrated circuit structure also includes a silicon layer formed over the buried oxide layer and an interlayer dielectric layer formed in a deep trench. The radio frequency area of an integrated circuit structure further includes the interlayer dielectric layer extending through the silicon layer, the buried oxide layer and the interface layer. The radio frequency area of an integrated circuit structure includes an implant region formed below the interlayer dielectric layer in the deep trench and a polysilicon layer formed below the implant region.

Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductive layers of material over a semiconductor substrate, and patterning the various material layers using lithography to form circuit components and elements thereon. Many integrated circuits are typically manufactured on a single semiconductor wafer, and individual dies on the wafer are singulated by sawing between the integrated circuits along a scribe line. The individual dies are typically packaged separately, in multi-chip modules, or in other types of packaging, for example.
The implementation of silicon-on-insulator (SOI) technology is one of several manufacturing strategies employed to allow the continued miniaturization of microelectronic devices, which may be referred to as extending Moore's Law. Reported benefits of SOI technology relative to silicon (bulk complementary metal-oxide-semiconductor (CMOS)) processing may include, for example, lower parasitic capacitance due to isolation from the bulk silicon, which improves power consumption at matched performance, and resistance to latch-up due to isolation of the n- and p-well structures.
From a manufacturing perspective, SOI substrates are compatible with most fabrication processes. Indeed, an SOI-based process may be implemented without special equipment or significant retooling of an existing factory. The SOI process may be used to form an integrated circuit having a metal-oxide-semiconductor field-effect transistor (MOSFET) area and a radio frequency (RF) area. However, there are challenges for forming the RF area.

Mechanisms for forming radio frequency (RF) area of integrated circuit structure

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.


An ultrasonic diagnostic system includes a probe composed of a group of transducers for transmitting and receiving an ultrasonic wave, a main system connected with the probe by a cable, a memory card, and a battery pack for supplying power. The ultrasonic diagnostic system further includes a data processing unit and a monitor which are provided separately from the above components. The probe and main system are prepared for each ultrasonic scanning mode. The data processing unit subjects the received signal data recorded in the memory card to sophisticated data processing which cannot be carried out by the main system thereby to display the processing result. An examiner can carry the probe, main system, memory card and the battery pack for supplying power instead of a stethoscope to acquires diagnosis data and can process a suspicious image in diagnosis at bedside or house call using the data processing unit thereby to implement precise diagnosis.

The present invention relates to a medical ultrasonic diagnostic system, and more particularly to a handy ultrasonic diagnostic system which a doctor can carry in place of a stethoscope.
Previously known ultrasonic diagnostic systems are generally large-sized, and compact systems can be barely carried to bedside. These systems can be connected with plural kinds of probes such as a linear electronic scanning probe, a convex electronic scanning probe, a sector electronic scanning probe and a mechanical sector scanning probe. These systems were so structured that the above connectable several kinds of probes can provide the best image.
Several prior arts will be described briefly.
JP-A-55-151952 discloses a portable compact-size ultrasonic diagnostic system including integrated components, i.e., an electronic scanning probe having plural aligned piezo-electric materials, an electronic control unit for controlling the action of the probe, a display which is a CRT (cathode ray tube) and a power source for supplying an operational voltage to each part of this system. This reference also discloses an ultrasonic diagnostic system having a probe unit incorporating a probe, an electronic circuit for controlling it, a transmission section for transmitting an image signal by radio, a transmission antenna and a power source, and a display which is provided at a different member from the probe unit and receives the signal transmitted from the probe unit to display an image.
JP-A-57-170230 discloses an ultrasonic diagnostic system including a probe and a memory unit for temporarily storing an echo signal reflected from the probe to display its image by a television set, in which an examiner can select an ultrasonic moving image or a frozen image at the probe and which does not require any particular transmitted path for selecting the frozen image.
JP-A-62-227326 discloses an ultrasonic diagnostic system small-sized enough to carry in a pocket. This reference intends to provide a system which permits diagnosis information to be easily seen on a relatively wide display screen and is small-sized and light-weighted for easy carrying. To this end, the system is provided with a flat display for displaying the diagnosis information and a mechanism for housing it which serves to house it within the system body when the system is carried and extract it from the body when the system is used. The reference also discloses an ultrasonic diagnostic system provided with a probe attachment mechanism for attaching a probe to the system body so that an acoustic lens is inside when the system is carried.
JP-A-3-23853, as shown in FIGS. 9, 10 and 11, discloses an ultrasonic diagnostic system including an A/D converter 75a for converting an ultrasonic image signal inputted from a probe 30a into a digital signal, and a removable external memory device 100a. As clearly seen from FIG. 11, the system further includes a control unit 80a for reading the digital signal from the A/D converter 75a to be stored in the external storage medium 100a or controlling read of the stored data from the storage medium 100a, and a display 20a for displaying the digital signal from the control unit 80a. The reference also discloses an ultrasonic diagnostic system further comprising a recording equipment 200a for reading the data stored on the removable external memory device 100a to display them, or outputting them. This system image-processes a received echo signal to display the image of an examined part; stores, in the external memory device from removable from a system body 10a, the image data when a clear image has been obtained, directly or after they are stored in buffer memory; and as necessity requires, displays the image data or prints out the image data by setting the external memory device 100a in the recording equipment 200a. Thus, the system can be made compact and can hold the examination result without simultaneously carrying the recording equipment 200a and the system body 10a.


A structure for mounting a heat sink onto an integrated circuit package mounted on a printed circuit board is constructed such that a guide member having a frame portion and support post portions is fixed to the printed circuit board, and the heat sink is seated on an inner periphery of the guide member such that the heat: sink may be closely contacted with the integrated circuit package, and then a cover is fixed to the guide member such that it covers over outer peripheral edge portions of an upper face of the heat sink. This structure is high in cooling efficiency and is easy to mount.

1. Field of the Invention
This invention relates to a mounting structure for a heat sink onto an integrated circuit package mounted on a printed circuit board.
2 . Description of the Related Art
In recent years, portable electronic apparatus such as, for example, lap-top personal computers, appear widely on the market as electronic apparatus for which miniaturization and high reliability are required. In order to achieve a high performance of electronic apparatus of the type mentioned, it is necessary to use one or more integrated circuit packages having a great amount of heat generation. Therefore, in order to assure a heat radiation property of an integrated circuit package having a great amount of heat generation, a heat sink is used when an integrated circuit package is to be mounted onto a printed circuit board. A heat sink is required to be mounted such that it closely contacts, with certainty to a heat radiation face of an integrated circuit package in order to prevent an increase of the heat resistance by contact, to optimize the mounting structure for a heat sink onto an integrated circuit package.
FIG. 17A is a top plan view of a conventional mounting structure for a heat sink onto an integrated circuit package, and FIG. 17B is a side elevational view of the same. In the present conventional example, an integrated circuit package 101 is mounted in a little floating condition on a printed circuit board 103 by soldering pins 102 of the integrated circuit package 101 to a conductor pattern (not shown) of the printed circuit board 103, while depressions 106 are provided at upper face edge portions of a heat sink 105 having heat radiation fins 104, and the heat sink 105 and the integrated circuit package 101 are held at the depressions 106 of the sink 105 and lower face edge portions of the integrated circuit package 101 by clips 107 having a substantially C-shaped section and made of a resin or the like (refer to, for example, U.S. Pat. No. 5,099,550).
FIG. 18A is a top plan view of another conventional mounting structure for a heat sink onto an integrated circuit package, and FIG. 18B is a side elevational view of the same. In the present conventional example, pins 112 of an integrated circuit package 111 are mounted on a printed circuit board 114 by way of a frame 113 made of an insulator such as a resin. The frame 113, having a substantially rectangular shape as viewed in plan, has a pair of projections 115 which project sidewardly at locations in the proximity of a diagonal line of an upper face thereof. A heat sink 117 having heat radiation fins 116 at an upper portion thereof is placed on an upper face of the integrated circuit chip 111, and a clip 118 formed from a metal wire shaped in a crank shape is disposed on the heat sink: 117 while the opposite ends of the clip 118 are engaged with the projections 115 of the frame 113 so that the heat sink 117 is fixed relative to the integrated circuit package 111 (refer to Japanese Patent Laid-Open Application No. Showa 63-133557 or U.S. Pat. No. 4,745,456).
In the conventional example described with reference to FIGS. 17A and 17B, since the upper face edge portions of the heat radiation fin 105 are held by means of the clips 107 having a C-shaped section, it is necessary to provide the depressions 105 of a comparatively large size at the edge portions, and there is a problem in that the heat radiation area of the heat sink 105 is decreased and the cooling efficiency is deteriorated.
Meanwhile, in the conventional example described with reference to FIGS. 18A and L8B, since it is necessary to interpose, already at the stage when the integrated circuit package 111 is to be mounted onto the printed circuit board 114, the frame 113 between the integrated circuit package 111 and the printed circuit board 114, there is a problem in that the manufacturing operability is low. Further, when the frame 113 made of a resin or the like is broken, for example, at a portion of a projection 115, it is difficult to exchange the frame 113, and the heat sink 117 can no longer be mounted.
Accordingly, it is an object of the present invention to provide a mounting structure for a heat sink which is high in cooling efficiency and is easy to mount.
It is another object of the present invention to provide a heat sink having a high cool efficiency.
According to the present invention, there is provided a mounting structure for a heat sink for mounting a heat sink onto an integrated circuit package mounted on a printed circuit board, which is constructed such that a guide member having a frame portion corresponding to an outer periphery of the integrated circuit package and support post portions protruding from the frame portion is fixed to the printed circuit board, that the heat sink is seated on an inner periphery of the guide member such that a lower face of the heat sink is closely contacted with an upper face of the integrated circuit package, and that a cover is fixed to the guide member at the support post portions such that it covers over outer peripheral edge portions of an upper face of the heat sink.
According to a preferred embodiment of the present invention, when the outer periphery of the integrated circuit packet is substantially equal to the inner periphery of the frame portion of the guide member, for example, the support post portions of the guide member have a profile wherein they protrude in upward and downward directions of the guide member and lower faces of the support post portions are fixed directly to the printed circuit board.
According to another preferred embodiment of the present invention, when the outer periphery of the integrated circuit package is substantially equal to the outer periphery of the frame portion of the guide member, for example, the support post portions of the guide member have a shape wherein they protrude only in the upward direction of the guide member and the guide member is adhered at a bottom face thereof to the integrated circuit package so that the guide member is fixed to the printed circuit board.
According to another aspect of the present invention, there is provided a mounting structure for a heat sink, which comprises a printed circuit board, an integrated circuit package mounted on the printed circuit board, a heat sink placed on the integrated circuit package, and a belt member provided around the integrated circuit package and the heat sink through a gap between the printed circuit board and the integrated circuit package for pressing the heat sink against the integrated circuit package.
According to a further aspect of the present invention, there is provided a heat sink, which comprises a base member having a lower face closely contacted with an upper face of an integrated circuit package and an upper face from which a plurality of heat radiation fins extend, a cover secured to the base member for closing an upper portion of the base member, and air blasting means provided on the cover for performing circulation of air by way of the fins, those of the plurality of fins at a portion corresponding to the air blasting means being shorter than the fins at the other portion.
In the present invention, since the heat sink is mounted on the integrated circuit package using the guide member and the cover of the particular constructions, a high cooling efficiency can be obtained and mounting of the heat sink is facilitated.
When the present invention is put into practice, the cooling efficiency can be further enhanced by constructing the heat sink so that it has a base member having heat radiation fins and air blasting means for Forcibly cooling the base member by air cooling.
Further, by putting the present invention into practice using a cover made of a resilient plate member having a shape curved toward the heat sink side, the heat sink can always be closely contacted with the integrated circuit package irrespective of a dispersion and so forth in mounting height of the integrated circuit package, and accordingly, it is possible to maintain a high cooling efficiency.
The above and other objects, features and advantages of the present invention and the manner of realizing them will become more apparent, and the invention itself will best be understood from a study of the following description and appended claims with reference to the attached drawings showing some preferred embodiments of the invention.

Heat sink and mounting structure for heat sink


An apparatus is provided for the automatic advance warning of imminent automatic door closure to passengers of public transportation vehicles. Comprised of a panel mounted above the automatic door, comprising an alarm light, a message display area, and a speaker capable of producing audible alarm warnings as well as audible verbal warning messages, it is capable of warning incoming passengers that automatic door closure is imminent. When a door close signal is received from existing door control circuitry, the apparatus is activated and it produces the audible and visual warning messages. After an appropriate delay period the audible and visual warning devices are deactivated and a door close signal is issued to the existing automatic doors and associated door safety guard circuitry.

1. Field of the Invention
The present invention relates generally to warning systems and, more particularly, to an automatic door warning system.
2. Description of the Related Art
With the increased use of public transportation in our society, there has been a corresponding increase in accidents that occur to public transportation passengers. Perhaps the most traumatic of these accidents occur when a passenger tries to board a vehicle in which the doors are closing or are about to close and thus becomes trapped. This action often results in bodily injury, trauma, physical disability or even death.
Further compounding this problem is the fact that most forms of public transportation including trains, trams, trolleys, buses, subway trains, and elevators do not have an operator in close physical proximity to the door. This fact often results in an increased response time to door trapped victims increasing injuries and causing mental trauma to fellow passengers.
While most people would never knowingly subject themselves to direct physical harm, sometimes carelessness and a preoccupation with boarding a vehicle leads to distraction from the dangers. Often the first indication a passenger has that a vehicle is about to move is when the vehicle doors begin to close. At this point the passenger must either rapidly move out of the way, perhaps also causing injury, or rely on numerous prior art door safety devices, which may or may not be operational, to avoid injury.
Numerous attempts have been made to correct for the foregoing problems. For instance, U.S. Pat. No. 5,142,152 to Boiucaner discloses a sliding door sensor. This invention controls the operation of sliding doors so that the doors remain in an open position until the pedestrian traffic clears the door threshold. This action would not be acceptable in many situations such as subway trains where a strict schedule must be adhered to. Moreover, this invention does not address the problem of pre-warning the passenger that the doors are about to close.
Several other attempts have been made at providing an automatic door warning system. For example, U.S. Pat. No. 4,967,083 and No. 4,698,937 to Kornbrekke et al. disclose an invention which utilizes multiple sensor modules either mounted above or on the door itself. Once again, any devices made according to either of the Kornbrekke disclosures only provide for the detection of movement within the door threshold or door swing area and do not address the problem of pre-warning the passenger that the doors are about to close.
Finally, U.S. Pat. No. 4,821,024 to Bayha discloses a door operator pre-warning system and proposes solutions which involve an advance warning system. However, the preferred embodiment disclosure in the Bayha reference only addresses the advance warning problem as would be found on a residential overhead garage door and associated radio frequency link and does not address the problem as would be found on various forms of public transportation.
Consequently, a need has been felt for providing an apparatus and method which provides clear and distinct advance warning messages that automatic doors on various forms of public transportation are about to close.


A developer conveying apparatus includes a developer housing portion, a first spiral feeder, a second spiral feeder, a driving unit, an operation control unit, and a sensor. The first spiral feeder and the second spiral feeder each include a hollow spiral member and rib members. The hollow spiral member is spirally formed and internally has a space. The rib members run in a first direction and bridge spiral pieces constituting the spiral member. The operation control unit causes: the driving unit to change the rotation speed of the first spiral feeder and the second spiral feeder according to a printing linear speed of an image forming part; and the driving unit to change a rotational phase difference between the first spiral feeder and the second spiral feeder referring positions of the rib members to a predetermined rotational phase difference according to the changed rotation speed.

Unless otherwise indicated herein, the description in this section is not prior art to the claims in this application and is not admitted to be prior art by inclusion in this section.
To achieve excellent development property when forming an image by electrophotographic method, it is necessary to keep a toner amount in a developer housed in a developer housing portion within an appropriate range. In view of this, general developer housing portions internally include a stirring unit and a sensor. The stirring unit stirs the developer to prevent the developer from accumulating and attaching. The sensor measures the toner amount of the developer. When the toner amount measured by the sensor reaches to equal to or less than a predetermined replenishment threshold, replenishing the toner in the developer housing portion ensures keeping the toner amount in the developer within the appropriate range.

Developer conveying apparatus, developing device, and image forming apparatus


An instruction fetcher reads out instructions and data from a memory. The instructions and data are decoded by an instruction decoder. When a data transfer instruction is fed to an input register in a register section, a second execution unit starts an execution, the execution result being then stored in an output register. If any unprocessed data remains in the input or output register, the subsequent data processing is suspended. Input and output register sets and execution sub-units may be provided such that any of these components can be selected depending on the necessary process. Since a given execution is executed by the data transfer instruction, the data can be processed at high speed through a simplified program. Since no specific and additional computation instruction is required, the expandability can be improved.

1. Field of the Invention
The present invention relates to a data processor for executing various instructions to process data.
2. Description of the Prior Art
There are many data processors of a control driven type in which instructions stored in a memory are sequentially fetched and decoded for execution. Microprocessors are examples of such processors.
FIG. 1 is a flow diagram of a RISC (reduced instruction set computer) type processor. This processor comprises a memory 1, an instruction fetcher 2, an instruction decoder 3, a register section 4 having a plurality of registers, an execution unit 5 and a data access section 6. In such an arrangement, computation, data transfer (load/store) and other instructions are sequentially fetched and decoded, the decoded instructions being then used by the execution unit 5 for executing operations according to the instruction codes.
In the prior art, the execution unit 5 of FIG. 1 includes a basic arithmetic logic unit (ALU) for executing addition, subtraction, logical or, logical and, and other operations, and additionally has a parallel multiplier for executing multiplication at a high speed, for example. The execution unit 5 may include two types of ALU for integer number arithmetic and for floating-point arithmetic. When data is to be processed through various execution sub-units forming the execution unit 5, an operation code corresponding to each of the sub-units is generally provided and described in a program. These operation codes are then read in the processor. More particularly, extended operation codes for MUL (multiplication), DIV (division), MAC (sum of products), FADD (floating-point addition), FSUB (floating-point subtraction) and others may be provided in addition to basic operation codes for ADD (integer addition), SUB (integer subtraction), AND (logical or), OR (logical and) and others. These operation codes were described in the program.
However, such a processor can perform a given operation only when it executes an instruction for providing data required by the operation to an operation data storage location (e.g., a register) and another instruction for starting the actual operation. For example, if the RISC processor is to perform repeated multiplications for operand data stored in the memory, the following program may be considered:
______________________________________ LD R2, (R0) (R2 .rarw. mem (R0)) LD R3, (R1) (R3 .rarw. mem (R1)) MUL R2, R3 (R2 .rarw. R2 .times. R3). ______________________________________
In such a program, two load instructions for transferring data to two registers (R2 and R3) and a multiplication instruction are necessary. One multiplication requires the execution of at least three instructions.
This raises the following problems:
(Problem 1) Limitation of Processing Performance
Even if the processor includes a high-speed computing element for executing the operation within one instruction cycle, the overall processing rate will only just perform one operation through three instruction cycles. This hampers the improvement of performance.
(Problem 2) Program Size
The overall program size is large because the number of instructions necessary to perform the operation is large.
(Problem 3) Instruction Code Length
When a new operation is to be added, the operation code indicative of how it is to be processed must be added into the instruction code. The extended operation directly results in an increase of the instruction code length. This makes the problem 2 more significant. The hardware of the processor will also be increased in scale.
(Problem 4) Difficulty in Compactly Designing Instructions
Operations other than the basic operations may be added and extended in the future. These operations must be previously reserved in the processor. It is thus difficult to compactly design the instruction code.
(Problem 5) Future Extension
When all the future additions and extensions of the operations are considered, the design itself becomes difficult. The number of additional operations is consequently limited. It is thus very difficult to design a flexible processor facilitating extension.
To overcome some of these problems, there has been proposed .mu.PD77240 which is a DSP from NIHON DENKI CORP. The features of the DSP are described in "User's Manual .mu.PD77240", on page 66.
(1) This DSP has a circuit for performing the floating-point multiplication (FMPY) in addition to the conventional ALU. The ALU starts the operation based on an explicit operation instruction (ADD, SUB or the like) while the FMPY circuit automatically starts the operation for data transferred by a data transfer instruction.
(2) In the FMPY, data transferred to two multiplication input registers K and L are multiplied together. The result is outputted to the output bus of the FMPY after one instruction cycle and written into a multiplication output register M after two instruction cycles.
As is shown, the multiplication can only be started by the data transfer instruction. This overcomes the above problems 1 and 2 to some extent.
However, the DSP still includes the following problems.
1. As to the Problems 1 and 2
FIG. 2 shows the structure of a field for specific instructions in the DSP. This field is one included in generally called "operation instruction" in said manual on page 14. The synopsis of the field is as follows:
1. The instruction code length is 32 bits.
2. OP indicates the type of operations.
3. CNT instructs to change the internal state of the DSP, for example, an increment in an address register.
4. Q and P represent first and second operands, respectively.
5. SRC and DST indicate source and destination for the transfer instruction, respectively.
More particularly, three different instructions, operation, transfer and internal state manipulation, hereinafter referred to as "individual instructions" are usually described together in the 32-bit fixed instruction (see the bottom of the drawing). This is because many DSP's follow the architecture of the microprogram computer. As a result, the total number of steps can be reduced at the sacrifice of shortening the instruction code length. When the number of bits required to describe an individual instruction is appropriately combined with that required to describe other individual instructions, these instructions can be completely accomodated in the 32-bit instruction. Such an architecture may overcome the problems 1 and 2.
When the actual programing is considered, however, the technique cannot improve the problems 1 and 2 very much. This is because if the efficiency is to be maximized, it is always required to set three parallel-describable instructions, which is actually impossible. If only several transfer instructions are to be continuously executed, for example, it requires a 32-bit instruction code for each transfer instruction since only the fields of the SRC and DST used (with total 10 bits). During such a period, the efficiency of usage in the memory will be reduced to about one-third, and the problems 1 and 2 will be raised again.
2. As to the Problems 3 to 5
In this DSP, the FMPY can only perform the multiplication. If any other operation is added for the FMPY in the future, an operation selection mechanism must be also incorporated in a suitable manner. In the structure of FIG. 2, the a selection can be carried out by adding a new individual instruction to the OP. However, such a manner is hardly acceptable because it conflicts with the basic design concept of the FMPY in which the multiplication is only executed by the individual instructions relating to the data transfer. This may also directly raise the problems 3 to 5. It is to be noted that the DSP is not initially designed to overcome the problems 3 to 5.
The relationship between the problems 1 to 5 and the DSP has been now described. When the RISC processor, which is one of the main applications of the present invention, is considered, the DSP may further raise the following problems.
[Problem 6] Difficulty in Programing
In the FMPY, the multiplication is carried out for the registers K and L at all times. The result of multiplication activated two cycles earlier appears in the register M. Since the result is updated for each cycle with or without reference from outside, a programmer must pay carefully attention to timing when a desired result is read out from the register M. On the other hand, if a high level language is to be used, it is extremely difficult to develop a compiler for attaining the read-out timing intended by the programmer.
Even if the problem of timing is overcome, another problem will be raised when an interruption occurs before reading out the result of computation. This is because the multiplication result will be lost until the interruption has been processed. Although another method by which the interruption is inhibited before the multiplication is considered, it is not practical for reasons (1) the program becomes complicated; (2) the inhibition and permission of interruption should be judged at the system level; and (3) the immediacy intended by the FMPY is lost.
[Problem 7] Restriction due to Architecture
The DSP only has three registers K, L and M and is combined with the FMPY as a set. If a new operation (e.g., addition) is to be added, any other register for such a new operation (e.g., K.sub.2, L.sub.2 or M.sub.2) must be added to the DSP. Since the RISC processor requires various operations such as addition, subtraction, multiplication, division, trigonometric function and others for performing scientific and technical computations such as image processing, CG and the like, the scale of the hardware will be significantly increased when a 32-bit register set is added for each of these operations.
[Problem 8] Hardware Volume
The DSP works at high speed by simultaneously transferring the data to the registers K and L. Thus, the DSP takes a double 32-bit data bus structure at the entries of these registers. This makes the hardware complicated, thereby leading to increase of the circuit scale. It is desirable to improve such an arrangement from the viewpoint of compact design and manufacturing cost.

Data processor with execution control for first and second execution units


The present disclosure provides an anti-slip floor tile including a base layer, a decorative layer on the base layer, and a wear resistant layer on the decorative layer. The wear resistant layer includes a non-rigid or semi-rigid thermoplastic resin, and a plurality of first mineral particles uniformly distributed inside the thermoplastic resin. The present disclosure can improve the wear resistance of the anti-slip floor tile by dispersing the first mineral particles in the wear resistant layer.

With the development of society and the improvement of living standards, requirements in aesthetics and safety of interior decorations are gradually increased. As one of the most important components of interior decorations, floor tiles have naturally obtained more attention. At present, the floor tiles on the market include ceramic tile, wood floor, laminate floor, PVC floor, and the like. The ceramic tiles are wear-resistant and durable, but are not anti-slip, especially in the case of water, which causes people are easy to slip down. Because the ceramic tiles are hard, people are easily injured after slipping down, therefore, the ceramic tiles are not suitable for use in places with children, the elderly and the water. Compared with the ceramic tiles, wood floors have better performance in slip resistance, but since wood floors are not water resistant, they are not suitable for use in places with water.
Due to the poor anti-slip effect of ordinary PVC floor tiles, when pedestrians step on them, they will fall easily because of slipping, especially if the ground is inadvertently wet, it will be more dangerous. In order to increase the slip resistance, the surface of the floor tile is usually deep embossed, or made of knitted fabrics, to increase the roughness and improve the anti-slip performance, but the slip resistance of the surface of the floor tile is greatly reduced under the wet condition, for example, the ground is wet by liquid such as water. As shown in FIG. 1, a conventional anti-slip PVC floor tile is provided with a sandblasted rough layer 100 on the surface of the floor tile. Although the sandblasted rough layer 100 has anti-slip performance, it is easy to be separated from the main body of the floor tile when subjected to external force for a long time, which will cause user confusion.
The preceding description is provided to provide general background information and does not necessarily constitute prior art.

SHANGHAI JINKA FLOORING TECHNOLOGY CO., LTD.


A pipefitting instrument includes a main body member, a carriage slidably connected to the main body member, and a protractor member pivotally connected to the carriage. The protractor member includes a protractor scale operable to measure an angular orientation of the protractor member relative to the main body member. The instrument also includes a mounting member slidably connected to the main body member and configured to releasably attach to a pipe flange.

Pipefitting includes the assemblage of sequential segments of pipe (e.g., for transportation of fluids, gases, etc.) and securing the segments in position corresponding to a predetermined layout. Adjacent pipes segments are often connected through mating pipe flanges each including a plurality of mounting holes circumferentially spaced about a central axis of the corresponding pipe section. The pipe flanges of successive segments can be aligned such that their respective mountings holes are arranged coaxially, thereby allowing the flanges to be fastened to each other, e.g., by passing threaded bolts through the mounting holes.
Known methods for aligning sequential segments of pipe include positioning individual pieces (i.e., flanges and pipes) of each pipe segment according to a predetermined layout at a work site, and forming a preliminary connection (e.g., by tack welding) between the individual pieces of each pipe segment. A final connection can then be form by completing the welds between the individual pieces. Since some of the initial alignment is often performed by visual approximation, some of the pipe segments may not align as intended following the final connection, and the process may have to be repeated for those misaligned pipe segments.

Pipefitting instruments and related methods


Systems and methods perform Laplacian Principal Components Analysis (LPCA). In one implementation, an exemplary system receives multidimensional data and reduces dimensionality of the data by locally optimizing a scatter of each local sample of the data. The optimization includes summing weighted distances between low dimensional representations of the data and a mean. The weights of the distances can be determined by a coding length of each local data sample. The system can globally align the locally optimized weighted scatters of the local samples and provide a global projection matrix. The LPCA improves performance of such applications as face recognition and manifold learning.

Principal Components Analysis (PCA) is widely used in computer vision, pattern recognition, and signal processing. PCA enables analysis by reducing multidimensional data sets to a lower number of dimensions. PCA can be considered an orthogonal linear transformation that maps data to new coordinate systems, with the greatest variance by any projection of the data lying on the first coordinate (called the first principal component or principal subspace), the second greatest variance on the second coordinate, etc. Thus, PCA is conventionally used for dimensionality reduction in data sets by retaining those attributes of the data set that contribute most to its variance in lower-order principal components and discarding higher-order principal components. The low-order components usually contain the "most important" attributes of the data.
In face recognition, for example, PCA is performed to map samples into a low-dimensional feature space where the new representations are viewed as expressive features. In a feature space, each sample is typically represented as a point in n-dimensional space that has a dimensionality determined by the number of features used to describe the sample. Discriminators like Linear Discriminant Analysis (LDA), Locality Preserving Projection (LPP), and Marginal Fisher Analysis (MFA) are performed in the PCA-transformed spaces. In active appearance models (AAM) and 3-dimensional (3D) morphable models, textures and shapes of faces are compressed in PCA-learned texture and shape subspaces. These texture and shape features enable deformation and matching between faces.
In manifold learning, tangent spaces of a manifold are presented by the PCA subspaces and tangent coordinates are the PCA features. Representative algorithms in manifold learning, such as Hessian Eigenmaps, local tangent space alignment (LTSA), S-Logmaps, and Riemannian normal coordinates (RNC) are all based on tangent coordinates. In addition, K-Means, the classical algorithm for clustering, was proven equivalent to PCA in a relaxed condition. Thus, PCA features can be naturally adopted for clustering. The performance of the algorithms mentioned above is determined by the subspaces and the features yielded by PCA. There are also variants of PCA, such as probabilistic PCA, kernel PCA (KPCA), robust PCA, non-negative PCA, weighted PCA, generalized PCA, and sparse PCA.
However, PCA has some limitations. First, PCA is sensitive to noise. Noise samples may cause significant change of the principal subspaces. PCA becomes unstable with perturbed sample points. To address this issue, robust PCA algorithms have been proposed, but these sacrifice the simplicity of PCA.
Weighted PCA was developed to perform smoothing on local patches of data in manifold learning. An iterative approach was used to compute weights that have convergences that cannot be guaranteed. Weighted PCA is performed only on local patches of data with no insight into how to derive a global projection matrix from locally weighted scatters.
In principle, PCA is only reasonable for samples in Euclidean spaces where distances between samples are measured by L2 norms. For non-Euclidean sample spaces, the scatter of samples cannot be represented by the summation of Euclidean distances. For instance, histogram features are non-Euclidean. Their distances are better measured by Chi square techniques. Therefore, the principal subspaces of such samples cannot be optimally obtained by conventional PCA. The KPCA algorithm was designed for extracting principal components of samples whose underlying spaces are non-Euclidean. However, KPCA cannot explicitly produce principal subspaces of samples, which are required in many applications. Besides, KPCA is also sensitive to noise data because its criterion for optimization is intrinsically equivalent to PCA.

Laplacian principal components analysis (LPCA)


A solder mask includes an opening through which intermediate conductive elements may be positioned to connect bond pads of a semiconductor die exposed through an aligned opening in a carrier substrate to which the solder mask is secured with corresponding contact areas of the carrier substrate. An assembly is formed by forming the solder mask on or securing the solder mask to the carrier substrate. The semiconductor die is attached to the carrier substrate such that bond pads of the semiconductor die are exposed through the aligned openings in the carrier substrate and solder mask. Intermediate conductive elements are used to electrically connect the bond pads to corresponding contact areas on the carrier substrate. An encapsulant material is introduced into an area defined by the solder mask and carrier substrate openings such that the intermediate conductive elements and semiconductor die surface within the aligned openings are encapsulated.

1. Field of the Invention
The present invention relates generally to solder masks and use thereof in packaging semiconductor devices and, more specifically, to a method for encapsulating portions of a semiconductor device package using a solder mask as a mold for the encapsulant material.
2. State of the Art
As the dimensions of electronic devices are ever decreasing, the sizes of the structures used to package the microprocessors, memory devices, other semiconductor devices, and other electronic componentry must also become more compact.
One approach to reducing the size of semiconductor device assemblies is to minimize the profiles of the semiconductor devices, as well as the connectors and the electronic components to which the semiconductor devices are electrically connected, as well as to minimize the overall profiles of such assemblies. One type of packaging technology that has been developed to save space in this manner is the so-called "chip-scale package" (CSP).
An example of a CSP designed to save space is a board-over-chip (BOC) package. A typical BOC package comprises a carrier substrate that is configured to be secured over the active surface of a semiconductor die, wherein bond pads of the semiconductor die are exposed through an opening formed through the carrier substrate. The bond pads on the semiconductor die are connected to conductive elements on the carrier substrate using a step where wire bonds are formed and electrically connect the bonds pads to the conductive elements.
Following wire bonding, it is desirable to encapsulate the wire bonds between the semiconductor die and the carrier substrate. Encapsulation serves a variety of functions, including sealing the encapsulated surfaces from moisture and contamination and protecting the wire bonds and other components from corrosion and mechanical shock.
Encapsulants may be deposited from the top of the carrier substrate to encapsulate the semiconductor die and wire bonds. The material used for the encapsulant typically comprises a flowable, dielectric material. Alternatively, a glob-top or other encapsulant may be formed over the wire bonds for protection. Glob-top structures use a high viscosity encapsulant, typically a silicone or an epoxy, such that the encapsulating material may be applied to a substantially planar surface without being laterally confined. However, the height of the resulting glob-top structure may be higher than is required to properly encapsulate the wire bonds and may interfere with subsequent packaging steps.
After encapsulation, a solder stencil or solder mask may be placed or formed on the surface of the carrier substrate. Solder stencils and solder masks typically include a number of openings in which solder balls may be placed or formed.
Conventional solder paste stencils and solder ball placement stencils are substantially planar metal structures that are aligned with and secured to a bond pad-bearing surface of a semiconductor device or a terminal-bearing surface of a carrier substrate, such as a printed circuit board, on which solder balls are to be formed. Apertures that have been formed through the stencil are aligned with corresponding bond pads or terminals. Such conventional solder stencils are designed to resist the adherence of solder and, thus, of the formed solder balls thereto. Once such a solder stencil has been secured to a semiconductor device or a carrier substrate, solder may be introduced onto the solder stencil, for example, by at least partially immersing the component or an assembly that includes the component in a solder bath to form solder balls on bond pads or terminals that are exposed through apertures of the solder stencil. When solder balls have been formed, a conventional metal solder stencil is typically removed from the component from which the solder balls protrude, then cleaned, and reused.
State-of-the-art solder masks are typically single-use structures that are formed directly on the component on which solder balls are to be formed. These single-use solder masks may be formed from a photoimageable material that, when cured, will withstand the conditions to which such solder masks will be exposed, such as the typically high temperatures of molten solder. Solder balls may be formed by employing the same types of techniques, as described above, that are used with conventional, metal solder masks. Once the solder balls are formed, if the single-use solder mask was formed from a dielectric material and the solder balls protrude a sufficient distance therefrom, the single-use solder mask may remain in place on the component. Alternatively, the solder mask may be removed from the component, such as by use of suitable photoresist stripping agents, to further expose the solder balls.
The solder mask prevents bridging of the solder material and shorting between the solder balls in the completed package. The presence of a glob-top structure may, however, make it difficult to place the solder mask over the carrier substrate, particularly if the glob-top material has moved too far laterally.
Accordingly, there is a need for a solder mask that may be positioned on a carrier substrate of a semiconductor device assembly prior to encapsulation of bond wires and which may remain in place as wire bonding operations are being conducted, as welt as for assemblies and packages including such solder masks and methods for forming and using such solder masks.

This patent is subject to a terminal disclaimer.

Methods of encapsulating selected locations of a semiconductor die assembly using a thick solder mask


An electrical circuit backfits into different instrumentation and control (I&C) system hardware configurations as a replacement or upgrade. The circuit has a multiple signal path processing circuit including a multi-functional ASIC. A fixedly configured, multiple signal path connector such as a hardwired multi-pin package removably connected with a pin socket in the processing circuit connects the ASIC with the I&C system for coupling inputs to and outputs from the ASIC and for selecting operative signal paths of the ASIC.

This invention relates to an electrical circuit having multiple signal paths for processing electrical signals and, more particularly, to a circuit having selectable signal paths for processing signals received from different system hardware configurations or received for performing selected functions.
The invention is particularly useful in connection with instrumentation and control (I&C) systems of complex industrial process and power plants. Analog and digital components of I&C systems of complex industrial process and power plants tend to wear out after about five years or more and must be periodically replaced as long as the plants continue to operate. However, the development of integrated circuits having up to 50,000 (50K) gates or more on a chip (very large scale integration) and other dramatic improvements in the cost and performance of digital technology over the past ten to twenty years have so restructured the I&C field that many analog and digital components originally employed in vintage I&C systems are no longer available at acceptable prices or have been substantially redesigned. Accordingly, vintage I&C systems must be redesigned at ever increasing costs to utilize currently available components when the original components are discontinued.
Existing I&C systems may be completely replaced with modern full system upgrades to obtain the advantages of state of the art digital technology. The assignee of the present invention, for example, provides a digital I&C system (known as the Eagle 21 system) for commercial pressurized water nuclear reactors to upgrade existing analog systems, including the Foxboro H-line, Hagan and Westinghouse 7100 and 7300 and other I&C systems. Advantageously, the Eagle 21 system provides additional capabilities of automatic calibration, automatic system self-testing and additional computer data link channels. However, the substantial cost of a full system upgrade of a nuclear power plant even with its increased capabilities frequently is not justified when compared with the significantly lower cost of simply maintaining the current I&C system.
Where full I&C system upgrades can not be justified, programmable logic controllers or other microprocessor-based hardware may be employed to replace vintage analog and/or digital components and circuits. Thus, for example, B&W and Framatome provide their STAR microprocessor based modules and the Foxboro Company provides its SPEC 200 micro hardware to upgrade nuclear plant I&C systems. However, the Nuclear Regulatory Commission and the commercial nuclear power industry are very concerned about software common-mode failures of such devices and their sensitivity to plant environs. Thus, they require that the software be validated and verified before installation in nuclear power plants, which requires considerable time and effort.
Application specific integrated circuits (ASICs) were originally developed in the defense field for uses which require the high reliability and high performance of digital electronic technology without the perceived disadvantages of software. More recently, ASICs have been used in digital watches, communications and other mass markets where the ASIC related costs can be distributed over thousands of devices. General information regarding ASICs may be found in the "ASIC & EDA" magazine (which was retitled "Integrated System Design" as of the March 1995 issue). Other state of the art circuits and devices which do not require the use of software are available, including field programmable gate arrays (FPGAs), electrically programmable logic devices (EPLDs) and electrically programmable analog circuits (EPACs).
The electronics industry is presently able to produce an ASIC which can be economically employed in small markets such as I&C systems of nuclear power plants and chemical processing plants. However, these types of markets are frequently served by more than one vendor and each vendor will upgrade its products over time. Thus, ASIC based circuit boards and modules must be as functionally versatile as possible and must be able to interface with different system hardware configurations if they are to be useful in fragmented markets.

Electric circuit for selectively processing electrical signals


A single-lens two-channel reflector provides the capability to switch between two-dimensional and three-dimensional imaging. The reflector includes displaceable outward reflectors and displaceable inward reflectors that can simultaneously provide left and right images of a scene to an imager, and controllers for controlling relative distance between the outward and the inward reflectors, and for controlling deflection angle of the inward reflectors, so as to enable the adjustment of disparity and convergence angle. Imaging systems and methods utilize the single-lens two-channel reflector.

Classic computer stereovision systems use two imagers such as cameras to shoot pictures of the same scene from different angles. The cameras are separated by an interocular distance, and are synchronized. A computer then calculates depths of objects in the scene by comparing images shot by the two different cameras. This is done by shifting one image on top of the other one to find the parts that match. The distance or amount the images must be shifted to find a best match is called the disparity. The disparity at which objects in the images best match is used by a computer to calculate their depths and provide a three-dimensional image of the scene.
A multi-view imaging system uses only one camera to calculate the object depth. In most cases, such a system uses specially designed mirrors or prisms to create virtual cameras. With the views captured by the real camera and the virtual cameras side-by-side or one above the other, the computer can use the same scheme as in classic computer vision to calculate the depth of an object.
In prior art multi-view imaging systems, two pairs of flat reflectors such as mirrors are used to define two light channels: a left channel and a right channel, encased in a dust and light proof housing device that fits in front of a camera lens in the same manner as a close-up accessory or telephoto adapter (see FIG. 1). Within each channel, one of the mirrors takes incoming light rays and reflects the light rays to the other mirror for it to output the light rays to an imager such as a camera, CCD, etc. through the lens. The mirror that takes the incoming light rays will be called an outward mirror (describing the orientation of the mirror relative to the incoming light rays and the imager) and the mirror that outputs light rays to the camera will be called an inward mirror. The inside vertical edges of the two inward mirrors are connected along the optical axis of the imager lens (see FIG. 1). Light rays into the left channel will generate a left view of the scene on the right half of the imager and light rays into the right channel will generate a right view of the scene on the left half of the imager. The device permits acquisition of simultaneous left and right views using a single imager. Such a device has been called a two-channel reflector (TCR).
To adjust the convergence angle of the optical axes of the virtual cameras, it is known to provide a TCR that allows a user to swivel the outward mirrors simultaneously and equally about their inside vertical edges with a ganging mechanism. A disadvantage of this approach is that making the convergence angle of the optical axes of the virtual cameras smaller (i.e., making the convergence point further away from the imaging system) also makes the interocular distance between the virtual cameras smaller and consequently lowers the disparity between the left view and the right view.
Improvements in the above design are also known, wherein the basic idea is to swivel the outward mirrors about their vertical centerlines, instead of the inside vertical edges. The advantage of this approach, in addition to adjusting the convergence angle of the views of the left virtual camera and the right virtual camera, is that it reduces the impact of the disparity reduction by one half.
Other prior art devices also allow the inward mirrors to be swiveled about their connected inside edges activated by rods connecting the inward mirrors and the outward mirrors. In these cases the outward mirrors could be swiveled about their inside edges instead of their centerlines. Location of the connected inside edges of the inward mirrors is fixed. However, the swiveling process of these prior art devices has not been mathematically modeled or characterized.
Another prior art two-channel reflector based multi-view imaging system includes a single hand held CCD mounted on a two-channel reflector. Like a typical TCR, light rays into the left channel generate a left view of the scene on the right half of the CCD and light rays into the right channel generate a right view of the scene on the left half of the CCD. Hence, an image generated by this imaging system contains two views of the scene, a left view and a right view. These views are used in camera calibration and correspondence estimation to obtain an accurate 3D model of the scene. A user can adjust the convergence angle of the virtual cameras by adjusting the outward mirrors about their centerlines. Like all the TCR models that have been developed so far, the disparity can be adjusted only as a side effect of adjustment of the convergence angle.
A stereographic imaging system with automatic control of interocular distance is known, but is a two-camera system. The system includes a left camera and a right camera with respective lenses. The system also includes mechanisms to synchronously set a focal length of the lenses, to synchronously set a focal distance of the lenses, to set a convergence angle between the left and the right cameras, and to set an interocular distance between the left and right cameras. A controller may determine a convergence based on the focal length. The controller may cause an interocular distance and a convergence angle between the left and right cameras to be set based on a maximum allowable disparity, the focal length of the lenses, the convergence distance, and a distance to an object in the scene. This is so far the only stereographic imaging system with the capability of direct control of both the convergence angle and the interocular distance (and so disparity) of the imaging process.
To the author's knowledge, no single lens multi-view imaging systems are available providing control of both convergence angle and interocular distance. In turn, to the author's knowledge no imaging systems providing the capability of switching between 2D and 3D modes are available.

Two-channel reflector based single-lens 2D/3D camera with disparity and convergence angle control


An image analyzer (120) aggregates image samples (140) into a cluster (170) based on the image samples (140) being classified from a subset of image metrics applied to a reference sample (130). The image analyzer (120) generates an image quality output (150) by analyzing a distance (180) from the cluster (180) relative to another cluster.

Image analysis takes on many forms for a variety of differing applications. In some cases, manual analysis can be performed wherein printed or digital images are inspected microscopically or digitally to determine whether or not an image has been generated by an authorized agent or whether some unauthorized entity has nefariously generated the image. In addition to manual analysis techniques, automated image analysis systems have increasingly been applied to improve the efficiency of inspection.

Hewlett-Packard Development Company, L.P.


A display coordinate and operation value conversion table 13 is provided in a computer 10. The conversion table 13 stores the correspondence between, the coordinate position of a curve slider (reference line) formed in a specified area 14, and the animation, etc. displayed in the operation target display area 15. With the configuration, a desired position on the curve slider (reference line) is specified by a mouse, etc., the display coordinate and operation value conversion table 13 is searched based on the coordinate data of the corresponding pointer, and the animation is displayed in the operation target display area 15 by reading the corresponding animation data, thereby easily obtaining the corresponding animation at the pointer specified in the specified area 14 on the display 11, and displaying a curve slider with high operability.

1. Field of the Invention
The present invention relates to a curve slider apparatus forming part of an user interface.
2. Description of the Prior Art
The slider apparatus forming part of a user interface displays, for example, a reference line on the screen of a computer, has a pointer on the reference line, and converts the position of the pointer into a numeral expression so that a visually comprehensible operation can be realized. For example, when animation and the slider apparatus is combined, one end of the reference line corresponds to the starting position of the animation, and the other end of the reference line corresponds to the ending position of the animation. In addition, when the user moves the pointer using a pointing device (for example, a mouse), the animation is regenerated based on the position of the pointer and the moving speed. Therefore, when the moving speed is high, the animation is played back in a fast-forward mode. When the moving speed is low, the animation is played back in a slow mode.
FIG. 1 shows the above described slider apparatus. A display 1 of a personal computer, etc. is used for animation display 2 and slider display 3. The slider display 3 is formed by a reference line 4 and a pointer 5. The slider display 3 refers to a graphical display located at the lower part of the display 1. As described above, one end (for example, the leftmost point) of the reference line 4 corresponds to the starting position of the animation displayed on the animation display 2, and the other end (for example, the rightmost point) of the reference line 4 corresponds to the ending position of the animation. When the animation is regenerated, the pointer 5 moves on the reference line 4 from one end to the other end of the reference line 4. The user can move the pointer 5 by dragging the pointer 5 using a mouse, etc. in the arrow direction. Therefore, the animation can be regenerated based on the position of the pointer at the speed of the dragging operation.
Thus, the conventional slider apparatus displays animation on the display 1 by a combination use of the linear reference line 4 and the pointer 5 moving on the line so that desired information can be obtained while visually confirming the ratio of the animation displayed on the animation display 2 to the entire information.
The above described conventional slider apparatus confirms the information according to the position of the pointer 5 moving on the linear reference line 4. Therefore, when the change of displayed information such as animation, etc. does not correspond to a simple line, it is hard to select a desired position. For example, if displayed information is images recorded using a camera on the move, it is necessary to specify the current stage in the entire image to be displayed on the display 1. That is, in this case, the recording position is more important than the recording time. Therefore, in the above described case, the slider apparatus comprising the reference line 4 and the pointer 5 simply moving on the reference line 4 does not satisfactorily work.
The present invention aims at providing a slider apparatus capable of operating and displaying image information. etc., which cannot be specified by a slider apparatus using a linear reference line, in a visually comprehensible manner using a curved reference line.
That is, the above described problem can be solved according to the first aspect of the present invention by providing a curve slider apparatus having a coordinate display unit for displaying a curve slider formed by a reference line and a pointer moving on the reference line; an operation target display unit for displaying a corresponding operation target object at the position of the pointer moving on the reference line; a conversion table for storing data corresponding to the object to be displayed on the operation target display unit; and a control unit for controlling the movement of the pointer on the reference line interlocking with the regeneration of the object corresponding to the position of the pointer.
The coordinate display unit provides, for example, a reference line on a map and a pointer movable on the reference line, and specifies the position of the pointer using a pointing device such as a mouse, a tablet, etc. The control unit reads coordinate data of the position specified on the reference line according to the data stored in the table, and displays a corresponding object (for example, animation data) on the operation target display unit. In addition, it reads the information about the position of the pointer on the reference line based on the object (for example, animation data) displayed on the operation target display unit, and moves the pointer to the corresponding position.
With the above described configuration, the position of the pointer moving on the reference line can be freely moved to display an object at a desired position (for example, at a position on a map) on the operation target display unit.
Furthermore, the position on the reference line pointed to by the:pointer can be viewed by comparing it with the animation by forming the coordinate display unit and the operation target display unit on the same display, thereby realizing a curve sliver apparatus with high operability and visibility.
In addition, according to the second aspect of the embodiment, the recording operation and the difference in a moving unit can be displayed by changing the color and the form of the reference line.
With the configuration, only by giving a glance at the reference; line displayed on the coordinate display unit, the position of the recording operation and the moving unit of a camera device such as a car, a bicycle, on foot, etc. can be easily recognized.
In addition, the direction of a camera and the moving unit of a user as a cameraman can be displayed by changing the color and the form of the pointer. With the above described configuration, the direction of a camera and the moving unit of the cameraman can be easily recognized only by taking a glance at the pointer displayed on the coordinate display unit.
Furthermore, the present invention does not limit an applicable screen to a two-dimensional screen, but can also be applied to a three-dimensional screen. The operation target display unit can be designed to display not only dynamic object such as animation, etc., but also static objects such as a graph, a table, a text, a photograph, a static image, etc. indicating the temperature, humidity, sound, etc.


A system for positioning a catheter includes a nerve stimulator needle carried within the lumen of the catheter. A microelectrode is configured as a needle tip precisely protruding beyond a tapered distal end of the catheter. The catheter and needle are fixed against axial movement relative to one another to maintain the precise configuration of the microelectrode needle tip conductive surface by a releasable clamp which is grasped by the practitioner to compress the catheter lumen against the needle without permanent deformation of the needle shaft while simultaneously advancing the needle and the catheter toward a target nerve.

1. Field of the Invention
This invention relates generally to regional anesthesia and more particularly to a system for positioning a catheter and nerve stimulator needle in conjunction with various procedures, such as, the administration of an anesthetic blockade and for continuous infusion of anesthetic or analgesic through the catheter.
2. Antecedents of the Invention
The field of regional anesthesia relates to the practice of administering anesthesia to a specific body region during surgery, for the relief of postoperative pain, and for extended relief of trauma or chronic pain. Often, regional anesthesia has been found to be preferable to general anesthesia because of increased safety, the availability of postoperative pain control and decreased anesthetic costs.
Regional anesthesia delivery techniques strove to optimize administration of a local anesthetic in close proximity to a target or nerve plexus so as to establish a neural blockade. Successful administration of regional anesthesia was dependent upon the accurate placement of the anesthetic in relation to the target nerve or nerves.
Various techniques have been employed to assist in placement of an administration needle in close proximity to the target nerve, which was not externally visible. One of the traditional methods of needle placement involved eliciting paresthesia. Among the disadvantages of this technique was the lack of accurate patient responses amongst patients who were disoriented and/or sedated.
A prevalent technique employed the use of nerve stimulators electrically coupled to a nerve stimulator needle. Such method was premised upon the phenomenon that an electrical pulse is capable of stimulating a motor nerve fiber to contract an innervated muscle or cause paraesthesia, in the case of sensory nerve stimulation.
The nerve stimulator needle was placed within the tissue of the patient's body in the vicinity of the nerve to be blocked and then advanced until stimulation of the target nerve was achieved as determined by visually detecting muscle contractions or by eliciting a report that the patient felt the stimulus in response to the current flow through the stimulator needle.
The current supplied by the nerve stimulator was reduced as the nerve stimulator needle was further advanced, until stimulation of the target nerve was achieved using a reduced current level associated with a prescribed distance between the needle tip and the target nerve.
Thereafter, a portion of the anesthetic dose was administered through the needle to terminate the response to the nerve stimulation current. If the response was terminated by the initial administration, the needle was deemed to be properly positioned in proximity to the target nerve and the remaining dose of anesthetic was administered and the needle was withdrawn upon completion of the surgical procedure.
Placement of catheters for continuous infusion of local anesthetics or other drugs during surgical procedures and primarily postoperatively has been achieved by use of an intra-catheter which was placed or threaded through the internal lumen of a larger needle or stiff cannula, or by use of an extra-catheter which was placed or threaded over an internal needle or smaller stiff cannula. Each technique has been associated with certain disadvantages and limitations that have resulted in less than optimal results for achieving successful continuous plexus or nerve block in clinical practice. These disadvantages have severely limited the use of continuous anesthesia or analgesia, resulting in under-utilization of continuous techniques in favor of more predictably successful, less invasive and usually less traumatic and therefore safer nerve or plexus blockade utilizing only a nerve stimulation needle for anesthesia or analgesia administration as previously described.
Problems associated with the use of an intra-catheter included the fact that a very large (and therefore more traumatic) introducing needle (e.g. 17 or 18 gauge) was necessary to allow passage of a smaller (usually 19 or 20 gauge) flexible catheter. This caused increase pain and discomfort during the placement. After needle placement, the catheter was passed through the bore of the introducing needle. This technically difficult step could cause movement of the needle tip. Additionally, there was little control of the final position of the distal end of the catheter because the flexibility of the catheter did not allow the practitioner to accurately determine the position of the distal end of the catheter after it passed beyond the needle tip.
Stimulating catheters have been developed with a flexible metal stylet inside the catheter which allowed for the ability to electrically stimulate the nerve or nerves, but these too, were difficult to control in terms of the final positioning of the catheter tip once it passed beyond the needle tip.
Another problem with intra-catheter systems has been persistent leaking of the injected medication at the skin entry point of the removed introducing needle. This occurred because the catheter diameter was smaller than the needle diameter and the diameter of the opening left by the introducing needle. Leakage was especially pronounced after placement of continuous catheters for superficial nerves or nerve plexus.
Major problems associated with the use of an extra-catheter system included the fact that extra-catheters have had to be made of larger gauges than desirable and have been stiffer than desirable to allow adequate stability for advancement over the smaller internal needle. The employment of stiff catheters near nerves for continuous infusion of anesthetics or analgesic medications was undesirable. The stiff catheters could result in nerve trauma.
Smaller, softer and more flexible catheters were preferable for procedures involving continuous infusion. A catheter with the desired flexibility and small diameter was difficult to pass or thread over the needle due to undesired buckling or bending, however. The length of the extra-catheter was therefore limited because longer extra-catheter systems of very small diameter were too flexible and therefore unstable and difficult to pass.
The longer a thin catheter or thin needle was, the more unstable it was. This was because each additional unit of length compounded its flexibility. Such catheters would bend when advanced through the skin and deeper tissues, making targeted accurate placement difficult. Additionally, extra-catheters were required to freely slide off of the internal needle, cannula, or stylet and therefore often had undesired movement in relation to the internal needle during use, especially upon advancement and withdrawal. If the extra-catheter was more tightly fitted to the internal needle, withdrawal of the stylet or needle often put undue traction on the catheter, resulting in undesired movement of the catheter tip from the optimal position that was already achieved.


A numerically-controlled phase-lock loop with input clock dependent ratio adjustment provides for narrower-bandwidth loops that lock to a wide range of frequencies and/or operation with an absent or degraded input timing reference. A timing reference characteristic detector determines an input frequency range of the input timing reference signal, the data type of the timing reference, and/or whether a timing reference signal of sufficient quality is present. A numerically controlled oscillator is controlled by a numeric ratio that is adjusted to provide the desired clock frequency output in conformity with the detected frequency range and/or data type. If the timing reference signal is absent or degraded, then the numeric ratio can be set to a fixed value or a local timing reference can be applied in order to generate the desired clock output frequency.

1. Field of the Invention
The present invention relates generally to phase-lock loop (PLL) clock generation circuits, and more specifically, to a numerically-controlled PLL for providing a clock signal synchronized to an input timing reference signal.
2. Background of the Invention
Digital audio systems are prevalent in the areas of home entertainment, professional production of multimedia and computer reproduction and generation of multimedia sources. Increasingly, digital audio data is transported from sub-system to sub-system and device to device in both consumer and professional installations, and the data is generally provided with, or has embedded, a timing reference that has too much jitter to act as a stable sample clock reference. Furthermore, the timing information may be provided at a frequency that is lower than the clock rate needed to operate a digital audio sink, such as a digital-to-analog converter (DAC) that receives the incoming digital audio data stream.
Therefore, clock generation circuits that provide stable clock references synchronized to a digital audio stream's timing information are frequently required. The clock generating circuits must generally provide a low-jitter clock from a timing reference that may have a large amount of jitter present and/or from an additional interface clock that also may have a large amount of jitter. Further, such circuits in A/V applications must handle a wide range of potential input frequencies. The clock generation is typically provided by a phase-lock loop (PLL) and the loop bandwidth of the PLL is dictated in part by the frequency range over which the PLL must acquire (capture) and lock in a stable manner. However, wider-bandwidth PLLs have higher noise figures. Further, an input signal is not always available, or may be of degraded or varying quality such that operation of the PLL in synchronization with a clock input signal is not practical or possible.
Therefore, it would be desirable to provide a PLL synchronization circuit and method that provides for narrower bandwidth operation, while able to lock to a wide range of input signal frequencies. It would further be desirable to provide such a PLL that can operate without an input clock signal of sufficient quality for synchronized PLL operation.

Numerically-controlled phase-lock loop with input timing reference-dependent ratio adjustment


A polarizing plate and an optical display comprising the same are disclosed. The polarizing plate includes: a polarizer and a first protective layer stacked on one surface of the polarizer via a bonding layer, wherein the bonding layer is formed of a bonding layer composition including an epoxy compound and a photocationic initiator, and the polarizing plate has a chrominance variation ΔE of 5.2 or less, as calculated by Equation 1.

A polarizing plate may include a polarizer and a protective layer stacked on at least one surface of the polarizer. In an optical display, the polarizing plate can be inevitably exposed to high temperature and/or high temperature/humidity conditions for a long period of time. Polarization of the polarizing plate is mainly achieved by the polarizer in the polarizing plate. The polarizer is fabricated by uniaxially stretching an iodine-dyed polyvinyl alcohol film. However, when the polarizing plate is left at high temperature for a long period of time, iodine can be sublimated from the polarizing plate, thereby making it difficult for the polarizing plate to exhibit polarization characteristics thereof.
In order to improve thermal resistance of the polarizing plate, zinc may be added to the polarizer. In this case, however, the polarizing plate can suffer from deterioration in the degree of polarization and light transmittance at high temperature due to migration of zinc atoms to the surface of the polarizer. Alternatively, a crosslinking agent may be added to the polyvinyl alcohol film constituting the polarizer to allow crosslinking of hydroxyl groups in the polyvinyl alcohol film. In this case, however, the stretched polyvinyl alcohol film can suffer from axis distortion, thereby causing deterioration in optical characteristics.
The background technique of the present invention is disclosed in Korean Patent Laid-open Publication No. 2016-0038143 and the like.

Polarizing plate and optical display device comprising same


An apparatus and method for automatically weighing portions of semi-solid matter using a weigh station having a rotating receptacle which receives the portion so that an accurate weight indication of the portion can be taken, and propels the portion from the weigh station to a further conveyor or processing system, a drive motor which powers the weigh station through a disengageable motor drive connection, and a weight signal processor which converts and stores the weight indications as weight data and transmits appropriate control signals to the drive motor, whereby variations in the weight of each portion are measured and evaluated to control the further processing of each portion, according to whether the portion weight is within predetermined parameters.

Commercial dough production often involves production of large quantities of individual dough portions Weight monitoring of dough portions has been carried out by checkweighing systems, such as weigh belts and weigh belt feeder systems. These apparatus, however are only capable of determining a projection of the actual static weight by collecting samples of output from a weight sensor as individual dough portions, as well as the section of the conveyor belt supporting the portion, pass over the sensor. Also, as the weight samples are collected, the data accuracy can be degraded by the effects of air currents, vibration from surrounding equipment, vibrations or harmonics generated by the dough portion's movement on the conveyor and other physical forces on the sensor.
Also, since it is necessary to use a weighing device with sufficient capacity to support the weight of the empty conveyor along with the weight of the dough portion to be weighed, larger capacity weight sensors must be used, which are much less sensitive than smaller weighing sensors of the same variety.
Additionally, due to the physical properties of extruded dough portions, they tend to adhere to any surface they contact. To limit the amount of adhesion, it is common for flour to be sifted onto the devices transporting dough portions. In prolonged operation, flour may randomly accumulate in various locations along the transport mechanism, including in the area where weight measurements are taken, thus introducing errors in the weight indications.
Further, due to the semi-solid nature of raw dough, transporting dough portions by a belt conveyor requires that the plane of the initial conveyor belt be at a higher elevation than subsequent downstream conveyor belts, to eliminate the possibility of dough portion being forced downward through the transition between consecutive sets of conveyor rollers. Also, in a system employing an in-motion belt weighing mechanism, the abrupt transition of the dough portion from an upstream conveyor to the weighing conveyor can impart an impact or torsion force to the weight sensor, resulting in inaccuracies in the measured weight.
Additionally, there are physical constraints with in-motion weighing systems, including that the weighing conveyor must be of substantial length, generally at least thirty inches, which may create problems in integrating the weighing system with existing equipment.
Another commonly used means of weighing divided dough portions involves the use of a static weigh scale, whereby an operator may randomly remove and weigh dough portions and perform a statistical calculation to determine if portion weights are acceptable. This method also has several disadvantages, including that substantial variations in individual portions may remain undetected and that removal of sample portions from the processing sequence may affect production efficiency.

Method and apparatus for weighing divided portions


The data entered into a form on a web-based secondary page can be combined with data entered into another form on a web-based main page, so that the data for both pages can be submitted to a server at the same time from a single form. The data from the form on the secondary page can also be copied into a hidden form on the main page, so that the most recently-entered data can be recalled from the hidden form if the secondary page is recalled.

1. Field of the Invention
The invention pertains generally to computer systems. In particular, it pertains to network-based forms on computer systems.
2. Description of the Related Art
Computer users are frequently asked to fill in information on a web page that has been provided over the Internet from a server, and then submit the completed information back over the Internet to the server. In normal operation, when a web page submits its data to a web server in this manner for processing, the data must all be present on one 'form' on the web page. The page may have multiple forms, but only one can be submitted to the server at a time for processing. This requires server-based applications to 'maintain state', or remember what has been submitted, between submissions, which can be very complex. To avoid the necessity of maintaining state, the creator of a web application may place all data fields that are related to a particular task within the same form so that when the form is submitted, the server has access to all of the modified data at the same time.
Unfortunately, there are often fields that do not require modification, or that should only be modified by advanced users. To steer end-users around these fields, web page designers often place all fields on the form but specify which fields are required and which are optional. This limitation forces the creation of pages that are visually complex and often confusing. The alternative is to place the seldom-accessed fields on a second page that is accessed from the first page only when needed. But because standard web browser and server architectures do not allow multiple forms to be submitted at the same time, the form associated with this second page must be submitted to the server separately from the form associated with the first page, which again requires the server to maintain state by keeping track of multiple forms being submitted by a single user at different times.

Dialog boxes to simplify web-based forms