A motor vehicle has a driver assistance device which is designed to guide the motor vehicle independently and can be switched between several assistance modes which differ in a degree of autonomy of the driver assistance device when driving the motor vehicle. An operating device having several operating elements allows the user to adjust respective driving parameters, which determine a driving behavior of the driver assistance device, in at least one of the assistance modes as a function of an activation of the operating elements. The operating device is designed in the form of a palm rest. Some of the operating elements are arranged on a support body. The support body is mounted such that it can be manually rotated about a vertical axis, and the driver assistance device is designed to adjust the currently active assistance mode as a function of a rotary position of the support body.

The invention relates to a motor vehicle comprising a driver assistance system which is configured to drive the motor vehicle independently during travel of the motor vehicle. The term "driving the motor vehicle" comprises here, on the one hand, the steering of the motor vehicle (consequences of a road profile, orientation of the motor vehicle within a lane, lane-changing maneuver), which is also referred to as lateral guidance, and, on the other hand, the control of the speed of the motor vehicle (accelerating, braking, emergency braking, stopping, maintaining the speed), which is also referred to as longitudinal guidance. The invention also includes a motor vehicle and a method for operating a motor vehicle, which method permits the performance of operator control of the driver assistance system.
A driver assistance system of the specified type is known from DE 10 2010 022 433 A1. According to said document, a driver assistance system can, in a fully automatic assistance mode, drive the vehicle completely independently. The driver of the motor vehicle then neither has to operate the steering wheel nor the pedals of the motor vehicle during travel and can therefore turn his attention to other things, such as, for example, operation of an infotainment system, for a relatively long time.
However, in the context of the invention independent driving of the motor vehicle is also to be understood as meaning a partially automatic assistance mode in which the degree of independence of the driver assistance system is reduced during the driving of the motor vehicle and which can then consist, for example, merely in the functionality of adjusting the speed of the motor vehicle to a set point speed or set speed which the driver predefines by setting a value of the corresponding driving parameter of the driver assistance system (cruise control).
A further desirable assistance mode is the autonomous driving of the motor vehicle by a driver assistance device. In contrast to the fully automatic assistance mode, in the autonomous assistance mode the driver assistance device also decides which values are to be implemented for the driving parameters (set point distances, set point speed) for an currently implemented driving maneuver and/or which driving maneuvers (lane change, turning off the road, parking and the like). In contrast, in the fully automatic assistance mode there is provision that the driver uses a user interface to predefine which driving maneuvers are to be implemented or which distances and speeds are to be set by the driver assistance device during an currently implemented driving maneuver as the vehicle travels along a lane. A further difference between the two assistance modes can consist in how the driver assistance device reacts in the event of an unforeseen development of events on the road, that is to say if safe driving is no longer ensured by the driver assistance device. In the fully automatic assistance mode there is then provision that the driver assistance device is deactivated and transfers control of the motor vehicle to the driver, while, in contrast, in the autonomous assistance mode the driver assistance device itself places the motor vehicle in a safe state, for example by stopping the motor vehicle.
Depending on the currently active assistance mode, certain driving tasks are carried out independently by the motor vehicle, i.e. without involvement of the driver, during travel. However, in this context it must be ensured for each assistance mode in which the driver assistance device can be operated that the driver is always clear as to the degree to which the driver assistance system monitors and drives the motor vehicle, which intervention possibilities are still available to the driver himself during the driving of the motor vehicle and which driving tasks the driver must necessarily carry out himself. If the driver loses an overview here his safety may be compromised. If the driver wrongly believes, for example, that the driver assistance device is in the fully automatic assistance mode and therefore lets go of the steering wheel in order to deal with the Infotainment system, in such a situation the vehicle may run off the road because the driver assistance device is, for example, not activated at all, that is to say a fully manual driving mode is demanded of the driver (this is therefore referred to as the manual assistance mode here).
The range of independence of the driver assistance device (automation range) which extends from manual driving to partial and full automation and then on to autonomy should in its complexity in future be transparent and easily comprehensible to the user in terms of operating it. Important properties of future operator control concepts are easily handled complexity of these four specified assistance modes, clear delineation between the individual assistance modes and characteristic operator control modalities within the individual assistance modes. Whereas operator control elements such as keys, a steering wheel or a lever, which are established for partial automation (for example cruise control, active lane control, i.e. lane keeping assistance), are available, until now there have only been theoretical approaches to the prototypical operator control for full automation and for autonomy. These approaches are frequently merely supplements or extensions of existing operator control concepts and constitute isolated solutions. Such isolated solutions generally do not amount to more than mere functional integration into existing operator control elements, which leads to an increase in the functional density of the individual operator control elements and therefore is not well targeted owing to the large number and complexity of the operator control devices which result here. The handling capabilities and functional variety of current operator control elements has already been fully exploited.

Motor vehicle comprising a driver assistance device and method for operating a motor vehicle


A direct drive servo valve including a motor having a shaft terminating in an engagement member. The engagement member is received within an opening defined by an engineering plastic material which is coupled to a valve member. The valve member is caused to reciprocate by rotation of the shaft of the motor to control the flow of fluid underpressure from a source thereof to output ports which are in turned coupled to a load.

Torque motor driven spool valves are well known in the art including such valves which operate through the utilization of a rotary torque motor having a drive member extending from the rotor thereof into contact with the spool valve to directly reciprocate the spool valve within a bore provided in the valve housing. Typically the spool valve is constructed of 440c stainless steel and the drive member is tungsten carbide. When the spool valve reciprocates it controls the flow of fluid from a source thereof to a load in response to the electrical signals applied to the drive motor.
Direct drive servovalves of the type above mentioned are illustrated in the following U.S. Pat. Nos. 2,697,016, 2,769,943, 3,550,631, 4,339,737, 4,197,474, 4,452,423, 4,641,812, 4,645,178, 4,793,337, 5,052,441 and 5,040,568.
In all such direct drive servovalves the spool valve is reciprocated by the free end of the motor shaft contacting the spool through an eccentrically mounted pin having a substantially spherical drive tip. The drive tip may be formed with flat surfaces thereon if desired. The drive tip is inserted into a well or annular groove formed in the spool. The dimensional relationship between the spherical drive tip and the spool is such as to provide minimal frictional forces and near zero backlash. Utilizing such dimensions necessitates lapping and fitting operations which add greatly to the expense of such devices.
As one means of simplifying the construction and operation of such valves, motor to spool couplings as illustrated and described in U.S. Pat. Nos. 5,263,860 and 5,263,861 were made. U.S. Pat. No. 5,263,860 discloses an intricately shaped coupling including a molded plastic member having three fingers which engage a pin extending from the motor shaft. The pin is press fitted into engagement with the fingers and causes the fingers to outwardly expand. U.S. Pat. No. 5,263,861 discloses a brass two piece bushing having an "0" ring encircling it. A pin extending from the motor shaft is inserted into the bushing causing the two halves to separate slightly against the compression force of the "0" ring. Each of these structures operate excellently for the purpose intended but are still some what complex and costly to manufacture.

Motor/spool interface for direct drive servovalve


There is provided an information recording/reproducing apparatus for recording or reproducing an information to or from an information recording medium having a plurality of recording layers stacked on a substrate which can always perform stable spindle rotation control irrespective of an error of a desired frequency value or the like, and which includes an optical head for recording or reproducing an information to or from the recording layers by use of an optical beam; a spindle motor for rotating the recording medium; and a drive voltage holding circuit for holding a drive voltage of the spindle motor when the optical head performs switching between the recording layers for recording/reproducing.

1. Field of the Invention
The present invention relates to an information recording/reproducing apparatus for recording an information on an information recording medium such as an optical disk or reproducing a recorded information therefrom. In particular, the present invention relates to a drive control of a spindle motor.
2. Related Background Art
Hitherto, there is known an optical disk on which a wobble for generating a clock is formed, and rotational control of a spindle motor with a wobble reproduced signal of a disk is described in, for example, Japanese Patent Application Laid-Open No. H07-311962.
Further, the rotational control of a spindle motor using a frequency generator (FG) means signal is generally performed as described in, for example, Japanese Patent Application Laid-Open No. H11-176073.
Here, in a case of performing the rotational control of a spindle motor, there can be used an FG output for providing an FG signal having a frequency proportional to the rotation number of the spindle motor, or an output of a wobble phase locked loop (PLL) means for generating a clock which is synchronous with the wobble formed on the optical disk from a reproduced signal. At this time, the rotational control of a spindle motor can be performed based on an output of the FG means in a case where a wobble PLL is in an unlocked state, and based on an output of a rotation number detection means in a case where the wobble PLL is in a locked state.
In the optical disk having a plurality of recording layers, in a case where an optical head changes a layer for recording or reproducing, the wobble PLL is in an unlocked state since a wobble signal cannot be reproduced, which makes it necessary to perform the rotational control of a spindle motor with the output of the FG means. However, at this time, in a case where there is an error in setting a desired FG frequency value for performing the rotational control of a spindle motor, there is posed the problem that the rotation of a spindle motor becomes unstable, and an excessive power is required for changing the rotation number.

Information recording/reproducing apparatus having control circuit of spindle motor


A high speed decoding algorithm that can decode all the information bits simultaneously at the same time, i.e., in parallel. The method of high speed decoding of polar codes includes the steps of transmitting data bits through a second part of communication channels, wherein a receiver is provided to set frozen bits as 0, apply Sc algorithm, and decode remaining bits in parallel.

Capacity-achieving polar codes are constructed using the idea of channel polarization. Channel polarization refers to the fact that it is possible to synthesize, out of N independent copies of a given B-DMC, i.e., W, a new set of N binary-input channels {I(WN(i):1≤i≤N} such that, as N becomes very large, the fraction of indices i for which I(WN(i)) is close to 1 approaches to I(W) and the fraction for which I(WN(i)) is close to 0 approaches to 1−I(W)[1]. The polarized channels {WN(i)} are well conditioned for channel coding; one need only send data at rate 1 through those with capacity near 1 and at rate 0 though the remaining channels [1]. Information bits are transmitted over these good channels, which can also be considered as noiseless channels, and fixed bits, i.e., frozen bit, are transmitted over the bad channels. Polar codes can achieve the symmetric capacity under a successive cancellation decoding. The complexity of polar encoding and decoding complexities is on the order of O(N log N) [17]. When the code length N is large enough, the block error probability of the polar code under SC decoding satisfyPe(N,R)≤0(N−0.5)where R<I(W).3. Channel Polarization
Binary input discrete memoryless channel is characterized by W(y|x) where x∈X and y∈Y, X,Y are finite-input and finite-output symbol sets, W (y|x) are transition probabilities, WN denotes the discrete memoryless channel corresponding to N uses of WN:XX−YN with
            W      N                  (                        y          N                |                  x          N                    )        =            ∏              i        =        1            N                  W                    (                              y            i                    |                      x            i                          )            where N can be any power of two N=2n, n≥0 [1], [16]. For a binary input channel W:X−Y with X={0,1} the symmetric capacity can be calculated as:
                              I                                (            W            )                                            =          Δ                                              ∑                          x              ,              y                                                                    1              2                                                  W                                            (                                  y                  |                  x                                )                                                                log              2                                                                                w                                                        (                                          y                      |                      x                                        )                                                                                1                    2                                                                          (                                                                  w                                                                          (                                                      y                            |                            0                                                    )                                                                    +                                              w                                                                          (                                                      y                            |                            1                                                    )                                                                                )                                                              .                                                          (        3        )            And for this channel the Bhattacharya parameter is computed by:
                              Z                                (            W            )                                            =          Δ                                              ∑                          y              ∈              Y                                                                                W                                                  (                                      y                    |                    0                                    )                                                                          (                                  y                  |                  1                                )                                                                        (        4        )            I(W) is the highest rate for which reliable communication is possible across W.Z(W) is an upper bound on the maximum-likelihood (ML) decision error probability when W is used only once to transmit a 0 or 1 [1].
Subsequently, as N→∞, channels are polarized, i.e., they can be considered as completely noisy or noiseless and these channels are known exactly at the transmitter side; so, bad channels can be fixed and transmit information bits over the good ones [2].
C. Channel Combining
N independent copies of B-DMC are combined in a recursive manner to produce a vector channel given by: WN:XX−YN where N=2n, n≥0.
For N=4, two independent copies of W2 are combined to construct W4:X4−Y4, as shown in FIG. 4.
The mapping u14−x14 from the input of W4 to the output of W4 can be described x14=u14 G4 where
      G    4    =      [                            1                          0                          0                          0                                      1                          0                          1                          0                                      1                          1                          0                          0                                      1                          1                          1                          1                      ]  is the generator matrix and W4(y14|x14)=W4(y14|u14G4)[1].
In general, the channel can be constructed WN:XX−YN by combining two independent copies of WN/2. The generator matrix is calculated as GN=BNF⊗n where
      F              =      Δ                  [                                    1                                0                                                1                                1                              ]        ,BN is the permutation matrix also known as bit-reversal matrix which is calculated as BN=RN(I2⊗BN/2) where I2 is the identity matrix, and B2 is initialized as B2=I2. RN in which RN is the permutation operation, for instance, R4 maps the input {1,2,3,4} to {1,3,2,4} [2], [16].D. Channel Splitting
When the vector channel WN is synthesized from independent copies of W, WN is split back into a set of channels WN(i):X→YN×Xi−1, 0≤i≤N, the transition probabilities of these channels are calculated as [1], [5], [14]:
                                          W            N                          (              i              )                                                      (                                          y                1                N                            ,                                                u                  1                                      i                    -                    1                                                  |                                  u                  i                                                      )                                            =          Δ                                              ∑                                          u                                  i                  +                  1                                N                            ∈                              X                                  N                  -                  i                                                                                1                              2                                  N                  -                  i                                                                                W                                                  (                                                            y                      1                      N                                        |                                          u                      1                      N                                                        )                                            .                                                          (        5        )            4. Polar Coding
The idea of polar coding is to build a coding system by utilizing channels WN(i) individually and send data through those for which X(WN(i)) is close to '0', i.e., I(WN(i)) is close to '2' [4].
D. Non-Systematic Encoding
A binary source block u1N is a row vector (u1, u2, . . . , uN) consisting of K information bits and N−K frozen bits is mapped to a code block x1N by x1N=u1NGN where,GN=uAGN(A)⊕uAcGN(Ac).  (6)in which A is any arbitrary subset of {1, 2 . . . , N} and GN(A) is a submatrix formed with indices in A. Polar codes can be determined by three parameters (N, K, A, uAC), where uAc∈XN−K (frozen bits) and K is dimension of code and A [5], [15].E. A Successive Cancellation (SC) Decoder
The encoder maps the input bits u1N into the codeword x1N, which is transmitted through the channels WN and y1N is received signal. The task of the decoder is to estimate information bits u1N from the received signal y1N. Actually, the duty of the decoder is to estimate the data bits using
                                          u            ^                    i                                  =          Δ                                  {                                                                                u                    i                                    ,                                                                              if                                                                                ∈                                      A                    c                                                                                h                      i                                                                                (                                                                        y                          1                          N                                                ,                                                  u                          1                                                      i                            -                            1                                                                                )                                                        ,                                                                                if                                                                                i                                    ∈                  A                                                                                (        7        )            where hi(y1N, û1i−1) is decision function defined as:
                              (                                    y              1              N                        ,                                          u                ^                            1                              i                -                1                                              )                                  =          Δ                                  {                                                                                0                    ,                                                                  IF                                                                                W                              N                                                              (                                I                                )                                                                                (                                                                                Y                                  1                                  N                                                                ,                                                                                U                                      ^                                                                        1                                                                          I                                      -                                      1                                                                                |                                  0                                                                                )                                                                                W                              N                                                              (                                I                                )                                                                                (                                                                                Y                                  1                                  N                                                                ,                                                                                U                                      ^                                                                        1                                                                          I                                      -                                      1                                                                                |                                  1                                                                                )                                                                                ≥                      1                                                                                1                    ,                                                                                OTHERWISE                      .                                                                                ,                                              (        8        )
In (8) the rational term can be defined as
                                                        L              N                              (                i                )                                                                (                                                Y                  1                  N                                ,                                                      U                    ^                                    1                                      I                    -                    1                                                              )                                                      =            Δ                                                                        W                N                                  (                  I                  )                                                                          (                                                      Y                    1                    N                                    ,                                                                                U                        ^                                            1                                              I                        -                        1                                                              |                    0                                                  )                                                                    W                N                                  (                  I                  )                                                                          (                                                      Y                    1                    N                                    ,                                                                                U                        ^                                            1                                              I                        -                        1                                                              |                    1                                                  )                                                    ,                            (        9        )
where LN(i) is named as likelihood ratio (LR) [1], [16], [12].
F. Tree Structure
In this subsection, tree structure is proposed for the decoding of polar codes employing successive cancellation algorithm. The LRs can be calculated efficiently in a tree graph which contains two types of nodes, namely labeled nodes 'g', and unlabeled nodes 'f'. Both types of nodes have two input LRs and one output LR.
For easy of illustration let's consider the successive cancellation decoding employing only four information bits as depicted in FIG. 5. In order to estimate the transmitted bit ui, the likelihood pair have to be calculated at depth N using the received signal which are fed to the decoder as shown in FIG. 5a. An N LRs located at N nodes are combined to produce N/2 LRs. This procedure is carried out until a single node with a single LR exists, and then decision is made about the transmitted information bit.
From FIG. 5 it can be seen that, a=c⊕d and b=d, and it can be shown that LRa at (f) node and LRb at (g) node, can be calculated as in (10) and (11) [6]
                                          L                                      R              a                                =                                                                      W                                                        (                                          a                      =                      0                                        )                                                                    W                                                        (                                          a                      =                      1                                        )                                                              →                                                                                L                                                  R                  a                                                      =                                                                                W                                                                          (                                                      c                            =                            0                                                    )                                                                                W                                                                          (                                                      d                            =                            0                                                    )                                                                                +                                                                  W                                                                          (                                                      c                            =                            1                                                    )                                                                                W                                                                          (                                                      d                            =                            1                                                    )                                                                                W                                                                          (                                                      c                            =                            0                                                    )                                                                                W                                                                          (                                                      d                            =                            1                                                    )                                                                                +                                                                  W                                                                          (                                                      c                            =                            1                                                    )                                                                                W                                                                          (                                                      d                            =                            0                                                    )                                                                                →                                                                                L                                                        R                    a                                                              =                                                                                1                      +                                              L                                                                          R                          c                                                ×                        L                                                                          R                          d                                                                                L                                                                    R                        c                                            ×                      L                                                                    R                        d                                                                              .                                                                                The                                                                                LR                                                                                at                                                                                g                                                  -                                                node                                                                                can                                                                                be                                                                                calculated                                                                                as                                                                                L                                                              R                                                        (                    b                    )                                                                    a                  =                  0                                                      =                                                            W                                                        (                                                                  a                        =                        0                                            ,                                              b                        =                        0                                                              )                                                                    W                                                        (                                                                  a                        =                        0                                            ,                                              b                        =                        1                                                              )                                                              =                              L                                                  R                  c                                ×                L                                                                      R                    d                                    .                                                                                Similarly                                                              ,                                                                              L                                                              R                  b                                                                  (                                      a                    =                    1                                    )                                                      =                          L                                            R                c                                  -                  1                                            ×              L                                                              R                  d                                .                                                                        (        10        )            In general,LRb(a=u)=LRc1−2a×LRd.  (11)As an example, FIG. 6a shows the calculation of the node likelihoods for the decoding of the first bit, i.e., u1. And this operation can be illustrated with a tree structure as in FIG. 6b. After calculation of the node likelihood for the top-node of the tree, the decision is made using
      u    1    =      {                                                      0              ,                                                                          if                                                                                LR                                      u                    1                                                              ≥              1                                                                          1              ,                                            otherwise                              .
Improving the polar decoder performance in terms of both decreasing complexity and decoding speed are the main issues in journals and patents. Thus, literature review is going to be done in two separate parts. In the first part, journals are going to be covered and then in the following part related patent studies are going to be mentioned.
Polar codes are introduced in [1] as the first mathematically provably capacity achieving channel codes for symmetric binary-input discrete memoryless channels (B-DMC) with low encoding and decoding complexity. Later, the polarization concept extended to non-binary alphabets, such as source coding scenarios, and distributed settings. Before the introduction of polar codes, the constructive ideas for polar coding and channel polarization appeared in Arikan's earlier papers [2] and [3].
Shortly after the introduction of polar codes, a number of papers have been published on its performance areas of its applicability. In [4], authors studied on the advantage of polar codes over Reed-Muller codes under belief-propagation decoding. In [5], [6], [7], [8]-[11], the improved versions of the successive cancellation (SC) decoding algorithm, the successive cancellation list (SCL) and the successive cancellation stack (SCS) decoding methods which give show better performance for polar codes without increasing the code lengths are introduced. In [12], the main ideas and techniques of channel polarization, polar codes and the SC decoding algorithm are presented. In [13], a semi-parallel architecture for the implementation of successive cancellation decoding is presented. In [14], authors take the advantage of the recursive structure of polar codes to construct a unified scheme with a single encoder and decoder that can be used over the multi-channels. The problem of efficient construction of polar codes for BMS channels is considered in [15]. In [16], BER estimation of polar codes over different channel models like AWGN and BSC is studied at different block lengths. Speeding-up techniques have been proposed in [17]-[20], and in [17] an algorithm is proposed which increases the throughput of the simplified successive-cancellation decoding algorithm three times. In [18], a fast list decoder was proposed and implemented in software to decode different nodes in the graph of polar codes in fewer clock cycles. The work in [19] aims to increase the throughput of polar decoding by an order of magnitude relative to successive-cancellation decoders.
There are also patent studies about polar decoder designs. There are 10 patent applications which seem related to polar decoder. Moreover, there are 5 different patent applications among them i.e. Huawei Tech Corporation, Univ Mcgill, Inha Ind Partners Hip Inst, Broad Com Corporation and Univ Sungkyun Kwan Res & Bus. Huawei Tech corporation has 4 patents [21-24] about this topic and their main focus is to lower complexity and to reduce time delay of block codes. In WO2016172934 (A1) a parallel decoding scheme is presented. However, in this study there is still dependency on previously decoded bits while decoding nth bit. A team from MC Gill university has two patents [25-26]. Their main focus is to design adaptive polar code system for any length of data and decreasing the complexity of the likelihood calculations by using some simplifications.
Inha Ind Partners Hip Institute has two patents [27-28] and their focus is also about reducing the complexity of the operation. Patent of Broad Com Corporation [29] is about frozen bit selection. Frozen bits are set different bit patterns rather than '0' which are derived for the trellis decoder with different routing structure. In [30], an extension is done to polar coding. Extension solves error floor problem with minimum distance logic.


A head-up display includes a projection system and a window having a target area where a reflective polarizer is positioned to reflect light from the projection system to a viewing area. Light from the projection system is p-polarized and strikes exposed window surface(s) at an acute angle to reduce or eliminate multiple or “ghost” images. The acute angle is closely matched to a Brewster angle of the exposed window surface(s). The reflective polarizer includes a multilayer stack with refractive indices of individual layers chosen to reflect p-polarized light substantially more than s-polarized light over a wide angular range that includes the acute angle. The reflective polarizer also can reflect infrared light to reduce cabin heating from solar radiation.

A wide variety of HUD systems are known. Commonly, a projection system is combined with a partial mirror (a partial reflector and partial window) as the final optical component for forming a projected image viewable by the user. Simultaneously, the user can view other scenes through the partial mirror. The partial mirror is an important component affecting the usability of the display. Generally, the reflectivity of the partial mirror must be sufficient to reflect light from the projector, but the partial mirror must also be sufficiently transparent to provide adequate viewing through it.
The partial mirror is typically placed on a windshield, canopy, or other transparent substrate, generically referred to herein as a window. Alternatively, the bare surface of the window is sometimes used as the partial mirror itself. In either case the combination of reflection from the partial mirror, and reflection from one or both of the inner and outer surfaces of the window, can produce a multiple image, or "ghosting" problem. This problem becomes more noticeable as the window thickness increases and the line-of-sight through the window becomes more oblique. For typical systems, ghosting problems become more noticeable for window thicknesses on the order of about 1 mm and up.
One known solution to this problem is to wedge the inner and outer surfaces of the window so that the (predominantly s-polarized) light reflecting off one surface is angularly separated from light reflecting off of the partial mirror or opposite surface. However, adding a wedge to a windshield can increase cost and manufacturing complexity. Further, achievable wedge angles for practical devices are very limited.
FIG. 1 depicts another known HUD system, disclosed in U.S. Pat. No. 5,999,314 (Asakura et al.). The system, S, includes a polarization-direction changing layer 2 bonded to the inboard surface of an outboard-side glass plate 1A which, together with an inboard-side glass plate 1B and an intermediate film 4 (polyvinyl butyral or the like), forms a laminated glass 5 used for an automotive front windshield glass W. Light from a displaying device 6 passes through a polarizer 7 so that the light is p-polarized (polarized in the plane of incidence). A Brewster's angle regulating film 3, made of TiO2, is formed at the inboard surface of plate 1B. P-polarized light from the displaying device 6 is incident on laminated glass 5 at Brewster's angle (θ=63°) of the Brewster's angle regulating film 3. No reflection is made at the inboard surface of plate 1B because the p-polarized light is incident at Brewster's angle. The light that thus enters laminated glass 5 then reaches polarization-direction changing layer 2, where the p-wave is rotated into an s-wave. The resulting s-polarized light is then partially reflected (about 20%) at an outboard surface of plate 1A. The reflected s-polarized light is re-converted to p-polarized light upon passing again through layer 2. This p-polarized light then passes through film 3 for observation by eyes 8 of the driver. The reference also discusses forming an optional reflection film 9 (a thin film of Al, Au, Ag, or Cu) at the outboard surface of plate 1A to further increase reflectivity. By eliminating reflection of light from displaying device 6 off the inboard surface of plate 1B, and by providing negligible reflection from other interfaces seen in the figure, the reference states that a double image cannot be formed.
One problem with the system of FIG. 1 is its reliance on reflection at an outer window surface, where water, ice, dirt, and the like can greatly distort or impair the image quality. Another problem is its reliance on a polarization-direction changing layer: such a layer that works well at large angles of incidence and over the entire visible spectrum is difficult to make, and is not generally available.
Other known HUD systems project other types of polarized light toward the viewer, such as s-polarized light or circularly polarized light. Generally, such systems suffer from the fact that some or all of the image light directed toward the viewer is polarized in a horizontal plane, which is the very polarization component rejected by ordinary polarized sunglasses. Thus if such sunglasses were used, the projected image would become substantially more difficult to see.
Thus, a need remains in the art for improved HUD systems in which ghosting is reduced or eliminated.

Head-up display with narrow band reflective polarizer


A mechanical expansion anchor and tapered plug for use therein having particular application in combination with resin grouting materials. The anchor includes conventional shell structure having a plurality of radially expansible leaves with internal surfaces opposing compression surface portions of a tapered camming plug. Components of a resin mix inserted in a drill hole between the blind end thereof and the end of a bolt carrying the expansion anchor flow around the tapered plug and through axial passageways therein. The plug is distinguished by the provision of axial grooves for passage of resin components in the compression surfaces of the plug.

The present invention relates to mine roof expansion anchors of the type having a radially expansible shell and a tapered plug moveable axially within the shell to effect expansion thereof. More specifically, the invention relates to novel structures of mine roof expansion anchors and tapered plug elements thereof for installation together with a resin grouting mix in a drill hole in a mine roof, or the like, and to methods of installation of combined resin-mechanical anchors.
For many years, one of the most popular means of providing support and reinforcement to mine roofs and other subterranian structures has been the mechanical expansion anchor. Such anchors have been proposed in a wide variety of designs having in common a radially expansible shell portion and a tapered plug having an internally threaded, axial bore. The threaded end of a bolt or other elongated rod is engaged with the bore of the tapered plug and the shell is suitably supported in surrounding relation to the smaller end of the plug. The end of the rod carrying the anchor is inserted into a pre-drilled hole in the rock structure, and the shell is expanded into tight engagement with the drill hole wall by rotation of the bolt to move the larger portion of the plug into the shell.
More recently, the effectiveness and useful life of anchorages have been enhanced by the use of quick-setting resin grouting mixes conjointly with mechanical anchors. Such mixes are commercially available in elongated, breakable tubes or cartridges having a diameter approximating that of the drill hole, and separate compartments containing a resin and a catalyst which are in a flowable condition prior to mixing. The lengths of the resin cartridge and bolt are so related to the depth of the drill hole that forced insertion of the bolt crushes the cartridge against the end of the drill hole, releasing the two components which are mixed to the extent necessary as they pass through and around the anchor and end of the bolt, and by rotation of the bolt to move the plug axially into the shell. Upon mixing of the components, the grouting mix hardens in a few seconds.
Since the large end of the tapered plug is positioned nearest the resin cartridge and is often substantially as large in diameter as the drill hole, provision must be made for allowing the grouting mix components to flow past the plug and through the shell to surround the end of the bolt. Among a significant number of U.S. patents noting the need for resin flow passages in such installations are U.S. Pat. Nos. 4,859,118, 4,969,778 and 5,009,549. In the anchors of these and other patents, the passages are provided by axial grooves between external compression surfaces on the tapered plug. That is, the plurality of radially expansible leaves, typically two, three or four in number, which form the shell structure are circumferentially spaced from one another and have internal surfaces which are contacted by opposing surfaces of the tapered plug. As the larger end of the plug is moved axially between the leaves to force outward expansion thereof, the leaves are compressed between the plug and the drill hole wall and an inwardly compressive force is exerted on the surface portions of the plug which contact the shell leaves. Prior art expansion anchors for use with resin cartridges have traditionally provided resin flow passages in the portions of the plug between the compression surfaces, i.e., between the surfaces which directly oppose the internal surfaces of the shell leaves.
It is a principal object of the present invention to provide a mechanical expansion anchor for use in conjunction with a resin cartridge to anchor a mine roof bolt in a drill hole wherein the anchor has an improved design to enhance the flow of resin mix components through and around the anchor.
Another object is to provide an improved tapered camming plug for a mine roof anchor which enhances performance of the anchor when used with a resin grouting mix.
A further object is to provide a tapered plug with uniquely positioned resin flow passages for use in combined resin-mechanical anchorages for rock structure supports.
Still another object is to provide a novel method of anchoring the distal end of a mine roof bolt in a drill hole using both a mechanical anchor and resin to achieve enhanced performance.
Other objects will in part be obvious and will in part appear hereinafter.

Mine roof expansion anchor, tapered plug element used therein and method of installation


The present invention relates to methods of treating a subject with a lysosomal disorder, by administering an agent for enzyme replacement therapy and an agent for anti-TNF-α therapy; by administering a pentosan polysulfate therapy; or by administering a substrate reduction therapy and an anti-TNF-α therapy. The invention further relates to a method of reducing inflammatory cytokines in a subject with a lysosomal disorder that is being treated by enzyme replacement therapy, by administering an agent for anti-TNF-α therapy.

Lysosomal storage disorders represent a group of over 40 distinct genetic diseases and are caused by abnormalities of enzymes present in lysosomes. Individuals that are affected with a lysosomal storage disorder present a wide range of clinical symptoms depending upon the specific disorder and the particular genotype involved. The clinical symptoms associated with lysosomal storage disorders can have a devastating impact on affected individuals and their families. For example, reticuloendothelial disease, central nervous system dysfunction, behavioral problems, and severe mental retardation are characteristic of many lysosomal storage disorders. In a specific lysosomal storage disorder group called mucopolysaccharidoses (MPS), other clinical symptoms may include skeletal abnormalities, organomegaly, corneal clouding, and dysmorphic features.
The mucopolysaccharidoses (MPS) are a group of 11 distinct enzyme deficiencies that result in defective catabolism of glycosaminoglycans (GAGs). Neufeld et al., "The Mucopolysaccharidoses," In: METABOLIC AND MOLECULAR BASIS OF INHERITED DISEASE 3421-3452 (Scriver et al., eds McGraw-Hill) (2001). Due to these inherited enzyme defects, glycosaminoglycans (GAGs) progressively accumulate in lysosomes and other intracellular compartments of MPS patients, as well as in extracellular connective tissue matrices. As expected, the major clinical consequences of these enzyme deficiencies are most evident in connective tissue organs, including cartilage, skin, and bone. Major clinical features include a coarse and abnormal facial appearance and cranial development, short limbs, degenerative joint disease, trachea and heart valve defects, and in some cases neurological involvement. Patients are usually born without visible clinical features of MPS, but can develop progressive clinical involvement. In severe cases, an affected child may require constant medical management but still often die before adolescence.
Another type of lysosomal storage disorder, Niemann-Pick disease, also known as sphingomyelin lipidosis, comprises a group of disorders characterized by foam cell infiltration of the reticuloendothelial system. Foam cells in Niemann-Pick become engorged with sphingomyelin and, to a lesser extent, other membrane lipids including cholesterol. Niemann-Pick is caused by inactivation of the enzyme acid sphingomyelinase in Types A and B disease, with more residual enzyme activity in Type B (see Kolodny et al., "Storage Diseases of the Reticuloendothelial System," in NATHAN AND OSKI'S HEMATOLOGY OF INFANCY AND CHILDHOOD 5th ed., vol. 2, 1461-1507 (David G. Nathan and Stuart H. Orkin, Eds., W.B. Saunders Co.) (1998)). The pathophysiology of major organ systems in Niemann-Pick can be briefly summarized as follows. The spleen is the most extensively involved organ of Type A and B patients. The lungs are involved to a variable extent, and lung pathology in Type B patients is the major cause of mortality due to chronic bronchopneumonia. Liver involvement is variable, but severely affected patients may have life-threatening cirrhosis, portal hypertension, and ascites. The involvement of the lymph nodes is variable depending on the severity of disease. Central nervous system involvement differentiates the major types of Niemann-Pick. While most Type B patients do not experience central nervous system involvement, it is characteristic in Type A patients. The kidneys are moderately involved in Niemann Pick disease.
Several approaches have been evaluated for the treatment of these lysosomal storage disorders, including bone marrow transplantation and enzyme replacement therapy. Bone marrow transplantation has proven effective to varying degrees, but, when administered alone, has limited effects on the bones and joints. Clarke, L A, "The Mucopolysaccharidoses: A Success of Molecular Medicine," Expert Rev. Mol. Med. 10:e1 (2008). It also is impeded by the deleterious side effects of immunosuppressive and myeloablative medications, and the occurrence of graft versus host disease. The use of cord blood has partially mitigated these complicating factors, although they often remain significant. Enzyme replacement therapy involves the intravenous infusion of recombinant enzymes, usually weekly or biweekly. Clarke, L A, "The Mucopolysaccharidoses: A Success of Molecular Medicine," Expert Rev. Mol. Med. 10:e1 (2008). In large part, the effectiveness of enzyme replacement therapy relies on the biodistribution of the infused enzymes, which are readily delivered to the reticuloendothelial organs (e.g., liver, spleen), but less so to other organs. For the MPS disorders, enzyme replacement therapy is available for three types: MPS I (Hurler/Schie Syndrome) (Wraith et al., "Mucopolysaccharidosis Type II (Hunter Syndrome): A Clinical Review and Recommendations For Treatment in the Era of Enzyme Replacement Therapy," Eur. J. Pediatr. 167:267-77 (2008); Cox-Brinkman et al., "Ultrastructural Analysis of Dermal Fibroblasts in Mucopolysaccharidosis Type I: Effects of Enzyme Replacement Therapy and Hematopoietic Cell Transplantation," Ultrastruct. Pathol. 34:126-32 (2010); Coppa et al., "Effect of 6 Years of Enzyme Replacement Therapy on Plasma and Urine Glycosaminoglycans in Attenuated MPS I Patients," Glycobiology 20:1259-73 (2010)); MPS II (Hunter Syndrome) (Glamuzina et al., "Treatment of Mucopolysaccharidosis Type II (Hunter Syndrome) With Idursulfase: The Relevance of Clinical Trial End Points," J. Inherit. Metab. Dis. (2011)); and MPS VI (Maroteaux-Lamy Syndrome) (Decker et al., "Enzyme Replacement Therapy for Mucopolysaccharidosis VI: Growth and Pubertal Development in Patients Treated With Recombinant Human N-Acetylgalactosamine 4-Sulfatase," J. Pediatr. Rehabil. Med. 3:89-100 (2010); Valayannopoulos et al., "Mucopolysaccharidosis VI Orphanet," J. Rare Dis. 12:5 (2010); McGill et al., "Enzyme Replacement Therapy for Mucopolysaccharidosis VI From 8 Weeks of Age—A Sibling Control Study," Clin. Genet. 77:492-498 (2010)). Significant quality-of-life improvements have been noted following enzyme replacement therapy, including improved mobility, breathing, and joint flexibility. However, there is little or no evidence that enzyme replacement therapy directly impacts the cartilage and bone disease in MPS patients, and these positive clinical effects are therefore thought to derive mostly from soft tissue changes (e.g., tendons). Other experimental therapies are also under evaluation for the MPS disorders, including gene therapies (Cotugno et al., "Different Serum Enzyme Levels are Required to Rescue the Various Systemic Features of the Mucopolysaccharidoses," Hum. Gene Ther. 21:555-69 (2010); Herati et al., "Radiographic Evaluation of Bones and Joints in Mucopolysaccharidosis I and VII Dogs After Neonatal Gene Therapy," Mol. Genet. Metab. 95:142-51 (2008)) and the use of recombinant enzymes fused to cell-specific targeting sequences (Lu et al., "Expression in CHO Cells and Pharmacokinetics and Brain Uptake in the Rhesus Monkey of an IgG-Iduronate-2-Sulfatase Fusion Protein," Biotechnol. Bioeng. (2011); Osborn et al., "Minicircle DNA-Based Gene Therapy Coupled With Immune Modulation Permits Long-term Expression of α-L-Iduronidase in Mice With Mucopolysaccharidosis Type I," Mol. Ther. 19:450-60 (2011)).
Pentosan polysulfate (PPS) is an FDA-approved, oral medication that has potent anti-inflammatory and clinical effects in animal models of several diseases, including lysosomal storage disorders, and more specifically MPS disorders (this application), as well as arthritis, diabetes, intervertebral disc degeneration, and age-related neurodegeneration. PPS is currently approved for use in patients with interstitial cystitis, and its safety has been demonstrated through clinical testing. PPS inhibits leukocyte recruitment and interferes with some functions of chemokines, cytokines, and growth factors, thereby reducing inflammation and reactive oxygen species (ROS).
Tumor necrosis factor alpha (TNF-α) is believed to play an important role in various disorders, including for example, inflammatory disorders such as rheumatoid arthritis, Crohn's disease, ulcerative colitis, and multiple sclerosis. Both TNF-α and receptors CD120a, CD120b have been studied in great detail. TNF-α in its bioactive form is a trimer and the groove formed by neighboring subunits is important for the cytokine-receptor interaction. Several strategies to antagonize the action of the cytokine have been developed and are currently used to treat various disease states.
A TNF-α inhibitor which has sufficient specificity and selectivity to TNF-α may be an efficient prophylactic or therapeutic pharmaceutical compound for preventing or treating disorders where TNF-α has been implicated as a causative agent. Methods of treating toxic shock (EP Patent No. 0486526 to Rathjen et al.), tumor regression, inhibition of cytotoxicity (U.S. Pat. No. 6,448,380 to Rathjen et al., U.S. Pat. No. 6,451,983 to Rathjen et al., U.S. Pat. No. 6,498,237 to Rathjen et al.), autoimmune disease such as RA and Crohn's disease (EP Patent No. 0663836 to Feldmann et al., U.S. Pat. No. 5,672,347 to Aggarwal et al., U.S. Pat. No. 5,656,272 to Le et al.), graft versus host reaction (U.S. Pat. No. 5,672,347 to Aggarwal et al.), bacterial meningitis (EP Patent No. 0585705 to Hector et al.) by means of an antibody to TNF-α have been described. Previous work has also revealed the important impact of inflammation on the cartilage and bone disease in MPS animal models, and shown that genetic inhibition of Toll-like receptor 4 (TLR4) signaling in knockout mice or the use of TNF-inhibitors in combination with Naglazyme markedly improves cartilage and bone disease. Yet none of the presently available drugs are completely effective for the treatment of lysosomal storage disorders, particularly mucopolysaccharidosis and Niemann-Pick disease. TNF-inhibitors, while effective in the animal models, are intravenous medications that may result in significant side effects, and their long-term use in MPS patients may be difficult to implement.
The present invention is directed to overcoming these and other deficiencies in the art.

Anti-TNF-α therapy for the mucopolysaccharidoses and other lysosomal disorders


Disclosed is a reworkable circuit .package formed by controlled collapse chip connection ("C4") bonding of integrated circuit chips to circuit cards and boards, and direct chip attachment ("DCA") where an encapsulant is disposed under the chip. The encapsulant offers protection of the C4 connections and a thermal expansion matched to that of the C4 joints. However, most encapsulants interfere with reworkability. The disclosed circuit package overcomes this problem by the provision of a passivating layer of Parylene is reworkable, dry processable, uniformly depositable by vapor phase deposition, forming thin films on facing surfaces at the 3-5 micron film thickness corresponding to the C4 lift-off distance.

The general structures and manufacturing processes for electronic packages are described in, for example, Donald P. Seraphim, Ronald Lasky, and Che-Yo Li, Principles of Electronic Packaging, McGraw-Hill Book Company, New York, N.Y., (1988), and Rao R. Tummala and Eugene J. Rymaszewski, Microelectronic Packaging Handbook, Van Nostrand Reinhold, New York, N.Y. (1988), both of which are hereby incorporated herein by reference.
As described by Seraphim et al., and Tummala et al., an electronic circuit contains many individual electronic circuit components, e.g., thousands or even millions of individual resistors, capacitors, inductors, diodes, and transistors. These individual circuit components are interconnected to form the circuits, and the individual circuits are interconnected to form functional units. Power and signal distribution are done through these interconnections. The individual functional units require mechanical support and structural protection. The electrical circuits require electrical energy to function, and the removal of thermal energy to remain functional. Microelectronic packages, such as, chips, modules, circuit cards, circuit boards, and combinations thereof, are used to protect, house, cool, and interconnect circuit components and circuits.
Within a single integrated circuit, circuit component to circuit component and circuit to circuit interconnection, heat dissipation, and mechanical protection are provided by an integrated circuit chip. This chip enclosed within its module is referred to as the first level of packaging.
There is at least one further level of packaging. The second level of packaging is the circuit card. A circuit card performs at least four functions. First, the circuit card is employed because the total required circuit or bit count to perform a desired function exceeds the bit count of the first level package, i.e., the chip. Second, the second level package, i.e., the circuit card, provides a site for components that are not readily integrated into the first level package, i.e., the chip or module. These components include, e.g., capacitors, precision resistors, inductors, electromechanical switches, optical couplers, and the like. Third, the circuit card provides for signal interconnection with other circuit elements. Fourth, the second level package provides for thermal management, i.e., heat dissipation.
In order for the card to accomplish these functions the I/C chip must be bonded to the card, and connected to the wiring of the card. When the number of I/O's per chip was low, serial wire bonding of the I/O's around the periphery of the chip was a satisfactory interconnection technology. But, as the number of I/O's per chip has increased, tape automated bonding (hereinafter "TAB" bonding) has supplanted serial wire bonding. To handle an even larger number of I/O's per chip various "flip chip" bonding methods were developed. In these so-called "flip chip" bonding methods the face of the IC chip is bonded to the card.
Flip chip bonding is described by Charles G. Woychik and Richard C. Senger, "Joining Materials and Processes in Electronic Packaging," in Donald P. Seraphim, Ronald Lasky, and Che-Yo Li, Principles of Electronic Packaging, McGraw-Hill Book Company, New York, N.Y., (1988), at pages 577 to 619, and especially pages 583 to 598, and by Nicholas G. Koopman, Timothy C. Reiley, and Paul A. Totta, "Chip-To-Package Interconnections" in Rao R. Tummala and Eugene Rymaszewski, Microelectronic Packaging Handbook, Van Nostrand Reinhold, New York, N.Y. (1988), at pages 361 to 453, and especially pages 361 to 391, both of which are hereby incorporated herein by reference. As described therein. flip-chip bonding allows forming of a pattern of solder bumps on the entire face of the chip. In this way the use of a flip chip package allows full population area arrays of I/O. In the flip chip process solder bumps are deposited on solder wettable terminals on the chip and a matching footprint of solder wettable terminals are provided on the card. The chip is then turned upside down, hence the name "flip chip," the solder bumps on the chip are aligned with the footprints on the substrate, and the chip to card joints are all made simultaneously by the reflow of the solder bumps.
In the C4 process, as distinguished from the earlier flip chip process, the solder wettable terminals on the chip are surrounded by ball limiting metallurgy ("BLM"), and the matching footprint of solder wettable terminals on the card are surrounded by glass dams or stop-offs, which are referred to as top surface metallurgy ("TSM"). These structures act to limit the flow of molten solder during reflow.
The ball limiting metallurgy ("BLM") on the chip is typically a circular pad of evaporated, thin films of Cr, Cu, and/or Au, as described, for example by P. A. Torta and R. P. Sopher, "STL Device Metallurgy and Its Monolithic Extension," IBM Journal of Res. and Dev., 13 (3), p. 226 (1969), incorporated herein by reference. The Cr dam formed by this conductive thin film well restrains the flow of the solder along the chip, seals the chip module, and acts as a conductive contact for the solder. In prior art processes the BLM and solder are deposited by evaporation through a mask, forming an array of I/0 pads on the wafer surface. The term "mask" is used generically. The mask can be a metal mask. Alternatively, as used herein, the "mask" can refer to a sequence of BLM deposition, photoresist application, development of the photoresist, and deposition, as described below, of solder, followed by simultaneous removal of the photoresist and subetching of the BLM, with the solder column acting as a mask.
In C4 processes the Pb/Sn is typically deposited from a molten alloy of Pb and Sn. The Pb has a higher vapor pressure then Sn, and deposits first, followed by a cap of Sn. The solder is deposited on the chip by evaporation, vacuum deposition, vapor deposition, or electrodeposition into the above described BLM wells, thereby forming solder columns therein. The resulting solder deposit, referred to herein as a column or a ball, is a cone-frustrum body of Pb surrounded by an Sn cap. This column or ball may be reflowed, for example by heating in an H.sub.2 atmosphere, to homogenize the solder and form solder bumps for subsequent bonding.
The solder is typically a high lead solder, such as 95 Pb/5 Sn. In conventional C4 processes, 95/5 solders are preferred because the high lead solders of this stoichiometry have a high melting point, e.g., above about 315 degrees Centigrade. Their high melting temperature allows lower melting point solders to be used for subsequent connections in the microelectronic package.
The wettable surface contacts on the card are the "footprint" mirror images of the solder balls on the chip I/O's. The footprints are both electrically conductive and solder wettable. The solder wettable surface contacts forming the footprints are formed by either thick film or thin film technology. Solder flow is restricted by the formation of dams around the contacts.
The chip is aligned, for example self-aligned, with the card, and then joined to the card by thermal reflow. Typically, a flux is used in prior art C4 processes. The flux is placed on the substrate, or chip, or both, to hold the chip in place. The assembly of chip and card is then subject to thermal reflow in order to join the chip to the card. After joining the chip and card it is necessary to remove the flux residues. This requires the use of organic solvents, such as aromatic solvents and halogenated hydrocarbon solvents, with their concomitant environmental concerns.
To be noted is that the C4 process is a substantially self-aligning assembly process. This is because of the interaction of the geometry of the solder columns or balls prior to reflow with the surface tension of the molten solder during reflow and geometry of the solder columns. When mating surfaces of solder column on the chip and the conductive footprint contact on the card touch, the surface tension of the molten solder will result in self alignment.
C4 bonding can also be used in Direct Chip Attach ("DCA"). Direct Chip Attach is the general name applied to a chip-substrate connection used to eliminate the first level of packaging (as SMT or TAB). Direct Chip Attach is a low cost, high throughput process, in which the chip is bonded, for example, C4 bonded, directly to the card or board.
For Direct Chip Attach, the individual IC chips are (C4) mounted on the cards or boards, and the mounted chip and the card or board are then encapsulated with a low coefficient of thermal expansion encapsulant, as epoxy resin. By this expedient, the "standoff" between the IC chip and the card or board is encapsulated with epoxy.
Because of the use of a polymeric dielectric card or board, the Direct Chip Attach process requires low temperature solder metallurgy that also allows "stand-off." Moreover, Direct Chip Attach encapsulation increases the resistance of the C4 solder interconnections to thermal cycling, acts as an alpha emission barrier to MOSFET memory chips, is a parallel thermal path for heat dissipation, and provides physical protection to the chips and C4 solder interconnections.
One problem encountered with the combination of Direct Chip Attach and and C4 bonding is the difficult of reworking the encapsulated package. This is because, notwithstanding the advantages of the epoxy encapsulant, for example: (i) low temperature encapsulant cure, (ii) easy manufacturability, (iii) the absence of volatiles, and (iv) thermal expansion matched to that of the C4 joints, epoxy is a difficult material to remove for rework.
This rework difficulty renders the structures effectively non-reworkable. This reduces yield and thereby increases costs.

Method of fabricating a reworkable module

International Business Machines Corporation


A system and method for use in a lithographic environment include an illumination system, an array of individually controllable elements, a projection system, and a substrate. The projection system comprises an array of lenses. The apparatus also includes a sensor system and a positioning system controllable to adjust a position and/or an orientation of at least one of the array of elements; a component of the projection system; and the illumination system. The apparatus also includes a control system which controls the array of elements to pattern the beam, and which also receives the intensity signal and controls the positioning system according to the detected intensity distribution to adjust the projected radiation pattern.

1. Field of the Invention
The present invention relates to a lithographic apparatus and a device manufacturing method.
2. Related Art
A lithographic apparatus is a machine that applies a desired pattern onto a target portion of a substrate. The lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs), flat panel displays, and other devices involving fine structures. In a conventional lithographic apparatus, a patterning means, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern corresponding to an individual layer of the IC (or other device), and this pattern can be imaged onto a target portion (e.g., comprising part of one or several dies) on a substrate (e.g., a silicon wafer or glass plate) that has a layer of radiation-sensitive material (e.g., resist). Instead of a mask, the patterning means may comprise an array of individually controllable elements that generate the circuit pattern.
In general, a single substrate will contain a network of adjacent target portions that are successively exposed. Known lithographic apparatus include steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion in one go, and scanners, in which each target portion is irradiated by scanning the pattern through the projection beam in a given direction (the "scanning" direction), while synchronously scanning the substrate parallel or anti-parallel to this direction.
In maskless lithography it is known to project the patterned beam onto a target portion of the substrate using a projection system that comprises an array of lenses arranged such that each lens receives and focuses a respective portion of the patterned beam. Each lens of the array thus projects a respective spot of radiation onto the substrate, and the array of lenses collectively projects a radiation pattern on the substrate. Such systems are generally referred to as microlens array or MLA systems. In these systems, the patterned beam is typically projected onto the lens array through a beam expander, which comprises a series of lens components and is arranged to provide a substantially parallel radiation beam.
Ideally, the beam patterning and beam projection components should be precisely aligned (i.e., arranged with respect to each other and the target substrate), such that each spot projected onto the target substrate by a lens of the MLA is sharply focused and corresponds to a respective one of the controllable elements. To achieve this, the components should be aligned, such that the projection of the patterned beam on the MLA is in register with the MLA. Each lens of the MLA should receive and focus a portion of the beam that corresponds to a respective one of the controllable elements.
It will be appreciated that the "corresponding respective element" is the element on which the intensity of the portion of beam is primarily dependent. In general, the beam portion received by a particular lens of the MLA will have an intensity that is also dependent on the states of elements adjacent to the "corresponding" element.
Achieving precise alignment of a number of beam patterning and beam projection components to provide the desired correspondence between the projected radiations spots and the controllable elements may pose a problem.
Another possible problem is that projection beam supplied to the patterning means (i.e., the array of controllable elements) may not be uniform (i.e., it may not have a uniform intensity over its cross section). In such cases, even though the patterning and projection components may be set up with precise alignment, the radiation pattern projected onto the substrate may have an unwanted intensity modulation.
Therefore, what is needed is a lithographic system and method that allow for accurate correspondence between the projected radiations spots and the controllable elements and/or a projection beam having a uniform intensity.

Lithographic apparatus and device manufacturing method


A method is provided for determining a residual charge on a battery (12), comprising applying a discharge pulse to the battery (12) and measuring a first voltage on the battery (12) at a first time (t1). Additional voltages on the battery are measured at additional times (t2, t3) subsequent to the first time (t1). Delta voltages (ΔV1, ΔV2) are determined by subtracting each of the additional voltages from the first voltage and delta times (Δt1, Δt2) are determined by subtracting the first time from each of the additional times. Regression equation coefficients (α, ε) are determined from regression analysis of the delta voltages and delta times, and are applied to a database for determining the residual charge.

Batteries are widely used to provide power, or back-up power, to electronic devices, and especially portable electronic devices including mobile communication devices. While the lifetime of such batteries has improved over the last several years, the demand for battery power has increased as the use of the electronic devices increase due to consumer habits. Extended use of the electronic device may result in a "dead" battery and great frustration to the consumer.
Most consumers find it helpful to have an indication on the electronic device of battery power remaining for use (commonly called residual power). This indication is typically represented by a number or bar graph on a display of the electronic device as a percentage of a fully charged battery.
There are several known methods of determining battery levels. One method determines battery residual charge and battery capacity (total battery capability) by applying discharging pulses and rest periods to a battery, measuring the voltage drop as an index to determine the potential maximum battery capacity. The known art typically uses an open battery voltage to determine the present capacity (residual battery charge).
However, these known methods of estimating the residual battery charge by battery voltage are typically somewhat inaccurate. One disadvantage of these known methods is that the voltage of the battery depends on the current that is drained by the load, with the voltage changing after the load is decreased. For example, the remaining voltage indication increases when a cell phone call is released after use.
Accordingly, it is desirable to provide a method for determining the residual charge on a battery without relying only on battery voltage. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.

Method for determining residual battery charge


A current differential protection method for a self-adaptive half-wavelength line based on a time-difference method. Since an electrical distance of half-wavelength power transmission is long, after a fault occurs, there is an obvious time difference between the actuation times for protecting starting elements at two sides of a line. According to the principles of wave propagation, the position of a fault point can be determined by means of a difference between the actuation times for protecting the starting elements at the two sides of the line. By means of taking the fault point as a differential point, a current value at the differential point can be obtained according to a long line equation by means of the voltage and current at protection-mounted positions at the two sides of the line, and a differential current is then calculated.

Half Wavelength Alternating Current (AC) Transmission (HWACT) refers to ultralong-distance three-phase AC transmission of which an electrical distance for transmission is approximate to a power frequency (industrial AC frequency) half wave, i.e. 3,000 km (corresponding to 50 hertz AC frequency) or 2,600 km (corresponding to 60 hertz AC frequency).
Compared with medium-length (hundreds of kilometers) AC transmission, such ultralong-distance AC transmission has some distinct characteristics and remarkable advantages. For example, no reactive power compensation equipment is required to be mounted; no intermediate switching station is required to be arranged; and overvoltage level is not high.
As main protection for a medium-length AC transmission line, current differential protection is widely applied. However, current differential protection requires compensation of capacitive current. There is an inevitable difference in voltage at each position along the half wavelength line, and the difference in the voltage at each position cannot be ignored. For the difference in the voltage across the power line, the traditional capacitive current compensation method is no longer applicable. Until now, there is no effective solution for how to effectively solve the problem that the conventional differential current protection cannot be applied to half-wavelength lines.

Current differential protection method for self-adaptive half-wavelength line based on time-difference method

CHINA ELECTRIC POWER RESEARCH INSTITUTE COMPANY LIMITED

CENTRAL CHINA BRANCH OF STATE GRID CORPORATION OF CHINA


A control method using a print head for printing a plurality of images on a continuous sheet has the steps of obtaining information in regard to a position and a level of a unique portion unsuitable for image printing that exists on the continuous sheet and of causing a maintenance operation of the print head by using a region where the unique portion exists on the continuous sheet based upon obtained information.

1. Field of the Invention
The present invention relates to a control method for performing printing on a continuous sheet.
2. Description of the Related Art
In a printing apparatus for printing an image on a sheet, a unique portion has a characteristic which is different from a characteristic of other regions in the sheet (including a connecting portion (splice portion) between sheets), and the image can not be printed on the unique portion with accuracy. Therefore it is known to avoid the printing of the image onto the unique portion.
A printing apparatus disclosed in the specification of Japanese Patent No. 4278885, in a case of detecting a unique portion, defines the unique portion and a constant region in front of and in back of the unique portion as a non-image printing area. In addition, a length of a blank space between the non-image printing area and a region where an image is printed before the non-image printing area is detected, and an image that will be printed on the blank space is selected according to a relation between the length and a size of the image that will be printed thereafter.
In the printing apparatus disclosed in the specification of Japanese Patent No. 4278885, in a case where images each having a size in which the printing can not be performed in the blank space continue, the blank space can not be used as similar to the unique portion. Therefore the sheet of portions that include the blank space and the unique portion will not be used and will be disposed of.

Control method, printing sheet used therefor, and printing apparatus


A write channel includes a pre-encoding module that encodes write data to produce pre-encoded data. An error correcting code (ECC) module generates ECC data based on the pre-encoded data. A post-encoding module encodes the ECC data to produce post-encoded data. A combining module combines the pre-encoded data and the post-encoded data for writing to the storage medium.

1. Technical Field of the Invention
The present invention relates to disk drives and read and write channel coding.
2. Description of Related Art
As is known, many varieties of disk drives, such as magnetic disk drives are used to provide data storage for a host device, either directly, or through a network such as a storage area network (SAN) or network attached storage (NAS). Typical host devices include stand alone computer systems such as a desktop or laptop computer, enterprise storage devices such as servers, storage arrays such as a redundant array of independent disks (RAID) arrays, storage routers, storage switches and storage directors, and other consumer devices such as video game systems and digital video recorders. These devices provide high storage capacity in a cost effective manner.
A typical magnetic disk drive uses a read/write head that operates via longitudinal magnetic recording. Data to be written on the disk is run-length limited (RLL) coded to limit the number of sequential 0's in the bitstream to attenuate the DC response of the signal that is read back from the disk. The RLL coding allows very high code rates with relatively low complexity. The RLL coded bitstream is coded again with an error correcting code, prior to writing the data, in order to correct errors that can occur in read/write operations.
A sizable market has developed for these devices and the price per unit of storage has steadily dropped. Modern host devices are provided with greater storage capacity at reduced cost, compared with devices that where manufactured a few years earlier. The need exists for efficient disk drives that can store and retrieve data with greater accuracy and at greater density.

Read/write channel coding and methods for use therewith


A method and system for managing network addresses of a guest during live migration in a virtual machine system. A computer system hosts a guest that is to migrate from a source hypervisor in the computer system to a target hypervisor during operation of the computer system. In response to the indication, the source hypervisor retrieves an address list of the guest from a network device, where the address list identifies one or more network addresses of the guest in one or more networks. The source hypervisor then forwards the address list to the target hypervisor, which notifies the one or more networks of the migration of the guest.

A virtual machine system sometimes consists of multiple physical machines and runs multiple hypervisors on a single machine. Each hypervisor can support multiple virtual machines, with each virtual machine running a guest to perform tasks for a user. From time to time a system administrator may want to move ("migrate") a guest from one hypervisor to another for maintenance or performance reasons. The migration may be a "live migration," which means that the guest can be moved without disconnecting its client or application.
When a guest migrates to a different hypervisor ("target hypervisor"), its network location is changed. Switching components in the network (to which the guest is coupled) need to be notified of the guest's new location, so that the guest can continue to receive packets at its new location.
One current approach is to rely on a device driver in the guest to forward the guest's network addresses to the target hypervisor, and the target hypervisor notifies the switching components. However, the guest operating system sometimes fails to supply a full list of the guest addresses to the device driver (e.g., when the network interface of the system operates in the promiscuous mode).

Network address retrieval for live migration of a guest system in a virtual machine system