Proposed herein is a superfine oil cleaning filter, comprising a casing joined together with a cover, an antidrain valve, a filter element, a relief valve with a coarse-cleaning filter element, and a spring, the coarse-cleaning filter element being positioned upstream of the filter element and the relief valve in the space confined within the internal surface of the casing and the external surface of the filter element and of the filter cover. Depending on operating conditions the coarse-cleaning filter element either may be provided with a safety valve or be made up of two components one of which is positioned upstream of the filter element, and the other is located upstream of the relief valve.

Oil filter 2101-1012005 available from the Automotive Units and Accessories Works in Livny, Russian Federation (LAAZ) is extensively known to comprise a casing and a cover held together, and a filter element enclosed in the casing and intended for both coarse and fine oil cleaning, provided with an antidrain and relief valves (cf. "Motor Vehicles "VAZ" by V. A. Vershigora et al., Moscow, Transport PH, 1974, pp.48, 49 (in Russian).
However, the filter mentioned above suffers from the constructional disadvantage that it fails to provide a quality oil cleaning.
During the cold start of an engine only that part of the filter element is involved in operation which effect coarse oil cleaning, since thickened oil fails to pass through the fine-cleaning part of the filter.
Once the engine has warmed up, the fine-cleaning part of the oil filter gets operative; however, coarse oil cleaning in the filter element does not cease, while the main flow of warmed-up oil keeps passing through the coarse-cleaning filter element and the fine-cleaning filter element remains inoperative.
Moreover, whenever the relief valve starts operating, the oil passing therethrough is not cleaned whatever.
Known in the prior art is a sectional-construction oil filter, comprising a casing and a cover joined together, said casing accommodating an antidrain valve and a fine oil cleaning filter element alone with a relief valve and a spring (SU, A, 1,358,985), and a similar but nonsectional filter 2105-1012005 available from LAAZ (cf. Motor Cars VAZ-2108 "Sputnik". Design. Repairs", Moscow, Transport PH, 1987, pp.11, 35 (in Russian).
When cold starting the engine equipped with the aforementioned oil filters, or in the case of a clogged filter element, uncleaned oil soiled with metal particles and carbon deposit is free to pass through the relief valve to get in the engine main manifold. This results, first and foremost, in abnormally rapid wear on the shells of the crankshaft main and crankpin bearings and on the engine piston group, and in that the engine lubricating system is not virtually protected against penetrating said oil contaminants thereinto.
Known in the art is also an oil filter by A. N. Koltunov (RU, A, 1,814,564) which is the closest to the filter proposed herein and comprises a casing joined together with a cover, an antidrain valve, a filter element, a relief valve with a coarse cleaning filter element, and a spring. However, use of such a filter construction under conditions of a heavily dust-laden or dirtied atmosphere, or use of poor-quality oil results in premature clogging of the filter element. The aforediscussed filter construction is adopted as the prototype.

Poltavskoe Chastnoe Nauchno-Tekhnicheskoe Predpriyatie


A workpiece cleaning element incorporates an injection molded resin core having integral spacers formed at a central portion of the resin core. The resin core is formed from a suitable material that does not leech chemicals or become brittle in the presence of cleaning fluids. A substantially resilient cleaning material located on the resin core includes a plurality of raised ribs that perform contact scrubbing of the workpiece. Each rib includes a longitudinal channel formed therein that divides the rib into a leading cleaner surface and a trailing cleaner surface. The ribs are arranged on the cleaning element in a pattern that promotes effective removal of debris from an inner position on the workpiece to the outer edge of the workpiece.

The production of workpieces used in the magnetic disc drive industry begins with the creation of a substrate with a hard smooth surface upon which magnetic material can be deposited. A hard smooth surface may be formed by coating a relatively soft material such as aluminum with a relatively hard material such as nickel. The hard material is polished to a smooth finish, and magnetic material is then deposited onto the polished surface of the workpiece. Several methods for depositing magnetic material onto the polished surface can be used; for example, electro-deposition and sputtering are two well known methods.
After polishing, the workpieces are typically cleaned prior to the deposition of magnetic material. If the surface of the workpiece is contaminated with debris from the polishing process or elsewhere, the adherence of the magnetic material to the surface of the workpiece will be imperfect, and "blisters" of missing magnetic material may form on the surface of the workpiece. These "blisters" create areas on the completed magnetic disc that are incapable of storing information. Similarly, in optical disc manufacturing, debris on the surface of the workpiece may cause voids in information storage. In semiconductor wafer manufacturing, debris may attach to the surface of the workpiece, causing defects on the surface of the workpiece. These defects can cause electrical shorts or other problems within the microelectronic structures on the workpiece. Accordingly, it is often important to clean the workpieces to remove debris from the corresponding surfaces.
Contact scrubbing with sponge-like material is one method used to remove debris from the surface of the workpiece. A typical prior art cleaning element used for contact scrubbing of workpieces is described in U.S. Pat. No. 5,311,634, issued May 17, 1994 to Andros. A conventional cleaning element 10 may be configured as shown in FIG. 1. Cleaning element 10 generally includes a sponge-like cleaning material 12 and a core 14. Cleaning material 12 is formed over core 14 and seals with itself at an outer edge 16 of core 14. Cleaning material 12 may be made of a variety of resilient materials, including polyvinyl alcohol and urethane. As with other prior art cleaning elements, cleaning material 12 may have bumps or other texturing on its outer surface to facilitate effective cleaning and flushing of the workpiece surface. The arrangement of such bumps or texturing may be random or patterned. Random texturing may not provide a suitable cleaning or wiping action and some patterned cleaning elements may merely redistribute debris from one location on the workpiece to another without effectively removing the debris.
Conventional cleaning elements often utilize a relatively heavy and expensive metal or stamped plastic or polyvinyl chloride (PVC) for core 14. Unfortunately, PVC may leech chemicals or particulate into the cleaning environment during use. Such leeching is undesirable in many delicate applications. In addition, some conventional cleaning elements utilize a permanent core 14 that is designed for use with disposable sponge elements. Such an arrangement is inconvenient to maintain and requires a considerable amount of downtime to replace old sponges with new sponges.
Core 14 has a centrally located aperture 18 to allow mounting of cleaning element 10 onto a rotatable drive shaft 20. Core 14 may also have two keyways 22 and 24 formed within aperture 18 and configured to receive a single key 26 located on drive shaft 20. Key 26 and keyways 22 and 24 enable drive shaft 20 and cleaning element 10 to rotate as a single unit. Prior art cleaning element 10 uses such multiple keyways 22, 24 to facilitate adjustable alignment of the texture pattern on cleaning material 12. For example, cleaning elements 10 are typically installed onto drive shaft 20 using alternating keyways 22, 24 to stagger the respective texture patterns. Unfortunately, such an alternating configuration requires additional installation time and increases the likelihood of an improper installation.
Prior art cleaning machines may employ a plurality of cleaning elements 10 to simultaneously process a plurality of workpieces. When multiple cleaning devices 10 are placed on drive shaft 20, a number of spacers 28 are often interposed between adjacent cleaning devices 10 to ensure substantially identical spacing between all cleaning devices 10. Unfortunately, installing spacers 28 onto drive shaft 20 is time consuming and labor intensive. Spacers 28 also tend to wear and become contaminated, causing nonuniform spacing between and misalignment of cleaning devices 10. Such inconsistencies may cause unpredictable processing from workpiece to workpiece.

Workpiece cleaning element with improved rib configuration


A process is described to form a semiconductor device such as MOSFET or CMOS with shallow junctions in the source/drain extension regions. After forming the shallow trench isolations and the gate stack, sidewall dielectric spacers are removed. A pre-amorphizing implant (PAI) is performed with Ge+ or Si+ ions to form a thin PAI layer on the surface of the silicon regions adjacent to the gate stack. B+ ion implantation is then performed to form source/drain extension (SDE) regions. The B+ implant step is then followed by multiple-pulsed 248 nm KrF excimer laser anneal with pulse duration of 23 ns. This step is to reduce the sheet resistance of the junction through the activation of the boron dopant in the SDE junctions. Laser anneal is then followed by rapid thermal anneal (RTA) to repair the residual damage and also to induce out-diffusion of the boron to yield shallower junctions than the just-implanted junctions prior to RTA.

(1) Field of the Invention
The present invention relates generally to a method of forming a semiconductor device, and more particularly to form an MOS transistor with reduced junction depth using a combination of multiple-pulsed laser anneal and rapid thermal anneal.
(2) Description of the Prior Art
Ion implantation process is essential to fabricate modern integrated circuits. Doping or otherwise modifying silicon or other semiconductor wafers relies on this technology, which involves generating the required beam of ions and implanting them into the substrate so that they come to rest just below the semiconductor surface. Most commonly implanted species are: antimony, arsenic, boron, boron difluoride, germanium, and phosphorous. Currently, ion implantation is used to form source and drain regions, shallow extension junctions between the channel and source/drain contacts, and electrically active poly-silicon gate electrodes. Ion implantation is always followed by an annealing step to heal the damage that occurs when ions occupy the interstitial spaces in the semiconductor crystal lattice during implanting.
As MOSFET devices are scaled down below 100 nm, highly doped ultra-shallow junctions are necessary for high current drive capability with acceptable short-channel performance. In order to minimize short-channel effect and maximize device performance at the same time, source/drain (S/D) engineering associated with diffusion profiles of source/drain junction are explored. Analysis shows that the critical parameter for reducing the resistance of the S/D extension junction is the dopant diffusion slope rather than its maximum doping level. In other words, development of advance process technology for achieving a box-shaped profile is a more efficient way to sustain lower junction resistance rather than pursuing higher doping level that may cause problems of junction depth control.
With the conventional junction formation by ion implant and rapid thermal anneal, it is very difficult to obtain highly steep ultra-shallow junction profiles because the interaction between implantation induced point defects and dopant atoms during annealing can considerably broaden the profile shape through the mechanism of transient enhanced diffusion (TED). Laser annealing with pre-amorphization implant (PAI) has received considerable attention as a potential solution to achieve low-resistance, ultra-shallow box-shaped SD extension junctions. However, the method has integration issues related to gate shape distortion due to inherently inhomogeneous annealing process that takes place within a few hundred nanoseconds. In the literature, pulse laser annealing in combination with PAI has been discussed with limited success. Unfortunately, the method has major integration problems because the high-energy fluence used for sufficient dopant activation and defect removal gives rise to melting of the poly-silicon gate. Although low energy implants are needed to reduce junction depths, the lowering of energy implies a trade-off between shallower junctions and higher junction resistivity.
U.S. Pat. No. 5,399,506 describes a process wherein shallow junction with reduced junction leakage is achieved by the combination of ion implantation and low temperature annealing (600° C. for 1 hour) to reduce point defects and pulsed laser (700 mJ/cm2, 44 nsec pulse width) irradiation to activate the implanted ions.
U.S. Pat. No. 5,937,325 describes a process to form low resistance titanium silicide gates by using a laser anneal process in two steps: first laser anneal converts the deposited titanium layer to a high resistivity titanium silicide layer and the second laser anneal (after removing the un-reacted titanium layer) converts the high resistivity silicide layer into low resistivity titanium silicide phase.
U.S. Pat. No. 6,100,171 describes a laser annealing process for removing fluorine from a gate conductor and thereby reduce boron penetration. During anneal, laser energy is such as to melt a portion of the gate conductor facilitating the removal of the fluorine that is incorporated in the gate during BF+2 implantation. In another embodiment, rapid thermal anneal (RTA) follows laser anneal process for activating the dopants in the S/D regions.
U.S. Pat. No. 6,365,476 B1 describes a laser thermal process wherein after the first implant and anneal to form S/D regions and after the removal of sidewall spacers around the gate structure, a blanket pre-amorphization implant is performed to form S/D amorphized extension regions. After depositing a layer that is opaque to a select laser wavelength, the substrate is then irradiated to selectively melt the amorphized S/D extensions.

Dual step source/drain extension junction anneal to reduce the junction depth: multiple-pulse low energy laser anneal coupled with rapid thermal anneal

Chartered Semiconductor Manufacturing Ltd.


A kitchen basket is composed of a basket, two support frames and two expandable support rods of a U-shaped construction. The basket is held by the two support frames, which are provided with the retaining portions for engaging the expandable support rods in such a manner that the expandable support rods can be extracted and retracted to facilitate the suspending of the basket in a kitchen sink. The basket is further supported by two metal strips, which are fastened to the underside of the basket. The metal strips are provided with legs to locate the kitchen basket on a kitchen table. The expandable support rods are provided respectively with two skidproof pads for locating the kitchen basket at such time when the kitchen basket is suspended in a kitchen sink.

As shown in FIG. 1, a kitchen basket 1 of the prior art is composed of a basket 11, two U-shaped support rods 13, and two retaining tubes 12. The basket 11 is held by the two support rods 13, which are extractably and retractably retained by the two retaining tubes 12 opposite in location to each other. The support rods 13 are provided with two flat free ends 131 to avert the disengagement of the support robs 13 with the retaining tubes 12 when the support rods 13 are extracted to expand the support structure of the kitchen basket 1.
Such a prior art support structure of the kitchen basket as described above is defective in design in that it is not cost-effective, and that it is not esthetically sound, and further that it is incapable of holding the basket 11 in place when the basket II contains fruits, vegetables, dishes, etc.

Expandable support structure of kitchen basket


A method for handling alarm conditions from paging stations in a paging system is disclosed. The paging system includes a paging terminal, a plurality of paging stations, and a network manager. When a paging station has an alarm condition, the paging station forwards the alarm to the network manager, which in turn compares the alarm with an alarm record for that paging station and determines whether or not that alarm is a higher priority than the previous alarms received from the paging station. If so, the network manager transmits a signal to the paging terminal to page the technician responsible for servicing that particular paging station. The technician is paged and dispatched to the paging station for service.

Paging systems typically include a paging terminal that interfaces with the public switch telephone network (PSTN) and a plurality of paging transmitters that provide signal coverage over a wide geographic region. Examples of such paging systems are described in U.S. Pat. Nos. 5,365,569, 5,369,682, and 5,416,808, all to Witsaman et al. and commonly assigned to the assignee of the present invention and expressly incorporated by reference herein. These paging systems and others of the prior art are generally configured to allow the simulcasting of a paging signal through all of the paging transmitters of the paging system. By having many geographically spaced-apart paging transmitters, a wide geographic region can be reached by the signals of the paging system. The geographic region may be in some cases citywide, statewide, or even nationwide.
As with any large complex system, one or more of the components may fail and require repair from time to time by trained technicians. In the paging system context, the components that fail most often, simply by virtue of the large number of these components, are the paging transmitters. Paging transmitters are also referred to as either paging stations or base stations.
These paging stations may experience failures that impede the ability of the paging stations to operate correctly. These failures lead to what is known in the art as an alarm condition. Upon such an alarm condition, the paging system must react by dispatching technical personnel to the paging station to correct the paging station failure that resulted in the alarm condition.
In many instances, a single fault in the paging system will result in multiple calls to a service technician. For example, if a link transmitter that transmits paging information to each of the remote paging stations fails, each paging station will generate an alarm condition indicating that it is not receiving paging data. In order to avoid overwhelming or misleading the service technician with alarm conditions, there is a need for an error-handling system that can detect multiple faults of the same type. By informing the service technician of the system wide error condition, the technician can be directed to the source of the problem.

Method for handling alarm conditions in a paging system


A method of inhibiting bacterial growth in meat wherein a citrate salt, preferably sodium citrate, is introduced into the meat to a sodium citrate content of 1 to 7% and preferably about 1 to 1.3%.

In U.S. Pat. Nos. 5,017,391, 4,888,191 and 4,798,729, as well as in the prior art described in these patents, it is pointed out that sodium lactate can be added to meat products such as ham and sausage in amounts of 1 to 3% to poultry and fish in an amount of 1 to 7% to improve the resistance of the meat to bacterial growth and particularly to control Colstridium botulinum which can occur in meats and poultries which are packaged and cooked, but not sterilized.
The Colstridium botulinum can grow in such meats and produce a toxin. As a consequence, it is desirable or necessary to somehow control the growth of bacteria in meat, including red meats such as hams, and poultry, or to sterilize the meat if the meat is to be subject to storage.
It should also be noted that citric acid and sodium citrate are generally recognized as safe in foodstuffs and are on the GRAS list issued by the Food and Drug Administration. Finally, mention should be made of the fact that sodium citrate in an amount up to 0.3% by weight of the meat, is approved as a curing accelerating. The sodium citrate can be added as a part of the curing process of cured meats such as ham.
Nevertheless, it is desirable to improve the appearance, flavor retention and storage life of meats and, specifically, to provide improved ways of limiting bacterial growth generally and the growth of Colstridium botulinum in particular.

Method of inhibiting bacterial growth in meat


The invention concerns the identification of proteomes of biological fluids and their use in determining the state of maternal/fetal conditions, including maternal conditions of fetal origin, chromosomal aneuploidies, and fetal diseases associated with fetal growth and maturation. In particular, the invention concerns a comprehensive proteomic analysis of human amniotic fluid (AF) and cervical vaginal fluid (CVF), and the correlation of characteristic changes in the normal proteome with various pathologic maternal/fetal conditions, such as intra-amniotic infection, pre-term labor, and/or chromosomal defects. The invention further concerns the identification of biomarkers and groups of biomarkers that can be used for non-invasive diagnosis of various pregnancy-related disorders, and diagnostic assays using such biomarkers.

1. Field of the Invention
The invention concerns the identification of proteomes of biological fluids and their use in determining the state of maternal/fetal conditions, including maternal conditions of fetal origin, chromosomal aneuploidies, and fetal diseases associated with fetal growth and maturation. In particular, the invention concerns a comprehensive proteomic analysis of human amniotic fluid (AF) and cervical vaginal fluid (CVF), and the correlation of characteristic changes in the normal proteome with various pathologic maternal/fetal conditions, such as intra-amniotic infection, pre-term labor, and/or chromosomal defects. The invention further concerns the identification of biomarkers and groups of biomarkers that can be used for non-invasive diagnosis of various pregnancy-related disorders, and diagnostic assays using such biomarkers.
2. Description of the Related Art
Proteomics
The large-scale analysis of protein expression patterns is emerging as an important and necessary complement to current DNA cloning and gene profiling approaches (Pandey and Mann, Nature 405:837-46 (2000)). DNA sequence information is helpful in deducing some structural and potential protein modifications based on homology methods, but it does not provide information on regulation of protein function through post-translational modifications, proteolysis or compartmentalization.
Traditional gel-based methods, such as one- and two-dimensional gel electrophoresis are useful for small-scale protein detection (<1,000 proteins), but these require large sample quantity (Lilley K S, Razzaq A, Dupree P: Two-dimensional gel electrophoresis: recent advances in sample preparation, detection and quantitation. Curr Opin Chem Biol. 6(1):46-50, 2002). Approaches to overcome this limitation include matrix-assisted or surface-enhanced laser desorption/ionization (MALDI or SELDI) time-of-flight mass spectrometers that accurately generate profiles showing the masses of proteins in a sample. These patterns or profiles can be used to identify and monitor various diseases. The second level of identification comes from coupling peptide mapping to tandem mass spectrometry to generate amino acid sequence information from peptide fragments. This can, for example, be achieved by coupling the MALDI/SELDI or ESI to quadrupole time-of-flight. MS (Qq-TOF MS). The latter method can also be used for quantification of specific peptides (ICAT technology).
Diagnosis of Pathologic Maternal/Fetal Conditions
There are numerous pathologic maternal and fetal conditions, such as intra-amniotic infection (IAI), preeclampsia, preterm delivery and labor, and chromosomal aneuploidies, that may develop during pregnancy and compromise the well-being or, in some instances, threaten the life of the mother and/or the fetus or newborn. Early diagnosis of such conditions is critical to allow timely treatment and intervention. Unfortunately, early diagnosis for most of these conditions is difficult because the clinical signs and symptoms occur late, and are often non-specific and inconsistent. For example, the clinical symptoms of IAI typically include maternal fever and leukocytosis, but these symptoms often occur later and are neither sensitive nor specific. Thus, Gravett et al., Am. J. Obstet. Gynecol. 171:1660-7 (1994), utilizing a non-human primate model, demonstrated that following experimental intra-amniotic infection with Group B streptococcus, fever and leukocytosis are present only 50% of the time at the onset of infection-induced preterm labor, which occurs 28 to 40 hours after experimental infection. Therefore, to avoid a delay in diagnosis, a high index of suspicion and the appropriate use of adjunctive laboratory tests, are warranted. The clinical criteria commonly used to diagnose IAI include maternal fever. (≧37.8° C.), along with two or more of the following: maternal leukocytosis (≧15,000/mm3), maternal or fetal tachycardia, uterine tenderness, or foul-smelling amniotic fluid.
Because of the inconsistency of clinical features, other adjunctive laboratory tests have been utilized to aid in the diagnosis of IAI. These include: measurement of maternal C-reactive protein, direct examination of amniotic fluid for leukocytes or bacteria on Gram stain, amniotic fluid culture, measurement of amniotic fluid glucose concentrations, detection of amniotic fluid leukocyte esterase, detection of bacterial organic acids by gas-liquid chromatography, measurements of various amniotic fluid or vaginal cytokines (e.g., interleukins 2, 4, 6, granulocyte colony-stimulating factor, and tumor necrosis factor-α), matrix metalloproteinase-9, lactoferrin, and assessment of fetal activity (biophysical profile) by ultrasonography. Measurement of cytokines or other biochemical factors is expensive, generally not clinically available, and is primarily a research tool. Further, the testing efficiency of these tests has not been consistently better than more readily available traditional tests such as amniotic fluid Gram stain and culture, amniotic fluid glucose concentrations, and detection of amniotic fluid leukocyte esterase. The efficiency of these tests has been previously extensively reviewed. (Ohlsson, A. and Wang, E.: An analysis of antenatal tests to detect infection at preterm rupture of the membranes. American Journal of Obstetrics and Gynecology 162:809, 1990). Although all have reasonable sensitivity, specificity, and predictive value none are sufficiently sensitive or specific to be utilized independently of clinical features in the diagnosis of IAI.
Accordingly, there is a great need for new approaches that allow early and accurate diagnosis of IAI and other pathologic maternal/fetal conditions, especially pre-term labor and delivery.
It is particularly desirable to develop new, efficient and reliable non-invasive methods for the diagnosis of chromosomal aneuploidies. At present the definitive diagnosis of chromosomal aneuploidies following maternal serum screening and ultrasound requires a mid-trimester genetic amniocentesis. This is an invasive procedure associated with a 0.5% risk of loss of the pregnancy. Further, chromosomal analysis of amniotic fluid cells is a labor-intensive and time-consuming procedure, taking up to 2 weeks. Reliable tests are therefore necessary to improve the detection of chromosomal aneuploidies from maternal serum, or other biological fluids, reduce the unacceptably high false positive rate of maternal screening, and increase the speed and efficiency of diagnosis from amniotic fluid following amniocentesis. Other pathologic aneuploidic conditions, such as Klinefelter syndrome and Turner syndrome, may be entirely missed by screening with ultrasonography or conventional maternal serum screening.

Diagnosis of intra-uterine infection by proteomic analysis of cervical-vaginal fluids


The semiconductor device comprises a semiconductor substrate 10, a conducting film 20 formed on the semiconductor substrate 10 and including two conductor patterns adjacent to each other; an etching stopper film covering the upper surface of the conducting film 20; an insulation film 28 which includes a contact hole which reaches the semiconductor substrate 10 between the two conductor patterns and the an end of which is positioned on the etching stopper film 22 on the two conductor patterns; and a sidewall insulation film 32 formed on the side walls of the conducting film 20 and of the etching stopper film 22 in the contact hole. The fluctuation of a contact hole size due to disalignment of the lithography can be restrained, and in the lithography step of opening the contact hole, the photoresist can have a large openings size, which facilitate the lithography step.

The present invention relates to a semiconductor device and a method for fabricating the same, more specifically to a semiconductor device including contact holes which are micronized suitably to be used in a highly integrated DRAM and a method for fabricating the same.
As semiconductor devices are larger-scaled and higher-integrated, it is essential to micronize contact holes for interconnecting metallization layers. To this end various structures of semiconductor devices, which permit micronized contact holes to be formed, and various methods for fabricating semiconductor devices of the structures have been proposed.
Conventional semiconductor device fabricating methods which permit micronized contact holes to be formed will be explained with reference to FIGS. 47A-47C, 48A-48B, 49A-49C, 50A-50B, 51A-51D and 52A-52B. FIGS. 47A-47C and 48A-48B are views explaining a first conventional method. FIGS. 49A-49C and 50A-50B are views explaining a second conventional method. FIGS. 51A-51D and 52A-52B are views explaining a third conventional method.
In the first conventional method, two gate electrodes 204 are formed adjacent to each other on a silicon substrate 200 through a gate insulation film 202.
Then, ions are implanted into the silicon substrate 200 with the gate electrodes 204 as a mask to form an impurity diffused layer 206 in the silicon substrate 200 on both sides of the gate electrodes 204.
Then, a silicon oxide film is deposited on the entire surface by, e.g., CVD (Chemical Vapor Deposition) method, and the surface of the silicon oxide film is planarized to form an inter-layer insulation film 208 of the silicon oxide film (FIG. 47A).
A contact hole which reaches the impurity diffused layer 206 formed in the silicon substrate 200 between the gate electrodes 204 is formed in the inter-layer insulation film 208. First, the contact hole 210 is opened between the gate electrodes 204 by the usual lithography (FIG. 47B), and then a silicon oxide film is grown on the entire surface, and a sidewall insulation film 212 of the contact hole 210 is formed by anisotropic etching which vertically advances (FIG. 47C).
In the first conventional method the contact hole 210 which thus arrives at the impurity diffused layer 206 is formed, whereby the contact hole 210 can have a size of below a resolution size limit.
The state shown in FIG. 47C is based on the assumption that no disalignment takes place in the lithography step.
However, in the first conventional method when disalignment takes place in the lithography step for forming the contact hole, the gate electrode 204 is often exposed in the contact hole 210 as shown in FIG. 48A. In this case, the disalignment is small, the gate electrodes 204 are completely covered with the sidewall insulation film 212, but when the disalignment is large as shown in FIG. 48B, a surface of the gate electrode 204 is exposed in the contact hole 210, and a metallization layer (not shown) formed in the contact hole 210 short-circuits with the gate electrode 204.
In view of this, in the second conventional method, as shown in FIGS. 49A-49C, an etching stopper film 214 having etching characteristics different from those of the inter-layer insulation film 208 is in advance formed on the gate electrodes 204.
In the thus fabricated semiconductor device if the contact hole 210 is extended over the gate electrode 204 by disalignment (FIG. 50A), the gate electrodes 204 are completely covered with the sidewall insulation film 212 and the etching stopper film 214, whereby short-circuit between a metallization layer (not shown) formed in the contact hole 210 and the gate electrodes 204 can be prevented.
As means for forming a contact hole, the so-called SAC (self-aligned contact) technique for opening a contact hole in self-alignment with a gate electrode is known.
The third conventional method using the SAC technique will be explained.
First, a device isolation film 222 is formed on a silicon substrate 220. The device isolation film 222 is formed in, e.g., the staggered arrangement as exemplified in FIG. 52A.
Then, a gate insulation film 224 is formed on the surface of the silicon substrate 220 by thermal oxidation.
Subsequently, a polycrystalline silicon film to be a gate electrode, and a silicon nitride film to be an etching stopper film are deposited on the entire surface by, e.g., CVD method, and these films are processed in a pattern of the gate electrode. The gate electrode 226 with the upper surface covered with the etching stopper film 228 is thus formed (FIG. 51A).
Then, a silicon nitride film is deposited by, e.g., CVD method, and anisotropic etching in which the etching vertically advances is performed to form a sidewall insulation film 230 on the side walls of the gate electrode 228 and the of the etching stopper film 228 (FIG. 51B).
Next, a silicon oxide film is deposited by, e.g., CVD method, and then the surface of the silicon oxide film is planarized by, e.g., CMP (Chemical Mechanical Polishing) method to form an inter-layer insulation film 232 of the silicon oxide film (FIG. 51C).
Subsequently, a photoresist 234 having an opening having an opening on a device region defined by the device isolation film 222 as shown in FIG. 52B is formed, and the inter-layer insulation film 232 is etched with the photoresist 234 as a mask (FIG. 50D).
For this etching, etching conditions which make an etching rate of the silicon nitride film forming the etching stopper film 228 and the sidewall insulation film 230 sufficiently lower than an etching rate of the silicon oxide film forming the inter-layer insulation film 232 are selected, whereby the etching stopper film 228 and the sidewall insulation film 230 in the photoresist 234 are not etched with the inter-layer insulation film 232 alone etched. That is, the contact hole 236 can be opened in self-alignment with the gate electrode 224.
However, in the above-described first conventional method, as described above, the gate electrode 204 is often exposed in the contact hole 210 due to disalignment of the lithography.
In the first and the second conventional methods, the contact hole often has size fluctuations due to disalignment in the lithography step.
That is, without the disalignment, the ends of the contact hole is defined by the sidewall insulation film 212 formed on the side walls of the inter-layer insulation film 208 as shown in FIGS. 47C and 49C. When the disalignment takes place, however, as shown in FIGS. 48B and 50B, one end of the contact hole is defined by the sidewall insulation film 212 formed on the side walls of the inter-layer insulation film 208, and the other end of the contact hole is defined by the sidewall insulation film formed on the side walls of the gate electrode 204. Consequently, the contact hole often has a smaller size as the disalignment is larger.
In the third conventional method, the contact holes which are adjacent to each other with the gate electrode therebetween are formed in respective patterns different from each other (FIG. 52B). This is because in forming in one pattern a plurality of contact holes adjacent to each other, in a case that plugs are buried in the respective contact holes by polishing, there is a high risk that the respective plugs may be short-circuited with each other, and in isolating a conductor by lithography, there is an inconvenience that residues tend to take place on the step of the contact hole, and the etching is thus very difficult.
However, in a case that as in the third conventional method, contact holes are very adjacent to each other, it is necessary that a hole size in the photoresist formed by lithography is precise, and disalignment causes the above-described fluctuations of a contact hole size, and control of disalignments must be strict.
In the third conventional method, the sidewall insulation film is formed mainly of silicon nitride film, but there is an inconvenience that the sidewall insulation film of silicon nitride film deteriorates hot carrier immunity of a transistor than the sidewall insulation film of silicon oxide film.
It is empirically known that silicon nitride film formed on an inclined portion has a higher etching rate than that formed on a flat portion. In the third conventional method, in which the inter-layer insulation film is etched with the sidewall insulation film as a mask, an etching selectivity for the silicon nitride film of the inclined region where the upper surface of the sidewall insulation film cannot be sufficiently ensured with a result that the gate electrode is often exposed in the contact hole.

Semiconductor device including contact holes between adjacent conductor patterns and method for fabricating the same


In general, the subject matter described in this disclosure can be embodied in methods, systems, and program products for releasing a vehicle brake. A computing system receives an indication that a user has provided input to cause a momentary release in a vehicle braking system. The computing system provides a signal so as to cause the momentary release in the vehicle braking system. A length of the momentary release in the vehicle braking system is independent of a length of time that the user provided the input to cause the momentarily release in the braking system.

Drivers of drag race vehicles such as cars and motorcycles may position their vehicles in a staging area before the tree activates the green light and the vehicles are permitted to accelerate off of the line. Racing rules, however, may limit the amount of time that vehicles can rest in the staging area. Some vehicles may take an extended period of time to raise energy to a high power band, for example, to spool turbochargers up to their maximum capability.


In a failure section estimating apparatus for a sequential circuit, when it is determined that the failure section is positioned in the current stage combination circuit, an input vector estimating section estimates input vectors each of which sets to a failure state, at least a predetermined output section as a failure output section of an output boundary of a current stage combination circuit of the sequential circuit. A failure output propagation path determining section determines a failure output propagation region in the current stage combination circuit for each of the estimated input vectors to be applied to an input boundary of the current stage combination circuit. The failure output propagation region represents connection paths between the failure output section and input sections of the input boundary to which the failure output section is indirectly connected. A detecting section detects incorrect output sections which represent normal outputs when a test vector is applied to the sequential circuit and incorrect outputs when the each estimated input vector is applied to the input boundary. An incorrect output propagation path determining section determines an incorrect output propagation region for each of the incorrect output sections. The incorrect output propagation region represents connection paths between the each incorrect output section and input sections of the input boundary to which the each incorrect output section is indirectly connected. A failure section estimating section estimates a failure section from the failure output propagation region and the incorrect output propagation region for the each estimated input vector.

1. Field of the Invention
The present invention relates to a failure diagnosis of an LSI of a sequential circuit, and more particularly to estimation of a failure section region of a sequential circuit in an LSI without a failure dictionary.
2. Description of the Related Art
As conventional failure section estimating technique of a sequential circuit of an LSI, various methods are known. For example, in a method, a failure dictionary is previously produced, and the failure dictionary is referred to based on an actually detected failure state to estimate a failure section. Also, there is another method in which the states of flip-flop circuits are read by use of a scan pass to estimate a failure section, as disclosed in Japanese Laid Open Patent Disclosure (JP-A- Heisei 6-194416).
FIG. 1 is a flow chart illustrating an example of the conventional method of estimating a failure section using a failure dictionary. In the conventional example, the simulation when a failure section is inserted in a sequential circuit, i.e., failure simulation is performed using an actual test vector. A failure dictionary data file which indicates a relation of information of the inserted failure section and the failure states of output terminals is previously produced (step S102). After that, a test of a sequential circuit is actually performed using a test vector. The failure dictionary is referred to based on the information of the output terminals of the failure states in the test result to determine a candidate point of the failure section (step S104). This step is performed to all the test vectors. Next, the priority levels are sequentially allocated to the plurality of determined failure candidates from the section having the highest failure possibility for estimating the failure section (step S106).
On the other hand, when a scan pass is used, a checking circuit whose state can be written and read is previously provided in the sequential circuit. The states of flip-flop circuits are set using the checking circuit. After the sequential circuit operates, the states of the flip-flop circuits are read out. The read out states and expected values are compared to determine whether or not the failure state is propagated from a previous stage circuit. The estimation of the failure section is performed based on the determining result.
However, there are problems in the above-mentioned conventional methods of estimating the failure section of the sequential circuit section, as described below.
That is, in the method of using a failure dictionary, it is necessary to previously perform a failure simulation to the whole sequential circuit and to prepare the failure dictionary to the failure outputs. In this case, the failure simulation must be performed, assuming a failure about each of expected nodes such as latch circuits and gate circuits. Therefore, there is a problem in that it takes long time to produce the failure dictionary. In this case, it could be considered that the sequential circuit is grouped into a plurality of parts and that the failure dictionary corresponding to each of the parts is produced. Even in the case, however, a great amount of time would be needed to produce the failure dictionary. The problem would be left that the runtime becomes longer with development of a large scaled sequential circuit.
Also, because a failure model treated in the failure simulation generally is a single degenerated failure, there is the possibility that the estimated failure is not coincident with an actual failure in a multiple failure such as a bridge failure. In such a case, it could be considered that the failure simulation is extended to the multiple failure. However, because the processing time increases to a great extent, the failure simulation is not in practice.
Next, in the method of using a scan pass, it is necessary to incorporate the checking circuit of flip-flop circuits in the sequential circuit. In accordance with, there is a problem that the scan pass method can not be applied in a sequential circuit in which the checking circuit is not incorporated.

Estimation of failure section region with small simulation calculation quantity


A system for implementing a radio over fiber (RoF) transmission in a passive optical network (PON), said passive optical network comprising a trunk line, a remote node, and a plurality of leaf nodes connected to said remote node, wherein one of said plurality of leaf nodes comprises a baseband processing unit for performing a baseband processing on a signal received via said trunk line to perform the transformation to radio over fiber by generating a radio over fiber signal and to forward the resulting radio over fiber signal to said remote node, wherein said remote node is adapted to forward the radio over fiber signal received from said leaf node to the other leaf nodes of said passive optical network.

A passive optical network (PON) is an access network technology that connects a central office entity called "Optical Line Terminal OLT" with the customer premises equipment called "Optical Network Unit ONU" over a maximum distance of several 10 kms. The devices are connected by optical fibers that are deployed in a tree structure. PONs are currently considered as a candidate for access network sharing as the optical fiber offers high bandwidth and is already deployed to a large number of customers.
(Access) network sharing is a paradigm that allows different operators, e.g., a mobile and a fixed operator to use the 'last mile' of the network conjointly. While the fixed operator uses this access part to directly attach its customers, the mobile operator uses the access to connect base stations. In access network sharing, the two networks will run on the same hardware (i.e. devices and physical links), but will be logically separated.
Radio over fiber (RoF) is a technology widely used in the design and the deployment of base stations, in which a baseband processing unit (BBU) is connected via an optical link to the radio equipment and via this to an antenna. The BBU receives the signals from the core network of a mobile operator, e.g. in case of a LTE network the evolved packet core EPC S1 signals and converts them to RoF signals, these are transmitted via the optical link to the radio equipment/antenna unit (which will be called remote radio head in the following sections) where they are modulated on the wireless channel.
If there is provided one BBU for each remote radio head, the hardware costs are significant. It is therefore desirable to use an approach where the baseband processing resources are "pooled" such that one BBU serves several remote radio heads. It is even further preferable if the network over which the RoF signals are transmitted is shared with a fixed network operator.
Such scenarios will now be explained in somewhat more detail in the following.
Radio-over-fiber is the digitized or analogue transmission of the radio layer signals via an optical fiber. Digital radio over fiber requires large amounts of bandwidth, between 10-30 times the bytes of the S1 traffic are necessary. A typical site with 3 cells with 1 Gbps S1 traffic each (for LTE-A) thus can require 60-70 Gbps RoF capacity. It is difficult to fit this high amount of bandwidth into a (shared) PON system. The presently most advanced TDM PON systems on the market today support 10 Gbps, shared between all users of the PON. WDM PON systems might support higher bandwidths, but whether 60-70 Gbps for a single user can be supported in the near future is questionable.
One alternative is to multiplex digital RoF signals via high-capacity, long-range technologies like CWDM or DWDM (coarse/dense wavelength division multiplexing) on the shared PON. However, both systems have their disadvantages: while CWDM is cheap, it uses a lot of the optical spectrum, which might be already occupied by the different FTTH systems. DWDM requires only a low amount of spectrum, however it is quite costly.
Another alternative is analogue RoF, however this only works via short distances as the transmission distance is limited by fiber distortions and non-linearities. At the same time, there is a trend in the fiber-to-the-home community to create access networks with long optical reach. This is advantageous as the amount of central offices can be reduced, thus saving CAPEX and OPEX.
When one looks at access network sharing and RoF, it becomes clear that this trend becomes problematic: it is the goal of FTTH-operators to cover larger and larger areas from a central location for cost saving reasons; however a mobile operator can only cover a part of the area with a centralized baseband pool and analogue RoF. Thus, the coverage area is not the same, and the mobile operator has to resort to (at least in the peripheral of the network, where a transmission of RoF signals from the central office is not possible) deploy conventional base station technology, without the benefit of baseband pooling.
As mentioned above, high-capacity long-range digital technologies also have their disadvantages with respect to spectrum usage and/or cost. Furthermore, (digital) RoF transmission distance is also limited from an unexpected direction, the radio layer: certain wireless protocols require a reaction within a strict time limit. A wireless signal that requires such a reaction initially arrives at the antenna, is then transmitted via RoF to the baseband processing where it is decoded and such a reaction is calculated. The reaction is transmitted back to the antenna, again via RoF, and then sent out wirelessly. In this processing and transmission chain, each kilometer of fiber over which the RoF signal is transported adds latency due to the pure signal propagation delay, while the overall time is limited by radio layer standards.
The three known approaches for baseband pooling and/or network sharing are illustrated in FIG. 1. The first one (shown on the left-hand side in FIG. 1) is the centralized baseband pooling at the PON's central office location with analogue or digital RoF. This has the above outlined limitations. The second solution (shown in the center of FIG. 1) is a distributed baseband processing, in which each unit connected to the passive optical network is a complete base station. Obviously, this approach does not allow realizing baseband pooling gains and only can achieve network sharing.
The last know solution (shown on the right-hand side in FIG. 1) is one in which the baseband processing unit is connected to one of the leaf nodes, and the remote radio heads of the other leaf nodes are connected to it via a dedicated network. Here, the length of the PON tree trunk is not problematic; however, the mobile operator has to deploy new fibers to attach the remote radio heads, thus not being able to realizing the network sharing gains.
It is therefore desirable to have a system where baseband pooling gains and network sharing gains can be achieved simultaneously, and even in cases where the PON covers a long distance. None of the existing solutions has such capabilities.

System for implementing a radio over fiber transmission in a passive optical network


A clinical predictive and monitoring system comprising a data store operable to receive and store data associated with a plurality of patients selected from medical and health data; and a number of social, behavioral, lifestyle, and economic data; at least one predictive model to identify at least one high-risk patient associated with at least one medical condition; a risk logic module operable to apply the at least one predictive model to the patient data to determine at least one risk score associated the at least one medical condition and identify at least one high-risk patient; a data presentation module operable to present notification and information to an intervention coordination team about the identified at least one high-risk patient; and an artificial intelligence tuning module adapted to automatically adjust parameters in the predictive model in response to trends in the patient data.

The practice of medicine is increasingly characterized by overwhelming amounts of information, new knowledge in diagnostics and therapeutics, and highly fragmented care environments, with potentially hundreds of different individuals delivering care to a single patient across healthcare settings. Coordinating clinical decisions to advance the care and treatment of patients within this environment poses significant challenges. Hospital readmission is an important example of the type of problems health systems face in allocating critical resources in the midst of this fragmented environment.
Many patients are unnecessarily readmitted to the hospital. A 2009 study published in the New England Journal of Medicine (Jencks, S. F., et al., "Rehospitalizations among Patients in the Medicare Fee-for-Service Program," The New England Journal of Medicine, 360 (2009): 1418-28) demonstrated that almost one-fifth of Medicare patients were readmitted to the hospital within 30 days of discharge and 34% were readmitted within 90 days. This research estimated that only 10% of these readmissions were planned and that the annual cost to Medicare alone of unplanned hospital readmissions exceeds $17 billion.
For example, patients with heart failure, the leading diagnosis for acute care hospitalization and readmissions for patients over the age of 65, face particular challenges in transitioning from the hospital to home, and hospital readmissions are common for these patients. Preparation for discharge is often fragmented, and many patients and families feel ill-prepared for discharge. Upon discharge, responsibility for management of patients reverts back to their primary care provider, who may have no record of the care or medications given during the hospital stay. This lack of coordinated care results in frequent readmissions, with a large percentage of patients discharged with heart failure being readmitted to the hospital within several months.
While not all readmissions are preventable, it is estimated that a significant percentage of heart failure readmissions is avoidable with better patient education, better communication with the patient and the patient's primary care provider, ensuring that the patient has appropriate follow-up scheduled at the time of discharge, and other targeted intervention and treatment. However, most hospitals fail to consistently implement most or all of these elements. Many interventions can be expensive and complicated to perform in the real world. One of the reasons why efforts can fail is that hospitals have difficulty identifying patients that are truly at risk for readmission and for which interventions should be a high priority.
If high-risk patients could be more easily and accurately identified early in their hospital stay (e.g., in the Emergency Room or upon admission), the right interventions could be performed on the population for which it is most needed, thereby lowering overall heart failure readmission rates. Today, most hospitals attempting to identify patients at risk are doing so manually, without leveraging the information available in their electronic health records. Hospital readmission is one of potentially thousands of adverse clinical events that could be prevented by electronic identification, targeting, coordinating and monitoring throughout the inpatient and outpatient environment. This disclosure describes software developed to identify and risk stratify patients at highest risk for hospital readmissions and other adverse clinical events.

Clinical predictive and monitoring system and method


An improved method to set up automatically a computer system configuration in association with a system upgrade that involves the installation of a set of operative elements necessary for the reliable operation of the same. The correct, operative combination of hardware, system and application software components is accomplished by inter-component dependency checking and improved conflict resolving procedures in association with specific dependency rules tables and an ordered database that stores definitions of components and relationships thereof.

1. Field of the Invention
The present invention relates generally to a method that establishes a correct combination of different hardware and software entities necessary for the reliable operation of a computer system and more particularly to an improved method for resolving dependency conflicts across diverse sets of functional entities while installing or removing specific operative elements in a computing environment.
2. Discussion of Related Art
Computing environments include hardware components and software components. The components are divided into various types: processor devices, disk devices, printer devices, software packages, software libraries, kernel bases, kernel parameters, kernel modules, drivers, configuration files, flags, application packages and the like. The software elements also referred to as modules, or programs, comprise a multitude of executable instructions in hardware-readable format. The components are having diverse functionality or applications. Hardware devices are analog interfaces to the real world and perform physical work such as switching electronic circuits, transmitting electrical signals, magnetizing coils, pressing ink into paper surfaces, and the like while software modules operate in a digital mode and control both the operation of the hardware devices, the operation of other software modules in a preset manner, supply various services involving data manipulation and computation by receiving, processing, transforming and outputting information units in a predefined manner. System software modules such as kernel modules supervise, manage and control the operations of the computing environment in its entirety.
Typically in a computing environment various hardware and software entities operate in close co-operation. Therefore, within a typical computing environment a plurality of hardware and software entities have multiple dependency relationships with a plurality of other hardware and software entities. Such a dependency relationship could be defined as follows: in an exemplary computing environment for component 'A' to perform correctly, component 'B' and component 'C' are both needed. Therefore, in the exemplary computing environment such as an operating system platform the utilization of component 'A' necessitates the presence of component 'B' and the presence of component 'C'.
Computer systems are practically never static. Frequently changes have to be made. Changing requirements of the environment necessitates the addition and/or replacement of hardware devices or software modules thereby inducing the addition and/or replacement of other software modules. Improved versions of present devices or modules effect the replacement of older versions thereof. New, state-of-art software packages are installed repeatedly in a dynamic process of development and growth. Modifying a computer system typically involves installation or removal of hardware devices or software modules—a process referred to as upgrading the system. When performing the predefined procedures necessary for an upgrade to be implemented frequently dependency conflicts arise among the components present and the components to be installed. Such dependency conflicts turn the upgrading process into a complicated, prolonged, difficult, and sometimes unsuccessful operation.
Conventionally, users utilizing specific installation utilities perform the installation and the update of components. The majority of utilities operate in a basic fashion; installable components are installed, replacing, if necessary, present components, no dependency checks are made therefore, no attempts are made to solve the dependency conflicts.
Some more advanced utilities perform dependency checks, typically abort the installation process when required and also inform the users in regard to the conflicts but make no attempts to solve the related problem.
Formerly, the present applicant submitted several patent applications including a method and system operative in resolving and preventing conflicts occurring during software installation within a computing system. The above-mentioned applications are listed above in the present application. One or more of the above-mentioned applications suggests a system and method for the substantial resolution and prevention of potential operational conflicts between diverse software components being installed. The present invention is substantially based on the method and system offered by the above-mentioned prior applications. The present invention proposes the utilization of several sub-methods to provide for enhanced execution times in certain computing environments wherein the timing factor is substantially important or even critical. The sub-methods are introduced in the form of additional executable software modules designed to be installed in the computing environment such that the activation of the extra modules is achieved by appropriate modifications in the main logic module of the method. For example, specific "call" instructions that contain the memory addresses of the sub-modules thereby made operative in the loading, the initialization and the activation of the additional sub-methods could be introduced at suitable address locations in the instruction sequence of the main logic module.
It will be obvious to those skilled in the art that there is a long felt need for a comprehensive, totally automated installation utility to assist users of small and medium-size computer system platforms in the exacting task of managing complex and dynamically evolving computing systems. Specifically there is an urgent need for an effective installation utility designed to resolve automatically inter-component dependency conflicts so as to enable routinely the accomplishment of fast, solid, efficient and convenient computer system upgrades.

Component upgrading with dependency conflict resolution, knowledge based and rules


In an apparatus for evaluating the performance characteristics of fiber optic endoscopes, a frame defines a carrier support, and an upstanding arm support mounted rearwardly of and adjacent to the carrier support. A plurality of targets are supported on a carrier movable along the carrier support, and an angularly adjustable mounting arm for supporting an endoscope is pivotally coupled to the arm support for movement relative to the plurality of targets supported on the carrier. A bracket is supported on the mounting arm and is adjustable in an axial direction of the mounting arm to accommodate endoscopes of different lengths. A plurality of endoscope holders are each receivable within the bracket on the mounting arm and each holder defines a different diameter corresponding to a respective endoscope for holding endoscopes of different configurations. Each of the targets supported on the carrier is configured to perform a different test for evaluating the performance characteristics of both the lens and fiber optic wires of the endoscope. The tests include a reflective loss in fibers test; a reflective symmetry test; a lighted optic fibers test; a geometric distortion test; and a modulation transfer function test.

A typical endoscope comprises a cylindrical stainless steel case enclosing a bundle of fiber optic wires which transmit light from a distal end (tip end) to a proximal end of the endoscope. A fiber optic cable delivers light from a light source into the case through an aperture situated near the proximal end of the endoscope. The fiber optic wires transmit the light through to the distal end, where the light exits the endoscope and illuminates the area near the distal end. The endoscope in turn transmits an image of that area through the fiber optic wires to an eyepiece lens at the proximal end. A video camera coupled to the eyepiece converts the image into electronic signals and transmits the signals to a video monitor, where the image is displayed.
Endoscopes are used most often in "minimally invasive surgery", in which an endoscope is inserted into a patient, allowing a surgeon to illuminate and view the interior of the patient with minimal penetration. The use of endoscopic surgery is growing, in large part because it is generally safer and less expensive than conventional surgery, and patients tend to require less time in a hospital after endoscopic surgery. As endoscopic surgery becomes more common, there is an increasing need to accurately evaluate the performance characteristics of endoscopes.
To accurately test the optical performance of an endoscope, both the lens and the fiber optic wires should be evaluated. For example, some fiber optic wires may be damaged and only partially transmit light. In addition, the lens may distort images or blur the sharpness of image colors. These and other shortcomings in the optical performance of endoscopes may be the result of imperfections in the manufacturing process and/or may develop as the endoscope is used over time.
A further complication is that endoscopes vary in length, diameter and tip angle, which is the angle between the direction of view of the longitudinal axis of the endoscope. A system for evaluating endoscope performance ideally would be able to test and evaluate the performance characteristics of both the lens and fiber optic wires of an endoscope, and have the further capability of accommodating endoscopes having varying physical characteristics.

Apparatus for evaluating the performance characteristics of endoscopes


Devices, systems and methods for establishing a blood flow conduit between a chamber in a heart of a patient and a remote location. A blood inflow cannula having an outer surface and proximal and distal end portions. The distal end portion is configured for insertion into the chamber of the heart. First and second anchor elements have respective maximum width dimensions extending outwardly from the outer surface of the cannula. The first anchor element is positioned more distally than the second anchor element defining a tissue receiving space therebetween. The maximum width dimension of the first anchor element may be larger than the maximum width dimension of the second anchor element in use. The first anchor element is configured to be positioned inside the heart chamber and the second anchor element is configured to be positioned outside the heart chamber with heart tissue held in the tissue receiving space therebetween.

Various devices and methods have been utilized to conduct blood from the heart to assist with blood circulation in a patient. This is often desirable or necessary in cases where a patient is experiencing congestive heart failure and a transplant organ has either not been located, or the patient is not a suitable candidate for a transplant. The blood pumps are typically attached directly to the left ventricle of the heart, however, at least one blood pump system locates the pump remotely, such as subcutaneously in the manner of a pacemaker. In this regard, see U.S. Pat. No. 6,530,876, the disclosure of which is hereby fully incorporated by reference herein. In this situation or similar situations, a cannula may be used to create an inflow conduit from the heart (an intra-thoracic location) to a pump located in a superficial (non-thoracic cavity) location, which may be the so-called "pacemaker pocket." Of course, other remote locations are possible as alternatives. The pacemaker pocket is a location usually accessed by a surgical incision generally parallel to and below the collarbone extending down toward the breast, and over the pectoral muscle. Sometimes the pacemaker pocket is made below the muscle. The pump, to which the cannula is connected, is intended to sit in the pectoral pocket, and is preferably but not limited to the right side of the chest.
One area in need of improvement is the anchoring mechanism used to fluidly connect the inflow conduit or cannula to the heart. The cannula can be connected and anchored to any chamber of the heart from which it is desired to conduct or conduit blood. One anchor point is the left side of the heart, such as the left atrium. This is shown in U.S. Pat. No. 6,530,876. It would be desirable to ensure that this connection is as secure and leakage free as possible. In addition, the procedure for making the connection should be as simple as possible under the circumstances.
General cannula implantation methods known and usable in connection with the present invention may involve many different approaches and several of the representative approaches are described further below. For example, the cannula may be implanted by directly invading the thoracic cavity. Other surgical methods include so-called open heart surgery in which a median sternotomy is made to fully expose the heart within the thoracic cavity. Still other surgical methods include less invasive surgical methods such as a thoracotomy, mini-thoracotomy, thoracoscopic, or any other less invasive approaches. Any of these surgical methods can be used to implant the cannula in fluid communication with any desired location of the heart as described herein.
Alternatively, a transluminal method of implanting the cannula may be used in which the thoracic cavity is not invaded directly, but rather the heart is accessed utilizing blood vessels naturally connecting into the heart. Translumial methods include so-called transvenous delivery of the cannula to the left side of the heart via the right side of the heart to which the major veins and the more distal peripheral veins provide natural conduits through which the cannula can be delivered. In this approach, the cannula may more precisely be referred to as a catheter. Transluminal methods generally utilize indirect visualization, such as by means of contrast-dye enhanced fluoroscopy and/or ultrasonic imaging to navigate devices through the vessels of the body.

Devices, methods and systems for establishing supplemental blood flow in the circulatory system


There is provided a system having

1. Field of the Invention
This invention relates to a data processing system having an external instruction set and an internal instruction set, for example to such systems having instruction cache memories, particularly using a memory structure combined with a software or hardware translator to decouple the externally visible instruction sets of a processor from the internally implemented instruction sets.
2. Description of the Prior Art
It is known from U.S. Pat. No. 6,332,215 to provide a system in which external Java bytecodes are translated into internal native processor instructions by instruction translation hardware.
It is known from the trace cache mechanisms of the Pentium IV processors produced by Intel Corporation to store data representing the previous execution path through a set of basic blocks of computer code such that a speculative trace may be easily fetched without having to individually fetch its constituent basic blocks as a measure to increase processing speed within a deeply pipelined system. The trace information is stored in a conventional cache using fixed-sized lines with pointers in the tags to specify the speculative trace structure. As will be seen, the present invention is not built on top of a traditional cache structure; it implements a temporal cache consisting of variable sized blocks on top of a standard RAM structure, which facilitates greater space efficiency and faster operation.
It is known in the microprocessors produced by Transmeta to provide a system in which software is used to translate from a non-native instruction set into a native instruction set and then manage that translation for execution upon the processor.
It is known to provide microprocessors which support multiple external instruction sets. An example of these are ARM architecture microprocessors which currently support three external instruction sets, namely the ARM, Thumb and Java instruction sets. Whilst it is desirable to be able to extend the number of different instruction sets supported by a particular microprocessor, a multiplicity of instruction sets tends to introduce extra complexity in the decoder, which in turn can adversely impact the performance and power consumption of the processor.

Data processing system having an external instruction set and an internal instruction set

Abstract: There is provided a system having

Abstract: an execution core operable to execute internal instructions.

Abstract: A translation buffer is operable to store a plurality of internal instruction blocks of one or more internal instructions where the internal instruction blocks are a dynamic translation of respective external instruction blocks of one or more external instructions.

Abstract: A remapper is responsive to an execution request for an external instruction that is within one of said external instruction blocks to identify a corresponding internal instruction block stored within said translation buffer. Thus one or more internal instructions from said corresponding internal instruction block can be supplied to execution core.


An etching process is employed to selectively pattern the exposed magnetic film layer of a magnetic thin film structure. The magnetic structure to be etched includes at least one bottom magnetic film layer and at least one top film layer which are separated by a tunnel barrier. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the tunnel barrier layer.

MRAM has tremendous potential as a nonvolatile, solid-state memory to replace flash memory and electronically erasable programmable read-only memory (EEPROM). To enhance the performance of MRAM chips, it is necessary to reduce the lithographic minimum printable size. However, ion beam etching (IBE), a.k.a. ion milling, has been essentially the only method available for creating fine patterns, e.g., submicron patterns, in magnetic thin film structures. Because of the lack of volatile compounds for ferrous metals other than carbonyl, reactive-ion etching (RIE) has not been a viable technique for patterning thin magnetic films; and a RIE process based on carbonyl chemistry has not yet been developed. Thus, a chemical etching technique for patterning magnetic thin films based on Fe, Co and Ni is attractive because of the thin film nature of MRAM magnetic films (20–50 Å z-direction) relative to the x-y dimensions of patterned magnetic tunnel junction (MTJ) elements. The MRAM structure represents a complex multilayer system which includes numerous magnetic thin film layers. A typical MRAM structure is shown in FIG. 1. Specifically, the thin film structure shown in FIG. 1 comprises Si substrate 10, SiOx layer 12, a 150 Å Ti layer 14, Ni81Fe19 (40 Å) layer 16, Ir20Mn80 (120 Å) layer 18, Co90Fe10 (20 Å) layer 20, Al2O3 (10 Å) layer 22, Ni81Fe19 (40 Å) layer 24 and Ti (100 Å) layer 26. In this prior art magnetic structure, Al2O3 layer 22 serves as a tunnel barrier between the top magnetic film layer, i.e., Ni81Fe19 layer 24, and antiferromagnetic layer 18 and magnetic layers 16 and 20 which are present beneath the tunnel barrier layer. Layer 26 is a passivating layer that prevents moisture, air or other contaminants from entering into the structure, while layer 14 is an adhesion layer.
As is well known to those skilled in the art, the magnetic films of prior art MRAM structures, such as illustrated in FIG. 1, are quite thin. Patterning of the MRAM structure of FIG. 1 is typically carried out in the prior art by first applying a mask to the MRAM structure and patterning the mask by lithography (exposure and development). FIG. 2 shows the structure after these steps wherein reference number 28 represents the patterned mask. The pattern is then transferred to the MRAM structure by first removing the top 100 Å Ti film 26 of the MRAM structure by RIE, IBE, or wet etching. Next, the exposed Ni81Fe19 (40 Å) layer 24 can be pattern-wise etched by RIE, IBE, or wet etching. In a traditional wet etching process, a standard aqueous acid solution, such as sulfuric and/or nitric acid, is employed to etch the exposed Ni81Fe19 (40 Å) layer 24. Although the acid etchants are capable of etching through the exposed top magnetic layer 24 of the structure, the acid etchants are not selective for removing just that exposed magnetic layer 24. Instead, when the acid etchants are employed, they also etch the underlying alumina tunnel barrier layer 22, the Co90Fe10 layer 20, and some Mn in the Ir20Mn80 layer 18 providing the structure shown in FIG. 3.
Despite being capable of etching numerous magnetic layers in the MRAM structure, the use of prior art aqueous acid solutions causes Galvanic-coupling-accelerated dissolution of the Co90Fe10 (20 Å) 20 layer in the film region under the mask which is unacceptable for many applications. A desirable situation would be to etch through the top passivating layer 26 and the top exposed magnetic layer, i.e., layer 24, stopping at the thin Al2O3 layer 22, thereby leaving the underlying layers, i.e., layers 16, 18, and 20, unetched.
U.S. Pat. No. 6,426,012 describes a process of selectively etching the top magnetic layer of a magnetic structure stopping on the alumina tunnel barrier via the use of a dicarboxylic acid aqueous etchant solution. However, the acids employed in U.S. Pat. No. 6,426,012 are limited to weak acids which are subject to limited solubilities.
There is thus a need for developing another etching process which is capable of selectively etching the magnetic thin film structure so as to provide a patterned structure wherein the pattern is not formed in the tunnel barrier layer. Such an etch process would be beneficial since it would prevent unwanted Galvanic corrosion of the inner magnetic layers, while being able to pattern the top magnetic film layer and the tunnel barrier layer of the structure.

Selective chemical etch method for MRAM soft layers

International Business Machines Corporation


A temperature detection circuit that can detect temperature with high accuracy regardless of manufacturing variations, and a method of adjusting the same. The circuit includes: first and second diodes having respective independent p-n junctions; a first current path including a first variable voltage dividing resistor series connected to the first diode; a second current path including a second variable voltage dividing resistor series connected to the second diode; a reference voltage generation part that feeds back a differential voltage to each of the first and second current paths and outputs as a reference voltage the differential voltage indicating a difference between a first divided voltage of the first variable voltage dividing resistor and a potential on the second current path; and a temperature detection signal generation part generating a temperature detection signal based on a second divided voltage of the second variable voltage dividing resistor.

1. Field of the Invention
The present invention relates to a temperature detection circuit, and more particularly to a temperature detection circuit for detecting a temperature of a semiconductor integrated device and a method of adjusting the same.
2. Background Art
Electronic devices including semiconductor integrated devices are configured to activate a protection circuit when the device temperature inside exceeds a predetermined temperature in order to prevent a malfunction or damage occurring from heat generation during operation. For example, a thermistor may be used to detect the temperature inside a device. Thermistors typically have large manufacturing variations. For accurate temperature detection, expensive thermistors with less manufacturing variations have needed to be used.
To detect the temperature inside an electronic device without using a temperature sensor such as a thermistor, a technique for generating a temperature-independent reference voltage by a bandgap reference circuit has been proposed (for example, see FIG. 1 of Patent Literature 1). The bandgap reference circuit generates a negative feedback voltage for equalizing the base-emitter voltages of first transistors (65 to 67) and second transistors (68 to 70) having different emitter areas by an operational amplifier (61), and outputs the voltage as a reference voltage (Vbgr). The base-emitter voltages decrease with the increasing semiconductor temperature. Since the first transistors and the second transistors have different emitter areas as described above, the degree of decrease of the base-emitter voltages of the first transistors due to a temperature increase is different from that of the base-emitter voltages of the second transistors due to the temperature increase. At absolute zero, the base-emitter voltages converge to the band gab voltage resulting from the semiconductor band gap energy irrespective of the emitter areas. In other words, the difference between the base-emitter voltages of the respective first and second transistors corresponds to the amount of voltage change due to the temperature change. The foregoing operational amplifier then operates to cancel the amounts of decrease of the base-emitter voltages due to the temperature change, whereby a reference voltage having the band gap voltage independent of temperature changes is generated.
However, the resistors (R1 to R5), the transistors (65 to 70), and the operational amplifier (61) used in the bandgap reference circuit are also subject to characteristic changes because of manufacturing variations. There has thus been the problem that accurate temperature detection is difficult.

Temperature detection circuit and method of adjusting the same


Systems, apparatus and methods for the implementation of high-speed network analyzers are provided. A set of high-level specifications is used to define the behavior of the network analyzer emitted by a compiler. An optimized inline workflow to process regular expressions is presented without sacrificing the semantic capabilities of the processing engine. An optimized packet dispatcher implements a subset of the functions implemented by the network analyzer, providing a fast and slow path workflow used to accelerate specific processing units. Such dispatcher facility can also be used as a cache of policies, wherein if a policy is found, then packet manipulations associated with the policy can be quickly performed. An optimized method of generating DFA specifications for network signatures is also presented. The method accepts several optimization criteria, such as min-max allocations or optimal allocations based on the probability of occurrence of each signature input bit.

The process of developing technology often involves two parallel efforts: (1) the development of a new technology and (2) the development of peripheral tools for the performance analysis and behavior evaluation of the technology itself. While the field of computer science provides uncountable examples of technologies that have been developed hand in hand with such peripheral tools, two of these technologies have taken a pivotal place during the past fifty years: the computer and the Internet.
There exist at least two broad reasons for the need of analytical tools to measure the performance and behavior of Internet computing systems. First, at the early stages of development, systems are simple and their performance can usually be characterized through direct naked-eye observation. As the technology matures, its complexity increases, often to a point where its behavior is no longer easy to predict. The Internet provides a good example of such evolutionary transition. Its current behavior is both a function of (arguably) predictable computer behavior and unpredictable psychology-based human behavior. Such is the case that computer scientists have long tried to model its behavior borrowing tools from branches of math such as stochastic processes, game theory or even fractal and chaos theory. (A. B. Mackenzie, S. B. Wicker, Game theory in communications: motivation, explanation, and application to power control, IEEE Global Telecommunications Conference, 2001; M. E. Crovella, A. Bestavros, Self-similarity in World Wide Web Traffic: Evidence and Possible Causes, IEEE/ACM Transactions on Networking, 1996.) This evolutionary need for performance analysis tools arises in most of the technologies that achieve certain complexity.
Second, for the past fifty years, our economic and social superstructures have evolved to a point where almost any transaction (both economic and social) requires some form of involvement of the Internet and our computer systems. Key resources such as energy, water, communication or the stock market, to name a few, depend on the proper functioning of these two technologies. Such is the case that they are recognized as national security infrastructures subject to possible cyber attacks. (V. Paxson, Bro: A System for Detecting Network Intruders in Real-Time, Proceedings of the 7th USENIX Security Symposium, 1998.) To protect the well-being of our society, it is therefore crucial to dispose high-performance peripheral tools capable of analyzing the behavior of the networks to detect malicious usages.
Current architectures of these analysis tools are being driven to a breaking point by two independent challenges: first, as network data-rates increase, these tools are being overwhelmed by the quantity of computation they must perform to continuously analyze the network; second, as computer network systems become more sophisticated, the parsing of the network flows requires ever more complex traffic analysis heuristics that further stress the system's processing capacity.
Therefore there exists a need for a set of systems and methods that focus on the high-performance implementation of peripheral tools.

System, apparatus and methods to implement high-speed network analyzers


Embodiments provide a data processing system comprising first initialisation software to initialise the data processing system, means to access storage comprising a first region and a second region comprising first software; the system further comprising second initialisation software arranged, using information associated with the second region, to access the second region to launch the first software.

Modern computers have become very sophisticated in the range of services they can offer. Not only can computers be used for the conventional day-to-day processing tasks, they invariably contain some software, diagnostics software for example, that can assist in the event of a malfunction of the computer. Usually, the diagnostics software is specific to the manufacturer or distributor of the computer system. For example, Hewlett Packcard Company has very sophisticated diagnostics and technical support tools and processes, which can be immensely useful in the event of a malfunction.
However, once a customer has taken possession of a computer there is little that can be done to protect the support or diagnostics software. In particular, large organisations that use a significant number of computers might find it cost effective to roll-out those computers using exactly the same HDD image on all computers; that image having been thoroughly tried and tested. This approach allows the organisation to reduce their IT infrastructure and support costs. Often the process of creating identical disc images involves reformatting the HDD or removing existing software and replacing it with alternative software. In either case, there is a significant risk that the diagnostics and support software described above will be at least corrupted and possibly removed completely.
The structure of a physical disc such as, for example, an HDD, is such that it contains a number of primary partitions. A primary partition is a portion of a physical disc that functions, in effect, as a separate disc. For master boot record (MBR) discs, up to four primary partitions can be created, or three primary partitions together with an extended partition. For basic GUID partition table (GPT) discs, up to 128 primary partitions can be created. Extended partitions, which can be created for master boot record discs only, are useful if more than four volumes are required on a basic MBR disc.
It is often the case that discs are partitioned into at least two portions. The first portion is known as a data portion and is used, as is conventional, to hold the operating system and any associated applications and data stemming from the operating system or applications. A second portion of such a partitioned disc might be a hidden partition that is usually inaccessible to all but the most sophisticated of computer users due to their specialist nature. Furthermore, conventional applications that run on top of an operating system can only access and manipulate data and software contained within the partition or partitions to which the operating system belongs. Therefore, it can be appreciated that the hidden partition is inaccessible to such applications, which include applications for creating disc images
Therefore, hidden partitions are used by computer manufacturers to store technical support software such as the above-described diagnostics software. This software might be used to provide technical support to a user in the event that the user's computer has suffered a fault even if the disc has been reformatted or a disc image has been used to over-write an existing disc image.
However, the hidden partition, and, therefore, the software and data contained within such a hidden partition are accessible only from the BIOS. It will be appreciated that BIOS manufacturers are separate legal entities to the computer manufacturers. Therefore, there is currently little computer manufacturers can do to control or encourage access to the hidden partition by altering the system BIOS as the content of the system BIOS is under the control of a third party. Furthermore, having an uncorrupted system BIOS is crucial to the correct operation of the computer. Therefore, altering the system BIOS is not to be undertaken lightly, which implies that access to the software and data within the hidden partition is not generally available.
It is an object of embodiments of the present invention at least to mitigate some of the problems of the prior art.

Hewlett-Packard Development Company, L.P.


A method for treating neoplastic disease in a mammal via administering to the mammal a therapeutically effective amount of an interferon via oromucosal contact. The amount of interferon administered is less than an amount which induces a pathological response when administered parenterally.

Alpha interferons are used widely for the treatment of a variety of hematological malignancies including hairy cell leukemia, chronic myelogenous leukemia, low grade lymphomas, cutaneous T-cell lymphomas, and solid tumors such as renal cell carcinoma, melanoma, carcinoid tumors and AIDS-related Kaposi's sarcoma (Gutterman, J. U., Proc. Natl. Acad Sci. USA, 1994 91: 1198-1205). Antitumor effects are usually seen at high dosage levels, often of the order of tens of millions of units of interferon-.alpha. (IFN-.alpha.), administered by parenteral injection. Interferon-.alpha. is a Type I interferon, a class which also includes the .beta. and .omega. interferons. Although a number of routes of administration, including intravenous, subcutaneous, intramuscular, topical, and intralesional injection, are commonly employed for the administration of type I interferons, the oral route has not been generally used, because interferons are proteins which are considered to be inactivated by proteolytic enzymes and which are not absorbed appreciably in their native form in the gastrointestinal tract. Indeed a number of studies have failed to detect interferons in the blood following oral administration (Cantell and Pyhala, J. Gen. Virol., 1973 20: 97-104; Wills et al, J. IFN Res., 1984 4: 399-409; Gilson et al, J. IFN Res., 1985 5: 403-408).
There have been a number of anecdotal reports of efficacy of low doses of interferon administered as a nasal spray or as an oral liquid formulation in the treatment of a variety of conditions, particularly influenza. A series of patent specifications has described the use of low doses of orally administered interferon of heterologous species origin for the treatment of infectious rhinotracheitis ("shipping fever") in cattle, and of feline leukemia, and also treatment of other conditions, for enhancement of efficiency of vaccines; for improving the efficiency of food utilization; and for prevention of bovine theileriosis. See U.S. Pat. No. 4,462,985, Australian Patent No. 608519, Australian Patent No. 583332 and U.S. Pat. No. 5,215,741 respectively. In addition U.S. Pat. No. 5,017,371 discloses the use of interferon in this way for treatment of side-effects of cancer chemotherapy or radiotherapy. In these specifications, the interferon used was human interferon-.alpha. prepared by the method of Cantell, administered in phosphate buffered saline, at a dose of 0.01 to 5 IU per pound body weight. While these specifications suggest that such low doses of interferon administered to the oropharyngeal mucosa, preferably in a form adapted for prolonged contact with the oral mucosa, may be efficacious for treatment of a wide variety of conditions including cancer, the experimental evidence for conditions other than shipping fever, feline leukemia, canine parvovirns and theileriosis is largely anecdotal. In particular, no properly controlled trials of this treatment in any animal model for human cancers are presented.
In contrast, the invention disclosed herein is based upon the first controlled study in an animal model of the efficacy of oromucosally administered interferon for the treatment of neoplastic diseases.

Stimulation of host defense mechanisms against tumors


A system for tax tracking of blended goods may include a value tracking server configured to, at a time of sale of an item including materials blended together, collect relative material quantities in the item, each of the materials having different respective tax rates associated therewith, and generate an identification (ID) for association with the item. The value tracking server may also be configured to, at a time of return, read the ID from the item to determine the relative material quantities in the item, determine a returned portion of the item, and determine a tax refund due based upon the relative material quantities, the respective tax rates, and the returned portion of the item.

A particular good may have a respective tax rate associated therewith. In other words, upon the purchase of the good, a tax may be due, for example, to a taxing authority. The tax due may be calculated based upon an amount of the good being purchased.
Sometimes, a good may be blended, for example, upon purchase with one or more other goods, for example, that may have a different tax rate. Accordingly, a tax due, for example, to a taxing authority, may be calculated based upon the materials or goods blended to make up a particular item.

System for tax tracking of blended goods and related methods